SAME54P20A Test Project
Data Structures | Macros | Typedefs | Enumerations | Functions
same54n20a.h File Reference

Header file for SAME54N20A. More...

#include <stdint.h>
#include <core_cm4.h>
#include "system_same54.h"
#include "component/ac.h"
#include "component/adc.h"
#include "component/aes.h"
#include "component/can.h"
#include "component/ccl.h"
#include "component/cmcc.h"
#include "component/dac.h"
#include "component/dmac.h"
#include "component/dsu.h"
#include "component/eic.h"
#include "component/evsys.h"
#include "component/freqm.h"
#include "component/gclk.h"
#include "component/gmac.h"
#include "component/hmatrixb.h"
#include "component/icm.h"
#include "component/i2s.h"
#include "component/mclk.h"
#include "component/nvmctrl.h"
#include "component/oscctrl.h"
#include "component/osc32kctrl.h"
#include "component/pac.h"
#include "component/pcc.h"
#include "component/pdec.h"
#include "component/pm.h"
#include "component/port.h"
#include "component/qspi.h"
#include "component/ramecc.h"
#include "component/rstc.h"
#include "component/rtc.h"
#include "component/sdhc.h"
#include "component/sercom.h"
#include "component/supc.h"
#include "component/tc.h"
#include "component/tcc.h"
#include "component/trng.h"
#include "component/usb.h"
#include "component/wdt.h"
#include "instance/ac.h"
#include "instance/adc0.h"
#include "instance/adc1.h"
#include "instance/aes.h"
#include "instance/can0.h"
#include "instance/can1.h"
#include "instance/ccl.h"
#include "instance/cmcc.h"
#include "instance/dac.h"
#include "instance/dmac.h"
#include "instance/dsu.h"
#include "instance/eic.h"
#include "instance/evsys.h"
#include "instance/freqm.h"
#include "instance/gclk.h"
#include "instance/gmac.h"
#include "instance/hmatrix.h"
#include "instance/icm.h"
#include "instance/i2s.h"
#include "instance/mclk.h"
#include "instance/nvmctrl.h"
#include "instance/oscctrl.h"
#include "instance/osc32kctrl.h"
#include "instance/pac.h"
#include "instance/pcc.h"
#include "instance/pdec.h"
#include "instance/pm.h"
#include "instance/port.h"
#include "instance/pukcc.h"
#include "instance/qspi.h"
#include "instance/ramecc.h"
#include "instance/rstc.h"
#include "instance/rtc.h"
#include "instance/sdhc0.h"
#include "instance/sdhc1.h"
#include "instance/sercom0.h"
#include "instance/sercom1.h"
#include "instance/sercom2.h"
#include "instance/sercom3.h"
#include "instance/sercom4.h"
#include "instance/sercom5.h"
#include "instance/sercom6.h"
#include "instance/sercom7.h"
#include "instance/supc.h"
#include "instance/tc0.h"
#include "instance/tc1.h"
#include "instance/tc2.h"
#include "instance/tc3.h"
#include "instance/tc4.h"
#include "instance/tc5.h"
#include "instance/tc6.h"
#include "instance/tc7.h"
#include "instance/tcc0.h"
#include "instance/tcc1.h"
#include "instance/tcc2.h"
#include "instance/tcc3.h"
#include "instance/tcc4.h"
#include "instance/trng.h"
#include "instance/usb.h"
#include "instance/wdt.h"
#include "pio/same54n20a.h"

Go to the source code of this file.

Data Structures

struct  _DeviceVectors
 

Macros

#define _U_(x)   x ## U
 
#define _L_(x)   x ## L
 
#define _UL_(x)   x ## UL
 
#define __CM4_REV   1
 
#define __DEBUG_LVL   3
 
#define __FPU_PRESENT   1
 
#define __MPU_PRESENT   1
 
#define __NVIC_PRIO_BITS   3
 
#define __TRACE_LVL   2
 
#define __VTOR_PRESENT   1
 
#define __Vendor_SysTickConfig   0
 
#define ID_PAC   0
 Peripheral Access Controller (PAC)
 
#define ID_PM   1
 Power Manager (PM)
 
#define ID_MCLK   2
 Main Clock (MCLK)
 
#define ID_RSTC   3
 Reset Controller (RSTC)
 
#define ID_OSCCTRL   4
 Oscillators Control (OSCCTRL)
 
#define ID_OSC32KCTRL   5
 32kHz Oscillators Control (OSC32KCTRL)
 
#define ID_SUPC   6
 Supply Controller (SUPC)
 
#define ID_GCLK   7
 Generic Clock Generator (GCLK)
 
#define ID_WDT   8
 Watchdog Timer (WDT)
 
#define ID_RTC   9
 Real-Time Counter (RTC)
 
#define ID_EIC   10
 External Interrupt Controller (EIC)
 
#define ID_FREQM   11
 Frequency Meter (FREQM)
 
#define ID_SERCOM0   12
 Serial Communication Interface 0 (SERCOM0)
 
#define ID_SERCOM1   13
 Serial Communication Interface 1 (SERCOM1)
 
#define ID_TC0   14
 Basic Timer Counter 0 (TC0)
 
#define ID_TC1   15
 Basic Timer Counter 1 (TC1)
 
#define ID_USB   32
 Universal Serial Bus (USB)
 
#define ID_DSU   33
 Device Service Unit (DSU)
 
#define ID_NVMCTRL   34
 Non-Volatile Memory Controller (NVMCTRL)
 
#define ID_CMCC   35
 Cortex M Cache Controller (CMCC)
 
#define ID_PORT   36
 Port Module (PORT)
 
#define ID_DMAC   37
 Direct Memory Access Controller (DMAC)
 
#define ID_HMATRIX   38
 HSB Matrix (HMATRIX)
 
#define ID_EVSYS   39
 Event System Interface (EVSYS)
 
#define ID_SERCOM2   41
 Serial Communication Interface 2 (SERCOM2)
 
#define ID_SERCOM3   42
 Serial Communication Interface 3 (SERCOM3)
 
#define ID_TCC0   43
 Timer Counter Control 0 (TCC0)
 
#define ID_TCC1   44
 Timer Counter Control 1 (TCC1)
 
#define ID_TC2   45
 Basic Timer Counter 2 (TC2)
 
#define ID_TC3   46
 Basic Timer Counter 3 (TC3)
 
#define ID_RAMECC   48
 RAM ECC (RAMECC)
 
#define ID_CAN0   64
 Control Area Network 0 (CAN0)
 
#define ID_CAN1   65
 Control Area Network 1 (CAN1)
 
#define ID_GMAC   66
 Ethernet MAC (GMAC)
 
#define ID_TCC2   67
 Timer Counter Control 2 (TCC2)
 
#define ID_TCC3   68
 Timer Counter Control 3 (TCC3)
 
#define ID_TC4   69
 Basic Timer Counter 4 (TC4)
 
#define ID_TC5   70
 Basic Timer Counter 5 (TC5)
 
#define ID_PDEC   71
 Quadrature Decodeur (PDEC)
 
#define ID_AC   72
 Analog Comparators (AC)
 
#define ID_AES   73
 Advanced Encryption Standard (AES)
 
#define ID_TRNG   74
 True Random Generator (TRNG)
 
#define ID_ICM   75
 Integrity Check Monitor (ICM)
 
#define ID_PUKCC   76
 PUblic-Key Cryptography Controller (PUKCC)
 
#define ID_QSPI   77
 Quad SPI interface (QSPI)
 
#define ID_CCL   78
 Configurable Custom Logic (CCL)
 
#define ID_SERCOM4   96
 Serial Communication Interface 4 (SERCOM4)
 
#define ID_SERCOM5   97
 Serial Communication Interface 5 (SERCOM5)
 
#define ID_SERCOM6   98
 Serial Communication Interface 6 (SERCOM6)
 
#define ID_SERCOM7   99
 Serial Communication Interface 7 (SERCOM7)
 
#define ID_TCC4   100
 Timer Counter Control 4 (TCC4)
 
#define ID_TC6   101
 Basic Timer Counter 6 (TC6)
 
#define ID_TC7   102
 Basic Timer Counter 7 (TC7)
 
#define ID_ADC0   103
 Analog Digital Converter 0 (ADC0)
 
#define ID_ADC1   104
 Analog Digital Converter 1 (ADC1)
 
#define ID_DAC   105
 Digital-to-Analog Converter (DAC)
 
#define ID_I2S   106
 Inter-IC Sound Interface (I2S)
 
#define ID_PCC   107
 Parallel Capture Controller (PCC)
 
#define ID_SDHC0   128
 SD/MMC Host Controller (SDHC0)
 
#define ID_SDHC1   129
 SD/MMC Host Controller (SDHC1)
 
#define ID_PERIPH_COUNT   130
 Max number of peripheral IDs.
 
#define AC   ((Ac *)0x42002000UL)
 (AC) APB Base Address
 
#define AC_INST_NUM   1
 (AC) Number of instances
 
#define AC_INSTS   { AC }
 (AC) Instances List
 
#define ADC0   ((Adc *)0x43001C00UL)
 (ADC0) APB Base Address
 
#define ADC1   ((Adc *)0x43002000UL)
 (ADC1) APB Base Address
 
#define ADC_INST_NUM   2
 (ADC) Number of instances
 
#define ADC_INSTS   { ADC0, ADC1 }
 (ADC) Instances List
 
#define AES   ((Aes *)0x42002400UL)
 (AES) APB Base Address
 
#define AES_INST_NUM   1
 (AES) Number of instances
 
#define AES_INSTS   { AES }
 (AES) Instances List
 
#define CAN0   ((Can *)0x42000000UL)
 (CAN0) APB Base Address
 
#define CAN1   ((Can *)0x42000400UL)
 (CAN1) APB Base Address
 
#define CAN_INST_NUM   2
 (CAN) Number of instances
 
#define CAN_INSTS   { CAN0, CAN1 }
 (CAN) Instances List
 
#define CCL   ((Ccl *)0x42003800UL)
 (CCL) APB Base Address
 
#define CCL_INST_NUM   1
 (CCL) Number of instances
 
#define CCL_INSTS   { CCL }
 (CCL) Instances List
 
#define CMCC   ((Cmcc *)0x41006000UL)
 (CMCC) APB Base Address
 
#define CMCC_AHB   (0x03000000UL)
 (CMCC) AHB Base Address
 
#define CMCC_INST_NUM   1
 (CMCC) Number of instances
 
#define CMCC_INSTS   { CMCC }
 (CMCC) Instances List
 
#define DAC   ((Dac *)0x43002400UL)
 (DAC) APB Base Address
 
#define DAC_INST_NUM   1
 (DAC) Number of instances
 
#define DAC_INSTS   { DAC }
 (DAC) Instances List
 
#define DMAC   ((Dmac *)0x4100A000UL)
 (DMAC) APB Base Address
 
#define DMAC_INST_NUM   1
 (DMAC) Number of instances
 
#define DMAC_INSTS   { DMAC }
 (DMAC) Instances List
 
#define DSU   ((Dsu *)0x41002000UL)
 (DSU) APB Base Address
 
#define DSU_INST_NUM   1
 (DSU) Number of instances
 
#define DSU_INSTS   { DSU }
 (DSU) Instances List
 
#define EIC   ((Eic *)0x40002800UL)
 (EIC) APB Base Address
 
#define EIC_INST_NUM   1
 (EIC) Number of instances
 
#define EIC_INSTS   { EIC }
 (EIC) Instances List
 
#define EVSYS   ((Evsys *)0x4100E000UL)
 (EVSYS) APB Base Address
 
#define EVSYS_INST_NUM   1
 (EVSYS) Number of instances
 
#define EVSYS_INSTS   { EVSYS }
 (EVSYS) Instances List
 
#define FREQM   ((Freqm *)0x40002C00UL)
 (FREQM) APB Base Address
 
#define FREQM_INST_NUM   1
 (FREQM) Number of instances
 
#define FREQM_INSTS   { FREQM }
 (FREQM) Instances List
 
#define GCLK   ((Gclk *)0x40001C00UL)
 (GCLK) APB Base Address
 
#define GCLK_INST_NUM   1
 (GCLK) Number of instances
 
#define GCLK_INSTS   { GCLK }
 (GCLK) Instances List
 
#define GMAC   ((Gmac *)0x42000800UL)
 (GMAC) APB Base Address
 
#define GMAC_INST_NUM   1
 (GMAC) Number of instances
 
#define GMAC_INSTS   { GMAC }
 (GMAC) Instances List
 
#define HMATRIX   ((Hmatrixb *)0x4100C000UL)
 (HMATRIX) APB Base Address
 
#define HMATRIXB_INST_NUM   1
 (HMATRIXB) Number of instances
 
#define HMATRIXB_INSTS   { HMATRIX }
 (HMATRIXB) Instances List
 
#define ICM   ((Icm *)0x42002C00UL)
 (ICM) APB Base Address
 
#define ICM_INST_NUM   1
 (ICM) Number of instances
 
#define ICM_INSTS   { ICM }
 (ICM) Instances List
 
#define I2S   ((I2s *)0x43002800UL)
 (I2S) APB Base Address
 
#define I2S_INST_NUM   1
 (I2S) Number of instances
 
#define I2S_INSTS   { I2S }
 (I2S) Instances List
 
#define MCLK   ((Mclk *)0x40000800UL)
 (MCLK) APB Base Address
 
#define MCLK_INST_NUM   1
 (MCLK) Number of instances
 
#define MCLK_INSTS   { MCLK }
 (MCLK) Instances List
 
#define NVMCTRL   ((Nvmctrl *)0x41004000UL)
 (NVMCTRL) APB Base Address
 
#define NVMCTRL_SW0   (0x00800080UL)
 (NVMCTRL) SW0 Base Address
 
#define NVMCTRL_TEMP_LOG   (0x00800100UL)
 (NVMCTRL) TEMP_LOG Base Address
 
#define NVMCTRL_USER   (0x00804000UL)
 (NVMCTRL) USER Base Address
 
#define NVMCTRL_INST_NUM   1
 (NVMCTRL) Number of instances
 
#define NVMCTRL_INSTS   { NVMCTRL }
 (NVMCTRL) Instances List
 
#define OSCCTRL   ((Oscctrl *)0x40001000UL)
 (OSCCTRL) APB Base Address
 
#define OSCCTRL_INST_NUM   1
 (OSCCTRL) Number of instances
 
#define OSCCTRL_INSTS   { OSCCTRL }
 (OSCCTRL) Instances List
 
#define OSC32KCTRL   ((Osc32kctrl *)0x40001400UL)
 (OSC32KCTRL) APB Base Address
 
#define OSC32KCTRL_INST_NUM   1
 (OSC32KCTRL) Number of instances
 
#define OSC32KCTRL_INSTS   { OSC32KCTRL }
 (OSC32KCTRL) Instances List
 
#define PAC   ((Pac *)0x40000000UL)
 (PAC) APB Base Address
 
#define PAC_INST_NUM   1
 (PAC) Number of instances
 
#define PAC_INSTS   { PAC }
 (PAC) Instances List
 
#define PCC   ((Pcc *)0x43002C00UL)
 (PCC) APB Base Address
 
#define PCC_INST_NUM   1
 (PCC) Number of instances
 
#define PCC_INSTS   { PCC }
 (PCC) Instances List
 
#define PDEC   ((Pdec *)0x42001C00UL)
 (PDEC) APB Base Address
 
#define PDEC_INST_NUM   1
 (PDEC) Number of instances
 
#define PDEC_INSTS   { PDEC }
 (PDEC) Instances List
 
#define PM   ((Pm *)0x40000400UL)
 (PM) APB Base Address
 
#define PM_INST_NUM   1
 (PM) Number of instances
 
#define PM_INSTS   { PM }
 (PM) Instances List
 
#define PORT   ((Port *)0x41008000UL)
 (PORT) APB Base Address
 
#define PORT_INST_NUM   1
 (PORT) Number of instances
 
#define PORT_INSTS   { PORT }
 (PORT) Instances List
 
#define PUKCC   ((void *)0x42003000UL)
 (PUKCC) APB Base Address
 
#define PUKCC_AHB   ((void *)0x02000000UL)
 (PUKCC) AHB Base Address
 
#define PUKCC_INST_NUM   1
 (PUKCC) Number of instances
 
#define PUKCC_INSTS   { PUKCC }
 (PUKCC) Instances List
 
#define QSPI   ((Qspi *)0x42003400UL)
 (QSPI) APB Base Address
 
#define QSPI_AHB   (0x04000000UL)
 (QSPI) AHB Base Address
 
#define QSPI_INST_NUM   1
 (QSPI) Number of instances
 
#define QSPI_INSTS   { QSPI }
 (QSPI) Instances List
 
#define RAMECC   ((Ramecc *)0x41020000UL)
 (RAMECC) APB Base Address
 
#define RAMECC_INST_NUM   1
 (RAMECC) Number of instances
 
#define RAMECC_INSTS   { RAMECC }
 (RAMECC) Instances List
 
#define RSTC   ((Rstc *)0x40000C00UL)
 (RSTC) APB Base Address
 
#define RSTC_INST_NUM   1
 (RSTC) Number of instances
 
#define RSTC_INSTS   { RSTC }
 (RSTC) Instances List
 
#define RTC   ((Rtc *)0x40002400UL)
 (RTC) APB Base Address
 
#define RTC_INST_NUM   1
 (RTC) Number of instances
 
#define RTC_INSTS   { RTC }
 (RTC) Instances List
 
#define SDHC0   ((Sdhc *)0x45000000UL)
 (SDHC0) AHB Base Address
 
#define SDHC1   ((Sdhc *)0x46000000UL)
 (SDHC1) AHB Base Address
 
#define SDHC_INST_NUM   2
 (SDHC) Number of instances
 
#define SDHC_INSTS   { SDHC0, SDHC1 }
 (SDHC) Instances List
 
#define SERCOM0   ((Sercom *)0x40003000UL)
 (SERCOM0) APB Base Address
 
#define SERCOM1   ((Sercom *)0x40003400UL)
 (SERCOM1) APB Base Address
 
#define SERCOM2   ((Sercom *)0x41012000UL)
 (SERCOM2) APB Base Address
 
#define SERCOM3   ((Sercom *)0x41014000UL)
 (SERCOM3) APB Base Address
 
#define SERCOM4   ((Sercom *)0x43000000UL)
 (SERCOM4) APB Base Address
 
#define SERCOM5   ((Sercom *)0x43000400UL)
 (SERCOM5) APB Base Address
 
#define SERCOM6   ((Sercom *)0x43000800UL)
 (SERCOM6) APB Base Address
 
#define SERCOM7   ((Sercom *)0x43000C00UL)
 (SERCOM7) APB Base Address
 
#define SERCOM_INST_NUM   8
 (SERCOM) Number of instances
 
#define SERCOM_INSTS   { SERCOM0, SERCOM1, SERCOM2, SERCOM3, SERCOM4, SERCOM5, SERCOM6, SERCOM7 }
 (SERCOM) Instances List
 
#define SUPC   ((Supc *)0x40001800UL)
 (SUPC) APB Base Address
 
#define SUPC_INST_NUM   1
 (SUPC) Number of instances
 
#define SUPC_INSTS   { SUPC }
 (SUPC) Instances List
 
#define TC0   ((Tc *)0x40003800UL)
 (TC0) APB Base Address
 
#define TC1   ((Tc *)0x40003C00UL)
 (TC1) APB Base Address
 
#define TC2   ((Tc *)0x4101A000UL)
 (TC2) APB Base Address
 
#define TC3   ((Tc *)0x4101C000UL)
 (TC3) APB Base Address
 
#define TC4   ((Tc *)0x42001400UL)
 (TC4) APB Base Address
 
#define TC5   ((Tc *)0x42001800UL)
 (TC5) APB Base Address
 
#define TC6   ((Tc *)0x43001400UL)
 (TC6) APB Base Address
 
#define TC7   ((Tc *)0x43001800UL)
 (TC7) APB Base Address
 
#define TC_INST_NUM   8
 (TC) Number of instances
 
#define TC_INSTS   { TC0, TC1, TC2, TC3, TC4, TC5, TC6, TC7 }
 (TC) Instances List
 
#define TCC0   ((Tcc *)0x41016000UL)
 (TCC0) APB Base Address
 
#define TCC1   ((Tcc *)0x41018000UL)
 (TCC1) APB Base Address
 
#define TCC2   ((Tcc *)0x42000C00UL)
 (TCC2) APB Base Address
 
#define TCC3   ((Tcc *)0x42001000UL)
 (TCC3) APB Base Address
 
#define TCC4   ((Tcc *)0x43001000UL)
 (TCC4) APB Base Address
 
#define TCC_INST_NUM   5
 (TCC) Number of instances
 
#define TCC_INSTS   { TCC0, TCC1, TCC2, TCC3, TCC4 }
 (TCC) Instances List
 
#define TRNG   ((Trng *)0x42002800UL)
 (TRNG) APB Base Address
 
#define TRNG_INST_NUM   1
 (TRNG) Number of instances
 
#define TRNG_INSTS   { TRNG }
 (TRNG) Instances List
 
#define USB   ((Usb *)0x41000000UL)
 (USB) APB Base Address
 
#define USB_INST_NUM   1
 (USB) Number of instances
 
#define USB_INSTS   { USB }
 (USB) Instances List
 
#define WDT   ((Wdt *)0x40002000UL)
 (WDT) APB Base Address
 
#define WDT_INST_NUM   1
 (WDT) Number of instances
 
#define WDT_INSTS   { WDT }
 (WDT) Instances List
 
#define HSRAM_SIZE   _UL_(0x00040000) /* 256 kB */
 
#define FLASH_SIZE   _UL_(0x00100000) /* 1024 kB */
 
#define FLASH_PAGE_SIZE   512
 
#define FLASH_NB_OF_PAGES   2048
 
#define FLASH_USER_PAGE_SIZE   512
 
#define BKUPRAM_SIZE   _UL_(0x00002000) /* 8 kB */
 
#define QSPI_SIZE   _UL_(0x01000000) /* 16384 kB */
 
#define FLASH_ADDR   _UL_(0x00000000)
 
#define CMCC_DATARAM_ADDR   _UL_(0x03000000)
 
#define CMCC_DATARAM_SIZE   _UL_(0x00001000)
 
#define CMCC_TAGRAM_ADDR   _UL_(0x03001000)
 
#define CMCC_TAGRAM_SIZE   _UL_(0x00000400)
 
#define CMCC_VALIDRAM_ADDR   _UL_(0x03002000)
 
#define CMCC_VALIDRAM_SIZE   _UL_(0x00000040)
 
#define HSRAM_ADDR   _UL_(0x20000000)
 
#define HSRAM_ETB_ADDR   _UL_(0x20000000)
 
#define HSRAM_ETB_SIZE   _UL_(0x00008000)
 
#define HSRAM_RET1_ADDR   _UL_(0x20000000)
 
#define HSRAM_RET1_SIZE   _UL_(0x00008000)
 
#define HPB0_ADDR   _UL_(0x40000000)
 
#define HPB1_ADDR   _UL_(0x41000000)
 
#define HPB2_ADDR   _UL_(0x42000000)
 
#define HPB3_ADDR   _UL_(0x43000000)
 
#define SEEPROM_ADDR   _UL_(0x44000000)
 
#define BKUPRAM_ADDR   _UL_(0x47000000)
 
#define PPB_ADDR   _UL_(0xE0000000)
 
#define DSU_DID_RESETVALUE   _UL_(0x61840302)
 
#define ADC0_TOUCH_LINES_NUM   32
 
#define PORT_GROUPS   3
 

Typedefs

typedef volatile const uint32_t RoReg
 
typedef volatile const uint16_t RoReg16
 
typedef volatile const uint8_t RoReg8
 
typedef volatile uint32_t WoReg
 
typedef volatile uint16_t WoReg16
 
typedef volatile uint8_t WoReg8
 
typedef volatile uint32_t RwReg
 
typedef volatile uint16_t RwReg16
 
typedef volatile uint8_t RwReg8
 
typedef enum IRQn IRQn_Type
 
typedef struct _DeviceVectors DeviceVectors
 

Enumerations

enum  IRQn {
  NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, MemoryManagement_IRQn = -12, BusFault_IRQn = -11,
  UsageFault_IRQn = -10, SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2,
  SysTick_IRQn = -1, PM_IRQn = 0, MCLK_IRQn = 1, OSCCTRL_0_IRQn = 2,
  OSCCTRL_1_IRQn = 3, OSCCTRL_2_IRQn = 4, OSCCTRL_3_IRQn = 5, OSCCTRL_4_IRQn = 6,
  OSC32KCTRL_IRQn = 7, SUPC_0_IRQn = 8, SUPC_1_IRQn = 9, WDT_IRQn = 10,
  RTC_IRQn = 11, EIC_0_IRQn = 12, EIC_1_IRQn = 13, EIC_2_IRQn = 14,
  EIC_3_IRQn = 15, EIC_4_IRQn = 16, EIC_5_IRQn = 17, EIC_6_IRQn = 18,
  EIC_7_IRQn = 19, EIC_8_IRQn = 20, EIC_9_IRQn = 21, EIC_10_IRQn = 22,
  EIC_11_IRQn = 23, EIC_12_IRQn = 24, EIC_13_IRQn = 25, EIC_14_IRQn = 26,
  EIC_15_IRQn = 27, FREQM_IRQn = 28, NVMCTRL_0_IRQn = 29, NVMCTRL_1_IRQn = 30,
  DMAC_0_IRQn = 31, DMAC_1_IRQn = 32, DMAC_2_IRQn = 33, DMAC_3_IRQn = 34,
  DMAC_4_IRQn = 35, EVSYS_0_IRQn = 36, EVSYS_1_IRQn = 37, EVSYS_2_IRQn = 38,
  EVSYS_3_IRQn = 39, EVSYS_4_IRQn = 40, PAC_IRQn = 41, RAMECC_IRQn = 45,
  SERCOM0_0_IRQn = 46, SERCOM0_1_IRQn = 47, SERCOM0_2_IRQn = 48, SERCOM0_3_IRQn = 49,
  SERCOM1_0_IRQn = 50, SERCOM1_1_IRQn = 51, SERCOM1_2_IRQn = 52, SERCOM1_3_IRQn = 53,
  SERCOM2_0_IRQn = 54, SERCOM2_1_IRQn = 55, SERCOM2_2_IRQn = 56, SERCOM2_3_IRQn = 57,
  SERCOM3_0_IRQn = 58, SERCOM3_1_IRQn = 59, SERCOM3_2_IRQn = 60, SERCOM3_3_IRQn = 61,
  SERCOM4_0_IRQn = 62, SERCOM4_1_IRQn = 63, SERCOM4_2_IRQn = 64, SERCOM4_3_IRQn = 65,
  SERCOM5_0_IRQn = 66, SERCOM5_1_IRQn = 67, SERCOM5_2_IRQn = 68, SERCOM5_3_IRQn = 69,
  SERCOM6_0_IRQn = 70, SERCOM6_1_IRQn = 71, SERCOM6_2_IRQn = 72, SERCOM6_3_IRQn = 73,
  SERCOM7_0_IRQn = 74, SERCOM7_1_IRQn = 75, SERCOM7_2_IRQn = 76, SERCOM7_3_IRQn = 77,
  CAN0_IRQn = 78, CAN1_IRQn = 79, USB_0_IRQn = 80, USB_1_IRQn = 81,
  USB_2_IRQn = 82, USB_3_IRQn = 83, GMAC_IRQn = 84, TCC0_0_IRQn = 85,
  TCC0_1_IRQn = 86, TCC0_2_IRQn = 87, TCC0_3_IRQn = 88, TCC0_4_IRQn = 89,
  TCC0_5_IRQn = 90, TCC0_6_IRQn = 91, TCC1_0_IRQn = 92, TCC1_1_IRQn = 93,
  TCC1_2_IRQn = 94, TCC1_3_IRQn = 95, TCC1_4_IRQn = 96, TCC2_0_IRQn = 97,
  TCC2_1_IRQn = 98, TCC2_2_IRQn = 99, TCC2_3_IRQn = 100, TCC3_0_IRQn = 101,
  TCC3_1_IRQn = 102, TCC3_2_IRQn = 103, TCC4_0_IRQn = 104, TCC4_1_IRQn = 105,
  TCC4_2_IRQn = 106, TC0_IRQn = 107, TC1_IRQn = 108, TC2_IRQn = 109,
  TC3_IRQn = 110, TC4_IRQn = 111, TC5_IRQn = 112, TC6_IRQn = 113,
  TC7_IRQn = 114, PDEC_0_IRQn = 115, PDEC_1_IRQn = 116, PDEC_2_IRQn = 117,
  ADC0_0_IRQn = 118, ADC0_1_IRQn = 119, ADC1_0_IRQn = 120, ADC1_1_IRQn = 121,
  AC_IRQn = 122, DAC_0_IRQn = 123, DAC_1_IRQn = 124, DAC_2_IRQn = 125,
  DAC_3_IRQn = 126, DAC_4_IRQn = 127, I2S_IRQn = 128, PCC_IRQn = 129,
  AES_IRQn = 130, TRNG_IRQn = 131, ICM_IRQn = 132, PUKCC_IRQn = 133,
  QSPI_IRQn = 134, SDHC0_IRQn = 135, SDHC1_IRQn = 136, PERIPH_COUNT_IRQn = 137,
  NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, MemoryManagement_IRQn = -12, BusFault_IRQn = -11,
  UsageFault_IRQn = -10, SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2,
  SysTick_IRQn = -1, PM_IRQn = 0, MCLK_IRQn = 1, OSCCTRL_0_IRQn = 2,
  OSCCTRL_1_IRQn = 3, OSCCTRL_2_IRQn = 4, OSCCTRL_3_IRQn = 5, OSCCTRL_4_IRQn = 6,
  OSC32KCTRL_IRQn = 7, SUPC_0_IRQn = 8, SUPC_1_IRQn = 9, WDT_IRQn = 10,
  RTC_IRQn = 11, EIC_0_IRQn = 12, EIC_1_IRQn = 13, EIC_2_IRQn = 14,
  EIC_3_IRQn = 15, EIC_4_IRQn = 16, EIC_5_IRQn = 17, EIC_6_IRQn = 18,
  EIC_7_IRQn = 19, EIC_8_IRQn = 20, EIC_9_IRQn = 21, EIC_10_IRQn = 22,
  EIC_11_IRQn = 23, EIC_12_IRQn = 24, EIC_13_IRQn = 25, EIC_14_IRQn = 26,
  EIC_15_IRQn = 27, FREQM_IRQn = 28, NVMCTRL_0_IRQn = 29, NVMCTRL_1_IRQn = 30,
  DMAC_0_IRQn = 31, DMAC_1_IRQn = 32, DMAC_2_IRQn = 33, DMAC_3_IRQn = 34,
  DMAC_4_IRQn = 35, EVSYS_0_IRQn = 36, EVSYS_1_IRQn = 37, EVSYS_2_IRQn = 38,
  EVSYS_3_IRQn = 39, EVSYS_4_IRQn = 40, PAC_IRQn = 41, RAMECC_IRQn = 45,
  SERCOM0_0_IRQn = 46, SERCOM0_1_IRQn = 47, SERCOM0_2_IRQn = 48, SERCOM0_3_IRQn = 49,
  SERCOM1_0_IRQn = 50, SERCOM1_1_IRQn = 51, SERCOM1_2_IRQn = 52, SERCOM1_3_IRQn = 53,
  SERCOM2_0_IRQn = 54, SERCOM2_1_IRQn = 55, SERCOM2_2_IRQn = 56, SERCOM2_3_IRQn = 57,
  SERCOM3_0_IRQn = 58, SERCOM3_1_IRQn = 59, SERCOM3_2_IRQn = 60, SERCOM3_3_IRQn = 61,
  SERCOM4_0_IRQn = 62, SERCOM4_1_IRQn = 63, SERCOM4_2_IRQn = 64, SERCOM4_3_IRQn = 65,
  SERCOM5_0_IRQn = 66, SERCOM5_1_IRQn = 67, SERCOM5_2_IRQn = 68, SERCOM5_3_IRQn = 69,
  SERCOM6_0_IRQn = 70, SERCOM6_1_IRQn = 71, SERCOM6_2_IRQn = 72, SERCOM6_3_IRQn = 73,
  SERCOM7_0_IRQn = 74, SERCOM7_1_IRQn = 75, SERCOM7_2_IRQn = 76, SERCOM7_3_IRQn = 77,
  CAN0_IRQn = 78, CAN1_IRQn = 79, USB_0_IRQn = 80, USB_1_IRQn = 81,
  USB_2_IRQn = 82, USB_3_IRQn = 83, GMAC_IRQn = 84, TCC0_0_IRQn = 85,
  TCC0_1_IRQn = 86, TCC0_2_IRQn = 87, TCC0_3_IRQn = 88, TCC0_4_IRQn = 89,
  TCC0_5_IRQn = 90, TCC0_6_IRQn = 91, TCC1_0_IRQn = 92, TCC1_1_IRQn = 93,
  TCC1_2_IRQn = 94, TCC1_3_IRQn = 95, TCC1_4_IRQn = 96, TCC2_0_IRQn = 97,
  TCC2_1_IRQn = 98, TCC2_2_IRQn = 99, TCC2_3_IRQn = 100, TCC3_0_IRQn = 101,
  TCC3_1_IRQn = 102, TCC3_2_IRQn = 103, TCC4_0_IRQn = 104, TCC4_1_IRQn = 105,
  TCC4_2_IRQn = 106, TC0_IRQn = 107, TC1_IRQn = 108, TC2_IRQn = 109,
  TC3_IRQn = 110, TC4_IRQn = 111, TC5_IRQn = 112, TC6_IRQn = 113,
  TC7_IRQn = 114, PDEC_0_IRQn = 115, PDEC_1_IRQn = 116, PDEC_2_IRQn = 117,
  ADC0_0_IRQn = 118, ADC0_1_IRQn = 119, ADC1_0_IRQn = 120, ADC1_1_IRQn = 121,
  AC_IRQn = 122, DAC_0_IRQn = 123, DAC_1_IRQn = 124, DAC_2_IRQn = 125,
  DAC_3_IRQn = 126, DAC_4_IRQn = 127, I2S_IRQn = 128, PCC_IRQn = 129,
  AES_IRQn = 130, TRNG_IRQn = 131, ICM_IRQn = 132, PUKCC_IRQn = 133,
  QSPI_IRQn = 134, SDHC0_IRQn = 135, SDHC1_IRQn = 136, PERIPH_COUNT_IRQn = 137,
  NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, MemoryManagement_IRQn = -12, BusFault_IRQn = -11,
  UsageFault_IRQn = -10, SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2,
  SysTick_IRQn = -1, PM_IRQn = 0, MCLK_IRQn = 1, OSCCTRL_0_IRQn = 2,
  OSCCTRL_1_IRQn = 3, OSCCTRL_2_IRQn = 4, OSCCTRL_3_IRQn = 5, OSCCTRL_4_IRQn = 6,
  OSC32KCTRL_IRQn = 7, SUPC_0_IRQn = 8, SUPC_1_IRQn = 9, WDT_IRQn = 10,
  RTC_IRQn = 11, EIC_0_IRQn = 12, EIC_1_IRQn = 13, EIC_2_IRQn = 14,
  EIC_3_IRQn = 15, EIC_4_IRQn = 16, EIC_5_IRQn = 17, EIC_6_IRQn = 18,
  EIC_7_IRQn = 19, EIC_8_IRQn = 20, EIC_9_IRQn = 21, EIC_10_IRQn = 22,
  EIC_11_IRQn = 23, EIC_12_IRQn = 24, EIC_13_IRQn = 25, EIC_14_IRQn = 26,
  EIC_15_IRQn = 27, FREQM_IRQn = 28, NVMCTRL_0_IRQn = 29, NVMCTRL_1_IRQn = 30,
  DMAC_0_IRQn = 31, DMAC_1_IRQn = 32, DMAC_2_IRQn = 33, DMAC_3_IRQn = 34,
  DMAC_4_IRQn = 35, EVSYS_0_IRQn = 36, EVSYS_1_IRQn = 37, EVSYS_2_IRQn = 38,
  EVSYS_3_IRQn = 39, EVSYS_4_IRQn = 40, PAC_IRQn = 41, RAMECC_IRQn = 45,
  SERCOM0_0_IRQn = 46, SERCOM0_1_IRQn = 47, SERCOM0_2_IRQn = 48, SERCOM0_3_IRQn = 49,
  SERCOM1_0_IRQn = 50, SERCOM1_1_IRQn = 51, SERCOM1_2_IRQn = 52, SERCOM1_3_IRQn = 53,
  SERCOM2_0_IRQn = 54, SERCOM2_1_IRQn = 55, SERCOM2_2_IRQn = 56, SERCOM2_3_IRQn = 57,
  SERCOM3_0_IRQn = 58, SERCOM3_1_IRQn = 59, SERCOM3_2_IRQn = 60, SERCOM3_3_IRQn = 61,
  SERCOM4_0_IRQn = 62, SERCOM4_1_IRQn = 63, SERCOM4_2_IRQn = 64, SERCOM4_3_IRQn = 65,
  SERCOM5_0_IRQn = 66, SERCOM5_1_IRQn = 67, SERCOM5_2_IRQn = 68, SERCOM5_3_IRQn = 69,
  SERCOM6_0_IRQn = 70, SERCOM6_1_IRQn = 71, SERCOM6_2_IRQn = 72, SERCOM6_3_IRQn = 73,
  SERCOM7_0_IRQn = 74, SERCOM7_1_IRQn = 75, SERCOM7_2_IRQn = 76, SERCOM7_3_IRQn = 77,
  CAN0_IRQn = 78, CAN1_IRQn = 79, USB_0_IRQn = 80, USB_1_IRQn = 81,
  USB_2_IRQn = 82, USB_3_IRQn = 83, GMAC_IRQn = 84, TCC0_0_IRQn = 85,
  TCC0_1_IRQn = 86, TCC0_2_IRQn = 87, TCC0_3_IRQn = 88, TCC0_4_IRQn = 89,
  TCC0_5_IRQn = 90, TCC0_6_IRQn = 91, TCC1_0_IRQn = 92, TCC1_1_IRQn = 93,
  TCC1_2_IRQn = 94, TCC1_3_IRQn = 95, TCC1_4_IRQn = 96, TCC2_0_IRQn = 97,
  TCC2_1_IRQn = 98, TCC2_2_IRQn = 99, TCC2_3_IRQn = 100, TCC3_0_IRQn = 101,
  TCC3_1_IRQn = 102, TCC3_2_IRQn = 103, TCC4_0_IRQn = 104, TCC4_1_IRQn = 105,
  TCC4_2_IRQn = 106, TC0_IRQn = 107, TC1_IRQn = 108, TC2_IRQn = 109,
  TC3_IRQn = 110, TC4_IRQn = 111, TC5_IRQn = 112, TC6_IRQn = 113,
  TC7_IRQn = 114, PDEC_0_IRQn = 115, PDEC_1_IRQn = 116, PDEC_2_IRQn = 117,
  ADC0_0_IRQn = 118, ADC0_1_IRQn = 119, ADC1_0_IRQn = 120, ADC1_1_IRQn = 121,
  AC_IRQn = 122, DAC_0_IRQn = 123, DAC_1_IRQn = 124, DAC_2_IRQn = 125,
  DAC_3_IRQn = 126, DAC_4_IRQn = 127, I2S_IRQn = 128, PCC_IRQn = 129,
  AES_IRQn = 130, TRNG_IRQn = 131, ICM_IRQn = 132, PUKCC_IRQn = 133,
  QSPI_IRQn = 134, SDHC0_IRQn = 135, SDHC1_IRQn = 136, PERIPH_COUNT_IRQn = 137,
  NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, MemoryManagement_IRQn = -12, BusFault_IRQn = -11,
  UsageFault_IRQn = -10, SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2,
  SysTick_IRQn = -1, PM_IRQn = 0, MCLK_IRQn = 1, OSCCTRL_0_IRQn = 2,
  OSCCTRL_1_IRQn = 3, OSCCTRL_2_IRQn = 4, OSCCTRL_3_IRQn = 5, OSCCTRL_4_IRQn = 6,
  OSC32KCTRL_IRQn = 7, SUPC_0_IRQn = 8, SUPC_1_IRQn = 9, WDT_IRQn = 10,
  RTC_IRQn = 11, EIC_0_IRQn = 12, EIC_1_IRQn = 13, EIC_2_IRQn = 14,
  EIC_3_IRQn = 15, EIC_4_IRQn = 16, EIC_5_IRQn = 17, EIC_6_IRQn = 18,
  EIC_7_IRQn = 19, EIC_8_IRQn = 20, EIC_9_IRQn = 21, EIC_10_IRQn = 22,
  EIC_11_IRQn = 23, EIC_12_IRQn = 24, EIC_13_IRQn = 25, EIC_14_IRQn = 26,
  EIC_15_IRQn = 27, FREQM_IRQn = 28, NVMCTRL_0_IRQn = 29, NVMCTRL_1_IRQn = 30,
  DMAC_0_IRQn = 31, DMAC_1_IRQn = 32, DMAC_2_IRQn = 33, DMAC_3_IRQn = 34,
  DMAC_4_IRQn = 35, EVSYS_0_IRQn = 36, EVSYS_1_IRQn = 37, EVSYS_2_IRQn = 38,
  EVSYS_3_IRQn = 39, EVSYS_4_IRQn = 40, PAC_IRQn = 41, RAMECC_IRQn = 45,
  SERCOM0_0_IRQn = 46, SERCOM0_1_IRQn = 47, SERCOM0_2_IRQn = 48, SERCOM0_3_IRQn = 49,
  SERCOM1_0_IRQn = 50, SERCOM1_1_IRQn = 51, SERCOM1_2_IRQn = 52, SERCOM1_3_IRQn = 53,
  SERCOM2_0_IRQn = 54, SERCOM2_1_IRQn = 55, SERCOM2_2_IRQn = 56, SERCOM2_3_IRQn = 57,
  SERCOM3_0_IRQn = 58, SERCOM3_1_IRQn = 59, SERCOM3_2_IRQn = 60, SERCOM3_3_IRQn = 61,
  SERCOM4_0_IRQn = 62, SERCOM4_1_IRQn = 63, SERCOM4_2_IRQn = 64, SERCOM4_3_IRQn = 65,
  SERCOM5_0_IRQn = 66, SERCOM5_1_IRQn = 67, SERCOM5_2_IRQn = 68, SERCOM5_3_IRQn = 69,
  SERCOM6_0_IRQn = 70, SERCOM6_1_IRQn = 71, SERCOM6_2_IRQn = 72, SERCOM6_3_IRQn = 73,
  SERCOM7_0_IRQn = 74, SERCOM7_1_IRQn = 75, SERCOM7_2_IRQn = 76, SERCOM7_3_IRQn = 77,
  CAN0_IRQn = 78, CAN1_IRQn = 79, USB_0_IRQn = 80, USB_1_IRQn = 81,
  USB_2_IRQn = 82, USB_3_IRQn = 83, GMAC_IRQn = 84, TCC0_0_IRQn = 85,
  TCC0_1_IRQn = 86, TCC0_2_IRQn = 87, TCC0_3_IRQn = 88, TCC0_4_IRQn = 89,
  TCC0_5_IRQn = 90, TCC0_6_IRQn = 91, TCC1_0_IRQn = 92, TCC1_1_IRQn = 93,
  TCC1_2_IRQn = 94, TCC1_3_IRQn = 95, TCC1_4_IRQn = 96, TCC2_0_IRQn = 97,
  TCC2_1_IRQn = 98, TCC2_2_IRQn = 99, TCC2_3_IRQn = 100, TCC3_0_IRQn = 101,
  TCC3_1_IRQn = 102, TCC3_2_IRQn = 103, TCC4_0_IRQn = 104, TCC4_1_IRQn = 105,
  TCC4_2_IRQn = 106, TC0_IRQn = 107, TC1_IRQn = 108, TC2_IRQn = 109,
  TC3_IRQn = 110, TC4_IRQn = 111, TC5_IRQn = 112, TC6_IRQn = 113,
  TC7_IRQn = 114, PDEC_0_IRQn = 115, PDEC_1_IRQn = 116, PDEC_2_IRQn = 117,
  ADC0_0_IRQn = 118, ADC0_1_IRQn = 119, ADC1_0_IRQn = 120, ADC1_1_IRQn = 121,
  AC_IRQn = 122, DAC_0_IRQn = 123, DAC_1_IRQn = 124, DAC_2_IRQn = 125,
  DAC_3_IRQn = 126, DAC_4_IRQn = 127, I2S_IRQn = 128, PCC_IRQn = 129,
  AES_IRQn = 130, TRNG_IRQn = 131, ICM_IRQn = 132, PUKCC_IRQn = 133,
  QSPI_IRQn = 134, SDHC0_IRQn = 135, SDHC1_IRQn = 136, PERIPH_COUNT_IRQn = 137
}
 

Functions

void Reset_Handler (void)
 This is the code that gets called on processor reset. To initialize the device, and call the main() routine.
 
void NonMaskableInt_Handler (void)
 
void HardFault_Handler (void)
 
void MemManagement_Handler (void)
 
void BusFault_Handler (void)
 
void UsageFault_Handler (void)
 
void SVCall_Handler (void)
 
void DebugMonitor_Handler (void)
 
void PendSV_Handler (void)
 
void SysTick_Handler (void)
 
void PM_Handler (void)
 
void MCLK_Handler (void)
 
void OSCCTRL_0_Handler (void)
 
void OSCCTRL_1_Handler (void)
 
void OSCCTRL_2_Handler (void)
 
void OSCCTRL_3_Handler (void)
 
void OSCCTRL_4_Handler (void)
 
void OSC32KCTRL_Handler (void)
 
void SUPC_0_Handler (void)
 
void SUPC_1_Handler (void)
 
void WDT_Handler (void)
 
void RTC_Handler (void)
 
void EIC_0_Handler (void)
 
void EIC_1_Handler (void)
 
void EIC_2_Handler (void)
 
void EIC_3_Handler (void)
 
void EIC_4_Handler (void)
 
void EIC_5_Handler (void)
 
void EIC_6_Handler (void)
 
void EIC_7_Handler (void)
 
void EIC_8_Handler (void)
 
void EIC_9_Handler (void)
 
void EIC_10_Handler (void)
 
void EIC_11_Handler (void)
 
void EIC_12_Handler (void)
 
void EIC_13_Handler (void)
 
void EIC_14_Handler (void)
 
void EIC_15_Handler (void)
 
void FREQM_Handler (void)
 
void NVMCTRL_0_Handler (void)
 
void NVMCTRL_1_Handler (void)
 
void DMAC_0_Handler (void)
 
void DMAC_1_Handler (void)
 
void DMAC_2_Handler (void)
 
void DMAC_3_Handler (void)
 
void DMAC_4_Handler (void)
 
void EVSYS_0_Handler (void)
 
void EVSYS_1_Handler (void)
 
void EVSYS_2_Handler (void)
 
void EVSYS_3_Handler (void)
 
void EVSYS_4_Handler (void)
 
void PAC_Handler (void)
 
void RAMECC_Handler (void)
 
void SERCOM0_0_Handler (void)
 
void SERCOM0_1_Handler (void)
 
void SERCOM0_2_Handler (void)
 
void SERCOM0_3_Handler (void)
 
void SERCOM1_0_Handler (void)
 
void SERCOM1_1_Handler (void)
 
void SERCOM1_2_Handler (void)
 
void SERCOM1_3_Handler (void)
 
void SERCOM2_0_Handler (void)
 
void SERCOM2_1_Handler (void)
 
void SERCOM2_2_Handler (void)
 
void SERCOM2_3_Handler (void)
 
void SERCOM3_0_Handler (void)
 
void SERCOM3_1_Handler (void)
 
void SERCOM3_2_Handler (void)
 
void SERCOM3_3_Handler (void)
 
void SERCOM4_0_Handler (void)
 
void SERCOM4_1_Handler (void)
 
void SERCOM4_2_Handler (void)
 
void SERCOM4_3_Handler (void)
 
void SERCOM5_0_Handler (void)
 
void SERCOM5_1_Handler (void)
 
void SERCOM5_2_Handler (void)
 
void SERCOM5_3_Handler (void)
 
void SERCOM6_0_Handler (void)
 
void SERCOM6_1_Handler (void)
 
void SERCOM6_2_Handler (void)
 
void SERCOM6_3_Handler (void)
 
void SERCOM7_0_Handler (void)
 
void SERCOM7_1_Handler (void)
 
void SERCOM7_2_Handler (void)
 
void SERCOM7_3_Handler (void)
 
void CAN0_Handler (void)
 
void CAN1_Handler (void)
 
void USB_0_Handler (void)
 
void USB_1_Handler (void)
 
void USB_2_Handler (void)
 
void USB_3_Handler (void)
 
void GMAC_Handler (void)
 
void TCC0_0_Handler (void)
 
void TCC0_1_Handler (void)
 
void TCC0_2_Handler (void)
 
void TCC0_3_Handler (void)
 
void TCC0_4_Handler (void)
 
void TCC0_5_Handler (void)
 
void TCC0_6_Handler (void)
 
void TCC1_0_Handler (void)
 
void TCC1_1_Handler (void)
 
void TCC1_2_Handler (void)
 
void TCC1_3_Handler (void)
 
void TCC1_4_Handler (void)
 
void TCC2_0_Handler (void)
 
void TCC2_1_Handler (void)
 
void TCC2_2_Handler (void)
 
void TCC2_3_Handler (void)
 
void TCC3_0_Handler (void)
 
void TCC3_1_Handler (void)
 
void TCC3_2_Handler (void)
 
void TCC4_0_Handler (void)
 
void TCC4_1_Handler (void)
 
void TCC4_2_Handler (void)
 
void TC0_Handler (void)
 
void TC1_Handler (void)
 
void TC2_Handler (void)
 
void TC3_Handler (void)
 
void TC4_Handler (void)
 
void TC5_Handler (void)
 
void TC6_Handler (void)
 
void TC7_Handler (void)
 
void PDEC_0_Handler (void)
 
void PDEC_1_Handler (void)
 
void PDEC_2_Handler (void)
 
void ADC0_0_Handler (void)
 
void ADC0_1_Handler (void)
 
void ADC1_0_Handler (void)
 
void ADC1_1_Handler (void)
 
void AC_Handler (void)
 
void DAC_0_Handler (void)
 
void DAC_1_Handler (void)
 
void DAC_2_Handler (void)
 
void DAC_3_Handler (void)
 
void DAC_4_Handler (void)
 
void I2S_Handler (void)
 
void PCC_Handler (void)
 
void AES_Handler (void)
 
void TRNG_Handler (void)
 
void ICM_Handler (void)
 
void PUKCC_Handler (void)
 
void QSPI_Handler (void)
 
void SDHC0_Handler (void)
 
void SDHC1_Handler (void)
 

Detailed Description

Header file for SAME54N20A.

Copyright (c) 2019 Microchip Technology Inc.

\asf_license_start

Definition in file same54n20a.h.

Macro Definition Documentation

◆ __CM4_REV

#define __CM4_REV   1

Core revision r0p1

Definition at line 556 of file same54n20a.h.

◆ __DEBUG_LVL

#define __DEBUG_LVL   3

Full debug plus DWT data matching

Definition at line 557 of file same54n20a.h.

◆ __FPU_PRESENT

#define __FPU_PRESENT   1

FPU present or not

Definition at line 558 of file same54n20a.h.

◆ __MPU_PRESENT

#define __MPU_PRESENT   1

MPU present or not

Definition at line 559 of file same54n20a.h.

◆ __NVIC_PRIO_BITS

#define __NVIC_PRIO_BITS   3

Number of bits used for Priority Levels

Definition at line 560 of file same54n20a.h.

◆ __TRACE_LVL

#define __TRACE_LVL   2

Full trace: ITM, DWT triggers and counters, ETM

Definition at line 561 of file same54n20a.h.

◆ __Vendor_SysTickConfig

#define __Vendor_SysTickConfig   0

Set to 1 if different SysTick Config is used

Definition at line 563 of file same54n20a.h.

◆ __VTOR_PRESENT

#define __VTOR_PRESENT   1

VTOR present or not

Definition at line 562 of file same54n20a.h.

◆ _L_

#define _L_ (   x)    x ## L

C code: Long integer literal constant value

Definition at line 75 of file same54n20a.h.

◆ _U_

#define _U_ (   x)    x ## U

C code: Unsigned integer literal constant value

Definition at line 74 of file same54n20a.h.

◆ _UL_

#define _UL_ (   x)    x ## UL

C code: Unsigned Long integer literal constant value

Definition at line 76 of file same54n20a.h.

◆ BKUPRAM_ADDR

#define BKUPRAM_ADDR   _UL_(0x47000000)

BKUPRAM base address

Definition at line 1067 of file same54n20a.h.

◆ CMCC_DATARAM_ADDR

#define CMCC_DATARAM_ADDR   _UL_(0x03000000)

CMCC_DATARAM base address

Definition at line 1051 of file same54n20a.h.

◆ CMCC_DATARAM_SIZE

#define CMCC_DATARAM_SIZE   _UL_(0x00001000)

CMCC_DATARAM size

Definition at line 1052 of file same54n20a.h.

◆ CMCC_TAGRAM_ADDR

#define CMCC_TAGRAM_ADDR   _UL_(0x03001000)

CMCC_TAGRAM base address

Definition at line 1053 of file same54n20a.h.

◆ CMCC_TAGRAM_SIZE

#define CMCC_TAGRAM_SIZE   _UL_(0x00000400)

CMCC_TAGRAM size

Definition at line 1054 of file same54n20a.h.

◆ CMCC_VALIDRAM_ADDR

#define CMCC_VALIDRAM_ADDR   _UL_(0x03002000)

CMCC_VALIDRAM base address

Definition at line 1055 of file same54n20a.h.

◆ CMCC_VALIDRAM_SIZE

#define CMCC_VALIDRAM_SIZE   _UL_(0x00000040)

CMCC_VALIDRAM size

Definition at line 1056 of file same54n20a.h.

◆ FLASH_ADDR

#define FLASH_ADDR   _UL_(0x00000000)

FLASH base address

Definition at line 1050 of file same54n20a.h.

◆ HPB0_ADDR

#define HPB0_ADDR   _UL_(0x40000000)

HPB0 base address

Definition at line 1062 of file same54n20a.h.

◆ HPB1_ADDR

#define HPB1_ADDR   _UL_(0x41000000)

HPB1 base address

Definition at line 1063 of file same54n20a.h.

◆ HPB2_ADDR

#define HPB2_ADDR   _UL_(0x42000000)

HPB2 base address

Definition at line 1064 of file same54n20a.h.

◆ HPB3_ADDR

#define HPB3_ADDR   _UL_(0x43000000)

HPB3 base address

Definition at line 1065 of file same54n20a.h.

◆ HSRAM_ADDR

#define HSRAM_ADDR   _UL_(0x20000000)

HSRAM base address

Definition at line 1057 of file same54n20a.h.

◆ HSRAM_ETB_ADDR

#define HSRAM_ETB_ADDR   _UL_(0x20000000)

HSRAM_ETB base address

Definition at line 1058 of file same54n20a.h.

◆ HSRAM_ETB_SIZE

#define HSRAM_ETB_SIZE   _UL_(0x00008000)

HSRAM_ETB size

Definition at line 1059 of file same54n20a.h.

◆ HSRAM_RET1_ADDR

#define HSRAM_RET1_ADDR   _UL_(0x20000000)

HSRAM_RET1 base address

Definition at line 1060 of file same54n20a.h.

◆ HSRAM_RET1_SIZE

#define HSRAM_RET1_SIZE   _UL_(0x00008000)

HSRAM_RET1 size

Definition at line 1061 of file same54n20a.h.

◆ HSRAM_SIZE

#define HSRAM_SIZE   _UL_(0x00040000) /* 256 kB */

MEMORY MAPPING DEFINITIONS FOR SAME54N20A

Definition at line 1042 of file same54n20a.h.

◆ PPB_ADDR

#define PPB_ADDR   _UL_(0xE0000000)

PPB base address

Definition at line 1068 of file same54n20a.h.

◆ SEEPROM_ADDR

#define SEEPROM_ADDR   _UL_(0x44000000)

SEEPROM base address

Definition at line 1066 of file same54n20a.h.

Typedef Documentation

◆ IRQn_Type

typedef enum IRQn IRQn_Type

Interrupt Number Definition

◆ RoReg

typedef volatile const uint32_t RoReg

Read only 32-bit register (volatile const unsigned int)

Definition at line 51 of file same54n20a.h.

◆ RoReg16

typedef volatile const uint16_t RoReg16

Read only 16-bit register (volatile const unsigned int)

Definition at line 52 of file same54n20a.h.

◆ RoReg8

typedef volatile const uint8_t RoReg8

Read only 8-bit register (volatile const unsigned int)

Definition at line 53 of file same54n20a.h.

◆ RwReg

typedef volatile uint32_t RwReg

Read-Write 32-bit register (volatile unsigned int)

Definition at line 62 of file same54n20a.h.

◆ RwReg16

typedef volatile uint16_t RwReg16

Read-Write 16-bit register (volatile unsigned int)

Definition at line 63 of file same54n20a.h.

◆ RwReg8

typedef volatile uint8_t RwReg8

Read-Write 8-bit register (volatile unsigned int)

Definition at line 64 of file same54n20a.h.

◆ WoReg

typedef volatile uint32_t WoReg

Write only 32-bit register (volatile unsigned int)

Definition at line 59 of file same54n20a.h.

◆ WoReg16

typedef volatile uint16_t WoReg16

Write only 16-bit register (volatile unsigned int)

Definition at line 60 of file same54n20a.h.

◆ WoReg8

typedef volatile uint8_t WoReg8

Write only 8-bit register (volatile unsigned int)

Definition at line 61 of file same54n20a.h.

Enumeration Type Documentation

◆ IRQn

enum IRQn

Interrupt Number Definition

Enumerator
NonMaskableInt_IRQn 

2 Non Maskable Interrupt

HardFault_IRQn 

3 Hard Fault Interrupt

MemoryManagement_IRQn 

4 Memory Management Interrupt

BusFault_IRQn 

5 Bus Fault Interrupt

UsageFault_IRQn 

6 Usage Fault Interrupt

SVCall_IRQn 

11 SV Call Interrupt

DebugMonitor_IRQn 

12 Debug Monitor Interrupt

PendSV_IRQn 

14 Pend SV Interrupt

SysTick_IRQn 

15 System Tick Interrupt

PM_IRQn 

0 SAME54N19A Power Manager (PM)

MCLK_IRQn 

1 SAME54N19A Main Clock (MCLK)

OSCCTRL_0_IRQn 

2 SAME54N19A Oscillators Control (OSCCTRL) IRQ 0

OSCCTRL_1_IRQn 

3 SAME54N19A Oscillators Control (OSCCTRL) IRQ 1

OSCCTRL_2_IRQn 

4 SAME54N19A Oscillators Control (OSCCTRL) IRQ 2

OSCCTRL_3_IRQn 

5 SAME54N19A Oscillators Control (OSCCTRL) IRQ 3

OSCCTRL_4_IRQn 

6 SAME54N19A Oscillators Control (OSCCTRL) IRQ 4

OSC32KCTRL_IRQn 

7 SAME54N19A 32kHz Oscillators Control (OSC32KCTRL)

SUPC_0_IRQn 

8 SAME54N19A Supply Controller (SUPC) IRQ 0

SUPC_1_IRQn 

9 SAME54N19A Supply Controller (SUPC) IRQ 1

WDT_IRQn 

10 SAME54N19A Watchdog Timer (WDT)

RTC_IRQn 

11 SAME54N19A Real-Time Counter (RTC)

EIC_0_IRQn 

12 SAME54N19A External Interrupt Controller (EIC) IRQ 0

EIC_1_IRQn 

13 SAME54N19A External Interrupt Controller (EIC) IRQ 1

EIC_2_IRQn 

14 SAME54N19A External Interrupt Controller (EIC) IRQ 2

EIC_3_IRQn 

15 SAME54N19A External Interrupt Controller (EIC) IRQ 3

EIC_4_IRQn 

16 SAME54N19A External Interrupt Controller (EIC) IRQ 4

EIC_5_IRQn 

17 SAME54N19A External Interrupt Controller (EIC) IRQ 5

EIC_6_IRQn 

18 SAME54N19A External Interrupt Controller (EIC) IRQ 6

EIC_7_IRQn 

19 SAME54N19A External Interrupt Controller (EIC) IRQ 7

EIC_8_IRQn 

20 SAME54N19A External Interrupt Controller (EIC) IRQ 8

EIC_9_IRQn 

21 SAME54N19A External Interrupt Controller (EIC) IRQ 9

EIC_10_IRQn 

22 SAME54N19A External Interrupt Controller (EIC) IRQ 10

EIC_11_IRQn 

23 SAME54N19A External Interrupt Controller (EIC) IRQ 11

EIC_12_IRQn 

24 SAME54N19A External Interrupt Controller (EIC) IRQ 12

EIC_13_IRQn 

25 SAME54N19A External Interrupt Controller (EIC) IRQ 13

EIC_14_IRQn 

26 SAME54N19A External Interrupt Controller (EIC) IRQ 14

EIC_15_IRQn 

27 SAME54N19A External Interrupt Controller (EIC) IRQ 15

FREQM_IRQn 

28 SAME54N19A Frequency Meter (FREQM)

NVMCTRL_0_IRQn 

29 SAME54N19A Non-Volatile Memory Controller (NVMCTRL) IRQ 0

NVMCTRL_1_IRQn 

30 SAME54N19A Non-Volatile Memory Controller (NVMCTRL) IRQ 1

DMAC_0_IRQn 

31 SAME54N19A Direct Memory Access Controller (DMAC) IRQ 0

DMAC_1_IRQn 

32 SAME54N19A Direct Memory Access Controller (DMAC) IRQ 1

DMAC_2_IRQn 

33 SAME54N19A Direct Memory Access Controller (DMAC) IRQ 2

DMAC_3_IRQn 

34 SAME54N19A Direct Memory Access Controller (DMAC) IRQ 3

DMAC_4_IRQn 

35 SAME54N19A Direct Memory Access Controller (DMAC) IRQ 4

EVSYS_0_IRQn 

36 SAME54N19A Event System Interface (EVSYS) IRQ 0

EVSYS_1_IRQn 

37 SAME54N19A Event System Interface (EVSYS) IRQ 1

EVSYS_2_IRQn 

38 SAME54N19A Event System Interface (EVSYS) IRQ 2

EVSYS_3_IRQn 

39 SAME54N19A Event System Interface (EVSYS) IRQ 3

EVSYS_4_IRQn 

40 SAME54N19A Event System Interface (EVSYS) IRQ 4

PAC_IRQn 

41 SAME54N19A Peripheral Access Controller (PAC)

RAMECC_IRQn 

45 SAME54N19A RAM ECC (RAMECC)

SERCOM0_0_IRQn 

46 SAME54N19A Serial Communication Interface 0 (SERCOM0) IRQ 0

SERCOM0_1_IRQn 

47 SAME54N19A Serial Communication Interface 0 (SERCOM0) IRQ 1

SERCOM0_2_IRQn 

48 SAME54N19A Serial Communication Interface 0 (SERCOM0) IRQ 2

SERCOM0_3_IRQn 

49 SAME54N19A Serial Communication Interface 0 (SERCOM0) IRQ 3

SERCOM1_0_IRQn 

50 SAME54N19A Serial Communication Interface 1 (SERCOM1) IRQ 0

SERCOM1_1_IRQn 

51 SAME54N19A Serial Communication Interface 1 (SERCOM1) IRQ 1

SERCOM1_2_IRQn 

52 SAME54N19A Serial Communication Interface 1 (SERCOM1) IRQ 2

SERCOM1_3_IRQn 

53 SAME54N19A Serial Communication Interface 1 (SERCOM1) IRQ 3

SERCOM2_0_IRQn 

54 SAME54N19A Serial Communication Interface 2 (SERCOM2) IRQ 0

SERCOM2_1_IRQn 

55 SAME54N19A Serial Communication Interface 2 (SERCOM2) IRQ 1

SERCOM2_2_IRQn 

56 SAME54N19A Serial Communication Interface 2 (SERCOM2) IRQ 2

SERCOM2_3_IRQn 

57 SAME54N19A Serial Communication Interface 2 (SERCOM2) IRQ 3

SERCOM3_0_IRQn 

58 SAME54N19A Serial Communication Interface 3 (SERCOM3) IRQ 0

SERCOM3_1_IRQn 

59 SAME54N19A Serial Communication Interface 3 (SERCOM3) IRQ 1

SERCOM3_2_IRQn 

60 SAME54N19A Serial Communication Interface 3 (SERCOM3) IRQ 2

SERCOM3_3_IRQn 

61 SAME54N19A Serial Communication Interface 3 (SERCOM3) IRQ 3

SERCOM4_0_IRQn 

62 SAME54N19A Serial Communication Interface 4 (SERCOM4) IRQ 0

SERCOM4_1_IRQn 

63 SAME54N19A Serial Communication Interface 4 (SERCOM4) IRQ 1

SERCOM4_2_IRQn 

64 SAME54N19A Serial Communication Interface 4 (SERCOM4) IRQ 2

SERCOM4_3_IRQn 

65 SAME54N19A Serial Communication Interface 4 (SERCOM4) IRQ 3

SERCOM5_0_IRQn 

66 SAME54N19A Serial Communication Interface 5 (SERCOM5) IRQ 0

SERCOM5_1_IRQn 

67 SAME54N19A Serial Communication Interface 5 (SERCOM5) IRQ 1

SERCOM5_2_IRQn 

68 SAME54N19A Serial Communication Interface 5 (SERCOM5) IRQ 2

SERCOM5_3_IRQn 

69 SAME54N19A Serial Communication Interface 5 (SERCOM5) IRQ 3

SERCOM6_0_IRQn 

70 SAME54N19A Serial Communication Interface 6 (SERCOM6) IRQ 0

SERCOM6_1_IRQn 

71 SAME54N19A Serial Communication Interface 6 (SERCOM6) IRQ 1

SERCOM6_2_IRQn 

72 SAME54N19A Serial Communication Interface 6 (SERCOM6) IRQ 2

SERCOM6_3_IRQn 

73 SAME54N19A Serial Communication Interface 6 (SERCOM6) IRQ 3

SERCOM7_0_IRQn 

74 SAME54N19A Serial Communication Interface 7 (SERCOM7) IRQ 0

SERCOM7_1_IRQn 

75 SAME54N19A Serial Communication Interface 7 (SERCOM7) IRQ 1

SERCOM7_2_IRQn 

76 SAME54N19A Serial Communication Interface 7 (SERCOM7) IRQ 2

SERCOM7_3_IRQn 

77 SAME54N19A Serial Communication Interface 7 (SERCOM7) IRQ 3

CAN0_IRQn 

78 SAME54N19A Control Area Network 0 (CAN0)

CAN1_IRQn 

79 SAME54N19A Control Area Network 1 (CAN1)

USB_0_IRQn 

80 SAME54N19A Universal Serial Bus (USB) IRQ 0

USB_1_IRQn 

81 SAME54N19A Universal Serial Bus (USB) IRQ 1

USB_2_IRQn 

82 SAME54N19A Universal Serial Bus (USB) IRQ 2

USB_3_IRQn 

83 SAME54N19A Universal Serial Bus (USB) IRQ 3

GMAC_IRQn 

84 SAME54N19A Ethernet MAC (GMAC)

TCC0_0_IRQn 

85 SAME54N19A Timer Counter Control 0 (TCC0) IRQ 0

TCC0_1_IRQn 

86 SAME54N19A Timer Counter Control 0 (TCC0) IRQ 1

TCC0_2_IRQn 

87 SAME54N19A Timer Counter Control 0 (TCC0) IRQ 2

TCC0_3_IRQn 

88 SAME54N19A Timer Counter Control 0 (TCC0) IRQ 3

TCC0_4_IRQn 

89 SAME54N19A Timer Counter Control 0 (TCC0) IRQ 4

TCC0_5_IRQn 

90 SAME54N19A Timer Counter Control 0 (TCC0) IRQ 5

TCC0_6_IRQn 

91 SAME54N19A Timer Counter Control 0 (TCC0) IRQ 6

TCC1_0_IRQn 

92 SAME54N19A Timer Counter Control 1 (TCC1) IRQ 0

TCC1_1_IRQn 

93 SAME54N19A Timer Counter Control 1 (TCC1) IRQ 1

TCC1_2_IRQn 

94 SAME54N19A Timer Counter Control 1 (TCC1) IRQ 2

TCC1_3_IRQn 

95 SAME54N19A Timer Counter Control 1 (TCC1) IRQ 3

TCC1_4_IRQn 

96 SAME54N19A Timer Counter Control 1 (TCC1) IRQ 4

TCC2_0_IRQn 

97 SAME54N19A Timer Counter Control 2 (TCC2) IRQ 0

TCC2_1_IRQn 

98 SAME54N19A Timer Counter Control 2 (TCC2) IRQ 1

TCC2_2_IRQn 

99 SAME54N19A Timer Counter Control 2 (TCC2) IRQ 2

TCC2_3_IRQn 

100 SAME54N19A Timer Counter Control 2 (TCC2) IRQ 3

TCC3_0_IRQn 

101 SAME54N19A Timer Counter Control 3 (TCC3) IRQ 0

TCC3_1_IRQn 

102 SAME54N19A Timer Counter Control 3 (TCC3) IRQ 1

TCC3_2_IRQn 

103 SAME54N19A Timer Counter Control 3 (TCC3) IRQ 2

TCC4_0_IRQn 

104 SAME54N19A Timer Counter Control 4 (TCC4) IRQ 0

TCC4_1_IRQn 

105 SAME54N19A Timer Counter Control 4 (TCC4) IRQ 1

TCC4_2_IRQn 

106 SAME54N19A Timer Counter Control 4 (TCC4) IRQ 2

TC0_IRQn 

107 SAME54N19A Basic Timer Counter 0 (TC0)

TC1_IRQn 

108 SAME54N19A Basic Timer Counter 1 (TC1)

TC2_IRQn 

109 SAME54N19A Basic Timer Counter 2 (TC2)

TC3_IRQn 

110 SAME54N19A Basic Timer Counter 3 (TC3)

TC4_IRQn 

111 SAME54N19A Basic Timer Counter 4 (TC4)

TC5_IRQn 

112 SAME54N19A Basic Timer Counter 5 (TC5)

TC6_IRQn 

113 SAME54N19A Basic Timer Counter 6 (TC6)

TC7_IRQn 

114 SAME54N19A Basic Timer Counter 7 (TC7)

PDEC_0_IRQn 

115 SAME54N19A Quadrature Decodeur (PDEC) IRQ 0

PDEC_1_IRQn 

116 SAME54N19A Quadrature Decodeur (PDEC) IRQ 1

PDEC_2_IRQn 

117 SAME54N19A Quadrature Decodeur (PDEC) IRQ 2

ADC0_0_IRQn 

118 SAME54N19A Analog Digital Converter 0 (ADC0) IRQ 0

ADC0_1_IRQn 

119 SAME54N19A Analog Digital Converter 0 (ADC0) IRQ 1

ADC1_0_IRQn 

120 SAME54N19A Analog Digital Converter 1 (ADC1) IRQ 0

ADC1_1_IRQn 

121 SAME54N19A Analog Digital Converter 1 (ADC1) IRQ 1

AC_IRQn 

122 SAME54N19A Analog Comparators (AC)

DAC_0_IRQn 

123 SAME54N19A Digital-to-Analog Converter (DAC) IRQ 0

DAC_1_IRQn 

124 SAME54N19A Digital-to-Analog Converter (DAC) IRQ 1

DAC_2_IRQn 

125 SAME54N19A Digital-to-Analog Converter (DAC) IRQ 2

DAC_3_IRQn 

126 SAME54N19A Digital-to-Analog Converter (DAC) IRQ 3

DAC_4_IRQn 

127 SAME54N19A Digital-to-Analog Converter (DAC) IRQ 4

I2S_IRQn 

128 SAME54N19A Inter-IC Sound Interface (I2S)

PCC_IRQn 

129 SAME54N19A Parallel Capture Controller (PCC)

AES_IRQn 

130 SAME54N19A Advanced Encryption Standard (AES)

TRNG_IRQn 

131 SAME54N19A True Random Generator (TRNG)

ICM_IRQn 

132 SAME54N19A Integrity Check Monitor (ICM)

PUKCC_IRQn 

133 SAME54N19A PUblic-Key Cryptography Controller (PUKCC)

QSPI_IRQn 

134 SAME54N19A Quad SPI interface (QSPI)

SDHC0_IRQn 

135 SAME54N19A SD/MMC Host Controller 0 (SDHC0)

SDHC1_IRQn 

136 SAME54N19A SD/MMC Host Controller 1 (SDHC1)

PERIPH_COUNT_IRQn 

Number of peripheral IDs

NonMaskableInt_IRQn 

2 Non Maskable Interrupt

HardFault_IRQn 

3 Hard Fault Interrupt

MemoryManagement_IRQn 

4 Memory Management Interrupt

BusFault_IRQn 

5 Bus Fault Interrupt

UsageFault_IRQn 

6 Usage Fault Interrupt

SVCall_IRQn 

11 SV Call Interrupt

DebugMonitor_IRQn 

12 Debug Monitor Interrupt

PendSV_IRQn 

14 Pend SV Interrupt

SysTick_IRQn 

15 System Tick Interrupt

PM_IRQn 

0 SAME54N20A Power Manager (PM)

MCLK_IRQn 

1 SAME54N20A Main Clock (MCLK)

OSCCTRL_0_IRQn 

2 SAME54N20A Oscillators Control (OSCCTRL) IRQ 0

OSCCTRL_1_IRQn 

3 SAME54N20A Oscillators Control (OSCCTRL) IRQ 1

OSCCTRL_2_IRQn 

4 SAME54N20A Oscillators Control (OSCCTRL) IRQ 2

OSCCTRL_3_IRQn 

5 SAME54N20A Oscillators Control (OSCCTRL) IRQ 3

OSCCTRL_4_IRQn 

6 SAME54N20A Oscillators Control (OSCCTRL) IRQ 4

OSC32KCTRL_IRQn 

7 SAME54N20A 32kHz Oscillators Control (OSC32KCTRL)

SUPC_0_IRQn 

8 SAME54N20A Supply Controller (SUPC) IRQ 0

SUPC_1_IRQn 

9 SAME54N20A Supply Controller (SUPC) IRQ 1

WDT_IRQn 

10 SAME54N20A Watchdog Timer (WDT)

RTC_IRQn 

11 SAME54N20A Real-Time Counter (RTC)

EIC_0_IRQn 

12 SAME54N20A External Interrupt Controller (EIC) IRQ 0

EIC_1_IRQn 

13 SAME54N20A External Interrupt Controller (EIC) IRQ 1

EIC_2_IRQn 

14 SAME54N20A External Interrupt Controller (EIC) IRQ 2

EIC_3_IRQn 

15 SAME54N20A External Interrupt Controller (EIC) IRQ 3

EIC_4_IRQn 

16 SAME54N20A External Interrupt Controller (EIC) IRQ 4

EIC_5_IRQn 

17 SAME54N20A External Interrupt Controller (EIC) IRQ 5

EIC_6_IRQn 

18 SAME54N20A External Interrupt Controller (EIC) IRQ 6

EIC_7_IRQn 

19 SAME54N20A External Interrupt Controller (EIC) IRQ 7

EIC_8_IRQn 

20 SAME54N20A External Interrupt Controller (EIC) IRQ 8

EIC_9_IRQn 

21 SAME54N20A External Interrupt Controller (EIC) IRQ 9

EIC_10_IRQn 

22 SAME54N20A External Interrupt Controller (EIC) IRQ 10

EIC_11_IRQn 

23 SAME54N20A External Interrupt Controller (EIC) IRQ 11

EIC_12_IRQn 

24 SAME54N20A External Interrupt Controller (EIC) IRQ 12

EIC_13_IRQn 

25 SAME54N20A External Interrupt Controller (EIC) IRQ 13

EIC_14_IRQn 

26 SAME54N20A External Interrupt Controller (EIC) IRQ 14

EIC_15_IRQn 

27 SAME54N20A External Interrupt Controller (EIC) IRQ 15

FREQM_IRQn 

28 SAME54N20A Frequency Meter (FREQM)

NVMCTRL_0_IRQn 

29 SAME54N20A Non-Volatile Memory Controller (NVMCTRL) IRQ 0

NVMCTRL_1_IRQn 

30 SAME54N20A Non-Volatile Memory Controller (NVMCTRL) IRQ 1

DMAC_0_IRQn 

31 SAME54N20A Direct Memory Access Controller (DMAC) IRQ 0

DMAC_1_IRQn 

32 SAME54N20A Direct Memory Access Controller (DMAC) IRQ 1

DMAC_2_IRQn 

33 SAME54N20A Direct Memory Access Controller (DMAC) IRQ 2

DMAC_3_IRQn 

34 SAME54N20A Direct Memory Access Controller (DMAC) IRQ 3

DMAC_4_IRQn 

35 SAME54N20A Direct Memory Access Controller (DMAC) IRQ 4

EVSYS_0_IRQn 

36 SAME54N20A Event System Interface (EVSYS) IRQ 0

EVSYS_1_IRQn 

37 SAME54N20A Event System Interface (EVSYS) IRQ 1

EVSYS_2_IRQn 

38 SAME54N20A Event System Interface (EVSYS) IRQ 2

EVSYS_3_IRQn 

39 SAME54N20A Event System Interface (EVSYS) IRQ 3

EVSYS_4_IRQn 

40 SAME54N20A Event System Interface (EVSYS) IRQ 4

PAC_IRQn 

41 SAME54N20A Peripheral Access Controller (PAC)

RAMECC_IRQn 

45 SAME54N20A RAM ECC (RAMECC)

SERCOM0_0_IRQn 

46 SAME54N20A Serial Communication Interface 0 (SERCOM0) IRQ 0

SERCOM0_1_IRQn 

47 SAME54N20A Serial Communication Interface 0 (SERCOM0) IRQ 1

SERCOM0_2_IRQn 

48 SAME54N20A Serial Communication Interface 0 (SERCOM0) IRQ 2

SERCOM0_3_IRQn 

49 SAME54N20A Serial Communication Interface 0 (SERCOM0) IRQ 3

SERCOM1_0_IRQn 

50 SAME54N20A Serial Communication Interface 1 (SERCOM1) IRQ 0

SERCOM1_1_IRQn 

51 SAME54N20A Serial Communication Interface 1 (SERCOM1) IRQ 1

SERCOM1_2_IRQn 

52 SAME54N20A Serial Communication Interface 1 (SERCOM1) IRQ 2

SERCOM1_3_IRQn 

53 SAME54N20A Serial Communication Interface 1 (SERCOM1) IRQ 3

SERCOM2_0_IRQn 

54 SAME54N20A Serial Communication Interface 2 (SERCOM2) IRQ 0

SERCOM2_1_IRQn 

55 SAME54N20A Serial Communication Interface 2 (SERCOM2) IRQ 1

SERCOM2_2_IRQn 

56 SAME54N20A Serial Communication Interface 2 (SERCOM2) IRQ 2

SERCOM2_3_IRQn 

57 SAME54N20A Serial Communication Interface 2 (SERCOM2) IRQ 3

SERCOM3_0_IRQn 

58 SAME54N20A Serial Communication Interface 3 (SERCOM3) IRQ 0

SERCOM3_1_IRQn 

59 SAME54N20A Serial Communication Interface 3 (SERCOM3) IRQ 1

SERCOM3_2_IRQn 

60 SAME54N20A Serial Communication Interface 3 (SERCOM3) IRQ 2

SERCOM3_3_IRQn 

61 SAME54N20A Serial Communication Interface 3 (SERCOM3) IRQ 3

SERCOM4_0_IRQn 

62 SAME54N20A Serial Communication Interface 4 (SERCOM4) IRQ 0

SERCOM4_1_IRQn 

63 SAME54N20A Serial Communication Interface 4 (SERCOM4) IRQ 1

SERCOM4_2_IRQn 

64 SAME54N20A Serial Communication Interface 4 (SERCOM4) IRQ 2

SERCOM4_3_IRQn 

65 SAME54N20A Serial Communication Interface 4 (SERCOM4) IRQ 3

SERCOM5_0_IRQn 

66 SAME54N20A Serial Communication Interface 5 (SERCOM5) IRQ 0

SERCOM5_1_IRQn 

67 SAME54N20A Serial Communication Interface 5 (SERCOM5) IRQ 1

SERCOM5_2_IRQn 

68 SAME54N20A Serial Communication Interface 5 (SERCOM5) IRQ 2

SERCOM5_3_IRQn 

69 SAME54N20A Serial Communication Interface 5 (SERCOM5) IRQ 3

SERCOM6_0_IRQn 

70 SAME54N20A Serial Communication Interface 6 (SERCOM6) IRQ 0

SERCOM6_1_IRQn 

71 SAME54N20A Serial Communication Interface 6 (SERCOM6) IRQ 1

SERCOM6_2_IRQn 

72 SAME54N20A Serial Communication Interface 6 (SERCOM6) IRQ 2

SERCOM6_3_IRQn 

73 SAME54N20A Serial Communication Interface 6 (SERCOM6) IRQ 3

SERCOM7_0_IRQn 

74 SAME54N20A Serial Communication Interface 7 (SERCOM7) IRQ 0

SERCOM7_1_IRQn 

75 SAME54N20A Serial Communication Interface 7 (SERCOM7) IRQ 1

SERCOM7_2_IRQn 

76 SAME54N20A Serial Communication Interface 7 (SERCOM7) IRQ 2

SERCOM7_3_IRQn 

77 SAME54N20A Serial Communication Interface 7 (SERCOM7) IRQ 3

CAN0_IRQn 

78 SAME54N20A Control Area Network 0 (CAN0)

CAN1_IRQn 

79 SAME54N20A Control Area Network 1 (CAN1)

USB_0_IRQn 

80 SAME54N20A Universal Serial Bus (USB) IRQ 0

USB_1_IRQn 

81 SAME54N20A Universal Serial Bus (USB) IRQ 1

USB_2_IRQn 

82 SAME54N20A Universal Serial Bus (USB) IRQ 2

USB_3_IRQn 

83 SAME54N20A Universal Serial Bus (USB) IRQ 3

GMAC_IRQn 

84 SAME54N20A Ethernet MAC (GMAC)

TCC0_0_IRQn 

85 SAME54N20A Timer Counter Control 0 (TCC0) IRQ 0

TCC0_1_IRQn 

86 SAME54N20A Timer Counter Control 0 (TCC0) IRQ 1

TCC0_2_IRQn 

87 SAME54N20A Timer Counter Control 0 (TCC0) IRQ 2

TCC0_3_IRQn 

88 SAME54N20A Timer Counter Control 0 (TCC0) IRQ 3

TCC0_4_IRQn 

89 SAME54N20A Timer Counter Control 0 (TCC0) IRQ 4

TCC0_5_IRQn 

90 SAME54N20A Timer Counter Control 0 (TCC0) IRQ 5

TCC0_6_IRQn 

91 SAME54N20A Timer Counter Control 0 (TCC0) IRQ 6

TCC1_0_IRQn 

92 SAME54N20A Timer Counter Control 1 (TCC1) IRQ 0

TCC1_1_IRQn 

93 SAME54N20A Timer Counter Control 1 (TCC1) IRQ 1

TCC1_2_IRQn 

94 SAME54N20A Timer Counter Control 1 (TCC1) IRQ 2

TCC1_3_IRQn 

95 SAME54N20A Timer Counter Control 1 (TCC1) IRQ 3

TCC1_4_IRQn 

96 SAME54N20A Timer Counter Control 1 (TCC1) IRQ 4

TCC2_0_IRQn 

97 SAME54N20A Timer Counter Control 2 (TCC2) IRQ 0

TCC2_1_IRQn 

98 SAME54N20A Timer Counter Control 2 (TCC2) IRQ 1

TCC2_2_IRQn 

99 SAME54N20A Timer Counter Control 2 (TCC2) IRQ 2

TCC2_3_IRQn 

100 SAME54N20A Timer Counter Control 2 (TCC2) IRQ 3

TCC3_0_IRQn 

101 SAME54N20A Timer Counter Control 3 (TCC3) IRQ 0

TCC3_1_IRQn 

102 SAME54N20A Timer Counter Control 3 (TCC3) IRQ 1

TCC3_2_IRQn 

103 SAME54N20A Timer Counter Control 3 (TCC3) IRQ 2

TCC4_0_IRQn 

104 SAME54N20A Timer Counter Control 4 (TCC4) IRQ 0

TCC4_1_IRQn 

105 SAME54N20A Timer Counter Control 4 (TCC4) IRQ 1

TCC4_2_IRQn 

106 SAME54N20A Timer Counter Control 4 (TCC4) IRQ 2

TC0_IRQn 

107 SAME54N20A Basic Timer Counter 0 (TC0)

TC1_IRQn 

108 SAME54N20A Basic Timer Counter 1 (TC1)

TC2_IRQn 

109 SAME54N20A Basic Timer Counter 2 (TC2)

TC3_IRQn 

110 SAME54N20A Basic Timer Counter 3 (TC3)

TC4_IRQn 

111 SAME54N20A Basic Timer Counter 4 (TC4)

TC5_IRQn 

112 SAME54N20A Basic Timer Counter 5 (TC5)

TC6_IRQn 

113 SAME54N20A Basic Timer Counter 6 (TC6)

TC7_IRQn 

114 SAME54N20A Basic Timer Counter 7 (TC7)

PDEC_0_IRQn 

115 SAME54N20A Quadrature Decodeur (PDEC) IRQ 0

PDEC_1_IRQn 

116 SAME54N20A Quadrature Decodeur (PDEC) IRQ 1

PDEC_2_IRQn 

117 SAME54N20A Quadrature Decodeur (PDEC) IRQ 2

ADC0_0_IRQn 

118 SAME54N20A Analog Digital Converter 0 (ADC0) IRQ 0

ADC0_1_IRQn 

119 SAME54N20A Analog Digital Converter 0 (ADC0) IRQ 1

ADC1_0_IRQn 

120 SAME54N20A Analog Digital Converter 1 (ADC1) IRQ 0

ADC1_1_IRQn 

121 SAME54N20A Analog Digital Converter 1 (ADC1) IRQ 1

AC_IRQn 

122 SAME54N20A Analog Comparators (AC)

DAC_0_IRQn 

123 SAME54N20A Digital-to-Analog Converter (DAC) IRQ 0

DAC_1_IRQn 

124 SAME54N20A Digital-to-Analog Converter (DAC) IRQ 1

DAC_2_IRQn 

125 SAME54N20A Digital-to-Analog Converter (DAC) IRQ 2

DAC_3_IRQn 

126 SAME54N20A Digital-to-Analog Converter (DAC) IRQ 3

DAC_4_IRQn 

127 SAME54N20A Digital-to-Analog Converter (DAC) IRQ 4

I2S_IRQn 

128 SAME54N20A Inter-IC Sound Interface (I2S)

PCC_IRQn 

129 SAME54N20A Parallel Capture Controller (PCC)

AES_IRQn 

130 SAME54N20A Advanced Encryption Standard (AES)

TRNG_IRQn 

131 SAME54N20A True Random Generator (TRNG)

ICM_IRQn 

132 SAME54N20A Integrity Check Monitor (ICM)

PUKCC_IRQn 

133 SAME54N20A PUblic-Key Cryptography Controller (PUKCC)

QSPI_IRQn 

134 SAME54N20A Quad SPI interface (QSPI)

SDHC0_IRQn 

135 SAME54N20A SD/MMC Host Controller 0 (SDHC0)

SDHC1_IRQn 

136 SAME54N20A SD/MMC Host Controller 1 (SDHC1)

PERIPH_COUNT_IRQn 

Number of peripheral IDs

NonMaskableInt_IRQn 

2 Non Maskable Interrupt

HardFault_IRQn 

3 Hard Fault Interrupt

MemoryManagement_IRQn 

4 Memory Management Interrupt

BusFault_IRQn 

5 Bus Fault Interrupt

UsageFault_IRQn 

6 Usage Fault Interrupt

SVCall_IRQn 

11 SV Call Interrupt

DebugMonitor_IRQn 

12 Debug Monitor Interrupt

PendSV_IRQn 

14 Pend SV Interrupt

SysTick_IRQn 

15 System Tick Interrupt

PM_IRQn 

0 SAME54P19A Power Manager (PM)

MCLK_IRQn 

1 SAME54P19A Main Clock (MCLK)

OSCCTRL_0_IRQn 

2 SAME54P19A Oscillators Control (OSCCTRL) IRQ 0

OSCCTRL_1_IRQn 

3 SAME54P19A Oscillators Control (OSCCTRL) IRQ 1

OSCCTRL_2_IRQn 

4 SAME54P19A Oscillators Control (OSCCTRL) IRQ 2

OSCCTRL_3_IRQn 

5 SAME54P19A Oscillators Control (OSCCTRL) IRQ 3

OSCCTRL_4_IRQn 

6 SAME54P19A Oscillators Control (OSCCTRL) IRQ 4

OSC32KCTRL_IRQn 

7 SAME54P19A 32kHz Oscillators Control (OSC32KCTRL)

SUPC_0_IRQn 

8 SAME54P19A Supply Controller (SUPC) IRQ 0

SUPC_1_IRQn 

9 SAME54P19A Supply Controller (SUPC) IRQ 1

WDT_IRQn 

10 SAME54P19A Watchdog Timer (WDT)

RTC_IRQn 

11 SAME54P19A Real-Time Counter (RTC)

EIC_0_IRQn 

12 SAME54P19A External Interrupt Controller (EIC) IRQ 0

EIC_1_IRQn 

13 SAME54P19A External Interrupt Controller (EIC) IRQ 1

EIC_2_IRQn 

14 SAME54P19A External Interrupt Controller (EIC) IRQ 2

EIC_3_IRQn 

15 SAME54P19A External Interrupt Controller (EIC) IRQ 3

EIC_4_IRQn 

16 SAME54P19A External Interrupt Controller (EIC) IRQ 4

EIC_5_IRQn 

17 SAME54P19A External Interrupt Controller (EIC) IRQ 5

EIC_6_IRQn 

18 SAME54P19A External Interrupt Controller (EIC) IRQ 6

EIC_7_IRQn 

19 SAME54P19A External Interrupt Controller (EIC) IRQ 7

EIC_8_IRQn 

20 SAME54P19A External Interrupt Controller (EIC) IRQ 8

EIC_9_IRQn 

21 SAME54P19A External Interrupt Controller (EIC) IRQ 9

EIC_10_IRQn 

22 SAME54P19A External Interrupt Controller (EIC) IRQ 10

EIC_11_IRQn 

23 SAME54P19A External Interrupt Controller (EIC) IRQ 11

EIC_12_IRQn 

24 SAME54P19A External Interrupt Controller (EIC) IRQ 12

EIC_13_IRQn 

25 SAME54P19A External Interrupt Controller (EIC) IRQ 13

EIC_14_IRQn 

26 SAME54P19A External Interrupt Controller (EIC) IRQ 14

EIC_15_IRQn 

27 SAME54P19A External Interrupt Controller (EIC) IRQ 15

FREQM_IRQn 

28 SAME54P19A Frequency Meter (FREQM)

NVMCTRL_0_IRQn 

29 SAME54P19A Non-Volatile Memory Controller (NVMCTRL) IRQ 0

NVMCTRL_1_IRQn 

30 SAME54P19A Non-Volatile Memory Controller (NVMCTRL) IRQ 1

DMAC_0_IRQn 

31 SAME54P19A Direct Memory Access Controller (DMAC) IRQ 0

DMAC_1_IRQn 

32 SAME54P19A Direct Memory Access Controller (DMAC) IRQ 1

DMAC_2_IRQn 

33 SAME54P19A Direct Memory Access Controller (DMAC) IRQ 2

DMAC_3_IRQn 

34 SAME54P19A Direct Memory Access Controller (DMAC) IRQ 3

DMAC_4_IRQn 

35 SAME54P19A Direct Memory Access Controller (DMAC) IRQ 4

EVSYS_0_IRQn 

36 SAME54P19A Event System Interface (EVSYS) IRQ 0

EVSYS_1_IRQn 

37 SAME54P19A Event System Interface (EVSYS) IRQ 1

EVSYS_2_IRQn 

38 SAME54P19A Event System Interface (EVSYS) IRQ 2

EVSYS_3_IRQn 

39 SAME54P19A Event System Interface (EVSYS) IRQ 3

EVSYS_4_IRQn 

40 SAME54P19A Event System Interface (EVSYS) IRQ 4

PAC_IRQn 

41 SAME54P19A Peripheral Access Controller (PAC)

RAMECC_IRQn 

45 SAME54P19A RAM ECC (RAMECC)

SERCOM0_0_IRQn 

46 SAME54P19A Serial Communication Interface 0 (SERCOM0) IRQ 0

SERCOM0_1_IRQn 

47 SAME54P19A Serial Communication Interface 0 (SERCOM0) IRQ 1

SERCOM0_2_IRQn 

48 SAME54P19A Serial Communication Interface 0 (SERCOM0) IRQ 2

SERCOM0_3_IRQn 

49 SAME54P19A Serial Communication Interface 0 (SERCOM0) IRQ 3

SERCOM1_0_IRQn 

50 SAME54P19A Serial Communication Interface 1 (SERCOM1) IRQ 0

SERCOM1_1_IRQn 

51 SAME54P19A Serial Communication Interface 1 (SERCOM1) IRQ 1

SERCOM1_2_IRQn 

52 SAME54P19A Serial Communication Interface 1 (SERCOM1) IRQ 2

SERCOM1_3_IRQn 

53 SAME54P19A Serial Communication Interface 1 (SERCOM1) IRQ 3

SERCOM2_0_IRQn 

54 SAME54P19A Serial Communication Interface 2 (SERCOM2) IRQ 0

SERCOM2_1_IRQn 

55 SAME54P19A Serial Communication Interface 2 (SERCOM2) IRQ 1

SERCOM2_2_IRQn 

56 SAME54P19A Serial Communication Interface 2 (SERCOM2) IRQ 2

SERCOM2_3_IRQn 

57 SAME54P19A Serial Communication Interface 2 (SERCOM2) IRQ 3

SERCOM3_0_IRQn 

58 SAME54P19A Serial Communication Interface 3 (SERCOM3) IRQ 0

SERCOM3_1_IRQn 

59 SAME54P19A Serial Communication Interface 3 (SERCOM3) IRQ 1

SERCOM3_2_IRQn 

60 SAME54P19A Serial Communication Interface 3 (SERCOM3) IRQ 2

SERCOM3_3_IRQn 

61 SAME54P19A Serial Communication Interface 3 (SERCOM3) IRQ 3

SERCOM4_0_IRQn 

62 SAME54P19A Serial Communication Interface 4 (SERCOM4) IRQ 0

SERCOM4_1_IRQn 

63 SAME54P19A Serial Communication Interface 4 (SERCOM4) IRQ 1

SERCOM4_2_IRQn 

64 SAME54P19A Serial Communication Interface 4 (SERCOM4) IRQ 2

SERCOM4_3_IRQn 

65 SAME54P19A Serial Communication Interface 4 (SERCOM4) IRQ 3

SERCOM5_0_IRQn 

66 SAME54P19A Serial Communication Interface 5 (SERCOM5) IRQ 0

SERCOM5_1_IRQn 

67 SAME54P19A Serial Communication Interface 5 (SERCOM5) IRQ 1

SERCOM5_2_IRQn 

68 SAME54P19A Serial Communication Interface 5 (SERCOM5) IRQ 2

SERCOM5_3_IRQn 

69 SAME54P19A Serial Communication Interface 5 (SERCOM5) IRQ 3

SERCOM6_0_IRQn 

70 SAME54P19A Serial Communication Interface 6 (SERCOM6) IRQ 0

SERCOM6_1_IRQn 

71 SAME54P19A Serial Communication Interface 6 (SERCOM6) IRQ 1

SERCOM6_2_IRQn 

72 SAME54P19A Serial Communication Interface 6 (SERCOM6) IRQ 2

SERCOM6_3_IRQn 

73 SAME54P19A Serial Communication Interface 6 (SERCOM6) IRQ 3

SERCOM7_0_IRQn 

74 SAME54P19A Serial Communication Interface 7 (SERCOM7) IRQ 0

SERCOM7_1_IRQn 

75 SAME54P19A Serial Communication Interface 7 (SERCOM7) IRQ 1

SERCOM7_2_IRQn 

76 SAME54P19A Serial Communication Interface 7 (SERCOM7) IRQ 2

SERCOM7_3_IRQn 

77 SAME54P19A Serial Communication Interface 7 (SERCOM7) IRQ 3

CAN0_IRQn 

78 SAME54P19A Control Area Network 0 (CAN0)

CAN1_IRQn 

79 SAME54P19A Control Area Network 1 (CAN1)

USB_0_IRQn 

80 SAME54P19A Universal Serial Bus (USB) IRQ 0

USB_1_IRQn 

81 SAME54P19A Universal Serial Bus (USB) IRQ 1

USB_2_IRQn 

82 SAME54P19A Universal Serial Bus (USB) IRQ 2

USB_3_IRQn 

83 SAME54P19A Universal Serial Bus (USB) IRQ 3

GMAC_IRQn 

84 SAME54P19A Ethernet MAC (GMAC)

TCC0_0_IRQn 

85 SAME54P19A Timer Counter Control 0 (TCC0) IRQ 0

TCC0_1_IRQn 

86 SAME54P19A Timer Counter Control 0 (TCC0) IRQ 1

TCC0_2_IRQn 

87 SAME54P19A Timer Counter Control 0 (TCC0) IRQ 2

TCC0_3_IRQn 

88 SAME54P19A Timer Counter Control 0 (TCC0) IRQ 3

TCC0_4_IRQn 

89 SAME54P19A Timer Counter Control 0 (TCC0) IRQ 4

TCC0_5_IRQn 

90 SAME54P19A Timer Counter Control 0 (TCC0) IRQ 5

TCC0_6_IRQn 

91 SAME54P19A Timer Counter Control 0 (TCC0) IRQ 6

TCC1_0_IRQn 

92 SAME54P19A Timer Counter Control 1 (TCC1) IRQ 0

TCC1_1_IRQn 

93 SAME54P19A Timer Counter Control 1 (TCC1) IRQ 1

TCC1_2_IRQn 

94 SAME54P19A Timer Counter Control 1 (TCC1) IRQ 2

TCC1_3_IRQn 

95 SAME54P19A Timer Counter Control 1 (TCC1) IRQ 3

TCC1_4_IRQn 

96 SAME54P19A Timer Counter Control 1 (TCC1) IRQ 4

TCC2_0_IRQn 

97 SAME54P19A Timer Counter Control 2 (TCC2) IRQ 0

TCC2_1_IRQn 

98 SAME54P19A Timer Counter Control 2 (TCC2) IRQ 1

TCC2_2_IRQn 

99 SAME54P19A Timer Counter Control 2 (TCC2) IRQ 2

TCC2_3_IRQn 

100 SAME54P19A Timer Counter Control 2 (TCC2) IRQ 3

TCC3_0_IRQn 

101 SAME54P19A Timer Counter Control 3 (TCC3) IRQ 0

TCC3_1_IRQn 

102 SAME54P19A Timer Counter Control 3 (TCC3) IRQ 1

TCC3_2_IRQn 

103 SAME54P19A Timer Counter Control 3 (TCC3) IRQ 2

TCC4_0_IRQn 

104 SAME54P19A Timer Counter Control 4 (TCC4) IRQ 0

TCC4_1_IRQn 

105 SAME54P19A Timer Counter Control 4 (TCC4) IRQ 1

TCC4_2_IRQn 

106 SAME54P19A Timer Counter Control 4 (TCC4) IRQ 2

TC0_IRQn 

107 SAME54P19A Basic Timer Counter 0 (TC0)

TC1_IRQn 

108 SAME54P19A Basic Timer Counter 1 (TC1)

TC2_IRQn 

109 SAME54P19A Basic Timer Counter 2 (TC2)

TC3_IRQn 

110 SAME54P19A Basic Timer Counter 3 (TC3)

TC4_IRQn 

111 SAME54P19A Basic Timer Counter 4 (TC4)

TC5_IRQn 

112 SAME54P19A Basic Timer Counter 5 (TC5)

TC6_IRQn 

113 SAME54P19A Basic Timer Counter 6 (TC6)

TC7_IRQn 

114 SAME54P19A Basic Timer Counter 7 (TC7)

PDEC_0_IRQn 

115 SAME54P19A Quadrature Decodeur (PDEC) IRQ 0

PDEC_1_IRQn 

116 SAME54P19A Quadrature Decodeur (PDEC) IRQ 1

PDEC_2_IRQn 

117 SAME54P19A Quadrature Decodeur (PDEC) IRQ 2

ADC0_0_IRQn 

118 SAME54P19A Analog Digital Converter 0 (ADC0) IRQ 0

ADC0_1_IRQn 

119 SAME54P19A Analog Digital Converter 0 (ADC0) IRQ 1

ADC1_0_IRQn 

120 SAME54P19A Analog Digital Converter 1 (ADC1) IRQ 0

ADC1_1_IRQn 

121 SAME54P19A Analog Digital Converter 1 (ADC1) IRQ 1

AC_IRQn 

122 SAME54P19A Analog Comparators (AC)

DAC_0_IRQn 

123 SAME54P19A Digital-to-Analog Converter (DAC) IRQ 0

DAC_1_IRQn 

124 SAME54P19A Digital-to-Analog Converter (DAC) IRQ 1

DAC_2_IRQn 

125 SAME54P19A Digital-to-Analog Converter (DAC) IRQ 2

DAC_3_IRQn 

126 SAME54P19A Digital-to-Analog Converter (DAC) IRQ 3

DAC_4_IRQn 

127 SAME54P19A Digital-to-Analog Converter (DAC) IRQ 4

I2S_IRQn 

128 SAME54P19A Inter-IC Sound Interface (I2S)

PCC_IRQn 

129 SAME54P19A Parallel Capture Controller (PCC)

AES_IRQn 

130 SAME54P19A Advanced Encryption Standard (AES)

TRNG_IRQn 

131 SAME54P19A True Random Generator (TRNG)

ICM_IRQn 

132 SAME54P19A Integrity Check Monitor (ICM)

PUKCC_IRQn 

133 SAME54P19A PUblic-Key Cryptography Controller (PUKCC)

QSPI_IRQn 

134 SAME54P19A Quad SPI interface (QSPI)

SDHC0_IRQn 

135 SAME54P19A SD/MMC Host Controller 0 (SDHC0)

SDHC1_IRQn 

136 SAME54P19A SD/MMC Host Controller 1 (SDHC1)

PERIPH_COUNT_IRQn 

Number of peripheral IDs

NonMaskableInt_IRQn 

2 Non Maskable Interrupt

HardFault_IRQn 

3 Hard Fault Interrupt

MemoryManagement_IRQn 

4 Memory Management Interrupt

BusFault_IRQn 

5 Bus Fault Interrupt

UsageFault_IRQn 

6 Usage Fault Interrupt

SVCall_IRQn 

11 SV Call Interrupt

DebugMonitor_IRQn 

12 Debug Monitor Interrupt

PendSV_IRQn 

14 Pend SV Interrupt

SysTick_IRQn 

15 System Tick Interrupt

PM_IRQn 

0 SAME54P20A Power Manager (PM)

MCLK_IRQn 

1 SAME54P20A Main Clock (MCLK)

OSCCTRL_0_IRQn 

2 SAME54P20A Oscillators Control (OSCCTRL) IRQ 0

OSCCTRL_1_IRQn 

3 SAME54P20A Oscillators Control (OSCCTRL) IRQ 1

OSCCTRL_2_IRQn 

4 SAME54P20A Oscillators Control (OSCCTRL) IRQ 2

OSCCTRL_3_IRQn 

5 SAME54P20A Oscillators Control (OSCCTRL) IRQ 3

OSCCTRL_4_IRQn 

6 SAME54P20A Oscillators Control (OSCCTRL) IRQ 4

OSC32KCTRL_IRQn 

7 SAME54P20A 32kHz Oscillators Control (OSC32KCTRL)

SUPC_0_IRQn 

8 SAME54P20A Supply Controller (SUPC) IRQ 0

SUPC_1_IRQn 

9 SAME54P20A Supply Controller (SUPC) IRQ 1

WDT_IRQn 

10 SAME54P20A Watchdog Timer (WDT)

RTC_IRQn 

11 SAME54P20A Real-Time Counter (RTC)

EIC_0_IRQn 

12 SAME54P20A External Interrupt Controller (EIC) IRQ 0

EIC_1_IRQn 

13 SAME54P20A External Interrupt Controller (EIC) IRQ 1

EIC_2_IRQn 

14 SAME54P20A External Interrupt Controller (EIC) IRQ 2

EIC_3_IRQn 

15 SAME54P20A External Interrupt Controller (EIC) IRQ 3

EIC_4_IRQn 

16 SAME54P20A External Interrupt Controller (EIC) IRQ 4

EIC_5_IRQn 

17 SAME54P20A External Interrupt Controller (EIC) IRQ 5

EIC_6_IRQn 

18 SAME54P20A External Interrupt Controller (EIC) IRQ 6

EIC_7_IRQn 

19 SAME54P20A External Interrupt Controller (EIC) IRQ 7

EIC_8_IRQn 

20 SAME54P20A External Interrupt Controller (EIC) IRQ 8

EIC_9_IRQn 

21 SAME54P20A External Interrupt Controller (EIC) IRQ 9

EIC_10_IRQn 

22 SAME54P20A External Interrupt Controller (EIC) IRQ 10

EIC_11_IRQn 

23 SAME54P20A External Interrupt Controller (EIC) IRQ 11

EIC_12_IRQn 

24 SAME54P20A External Interrupt Controller (EIC) IRQ 12

EIC_13_IRQn 

25 SAME54P20A External Interrupt Controller (EIC) IRQ 13

EIC_14_IRQn 

26 SAME54P20A External Interrupt Controller (EIC) IRQ 14

EIC_15_IRQn 

27 SAME54P20A External Interrupt Controller (EIC) IRQ 15

FREQM_IRQn 

28 SAME54P20A Frequency Meter (FREQM)

NVMCTRL_0_IRQn 

29 SAME54P20A Non-Volatile Memory Controller (NVMCTRL) IRQ 0

NVMCTRL_1_IRQn 

30 SAME54P20A Non-Volatile Memory Controller (NVMCTRL) IRQ 1

DMAC_0_IRQn 

31 SAME54P20A Direct Memory Access Controller (DMAC) IRQ 0

DMAC_1_IRQn 

32 SAME54P20A Direct Memory Access Controller (DMAC) IRQ 1

DMAC_2_IRQn 

33 SAME54P20A Direct Memory Access Controller (DMAC) IRQ 2

DMAC_3_IRQn 

34 SAME54P20A Direct Memory Access Controller (DMAC) IRQ 3

DMAC_4_IRQn 

35 SAME54P20A Direct Memory Access Controller (DMAC) IRQ 4

EVSYS_0_IRQn 

36 SAME54P20A Event System Interface (EVSYS) IRQ 0

EVSYS_1_IRQn 

37 SAME54P20A Event System Interface (EVSYS) IRQ 1

EVSYS_2_IRQn 

38 SAME54P20A Event System Interface (EVSYS) IRQ 2

EVSYS_3_IRQn 

39 SAME54P20A Event System Interface (EVSYS) IRQ 3

EVSYS_4_IRQn 

40 SAME54P20A Event System Interface (EVSYS) IRQ 4

PAC_IRQn 

41 SAME54P20A Peripheral Access Controller (PAC)

RAMECC_IRQn 

45 SAME54P20A RAM ECC (RAMECC)

SERCOM0_0_IRQn 

46 SAME54P20A Serial Communication Interface 0 (SERCOM0) IRQ 0

SERCOM0_1_IRQn 

47 SAME54P20A Serial Communication Interface 0 (SERCOM0) IRQ 1

SERCOM0_2_IRQn 

48 SAME54P20A Serial Communication Interface 0 (SERCOM0) IRQ 2

SERCOM0_3_IRQn 

49 SAME54P20A Serial Communication Interface 0 (SERCOM0) IRQ 3

SERCOM1_0_IRQn 

50 SAME54P20A Serial Communication Interface 1 (SERCOM1) IRQ 0

SERCOM1_1_IRQn 

51 SAME54P20A Serial Communication Interface 1 (SERCOM1) IRQ 1

SERCOM1_2_IRQn 

52 SAME54P20A Serial Communication Interface 1 (SERCOM1) IRQ 2

SERCOM1_3_IRQn 

53 SAME54P20A Serial Communication Interface 1 (SERCOM1) IRQ 3

SERCOM2_0_IRQn 

54 SAME54P20A Serial Communication Interface 2 (SERCOM2) IRQ 0

SERCOM2_1_IRQn 

55 SAME54P20A Serial Communication Interface 2 (SERCOM2) IRQ 1

SERCOM2_2_IRQn 

56 SAME54P20A Serial Communication Interface 2 (SERCOM2) IRQ 2

SERCOM2_3_IRQn 

57 SAME54P20A Serial Communication Interface 2 (SERCOM2) IRQ 3

SERCOM3_0_IRQn 

58 SAME54P20A Serial Communication Interface 3 (SERCOM3) IRQ 0

SERCOM3_1_IRQn 

59 SAME54P20A Serial Communication Interface 3 (SERCOM3) IRQ 1

SERCOM3_2_IRQn 

60 SAME54P20A Serial Communication Interface 3 (SERCOM3) IRQ 2

SERCOM3_3_IRQn 

61 SAME54P20A Serial Communication Interface 3 (SERCOM3) IRQ 3

SERCOM4_0_IRQn 

62 SAME54P20A Serial Communication Interface 4 (SERCOM4) IRQ 0

SERCOM4_1_IRQn 

63 SAME54P20A Serial Communication Interface 4 (SERCOM4) IRQ 1

SERCOM4_2_IRQn 

64 SAME54P20A Serial Communication Interface 4 (SERCOM4) IRQ 2

SERCOM4_3_IRQn 

65 SAME54P20A Serial Communication Interface 4 (SERCOM4) IRQ 3

SERCOM5_0_IRQn 

66 SAME54P20A Serial Communication Interface 5 (SERCOM5) IRQ 0

SERCOM5_1_IRQn 

67 SAME54P20A Serial Communication Interface 5 (SERCOM5) IRQ 1

SERCOM5_2_IRQn 

68 SAME54P20A Serial Communication Interface 5 (SERCOM5) IRQ 2

SERCOM5_3_IRQn 

69 SAME54P20A Serial Communication Interface 5 (SERCOM5) IRQ 3

SERCOM6_0_IRQn 

70 SAME54P20A Serial Communication Interface 6 (SERCOM6) IRQ 0

SERCOM6_1_IRQn 

71 SAME54P20A Serial Communication Interface 6 (SERCOM6) IRQ 1

SERCOM6_2_IRQn 

72 SAME54P20A Serial Communication Interface 6 (SERCOM6) IRQ 2

SERCOM6_3_IRQn 

73 SAME54P20A Serial Communication Interface 6 (SERCOM6) IRQ 3

SERCOM7_0_IRQn 

74 SAME54P20A Serial Communication Interface 7 (SERCOM7) IRQ 0

SERCOM7_1_IRQn 

75 SAME54P20A Serial Communication Interface 7 (SERCOM7) IRQ 1

SERCOM7_2_IRQn 

76 SAME54P20A Serial Communication Interface 7 (SERCOM7) IRQ 2

SERCOM7_3_IRQn 

77 SAME54P20A Serial Communication Interface 7 (SERCOM7) IRQ 3

CAN0_IRQn 

78 SAME54P20A Control Area Network 0 (CAN0)

CAN1_IRQn 

79 SAME54P20A Control Area Network 1 (CAN1)

USB_0_IRQn 

80 SAME54P20A Universal Serial Bus (USB) IRQ 0

USB_1_IRQn 

81 SAME54P20A Universal Serial Bus (USB) IRQ 1

USB_2_IRQn 

82 SAME54P20A Universal Serial Bus (USB) IRQ 2

USB_3_IRQn 

83 SAME54P20A Universal Serial Bus (USB) IRQ 3

GMAC_IRQn 

84 SAME54P20A Ethernet MAC (GMAC)

TCC0_0_IRQn 

85 SAME54P20A Timer Counter Control 0 (TCC0) IRQ 0

TCC0_1_IRQn 

86 SAME54P20A Timer Counter Control 0 (TCC0) IRQ 1

TCC0_2_IRQn 

87 SAME54P20A Timer Counter Control 0 (TCC0) IRQ 2

TCC0_3_IRQn 

88 SAME54P20A Timer Counter Control 0 (TCC0) IRQ 3

TCC0_4_IRQn 

89 SAME54P20A Timer Counter Control 0 (TCC0) IRQ 4

TCC0_5_IRQn 

90 SAME54P20A Timer Counter Control 0 (TCC0) IRQ 5

TCC0_6_IRQn 

91 SAME54P20A Timer Counter Control 0 (TCC0) IRQ 6

TCC1_0_IRQn 

92 SAME54P20A Timer Counter Control 1 (TCC1) IRQ 0

TCC1_1_IRQn 

93 SAME54P20A Timer Counter Control 1 (TCC1) IRQ 1

TCC1_2_IRQn 

94 SAME54P20A Timer Counter Control 1 (TCC1) IRQ 2

TCC1_3_IRQn 

95 SAME54P20A Timer Counter Control 1 (TCC1) IRQ 3

TCC1_4_IRQn 

96 SAME54P20A Timer Counter Control 1 (TCC1) IRQ 4

TCC2_0_IRQn 

97 SAME54P20A Timer Counter Control 2 (TCC2) IRQ 0

TCC2_1_IRQn 

98 SAME54P20A Timer Counter Control 2 (TCC2) IRQ 1

TCC2_2_IRQn 

99 SAME54P20A Timer Counter Control 2 (TCC2) IRQ 2

TCC2_3_IRQn 

100 SAME54P20A Timer Counter Control 2 (TCC2) IRQ 3

TCC3_0_IRQn 

101 SAME54P20A Timer Counter Control 3 (TCC3) IRQ 0

TCC3_1_IRQn 

102 SAME54P20A Timer Counter Control 3 (TCC3) IRQ 1

TCC3_2_IRQn 

103 SAME54P20A Timer Counter Control 3 (TCC3) IRQ 2

TCC4_0_IRQn 

104 SAME54P20A Timer Counter Control 4 (TCC4) IRQ 0

TCC4_1_IRQn 

105 SAME54P20A Timer Counter Control 4 (TCC4) IRQ 1

TCC4_2_IRQn 

106 SAME54P20A Timer Counter Control 4 (TCC4) IRQ 2

TC0_IRQn 

107 SAME54P20A Basic Timer Counter 0 (TC0)

TC1_IRQn 

108 SAME54P20A Basic Timer Counter 1 (TC1)

TC2_IRQn 

109 SAME54P20A Basic Timer Counter 2 (TC2)

TC3_IRQn 

110 SAME54P20A Basic Timer Counter 3 (TC3)

TC4_IRQn 

111 SAME54P20A Basic Timer Counter 4 (TC4)

TC5_IRQn 

112 SAME54P20A Basic Timer Counter 5 (TC5)

TC6_IRQn 

113 SAME54P20A Basic Timer Counter 6 (TC6)

TC7_IRQn 

114 SAME54P20A Basic Timer Counter 7 (TC7)

PDEC_0_IRQn 

115 SAME54P20A Quadrature Decodeur (PDEC) IRQ 0

PDEC_1_IRQn 

116 SAME54P20A Quadrature Decodeur (PDEC) IRQ 1

PDEC_2_IRQn 

117 SAME54P20A Quadrature Decodeur (PDEC) IRQ 2

ADC0_0_IRQn 

118 SAME54P20A Analog Digital Converter 0 (ADC0) IRQ 0

ADC0_1_IRQn 

119 SAME54P20A Analog Digital Converter 0 (ADC0) IRQ 1

ADC1_0_IRQn 

120 SAME54P20A Analog Digital Converter 1 (ADC1) IRQ 0

ADC1_1_IRQn 

121 SAME54P20A Analog Digital Converter 1 (ADC1) IRQ 1

AC_IRQn 

122 SAME54P20A Analog Comparators (AC)

DAC_0_IRQn 

123 SAME54P20A Digital-to-Analog Converter (DAC) IRQ 0

DAC_1_IRQn 

124 SAME54P20A Digital-to-Analog Converter (DAC) IRQ 1

DAC_2_IRQn 

125 SAME54P20A Digital-to-Analog Converter (DAC) IRQ 2

DAC_3_IRQn 

126 SAME54P20A Digital-to-Analog Converter (DAC) IRQ 3

DAC_4_IRQn 

127 SAME54P20A Digital-to-Analog Converter (DAC) IRQ 4

I2S_IRQn 

128 SAME54P20A Inter-IC Sound Interface (I2S)

PCC_IRQn 

129 SAME54P20A Parallel Capture Controller (PCC)

AES_IRQn 

130 SAME54P20A Advanced Encryption Standard (AES)

TRNG_IRQn 

131 SAME54P20A True Random Generator (TRNG)

ICM_IRQn 

132 SAME54P20A Integrity Check Monitor (ICM)

PUKCC_IRQn 

133 SAME54P20A PUblic-Key Cryptography Controller (PUKCC)

QSPI_IRQn 

134 SAME54P20A Quad SPI interface (QSPI)

SDHC0_IRQn 

135 SAME54P20A SD/MMC Host Controller 0 (SDHC0)

SDHC1_IRQn 

136 SAME54P20A SD/MMC Host Controller 1 (SDHC1)

PERIPH_COUNT_IRQn 

Number of peripheral IDs

Definition at line 91 of file same54n20a.h.

92 {
93  /****** Cortex-M4 Processor Exceptions Numbers *******************/
94  NonMaskableInt_IRQn = -14,
95  HardFault_IRQn = -13,
97  BusFault_IRQn = -11,
98  UsageFault_IRQn = -10,
99  SVCall_IRQn = -5,
100  DebugMonitor_IRQn = -4,
101  PendSV_IRQn = -2,
102  SysTick_IRQn = -1,
103  /****** SAME54N20A-specific Interrupt Numbers *********************/
104  PM_IRQn = 0,
105  MCLK_IRQn = 1,
106  OSCCTRL_0_IRQn = 2,
107  OSCCTRL_1_IRQn = 3,
108  OSCCTRL_2_IRQn = 4,
109  OSCCTRL_3_IRQn = 5,
110  OSCCTRL_4_IRQn = 6,
111  OSC32KCTRL_IRQn = 7,
112  SUPC_0_IRQn = 8,
113  SUPC_1_IRQn = 9,
114  WDT_IRQn = 10,
115  RTC_IRQn = 11,
116  EIC_0_IRQn = 12,
117  EIC_1_IRQn = 13,
118  EIC_2_IRQn = 14,
119  EIC_3_IRQn = 15,
120  EIC_4_IRQn = 16,
121  EIC_5_IRQn = 17,
122  EIC_6_IRQn = 18,
123  EIC_7_IRQn = 19,
124  EIC_8_IRQn = 20,
125  EIC_9_IRQn = 21,
126  EIC_10_IRQn = 22,
127  EIC_11_IRQn = 23,
128  EIC_12_IRQn = 24,
129  EIC_13_IRQn = 25,
130  EIC_14_IRQn = 26,
131  EIC_15_IRQn = 27,
132  FREQM_IRQn = 28,
133  NVMCTRL_0_IRQn = 29,
134  NVMCTRL_1_IRQn = 30,
135  DMAC_0_IRQn = 31,
136  DMAC_1_IRQn = 32,
137  DMAC_2_IRQn = 33,
138  DMAC_3_IRQn = 34,
139  DMAC_4_IRQn = 35,
140  EVSYS_0_IRQn = 36,
141  EVSYS_1_IRQn = 37,
142  EVSYS_2_IRQn = 38,
143  EVSYS_3_IRQn = 39,
144  EVSYS_4_IRQn = 40,
145  PAC_IRQn = 41,
146  RAMECC_IRQn = 45,
147  SERCOM0_0_IRQn = 46,
148  SERCOM0_1_IRQn = 47,
149  SERCOM0_2_IRQn = 48,
150  SERCOM0_3_IRQn = 49,
151  SERCOM1_0_IRQn = 50,
152  SERCOM1_1_IRQn = 51,
153  SERCOM1_2_IRQn = 52,
154  SERCOM1_3_IRQn = 53,
155  SERCOM2_0_IRQn = 54,
156  SERCOM2_1_IRQn = 55,
157  SERCOM2_2_IRQn = 56,
158  SERCOM2_3_IRQn = 57,
159  SERCOM3_0_IRQn = 58,
160  SERCOM3_1_IRQn = 59,
161  SERCOM3_2_IRQn = 60,
162  SERCOM3_3_IRQn = 61,
163  SERCOM4_0_IRQn = 62,
164  SERCOM4_1_IRQn = 63,
165  SERCOM4_2_IRQn = 64,
166  SERCOM4_3_IRQn = 65,
167  SERCOM5_0_IRQn = 66,
168  SERCOM5_1_IRQn = 67,
169  SERCOM5_2_IRQn = 68,
170  SERCOM5_3_IRQn = 69,
171  SERCOM6_0_IRQn = 70,
172  SERCOM6_1_IRQn = 71,
173  SERCOM6_2_IRQn = 72,
174  SERCOM6_3_IRQn = 73,
175  SERCOM7_0_IRQn = 74,
176  SERCOM7_1_IRQn = 75,
177  SERCOM7_2_IRQn = 76,
178  SERCOM7_3_IRQn = 77,
179  CAN0_IRQn = 78,
180  CAN1_IRQn = 79,
181  USB_0_IRQn = 80,
182  USB_1_IRQn = 81,
183  USB_2_IRQn = 82,
184  USB_3_IRQn = 83,
185  GMAC_IRQn = 84,
186  TCC0_0_IRQn = 85,
187  TCC0_1_IRQn = 86,
188  TCC0_2_IRQn = 87,
189  TCC0_3_IRQn = 88,
190  TCC0_4_IRQn = 89,
191  TCC0_5_IRQn = 90,
192  TCC0_6_IRQn = 91,
193  TCC1_0_IRQn = 92,
194  TCC1_1_IRQn = 93,
195  TCC1_2_IRQn = 94,
196  TCC1_3_IRQn = 95,
197  TCC1_4_IRQn = 96,
198  TCC2_0_IRQn = 97,
199  TCC2_1_IRQn = 98,
200  TCC2_2_IRQn = 99,
201  TCC2_3_IRQn = 100,
202  TCC3_0_IRQn = 101,
203  TCC3_1_IRQn = 102,
204  TCC3_2_IRQn = 103,
205  TCC4_0_IRQn = 104,
206  TCC4_1_IRQn = 105,
207  TCC4_2_IRQn = 106,
208  TC0_IRQn = 107,
209  TC1_IRQn = 108,
210  TC2_IRQn = 109,
211  TC3_IRQn = 110,
212  TC4_IRQn = 111,
213  TC5_IRQn = 112,
214  TC6_IRQn = 113,
215  TC7_IRQn = 114,
216  PDEC_0_IRQn = 115,
217  PDEC_1_IRQn = 116,
218  PDEC_2_IRQn = 117,
219  ADC0_0_IRQn = 118,
220  ADC0_1_IRQn = 119,
221  ADC1_0_IRQn = 120,
222  ADC1_1_IRQn = 121,
223  AC_IRQn = 122,
224  DAC_0_IRQn = 123,
225  DAC_1_IRQn = 124,
226  DAC_2_IRQn = 125,
227  DAC_3_IRQn = 126,
228  DAC_4_IRQn = 127,
229  I2S_IRQn = 128,
230  PCC_IRQn = 129,
231  AES_IRQn = 130,
232  TRNG_IRQn = 131,
233  ICM_IRQn = 132,
234  PUKCC_IRQn = 133,
235  QSPI_IRQn = 134,
236  SDHC0_IRQn = 135,
237  SDHC1_IRQn = 136,
238 
239  PERIPH_COUNT_IRQn = 137
240 } IRQn_Type;
DAC_3_IRQn
@ DAC_3_IRQn
Definition: same54n20a.h:227
EIC_7_IRQn
@ EIC_7_IRQn
Definition: same54n20a.h:123
SUPC_1_IRQn
@ SUPC_1_IRQn
Definition: same54n20a.h:113
NonMaskableInt_IRQn
@ NonMaskableInt_IRQn
Definition: same54n20a.h:94
RTC_IRQn
@ RTC_IRQn
Definition: same54n20a.h:115
SERCOM1_1_IRQn
@ SERCOM1_1_IRQn
Definition: same54n20a.h:152
EIC_0_IRQn
@ EIC_0_IRQn
Definition: same54n20a.h:116
EIC_3_IRQn
@ EIC_3_IRQn
Definition: same54n20a.h:119
IRQn_Type
enum IRQn IRQn_Type
NVMCTRL_1_IRQn
@ NVMCTRL_1_IRQn
Definition: same54n20a.h:134
SysTick_IRQn
@ SysTick_IRQn
Definition: same54n20a.h:102
SERCOM7_2_IRQn
@ SERCOM7_2_IRQn
Definition: same54n20a.h:177
PM_IRQn
@ PM_IRQn
Definition: same54n20a.h:104
PERIPH_COUNT_IRQn
@ PERIPH_COUNT_IRQn
Definition: same54n20a.h:239
QSPI_IRQn
@ QSPI_IRQn
Definition: same54n20a.h:235
SERCOM2_3_IRQn
@ SERCOM2_3_IRQn
Definition: same54n20a.h:158
DAC_2_IRQn
@ DAC_2_IRQn
Definition: same54n20a.h:226
SERCOM7_1_IRQn
@ SERCOM7_1_IRQn
Definition: same54n20a.h:176
ADC0_0_IRQn
@ ADC0_0_IRQn
Definition: same54n20a.h:219
SERCOM1_2_IRQn
@ SERCOM1_2_IRQn
Definition: same54n20a.h:153
SERCOM0_3_IRQn
@ SERCOM0_3_IRQn
Definition: same54n20a.h:150
NVMCTRL_0_IRQn
@ NVMCTRL_0_IRQn
Definition: same54n20a.h:133
TC3_IRQn
@ TC3_IRQn
Definition: same54n20a.h:211
MemoryManagement_IRQn
@ MemoryManagement_IRQn
Definition: same54n20a.h:96
DMAC_1_IRQn
@ DMAC_1_IRQn
Definition: same54n20a.h:136
EIC_2_IRQn
@ EIC_2_IRQn
Definition: same54n20a.h:118
SERCOM4_0_IRQn
@ SERCOM4_0_IRQn
Definition: same54n20a.h:163
SERCOM7_3_IRQn
@ SERCOM7_3_IRQn
Definition: same54n20a.h:178
AC_IRQn
@ AC_IRQn
Definition: same54n20a.h:223
PUKCC_IRQn
@ PUKCC_IRQn
Definition: same54n20a.h:234
DAC_0_IRQn
@ DAC_0_IRQn
Definition: same54n20a.h:224
SERCOM1_3_IRQn
@ SERCOM1_3_IRQn
Definition: same54n20a.h:154
PDEC_2_IRQn
@ PDEC_2_IRQn
Definition: same54n20a.h:218
TCC2_0_IRQn
@ TCC2_0_IRQn
Definition: same54n20a.h:198
DMAC_3_IRQn
@ DMAC_3_IRQn
Definition: same54n20a.h:138
TC7_IRQn
@ TC7_IRQn
Definition: same54n20a.h:215
OSCCTRL_0_IRQn
@ OSCCTRL_0_IRQn
Definition: same54n20a.h:106
PAC_IRQn
@ PAC_IRQn
Definition: same54n20a.h:145
USB_2_IRQn
@ USB_2_IRQn
Definition: same54n20a.h:183
SDHC0_IRQn
@ SDHC0_IRQn
Definition: same54n20a.h:236
OSCCTRL_3_IRQn
@ OSCCTRL_3_IRQn
Definition: same54n20a.h:109
SERCOM4_1_IRQn
@ SERCOM4_1_IRQn
Definition: same54n20a.h:164
TCC2_3_IRQn
@ TCC2_3_IRQn
Definition: same54n20a.h:201
EVSYS_4_IRQn
@ EVSYS_4_IRQn
Definition: same54n20a.h:144
TCC3_0_IRQn
@ TCC3_0_IRQn
Definition: same54n20a.h:202
SERCOM7_0_IRQn
@ SERCOM7_0_IRQn
Definition: same54n20a.h:175
TC5_IRQn
@ TC5_IRQn
Definition: same54n20a.h:213
WDT_IRQn
@ WDT_IRQn
Definition: same54n20a.h:114
EVSYS_2_IRQn
@ EVSYS_2_IRQn
Definition: same54n20a.h:142
SERCOM5_1_IRQn
@ SERCOM5_1_IRQn
Definition: same54n20a.h:168
SERCOM2_1_IRQn
@ SERCOM2_1_IRQn
Definition: same54n20a.h:156
TCC0_6_IRQn
@ TCC0_6_IRQn
Definition: same54n20a.h:192
TCC2_1_IRQn
@ TCC2_1_IRQn
Definition: same54n20a.h:199
TCC0_2_IRQn
@ TCC0_2_IRQn
Definition: same54n20a.h:188
SERCOM3_3_IRQn
@ SERCOM3_3_IRQn
Definition: same54n20a.h:162
USB_3_IRQn
@ USB_3_IRQn
Definition: same54n20a.h:184
CAN0_IRQn
@ CAN0_IRQn
Definition: same54n20a.h:179
EIC_14_IRQn
@ EIC_14_IRQn
Definition: same54n20a.h:130
USB_0_IRQn
@ USB_0_IRQn
Definition: same54n20a.h:181
SERCOM5_2_IRQn
@ SERCOM5_2_IRQn
Definition: same54n20a.h:169
EIC_13_IRQn
@ EIC_13_IRQn
Definition: same54n20a.h:129
EIC_11_IRQn
@ EIC_11_IRQn
Definition: same54n20a.h:127
TCC0_4_IRQn
@ TCC0_4_IRQn
Definition: same54n20a.h:190
SERCOM3_2_IRQn
@ SERCOM3_2_IRQn
Definition: same54n20a.h:161
SDHC1_IRQn
@ SDHC1_IRQn
Definition: same54n20a.h:237
TCC1_2_IRQn
@ TCC1_2_IRQn
Definition: same54n20a.h:195
TCC3_1_IRQn
@ TCC3_1_IRQn
Definition: same54n20a.h:203
TCC1_1_IRQn
@ TCC1_1_IRQn
Definition: same54n20a.h:194
DMAC_4_IRQn
@ DMAC_4_IRQn
Definition: same54n20a.h:139
TCC4_0_IRQn
@ TCC4_0_IRQn
Definition: same54n20a.h:205
DebugMonitor_IRQn
@ DebugMonitor_IRQn
Definition: same54n20a.h:100
SERCOM6_1_IRQn
@ SERCOM6_1_IRQn
Definition: same54n20a.h:172
EIC_5_IRQn
@ EIC_5_IRQn
Definition: same54n20a.h:121
EIC_9_IRQn
@ EIC_9_IRQn
Definition: same54n20a.h:125
TC0_IRQn
@ TC0_IRQn
Definition: same54n20a.h:208
SERCOM0_0_IRQn
@ SERCOM0_0_IRQn
Definition: same54n20a.h:147
SUPC_0_IRQn
@ SUPC_0_IRQn
Definition: same54n20a.h:112
SERCOM6_0_IRQn
@ SERCOM6_0_IRQn
Definition: same54n20a.h:171
SVCall_IRQn
@ SVCall_IRQn
Definition: same54n20a.h:99
SERCOM2_2_IRQn
@ SERCOM2_2_IRQn
Definition: same54n20a.h:157
CAN1_IRQn
@ CAN1_IRQn
Definition: same54n20a.h:180
TRNG_IRQn
@ TRNG_IRQn
Definition: same54n20a.h:232
SERCOM0_2_IRQn
@ SERCOM0_2_IRQn
Definition: same54n20a.h:149
TCC0_1_IRQn
@ TCC0_1_IRQn
Definition: same54n20a.h:187
EVSYS_3_IRQn
@ EVSYS_3_IRQn
Definition: same54n20a.h:143
TCC1_0_IRQn
@ TCC1_0_IRQn
Definition: same54n20a.h:193
ADC1_0_IRQn
@ ADC1_0_IRQn
Definition: same54n20a.h:221
TCC0_3_IRQn
@ TCC0_3_IRQn
Definition: same54n20a.h:189
EIC_8_IRQn
@ EIC_8_IRQn
Definition: same54n20a.h:124
SERCOM4_2_IRQn
@ SERCOM4_2_IRQn
Definition: same54n20a.h:165
EIC_1_IRQn
@ EIC_1_IRQn
Definition: same54n20a.h:117
HardFault_IRQn
@ HardFault_IRQn
Definition: same54n20a.h:95
TCC1_4_IRQn
@ TCC1_4_IRQn
Definition: same54n20a.h:197
I2S_IRQn
@ I2S_IRQn
Definition: same54n20a.h:229
TC6_IRQn
@ TC6_IRQn
Definition: same54n20a.h:214
EIC_12_IRQn
@ EIC_12_IRQn
Definition: same54n20a.h:128
SERCOM5_3_IRQn
@ SERCOM5_3_IRQn
Definition: same54n20a.h:170
SERCOM6_3_IRQn
@ SERCOM6_3_IRQn
Definition: same54n20a.h:174
EVSYS_1_IRQn
@ EVSYS_1_IRQn
Definition: same54n20a.h:141
TCC0_5_IRQn
@ TCC0_5_IRQn
Definition: same54n20a.h:191
SERCOM3_1_IRQn
@ SERCOM3_1_IRQn
Definition: same54n20a.h:160
TC2_IRQn
@ TC2_IRQn
Definition: same54n20a.h:210
SERCOM1_0_IRQn
@ SERCOM1_0_IRQn
Definition: same54n20a.h:151
RAMECC_IRQn
@ RAMECC_IRQn
Definition: same54n20a.h:146
TCC2_2_IRQn
@ TCC2_2_IRQn
Definition: same54n20a.h:200
EIC_15_IRQn
@ EIC_15_IRQn
Definition: same54n20a.h:131
FREQM_IRQn
@ FREQM_IRQn
Definition: same54n20a.h:132
TCC4_2_IRQn
@ TCC4_2_IRQn
Definition: same54n20a.h:207
GMAC_IRQn
@ GMAC_IRQn
Definition: same54n20a.h:185
SERCOM6_2_IRQn
@ SERCOM6_2_IRQn
Definition: same54n20a.h:173
SERCOM5_0_IRQn
@ SERCOM5_0_IRQn
Definition: same54n20a.h:167
BusFault_IRQn
@ BusFault_IRQn
Definition: same54n20a.h:97
DAC_4_IRQn
@ DAC_4_IRQn
Definition: same54n20a.h:228
USB_1_IRQn
@ USB_1_IRQn
Definition: same54n20a.h:182
ADC1_1_IRQn
@ ADC1_1_IRQn
Definition: same54n20a.h:222
DAC_1_IRQn
@ DAC_1_IRQn
Definition: same54n20a.h:225
DMAC_0_IRQn
@ DMAC_0_IRQn
Definition: same54n20a.h:135
UsageFault_IRQn
@ UsageFault_IRQn
Definition: same54n20a.h:98
TCC0_0_IRQn
@ TCC0_0_IRQn
Definition: same54n20a.h:186
EVSYS_0_IRQn
@ EVSYS_0_IRQn
Definition: same54n20a.h:140
SERCOM0_1_IRQn
@ SERCOM0_1_IRQn
Definition: same54n20a.h:148
DMAC_2_IRQn
@ DMAC_2_IRQn
Definition: same54n20a.h:137
EIC_4_IRQn
@ EIC_4_IRQn
Definition: same54n20a.h:120
EIC_6_IRQn
@ EIC_6_IRQn
Definition: same54n20a.h:122
SERCOM2_0_IRQn
@ SERCOM2_0_IRQn
Definition: same54n20a.h:155
PCC_IRQn
@ PCC_IRQn
Definition: same54n20a.h:230
TC4_IRQn
@ TC4_IRQn
Definition: same54n20a.h:212
OSC32KCTRL_IRQn
@ OSC32KCTRL_IRQn
Definition: same54n20a.h:111
EIC_10_IRQn
@ EIC_10_IRQn
Definition: same54n20a.h:126
TCC4_1_IRQn
@ TCC4_1_IRQn
Definition: same54n20a.h:206
TCC3_2_IRQn
@ TCC3_2_IRQn
Definition: same54n20a.h:204
OSCCTRL_2_IRQn
@ OSCCTRL_2_IRQn
Definition: same54n20a.h:108
PDEC_1_IRQn
@ PDEC_1_IRQn
Definition: same54n20a.h:217
ADC0_1_IRQn
@ ADC0_1_IRQn
Definition: same54n20a.h:220
OSCCTRL_1_IRQn
@ OSCCTRL_1_IRQn
Definition: same54n20a.h:107
PDEC_0_IRQn
@ PDEC_0_IRQn
Definition: same54n20a.h:216
SERCOM4_3_IRQn
@ SERCOM4_3_IRQn
Definition: same54n20a.h:166
ICM_IRQn
@ ICM_IRQn
Definition: same54n20a.h:233
AES_IRQn
@ AES_IRQn
Definition: same54n20a.h:231
TCC1_3_IRQn
@ TCC1_3_IRQn
Definition: same54n20a.h:196
MCLK_IRQn
@ MCLK_IRQn
Definition: same54n20a.h:105
SERCOM3_0_IRQn
@ SERCOM3_0_IRQn
Definition: same54n20a.h:159
PendSV_IRQn
@ PendSV_IRQn
Definition: same54n20a.h:101
OSCCTRL_4_IRQn
@ OSCCTRL_4_IRQn
Definition: same54n20a.h:110
TC1_IRQn
@ TC1_IRQn
Definition: same54n20a.h:209