doc/html/tc4_8h_source.html

#ifndef _SAME54_TC4_INSTANCE_

#define _SAME54_TC4_INSTANCE_


/* ========== Register definition for TC4 peripheral ========== */

#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))

#define REG_TC4_CTRLA              (0x42001400)

#define REG_TC4_CTRLBCLR           (0x42001404)

#define REG_TC4_CTRLBSET           (0x42001405)

#define REG_TC4_EVCTRL             (0x42001406)

#define REG_TC4_INTENCLR           (0x42001408)

#define REG_TC4_INTENSET           (0x42001409)

#define REG_TC4_INTFLAG            (0x4200140A)

#define REG_TC4_STATUS             (0x4200140B)

#define REG_TC4_WAVE               (0x4200140C)

#define REG_TC4_DRVCTRL            (0x4200140D)

#define REG_TC4_DBGCTRL            (0x4200140F)

#define REG_TC4_SYNCBUSY           (0x42001410)

#define REG_TC4_COUNT16_COUNT      (0x42001414)

#define REG_TC4_COUNT16_CC0        (0x4200141C)

#define REG_TC4_COUNT16_CC1        (0x4200141E)

#define REG_TC4_COUNT16_CCBUF0     (0x42001430)

#define REG_TC4_COUNT16_CCBUF1     (0x42001432)

#define REG_TC4_COUNT32_COUNT      (0x42001414)

#define REG_TC4_COUNT32_CC0        (0x4200141C)

#define REG_TC4_COUNT32_CC1        (0x42001420)

#define REG_TC4_COUNT32_CCBUF0     (0x42001430)

#define REG_TC4_COUNT32_CCBUF1     (0x42001434)

#define REG_TC4_COUNT8_COUNT       (0x42001414)

#define REG_TC4_COUNT8_PER         (0x4200141B)

#define REG_TC4_COUNT8_CC0         (0x4200141C)

#define REG_TC4_COUNT8_CC1         (0x4200141D)

#define REG_TC4_COUNT8_PERBUF      (0x4200142F)

#define REG_TC4_COUNT8_CCBUF0      (0x42001430)

#define REG_TC4_COUNT8_CCBUF1      (0x42001431)

#else

#define REG_TC4_CTRLA              (*(RwReg  *)0x42001400UL)

#define REG_TC4_CTRLBCLR           (*(RwReg8 *)0x42001404UL)

#define REG_TC4_CTRLBSET           (*(RwReg8 *)0x42001405UL)

#define REG_TC4_EVCTRL             (*(RwReg16*)0x42001406UL)

#define REG_TC4_INTENCLR           (*(RwReg8 *)0x42001408UL)

#define REG_TC4_INTENSET           (*(RwReg8 *)0x42001409UL)

#define REG_TC4_INTFLAG            (*(RwReg8 *)0x4200140AUL)

#define REG_TC4_STATUS             (*(RwReg8 *)0x4200140BUL)

#define REG_TC4_WAVE               (*(RwReg8 *)0x4200140CUL)

#define REG_TC4_DRVCTRL            (*(RwReg8 *)0x4200140DUL)

#define REG_TC4_DBGCTRL            (*(RwReg8 *)0x4200140FUL)

#define REG_TC4_SYNCBUSY           (*(RoReg  *)0x42001410UL)

#define REG_TC4_COUNT16_COUNT      (*(RwReg16*)0x42001414UL)

#define REG_TC4_COUNT16_CC0        (*(RwReg16*)0x4200141CUL)

#define REG_TC4_COUNT16_CC1        (*(RwReg16*)0x4200141EUL)

#define REG_TC4_COUNT16_CCBUF0     (*(RwReg16*)0x42001430UL)

#define REG_TC4_COUNT16_CCBUF1     (*(RwReg16*)0x42001432UL)

#define REG_TC4_COUNT32_COUNT      (*(RwReg  *)0x42001414UL)

#define REG_TC4_COUNT32_CC0        (*(RwReg  *)0x4200141CUL)

#define REG_TC4_COUNT32_CC1        (*(RwReg  *)0x42001420UL)

#define REG_TC4_COUNT32_CCBUF0     (*(RwReg  *)0x42001430UL)

#define REG_TC4_COUNT32_CCBUF1     (*(RwReg  *)0x42001434UL)

#define REG_TC4_COUNT8_COUNT       (*(RwReg8 *)0x42001414UL)

#define REG_TC4_COUNT8_PER         (*(RwReg8 *)0x4200141BUL)

#define REG_TC4_COUNT8_CC0         (*(RwReg8 *)0x4200141CUL)

#define REG_TC4_COUNT8_CC1         (*(RwReg8 *)0x4200141DUL)

#define REG_TC4_COUNT8_PERBUF      (*(RwReg8 *)0x4200142FUL)

#define REG_TC4_COUNT8_CCBUF0      (*(RwReg8 *)0x42001430UL)

#define REG_TC4_COUNT8_CCBUF1      (*(RwReg8 *)0x42001431UL)

#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */


/* ========== Instance parameters for TC4 peripheral ========== */

#define TC4_CC_NUM                  2

#define TC4_DMAC_ID_MC_0            57

#define TC4_DMAC_ID_MC_1            58

#define TC4_DMAC_ID_MC_LSB          57

#define TC4_DMAC_ID_MC_MSB          58

#define TC4_DMAC_ID_MC_SIZE         2

#define TC4_DMAC_ID_OVF             56       // Indexes of DMA Overflow trigger

#define TC4_EXT                     0        // Coding of implemented extended features (keep 0 value)

#define TC4_GCLK_ID                 30       // Index of Generic Clock

#define TC4_MASTER_SLAVE_MODE       1        // TC type 0 : NA, 1 : Master, 2 : Slave

#define TC4_OW_NUM                  2        // Number of Output Waveforms


#endif /* _SAME54_TC4_INSTANCE_ */