SAME54P20A Test Project
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DAC hardware registers. More...
#include <dac.h>
Data Fields | |
__IO DAC_CTRLA_Type | CTRLA |
Offset: 0x00 (R/W 8) Control A. | |
__IO DAC_CTRLB_Type | CTRLB |
Offset: 0x01 (R/W 8) Control B. | |
__IO DAC_EVCTRL_Type | EVCTRL |
Offset: 0x02 (R/W 8) Event Control. | |
RoReg8 | Reserved1 [0x1] |
__IO DAC_INTENCLR_Type | INTENCLR |
Offset: 0x04 (R/W 8) Interrupt Enable Clear. | |
__IO DAC_INTENSET_Type | INTENSET |
Offset: 0x05 (R/W 8) Interrupt Enable Set. | |
__IO DAC_INTFLAG_Type | INTFLAG |
Offset: 0x06 (R/W 8) Interrupt Flag Status and Clear. | |
__I DAC_STATUS_Type | STATUS |
Offset: 0x07 (R/ 8) Status. | |
__I DAC_SYNCBUSY_Type | SYNCBUSY |
Offset: 0x08 (R/ 32) Synchronization Busy. | |
__IO DAC_DACCTRL_Type | DACCTRL [2] |
Offset: 0x0C (R/W 16) DAC n Control. | |
__O DAC_DATA_Type | DATA [2] |
Offset: 0x10 ( /W 16) DAC n Data. | |
__O DAC_DATABUF_Type | DATABUF [2] |
Offset: 0x14 ( /W 16) DAC n Data Buffer. | |
__IO DAC_DBGCTRL_Type | DBGCTRL |
Offset: 0x18 (R/W 8) Debug Control. | |
RoReg8 | Reserved2 [0x3] |
__I DAC_RESULT_Type | RESULT [2] |
Offset: 0x1C (R/ 16) Filter Result. | |