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SAME54P20A Test Project
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AES hardware registers. More...
#include <aes.h>
Data Fields | |
| __IO AES_CTRLA_Type | CTRLA |
| Offset: 0x00 (R/W 32) Control A. | |
| __IO AES_CTRLB_Type | CTRLB |
| Offset: 0x04 (R/W 8) Control B. | |
| __IO AES_INTENCLR_Type | INTENCLR |
| Offset: 0x05 (R/W 8) Interrupt Enable Clear. | |
| __IO AES_INTENSET_Type | INTENSET |
| Offset: 0x06 (R/W 8) Interrupt Enable Set. | |
| __IO AES_INTFLAG_Type | INTFLAG |
| Offset: 0x07 (R/W 8) Interrupt Flag Status. | |
| __IO AES_DATABUFPTR_Type | DATABUFPTR |
| Offset: 0x08 (R/W 8) Data buffer pointer. | |
| __IO AES_DBGCTRL_Type | DBGCTRL |
| Offset: 0x09 (R/W 8) Debug control. | |
| RoReg8 | Reserved1 [0x2] |
| __O AES_KEYWORD_Type | KEYWORD [8] |
| Offset: 0x0C ( /W 32) Keyword n. | |
| RoReg8 | Reserved2 [0xC] |
| __IO AES_INDATA_Type | INDATA |
| Offset: 0x38 (R/W 32) Indata. | |
| __O AES_INTVECTV_Type | INTVECTV [4] |
| Offset: 0x3C ( /W 32) Initialisation Vector n. | |
| RoReg8 | Reserved3 [0x10] |
| __IO AES_HASHKEY_Type | HASHKEY [4] |
| Offset: 0x5C (R/W 32) Hash key n. | |
| __IO AES_GHASH_Type | GHASH [4] |
| Offset: 0x6C (R/W 32) Galois Hash n. | |
| RoReg8 | Reserved4 [0x4] |
| __IO AES_CIPLEN_Type | CIPLEN |
| Offset: 0x80 (R/W 32) Cipher Length. | |
| __IO AES_RANDSEED_Type | RANDSEED |
| Offset: 0x84 (R/W 32) Random Seed. | |
1.8.20