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<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_92b117bae75cf16a05ca7611db29e9c7.html">instance</a></li> </ul>
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<div class="title">sercom0.h</div> </div>
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<a href="sercom0_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>  </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span> <span class="preprocessor">#ifndef _SAME54_SERCOM0_INSTANCE_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span> <span class="preprocessor">#define _SAME54_SERCOM0_INSTANCE_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>  </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span> <span class="comment">/* ========== Register definition for SERCOM0 peripheral ========== */</span></div>
<div class="line"><a name="l00034"></a><span class="lineno"> 34</span> <span class="preprocessor">#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span> <span class="preprocessor">#define REG_SERCOM0_I2CM_CTRLA (0x40003000) </span></div>
<div class="line"><a name="l00036"></a><span class="lineno"> 36</span> <span class="preprocessor">#define REG_SERCOM0_I2CM_CTRLB (0x40003004) </span></div>
<div class="line"><a name="l00037"></a><span class="lineno"> 37</span> <span class="preprocessor">#define REG_SERCOM0_I2CM_CTRLC (0x40003008) </span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span> <span class="preprocessor">#define REG_SERCOM0_I2CM_BAUD (0x4000300C) </span></div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span> <span class="preprocessor">#define REG_SERCOM0_I2CM_INTENCLR (0x40003014) </span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span> <span class="preprocessor">#define REG_SERCOM0_I2CM_INTENSET (0x40003016) </span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span> <span class="preprocessor">#define REG_SERCOM0_I2CM_INTFLAG (0x40003018) </span></div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span> <span class="preprocessor">#define REG_SERCOM0_I2CM_STATUS (0x4000301A) </span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span> <span class="preprocessor">#define REG_SERCOM0_I2CM_SYNCBUSY (0x4000301C) </span></div>
<div class="line"><a name="l00044"></a><span class="lineno"> 44</span> <span class="preprocessor">#define REG_SERCOM0_I2CM_ADDR (0x40003024) </span></div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span> <span class="preprocessor">#define REG_SERCOM0_I2CM_DATA (0x40003028) </span></div>
<div class="line"><a name="l00046"></a><span class="lineno"> 46</span> <span class="preprocessor">#define REG_SERCOM0_I2CM_DBGCTRL (0x40003030) </span></div>
<div class="line"><a name="l00047"></a><span class="lineno"> 47</span> <span class="preprocessor">#define REG_SERCOM0_I2CS_CTRLA (0x40003000) </span></div>
<div class="line"><a name="l00048"></a><span class="lineno"> 48</span> <span class="preprocessor">#define REG_SERCOM0_I2CS_CTRLB (0x40003004) </span></div>
<div class="line"><a name="l00049"></a><span class="lineno"> 49</span> <span class="preprocessor">#define REG_SERCOM0_I2CS_CTRLC (0x40003008) </span></div>
<div class="line"><a name="l00050"></a><span class="lineno"> 50</span> <span class="preprocessor">#define REG_SERCOM0_I2CS_INTENCLR (0x40003014) </span></div>
<div class="line"><a name="l00051"></a><span class="lineno"> 51</span> <span class="preprocessor">#define REG_SERCOM0_I2CS_INTENSET (0x40003016) </span></div>
<div class="line"><a name="l00052"></a><span class="lineno"> 52</span> <span class="preprocessor">#define REG_SERCOM0_I2CS_INTFLAG (0x40003018) </span></div>
<div class="line"><a name="l00053"></a><span class="lineno"> 53</span> <span class="preprocessor">#define REG_SERCOM0_I2CS_STATUS (0x4000301A) </span></div>
<div class="line"><a name="l00054"></a><span class="lineno"> 54</span> <span class="preprocessor">#define REG_SERCOM0_I2CS_SYNCBUSY (0x4000301C) </span></div>
<div class="line"><a name="l00055"></a><span class="lineno"> 55</span> <span class="preprocessor">#define REG_SERCOM0_I2CS_LENGTH (0x40003022) </span></div>
<div class="line"><a name="l00056"></a><span class="lineno"> 56</span> <span class="preprocessor">#define REG_SERCOM0_I2CS_ADDR (0x40003024) </span></div>
<div class="line"><a name="l00057"></a><span class="lineno"> 57</span> <span class="preprocessor">#define REG_SERCOM0_I2CS_DATA (0x40003028) </span></div>
<div class="line"><a name="l00058"></a><span class="lineno"> 58</span> <span class="preprocessor">#define REG_SERCOM0_SPI_CTRLA (0x40003000) </span></div>
<div class="line"><a name="l00059"></a><span class="lineno"> 59</span> <span class="preprocessor">#define REG_SERCOM0_SPI_CTRLB (0x40003004) </span></div>
<div class="line"><a name="l00060"></a><span class="lineno"> 60</span> <span class="preprocessor">#define REG_SERCOM0_SPI_CTRLC (0x40003008) </span></div>
<div class="line"><a name="l00061"></a><span class="lineno"> 61</span> <span class="preprocessor">#define REG_SERCOM0_SPI_BAUD (0x4000300C) </span></div>
<div class="line"><a name="l00062"></a><span class="lineno"> 62</span> <span class="preprocessor">#define REG_SERCOM0_SPI_INTENCLR (0x40003014) </span></div>
<div class="line"><a name="l00063"></a><span class="lineno"> 63</span> <span class="preprocessor">#define REG_SERCOM0_SPI_INTENSET (0x40003016) </span></div>
<div class="line"><a name="l00064"></a><span class="lineno"> 64</span> <span class="preprocessor">#define REG_SERCOM0_SPI_INTFLAG (0x40003018) </span></div>
<div class="line"><a name="l00065"></a><span class="lineno"> 65</span> <span class="preprocessor">#define REG_SERCOM0_SPI_STATUS (0x4000301A) </span></div>
<div class="line"><a name="l00066"></a><span class="lineno"> 66</span> <span class="preprocessor">#define REG_SERCOM0_SPI_SYNCBUSY (0x4000301C) </span></div>
<div class="line"><a name="l00067"></a><span class="lineno"> 67</span> <span class="preprocessor">#define REG_SERCOM0_SPI_LENGTH (0x40003022) </span></div>
<div class="line"><a name="l00068"></a><span class="lineno"> 68</span> <span class="preprocessor">#define REG_SERCOM0_SPI_ADDR (0x40003024) </span></div>
<div class="line"><a name="l00069"></a><span class="lineno"> 69</span> <span class="preprocessor">#define REG_SERCOM0_SPI_DATA (0x40003028) </span></div>
<div class="line"><a name="l00070"></a><span class="lineno"> 70</span> <span class="preprocessor">#define REG_SERCOM0_SPI_DBGCTRL (0x40003030) </span></div>
<div class="line"><a name="l00071"></a><span class="lineno"> 71</span> <span class="preprocessor">#define REG_SERCOM0_USART_CTRLA (0x40003000) </span></div>
<div class="line"><a name="l00072"></a><span class="lineno"> 72</span> <span class="preprocessor">#define REG_SERCOM0_USART_CTRLB (0x40003004) </span></div>
<div class="line"><a name="l00073"></a><span class="lineno"> 73</span> <span class="preprocessor">#define REG_SERCOM0_USART_CTRLC (0x40003008) </span></div>
<div class="line"><a name="l00074"></a><span class="lineno"> 74</span> <span class="preprocessor">#define REG_SERCOM0_USART_BAUD (0x4000300C) </span></div>
<div class="line"><a name="l00075"></a><span class="lineno"> 75</span> <span class="preprocessor">#define REG_SERCOM0_USART_RXPL (0x4000300E) </span></div>
<div class="line"><a name="l00076"></a><span class="lineno"> 76</span> <span class="preprocessor">#define REG_SERCOM0_USART_INTENCLR (0x40003014) </span></div>
<div class="line"><a name="l00077"></a><span class="lineno"> 77</span> <span class="preprocessor">#define REG_SERCOM0_USART_INTENSET (0x40003016) </span></div>
<div class="line"><a name="l00078"></a><span class="lineno"> 78</span> <span class="preprocessor">#define REG_SERCOM0_USART_INTFLAG (0x40003018) </span></div>
<div class="line"><a name="l00079"></a><span class="lineno"> 79</span> <span class="preprocessor">#define REG_SERCOM0_USART_STATUS (0x4000301A) </span></div>
<div class="line"><a name="l00080"></a><span class="lineno"> 80</span> <span class="preprocessor">#define REG_SERCOM0_USART_SYNCBUSY (0x4000301C) </span></div>
<div class="line"><a name="l00081"></a><span class="lineno"> 81</span> <span class="preprocessor">#define REG_SERCOM0_USART_RXERRCNT (0x40003020) </span></div>
<div class="line"><a name="l00082"></a><span class="lineno"> 82</span> <span class="preprocessor">#define REG_SERCOM0_USART_LENGTH (0x40003022) </span></div>
<div class="line"><a name="l00083"></a><span class="lineno"> 83</span> <span class="preprocessor">#define REG_SERCOM0_USART_DATA (0x40003028) </span></div>
<div class="line"><a name="l00084"></a><span class="lineno"> 84</span> <span class="preprocessor">#define REG_SERCOM0_USART_DBGCTRL (0x40003030) </span></div>
<div class="line"><a name="l00085"></a><span class="lineno"> 85</span> <span class="preprocessor">#else</span></div>
<div class="line"><a name="l00086"></a><span class="lineno"><a class="line" href="sercom0_8h.html#ad4b291b9277b5c9ea5c77701a623a6b5"> 86</a></span> <span class="preprocessor">#define REG_SERCOM0_I2CM_CTRLA (*(RwReg *)0x40003000UL) </span></div>
<div class="line"><a name="l00087"></a><span class="lineno"><a class="line" href="sercom0_8h.html#afeaa7c456d8525839deb406557a38869"> 87</a></span> <span class="preprocessor">#define REG_SERCOM0_I2CM_CTRLB (*(RwReg *)0x40003004UL) </span></div>
<div class="line"><a name="l00088"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a364cf14dab67e650cb086902ebd2922a"> 88</a></span> <span class="preprocessor">#define REG_SERCOM0_I2CM_CTRLC (*(RwReg *)0x40003008UL) </span></div>
<div class="line"><a name="l00089"></a><span class="lineno"><a class="line" href="sercom0_8h.html#aabe802c56a36ee200bf5e507ae557d3d"> 89</a></span> <span class="preprocessor">#define REG_SERCOM0_I2CM_BAUD (*(RwReg *)0x4000300CUL) </span></div>
<div class="line"><a name="l00090"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a4a6420da8fb423e9ada305607a4b3d67"> 90</a></span> <span class="preprocessor">#define REG_SERCOM0_I2CM_INTENCLR (*(RwReg8 *)0x40003014UL) </span></div>
<div class="line"><a name="l00091"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a8a3699b38b46d9ceee8aa8cf047c154d"> 91</a></span> <span class="preprocessor">#define REG_SERCOM0_I2CM_INTENSET (*(RwReg8 *)0x40003016UL) </span></div>
<div class="line"><a name="l00092"></a><span class="lineno"><a class="line" href="sercom0_8h.html#aed271d62542f606284df63ba17a19653"> 92</a></span> <span class="preprocessor">#define REG_SERCOM0_I2CM_INTFLAG (*(RwReg8 *)0x40003018UL) </span></div>
<div class="line"><a name="l00093"></a><span class="lineno"><a class="line" href="sercom0_8h.html#ad53bf6068cd3862c31b5452c8048bf32"> 93</a></span> <span class="preprocessor">#define REG_SERCOM0_I2CM_STATUS (*(RwReg16*)0x4000301AUL) </span></div>
<div class="line"><a name="l00094"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a89819d5a3ca6fabe8ec8d603b541f3f7"> 94</a></span> <span class="preprocessor">#define REG_SERCOM0_I2CM_SYNCBUSY (*(RoReg *)0x4000301CUL) </span></div>
<div class="line"><a name="l00095"></a><span class="lineno"><a class="line" href="sercom0_8h.html#ad4b538c07cd9afc7290c52dbe0d8838a"> 95</a></span> <span class="preprocessor">#define REG_SERCOM0_I2CM_ADDR (*(RwReg *)0x40003024UL) </span></div>
<div class="line"><a name="l00096"></a><span class="lineno"><a class="line" href="sercom0_8h.html#afbdef519ca8b5dad1aabad1f34114545"> 96</a></span> <span class="preprocessor">#define REG_SERCOM0_I2CM_DATA (*(RwReg *)0x40003028UL) </span></div>
<div class="line"><a name="l00097"></a><span class="lineno"><a class="line" href="sercom0_8h.html#ae4c47984edcb9ca7b8cedfc192d693c1"> 97</a></span> <span class="preprocessor">#define REG_SERCOM0_I2CM_DBGCTRL (*(RwReg8 *)0x40003030UL) </span></div>
<div class="line"><a name="l00098"></a><span class="lineno"><a class="line" href="sercom0_8h.html#aaa1cd4825d7e9f61223bf3fba6410b6d"> 98</a></span> <span class="preprocessor">#define REG_SERCOM0_I2CS_CTRLA (*(RwReg *)0x40003000UL) </span></div>
<div class="line"><a name="l00099"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a068302ea3dffbdecacc8f50f2d485dc0"> 99</a></span> <span class="preprocessor">#define REG_SERCOM0_I2CS_CTRLB (*(RwReg *)0x40003004UL) </span></div>
<div class="line"><a name="l00100"></a><span class="lineno"><a class="line" href="sercom0_8h.html#af116a0c3ac230afa10a15799fc3782f1"> 100</a></span> <span class="preprocessor">#define REG_SERCOM0_I2CS_CTRLC (*(RwReg *)0x40003008UL) </span></div>
<div class="line"><a name="l00101"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a2d7c77381b32df9784869f0692b79374"> 101</a></span> <span class="preprocessor">#define REG_SERCOM0_I2CS_INTENCLR (*(RwReg8 *)0x40003014UL) </span></div>
<div class="line"><a name="l00102"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a41ba952e44b276ad1fa9eabbe4537b7c"> 102</a></span> <span class="preprocessor">#define REG_SERCOM0_I2CS_INTENSET (*(RwReg8 *)0x40003016UL) </span></div>
<div class="line"><a name="l00103"></a><span class="lineno"><a class="line" href="sercom0_8h.html#ad808c665c2f1d940e07613c384278b5b"> 103</a></span> <span class="preprocessor">#define REG_SERCOM0_I2CS_INTFLAG (*(RwReg8 *)0x40003018UL) </span></div>
<div class="line"><a name="l00104"></a><span class="lineno"><a class="line" href="sercom0_8h.html#aa59fe9f46d29c1bc3234c0dbccaacb85"> 104</a></span> <span class="preprocessor">#define REG_SERCOM0_I2CS_STATUS (*(RwReg16*)0x4000301AUL) </span></div>
<div class="line"><a name="l00105"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a37f49740d3e544a90ff5c3d284c6e9a7"> 105</a></span> <span class="preprocessor">#define REG_SERCOM0_I2CS_SYNCBUSY (*(RoReg *)0x4000301CUL) </span></div>
<div class="line"><a name="l00106"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a2d13537b37a02e051ff3e31bf8115d87"> 106</a></span> <span class="preprocessor">#define REG_SERCOM0_I2CS_LENGTH (*(RwReg16*)0x40003022UL) </span></div>
<div class="line"><a name="l00107"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a954a3808bf65119b3f7944a69a85121b"> 107</a></span> <span class="preprocessor">#define REG_SERCOM0_I2CS_ADDR (*(RwReg *)0x40003024UL) </span></div>
<div class="line"><a name="l00108"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a2eb577465c1f3197c528e1228210f5c4"> 108</a></span> <span class="preprocessor">#define REG_SERCOM0_I2CS_DATA (*(RwReg *)0x40003028UL) </span></div>
<div class="line"><a name="l00109"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a611b0e64c4841c95dbfe30ead56687b7"> 109</a></span> <span class="preprocessor">#define REG_SERCOM0_SPI_CTRLA (*(RwReg *)0x40003000UL) </span></div>
<div class="line"><a name="l00110"></a><span class="lineno"><a class="line" href="sercom0_8h.html#adb85a4cea9c13620e77145edf1f76bbf"> 110</a></span> <span class="preprocessor">#define REG_SERCOM0_SPI_CTRLB (*(RwReg *)0x40003004UL) </span></div>
<div class="line"><a name="l00111"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a350c1d81e98806a39716e6e38096c014"> 111</a></span> <span class="preprocessor">#define REG_SERCOM0_SPI_CTRLC (*(RwReg *)0x40003008UL) </span></div>
<div class="line"><a name="l00112"></a><span class="lineno"><a class="line" href="sercom0_8h.html#ad8be8e1f5afb52f404121c5962a57167"> 112</a></span> <span class="preprocessor">#define REG_SERCOM0_SPI_BAUD (*(RwReg8 *)0x4000300CUL) </span></div>
<div class="line"><a name="l00113"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a03cb35b2070c40442eef73597c2768e6"> 113</a></span> <span class="preprocessor">#define REG_SERCOM0_SPI_INTENCLR (*(RwReg8 *)0x40003014UL) </span></div>
<div class="line"><a name="l00114"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a47365e88c4312db68754823a4637f520"> 114</a></span> <span class="preprocessor">#define REG_SERCOM0_SPI_INTENSET (*(RwReg8 *)0x40003016UL) </span></div>
<div class="line"><a name="l00115"></a><span class="lineno"><a class="line" href="sercom0_8h.html#ab82e08af9f9471becf48bff27e5f5004"> 115</a></span> <span class="preprocessor">#define REG_SERCOM0_SPI_INTFLAG (*(RwReg8 *)0x40003018UL) </span></div>
<div class="line"><a name="l00116"></a><span class="lineno"><a class="line" href="sercom0_8h.html#ad53d9d865862d4ffc424f0a5946c552c"> 116</a></span> <span class="preprocessor">#define REG_SERCOM0_SPI_STATUS (*(RwReg16*)0x4000301AUL) </span></div>
<div class="line"><a name="l00117"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a8d93a02b0c4d28dc08c6bdba63a52d0b"> 117</a></span> <span class="preprocessor">#define REG_SERCOM0_SPI_SYNCBUSY (*(RoReg *)0x4000301CUL) </span></div>
<div class="line"><a name="l00118"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a1946252112eb2b053f9ddc2b60404c98"> 118</a></span> <span class="preprocessor">#define REG_SERCOM0_SPI_LENGTH (*(RwReg16*)0x40003022UL) </span></div>
<div class="line"><a name="l00119"></a><span class="lineno"><a class="line" href="sercom0_8h.html#adaa828a0e1ae130ac97f384545a2de10"> 119</a></span> <span class="preprocessor">#define REG_SERCOM0_SPI_ADDR (*(RwReg *)0x40003024UL) </span></div>
<div class="line"><a name="l00120"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a925046e3fc54e1c40453d2b111f33ccb"> 120</a></span> <span class="preprocessor">#define REG_SERCOM0_SPI_DATA (*(RwReg *)0x40003028UL) </span></div>
<div class="line"><a name="l00121"></a><span class="lineno"><a class="line" href="sercom0_8h.html#aab6f8a404a9629192d8ce167b6f00941"> 121</a></span> <span class="preprocessor">#define REG_SERCOM0_SPI_DBGCTRL (*(RwReg8 *)0x40003030UL) </span></div>
<div class="line"><a name="l00122"></a><span class="lineno"><a class="line" href="sercom0_8h.html#ab0cd4a33a08c5e9771bf891c1b5670f3"> 122</a></span> <span class="preprocessor">#define REG_SERCOM0_USART_CTRLA (*(RwReg *)0x40003000UL) </span></div>
<div class="line"><a name="l00123"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a04b6ce11e4ed4b1a60f67d04431565a9"> 123</a></span> <span class="preprocessor">#define REG_SERCOM0_USART_CTRLB (*(RwReg *)0x40003004UL) </span></div>
<div class="line"><a name="l00124"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a48dafec85fab04635f8325f738f42d71"> 124</a></span> <span class="preprocessor">#define REG_SERCOM0_USART_CTRLC (*(RwReg *)0x40003008UL) </span></div>
<div class="line"><a name="l00125"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a5a4f3901ad67d099f2e75dcc010be132"> 125</a></span> <span class="preprocessor">#define REG_SERCOM0_USART_BAUD (*(RwReg16*)0x4000300CUL) </span></div>
<div class="line"><a name="l00126"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a2814e7df2e883da6643f55af730a24c3"> 126</a></span> <span class="preprocessor">#define REG_SERCOM0_USART_RXPL (*(RwReg8 *)0x4000300EUL) </span></div>
<div class="line"><a name="l00127"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a5213dedbc00d79c4d52a996d01cbf588"> 127</a></span> <span class="preprocessor">#define REG_SERCOM0_USART_INTENCLR (*(RwReg8 *)0x40003014UL) </span></div>
<div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a5048732f2b797803f1f79b0b657b7fa1"> 128</a></span> <span class="preprocessor">#define REG_SERCOM0_USART_INTENSET (*(RwReg8 *)0x40003016UL) </span></div>
<div class="line"><a name="l00129"></a><span class="lineno"><a class="line" href="sercom0_8h.html#ab5ae69febae1d7c1f9923f6803ee7090"> 129</a></span> <span class="preprocessor">#define REG_SERCOM0_USART_INTFLAG (*(RwReg8 *)0x40003018UL) </span></div>
<div class="line"><a name="l00130"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a9551ce1bb3b05df226d1cdac9c0b0e3d"> 130</a></span> <span class="preprocessor">#define REG_SERCOM0_USART_STATUS (*(RwReg16*)0x4000301AUL) </span></div>
<div class="line"><a name="l00131"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a61a9f25c2423d94b3c1d5352d7c16078"> 131</a></span> <span class="preprocessor">#define REG_SERCOM0_USART_SYNCBUSY (*(RoReg *)0x4000301CUL) </span></div>
<div class="line"><a name="l00132"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a390991d6f293f04d8346bf2a81a61889"> 132</a></span> <span class="preprocessor">#define REG_SERCOM0_USART_RXERRCNT (*(RoReg8 *)0x40003020UL) </span></div>
<div class="line"><a name="l00133"></a><span class="lineno"><a class="line" href="sercom0_8h.html#afb98bd6c51aa314bd7dce3e742619160"> 133</a></span> <span class="preprocessor">#define REG_SERCOM0_USART_LENGTH (*(RwReg16*)0x40003022UL) </span></div>
<div class="line"><a name="l00134"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a33dc7ce14fc276a6517eec4415337bfe"> 134</a></span> <span class="preprocessor">#define REG_SERCOM0_USART_DATA (*(RwReg *)0x40003028UL) </span></div>
<div class="line"><a name="l00135"></a><span class="lineno"><a class="line" href="sercom0_8h.html#a9ab3e7ff1ab77f452ccf225d7a42075c"> 135</a></span> <span class="preprocessor">#define REG_SERCOM0_USART_DBGCTRL (*(RwReg8 *)0x40003030UL) </span></div>
<div class="line"><a name="l00136"></a><span class="lineno"> 136</span> <span class="preprocessor">#endif </span><span class="comment">/* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00137"></a><span class="lineno"> 137</span>  </div>
<div class="line"><a name="l00138"></a><span class="lineno"> 138</span> <span class="comment">/* ========== Instance parameters for SERCOM0 peripheral ========== */</span></div>
<div class="line"><a name="l00139"></a><span class="lineno"> 139</span> <span class="preprocessor">#define SERCOM0_CLK_REDUCTION 1 // Reduce clock options to pin 1 for SPI and USART</span></div>
<div class="line"><a name="l00140"></a><span class="lineno"> 140</span> <span class="preprocessor">#define SERCOM0_DLY_COMPENSATION 1 // Compensates for a fast DLY50 element. Assuming 20ns</span></div>
<div class="line"><a name="l00141"></a><span class="lineno"> 141</span> <span class="preprocessor">#define SERCOM0_DMA 1 // DMA support implemented?</span></div>
<div class="line"><a name="l00142"></a><span class="lineno"> 142</span> <span class="preprocessor">#define SERCOM0_DMAC_ID_RX 4 // Index of DMA RX trigger</span></div>
<div class="line"><a name="l00143"></a><span class="lineno"> 143</span> <span class="preprocessor">#define SERCOM0_DMAC_ID_TX 5 // Index of DMA TX trigger</span></div>
<div class="line"><a name="l00144"></a><span class="lineno"> 144</span> <span class="preprocessor">#define SERCOM0_FIFO_DEPTH_POWER 1 // 2^FIFO_DEPTH_POWER gives rx FIFO depth.</span></div>
<div class="line"><a name="l00145"></a><span class="lineno"> 145</span> <span class="preprocessor">#define SERCOM0_GCLK_ID_CORE 7 </span></div>
<div class="line"><a name="l00146"></a><span class="lineno"> 146</span> <span class="preprocessor">#define SERCOM0_GCLK_ID_SLOW 3 </span></div>
<div class="line"><a name="l00147"></a><span class="lineno"> 147</span> <span class="preprocessor">#define SERCOM0_INT_MSB 6 </span></div>
<div class="line"><a name="l00148"></a><span class="lineno"> 148</span> <span class="preprocessor">#define SERCOM0_I2CM 1 // I2C Master mode implemented?</span></div>
<div class="line"><a name="l00149"></a><span class="lineno"> 149</span> <span class="preprocessor">#define SERCOM0_I2CS 1 // I2C Slave mode implemented?</span></div>
<div class="line"><a name="l00150"></a><span class="lineno"> 150</span> <span class="preprocessor">#define SERCOM0_I2CS_AUTO_ACK 1 // I2C slave automatic acknowledge implemented?</span></div>
<div class="line"><a name="l00151"></a><span class="lineno"> 151</span> <span class="preprocessor">#define SERCOM0_I2CS_GROUP_CMD 1 // I2C slave group command implemented?</span></div>
<div class="line"><a name="l00152"></a><span class="lineno"> 152</span> <span class="preprocessor">#define SERCOM0_I2CS_SDASETUP_CNT_SIZE 8 // I2CS sda setup count size</span></div>
<div class="line"><a name="l00153"></a><span class="lineno"> 153</span> <span class="preprocessor">#define SERCOM0_I2CS_SDASETUP_SIZE 4 // I2CS sda setup size</span></div>
<div class="line"><a name="l00154"></a><span class="lineno"> 154</span> <span class="preprocessor">#define SERCOM0_I2CS_SUDAT 1 // I2C slave SDA setup implemented?</span></div>
<div class="line"><a name="l00155"></a><span class="lineno"> 155</span> <span class="preprocessor">#define SERCOM0_I2C_FASTMP 1 // I2C fast mode plus implemented?</span></div>
<div class="line"><a name="l00156"></a><span class="lineno"> 156</span> <span class="preprocessor">#define SERCOM0_I2C_HSMODE 1 // USART mode implemented?</span></div>
<div class="line"><a name="l00157"></a><span class="lineno"> 157</span> <span class="preprocessor">#define SERCOM0_I2C_SCLSM_MODE 1 // I2C SCL clock stretch mode implemented?</span></div>
<div class="line"><a name="l00158"></a><span class="lineno"> 158</span> <span class="preprocessor">#define SERCOM0_I2C_SMB_TIMEOUTS 1 // I2C SMBus timeouts implemented?</span></div>
<div class="line"><a name="l00159"></a><span class="lineno"> 159</span> <span class="preprocessor">#define SERCOM0_I2C_TENBIT_ADR 1 // I2C ten bit enabled?</span></div>
<div class="line"><a name="l00160"></a><span class="lineno"> 160</span> <span class="preprocessor">#define SERCOM0_PMSB 3 </span></div>
<div class="line"><a name="l00161"></a><span class="lineno"> 161</span> <span class="preprocessor">#define SERCOM0_RETENTION_SUPPORT 0 // Retention supported?</span></div>
<div class="line"><a name="l00162"></a><span class="lineno"> 162</span> <span class="preprocessor">#define SERCOM0_SE_CNT 1 // SE counter included?</span></div>
<div class="line"><a name="l00163"></a><span class="lineno"> 163</span> <span class="preprocessor">#define SERCOM0_SPI 1 // SPI mode implemented?</span></div>
<div class="line"><a name="l00164"></a><span class="lineno"> 164</span> <span class="preprocessor">#define SERCOM0_SPI_HW_SS_CTRL 1 // Master _SS hardware control implemented?</span></div>
<div class="line"><a name="l00165"></a><span class="lineno"> 165</span> <span class="preprocessor">#define SERCOM0_SPI_ICSPACE_EXT 1 // SPI inter character space implemented?</span></div>
<div class="line"><a name="l00166"></a><span class="lineno"> 166</span> <span class="preprocessor">#define SERCOM0_SPI_OZMO 0 // OZMO features implemented?</span></div>
<div class="line"><a name="l00167"></a><span class="lineno"> 167</span> <span class="preprocessor">#define SERCOM0_SPI_WAKE_ON_SSL 1 // _SS low detect implemented?</span></div>
<div class="line"><a name="l00168"></a><span class="lineno"> 168</span> <span class="preprocessor">#define SERCOM0_TTBIT_EXTENSION 1 // 32-bit extension implemented?</span></div>
<div class="line"><a name="l00169"></a><span class="lineno"> 169</span> <span class="preprocessor">#define SERCOM0_USART 1 // USART mode implemented?</span></div>
<div class="line"><a name="l00170"></a><span class="lineno"> 170</span> <span class="preprocessor">#define SERCOM0_USART_AUTOBAUD 1 // USART autobaud implemented?</span></div>
<div class="line"><a name="l00171"></a><span class="lineno"> 171</span> <span class="preprocessor">#define SERCOM0_USART_COLDET 1 // USART collision detection implemented?</span></div>
<div class="line"><a name="l00172"></a><span class="lineno"> 172</span> <span class="preprocessor">#define SERCOM0_USART_FLOW_CTRL 1 // USART flow control implemented?</span></div>
<div class="line"><a name="l00173"></a><span class="lineno"> 173</span> <span class="preprocessor">#define SERCOM0_USART_FRAC_BAUD 1 // USART fractional BAUD implemented?</span></div>
<div class="line"><a name="l00174"></a><span class="lineno"> 174</span> <span class="preprocessor">#define SERCOM0_USART_IRDA 1 // USART IrDA implemented?</span></div>
<div class="line"><a name="l00175"></a><span class="lineno"> 175</span> <span class="preprocessor">#define SERCOM0_USART_ISO7816 1 // USART ISO7816 mode implemented?</span></div>
<div class="line"><a name="l00176"></a><span class="lineno"> 176</span> <span class="preprocessor">#define SERCOM0_USART_LIN_MASTER 1 // USART LIN Master mode implemented?</span></div>
<div class="line"><a name="l00177"></a><span class="lineno"> 177</span> <span class="preprocessor">#define SERCOM0_USART_RS485 1 // USART RS485 mode implemented?</span></div>
<div class="line"><a name="l00178"></a><span class="lineno"> 178</span> <span class="preprocessor">#define SERCOM0_USART_SAMPA_EXT 1 // USART sample adjust implemented?</span></div>
<div class="line"><a name="l00179"></a><span class="lineno"> 179</span> <span class="preprocessor">#define SERCOM0_USART_SAMPR_EXT 1 // USART oversampling adjustment implemented?</span></div>
<div class="line"><a name="l00180"></a><span class="lineno"> 180</span>  </div>
<div class="line"><a name="l00181"></a><span class="lineno"> 181</span> <span class="preprocessor">#endif </span><span class="comment">/* _SAME54_SERCOM0_INSTANCE_ */</span><span class="preprocessor"></span></div>
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