Instance description for SERCOM0. More...

Macros
#define	REG_SERCOM0_I2CM_CTRLA ((RwReg )0x40003000UL)
	(SERCOM0) I2CM Control A

#define	REG_SERCOM0_I2CM_CTRLB ((RwReg )0x40003004UL)
	(SERCOM0) I2CM Control B

#define	REG_SERCOM0_I2CM_CTRLC ((RwReg )0x40003008UL)
	(SERCOM0) I2CM Control C

#define	REG_SERCOM0_I2CM_BAUD ((RwReg )0x4000300CUL)
	(SERCOM0) I2CM Baud Rate

#define	REG_SERCOM0_I2CM_INTENCLR ((RwReg8 )0x40003014UL)
	(SERCOM0) I2CM Interrupt Enable Clear

#define	REG_SERCOM0_I2CM_INTENSET ((RwReg8 )0x40003016UL)
	(SERCOM0) I2CM Interrupt Enable Set

#define	REG_SERCOM0_I2CM_INTFLAG ((RwReg8 )0x40003018UL)
	(SERCOM0) I2CM Interrupt Flag Status and Clear

#define	REG_SERCOM0_I2CM_STATUS ((RwReg16)0x4000301AUL)
	(SERCOM0) I2CM Status

#define	REG_SERCOM0_I2CM_SYNCBUSY ((RoReg )0x4000301CUL)
	(SERCOM0) I2CM Synchronization Busy

#define	REG_SERCOM0_I2CM_ADDR ((RwReg )0x40003024UL)
	(SERCOM0) I2CM Address

#define	REG_SERCOM0_I2CM_DATA ((RwReg )0x40003028UL)
	(SERCOM0) I2CM Data

#define	REG_SERCOM0_I2CM_DBGCTRL ((RwReg8 )0x40003030UL)
	(SERCOM0) I2CM Debug Control

#define	REG_SERCOM0_I2CS_CTRLA ((RwReg )0x40003000UL)
	(SERCOM0) I2CS Control A

#define	REG_SERCOM0_I2CS_CTRLB ((RwReg )0x40003004UL)
	(SERCOM0) I2CS Control B

#define	REG_SERCOM0_I2CS_CTRLC ((RwReg )0x40003008UL)
	(SERCOM0) I2CS Control C

#define	REG_SERCOM0_I2CS_INTENCLR ((RwReg8 )0x40003014UL)
	(SERCOM0) I2CS Interrupt Enable Clear

#define	REG_SERCOM0_I2CS_INTENSET ((RwReg8 )0x40003016UL)
	(SERCOM0) I2CS Interrupt Enable Set

#define	REG_SERCOM0_I2CS_INTFLAG ((RwReg8 )0x40003018UL)
	(SERCOM0) I2CS Interrupt Flag Status and Clear

#define	REG_SERCOM0_I2CS_STATUS ((RwReg16)0x4000301AUL)
	(SERCOM0) I2CS Status

#define	REG_SERCOM0_I2CS_SYNCBUSY ((RoReg )0x4000301CUL)
	(SERCOM0) I2CS Synchronization Busy

#define	REG_SERCOM0_I2CS_LENGTH ((RwReg16)0x40003022UL)
	(SERCOM0) I2CS Length

#define	REG_SERCOM0_I2CS_ADDR ((RwReg )0x40003024UL)
	(SERCOM0) I2CS Address

#define	REG_SERCOM0_I2CS_DATA ((RwReg )0x40003028UL)
	(SERCOM0) I2CS Data

#define	REG_SERCOM0_SPI_CTRLA ((RwReg )0x40003000UL)
	(SERCOM0) SPI Control A

#define	REG_SERCOM0_SPI_CTRLB ((RwReg )0x40003004UL)
	(SERCOM0) SPI Control B

#define	REG_SERCOM0_SPI_CTRLC ((RwReg )0x40003008UL)
	(SERCOM0) SPI Control C

#define	REG_SERCOM0_SPI_BAUD ((RwReg8 )0x4000300CUL)
	(SERCOM0) SPI Baud Rate

#define	REG_SERCOM0_SPI_INTENCLR ((RwReg8 )0x40003014UL)
	(SERCOM0) SPI Interrupt Enable Clear

#define	REG_SERCOM0_SPI_INTENSET ((RwReg8 )0x40003016UL)
	(SERCOM0) SPI Interrupt Enable Set

#define	REG_SERCOM0_SPI_INTFLAG ((RwReg8 )0x40003018UL)
	(SERCOM0) SPI Interrupt Flag Status and Clear

#define	REG_SERCOM0_SPI_STATUS ((RwReg16)0x4000301AUL)
	(SERCOM0) SPI Status

#define	REG_SERCOM0_SPI_SYNCBUSY ((RoReg )0x4000301CUL)
	(SERCOM0) SPI Synchronization Busy

#define	REG_SERCOM0_SPI_LENGTH ((RwReg16)0x40003022UL)
	(SERCOM0) SPI Length

#define	REG_SERCOM0_SPI_ADDR ((RwReg )0x40003024UL)
	(SERCOM0) SPI Address

#define	REG_SERCOM0_SPI_DATA ((RwReg )0x40003028UL)
	(SERCOM0) SPI Data

#define	REG_SERCOM0_SPI_DBGCTRL ((RwReg8 )0x40003030UL)
	(SERCOM0) SPI Debug Control

#define	REG_SERCOM0_USART_CTRLA ((RwReg )0x40003000UL)
	(SERCOM0) USART Control A

#define	REG_SERCOM0_USART_CTRLB ((RwReg )0x40003004UL)
	(SERCOM0) USART Control B

#define	REG_SERCOM0_USART_CTRLC ((RwReg )0x40003008UL)
	(SERCOM0) USART Control C

#define	REG_SERCOM0_USART_BAUD ((RwReg16)0x4000300CUL)
	(SERCOM0) USART Baud Rate

#define	REG_SERCOM0_USART_RXPL ((RwReg8 )0x4000300EUL)
	(SERCOM0) USART Receive Pulse Length

#define	REG_SERCOM0_USART_INTENCLR ((RwReg8 )0x40003014UL)
	(SERCOM0) USART Interrupt Enable Clear

#define	REG_SERCOM0_USART_INTENSET ((RwReg8 )0x40003016UL)
	(SERCOM0) USART Interrupt Enable Set

#define	REG_SERCOM0_USART_INTFLAG ((RwReg8 )0x40003018UL)
	(SERCOM0) USART Interrupt Flag Status and Clear

#define	REG_SERCOM0_USART_STATUS ((RwReg16)0x4000301AUL)
	(SERCOM0) USART Status

#define	REG_SERCOM0_USART_SYNCBUSY ((RoReg )0x4000301CUL)
	(SERCOM0) USART Synchronization Busy

#define	REG_SERCOM0_USART_RXERRCNT ((RoReg8 )0x40003020UL)
	(SERCOM0) USART Receive Error Count

#define	REG_SERCOM0_USART_LENGTH ((RwReg16)0x40003022UL)
	(SERCOM0) USART Length

#define	REG_SERCOM0_USART_DATA ((RwReg )0x40003028UL)
	(SERCOM0) USART Data

#define	REG_SERCOM0_USART_DBGCTRL ((RwReg8 )0x40003030UL)
	(SERCOM0) USART Debug Control

#define	SERCOM0_CLK_REDUCTION 1

#define	SERCOM0_DLY_COMPENSATION 1

#define	SERCOM0_DMA 1

#define	SERCOM0_DMAC_ID_RX 4

#define	SERCOM0_DMAC_ID_TX 5

#define	SERCOM0_FIFO_DEPTH_POWER 1

#define	SERCOM0_GCLK_ID_CORE 7

#define	SERCOM0_GCLK_ID_SLOW 3

#define	SERCOM0_INT_MSB 6

#define	SERCOM0_I2CM 1

#define	SERCOM0_I2CS 1

#define	SERCOM0_I2CS_AUTO_ACK 1

#define	SERCOM0_I2CS_GROUP_CMD 1

#define	SERCOM0_I2CS_SDASETUP_CNT_SIZE 8

#define	SERCOM0_I2CS_SDASETUP_SIZE 4

#define	SERCOM0_I2CS_SUDAT 1

#define	SERCOM0_I2C_FASTMP 1

#define	SERCOM0_I2C_HSMODE 1

#define	SERCOM0_I2C_SCLSM_MODE 1

#define	SERCOM0_I2C_SMB_TIMEOUTS 1

#define	SERCOM0_I2C_TENBIT_ADR 1

#define	SERCOM0_PMSB 3

#define	SERCOM0_RETENTION_SUPPORT 0

#define	SERCOM0_SE_CNT 1

#define	SERCOM0_SPI 1

#define	SERCOM0_SPI_HW_SS_CTRL 1

#define	SERCOM0_SPI_ICSPACE_EXT 1

#define	SERCOM0_SPI_OZMO 0

#define	SERCOM0_SPI_WAKE_ON_SSL 1

#define	SERCOM0_TTBIT_EXTENSION 1

#define	SERCOM0_USART 1

#define	SERCOM0_USART_AUTOBAUD 1

#define	SERCOM0_USART_COLDET 1

#define	SERCOM0_USART_FLOW_CTRL 1

#define	SERCOM0_USART_FRAC_BAUD 1

#define	SERCOM0_USART_IRDA 1

#define	SERCOM0_USART_ISO7816 1

#define	SERCOM0_USART_LIN_MASTER 1

#define	SERCOM0_USART_RS485 1

#define	SERCOM0_USART_SAMPA_EXT 1

#define	SERCOM0_USART_SAMPR_EXT 1

Detailed Description

Instance description for SERCOM0.

\asf_license_start

Definition in file sercom0.h.

Macros

Detailed Description