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3f39d81a81
I am splitting the board into 3 pieces: motherboard, aka brain, power, and aux boards I am doing this so I can test different parts independently because putting down a whole board after a failure isnt viable for me anymore aux board will have an i2c and spi bus, as well as a comms port which is just an xbee port xbee port will consist of a usart port with a few extra io for xbee shenanigans |
3 years ago | |
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doc | 4 years ago | |
gerbers | 3 years ago | |
ARC-Boat0-cache.lib | 4 years ago | |
ARC-Boat0-rescue.dcm | 4 years ago | |
ARC-Boat0-rescue.lib | 4 years ago | |
ARC-Boat0.kicad_pcb | 4 years ago | |
ARC-Boat0.kicad_pcb-bak | 4 years ago | |
ARC-Boat0.pro | 4 years ago | |
ARC-Boat0.sch | 4 years ago | |
ARC-Boat0.sch-bak | 4 years ago | |
ARC-Boat0.step | 4 years ago | |
ARC-Boat0_BOM.csv | 4 years ago | |
ARC-Boat0_BOM.ods | 4 years ago | |
BOM.ods | 4 years ago | |
Brain.sch | 4 years ago | |
Brain.sch-bak | 4 years ago | |
Comms.sch | 4 years ago | |
Comms.sch-bak | 4 years ago | |
Controls.sch | 4 years ago | |
Controls.sch-bak | 4 years ago | |
Power.sch | 4 years ago | |
Power.sch-bak | 4 years ago | |
fp-info-cache | 4 years ago | |
gerbers_final_v1.zip | 4 years ago | |
gerbersv2.zip | 3 years ago | |
sym-lib-table | 4 years ago |