added hw pin mappings for ssd1963
parent
fb837a3018
commit
05e015b1f6
Binary file not shown.
@ -1,3 +1,293 @@
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#include "p_ssd1963.h"
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void p_ssd1963_init(void);
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#define LV_DRV_DELAY_MS(x) delay_ms(x)
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#define LV_DRV_DISP_CMD_DATA(x)
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/**
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* @file SSD1963.c
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*
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*/
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/*********************
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* INCLUDES
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*********************/
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#include "SSD1963.h"
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#if USE_SSD1963
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#include <stdbool.h>
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/*********************
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* DEFINES
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*********************/
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#define SSD1963_CMD_MODE 0
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#define SSD1963_DATA_MODE 1
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/**********************
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* TYPEDEFS
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**********************/
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/**********************
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* STATIC PROTOTYPES
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**********************/
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static inline void ssd1963_cmd_mode(void);
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static inline void ssd1963_data_mode(void);
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static inline void ssd1963_cmd(uint8_t cmd);
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static inline void ssd1963_data(uint8_t data);
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static void ssd1963_io_init(void);
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static void ssd1963_reset(void);
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static void ssd1963_set_clk(void);
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static void ssd1963_set_tft_spec(void);
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static void ssd1963_init_bl(void);
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/**********************
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* STATIC VARIABLES
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**********************/
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static bool cmd_mode = true;
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/**********************
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* MACROS
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**********************/
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/**********************
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* GLOBAL FUNCTIONS
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**********************/
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void ssd1963_init(void)
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{
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LV_DRV_DISP_CMD_DATA(SSD1963_CMD_MODE);
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cmd_mode = true;
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LV_DRV_DELAY_MS(250);
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ssd1963_cmd(0x00E2); //PLL multiplier, set PLL clock to 120M
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ssd1963_data(0x0023); //N=0x36 for 6.5M, 0x23 for 10M crystal
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ssd1963_data(0x0002);
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ssd1963_data(0x0004);
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ssd1963_cmd(0x00E0); // PLL enable
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ssd1963_data(0x0001);
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LV_DRV_DELAY_MS(1);
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ssd1963_cmd(0x00E0);
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ssd1963_data(0x0003); // now, use PLL output as system clock
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LV_DRV_DELAY_MS(1);
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ssd1963_cmd(0x0001); // software reset
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LV_DRV_DELAY_MS(1);
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ssd1963_cmd(0x00E6); //PLL setting for PCLK, depends on resolution
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ssd1963_data(0x0001); //HX8257C
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ssd1963_data(0x0033); //HX8257C
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ssd1963_data(0x0033); //HX8257C
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ssd1963_cmd(0x00B0); //LCD SPECIFICATION
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ssd1963_data(0x0020);
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ssd1963_data(0x0000);
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ssd1963_data(((SSD1963_HOR_RES - 1) >> 8) & 0X00FF); //Set HDP
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ssd1963_data((SSD1963_HOR_RES - 1) & 0X00FF);
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ssd1963_data(((SSD1963_VER_RES - 1) >> 8) & 0X00FF); //Set VDP
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ssd1963_data((SSD1963_VER_RES - 1) & 0X00FF);
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ssd1963_data(0x0000);
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LV_DRV_DELAY_MS(1);//Delay10us(5);
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ssd1963_cmd(0x00B4); //HSYNC
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ssd1963_data((SSD1963_HT >> 8) & 0X00FF); //Set HT
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ssd1963_data(SSD1963_HT & 0X00FF);
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ssd1963_data((SSD1963_HPS >> 8) & 0X00FF); //Set HPS
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ssd1963_data(SSD1963_HPS & 0X00FF);
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ssd1963_data(SSD1963_HPW); //Set HPW
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ssd1963_data((SSD1963_LPS >> 8) & 0X00FF); //SetLPS
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ssd1963_data(SSD1963_LPS & 0X00FF);
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ssd1963_data(0x0000);
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ssd1963_cmd(0x00B6); //VSYNC
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ssd1963_data((SSD1963_VT >> 8) & 0X00FF); //Set VT
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ssd1963_data(SSD1963_VT & 0X00FF);
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ssd1963_data((SSD1963_VPS >> 8) & 0X00FF); //Set VPS
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ssd1963_data(SSD1963_VPS & 0X00FF);
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ssd1963_data(SSD1963_VPW); //Set VPW
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ssd1963_data((SSD1963_FPS >> 8) & 0X00FF); //Set FPS
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ssd1963_data(SSD1963_FPS & 0X00FF);
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ssd1963_cmd(0x00B8);
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ssd1963_data(0x000f); //GPIO is controlled by host GPIO[3:0]=output GPIO[0]=1 LCD ON GPIO[0]=1 LCD OFF
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ssd1963_data(0x0001); //GPIO0 normal
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ssd1963_cmd(0x00BA);
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ssd1963_data(0x0001); //GPIO[0] out 1 --- LCD display on/off control PIN
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ssd1963_cmd(0x0036); //rotation
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ssd1963_data(0x0008); //RGB=BGR
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ssd1963_cmd(0x003A); //Set the current pixel format for RGB image data
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ssd1963_data(0x0050); //16-bit/pixel
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ssd1963_cmd(0x00F0); //Pixel Data Interface Format
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ssd1963_data(0x0003); //16-bit(565 format) data
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ssd1963_cmd(0x00BC);
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ssd1963_data(0x0040); //contrast value
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ssd1963_data(0x0080); //brightness value
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ssd1963_data(0x0040); //saturation value
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ssd1963_data(0x0001); //Post Processor Enable
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LV_DRV_DELAY_MS(1);
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ssd1963_cmd(0x0029); //display on
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ssd1963_cmd(0x00BE); //set PWM for B/L
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ssd1963_data(0x0006);
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ssd1963_data(0x0080);
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ssd1963_data(0x0001);
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ssd1963_data(0x00f0);
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ssd1963_data(0x0000);
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ssd1963_data(0x0000);
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ssd1963_cmd(0x00d0);
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ssd1963_data(0x000d);
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//DisplayBacklightOn();
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LV_DRV_DELAY_MS(30);
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}
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void ssd1963_flush(lv_disp_drv_t * disp_drv, const lv_area_t * area, lv_color_t * color_p)
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{
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/*Return if the area is out the screen*/
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if(area->x2 < 0) return;
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if(area->y2 < 0) return;
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if(area->x1 > SSD1963_HOR_RES - 1) return;
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if(area->y1 > SSD1963_VER_RES - 1) return;
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/*Truncate the area to the screen*/
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int32_t act_x1 = area->x1 < 0 ? 0 : area->x1;
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int32_t act_y1 = area->y1 < 0 ? 0 : area->y1;
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int32_t act_x2 = area->x2 > SSD1963_HOR_RES - 1 ? SSD1963_HOR_RES - 1 : area->x2;
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int32_t act_y2 = area->y2 > SSD1963_VER_RES - 1 ? SSD1963_VER_RES - 1 : area->y2;
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//Set the rectangular area
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ssd1963_cmd(0x002A);
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ssd1963_data(act_x1 >> 8);
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ssd1963_data(0x00FF & act_x1);
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ssd1963_data(act_x2 >> 8);
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ssd1963_data(0x00FF & act_x2);
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ssd1963_cmd(0x002B);
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ssd1963_data(act_y1 >> 8);
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ssd1963_data(0x00FF & act_y1);
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ssd1963_data(act_y2 >> 8);
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ssd1963_data(0x00FF & act_y2);
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ssd1963_cmd(0x2c);
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int16_t i;
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uint16_t full_w = area->x2 - area->x1 + 1;
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ssd1963_data_mode();
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LV_DRV_DISP_PAR_CS(0);
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#if LV_COLOR_DEPTH == 16
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uint16_t act_w = act_x2 - act_x1 + 1;
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for(i = act_y1; i <= act_y2; i++) {
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LV_DRV_DISP_PAR_WR_ARRAY((uint16_t *)color_p, act_w);
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color_p += full_w;
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}
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LV_DRV_DISP_PAR_CS(1);
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#else
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int16_t j;
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for(i = act_y1; i <= act_y2; i++) {
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for(j = 0; j <= act_x2 - act_x1 + 1; j++) {
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LV_DRV_DISP_PAR_WR_WORD(color_p[j]);
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color_p += full_w;
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}
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}
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#endif
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lv_disp_flush_ready(disp_drv);
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}
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/**********************
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* STATIC FUNCTIONS
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**********************/
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static void ssd1963_io_init(void)
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{
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LV_DRV_DISP_CMD_DATA(SSD1963_CMD_MODE);
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cmd_mode = true;
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}
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static void ssd1963_reset(void)
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{
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/*Hardware reset*/
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LV_DRV_DISP_RST(1);
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LV_DRV_DELAY_MS(50);
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LV_DRV_DISP_RST(0);
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LV_DRV_DELAY_MS(50);
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LV_DRV_DISP_RST(1);
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LV_DRV_DELAY_MS(50);
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/*Chip enable*/
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LV_DRV_DISP_PAR_CS(0);
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LV_DRV_DELAY_MS(10);
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LV_DRV_DISP_PAR_CS(1);
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LV_DRV_DELAY_MS(5);
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/*Software reset*/
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ssd1963_cmd(0x01);
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LV_DRV_DELAY_MS(20);
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ssd1963_cmd(0x01);
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LV_DRV_DELAY_MS(20);
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ssd1963_cmd(0x01);
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LV_DRV_DELAY_MS(20);
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}
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/**
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* Command mode
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*/
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static inline void ssd1963_cmd_mode(void)
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{
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if(cmd_mode == false) {
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LV_DRV_DISP_CMD_DATA(SSD1963_CMD_MODE);
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cmd_mode = true;
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}
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}
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/**
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* Data mode
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*/
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static inline void ssd1963_data_mode(void)
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{
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if(cmd_mode != false) {
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LV_DRV_DISP_CMD_DATA(SSD1963_DATA_MODE);
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cmd_mode = false;
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}
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}
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/**
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* Write command
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* @param cmd the command
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*/
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static inline void ssd1963_cmd(uint8_t cmd)
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{
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LV_DRV_DISP_PAR_CS(0);
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ssd1963_cmd_mode();
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LV_DRV_DISP_PAR_WR_WORD(cmd);
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LV_DRV_DISP_PAR_CS(1);
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}
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/**
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* Write data
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* @param data the data
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*/
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static inline void ssd1963_data(uint8_t data)
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{
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LV_DRV_DISP_PAR_CS(0);
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ssd1963_data_mode();
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LV_DRV_DISP_PAR_WR_WORD(data);
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LV_DRV_DISP_PAR_CS(1);
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}
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#endif
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@ -1,7 +1,140 @@
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#ifndef _P_SSD1963_H_
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#define _P_SSD1963_H_
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/**
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* @file SSD1963.h
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*
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* Source: https://github.com/lvgl/lv_drivers/tree/master/display
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*/
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#ifndef SSD1963_H
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#define SSD1963_H
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void p_ssd1963_init(void);
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#ifdef __cplusplus
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extern "C" {
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#endif
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#endif
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#if USE_SSD1963
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#ifdef LV_LVGL_H_INCLUDE_SIMPLE
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#include "lvgl.h"
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#else
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#include "lvgl/lvgl.h"
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#endif
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/*********************
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* DEFINES
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*********************/
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// SSD1963 command table
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#define CMD_NOP 0x00 //No operation
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#define CMD_SOFT_RESET 0x01 //Software reset
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#define CMD_GET_PWR_MODE 0x0A //Get the current power mode
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#define CMD_GET_ADDR_MODE 0x0B //Get the frame memory to the display panel read order
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#define CMD_GET_PIXEL_FORMAT 0x0C //Get the current pixel format
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#define CMD_GET_DISPLAY_MODE 0x0D //Returns the display mode
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#define CMD_GET_SIGNAL_MODE 0x0E //
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#define CMD_GET_DIAGNOSTIC 0x0F
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#define CMD_ENT_SLEEP 0x10
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#define CMD_EXIT_SLEEP 0x11
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#define CMD_ENT_PARTIAL_MODE 0x12
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#define CMD_ENT_NORMAL_MODE 0x13
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#define CMD_EXIT_INVERT_MODE 0x20
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#define CMD_ENT_INVERT_MODE 0x21
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#define CMD_SET_GAMMA 0x26
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#define CMD_BLANK_DISPLAY 0x28
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#define CMD_ON_DISPLAY 0x29
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#define CMD_SET_COLUMN 0x2A
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#define CMD_SET_PAGE 0x2B
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#define CMD_WR_MEMSTART 0x2C
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#define CMD_RD_MEMSTART 0x2E
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#define CMD_SET_PARTIAL_AREA 0x30
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#define CMD_SET_SCROLL_AREA 0x33
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#define CMD_SET_TEAR_OFF 0x34 //synchronization information is not sent from the display
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#define CMD_SET_TEAR_ON 0x35 //sync. information is sent from the display
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#define CMD_SET_ADDR_MODE 0x36 //set fram buffer read order to the display panel
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#define CMD_SET_SCROLL_START 0x37
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#define CMD_EXIT_IDLE_MODE 0x38
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#define CMD_ENT_IDLE_MODE 0x39
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#define CMD_SET_PIXEL_FORMAT 0x3A //defines how many bits per pixel is used
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#define CMD_WR_MEM_AUTO 0x3C
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#define CMD_RD_MEM_AUTO 0x3E
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#define CMD_SET_TEAR_SCANLINE 0x44
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#define CMD_GET_SCANLINE 0x45
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#define CMD_RD_DDB_START 0xA1
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#define CMD_RD_DDB_AUTO 0xA8
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#define CMD_SET_PANEL_MODE 0xB0
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#define CMD_GET_PANEL_MODE 0xB1
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#define CMD_SET_HOR_PERIOD 0xB4
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#define CMD_GET_HOR_PERIOD 0xB5
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#define CMD_SET_VER_PERIOD 0xB6
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#define CMD_GET_VER_PERIOD 0xB7
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#define CMD_SET_GPIO_CONF 0xB8
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#define CMD_GET_GPIO_CONF 0xB9
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#define CMD_SET_GPIO_VAL 0xBA
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#define CMD_GET_GPIO_STATUS 0xBB
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#define CMD_SET_POST_PROC 0xBC
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#define CMD_GET_POST_PROC 0xBD
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#define CMD_SET_PWM_CONF 0xBE
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#define CMD_GET_PWM_CONF 0xBF
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#define CMD_SET_LCD_GEN0 0xC0
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#define CMD_GET_LCD_GEN0 0xC1
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#define CMD_SET_LCD_GEN1 0xC2
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#define CMD_GET_LCD_GEN1 0xC3
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#define CMD_SET_LCD_GEN2 0xC4
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#define CMD_GET_LCD_GEN2 0xC5
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#define CMD_SET_LCD_GEN3 0xC6
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#define CMD_GET_LCD_GEN3 0xC7
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#define CMD_SET_GPIO0_ROP 0xC8
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#define CMD_GET_GPIO0_ROP 0xC9
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#define CMD_SET_GPIO1_ROP 0xCA
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#define CMD_GET_GPIO1_ROP 0xCB
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#define CMD_SET_GPIO2_ROP 0xCC
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#define CMD_GET_GPIO2_ROP 0xCD
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#define CMD_SET_GPIO3_ROP 0xCE
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#define CMD_GET_GPIO3_ROP 0xCF
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#define CMD_SET_ABC_DBC_CONF 0xD0
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#define CMD_GET_ABC_DBC_CONF 0xD1
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#define CMD_SET_DBC_HISTO_PTR 0xD2
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#define CMD_GET_DBC_HISTO_PTR 0xD3
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#define CMD_SET_DBC_THRES 0xD4
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#define CMD_GET_DBC_THRES 0xD5
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#define CMD_SET_ABM_TMR 0xD6
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#define CMD_GET_ABM_TMR 0xD7
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#define CMD_SET_AMB_LVL0 0xD8
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#define CMD_GET_AMB_LVL0 0xD9
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#define CMD_SET_AMB_LVL1 0xDA
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#define CMD_GET_AMB_LVL1 0xDB
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#define CMD_SET_AMB_LVL2 0xDC
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#define CMD_GET_AMB_LVL2 0xDD
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#define CMD_SET_AMB_LVL3 0xDE
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#define CMD_GET_AMB_LVL3 0xDF
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#define CMD_PLL_START 0xE0 //start the PLL
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#define CMD_PLL_STOP 0xE1 //disable the PLL
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#define CMD_SET_PLL_MN 0xE2
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#define CMD_GET_PLL_MN 0xE3
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#define CMD_GET_PLL_STATUS 0xE4 //get the current PLL status
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#define CMD_ENT_DEEP_SLEEP 0xE5
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#define CMD_SET_PCLK 0xE6 //set pixel clock (LSHIFT signal) frequency
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#define CMD_GET_PCLK 0xE7 //get pixel clock (LSHIFT signal) freq. settings
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#define CMD_SET_DATA_INTERFACE 0xF0
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#define CMD_GET_DATA_INTERFACE 0xF1
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/**********************
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* TYPEDEFS
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**********************/
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/**********************
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* GLOBAL PROTOTYPES
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**********************/
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void ssd1963_init(void);
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void ssd1963_flush(lv_disp_drv_t * disp_drv, const lv_area_t * area, lv_color_t * color_p);
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/**********************
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* MACROS
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**********************/
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#endif /* USE_SSD1963 */
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#ifdef __cplusplus
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} /* extern "C" */
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#endif
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#endif /* SSD1963_H */
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@ -1,8 +1,16 @@
|
||||
#include "p_gpio.h"
|
||||
|
||||
void p_gpio_init(void)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* Example of using EXTERNAL_IRQ_0
|
||||
*/
|
||||
void EXTERNAL_IRQ_0_example(void)
|
||||
void p_gpio_parallel_write(PortGroup* group, uint32_t mask, uint32_t data)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
void p_gpio_parallel_write_arr(PortGroup* group, uint32_t mask, uint32_t* data, uint32_t len)
|
||||
{
|
||||
|
||||
}
|
||||
Reference in New Issue