added hw pin mappings for ssd1963
parent
fb837a3018
commit
05e015b1f6
Binary file not shown.
@ -1,3 +1,293 @@
|
||||
#include "p_ssd1963.h"
|
||||
|
||||
void p_ssd1963_init(void);
|
||||
#define LV_DRV_DELAY_MS(x) delay_ms(x)
|
||||
#define LV_DRV_DISP_CMD_DATA(x)
|
||||
/**
|
||||
* @file SSD1963.c
|
||||
*
|
||||
*/
|
||||
|
||||
/*********************
|
||||
* INCLUDES
|
||||
*********************/
|
||||
#include "SSD1963.h"
|
||||
#if USE_SSD1963
|
||||
|
||||
#include <stdbool.h>
|
||||
/*********************
|
||||
* DEFINES
|
||||
*********************/
|
||||
#define SSD1963_CMD_MODE 0
|
||||
#define SSD1963_DATA_MODE 1
|
||||
|
||||
/**********************
|
||||
* TYPEDEFS
|
||||
**********************/
|
||||
|
||||
/**********************
|
||||
* STATIC PROTOTYPES
|
||||
**********************/
|
||||
static inline void ssd1963_cmd_mode(void);
|
||||
static inline void ssd1963_data_mode(void);
|
||||
static inline void ssd1963_cmd(uint8_t cmd);
|
||||
static inline void ssd1963_data(uint8_t data);
|
||||
static void ssd1963_io_init(void);
|
||||
static void ssd1963_reset(void);
|
||||
static void ssd1963_set_clk(void);
|
||||
static void ssd1963_set_tft_spec(void);
|
||||
static void ssd1963_init_bl(void);
|
||||
|
||||
/**********************
|
||||
* STATIC VARIABLES
|
||||
**********************/
|
||||
static bool cmd_mode = true;
|
||||
|
||||
/**********************
|
||||
* MACROS
|
||||
**********************/
|
||||
|
||||
/**********************
|
||||
* GLOBAL FUNCTIONS
|
||||
**********************/
|
||||
|
||||
void ssd1963_init(void)
|
||||
{
|
||||
|
||||
LV_DRV_DISP_CMD_DATA(SSD1963_CMD_MODE);
|
||||
cmd_mode = true;
|
||||
|
||||
LV_DRV_DELAY_MS(250);
|
||||
|
||||
|
||||
ssd1963_cmd(0x00E2); //PLL multiplier, set PLL clock to 120M
|
||||
ssd1963_data(0x0023); //N=0x36 for 6.5M, 0x23 for 10M crystal
|
||||
ssd1963_data(0x0002);
|
||||
ssd1963_data(0x0004);
|
||||
ssd1963_cmd(0x00E0); // PLL enable
|
||||
ssd1963_data(0x0001);
|
||||
LV_DRV_DELAY_MS(1);
|
||||
ssd1963_cmd(0x00E0);
|
||||
ssd1963_data(0x0003); // now, use PLL output as system clock
|
||||
LV_DRV_DELAY_MS(1);
|
||||
ssd1963_cmd(0x0001); // software reset
|
||||
LV_DRV_DELAY_MS(1);
|
||||
ssd1963_cmd(0x00E6); //PLL setting for PCLK, depends on resolution
|
||||
|
||||
ssd1963_data(0x0001); //HX8257C
|
||||
ssd1963_data(0x0033); //HX8257C
|
||||
ssd1963_data(0x0033); //HX8257C
|
||||
|
||||
|
||||
ssd1963_cmd(0x00B0); //LCD SPECIFICATION
|
||||
ssd1963_data(0x0020);
|
||||
ssd1963_data(0x0000);
|
||||
ssd1963_data(((SSD1963_HOR_RES - 1) >> 8) & 0X00FF); //Set HDP
|
||||
ssd1963_data((SSD1963_HOR_RES - 1) & 0X00FF);
|
||||
ssd1963_data(((SSD1963_VER_RES - 1) >> 8) & 0X00FF); //Set VDP
|
||||
ssd1963_data((SSD1963_VER_RES - 1) & 0X00FF);
|
||||
ssd1963_data(0x0000);
|
||||
LV_DRV_DELAY_MS(1);//Delay10us(5);
|
||||
ssd1963_cmd(0x00B4); //HSYNC
|
||||
ssd1963_data((SSD1963_HT >> 8) & 0X00FF); //Set HT
|
||||
ssd1963_data(SSD1963_HT & 0X00FF);
|
||||
ssd1963_data((SSD1963_HPS >> 8) & 0X00FF); //Set HPS
|
||||
ssd1963_data(SSD1963_HPS & 0X00FF);
|
||||
ssd1963_data(SSD1963_HPW); //Set HPW
|
||||
ssd1963_data((SSD1963_LPS >> 8) & 0X00FF); //SetLPS
|
||||
ssd1963_data(SSD1963_LPS & 0X00FF);
|
||||
ssd1963_data(0x0000);
|
||||
|
||||
ssd1963_cmd(0x00B6); //VSYNC
|
||||
ssd1963_data((SSD1963_VT >> 8) & 0X00FF); //Set VT
|
||||
ssd1963_data(SSD1963_VT & 0X00FF);
|
||||
ssd1963_data((SSD1963_VPS >> 8) & 0X00FF); //Set VPS
|
||||
ssd1963_data(SSD1963_VPS & 0X00FF);
|
||||
ssd1963_data(SSD1963_VPW); //Set VPW
|
||||
ssd1963_data((SSD1963_FPS >> 8) & 0X00FF); //Set FPS
|
||||
ssd1963_data(SSD1963_FPS & 0X00FF);
|
||||
|
||||
ssd1963_cmd(0x00B8);
|
||||
ssd1963_data(0x000f); //GPIO is controlled by host GPIO[3:0]=output GPIO[0]=1 LCD ON GPIO[0]=1 LCD OFF
|
||||
ssd1963_data(0x0001); //GPIO0 normal
|
||||
|
||||
ssd1963_cmd(0x00BA);
|
||||
ssd1963_data(0x0001); //GPIO[0] out 1 --- LCD display on/off control PIN
|
||||
|
||||
ssd1963_cmd(0x0036); //rotation
|
||||
ssd1963_data(0x0008); //RGB=BGR
|
||||
|
||||
ssd1963_cmd(0x003A); //Set the current pixel format for RGB image data
|
||||
ssd1963_data(0x0050); //16-bit/pixel
|
||||
|
||||
ssd1963_cmd(0x00F0); //Pixel Data Interface Format
|
||||
ssd1963_data(0x0003); //16-bit(565 format) data
|
||||
|
||||
ssd1963_cmd(0x00BC);
|
||||
ssd1963_data(0x0040); //contrast value
|
||||
ssd1963_data(0x0080); //brightness value
|
||||
ssd1963_data(0x0040); //saturation value
|
||||
ssd1963_data(0x0001); //Post Processor Enable
|
||||
|
||||
LV_DRV_DELAY_MS(1);
|
||||
|
||||
ssd1963_cmd(0x0029); //display on
|
||||
|
||||
ssd1963_cmd(0x00BE); //set PWM for B/L
|
||||
ssd1963_data(0x0006);
|
||||
ssd1963_data(0x0080);
|
||||
ssd1963_data(0x0001);
|
||||
ssd1963_data(0x00f0);
|
||||
ssd1963_data(0x0000);
|
||||
ssd1963_data(0x0000);
|
||||
|
||||
ssd1963_cmd(0x00d0);
|
||||
ssd1963_data(0x000d);
|
||||
|
||||
//DisplayBacklightOn();
|
||||
|
||||
LV_DRV_DELAY_MS(30);
|
||||
}
|
||||
|
||||
void ssd1963_flush(lv_disp_drv_t * disp_drv, const lv_area_t * area, lv_color_t * color_p)
|
||||
{
|
||||
|
||||
/*Return if the area is out the screen*/
|
||||
if(area->x2 < 0) return;
|
||||
if(area->y2 < 0) return;
|
||||
if(area->x1 > SSD1963_HOR_RES - 1) return;
|
||||
if(area->y1 > SSD1963_VER_RES - 1) return;
|
||||
|
||||
/*Truncate the area to the screen*/
|
||||
int32_t act_x1 = area->x1 < 0 ? 0 : area->x1;
|
||||
int32_t act_y1 = area->y1 < 0 ? 0 : area->y1;
|
||||
int32_t act_x2 = area->x2 > SSD1963_HOR_RES - 1 ? SSD1963_HOR_RES - 1 : area->x2;
|
||||
int32_t act_y2 = area->y2 > SSD1963_VER_RES - 1 ? SSD1963_VER_RES - 1 : area->y2;
|
||||
|
||||
//Set the rectangular area
|
||||
ssd1963_cmd(0x002A);
|
||||
ssd1963_data(act_x1 >> 8);
|
||||
ssd1963_data(0x00FF & act_x1);
|
||||
ssd1963_data(act_x2 >> 8);
|
||||
ssd1963_data(0x00FF & act_x2);
|
||||
|
||||
ssd1963_cmd(0x002B);
|
||||
ssd1963_data(act_y1 >> 8);
|
||||
ssd1963_data(0x00FF & act_y1);
|
||||
ssd1963_data(act_y2 >> 8);
|
||||
ssd1963_data(0x00FF & act_y2);
|
||||
|
||||
ssd1963_cmd(0x2c);
|
||||
int16_t i;
|
||||
uint16_t full_w = area->x2 - area->x1 + 1;
|
||||
|
||||
ssd1963_data_mode();
|
||||
LV_DRV_DISP_PAR_CS(0);
|
||||
#if LV_COLOR_DEPTH == 16
|
||||
uint16_t act_w = act_x2 - act_x1 + 1;
|
||||
for(i = act_y1; i <= act_y2; i++) {
|
||||
LV_DRV_DISP_PAR_WR_ARRAY((uint16_t *)color_p, act_w);
|
||||
color_p += full_w;
|
||||
}
|
||||
LV_DRV_DISP_PAR_CS(1);
|
||||
#else
|
||||
int16_t j;
|
||||
for(i = act_y1; i <= act_y2; i++) {
|
||||
for(j = 0; j <= act_x2 - act_x1 + 1; j++) {
|
||||
LV_DRV_DISP_PAR_WR_WORD(color_p[j]);
|
||||
color_p += full_w;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
lv_disp_flush_ready(disp_drv);
|
||||
}
|
||||
|
||||
/**********************
|
||||
* STATIC FUNCTIONS
|
||||
**********************/
|
||||
|
||||
static void ssd1963_io_init(void)
|
||||
{
|
||||
LV_DRV_DISP_CMD_DATA(SSD1963_CMD_MODE);
|
||||
cmd_mode = true;
|
||||
}
|
||||
|
||||
static void ssd1963_reset(void)
|
||||
{
|
||||
/*Hardware reset*/
|
||||
LV_DRV_DISP_RST(1);
|
||||
LV_DRV_DELAY_MS(50);
|
||||
LV_DRV_DISP_RST(0);
|
||||
LV_DRV_DELAY_MS(50);
|
||||
LV_DRV_DISP_RST(1);
|
||||
LV_DRV_DELAY_MS(50);
|
||||
|
||||
/*Chip enable*/
|
||||
LV_DRV_DISP_PAR_CS(0);
|
||||
LV_DRV_DELAY_MS(10);
|
||||
LV_DRV_DISP_PAR_CS(1);
|
||||
LV_DRV_DELAY_MS(5);
|
||||
|
||||
/*Software reset*/
|
||||
ssd1963_cmd(0x01);
|
||||
LV_DRV_DELAY_MS(20);
|
||||
|
||||
ssd1963_cmd(0x01);
|
||||
LV_DRV_DELAY_MS(20);
|
||||
|
||||
ssd1963_cmd(0x01);
|
||||
LV_DRV_DELAY_MS(20);
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* Command mode
|
||||
*/
|
||||
static inline void ssd1963_cmd_mode(void)
|
||||
{
|
||||
if(cmd_mode == false) {
|
||||
LV_DRV_DISP_CMD_DATA(SSD1963_CMD_MODE);
|
||||
cmd_mode = true;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Data mode
|
||||
*/
|
||||
static inline void ssd1963_data_mode(void)
|
||||
{
|
||||
if(cmd_mode != false) {
|
||||
LV_DRV_DISP_CMD_DATA(SSD1963_DATA_MODE);
|
||||
cmd_mode = false;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Write command
|
||||
* @param cmd the command
|
||||
*/
|
||||
static inline void ssd1963_cmd(uint8_t cmd)
|
||||
{
|
||||
|
||||
LV_DRV_DISP_PAR_CS(0);
|
||||
ssd1963_cmd_mode();
|
||||
LV_DRV_DISP_PAR_WR_WORD(cmd);
|
||||
LV_DRV_DISP_PAR_CS(1);
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* Write data
|
||||
* @param data the data
|
||||
*/
|
||||
static inline void ssd1963_data(uint8_t data)
|
||||
{
|
||||
|
||||
LV_DRV_DISP_PAR_CS(0);
|
||||
ssd1963_data_mode();
|
||||
LV_DRV_DISP_PAR_WR_WORD(data);
|
||||
LV_DRV_DISP_PAR_CS(1);
|
||||
|
||||
}
|
||||
|
||||
#endif
|
||||
@ -1,7 +1,140 @@
|
||||
#ifndef _P_SSD1963_H_
|
||||
#define _P_SSD1963_H_
|
||||
/**
|
||||
* @file SSD1963.h
|
||||
*
|
||||
* Source: https://github.com/lvgl/lv_drivers/tree/master/display
|
||||
*/
|
||||
|
||||
#ifndef SSD1963_H
|
||||
#define SSD1963_H
|
||||
|
||||
void p_ssd1963_init(void);
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if USE_SSD1963
|
||||
|
||||
#ifdef LV_LVGL_H_INCLUDE_SIMPLE
|
||||
#include "lvgl.h"
|
||||
#else
|
||||
#include "lvgl/lvgl.h"
|
||||
#endif
|
||||
|
||||
/*********************
|
||||
* DEFINES
|
||||
*********************/
|
||||
// SSD1963 command table
|
||||
#define CMD_NOP 0x00 //No operation
|
||||
#define CMD_SOFT_RESET 0x01 //Software reset
|
||||
#define CMD_GET_PWR_MODE 0x0A //Get the current power mode
|
||||
#define CMD_GET_ADDR_MODE 0x0B //Get the frame memory to the display panel read order
|
||||
#define CMD_GET_PIXEL_FORMAT 0x0C //Get the current pixel format
|
||||
#define CMD_GET_DISPLAY_MODE 0x0D //Returns the display mode
|
||||
#define CMD_GET_SIGNAL_MODE 0x0E //
|
||||
#define CMD_GET_DIAGNOSTIC 0x0F
|
||||
#define CMD_ENT_SLEEP 0x10
|
||||
#define CMD_EXIT_SLEEP 0x11
|
||||
#define CMD_ENT_PARTIAL_MODE 0x12
|
||||
#define CMD_ENT_NORMAL_MODE 0x13
|
||||
#define CMD_EXIT_INVERT_MODE 0x20
|
||||
#define CMD_ENT_INVERT_MODE 0x21
|
||||
#define CMD_SET_GAMMA 0x26
|
||||
#define CMD_BLANK_DISPLAY 0x28
|
||||
#define CMD_ON_DISPLAY 0x29
|
||||
#define CMD_SET_COLUMN 0x2A
|
||||
#define CMD_SET_PAGE 0x2B
|
||||
#define CMD_WR_MEMSTART 0x2C
|
||||
#define CMD_RD_MEMSTART 0x2E
|
||||
#define CMD_SET_PARTIAL_AREA 0x30
|
||||
#define CMD_SET_SCROLL_AREA 0x33
|
||||
#define CMD_SET_TEAR_OFF 0x34 //synchronization information is not sent from the display
|
||||
#define CMD_SET_TEAR_ON 0x35 //sync. information is sent from the display
|
||||
#define CMD_SET_ADDR_MODE 0x36 //set fram buffer read order to the display panel
|
||||
#define CMD_SET_SCROLL_START 0x37
|
||||
#define CMD_EXIT_IDLE_MODE 0x38
|
||||
#define CMD_ENT_IDLE_MODE 0x39
|
||||
#define CMD_SET_PIXEL_FORMAT 0x3A //defines how many bits per pixel is used
|
||||
#define CMD_WR_MEM_AUTO 0x3C
|
||||
#define CMD_RD_MEM_AUTO 0x3E
|
||||
#define CMD_SET_TEAR_SCANLINE 0x44
|
||||
#define CMD_GET_SCANLINE 0x45
|
||||
#define CMD_RD_DDB_START 0xA1
|
||||
#define CMD_RD_DDB_AUTO 0xA8
|
||||
#define CMD_SET_PANEL_MODE 0xB0
|
||||
#define CMD_GET_PANEL_MODE 0xB1
|
||||
#define CMD_SET_HOR_PERIOD 0xB4
|
||||
#define CMD_GET_HOR_PERIOD 0xB5
|
||||
#define CMD_SET_VER_PERIOD 0xB6
|
||||
#define CMD_GET_VER_PERIOD 0xB7
|
||||
#define CMD_SET_GPIO_CONF 0xB8
|
||||
#define CMD_GET_GPIO_CONF 0xB9
|
||||
#define CMD_SET_GPIO_VAL 0xBA
|
||||
#define CMD_GET_GPIO_STATUS 0xBB
|
||||
#define CMD_SET_POST_PROC 0xBC
|
||||
#define CMD_GET_POST_PROC 0xBD
|
||||
#define CMD_SET_PWM_CONF 0xBE
|
||||
#define CMD_GET_PWM_CONF 0xBF
|
||||
#define CMD_SET_LCD_GEN0 0xC0
|
||||
#define CMD_GET_LCD_GEN0 0xC1
|
||||
#define CMD_SET_LCD_GEN1 0xC2
|
||||
#define CMD_GET_LCD_GEN1 0xC3
|
||||
#define CMD_SET_LCD_GEN2 0xC4
|
||||
#define CMD_GET_LCD_GEN2 0xC5
|
||||
#define CMD_SET_LCD_GEN3 0xC6
|
||||
#define CMD_GET_LCD_GEN3 0xC7
|
||||
#define CMD_SET_GPIO0_ROP 0xC8
|
||||
#define CMD_GET_GPIO0_ROP 0xC9
|
||||
#define CMD_SET_GPIO1_ROP 0xCA
|
||||
#define CMD_GET_GPIO1_ROP 0xCB
|
||||
#define CMD_SET_GPIO2_ROP 0xCC
|
||||
#define CMD_GET_GPIO2_ROP 0xCD
|
||||
#define CMD_SET_GPIO3_ROP 0xCE
|
||||
#define CMD_GET_GPIO3_ROP 0xCF
|
||||
#define CMD_SET_ABC_DBC_CONF 0xD0
|
||||
#define CMD_GET_ABC_DBC_CONF 0xD1
|
||||
#define CMD_SET_DBC_HISTO_PTR 0xD2
|
||||
#define CMD_GET_DBC_HISTO_PTR 0xD3
|
||||
#define CMD_SET_DBC_THRES 0xD4
|
||||
#define CMD_GET_DBC_THRES 0xD5
|
||||
#define CMD_SET_ABM_TMR 0xD6
|
||||
#define CMD_GET_ABM_TMR 0xD7
|
||||
#define CMD_SET_AMB_LVL0 0xD8
|
||||
#define CMD_GET_AMB_LVL0 0xD9
|
||||
#define CMD_SET_AMB_LVL1 0xDA
|
||||
#define CMD_GET_AMB_LVL1 0xDB
|
||||
#define CMD_SET_AMB_LVL2 0xDC
|
||||
#define CMD_GET_AMB_LVL2 0xDD
|
||||
#define CMD_SET_AMB_LVL3 0xDE
|
||||
#define CMD_GET_AMB_LVL3 0xDF
|
||||
#define CMD_PLL_START 0xE0 //start the PLL
|
||||
#define CMD_PLL_STOP 0xE1 //disable the PLL
|
||||
#define CMD_SET_PLL_MN 0xE2
|
||||
#define CMD_GET_PLL_MN 0xE3
|
||||
#define CMD_GET_PLL_STATUS 0xE4 //get the current PLL status
|
||||
#define CMD_ENT_DEEP_SLEEP 0xE5
|
||||
#define CMD_SET_PCLK 0xE6 //set pixel clock (LSHIFT signal) frequency
|
||||
#define CMD_GET_PCLK 0xE7 //get pixel clock (LSHIFT signal) freq. settings
|
||||
#define CMD_SET_DATA_INTERFACE 0xF0
|
||||
#define CMD_GET_DATA_INTERFACE 0xF1
|
||||
|
||||
|
||||
/**********************
|
||||
* TYPEDEFS
|
||||
**********************/
|
||||
|
||||
/**********************
|
||||
* GLOBAL PROTOTYPES
|
||||
**********************/
|
||||
void ssd1963_init(void);
|
||||
void ssd1963_flush(lv_disp_drv_t * disp_drv, const lv_area_t * area, lv_color_t * color_p);
|
||||
|
||||
/**********************
|
||||
* MACROS
|
||||
**********************/
|
||||
|
||||
#endif /* USE_SSD1963 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* extern "C" */
|
||||
#endif
|
||||
|
||||
#endif /* SSD1963_H */
|
||||
@ -1,8 +1,16 @@
|
||||
#include "p_gpio.h"
|
||||
|
||||
void p_gpio_init(void)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
void p_gpio_parallel_write(PortGroup* group, uint32_t mask, uint32_t data)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* Example of using EXTERNAL_IRQ_0
|
||||
*/
|
||||
void EXTERNAL_IRQ_0_example(void)
|
||||
void p_gpio_parallel_write_arr(PortGroup* group, uint32_t mask, uint32_t* data, uint32_t len)
|
||||
{
|
||||
|
||||
}
|
||||
Reference in New Issue