updating
penguin
4 years ago
parent
66011ce043
commit
ffb1ff5dba
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,58 +1,58 @@
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################################################################################
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# Automatically-generated file. Do not edit or delete the file
|
||||
################################################################################
|
||||
|
||||
src\ASF\sam0\drivers\adc\adc_sam_d_r_h\adc.c
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|
||||
src\ASF\sam0\drivers\adc\adc_sam_d_r_h\adc_callback.c
|
||||
|
||||
src\ASF\sam0\drivers\extint\extint_sam_d_r_h\extint.c
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||||
|
||||
src\ASF\sam0\drivers\sercom\sercom.c
|
||||
|
||||
src\devices\motor.c
|
||||
|
||||
src\drivers\p_adc.c
|
||||
|
||||
src\ASF\sam0\drivers\tcc\tcc.c
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||||
|
||||
src\ASF\sam0\drivers\tcc\tcc_callback.c
|
||||
|
||||
src\drivers\p_io.c
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||||
|
||||
src\drivers\p_usart.c
|
||||
|
||||
src\ASF\sam0\drivers\sercom\usart\usart.c
|
||||
|
||||
src\ASF\sam0\drivers\sercom\usart\usart_interrupt.c
|
||||
|
||||
src\ASF\sam0\drivers\sercom\sercom_interrupt.c
|
||||
|
||||
src\ASF\sam0\drivers\extint\extint_callback.c
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||||
|
||||
src\ASF\common2\services\delay\sam0\systick_counter.c
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||||
|
||||
src\ASF\common\utils\interrupt\interrupt_sam_nvic.c
|
||||
|
||||
src\ASF\sam0\boards\samd21_xplained_pro\board_init.c
|
||||
|
||||
src\ASF\sam0\drivers\port\port.c
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||||
|
||||
src\ASF\sam0\drivers\system\clock\clock_samd21_r21_da_ha1\clock.c
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||||
|
||||
src\ASF\sam0\drivers\system\clock\clock_samd21_r21_da_ha1\gclk.c
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||||
|
||||
src\ASF\sam0\drivers\system\interrupt\system_interrupt.c
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||||
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src\ASF\sam0\drivers\system\pinmux\pinmux.c
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||||
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||||
src\ASF\sam0\drivers\system\system.c
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||||
|
||||
src\ASF\sam0\utils\cmsis\samd21\source\gcc\startup_samd21.c
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||||
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src\ASF\sam0\utils\cmsis\samd21\source\system_samd21.c
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||||
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src\ASF\sam0\utils\syscalls\gcc\syscalls.c
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||||
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src\main.c
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################################################################################
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# Automatically-generated file. Do not edit or delete the file
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################################################################################
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src\ASF\sam0\drivers\adc\adc_sam_d_r_h\adc.c
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src\ASF\sam0\drivers\adc\adc_sam_d_r_h\adc_callback.c
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||||
|
||||
src\ASF\sam0\drivers\extint\extint_sam_d_r_h\extint.c
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||||
|
||||
src\ASF\sam0\drivers\sercom\sercom.c
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||||
|
||||
src\devices\motor.c
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||||
|
||||
src\drivers\p_adc.c
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||||
|
||||
src\ASF\sam0\drivers\tcc\tcc.c
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||||
|
||||
src\ASF\sam0\drivers\tcc\tcc_callback.c
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||||
|
||||
src\drivers\p_io.c
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||||
|
||||
src\drivers\p_usart.c
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||||
|
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src\ASF\sam0\drivers\sercom\usart\usart.c
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||||
|
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src\ASF\sam0\drivers\sercom\usart\usart_interrupt.c
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||||
|
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src\ASF\sam0\drivers\sercom\sercom_interrupt.c
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||||
|
||||
src\ASF\sam0\drivers\extint\extint_callback.c
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||||
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src\ASF\common2\services\delay\sam0\systick_counter.c
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||||
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src\ASF\common\utils\interrupt\interrupt_sam_nvic.c
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||||
|
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src\ASF\sam0\boards\samd21_xplained_pro\board_init.c
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||||
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||||
src\ASF\sam0\drivers\port\port.c
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||||
|
||||
src\ASF\sam0\drivers\system\clock\clock_samd21_r21_da_ha1\clock.c
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||||
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src\ASF\sam0\drivers\system\clock\clock_samd21_r21_da_ha1\gclk.c
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|
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src\ASF\sam0\drivers\system\interrupt\system_interrupt.c
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||||
|
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src\ASF\sam0\drivers\system\pinmux\pinmux.c
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||||
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||||
src\ASF\sam0\drivers\system\system.c
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||||
|
||||
src\ASF\sam0\utils\cmsis\samd21\source\gcc\startup_samd21.c
|
||||
|
||||
src\ASF\sam0\utils\cmsis\samd21\source\system_samd21.c
|
||||
|
||||
src\ASF\sam0\utils\syscalls\gcc\syscalls.c
|
||||
|
||||
src\main.c
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||||
|
||||
|
||||
@ -1,499 +1,499 @@
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################################################################################
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||||
# Automatically-generated file. Do not edit!
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||||
################################################################################
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||||
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||||
SHELL := cmd.exe
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RM := rm -rf
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||||
USER_OBJS :=
|
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|
||||
LIBS :=
|
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PROJ :=
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||||
|
||||
O_SRCS :=
|
||||
C_SRCS :=
|
||||
S_SRCS :=
|
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S_UPPER_SRCS :=
|
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OBJ_SRCS :=
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ASM_SRCS :=
|
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PREPROCESSING_SRCS :=
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OBJS :=
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OBJS_AS_ARGS :=
|
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C_DEPS :=
|
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C_DEPS_AS_ARGS :=
|
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EXECUTABLES :=
|
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OUTPUT_FILE_PATH :=
|
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OUTPUT_FILE_PATH_AS_ARGS :=
|
||||
AVR_APP_PATH :=$$$AVR_APP_PATH$$$
|
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QUOTE := "
|
||||
ADDITIONAL_DEPENDENCIES:=
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OUTPUT_FILE_DEP:=
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LIB_DEP:=
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LINKER_SCRIPT_DEP:=
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# Every subdirectory with source files must be described here
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SUBDIRS := \
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../src/ \
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../src/ASF/ \
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../src/ASF/common2/ \
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../src/ASF/common2/services/ \
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||||
../src/ASF/common2/services/delay/ \
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||||
../src/ASF/common2/services/delay/sam0/ \
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||||
../src/ASF/common/ \
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||||
../src/ASF/common/boards/ \
|
||||
../src/ASF/common/utils/ \
|
||||
../src/ASF/common/utils/interrupt/ \
|
||||
../src/ASF/sam0/ \
|
||||
../src/ASF/sam0/boards/ \
|
||||
../src/ASF/sam0/boards/samd21_xplained_pro/ \
|
||||
../src/ASF/sam0/drivers/ \
|
||||
../src/ASF/sam0/drivers/adc/ \
|
||||
../src/ASF/sam0/drivers/adc/adc_sam_d_r_h/ \
|
||||
../src/ASF/sam0/drivers/extint/ \
|
||||
../src/ASF/sam0/drivers/extint/extint_sam_d_r_h/ \
|
||||
../src/ASF/sam0/drivers/port/ \
|
||||
../src/ASF/sam0/drivers/port/quick_start/ \
|
||||
../src/ASF/sam0/drivers/sercom/ \
|
||||
../src/ASF/sam0/drivers/sercom/usart/ \
|
||||
../src/ASF/sam0/drivers/sercom/usart/quick_start/ \
|
||||
../src/ASF/sam0/drivers/sercom/usart/quick_start_callback/ \
|
||||
../src/ASF/sam0/drivers/sercom/usart/quick_start_dma/ \
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||||
../src/ASF/sam0/drivers/sercom/usart/quick_start_lin/ \
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||||
../src/ASF/sam0/drivers/system/ \
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||||
../src/ASF/sam0/drivers/system/clock/ \
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||||
../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/ \
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||||
../src/ASF/sam0/drivers/system/interrupt/ \
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../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21/ \
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../src/ASF/sam0/drivers/system/pinmux/ \
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../src/ASF/sam0/drivers/system/pinmux/quick_start/ \
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../src/ASF/sam0/drivers/system/power/ \
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../src/ASF/sam0/drivers/system/power/power_sam_d_r_h/ \
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||||
../src/ASF/sam0/drivers/system/reset/ \
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||||
../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h/ \
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||||
../src/ASF/sam0/drivers/tcc/ \
|
||||
../src/ASF/sam0/drivers/tcc/quick_start/ \
|
||||
../src/ASF/sam0/drivers/tcc/quick_start_buffering/ \
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||||
../src/ASF/sam0/drivers/tcc/quick_start_callback/ \
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||||
../src/ASF/sam0/drivers/tcc/quick_start_dma/ \
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||||
../src/ASF/sam0/drivers/tcc/quick_start_faultn/ \
|
||||
../src/ASF/sam0/drivers/tcc/quick_start_faultx/ \
|
||||
../src/ASF/sam0/drivers/tcc/quick_start_timer/ \
|
||||
../src/ASF/sam0/utils/ \
|
||||
../src/ASF/sam0/utils/cmsis/ \
|
||||
../src/ASF/sam0/utils/cmsis/samd21/ \
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||||
../src/ASF/sam0/utils/cmsis/samd21/include/ \
|
||||
../src/ASF/sam0/utils/cmsis/samd21/include/component/ \
|
||||
../src/ASF/sam0/utils/cmsis/samd21/include/instance/ \
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||||
../src/ASF/sam0/utils/cmsis/samd21/include/pio/ \
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||||
../src/ASF/sam0/utils/cmsis/samd21/source/ \
|
||||
../src/ASF/sam0/utils/cmsis/samd21/source/gcc/ \
|
||||
../src/ASF/sam0/utils/header_files/ \
|
||||
../src/ASF/sam0/utils/linker_scripts/ \
|
||||
../src/ASF/sam0/utils/linker_scripts/samd21/ \
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||||
../src/ASF/sam0/utils/linker_scripts/samd21/gcc/ \
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||||
../src/ASF/sam0/utils/make/ \
|
||||
../src/ASF/sam0/utils/preprocessor/ \
|
||||
../src/ASF/sam0/utils/syscalls/ \
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||||
../src/ASF/sam0/utils/syscalls/gcc/ \
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||||
../src/ASF/thirdparty/ \
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||||
../src/ASF/thirdparty/CMSIS/ \
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||||
../src/ASF/thirdparty/CMSIS/Include/ \
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||||
../src/ASF/thirdparty/CMSIS/Lib/ \
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||||
../src/ASF/thirdparty/CMSIS/Lib/GCC/ \
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||||
../src/config/ \
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||||
../src/drivers \
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||||
../src/devices
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||||
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||||
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||||
# Add inputs and outputs from these tool invocations to the build variables
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||||
C_SRCS += \
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../src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc.c \
|
||||
../src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc_callback.c \
|
||||
../src/ASF/sam0/drivers/extint/extint_sam_d_r_h/extint.c \
|
||||
../src/ASF/sam0/drivers/sercom/sercom.c \
|
||||
../src/drivers/p_adc.c \
|
||||
../src/ASF/sam0/drivers/tcc/tcc.c \
|
||||
../src/ASF/sam0/drivers/tcc/tcc_callback.c \
|
||||
../src/drivers/p_io.c \
|
||||
../src/drivers/p_usart.c \
|
||||
../src/ASF/sam0/drivers/sercom/usart/usart.c \
|
||||
../src/ASF/sam0/drivers/sercom/usart/usart_interrupt.c \
|
||||
../src/ASF/sam0/drivers/sercom/sercom_interrupt.c \
|
||||
../src/ASF/sam0/drivers/extint/extint_callback.c \
|
||||
../src/ASF/common2/services/delay/sam0/systick_counter.c \
|
||||
../src/ASF/common/utils/interrupt/interrupt_sam_nvic.c \
|
||||
../src/ASF/sam0/boards/samd21_xplained_pro/board_init.c \
|
||||
../src/ASF/sam0/drivers/port/port.c \
|
||||
../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock.c \
|
||||
../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/gclk.c \
|
||||
../src/ASF/sam0/drivers/system/interrupt/system_interrupt.c \
|
||||
../src/ASF/sam0/drivers/system/pinmux/pinmux.c \
|
||||
../src/ASF/sam0/drivers/system/system.c \
|
||||
../src/ASF/sam0/utils/cmsis/samd21/source/gcc/startup_samd21.c \
|
||||
../src/ASF/sam0/utils/cmsis/samd21/source/system_samd21.c \
|
||||
../src/ASF/sam0/utils/syscalls/gcc/syscalls.c \
|
||||
../src/main.c
|
||||
|
||||
|
||||
PREPROCESSING_SRCS +=
|
||||
|
||||
|
||||
ASM_SRCS +=
|
||||
|
||||
|
||||
OBJS += \
|
||||
src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc.o \
|
||||
src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc_callback.o \
|
||||
src/ASF/sam0/drivers/extint/extint_sam_d_r_h/extint.o \
|
||||
src/ASF/sam0/drivers/sercom/sercom.o \
|
||||
src/drivers/p_adc.o \
|
||||
src/ASF/sam0/drivers/tcc/tcc.o \
|
||||
src/ASF/sam0/drivers/tcc/tcc_callback.o \
|
||||
src/drivers/p_io.o \
|
||||
src/drivers/p_usart.o \
|
||||
src/ASF/sam0/drivers/sercom/usart/usart.o \
|
||||
src/ASF/sam0/drivers/sercom/usart/usart_interrupt.o \
|
||||
src/ASF/sam0/drivers/sercom/sercom_interrupt.o \
|
||||
src/ASF/sam0/drivers/extint/extint_callback.o \
|
||||
src/ASF/common2/services/delay/sam0/systick_counter.o \
|
||||
src/ASF/common/utils/interrupt/interrupt_sam_nvic.o \
|
||||
src/ASF/sam0/boards/samd21_xplained_pro/board_init.o \
|
||||
src/ASF/sam0/drivers/port/port.o \
|
||||
src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock.o \
|
||||
src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/gclk.o \
|
||||
src/ASF/sam0/drivers/system/interrupt/system_interrupt.o \
|
||||
src/ASF/sam0/drivers/system/pinmux/pinmux.o \
|
||||
src/ASF/sam0/drivers/system/system.o \
|
||||
src/ASF/sam0/utils/cmsis/samd21/source/gcc/startup_samd21.o \
|
||||
src/ASF/sam0/utils/cmsis/samd21/source/system_samd21.o \
|
||||
src/ASF/sam0/utils/syscalls/gcc/syscalls.o \
|
||||
src/main.o
|
||||
|
||||
OBJS_AS_ARGS += \
|
||||
src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc.o \
|
||||
src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc_callback.o \
|
||||
src/ASF/sam0/drivers/extint/extint_sam_d_r_h/extint.o \
|
||||
src/ASF/sam0/drivers/sercom/sercom.o \
|
||||
src/drivers/p_adc.o \
|
||||
src/ASF/sam0/drivers/tcc/tcc.o \
|
||||
src/ASF/sam0/drivers/tcc/tcc_callback.o \
|
||||
src/drivers/p_io.o \
|
||||
src/drivers/p_usart.o \
|
||||
src/ASF/sam0/drivers/sercom/usart/usart.o \
|
||||
src/ASF/sam0/drivers/sercom/usart/usart_interrupt.o \
|
||||
src/ASF/sam0/drivers/sercom/sercom_interrupt.o \
|
||||
src/ASF/sam0/drivers/extint/extint_callback.o \
|
||||
src/ASF/common2/services/delay/sam0/systick_counter.o \
|
||||
src/ASF/common/utils/interrupt/interrupt_sam_nvic.o \
|
||||
src/ASF/sam0/boards/samd21_xplained_pro/board_init.o \
|
||||
src/ASF/sam0/drivers/port/port.o \
|
||||
src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock.o \
|
||||
src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/gclk.o \
|
||||
src/ASF/sam0/drivers/system/interrupt/system_interrupt.o \
|
||||
src/ASF/sam0/drivers/system/pinmux/pinmux.o \
|
||||
src/ASF/sam0/drivers/system/system.o \
|
||||
src/ASF/sam0/utils/cmsis/samd21/source/gcc/startup_samd21.o \
|
||||
src/ASF/sam0/utils/cmsis/samd21/source/system_samd21.o \
|
||||
src/ASF/sam0/utils/syscalls/gcc/syscalls.o \
|
||||
src/main.o
|
||||
|
||||
C_DEPS += \
|
||||
src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc.d \
|
||||
src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc_callback.d \
|
||||
src/ASF/sam0/drivers/extint/extint_sam_d_r_h/extint.d \
|
||||
src/ASF/sam0/drivers/sercom/sercom.d \
|
||||
src/drivers/p_adc.d \
|
||||
src/ASF/sam0/drivers/tcc/tcc.d \
|
||||
src/ASF/sam0/drivers/tcc/tcc_callback.d \
|
||||
src/drivers/p_io.d \
|
||||
src/drivers/p_usart.d \
|
||||
src/ASF/sam0/drivers/sercom/usart/usart.d \
|
||||
src/ASF/sam0/drivers/sercom/usart/usart_interrupt.d \
|
||||
src/ASF/sam0/drivers/sercom/sercom_interrupt.d \
|
||||
src/ASF/sam0/drivers/extint/extint_callback.d \
|
||||
src/ASF/common2/services/delay/sam0/systick_counter.d \
|
||||
src/ASF/common/utils/interrupt/interrupt_sam_nvic.d \
|
||||
src/ASF/sam0/boards/samd21_xplained_pro/board_init.d \
|
||||
src/ASF/sam0/drivers/port/port.d \
|
||||
src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock.d \
|
||||
src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/gclk.d \
|
||||
src/ASF/sam0/drivers/system/interrupt/system_interrupt.d \
|
||||
src/ASF/sam0/drivers/system/pinmux/pinmux.d \
|
||||
src/ASF/sam0/drivers/system/system.d \
|
||||
src/ASF/sam0/utils/cmsis/samd21/source/gcc/startup_samd21.d \
|
||||
src/ASF/sam0/utils/cmsis/samd21/source/system_samd21.d \
|
||||
src/ASF/sam0/utils/syscalls/gcc/syscalls.d \
|
||||
src/main.d
|
||||
|
||||
C_DEPS_AS_ARGS += \
|
||||
src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc.d \
|
||||
src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc_callback.d \
|
||||
src/ASF/sam0/drivers/extint/extint_sam_d_r_h/extint.d \
|
||||
src/ASF/sam0/drivers/sercom/sercom.d \
|
||||
src/drivers/p_adc.d \
|
||||
src/ASF/sam0/drivers/tcc/tcc.d \
|
||||
src/ASF/sam0/drivers/tcc/tcc_callback.d \
|
||||
src/drivers/p_io.d \
|
||||
src/drivers/p_usart.d \
|
||||
src/ASF/sam0/drivers/sercom/usart/usart.d \
|
||||
src/ASF/sam0/drivers/sercom/usart/usart_interrupt.d \
|
||||
src/ASF/sam0/drivers/sercom/sercom_interrupt.d \
|
||||
src/ASF/sam0/drivers/extint/extint_callback.d \
|
||||
src/ASF/common2/services/delay/sam0/systick_counter.d \
|
||||
src/ASF/common/utils/interrupt/interrupt_sam_nvic.d \
|
||||
src/ASF/sam0/boards/samd21_xplained_pro/board_init.d \
|
||||
src/ASF/sam0/drivers/port/port.d \
|
||||
src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock.d \
|
||||
src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/gclk.d \
|
||||
src/ASF/sam0/drivers/system/interrupt/system_interrupt.d \
|
||||
src/ASF/sam0/drivers/system/pinmux/pinmux.d \
|
||||
src/ASF/sam0/drivers/system/system.d \
|
||||
src/ASF/sam0/utils/cmsis/samd21/source/gcc/startup_samd21.d \
|
||||
src/ASF/sam0/utils/cmsis/samd21/source/system_samd21.d \
|
||||
src/ASF/sam0/utils/syscalls/gcc/syscalls.d \
|
||||
src/main.d
|
||||
|
||||
OUTPUT_FILE_PATH +=ePenguin-Boaty-Testbed.elf
|
||||
|
||||
OUTPUT_FILE_PATH_AS_ARGS +=ePenguin-Boaty-Testbed.elf
|
||||
|
||||
ADDITIONAL_DEPENDENCIES:=
|
||||
|
||||
OUTPUT_FILE_DEP:= ./makedep.mk
|
||||
|
||||
LIB_DEP+=
|
||||
|
||||
LINKER_SCRIPT_DEP+= \
|
||||
../src/ASF/sam0/utils/linker_scripts/samd21/gcc/samd21j18a_flash.ld
|
||||
|
||||
|
||||
# AVR32/GNU C Compiler
|
||||
src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc.o: ../src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc_callback.o: ../src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc_callback.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/extint/extint_sam_d_r_h/extint.o: ../src/ASF/sam0/drivers/extint/extint_sam_d_r_h/extint.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/sercom/sercom.o: ../src/ASF/sam0/drivers/sercom/sercom.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/drivers/p_adc.o: ../src/drivers/p_adc.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/tcc/tcc.o: ../src/ASF/sam0/drivers/tcc/tcc.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/tcc/tcc_callback.o: ../src/ASF/sam0/drivers/tcc/tcc_callback.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/drivers/p_io.o: ../src/drivers/p_io.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/drivers/p_usart.o: ../src/drivers/p_usart.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/sercom/usart/usart.o: ../src/ASF/sam0/drivers/sercom/usart/usart.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/sercom/usart/usart_interrupt.o: ../src/ASF/sam0/drivers/sercom/usart/usart_interrupt.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/sercom/sercom_interrupt.o: ../src/ASF/sam0/drivers/sercom/sercom_interrupt.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/extint/extint_callback.o: ../src/ASF/sam0/drivers/extint/extint_callback.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/common2/services/delay/sam0/systick_counter.o: ../src/ASF/common2/services/delay/sam0/systick_counter.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/common/utils/interrupt/interrupt_sam_nvic.o: ../src/ASF/common/utils/interrupt/interrupt_sam_nvic.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/boards/samd21_xplained_pro/board_init.o: ../src/ASF/sam0/boards/samd21_xplained_pro/board_init.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/port/port.o: ../src/ASF/sam0/drivers/port/port.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock.o: ../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/gclk.o: ../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/gclk.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/system/interrupt/system_interrupt.o: ../src/ASF/sam0/drivers/system/interrupt/system_interrupt.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/system/pinmux/pinmux.o: ../src/ASF/sam0/drivers/system/pinmux/pinmux.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/system/system.o: ../src/ASF/sam0/drivers/system/system.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/utils/cmsis/samd21/source/gcc/startup_samd21.o: ../src/ASF/sam0/utils/cmsis/samd21/source/gcc/startup_samd21.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/utils/cmsis/samd21/source/system_samd21.o: ../src/ASF/sam0/utils/cmsis/samd21/source/system_samd21.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/utils/syscalls/gcc/syscalls.o: ../src/ASF/sam0/utils/syscalls/gcc/syscalls.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/main.o: ../src/main.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
# AVR32/GNU Preprocessing Assembler
|
||||
|
||||
|
||||
|
||||
# AVR32/GNU Assembler
|
||||
|
||||
|
||||
|
||||
|
||||
ifneq ($(MAKECMDGOALS),clean)
|
||||
ifneq ($(strip $(C_DEPS)),)
|
||||
-include $(C_DEPS)
|
||||
endif
|
||||
endif
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
|
||||
# All Target
|
||||
all: $(OUTPUT_FILE_PATH) $(ADDITIONAL_DEPENDENCIES)
|
||||
|
||||
$(OUTPUT_FILE_PATH): $(OBJS) $(USER_OBJS) $(OUTPUT_FILE_DEP) $(LIB_DEP) $(LINKER_SCRIPT_DEP)
|
||||
@echo Building target: $@
|
||||
@echo Invoking: ARM/GNU Linker : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -o$(OUTPUT_FILE_PATH_AS_ARGS) $(OBJS_AS_ARGS) $(USER_OBJS) $(LIBS) -mthumb -Wl,-Map="ePenguin-Boaty-Testbed.map" --specs=nano.specs -Wl,--start-group -larm_cortexM0l_math -lm -Wl,--end-group -L"../src/ASF/thirdparty/CMSIS/Lib/GCC" -Wl,--gc-sections -mcpu=cortex-m0plus -Wl,--entry=Reset_Handler -Wl,--cref -mthumb -T../src/ASF/sam0/utils/linker_scripts/samd21/gcc/samd21j18a_flash.ld
|
||||
@echo Finished building target: $@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit!
|
||||
################################################################################
|
||||
|
||||
SHELL := cmd.exe
|
||||
RM := rm -rf
|
||||
|
||||
USER_OBJS :=
|
||||
|
||||
LIBS :=
|
||||
PROJ :=
|
||||
|
||||
O_SRCS :=
|
||||
C_SRCS :=
|
||||
S_SRCS :=
|
||||
S_UPPER_SRCS :=
|
||||
OBJ_SRCS :=
|
||||
ASM_SRCS :=
|
||||
PREPROCESSING_SRCS :=
|
||||
OBJS :=
|
||||
OBJS_AS_ARGS :=
|
||||
C_DEPS :=
|
||||
C_DEPS_AS_ARGS :=
|
||||
EXECUTABLES :=
|
||||
OUTPUT_FILE_PATH :=
|
||||
OUTPUT_FILE_PATH_AS_ARGS :=
|
||||
AVR_APP_PATH :=$$$AVR_APP_PATH$$$
|
||||
QUOTE := "
|
||||
ADDITIONAL_DEPENDENCIES:=
|
||||
OUTPUT_FILE_DEP:=
|
||||
LIB_DEP:=
|
||||
LINKER_SCRIPT_DEP:=
|
||||
|
||||
# Every subdirectory with source files must be described here
|
||||
SUBDIRS := \
|
||||
../src/ \
|
||||
../src/ASF/ \
|
||||
../src/ASF/common2/ \
|
||||
../src/ASF/common2/services/ \
|
||||
../src/ASF/common2/services/delay/ \
|
||||
../src/ASF/common2/services/delay/sam0/ \
|
||||
../src/ASF/common/ \
|
||||
../src/ASF/common/boards/ \
|
||||
../src/ASF/common/utils/ \
|
||||
../src/ASF/common/utils/interrupt/ \
|
||||
../src/ASF/sam0/ \
|
||||
../src/ASF/sam0/boards/ \
|
||||
../src/ASF/sam0/boards/samd21_xplained_pro/ \
|
||||
../src/ASF/sam0/drivers/ \
|
||||
../src/ASF/sam0/drivers/adc/ \
|
||||
../src/ASF/sam0/drivers/adc/adc_sam_d_r_h/ \
|
||||
../src/ASF/sam0/drivers/extint/ \
|
||||
../src/ASF/sam0/drivers/extint/extint_sam_d_r_h/ \
|
||||
../src/ASF/sam0/drivers/port/ \
|
||||
../src/ASF/sam0/drivers/port/quick_start/ \
|
||||
../src/ASF/sam0/drivers/sercom/ \
|
||||
../src/ASF/sam0/drivers/sercom/usart/ \
|
||||
../src/ASF/sam0/drivers/sercom/usart/quick_start/ \
|
||||
../src/ASF/sam0/drivers/sercom/usart/quick_start_callback/ \
|
||||
../src/ASF/sam0/drivers/sercom/usart/quick_start_dma/ \
|
||||
../src/ASF/sam0/drivers/sercom/usart/quick_start_lin/ \
|
||||
../src/ASF/sam0/drivers/system/ \
|
||||
../src/ASF/sam0/drivers/system/clock/ \
|
||||
../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/ \
|
||||
../src/ASF/sam0/drivers/system/interrupt/ \
|
||||
../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21/ \
|
||||
../src/ASF/sam0/drivers/system/pinmux/ \
|
||||
../src/ASF/sam0/drivers/system/pinmux/quick_start/ \
|
||||
../src/ASF/sam0/drivers/system/power/ \
|
||||
../src/ASF/sam0/drivers/system/power/power_sam_d_r_h/ \
|
||||
../src/ASF/sam0/drivers/system/reset/ \
|
||||
../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h/ \
|
||||
../src/ASF/sam0/drivers/tcc/ \
|
||||
../src/ASF/sam0/drivers/tcc/quick_start/ \
|
||||
../src/ASF/sam0/drivers/tcc/quick_start_buffering/ \
|
||||
../src/ASF/sam0/drivers/tcc/quick_start_callback/ \
|
||||
../src/ASF/sam0/drivers/tcc/quick_start_dma/ \
|
||||
../src/ASF/sam0/drivers/tcc/quick_start_faultn/ \
|
||||
../src/ASF/sam0/drivers/tcc/quick_start_faultx/ \
|
||||
../src/ASF/sam0/drivers/tcc/quick_start_timer/ \
|
||||
../src/ASF/sam0/utils/ \
|
||||
../src/ASF/sam0/utils/cmsis/ \
|
||||
../src/ASF/sam0/utils/cmsis/samd21/ \
|
||||
../src/ASF/sam0/utils/cmsis/samd21/include/ \
|
||||
../src/ASF/sam0/utils/cmsis/samd21/include/component/ \
|
||||
../src/ASF/sam0/utils/cmsis/samd21/include/instance/ \
|
||||
../src/ASF/sam0/utils/cmsis/samd21/include/pio/ \
|
||||
../src/ASF/sam0/utils/cmsis/samd21/source/ \
|
||||
../src/ASF/sam0/utils/cmsis/samd21/source/gcc/ \
|
||||
../src/ASF/sam0/utils/header_files/ \
|
||||
../src/ASF/sam0/utils/linker_scripts/ \
|
||||
../src/ASF/sam0/utils/linker_scripts/samd21/ \
|
||||
../src/ASF/sam0/utils/linker_scripts/samd21/gcc/ \
|
||||
../src/ASF/sam0/utils/make/ \
|
||||
../src/ASF/sam0/utils/preprocessor/ \
|
||||
../src/ASF/sam0/utils/syscalls/ \
|
||||
../src/ASF/sam0/utils/syscalls/gcc/ \
|
||||
../src/ASF/thirdparty/ \
|
||||
../src/ASF/thirdparty/CMSIS/ \
|
||||
../src/ASF/thirdparty/CMSIS/Include/ \
|
||||
../src/ASF/thirdparty/CMSIS/Lib/ \
|
||||
../src/ASF/thirdparty/CMSIS/Lib/GCC/ \
|
||||
../src/config/ \
|
||||
../src/drivers \
|
||||
../src/devices
|
||||
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
C_SRCS += \
|
||||
../src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc.c \
|
||||
../src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc_callback.c \
|
||||
../src/ASF/sam0/drivers/extint/extint_sam_d_r_h/extint.c \
|
||||
../src/ASF/sam0/drivers/sercom/sercom.c \
|
||||
../src/drivers/p_adc.c \
|
||||
../src/ASF/sam0/drivers/tcc/tcc.c \
|
||||
../src/ASF/sam0/drivers/tcc/tcc_callback.c \
|
||||
../src/drivers/p_io.c \
|
||||
../src/drivers/p_usart.c \
|
||||
../src/ASF/sam0/drivers/sercom/usart/usart.c \
|
||||
../src/ASF/sam0/drivers/sercom/usart/usart_interrupt.c \
|
||||
../src/ASF/sam0/drivers/sercom/sercom_interrupt.c \
|
||||
../src/ASF/sam0/drivers/extint/extint_callback.c \
|
||||
../src/ASF/common2/services/delay/sam0/systick_counter.c \
|
||||
../src/ASF/common/utils/interrupt/interrupt_sam_nvic.c \
|
||||
../src/ASF/sam0/boards/samd21_xplained_pro/board_init.c \
|
||||
../src/ASF/sam0/drivers/port/port.c \
|
||||
../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock.c \
|
||||
../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/gclk.c \
|
||||
../src/ASF/sam0/drivers/system/interrupt/system_interrupt.c \
|
||||
../src/ASF/sam0/drivers/system/pinmux/pinmux.c \
|
||||
../src/ASF/sam0/drivers/system/system.c \
|
||||
../src/ASF/sam0/utils/cmsis/samd21/source/gcc/startup_samd21.c \
|
||||
../src/ASF/sam0/utils/cmsis/samd21/source/system_samd21.c \
|
||||
../src/ASF/sam0/utils/syscalls/gcc/syscalls.c \
|
||||
../src/main.c
|
||||
|
||||
|
||||
PREPROCESSING_SRCS +=
|
||||
|
||||
|
||||
ASM_SRCS +=
|
||||
|
||||
|
||||
OBJS += \
|
||||
src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc.o \
|
||||
src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc_callback.o \
|
||||
src/ASF/sam0/drivers/extint/extint_sam_d_r_h/extint.o \
|
||||
src/ASF/sam0/drivers/sercom/sercom.o \
|
||||
src/drivers/p_adc.o \
|
||||
src/ASF/sam0/drivers/tcc/tcc.o \
|
||||
src/ASF/sam0/drivers/tcc/tcc_callback.o \
|
||||
src/drivers/p_io.o \
|
||||
src/drivers/p_usart.o \
|
||||
src/ASF/sam0/drivers/sercom/usart/usart.o \
|
||||
src/ASF/sam0/drivers/sercom/usart/usart_interrupt.o \
|
||||
src/ASF/sam0/drivers/sercom/sercom_interrupt.o \
|
||||
src/ASF/sam0/drivers/extint/extint_callback.o \
|
||||
src/ASF/common2/services/delay/sam0/systick_counter.o \
|
||||
src/ASF/common/utils/interrupt/interrupt_sam_nvic.o \
|
||||
src/ASF/sam0/boards/samd21_xplained_pro/board_init.o \
|
||||
src/ASF/sam0/drivers/port/port.o \
|
||||
src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock.o \
|
||||
src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/gclk.o \
|
||||
src/ASF/sam0/drivers/system/interrupt/system_interrupt.o \
|
||||
src/ASF/sam0/drivers/system/pinmux/pinmux.o \
|
||||
src/ASF/sam0/drivers/system/system.o \
|
||||
src/ASF/sam0/utils/cmsis/samd21/source/gcc/startup_samd21.o \
|
||||
src/ASF/sam0/utils/cmsis/samd21/source/system_samd21.o \
|
||||
src/ASF/sam0/utils/syscalls/gcc/syscalls.o \
|
||||
src/main.o
|
||||
|
||||
OBJS_AS_ARGS += \
|
||||
src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc.o \
|
||||
src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc_callback.o \
|
||||
src/ASF/sam0/drivers/extint/extint_sam_d_r_h/extint.o \
|
||||
src/ASF/sam0/drivers/sercom/sercom.o \
|
||||
src/drivers/p_adc.o \
|
||||
src/ASF/sam0/drivers/tcc/tcc.o \
|
||||
src/ASF/sam0/drivers/tcc/tcc_callback.o \
|
||||
src/drivers/p_io.o \
|
||||
src/drivers/p_usart.o \
|
||||
src/ASF/sam0/drivers/sercom/usart/usart.o \
|
||||
src/ASF/sam0/drivers/sercom/usart/usart_interrupt.o \
|
||||
src/ASF/sam0/drivers/sercom/sercom_interrupt.o \
|
||||
src/ASF/sam0/drivers/extint/extint_callback.o \
|
||||
src/ASF/common2/services/delay/sam0/systick_counter.o \
|
||||
src/ASF/common/utils/interrupt/interrupt_sam_nvic.o \
|
||||
src/ASF/sam0/boards/samd21_xplained_pro/board_init.o \
|
||||
src/ASF/sam0/drivers/port/port.o \
|
||||
src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock.o \
|
||||
src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/gclk.o \
|
||||
src/ASF/sam0/drivers/system/interrupt/system_interrupt.o \
|
||||
src/ASF/sam0/drivers/system/pinmux/pinmux.o \
|
||||
src/ASF/sam0/drivers/system/system.o \
|
||||
src/ASF/sam0/utils/cmsis/samd21/source/gcc/startup_samd21.o \
|
||||
src/ASF/sam0/utils/cmsis/samd21/source/system_samd21.o \
|
||||
src/ASF/sam0/utils/syscalls/gcc/syscalls.o \
|
||||
src/main.o
|
||||
|
||||
C_DEPS += \
|
||||
src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc.d \
|
||||
src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc_callback.d \
|
||||
src/ASF/sam0/drivers/extint/extint_sam_d_r_h/extint.d \
|
||||
src/ASF/sam0/drivers/sercom/sercom.d \
|
||||
src/drivers/p_adc.d \
|
||||
src/ASF/sam0/drivers/tcc/tcc.d \
|
||||
src/ASF/sam0/drivers/tcc/tcc_callback.d \
|
||||
src/drivers/p_io.d \
|
||||
src/drivers/p_usart.d \
|
||||
src/ASF/sam0/drivers/sercom/usart/usart.d \
|
||||
src/ASF/sam0/drivers/sercom/usart/usart_interrupt.d \
|
||||
src/ASF/sam0/drivers/sercom/sercom_interrupt.d \
|
||||
src/ASF/sam0/drivers/extint/extint_callback.d \
|
||||
src/ASF/common2/services/delay/sam0/systick_counter.d \
|
||||
src/ASF/common/utils/interrupt/interrupt_sam_nvic.d \
|
||||
src/ASF/sam0/boards/samd21_xplained_pro/board_init.d \
|
||||
src/ASF/sam0/drivers/port/port.d \
|
||||
src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock.d \
|
||||
src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/gclk.d \
|
||||
src/ASF/sam0/drivers/system/interrupt/system_interrupt.d \
|
||||
src/ASF/sam0/drivers/system/pinmux/pinmux.d \
|
||||
src/ASF/sam0/drivers/system/system.d \
|
||||
src/ASF/sam0/utils/cmsis/samd21/source/gcc/startup_samd21.d \
|
||||
src/ASF/sam0/utils/cmsis/samd21/source/system_samd21.d \
|
||||
src/ASF/sam0/utils/syscalls/gcc/syscalls.d \
|
||||
src/main.d
|
||||
|
||||
C_DEPS_AS_ARGS += \
|
||||
src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc.d \
|
||||
src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc_callback.d \
|
||||
src/ASF/sam0/drivers/extint/extint_sam_d_r_h/extint.d \
|
||||
src/ASF/sam0/drivers/sercom/sercom.d \
|
||||
src/drivers/p_adc.d \
|
||||
src/ASF/sam0/drivers/tcc/tcc.d \
|
||||
src/ASF/sam0/drivers/tcc/tcc_callback.d \
|
||||
src/drivers/p_io.d \
|
||||
src/drivers/p_usart.d \
|
||||
src/ASF/sam0/drivers/sercom/usart/usart.d \
|
||||
src/ASF/sam0/drivers/sercom/usart/usart_interrupt.d \
|
||||
src/ASF/sam0/drivers/sercom/sercom_interrupt.d \
|
||||
src/ASF/sam0/drivers/extint/extint_callback.d \
|
||||
src/ASF/common2/services/delay/sam0/systick_counter.d \
|
||||
src/ASF/common/utils/interrupt/interrupt_sam_nvic.d \
|
||||
src/ASF/sam0/boards/samd21_xplained_pro/board_init.d \
|
||||
src/ASF/sam0/drivers/port/port.d \
|
||||
src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock.d \
|
||||
src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/gclk.d \
|
||||
src/ASF/sam0/drivers/system/interrupt/system_interrupt.d \
|
||||
src/ASF/sam0/drivers/system/pinmux/pinmux.d \
|
||||
src/ASF/sam0/drivers/system/system.d \
|
||||
src/ASF/sam0/utils/cmsis/samd21/source/gcc/startup_samd21.d \
|
||||
src/ASF/sam0/utils/cmsis/samd21/source/system_samd21.d \
|
||||
src/ASF/sam0/utils/syscalls/gcc/syscalls.d \
|
||||
src/main.d
|
||||
|
||||
OUTPUT_FILE_PATH +=ePenguin-Boaty-Testbed.elf
|
||||
|
||||
OUTPUT_FILE_PATH_AS_ARGS +=ePenguin-Boaty-Testbed.elf
|
||||
|
||||
ADDITIONAL_DEPENDENCIES:=
|
||||
|
||||
OUTPUT_FILE_DEP:= ./makedep.mk
|
||||
|
||||
LIB_DEP+=
|
||||
|
||||
LINKER_SCRIPT_DEP+= \
|
||||
../src/ASF/sam0/utils/linker_scripts/samd21/gcc/samd21j18a_flash.ld
|
||||
|
||||
|
||||
# AVR32/GNU C Compiler
|
||||
src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc.o: ../src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc_callback.o: ../src/ASF/sam0/drivers/adc/adc_sam_d_r_h/adc_callback.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/extint/extint_sam_d_r_h/extint.o: ../src/ASF/sam0/drivers/extint/extint_sam_d_r_h/extint.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/sercom/sercom.o: ../src/ASF/sam0/drivers/sercom/sercom.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/drivers/p_adc.o: ../src/drivers/p_adc.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/tcc/tcc.o: ../src/ASF/sam0/drivers/tcc/tcc.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/tcc/tcc_callback.o: ../src/ASF/sam0/drivers/tcc/tcc_callback.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/drivers/p_io.o: ../src/drivers/p_io.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/drivers/p_usart.o: ../src/drivers/p_usart.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/sercom/usart/usart.o: ../src/ASF/sam0/drivers/sercom/usart/usart.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/sercom/usart/usart_interrupt.o: ../src/ASF/sam0/drivers/sercom/usart/usart_interrupt.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/sercom/sercom_interrupt.o: ../src/ASF/sam0/drivers/sercom/sercom_interrupt.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/extint/extint_callback.o: ../src/ASF/sam0/drivers/extint/extint_callback.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/common2/services/delay/sam0/systick_counter.o: ../src/ASF/common2/services/delay/sam0/systick_counter.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/common/utils/interrupt/interrupt_sam_nvic.o: ../src/ASF/common/utils/interrupt/interrupt_sam_nvic.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/boards/samd21_xplained_pro/board_init.o: ../src/ASF/sam0/boards/samd21_xplained_pro/board_init.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/port/port.o: ../src/ASF/sam0/drivers/port/port.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock.o: ../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/clock.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/gclk.o: ../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/gclk.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/system/interrupt/system_interrupt.o: ../src/ASF/sam0/drivers/system/interrupt/system_interrupt.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/system/pinmux/pinmux.o: ../src/ASF/sam0/drivers/system/pinmux/pinmux.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/drivers/system/system.o: ../src/ASF/sam0/drivers/system/system.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/utils/cmsis/samd21/source/gcc/startup_samd21.o: ../src/ASF/sam0/utils/cmsis/samd21/source/gcc/startup_samd21.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/utils/cmsis/samd21/source/system_samd21.o: ../src/ASF/sam0/utils/cmsis/samd21/source/system_samd21.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/ASF/sam0/utils/syscalls/gcc/syscalls.o: ../src/ASF/sam0/utils/syscalls/gcc/syscalls.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
src/main.o: ../src/main.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAMD21J18A__ -DNDEBUG -DBOARD=SAMD21_XPLAINED_PRO -D__SAMD21J18A__ -DARM_MATH_CM0PLUS=true -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DEXTINT_CALLBACK_MODE=true -DUSART_CALLBACK_MODE=true -DTCC_ASYNC=true -I"../src/ASF/common/boards" -I"../src/ASF/sam0/utils" -I"../src/ASF/sam0/utils/header_files" -I"../src/ASF/sam0/utils/preprocessor" -I"../src/ASF/thirdparty/CMSIS/Include" -I"../src/ASF/thirdparty/CMSIS/Lib/GCC" -I"../src/ASF/common/utils" -I"../src/ASF/sam0/utils/cmsis/samd21/include" -I"../src/ASF/sam0/utils/cmsis/samd21/source" -I"../src/ASF/sam0/drivers/port" -I"../src/ASF/sam0/drivers/system/pinmux" -I"../src/ASF/sam0/drivers/system" -I"../src/ASF/sam0/drivers/system/clock/clock_samd21_r21_da_ha1" -I"../src/ASF/sam0/drivers/system/clock" -I"../src/ASF/sam0/drivers/system/interrupt" -I"../src/ASF/sam0/drivers/system/interrupt/system_interrupt_samd21" -I"../src/ASF/sam0/drivers/system/power" -I"../src/ASF/sam0/drivers/system/power/power_sam_d_r_h" -I"../src/ASF/sam0/drivers/system/reset" -I"../src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h" -I"../src/ASF/sam0/boards/samd21_xplained_pro" -I"../src/ASF/sam0/boards" -I"../src" -I"../src/config" -I"../src/ASF/common2/services/delay" -I"../src/ASF/common2/services/delay/sam0" -I"../src/ASF/sam0/drivers/adc" -I"../src/ASF/sam0/drivers/adc/adc_sam_d_r_h" -I"../src/ASF/sam0/drivers/extint" -I"../src/ASF/sam0/drivers/extint/extint_sam_d_r_h" -I"../src/ASF/sam0/drivers/sercom" -I"../src/ASF/sam0/drivers/sercom/usart" -I"../src/ASF/sam0/drivers/tcc" -I"../src/drivers" -I"../src/devices" -Os -fdata-sections -ffunction-sections -mlong-calls -Wall -mcpu=cortex-m0plus -c -pipe -fno-strict-aliasing -Wall -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 -ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef -Wshadow -Wbad-function-cast -Wwrite-strings -Wsign-compare -Waggregate-return -Wmissing-declarations -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs -Wlong-long -Wunreachable-code -Wcast-align --param max-inline-insns-single=500 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
# AVR32/GNU Preprocessing Assembler
|
||||
|
||||
|
||||
|
||||
# AVR32/GNU Assembler
|
||||
|
||||
|
||||
|
||||
|
||||
ifneq ($(MAKECMDGOALS),clean)
|
||||
ifneq ($(strip $(C_DEPS)),)
|
||||
-include $(C_DEPS)
|
||||
endif
|
||||
endif
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
|
||||
# All Target
|
||||
all: $(OUTPUT_FILE_PATH) $(ADDITIONAL_DEPENDENCIES)
|
||||
|
||||
$(OUTPUT_FILE_PATH): $(OBJS) $(USER_OBJS) $(OUTPUT_FILE_DEP) $(LIB_DEP) $(LINKER_SCRIPT_DEP)
|
||||
@echo Building target: $@
|
||||
@echo Invoking: ARM/GNU Linker : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -o$(OUTPUT_FILE_PATH_AS_ARGS) $(OBJS_AS_ARGS) $(USER_OBJS) $(LIBS) -mthumb -Wl,-Map="ePenguin-Boaty-Testbed.map" --specs=nano.specs -Wl,--start-group -larm_cortexM0l_math -lm -Wl,--end-group -L"../src/ASF/thirdparty/CMSIS/Lib/GCC" -Wl,--gc-sections -mcpu=cortex-m0plus -Wl,--entry=Reset_Handler -Wl,--cref -mthumb -T../src/ASF/sam0/utils/linker_scripts/samd21/gcc/samd21j18a_flash.ld
|
||||
@echo Finished building target: $@
|
||||
"C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-objcopy.exe" -O binary "ePenguin-Boaty-Testbed.elf" "ePenguin-Boaty-Testbed.bin"
|
||||
"C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-objcopy.exe" -O ihex -R .eeprom -R .fuse -R .lock -R .signature "ePenguin-Boaty-Testbed.elf" "ePenguin-Boaty-Testbed.hex"
|
||||
"C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-objcopy.exe" -j .eeprom --set-section-flags=.eeprom=alloc,load --change-section-lma .eeprom=0 --no-change-warnings -O binary "ePenguin-Boaty-Testbed.elf" "ePenguin-Boaty-Testbed.eep" || exit 0
|
||||
"C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-objdump.exe" -h -S "ePenguin-Boaty-Testbed.elf" > "ePenguin-Boaty-Testbed.lss"
|
||||
"C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-objcopy.exe" -O srec -R .eeprom -R .fuse -R .lock -R .signature "ePenguin-Boaty-Testbed.elf" "ePenguin-Boaty-Testbed.srec"
|
||||
"C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-size.exe" "ePenguin-Boaty-Testbed.elf"
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
# Other Targets
|
||||
clean:
|
||||
-$(RM) $(OBJS_AS_ARGS) $(EXECUTABLES)
|
||||
-$(RM) $(C_DEPS_AS_ARGS)
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
# Other Targets
|
||||
clean:
|
||||
-$(RM) $(OBJS_AS_ARGS) $(EXECUTABLES)
|
||||
-$(RM) $(C_DEPS_AS_ARGS)
|
||||
rm -rf "ePenguin-Boaty-Testbed.elf" "ePenguin-Boaty-Testbed.a" "ePenguin-Boaty-Testbed.hex" "ePenguin-Boaty-Testbed.bin" "ePenguin-Boaty-Testbed.lss" "ePenguin-Boaty-Testbed.eep" "ePenguin-Boaty-Testbed.map" "ePenguin-Boaty-Testbed.srec"
|
||||
|
||||
@ -1,224 +1,224 @@
|
||||
:10000000B8200020290B0000250B0000250B000064
|
||||
:1000100000000000000000000000000000000000E0
|
||||
:10002000000000000000000000000000250B0000A0
|
||||
:100030000000000000000000250B0000250B000060
|
||||
:10004000250B0000250B0000250B0000250B0000F0
|
||||
:10005000A1040000250B0000250B0000250B00006B
|
||||
:10006000250B0000F903000009040000190400003A
|
||||
:100070002904000039040000490400003503000091
|
||||
:100080004503000055030000250B0000250B000070
|
||||
:10009000250B0000250B0000250B0000350100009A
|
||||
:1000A000250B0000250B0000250B0000250B000090
|
||||
:1000B0000000000010B5064C2378002B07D1054B3B
|
||||
:1000C000002B02D0044800E000BF0123237010BDC4
|
||||
:1000D0000C00002000000000D00D0000084B10B5FF
|
||||
:1000E000002B03D00749084800E000BF0748036819
|
||||
:1000F000002B00D110BD064B002BFBD09847F9E731
|
||||
:100100000000000010000020D00D0000D00D000005
|
||||
:100110000000000003685A7E52B2002AFBDB022274
|
||||
:10012000197B0A431A730268537E5BB2002BFBDB18
|
||||
:100130007047000070B5284B1C6823681A7EDD7D6F
|
||||
:1001400015400122154228D01A7621684B7E5BB2F9
|
||||
:10015000002BFBDB6269931C63614B8B9BB21380AA
|
||||
:10016000238B013B9BB22383002B10D101222168FA
|
||||
:100170008A75217F052910D12377E37E13420CD0A5
|
||||
:10018000A37E134209D02000A368984705E0637F4F
|
||||
:10019000002B02D02000114B984704231D420BD0A6
|
||||
:1001A00022681376E27E023B1A4205D0A27E1A42F2
|
||||
:1001B00002D02000E368984702231D420BD022683A
|
||||
:1001C0001376E27EDB181A4205D0A27E1A4202D0D4
|
||||
:1001D00023692000984770BD6000002015010000D1
|
||||
:1001E000014B5878C009704700180040022310B531
|
||||
:1001F000044A11780B431370034B98470028FBD136
|
||||
:1002000010BDC04600180040E1010000402307B5C2
|
||||
:10021000104A052091690B439361002301A90B70DB
|
||||
:100220000D4B98470D4B0520984701230C4A117838
|
||||
:100230000B4313700B4B98470028FBD102000A4B6D
|
||||
:100240001A5004304028FBD11022084B1A60084B8A
|
||||
:10025000984707BD00040040F50900006D09000043
|
||||
:1002600000180040E10100006400002000E100E00F
|
||||
:10027000ED0100000023012203604360837202331A
|
||||
:1002800002724272C3727047F7B50C0000262379E0
|
||||
:1002900001A94E70CE700B70237A05008B70207808
|
||||
:1002A000134B984733001F2D00D8124B0721A27A19
|
||||
:1002B00029408900E67A002A01D0082216430F2738
|
||||
:1002C0008E408F403100EA0892009A189069B84336
|
||||
:1002D00001439161617A0122002904D0AA40596941
|
||||
:1002E0000A435A61F7BDAA40596991435961F9E738
|
||||
:1002F000C90A000000180040F8B500250B4B80002B
|
||||
:10030000C4582368626BDE6AA36B13401E40084B1F
|
||||
:10031000EF58374205D063195B682000984723687F
|
||||
:10032000DF620435302DF2D1F8BDC046A4000020B4
|
||||
:10033000800D000010B50020014B984710BDC0464D
|
||||
:10034000F902000010B50120014B984710BDC046CE
|
||||
:10035000F902000010B50220014B984710BDC046BD
|
||||
:10036000F902000070470000F0B5060085B001AC4E
|
||||
:1003700020000A4B0D001700984700230196012624
|
||||
:100380006360237221002800054BE6729847320013
|
||||
:1003900029003800034B984705B0F0BD75020000F6
|
||||
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S1130C20002243088B4274D303098B425FD3030A27
|
||||
S1130C308B4244D3030B8B4228D3030C8B420DD33A
|
||||
S1130C40FF22090212BA030C8B4202D312120902C8
|
||||
S1130C5065D0030B8B4219D300E0090AC30B8B4206
|
||||
S1130C6001D3CB03C01A5241830B8B4201D38B03B4
|
||||
S1130C70C01A5241430B8B4201D34B03C01A524159
|
||||
S1130C80030B8B4201D30B03C01A5241C30A8B429C
|
||||
S1130C9001D3CB02C01A5241830A8B4201D38B0287
|
||||
S1130CA0C01A5241430A8B4201D34B02C01A52412B
|
||||
S1130CB0030A8B4201D30B02C01A5241CDD2C3099D
|
||||
S1130CC08B4201D3CB01C01A524183098B4201D319
|
||||
S1130CD08B01C01A524143098B4201D34B01C01A04
|
||||
S1130CE0524103098B4201D30B01C01A5241C3087C
|
||||
S1130CF08B4201D3CB00C01A524183088B4201D3EB
|
||||
S1130D008B00C01A524143088B4201D34B00C01AD6
|
||||
S1130D105241411A00D20146524110467047FFE742
|
||||
S1130D2001B5002000F006F802BDC0460029F7D046
|
||||
S1130D3076E770477047C04670B500260C4D0D4CE1
|
||||
S1130D40641BA410A64209D1002600F031F80A4D14
|
||||
S1130D500A4C641BA410A64205D170BDB300EB5825
|
||||
S1130D6098470136EEE7B300EB5898470136F2E7AF
|
||||
S1130D70BC0D0000BC0D0000BC0D0000C00D000047
|
||||
S1130D800100000002000000040000000800000050
|
||||
S1130D90001000000020000000400000008000005F
|
||||
S1130DA00000010000000200000004000000080030
|
||||
S1130DB0F8B5C046F8BC08BC9E467047DD0000008C
|
||||
S1130DC0F8B5C046F8BC08BC9E467047B5000000A4
|
||||
S10F0DD0401F00000800000001000000AB
|
||||
S9030B29C8
|
||||
|
||||
@ -1,56 +1,56 @@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit or delete the file
|
||||
################################################################################
|
||||
|
||||
src\ASF\sam0\drivers\adc\adc_sam_d_r_h\adc.c
|
||||
|
||||
src\ASF\sam0\drivers\adc\adc_sam_d_r_h\adc_callback.c
|
||||
|
||||
src\ASF\sam0\drivers\extint\extint_sam_d_r_h\extint.c
|
||||
|
||||
src\ASF\sam0\drivers\sercom\sercom.c
|
||||
|
||||
src\drivers\p_adc.c
|
||||
|
||||
src\ASF\sam0\drivers\tcc\tcc.c
|
||||
|
||||
src\ASF\sam0\drivers\tcc\tcc_callback.c
|
||||
|
||||
src\drivers\p_io.c
|
||||
|
||||
src\drivers\p_usart.c
|
||||
|
||||
src\ASF\sam0\drivers\sercom\usart\usart.c
|
||||
|
||||
src\ASF\sam0\drivers\sercom\usart\usart_interrupt.c
|
||||
|
||||
src\ASF\sam0\drivers\sercom\sercom_interrupt.c
|
||||
|
||||
src\ASF\sam0\drivers\extint\extint_callback.c
|
||||
|
||||
src\ASF\common2\services\delay\sam0\systick_counter.c
|
||||
|
||||
src\ASF\common\utils\interrupt\interrupt_sam_nvic.c
|
||||
|
||||
src\ASF\sam0\boards\samd21_xplained_pro\board_init.c
|
||||
|
||||
src\ASF\sam0\drivers\port\port.c
|
||||
|
||||
src\ASF\sam0\drivers\system\clock\clock_samd21_r21_da_ha1\clock.c
|
||||
|
||||
src\ASF\sam0\drivers\system\clock\clock_samd21_r21_da_ha1\gclk.c
|
||||
|
||||
src\ASF\sam0\drivers\system\interrupt\system_interrupt.c
|
||||
|
||||
src\ASF\sam0\drivers\system\pinmux\pinmux.c
|
||||
|
||||
src\ASF\sam0\drivers\system\system.c
|
||||
|
||||
src\ASF\sam0\utils\cmsis\samd21\source\gcc\startup_samd21.c
|
||||
|
||||
src\ASF\sam0\utils\cmsis\samd21\source\system_samd21.c
|
||||
|
||||
src\ASF\sam0\utils\syscalls\gcc\syscalls.c
|
||||
|
||||
src\main.c
|
||||
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit or delete the file
|
||||
################################################################################
|
||||
|
||||
src\ASF\sam0\drivers\adc\adc_sam_d_r_h\adc.c
|
||||
|
||||
src\ASF\sam0\drivers\adc\adc_sam_d_r_h\adc_callback.c
|
||||
|
||||
src\ASF\sam0\drivers\extint\extint_sam_d_r_h\extint.c
|
||||
|
||||
src\ASF\sam0\drivers\sercom\sercom.c
|
||||
|
||||
src\drivers\p_adc.c
|
||||
|
||||
src\ASF\sam0\drivers\tcc\tcc.c
|
||||
|
||||
src\ASF\sam0\drivers\tcc\tcc_callback.c
|
||||
|
||||
src\drivers\p_io.c
|
||||
|
||||
src\drivers\p_usart.c
|
||||
|
||||
src\ASF\sam0\drivers\sercom\usart\usart.c
|
||||
|
||||
src\ASF\sam0\drivers\sercom\usart\usart_interrupt.c
|
||||
|
||||
src\ASF\sam0\drivers\sercom\sercom_interrupt.c
|
||||
|
||||
src\ASF\sam0\drivers\extint\extint_callback.c
|
||||
|
||||
src\ASF\common2\services\delay\sam0\systick_counter.c
|
||||
|
||||
src\ASF\common\utils\interrupt\interrupt_sam_nvic.c
|
||||
|
||||
src\ASF\sam0\boards\samd21_xplained_pro\board_init.c
|
||||
|
||||
src\ASF\sam0\drivers\port\port.c
|
||||
|
||||
src\ASF\sam0\drivers\system\clock\clock_samd21_r21_da_ha1\clock.c
|
||||
|
||||
src\ASF\sam0\drivers\system\clock\clock_samd21_r21_da_ha1\gclk.c
|
||||
|
||||
src\ASF\sam0\drivers\system\interrupt\system_interrupt.c
|
||||
|
||||
src\ASF\sam0\drivers\system\pinmux\pinmux.c
|
||||
|
||||
src\ASF\sam0\drivers\system\system.c
|
||||
|
||||
src\ASF\sam0\utils\cmsis\samd21\source\gcc\startup_samd21.c
|
||||
|
||||
src\ASF\sam0\utils\cmsis\samd21\source\system_samd21.c
|
||||
|
||||
src\ASF\sam0\utils\syscalls\gcc\syscalls.c
|
||||
|
||||
src\main.c
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,450 +1,450 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Standard board header file.
|
||||
*
|
||||
* This file includes the appropriate board header file according to the
|
||||
* defined board (parameter BOARD).
|
||||
*
|
||||
* Copyright (c) 2009-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
#ifndef _BOARD_H_
|
||||
#define _BOARD_H_
|
||||
|
||||
/**
|
||||
* \defgroup group_common_boards Generic board support
|
||||
*
|
||||
* The generic board support module includes board-specific definitions
|
||||
* and function prototypes, such as the board initialization function.
|
||||
*
|
||||
* \{
|
||||
*/
|
||||
|
||||
#include "compiler.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
/*! \name Base Boards
|
||||
*/
|
||||
//! @{
|
||||
#define EVK1100 1 //!< AT32UC3A EVK1100 board.
|
||||
#define EVK1101 2 //!< AT32UC3B EVK1101 board.
|
||||
#define UC3C_EK 3 //!< AT32UC3C UC3C-EK board.
|
||||
#define EVK1104 4 //!< AT32UC3A3 EVK1104 board.
|
||||
#define EVK1105 5 //!< AT32UC3A EVK1105 board.
|
||||
#define STK600_RCUC3L0 6 //!< STK600 RCUC3L0 board.
|
||||
#define UC3L_EK 7 //!< AT32UC3L-EK board.
|
||||
#define XPLAIN 8 //!< ATxmega128A1 Xplain board.
|
||||
#define STK600_RC064X 10 //!< ATxmega256A3 STK600 board.
|
||||
#define STK600_RC100X 11 //!< ATxmega128A1 STK600 board.
|
||||
#define UC3_A3_XPLAINED 13 //!< ATUC3A3 UC3-A3 Xplained board.
|
||||
#define UC3_L0_XPLAINED 15 //!< ATUC3L0 UC3-L0 Xplained board.
|
||||
#define STK600_RCUC3D 16 //!< STK600 RCUC3D board.
|
||||
#define STK600_RCUC3C0 17 //!< STK600 RCUC3C board.
|
||||
#define XMEGA_B1_XPLAINED 18 //!< ATxmega128B1 Xplained board.
|
||||
#define XMEGA_A1_XPLAINED 19 //!< ATxmega128A1 Xplain-A1 board.
|
||||
#define XMEGA_A1U_XPLAINED_PRO 20 //!< ATxmega128A1U XMEGA-A1U Xplained Pro board.
|
||||
#define STK600_RCUC3L4 21 //!< ATUCL4 STK600 board.
|
||||
#define UC3_L0_XPLAINED_BC 22 //!< ATUC3L0 UC3-L0 Xplained board controller board.
|
||||
#define MEGA1284P_XPLAINED_BC 23 //!< ATmega1284P-Xplained board controller board.
|
||||
#define STK600_RC044X 24 //!< STK600 with RC044X routing card board.
|
||||
#define STK600_RCUC3B0 25 //!< STK600 RCUC3B0 board.
|
||||
#define UC3_L0_QT600 26 //!< QT600 UC3L0 MCU board.
|
||||
#define XMEGA_A3BU_XPLAINED 27 //!< ATxmega256A3BU Xplained board.
|
||||
#define STK600_RC064X_LCDX 28 //!< XMEGAB3 STK600 RC064X LCDX board.
|
||||
#define STK600_RC100X_LCDX 29 //!< XMEGAB1 STK600 RC100X LCDX board.
|
||||
#define UC3B_BOARD_CONTROLLER 30 //!< AT32UC3B1 board controller for Atmel boards.
|
||||
#define RZ600 31 //!< AT32UC3A RZ600 MCU board.
|
||||
#define SAM3S_EK 32 //!< SAM3S-EK board.
|
||||
#define SAM3U_EK 33 //!< SAM3U-EK board.
|
||||
#define SAM3X_EK 34 //!< SAM3X-EK board.
|
||||
#define SAM3N_EK 35 //!< SAM3N-EK board.
|
||||
#define SAM3S_EK2 36 //!< SAM3S-EK2 board.
|
||||
#define SAM4S_EK 37 //!< SAM4S-EK board.
|
||||
#define STK600_RCUC3A0 38 //!< STK600 RCUC3A0 board.
|
||||
#define STK600_MEGA 39 //!< STK600 MEGA board.
|
||||
#define MEGA_1284P_XPLAINED 40 //!< ATmega1284P Xplained board.
|
||||
#define SAM4S_XPLAINED 41 //!< SAM4S Xplained board.
|
||||
#define ATXMEGA128A1_QT600 42 //!< QT600 ATXMEGA128A1 MCU board.
|
||||
#define ARDUINO_DUE_X 43 //!< Arduino Due/X board.
|
||||
#define STK600_RCUC3L3 44 //!< ATUCL3 STK600 board.
|
||||
#define SAM4L_EK 45 //!< SAM4L-EK board.
|
||||
#define STK600_MEGA_RF 46 //!< STK600 MEGA RF EVK board.
|
||||
#define XMEGA_C3_XPLAINED 47 //!< ATxmega384C3 Xplained board.
|
||||
#define STK600_RC032X 48 //!< STK600 with RC032X routing card board.
|
||||
#define SAM4S_EK2 49 //!< SAM4S-EK2 board.
|
||||
#define XMEGA_E5_XPLAINED 50 //!< ATxmega32E5 Xplained board.
|
||||
#define SAM4E_EK 51 //!< SAM4E-EK board.
|
||||
#define ATMEGA256RFR2_XPLAINED_PRO 52 //!< ATmega256RFR2 Xplained Pro board.
|
||||
#define SAM4S_XPLAINED_PRO 53 //!< SAM4S Xplained Pro board.
|
||||
#define SAM4L_XPLAINED_PRO 54 //!< SAM4L Xplained Pro board.
|
||||
#define ATMEGA256RFR2_ZIGBIT 55 //!< ATmega256RFR2 zigbit.
|
||||
#define XMEGA_RF233_ZIGBIT 56 //!< ATxmega256A3U with AT86RF233 Zigbit.
|
||||
#define XMEGA_RF212B_ZIGBIT 57 //!< ATxmega256A3U with AT86RF212B Zigbit.
|
||||
#define SAM4S_WPIR_RD 58 //!< SAM4S-WPIR-RD board.
|
||||
#define SAMD20_XPLAINED_PRO 59 //!< SAM D20 Xplained Pro board.
|
||||
#define SAM4L8_XPLAINED_PRO 60 //!< SAM4L8 Xplained Pro board.
|
||||
#define SAM4N_XPLAINED_PRO 61 //!< SAM4N Xplained Pro board.
|
||||
#define XMEGA_A3_REB_CBB 62 //!< XMEGA REB Controller Base board.
|
||||
#define ATMEGARFX_RCB 63 //!< RFR2 & RFA1 RCB.
|
||||
#define SAM4C_EK 64 //!< SAM4C-EK board.
|
||||
#define RCB256RFR2_XPRO 65 //!< RFR2 RCB Xplained Pro board.
|
||||
#define SAMG53_XPLAINED_PRO 66 //!< SAMG53 Xplained Pro board.
|
||||
#define SAM4CP16BMB 67 //!< SAM4CP16BMB board.
|
||||
#define SAM4E_XPLAINED_PRO 68 //!< SAM4E Xplained Pro board.
|
||||
#define SAMD21_XPLAINED_PRO 69 //!< SAM D21 Xplained Pro board.
|
||||
#define SAMR21_XPLAINED_PRO 70 //!< SAM R21 Xplained Pro board.
|
||||
#define SAM4CMP_DB 71 //!< SAM4CMP demo board.
|
||||
#define SAM4CMS_DB 72 //!< SAM4CMS demo board.
|
||||
#define ATPL230AMB 73 //!< ATPL230AMB board.
|
||||
#define SAMD11_XPLAINED_PRO 74 //!< SAM D11 Xplained Pro board.
|
||||
#define SAMG55_XPLAINED_PRO 75 //!< SAMG55 Xplained Pro board.
|
||||
#define SAML21_XPLAINED_PRO 76 //!< SAM L21 Xplained Pro board.
|
||||
#define SAMD10_XPLAINED_MINI 77 //!< SAM D10 Xplained Mini board.
|
||||
#define SAMDA1_XPLAINED_PRO 78 //!< SAM DA1 Xplained Pro board.
|
||||
#define SAMW25_XPLAINED_PRO 79 //!< SAMW25 Xplained Pro board.
|
||||
#define SAMC21_XPLAINED_PRO 80 //!< SAM C21 Xplained Pro board.
|
||||
#define SAMV71_XPLAINED_ULTRA 81 //!< SAMV71 Xplained Ultra board.
|
||||
#define ATMEGA328P_XPLAINED_MINI 82 //!< ATMEGA328P Xplained MINI board.
|
||||
#define ATMEGA328PB_XPLAINED_MINI 83 //!< ATMEGA328PB Xplained MINI board.
|
||||
#define SAMB11_XPLAINED_PRO 84 //!< SAM B11 Xplained Pro board.
|
||||
#define SAME70_XPLAINED 85 //!< SAME70 Xplained board.
|
||||
#define SAML22_XPLAINED_PRO 86 //!< SAM L22 Xplained Pro board.
|
||||
#define SAML22_XPLAINED_PRO_B 87 //!< SAM L22 Xplained Pro board.
|
||||
#define SAMR21ZLL_EK 88 //!< SAMR21ZLL-EK board.
|
||||
#define ATMEGA168PB_XPLAINED_MINI 89 //!< ATMEGA168PB Xplained MINI board.
|
||||
#define ATMEGA324PB_XPLAINED_PRO 90 //!< ATMEGA324PB Xplained Pro board.
|
||||
#define SAMB11ZR_XPLAINED_PRO 92 //!< SAM B11 ZR Xplained Pro board.
|
||||
#define SAMR30_XPLAINED_PRO 93 //!< SAM R30 Xplained Pro board.
|
||||
#define SAMHA1G16A_XPLAINED_PRO 94 //!< SAM HA1G16A Xplained Pro board.
|
||||
#define SAMR34_XPLAINED_PRO 95 //!< SAM R34 Xplained Pro board.
|
||||
#define SIMULATOR_XMEGA_A1 97 //!< Simulator for XMEGA A1 devices.
|
||||
#define AVR_SIMULATOR_UC3 98 //!< Simulator for the AVR UC3 device family.
|
||||
#define USER_BOARD 99 //!< User-reserved board (if any).
|
||||
#define DUMMY_BOARD 100 //!< Dummy board to support board-independent applications (e.g. bootloader).
|
||||
#define SAMB11ZR_SENSOR_TAG 101 //!< SAMB11ZR sensor tag board
|
||||
#define SAMR30_MODULE_XPLAINED_PRO 102 //!< SAM R30 Module Xplained Pro board.
|
||||
#define SAMR21G18_MODULE 103 //!< SAMR21G18-MR210UA Module.
|
||||
#define SAMR21B18_MODULE 104 //!< SAMR21B18-MZ210PA Module.
|
||||
//! @}
|
||||
|
||||
/*! \name Extension Boards
|
||||
*/
|
||||
//! @{
|
||||
#define EXT1102 1 //!< AT32UC3B EXT1102 board
|
||||
#define MC300 2 //!< AT32UC3 MC300 board
|
||||
#define SENSORS_XPLAINED_INERTIAL_1 3 //!< Xplained inertial sensor board 1
|
||||
#define SENSORS_XPLAINED_INERTIAL_2 4 //!< Xplained inertial sensor board 2
|
||||
#define SENSORS_XPLAINED_PRESSURE_1 5 //!< Xplained pressure sensor board
|
||||
#define SENSORS_XPLAINED_LIGHTPROX_1 6 //!< Xplained light & proximity sensor board
|
||||
#define SENSORS_XPLAINED_INERTIAL_A1 7 //!< Xplained inertial sensor board "A"
|
||||
#define RZ600_AT86RF231 8 //!< AT86RF231 RF board in RZ600
|
||||
#define RZ600_AT86RF230B 9 //!< AT86RF230B RF board in RZ600
|
||||
#define RZ600_AT86RF212 10 //!< AT86RF212 RF board in RZ600
|
||||
#define SENSORS_XPLAINED_BREADBOARD 11 //!< Xplained sensor development breadboard
|
||||
#define SECURITY_XPLAINED 12 //!< Xplained ATSHA204 board
|
||||
#define USER_EXT_BOARD 99 //!< User-reserved extension board (if any).
|
||||
//! @}
|
||||
|
||||
#if BOARD == EVK1100
|
||||
# include "evk1100/evk1100.h"
|
||||
#elif BOARD == EVK1101
|
||||
# include "evk1101/evk1101.h"
|
||||
#elif BOARD == UC3C_EK
|
||||
# include "uc3c_ek/uc3c_ek.h"
|
||||
#elif BOARD == EVK1104
|
||||
# include "evk1104/evk1104.h"
|
||||
#elif BOARD == EVK1105
|
||||
# include "evk1105/evk1105.h"
|
||||
#elif BOARD == STK600_RCUC3L0
|
||||
# include "stk600/rcuc3l0/stk600_rcuc3l0.h"
|
||||
#elif BOARD == UC3L_EK
|
||||
# include "uc3l_ek/uc3l_ek.h"
|
||||
#elif BOARD == STK600_RCUC3L4
|
||||
# include "stk600/rcuc3l4/stk600_rcuc3l4.h"
|
||||
#elif BOARD == XPLAIN
|
||||
# include "xplain/xplain.h"
|
||||
#elif BOARD == STK600_MEGA
|
||||
/*No header-file to include*/
|
||||
#elif BOARD == STK600_MEGA_RF
|
||||
# include "stk600.h"
|
||||
#elif BOARD == ATMEGA256RFR2_XPLAINED_PRO
|
||||
# include "atmega256rfr2_xplained_pro/atmega256rfr2_xplained_pro.h"
|
||||
#elif BOARD == ATMEGA256RFR2_ZIGBIT
|
||||
# include "atmega256rfr2_zigbit/atmega256rfr2_zigbit.h"
|
||||
#elif BOARD == STK600_RC032X
|
||||
# include "stk600/rc032x/stk600_rc032x.h"
|
||||
#elif BOARD == STK600_RC044X
|
||||
# include "stk600/rc044x/stk600_rc044x.h"
|
||||
#elif BOARD == STK600_RC064X
|
||||
# include "stk600/rc064x/stk600_rc064x.h"
|
||||
#elif BOARD == STK600_RC100X
|
||||
# include "stk600/rc100x/stk600_rc100x.h"
|
||||
#elif BOARD == UC3_A3_XPLAINED
|
||||
# include "uc3_a3_xplained/uc3_a3_xplained.h"
|
||||
#elif BOARD == UC3_L0_XPLAINED
|
||||
# include "uc3_l0_xplained/uc3_l0_xplained.h"
|
||||
#elif BOARD == STK600_RCUC3B0
|
||||
# include "stk600/rcuc3b0/stk600_rcuc3b0.h"
|
||||
#elif BOARD == STK600_RCUC3D
|
||||
# include "stk600/rcuc3d/stk600_rcuc3d.h"
|
||||
#elif BOARD == STK600_RCUC3C0
|
||||
# include "stk600/rcuc3c0/stk600_rcuc3c0.h"
|
||||
#elif BOARD == SAMG53_XPLAINED_PRO
|
||||
# include "samg53_xplained_pro/samg53_xplained_pro.h"
|
||||
#elif BOARD == SAMG55_XPLAINED_PRO
|
||||
# include "samg55_xplained_pro/samg55_xplained_pro.h"
|
||||
#elif BOARD == XMEGA_B1_XPLAINED
|
||||
# include "xmega_b1_xplained/xmega_b1_xplained.h"
|
||||
#elif BOARD == STK600_RC064X_LCDX
|
||||
# include "stk600/rc064x_lcdx/stk600_rc064x_lcdx.h"
|
||||
#elif BOARD == STK600_RC100X_LCDX
|
||||
# include "stk600/rc100x_lcdx/stk600_rc100x_lcdx.h"
|
||||
#elif BOARD == XMEGA_A1_XPLAINED
|
||||
# include "xmega_a1_xplained/xmega_a1_xplained.h"
|
||||
#elif BOARD == XMEGA_A1U_XPLAINED_PRO
|
||||
# include "xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h"
|
||||
#elif BOARD == UC3_L0_XPLAINED_BC
|
||||
# include "uc3_l0_xplained_bc/uc3_l0_xplained_bc.h"
|
||||
#elif BOARD == SAM3S_EK
|
||||
# include "sam3s_ek/sam3s_ek.h"
|
||||
# include "system_sam3s.h"
|
||||
#elif BOARD == SAM3S_EK2
|
||||
# include "sam3s_ek2/sam3s_ek2.h"
|
||||
# include "system_sam3sd8.h"
|
||||
#elif BOARD == SAM3U_EK
|
||||
# include "sam3u_ek/sam3u_ek.h"
|
||||
# include "system_sam3u.h"
|
||||
#elif BOARD == SAM3X_EK
|
||||
# include "sam3x_ek/sam3x_ek.h"
|
||||
# include "system_sam3x.h"
|
||||
#elif BOARD == SAM3N_EK
|
||||
# include "sam3n_ek/sam3n_ek.h"
|
||||
# include "system_sam3n.h"
|
||||
#elif BOARD == SAM4S_EK
|
||||
# include "sam4s_ek/sam4s_ek.h"
|
||||
# include "system_sam4s.h"
|
||||
#elif BOARD == SAM4S_WPIR_RD
|
||||
# include "sam4s_wpir_rd/sam4s_wpir_rd.h"
|
||||
# include "system_sam4s.h"
|
||||
#elif BOARD == SAM4S_XPLAINED
|
||||
# include "sam4s_xplained/sam4s_xplained.h"
|
||||
# include "system_sam4s.h"
|
||||
#elif BOARD == SAM4S_EK2
|
||||
# include "sam4s_ek2/sam4s_ek2.h"
|
||||
# include "system_sam4s.h"
|
||||
#elif BOARD == MEGA_1284P_XPLAINED
|
||||
/*No header-file to include*/
|
||||
#elif BOARD == ARDUINO_DUE_X
|
||||
# include "arduino_due_x/arduino_due_x.h"
|
||||
# include "system_sam3x.h"
|
||||
#elif BOARD == SAM4L_EK
|
||||
# include "sam4l_ek/sam4l_ek.h"
|
||||
#elif BOARD == SAM4E_EK
|
||||
# include "sam4e_ek/sam4e_ek.h"
|
||||
#elif BOARD == SAMD20_XPLAINED_PRO
|
||||
# include "samd20_xplained_pro/samd20_xplained_pro.h"
|
||||
#elif BOARD == SAMD21_XPLAINED_PRO
|
||||
# include "samd21_xplained_pro/samd21_xplained_pro.h"
|
||||
#elif BOARD == SAMR21_XPLAINED_PRO
|
||||
# include "samr21_xplained_pro/samr21_xplained_pro.h"
|
||||
#elif BOARD == SAMR30_XPLAINED_PRO && defined(__SAMR30G18A__)
|
||||
# include "samr30_xplained_pro/samr30_xplained_pro.h"
|
||||
#elif BOARD == SAMR30_MODULE_XPLAINED_PRO && defined(__SAMR30E18A__)
|
||||
# include "samr30_module_xplained_pro/samr30_module_xplained_pro.h"
|
||||
#elif BOARD == SAMR21ZLL_EK
|
||||
# include "samr21zll_ek/samr21zll_ek.h"
|
||||
#elif BOARD == SAMD11_XPLAINED_PRO
|
||||
# include "samd11_xplained_pro/samd11_xplained_pro.h"
|
||||
#elif BOARD == SAML21_XPLAINED_PRO && defined(__SAML21J18A__)
|
||||
# include "saml21_xplained_pro/saml21_xplained_pro.h"
|
||||
#elif BOARD == SAML22_XPLAINED_PRO
|
||||
# include "saml22_xplained_pro/saml22_xplained_pro.h"
|
||||
#elif BOARD == SAML22_XPLAINED_PRO_B
|
||||
# include "saml22_xplained_pro_b/saml22_xplained_pro_b.h"
|
||||
#elif BOARD == SAML21_XPLAINED_PRO && defined(__SAML21J18B__)
|
||||
# include "saml21_xplained_pro_b/saml21_xplained_pro.h"
|
||||
#elif BOARD == SAMD10_XPLAINED_MINI
|
||||
# include "samd10_xplained_mini/samd10_xplained_mini.h"
|
||||
#elif BOARD == SAMDA1_XPLAINED_PRO
|
||||
# include "samda1_xplained_pro/samda1_xplained_pro.h"
|
||||
#elif BOARD == SAMHA1G16A_XPLAINED_PRO
|
||||
# include "samha1g16a_xplained_pro/samha1g16a_xplained_pro.h"
|
||||
#elif BOARD == SAMC21_XPLAINED_PRO
|
||||
# include "samc21_xplained_pro/samc21_xplained_pro.h"
|
||||
#elif BOARD == SAM4N_XPLAINED_PRO
|
||||
# include "sam4n_xplained_pro/sam4n_xplained_pro.h"
|
||||
#elif BOARD == SAMW25_XPLAINED_PRO
|
||||
# include "samw25_xplained_pro/samw25_xplained_pro.h"
|
||||
#elif BOARD == SAMV71_XPLAINED_ULTRA
|
||||
# include "samv71_xplained_ultra/samv71_xplained_ultra.h"
|
||||
#elif BOARD == MEGA1284P_XPLAINED_BC
|
||||
# include "mega1284p_xplained_bc/mega1284p_xplained_bc.h"
|
||||
#elif BOARD == UC3_L0_QT600
|
||||
# include "uc3_l0_qt600/uc3_l0_qt600.h"
|
||||
#elif BOARD == XMEGA_A3BU_XPLAINED
|
||||
# include "xmega_a3bu_xplained/xmega_a3bu_xplained.h"
|
||||
#elif BOARD == XMEGA_E5_XPLAINED
|
||||
# include "xmega_e5_xplained/xmega_e5_xplained.h"
|
||||
#elif BOARD == UC3B_BOARD_CONTROLLER
|
||||
# include "uc3b_board_controller/uc3b_board_controller.h"
|
||||
#elif BOARD == RZ600
|
||||
# include "rz600/rz600.h"
|
||||
#elif BOARD == STK600_RCUC3A0
|
||||
# include "stk600/rcuc3a0/stk600_rcuc3a0.h"
|
||||
#elif BOARD == ATXMEGA128A1_QT600
|
||||
# include "atxmega128a1_qt600/atxmega128a1_qt600.h"
|
||||
#elif BOARD == STK600_RCUC3L3
|
||||
# include "stk600/rcuc3l3/stk600_rcuc3l3.h"
|
||||
#elif BOARD == SAM4S_XPLAINED_PRO
|
||||
# include "sam4s_xplained_pro/sam4s_xplained_pro.h"
|
||||
#elif BOARD == SAM4L_XPLAINED_PRO
|
||||
# include "sam4l_xplained_pro/sam4l_xplained_pro.h"
|
||||
#elif BOARD == SAM4L8_XPLAINED_PRO
|
||||
# include "sam4l8_xplained_pro/sam4l8_xplained_pro.h"
|
||||
#elif BOARD == SAM4C_EK
|
||||
# include "sam4c_ek/sam4c_ek.h"
|
||||
#elif BOARD == SAM4CMP_DB
|
||||
# include "sam4cmp_db/sam4cmp_db.h"
|
||||
#elif BOARD == SAM4CMS_DB
|
||||
# include "sam4cms_db/sam4cms_db.h"
|
||||
#elif BOARD == SAM4CP16BMB
|
||||
# include "sam4cp16bmb/sam4cp16bmb.h"
|
||||
#elif BOARD == ATPL230AMB
|
||||
# include "atpl230amb/atpl230amb.h"
|
||||
#elif BOARD == XMEGA_C3_XPLAINED
|
||||
# include "xmega_c3_xplained/xmega_c3_xplained.h"
|
||||
#elif BOARD == XMEGA_RF233_ZIGBIT
|
||||
# include "xmega_rf233_zigbit/xmega_rf233_zigbit.h"
|
||||
#elif BOARD == XMEGA_A3_REB_CBB
|
||||
# include "xmega_a3_reb_cbb/xmega_a3_reb_cbb.h"
|
||||
#elif BOARD == ATMEGARFX_RCB
|
||||
# include "atmegarfx_rcb/atmegarfx_rcb.h"
|
||||
#elif BOARD == RCB256RFR2_XPRO
|
||||
# include "atmega256rfr2_rcb_xpro/atmega256rfr2_rcb_xpro.h"
|
||||
#elif BOARD == XMEGA_RF212B_ZIGBIT
|
||||
# include "xmega_rf212b_zigbit/xmega_rf212b_zigbit.h"
|
||||
#elif BOARD == SAM4E_XPLAINED_PRO
|
||||
# include "sam4e_xplained_pro/sam4e_xplained_pro.h"
|
||||
#elif BOARD == ATMEGA328P_XPLAINED_MINI
|
||||
# include "atmega328p_xplained_mini/atmega328p_xplained_mini.h"
|
||||
#elif BOARD == ATMEGA328PB_XPLAINED_MINI
|
||||
# include "atmega328pb_xplained_mini/atmega328pb_xplained_mini.h"
|
||||
#elif BOARD == SAMB11_XPLAINED_PRO
|
||||
# include "samb11_xplained_pro/samb11_xplained_pro.h"
|
||||
#elif BOARD == SAME70_XPLAINED
|
||||
# include "same70_xplained/same70_xplained.h"
|
||||
#elif BOARD == ATMEGA168PB_XPLAINED_MINI
|
||||
# include "atmega168pb_xplained_mini/atmega168pb_xplained_mini.h"
|
||||
#elif BOARD == ATMEGA324PB_XPLAINED_PRO
|
||||
# include "atmega324pb_xplained_pro/atmega324pb_xplained_pro.h"
|
||||
#elif BOARD == SAMB11ZR_XPLAINED_PRO
|
||||
# include "samb11zr_xplained_pro/samb11zr_xplained_pro.h"
|
||||
#elif BOARD == SIMULATOR_XMEGA_A1
|
||||
# include "simulator/xmega_a1/simulator_xmega_a1.h"
|
||||
#elif BOARD == AVR_SIMULATOR_UC3
|
||||
# include "avr_simulator_uc3/avr_simulator_uc3.h"
|
||||
#elif BOARD == SAMR21G18_MODULE
|
||||
# include "samr21g18_module/samr21g18_module.h"
|
||||
#elif BOARD == SAMR21B18_MODULE
|
||||
# include "samr21b18_module/samr21b18_module.h"
|
||||
#elif BOARD == SAMR34_XPLAINED_PRO && defined(__SAMR34J18B__)
|
||||
# include "samr34_xplained_pro/samr34_xplained_pro.h"
|
||||
#elif BOARD == USER_BOARD
|
||||
// User-reserved area: #include the header file of your board here (if any).
|
||||
# include "user_board.h"
|
||||
#elif BOARD == DUMMY_BOARD
|
||||
# include "dummy/dummy_board.h"
|
||||
#elif BOARD == SAMB11ZR_SENSOR_TAG
|
||||
# include "samb11zr_sensor_tag/samb11zr_sensor_tag.h"
|
||||
#else
|
||||
# error No known Atmel board defined
|
||||
#endif
|
||||
|
||||
#if (defined EXT_BOARD)
|
||||
# if EXT_BOARD == MC300
|
||||
# include "mc300/mc300.h"
|
||||
# elif (EXT_BOARD == SENSORS_XPLAINED_INERTIAL_1) || \
|
||||
(EXT_BOARD == SENSORS_XPLAINED_INERTIAL_2) || \
|
||||
(EXT_BOARD == SENSORS_XPLAINED_INERTIAL_A1) || \
|
||||
(EXT_BOARD == SENSORS_XPLAINED_PRESSURE_1) || \
|
||||
(EXT_BOARD == SENSORS_XPLAINED_LIGHTPROX_1) || \
|
||||
(EXT_BOARD == SENSORS_XPLAINED_BREADBOARD)
|
||||
# include "sensors_xplained/sensors_xplained.h"
|
||||
# elif EXT_BOARD == RZ600_AT86RF231
|
||||
# include "at86rf231/at86rf231.h"
|
||||
# elif EXT_BOARD == RZ600_AT86RF230B
|
||||
# include "at86rf230b/at86rf230b.h"
|
||||
# elif EXT_BOARD == RZ600_AT86RF212
|
||||
# include "at86rf212/at86rf212.h"
|
||||
# elif EXT_BOARD == SECURITY_XPLAINED
|
||||
# include "security_xplained.h"
|
||||
# elif EXT_BOARD == USER_EXT_BOARD
|
||||
// User-reserved area: #include the header file of your extension board here
|
||||
// (if any).
|
||||
# endif
|
||||
#endif
|
||||
|
||||
|
||||
#if (defined(__GNUC__) && defined(__AVR32__)) || (defined(__ICCAVR32__) || defined(__AAVR32__))
|
||||
#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
|
||||
|
||||
/*! \brief This function initializes the board target resources
|
||||
*
|
||||
* This function should be called to ensure proper initialization of the target
|
||||
* board hardware connected to the part.
|
||||
*/
|
||||
extern void board_init(void);
|
||||
|
||||
#endif // #ifdef __AVR32_ABI_COMPILER__
|
||||
#else
|
||||
/*! \brief This function initializes the board target resources
|
||||
*
|
||||
* This function should be called to ensure proper initialization of the target
|
||||
* board hardware connected to the part.
|
||||
*/
|
||||
extern void board_init(void);
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \}
|
||||
*/
|
||||
|
||||
#endif // _BOARD_H_
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Standard board header file.
|
||||
*
|
||||
* This file includes the appropriate board header file according to the
|
||||
* defined board (parameter BOARD).
|
||||
*
|
||||
* Copyright (c) 2009-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
#ifndef _BOARD_H_
|
||||
#define _BOARD_H_
|
||||
|
||||
/**
|
||||
* \defgroup group_common_boards Generic board support
|
||||
*
|
||||
* The generic board support module includes board-specific definitions
|
||||
* and function prototypes, such as the board initialization function.
|
||||
*
|
||||
* \{
|
||||
*/
|
||||
|
||||
#include "compiler.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
/*! \name Base Boards
|
||||
*/
|
||||
//! @{
|
||||
#define EVK1100 1 //!< AT32UC3A EVK1100 board.
|
||||
#define EVK1101 2 //!< AT32UC3B EVK1101 board.
|
||||
#define UC3C_EK 3 //!< AT32UC3C UC3C-EK board.
|
||||
#define EVK1104 4 //!< AT32UC3A3 EVK1104 board.
|
||||
#define EVK1105 5 //!< AT32UC3A EVK1105 board.
|
||||
#define STK600_RCUC3L0 6 //!< STK600 RCUC3L0 board.
|
||||
#define UC3L_EK 7 //!< AT32UC3L-EK board.
|
||||
#define XPLAIN 8 //!< ATxmega128A1 Xplain board.
|
||||
#define STK600_RC064X 10 //!< ATxmega256A3 STK600 board.
|
||||
#define STK600_RC100X 11 //!< ATxmega128A1 STK600 board.
|
||||
#define UC3_A3_XPLAINED 13 //!< ATUC3A3 UC3-A3 Xplained board.
|
||||
#define UC3_L0_XPLAINED 15 //!< ATUC3L0 UC3-L0 Xplained board.
|
||||
#define STK600_RCUC3D 16 //!< STK600 RCUC3D board.
|
||||
#define STK600_RCUC3C0 17 //!< STK600 RCUC3C board.
|
||||
#define XMEGA_B1_XPLAINED 18 //!< ATxmega128B1 Xplained board.
|
||||
#define XMEGA_A1_XPLAINED 19 //!< ATxmega128A1 Xplain-A1 board.
|
||||
#define XMEGA_A1U_XPLAINED_PRO 20 //!< ATxmega128A1U XMEGA-A1U Xplained Pro board.
|
||||
#define STK600_RCUC3L4 21 //!< ATUCL4 STK600 board.
|
||||
#define UC3_L0_XPLAINED_BC 22 //!< ATUC3L0 UC3-L0 Xplained board controller board.
|
||||
#define MEGA1284P_XPLAINED_BC 23 //!< ATmega1284P-Xplained board controller board.
|
||||
#define STK600_RC044X 24 //!< STK600 with RC044X routing card board.
|
||||
#define STK600_RCUC3B0 25 //!< STK600 RCUC3B0 board.
|
||||
#define UC3_L0_QT600 26 //!< QT600 UC3L0 MCU board.
|
||||
#define XMEGA_A3BU_XPLAINED 27 //!< ATxmega256A3BU Xplained board.
|
||||
#define STK600_RC064X_LCDX 28 //!< XMEGAB3 STK600 RC064X LCDX board.
|
||||
#define STK600_RC100X_LCDX 29 //!< XMEGAB1 STK600 RC100X LCDX board.
|
||||
#define UC3B_BOARD_CONTROLLER 30 //!< AT32UC3B1 board controller for Atmel boards.
|
||||
#define RZ600 31 //!< AT32UC3A RZ600 MCU board.
|
||||
#define SAM3S_EK 32 //!< SAM3S-EK board.
|
||||
#define SAM3U_EK 33 //!< SAM3U-EK board.
|
||||
#define SAM3X_EK 34 //!< SAM3X-EK board.
|
||||
#define SAM3N_EK 35 //!< SAM3N-EK board.
|
||||
#define SAM3S_EK2 36 //!< SAM3S-EK2 board.
|
||||
#define SAM4S_EK 37 //!< SAM4S-EK board.
|
||||
#define STK600_RCUC3A0 38 //!< STK600 RCUC3A0 board.
|
||||
#define STK600_MEGA 39 //!< STK600 MEGA board.
|
||||
#define MEGA_1284P_XPLAINED 40 //!< ATmega1284P Xplained board.
|
||||
#define SAM4S_XPLAINED 41 //!< SAM4S Xplained board.
|
||||
#define ATXMEGA128A1_QT600 42 //!< QT600 ATXMEGA128A1 MCU board.
|
||||
#define ARDUINO_DUE_X 43 //!< Arduino Due/X board.
|
||||
#define STK600_RCUC3L3 44 //!< ATUCL3 STK600 board.
|
||||
#define SAM4L_EK 45 //!< SAM4L-EK board.
|
||||
#define STK600_MEGA_RF 46 //!< STK600 MEGA RF EVK board.
|
||||
#define XMEGA_C3_XPLAINED 47 //!< ATxmega384C3 Xplained board.
|
||||
#define STK600_RC032X 48 //!< STK600 with RC032X routing card board.
|
||||
#define SAM4S_EK2 49 //!< SAM4S-EK2 board.
|
||||
#define XMEGA_E5_XPLAINED 50 //!< ATxmega32E5 Xplained board.
|
||||
#define SAM4E_EK 51 //!< SAM4E-EK board.
|
||||
#define ATMEGA256RFR2_XPLAINED_PRO 52 //!< ATmega256RFR2 Xplained Pro board.
|
||||
#define SAM4S_XPLAINED_PRO 53 //!< SAM4S Xplained Pro board.
|
||||
#define SAM4L_XPLAINED_PRO 54 //!< SAM4L Xplained Pro board.
|
||||
#define ATMEGA256RFR2_ZIGBIT 55 //!< ATmega256RFR2 zigbit.
|
||||
#define XMEGA_RF233_ZIGBIT 56 //!< ATxmega256A3U with AT86RF233 Zigbit.
|
||||
#define XMEGA_RF212B_ZIGBIT 57 //!< ATxmega256A3U with AT86RF212B Zigbit.
|
||||
#define SAM4S_WPIR_RD 58 //!< SAM4S-WPIR-RD board.
|
||||
#define SAMD20_XPLAINED_PRO 59 //!< SAM D20 Xplained Pro board.
|
||||
#define SAM4L8_XPLAINED_PRO 60 //!< SAM4L8 Xplained Pro board.
|
||||
#define SAM4N_XPLAINED_PRO 61 //!< SAM4N Xplained Pro board.
|
||||
#define XMEGA_A3_REB_CBB 62 //!< XMEGA REB Controller Base board.
|
||||
#define ATMEGARFX_RCB 63 //!< RFR2 & RFA1 RCB.
|
||||
#define SAM4C_EK 64 //!< SAM4C-EK board.
|
||||
#define RCB256RFR2_XPRO 65 //!< RFR2 RCB Xplained Pro board.
|
||||
#define SAMG53_XPLAINED_PRO 66 //!< SAMG53 Xplained Pro board.
|
||||
#define SAM4CP16BMB 67 //!< SAM4CP16BMB board.
|
||||
#define SAM4E_XPLAINED_PRO 68 //!< SAM4E Xplained Pro board.
|
||||
#define SAMD21_XPLAINED_PRO 69 //!< SAM D21 Xplained Pro board.
|
||||
#define SAMR21_XPLAINED_PRO 70 //!< SAM R21 Xplained Pro board.
|
||||
#define SAM4CMP_DB 71 //!< SAM4CMP demo board.
|
||||
#define SAM4CMS_DB 72 //!< SAM4CMS demo board.
|
||||
#define ATPL230AMB 73 //!< ATPL230AMB board.
|
||||
#define SAMD11_XPLAINED_PRO 74 //!< SAM D11 Xplained Pro board.
|
||||
#define SAMG55_XPLAINED_PRO 75 //!< SAMG55 Xplained Pro board.
|
||||
#define SAML21_XPLAINED_PRO 76 //!< SAM L21 Xplained Pro board.
|
||||
#define SAMD10_XPLAINED_MINI 77 //!< SAM D10 Xplained Mini board.
|
||||
#define SAMDA1_XPLAINED_PRO 78 //!< SAM DA1 Xplained Pro board.
|
||||
#define SAMW25_XPLAINED_PRO 79 //!< SAMW25 Xplained Pro board.
|
||||
#define SAMC21_XPLAINED_PRO 80 //!< SAM C21 Xplained Pro board.
|
||||
#define SAMV71_XPLAINED_ULTRA 81 //!< SAMV71 Xplained Ultra board.
|
||||
#define ATMEGA328P_XPLAINED_MINI 82 //!< ATMEGA328P Xplained MINI board.
|
||||
#define ATMEGA328PB_XPLAINED_MINI 83 //!< ATMEGA328PB Xplained MINI board.
|
||||
#define SAMB11_XPLAINED_PRO 84 //!< SAM B11 Xplained Pro board.
|
||||
#define SAME70_XPLAINED 85 //!< SAME70 Xplained board.
|
||||
#define SAML22_XPLAINED_PRO 86 //!< SAM L22 Xplained Pro board.
|
||||
#define SAML22_XPLAINED_PRO_B 87 //!< SAM L22 Xplained Pro board.
|
||||
#define SAMR21ZLL_EK 88 //!< SAMR21ZLL-EK board.
|
||||
#define ATMEGA168PB_XPLAINED_MINI 89 //!< ATMEGA168PB Xplained MINI board.
|
||||
#define ATMEGA324PB_XPLAINED_PRO 90 //!< ATMEGA324PB Xplained Pro board.
|
||||
#define SAMB11ZR_XPLAINED_PRO 92 //!< SAM B11 ZR Xplained Pro board.
|
||||
#define SAMR30_XPLAINED_PRO 93 //!< SAM R30 Xplained Pro board.
|
||||
#define SAMHA1G16A_XPLAINED_PRO 94 //!< SAM HA1G16A Xplained Pro board.
|
||||
#define SAMR34_XPLAINED_PRO 95 //!< SAM R34 Xplained Pro board.
|
||||
#define SIMULATOR_XMEGA_A1 97 //!< Simulator for XMEGA A1 devices.
|
||||
#define AVR_SIMULATOR_UC3 98 //!< Simulator for the AVR UC3 device family.
|
||||
#define USER_BOARD 99 //!< User-reserved board (if any).
|
||||
#define DUMMY_BOARD 100 //!< Dummy board to support board-independent applications (e.g. bootloader).
|
||||
#define SAMB11ZR_SENSOR_TAG 101 //!< SAMB11ZR sensor tag board
|
||||
#define SAMR30_MODULE_XPLAINED_PRO 102 //!< SAM R30 Module Xplained Pro board.
|
||||
#define SAMR21G18_MODULE 103 //!< SAMR21G18-MR210UA Module.
|
||||
#define SAMR21B18_MODULE 104 //!< SAMR21B18-MZ210PA Module.
|
||||
//! @}
|
||||
|
||||
/*! \name Extension Boards
|
||||
*/
|
||||
//! @{
|
||||
#define EXT1102 1 //!< AT32UC3B EXT1102 board
|
||||
#define MC300 2 //!< AT32UC3 MC300 board
|
||||
#define SENSORS_XPLAINED_INERTIAL_1 3 //!< Xplained inertial sensor board 1
|
||||
#define SENSORS_XPLAINED_INERTIAL_2 4 //!< Xplained inertial sensor board 2
|
||||
#define SENSORS_XPLAINED_PRESSURE_1 5 //!< Xplained pressure sensor board
|
||||
#define SENSORS_XPLAINED_LIGHTPROX_1 6 //!< Xplained light & proximity sensor board
|
||||
#define SENSORS_XPLAINED_INERTIAL_A1 7 //!< Xplained inertial sensor board "A"
|
||||
#define RZ600_AT86RF231 8 //!< AT86RF231 RF board in RZ600
|
||||
#define RZ600_AT86RF230B 9 //!< AT86RF230B RF board in RZ600
|
||||
#define RZ600_AT86RF212 10 //!< AT86RF212 RF board in RZ600
|
||||
#define SENSORS_XPLAINED_BREADBOARD 11 //!< Xplained sensor development breadboard
|
||||
#define SECURITY_XPLAINED 12 //!< Xplained ATSHA204 board
|
||||
#define USER_EXT_BOARD 99 //!< User-reserved extension board (if any).
|
||||
//! @}
|
||||
|
||||
#if BOARD == EVK1100
|
||||
# include "evk1100/evk1100.h"
|
||||
#elif BOARD == EVK1101
|
||||
# include "evk1101/evk1101.h"
|
||||
#elif BOARD == UC3C_EK
|
||||
# include "uc3c_ek/uc3c_ek.h"
|
||||
#elif BOARD == EVK1104
|
||||
# include "evk1104/evk1104.h"
|
||||
#elif BOARD == EVK1105
|
||||
# include "evk1105/evk1105.h"
|
||||
#elif BOARD == STK600_RCUC3L0
|
||||
# include "stk600/rcuc3l0/stk600_rcuc3l0.h"
|
||||
#elif BOARD == UC3L_EK
|
||||
# include "uc3l_ek/uc3l_ek.h"
|
||||
#elif BOARD == STK600_RCUC3L4
|
||||
# include "stk600/rcuc3l4/stk600_rcuc3l4.h"
|
||||
#elif BOARD == XPLAIN
|
||||
# include "xplain/xplain.h"
|
||||
#elif BOARD == STK600_MEGA
|
||||
/*No header-file to include*/
|
||||
#elif BOARD == STK600_MEGA_RF
|
||||
# include "stk600.h"
|
||||
#elif BOARD == ATMEGA256RFR2_XPLAINED_PRO
|
||||
# include "atmega256rfr2_xplained_pro/atmega256rfr2_xplained_pro.h"
|
||||
#elif BOARD == ATMEGA256RFR2_ZIGBIT
|
||||
# include "atmega256rfr2_zigbit/atmega256rfr2_zigbit.h"
|
||||
#elif BOARD == STK600_RC032X
|
||||
# include "stk600/rc032x/stk600_rc032x.h"
|
||||
#elif BOARD == STK600_RC044X
|
||||
# include "stk600/rc044x/stk600_rc044x.h"
|
||||
#elif BOARD == STK600_RC064X
|
||||
# include "stk600/rc064x/stk600_rc064x.h"
|
||||
#elif BOARD == STK600_RC100X
|
||||
# include "stk600/rc100x/stk600_rc100x.h"
|
||||
#elif BOARD == UC3_A3_XPLAINED
|
||||
# include "uc3_a3_xplained/uc3_a3_xplained.h"
|
||||
#elif BOARD == UC3_L0_XPLAINED
|
||||
# include "uc3_l0_xplained/uc3_l0_xplained.h"
|
||||
#elif BOARD == STK600_RCUC3B0
|
||||
# include "stk600/rcuc3b0/stk600_rcuc3b0.h"
|
||||
#elif BOARD == STK600_RCUC3D
|
||||
# include "stk600/rcuc3d/stk600_rcuc3d.h"
|
||||
#elif BOARD == STK600_RCUC3C0
|
||||
# include "stk600/rcuc3c0/stk600_rcuc3c0.h"
|
||||
#elif BOARD == SAMG53_XPLAINED_PRO
|
||||
# include "samg53_xplained_pro/samg53_xplained_pro.h"
|
||||
#elif BOARD == SAMG55_XPLAINED_PRO
|
||||
# include "samg55_xplained_pro/samg55_xplained_pro.h"
|
||||
#elif BOARD == XMEGA_B1_XPLAINED
|
||||
# include "xmega_b1_xplained/xmega_b1_xplained.h"
|
||||
#elif BOARD == STK600_RC064X_LCDX
|
||||
# include "stk600/rc064x_lcdx/stk600_rc064x_lcdx.h"
|
||||
#elif BOARD == STK600_RC100X_LCDX
|
||||
# include "stk600/rc100x_lcdx/stk600_rc100x_lcdx.h"
|
||||
#elif BOARD == XMEGA_A1_XPLAINED
|
||||
# include "xmega_a1_xplained/xmega_a1_xplained.h"
|
||||
#elif BOARD == XMEGA_A1U_XPLAINED_PRO
|
||||
# include "xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h"
|
||||
#elif BOARD == UC3_L0_XPLAINED_BC
|
||||
# include "uc3_l0_xplained_bc/uc3_l0_xplained_bc.h"
|
||||
#elif BOARD == SAM3S_EK
|
||||
# include "sam3s_ek/sam3s_ek.h"
|
||||
# include "system_sam3s.h"
|
||||
#elif BOARD == SAM3S_EK2
|
||||
# include "sam3s_ek2/sam3s_ek2.h"
|
||||
# include "system_sam3sd8.h"
|
||||
#elif BOARD == SAM3U_EK
|
||||
# include "sam3u_ek/sam3u_ek.h"
|
||||
# include "system_sam3u.h"
|
||||
#elif BOARD == SAM3X_EK
|
||||
# include "sam3x_ek/sam3x_ek.h"
|
||||
# include "system_sam3x.h"
|
||||
#elif BOARD == SAM3N_EK
|
||||
# include "sam3n_ek/sam3n_ek.h"
|
||||
# include "system_sam3n.h"
|
||||
#elif BOARD == SAM4S_EK
|
||||
# include "sam4s_ek/sam4s_ek.h"
|
||||
# include "system_sam4s.h"
|
||||
#elif BOARD == SAM4S_WPIR_RD
|
||||
# include "sam4s_wpir_rd/sam4s_wpir_rd.h"
|
||||
# include "system_sam4s.h"
|
||||
#elif BOARD == SAM4S_XPLAINED
|
||||
# include "sam4s_xplained/sam4s_xplained.h"
|
||||
# include "system_sam4s.h"
|
||||
#elif BOARD == SAM4S_EK2
|
||||
# include "sam4s_ek2/sam4s_ek2.h"
|
||||
# include "system_sam4s.h"
|
||||
#elif BOARD == MEGA_1284P_XPLAINED
|
||||
/*No header-file to include*/
|
||||
#elif BOARD == ARDUINO_DUE_X
|
||||
# include "arduino_due_x/arduino_due_x.h"
|
||||
# include "system_sam3x.h"
|
||||
#elif BOARD == SAM4L_EK
|
||||
# include "sam4l_ek/sam4l_ek.h"
|
||||
#elif BOARD == SAM4E_EK
|
||||
# include "sam4e_ek/sam4e_ek.h"
|
||||
#elif BOARD == SAMD20_XPLAINED_PRO
|
||||
# include "samd20_xplained_pro/samd20_xplained_pro.h"
|
||||
#elif BOARD == SAMD21_XPLAINED_PRO
|
||||
# include "samd21_xplained_pro/samd21_xplained_pro.h"
|
||||
#elif BOARD == SAMR21_XPLAINED_PRO
|
||||
# include "samr21_xplained_pro/samr21_xplained_pro.h"
|
||||
#elif BOARD == SAMR30_XPLAINED_PRO && defined(__SAMR30G18A__)
|
||||
# include "samr30_xplained_pro/samr30_xplained_pro.h"
|
||||
#elif BOARD == SAMR30_MODULE_XPLAINED_PRO && defined(__SAMR30E18A__)
|
||||
# include "samr30_module_xplained_pro/samr30_module_xplained_pro.h"
|
||||
#elif BOARD == SAMR21ZLL_EK
|
||||
# include "samr21zll_ek/samr21zll_ek.h"
|
||||
#elif BOARD == SAMD11_XPLAINED_PRO
|
||||
# include "samd11_xplained_pro/samd11_xplained_pro.h"
|
||||
#elif BOARD == SAML21_XPLAINED_PRO && defined(__SAML21J18A__)
|
||||
# include "saml21_xplained_pro/saml21_xplained_pro.h"
|
||||
#elif BOARD == SAML22_XPLAINED_PRO
|
||||
# include "saml22_xplained_pro/saml22_xplained_pro.h"
|
||||
#elif BOARD == SAML22_XPLAINED_PRO_B
|
||||
# include "saml22_xplained_pro_b/saml22_xplained_pro_b.h"
|
||||
#elif BOARD == SAML21_XPLAINED_PRO && defined(__SAML21J18B__)
|
||||
# include "saml21_xplained_pro_b/saml21_xplained_pro.h"
|
||||
#elif BOARD == SAMD10_XPLAINED_MINI
|
||||
# include "samd10_xplained_mini/samd10_xplained_mini.h"
|
||||
#elif BOARD == SAMDA1_XPLAINED_PRO
|
||||
# include "samda1_xplained_pro/samda1_xplained_pro.h"
|
||||
#elif BOARD == SAMHA1G16A_XPLAINED_PRO
|
||||
# include "samha1g16a_xplained_pro/samha1g16a_xplained_pro.h"
|
||||
#elif BOARD == SAMC21_XPLAINED_PRO
|
||||
# include "samc21_xplained_pro/samc21_xplained_pro.h"
|
||||
#elif BOARD == SAM4N_XPLAINED_PRO
|
||||
# include "sam4n_xplained_pro/sam4n_xplained_pro.h"
|
||||
#elif BOARD == SAMW25_XPLAINED_PRO
|
||||
# include "samw25_xplained_pro/samw25_xplained_pro.h"
|
||||
#elif BOARD == SAMV71_XPLAINED_ULTRA
|
||||
# include "samv71_xplained_ultra/samv71_xplained_ultra.h"
|
||||
#elif BOARD == MEGA1284P_XPLAINED_BC
|
||||
# include "mega1284p_xplained_bc/mega1284p_xplained_bc.h"
|
||||
#elif BOARD == UC3_L0_QT600
|
||||
# include "uc3_l0_qt600/uc3_l0_qt600.h"
|
||||
#elif BOARD == XMEGA_A3BU_XPLAINED
|
||||
# include "xmega_a3bu_xplained/xmega_a3bu_xplained.h"
|
||||
#elif BOARD == XMEGA_E5_XPLAINED
|
||||
# include "xmega_e5_xplained/xmega_e5_xplained.h"
|
||||
#elif BOARD == UC3B_BOARD_CONTROLLER
|
||||
# include "uc3b_board_controller/uc3b_board_controller.h"
|
||||
#elif BOARD == RZ600
|
||||
# include "rz600/rz600.h"
|
||||
#elif BOARD == STK600_RCUC3A0
|
||||
# include "stk600/rcuc3a0/stk600_rcuc3a0.h"
|
||||
#elif BOARD == ATXMEGA128A1_QT600
|
||||
# include "atxmega128a1_qt600/atxmega128a1_qt600.h"
|
||||
#elif BOARD == STK600_RCUC3L3
|
||||
# include "stk600/rcuc3l3/stk600_rcuc3l3.h"
|
||||
#elif BOARD == SAM4S_XPLAINED_PRO
|
||||
# include "sam4s_xplained_pro/sam4s_xplained_pro.h"
|
||||
#elif BOARD == SAM4L_XPLAINED_PRO
|
||||
# include "sam4l_xplained_pro/sam4l_xplained_pro.h"
|
||||
#elif BOARD == SAM4L8_XPLAINED_PRO
|
||||
# include "sam4l8_xplained_pro/sam4l8_xplained_pro.h"
|
||||
#elif BOARD == SAM4C_EK
|
||||
# include "sam4c_ek/sam4c_ek.h"
|
||||
#elif BOARD == SAM4CMP_DB
|
||||
# include "sam4cmp_db/sam4cmp_db.h"
|
||||
#elif BOARD == SAM4CMS_DB
|
||||
# include "sam4cms_db/sam4cms_db.h"
|
||||
#elif BOARD == SAM4CP16BMB
|
||||
# include "sam4cp16bmb/sam4cp16bmb.h"
|
||||
#elif BOARD == ATPL230AMB
|
||||
# include "atpl230amb/atpl230amb.h"
|
||||
#elif BOARD == XMEGA_C3_XPLAINED
|
||||
# include "xmega_c3_xplained/xmega_c3_xplained.h"
|
||||
#elif BOARD == XMEGA_RF233_ZIGBIT
|
||||
# include "xmega_rf233_zigbit/xmega_rf233_zigbit.h"
|
||||
#elif BOARD == XMEGA_A3_REB_CBB
|
||||
# include "xmega_a3_reb_cbb/xmega_a3_reb_cbb.h"
|
||||
#elif BOARD == ATMEGARFX_RCB
|
||||
# include "atmegarfx_rcb/atmegarfx_rcb.h"
|
||||
#elif BOARD == RCB256RFR2_XPRO
|
||||
# include "atmega256rfr2_rcb_xpro/atmega256rfr2_rcb_xpro.h"
|
||||
#elif BOARD == XMEGA_RF212B_ZIGBIT
|
||||
# include "xmega_rf212b_zigbit/xmega_rf212b_zigbit.h"
|
||||
#elif BOARD == SAM4E_XPLAINED_PRO
|
||||
# include "sam4e_xplained_pro/sam4e_xplained_pro.h"
|
||||
#elif BOARD == ATMEGA328P_XPLAINED_MINI
|
||||
# include "atmega328p_xplained_mini/atmega328p_xplained_mini.h"
|
||||
#elif BOARD == ATMEGA328PB_XPLAINED_MINI
|
||||
# include "atmega328pb_xplained_mini/atmega328pb_xplained_mini.h"
|
||||
#elif BOARD == SAMB11_XPLAINED_PRO
|
||||
# include "samb11_xplained_pro/samb11_xplained_pro.h"
|
||||
#elif BOARD == SAME70_XPLAINED
|
||||
# include "same70_xplained/same70_xplained.h"
|
||||
#elif BOARD == ATMEGA168PB_XPLAINED_MINI
|
||||
# include "atmega168pb_xplained_mini/atmega168pb_xplained_mini.h"
|
||||
#elif BOARD == ATMEGA324PB_XPLAINED_PRO
|
||||
# include "atmega324pb_xplained_pro/atmega324pb_xplained_pro.h"
|
||||
#elif BOARD == SAMB11ZR_XPLAINED_PRO
|
||||
# include "samb11zr_xplained_pro/samb11zr_xplained_pro.h"
|
||||
#elif BOARD == SIMULATOR_XMEGA_A1
|
||||
# include "simulator/xmega_a1/simulator_xmega_a1.h"
|
||||
#elif BOARD == AVR_SIMULATOR_UC3
|
||||
# include "avr_simulator_uc3/avr_simulator_uc3.h"
|
||||
#elif BOARD == SAMR21G18_MODULE
|
||||
# include "samr21g18_module/samr21g18_module.h"
|
||||
#elif BOARD == SAMR21B18_MODULE
|
||||
# include "samr21b18_module/samr21b18_module.h"
|
||||
#elif BOARD == SAMR34_XPLAINED_PRO && defined(__SAMR34J18B__)
|
||||
# include "samr34_xplained_pro/samr34_xplained_pro.h"
|
||||
#elif BOARD == USER_BOARD
|
||||
// User-reserved area: #include the header file of your board here (if any).
|
||||
# include "user_board.h"
|
||||
#elif BOARD == DUMMY_BOARD
|
||||
# include "dummy/dummy_board.h"
|
||||
#elif BOARD == SAMB11ZR_SENSOR_TAG
|
||||
# include "samb11zr_sensor_tag/samb11zr_sensor_tag.h"
|
||||
#else
|
||||
# error No known Atmel board defined
|
||||
#endif
|
||||
|
||||
#if (defined EXT_BOARD)
|
||||
# if EXT_BOARD == MC300
|
||||
# include "mc300/mc300.h"
|
||||
# elif (EXT_BOARD == SENSORS_XPLAINED_INERTIAL_1) || \
|
||||
(EXT_BOARD == SENSORS_XPLAINED_INERTIAL_2) || \
|
||||
(EXT_BOARD == SENSORS_XPLAINED_INERTIAL_A1) || \
|
||||
(EXT_BOARD == SENSORS_XPLAINED_PRESSURE_1) || \
|
||||
(EXT_BOARD == SENSORS_XPLAINED_LIGHTPROX_1) || \
|
||||
(EXT_BOARD == SENSORS_XPLAINED_BREADBOARD)
|
||||
# include "sensors_xplained/sensors_xplained.h"
|
||||
# elif EXT_BOARD == RZ600_AT86RF231
|
||||
# include "at86rf231/at86rf231.h"
|
||||
# elif EXT_BOARD == RZ600_AT86RF230B
|
||||
# include "at86rf230b/at86rf230b.h"
|
||||
# elif EXT_BOARD == RZ600_AT86RF212
|
||||
# include "at86rf212/at86rf212.h"
|
||||
# elif EXT_BOARD == SECURITY_XPLAINED
|
||||
# include "security_xplained.h"
|
||||
# elif EXT_BOARD == USER_EXT_BOARD
|
||||
// User-reserved area: #include the header file of your extension board here
|
||||
// (if any).
|
||||
# endif
|
||||
#endif
|
||||
|
||||
|
||||
#if (defined(__GNUC__) && defined(__AVR32__)) || (defined(__ICCAVR32__) || defined(__AAVR32__))
|
||||
#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
|
||||
|
||||
/*! \brief This function initializes the board target resources
|
||||
*
|
||||
* This function should be called to ensure proper initialization of the target
|
||||
* board hardware connected to the part.
|
||||
*/
|
||||
extern void board_init(void);
|
||||
|
||||
#endif // #ifdef __AVR32_ABI_COMPILER__
|
||||
#else
|
||||
/*! \brief This function initializes the board target resources
|
||||
*
|
||||
* This function should be called to ensure proper initialization of the target
|
||||
* board hardware connected to the part.
|
||||
*/
|
||||
extern void board_init(void);
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \}
|
||||
*/
|
||||
|
||||
#endif // _BOARD_H_
|
||||
|
||||
@ -1,132 +1,132 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Global interrupt management for 8- and 32-bit AVR
|
||||
*
|
||||
* Copyright (c) 2010-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#ifndef UTILS_INTERRUPT_H
|
||||
#define UTILS_INTERRUPT_H
|
||||
|
||||
#include <parts.h>
|
||||
|
||||
#if XMEGA || MEGA
|
||||
# include "interrupt/interrupt_avr8.h"
|
||||
#elif UC3
|
||||
# include "interrupt/interrupt_avr32.h"
|
||||
#elif SAM || SAMB
|
||||
# include "interrupt/interrupt_sam_nvic.h"
|
||||
#else
|
||||
# error Unsupported device.
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \defgroup interrupt_group Global interrupt management
|
||||
*
|
||||
* This is a driver for global enabling and disabling of interrupts.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(__DOXYGEN__)
|
||||
/**
|
||||
* \def CONFIG_INTERRUPT_FORCE_INTC
|
||||
* \brief Force usage of the ASF INTC driver
|
||||
*
|
||||
* Predefine this symbol when preprocessing to force the use of the ASF INTC driver.
|
||||
* This is useful to ensure compatibility across compilers and shall be used only when required
|
||||
* by the application needs.
|
||||
*/
|
||||
# define CONFIG_INTERRUPT_FORCE_INTC
|
||||
#endif
|
||||
|
||||
//! \name Global interrupt flags
|
||||
//@{
|
||||
/**
|
||||
* \typedef irqflags_t
|
||||
* \brief Type used for holding state of interrupt flag
|
||||
*/
|
||||
|
||||
/**
|
||||
* \def cpu_irq_enable
|
||||
* \brief Enable interrupts globally
|
||||
*/
|
||||
|
||||
/**
|
||||
* \def cpu_irq_disable
|
||||
* \brief Disable interrupts globally
|
||||
*/
|
||||
|
||||
/**
|
||||
* \fn irqflags_t cpu_irq_save(void)
|
||||
* \brief Get and clear the global interrupt flags
|
||||
*
|
||||
* Use in conjunction with \ref cpu_irq_restore.
|
||||
*
|
||||
* \return Current state of interrupt flags.
|
||||
*
|
||||
* \note This function leaves interrupts disabled.
|
||||
*/
|
||||
|
||||
/**
|
||||
* \fn void cpu_irq_restore(irqflags_t flags)
|
||||
* \brief Restore global interrupt flags
|
||||
*
|
||||
* Use in conjunction with \ref cpu_irq_save.
|
||||
*
|
||||
* \param flags State to set interrupt flag to.
|
||||
*/
|
||||
|
||||
/**
|
||||
* \fn bool cpu_irq_is_enabled_flags(irqflags_t flags)
|
||||
* \brief Check if interrupts are globally enabled in supplied flags
|
||||
*
|
||||
* \param flags Currents state of interrupt flags.
|
||||
*
|
||||
* \return True if interrupts are enabled.
|
||||
*/
|
||||
|
||||
/**
|
||||
* \def cpu_irq_is_enabled
|
||||
* \brief Check if interrupts are globally enabled
|
||||
*
|
||||
* \return True if interrupts are enabled.
|
||||
*/
|
||||
//@}
|
||||
|
||||
//! @}
|
||||
|
||||
/**
|
||||
* \ingroup interrupt_group
|
||||
* \defgroup interrupt_deprecated_group Deprecated interrupt definitions
|
||||
*/
|
||||
|
||||
#endif /* UTILS_INTERRUPT_H */
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Global interrupt management for 8- and 32-bit AVR
|
||||
*
|
||||
* Copyright (c) 2010-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#ifndef UTILS_INTERRUPT_H
|
||||
#define UTILS_INTERRUPT_H
|
||||
|
||||
#include <parts.h>
|
||||
|
||||
#if XMEGA || MEGA
|
||||
# include "interrupt/interrupt_avr8.h"
|
||||
#elif UC3
|
||||
# include "interrupt/interrupt_avr32.h"
|
||||
#elif SAM || SAMB
|
||||
# include "interrupt/interrupt_sam_nvic.h"
|
||||
#else
|
||||
# error Unsupported device.
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \defgroup interrupt_group Global interrupt management
|
||||
*
|
||||
* This is a driver for global enabling and disabling of interrupts.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(__DOXYGEN__)
|
||||
/**
|
||||
* \def CONFIG_INTERRUPT_FORCE_INTC
|
||||
* \brief Force usage of the ASF INTC driver
|
||||
*
|
||||
* Predefine this symbol when preprocessing to force the use of the ASF INTC driver.
|
||||
* This is useful to ensure compatibility across compilers and shall be used only when required
|
||||
* by the application needs.
|
||||
*/
|
||||
# define CONFIG_INTERRUPT_FORCE_INTC
|
||||
#endif
|
||||
|
||||
//! \name Global interrupt flags
|
||||
//@{
|
||||
/**
|
||||
* \typedef irqflags_t
|
||||
* \brief Type used for holding state of interrupt flag
|
||||
*/
|
||||
|
||||
/**
|
||||
* \def cpu_irq_enable
|
||||
* \brief Enable interrupts globally
|
||||
*/
|
||||
|
||||
/**
|
||||
* \def cpu_irq_disable
|
||||
* \brief Disable interrupts globally
|
||||
*/
|
||||
|
||||
/**
|
||||
* \fn irqflags_t cpu_irq_save(void)
|
||||
* \brief Get and clear the global interrupt flags
|
||||
*
|
||||
* Use in conjunction with \ref cpu_irq_restore.
|
||||
*
|
||||
* \return Current state of interrupt flags.
|
||||
*
|
||||
* \note This function leaves interrupts disabled.
|
||||
*/
|
||||
|
||||
/**
|
||||
* \fn void cpu_irq_restore(irqflags_t flags)
|
||||
* \brief Restore global interrupt flags
|
||||
*
|
||||
* Use in conjunction with \ref cpu_irq_save.
|
||||
*
|
||||
* \param flags State to set interrupt flag to.
|
||||
*/
|
||||
|
||||
/**
|
||||
* \fn bool cpu_irq_is_enabled_flags(irqflags_t flags)
|
||||
* \brief Check if interrupts are globally enabled in supplied flags
|
||||
*
|
||||
* \param flags Currents state of interrupt flags.
|
||||
*
|
||||
* \return True if interrupts are enabled.
|
||||
*/
|
||||
|
||||
/**
|
||||
* \def cpu_irq_is_enabled
|
||||
* \brief Check if interrupts are globally enabled
|
||||
*
|
||||
* \return True if interrupts are enabled.
|
||||
*/
|
||||
//@}
|
||||
|
||||
//! @}
|
||||
|
||||
/**
|
||||
* \ingroup interrupt_group
|
||||
* \defgroup interrupt_deprecated_group Deprecated interrupt definitions
|
||||
*/
|
||||
|
||||
#endif /* UTILS_INTERRUPT_H */
|
||||
|
||||
@ -1,76 +1,76 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Global interrupt management for SAM D20, SAM3 and SAM4 (NVIC based)
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
#include "interrupt_sam_nvic.h"
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
/* Deprecated - global flag to determine the global interrupt state. Required by
|
||||
* QTouch library, however new applications should use cpu_irq_is_enabled()
|
||||
* which probes the true global interrupt state from the CPU special registers.
|
||||
*/
|
||||
volatile bool g_interrupt_enabled = true;
|
||||
#endif
|
||||
|
||||
void cpu_irq_enter_critical(void)
|
||||
{
|
||||
if (cpu_irq_critical_section_counter == 0) {
|
||||
if (cpu_irq_is_enabled()) {
|
||||
cpu_irq_disable();
|
||||
cpu_irq_prev_interrupt_state = true;
|
||||
} else {
|
||||
/* Make sure the to save the prev state as false */
|
||||
cpu_irq_prev_interrupt_state = false;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
cpu_irq_critical_section_counter++;
|
||||
}
|
||||
|
||||
void cpu_irq_leave_critical(void)
|
||||
{
|
||||
/* Check if the user is trying to leave a critical section when not in a critical section */
|
||||
Assert(cpu_irq_critical_section_counter > 0);
|
||||
|
||||
cpu_irq_critical_section_counter--;
|
||||
|
||||
/* Only enable global interrupts when the counter reaches 0 and the state of the global interrupt flag
|
||||
was enabled when entering critical state */
|
||||
if ((cpu_irq_critical_section_counter == 0) && (cpu_irq_prev_interrupt_state)) {
|
||||
cpu_irq_enable();
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Global interrupt management for SAM D20, SAM3 and SAM4 (NVIC based)
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
#include "interrupt_sam_nvic.h"
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
/* Deprecated - global flag to determine the global interrupt state. Required by
|
||||
* QTouch library, however new applications should use cpu_irq_is_enabled()
|
||||
* which probes the true global interrupt state from the CPU special registers.
|
||||
*/
|
||||
volatile bool g_interrupt_enabled = true;
|
||||
#endif
|
||||
|
||||
void cpu_irq_enter_critical(void)
|
||||
{
|
||||
if (cpu_irq_critical_section_counter == 0) {
|
||||
if (cpu_irq_is_enabled()) {
|
||||
cpu_irq_disable();
|
||||
cpu_irq_prev_interrupt_state = true;
|
||||
} else {
|
||||
/* Make sure the to save the prev state as false */
|
||||
cpu_irq_prev_interrupt_state = false;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
cpu_irq_critical_section_counter++;
|
||||
}
|
||||
|
||||
void cpu_irq_leave_critical(void)
|
||||
{
|
||||
/* Check if the user is trying to leave a critical section when not in a critical section */
|
||||
Assert(cpu_irq_critical_section_counter > 0);
|
||||
|
||||
cpu_irq_critical_section_counter--;
|
||||
|
||||
/* Only enable global interrupts when the counter reaches 0 and the state of the global interrupt flag
|
||||
was enabled when entering critical state */
|
||||
if ((cpu_irq_critical_section_counter == 0) && (cpu_irq_prev_interrupt_state)) {
|
||||
cpu_irq_enable();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@ -1,179 +1,179 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Global interrupt management for SAM D20, SAM3 and SAM4 (NVIC based)
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
#ifndef UTILS_INTERRUPT_INTERRUPT_H
|
||||
#define UTILS_INTERRUPT_INTERRUPT_H
|
||||
|
||||
#include <compiler.h>
|
||||
#include <parts.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \weakgroup interrupt_group
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \name Interrupt Service Routine definition
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Define service routine
|
||||
*
|
||||
* \note For NVIC devices the interrupt service routines are predefined to
|
||||
* add to vector table in binary generation, so there is no service
|
||||
* register at run time. The routine collections are in exceptions.h.
|
||||
*
|
||||
* Usage:
|
||||
* \code
|
||||
ISR(foo_irq_handler)
|
||||
{
|
||||
// Function definition
|
||||
...
|
||||
}
|
||||
\endcode
|
||||
*
|
||||
* \param func Name for the function.
|
||||
*/
|
||||
# define ISR(func) \
|
||||
void func (void)
|
||||
|
||||
/**
|
||||
* \brief Initialize interrupt vectors
|
||||
*
|
||||
* For NVIC the interrupt vectors are put in vector table. So nothing
|
||||
* to do to initialize them, except defined the vector function with
|
||||
* right name.
|
||||
*
|
||||
* This must be called prior to \ref irq_register_handler.
|
||||
*/
|
||||
# define irq_initialize_vectors() \
|
||||
do { \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* \brief Register handler for interrupt
|
||||
*
|
||||
* For NVIC the interrupt vectors are put in vector table. So nothing
|
||||
* to do to register them, except defined the vector function with
|
||||
* right name.
|
||||
*
|
||||
* Usage:
|
||||
* \code
|
||||
irq_initialize_vectors();
|
||||
irq_register_handler(foo_irq_handler);
|
||||
\endcode
|
||||
*
|
||||
* \note The function \a func must be defined with the \ref ISR macro.
|
||||
* \note The functions prototypes can be found in the device exception header
|
||||
* files (exceptions.h).
|
||||
*/
|
||||
# define irq_register_handler(int_num, int_prio) \
|
||||
NVIC_ClearPendingIRQ( (IRQn_Type)int_num); \
|
||||
NVIC_SetPriority( (IRQn_Type)int_num, int_prio); \
|
||||
NVIC_EnableIRQ( (IRQn_Type)int_num); \
|
||||
|
||||
//@}
|
||||
|
||||
# define cpu_irq_enable() \
|
||||
do { \
|
||||
g_interrupt_enabled = true; \
|
||||
__DMB(); \
|
||||
__enable_irq(); \
|
||||
} while (0)
|
||||
# define cpu_irq_disable() \
|
||||
do { \
|
||||
__disable_irq(); \
|
||||
__DMB(); \
|
||||
g_interrupt_enabled = false; \
|
||||
} while (0)
|
||||
|
||||
typedef uint32_t irqflags_t;
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
extern volatile bool g_interrupt_enabled;
|
||||
#endif
|
||||
|
||||
#define cpu_irq_is_enabled() (__get_PRIMASK() == 0)
|
||||
|
||||
static volatile uint32_t cpu_irq_critical_section_counter;
|
||||
static volatile bool cpu_irq_prev_interrupt_state;
|
||||
|
||||
static inline irqflags_t cpu_irq_save(void)
|
||||
{
|
||||
volatile irqflags_t flags = cpu_irq_is_enabled();
|
||||
cpu_irq_disable();
|
||||
return flags;
|
||||
}
|
||||
|
||||
static inline bool cpu_irq_is_enabled_flags(irqflags_t flags)
|
||||
{
|
||||
return (flags);
|
||||
}
|
||||
|
||||
static inline void cpu_irq_restore(irqflags_t flags)
|
||||
{
|
||||
if (cpu_irq_is_enabled_flags(flags))
|
||||
cpu_irq_enable();
|
||||
}
|
||||
|
||||
void cpu_irq_enter_critical(void);
|
||||
void cpu_irq_leave_critical(void);
|
||||
|
||||
/**
|
||||
* \weakgroup interrupt_deprecated_group
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define Enable_global_interrupt() cpu_irq_enable()
|
||||
#define Disable_global_interrupt() cpu_irq_disable()
|
||||
#define Is_global_interrupt_enabled() cpu_irq_is_enabled()
|
||||
|
||||
//@}
|
||||
|
||||
//@}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* UTILS_INTERRUPT_INTERRUPT_H */
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Global interrupt management for SAM D20, SAM3 and SAM4 (NVIC based)
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
#ifndef UTILS_INTERRUPT_INTERRUPT_H
|
||||
#define UTILS_INTERRUPT_INTERRUPT_H
|
||||
|
||||
#include <compiler.h>
|
||||
#include <parts.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \weakgroup interrupt_group
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \name Interrupt Service Routine definition
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Define service routine
|
||||
*
|
||||
* \note For NVIC devices the interrupt service routines are predefined to
|
||||
* add to vector table in binary generation, so there is no service
|
||||
* register at run time. The routine collections are in exceptions.h.
|
||||
*
|
||||
* Usage:
|
||||
* \code
|
||||
ISR(foo_irq_handler)
|
||||
{
|
||||
// Function definition
|
||||
...
|
||||
}
|
||||
\endcode
|
||||
*
|
||||
* \param func Name for the function.
|
||||
*/
|
||||
# define ISR(func) \
|
||||
void func (void)
|
||||
|
||||
/**
|
||||
* \brief Initialize interrupt vectors
|
||||
*
|
||||
* For NVIC the interrupt vectors are put in vector table. So nothing
|
||||
* to do to initialize them, except defined the vector function with
|
||||
* right name.
|
||||
*
|
||||
* This must be called prior to \ref irq_register_handler.
|
||||
*/
|
||||
# define irq_initialize_vectors() \
|
||||
do { \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* \brief Register handler for interrupt
|
||||
*
|
||||
* For NVIC the interrupt vectors are put in vector table. So nothing
|
||||
* to do to register them, except defined the vector function with
|
||||
* right name.
|
||||
*
|
||||
* Usage:
|
||||
* \code
|
||||
irq_initialize_vectors();
|
||||
irq_register_handler(foo_irq_handler);
|
||||
\endcode
|
||||
*
|
||||
* \note The function \a func must be defined with the \ref ISR macro.
|
||||
* \note The functions prototypes can be found in the device exception header
|
||||
* files (exceptions.h).
|
||||
*/
|
||||
# define irq_register_handler(int_num, int_prio) \
|
||||
NVIC_ClearPendingIRQ( (IRQn_Type)int_num); \
|
||||
NVIC_SetPriority( (IRQn_Type)int_num, int_prio); \
|
||||
NVIC_EnableIRQ( (IRQn_Type)int_num); \
|
||||
|
||||
//@}
|
||||
|
||||
# define cpu_irq_enable() \
|
||||
do { \
|
||||
g_interrupt_enabled = true; \
|
||||
__DMB(); \
|
||||
__enable_irq(); \
|
||||
} while (0)
|
||||
# define cpu_irq_disable() \
|
||||
do { \
|
||||
__disable_irq(); \
|
||||
__DMB(); \
|
||||
g_interrupt_enabled = false; \
|
||||
} while (0)
|
||||
|
||||
typedef uint32_t irqflags_t;
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
extern volatile bool g_interrupt_enabled;
|
||||
#endif
|
||||
|
||||
#define cpu_irq_is_enabled() (__get_PRIMASK() == 0)
|
||||
|
||||
static volatile uint32_t cpu_irq_critical_section_counter;
|
||||
static volatile bool cpu_irq_prev_interrupt_state;
|
||||
|
||||
static inline irqflags_t cpu_irq_save(void)
|
||||
{
|
||||
volatile irqflags_t flags = cpu_irq_is_enabled();
|
||||
cpu_irq_disable();
|
||||
return flags;
|
||||
}
|
||||
|
||||
static inline bool cpu_irq_is_enabled_flags(irqflags_t flags)
|
||||
{
|
||||
return (flags);
|
||||
}
|
||||
|
||||
static inline void cpu_irq_restore(irqflags_t flags)
|
||||
{
|
||||
if (cpu_irq_is_enabled_flags(flags))
|
||||
cpu_irq_enable();
|
||||
}
|
||||
|
||||
void cpu_irq_enter_critical(void);
|
||||
void cpu_irq_leave_critical(void);
|
||||
|
||||
/**
|
||||
* \weakgroup interrupt_deprecated_group
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define Enable_global_interrupt() cpu_irq_enable()
|
||||
#define Disable_global_interrupt() cpu_irq_disable()
|
||||
#define Is_global_interrupt_enabled() cpu_irq_is_enabled()
|
||||
|
||||
//@}
|
||||
|
||||
//@}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* UTILS_INTERRUPT_INTERRUPT_H */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,91 +1,91 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Common Delay Service
|
||||
*
|
||||
* Copyright (c) 2013-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#ifndef DELAY_H_INCLUDED
|
||||
#define DELAY_H_INCLUDED
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @defgroup group_common_services_delay Busy-Wait Delay Routines
|
||||
*
|
||||
* This module provides simple loop-based delay routines for those
|
||||
* applications requiring a brief wait during execution. Common for
|
||||
* API ver. 2.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifdef SYSTICK_MODE
|
||||
#include "sam0/systick_counter.h"
|
||||
#endif
|
||||
#ifdef CYCLE_MODE
|
||||
#include "sam0/cycle_counter.h"
|
||||
#endif
|
||||
|
||||
void delay_init(void);
|
||||
|
||||
/**
|
||||
* \def delay_s
|
||||
* \brief Delay in at least specified number of seconds.
|
||||
* \param delay Delay in seconds
|
||||
*/
|
||||
#define delay_s(delay) ((delay) ? cpu_delay_s(delay) : cpu_delay_us(1))
|
||||
|
||||
/**
|
||||
* \def delay_ms
|
||||
* \brief Delay in at least specified number of milliseconds.
|
||||
* \param delay Delay in milliseconds
|
||||
*/
|
||||
#define delay_ms(delay) ((delay) ? cpu_delay_ms(delay) : cpu_delay_us(1))
|
||||
|
||||
/**
|
||||
* \def delay_us
|
||||
* \brief Delay in at least specified number of microseconds.
|
||||
* \param delay Delay in microseconds
|
||||
*/
|
||||
#define delay_us(delay) ((delay) ? cpu_delay_us(delay) : cpu_delay_us(1))
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* DELAY_H_INCLUDED */
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Common Delay Service
|
||||
*
|
||||
* Copyright (c) 2013-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#ifndef DELAY_H_INCLUDED
|
||||
#define DELAY_H_INCLUDED
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @defgroup group_common_services_delay Busy-Wait Delay Routines
|
||||
*
|
||||
* This module provides simple loop-based delay routines for those
|
||||
* applications requiring a brief wait during execution. Common for
|
||||
* API ver. 2.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifdef SYSTICK_MODE
|
||||
#include "sam0/systick_counter.h"
|
||||
#endif
|
||||
#ifdef CYCLE_MODE
|
||||
#include "sam0/cycle_counter.h"
|
||||
#endif
|
||||
|
||||
void delay_init(void);
|
||||
|
||||
/**
|
||||
* \def delay_s
|
||||
* \brief Delay in at least specified number of seconds.
|
||||
* \param delay Delay in seconds
|
||||
*/
|
||||
#define delay_s(delay) ((delay) ? cpu_delay_s(delay) : cpu_delay_us(1))
|
||||
|
||||
/**
|
||||
* \def delay_ms
|
||||
* \brief Delay in at least specified number of milliseconds.
|
||||
* \param delay Delay in milliseconds
|
||||
*/
|
||||
#define delay_ms(delay) ((delay) ? cpu_delay_ms(delay) : cpu_delay_us(1))
|
||||
|
||||
/**
|
||||
* \def delay_us
|
||||
* \brief Delay in at least specified number of microseconds.
|
||||
* \param delay Delay in microseconds
|
||||
*/
|
||||
#define delay_us(delay) ((delay) ? cpu_delay_us(delay) : cpu_delay_us(1))
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* DELAY_H_INCLUDED */
|
||||
|
||||
@ -1,86 +1,86 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief ARM functions for busy-wait delay loops
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
#include "delay.h"
|
||||
|
||||
/**
|
||||
* Value used to calculate ms delay. Default to be used with a 8MHz clock;
|
||||
*/
|
||||
static uint32_t cycles_per_ms = 8000000UL / 1000;
|
||||
static uint32_t cycles_per_us = 8000000UL / 1000000;
|
||||
|
||||
/**
|
||||
* \brief Initialize the delay driver.
|
||||
*
|
||||
* This must be called during start up to initialize the delay routine with
|
||||
* the current used main clock. It must run any time the main CPU clock is changed.
|
||||
*/
|
||||
void delay_init(void)
|
||||
{
|
||||
cycles_per_ms = system_gclk_gen_get_hz(0);
|
||||
cycles_per_ms /= 1000;
|
||||
cycles_per_us = cycles_per_ms / 1000;
|
||||
|
||||
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Delay loop to delay at least n number of microseconds
|
||||
*
|
||||
* \param n Number of microseconds to wait
|
||||
*/
|
||||
void delay_cycles_us(
|
||||
uint32_t n)
|
||||
{
|
||||
while (n--) {
|
||||
/* Devide up to blocks of 10u */
|
||||
delay_cycles(cycles_per_us);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Delay loop to delay at least n number of milliseconds
|
||||
*
|
||||
* \param n Number of milliseconds to wait
|
||||
*/
|
||||
void delay_cycles_ms(
|
||||
uint32_t n)
|
||||
{
|
||||
while (n--) {
|
||||
/* Devide up to blocks of 1ms */
|
||||
delay_cycles(cycles_per_ms);
|
||||
}
|
||||
}
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief ARM functions for busy-wait delay loops
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
#include "delay.h"
|
||||
|
||||
/**
|
||||
* Value used to calculate ms delay. Default to be used with a 8MHz clock;
|
||||
*/
|
||||
static uint32_t cycles_per_ms = 8000000UL / 1000;
|
||||
static uint32_t cycles_per_us = 8000000UL / 1000000;
|
||||
|
||||
/**
|
||||
* \brief Initialize the delay driver.
|
||||
*
|
||||
* This must be called during start up to initialize the delay routine with
|
||||
* the current used main clock. It must run any time the main CPU clock is changed.
|
||||
*/
|
||||
void delay_init(void)
|
||||
{
|
||||
cycles_per_ms = system_gclk_gen_get_hz(0);
|
||||
cycles_per_ms /= 1000;
|
||||
cycles_per_us = cycles_per_ms / 1000;
|
||||
|
||||
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Delay loop to delay at least n number of microseconds
|
||||
*
|
||||
* \param n Number of microseconds to wait
|
||||
*/
|
||||
void delay_cycles_us(
|
||||
uint32_t n)
|
||||
{
|
||||
while (n--) {
|
||||
/* Devide up to blocks of 10u */
|
||||
delay_cycles(cycles_per_us);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Delay loop to delay at least n number of milliseconds
|
||||
*
|
||||
* \param n Number of milliseconds to wait
|
||||
*/
|
||||
void delay_cycles_ms(
|
||||
uint32_t n)
|
||||
{
|
||||
while (n--) {
|
||||
/* Devide up to blocks of 1ms */
|
||||
delay_cycles(cycles_per_ms);
|
||||
}
|
||||
}
|
||||
|
||||
@ -1,103 +1,103 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief ARM functions for busy-wait delay loops
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#ifndef CYCLE_COUNTER_H_INCLUDED
|
||||
#define CYCLE_COUNTER_H_INCLUDED
|
||||
|
||||
#include <compiler.h>
|
||||
#include <clock.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \name Convenience functions for busy-wait delay loops
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Delay loop to delay n number of cycles
|
||||
* Delay program execution for at least the specified number of CPU cycles.
|
||||
*
|
||||
* \param n Number of cycles to delay
|
||||
*/
|
||||
static inline void delay_cycles(
|
||||
const uint32_t n)
|
||||
{
|
||||
if (n > 0) {
|
||||
SysTick->LOAD = n;
|
||||
SysTick->VAL = 0;
|
||||
|
||||
while (!(SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk)) {
|
||||
};
|
||||
}
|
||||
}
|
||||
|
||||
void delay_cycles_us(uint32_t n);
|
||||
|
||||
void delay_cycles_ms(uint32_t n);
|
||||
|
||||
/**
|
||||
* \brief Delay program execution for at least the specified number of microseconds.
|
||||
*
|
||||
* \param delay number of microseconds to wait
|
||||
*/
|
||||
#define cpu_delay_us(delay) delay_cycles_us(delay)
|
||||
|
||||
/**
|
||||
* \brief Delay program execution for at least the specified number of milliseconds.
|
||||
*
|
||||
* \param delay number of milliseconds to wait
|
||||
*/
|
||||
#define cpu_delay_ms(delay) delay_cycles_ms(delay)
|
||||
|
||||
/**
|
||||
* \brief Delay program execution for at least the specified number of seconds.
|
||||
*
|
||||
* \param delay number of seconds to wait
|
||||
*/
|
||||
#define cpu_delay_s(delay) delay_cycles_ms(1000 * delay)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CYCLE_COUNTER_H_INCLUDED */
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief ARM functions for busy-wait delay loops
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#ifndef CYCLE_COUNTER_H_INCLUDED
|
||||
#define CYCLE_COUNTER_H_INCLUDED
|
||||
|
||||
#include <compiler.h>
|
||||
#include <clock.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \name Convenience functions for busy-wait delay loops
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Delay loop to delay n number of cycles
|
||||
* Delay program execution for at least the specified number of CPU cycles.
|
||||
*
|
||||
* \param n Number of cycles to delay
|
||||
*/
|
||||
static inline void delay_cycles(
|
||||
const uint32_t n)
|
||||
{
|
||||
if (n > 0) {
|
||||
SysTick->LOAD = n;
|
||||
SysTick->VAL = 0;
|
||||
|
||||
while (!(SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk)) {
|
||||
};
|
||||
}
|
||||
}
|
||||
|
||||
void delay_cycles_us(uint32_t n);
|
||||
|
||||
void delay_cycles_ms(uint32_t n);
|
||||
|
||||
/**
|
||||
* \brief Delay program execution for at least the specified number of microseconds.
|
||||
*
|
||||
* \param delay number of microseconds to wait
|
||||
*/
|
||||
#define cpu_delay_us(delay) delay_cycles_us(delay)
|
||||
|
||||
/**
|
||||
* \brief Delay program execution for at least the specified number of milliseconds.
|
||||
*
|
||||
* \param delay number of milliseconds to wait
|
||||
*/
|
||||
#define cpu_delay_ms(delay) delay_cycles_ms(delay)
|
||||
|
||||
/**
|
||||
* \brief Delay program execution for at least the specified number of seconds.
|
||||
*
|
||||
* \param delay number of seconds to wait
|
||||
*/
|
||||
#define cpu_delay_s(delay) delay_cycles_ms(1000 * delay)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CYCLE_COUNTER_H_INCLUDED */
|
||||
|
||||
@ -1,80 +1,80 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM D21 Xplained Pro board initialization
|
||||
*
|
||||
* Copyright (c) 2013-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
#include <compiler.h>
|
||||
#include <board.h>
|
||||
#include <conf_board.h>
|
||||
#include <port.h>
|
||||
|
||||
#if defined(__GNUC__)
|
||||
void board_init(void) WEAK __attribute__((alias("system_board_init")));
|
||||
#elif defined(__ICCARM__)
|
||||
void board_init(void);
|
||||
# pragma weak board_init=system_board_init
|
||||
#endif
|
||||
|
||||
void system_board_init(void)
|
||||
{
|
||||
struct port_config pin_conf;
|
||||
port_get_config_defaults(&pin_conf);
|
||||
|
||||
/* Configure LEDs as outputs, turn them off */
|
||||
pin_conf.direction = PORT_PIN_DIR_OUTPUT;
|
||||
port_pin_set_config(LED_0_PIN, &pin_conf);
|
||||
port_pin_set_output_level(LED_0_PIN, LED_0_INACTIVE);
|
||||
|
||||
/* Set buttons as inputs */
|
||||
pin_conf.direction = PORT_PIN_DIR_INPUT;
|
||||
pin_conf.input_pull = PORT_PIN_PULL_UP;
|
||||
port_pin_set_config(BUTTON_0_PIN, &pin_conf);
|
||||
|
||||
#ifdef CONF_BOARD_AT86RFX
|
||||
port_get_config_defaults(&pin_conf);
|
||||
pin_conf.direction = PORT_PIN_DIR_OUTPUT;
|
||||
port_pin_set_config(AT86RFX_SPI_SCK, &pin_conf);
|
||||
port_pin_set_config(AT86RFX_SPI_MOSI, &pin_conf);
|
||||
port_pin_set_config(AT86RFX_SPI_CS, &pin_conf);
|
||||
port_pin_set_config(AT86RFX_RST_PIN, &pin_conf);
|
||||
port_pin_set_config(AT86RFX_SLP_PIN, &pin_conf);
|
||||
port_pin_set_output_level(AT86RFX_SPI_SCK, true);
|
||||
port_pin_set_output_level(AT86RFX_SPI_MOSI, true);
|
||||
port_pin_set_output_level(AT86RFX_SPI_CS, true);
|
||||
port_pin_set_output_level(AT86RFX_RST_PIN, true);
|
||||
port_pin_set_output_level(AT86RFX_SLP_PIN, true);
|
||||
pin_conf.direction = PORT_PIN_DIR_INPUT;
|
||||
port_pin_set_config(AT86RFX_SPI_MISO, &pin_conf);
|
||||
#endif
|
||||
}
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM D21 Xplained Pro board initialization
|
||||
*
|
||||
* Copyright (c) 2013-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
#include <compiler.h>
|
||||
#include <board.h>
|
||||
#include <conf_board.h>
|
||||
#include <port.h>
|
||||
|
||||
#if defined(__GNUC__)
|
||||
void board_init(void) WEAK __attribute__((alias("system_board_init")));
|
||||
#elif defined(__ICCARM__)
|
||||
void board_init(void);
|
||||
# pragma weak board_init=system_board_init
|
||||
#endif
|
||||
|
||||
void system_board_init(void)
|
||||
{
|
||||
struct port_config pin_conf;
|
||||
port_get_config_defaults(&pin_conf);
|
||||
|
||||
/* Configure LEDs as outputs, turn them off */
|
||||
pin_conf.direction = PORT_PIN_DIR_OUTPUT;
|
||||
port_pin_set_config(LED_0_PIN, &pin_conf);
|
||||
port_pin_set_output_level(LED_0_PIN, LED_0_INACTIVE);
|
||||
|
||||
/* Set buttons as inputs */
|
||||
pin_conf.direction = PORT_PIN_DIR_INPUT;
|
||||
pin_conf.input_pull = PORT_PIN_PULL_UP;
|
||||
port_pin_set_config(BUTTON_0_PIN, &pin_conf);
|
||||
|
||||
#ifdef CONF_BOARD_AT86RFX
|
||||
port_get_config_defaults(&pin_conf);
|
||||
pin_conf.direction = PORT_PIN_DIR_OUTPUT;
|
||||
port_pin_set_config(AT86RFX_SPI_SCK, &pin_conf);
|
||||
port_pin_set_config(AT86RFX_SPI_MOSI, &pin_conf);
|
||||
port_pin_set_config(AT86RFX_SPI_CS, &pin_conf);
|
||||
port_pin_set_config(AT86RFX_RST_PIN, &pin_conf);
|
||||
port_pin_set_config(AT86RFX_SLP_PIN, &pin_conf);
|
||||
port_pin_set_output_level(AT86RFX_SPI_SCK, true);
|
||||
port_pin_set_output_level(AT86RFX_SPI_MOSI, true);
|
||||
port_pin_set_output_level(AT86RFX_SPI_CS, true);
|
||||
port_pin_set_output_level(AT86RFX_RST_PIN, true);
|
||||
port_pin_set_output_level(AT86RFX_SLP_PIN, true);
|
||||
pin_conf.direction = PORT_PIN_DIR_INPUT;
|
||||
port_pin_set_config(AT86RFX_SPI_MISO, &pin_conf);
|
||||
#endif
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,172 +1,172 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Peripheral Analog-to-Digital Converter Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
#ifndef ADC_CALLBACK_H_INCLUDED
|
||||
#define ADC_CALLBACK_H_INCLUDED
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \addtogroup asfdoc_sam0_adc_group
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include <adc.h>
|
||||
|
||||
/**
|
||||
* Enum for the possible types of ADC asynchronous jobs that may be issued to
|
||||
* the driver.
|
||||
*/
|
||||
enum adc_job_type {
|
||||
/** Asynchronous ADC read into a user provided buffer */
|
||||
ADC_JOB_READ_BUFFER,
|
||||
};
|
||||
|
||||
/**
|
||||
* \name Callback Management
|
||||
* @{
|
||||
*/
|
||||
void adc_register_callback(
|
||||
struct adc_module *const module,
|
||||
adc_callback_t callback_func,
|
||||
enum adc_callback callback_type);
|
||||
|
||||
void adc_unregister_callback(
|
||||
struct adc_module *module,
|
||||
enum adc_callback callback_type);
|
||||
|
||||
/**
|
||||
* \brief Enables callback.
|
||||
*
|
||||
* Enables the callback function registered by \ref
|
||||
* adc_register_callback. The callback function will be called from the
|
||||
* interrupt handler when the conditions for the callback type are met.
|
||||
*
|
||||
* \param[in] module Pointer to ADC software instance struct
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*
|
||||
* \return Status of the operation.
|
||||
* \retval STATUS_OK If operation was completed
|
||||
* \retval STATUS_ERR_INVALID If operation was not completed,
|
||||
* due to invalid callback_type
|
||||
*
|
||||
*/
|
||||
static inline void adc_enable_callback(
|
||||
struct adc_module *const module,
|
||||
enum adc_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
|
||||
/* Enable callback */
|
||||
module->enabled_callback_mask |= (1 << callback_type);
|
||||
|
||||
/* Enable window interrupt if this is a window callback */
|
||||
if (callback_type == ADC_CALLBACK_WINDOW) {
|
||||
adc_enable_interrupt(module, ADC_INTERRUPT_WINDOW);
|
||||
}
|
||||
/* Enable overrun interrupt if error callback is registered */
|
||||
if (callback_type == ADC_CALLBACK_ERROR) {
|
||||
adc_enable_interrupt(module, ADC_INTERRUPT_OVERRUN);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disables callback.
|
||||
*
|
||||
* Disables the callback function registered by the \ref
|
||||
* adc_register_callback.
|
||||
*
|
||||
* \param[in] module Pointer to ADC software instance struct
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*
|
||||
* \return Status of the operation.
|
||||
* \retval STATUS_OK If operation was completed
|
||||
* \retval STATUS_ERR_INVALID If operation was not completed,
|
||||
* due to invalid callback_type
|
||||
*
|
||||
*/
|
||||
static inline void adc_disable_callback(
|
||||
struct adc_module *const module,
|
||||
enum adc_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
|
||||
/* Disable callback */
|
||||
module->enabled_callback_mask &= ~(1 << callback_type);
|
||||
|
||||
/* Disable window interrupt if this is a window callback */
|
||||
if (callback_type == ADC_CALLBACK_WINDOW) {
|
||||
adc_disable_interrupt(module, ADC_INTERRUPT_WINDOW);
|
||||
}
|
||||
/* Disable overrun interrupt if this is the error callback */
|
||||
if (callback_type == ADC_CALLBACK_ERROR) {
|
||||
adc_disable_interrupt(module, ADC_INTERRUPT_OVERRUN);
|
||||
}
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
|
||||
/**
|
||||
* \name Job Management
|
||||
* @{
|
||||
*/
|
||||
enum status_code adc_read_buffer_job(
|
||||
struct adc_module *const module_inst,
|
||||
uint16_t *buffer,
|
||||
uint16_t samples);
|
||||
|
||||
enum status_code adc_get_job_status(
|
||||
struct adc_module *module_inst,
|
||||
enum adc_job_type type);
|
||||
|
||||
void adc_abort_job(
|
||||
struct adc_module *module_inst,
|
||||
enum adc_job_type type);
|
||||
/** @} */
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ADC_CALLBACK_H_INCLUDED */
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Peripheral Analog-to-Digital Converter Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
#ifndef ADC_CALLBACK_H_INCLUDED
|
||||
#define ADC_CALLBACK_H_INCLUDED
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \addtogroup asfdoc_sam0_adc_group
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include <adc.h>
|
||||
|
||||
/**
|
||||
* Enum for the possible types of ADC asynchronous jobs that may be issued to
|
||||
* the driver.
|
||||
*/
|
||||
enum adc_job_type {
|
||||
/** Asynchronous ADC read into a user provided buffer */
|
||||
ADC_JOB_READ_BUFFER,
|
||||
};
|
||||
|
||||
/**
|
||||
* \name Callback Management
|
||||
* @{
|
||||
*/
|
||||
void adc_register_callback(
|
||||
struct adc_module *const module,
|
||||
adc_callback_t callback_func,
|
||||
enum adc_callback callback_type);
|
||||
|
||||
void adc_unregister_callback(
|
||||
struct adc_module *module,
|
||||
enum adc_callback callback_type);
|
||||
|
||||
/**
|
||||
* \brief Enables callback.
|
||||
*
|
||||
* Enables the callback function registered by \ref
|
||||
* adc_register_callback. The callback function will be called from the
|
||||
* interrupt handler when the conditions for the callback type are met.
|
||||
*
|
||||
* \param[in] module Pointer to ADC software instance struct
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*
|
||||
* \return Status of the operation.
|
||||
* \retval STATUS_OK If operation was completed
|
||||
* \retval STATUS_ERR_INVALID If operation was not completed,
|
||||
* due to invalid callback_type
|
||||
*
|
||||
*/
|
||||
static inline void adc_enable_callback(
|
||||
struct adc_module *const module,
|
||||
enum adc_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
|
||||
/* Enable callback */
|
||||
module->enabled_callback_mask |= (1 << callback_type);
|
||||
|
||||
/* Enable window interrupt if this is a window callback */
|
||||
if (callback_type == ADC_CALLBACK_WINDOW) {
|
||||
adc_enable_interrupt(module, ADC_INTERRUPT_WINDOW);
|
||||
}
|
||||
/* Enable overrun interrupt if error callback is registered */
|
||||
if (callback_type == ADC_CALLBACK_ERROR) {
|
||||
adc_enable_interrupt(module, ADC_INTERRUPT_OVERRUN);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disables callback.
|
||||
*
|
||||
* Disables the callback function registered by the \ref
|
||||
* adc_register_callback.
|
||||
*
|
||||
* \param[in] module Pointer to ADC software instance struct
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*
|
||||
* \return Status of the operation.
|
||||
* \retval STATUS_OK If operation was completed
|
||||
* \retval STATUS_ERR_INVALID If operation was not completed,
|
||||
* due to invalid callback_type
|
||||
*
|
||||
*/
|
||||
static inline void adc_disable_callback(
|
||||
struct adc_module *const module,
|
||||
enum adc_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
|
||||
/* Disable callback */
|
||||
module->enabled_callback_mask &= ~(1 << callback_type);
|
||||
|
||||
/* Disable window interrupt if this is a window callback */
|
||||
if (callback_type == ADC_CALLBACK_WINDOW) {
|
||||
adc_disable_interrupt(module, ADC_INTERRUPT_WINDOW);
|
||||
}
|
||||
/* Disable overrun interrupt if this is the error callback */
|
||||
if (callback_type == ADC_CALLBACK_ERROR) {
|
||||
adc_disable_interrupt(module, ADC_INTERRUPT_OVERRUN);
|
||||
}
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
|
||||
/**
|
||||
* \name Job Management
|
||||
* @{
|
||||
*/
|
||||
enum status_code adc_read_buffer_job(
|
||||
struct adc_module *const module_inst,
|
||||
uint16_t *buffer,
|
||||
uint16_t samples);
|
||||
|
||||
enum status_code adc_get_job_status(
|
||||
struct adc_module *module_inst,
|
||||
enum adc_job_type type);
|
||||
|
||||
void adc_abort_job(
|
||||
struct adc_module *module_inst,
|
||||
enum adc_job_type type);
|
||||
/** @} */
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ADC_CALLBACK_H_INCLUDED */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,247 +1,247 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Peripheral Analog-to-Digital Converter Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#include "adc_callback.h"
|
||||
|
||||
struct adc_module *_adc_instances[ADC_INST_NUM];
|
||||
|
||||
static void _adc_interrupt_handler(const uint8_t instance)
|
||||
{
|
||||
struct adc_module *module = _adc_instances[instance];
|
||||
|
||||
/* get interrupt flags and mask out enabled callbacks */
|
||||
uint32_t flags = module->hw->INTFLAG.reg & module->hw->INTENSET.reg;
|
||||
|
||||
if (flags & ADC_INTFLAG_RESRDY) {
|
||||
/* clear interrupt flag */
|
||||
module->hw->INTFLAG.reg = ADC_INTFLAG_RESRDY;
|
||||
|
||||
while (adc_is_syncing(module)) {
|
||||
/* Wait for synchronization */
|
||||
}
|
||||
|
||||
/* store ADC result in job buffer */
|
||||
*(module->job_buffer++) = module->hw->RESULT.reg;
|
||||
|
||||
if (--module->remaining_conversions > 0) {
|
||||
if (module->software_trigger == true) {
|
||||
adc_start_conversion(module);
|
||||
}
|
||||
} else {
|
||||
adc_disable_interrupt(module, ADC_INTERRUPT_RESULT_READY);
|
||||
if (module->job_status == STATUS_BUSY) {
|
||||
/* job is complete. update status,disable interrupt
|
||||
*and call callback */
|
||||
module->job_status = STATUS_OK;
|
||||
|
||||
if ((module->enabled_callback_mask &
|
||||
(1 << ADC_CALLBACK_READ_BUFFER)) &&
|
||||
(module->registered_callback_mask &
|
||||
(1 << ADC_CALLBACK_READ_BUFFER))) {
|
||||
(module->callback[ADC_CALLBACK_READ_BUFFER])(module);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (flags & ADC_INTFLAG_WINMON) {
|
||||
module->hw->INTFLAG.reg = ADC_INTFLAG_WINMON;
|
||||
if ((module->enabled_callback_mask & (1 << ADC_CALLBACK_WINDOW)) &&
|
||||
(module->registered_callback_mask & (1 << ADC_CALLBACK_WINDOW))) {
|
||||
(module->callback[ADC_CALLBACK_WINDOW])(module);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
if (flags & ADC_INTFLAG_OVERRUN) {
|
||||
module->hw->INTFLAG.reg = ADC_INTFLAG_OVERRUN;
|
||||
if ((module->enabled_callback_mask & (1 << ADC_CALLBACK_ERROR)) &&
|
||||
(module->registered_callback_mask & (1 << ADC_CALLBACK_ERROR))) {
|
||||
(module->callback[ADC_CALLBACK_ERROR])(module);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/** Interrupt handler for the ADC module. */
|
||||
void ADC_Handler(void)
|
||||
{
|
||||
_adc_interrupt_handler(0);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Registers a callback
|
||||
*
|
||||
* Registers a callback function which is implemented by the user.
|
||||
*
|
||||
* \note The callback must be enabled by for the interrupt handler to call it
|
||||
* when the condition for the callback is met.
|
||||
*
|
||||
* \param[in] module Pointer to ADC software instance struct
|
||||
* \param[in] callback_func Pointer to callback function
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*
|
||||
*/
|
||||
void adc_register_callback(
|
||||
struct adc_module *const module,
|
||||
adc_callback_t callback_func,
|
||||
enum adc_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
Assert(callback_func);
|
||||
|
||||
/* Register callback function */
|
||||
module->callback[callback_type] = callback_func;
|
||||
|
||||
/* Set the bit corresponding to the callback_type */
|
||||
module->registered_callback_mask |= (1 << callback_type);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Unregisters a callback
|
||||
*
|
||||
* Unregisters a callback function which is implemented by the user.
|
||||
*
|
||||
* \param[in] module Pointer to ADC software instance struct
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*
|
||||
*/
|
||||
void adc_unregister_callback(
|
||||
struct adc_module *const module,
|
||||
enum adc_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
|
||||
/* Unregister callback function */
|
||||
module->callback[callback_type] = NULL;
|
||||
|
||||
/* Clear the bit corresponding to the callback_type */
|
||||
module->registered_callback_mask &= ~(1 << callback_type);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Read multiple samples from ADC
|
||||
*
|
||||
* Read \c samples samples from the ADC into the buffer \c buffer.
|
||||
* If there is no hardware trigger defined (event action) the
|
||||
* driver will retrigger the ADC conversion whenever a conversion
|
||||
* is complete until \c samples samples has been acquired. To avoid
|
||||
* jitter in the sampling frequency using an event trigger is advised.
|
||||
*
|
||||
* \param[in] module_inst Pointer to the ADC software instance struct
|
||||
* \param[in] samples Number of samples to acquire
|
||||
* \param[out] buffer Buffer to store the ADC samples
|
||||
*
|
||||
* \return Status of the job start.
|
||||
* \retval STATUS_OK The conversion job was started successfully and is
|
||||
* in progress
|
||||
* \retval STATUS_BUSY The ADC is already busy with another job
|
||||
*/
|
||||
enum status_code adc_read_buffer_job(
|
||||
struct adc_module *const module_inst,
|
||||
uint16_t *buffer,
|
||||
uint16_t samples)
|
||||
{
|
||||
Assert(module_inst);
|
||||
Assert(samples);
|
||||
Assert(buffer);
|
||||
|
||||
if(module_inst->remaining_conversions != 0 ||
|
||||
module_inst->job_status == STATUS_BUSY){
|
||||
return STATUS_BUSY;
|
||||
}
|
||||
|
||||
module_inst->job_status = STATUS_BUSY;
|
||||
module_inst->remaining_conversions = samples;
|
||||
module_inst->job_buffer = buffer;
|
||||
|
||||
adc_enable_interrupt(module_inst, ADC_INTERRUPT_RESULT_READY);
|
||||
|
||||
if(module_inst->software_trigger == true) {
|
||||
adc_start_conversion(module_inst);
|
||||
}
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Gets the status of a job
|
||||
*
|
||||
* Gets the status of an ongoing or the last job.
|
||||
*
|
||||
* \param [in] module_inst Pointer to the ADC software instance struct
|
||||
* \param [in] type Type of job to get status
|
||||
*
|
||||
* \return Status of the job.
|
||||
*/
|
||||
enum status_code adc_get_job_status(
|
||||
struct adc_module *module_inst,
|
||||
enum adc_job_type type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
|
||||
if (type == ADC_JOB_READ_BUFFER ) {
|
||||
return module_inst->job_status;
|
||||
} else {
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Aborts an ongoing job
|
||||
*
|
||||
* Aborts an ongoing job.
|
||||
*
|
||||
* \param [in] module_inst Pointer to the ADC software instance struct
|
||||
* \param [in] type Type of job to abort
|
||||
*/
|
||||
void adc_abort_job(
|
||||
struct adc_module *module_inst,
|
||||
enum adc_job_type type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
|
||||
if (type == ADC_JOB_READ_BUFFER) {
|
||||
/* Disable interrupt */
|
||||
adc_disable_interrupt(module_inst, ADC_INTERRUPT_RESULT_READY);
|
||||
/* Mark job as aborted */
|
||||
module_inst->job_status = STATUS_ABORTED;
|
||||
module_inst->remaining_conversions = 0;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Peripheral Analog-to-Digital Converter Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#include "adc_callback.h"
|
||||
|
||||
struct adc_module *_adc_instances[ADC_INST_NUM];
|
||||
|
||||
static void _adc_interrupt_handler(const uint8_t instance)
|
||||
{
|
||||
struct adc_module *module = _adc_instances[instance];
|
||||
|
||||
/* get interrupt flags and mask out enabled callbacks */
|
||||
uint32_t flags = module->hw->INTFLAG.reg & module->hw->INTENSET.reg;
|
||||
|
||||
if (flags & ADC_INTFLAG_RESRDY) {
|
||||
/* clear interrupt flag */
|
||||
module->hw->INTFLAG.reg = ADC_INTFLAG_RESRDY;
|
||||
|
||||
while (adc_is_syncing(module)) {
|
||||
/* Wait for synchronization */
|
||||
}
|
||||
|
||||
/* store ADC result in job buffer */
|
||||
*(module->job_buffer++) = module->hw->RESULT.reg;
|
||||
|
||||
if (--module->remaining_conversions > 0) {
|
||||
if (module->software_trigger == true) {
|
||||
adc_start_conversion(module);
|
||||
}
|
||||
} else {
|
||||
adc_disable_interrupt(module, ADC_INTERRUPT_RESULT_READY);
|
||||
if (module->job_status == STATUS_BUSY) {
|
||||
/* job is complete. update status,disable interrupt
|
||||
*and call callback */
|
||||
module->job_status = STATUS_OK;
|
||||
|
||||
if ((module->enabled_callback_mask &
|
||||
(1 << ADC_CALLBACK_READ_BUFFER)) &&
|
||||
(module->registered_callback_mask &
|
||||
(1 << ADC_CALLBACK_READ_BUFFER))) {
|
||||
(module->callback[ADC_CALLBACK_READ_BUFFER])(module);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (flags & ADC_INTFLAG_WINMON) {
|
||||
module->hw->INTFLAG.reg = ADC_INTFLAG_WINMON;
|
||||
if ((module->enabled_callback_mask & (1 << ADC_CALLBACK_WINDOW)) &&
|
||||
(module->registered_callback_mask & (1 << ADC_CALLBACK_WINDOW))) {
|
||||
(module->callback[ADC_CALLBACK_WINDOW])(module);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
if (flags & ADC_INTFLAG_OVERRUN) {
|
||||
module->hw->INTFLAG.reg = ADC_INTFLAG_OVERRUN;
|
||||
if ((module->enabled_callback_mask & (1 << ADC_CALLBACK_ERROR)) &&
|
||||
(module->registered_callback_mask & (1 << ADC_CALLBACK_ERROR))) {
|
||||
(module->callback[ADC_CALLBACK_ERROR])(module);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/** Interrupt handler for the ADC module. */
|
||||
void ADC_Handler(void)
|
||||
{
|
||||
_adc_interrupt_handler(0);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Registers a callback
|
||||
*
|
||||
* Registers a callback function which is implemented by the user.
|
||||
*
|
||||
* \note The callback must be enabled by for the interrupt handler to call it
|
||||
* when the condition for the callback is met.
|
||||
*
|
||||
* \param[in] module Pointer to ADC software instance struct
|
||||
* \param[in] callback_func Pointer to callback function
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*
|
||||
*/
|
||||
void adc_register_callback(
|
||||
struct adc_module *const module,
|
||||
adc_callback_t callback_func,
|
||||
enum adc_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
Assert(callback_func);
|
||||
|
||||
/* Register callback function */
|
||||
module->callback[callback_type] = callback_func;
|
||||
|
||||
/* Set the bit corresponding to the callback_type */
|
||||
module->registered_callback_mask |= (1 << callback_type);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Unregisters a callback
|
||||
*
|
||||
* Unregisters a callback function which is implemented by the user.
|
||||
*
|
||||
* \param[in] module Pointer to ADC software instance struct
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*
|
||||
*/
|
||||
void adc_unregister_callback(
|
||||
struct adc_module *const module,
|
||||
enum adc_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
|
||||
/* Unregister callback function */
|
||||
module->callback[callback_type] = NULL;
|
||||
|
||||
/* Clear the bit corresponding to the callback_type */
|
||||
module->registered_callback_mask &= ~(1 << callback_type);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Read multiple samples from ADC
|
||||
*
|
||||
* Read \c samples samples from the ADC into the buffer \c buffer.
|
||||
* If there is no hardware trigger defined (event action) the
|
||||
* driver will retrigger the ADC conversion whenever a conversion
|
||||
* is complete until \c samples samples has been acquired. To avoid
|
||||
* jitter in the sampling frequency using an event trigger is advised.
|
||||
*
|
||||
* \param[in] module_inst Pointer to the ADC software instance struct
|
||||
* \param[in] samples Number of samples to acquire
|
||||
* \param[out] buffer Buffer to store the ADC samples
|
||||
*
|
||||
* \return Status of the job start.
|
||||
* \retval STATUS_OK The conversion job was started successfully and is
|
||||
* in progress
|
||||
* \retval STATUS_BUSY The ADC is already busy with another job
|
||||
*/
|
||||
enum status_code adc_read_buffer_job(
|
||||
struct adc_module *const module_inst,
|
||||
uint16_t *buffer,
|
||||
uint16_t samples)
|
||||
{
|
||||
Assert(module_inst);
|
||||
Assert(samples);
|
||||
Assert(buffer);
|
||||
|
||||
if(module_inst->remaining_conversions != 0 ||
|
||||
module_inst->job_status == STATUS_BUSY){
|
||||
return STATUS_BUSY;
|
||||
}
|
||||
|
||||
module_inst->job_status = STATUS_BUSY;
|
||||
module_inst->remaining_conversions = samples;
|
||||
module_inst->job_buffer = buffer;
|
||||
|
||||
adc_enable_interrupt(module_inst, ADC_INTERRUPT_RESULT_READY);
|
||||
|
||||
if(module_inst->software_trigger == true) {
|
||||
adc_start_conversion(module_inst);
|
||||
}
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Gets the status of a job
|
||||
*
|
||||
* Gets the status of an ongoing or the last job.
|
||||
*
|
||||
* \param [in] module_inst Pointer to the ADC software instance struct
|
||||
* \param [in] type Type of job to get status
|
||||
*
|
||||
* \return Status of the job.
|
||||
*/
|
||||
enum status_code adc_get_job_status(
|
||||
struct adc_module *module_inst,
|
||||
enum adc_job_type type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
|
||||
if (type == ADC_JOB_READ_BUFFER ) {
|
||||
return module_inst->job_status;
|
||||
} else {
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Aborts an ongoing job
|
||||
*
|
||||
* Aborts an ongoing job.
|
||||
*
|
||||
* \param [in] module_inst Pointer to the ADC software instance struct
|
||||
* \param [in] type Type of job to abort
|
||||
*/
|
||||
void adc_abort_job(
|
||||
struct adc_module *module_inst,
|
||||
enum adc_job_type type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
|
||||
if (type == ADC_JOB_READ_BUFFER) {
|
||||
/* Disable interrupt */
|
||||
adc_disable_interrupt(module_inst, ADC_INTERRUPT_RESULT_READY);
|
||||
/* Mark job as aborted */
|
||||
module_inst->job_status = STATUS_ABORTED;
|
||||
module_inst->remaining_conversions = 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,222 +1,222 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM External Interrupt Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#include "extint.h"
|
||||
#include "extint_callback.h"
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Internal driver device instance struct, declared in the main module driver.
|
||||
*/
|
||||
extern struct _extint_module _extint_dev;
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* This is the number of the channel whose callback is currently running.
|
||||
*/
|
||||
uint8_t _current_channel;
|
||||
|
||||
/**
|
||||
* \brief Registers an asynchronous callback function with the driver.
|
||||
*
|
||||
* Registers an asynchronous callback with the EXTINT driver, fired when a
|
||||
* channel detects the configured channel detection criteria
|
||||
* (e.g. edge or level). Callbacks are fired once for each detected channel.
|
||||
*
|
||||
* \note NMI channel callbacks cannot be registered via this function; the
|
||||
* device's NMI interrupt should be hooked directly in the user
|
||||
* application and the NMI flags manually cleared via
|
||||
* \ref extint_nmi_clear_detected().
|
||||
*
|
||||
* \param[in] callback Pointer to the callback function to register
|
||||
* \param[in] channel Logical channel to register callback for
|
||||
* \param[in] type Type of callback function to register
|
||||
*
|
||||
* \return Status of the registration operation.
|
||||
* \retval STATUS_OK The callback was registered successfully
|
||||
* \retval STATUS_ERR_INVALID_ARG If an invalid callback type was supplied
|
||||
* \retval STATUS_ERR_ALREADY_INITIALIZED Callback function has been
|
||||
* registered, need unregister first
|
||||
*/
|
||||
enum status_code extint_register_callback(
|
||||
const extint_callback_t callback,
|
||||
const uint8_t channel,
|
||||
const enum extint_callback_type type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(callback);
|
||||
|
||||
if (type != EXTINT_CALLBACK_TYPE_DETECT) {
|
||||
Assert(false);
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
if (_extint_dev.callbacks[channel] == NULL) {
|
||||
_extint_dev.callbacks[channel] = callback;
|
||||
return STATUS_OK;
|
||||
} else if (_extint_dev.callbacks[channel] == callback) {
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
return STATUS_ERR_ALREADY_INITIALIZED;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Unregisters an asynchronous callback function with the driver.
|
||||
*
|
||||
* Unregisters an asynchronous callback with the EXTINT driver, removing it
|
||||
* from the internal callback registration table.
|
||||
*
|
||||
* \param[in] callback Pointer to the callback function to unregister
|
||||
* \param[in] channel Logical channel to unregister callback for
|
||||
* \param[in] type Type of callback function to unregister
|
||||
*
|
||||
* \return Status of the de-registration operation.
|
||||
* \retval STATUS_OK The callback was unregistered successfully
|
||||
* \retval STATUS_ERR_INVALID_ARG If an invalid callback type was supplied
|
||||
* \retval STATUS_ERR_BAD_ADDRESS No matching entry was found in the
|
||||
* registration table
|
||||
*/
|
||||
enum status_code extint_unregister_callback(
|
||||
const extint_callback_t callback,
|
||||
const uint8_t channel,
|
||||
const enum extint_callback_type type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(callback);
|
||||
|
||||
if (type != EXTINT_CALLBACK_TYPE_DETECT) {
|
||||
Assert(false);
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
if (_extint_dev.callbacks[channel] == callback) {
|
||||
_extint_dev.callbacks[channel] = NULL;
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
return STATUS_ERR_BAD_ADDRESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Enables asynchronous callback generation for a given channel and type.
|
||||
*
|
||||
* Enables asynchronous callbacks for a given logical external interrupt channel
|
||||
* and type. This must be called before an external interrupt channel will
|
||||
* generate callback events.
|
||||
*
|
||||
* \param[in] channel Logical channel to enable callback generation for
|
||||
* \param[in] type Type of callback function callbacks to enable
|
||||
*
|
||||
* \return Status of the callback enable operation.
|
||||
* \retval STATUS_OK The callback was enabled successfully
|
||||
* \retval STATUS_ERR_INVALID_ARG If an invalid callback type was supplied
|
||||
*/
|
||||
enum status_code extint_chan_enable_callback(
|
||||
const uint8_t channel,
|
||||
const enum extint_callback_type type)
|
||||
{
|
||||
if (type == EXTINT_CALLBACK_TYPE_DETECT) {
|
||||
Eic *const eic = _extint_get_eic_from_channel(channel);
|
||||
|
||||
eic->INTENSET.reg = (1UL << channel);
|
||||
}
|
||||
else {
|
||||
Assert(false);
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disables asynchronous callback generation for a given channel and type.
|
||||
*
|
||||
* Disables asynchronous callbacks for a given logical external interrupt
|
||||
* channel and type.
|
||||
*
|
||||
* \param[in] channel Logical channel to disable callback generation for
|
||||
* \param[in] type Type of callback function callbacks to disable
|
||||
*
|
||||
* \return Status of the callback disable operation.
|
||||
* \retval STATUS_OK The callback was disabled successfully
|
||||
* \retval STATUS_ERR_INVALID_ARG If an invalid callback type was supplied
|
||||
*/
|
||||
enum status_code extint_chan_disable_callback(
|
||||
const uint8_t channel,
|
||||
const enum extint_callback_type type)
|
||||
{
|
||||
if (type == EXTINT_CALLBACK_TYPE_DETECT) {
|
||||
Eic *const eic = _extint_get_eic_from_channel(channel);
|
||||
|
||||
eic->INTENCLR.reg = (1UL << channel);
|
||||
}
|
||||
else {
|
||||
Assert(false);
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Find what channel caused the callback.
|
||||
*
|
||||
* Can be used in an EXTINT callback function to find what channel caused
|
||||
* the callback in case the same callback is used by multiple channels.
|
||||
*
|
||||
* \return Channel number.
|
||||
*/
|
||||
uint8_t extint_get_current_channel(void)
|
||||
{
|
||||
return _current_channel;
|
||||
}
|
||||
|
||||
/** Handler for the EXTINT hardware module interrupt. */
|
||||
void EIC_Handler(void)
|
||||
{
|
||||
/* Find any triggered channels, run associated callback handlers */
|
||||
for (_current_channel = 0; _current_channel < EIC_NUMBER_OF_INTERRUPTS ; _current_channel++) {
|
||||
if (extint_chan_is_detected(_current_channel)) {
|
||||
/* Clear flag */
|
||||
extint_chan_clear_detected(_current_channel);
|
||||
/* Find any associated callback entries in the callback table */
|
||||
if (_extint_dev.callbacks[_current_channel] != NULL) {
|
||||
/* Run the registered callback */
|
||||
_extint_dev.callbacks[_current_channel]();
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM External Interrupt Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#include "extint.h"
|
||||
#include "extint_callback.h"
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Internal driver device instance struct, declared in the main module driver.
|
||||
*/
|
||||
extern struct _extint_module _extint_dev;
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* This is the number of the channel whose callback is currently running.
|
||||
*/
|
||||
uint8_t _current_channel;
|
||||
|
||||
/**
|
||||
* \brief Registers an asynchronous callback function with the driver.
|
||||
*
|
||||
* Registers an asynchronous callback with the EXTINT driver, fired when a
|
||||
* channel detects the configured channel detection criteria
|
||||
* (e.g. edge or level). Callbacks are fired once for each detected channel.
|
||||
*
|
||||
* \note NMI channel callbacks cannot be registered via this function; the
|
||||
* device's NMI interrupt should be hooked directly in the user
|
||||
* application and the NMI flags manually cleared via
|
||||
* \ref extint_nmi_clear_detected().
|
||||
*
|
||||
* \param[in] callback Pointer to the callback function to register
|
||||
* \param[in] channel Logical channel to register callback for
|
||||
* \param[in] type Type of callback function to register
|
||||
*
|
||||
* \return Status of the registration operation.
|
||||
* \retval STATUS_OK The callback was registered successfully
|
||||
* \retval STATUS_ERR_INVALID_ARG If an invalid callback type was supplied
|
||||
* \retval STATUS_ERR_ALREADY_INITIALIZED Callback function has been
|
||||
* registered, need unregister first
|
||||
*/
|
||||
enum status_code extint_register_callback(
|
||||
const extint_callback_t callback,
|
||||
const uint8_t channel,
|
||||
const enum extint_callback_type type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(callback);
|
||||
|
||||
if (type != EXTINT_CALLBACK_TYPE_DETECT) {
|
||||
Assert(false);
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
if (_extint_dev.callbacks[channel] == NULL) {
|
||||
_extint_dev.callbacks[channel] = callback;
|
||||
return STATUS_OK;
|
||||
} else if (_extint_dev.callbacks[channel] == callback) {
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
return STATUS_ERR_ALREADY_INITIALIZED;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Unregisters an asynchronous callback function with the driver.
|
||||
*
|
||||
* Unregisters an asynchronous callback with the EXTINT driver, removing it
|
||||
* from the internal callback registration table.
|
||||
*
|
||||
* \param[in] callback Pointer to the callback function to unregister
|
||||
* \param[in] channel Logical channel to unregister callback for
|
||||
* \param[in] type Type of callback function to unregister
|
||||
*
|
||||
* \return Status of the de-registration operation.
|
||||
* \retval STATUS_OK The callback was unregistered successfully
|
||||
* \retval STATUS_ERR_INVALID_ARG If an invalid callback type was supplied
|
||||
* \retval STATUS_ERR_BAD_ADDRESS No matching entry was found in the
|
||||
* registration table
|
||||
*/
|
||||
enum status_code extint_unregister_callback(
|
||||
const extint_callback_t callback,
|
||||
const uint8_t channel,
|
||||
const enum extint_callback_type type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(callback);
|
||||
|
||||
if (type != EXTINT_CALLBACK_TYPE_DETECT) {
|
||||
Assert(false);
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
if (_extint_dev.callbacks[channel] == callback) {
|
||||
_extint_dev.callbacks[channel] = NULL;
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
return STATUS_ERR_BAD_ADDRESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Enables asynchronous callback generation for a given channel and type.
|
||||
*
|
||||
* Enables asynchronous callbacks for a given logical external interrupt channel
|
||||
* and type. This must be called before an external interrupt channel will
|
||||
* generate callback events.
|
||||
*
|
||||
* \param[in] channel Logical channel to enable callback generation for
|
||||
* \param[in] type Type of callback function callbacks to enable
|
||||
*
|
||||
* \return Status of the callback enable operation.
|
||||
* \retval STATUS_OK The callback was enabled successfully
|
||||
* \retval STATUS_ERR_INVALID_ARG If an invalid callback type was supplied
|
||||
*/
|
||||
enum status_code extint_chan_enable_callback(
|
||||
const uint8_t channel,
|
||||
const enum extint_callback_type type)
|
||||
{
|
||||
if (type == EXTINT_CALLBACK_TYPE_DETECT) {
|
||||
Eic *const eic = _extint_get_eic_from_channel(channel);
|
||||
|
||||
eic->INTENSET.reg = (1UL << channel);
|
||||
}
|
||||
else {
|
||||
Assert(false);
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disables asynchronous callback generation for a given channel and type.
|
||||
*
|
||||
* Disables asynchronous callbacks for a given logical external interrupt
|
||||
* channel and type.
|
||||
*
|
||||
* \param[in] channel Logical channel to disable callback generation for
|
||||
* \param[in] type Type of callback function callbacks to disable
|
||||
*
|
||||
* \return Status of the callback disable operation.
|
||||
* \retval STATUS_OK The callback was disabled successfully
|
||||
* \retval STATUS_ERR_INVALID_ARG If an invalid callback type was supplied
|
||||
*/
|
||||
enum status_code extint_chan_disable_callback(
|
||||
const uint8_t channel,
|
||||
const enum extint_callback_type type)
|
||||
{
|
||||
if (type == EXTINT_CALLBACK_TYPE_DETECT) {
|
||||
Eic *const eic = _extint_get_eic_from_channel(channel);
|
||||
|
||||
eic->INTENCLR.reg = (1UL << channel);
|
||||
}
|
||||
else {
|
||||
Assert(false);
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Find what channel caused the callback.
|
||||
*
|
||||
* Can be used in an EXTINT callback function to find what channel caused
|
||||
* the callback in case the same callback is used by multiple channels.
|
||||
*
|
||||
* \return Channel number.
|
||||
*/
|
||||
uint8_t extint_get_current_channel(void)
|
||||
{
|
||||
return _current_channel;
|
||||
}
|
||||
|
||||
/** Handler for the EXTINT hardware module interrupt. */
|
||||
void EIC_Handler(void)
|
||||
{
|
||||
/* Find any triggered channels, run associated callback handlers */
|
||||
for (_current_channel = 0; _current_channel < EIC_NUMBER_OF_INTERRUPTS ; _current_channel++) {
|
||||
if (extint_chan_is_detected(_current_channel)) {
|
||||
/* Clear flag */
|
||||
extint_chan_clear_detected(_current_channel);
|
||||
/* Find any associated callback entries in the callback table */
|
||||
if (_extint_dev.callbacks[_current_channel] != NULL) {
|
||||
/* Run the registered callback */
|
||||
_extint_dev.callbacks[_current_channel]();
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -1,98 +1,98 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM External Interrupt Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#ifndef EXTINT_CALLBACK_H_INCLUDED
|
||||
#define EXTINT_CALLBACK_H_INCLUDED
|
||||
|
||||
#include <compiler.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \addtogroup asfdoc_sam0_extint_group
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** \name Callback Configuration and Initialization
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** Enum for the possible callback types for the EXTINT module. */
|
||||
enum extint_callback_type
|
||||
{
|
||||
/** Callback type for when an external interrupt detects the configured
|
||||
* channel criteria (i.e. edge or level detection)
|
||||
*/
|
||||
EXTINT_CALLBACK_TYPE_DETECT,
|
||||
};
|
||||
|
||||
enum status_code extint_register_callback(
|
||||
const extint_callback_t callback,
|
||||
const uint8_t channel,
|
||||
const enum extint_callback_type type);
|
||||
|
||||
enum status_code extint_unregister_callback(
|
||||
const extint_callback_t callback,
|
||||
const uint8_t channel,
|
||||
const enum extint_callback_type type);
|
||||
|
||||
uint8_t extint_get_current_channel(void);
|
||||
|
||||
/** @} */
|
||||
|
||||
/** \name Callback Enabling and Disabling (Channel)
|
||||
* @{
|
||||
*/
|
||||
|
||||
enum status_code extint_chan_enable_callback(
|
||||
const uint8_t channel,
|
||||
const enum extint_callback_type type);
|
||||
|
||||
enum status_code extint_chan_disable_callback(
|
||||
const uint8_t channel,
|
||||
const enum extint_callback_type type);
|
||||
|
||||
/** @} */
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM External Interrupt Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#ifndef EXTINT_CALLBACK_H_INCLUDED
|
||||
#define EXTINT_CALLBACK_H_INCLUDED
|
||||
|
||||
#include <compiler.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \addtogroup asfdoc_sam0_extint_group
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** \name Callback Configuration and Initialization
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** Enum for the possible callback types for the EXTINT module. */
|
||||
enum extint_callback_type
|
||||
{
|
||||
/** Callback type for when an external interrupt detects the configured
|
||||
* channel criteria (i.e. edge or level detection)
|
||||
*/
|
||||
EXTINT_CALLBACK_TYPE_DETECT,
|
||||
};
|
||||
|
||||
enum status_code extint_register_callback(
|
||||
const extint_callback_t callback,
|
||||
const uint8_t channel,
|
||||
const enum extint_callback_type type);
|
||||
|
||||
enum status_code extint_unregister_callback(
|
||||
const extint_callback_t callback,
|
||||
const uint8_t channel,
|
||||
const enum extint_callback_type type);
|
||||
|
||||
uint8_t extint_get_current_channel(void);
|
||||
|
||||
/** @} */
|
||||
|
||||
/** \name Callback Enabling and Disabling (Channel)
|
||||
* @{
|
||||
*/
|
||||
|
||||
enum status_code extint_chan_enable_callback(
|
||||
const uint8_t channel,
|
||||
const enum extint_callback_type type);
|
||||
|
||||
enum status_code extint_chan_disable_callback(
|
||||
const uint8_t channel,
|
||||
const enum extint_callback_type type);
|
||||
|
||||
/** @} */
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@ -1,415 +1,415 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM External Interrupt Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#include <system.h>
|
||||
#include <system_interrupt.h>
|
||||
#include <extint.h>
|
||||
#include <conf_extint.h>
|
||||
|
||||
#if !defined(EXTINT_CLOCK_SOURCE) || defined(__DOXYGEN__)
|
||||
# warning EXTINT_CLOCK_SOURCE is not defined, assuming GCLK_GENERATOR_0.
|
||||
|
||||
/** Configuration option, setting the EIC clock source which can be used for
|
||||
* EIC edge detection or filtering. This option may be overridden in the module
|
||||
* configuration header file \c conf_extint.h.
|
||||
*/
|
||||
# define EXTINT_CLOCK_SOURCE GCLK_GENERATOR_0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Internal driver device instance struct.
|
||||
*/
|
||||
struct _extint_module _extint_dev;
|
||||
|
||||
/**
|
||||
* \brief Determin if the general clock is required
|
||||
*
|
||||
* \param[in] filter_input_signal Filter the raw input signal to prevent noise
|
||||
* \param[in] detection_criteria Edge detection mode to use (\ref extint_detect)
|
||||
*/
|
||||
#define _extint_is_gclk_required(filter_input_signal, detection_criteria) \
|
||||
((filter_input_signal) ? true : (\
|
||||
(EXTINT_DETECT_RISING == (detection_criteria)) ? true : (\
|
||||
(EXTINT_DETECT_FALLING == (detection_criteria)) ? true : (\
|
||||
(EXTINT_DETECT_BOTH == (detection_criteria)) ? true : false))))
|
||||
|
||||
static void _extint_enable(void);
|
||||
static void _extint_disable(void);
|
||||
|
||||
/**
|
||||
* \brief Determines if the hardware module(s) are currently synchronizing to the bus.
|
||||
*
|
||||
* Checks to see if the underlying hardware peripheral module(s) are currently
|
||||
* synchronizing across multiple clock domains to the hardware bus, This
|
||||
* function can be used to delay further operations on a module until such time
|
||||
* that it is ready, to prevent blocking delays for synchronization in the
|
||||
* user application.
|
||||
*
|
||||
* \return Synchronization status of the underlying hardware module(s).
|
||||
*
|
||||
* \retval true If the module synchronization is ongoing
|
||||
* \retval false If the module has completed synchronization
|
||||
*/
|
||||
static inline bool extint_is_syncing(void)
|
||||
{
|
||||
Eic *const eics[EIC_INST_NUM] = EIC_INSTS;
|
||||
|
||||
for (uint32_t i = 0; i < EIC_INST_NUM; i++) {
|
||||
if (eics[i]->STATUS.reg & EIC_STATUS_SYNCBUSY) {
|
||||
return true;
|
||||
}
|
||||
}
|
||||
return false;
|
||||
}
|
||||
/**
|
||||
* \internal
|
||||
* \brief Initializes and enables the External Interrupt driver.
|
||||
*
|
||||
* Enable the clocks used by External Interrupt driver.
|
||||
*
|
||||
* Resets the External Interrupt driver, resetting all hardware
|
||||
* module registers to their power-on defaults, then enable it for further use.
|
||||
*
|
||||
* Reset the callback list if callback mode is used.
|
||||
*
|
||||
* This function must be called before attempting to use any NMI or standard
|
||||
* external interrupt channel functions.
|
||||
*
|
||||
* \note When SYSTEM module is used, this function will be invoked by
|
||||
* \ref system_init() automatically if the module is included.
|
||||
*/
|
||||
void _system_extint_init(void);
|
||||
void _system_extint_init(void)
|
||||
{
|
||||
Eic *const eics[EIC_INST_NUM] = EIC_INSTS;
|
||||
|
||||
/* Turn on the digital interface clock */
|
||||
system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBA, PM_APBAMASK_EIC);
|
||||
|
||||
/* Configure the generic clock for the module and enable it */
|
||||
struct system_gclk_chan_config gclk_chan_conf;
|
||||
system_gclk_chan_get_config_defaults(&gclk_chan_conf);
|
||||
gclk_chan_conf.source_generator = EXTINT_CLOCK_SOURCE;
|
||||
system_gclk_chan_set_config(EIC_GCLK_ID, &gclk_chan_conf);
|
||||
|
||||
/* Enable the clock anyway, since when needed it will be requested
|
||||
* by External Interrupt driver */
|
||||
system_gclk_chan_enable(EIC_GCLK_ID);
|
||||
|
||||
/* Reset all EIC hardware modules. */
|
||||
for (uint32_t i = 0; i < EIC_INST_NUM; i++) {
|
||||
eics[i]->CTRL.reg |= EIC_CTRL_SWRST;
|
||||
}
|
||||
|
||||
while (extint_is_syncing()) {
|
||||
/* Wait for all hardware modules to complete synchronization */
|
||||
}
|
||||
|
||||
/* Reset the software module */
|
||||
#if EXTINT_CALLBACK_MODE == true
|
||||
/* Clear callback registration table */
|
||||
for (uint8_t j = 0; j < EIC_NUMBER_OF_INTERRUPTS; j++) {
|
||||
_extint_dev.callbacks[j] = NULL;
|
||||
}
|
||||
system_interrupt_enable(SYSTEM_INTERRUPT_MODULE_EIC);
|
||||
#endif
|
||||
|
||||
/* Enables the driver for further use */
|
||||
_extint_enable();
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief Enables the External Interrupt driver.
|
||||
*
|
||||
* Enables EIC modules.
|
||||
* Registered callback list will not be affected if callback mode is used.
|
||||
*/
|
||||
void _extint_enable(void)
|
||||
{
|
||||
Eic *const eics[EIC_INST_NUM] = EIC_INSTS;
|
||||
|
||||
/* Enable all EIC hardware modules. */
|
||||
for (uint32_t i = 0; i < EIC_INST_NUM; i++) {
|
||||
eics[i]->CTRL.reg |= EIC_CTRL_ENABLE;
|
||||
}
|
||||
|
||||
while (extint_is_syncing()) {
|
||||
/* Wait for all hardware modules to complete synchronization */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief Disables the External Interrupt driver.
|
||||
*
|
||||
* Disables EIC modules that were previously started via a call to
|
||||
* \ref _extint_enable().
|
||||
* Registered callback list will not be affected if callback mode is used.
|
||||
*/
|
||||
void _extint_disable(void)
|
||||
{
|
||||
Eic *const eics[EIC_INST_NUM] = EIC_INSTS;
|
||||
|
||||
/* Disable all EIC hardware modules. */
|
||||
for (uint32_t i = 0; i < EIC_INST_NUM; i++) {
|
||||
eics[i]->CTRL.reg &= ~EIC_CTRL_ENABLE;
|
||||
}
|
||||
|
||||
while (extint_is_syncing()) {
|
||||
/* Wait for all hardware modules to complete synchronization */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Initializes an External Interrupt channel configuration structure to defaults.
|
||||
*
|
||||
* Initializes a given External Interrupt channel configuration structure to a
|
||||
* set of known default values. This function should be called on all new
|
||||
* instances of these configuration structures before being modified by the
|
||||
* user application.
|
||||
*
|
||||
* The default configuration is as follows:
|
||||
* \li Wake the device if an edge detection occurs whilst in sleep
|
||||
* \li Input filtering disabled
|
||||
* \li Internal pull-up enabled
|
||||
* \li Detect falling edges of a signal
|
||||
*
|
||||
* \param[out] config Configuration structure to initialize to default values
|
||||
*/
|
||||
void extint_chan_get_config_defaults(
|
||||
struct extint_chan_conf *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(config);
|
||||
|
||||
/* Default configuration values */
|
||||
config->gpio_pin = 0;
|
||||
config->gpio_pin_mux = 0;
|
||||
config->gpio_pin_pull = EXTINT_PULL_UP;
|
||||
config->wake_if_sleeping = true;
|
||||
config->filter_input_signal = false;
|
||||
config->detection_criteria = EXTINT_DETECT_FALLING;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Writes an External Interrupt channel configuration to the hardware module.
|
||||
*
|
||||
* Writes out a given configuration of an External Interrupt channel
|
||||
* configuration to the hardware module. If the channel is already configured,
|
||||
* the new configuration will replace the existing one.
|
||||
*
|
||||
* \param[in] channel External Interrupt channel to configure
|
||||
* \param[in] config Configuration settings for the channel
|
||||
|
||||
*/
|
||||
void extint_chan_set_config(
|
||||
const uint8_t channel,
|
||||
const struct extint_chan_conf *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(config);
|
||||
/* Sanity check clock requirements */
|
||||
Assert(!(!system_gclk_gen_is_enabled(EXTINT_CLOCK_SOURCE) &&
|
||||
_extint_is_gclk_required(config->filter_input_signal,
|
||||
config->detection_criteria)));
|
||||
|
||||
struct system_pinmux_config pinmux_config;
|
||||
system_pinmux_get_config_defaults(&pinmux_config);
|
||||
|
||||
pinmux_config.mux_position = config->gpio_pin_mux;
|
||||
pinmux_config.direction = SYSTEM_PINMUX_PIN_DIR_INPUT;
|
||||
pinmux_config.input_pull = (enum system_pinmux_pin_pull)config->gpio_pin_pull;
|
||||
system_pinmux_pin_set_config(config->gpio_pin, &pinmux_config);
|
||||
|
||||
/* Get a pointer to the module hardware instance */
|
||||
Eic *const EIC_module = _extint_get_eic_from_channel(channel);
|
||||
|
||||
uint32_t config_pos = (4 * (channel % 8));
|
||||
uint32_t new_config;
|
||||
|
||||
/* Determine the channel's new edge detection configuration */
|
||||
new_config = (config->detection_criteria << EIC_CONFIG_SENSE0_Pos);
|
||||
|
||||
/* Enable the hardware signal filter if requested in the config */
|
||||
if (config->filter_input_signal) {
|
||||
new_config |= EIC_CONFIG_FILTEN0;
|
||||
}
|
||||
|
||||
/* Clear the existing and set the new channel configuration */
|
||||
EIC_module->CONFIG[channel / 8].reg
|
||||
= (EIC_module->CONFIG[channel / 8].reg &
|
||||
~((EIC_CONFIG_SENSE0_Msk | EIC_CONFIG_FILTEN0) << config_pos)) |
|
||||
(new_config << config_pos);
|
||||
|
||||
/* Set the channel's new wake up mode setting */
|
||||
if (config->wake_if_sleeping) {
|
||||
EIC_module->WAKEUP.reg |= (1UL << channel);
|
||||
} else {
|
||||
EIC_module->WAKEUP.reg &= ~(1UL << channel);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Writes an External Interrupt NMI channel configuration to the hardware module.
|
||||
*
|
||||
* Writes out a given configuration of an External Interrupt NMI channel
|
||||
* configuration to the hardware module. If the channel is already configured,
|
||||
* the new configuration will replace the existing one.
|
||||
*
|
||||
* \param[in] nmi_channel External Interrupt NMI channel to configure
|
||||
* \param[in] config Configuration settings for the channel
|
||||
*
|
||||
* \returns Status code indicating the success or failure of the request.
|
||||
* \retval STATUS_OK Configuration succeeded
|
||||
* \retval STATUS_ERR_PIN_MUX_INVALID An invalid pinmux value was supplied
|
||||
* \retval STATUS_ERR_BAD_FORMAT An invalid detection mode was requested
|
||||
*/
|
||||
enum status_code extint_nmi_set_config(
|
||||
const uint8_t nmi_channel,
|
||||
const struct extint_nmi_conf *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(config);
|
||||
/* Sanity check clock requirements */
|
||||
Assert(!(!system_gclk_gen_is_enabled(EXTINT_CLOCK_SOURCE) &&
|
||||
_extint_is_gclk_required(config->filter_input_signal,
|
||||
config->detection_criteria)));
|
||||
|
||||
struct system_pinmux_config pinmux_config;
|
||||
system_pinmux_get_config_defaults(&pinmux_config);
|
||||
|
||||
pinmux_config.mux_position = config->gpio_pin_mux;
|
||||
pinmux_config.direction = SYSTEM_PINMUX_PIN_DIR_INPUT;
|
||||
pinmux_config.input_pull = SYSTEM_PINMUX_PIN_PULL_UP;
|
||||
pinmux_config.input_pull = (enum system_pinmux_pin_pull)config->gpio_pin_pull;
|
||||
system_pinmux_pin_set_config(config->gpio_pin, &pinmux_config);
|
||||
|
||||
/* Get a pointer to the module hardware instance */
|
||||
Eic *const EIC_module = _extint_get_eic_from_channel(nmi_channel);
|
||||
|
||||
uint32_t new_config;
|
||||
|
||||
/* Determine the NMI's new edge detection configuration */
|
||||
new_config = (config->detection_criteria << EIC_NMICTRL_NMISENSE_Pos);
|
||||
|
||||
/* Enable the hardware signal filter if requested in the config */
|
||||
if (config->filter_input_signal) {
|
||||
new_config |= EIC_NMICTRL_NMIFILTEN;
|
||||
}
|
||||
|
||||
/* Disable EIC and general clock to configure NMI */
|
||||
_extint_disable();
|
||||
system_gclk_chan_disable(EIC_GCLK_ID);
|
||||
|
||||
EIC_module->NMICTRL.reg = new_config;
|
||||
|
||||
/* Enable the general clock and EIC after configure NMI */
|
||||
system_gclk_chan_enable(EIC_GCLK_ID);
|
||||
_extint_enable();
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Enables an External Interrupt event output.
|
||||
*
|
||||
* Enables one or more output events from the External Interrupt module. See
|
||||
* \ref extint_events "here" for a list of events this module supports.
|
||||
*
|
||||
* \note Events cannot be altered while the module is enabled.
|
||||
*
|
||||
* \param[in] events Struct containing flags of events to enable
|
||||
*/
|
||||
void extint_enable_events(
|
||||
struct extint_events *const events)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(events);
|
||||
|
||||
/* Array of available EICs. */
|
||||
Eic *const eics[EIC_INST_NUM] = EIC_INSTS;
|
||||
|
||||
/* Update the event control register for each physical EIC instance */
|
||||
for (uint32_t i = 0; i < EIC_INST_NUM; i++) {
|
||||
uint32_t event_mask = 0;
|
||||
|
||||
/* Create an enable mask for the current EIC module */
|
||||
for (uint32_t j = 0; j < 32; j++) {
|
||||
if (events->generate_event_on_detect[(32 * i) + j]) {
|
||||
event_mask |= (1UL << j);
|
||||
}
|
||||
}
|
||||
|
||||
/* Enable the masked events */
|
||||
eics[i]->EVCTRL.reg |= event_mask;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disables an External Interrupt event output.
|
||||
*
|
||||
* Disables one or more output events from the External Interrupt module. See
|
||||
* \ref extint_events "here" for a list of events this module supports.
|
||||
*
|
||||
* \note Events cannot be altered while the module is enabled.
|
||||
*
|
||||
* \param[in] events Struct containing flags of events to disable
|
||||
*/
|
||||
void extint_disable_events(
|
||||
struct extint_events *const events)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(events);
|
||||
|
||||
/* Array of available EICs. */
|
||||
Eic *const eics[EIC_INST_NUM] = EIC_INSTS;
|
||||
|
||||
/* Update the event control register for each physical EIC instance */
|
||||
for (uint32_t i = 0; i < EIC_INST_NUM; i++) {
|
||||
uint32_t event_mask = 0;
|
||||
|
||||
/* Create a disable mask for the current EIC module */
|
||||
for (uint32_t j = 0; j < 32; j++) {
|
||||
if (events->generate_event_on_detect[(32 * i) + j]) {
|
||||
event_mask |= (1UL << j);
|
||||
}
|
||||
}
|
||||
|
||||
/* Disable the masked events */
|
||||
eics[i]->EVCTRL.reg &= ~event_mask;
|
||||
}
|
||||
}
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM External Interrupt Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#include <system.h>
|
||||
#include <system_interrupt.h>
|
||||
#include <extint.h>
|
||||
#include <conf_extint.h>
|
||||
|
||||
#if !defined(EXTINT_CLOCK_SOURCE) || defined(__DOXYGEN__)
|
||||
# warning EXTINT_CLOCK_SOURCE is not defined, assuming GCLK_GENERATOR_0.
|
||||
|
||||
/** Configuration option, setting the EIC clock source which can be used for
|
||||
* EIC edge detection or filtering. This option may be overridden in the module
|
||||
* configuration header file \c conf_extint.h.
|
||||
*/
|
||||
# define EXTINT_CLOCK_SOURCE GCLK_GENERATOR_0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Internal driver device instance struct.
|
||||
*/
|
||||
struct _extint_module _extint_dev;
|
||||
|
||||
/**
|
||||
* \brief Determin if the general clock is required
|
||||
*
|
||||
* \param[in] filter_input_signal Filter the raw input signal to prevent noise
|
||||
* \param[in] detection_criteria Edge detection mode to use (\ref extint_detect)
|
||||
*/
|
||||
#define _extint_is_gclk_required(filter_input_signal, detection_criteria) \
|
||||
((filter_input_signal) ? true : (\
|
||||
(EXTINT_DETECT_RISING == (detection_criteria)) ? true : (\
|
||||
(EXTINT_DETECT_FALLING == (detection_criteria)) ? true : (\
|
||||
(EXTINT_DETECT_BOTH == (detection_criteria)) ? true : false))))
|
||||
|
||||
static void _extint_enable(void);
|
||||
static void _extint_disable(void);
|
||||
|
||||
/**
|
||||
* \brief Determines if the hardware module(s) are currently synchronizing to the bus.
|
||||
*
|
||||
* Checks to see if the underlying hardware peripheral module(s) are currently
|
||||
* synchronizing across multiple clock domains to the hardware bus, This
|
||||
* function can be used to delay further operations on a module until such time
|
||||
* that it is ready, to prevent blocking delays for synchronization in the
|
||||
* user application.
|
||||
*
|
||||
* \return Synchronization status of the underlying hardware module(s).
|
||||
*
|
||||
* \retval true If the module synchronization is ongoing
|
||||
* \retval false If the module has completed synchronization
|
||||
*/
|
||||
static inline bool extint_is_syncing(void)
|
||||
{
|
||||
Eic *const eics[EIC_INST_NUM] = EIC_INSTS;
|
||||
|
||||
for (uint32_t i = 0; i < EIC_INST_NUM; i++) {
|
||||
if (eics[i]->STATUS.reg & EIC_STATUS_SYNCBUSY) {
|
||||
return true;
|
||||
}
|
||||
}
|
||||
return false;
|
||||
}
|
||||
/**
|
||||
* \internal
|
||||
* \brief Initializes and enables the External Interrupt driver.
|
||||
*
|
||||
* Enable the clocks used by External Interrupt driver.
|
||||
*
|
||||
* Resets the External Interrupt driver, resetting all hardware
|
||||
* module registers to their power-on defaults, then enable it for further use.
|
||||
*
|
||||
* Reset the callback list if callback mode is used.
|
||||
*
|
||||
* This function must be called before attempting to use any NMI or standard
|
||||
* external interrupt channel functions.
|
||||
*
|
||||
* \note When SYSTEM module is used, this function will be invoked by
|
||||
* \ref system_init() automatically if the module is included.
|
||||
*/
|
||||
void _system_extint_init(void);
|
||||
void _system_extint_init(void)
|
||||
{
|
||||
Eic *const eics[EIC_INST_NUM] = EIC_INSTS;
|
||||
|
||||
/* Turn on the digital interface clock */
|
||||
system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBA, PM_APBAMASK_EIC);
|
||||
|
||||
/* Configure the generic clock for the module and enable it */
|
||||
struct system_gclk_chan_config gclk_chan_conf;
|
||||
system_gclk_chan_get_config_defaults(&gclk_chan_conf);
|
||||
gclk_chan_conf.source_generator = EXTINT_CLOCK_SOURCE;
|
||||
system_gclk_chan_set_config(EIC_GCLK_ID, &gclk_chan_conf);
|
||||
|
||||
/* Enable the clock anyway, since when needed it will be requested
|
||||
* by External Interrupt driver */
|
||||
system_gclk_chan_enable(EIC_GCLK_ID);
|
||||
|
||||
/* Reset all EIC hardware modules. */
|
||||
for (uint32_t i = 0; i < EIC_INST_NUM; i++) {
|
||||
eics[i]->CTRL.reg |= EIC_CTRL_SWRST;
|
||||
}
|
||||
|
||||
while (extint_is_syncing()) {
|
||||
/* Wait for all hardware modules to complete synchronization */
|
||||
}
|
||||
|
||||
/* Reset the software module */
|
||||
#if EXTINT_CALLBACK_MODE == true
|
||||
/* Clear callback registration table */
|
||||
for (uint8_t j = 0; j < EIC_NUMBER_OF_INTERRUPTS; j++) {
|
||||
_extint_dev.callbacks[j] = NULL;
|
||||
}
|
||||
system_interrupt_enable(SYSTEM_INTERRUPT_MODULE_EIC);
|
||||
#endif
|
||||
|
||||
/* Enables the driver for further use */
|
||||
_extint_enable();
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief Enables the External Interrupt driver.
|
||||
*
|
||||
* Enables EIC modules.
|
||||
* Registered callback list will not be affected if callback mode is used.
|
||||
*/
|
||||
void _extint_enable(void)
|
||||
{
|
||||
Eic *const eics[EIC_INST_NUM] = EIC_INSTS;
|
||||
|
||||
/* Enable all EIC hardware modules. */
|
||||
for (uint32_t i = 0; i < EIC_INST_NUM; i++) {
|
||||
eics[i]->CTRL.reg |= EIC_CTRL_ENABLE;
|
||||
}
|
||||
|
||||
while (extint_is_syncing()) {
|
||||
/* Wait for all hardware modules to complete synchronization */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief Disables the External Interrupt driver.
|
||||
*
|
||||
* Disables EIC modules that were previously started via a call to
|
||||
* \ref _extint_enable().
|
||||
* Registered callback list will not be affected if callback mode is used.
|
||||
*/
|
||||
void _extint_disable(void)
|
||||
{
|
||||
Eic *const eics[EIC_INST_NUM] = EIC_INSTS;
|
||||
|
||||
/* Disable all EIC hardware modules. */
|
||||
for (uint32_t i = 0; i < EIC_INST_NUM; i++) {
|
||||
eics[i]->CTRL.reg &= ~EIC_CTRL_ENABLE;
|
||||
}
|
||||
|
||||
while (extint_is_syncing()) {
|
||||
/* Wait for all hardware modules to complete synchronization */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Initializes an External Interrupt channel configuration structure to defaults.
|
||||
*
|
||||
* Initializes a given External Interrupt channel configuration structure to a
|
||||
* set of known default values. This function should be called on all new
|
||||
* instances of these configuration structures before being modified by the
|
||||
* user application.
|
||||
*
|
||||
* The default configuration is as follows:
|
||||
* \li Wake the device if an edge detection occurs whilst in sleep
|
||||
* \li Input filtering disabled
|
||||
* \li Internal pull-up enabled
|
||||
* \li Detect falling edges of a signal
|
||||
*
|
||||
* \param[out] config Configuration structure to initialize to default values
|
||||
*/
|
||||
void extint_chan_get_config_defaults(
|
||||
struct extint_chan_conf *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(config);
|
||||
|
||||
/* Default configuration values */
|
||||
config->gpio_pin = 0;
|
||||
config->gpio_pin_mux = 0;
|
||||
config->gpio_pin_pull = EXTINT_PULL_UP;
|
||||
config->wake_if_sleeping = true;
|
||||
config->filter_input_signal = false;
|
||||
config->detection_criteria = EXTINT_DETECT_FALLING;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Writes an External Interrupt channel configuration to the hardware module.
|
||||
*
|
||||
* Writes out a given configuration of an External Interrupt channel
|
||||
* configuration to the hardware module. If the channel is already configured,
|
||||
* the new configuration will replace the existing one.
|
||||
*
|
||||
* \param[in] channel External Interrupt channel to configure
|
||||
* \param[in] config Configuration settings for the channel
|
||||
|
||||
*/
|
||||
void extint_chan_set_config(
|
||||
const uint8_t channel,
|
||||
const struct extint_chan_conf *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(config);
|
||||
/* Sanity check clock requirements */
|
||||
Assert(!(!system_gclk_gen_is_enabled(EXTINT_CLOCK_SOURCE) &&
|
||||
_extint_is_gclk_required(config->filter_input_signal,
|
||||
config->detection_criteria)));
|
||||
|
||||
struct system_pinmux_config pinmux_config;
|
||||
system_pinmux_get_config_defaults(&pinmux_config);
|
||||
|
||||
pinmux_config.mux_position = config->gpio_pin_mux;
|
||||
pinmux_config.direction = SYSTEM_PINMUX_PIN_DIR_INPUT;
|
||||
pinmux_config.input_pull = (enum system_pinmux_pin_pull)config->gpio_pin_pull;
|
||||
system_pinmux_pin_set_config(config->gpio_pin, &pinmux_config);
|
||||
|
||||
/* Get a pointer to the module hardware instance */
|
||||
Eic *const EIC_module = _extint_get_eic_from_channel(channel);
|
||||
|
||||
uint32_t config_pos = (4 * (channel % 8));
|
||||
uint32_t new_config;
|
||||
|
||||
/* Determine the channel's new edge detection configuration */
|
||||
new_config = (config->detection_criteria << EIC_CONFIG_SENSE0_Pos);
|
||||
|
||||
/* Enable the hardware signal filter if requested in the config */
|
||||
if (config->filter_input_signal) {
|
||||
new_config |= EIC_CONFIG_FILTEN0;
|
||||
}
|
||||
|
||||
/* Clear the existing and set the new channel configuration */
|
||||
EIC_module->CONFIG[channel / 8].reg
|
||||
= (EIC_module->CONFIG[channel / 8].reg &
|
||||
~((EIC_CONFIG_SENSE0_Msk | EIC_CONFIG_FILTEN0) << config_pos)) |
|
||||
(new_config << config_pos);
|
||||
|
||||
/* Set the channel's new wake up mode setting */
|
||||
if (config->wake_if_sleeping) {
|
||||
EIC_module->WAKEUP.reg |= (1UL << channel);
|
||||
} else {
|
||||
EIC_module->WAKEUP.reg &= ~(1UL << channel);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Writes an External Interrupt NMI channel configuration to the hardware module.
|
||||
*
|
||||
* Writes out a given configuration of an External Interrupt NMI channel
|
||||
* configuration to the hardware module. If the channel is already configured,
|
||||
* the new configuration will replace the existing one.
|
||||
*
|
||||
* \param[in] nmi_channel External Interrupt NMI channel to configure
|
||||
* \param[in] config Configuration settings for the channel
|
||||
*
|
||||
* \returns Status code indicating the success or failure of the request.
|
||||
* \retval STATUS_OK Configuration succeeded
|
||||
* \retval STATUS_ERR_PIN_MUX_INVALID An invalid pinmux value was supplied
|
||||
* \retval STATUS_ERR_BAD_FORMAT An invalid detection mode was requested
|
||||
*/
|
||||
enum status_code extint_nmi_set_config(
|
||||
const uint8_t nmi_channel,
|
||||
const struct extint_nmi_conf *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(config);
|
||||
/* Sanity check clock requirements */
|
||||
Assert(!(!system_gclk_gen_is_enabled(EXTINT_CLOCK_SOURCE) &&
|
||||
_extint_is_gclk_required(config->filter_input_signal,
|
||||
config->detection_criteria)));
|
||||
|
||||
struct system_pinmux_config pinmux_config;
|
||||
system_pinmux_get_config_defaults(&pinmux_config);
|
||||
|
||||
pinmux_config.mux_position = config->gpio_pin_mux;
|
||||
pinmux_config.direction = SYSTEM_PINMUX_PIN_DIR_INPUT;
|
||||
pinmux_config.input_pull = SYSTEM_PINMUX_PIN_PULL_UP;
|
||||
pinmux_config.input_pull = (enum system_pinmux_pin_pull)config->gpio_pin_pull;
|
||||
system_pinmux_pin_set_config(config->gpio_pin, &pinmux_config);
|
||||
|
||||
/* Get a pointer to the module hardware instance */
|
||||
Eic *const EIC_module = _extint_get_eic_from_channel(nmi_channel);
|
||||
|
||||
uint32_t new_config;
|
||||
|
||||
/* Determine the NMI's new edge detection configuration */
|
||||
new_config = (config->detection_criteria << EIC_NMICTRL_NMISENSE_Pos);
|
||||
|
||||
/* Enable the hardware signal filter if requested in the config */
|
||||
if (config->filter_input_signal) {
|
||||
new_config |= EIC_NMICTRL_NMIFILTEN;
|
||||
}
|
||||
|
||||
/* Disable EIC and general clock to configure NMI */
|
||||
_extint_disable();
|
||||
system_gclk_chan_disable(EIC_GCLK_ID);
|
||||
|
||||
EIC_module->NMICTRL.reg = new_config;
|
||||
|
||||
/* Enable the general clock and EIC after configure NMI */
|
||||
system_gclk_chan_enable(EIC_GCLK_ID);
|
||||
_extint_enable();
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Enables an External Interrupt event output.
|
||||
*
|
||||
* Enables one or more output events from the External Interrupt module. See
|
||||
* \ref extint_events "here" for a list of events this module supports.
|
||||
*
|
||||
* \note Events cannot be altered while the module is enabled.
|
||||
*
|
||||
* \param[in] events Struct containing flags of events to enable
|
||||
*/
|
||||
void extint_enable_events(
|
||||
struct extint_events *const events)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(events);
|
||||
|
||||
/* Array of available EICs. */
|
||||
Eic *const eics[EIC_INST_NUM] = EIC_INSTS;
|
||||
|
||||
/* Update the event control register for each physical EIC instance */
|
||||
for (uint32_t i = 0; i < EIC_INST_NUM; i++) {
|
||||
uint32_t event_mask = 0;
|
||||
|
||||
/* Create an enable mask for the current EIC module */
|
||||
for (uint32_t j = 0; j < 32; j++) {
|
||||
if (events->generate_event_on_detect[(32 * i) + j]) {
|
||||
event_mask |= (1UL << j);
|
||||
}
|
||||
}
|
||||
|
||||
/* Enable the masked events */
|
||||
eics[i]->EVCTRL.reg |= event_mask;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disables an External Interrupt event output.
|
||||
*
|
||||
* Disables one or more output events from the External Interrupt module. See
|
||||
* \ref extint_events "here" for a list of events this module supports.
|
||||
*
|
||||
* \note Events cannot be altered while the module is enabled.
|
||||
*
|
||||
* \param[in] events Struct containing flags of events to disable
|
||||
*/
|
||||
void extint_disable_events(
|
||||
struct extint_events *const events)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(events);
|
||||
|
||||
/* Array of available EICs. */
|
||||
Eic *const eics[EIC_INST_NUM] = EIC_INSTS;
|
||||
|
||||
/* Update the event control register for each physical EIC instance */
|
||||
for (uint32_t i = 0; i < EIC_INST_NUM; i++) {
|
||||
uint32_t event_mask = 0;
|
||||
|
||||
/* Create a disable mask for the current EIC module */
|
||||
for (uint32_t j = 0; j < 32; j++) {
|
||||
if (events->generate_event_on_detect[(32 * i) + j]) {
|
||||
event_mask |= (1UL << j);
|
||||
}
|
||||
}
|
||||
|
||||
/* Disable the masked events */
|
||||
eics[i]->EVCTRL.reg &= ~event_mask;
|
||||
}
|
||||
}
|
||||
|
||||
@ -1,99 +1,99 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM GPIO Port Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#include <port.h>
|
||||
|
||||
/**
|
||||
* \brief Writes a Port pin configuration to the hardware module.
|
||||
*
|
||||
* Writes out a given configuration of a Port pin configuration to the hardware
|
||||
* module.
|
||||
*
|
||||
* \note If the pin direction is set as an output, the pull-up/pull-down input
|
||||
* configuration setting is ignored.
|
||||
*
|
||||
* \param[in] gpio_pin Index of the GPIO pin to configure
|
||||
* \param[in] config Configuration settings for the pin
|
||||
*/
|
||||
void port_pin_set_config(
|
||||
const uint8_t gpio_pin,
|
||||
const struct port_config *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(config);
|
||||
|
||||
struct system_pinmux_config pinmux_config;
|
||||
system_pinmux_get_config_defaults(&pinmux_config);
|
||||
|
||||
pinmux_config.mux_position = SYSTEM_PINMUX_GPIO;
|
||||
pinmux_config.direction = (enum system_pinmux_pin_dir)config->direction;
|
||||
pinmux_config.input_pull = (enum system_pinmux_pin_pull)config->input_pull;
|
||||
pinmux_config.powersave = config->powersave;
|
||||
|
||||
system_pinmux_pin_set_config(gpio_pin, &pinmux_config);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Writes a Port group configuration group to the hardware module.
|
||||
*
|
||||
* Writes out a given configuration of a Port group configuration to the
|
||||
* hardware module.
|
||||
*
|
||||
* \note If the pin direction is set as an output, the pull-up/pull-down input
|
||||
* configuration setting is ignored.
|
||||
*
|
||||
* \param[out] port Base of the PORT module to write to
|
||||
* \param[in] mask Mask of the port pin(s) to configure
|
||||
* \param[in] config Configuration settings for the pin group
|
||||
*/
|
||||
void port_group_set_config(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const struct port_config *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(port);
|
||||
Assert(config);
|
||||
|
||||
struct system_pinmux_config pinmux_config;
|
||||
system_pinmux_get_config_defaults(&pinmux_config);
|
||||
|
||||
pinmux_config.mux_position = SYSTEM_PINMUX_GPIO;
|
||||
pinmux_config.direction = (enum system_pinmux_pin_dir)config->direction;
|
||||
pinmux_config.input_pull = (enum system_pinmux_pin_pull)config->input_pull;
|
||||
pinmux_config.powersave = config->powersave;
|
||||
|
||||
system_pinmux_group_set_config(port, mask, &pinmux_config);
|
||||
}
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM GPIO Port Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#include <port.h>
|
||||
|
||||
/**
|
||||
* \brief Writes a Port pin configuration to the hardware module.
|
||||
*
|
||||
* Writes out a given configuration of a Port pin configuration to the hardware
|
||||
* module.
|
||||
*
|
||||
* \note If the pin direction is set as an output, the pull-up/pull-down input
|
||||
* configuration setting is ignored.
|
||||
*
|
||||
* \param[in] gpio_pin Index of the GPIO pin to configure
|
||||
* \param[in] config Configuration settings for the pin
|
||||
*/
|
||||
void port_pin_set_config(
|
||||
const uint8_t gpio_pin,
|
||||
const struct port_config *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(config);
|
||||
|
||||
struct system_pinmux_config pinmux_config;
|
||||
system_pinmux_get_config_defaults(&pinmux_config);
|
||||
|
||||
pinmux_config.mux_position = SYSTEM_PINMUX_GPIO;
|
||||
pinmux_config.direction = (enum system_pinmux_pin_dir)config->direction;
|
||||
pinmux_config.input_pull = (enum system_pinmux_pin_pull)config->input_pull;
|
||||
pinmux_config.powersave = config->powersave;
|
||||
|
||||
system_pinmux_pin_set_config(gpio_pin, &pinmux_config);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Writes a Port group configuration group to the hardware module.
|
||||
*
|
||||
* Writes out a given configuration of a Port group configuration to the
|
||||
* hardware module.
|
||||
*
|
||||
* \note If the pin direction is set as an output, the pull-up/pull-down input
|
||||
* configuration setting is ignored.
|
||||
*
|
||||
* \param[out] port Base of the PORT module to write to
|
||||
* \param[in] mask Mask of the port pin(s) to configure
|
||||
* \param[in] config Configuration settings for the pin group
|
||||
*/
|
||||
void port_group_set_config(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const struct port_config *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(port);
|
||||
Assert(config);
|
||||
|
||||
struct system_pinmux_config pinmux_config;
|
||||
system_pinmux_get_config_defaults(&pinmux_config);
|
||||
|
||||
pinmux_config.mux_position = SYSTEM_PINMUX_GPIO;
|
||||
pinmux_config.direction = (enum system_pinmux_pin_dir)config->direction;
|
||||
pinmux_config.input_pull = (enum system_pinmux_pin_pull)config->input_pull;
|
||||
pinmux_config.powersave = config->powersave;
|
||||
|
||||
system_pinmux_group_set_config(port, mask, &pinmux_config);
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,98 +1,98 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM GPIO Port Driver Quick Start
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_port_basic_use_case Quick Start Guide for PORT - Basic
|
||||
*
|
||||
* In this use case, the PORT module is configured for:
|
||||
* \li One pin in input mode, with pull-up enabled
|
||||
* \li One pin in output mode
|
||||
*
|
||||
* This use case sets up the PORT to read the current state of a GPIO pin set as
|
||||
* an input, and mirrors the opposite logical state on a pin configured as an
|
||||
* output.
|
||||
*
|
||||
* \section asfdoc_sam0_port_basic_use_case_setup Setup
|
||||
*
|
||||
* \subsection asfdoc_sam0_port_basic_use_case_setup_prereq Prerequisites
|
||||
* There are no special setup requirements for this use-case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_port_basic_use_case_setup_code Code
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_port_basic.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_port_basic.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_port_basic_use_case_setup_flow Workflow
|
||||
* -# Create a PORT module pin configuration struct, which can be filled out to
|
||||
* adjust the configuration of a single port pin.
|
||||
* \snippet qs_port_basic.c setup_1
|
||||
* -# Initialize the pin configuration struct with the module's default values.
|
||||
* \snippet qs_port_basic.c setup_2
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Adjust the configuration struct to request an input pin.
|
||||
* \snippet qs_port_basic.c setup_3
|
||||
* -# Configure push button pin with the initialized pin configuration struct, to enable
|
||||
* the input sampler on the pin.
|
||||
* \snippet qs_port_basic.c setup_4
|
||||
* -# Adjust the configuration struct to request an output pin.
|
||||
* \snippet qs_port_basic.c setup_5
|
||||
* \note The existing configuration struct may be re-used, as long as any
|
||||
* values that have been altered from the default settings are taken
|
||||
* into account by the user application.
|
||||
*
|
||||
* -# Configure LED pin with the initialized pin configuration struct, to enable
|
||||
* the output driver on the pin.
|
||||
* \snippet qs_port_basic.c setup_6
|
||||
*
|
||||
* \section asfdoc_sam0_port_basic_use_case_use_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_port_basic_use_case_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_port_basic.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_port_basic_use_case_flow Workflow
|
||||
* -# Read in the current input sampler state of push button pin, which has been
|
||||
* configured as an input in the use-case setup code.
|
||||
* \snippet qs_port_basic.c main_1
|
||||
* -# Write the inverted pin level state to LED pin, which has been configured as
|
||||
* an output in the use-case setup code.
|
||||
* \snippet qs_port_basic.c main_2
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM GPIO Port Driver Quick Start
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_port_basic_use_case Quick Start Guide for PORT - Basic
|
||||
*
|
||||
* In this use case, the PORT module is configured for:
|
||||
* \li One pin in input mode, with pull-up enabled
|
||||
* \li One pin in output mode
|
||||
*
|
||||
* This use case sets up the PORT to read the current state of a GPIO pin set as
|
||||
* an input, and mirrors the opposite logical state on a pin configured as an
|
||||
* output.
|
||||
*
|
||||
* \section asfdoc_sam0_port_basic_use_case_setup Setup
|
||||
*
|
||||
* \subsection asfdoc_sam0_port_basic_use_case_setup_prereq Prerequisites
|
||||
* There are no special setup requirements for this use-case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_port_basic_use_case_setup_code Code
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_port_basic.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_port_basic.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_port_basic_use_case_setup_flow Workflow
|
||||
* -# Create a PORT module pin configuration struct, which can be filled out to
|
||||
* adjust the configuration of a single port pin.
|
||||
* \snippet qs_port_basic.c setup_1
|
||||
* -# Initialize the pin configuration struct with the module's default values.
|
||||
* \snippet qs_port_basic.c setup_2
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Adjust the configuration struct to request an input pin.
|
||||
* \snippet qs_port_basic.c setup_3
|
||||
* -# Configure push button pin with the initialized pin configuration struct, to enable
|
||||
* the input sampler on the pin.
|
||||
* \snippet qs_port_basic.c setup_4
|
||||
* -# Adjust the configuration struct to request an output pin.
|
||||
* \snippet qs_port_basic.c setup_5
|
||||
* \note The existing configuration struct may be re-used, as long as any
|
||||
* values that have been altered from the default settings are taken
|
||||
* into account by the user application.
|
||||
*
|
||||
* -# Configure LED pin with the initialized pin configuration struct, to enable
|
||||
* the output driver on the pin.
|
||||
* \snippet qs_port_basic.c setup_6
|
||||
*
|
||||
* \section asfdoc_sam0_port_basic_use_case_use_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_port_basic_use_case_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_port_basic.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_port_basic_use_case_flow Workflow
|
||||
* -# Read in the current input sampler state of push button pin, which has been
|
||||
* configured as an input in the use-case setup code.
|
||||
* \snippet qs_port_basic.c main_1
|
||||
* -# Write the inverted pin level state to LED pin, which has been configured as
|
||||
* an output in the use-case setup code.
|
||||
* \snippet qs_port_basic.c main_2
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
@ -1,280 +1,280 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Serial Peripheral Interface Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#include "sercom.h"
|
||||
|
||||
#define SHIFT 32
|
||||
#define BAUD_INT_MAX 8192
|
||||
#define BAUD_FP_MAX 8
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
/**
|
||||
* \internal Configuration structure to save current gclk status.
|
||||
*/
|
||||
struct _sercom_conf {
|
||||
/* Status of gclk generator initialization */
|
||||
bool generator_is_set;
|
||||
/* Sercom gclk generator used */
|
||||
enum gclk_generator generator_source;
|
||||
};
|
||||
|
||||
static struct _sercom_conf _sercom_config;
|
||||
|
||||
|
||||
/**
|
||||
* \internal Calculate 64 bit division, ref can be found in
|
||||
* http://en.wikipedia.org/wiki/Division_algorithm#Long_division
|
||||
*/
|
||||
static uint64_t long_division(uint64_t n, uint64_t d)
|
||||
{
|
||||
int32_t i;
|
||||
uint64_t q = 0, r = 0, bit_shift;
|
||||
for (i = 63; i >= 0; i--) {
|
||||
bit_shift = (uint64_t)1 << i;
|
||||
|
||||
r = r << 1;
|
||||
|
||||
if (n & bit_shift) {
|
||||
r |= 0x01;
|
||||
}
|
||||
|
||||
if (r >= d) {
|
||||
r = r - d;
|
||||
q |= bit_shift;
|
||||
}
|
||||
}
|
||||
|
||||
return q;
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal Calculate synchronous baudrate value (SPI/UART)
|
||||
*/
|
||||
enum status_code _sercom_get_sync_baud_val(
|
||||
const uint32_t baudrate,
|
||||
const uint32_t external_clock,
|
||||
uint16_t *const baudvalue)
|
||||
{
|
||||
/* Baud value variable */
|
||||
uint16_t baud_calculated = 0;
|
||||
uint32_t clock_value = external_clock;
|
||||
|
||||
|
||||
/* Check if baudrate is outside of valid range */
|
||||
if (baudrate > (external_clock / 2)) {
|
||||
/* Return with error code */
|
||||
return STATUS_ERR_BAUDRATE_UNAVAILABLE;
|
||||
}
|
||||
|
||||
/* Calculate BAUD value from clock frequency and baudrate */
|
||||
clock_value = external_clock / 2;
|
||||
while (clock_value >= baudrate) {
|
||||
clock_value = clock_value - baudrate;
|
||||
baud_calculated++;
|
||||
}
|
||||
baud_calculated = baud_calculated - 1;
|
||||
|
||||
/* Check if BAUD value is more than 255, which is maximum
|
||||
* for synchronous mode */
|
||||
if (baud_calculated > 0xFF) {
|
||||
/* Return with an error code */
|
||||
return STATUS_ERR_BAUDRATE_UNAVAILABLE;
|
||||
} else {
|
||||
*baudvalue = baud_calculated;
|
||||
return STATUS_OK;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal Calculate asynchronous baudrate value (UART)
|
||||
*/
|
||||
enum status_code _sercom_get_async_baud_val(
|
||||
const uint32_t baudrate,
|
||||
const uint32_t peripheral_clock,
|
||||
uint16_t *const baudval,
|
||||
enum sercom_asynchronous_operation_mode mode,
|
||||
enum sercom_asynchronous_sample_num sample_num)
|
||||
{
|
||||
/* Temporary variables */
|
||||
uint64_t ratio = 0;
|
||||
uint64_t scale = 0;
|
||||
uint64_t baud_calculated = 0;
|
||||
uint8_t baud_fp;
|
||||
uint32_t baud_int = 0;
|
||||
uint64_t temp1;
|
||||
|
||||
/* Check if the baudrate is outside of valid range */
|
||||
if ((baudrate * sample_num) > peripheral_clock) {
|
||||
/* Return with error code */
|
||||
return STATUS_ERR_BAUDRATE_UNAVAILABLE;
|
||||
}
|
||||
|
||||
if(mode == SERCOM_ASYNC_OPERATION_MODE_ARITHMETIC) {
|
||||
/* Calculate the BAUD value */
|
||||
temp1 = ((sample_num * (uint64_t)baudrate) << SHIFT);
|
||||
ratio = long_division(temp1, peripheral_clock);
|
||||
scale = ((uint64_t)1 << SHIFT) - ratio;
|
||||
baud_calculated = (65536 * scale) >> SHIFT;
|
||||
} else if(mode == SERCOM_ASYNC_OPERATION_MODE_FRACTIONAL) {
|
||||
temp1 = ((uint64_t)baudrate * sample_num);
|
||||
baud_int = long_division( peripheral_clock, temp1);
|
||||
if(baud_int > BAUD_INT_MAX) {
|
||||
return STATUS_ERR_BAUDRATE_UNAVAILABLE;
|
||||
}
|
||||
temp1 = long_division( 8 * (uint64_t)peripheral_clock, temp1);
|
||||
baud_fp = temp1 - 8 * baud_int;
|
||||
baud_calculated = baud_int | (baud_fp << 13);
|
||||
}
|
||||
|
||||
*baudval = baud_calculated;
|
||||
return STATUS_OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief Set GCLK channel to generator.
|
||||
*
|
||||
* This will set the appropriate GCLK channel to the requested GCLK generator.
|
||||
* This will set the generator for all SERCOM instances, and the user will thus
|
||||
* only be able to set the same generator that has previously been set, if any.
|
||||
*
|
||||
* After the generator has been set the first time, the generator can be changed
|
||||
* using the \c force_change flag.
|
||||
*
|
||||
* \param[in] generator_source The generator to use for SERCOM.
|
||||
* \param[in] force_change Force change the generator.
|
||||
*
|
||||
* \return Status code indicating the GCLK generator change operation.
|
||||
* \retval STATUS_OK If the generator update request was
|
||||
* successful.
|
||||
* \retval STATUS_ERR_ALREADY_INITIALIZED If a generator was already configured
|
||||
* and the new configuration was not
|
||||
* forced.
|
||||
*/
|
||||
enum status_code sercom_set_gclk_generator(
|
||||
const enum gclk_generator generator_source,
|
||||
const bool force_change)
|
||||
{
|
||||
/* Check if valid option */
|
||||
if (!_sercom_config.generator_is_set || force_change) {
|
||||
/* Create and fill a GCLK configuration structure for the new config */
|
||||
struct system_gclk_chan_config gclk_chan_conf;
|
||||
system_gclk_chan_get_config_defaults(&gclk_chan_conf);
|
||||
gclk_chan_conf.source_generator = generator_source;
|
||||
system_gclk_chan_set_config(SERCOM_GCLK_ID, &gclk_chan_conf);
|
||||
system_gclk_chan_enable(SERCOM_GCLK_ID);
|
||||
|
||||
/* Save config */
|
||||
_sercom_config.generator_source = generator_source;
|
||||
_sercom_config.generator_is_set = true;
|
||||
|
||||
return STATUS_OK;
|
||||
} else if (generator_source == _sercom_config.generator_source) {
|
||||
/* Return status OK if same config */
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/* Return invalid config to already initialized GCLK */
|
||||
return STATUS_ERR_ALREADY_INITIALIZED;
|
||||
}
|
||||
|
||||
/** \internal
|
||||
* Creates a switch statement case entry to convert a SERCOM instance and pad
|
||||
* index to the default SERCOM pad MUX setting.
|
||||
*/
|
||||
#define _SERCOM_PAD_DEFAULTS_CASE(n, pad) \
|
||||
case (uintptr_t)SERCOM##n: \
|
||||
switch (pad) { \
|
||||
case 0: \
|
||||
return SERCOM##n##_PAD0_DEFAULT; \
|
||||
case 1: \
|
||||
return SERCOM##n##_PAD1_DEFAULT; \
|
||||
case 2: \
|
||||
return SERCOM##n##_PAD2_DEFAULT; \
|
||||
case 3: \
|
||||
return SERCOM##n##_PAD3_DEFAULT; \
|
||||
} \
|
||||
break;
|
||||
|
||||
/**
|
||||
* \internal Gets the default PAD pinout for a given SERCOM.
|
||||
*
|
||||
* Returns the pinmux settings for the given SERCOM and pad. This is used
|
||||
* for default configuration of pins.
|
||||
*
|
||||
* \param[in] sercom_module Pointer to the SERCOM module
|
||||
* \param[in] pad PAD to get default pinout for
|
||||
*
|
||||
* \returns The default pinmux for the given SERCOM instance and PAD
|
||||
*
|
||||
*/
|
||||
uint32_t _sercom_get_default_pad(
|
||||
Sercom *const sercom_module,
|
||||
const uint8_t pad)
|
||||
{
|
||||
switch ((uintptr_t)sercom_module) {
|
||||
/* Auto-generate a lookup table for the default SERCOM pad defaults */
|
||||
MREPEAT(SERCOM_INST_NUM, _SERCOM_PAD_DEFAULTS_CASE, pad)
|
||||
}
|
||||
|
||||
Assert(false);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Find index of given instance.
|
||||
*
|
||||
* \param[in] sercom_instance Instance pointer.
|
||||
*
|
||||
* \return Index of given instance.
|
||||
*/
|
||||
uint8_t _sercom_get_sercom_inst_index(
|
||||
Sercom *const sercom_instance)
|
||||
{
|
||||
/* Save all available SERCOM instances for compare */
|
||||
Sercom *sercom_instances[SERCOM_INST_NUM] = SERCOM_INSTS;
|
||||
|
||||
/* Find index for sercom instance */
|
||||
for (uint32_t i = 0; i < SERCOM_INST_NUM; i++) {
|
||||
if ((uintptr_t)sercom_instance == (uintptr_t)sercom_instances[i]) {
|
||||
return i;
|
||||
}
|
||||
}
|
||||
|
||||
/* Invalid data given */
|
||||
Assert(false);
|
||||
return 0;
|
||||
}
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Serial Peripheral Interface Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#include "sercom.h"
|
||||
|
||||
#define SHIFT 32
|
||||
#define BAUD_INT_MAX 8192
|
||||
#define BAUD_FP_MAX 8
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
/**
|
||||
* \internal Configuration structure to save current gclk status.
|
||||
*/
|
||||
struct _sercom_conf {
|
||||
/* Status of gclk generator initialization */
|
||||
bool generator_is_set;
|
||||
/* Sercom gclk generator used */
|
||||
enum gclk_generator generator_source;
|
||||
};
|
||||
|
||||
static struct _sercom_conf _sercom_config;
|
||||
|
||||
|
||||
/**
|
||||
* \internal Calculate 64 bit division, ref can be found in
|
||||
* http://en.wikipedia.org/wiki/Division_algorithm#Long_division
|
||||
*/
|
||||
static uint64_t long_division(uint64_t n, uint64_t d)
|
||||
{
|
||||
int32_t i;
|
||||
uint64_t q = 0, r = 0, bit_shift;
|
||||
for (i = 63; i >= 0; i--) {
|
||||
bit_shift = (uint64_t)1 << i;
|
||||
|
||||
r = r << 1;
|
||||
|
||||
if (n & bit_shift) {
|
||||
r |= 0x01;
|
||||
}
|
||||
|
||||
if (r >= d) {
|
||||
r = r - d;
|
||||
q |= bit_shift;
|
||||
}
|
||||
}
|
||||
|
||||
return q;
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal Calculate synchronous baudrate value (SPI/UART)
|
||||
*/
|
||||
enum status_code _sercom_get_sync_baud_val(
|
||||
const uint32_t baudrate,
|
||||
const uint32_t external_clock,
|
||||
uint16_t *const baudvalue)
|
||||
{
|
||||
/* Baud value variable */
|
||||
uint16_t baud_calculated = 0;
|
||||
uint32_t clock_value = external_clock;
|
||||
|
||||
|
||||
/* Check if baudrate is outside of valid range */
|
||||
if (baudrate > (external_clock / 2)) {
|
||||
/* Return with error code */
|
||||
return STATUS_ERR_BAUDRATE_UNAVAILABLE;
|
||||
}
|
||||
|
||||
/* Calculate BAUD value from clock frequency and baudrate */
|
||||
clock_value = external_clock / 2;
|
||||
while (clock_value >= baudrate) {
|
||||
clock_value = clock_value - baudrate;
|
||||
baud_calculated++;
|
||||
}
|
||||
baud_calculated = baud_calculated - 1;
|
||||
|
||||
/* Check if BAUD value is more than 255, which is maximum
|
||||
* for synchronous mode */
|
||||
if (baud_calculated > 0xFF) {
|
||||
/* Return with an error code */
|
||||
return STATUS_ERR_BAUDRATE_UNAVAILABLE;
|
||||
} else {
|
||||
*baudvalue = baud_calculated;
|
||||
return STATUS_OK;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal Calculate asynchronous baudrate value (UART)
|
||||
*/
|
||||
enum status_code _sercom_get_async_baud_val(
|
||||
const uint32_t baudrate,
|
||||
const uint32_t peripheral_clock,
|
||||
uint16_t *const baudval,
|
||||
enum sercom_asynchronous_operation_mode mode,
|
||||
enum sercom_asynchronous_sample_num sample_num)
|
||||
{
|
||||
/* Temporary variables */
|
||||
uint64_t ratio = 0;
|
||||
uint64_t scale = 0;
|
||||
uint64_t baud_calculated = 0;
|
||||
uint8_t baud_fp;
|
||||
uint32_t baud_int = 0;
|
||||
uint64_t temp1;
|
||||
|
||||
/* Check if the baudrate is outside of valid range */
|
||||
if ((baudrate * sample_num) > peripheral_clock) {
|
||||
/* Return with error code */
|
||||
return STATUS_ERR_BAUDRATE_UNAVAILABLE;
|
||||
}
|
||||
|
||||
if(mode == SERCOM_ASYNC_OPERATION_MODE_ARITHMETIC) {
|
||||
/* Calculate the BAUD value */
|
||||
temp1 = ((sample_num * (uint64_t)baudrate) << SHIFT);
|
||||
ratio = long_division(temp1, peripheral_clock);
|
||||
scale = ((uint64_t)1 << SHIFT) - ratio;
|
||||
baud_calculated = (65536 * scale) >> SHIFT;
|
||||
} else if(mode == SERCOM_ASYNC_OPERATION_MODE_FRACTIONAL) {
|
||||
temp1 = ((uint64_t)baudrate * sample_num);
|
||||
baud_int = long_division( peripheral_clock, temp1);
|
||||
if(baud_int > BAUD_INT_MAX) {
|
||||
return STATUS_ERR_BAUDRATE_UNAVAILABLE;
|
||||
}
|
||||
temp1 = long_division( 8 * (uint64_t)peripheral_clock, temp1);
|
||||
baud_fp = temp1 - 8 * baud_int;
|
||||
baud_calculated = baud_int | (baud_fp << 13);
|
||||
}
|
||||
|
||||
*baudval = baud_calculated;
|
||||
return STATUS_OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief Set GCLK channel to generator.
|
||||
*
|
||||
* This will set the appropriate GCLK channel to the requested GCLK generator.
|
||||
* This will set the generator for all SERCOM instances, and the user will thus
|
||||
* only be able to set the same generator that has previously been set, if any.
|
||||
*
|
||||
* After the generator has been set the first time, the generator can be changed
|
||||
* using the \c force_change flag.
|
||||
*
|
||||
* \param[in] generator_source The generator to use for SERCOM.
|
||||
* \param[in] force_change Force change the generator.
|
||||
*
|
||||
* \return Status code indicating the GCLK generator change operation.
|
||||
* \retval STATUS_OK If the generator update request was
|
||||
* successful.
|
||||
* \retval STATUS_ERR_ALREADY_INITIALIZED If a generator was already configured
|
||||
* and the new configuration was not
|
||||
* forced.
|
||||
*/
|
||||
enum status_code sercom_set_gclk_generator(
|
||||
const enum gclk_generator generator_source,
|
||||
const bool force_change)
|
||||
{
|
||||
/* Check if valid option */
|
||||
if (!_sercom_config.generator_is_set || force_change) {
|
||||
/* Create and fill a GCLK configuration structure for the new config */
|
||||
struct system_gclk_chan_config gclk_chan_conf;
|
||||
system_gclk_chan_get_config_defaults(&gclk_chan_conf);
|
||||
gclk_chan_conf.source_generator = generator_source;
|
||||
system_gclk_chan_set_config(SERCOM_GCLK_ID, &gclk_chan_conf);
|
||||
system_gclk_chan_enable(SERCOM_GCLK_ID);
|
||||
|
||||
/* Save config */
|
||||
_sercom_config.generator_source = generator_source;
|
||||
_sercom_config.generator_is_set = true;
|
||||
|
||||
return STATUS_OK;
|
||||
} else if (generator_source == _sercom_config.generator_source) {
|
||||
/* Return status OK if same config */
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/* Return invalid config to already initialized GCLK */
|
||||
return STATUS_ERR_ALREADY_INITIALIZED;
|
||||
}
|
||||
|
||||
/** \internal
|
||||
* Creates a switch statement case entry to convert a SERCOM instance and pad
|
||||
* index to the default SERCOM pad MUX setting.
|
||||
*/
|
||||
#define _SERCOM_PAD_DEFAULTS_CASE(n, pad) \
|
||||
case (uintptr_t)SERCOM##n: \
|
||||
switch (pad) { \
|
||||
case 0: \
|
||||
return SERCOM##n##_PAD0_DEFAULT; \
|
||||
case 1: \
|
||||
return SERCOM##n##_PAD1_DEFAULT; \
|
||||
case 2: \
|
||||
return SERCOM##n##_PAD2_DEFAULT; \
|
||||
case 3: \
|
||||
return SERCOM##n##_PAD3_DEFAULT; \
|
||||
} \
|
||||
break;
|
||||
|
||||
/**
|
||||
* \internal Gets the default PAD pinout for a given SERCOM.
|
||||
*
|
||||
* Returns the pinmux settings for the given SERCOM and pad. This is used
|
||||
* for default configuration of pins.
|
||||
*
|
||||
* \param[in] sercom_module Pointer to the SERCOM module
|
||||
* \param[in] pad PAD to get default pinout for
|
||||
*
|
||||
* \returns The default pinmux for the given SERCOM instance and PAD
|
||||
*
|
||||
*/
|
||||
uint32_t _sercom_get_default_pad(
|
||||
Sercom *const sercom_module,
|
||||
const uint8_t pad)
|
||||
{
|
||||
switch ((uintptr_t)sercom_module) {
|
||||
/* Auto-generate a lookup table for the default SERCOM pad defaults */
|
||||
MREPEAT(SERCOM_INST_NUM, _SERCOM_PAD_DEFAULTS_CASE, pad)
|
||||
}
|
||||
|
||||
Assert(false);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Find index of given instance.
|
||||
*
|
||||
* \param[in] sercom_instance Instance pointer.
|
||||
*
|
||||
* \return Index of given instance.
|
||||
*/
|
||||
uint8_t _sercom_get_sercom_inst_index(
|
||||
Sercom *const sercom_instance)
|
||||
{
|
||||
/* Save all available SERCOM instances for compare */
|
||||
Sercom *sercom_instances[SERCOM_INST_NUM] = SERCOM_INSTS;
|
||||
|
||||
/* Find index for sercom instance */
|
||||
for (uint32_t i = 0; i < SERCOM_INST_NUM; i++) {
|
||||
if ((uintptr_t)sercom_instance == (uintptr_t)sercom_instances[i]) {
|
||||
return i;
|
||||
}
|
||||
}
|
||||
|
||||
/* Invalid data given */
|
||||
Assert(false);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1,108 +1,108 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Serial Peripheral Interface Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
#ifndef SERCOM_H_INCLUDED
|
||||
#define SERCOM_H_INCLUDED
|
||||
|
||||
#include <compiler.h>
|
||||
#include <system.h>
|
||||
#include <clock.h>
|
||||
#include <system_interrupt.h>
|
||||
#include "sercom_pinout.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* SERCOM modules should share same slow GCLK channel ID */
|
||||
#define SERCOM_GCLK_ID SERCOM0_GCLK_ID_SLOW
|
||||
|
||||
#if (0x1ff >= REV_SERCOM)
|
||||
# define FEATURE_SERCOM_SYNCBUSY_SCHEME_VERSION_1
|
||||
#elif (0x400 >= REV_SERCOM)
|
||||
# define FEATURE_SERCOM_SYNCBUSY_SCHEME_VERSION_2
|
||||
#else
|
||||
# error "Unknown SYNCBUSY scheme for this SERCOM revision"
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief sercom asynchronous operation mode
|
||||
*
|
||||
* Select sercom asynchronous operation mode
|
||||
*/
|
||||
enum sercom_asynchronous_operation_mode {
|
||||
SERCOM_ASYNC_OPERATION_MODE_ARITHMETIC = 0,
|
||||
SERCOM_ASYNC_OPERATION_MODE_FRACTIONAL,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief sercom asynchronous samples per bit
|
||||
*
|
||||
* Select number of samples per bit
|
||||
*/
|
||||
enum sercom_asynchronous_sample_num {
|
||||
SERCOM_ASYNC_SAMPLE_NUM_3 = 3,
|
||||
SERCOM_ASYNC_SAMPLE_NUM_8 = 8,
|
||||
SERCOM_ASYNC_SAMPLE_NUM_16 = 16,
|
||||
};
|
||||
|
||||
enum status_code sercom_set_gclk_generator(
|
||||
const enum gclk_generator generator_source,
|
||||
const bool force_change);
|
||||
|
||||
enum status_code _sercom_get_sync_baud_val(
|
||||
const uint32_t baudrate,
|
||||
const uint32_t external_clock,
|
||||
uint16_t *const baudval);
|
||||
|
||||
enum status_code _sercom_get_async_baud_val(
|
||||
const uint32_t baudrate,
|
||||
const uint32_t peripheral_clock,
|
||||
uint16_t *const baudval,
|
||||
enum sercom_asynchronous_operation_mode mode,
|
||||
enum sercom_asynchronous_sample_num sample_num);
|
||||
|
||||
uint32_t _sercom_get_default_pad(
|
||||
Sercom *const sercom_module,
|
||||
const uint8_t pad);
|
||||
|
||||
uint8_t _sercom_get_sercom_inst_index(
|
||||
Sercom *const sercom_instance);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif //__SERCOM_H_INCLUDED
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Serial Peripheral Interface Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
#ifndef SERCOM_H_INCLUDED
|
||||
#define SERCOM_H_INCLUDED
|
||||
|
||||
#include <compiler.h>
|
||||
#include <system.h>
|
||||
#include <clock.h>
|
||||
#include <system_interrupt.h>
|
||||
#include "sercom_pinout.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* SERCOM modules should share same slow GCLK channel ID */
|
||||
#define SERCOM_GCLK_ID SERCOM0_GCLK_ID_SLOW
|
||||
|
||||
#if (0x1ff >= REV_SERCOM)
|
||||
# define FEATURE_SERCOM_SYNCBUSY_SCHEME_VERSION_1
|
||||
#elif (0x400 >= REV_SERCOM)
|
||||
# define FEATURE_SERCOM_SYNCBUSY_SCHEME_VERSION_2
|
||||
#else
|
||||
# error "Unknown SYNCBUSY scheme for this SERCOM revision"
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief sercom asynchronous operation mode
|
||||
*
|
||||
* Select sercom asynchronous operation mode
|
||||
*/
|
||||
enum sercom_asynchronous_operation_mode {
|
||||
SERCOM_ASYNC_OPERATION_MODE_ARITHMETIC = 0,
|
||||
SERCOM_ASYNC_OPERATION_MODE_FRACTIONAL,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief sercom asynchronous samples per bit
|
||||
*
|
||||
* Select number of samples per bit
|
||||
*/
|
||||
enum sercom_asynchronous_sample_num {
|
||||
SERCOM_ASYNC_SAMPLE_NUM_3 = 3,
|
||||
SERCOM_ASYNC_SAMPLE_NUM_8 = 8,
|
||||
SERCOM_ASYNC_SAMPLE_NUM_16 = 16,
|
||||
};
|
||||
|
||||
enum status_code sercom_set_gclk_generator(
|
||||
const enum gclk_generator generator_source,
|
||||
const bool force_change);
|
||||
|
||||
enum status_code _sercom_get_sync_baud_val(
|
||||
const uint32_t baudrate,
|
||||
const uint32_t external_clock,
|
||||
uint16_t *const baudval);
|
||||
|
||||
enum status_code _sercom_get_async_baud_val(
|
||||
const uint32_t baudrate,
|
||||
const uint32_t peripheral_clock,
|
||||
uint16_t *const baudval,
|
||||
enum sercom_asynchronous_operation_mode mode,
|
||||
enum sercom_asynchronous_sample_num sample_num);
|
||||
|
||||
uint32_t _sercom_get_default_pad(
|
||||
Sercom *const sercom_module,
|
||||
const uint8_t pad);
|
||||
|
||||
uint8_t _sercom_get_sercom_inst_index(
|
||||
Sercom *const sercom_instance);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif //__SERCOM_H_INCLUDED
|
||||
|
||||
@ -1,131 +1,131 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Serial Peripheral Interface Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#include "sercom_interrupt.h"
|
||||
|
||||
void *_sercom_instances[SERCOM_INST_NUM];
|
||||
|
||||
/** Save status of initialized handlers */
|
||||
static bool _handler_table_initialized = false;
|
||||
|
||||
/** Void pointers for saving device instance structures */
|
||||
static void (*_sercom_interrupt_handlers[SERCOM_INST_NUM])(const uint8_t instance);
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Default interrupt handler.
|
||||
*
|
||||
* \param[in] instance SERCOM instance used.
|
||||
*/
|
||||
static void _sercom_default_handler(
|
||||
const uint8_t instance)
|
||||
{
|
||||
Assert(false);
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Saves the given callback handler.
|
||||
*
|
||||
* \param[in] instance Instance index.
|
||||
* \param[in] interrupt_handler Pointer to instance callback handler.
|
||||
*/
|
||||
void _sercom_set_handler(
|
||||
const uint8_t instance,
|
||||
const sercom_handler_t interrupt_handler)
|
||||
{
|
||||
/* Initialize handlers with default handler and device instances with 0 */
|
||||
if (_handler_table_initialized == false) {
|
||||
for (uint32_t i = 0; i < SERCOM_INST_NUM; i++) {
|
||||
_sercom_interrupt_handlers[i] = &_sercom_default_handler;
|
||||
_sercom_instances[i] = NULL;
|
||||
}
|
||||
|
||||
_handler_table_initialized = true;
|
||||
}
|
||||
|
||||
/* Save interrupt handler */
|
||||
_sercom_interrupt_handlers[instance] = interrupt_handler;
|
||||
}
|
||||
|
||||
|
||||
/** \internal
|
||||
* Converts a given SERCOM index to its interrupt vector index.
|
||||
*/
|
||||
#define _SERCOM_INTERRUPT_VECT_NUM(n, unused) \
|
||||
SYSTEM_INTERRUPT_MODULE_SERCOM##n,
|
||||
|
||||
/** \internal
|
||||
* Generates a SERCOM interrupt handler function for a given SERCOM index.
|
||||
*/
|
||||
#define _SERCOM_INTERRUPT_HANDLER(n, unused) \
|
||||
void SERCOM##n##_Handler(void) \
|
||||
{ \
|
||||
_sercom_interrupt_handlers[n](n); \
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Returns the system interrupt vector.
|
||||
*
|
||||
* \param[in] sercom_instance Instance pointer
|
||||
*
|
||||
* \return Enum of system interrupt vector
|
||||
* \retval SYSTEM_INTERRUPT_MODULE_SERCOM0
|
||||
* \retval SYSTEM_INTERRUPT_MODULE_SERCOM1
|
||||
* \retval SYSTEM_INTERRUPT_MODULE_SERCOM2
|
||||
* \retval SYSTEM_INTERRUPT_MODULE_SERCOM3
|
||||
* \retval SYSTEM_INTERRUPT_MODULE_SERCOM4
|
||||
* \retval SYSTEM_INTERRUPT_MODULE_SERCOM5
|
||||
* \retval SYSTEM_INTERRUPT_MODULE_SERCOM6
|
||||
* \retval SYSTEM_INTERRUPT_MODULE_SERCOM7
|
||||
*/
|
||||
enum system_interrupt_vector _sercom_get_interrupt_vector(
|
||||
Sercom *const sercom_instance)
|
||||
{
|
||||
const uint8_t sercom_int_vectors[SERCOM_INST_NUM] =
|
||||
{
|
||||
MREPEAT(SERCOM_INST_NUM, _SERCOM_INTERRUPT_VECT_NUM, ~)
|
||||
};
|
||||
|
||||
/* Retrieve the index of the SERCOM being requested */
|
||||
uint8_t instance_index = _sercom_get_sercom_inst_index(sercom_instance);
|
||||
|
||||
/* Get the vector number from the lookup table for the requested SERCOM */
|
||||
return (enum system_interrupt_vector)sercom_int_vectors[instance_index];
|
||||
}
|
||||
|
||||
/** Auto-generate a set of interrupt handlers for each SERCOM in the device */
|
||||
MREPEAT(SERCOM_INST_NUM, _SERCOM_INTERRUPT_HANDLER, ~)
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Serial Peripheral Interface Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#include "sercom_interrupt.h"
|
||||
|
||||
void *_sercom_instances[SERCOM_INST_NUM];
|
||||
|
||||
/** Save status of initialized handlers */
|
||||
static bool _handler_table_initialized = false;
|
||||
|
||||
/** Void pointers for saving device instance structures */
|
||||
static void (*_sercom_interrupt_handlers[SERCOM_INST_NUM])(const uint8_t instance);
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Default interrupt handler.
|
||||
*
|
||||
* \param[in] instance SERCOM instance used.
|
||||
*/
|
||||
static void _sercom_default_handler(
|
||||
const uint8_t instance)
|
||||
{
|
||||
Assert(false);
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Saves the given callback handler.
|
||||
*
|
||||
* \param[in] instance Instance index.
|
||||
* \param[in] interrupt_handler Pointer to instance callback handler.
|
||||
*/
|
||||
void _sercom_set_handler(
|
||||
const uint8_t instance,
|
||||
const sercom_handler_t interrupt_handler)
|
||||
{
|
||||
/* Initialize handlers with default handler and device instances with 0 */
|
||||
if (_handler_table_initialized == false) {
|
||||
for (uint32_t i = 0; i < SERCOM_INST_NUM; i++) {
|
||||
_sercom_interrupt_handlers[i] = &_sercom_default_handler;
|
||||
_sercom_instances[i] = NULL;
|
||||
}
|
||||
|
||||
_handler_table_initialized = true;
|
||||
}
|
||||
|
||||
/* Save interrupt handler */
|
||||
_sercom_interrupt_handlers[instance] = interrupt_handler;
|
||||
}
|
||||
|
||||
|
||||
/** \internal
|
||||
* Converts a given SERCOM index to its interrupt vector index.
|
||||
*/
|
||||
#define _SERCOM_INTERRUPT_VECT_NUM(n, unused) \
|
||||
SYSTEM_INTERRUPT_MODULE_SERCOM##n,
|
||||
|
||||
/** \internal
|
||||
* Generates a SERCOM interrupt handler function for a given SERCOM index.
|
||||
*/
|
||||
#define _SERCOM_INTERRUPT_HANDLER(n, unused) \
|
||||
void SERCOM##n##_Handler(void) \
|
||||
{ \
|
||||
_sercom_interrupt_handlers[n](n); \
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Returns the system interrupt vector.
|
||||
*
|
||||
* \param[in] sercom_instance Instance pointer
|
||||
*
|
||||
* \return Enum of system interrupt vector
|
||||
* \retval SYSTEM_INTERRUPT_MODULE_SERCOM0
|
||||
* \retval SYSTEM_INTERRUPT_MODULE_SERCOM1
|
||||
* \retval SYSTEM_INTERRUPT_MODULE_SERCOM2
|
||||
* \retval SYSTEM_INTERRUPT_MODULE_SERCOM3
|
||||
* \retval SYSTEM_INTERRUPT_MODULE_SERCOM4
|
||||
* \retval SYSTEM_INTERRUPT_MODULE_SERCOM5
|
||||
* \retval SYSTEM_INTERRUPT_MODULE_SERCOM6
|
||||
* \retval SYSTEM_INTERRUPT_MODULE_SERCOM7
|
||||
*/
|
||||
enum system_interrupt_vector _sercom_get_interrupt_vector(
|
||||
Sercom *const sercom_instance)
|
||||
{
|
||||
const uint8_t sercom_int_vectors[SERCOM_INST_NUM] =
|
||||
{
|
||||
MREPEAT(SERCOM_INST_NUM, _SERCOM_INTERRUPT_VECT_NUM, ~)
|
||||
};
|
||||
|
||||
/* Retrieve the index of the SERCOM being requested */
|
||||
uint8_t instance_index = _sercom_get_sercom_inst_index(sercom_instance);
|
||||
|
||||
/* Get the vector number from the lookup table for the requested SERCOM */
|
||||
return (enum system_interrupt_vector)sercom_int_vectors[instance_index];
|
||||
}
|
||||
|
||||
/** Auto-generate a set of interrupt handlers for each SERCOM in the device */
|
||||
MREPEAT(SERCOM_INST_NUM, _SERCOM_INTERRUPT_HANDLER, ~)
|
||||
|
||||
@ -1,62 +1,62 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Serial Peripheral Interface Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#ifndef SERCOM_INTERRUPT_H_INCLUDED
|
||||
#define SERCOM_INTERRUPT_H_INCLUDED
|
||||
|
||||
#include "sercom.h"
|
||||
#include <system_interrupt.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Look-up table for device instances */
|
||||
extern void *_sercom_instances[SERCOM_INST_NUM];
|
||||
|
||||
typedef void (*sercom_handler_t)(uint8_t instance);
|
||||
|
||||
enum system_interrupt_vector _sercom_get_interrupt_vector(
|
||||
Sercom *const sercom_instance);
|
||||
|
||||
void _sercom_set_handler(
|
||||
const uint8_t instance,
|
||||
const sercom_handler_t interrupt_handler);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* SERCOM_INTERRUPT_H_INCLUDED */
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Serial Peripheral Interface Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#ifndef SERCOM_INTERRUPT_H_INCLUDED
|
||||
#define SERCOM_INTERRUPT_H_INCLUDED
|
||||
|
||||
#include "sercom.h"
|
||||
#include <system_interrupt.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Look-up table for device instances */
|
||||
extern void *_sercom_instances[SERCOM_INST_NUM];
|
||||
|
||||
typedef void (*sercom_handler_t)(uint8_t instance);
|
||||
|
||||
enum system_interrupt_vector _sercom_get_interrupt_vector(
|
||||
Sercom *const sercom_instance);
|
||||
|
||||
void _sercom_set_handler(
|
||||
const uint8_t instance,
|
||||
const sercom_handler_t interrupt_handler);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* SERCOM_INTERRUPT_H_INCLUDED */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,106 +1,106 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM USART Quick Start
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_sercom_usart_basic_use_case Quick Start Guide for SERCOM USART - Basic
|
||||
*
|
||||
* This quick start will echo back characters typed into the terminal. In this
|
||||
* use case the USART will be configured with the following settings:
|
||||
* - Asynchronous mode
|
||||
* - 9600 Baudrate
|
||||
* - 8-bits, No Parity and one Stop Bit
|
||||
* - TX and RX enabled and connected to the Xplained Pro Embedded Debugger virtual COM port
|
||||
*
|
||||
* \section asfdoc_sam0_sercom_usart_basic_use_case_setup Setup
|
||||
*
|
||||
* \subsection asfdoc_sam0_sercom_usart_basic_use_case_prereq Prerequisites
|
||||
* There are no special setup requirements for this use-case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_basic_use_case_setup_code Code
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_usart_basic_use.c module_inst
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_usart_basic_use.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_usart_basic_use.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_basic_use_case_setup_flow Workflow
|
||||
* -# Create a module software instance structure for the USART module to store
|
||||
* the USART driver state while it is in use.
|
||||
* \snippet qs_usart_basic_use.c module_inst
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
*
|
||||
* -# Configure the USART module.
|
||||
* -# Create a USART module configuration struct, which can be filled out to
|
||||
* adjust the configuration of a physical USART peripheral.
|
||||
* \snippet qs_usart_basic_use.c setup_config
|
||||
* -# Initialize the USART configuration struct with the module's default values.
|
||||
* \snippet qs_usart_basic_use.c setup_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Alter the USART settings to configure the physical pinout, baudrate, and
|
||||
* other relevant parameters.
|
||||
* \snippet qs_usart_basic_use.c setup_change_config
|
||||
* -# Configure the USART module with the desired settings, retrying while the
|
||||
* driver is busy until the configuration is stressfully set.
|
||||
* \snippet qs_usart_basic_use.c setup_set_config
|
||||
* -# Enable the USART module.
|
||||
* \snippet qs_usart_basic_use.c setup_enable
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_usart_basic_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_basic_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_usart_basic_use.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_basic_use_case_main_flow Workflow
|
||||
* -# Send a string to the USART to show the demo is running, blocking until
|
||||
* all characters have been sent.
|
||||
* \snippet qs_usart_basic_use.c main_send_string
|
||||
* -# Enter an infinite loop to continuously echo received values on the USART.
|
||||
* \snippet qs_usart_basic_use.c main_loop
|
||||
* -# Perform a blocking read of the USART, storing the received character into
|
||||
* the previously declared temporary variable.
|
||||
* \snippet qs_usart_basic_use.c main_read
|
||||
* -# Echo the received variable back to the USART via a blocking write.
|
||||
* \snippet qs_usart_basic_use.c main_write
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM USART Quick Start
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_sercom_usart_basic_use_case Quick Start Guide for SERCOM USART - Basic
|
||||
*
|
||||
* This quick start will echo back characters typed into the terminal. In this
|
||||
* use case the USART will be configured with the following settings:
|
||||
* - Asynchronous mode
|
||||
* - 9600 Baudrate
|
||||
* - 8-bits, No Parity and one Stop Bit
|
||||
* - TX and RX enabled and connected to the Xplained Pro Embedded Debugger virtual COM port
|
||||
*
|
||||
* \section asfdoc_sam0_sercom_usart_basic_use_case_setup Setup
|
||||
*
|
||||
* \subsection asfdoc_sam0_sercom_usart_basic_use_case_prereq Prerequisites
|
||||
* There are no special setup requirements for this use-case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_basic_use_case_setup_code Code
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_usart_basic_use.c module_inst
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_usart_basic_use.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_usart_basic_use.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_basic_use_case_setup_flow Workflow
|
||||
* -# Create a module software instance structure for the USART module to store
|
||||
* the USART driver state while it is in use.
|
||||
* \snippet qs_usart_basic_use.c module_inst
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
*
|
||||
* -# Configure the USART module.
|
||||
* -# Create a USART module configuration struct, which can be filled out to
|
||||
* adjust the configuration of a physical USART peripheral.
|
||||
* \snippet qs_usart_basic_use.c setup_config
|
||||
* -# Initialize the USART configuration struct with the module's default values.
|
||||
* \snippet qs_usart_basic_use.c setup_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Alter the USART settings to configure the physical pinout, baudrate, and
|
||||
* other relevant parameters.
|
||||
* \snippet qs_usart_basic_use.c setup_change_config
|
||||
* -# Configure the USART module with the desired settings, retrying while the
|
||||
* driver is busy until the configuration is stressfully set.
|
||||
* \snippet qs_usart_basic_use.c setup_set_config
|
||||
* -# Enable the USART module.
|
||||
* \snippet qs_usart_basic_use.c setup_enable
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_usart_basic_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_basic_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_usart_basic_use.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_basic_use_case_main_flow Workflow
|
||||
* -# Send a string to the USART to show the demo is running, blocking until
|
||||
* all characters have been sent.
|
||||
* \snippet qs_usart_basic_use.c main_send_string
|
||||
* -# Enter an infinite loop to continuously echo received values on the USART.
|
||||
* \snippet qs_usart_basic_use.c main_loop
|
||||
* -# Perform a blocking read of the USART, storing the received character into
|
||||
* the previously declared temporary variable.
|
||||
* \snippet qs_usart_basic_use.c main_read
|
||||
* -# Echo the received variable back to the USART via a blocking write.
|
||||
* \snippet qs_usart_basic_use.c main_write
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
@ -1,120 +1,120 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM USART Quick Start
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_sercom_usart_callback_use_case Quick Start Guide for SERCOM USART - Callback
|
||||
*
|
||||
* This quick start will echo back characters typed into the terminal, using
|
||||
* asynchronous TX and RX callbacks from the USART peripheral. In this use case
|
||||
* the USART will be configured with the following settings:
|
||||
* - Asynchronous mode
|
||||
* - 9600 Baudrate
|
||||
* - 8-bits, No Parity and one Stop Bit
|
||||
* - TX and RX enabled and connected to the Xplained Pro Embedded Debugger virtual COM port
|
||||
*
|
||||
* \section asfdoc_sam0_sercom_usart_callback_use_case_setup Setup
|
||||
*
|
||||
* \subsection asfdoc_sam0_sercom_usart_callback_use_case_prereq Prerequisites
|
||||
* There are no special setup requirements for this use-case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_callback_use_case_setup_code Code
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_usart_callback.c module_inst
|
||||
* \snippet qs_usart_callback.c rx_buffer_var
|
||||
*
|
||||
* Copy-paste the following callback function code to your user application:
|
||||
* \snippet qs_usart_callback.c callback_funcs
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_usart_callback.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_usart_callback.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_callback_use_case_setup_flow Workflow
|
||||
* -# Create a module software instance structure for the USART module to store
|
||||
* the USART driver state while it is in use.
|
||||
* \snippet qs_usart_callback.c module_inst
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
*
|
||||
* -# Configure the USART module.
|
||||
* -# Create a USART module configuration struct, which can be filled out to
|
||||
* adjust the configuration of a physical USART peripheral.
|
||||
* \snippet qs_usart_callback.c setup_config
|
||||
* -# Initialize the USART configuration struct with the module's default values.
|
||||
* \snippet qs_usart_callback.c setup_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Alter the USART settings to configure the physical pinout, baudrate, and
|
||||
* other relevant parameters.
|
||||
* \snippet qs_usart_callback.c setup_change_config
|
||||
* -# Configure the USART module with the desired settings, retrying while the
|
||||
* driver is busy until the configuration is stressfully set.
|
||||
* \snippet qs_usart_callback.c setup_set_config
|
||||
* -# Enable the USART module.
|
||||
* \snippet qs_usart_callback.c setup_enable
|
||||
* -# Configure the USART callbacks.
|
||||
* -# Register the TX and RX callback functions with the driver.
|
||||
* \snippet qs_usart_callback.c setup_register_callbacks
|
||||
* -# Enable the TX and RX callbacks so that they will be called by the driver
|
||||
* when appropriate.
|
||||
* \snippet qs_usart_callback.c setup_enable_callbacks
|
||||
*
|
||||
* \section asfdoc_sam0_usart_callback_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_callback_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_usart_callback.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_callback_use_case_main_flow Workflow
|
||||
* -# Enable global interrupts, so that the callbacks can be fired.
|
||||
* \snippet qs_usart_callback.c enable_global_interrupts
|
||||
* -# Send a string to the USART to show the demo is running, blocking until
|
||||
* all characters have been sent.
|
||||
* \snippet qs_usart_callback.c main_send_string
|
||||
* -# Enter an infinite loop to continuously echo received values on the USART.
|
||||
* \snippet qs_usart_callback.c main_loop
|
||||
* -# Perform an asynchronous read of the USART, which will fire the registered
|
||||
* callback when characters are received.
|
||||
* \snippet qs_usart_callback.c main_read
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
#include <asf.h>
|
||||
#include <conf_clocks.h>
|
||||
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM USART Quick Start
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_sercom_usart_callback_use_case Quick Start Guide for SERCOM USART - Callback
|
||||
*
|
||||
* This quick start will echo back characters typed into the terminal, using
|
||||
* asynchronous TX and RX callbacks from the USART peripheral. In this use case
|
||||
* the USART will be configured with the following settings:
|
||||
* - Asynchronous mode
|
||||
* - 9600 Baudrate
|
||||
* - 8-bits, No Parity and one Stop Bit
|
||||
* - TX and RX enabled and connected to the Xplained Pro Embedded Debugger virtual COM port
|
||||
*
|
||||
* \section asfdoc_sam0_sercom_usart_callback_use_case_setup Setup
|
||||
*
|
||||
* \subsection asfdoc_sam0_sercom_usart_callback_use_case_prereq Prerequisites
|
||||
* There are no special setup requirements for this use-case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_callback_use_case_setup_code Code
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_usart_callback.c module_inst
|
||||
* \snippet qs_usart_callback.c rx_buffer_var
|
||||
*
|
||||
* Copy-paste the following callback function code to your user application:
|
||||
* \snippet qs_usart_callback.c callback_funcs
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_usart_callback.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_usart_callback.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_callback_use_case_setup_flow Workflow
|
||||
* -# Create a module software instance structure for the USART module to store
|
||||
* the USART driver state while it is in use.
|
||||
* \snippet qs_usart_callback.c module_inst
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
*
|
||||
* -# Configure the USART module.
|
||||
* -# Create a USART module configuration struct, which can be filled out to
|
||||
* adjust the configuration of a physical USART peripheral.
|
||||
* \snippet qs_usart_callback.c setup_config
|
||||
* -# Initialize the USART configuration struct with the module's default values.
|
||||
* \snippet qs_usart_callback.c setup_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Alter the USART settings to configure the physical pinout, baudrate, and
|
||||
* other relevant parameters.
|
||||
* \snippet qs_usart_callback.c setup_change_config
|
||||
* -# Configure the USART module with the desired settings, retrying while the
|
||||
* driver is busy until the configuration is stressfully set.
|
||||
* \snippet qs_usart_callback.c setup_set_config
|
||||
* -# Enable the USART module.
|
||||
* \snippet qs_usart_callback.c setup_enable
|
||||
* -# Configure the USART callbacks.
|
||||
* -# Register the TX and RX callback functions with the driver.
|
||||
* \snippet qs_usart_callback.c setup_register_callbacks
|
||||
* -# Enable the TX and RX callbacks so that they will be called by the driver
|
||||
* when appropriate.
|
||||
* \snippet qs_usart_callback.c setup_enable_callbacks
|
||||
*
|
||||
* \section asfdoc_sam0_usart_callback_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_callback_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_usart_callback.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_callback_use_case_main_flow Workflow
|
||||
* -# Enable global interrupts, so that the callbacks can be fired.
|
||||
* \snippet qs_usart_callback.c enable_global_interrupts
|
||||
* -# Send a string to the USART to show the demo is running, blocking until
|
||||
* all characters have been sent.
|
||||
* \snippet qs_usart_callback.c main_send_string
|
||||
* -# Enter an infinite loop to continuously echo received values on the USART.
|
||||
* \snippet qs_usart_callback.c main_loop
|
||||
* -# Perform an asynchronous read of the USART, which will fire the registered
|
||||
* callback when characters are received.
|
||||
* \snippet qs_usart_callback.c main_read
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
#include <asf.h>
|
||||
#include <conf_clocks.h>
|
||||
|
||||
|
||||
@ -1,208 +1,208 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Quick Start Guide for Using Usart driver with DMA
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_sercom_usart_dma_use_case Quick Start Guide for Using DMA with SERCOM USART
|
||||
*
|
||||
* The supported board list:
|
||||
* - SAM D21 Xplained Pro
|
||||
* - SAM R21 Xplained Pro
|
||||
* - SAM D11 Xplained Pro
|
||||
* - SAM DA1 Xplained Pro
|
||||
* - SAM HA1G16A Xplained Pro
|
||||
* - SAM L21 Xplained Pro
|
||||
* - SAM L22 Xplained Pro
|
||||
* - SAM C21 Xplained Pro
|
||||
*
|
||||
* This quick start will receive eight bytes of data from the PC terminal and transmit back the string
|
||||
* to the terminal through DMA. In this use case the USART will be configured with the following
|
||||
* settings:
|
||||
* - Asynchronous mode
|
||||
* - 9600 Baudrate
|
||||
* - 8-bits, No Parity and one Stop Bit
|
||||
* - TX and RX enabled and connected to the Xplained Pro Embedded Debugger virtual COM port
|
||||
*
|
||||
* \section asfdoc_sam0_sercom_usart_dma_use_case_setup Setup
|
||||
*
|
||||
* \subsection asfdoc_sam0_sercom_usart_dma_use_case_prereq Prerequisites
|
||||
* There are no special setup requirements for this use-case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_dma_use_case_setup_code Code
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_usart_dma_use.c module_inst
|
||||
* \snippet qs_usart_dma_use.c dma_resource
|
||||
* \snippet qs_usart_dma_use.c usart_buffer
|
||||
* \snippet qs_usart_dma_use.c transfer_descriptor
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_usart_dma_use.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_usart_dma_use.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_dma_use_case_setup_flow Workflow
|
||||
*
|
||||
* \subsubsection asfdoc_sam0_usart_dma_use_case_setup_flow_inst Create variables
|
||||
* -# Create a module software instance structure for the USART module to store
|
||||
* the USART driver state while it is in use.
|
||||
* \snippet qs_usart_dma_use.c module_inst
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
*
|
||||
* -# Create module software instance structures for DMA resources to store
|
||||
* the DMA resource state while it is in use.
|
||||
* \snippet qs_usart_dma_use.c dma_resource
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
*
|
||||
* -# Create a buffer to store the data to be transferred /received.
|
||||
* \snippet qs_usart_dma_use.c usart_buffer
|
||||
* -# Create DMA transfer descriptors for RX/TX.
|
||||
* \snippet qs_usart_dma_use.c transfer_descriptor
|
||||
*
|
||||
* \subsubsection asfdoc_sam0_usart_dma_use_case_setup_flow_usart Configure the USART
|
||||
* -# Create a USART module configuration struct, which can be filled out to
|
||||
* adjust the configuration of a physical USART peripheral.
|
||||
* \snippet qs_usart_dma_use.c setup_config
|
||||
* -# Initialize the USART configuration struct with the module's default values.
|
||||
* \snippet qs_usart_dma_use.c setup_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Alter the USART settings to configure the physical pinout, baudrate, and
|
||||
* other relevant parameters.
|
||||
* \snippet qs_usart_dma_use.c setup_change_config
|
||||
* -# Configure the USART module with the desired settings, retrying while the
|
||||
* driver is busy until the configuration is stressfully set.
|
||||
* \snippet qs_usart_dma_use.c setup_set_config
|
||||
* -# Enable the USART module.
|
||||
* \snippet qs_usart_dma_use.c setup_enable
|
||||
*
|
||||
* \subsubsection asfdoc_sam0_usart_dma_use_case_setup_flow_dma Configure DMA
|
||||
* -# Create a callback function of receiver done.
|
||||
* \snippet qs_usart_dma_use.c transfer_done_rx
|
||||
*
|
||||
* -# Create a callback function of transmission done.
|
||||
* \snippet qs_usart_dma_use.c transfer_done_tx
|
||||
*
|
||||
* -# Create a DMA resource configuration structure, which can be filled out to
|
||||
* adjust the configuration of a single DMA transfer.
|
||||
* \snippet qs_usart_dma_use.c setup_rx_1
|
||||
*
|
||||
* -# Initialize the DMA resource configuration struct with the module's
|
||||
* default values.
|
||||
* \snippet qs_usart_dma_use.c setup_rx_2
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Set extra configurations for the DMA resource. It is using peripheral
|
||||
* trigger. SERCOM TX empty trigger causes a beat transfer in
|
||||
* this example.
|
||||
* \snippet qs_usart_dma_use.c setup_rx_3
|
||||
*
|
||||
* -# Allocate a DMA resource with the configurations.
|
||||
* \snippet qs_usart_dma_use.c setup_rx_4
|
||||
*
|
||||
* -# Create a DMA transfer descriptor configuration structure, which can be
|
||||
* filled out to adjust the configuration of a single DMA transfer.
|
||||
* \snippet qs_usart_dma_use.c setup_rx_5
|
||||
*
|
||||
* -# Initialize the DMA transfer descriptor configuration struct with the module's
|
||||
* default values.
|
||||
* \snippet qs_usart_dma_use.c setup_rx_6
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Set the specific parameters for a DMA transfer with transfer size, source
|
||||
* address, and destination address.
|
||||
* \snippet qs_usart_dma_use.c setup_rx_7
|
||||
*
|
||||
* -# Create the DMA transfer descriptor.
|
||||
* \snippet qs_usart_dma_use.c setup_rx_8
|
||||
*
|
||||
* -# Create a DMA resource configuration structure for TX, which can be filled
|
||||
* out to adjust the configuration of a single DMA transfer.
|
||||
* \snippet qs_usart_dma_use.c setup_tx_1
|
||||
*
|
||||
* -# Initialize the DMA resource configuration struct with the module's
|
||||
* default values.
|
||||
* \snippet qs_usart_dma_use.c setup_tx_2
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Set extra configurations for the DMA resource. It is using peripheral
|
||||
* trigger. SERCOM RX Ready trigger causes a beat transfer in
|
||||
* this example.
|
||||
* \snippet qs_usart_dma_use.c setup_tx_3
|
||||
*
|
||||
* -# Allocate a DMA resource with the configurations.
|
||||
* \snippet qs_usart_dma_use.c setup_tx_4
|
||||
*
|
||||
* -# Create a DMA transfer descriptor configuration structure, which can be
|
||||
* filled out to adjust the configuration of a single DMA transfer.
|
||||
* \snippet qs_usart_dma_use.c setup_tx_5
|
||||
*
|
||||
* -# Initialize the DMA transfer descriptor configuration struct with the module's
|
||||
* default values.
|
||||
* \snippet qs_usart_dma_use.c setup_tx_6
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Set the specific parameters for a DMA transfer with transfer size, source
|
||||
* address, and destination address.
|
||||
* \snippet qs_usart_dma_use.c setup_tx_7
|
||||
*
|
||||
* -# Create the DMA transfer descriptor.
|
||||
* \snippet qs_usart_dma_use.c setup_tx_8
|
||||
*
|
||||
* \section asfdoc_sam0_usart_dma_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_dma_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_usart_dma_use.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_dma_use_case_main_flow Workflow
|
||||
* -# Wait for receiving data.
|
||||
* \snippet qs_usart_dma_use.c main_1
|
||||
*
|
||||
* -# Enter endless loop.
|
||||
* \snippet qs_usart_dma_use.c endless_loop
|
||||
*/
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Quick Start Guide for Using Usart driver with DMA
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_sercom_usart_dma_use_case Quick Start Guide for Using DMA with SERCOM USART
|
||||
*
|
||||
* The supported board list:
|
||||
* - SAM D21 Xplained Pro
|
||||
* - SAM R21 Xplained Pro
|
||||
* - SAM D11 Xplained Pro
|
||||
* - SAM DA1 Xplained Pro
|
||||
* - SAM HA1G16A Xplained Pro
|
||||
* - SAM L21 Xplained Pro
|
||||
* - SAM L22 Xplained Pro
|
||||
* - SAM C21 Xplained Pro
|
||||
*
|
||||
* This quick start will receive eight bytes of data from the PC terminal and transmit back the string
|
||||
* to the terminal through DMA. In this use case the USART will be configured with the following
|
||||
* settings:
|
||||
* - Asynchronous mode
|
||||
* - 9600 Baudrate
|
||||
* - 8-bits, No Parity and one Stop Bit
|
||||
* - TX and RX enabled and connected to the Xplained Pro Embedded Debugger virtual COM port
|
||||
*
|
||||
* \section asfdoc_sam0_sercom_usart_dma_use_case_setup Setup
|
||||
*
|
||||
* \subsection asfdoc_sam0_sercom_usart_dma_use_case_prereq Prerequisites
|
||||
* There are no special setup requirements for this use-case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_dma_use_case_setup_code Code
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_usart_dma_use.c module_inst
|
||||
* \snippet qs_usart_dma_use.c dma_resource
|
||||
* \snippet qs_usart_dma_use.c usart_buffer
|
||||
* \snippet qs_usart_dma_use.c transfer_descriptor
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_usart_dma_use.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_usart_dma_use.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_dma_use_case_setup_flow Workflow
|
||||
*
|
||||
* \subsubsection asfdoc_sam0_usart_dma_use_case_setup_flow_inst Create variables
|
||||
* -# Create a module software instance structure for the USART module to store
|
||||
* the USART driver state while it is in use.
|
||||
* \snippet qs_usart_dma_use.c module_inst
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
*
|
||||
* -# Create module software instance structures for DMA resources to store
|
||||
* the DMA resource state while it is in use.
|
||||
* \snippet qs_usart_dma_use.c dma_resource
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
*
|
||||
* -# Create a buffer to store the data to be transferred /received.
|
||||
* \snippet qs_usart_dma_use.c usart_buffer
|
||||
* -# Create DMA transfer descriptors for RX/TX.
|
||||
* \snippet qs_usart_dma_use.c transfer_descriptor
|
||||
*
|
||||
* \subsubsection asfdoc_sam0_usart_dma_use_case_setup_flow_usart Configure the USART
|
||||
* -# Create a USART module configuration struct, which can be filled out to
|
||||
* adjust the configuration of a physical USART peripheral.
|
||||
* \snippet qs_usart_dma_use.c setup_config
|
||||
* -# Initialize the USART configuration struct with the module's default values.
|
||||
* \snippet qs_usart_dma_use.c setup_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Alter the USART settings to configure the physical pinout, baudrate, and
|
||||
* other relevant parameters.
|
||||
* \snippet qs_usart_dma_use.c setup_change_config
|
||||
* -# Configure the USART module with the desired settings, retrying while the
|
||||
* driver is busy until the configuration is stressfully set.
|
||||
* \snippet qs_usart_dma_use.c setup_set_config
|
||||
* -# Enable the USART module.
|
||||
* \snippet qs_usart_dma_use.c setup_enable
|
||||
*
|
||||
* \subsubsection asfdoc_sam0_usart_dma_use_case_setup_flow_dma Configure DMA
|
||||
* -# Create a callback function of receiver done.
|
||||
* \snippet qs_usart_dma_use.c transfer_done_rx
|
||||
*
|
||||
* -# Create a callback function of transmission done.
|
||||
* \snippet qs_usart_dma_use.c transfer_done_tx
|
||||
*
|
||||
* -# Create a DMA resource configuration structure, which can be filled out to
|
||||
* adjust the configuration of a single DMA transfer.
|
||||
* \snippet qs_usart_dma_use.c setup_rx_1
|
||||
*
|
||||
* -# Initialize the DMA resource configuration struct with the module's
|
||||
* default values.
|
||||
* \snippet qs_usart_dma_use.c setup_rx_2
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Set extra configurations for the DMA resource. It is using peripheral
|
||||
* trigger. SERCOM TX empty trigger causes a beat transfer in
|
||||
* this example.
|
||||
* \snippet qs_usart_dma_use.c setup_rx_3
|
||||
*
|
||||
* -# Allocate a DMA resource with the configurations.
|
||||
* \snippet qs_usart_dma_use.c setup_rx_4
|
||||
*
|
||||
* -# Create a DMA transfer descriptor configuration structure, which can be
|
||||
* filled out to adjust the configuration of a single DMA transfer.
|
||||
* \snippet qs_usart_dma_use.c setup_rx_5
|
||||
*
|
||||
* -# Initialize the DMA transfer descriptor configuration struct with the module's
|
||||
* default values.
|
||||
* \snippet qs_usart_dma_use.c setup_rx_6
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Set the specific parameters for a DMA transfer with transfer size, source
|
||||
* address, and destination address.
|
||||
* \snippet qs_usart_dma_use.c setup_rx_7
|
||||
*
|
||||
* -# Create the DMA transfer descriptor.
|
||||
* \snippet qs_usart_dma_use.c setup_rx_8
|
||||
*
|
||||
* -# Create a DMA resource configuration structure for TX, which can be filled
|
||||
* out to adjust the configuration of a single DMA transfer.
|
||||
* \snippet qs_usart_dma_use.c setup_tx_1
|
||||
*
|
||||
* -# Initialize the DMA resource configuration struct with the module's
|
||||
* default values.
|
||||
* \snippet qs_usart_dma_use.c setup_tx_2
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Set extra configurations for the DMA resource. It is using peripheral
|
||||
* trigger. SERCOM RX Ready trigger causes a beat transfer in
|
||||
* this example.
|
||||
* \snippet qs_usart_dma_use.c setup_tx_3
|
||||
*
|
||||
* -# Allocate a DMA resource with the configurations.
|
||||
* \snippet qs_usart_dma_use.c setup_tx_4
|
||||
*
|
||||
* -# Create a DMA transfer descriptor configuration structure, which can be
|
||||
* filled out to adjust the configuration of a single DMA transfer.
|
||||
* \snippet qs_usart_dma_use.c setup_tx_5
|
||||
*
|
||||
* -# Initialize the DMA transfer descriptor configuration struct with the module's
|
||||
* default values.
|
||||
* \snippet qs_usart_dma_use.c setup_tx_6
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Set the specific parameters for a DMA transfer with transfer size, source
|
||||
* address, and destination address.
|
||||
* \snippet qs_usart_dma_use.c setup_tx_7
|
||||
*
|
||||
* -# Create the DMA transfer descriptor.
|
||||
* \snippet qs_usart_dma_use.c setup_tx_8
|
||||
*
|
||||
* \section asfdoc_sam0_usart_dma_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_dma_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_usart_dma_use.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_dma_use_case_main_flow Workflow
|
||||
* -# Wait for receiving data.
|
||||
* \snippet qs_usart_dma_use.c main_1
|
||||
*
|
||||
* -# Enter endless loop.
|
||||
* \snippet qs_usart_dma_use.c endless_loop
|
||||
*/
|
||||
|
||||
@ -1,94 +1,94 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM USART LIN Quick Start
|
||||
*
|
||||
* Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_sercom_usart_lin_use_case Quick Start Guide for SERCOM USART LIN
|
||||
*
|
||||
* The supported board list:
|
||||
* - SAMC21 Xplained Pro
|
||||
*
|
||||
* This quick start will set up LIN frame format transmission according to your
|
||||
* configuration \c CONF_LIN_NODE_TYPE.
|
||||
* For LIN master, it will send LIN command after startup.
|
||||
* For LIN salve, once received a format from LIN master with ID \c LIN_ID_FIELD_VALUE,
|
||||
* it will reply four data bytes plus a checksum.
|
||||
*
|
||||
* \section asfdoc_sam0_sercom_usart_lin_use_case_setup Setup
|
||||
*
|
||||
* \subsection asfdoc_sam0_sercom_usart_lin_use_case_prereq Prerequisites
|
||||
* When verify data transmission between LIN master and slave, two boards are needed:
|
||||
* one is for LIN master and the other is for LIN slave.
|
||||
* connect LIN master LIN PIN with LIN slave LIN PIN.
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_lin_use_case_setup_code Code
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_lin.c module_var
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_lin.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_lin.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_lin_use_case_setup_flow Workflow
|
||||
* -# Create USART CDC and LIN module software instance structure for the USART module to store
|
||||
* the USART driver state while it is in use.
|
||||
* \snippet qs_lin.c module_inst
|
||||
* -# Define LIN ID field for header format.
|
||||
* \snippet qs_lin.c lin_id
|
||||
* \note The ID \c LIN_ID_FIELD_VALUE is eight bits as [P1,P0,ID5...ID0], when it's 0x64, the
|
||||
* data field length is four bytes plus a checksum byte.
|
||||
*
|
||||
* -# Define LIN RX/TX buffer.
|
||||
* \snippet qs_lin.c lin_buffer
|
||||
* \note For \c tx_buffer and \c rx_buffer, the last byte is for checksum.
|
||||
*
|
||||
* -# Configure the USART CDC for output message.
|
||||
* \snippet qs_lin.c CDC_setup
|
||||
*
|
||||
* -# Configure the USART LIN module.
|
||||
* \snippet qs_lin.c lin_setup
|
||||
* \note The LIN frame format can be configured as master or slave, refer to \c CONF_LIN_NODE_TYPE .
|
||||
*
|
||||
* \section asfdoc_sam0_usart_lin_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_lin_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_lin.c main_setup
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_lin_use_case_main_flow Workflow
|
||||
* -# Set up USART LIN module.
|
||||
* \snippet qs_lin.c configure_lin
|
||||
* -# For LIN master, sending LIN command. For LIN slaver, start reading data .
|
||||
* \snippet qs_lin.c lin_master_cmd
|
||||
*/
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM USART LIN Quick Start
|
||||
*
|
||||
* Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_sercom_usart_lin_use_case Quick Start Guide for SERCOM USART LIN
|
||||
*
|
||||
* The supported board list:
|
||||
* - SAMC21 Xplained Pro
|
||||
*
|
||||
* This quick start will set up LIN frame format transmission according to your
|
||||
* configuration \c CONF_LIN_NODE_TYPE.
|
||||
* For LIN master, it will send LIN command after startup.
|
||||
* For LIN salve, once received a format from LIN master with ID \c LIN_ID_FIELD_VALUE,
|
||||
* it will reply four data bytes plus a checksum.
|
||||
*
|
||||
* \section asfdoc_sam0_sercom_usart_lin_use_case_setup Setup
|
||||
*
|
||||
* \subsection asfdoc_sam0_sercom_usart_lin_use_case_prereq Prerequisites
|
||||
* When verify data transmission between LIN master and slave, two boards are needed:
|
||||
* one is for LIN master and the other is for LIN slave.
|
||||
* connect LIN master LIN PIN with LIN slave LIN PIN.
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_lin_use_case_setup_code Code
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_lin.c module_var
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_lin.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_lin.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_lin_use_case_setup_flow Workflow
|
||||
* -# Create USART CDC and LIN module software instance structure for the USART module to store
|
||||
* the USART driver state while it is in use.
|
||||
* \snippet qs_lin.c module_inst
|
||||
* -# Define LIN ID field for header format.
|
||||
* \snippet qs_lin.c lin_id
|
||||
* \note The ID \c LIN_ID_FIELD_VALUE is eight bits as [P1,P0,ID5...ID0], when it's 0x64, the
|
||||
* data field length is four bytes plus a checksum byte.
|
||||
*
|
||||
* -# Define LIN RX/TX buffer.
|
||||
* \snippet qs_lin.c lin_buffer
|
||||
* \note For \c tx_buffer and \c rx_buffer, the last byte is for checksum.
|
||||
*
|
||||
* -# Configure the USART CDC for output message.
|
||||
* \snippet qs_lin.c CDC_setup
|
||||
*
|
||||
* -# Configure the USART LIN module.
|
||||
* \snippet qs_lin.c lin_setup
|
||||
* \note The LIN frame format can be configured as master or slave, refer to \c CONF_LIN_NODE_TYPE .
|
||||
*
|
||||
* \section asfdoc_sam0_usart_lin_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_lin_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_lin.c main_setup
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_lin_use_case_main_flow Workflow
|
||||
* -# Set up USART LIN module.
|
||||
* \snippet qs_lin.c configure_lin
|
||||
* -# For LIN master, sending LIN command. For LIN slaver, start reading data .
|
||||
* \snippet qs_lin.c lin_master_cmd
|
||||
*/
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,167 +1,167 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM SERCOM USART Asynchronous Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#ifndef USART_INTERRUPT_H_INCLUDED
|
||||
#define USART_INTERRUPT_H_INCLUDED
|
||||
|
||||
#include "usart.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
enum status_code _usart_write_buffer(
|
||||
struct usart_module *const module,
|
||||
uint8_t *tx_data,
|
||||
uint16_t length);
|
||||
|
||||
enum status_code _usart_read_buffer(
|
||||
struct usart_module *const module,
|
||||
uint8_t *rx_data,
|
||||
uint16_t length);
|
||||
|
||||
void _usart_interrupt_handler(
|
||||
uint8_t instance);
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \addtogroup asfdoc_sam0_sercom_usart_group
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \name Callback Management
|
||||
* @{
|
||||
*/
|
||||
void usart_register_callback(
|
||||
struct usart_module *const module,
|
||||
usart_callback_t callback_func,
|
||||
enum usart_callback callback_type);
|
||||
|
||||
void usart_unregister_callback(
|
||||
struct usart_module *module,
|
||||
enum usart_callback callback_type);
|
||||
|
||||
/**
|
||||
* \brief Enables callback
|
||||
*
|
||||
* Enables the callback function registered by the \ref usart_register_callback.
|
||||
* The callback function will be called from the interrupt handler when the
|
||||
* conditions for the callback type are met.
|
||||
*
|
||||
* \param[in] module Pointer to USART software instance struct
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*/
|
||||
static inline void usart_enable_callback(
|
||||
struct usart_module *const module,
|
||||
enum usart_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
|
||||
/* Enable callback */
|
||||
module->callback_enable_mask |= (1 << callback_type);
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disable callback
|
||||
*
|
||||
* Disables the callback function registered by the \ref usart_register_callback,
|
||||
* and the callback will not be called from the interrupt routine.
|
||||
*
|
||||
* \param[in] module Pointer to USART software instance struct
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*/
|
||||
static inline void usart_disable_callback(
|
||||
struct usart_module *const module,
|
||||
enum usart_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
|
||||
/* Disable callback */
|
||||
module->callback_enable_mask &= ~(1 << callback_type);
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* \name Writing and Reading
|
||||
* @{
|
||||
*/
|
||||
enum status_code usart_write_job(
|
||||
struct usart_module *const module,
|
||||
const uint16_t *tx_data);
|
||||
|
||||
enum status_code usart_read_job(
|
||||
struct usart_module *const module,
|
||||
uint16_t *const rx_data);
|
||||
|
||||
enum status_code usart_write_buffer_job(
|
||||
struct usart_module *const module,
|
||||
uint8_t *tx_data,
|
||||
uint16_t length);
|
||||
|
||||
enum status_code usart_read_buffer_job(
|
||||
struct usart_module *const module,
|
||||
uint8_t *rx_data,
|
||||
uint16_t length);
|
||||
|
||||
void usart_abort_job(
|
||||
struct usart_module *const module,
|
||||
enum usart_transceiver_type transceiver_type);
|
||||
|
||||
enum status_code usart_get_job_status(
|
||||
struct usart_module *const module,
|
||||
enum usart_transceiver_type transceiver_type);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* USART_INTERRUPT_H_INCLUDED */
|
||||
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM SERCOM USART Asynchronous Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#ifndef USART_INTERRUPT_H_INCLUDED
|
||||
#define USART_INTERRUPT_H_INCLUDED
|
||||
|
||||
#include "usart.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
enum status_code _usart_write_buffer(
|
||||
struct usart_module *const module,
|
||||
uint8_t *tx_data,
|
||||
uint16_t length);
|
||||
|
||||
enum status_code _usart_read_buffer(
|
||||
struct usart_module *const module,
|
||||
uint8_t *rx_data,
|
||||
uint16_t length);
|
||||
|
||||
void _usart_interrupt_handler(
|
||||
uint8_t instance);
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \addtogroup asfdoc_sam0_sercom_usart_group
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \name Callback Management
|
||||
* @{
|
||||
*/
|
||||
void usart_register_callback(
|
||||
struct usart_module *const module,
|
||||
usart_callback_t callback_func,
|
||||
enum usart_callback callback_type);
|
||||
|
||||
void usart_unregister_callback(
|
||||
struct usart_module *module,
|
||||
enum usart_callback callback_type);
|
||||
|
||||
/**
|
||||
* \brief Enables callback
|
||||
*
|
||||
* Enables the callback function registered by the \ref usart_register_callback.
|
||||
* The callback function will be called from the interrupt handler when the
|
||||
* conditions for the callback type are met.
|
||||
*
|
||||
* \param[in] module Pointer to USART software instance struct
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*/
|
||||
static inline void usart_enable_callback(
|
||||
struct usart_module *const module,
|
||||
enum usart_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
|
||||
/* Enable callback */
|
||||
module->callback_enable_mask |= (1 << callback_type);
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disable callback
|
||||
*
|
||||
* Disables the callback function registered by the \ref usart_register_callback,
|
||||
* and the callback will not be called from the interrupt routine.
|
||||
*
|
||||
* \param[in] module Pointer to USART software instance struct
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*/
|
||||
static inline void usart_disable_callback(
|
||||
struct usart_module *const module,
|
||||
enum usart_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
|
||||
/* Disable callback */
|
||||
module->callback_enable_mask &= ~(1 << callback_type);
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* \name Writing and Reading
|
||||
* @{
|
||||
*/
|
||||
enum status_code usart_write_job(
|
||||
struct usart_module *const module,
|
||||
const uint16_t *tx_data);
|
||||
|
||||
enum status_code usart_read_job(
|
||||
struct usart_module *const module,
|
||||
uint16_t *const rx_data);
|
||||
|
||||
enum status_code usart_write_buffer_job(
|
||||
struct usart_module *const module,
|
||||
uint8_t *tx_data,
|
||||
uint16_t length);
|
||||
|
||||
enum status_code usart_read_buffer_job(
|
||||
struct usart_module *const module,
|
||||
uint8_t *rx_data,
|
||||
uint16_t length);
|
||||
|
||||
void usart_abort_job(
|
||||
struct usart_module *const module,
|
||||
enum usart_transceiver_type transceiver_type);
|
||||
|
||||
enum status_code usart_get_job_status(
|
||||
struct usart_module *const module,
|
||||
enum usart_transceiver_type transceiver_type);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* USART_INTERRUPT_H_INCLUDED */
|
||||
|
||||
|
||||
@ -1,43 +1,43 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Clock Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#ifndef SYSTEM_CLOCK_H_INCLUDED
|
||||
#define SYSTEM_CLOCK_H_INCLUDED
|
||||
|
||||
#include <compiler.h>
|
||||
#include <gclk.h>
|
||||
#include <clock_feature.h>
|
||||
|
||||
#endif /* SYSTEM_CLOCK_H_INCLUDED */
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Clock Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#ifndef SYSTEM_CLOCK_H_INCLUDED
|
||||
#define SYSTEM_CLOCK_H_INCLUDED
|
||||
|
||||
#include <compiler.h>
|
||||
#include <gclk.h>
|
||||
#include <clock_feature.h>
|
||||
|
||||
#endif /* SYSTEM_CLOCK_H_INCLUDED */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,444 +1,444 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM D21/R21/DA/HA Clock Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
#ifndef CLOCK_CONFIG_CHECK_H
|
||||
# define CLOCK_CONFIG_CHECK_H
|
||||
|
||||
#if !defined(CONF_CLOCK_FLASH_WAIT_STATES)
|
||||
# error CONF_CLOCK_FLASH_WAIT_STATES not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_CPU_DIVIDER)
|
||||
# error CONF_CLOCK_CPU_DIVIDER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_APBA_DIVIDER)
|
||||
# error CONF_CLOCK_APBA_DIVIDER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_APBB_DIVIDER)
|
||||
# error CONF_CLOCK_APBB_DIVIDER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_APBC_DIVIDER)
|
||||
# error CONF_CLOCK_APBC_DIVIDER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC8M_PRESCALER)
|
||||
# error CONF_CLOCK_OSC8M_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC8M_ON_DEMAND)
|
||||
# error CONF_CLOCK_OSC8M_ON_DEMAND not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC8M_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_OSC8M_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC_ENABLE)
|
||||
# error CONF_CLOCK_XOSC_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC_EXTERNAL_CRYSTAL)
|
||||
# error CONF_CLOCK_XOSC_EXTERNAL_CRYSTAL not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC_EXTERNAL_FREQUENCY)
|
||||
# error CONF_CLOCK_XOSC_EXTERNAL_FREQUENCY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC_STARTUP_TIME)
|
||||
# error CONF_CLOCK_XOSC_STARTUP_TIME not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC_AUTO_GAIN_CONTROL)
|
||||
# error CONF_CLOCK_XOSC_AUTO_GAIN_CONTROL not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC_ON_DEMAND)
|
||||
# error CONF_CLOCK_XOSC_ON_DEMAND not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_XOSC_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC32K_ENABLE)
|
||||
# error CONF_CLOCK_XOSC32K_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC32K_EXTERNAL_CRYSTAL)
|
||||
# error CONF_CLOCK_XOSC32K_EXTERNAL_CRYSTAL not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC32K_STARTUP_TIME)
|
||||
# error CONF_CLOCK_XOSC32K_STARTUP_TIME not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC32K_AUTO_AMPLITUDE_CONTROL)
|
||||
# error CONF_CLOCK_XOSC32K_AUTO_AMPLITUDE_CONTROL not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC32K_ENABLE_1KHZ_OUPUT)
|
||||
# error CONF_CLOCK_XOSC32K_ENABLE_1KHZ_OUPUT not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC32K_ENABLE_32KHZ_OUTPUT)
|
||||
# error CONF_CLOCK_XOSC32K_ENABLE_32KHZ_OUTPUT not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC32K_ON_DEMAND)
|
||||
# error CONF_CLOCK_XOSC32K_ON_DEMAND not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC32K_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_XOSC32K_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC32K_ENABLE)
|
||||
# error CONF_CLOCK_OSC32K_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC32K_STARTUP_TIME)
|
||||
# error CONF_CLOCK_OSC32K_STARTUP_TIME not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC32K_ENABLE_1KHZ_OUTPUT)
|
||||
# error CONF_CLOCK_OSC32K_ENABLE_1KHZ_OUTPUT not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC32K_ENABLE_32KHZ_OUTPUT)
|
||||
# error CONF_CLOCK_OSC32K_ENABLE_32KHZ_OUTPUT not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC32K_ON_DEMAND)
|
||||
# error CONF_CLOCK_OSC32K_ON_DEMAND not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC32K_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_OSC32K_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_ENABLE)
|
||||
# error CONF_CLOCK_DFLL_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_LOOP_MODE)
|
||||
# error CONF_CLOCK_DFLL_LOOP_MODE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_ON_DEMAND)
|
||||
# error CONF_CLOCK_DFLL_ON_DEMAND not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_FINE_VALUE)
|
||||
# error CONF_CLOCK_DFLL_FINE_VALUE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_SOURCE_GCLK_GENERATOR)
|
||||
# error CONF_CLOCK_DFLL_SOURCE_GCLK_GENERATOR not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_MULTIPLY_FACTOR)
|
||||
# error CONF_CLOCK_DFLL_MULTIPLY_FACTOR not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_QUICK_LOCK)
|
||||
# error CONF_CLOCK_DFLL_QUICK_LOCK not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_TRACK_AFTER_FINE_LOCK)
|
||||
# error CONF_CLOCK_DFLL_TRACK_AFTER_FINE_LOCK not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_KEEP_LOCK_ON_WAKEUP)
|
||||
# error CONF_CLOCK_DFLL_KEEP_LOCK_ON_WAKEUP not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_ENABLE_CHILL_CYCLE)
|
||||
# error CONF_CLOCK_DFLL_ENABLE_CHILL_CYCLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_MAX_COARSE_STEP_SIZE)
|
||||
# error CONF_CLOCK_DFLL_MAX_COARSE_STEP_SIZE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_MAX_FINE_STEP_SIZE)
|
||||
# error CONF_CLOCK_DFLL_MAX_FINE_STEP_SIZE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_ENABLE)
|
||||
# error CONF_CLOCK_DPLL_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_ON_DEMAND)
|
||||
# error CONF_CLOCK_DPLL_ON_DEMAND not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_DPLL_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_LOCK_BYPASS)
|
||||
# error CONF_CLOCK_DPLL_LOCK_BYPASS not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_WAKE_UP_FAST)
|
||||
# error CONF_CLOCK_DPLL_WAKE_UP_FAST not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_LOW_POWER_ENABLE)
|
||||
# error CONF_CLOCK_DPLL_LOW_POWER_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_LOCK_TIME)
|
||||
# error CONF_CLOCK_DPLL_LOCK_TIME not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_REFERENCE_CLOCK)
|
||||
# error CONF_CLOCK_DPLL_REFERENCE_CLOCK not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_FILTER)
|
||||
# error CONF_CLOCK_DPLL_FILTER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_REFERENCE_FREQUENCY)
|
||||
# error CONF_CLOCK_DPLL_REFERENCE_FREQUENCY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_REFERENCE_DIVIDER)
|
||||
# error CONF_CLOCK_DPLL_REFERENCE_DIVIDER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_OUTPUT_FREQUENCY)
|
||||
# error CONF_CLOCK_DPLL_OUTPUT_FREQUENCY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_REFERENCE_GCLK_GENERATOR)
|
||||
# error CONF_CLOCK_DPLL_REFERENCE_GCLK_GENERATOR not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_LOCK_GCLK_GENERATOR)
|
||||
# error CONF_CLOCK_DPLL_LOCK_GCLK_GENERATOR not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_CONFIGURE_GCLK)
|
||||
# error CONF_CLOCK_CONFIGURE_GCLK not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_0_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_0_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_0_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_0_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_0_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_0_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_0_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_0_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_0_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_0_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_1_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_1_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_1_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_1_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_1_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_1_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_1_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_1_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_1_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_1_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_2_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_2_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_2_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_2_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_2_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_2_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_2_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_2_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_2_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_2_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_3_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_3_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_3_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_3_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_3_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_3_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_3_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_3_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_3_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_3_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_4_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_4_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_4_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_4_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_4_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_4_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_4_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_4_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_4_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_4_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_5_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_5_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_5_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_5_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_5_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_5_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_5_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_5_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_5_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_5_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_6_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_6_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_6_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_6_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_6_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_6_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_6_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_6_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_6_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_6_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_7_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_7_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_7_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_7_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_7_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_7_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_7_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_7_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_7_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_7_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_8_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_8_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_8_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_8_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_8_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_8_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_8_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_8_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_8_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_8_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#endif /* CLOCK_CONFIG_CHECK_H */
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM D21/R21/DA/HA Clock Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
#ifndef CLOCK_CONFIG_CHECK_H
|
||||
# define CLOCK_CONFIG_CHECK_H
|
||||
|
||||
#if !defined(CONF_CLOCK_FLASH_WAIT_STATES)
|
||||
# error CONF_CLOCK_FLASH_WAIT_STATES not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_CPU_DIVIDER)
|
||||
# error CONF_CLOCK_CPU_DIVIDER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_APBA_DIVIDER)
|
||||
# error CONF_CLOCK_APBA_DIVIDER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_APBB_DIVIDER)
|
||||
# error CONF_CLOCK_APBB_DIVIDER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_APBC_DIVIDER)
|
||||
# error CONF_CLOCK_APBC_DIVIDER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC8M_PRESCALER)
|
||||
# error CONF_CLOCK_OSC8M_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC8M_ON_DEMAND)
|
||||
# error CONF_CLOCK_OSC8M_ON_DEMAND not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC8M_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_OSC8M_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC_ENABLE)
|
||||
# error CONF_CLOCK_XOSC_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC_EXTERNAL_CRYSTAL)
|
||||
# error CONF_CLOCK_XOSC_EXTERNAL_CRYSTAL not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC_EXTERNAL_FREQUENCY)
|
||||
# error CONF_CLOCK_XOSC_EXTERNAL_FREQUENCY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC_STARTUP_TIME)
|
||||
# error CONF_CLOCK_XOSC_STARTUP_TIME not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC_AUTO_GAIN_CONTROL)
|
||||
# error CONF_CLOCK_XOSC_AUTO_GAIN_CONTROL not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC_ON_DEMAND)
|
||||
# error CONF_CLOCK_XOSC_ON_DEMAND not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_XOSC_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC32K_ENABLE)
|
||||
# error CONF_CLOCK_XOSC32K_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC32K_EXTERNAL_CRYSTAL)
|
||||
# error CONF_CLOCK_XOSC32K_EXTERNAL_CRYSTAL not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC32K_STARTUP_TIME)
|
||||
# error CONF_CLOCK_XOSC32K_STARTUP_TIME not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC32K_AUTO_AMPLITUDE_CONTROL)
|
||||
# error CONF_CLOCK_XOSC32K_AUTO_AMPLITUDE_CONTROL not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC32K_ENABLE_1KHZ_OUPUT)
|
||||
# error CONF_CLOCK_XOSC32K_ENABLE_1KHZ_OUPUT not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC32K_ENABLE_32KHZ_OUTPUT)
|
||||
# error CONF_CLOCK_XOSC32K_ENABLE_32KHZ_OUTPUT not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC32K_ON_DEMAND)
|
||||
# error CONF_CLOCK_XOSC32K_ON_DEMAND not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC32K_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_XOSC32K_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC32K_ENABLE)
|
||||
# error CONF_CLOCK_OSC32K_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC32K_STARTUP_TIME)
|
||||
# error CONF_CLOCK_OSC32K_STARTUP_TIME not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC32K_ENABLE_1KHZ_OUTPUT)
|
||||
# error CONF_CLOCK_OSC32K_ENABLE_1KHZ_OUTPUT not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC32K_ENABLE_32KHZ_OUTPUT)
|
||||
# error CONF_CLOCK_OSC32K_ENABLE_32KHZ_OUTPUT not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC32K_ON_DEMAND)
|
||||
# error CONF_CLOCK_OSC32K_ON_DEMAND not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC32K_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_OSC32K_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_ENABLE)
|
||||
# error CONF_CLOCK_DFLL_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_LOOP_MODE)
|
||||
# error CONF_CLOCK_DFLL_LOOP_MODE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_ON_DEMAND)
|
||||
# error CONF_CLOCK_DFLL_ON_DEMAND not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_FINE_VALUE)
|
||||
# error CONF_CLOCK_DFLL_FINE_VALUE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_SOURCE_GCLK_GENERATOR)
|
||||
# error CONF_CLOCK_DFLL_SOURCE_GCLK_GENERATOR not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_MULTIPLY_FACTOR)
|
||||
# error CONF_CLOCK_DFLL_MULTIPLY_FACTOR not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_QUICK_LOCK)
|
||||
# error CONF_CLOCK_DFLL_QUICK_LOCK not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_TRACK_AFTER_FINE_LOCK)
|
||||
# error CONF_CLOCK_DFLL_TRACK_AFTER_FINE_LOCK not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_KEEP_LOCK_ON_WAKEUP)
|
||||
# error CONF_CLOCK_DFLL_KEEP_LOCK_ON_WAKEUP not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_ENABLE_CHILL_CYCLE)
|
||||
# error CONF_CLOCK_DFLL_ENABLE_CHILL_CYCLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_MAX_COARSE_STEP_SIZE)
|
||||
# error CONF_CLOCK_DFLL_MAX_COARSE_STEP_SIZE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_MAX_FINE_STEP_SIZE)
|
||||
# error CONF_CLOCK_DFLL_MAX_FINE_STEP_SIZE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_ENABLE)
|
||||
# error CONF_CLOCK_DPLL_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_ON_DEMAND)
|
||||
# error CONF_CLOCK_DPLL_ON_DEMAND not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_DPLL_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_LOCK_BYPASS)
|
||||
# error CONF_CLOCK_DPLL_LOCK_BYPASS not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_WAKE_UP_FAST)
|
||||
# error CONF_CLOCK_DPLL_WAKE_UP_FAST not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_LOW_POWER_ENABLE)
|
||||
# error CONF_CLOCK_DPLL_LOW_POWER_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_LOCK_TIME)
|
||||
# error CONF_CLOCK_DPLL_LOCK_TIME not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_REFERENCE_CLOCK)
|
||||
# error CONF_CLOCK_DPLL_REFERENCE_CLOCK not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_FILTER)
|
||||
# error CONF_CLOCK_DPLL_FILTER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_REFERENCE_FREQUENCY)
|
||||
# error CONF_CLOCK_DPLL_REFERENCE_FREQUENCY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_REFERENCE_DIVIDER)
|
||||
# error CONF_CLOCK_DPLL_REFERENCE_DIVIDER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_OUTPUT_FREQUENCY)
|
||||
# error CONF_CLOCK_DPLL_OUTPUT_FREQUENCY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_REFERENCE_GCLK_GENERATOR)
|
||||
# error CONF_CLOCK_DPLL_REFERENCE_GCLK_GENERATOR not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_LOCK_GCLK_GENERATOR)
|
||||
# error CONF_CLOCK_DPLL_LOCK_GCLK_GENERATOR not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_CONFIGURE_GCLK)
|
||||
# error CONF_CLOCK_CONFIGURE_GCLK not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_0_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_0_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_0_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_0_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_0_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_0_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_0_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_0_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_0_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_0_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_1_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_1_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_1_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_1_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_1_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_1_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_1_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_1_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_1_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_1_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_2_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_2_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_2_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_2_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_2_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_2_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_2_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_2_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_2_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_2_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_3_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_3_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_3_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_3_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_3_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_3_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_3_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_3_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_3_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_3_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_4_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_4_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_4_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_4_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_4_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_4_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_4_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_4_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_4_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_4_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_5_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_5_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_5_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_5_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_5_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_5_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_5_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_5_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_5_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_5_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_6_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_6_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_6_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_6_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_6_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_6_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_6_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_6_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_6_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_6_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_7_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_7_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_7_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_7_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_7_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_7_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_7_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_7_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_7_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_7_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_8_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_8_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_8_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_8_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_8_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_8_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_8_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_8_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_8_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_8_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#endif /* CLOCK_CONFIG_CHECK_H */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,297 +1,297 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Generic Clock Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#ifndef SYSTEM_CLOCK_GCLK_H_INCLUDED
|
||||
#define SYSTEM_CLOCK_GCLK_H_INCLUDED
|
||||
|
||||
/**
|
||||
* \addtogroup asfdoc_sam0_system_clock_group
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include <compiler.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief List of available GCLK generators.
|
||||
*
|
||||
* List of Available GCLK generators. This enum is used in the peripheral
|
||||
* device drivers to select the GCLK generator to be used for its operation.
|
||||
*
|
||||
* The number of GCLK generators available is device dependent.
|
||||
*/
|
||||
enum gclk_generator {
|
||||
/** GCLK generator channel 0 */
|
||||
GCLK_GENERATOR_0,
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 0)
|
||||
/** GCLK generator channel 1 */
|
||||
GCLK_GENERATOR_1,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 1)
|
||||
/** GCLK generator channel 2 */
|
||||
GCLK_GENERATOR_2,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 2)
|
||||
/** GCLK generator channel 3 */
|
||||
GCLK_GENERATOR_3,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 3)
|
||||
/** GCLK generator channel 4 */
|
||||
GCLK_GENERATOR_4,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 4)
|
||||
/** GCLK generator channel 5 */
|
||||
GCLK_GENERATOR_5,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 5)
|
||||
/** GCLK generator channel 6 */
|
||||
GCLK_GENERATOR_6,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 6)
|
||||
/** GCLK generator channel 7 */
|
||||
GCLK_GENERATOR_7,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 7)
|
||||
/** GCLK generator channel 8 */
|
||||
GCLK_GENERATOR_8,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 8)
|
||||
/** GCLK generator channel 9 */
|
||||
GCLK_GENERATOR_9,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 9)
|
||||
/** GCLK generator channel 10 */
|
||||
GCLK_GENERATOR_10,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 10)
|
||||
/** GCLK generator channel 11 */
|
||||
GCLK_GENERATOR_11,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 11)
|
||||
/** GCLK generator channel 12 */
|
||||
GCLK_GENERATOR_12,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 12)
|
||||
/** GCLK generator channel 13 */
|
||||
GCLK_GENERATOR_13,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 13)
|
||||
/** GCLK generator channel 14 */
|
||||
GCLK_GENERATOR_14,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 14)
|
||||
/** GCLK generator channel 15 */
|
||||
GCLK_GENERATOR_15,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 15)
|
||||
/** GCLK generator channel 16 */
|
||||
GCLK_GENERATOR_16,
|
||||
#endif
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Generic Clock Generator configuration structure.
|
||||
*
|
||||
* Configuration structure for a Generic Clock Generator channel. This
|
||||
* structure should be initialized by the
|
||||
* \ref system_gclk_gen_get_config_defaults() function before being modified by
|
||||
* the user application.
|
||||
*/
|
||||
struct system_gclk_gen_config {
|
||||
/** Source clock input channel index, see the \ref system_clock_source */
|
||||
uint8_t source_clock;
|
||||
/** If \c true, the generator output level is high when disabled */
|
||||
bool high_when_disabled;
|
||||
/** Integer division factor of the clock output compared to the input */
|
||||
uint32_t division_factor;
|
||||
/** If \c true, the clock is kept enabled during device standby mode */
|
||||
bool run_in_standby;
|
||||
/** If \c true, enables GCLK generator clock output to a GPIO pin */
|
||||
bool output_enable;
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Generic Clock configuration structure.
|
||||
*
|
||||
* Configuration structure for a Generic Clock channel. This structure
|
||||
* should be initialized by the \ref system_gclk_chan_get_config_defaults()
|
||||
* function before being modified by the user application.
|
||||
*/
|
||||
struct system_gclk_chan_config {
|
||||
/** Generic Clock Generator source channel */
|
||||
enum gclk_generator source_generator;
|
||||
};
|
||||
|
||||
/** \name Generic Clock Management
|
||||
* @{
|
||||
*/
|
||||
void system_gclk_init(void);
|
||||
|
||||
/** @} */
|
||||
|
||||
|
||||
/**
|
||||
* \name Generic Clock Management (Generators)
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Initializes a Generic Clock Generator configuration structure to defaults.
|
||||
*
|
||||
* Initializes a given Generic Clock Generator configuration structure to
|
||||
* a set of known default values. This function should be called on all
|
||||
* new instances of these configuration structures before being modified
|
||||
* by the user application.
|
||||
*
|
||||
* The default configuration is:
|
||||
* \li The clock is generated undivided from the source frequency
|
||||
* \li The clock generator output is low when the generator is disabled
|
||||
* \li The input clock is sourced from input clock channel 0
|
||||
* \li The clock will be disabled during sleep
|
||||
* \li The clock output will not be routed to a physical GPIO pin
|
||||
*
|
||||
* \param[out] config Configuration structure to initialize to default values
|
||||
*/
|
||||
static inline void system_gclk_gen_get_config_defaults(
|
||||
struct system_gclk_gen_config *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(config);
|
||||
|
||||
/* Default configuration values */
|
||||
config->division_factor = 1;
|
||||
config->high_when_disabled = false;
|
||||
#if SAML21 || SAML22 || SAMR30 || SAMR34 || SAMR35
|
||||
config->source_clock = GCLK_SOURCE_OSC16M;
|
||||
#elif (SAMC20) || (SAMC21)
|
||||
config->source_clock = GCLK_SOURCE_OSC48M;
|
||||
#else
|
||||
config->source_clock = GCLK_SOURCE_OSC8M;
|
||||
#endif
|
||||
config->run_in_standby = false;
|
||||
config->output_enable = false;
|
||||
}
|
||||
|
||||
void system_gclk_gen_set_config(
|
||||
const uint8_t generator,
|
||||
struct system_gclk_gen_config *const config);
|
||||
|
||||
void system_gclk_gen_enable(
|
||||
const uint8_t generator);
|
||||
|
||||
void system_gclk_gen_disable(
|
||||
const uint8_t generator);
|
||||
|
||||
bool system_gclk_gen_is_enabled(
|
||||
const uint8_t generator);
|
||||
|
||||
/** @} */
|
||||
|
||||
|
||||
/**
|
||||
* \name Generic Clock Management (Channels)
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Initializes a Generic Clock configuration structure to defaults.
|
||||
*
|
||||
* Initializes a given Generic Clock configuration structure to a set of
|
||||
* known default values. This function should be called on all new
|
||||
* instances of these configuration structures before being modified by the
|
||||
* user application.
|
||||
*
|
||||
* The default configuration is as follows:
|
||||
* \li The clock is sourced from the Generic Clock Generator channel 0
|
||||
* \li The clock configuration will not be write-locked when set
|
||||
*
|
||||
* \param[out] config Configuration structure to initialize to default values
|
||||
*/
|
||||
static inline void system_gclk_chan_get_config_defaults(
|
||||
struct system_gclk_chan_config *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(config);
|
||||
|
||||
/* Default configuration values */
|
||||
config->source_generator = GCLK_GENERATOR_0;
|
||||
}
|
||||
|
||||
void system_gclk_chan_set_config(
|
||||
const uint8_t channel,
|
||||
struct system_gclk_chan_config *const config);
|
||||
|
||||
void system_gclk_chan_enable(
|
||||
const uint8_t channel);
|
||||
|
||||
void system_gclk_chan_disable(
|
||||
const uint8_t channel);
|
||||
|
||||
bool system_gclk_chan_is_enabled(
|
||||
const uint8_t channel);
|
||||
|
||||
void system_gclk_chan_lock(
|
||||
const uint8_t channel);
|
||||
|
||||
bool system_gclk_chan_is_locked(
|
||||
const uint8_t channel);
|
||||
|
||||
/** @} */
|
||||
|
||||
|
||||
/**
|
||||
* \name Generic Clock Frequency Retrieval
|
||||
* @{
|
||||
*/
|
||||
|
||||
uint32_t system_gclk_gen_get_hz(
|
||||
const uint8_t generator);
|
||||
|
||||
uint32_t system_gclk_chan_get_hz(
|
||||
const uint8_t channel);
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
#endif
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Generic Clock Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#ifndef SYSTEM_CLOCK_GCLK_H_INCLUDED
|
||||
#define SYSTEM_CLOCK_GCLK_H_INCLUDED
|
||||
|
||||
/**
|
||||
* \addtogroup asfdoc_sam0_system_clock_group
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include <compiler.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief List of available GCLK generators.
|
||||
*
|
||||
* List of Available GCLK generators. This enum is used in the peripheral
|
||||
* device drivers to select the GCLK generator to be used for its operation.
|
||||
*
|
||||
* The number of GCLK generators available is device dependent.
|
||||
*/
|
||||
enum gclk_generator {
|
||||
/** GCLK generator channel 0 */
|
||||
GCLK_GENERATOR_0,
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 0)
|
||||
/** GCLK generator channel 1 */
|
||||
GCLK_GENERATOR_1,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 1)
|
||||
/** GCLK generator channel 2 */
|
||||
GCLK_GENERATOR_2,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 2)
|
||||
/** GCLK generator channel 3 */
|
||||
GCLK_GENERATOR_3,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 3)
|
||||
/** GCLK generator channel 4 */
|
||||
GCLK_GENERATOR_4,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 4)
|
||||
/** GCLK generator channel 5 */
|
||||
GCLK_GENERATOR_5,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 5)
|
||||
/** GCLK generator channel 6 */
|
||||
GCLK_GENERATOR_6,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 6)
|
||||
/** GCLK generator channel 7 */
|
||||
GCLK_GENERATOR_7,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 7)
|
||||
/** GCLK generator channel 8 */
|
||||
GCLK_GENERATOR_8,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 8)
|
||||
/** GCLK generator channel 9 */
|
||||
GCLK_GENERATOR_9,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 9)
|
||||
/** GCLK generator channel 10 */
|
||||
GCLK_GENERATOR_10,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 10)
|
||||
/** GCLK generator channel 11 */
|
||||
GCLK_GENERATOR_11,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 11)
|
||||
/** GCLK generator channel 12 */
|
||||
GCLK_GENERATOR_12,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 12)
|
||||
/** GCLK generator channel 13 */
|
||||
GCLK_GENERATOR_13,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 13)
|
||||
/** GCLK generator channel 14 */
|
||||
GCLK_GENERATOR_14,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 14)
|
||||
/** GCLK generator channel 15 */
|
||||
GCLK_GENERATOR_15,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 15)
|
||||
/** GCLK generator channel 16 */
|
||||
GCLK_GENERATOR_16,
|
||||
#endif
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Generic Clock Generator configuration structure.
|
||||
*
|
||||
* Configuration structure for a Generic Clock Generator channel. This
|
||||
* structure should be initialized by the
|
||||
* \ref system_gclk_gen_get_config_defaults() function before being modified by
|
||||
* the user application.
|
||||
*/
|
||||
struct system_gclk_gen_config {
|
||||
/** Source clock input channel index, see the \ref system_clock_source */
|
||||
uint8_t source_clock;
|
||||
/** If \c true, the generator output level is high when disabled */
|
||||
bool high_when_disabled;
|
||||
/** Integer division factor of the clock output compared to the input */
|
||||
uint32_t division_factor;
|
||||
/** If \c true, the clock is kept enabled during device standby mode */
|
||||
bool run_in_standby;
|
||||
/** If \c true, enables GCLK generator clock output to a GPIO pin */
|
||||
bool output_enable;
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Generic Clock configuration structure.
|
||||
*
|
||||
* Configuration structure for a Generic Clock channel. This structure
|
||||
* should be initialized by the \ref system_gclk_chan_get_config_defaults()
|
||||
* function before being modified by the user application.
|
||||
*/
|
||||
struct system_gclk_chan_config {
|
||||
/** Generic Clock Generator source channel */
|
||||
enum gclk_generator source_generator;
|
||||
};
|
||||
|
||||
/** \name Generic Clock Management
|
||||
* @{
|
||||
*/
|
||||
void system_gclk_init(void);
|
||||
|
||||
/** @} */
|
||||
|
||||
|
||||
/**
|
||||
* \name Generic Clock Management (Generators)
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Initializes a Generic Clock Generator configuration structure to defaults.
|
||||
*
|
||||
* Initializes a given Generic Clock Generator configuration structure to
|
||||
* a set of known default values. This function should be called on all
|
||||
* new instances of these configuration structures before being modified
|
||||
* by the user application.
|
||||
*
|
||||
* The default configuration is:
|
||||
* \li The clock is generated undivided from the source frequency
|
||||
* \li The clock generator output is low when the generator is disabled
|
||||
* \li The input clock is sourced from input clock channel 0
|
||||
* \li The clock will be disabled during sleep
|
||||
* \li The clock output will not be routed to a physical GPIO pin
|
||||
*
|
||||
* \param[out] config Configuration structure to initialize to default values
|
||||
*/
|
||||
static inline void system_gclk_gen_get_config_defaults(
|
||||
struct system_gclk_gen_config *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(config);
|
||||
|
||||
/* Default configuration values */
|
||||
config->division_factor = 1;
|
||||
config->high_when_disabled = false;
|
||||
#if SAML21 || SAML22 || SAMR30 || SAMR34 || SAMR35
|
||||
config->source_clock = GCLK_SOURCE_OSC16M;
|
||||
#elif (SAMC20) || (SAMC21)
|
||||
config->source_clock = GCLK_SOURCE_OSC48M;
|
||||
#else
|
||||
config->source_clock = GCLK_SOURCE_OSC8M;
|
||||
#endif
|
||||
config->run_in_standby = false;
|
||||
config->output_enable = false;
|
||||
}
|
||||
|
||||
void system_gclk_gen_set_config(
|
||||
const uint8_t generator,
|
||||
struct system_gclk_gen_config *const config);
|
||||
|
||||
void system_gclk_gen_enable(
|
||||
const uint8_t generator);
|
||||
|
||||
void system_gclk_gen_disable(
|
||||
const uint8_t generator);
|
||||
|
||||
bool system_gclk_gen_is_enabled(
|
||||
const uint8_t generator);
|
||||
|
||||
/** @} */
|
||||
|
||||
|
||||
/**
|
||||
* \name Generic Clock Management (Channels)
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Initializes a Generic Clock configuration structure to defaults.
|
||||
*
|
||||
* Initializes a given Generic Clock configuration structure to a set of
|
||||
* known default values. This function should be called on all new
|
||||
* instances of these configuration structures before being modified by the
|
||||
* user application.
|
||||
*
|
||||
* The default configuration is as follows:
|
||||
* \li The clock is sourced from the Generic Clock Generator channel 0
|
||||
* \li The clock configuration will not be write-locked when set
|
||||
*
|
||||
* \param[out] config Configuration structure to initialize to default values
|
||||
*/
|
||||
static inline void system_gclk_chan_get_config_defaults(
|
||||
struct system_gclk_chan_config *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(config);
|
||||
|
||||
/* Default configuration values */
|
||||
config->source_generator = GCLK_GENERATOR_0;
|
||||
}
|
||||
|
||||
void system_gclk_chan_set_config(
|
||||
const uint8_t channel,
|
||||
struct system_gclk_chan_config *const config);
|
||||
|
||||
void system_gclk_chan_enable(
|
||||
const uint8_t channel);
|
||||
|
||||
void system_gclk_chan_disable(
|
||||
const uint8_t channel);
|
||||
|
||||
bool system_gclk_chan_is_enabled(
|
||||
const uint8_t channel);
|
||||
|
||||
void system_gclk_chan_lock(
|
||||
const uint8_t channel);
|
||||
|
||||
bool system_gclk_chan_is_locked(
|
||||
const uint8_t channel);
|
||||
|
||||
/** @} */
|
||||
|
||||
|
||||
/**
|
||||
* \name Generic Clock Frequency Retrieval
|
||||
* @{
|
||||
*/
|
||||
|
||||
uint32_t system_gclk_gen_get_hz(
|
||||
const uint8_t generator);
|
||||
|
||||
uint32_t system_gclk_chan_get_hz(
|
||||
const uint8_t channel);
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
#endif
|
||||
|
||||
@ -1,207 +1,207 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM System Interrupt Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#include "system_interrupt.h"
|
||||
|
||||
/**
|
||||
* \brief Check if a interrupt line is pending.
|
||||
*
|
||||
* Checks if the requested interrupt vector is pending.
|
||||
*
|
||||
* \param[in] vector Interrupt vector number to check
|
||||
*
|
||||
* \returns A boolean identifying if the requested interrupt vector is pending.
|
||||
*
|
||||
* \retval true Specified interrupt vector is pending
|
||||
* \retval false Specified interrupt vector is not pending
|
||||
*
|
||||
*/
|
||||
bool system_interrupt_is_pending(
|
||||
const enum system_interrupt_vector vector)
|
||||
{
|
||||
bool result;
|
||||
|
||||
if (vector >= _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START) {
|
||||
result = ((NVIC->ISPR[0] & (1 << vector)) != 0);
|
||||
} else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
|
||||
result = ((SCB->ICSR & SCB_ICSR_PENDSTSET_Msk) != 0);
|
||||
} else {
|
||||
Assert(false);
|
||||
result = false;
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Set a interrupt vector as pending.
|
||||
*
|
||||
* Set the requested interrupt vector as pending (i.e. issues a software
|
||||
* interrupt request for the specified vector). The software handler will be
|
||||
* handled (if enabled) in a priority order based on vector number and
|
||||
* configured priority settings.
|
||||
*
|
||||
* \param[in] vector Interrupt vector number which is set as pending
|
||||
*
|
||||
* \returns Status code identifying if the vector was successfully set as
|
||||
* pending.
|
||||
*
|
||||
* \retval STATUS_OK If no error was detected
|
||||
* \retval STATUS_INVALID_ARG If an unsupported interrupt vector number was given
|
||||
*/
|
||||
enum status_code system_interrupt_set_pending(
|
||||
const enum system_interrupt_vector vector)
|
||||
{
|
||||
enum status_code status = STATUS_OK;
|
||||
|
||||
if (vector >= _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START) {
|
||||
NVIC->ISPR[0] = (1 << vector);
|
||||
} else if (vector == SYSTEM_INTERRUPT_NON_MASKABLE) {
|
||||
/* Note: Because NMI has highest priority it will be executed
|
||||
* immediately after it has been set pending */
|
||||
SCB->ICSR = SCB_ICSR_NMIPENDSET_Msk;
|
||||
} else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
|
||||
SCB->ICSR = SCB_ICSR_PENDSTSET_Msk;
|
||||
} else {
|
||||
/* The user want to set something unsupported as pending */
|
||||
Assert(false);
|
||||
status = STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Clear pending interrupt vector.
|
||||
*
|
||||
* Clear a pending interrupt vector, so the software handler is not executed.
|
||||
*
|
||||
* \param[in] vector Interrupt vector number to clear
|
||||
*
|
||||
* \returns A status code identifying if the interrupt pending state was
|
||||
* successfully cleared.
|
||||
*
|
||||
* \retval STATUS_OK If no error was detected
|
||||
* \retval STATUS_INVALID_ARG If an unsupported interrupt vector number was given
|
||||
*/
|
||||
enum status_code system_interrupt_clear_pending(
|
||||
const enum system_interrupt_vector vector)
|
||||
{
|
||||
enum status_code status = STATUS_OK;
|
||||
|
||||
if (vector >= _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START) {
|
||||
NVIC->ICPR[0] = (1 << vector);
|
||||
} else if (vector == SYSTEM_INTERRUPT_NON_MASKABLE) {
|
||||
/* Note: Clearing of NMI pending interrupts does not make sense and is
|
||||
* not supported by the device, as it has the highest priority and will
|
||||
* always be executed at the moment it is set */
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
} else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
|
||||
SCB->ICSR = SCB_ICSR_PENDSTCLR_Msk;
|
||||
} else {
|
||||
Assert(false);
|
||||
status = STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Set interrupt vector priority level.
|
||||
*
|
||||
* Set the priority level of an external interrupt or exception.
|
||||
*
|
||||
* \param[in] vector Interrupt vector to change
|
||||
* \param[in] priority_level New vector priority level to set
|
||||
*
|
||||
* \returns Status code indicating if the priority level of the interrupt was
|
||||
* successfully set.
|
||||
*
|
||||
* \retval STATUS_OK If no error was detected
|
||||
* \retval STATUS_INVALID_ARG If an unsupported interrupt vector number was given
|
||||
*/
|
||||
enum status_code system_interrupt_set_priority(
|
||||
const enum system_interrupt_vector vector,
|
||||
const enum system_interrupt_priority_level priority_level)
|
||||
{
|
||||
enum status_code status = STATUS_OK;
|
||||
|
||||
if (vector >= _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START) {
|
||||
uint8_t register_num = vector / 4;
|
||||
uint8_t priority_pos = ((vector % 4) * 8) + (8 - __NVIC_PRIO_BITS);
|
||||
|
||||
NVIC->IP[register_num] =
|
||||
(NVIC->IP[register_num] & ~(_SYSTEM_INTERRUPT_PRIORITY_MASK << priority_pos)) |
|
||||
(priority_level << priority_pos);
|
||||
|
||||
} else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
|
||||
SCB->SHP[1] = (priority_level << _SYSTEM_INTERRUPT_SYSTICK_PRI_POS);
|
||||
} else {
|
||||
Assert(false);
|
||||
status = STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Get interrupt vector priority level.
|
||||
*
|
||||
* Retrieves the priority level of the requested external interrupt or exception.
|
||||
*
|
||||
* \param[in] vector Interrupt vector of which the priority level will be read
|
||||
*
|
||||
* \return Currently configured interrupt priority level of the given interrupt
|
||||
* vector.
|
||||
*/
|
||||
enum system_interrupt_priority_level system_interrupt_get_priority(
|
||||
const enum system_interrupt_vector vector)
|
||||
{
|
||||
uint8_t register_num = vector / 4;
|
||||
uint8_t priority_pos = ((vector % 4) * 8) + (8 - __NVIC_PRIO_BITS);
|
||||
|
||||
enum system_interrupt_priority_level priority = SYSTEM_INTERRUPT_PRIORITY_LEVEL_0;
|
||||
|
||||
if (vector >= 0) {
|
||||
priority = (enum system_interrupt_priority_level)
|
||||
((NVIC->IP[register_num] >> priority_pos) & _SYSTEM_INTERRUPT_PRIORITY_MASK);
|
||||
} else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
|
||||
priority = (enum system_interrupt_priority_level)
|
||||
((SCB->SHP[1] >> _SYSTEM_INTERRUPT_SYSTICK_PRI_POS) & _SYSTEM_INTERRUPT_PRIORITY_MASK);
|
||||
}
|
||||
|
||||
return priority;
|
||||
}
|
||||
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM System Interrupt Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#include "system_interrupt.h"
|
||||
|
||||
/**
|
||||
* \brief Check if a interrupt line is pending.
|
||||
*
|
||||
* Checks if the requested interrupt vector is pending.
|
||||
*
|
||||
* \param[in] vector Interrupt vector number to check
|
||||
*
|
||||
* \returns A boolean identifying if the requested interrupt vector is pending.
|
||||
*
|
||||
* \retval true Specified interrupt vector is pending
|
||||
* \retval false Specified interrupt vector is not pending
|
||||
*
|
||||
*/
|
||||
bool system_interrupt_is_pending(
|
||||
const enum system_interrupt_vector vector)
|
||||
{
|
||||
bool result;
|
||||
|
||||
if (vector >= _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START) {
|
||||
result = ((NVIC->ISPR[0] & (1 << vector)) != 0);
|
||||
} else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
|
||||
result = ((SCB->ICSR & SCB_ICSR_PENDSTSET_Msk) != 0);
|
||||
} else {
|
||||
Assert(false);
|
||||
result = false;
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Set a interrupt vector as pending.
|
||||
*
|
||||
* Set the requested interrupt vector as pending (i.e. issues a software
|
||||
* interrupt request for the specified vector). The software handler will be
|
||||
* handled (if enabled) in a priority order based on vector number and
|
||||
* configured priority settings.
|
||||
*
|
||||
* \param[in] vector Interrupt vector number which is set as pending
|
||||
*
|
||||
* \returns Status code identifying if the vector was successfully set as
|
||||
* pending.
|
||||
*
|
||||
* \retval STATUS_OK If no error was detected
|
||||
* \retval STATUS_INVALID_ARG If an unsupported interrupt vector number was given
|
||||
*/
|
||||
enum status_code system_interrupt_set_pending(
|
||||
const enum system_interrupt_vector vector)
|
||||
{
|
||||
enum status_code status = STATUS_OK;
|
||||
|
||||
if (vector >= _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START) {
|
||||
NVIC->ISPR[0] = (1 << vector);
|
||||
} else if (vector == SYSTEM_INTERRUPT_NON_MASKABLE) {
|
||||
/* Note: Because NMI has highest priority it will be executed
|
||||
* immediately after it has been set pending */
|
||||
SCB->ICSR = SCB_ICSR_NMIPENDSET_Msk;
|
||||
} else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
|
||||
SCB->ICSR = SCB_ICSR_PENDSTSET_Msk;
|
||||
} else {
|
||||
/* The user want to set something unsupported as pending */
|
||||
Assert(false);
|
||||
status = STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Clear pending interrupt vector.
|
||||
*
|
||||
* Clear a pending interrupt vector, so the software handler is not executed.
|
||||
*
|
||||
* \param[in] vector Interrupt vector number to clear
|
||||
*
|
||||
* \returns A status code identifying if the interrupt pending state was
|
||||
* successfully cleared.
|
||||
*
|
||||
* \retval STATUS_OK If no error was detected
|
||||
* \retval STATUS_INVALID_ARG If an unsupported interrupt vector number was given
|
||||
*/
|
||||
enum status_code system_interrupt_clear_pending(
|
||||
const enum system_interrupt_vector vector)
|
||||
{
|
||||
enum status_code status = STATUS_OK;
|
||||
|
||||
if (vector >= _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START) {
|
||||
NVIC->ICPR[0] = (1 << vector);
|
||||
} else if (vector == SYSTEM_INTERRUPT_NON_MASKABLE) {
|
||||
/* Note: Clearing of NMI pending interrupts does not make sense and is
|
||||
* not supported by the device, as it has the highest priority and will
|
||||
* always be executed at the moment it is set */
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
} else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
|
||||
SCB->ICSR = SCB_ICSR_PENDSTCLR_Msk;
|
||||
} else {
|
||||
Assert(false);
|
||||
status = STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Set interrupt vector priority level.
|
||||
*
|
||||
* Set the priority level of an external interrupt or exception.
|
||||
*
|
||||
* \param[in] vector Interrupt vector to change
|
||||
* \param[in] priority_level New vector priority level to set
|
||||
*
|
||||
* \returns Status code indicating if the priority level of the interrupt was
|
||||
* successfully set.
|
||||
*
|
||||
* \retval STATUS_OK If no error was detected
|
||||
* \retval STATUS_INVALID_ARG If an unsupported interrupt vector number was given
|
||||
*/
|
||||
enum status_code system_interrupt_set_priority(
|
||||
const enum system_interrupt_vector vector,
|
||||
const enum system_interrupt_priority_level priority_level)
|
||||
{
|
||||
enum status_code status = STATUS_OK;
|
||||
|
||||
if (vector >= _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START) {
|
||||
uint8_t register_num = vector / 4;
|
||||
uint8_t priority_pos = ((vector % 4) * 8) + (8 - __NVIC_PRIO_BITS);
|
||||
|
||||
NVIC->IP[register_num] =
|
||||
(NVIC->IP[register_num] & ~(_SYSTEM_INTERRUPT_PRIORITY_MASK << priority_pos)) |
|
||||
(priority_level << priority_pos);
|
||||
|
||||
} else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
|
||||
SCB->SHP[1] = (priority_level << _SYSTEM_INTERRUPT_SYSTICK_PRI_POS);
|
||||
} else {
|
||||
Assert(false);
|
||||
status = STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Get interrupt vector priority level.
|
||||
*
|
||||
* Retrieves the priority level of the requested external interrupt or exception.
|
||||
*
|
||||
* \param[in] vector Interrupt vector of which the priority level will be read
|
||||
*
|
||||
* \return Currently configured interrupt priority level of the given interrupt
|
||||
* vector.
|
||||
*/
|
||||
enum system_interrupt_priority_level system_interrupt_get_priority(
|
||||
const enum system_interrupt_vector vector)
|
||||
{
|
||||
uint8_t register_num = vector / 4;
|
||||
uint8_t priority_pos = ((vector % 4) * 8) + (8 - __NVIC_PRIO_BITS);
|
||||
|
||||
enum system_interrupt_priority_level priority = SYSTEM_INTERRUPT_PRIORITY_LEVEL_0;
|
||||
|
||||
if (vector >= 0) {
|
||||
priority = (enum system_interrupt_priority_level)
|
||||
((NVIC->IP[register_num] >> priority_pos) & _SYSTEM_INTERRUPT_PRIORITY_MASK);
|
||||
} else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
|
||||
priority = (enum system_interrupt_priority_level)
|
||||
((SCB->SHP[1] >> _SYSTEM_INTERRUPT_SYSTICK_PRI_POS) & _SYSTEM_INTERRUPT_PRIORITY_MASK);
|
||||
}
|
||||
|
||||
return priority;
|
||||
}
|
||||
|
||||
|
||||
@ -1,423 +1,423 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM System Interrupt Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#ifndef SYSTEM_INTERRUPT_H_INCLUDED
|
||||
#define SYSTEM_INTERRUPT_H_INCLUDED
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \defgroup asfdoc_sam0_system_interrupt_group SAM System Interrupt (SYSTEM INTERRUPT) Driver
|
||||
*
|
||||
* This driver for Atmel® | SMART ARM®-based microcontrollers provides
|
||||
* an interface for the configuration and management of internal software and
|
||||
* hardware interrupts/exceptions.
|
||||
*
|
||||
* The following peripheral is used by this module:
|
||||
* - NVIC (Nested Vector Interrupt Controller)
|
||||
*
|
||||
* The following devices can use this module:
|
||||
* - Atmel | SMART SAM D20/D21
|
||||
* - Atmel | SMART SAM R21
|
||||
* - Atmel | SMART SAM D09/D10/D11
|
||||
* - Atmel | SMART SAM L21/L22
|
||||
* - Atmel | SMART SAM DA1
|
||||
* - Atmel | SMART SAM C20/C21
|
||||
* - Atmel | SMART SAM HA1
|
||||
* - Atmel | SMART SAM R30
|
||||
* - Atmel | SMART SAM R34
|
||||
* - Atmel | SMART SAM R35
|
||||
*
|
||||
* The outline of this documentation is as follows:
|
||||
* - \ref asfdoc_sam0_system_interrupt_prerequisites
|
||||
* - \ref asfdoc_sam0_system_interrupt_module_overview
|
||||
* - \ref asfdoc_sam0_system_interrupt_special_considerations
|
||||
* - \ref asfdoc_sam0_system_interrupt_extra_info
|
||||
* - \ref asfdoc_sam0_system_interrupt_examples
|
||||
* - \ref asfdoc_sam0_system_interrupt_api_overview
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_prerequisites Prerequisites
|
||||
*
|
||||
* There are no prerequisites for this module.
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_module_overview Module Overview
|
||||
*
|
||||
* The ARM® Cortex® M0+ core contains an interrupt and exception vector table, which
|
||||
* can be used to configure the device's interrupt handlers; individual
|
||||
* interrupts and exceptions can be enabled and disabled, as well as configured
|
||||
* with a variable priority.
|
||||
*
|
||||
* This driver provides a set of wrappers around the core interrupt functions,
|
||||
* to expose a simple API for the management of global and individual interrupts
|
||||
* within the device.
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_interrupt_module_overview_criticalsec Critical Sections
|
||||
* In some applications it is important to ensure that no interrupts may be
|
||||
* executed by the system whilst a critical portion of code is being run; for
|
||||
* example, a buffer may be copied from one context to another - during which
|
||||
* interrupts must be disabled to avoid corruption of the source buffer contents
|
||||
* until the copy has completed. This driver provides a basic API to enter and
|
||||
* exit nested critical sections, so that global interrupts can be kept disabled
|
||||
* for as long as necessary to complete a critical application code section.
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_interrupt_module_overview_softints Software Interrupts
|
||||
* For some applications, it may be desirable to raise a module or core
|
||||
* interrupt via software. For this reason, a set of APIs to set an interrupt or
|
||||
* exception as pending are provided to the user application.
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_special_considerations Special Considerations
|
||||
*
|
||||
* Interrupts from peripherals in the SAM devices are on a per-module basis;
|
||||
* an interrupt raised from any source within a module will cause a single,
|
||||
* module-common handler to execute. It is the user application or driver's
|
||||
* responsibility to de-multiplex the module-common interrupt to determine the
|
||||
* exact interrupt cause.
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_extra_info Extra Information
|
||||
*
|
||||
* For extra information, see \ref asfdoc_sam0_system_interrupt_extra. This includes:
|
||||
* - \ref asfdoc_sam0_system_interrupt_extra_acronyms
|
||||
* - \ref asfdoc_sam0_system_interrupt_extra_dependencies
|
||||
* - \ref asfdoc_sam0_system_interrupt_extra_errata
|
||||
* - \ref asfdoc_sam0_system_interrupt_extra_history
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_examples Examples
|
||||
*
|
||||
* For a list of examples related to this driver, see
|
||||
* \ref asfdoc_sam0_system_interrupt_exqsg.
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_api_overview API Overview
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include <compiler.h>
|
||||
#include <core_cm0plus.h>
|
||||
#include "system_interrupt_features.h"
|
||||
|
||||
/**
|
||||
* \brief Table of possible system interrupt/exception vector priorities.
|
||||
*
|
||||
* Table of all possible interrupt and exception vector priorities within the
|
||||
* device.
|
||||
*/
|
||||
enum system_interrupt_priority_level {
|
||||
/** Priority level 0, the highest possible interrupt priority */
|
||||
SYSTEM_INTERRUPT_PRIORITY_LEVEL_0 = 0,
|
||||
/** Priority level 1 */
|
||||
SYSTEM_INTERRUPT_PRIORITY_LEVEL_1 = 1,
|
||||
/** Priority level 2 */
|
||||
SYSTEM_INTERRUPT_PRIORITY_LEVEL_2 = 2,
|
||||
/** Priority level 3, the lowest possible interrupt priority */
|
||||
SYSTEM_INTERRUPT_PRIORITY_LEVEL_3 = 3,
|
||||
};
|
||||
|
||||
/**
|
||||
* \name Critical Section Management
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Enters a critical section.
|
||||
*
|
||||
* Disables global interrupts. To support nested critical sections, an internal
|
||||
* count of the critical section nesting will be kept, so that global interrupts
|
||||
* are only re-enabled upon leaving the outermost nested critical section.
|
||||
*
|
||||
*/
|
||||
static inline void system_interrupt_enter_critical_section(void)
|
||||
{
|
||||
cpu_irq_enter_critical();
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Leaves a critical section.
|
||||
*
|
||||
* Enables global interrupts. To support nested critical sections, an internal
|
||||
* count of the critical section nesting will be kept, so that global interrupts
|
||||
* are only re-enabled upon leaving the outermost nested critical section.
|
||||
*
|
||||
*/
|
||||
static inline void system_interrupt_leave_critical_section(void)
|
||||
{
|
||||
cpu_irq_leave_critical();
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \name Interrupt Enabling/Disabling
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Check if global interrupts are enabled.
|
||||
*
|
||||
* Checks if global interrupts are currently enabled.
|
||||
*
|
||||
* \returns A boolean that identifies if the global interrupts are enabled or not.
|
||||
*
|
||||
* \retval true Global interrupts are currently enabled
|
||||
* \retval false Global interrupts are currently disabled
|
||||
*
|
||||
*/
|
||||
static inline bool system_interrupt_is_global_enabled(void)
|
||||
{
|
||||
return cpu_irq_is_enabled();
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Enables global interrupts.
|
||||
*
|
||||
* Enables global interrupts in the device to fire any enabled interrupt handlers.
|
||||
*/
|
||||
static inline void system_interrupt_enable_global(void)
|
||||
{
|
||||
cpu_irq_enable();
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disables global interrupts.
|
||||
*
|
||||
* Disabled global interrupts in the device, preventing any enabled interrupt
|
||||
* handlers from executing.
|
||||
*/
|
||||
static inline void system_interrupt_disable_global(void)
|
||||
{
|
||||
cpu_irq_disable();
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Checks if an interrupt vector is enabled or not.
|
||||
*
|
||||
* Checks if a specific interrupt vector is currently enabled.
|
||||
*
|
||||
* \param[in] vector Interrupt vector number to check
|
||||
*
|
||||
* \returns A variable identifying if the requested interrupt vector is enabled.
|
||||
*
|
||||
* \retval true Specified interrupt vector is currently enabled
|
||||
* \retval false Specified interrupt vector is currently disabled
|
||||
*
|
||||
*/
|
||||
static inline bool system_interrupt_is_enabled(
|
||||
const enum system_interrupt_vector vector)
|
||||
{
|
||||
return (bool)((NVIC->ISER[0] >> (uint32_t)vector) & 0x00000001);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Enable interrupt vector.
|
||||
*
|
||||
* Enables execution of the software handler for the requested interrupt vector.
|
||||
*
|
||||
* \param[in] vector Interrupt vector to enable
|
||||
*/
|
||||
static inline void system_interrupt_enable(
|
||||
const enum system_interrupt_vector vector)
|
||||
{
|
||||
NVIC->ISER[0] = (uint32_t)(1 << ((uint32_t)vector & 0x0000001f));
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disable interrupt vector.
|
||||
*
|
||||
* Disables execution of the software handler for the requested interrupt vector.
|
||||
*
|
||||
* \param[in] vector Interrupt vector to disable
|
||||
*/
|
||||
static inline void system_interrupt_disable(
|
||||
const enum system_interrupt_vector vector)
|
||||
{
|
||||
NVIC->ICER[0] = (uint32_t)(1 << ((uint32_t)vector & 0x0000001f));
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \name Interrupt State Management
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Get active interrupt (if any).
|
||||
*
|
||||
* Return the vector number for the current executing software handler, if any.
|
||||
*
|
||||
* \return Interrupt number that is currently executing.
|
||||
*/
|
||||
static inline enum system_interrupt_vector system_interrupt_get_active(void)
|
||||
{
|
||||
uint32_t IPSR = __get_IPSR();
|
||||
/* The IPSR returns the Exception number, which with an offset 16 to IRQ number. */
|
||||
return (enum system_interrupt_vector)((IPSR & _SYSTEM_INTERRUPT_IPSR_MASK) - 16);
|
||||
}
|
||||
|
||||
bool system_interrupt_is_pending(
|
||||
const enum system_interrupt_vector vector);
|
||||
|
||||
enum status_code system_interrupt_set_pending(
|
||||
const enum system_interrupt_vector vector);
|
||||
|
||||
enum status_code system_interrupt_clear_pending(
|
||||
const enum system_interrupt_vector vector);
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \name Interrupt Priority Management
|
||||
* @{
|
||||
*/
|
||||
|
||||
enum status_code system_interrupt_set_priority(
|
||||
const enum system_interrupt_vector vector,
|
||||
const enum system_interrupt_priority_level priority_level);
|
||||
|
||||
enum system_interrupt_priority_level system_interrupt_get_priority(
|
||||
const enum system_interrupt_vector vector);
|
||||
|
||||
/** @} */
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_system_interrupt_extra Extra Information for SYSTEM INTERRUPT Driver
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_extra_acronyms Acronyms
|
||||
* The table below presents the acronyms used in this module:
|
||||
*
|
||||
* <table>
|
||||
* <tr>
|
||||
* <th>Acronym</th>
|
||||
* <th>Description</th>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>ISR</td>
|
||||
* <td>Interrupt Service Routine</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>NMI</td>
|
||||
* <td>Non-maskable Interrupt</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>SERCOM</td>
|
||||
* <td>Serial Communication Interface</td>
|
||||
* </tr>
|
||||
* </table>
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_extra_dependencies Dependencies
|
||||
* This driver has the following dependencies:
|
||||
*
|
||||
* - None
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_extra_errata Errata
|
||||
* There are no errata related to this driver.
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_extra_history Module History
|
||||
* An overview of the module history is presented in the table below, with
|
||||
* details on the enhancements and fixes made to the module since its first
|
||||
* release. The current version of this corresponds to the newest version in
|
||||
* the table.
|
||||
*
|
||||
* <table>
|
||||
* <tr>
|
||||
* <th>Changelog</th>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Initial Release</td>
|
||||
* </tr>
|
||||
* </table>
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_system_interrupt_exqsg Examples for SYSTEM INTERRUPT Driver
|
||||
*
|
||||
* This is a list of the available Quick Start guides (QSGs) and example
|
||||
* applications for \ref asfdoc_sam0_system_interrupt_group. QSGs are simple examples with
|
||||
* step-by-step instructions to configure and use this driver in a selection of
|
||||
* use cases. Note that a QSG can be compiled as a standalone application or be
|
||||
* added to the user application.
|
||||
*
|
||||
* - \subpage asfdoc_sam0_system_interrupt_critsec_use_case
|
||||
* - \subpage asfdoc_sam0_system_interrupt_enablemodint_use_case
|
||||
*
|
||||
* \page asfdoc_sam0_system_interrupt_document_revision_history Document Revision History
|
||||
*
|
||||
* <table>
|
||||
* <tr>
|
||||
* <th>Doc. Rev.</th>
|
||||
* <th>Date</th>
|
||||
* <th>Comments</th>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42122E</td>
|
||||
* <td>12/2015</td>
|
||||
* <td>Added support for SAM L21/L22, SAM DA1, SAM D09, and SAM C20/C21</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42122D</td>
|
||||
* <td>12/2014</td>
|
||||
* <td>Added support for SAM R21 and SAM D10/D11</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42122C</td>
|
||||
* <td>01/2014</td>
|
||||
* <td>Added support for SAM D21</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42122B</td>
|
||||
* <td>06/2013</td>
|
||||
* <td>Corrected documentation typos</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42122A</td>
|
||||
* <td>06/2013</td>
|
||||
* <td>Initial release</td>
|
||||
* </tr>
|
||||
* </table>
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // #ifndef SYSTEM_INTERRUPT_H_INCLUDED
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM System Interrupt Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#ifndef SYSTEM_INTERRUPT_H_INCLUDED
|
||||
#define SYSTEM_INTERRUPT_H_INCLUDED
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \defgroup asfdoc_sam0_system_interrupt_group SAM System Interrupt (SYSTEM INTERRUPT) Driver
|
||||
*
|
||||
* This driver for Atmel® | SMART ARM®-based microcontrollers provides
|
||||
* an interface for the configuration and management of internal software and
|
||||
* hardware interrupts/exceptions.
|
||||
*
|
||||
* The following peripheral is used by this module:
|
||||
* - NVIC (Nested Vector Interrupt Controller)
|
||||
*
|
||||
* The following devices can use this module:
|
||||
* - Atmel | SMART SAM D20/D21
|
||||
* - Atmel | SMART SAM R21
|
||||
* - Atmel | SMART SAM D09/D10/D11
|
||||
* - Atmel | SMART SAM L21/L22
|
||||
* - Atmel | SMART SAM DA1
|
||||
* - Atmel | SMART SAM C20/C21
|
||||
* - Atmel | SMART SAM HA1
|
||||
* - Atmel | SMART SAM R30
|
||||
* - Atmel | SMART SAM R34
|
||||
* - Atmel | SMART SAM R35
|
||||
*
|
||||
* The outline of this documentation is as follows:
|
||||
* - \ref asfdoc_sam0_system_interrupt_prerequisites
|
||||
* - \ref asfdoc_sam0_system_interrupt_module_overview
|
||||
* - \ref asfdoc_sam0_system_interrupt_special_considerations
|
||||
* - \ref asfdoc_sam0_system_interrupt_extra_info
|
||||
* - \ref asfdoc_sam0_system_interrupt_examples
|
||||
* - \ref asfdoc_sam0_system_interrupt_api_overview
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_prerequisites Prerequisites
|
||||
*
|
||||
* There are no prerequisites for this module.
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_module_overview Module Overview
|
||||
*
|
||||
* The ARM® Cortex® M0+ core contains an interrupt and exception vector table, which
|
||||
* can be used to configure the device's interrupt handlers; individual
|
||||
* interrupts and exceptions can be enabled and disabled, as well as configured
|
||||
* with a variable priority.
|
||||
*
|
||||
* This driver provides a set of wrappers around the core interrupt functions,
|
||||
* to expose a simple API for the management of global and individual interrupts
|
||||
* within the device.
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_interrupt_module_overview_criticalsec Critical Sections
|
||||
* In some applications it is important to ensure that no interrupts may be
|
||||
* executed by the system whilst a critical portion of code is being run; for
|
||||
* example, a buffer may be copied from one context to another - during which
|
||||
* interrupts must be disabled to avoid corruption of the source buffer contents
|
||||
* until the copy has completed. This driver provides a basic API to enter and
|
||||
* exit nested critical sections, so that global interrupts can be kept disabled
|
||||
* for as long as necessary to complete a critical application code section.
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_interrupt_module_overview_softints Software Interrupts
|
||||
* For some applications, it may be desirable to raise a module or core
|
||||
* interrupt via software. For this reason, a set of APIs to set an interrupt or
|
||||
* exception as pending are provided to the user application.
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_special_considerations Special Considerations
|
||||
*
|
||||
* Interrupts from peripherals in the SAM devices are on a per-module basis;
|
||||
* an interrupt raised from any source within a module will cause a single,
|
||||
* module-common handler to execute. It is the user application or driver's
|
||||
* responsibility to de-multiplex the module-common interrupt to determine the
|
||||
* exact interrupt cause.
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_extra_info Extra Information
|
||||
*
|
||||
* For extra information, see \ref asfdoc_sam0_system_interrupt_extra. This includes:
|
||||
* - \ref asfdoc_sam0_system_interrupt_extra_acronyms
|
||||
* - \ref asfdoc_sam0_system_interrupt_extra_dependencies
|
||||
* - \ref asfdoc_sam0_system_interrupt_extra_errata
|
||||
* - \ref asfdoc_sam0_system_interrupt_extra_history
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_examples Examples
|
||||
*
|
||||
* For a list of examples related to this driver, see
|
||||
* \ref asfdoc_sam0_system_interrupt_exqsg.
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_api_overview API Overview
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include <compiler.h>
|
||||
#include <core_cm0plus.h>
|
||||
#include "system_interrupt_features.h"
|
||||
|
||||
/**
|
||||
* \brief Table of possible system interrupt/exception vector priorities.
|
||||
*
|
||||
* Table of all possible interrupt and exception vector priorities within the
|
||||
* device.
|
||||
*/
|
||||
enum system_interrupt_priority_level {
|
||||
/** Priority level 0, the highest possible interrupt priority */
|
||||
SYSTEM_INTERRUPT_PRIORITY_LEVEL_0 = 0,
|
||||
/** Priority level 1 */
|
||||
SYSTEM_INTERRUPT_PRIORITY_LEVEL_1 = 1,
|
||||
/** Priority level 2 */
|
||||
SYSTEM_INTERRUPT_PRIORITY_LEVEL_2 = 2,
|
||||
/** Priority level 3, the lowest possible interrupt priority */
|
||||
SYSTEM_INTERRUPT_PRIORITY_LEVEL_3 = 3,
|
||||
};
|
||||
|
||||
/**
|
||||
* \name Critical Section Management
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Enters a critical section.
|
||||
*
|
||||
* Disables global interrupts. To support nested critical sections, an internal
|
||||
* count of the critical section nesting will be kept, so that global interrupts
|
||||
* are only re-enabled upon leaving the outermost nested critical section.
|
||||
*
|
||||
*/
|
||||
static inline void system_interrupt_enter_critical_section(void)
|
||||
{
|
||||
cpu_irq_enter_critical();
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Leaves a critical section.
|
||||
*
|
||||
* Enables global interrupts. To support nested critical sections, an internal
|
||||
* count of the critical section nesting will be kept, so that global interrupts
|
||||
* are only re-enabled upon leaving the outermost nested critical section.
|
||||
*
|
||||
*/
|
||||
static inline void system_interrupt_leave_critical_section(void)
|
||||
{
|
||||
cpu_irq_leave_critical();
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \name Interrupt Enabling/Disabling
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Check if global interrupts are enabled.
|
||||
*
|
||||
* Checks if global interrupts are currently enabled.
|
||||
*
|
||||
* \returns A boolean that identifies if the global interrupts are enabled or not.
|
||||
*
|
||||
* \retval true Global interrupts are currently enabled
|
||||
* \retval false Global interrupts are currently disabled
|
||||
*
|
||||
*/
|
||||
static inline bool system_interrupt_is_global_enabled(void)
|
||||
{
|
||||
return cpu_irq_is_enabled();
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Enables global interrupts.
|
||||
*
|
||||
* Enables global interrupts in the device to fire any enabled interrupt handlers.
|
||||
*/
|
||||
static inline void system_interrupt_enable_global(void)
|
||||
{
|
||||
cpu_irq_enable();
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disables global interrupts.
|
||||
*
|
||||
* Disabled global interrupts in the device, preventing any enabled interrupt
|
||||
* handlers from executing.
|
||||
*/
|
||||
static inline void system_interrupt_disable_global(void)
|
||||
{
|
||||
cpu_irq_disable();
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Checks if an interrupt vector is enabled or not.
|
||||
*
|
||||
* Checks if a specific interrupt vector is currently enabled.
|
||||
*
|
||||
* \param[in] vector Interrupt vector number to check
|
||||
*
|
||||
* \returns A variable identifying if the requested interrupt vector is enabled.
|
||||
*
|
||||
* \retval true Specified interrupt vector is currently enabled
|
||||
* \retval false Specified interrupt vector is currently disabled
|
||||
*
|
||||
*/
|
||||
static inline bool system_interrupt_is_enabled(
|
||||
const enum system_interrupt_vector vector)
|
||||
{
|
||||
return (bool)((NVIC->ISER[0] >> (uint32_t)vector) & 0x00000001);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Enable interrupt vector.
|
||||
*
|
||||
* Enables execution of the software handler for the requested interrupt vector.
|
||||
*
|
||||
* \param[in] vector Interrupt vector to enable
|
||||
*/
|
||||
static inline void system_interrupt_enable(
|
||||
const enum system_interrupt_vector vector)
|
||||
{
|
||||
NVIC->ISER[0] = (uint32_t)(1 << ((uint32_t)vector & 0x0000001f));
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disable interrupt vector.
|
||||
*
|
||||
* Disables execution of the software handler for the requested interrupt vector.
|
||||
*
|
||||
* \param[in] vector Interrupt vector to disable
|
||||
*/
|
||||
static inline void system_interrupt_disable(
|
||||
const enum system_interrupt_vector vector)
|
||||
{
|
||||
NVIC->ICER[0] = (uint32_t)(1 << ((uint32_t)vector & 0x0000001f));
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \name Interrupt State Management
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Get active interrupt (if any).
|
||||
*
|
||||
* Return the vector number for the current executing software handler, if any.
|
||||
*
|
||||
* \return Interrupt number that is currently executing.
|
||||
*/
|
||||
static inline enum system_interrupt_vector system_interrupt_get_active(void)
|
||||
{
|
||||
uint32_t IPSR = __get_IPSR();
|
||||
/* The IPSR returns the Exception number, which with an offset 16 to IRQ number. */
|
||||
return (enum system_interrupt_vector)((IPSR & _SYSTEM_INTERRUPT_IPSR_MASK) - 16);
|
||||
}
|
||||
|
||||
bool system_interrupt_is_pending(
|
||||
const enum system_interrupt_vector vector);
|
||||
|
||||
enum status_code system_interrupt_set_pending(
|
||||
const enum system_interrupt_vector vector);
|
||||
|
||||
enum status_code system_interrupt_clear_pending(
|
||||
const enum system_interrupt_vector vector);
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \name Interrupt Priority Management
|
||||
* @{
|
||||
*/
|
||||
|
||||
enum status_code system_interrupt_set_priority(
|
||||
const enum system_interrupt_vector vector,
|
||||
const enum system_interrupt_priority_level priority_level);
|
||||
|
||||
enum system_interrupt_priority_level system_interrupt_get_priority(
|
||||
const enum system_interrupt_vector vector);
|
||||
|
||||
/** @} */
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_system_interrupt_extra Extra Information for SYSTEM INTERRUPT Driver
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_extra_acronyms Acronyms
|
||||
* The table below presents the acronyms used in this module:
|
||||
*
|
||||
* <table>
|
||||
* <tr>
|
||||
* <th>Acronym</th>
|
||||
* <th>Description</th>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>ISR</td>
|
||||
* <td>Interrupt Service Routine</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>NMI</td>
|
||||
* <td>Non-maskable Interrupt</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>SERCOM</td>
|
||||
* <td>Serial Communication Interface</td>
|
||||
* </tr>
|
||||
* </table>
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_extra_dependencies Dependencies
|
||||
* This driver has the following dependencies:
|
||||
*
|
||||
* - None
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_extra_errata Errata
|
||||
* There are no errata related to this driver.
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_extra_history Module History
|
||||
* An overview of the module history is presented in the table below, with
|
||||
* details on the enhancements and fixes made to the module since its first
|
||||
* release. The current version of this corresponds to the newest version in
|
||||
* the table.
|
||||
*
|
||||
* <table>
|
||||
* <tr>
|
||||
* <th>Changelog</th>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Initial Release</td>
|
||||
* </tr>
|
||||
* </table>
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_system_interrupt_exqsg Examples for SYSTEM INTERRUPT Driver
|
||||
*
|
||||
* This is a list of the available Quick Start guides (QSGs) and example
|
||||
* applications for \ref asfdoc_sam0_system_interrupt_group. QSGs are simple examples with
|
||||
* step-by-step instructions to configure and use this driver in a selection of
|
||||
* use cases. Note that a QSG can be compiled as a standalone application or be
|
||||
* added to the user application.
|
||||
*
|
||||
* - \subpage asfdoc_sam0_system_interrupt_critsec_use_case
|
||||
* - \subpage asfdoc_sam0_system_interrupt_enablemodint_use_case
|
||||
*
|
||||
* \page asfdoc_sam0_system_interrupt_document_revision_history Document Revision History
|
||||
*
|
||||
* <table>
|
||||
* <tr>
|
||||
* <th>Doc. Rev.</th>
|
||||
* <th>Date</th>
|
||||
* <th>Comments</th>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42122E</td>
|
||||
* <td>12/2015</td>
|
||||
* <td>Added support for SAM L21/L22, SAM DA1, SAM D09, and SAM C20/C21</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42122D</td>
|
||||
* <td>12/2014</td>
|
||||
* <td>Added support for SAM R21 and SAM D10/D11</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42122C</td>
|
||||
* <td>01/2014</td>
|
||||
* <td>Added support for SAM D21</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42122B</td>
|
||||
* <td>06/2013</td>
|
||||
* <td>Corrected documentation typos</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42122A</td>
|
||||
* <td>06/2013</td>
|
||||
* <td>Initial release</td>
|
||||
* </tr>
|
||||
* </table>
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // #ifndef SYSTEM_INTERRUPT_H_INCLUDED
|
||||
|
||||
@ -1,185 +1,185 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM D21 System Interrupt Driver
|
||||
*
|
||||
* Copyright (c) 2013-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
#ifndef SYSTEM_INTERRUPT_FEATURES_H_INCLUDED
|
||||
#define SYSTEM_INTERRUPT_FEATURES_H_INCLUDED
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
|
||||
/* Generates a interrupt vector table enum list entry for a given module type
|
||||
and index (e.g. "SYSTEM_INTERRUPT_MODULE_TC0 = TC0_IRQn,"). */
|
||||
# define _MODULE_IRQn(n, module) \
|
||||
SYSTEM_INTERRUPT_MODULE_##module##n = module##n##_IRQn,
|
||||
|
||||
/* Generates interrupt vector table enum list entries for all instances of a
|
||||
given module type on the selected device. */
|
||||
# define _SYSTEM_INTERRUPT_MODULES(name) \
|
||||
MREPEAT(name##_INST_NUM, _MODULE_IRQn, name)
|
||||
|
||||
# define _SYSTEM_INTERRUPT_IPSR_MASK 0x0000003f
|
||||
# define _SYSTEM_INTERRUPT_PRIORITY_MASK 0x00000003
|
||||
|
||||
# define _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START 0
|
||||
|
||||
# define _SYSTEM_INTERRUPT_SYSTICK_PRI_POS 30
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \addtogroup asfdoc_sam0_system_interrupt_group
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Table of possible system interrupt/exception vector numbers.
|
||||
*
|
||||
* Table of all possible interrupt and exception vector indexes within the
|
||||
* SAM D21 device. Check peripherals configuration in SAM D21 datasheet for
|
||||
* available vector index for specific device.
|
||||
*
|
||||
*/
|
||||
#if defined(__DOXYGEN__)
|
||||
/** \note The actual enumeration name is "system_interrupt_vector". */
|
||||
enum system_interrupt_vector_samd21 {
|
||||
#else
|
||||
enum system_interrupt_vector {
|
||||
#endif
|
||||
/** Interrupt vector index for a NMI interrupt */
|
||||
SYSTEM_INTERRUPT_NON_MASKABLE = NonMaskableInt_IRQn,
|
||||
/** Interrupt vector index for a Hard Fault memory access exception */
|
||||
SYSTEM_INTERRUPT_HARD_FAULT = HardFault_IRQn,
|
||||
/** Interrupt vector index for a Supervisor Call exception */
|
||||
SYSTEM_INTERRUPT_SV_CALL = SVCall_IRQn,
|
||||
/** Interrupt vector index for a Pending Supervisor interrupt */
|
||||
SYSTEM_INTERRUPT_PENDING_SV = PendSV_IRQn,
|
||||
/** Interrupt vector index for a System Tick interrupt */
|
||||
SYSTEM_INTERRUPT_SYSTICK = SysTick_IRQn,
|
||||
|
||||
/** Interrupt vector index for a Power Manager peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_PM = PM_IRQn,
|
||||
/** Interrupt vector index for a System Control peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_SYSCTRL = SYSCTRL_IRQn,
|
||||
/** Interrupt vector index for a Watch Dog peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_WDT = WDT_IRQn,
|
||||
/** Interrupt vector index for a Real Time Clock peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_RTC = RTC_IRQn,
|
||||
/** Interrupt vector index for an External Interrupt peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_EIC = EIC_IRQn,
|
||||
/** Interrupt vector index for a Non Volatile Memory Controller interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_NVMCTRL = NVMCTRL_IRQn,
|
||||
/** Interrupt vector index for a Direct Memory Access interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_DMA = DMAC_IRQn,
|
||||
#if defined(__DOXYGEN__) || defined(ID_USB)
|
||||
/** Interrupt vector index for a Universal Serial Bus interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_USB = USB_IRQn,
|
||||
#endif
|
||||
/** Interrupt vector index for an Event System interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_EVSYS = EVSYS_IRQn,
|
||||
#if defined(__DOXYGEN__)
|
||||
/** Interrupt vector index for a SERCOM peripheral interrupt.
|
||||
*
|
||||
* Each specific device may contain several SERCOM peripherals; each module
|
||||
* instance will have its own entry in the table, with the instance number
|
||||
* substituted for "n" in the entry name (e.g.
|
||||
* \c SYSTEM_INTERRUPT_MODULE_SERCOM0).
|
||||
*/
|
||||
SYSTEM_INTERRUPT_MODULE_SERCOMn = SERCOMn_IRQn,
|
||||
|
||||
/** Interrupt vector index for a Timer/Counter Control peripheral interrupt.
|
||||
*
|
||||
* Each specific device may contain several TCC peripherals; each module
|
||||
* instance will have its own entry in the table, with the instance number
|
||||
* substituted for "n" in the entry name (e.g.
|
||||
* \c SYSTEM_INTERRUPT_MODULE_TCC0).
|
||||
*/
|
||||
SYSTEM_INTERRUPT_MODULE_TCCn = TCCn_IRQn,
|
||||
|
||||
/** Interrupt vector index for a Timer/Counter peripheral interrupt.
|
||||
*
|
||||
* Each specific device may contain several TC peripherals; each module
|
||||
* instance will have its own entry in the table, with the instance number
|
||||
* substituted for "n" in the entry name (e.g.
|
||||
* \c SYSTEM_INTERRUPT_MODULE_TC3).
|
||||
*/
|
||||
SYSTEM_INTERRUPT_MODULE_TCn = TCn_IRQn,
|
||||
#else
|
||||
_SYSTEM_INTERRUPT_MODULES(SERCOM)
|
||||
|
||||
_SYSTEM_INTERRUPT_MODULES(TCC)
|
||||
|
||||
SYSTEM_INTERRUPT_MODULE_TC3 = TC3_IRQn,
|
||||
SYSTEM_INTERRUPT_MODULE_TC4 = TC4_IRQn,
|
||||
SYSTEM_INTERRUPT_MODULE_TC5 = TC5_IRQn,
|
||||
# if defined(ID_TC6)
|
||||
SYSTEM_INTERRUPT_MODULE_TC6 = TC6_IRQn,
|
||||
# endif
|
||||
# if defined(ID_TC7)
|
||||
SYSTEM_INTERRUPT_MODULE_TC7 = TC7_IRQn,
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#if defined(__DOXYGEN__) || defined(ID_ADC)
|
||||
/** Interrupt vector index for an Analog-to-Digital peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_ADC = ADC_IRQn,
|
||||
#endif
|
||||
|
||||
#if defined(__DOXYGEN__) || defined(ID_AC)
|
||||
/** Interrupt vector index for an Analog Comparator peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_AC = AC_IRQn,
|
||||
#endif
|
||||
|
||||
#if defined(__DOXYGEN__) || defined(ID_DAC)
|
||||
/** Interrupt vector index for a Digital-to-Analog peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_DAC = DAC_IRQn,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || defined(ID_PTC)
|
||||
/** Interrupt vector index for a Peripheral Touch Controller peripheral
|
||||
* interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_PTC = PTC_IRQn,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || defined(ID_I2S)
|
||||
/** Interrupt vector index for a Inter-IC Sound Interface peripheral
|
||||
* interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_I2S = I2S_IRQn,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || defined(ID_AC1)
|
||||
/** Interrupt vector index for an Analog Comparator 1 peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_AC1 = AC1_IRQn,
|
||||
#endif
|
||||
};
|
||||
|
||||
/** @} */
|
||||
|
||||
#endif
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM D21 System Interrupt Driver
|
||||
*
|
||||
* Copyright (c) 2013-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
#ifndef SYSTEM_INTERRUPT_FEATURES_H_INCLUDED
|
||||
#define SYSTEM_INTERRUPT_FEATURES_H_INCLUDED
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
|
||||
/* Generates a interrupt vector table enum list entry for a given module type
|
||||
and index (e.g. "SYSTEM_INTERRUPT_MODULE_TC0 = TC0_IRQn,"). */
|
||||
# define _MODULE_IRQn(n, module) \
|
||||
SYSTEM_INTERRUPT_MODULE_##module##n = module##n##_IRQn,
|
||||
|
||||
/* Generates interrupt vector table enum list entries for all instances of a
|
||||
given module type on the selected device. */
|
||||
# define _SYSTEM_INTERRUPT_MODULES(name) \
|
||||
MREPEAT(name##_INST_NUM, _MODULE_IRQn, name)
|
||||
|
||||
# define _SYSTEM_INTERRUPT_IPSR_MASK 0x0000003f
|
||||
# define _SYSTEM_INTERRUPT_PRIORITY_MASK 0x00000003
|
||||
|
||||
# define _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START 0
|
||||
|
||||
# define _SYSTEM_INTERRUPT_SYSTICK_PRI_POS 30
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \addtogroup asfdoc_sam0_system_interrupt_group
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Table of possible system interrupt/exception vector numbers.
|
||||
*
|
||||
* Table of all possible interrupt and exception vector indexes within the
|
||||
* SAM D21 device. Check peripherals configuration in SAM D21 datasheet for
|
||||
* available vector index for specific device.
|
||||
*
|
||||
*/
|
||||
#if defined(__DOXYGEN__)
|
||||
/** \note The actual enumeration name is "system_interrupt_vector". */
|
||||
enum system_interrupt_vector_samd21 {
|
||||
#else
|
||||
enum system_interrupt_vector {
|
||||
#endif
|
||||
/** Interrupt vector index for a NMI interrupt */
|
||||
SYSTEM_INTERRUPT_NON_MASKABLE = NonMaskableInt_IRQn,
|
||||
/** Interrupt vector index for a Hard Fault memory access exception */
|
||||
SYSTEM_INTERRUPT_HARD_FAULT = HardFault_IRQn,
|
||||
/** Interrupt vector index for a Supervisor Call exception */
|
||||
SYSTEM_INTERRUPT_SV_CALL = SVCall_IRQn,
|
||||
/** Interrupt vector index for a Pending Supervisor interrupt */
|
||||
SYSTEM_INTERRUPT_PENDING_SV = PendSV_IRQn,
|
||||
/** Interrupt vector index for a System Tick interrupt */
|
||||
SYSTEM_INTERRUPT_SYSTICK = SysTick_IRQn,
|
||||
|
||||
/** Interrupt vector index for a Power Manager peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_PM = PM_IRQn,
|
||||
/** Interrupt vector index for a System Control peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_SYSCTRL = SYSCTRL_IRQn,
|
||||
/** Interrupt vector index for a Watch Dog peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_WDT = WDT_IRQn,
|
||||
/** Interrupt vector index for a Real Time Clock peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_RTC = RTC_IRQn,
|
||||
/** Interrupt vector index for an External Interrupt peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_EIC = EIC_IRQn,
|
||||
/** Interrupt vector index for a Non Volatile Memory Controller interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_NVMCTRL = NVMCTRL_IRQn,
|
||||
/** Interrupt vector index for a Direct Memory Access interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_DMA = DMAC_IRQn,
|
||||
#if defined(__DOXYGEN__) || defined(ID_USB)
|
||||
/** Interrupt vector index for a Universal Serial Bus interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_USB = USB_IRQn,
|
||||
#endif
|
||||
/** Interrupt vector index for an Event System interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_EVSYS = EVSYS_IRQn,
|
||||
#if defined(__DOXYGEN__)
|
||||
/** Interrupt vector index for a SERCOM peripheral interrupt.
|
||||
*
|
||||
* Each specific device may contain several SERCOM peripherals; each module
|
||||
* instance will have its own entry in the table, with the instance number
|
||||
* substituted for "n" in the entry name (e.g.
|
||||
* \c SYSTEM_INTERRUPT_MODULE_SERCOM0).
|
||||
*/
|
||||
SYSTEM_INTERRUPT_MODULE_SERCOMn = SERCOMn_IRQn,
|
||||
|
||||
/** Interrupt vector index for a Timer/Counter Control peripheral interrupt.
|
||||
*
|
||||
* Each specific device may contain several TCC peripherals; each module
|
||||
* instance will have its own entry in the table, with the instance number
|
||||
* substituted for "n" in the entry name (e.g.
|
||||
* \c SYSTEM_INTERRUPT_MODULE_TCC0).
|
||||
*/
|
||||
SYSTEM_INTERRUPT_MODULE_TCCn = TCCn_IRQn,
|
||||
|
||||
/** Interrupt vector index for a Timer/Counter peripheral interrupt.
|
||||
*
|
||||
* Each specific device may contain several TC peripherals; each module
|
||||
* instance will have its own entry in the table, with the instance number
|
||||
* substituted for "n" in the entry name (e.g.
|
||||
* \c SYSTEM_INTERRUPT_MODULE_TC3).
|
||||
*/
|
||||
SYSTEM_INTERRUPT_MODULE_TCn = TCn_IRQn,
|
||||
#else
|
||||
_SYSTEM_INTERRUPT_MODULES(SERCOM)
|
||||
|
||||
_SYSTEM_INTERRUPT_MODULES(TCC)
|
||||
|
||||
SYSTEM_INTERRUPT_MODULE_TC3 = TC3_IRQn,
|
||||
SYSTEM_INTERRUPT_MODULE_TC4 = TC4_IRQn,
|
||||
SYSTEM_INTERRUPT_MODULE_TC5 = TC5_IRQn,
|
||||
# if defined(ID_TC6)
|
||||
SYSTEM_INTERRUPT_MODULE_TC6 = TC6_IRQn,
|
||||
# endif
|
||||
# if defined(ID_TC7)
|
||||
SYSTEM_INTERRUPT_MODULE_TC7 = TC7_IRQn,
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#if defined(__DOXYGEN__) || defined(ID_ADC)
|
||||
/** Interrupt vector index for an Analog-to-Digital peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_ADC = ADC_IRQn,
|
||||
#endif
|
||||
|
||||
#if defined(__DOXYGEN__) || defined(ID_AC)
|
||||
/** Interrupt vector index for an Analog Comparator peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_AC = AC_IRQn,
|
||||
#endif
|
||||
|
||||
#if defined(__DOXYGEN__) || defined(ID_DAC)
|
||||
/** Interrupt vector index for a Digital-to-Analog peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_DAC = DAC_IRQn,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || defined(ID_PTC)
|
||||
/** Interrupt vector index for a Peripheral Touch Controller peripheral
|
||||
* interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_PTC = PTC_IRQn,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || defined(ID_I2S)
|
||||
/** Interrupt vector index for a Inter-IC Sound Interface peripheral
|
||||
* interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_I2S = I2S_IRQn,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || defined(ID_AC1)
|
||||
/** Interrupt vector index for an Analog Comparator 1 peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_AC1 = AC1_IRQn,
|
||||
#endif
|
||||
};
|
||||
|
||||
/** @} */
|
||||
|
||||
#endif
|
||||
|
||||
@ -1,301 +1,301 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Pin Multiplexer Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#include <pinmux.h>
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Writes out a given configuration of a Port pin configuration to the
|
||||
* hardware module.
|
||||
*
|
||||
* \note If the pin direction is set as an output, the pull-up/pull-down input
|
||||
* configuration setting is ignored.
|
||||
*
|
||||
* \param[in] port Base of the PORT module to configure
|
||||
* \param[in] pin_mask Mask of the port pin to configure
|
||||
* \param[in] config Configuration settings for the pin
|
||||
*/
|
||||
static void _system_pinmux_config(
|
||||
PortGroup *const port,
|
||||
const uint32_t pin_mask,
|
||||
const struct system_pinmux_config *const config)
|
||||
{
|
||||
Assert(port);
|
||||
Assert(config);
|
||||
|
||||
/* Track the configuration bits into a temporary variable before writing */
|
||||
uint32_t pin_cfg = 0;
|
||||
|
||||
/* Enabled powersave mode, don't create configuration */
|
||||
if (!config->powersave) {
|
||||
/* Enable the pin peripheral MUX flag if non-GPIO selected (pinmux will
|
||||
* be written later) and store the new MUX mask */
|
||||
if (config->mux_position != SYSTEM_PINMUX_GPIO) {
|
||||
pin_cfg |= PORT_WRCONFIG_PMUXEN;
|
||||
pin_cfg |= (config->mux_position << PORT_WRCONFIG_PMUX_Pos);
|
||||
}
|
||||
|
||||
/* Check if the user has requested that the input buffer be enabled */
|
||||
if ((config->direction == SYSTEM_PINMUX_PIN_DIR_INPUT) ||
|
||||
(config->direction == SYSTEM_PINMUX_PIN_DIR_OUTPUT_WITH_READBACK)) {
|
||||
/* Enable input buffer flag */
|
||||
pin_cfg |= PORT_WRCONFIG_INEN;
|
||||
|
||||
/* Enable pull-up/pull-down control flag if requested */
|
||||
if (config->input_pull != SYSTEM_PINMUX_PIN_PULL_NONE) {
|
||||
pin_cfg |= PORT_WRCONFIG_PULLEN;
|
||||
}
|
||||
|
||||
/* Clear the port DIR bits to disable the output buffer */
|
||||
port->DIRCLR.reg = pin_mask;
|
||||
}
|
||||
|
||||
/* Check if the user has requested that the output buffer be enabled */
|
||||
if ((config->direction == SYSTEM_PINMUX_PIN_DIR_OUTPUT) ||
|
||||
(config->direction == SYSTEM_PINMUX_PIN_DIR_OUTPUT_WITH_READBACK)) {
|
||||
/* Cannot use a pull-up if the output driver is enabled,
|
||||
* if requested the input buffer can only sample the current
|
||||
* output state */
|
||||
pin_cfg &= ~PORT_WRCONFIG_PULLEN;
|
||||
}
|
||||
} else {
|
||||
port->DIRCLR.reg = pin_mask;
|
||||
}
|
||||
|
||||
/* The Write Configuration register (WRCONFIG) requires the
|
||||
* pins to to grouped into two 16-bit half-words - split them out here */
|
||||
uint32_t lower_pin_mask = (pin_mask & 0xFFFF);
|
||||
uint32_t upper_pin_mask = (pin_mask >> 16);
|
||||
|
||||
/* Configure the lower 16-bits of the port to the desired configuration,
|
||||
* including the pin peripheral multiplexer just in case it is enabled */
|
||||
port->WRCONFIG.reg
|
||||
= (lower_pin_mask << PORT_WRCONFIG_PINMASK_Pos) |
|
||||
pin_cfg | PORT_WRCONFIG_WRPMUX | PORT_WRCONFIG_WRPINCFG;
|
||||
|
||||
/* Configure the upper 16-bits of the port to the desired configuration,
|
||||
* including the pin peripheral multiplexer just in case it is enabled */
|
||||
port->WRCONFIG.reg
|
||||
= (upper_pin_mask << PORT_WRCONFIG_PINMASK_Pos) |
|
||||
pin_cfg | PORT_WRCONFIG_WRPMUX | PORT_WRCONFIG_WRPINCFG |
|
||||
PORT_WRCONFIG_HWSEL;
|
||||
|
||||
if(!config->powersave) {
|
||||
/* Set the pull-up state once the port pins are configured if one was
|
||||
* requested and it does not violate the valid set of port
|
||||
* configurations */
|
||||
if (pin_cfg & PORT_WRCONFIG_PULLEN) {
|
||||
/* Set the OUT register bits to enable the pull-up if requested,
|
||||
* clear to enable pull-down */
|
||||
if (config->input_pull == SYSTEM_PINMUX_PIN_PULL_UP) {
|
||||
port->OUTSET.reg = pin_mask;
|
||||
} else {
|
||||
port->OUTCLR.reg = pin_mask;
|
||||
}
|
||||
}
|
||||
|
||||
/* Check if the user has requested that the output buffer be enabled */
|
||||
if ((config->direction == SYSTEM_PINMUX_PIN_DIR_OUTPUT) ||
|
||||
(config->direction == SYSTEM_PINMUX_PIN_DIR_OUTPUT_WITH_READBACK)) {
|
||||
/* Set the port DIR bits to enable the output buffer */
|
||||
port->DIRSET.reg = pin_mask;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Writes a Port pin configuration to the hardware module.
|
||||
*
|
||||
* Writes out a given configuration of a Port pin configuration to the hardware
|
||||
* module.
|
||||
*
|
||||
* \note If the pin direction is set as an output, the pull-up/pull-down input
|
||||
* configuration setting is ignored.
|
||||
*
|
||||
* \param[in] gpio_pin Index of the GPIO pin to configure
|
||||
* \param[in] config Configuration settings for the pin
|
||||
*/
|
||||
void system_pinmux_pin_set_config(
|
||||
const uint8_t gpio_pin,
|
||||
const struct system_pinmux_config *const config)
|
||||
{
|
||||
PortGroup *const port = system_pinmux_get_group_from_gpio_pin(gpio_pin);
|
||||
uint32_t pin_mask = (1UL << (gpio_pin % 32));
|
||||
|
||||
_system_pinmux_config(port, pin_mask, config);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Writes a Port pin group configuration to the hardware module.
|
||||
*
|
||||
* Writes out a given configuration of a Port pin group configuration to the
|
||||
* hardware module.
|
||||
*
|
||||
* \note If the pin direction is set as an output, the pull-up/pull-down input
|
||||
* configuration setting is ignored.
|
||||
*
|
||||
* \param[in] port Base of the PORT module to configure
|
||||
* \param[in] mask Mask of the port pin(s) to configure
|
||||
* \param[in] config Configuration settings for the pin
|
||||
*/
|
||||
void system_pinmux_group_set_config(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const struct system_pinmux_config *const config)
|
||||
{
|
||||
Assert(port);
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
if (mask & (1UL << i)) {
|
||||
_system_pinmux_config(port, (1UL << i), config);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Configures the input sampling mode for a group of pins.
|
||||
*
|
||||
* Configures the input sampling mode for a group of pins, to
|
||||
* control when the physical I/O pin value is sampled and
|
||||
* stored inside the microcontroller.
|
||||
*
|
||||
* \param[in] port Base of the PORT module to configure
|
||||
* \param[in] mask Mask of the port pin(s) to configure
|
||||
* \param[in] mode New pin sampling mode to configure
|
||||
*/
|
||||
void system_pinmux_group_set_input_sample_mode(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const enum system_pinmux_pin_sample mode)
|
||||
{
|
||||
Assert(port);
|
||||
|
||||
if (mode == SYSTEM_PINMUX_PIN_SAMPLE_ONDEMAND) {
|
||||
port->CTRL.reg |= mask;
|
||||
} else {
|
||||
port->CTRL.reg &= ~mask;
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef FEATURE_SYSTEM_PINMUX_SLEWRATE_LIMITER
|
||||
/**
|
||||
* \brief Configures the output slew rate mode for a group of pins.
|
||||
*
|
||||
* Configures the output slew rate mode for a group of pins, to
|
||||
* control the speed at which the physical output pin can react to
|
||||
* logical changes of the I/O pin value.
|
||||
*
|
||||
* \param[in] port Base of the PORT module to configure
|
||||
* \param[in] mask Mask of the port pin(s) to configure
|
||||
* \param[in] mode New pin slew rate mode to configure
|
||||
*/
|
||||
void system_pinmux_group_set_output_slew_rate(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const enum system_pinmux_pin_slew_rate mode)
|
||||
{
|
||||
Assert(port);
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
if (mask & (1UL << i)) {
|
||||
if (mode == SYSTEM_PINMUX_PIN_SLEW_RATE_LIMITED) {
|
||||
port->PINCFG[i].reg |= PORT_PINCFG_SLEWLIM;
|
||||
} else {
|
||||
port->PINCFG[i].reg &= ~PORT_PINCFG_SLEWLIM;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef FEATURE_SYSTEM_PINMUX_DRIVE_STRENGTH
|
||||
/**
|
||||
* \brief Configures the output driver strength mode for a group of pins.
|
||||
*
|
||||
* Configures the output drive strength for a group of pins, to
|
||||
* control the amount of current the pad is able to sink/source.
|
||||
*
|
||||
* \param[in] port Base of the PORT module to configure
|
||||
* \param[in] mask Mask of the port pin(s) to configure
|
||||
* \param[in] mode New output driver strength mode to configure
|
||||
*/
|
||||
void system_pinmux_group_set_output_strength(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const enum system_pinmux_pin_strength mode)
|
||||
{
|
||||
Assert(port);
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
if (mask & (1UL << i)) {
|
||||
if (mode == SYSTEM_PINMUX_PIN_STRENGTH_HIGH) {
|
||||
port->PINCFG[i].reg |= PORT_PINCFG_DRVSTR;
|
||||
} else {
|
||||
port->PINCFG[i].reg &= ~PORT_PINCFG_DRVSTR;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef FEATURE_SYSTEM_PINMUX_OPEN_DRAIN
|
||||
/**
|
||||
* \brief Configures the output driver mode for a group of pins.
|
||||
*
|
||||
* Configures the output driver mode for a group of pins, to
|
||||
* control the pad behavior.
|
||||
*
|
||||
* \param[in] port Base of the PORT module to configure
|
||||
* \param[in] mask Mask of the port pin(s) to configure
|
||||
* \param[in] mode New pad output driver mode to configure
|
||||
*/
|
||||
void system_pinmux_group_set_output_drive(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const enum system_pinmux_pin_drive mode)
|
||||
{
|
||||
Assert(port);
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
if (mask & (1UL << i)) {
|
||||
if (mode == SYSTEM_PINMUX_PIN_DRIVE_OPEN_DRAIN) {
|
||||
port->PINCFG[i].reg |= PORT_PINCFG_ODRAIN;
|
||||
} else {
|
||||
port->PINCFG[i].reg &= ~PORT_PINCFG_ODRAIN;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Pin Multiplexer Driver
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#include <pinmux.h>
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Writes out a given configuration of a Port pin configuration to the
|
||||
* hardware module.
|
||||
*
|
||||
* \note If the pin direction is set as an output, the pull-up/pull-down input
|
||||
* configuration setting is ignored.
|
||||
*
|
||||
* \param[in] port Base of the PORT module to configure
|
||||
* \param[in] pin_mask Mask of the port pin to configure
|
||||
* \param[in] config Configuration settings for the pin
|
||||
*/
|
||||
static void _system_pinmux_config(
|
||||
PortGroup *const port,
|
||||
const uint32_t pin_mask,
|
||||
const struct system_pinmux_config *const config)
|
||||
{
|
||||
Assert(port);
|
||||
Assert(config);
|
||||
|
||||
/* Track the configuration bits into a temporary variable before writing */
|
||||
uint32_t pin_cfg = 0;
|
||||
|
||||
/* Enabled powersave mode, don't create configuration */
|
||||
if (!config->powersave) {
|
||||
/* Enable the pin peripheral MUX flag if non-GPIO selected (pinmux will
|
||||
* be written later) and store the new MUX mask */
|
||||
if (config->mux_position != SYSTEM_PINMUX_GPIO) {
|
||||
pin_cfg |= PORT_WRCONFIG_PMUXEN;
|
||||
pin_cfg |= (config->mux_position << PORT_WRCONFIG_PMUX_Pos);
|
||||
}
|
||||
|
||||
/* Check if the user has requested that the input buffer be enabled */
|
||||
if ((config->direction == SYSTEM_PINMUX_PIN_DIR_INPUT) ||
|
||||
(config->direction == SYSTEM_PINMUX_PIN_DIR_OUTPUT_WITH_READBACK)) {
|
||||
/* Enable input buffer flag */
|
||||
pin_cfg |= PORT_WRCONFIG_INEN;
|
||||
|
||||
/* Enable pull-up/pull-down control flag if requested */
|
||||
if (config->input_pull != SYSTEM_PINMUX_PIN_PULL_NONE) {
|
||||
pin_cfg |= PORT_WRCONFIG_PULLEN;
|
||||
}
|
||||
|
||||
/* Clear the port DIR bits to disable the output buffer */
|
||||
port->DIRCLR.reg = pin_mask;
|
||||
}
|
||||
|
||||
/* Check if the user has requested that the output buffer be enabled */
|
||||
if ((config->direction == SYSTEM_PINMUX_PIN_DIR_OUTPUT) ||
|
||||
(config->direction == SYSTEM_PINMUX_PIN_DIR_OUTPUT_WITH_READBACK)) {
|
||||
/* Cannot use a pull-up if the output driver is enabled,
|
||||
* if requested the input buffer can only sample the current
|
||||
* output state */
|
||||
pin_cfg &= ~PORT_WRCONFIG_PULLEN;
|
||||
}
|
||||
} else {
|
||||
port->DIRCLR.reg = pin_mask;
|
||||
}
|
||||
|
||||
/* The Write Configuration register (WRCONFIG) requires the
|
||||
* pins to to grouped into two 16-bit half-words - split them out here */
|
||||
uint32_t lower_pin_mask = (pin_mask & 0xFFFF);
|
||||
uint32_t upper_pin_mask = (pin_mask >> 16);
|
||||
|
||||
/* Configure the lower 16-bits of the port to the desired configuration,
|
||||
* including the pin peripheral multiplexer just in case it is enabled */
|
||||
port->WRCONFIG.reg
|
||||
= (lower_pin_mask << PORT_WRCONFIG_PINMASK_Pos) |
|
||||
pin_cfg | PORT_WRCONFIG_WRPMUX | PORT_WRCONFIG_WRPINCFG;
|
||||
|
||||
/* Configure the upper 16-bits of the port to the desired configuration,
|
||||
* including the pin peripheral multiplexer just in case it is enabled */
|
||||
port->WRCONFIG.reg
|
||||
= (upper_pin_mask << PORT_WRCONFIG_PINMASK_Pos) |
|
||||
pin_cfg | PORT_WRCONFIG_WRPMUX | PORT_WRCONFIG_WRPINCFG |
|
||||
PORT_WRCONFIG_HWSEL;
|
||||
|
||||
if(!config->powersave) {
|
||||
/* Set the pull-up state once the port pins are configured if one was
|
||||
* requested and it does not violate the valid set of port
|
||||
* configurations */
|
||||
if (pin_cfg & PORT_WRCONFIG_PULLEN) {
|
||||
/* Set the OUT register bits to enable the pull-up if requested,
|
||||
* clear to enable pull-down */
|
||||
if (config->input_pull == SYSTEM_PINMUX_PIN_PULL_UP) {
|
||||
port->OUTSET.reg = pin_mask;
|
||||
} else {
|
||||
port->OUTCLR.reg = pin_mask;
|
||||
}
|
||||
}
|
||||
|
||||
/* Check if the user has requested that the output buffer be enabled */
|
||||
if ((config->direction == SYSTEM_PINMUX_PIN_DIR_OUTPUT) ||
|
||||
(config->direction == SYSTEM_PINMUX_PIN_DIR_OUTPUT_WITH_READBACK)) {
|
||||
/* Set the port DIR bits to enable the output buffer */
|
||||
port->DIRSET.reg = pin_mask;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Writes a Port pin configuration to the hardware module.
|
||||
*
|
||||
* Writes out a given configuration of a Port pin configuration to the hardware
|
||||
* module.
|
||||
*
|
||||
* \note If the pin direction is set as an output, the pull-up/pull-down input
|
||||
* configuration setting is ignored.
|
||||
*
|
||||
* \param[in] gpio_pin Index of the GPIO pin to configure
|
||||
* \param[in] config Configuration settings for the pin
|
||||
*/
|
||||
void system_pinmux_pin_set_config(
|
||||
const uint8_t gpio_pin,
|
||||
const struct system_pinmux_config *const config)
|
||||
{
|
||||
PortGroup *const port = system_pinmux_get_group_from_gpio_pin(gpio_pin);
|
||||
uint32_t pin_mask = (1UL << (gpio_pin % 32));
|
||||
|
||||
_system_pinmux_config(port, pin_mask, config);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Writes a Port pin group configuration to the hardware module.
|
||||
*
|
||||
* Writes out a given configuration of a Port pin group configuration to the
|
||||
* hardware module.
|
||||
*
|
||||
* \note If the pin direction is set as an output, the pull-up/pull-down input
|
||||
* configuration setting is ignored.
|
||||
*
|
||||
* \param[in] port Base of the PORT module to configure
|
||||
* \param[in] mask Mask of the port pin(s) to configure
|
||||
* \param[in] config Configuration settings for the pin
|
||||
*/
|
||||
void system_pinmux_group_set_config(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const struct system_pinmux_config *const config)
|
||||
{
|
||||
Assert(port);
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
if (mask & (1UL << i)) {
|
||||
_system_pinmux_config(port, (1UL << i), config);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Configures the input sampling mode for a group of pins.
|
||||
*
|
||||
* Configures the input sampling mode for a group of pins, to
|
||||
* control when the physical I/O pin value is sampled and
|
||||
* stored inside the microcontroller.
|
||||
*
|
||||
* \param[in] port Base of the PORT module to configure
|
||||
* \param[in] mask Mask of the port pin(s) to configure
|
||||
* \param[in] mode New pin sampling mode to configure
|
||||
*/
|
||||
void system_pinmux_group_set_input_sample_mode(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const enum system_pinmux_pin_sample mode)
|
||||
{
|
||||
Assert(port);
|
||||
|
||||
if (mode == SYSTEM_PINMUX_PIN_SAMPLE_ONDEMAND) {
|
||||
port->CTRL.reg |= mask;
|
||||
} else {
|
||||
port->CTRL.reg &= ~mask;
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef FEATURE_SYSTEM_PINMUX_SLEWRATE_LIMITER
|
||||
/**
|
||||
* \brief Configures the output slew rate mode for a group of pins.
|
||||
*
|
||||
* Configures the output slew rate mode for a group of pins, to
|
||||
* control the speed at which the physical output pin can react to
|
||||
* logical changes of the I/O pin value.
|
||||
*
|
||||
* \param[in] port Base of the PORT module to configure
|
||||
* \param[in] mask Mask of the port pin(s) to configure
|
||||
* \param[in] mode New pin slew rate mode to configure
|
||||
*/
|
||||
void system_pinmux_group_set_output_slew_rate(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const enum system_pinmux_pin_slew_rate mode)
|
||||
{
|
||||
Assert(port);
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
if (mask & (1UL << i)) {
|
||||
if (mode == SYSTEM_PINMUX_PIN_SLEW_RATE_LIMITED) {
|
||||
port->PINCFG[i].reg |= PORT_PINCFG_SLEWLIM;
|
||||
} else {
|
||||
port->PINCFG[i].reg &= ~PORT_PINCFG_SLEWLIM;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef FEATURE_SYSTEM_PINMUX_DRIVE_STRENGTH
|
||||
/**
|
||||
* \brief Configures the output driver strength mode for a group of pins.
|
||||
*
|
||||
* Configures the output drive strength for a group of pins, to
|
||||
* control the amount of current the pad is able to sink/source.
|
||||
*
|
||||
* \param[in] port Base of the PORT module to configure
|
||||
* \param[in] mask Mask of the port pin(s) to configure
|
||||
* \param[in] mode New output driver strength mode to configure
|
||||
*/
|
||||
void system_pinmux_group_set_output_strength(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const enum system_pinmux_pin_strength mode)
|
||||
{
|
||||
Assert(port);
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
if (mask & (1UL << i)) {
|
||||
if (mode == SYSTEM_PINMUX_PIN_STRENGTH_HIGH) {
|
||||
port->PINCFG[i].reg |= PORT_PINCFG_DRVSTR;
|
||||
} else {
|
||||
port->PINCFG[i].reg &= ~PORT_PINCFG_DRVSTR;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef FEATURE_SYSTEM_PINMUX_OPEN_DRAIN
|
||||
/**
|
||||
* \brief Configures the output driver mode for a group of pins.
|
||||
*
|
||||
* Configures the output driver mode for a group of pins, to
|
||||
* control the pad behavior.
|
||||
*
|
||||
* \param[in] port Base of the PORT module to configure
|
||||
* \param[in] mask Mask of the port pin(s) to configure
|
||||
* \param[in] mode New pad output driver mode to configure
|
||||
*/
|
||||
void system_pinmux_group_set_output_drive(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const enum system_pinmux_pin_drive mode)
|
||||
{
|
||||
Assert(port);
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
if (mask & (1UL << i)) {
|
||||
if (mode == SYSTEM_PINMUX_PIN_DRIVE_OPEN_DRAIN) {
|
||||
port->PINCFG[i].reg |= PORT_PINCFG_ODRAIN;
|
||||
} else {
|
||||
port->PINCFG[i].reg &= ~PORT_PINCFG_ODRAIN;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,86 +1,86 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM PINMUX Driver Quick Start
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_system_pinmux_basic_use_case Quick Start Guide for SYSTEM PINMUX - Basic
|
||||
*
|
||||
* In this use case, the PINMUX module is configured for:
|
||||
* \li One pin in input mode, with pull-up enabled, connected to the GPIO
|
||||
* module
|
||||
* \li Sampling mode of the pin changed to sample on demand
|
||||
*
|
||||
* This use case sets up the PINMUX to configure a physical I/O pin set as
|
||||
* an input with pull-up and changes the sampling mode of the pin to reduce
|
||||
* power by only sampling the physical pin state when the user application
|
||||
* attempts to read it.
|
||||
*
|
||||
* \section asfdoc_sam0_system_pinmux_basic_use_case_setup Setup
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_pinmux_basic_use_case_setup_prereq Prerequisites
|
||||
* There are no special setup requirements for this use-case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_pinmux_basic_use_case_setup_code Code
|
||||
* Copy-paste the following setup code to your application:
|
||||
* \snippet qs_pinmux_basic.c setup
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_pinmux_basic_use_case_setup_flow Workflow
|
||||
* -# Create a PINMUX module pin configuration struct, which can be filled out
|
||||
* to adjust the configuration of a single port pin.
|
||||
* \snippet qs_pinmux_basic.c pinmux_config
|
||||
* -# Initialize the pin configuration struct with the module's default values.
|
||||
* \snippet qs_pinmux_basic.c pinmux_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Adjust the configuration struct to request an input pin with pull-up
|
||||
* connected to the GPIO peripheral.
|
||||
* \snippet qs_pinmux_basic.c pinmux_update_config_values
|
||||
* -# Configure GPIO10 with the initialized pin configuration struct, to enable
|
||||
* the input sampler on the pin.
|
||||
* \snippet qs_pinmux_basic.c pinmux_set_config
|
||||
*
|
||||
* \section asfdoc_sam0_system_pinmux_basic_use_case_use_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_pinmux_basic_use_case_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_pinmux_basic.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_pinmux_basic_use_case_flow Workflow
|
||||
|
||||
* -# Adjust the configuration of the pin to enable on-demand sampling mode.
|
||||
* \snippet qs_pinmux_basic.c pinmux_change_input_sampling
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM PINMUX Driver Quick Start
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_system_pinmux_basic_use_case Quick Start Guide for SYSTEM PINMUX - Basic
|
||||
*
|
||||
* In this use case, the PINMUX module is configured for:
|
||||
* \li One pin in input mode, with pull-up enabled, connected to the GPIO
|
||||
* module
|
||||
* \li Sampling mode of the pin changed to sample on demand
|
||||
*
|
||||
* This use case sets up the PINMUX to configure a physical I/O pin set as
|
||||
* an input with pull-up and changes the sampling mode of the pin to reduce
|
||||
* power by only sampling the physical pin state when the user application
|
||||
* attempts to read it.
|
||||
*
|
||||
* \section asfdoc_sam0_system_pinmux_basic_use_case_setup Setup
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_pinmux_basic_use_case_setup_prereq Prerequisites
|
||||
* There are no special setup requirements for this use-case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_pinmux_basic_use_case_setup_code Code
|
||||
* Copy-paste the following setup code to your application:
|
||||
* \snippet qs_pinmux_basic.c setup
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_pinmux_basic_use_case_setup_flow Workflow
|
||||
* -# Create a PINMUX module pin configuration struct, which can be filled out
|
||||
* to adjust the configuration of a single port pin.
|
||||
* \snippet qs_pinmux_basic.c pinmux_config
|
||||
* -# Initialize the pin configuration struct with the module's default values.
|
||||
* \snippet qs_pinmux_basic.c pinmux_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Adjust the configuration struct to request an input pin with pull-up
|
||||
* connected to the GPIO peripheral.
|
||||
* \snippet qs_pinmux_basic.c pinmux_update_config_values
|
||||
* -# Configure GPIO10 with the initialized pin configuration struct, to enable
|
||||
* the input sampler on the pin.
|
||||
* \snippet qs_pinmux_basic.c pinmux_set_config
|
||||
*
|
||||
* \section asfdoc_sam0_system_pinmux_basic_use_case_use_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_pinmux_basic_use_case_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_pinmux_basic.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_pinmux_basic_use_case_flow Workflow
|
||||
|
||||
* -# Adjust the configuration of the pin to enable on-demand sampling mode.
|
||||
* \snippet qs_pinmux_basic.c pinmux_change_input_sampling
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
@ -1,239 +1,239 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Power related functionality
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#ifndef POWER_H_INCLUDED
|
||||
#define POWER_H_INCLUDED
|
||||
|
||||
#include <compiler.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* MCU revision number */
|
||||
#define _SYSTEM_MCU_REVISION_D 3
|
||||
#define _SYSTEM_MCU_REVISION_E 4
|
||||
|
||||
/**
|
||||
* \addtogroup asfdoc_sam0_system_group
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Voltage references within the device.
|
||||
*
|
||||
* List of available voltage references (VREF) that may be used within the
|
||||
* device.
|
||||
*/
|
||||
enum system_voltage_reference {
|
||||
/** Temperature sensor voltage reference */
|
||||
SYSTEM_VOLTAGE_REFERENCE_TEMPSENSE,
|
||||
/** Bandgap voltage reference */
|
||||
SYSTEM_VOLTAGE_REFERENCE_BANDGAP,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Device sleep modes.
|
||||
*
|
||||
* List of available sleep modes in the device. A table of clocks available in
|
||||
* different sleep modes can be found in \ref asfdoc_sam0_system_module_overview_sleep_mode.
|
||||
*/
|
||||
enum system_sleepmode {
|
||||
/** IDLE 0 sleep mode */
|
||||
SYSTEM_SLEEPMODE_IDLE_0,
|
||||
/** IDLE 1 sleep mode */
|
||||
SYSTEM_SLEEPMODE_IDLE_1,
|
||||
/** IDLE 2 sleep mode */
|
||||
SYSTEM_SLEEPMODE_IDLE_2,
|
||||
/** Standby sleep mode */
|
||||
SYSTEM_SLEEPMODE_STANDBY,
|
||||
};
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* \name Voltage References
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Enable the selected voltage reference
|
||||
*
|
||||
* Enables the selected voltage reference source, making the voltage reference
|
||||
* available on a pin as well as an input source to the analog peripherals.
|
||||
*
|
||||
* \param[in] vref Voltage reference to enable
|
||||
*/
|
||||
static inline void system_voltage_reference_enable(
|
||||
const enum system_voltage_reference vref)
|
||||
{
|
||||
switch (vref) {
|
||||
case SYSTEM_VOLTAGE_REFERENCE_TEMPSENSE:
|
||||
SYSCTRL->VREF.reg |= SYSCTRL_VREF_TSEN;
|
||||
break;
|
||||
|
||||
case SYSTEM_VOLTAGE_REFERENCE_BANDGAP:
|
||||
SYSCTRL->VREF.reg |= SYSCTRL_VREF_BGOUTEN;
|
||||
break;
|
||||
|
||||
default:
|
||||
Assert(false);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disable the selected voltage reference
|
||||
*
|
||||
* Disables the selected voltage reference source.
|
||||
*
|
||||
* \param[in] vref Voltage reference to disable
|
||||
*/
|
||||
static inline void system_voltage_reference_disable(
|
||||
const enum system_voltage_reference vref)
|
||||
{
|
||||
switch (vref) {
|
||||
case SYSTEM_VOLTAGE_REFERENCE_TEMPSENSE:
|
||||
SYSCTRL->VREF.reg &= ~SYSCTRL_VREF_TSEN;
|
||||
break;
|
||||
|
||||
case SYSTEM_VOLTAGE_REFERENCE_BANDGAP:
|
||||
SYSCTRL->VREF.reg &= ~SYSCTRL_VREF_BGOUTEN;
|
||||
break;
|
||||
|
||||
default:
|
||||
Assert(false);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* \name Device Sleep Control
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Set the sleep mode of the device
|
||||
*
|
||||
* Sets the sleep mode of the device; the configured sleep mode will be entered
|
||||
* upon the next call of the \ref system_sleep() function.
|
||||
*
|
||||
* For an overview of which systems are disabled in sleep for the different
|
||||
* sleep modes, see \ref asfdoc_sam0_system_module_overview_sleep_mode.
|
||||
*
|
||||
* \param[in] sleep_mode Sleep mode to configure for the next sleep operation
|
||||
*
|
||||
* \retval STATUS_OK Operation completed successfully
|
||||
* \retval STATUS_ERR_INVALID_ARG The requested sleep mode was invalid or not
|
||||
* available
|
||||
*/
|
||||
static inline enum status_code system_set_sleepmode(
|
||||
const enum system_sleepmode sleep_mode)
|
||||
{
|
||||
|
||||
#if (SAMD20 || SAMD21 || SAMR21)
|
||||
|
||||
/* Get MCU revision */
|
||||
uint32_t rev = DSU->DID.reg;
|
||||
|
||||
rev &= DSU_DID_REVISION_Msk;
|
||||
rev = rev >> DSU_DID_REVISION_Pos;
|
||||
|
||||
#if (SAMD20)
|
||||
if (rev < _SYSTEM_MCU_REVISION_E) {
|
||||
/* Errata 13140: Make sure that the Flash does not power all the way down
|
||||
* when in sleep mode. */
|
||||
NVMCTRL->CTRLB.bit.SLEEPPRM = NVMCTRL_CTRLB_SLEEPPRM_DISABLED_Val;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if (SAMD21 || SAMR21)
|
||||
if (rev < _SYSTEM_MCU_REVISION_D) {
|
||||
/* Errata 13140: Make sure that the Flash does not power all the way down
|
||||
* when in sleep mode. */
|
||||
NVMCTRL->CTRLB.bit.SLEEPPRM = NVMCTRL_CTRLB_SLEEPPRM_DISABLED_Val;
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
switch (sleep_mode) {
|
||||
case SYSTEM_SLEEPMODE_IDLE_0:
|
||||
case SYSTEM_SLEEPMODE_IDLE_1:
|
||||
case SYSTEM_SLEEPMODE_IDLE_2:
|
||||
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
|
||||
PM->SLEEP.reg = sleep_mode;
|
||||
break;
|
||||
|
||||
case SYSTEM_SLEEPMODE_STANDBY:
|
||||
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
|
||||
break;
|
||||
|
||||
default:
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Put the system to sleep waiting for interrupt
|
||||
*
|
||||
* Executes a device DSB (Data Synchronization Barrier) instruction to ensure
|
||||
* all ongoing memory accesses have completed, then a WFI (Wait For Interrupt)
|
||||
* instruction to place the device into the sleep mode specified by
|
||||
* \ref system_set_sleepmode until woken by an interrupt.
|
||||
*/
|
||||
static inline void system_sleep(void)
|
||||
{
|
||||
__DSB();
|
||||
__WFI();
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @} */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* POWER_H_INCLUDED */
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Power related functionality
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#ifndef POWER_H_INCLUDED
|
||||
#define POWER_H_INCLUDED
|
||||
|
||||
#include <compiler.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* MCU revision number */
|
||||
#define _SYSTEM_MCU_REVISION_D 3
|
||||
#define _SYSTEM_MCU_REVISION_E 4
|
||||
|
||||
/**
|
||||
* \addtogroup asfdoc_sam0_system_group
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Voltage references within the device.
|
||||
*
|
||||
* List of available voltage references (VREF) that may be used within the
|
||||
* device.
|
||||
*/
|
||||
enum system_voltage_reference {
|
||||
/** Temperature sensor voltage reference */
|
||||
SYSTEM_VOLTAGE_REFERENCE_TEMPSENSE,
|
||||
/** Bandgap voltage reference */
|
||||
SYSTEM_VOLTAGE_REFERENCE_BANDGAP,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Device sleep modes.
|
||||
*
|
||||
* List of available sleep modes in the device. A table of clocks available in
|
||||
* different sleep modes can be found in \ref asfdoc_sam0_system_module_overview_sleep_mode.
|
||||
*/
|
||||
enum system_sleepmode {
|
||||
/** IDLE 0 sleep mode */
|
||||
SYSTEM_SLEEPMODE_IDLE_0,
|
||||
/** IDLE 1 sleep mode */
|
||||
SYSTEM_SLEEPMODE_IDLE_1,
|
||||
/** IDLE 2 sleep mode */
|
||||
SYSTEM_SLEEPMODE_IDLE_2,
|
||||
/** Standby sleep mode */
|
||||
SYSTEM_SLEEPMODE_STANDBY,
|
||||
};
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* \name Voltage References
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Enable the selected voltage reference
|
||||
*
|
||||
* Enables the selected voltage reference source, making the voltage reference
|
||||
* available on a pin as well as an input source to the analog peripherals.
|
||||
*
|
||||
* \param[in] vref Voltage reference to enable
|
||||
*/
|
||||
static inline void system_voltage_reference_enable(
|
||||
const enum system_voltage_reference vref)
|
||||
{
|
||||
switch (vref) {
|
||||
case SYSTEM_VOLTAGE_REFERENCE_TEMPSENSE:
|
||||
SYSCTRL->VREF.reg |= SYSCTRL_VREF_TSEN;
|
||||
break;
|
||||
|
||||
case SYSTEM_VOLTAGE_REFERENCE_BANDGAP:
|
||||
SYSCTRL->VREF.reg |= SYSCTRL_VREF_BGOUTEN;
|
||||
break;
|
||||
|
||||
default:
|
||||
Assert(false);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disable the selected voltage reference
|
||||
*
|
||||
* Disables the selected voltage reference source.
|
||||
*
|
||||
* \param[in] vref Voltage reference to disable
|
||||
*/
|
||||
static inline void system_voltage_reference_disable(
|
||||
const enum system_voltage_reference vref)
|
||||
{
|
||||
switch (vref) {
|
||||
case SYSTEM_VOLTAGE_REFERENCE_TEMPSENSE:
|
||||
SYSCTRL->VREF.reg &= ~SYSCTRL_VREF_TSEN;
|
||||
break;
|
||||
|
||||
case SYSTEM_VOLTAGE_REFERENCE_BANDGAP:
|
||||
SYSCTRL->VREF.reg &= ~SYSCTRL_VREF_BGOUTEN;
|
||||
break;
|
||||
|
||||
default:
|
||||
Assert(false);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* \name Device Sleep Control
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Set the sleep mode of the device
|
||||
*
|
||||
* Sets the sleep mode of the device; the configured sleep mode will be entered
|
||||
* upon the next call of the \ref system_sleep() function.
|
||||
*
|
||||
* For an overview of which systems are disabled in sleep for the different
|
||||
* sleep modes, see \ref asfdoc_sam0_system_module_overview_sleep_mode.
|
||||
*
|
||||
* \param[in] sleep_mode Sleep mode to configure for the next sleep operation
|
||||
*
|
||||
* \retval STATUS_OK Operation completed successfully
|
||||
* \retval STATUS_ERR_INVALID_ARG The requested sleep mode was invalid or not
|
||||
* available
|
||||
*/
|
||||
static inline enum status_code system_set_sleepmode(
|
||||
const enum system_sleepmode sleep_mode)
|
||||
{
|
||||
|
||||
#if (SAMD20 || SAMD21 || SAMR21)
|
||||
|
||||
/* Get MCU revision */
|
||||
uint32_t rev = DSU->DID.reg;
|
||||
|
||||
rev &= DSU_DID_REVISION_Msk;
|
||||
rev = rev >> DSU_DID_REVISION_Pos;
|
||||
|
||||
#if (SAMD20)
|
||||
if (rev < _SYSTEM_MCU_REVISION_E) {
|
||||
/* Errata 13140: Make sure that the Flash does not power all the way down
|
||||
* when in sleep mode. */
|
||||
NVMCTRL->CTRLB.bit.SLEEPPRM = NVMCTRL_CTRLB_SLEEPPRM_DISABLED_Val;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if (SAMD21 || SAMR21)
|
||||
if (rev < _SYSTEM_MCU_REVISION_D) {
|
||||
/* Errata 13140: Make sure that the Flash does not power all the way down
|
||||
* when in sleep mode. */
|
||||
NVMCTRL->CTRLB.bit.SLEEPPRM = NVMCTRL_CTRLB_SLEEPPRM_DISABLED_Val;
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
switch (sleep_mode) {
|
||||
case SYSTEM_SLEEPMODE_IDLE_0:
|
||||
case SYSTEM_SLEEPMODE_IDLE_1:
|
||||
case SYSTEM_SLEEPMODE_IDLE_2:
|
||||
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
|
||||
PM->SLEEP.reg = sleep_mode;
|
||||
break;
|
||||
|
||||
case SYSTEM_SLEEPMODE_STANDBY:
|
||||
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
|
||||
break;
|
||||
|
||||
default:
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Put the system to sleep waiting for interrupt
|
||||
*
|
||||
* Executes a device DSB (Data Synchronization Barrier) instruction to ensure
|
||||
* all ongoing memory accesses have completed, then a WFI (Wait For Interrupt)
|
||||
* instruction to place the device into the sleep mode specified by
|
||||
* \ref system_set_sleepmode until woken by an interrupt.
|
||||
*/
|
||||
static inline void system_sleep(void)
|
||||
{
|
||||
__DSB();
|
||||
__WFI();
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @} */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* POWER_H_INCLUDED */
|
||||
|
||||
@ -1,109 +1,109 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Reset related functionality
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#ifndef RESET_H_INCLUDED
|
||||
#define RESET_H_INCLUDED
|
||||
|
||||
#include <compiler.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \addtogroup asfdoc_sam0_system_group
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Reset causes of the system.
|
||||
*
|
||||
* List of possible reset causes of the system.
|
||||
*/
|
||||
enum system_reset_cause {
|
||||
/** The system was last reset by a software reset */
|
||||
SYSTEM_RESET_CAUSE_SOFTWARE = PM_RCAUSE_SYST,
|
||||
/** The system was last reset by the watchdog timer */
|
||||
SYSTEM_RESET_CAUSE_WDT = PM_RCAUSE_WDT,
|
||||
/** The system was last reset because the external reset line was pulled low */
|
||||
SYSTEM_RESET_CAUSE_EXTERNAL_RESET = PM_RCAUSE_EXT,
|
||||
/** The system was last reset by the BOD33 */
|
||||
SYSTEM_RESET_CAUSE_BOD33 = PM_RCAUSE_BOD33,
|
||||
/** The system was last reset by the BOD12 */
|
||||
SYSTEM_RESET_CAUSE_BOD12 = PM_RCAUSE_BOD12,
|
||||
/** The system was last reset by the POR (Power on reset) */
|
||||
SYSTEM_RESET_CAUSE_POR = PM_RCAUSE_POR,
|
||||
};
|
||||
|
||||
|
||||
/**
|
||||
* \name Reset Control
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Reset the MCU.
|
||||
*
|
||||
* Resets the MCU and all associated peripherals and registers, except RTC, all 32KHz sources,
|
||||
* WDT (if ALWAYSON is set) and GCLK (if WRTLOCK is set).
|
||||
*
|
||||
*/
|
||||
static inline void system_reset(void)
|
||||
{
|
||||
NVIC_SystemReset();
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Return the reset cause.
|
||||
*
|
||||
* Retrieves the cause of the last system reset.
|
||||
*
|
||||
* \return An enum value indicating the cause of the last system reset.
|
||||
*/
|
||||
static inline enum system_reset_cause system_get_reset_cause(void)
|
||||
{
|
||||
return (enum system_reset_cause)PM->RCAUSE.reg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @} */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* RESET_H_INCLUDED */
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Reset related functionality
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
#ifndef RESET_H_INCLUDED
|
||||
#define RESET_H_INCLUDED
|
||||
|
||||
#include <compiler.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \addtogroup asfdoc_sam0_system_group
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Reset causes of the system.
|
||||
*
|
||||
* List of possible reset causes of the system.
|
||||
*/
|
||||
enum system_reset_cause {
|
||||
/** The system was last reset by a software reset */
|
||||
SYSTEM_RESET_CAUSE_SOFTWARE = PM_RCAUSE_SYST,
|
||||
/** The system was last reset by the watchdog timer */
|
||||
SYSTEM_RESET_CAUSE_WDT = PM_RCAUSE_WDT,
|
||||
/** The system was last reset because the external reset line was pulled low */
|
||||
SYSTEM_RESET_CAUSE_EXTERNAL_RESET = PM_RCAUSE_EXT,
|
||||
/** The system was last reset by the BOD33 */
|
||||
SYSTEM_RESET_CAUSE_BOD33 = PM_RCAUSE_BOD33,
|
||||
/** The system was last reset by the BOD12 */
|
||||
SYSTEM_RESET_CAUSE_BOD12 = PM_RCAUSE_BOD12,
|
||||
/** The system was last reset by the POR (Power on reset) */
|
||||
SYSTEM_RESET_CAUSE_POR = PM_RCAUSE_POR,
|
||||
};
|
||||
|
||||
|
||||
/**
|
||||
* \name Reset Control
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Reset the MCU.
|
||||
*
|
||||
* Resets the MCU and all associated peripherals and registers, except RTC, all 32KHz sources,
|
||||
* WDT (if ALWAYSON is set) and GCLK (if WRTLOCK is set).
|
||||
*
|
||||
*/
|
||||
static inline void system_reset(void)
|
||||
{
|
||||
NVIC_SystemReset();
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Return the reset cause.
|
||||
*
|
||||
* Retrieves the cause of the last system reset.
|
||||
*
|
||||
* \return An enum value indicating the cause of the last system reset.
|
||||
*/
|
||||
static inline enum system_reset_cause system_get_reset_cause(void)
|
||||
{
|
||||
return (enum system_reset_cause)PM->RCAUSE.reg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @} */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* RESET_H_INCLUDED */
|
||||
|
||||
@ -1,101 +1,101 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM System related functionality
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
#include <system.h>
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Dummy initialization function, used as a weak alias target for the various
|
||||
* init functions called by \ref system_init().
|
||||
*/
|
||||
void _system_dummy_init(void);
|
||||
void _system_dummy_init(void)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
# if defined(__GNUC__)
|
||||
void system_clock_init(void) WEAK __attribute__((alias("_system_dummy_init")));
|
||||
void system_board_init(void) WEAK __attribute__((alias("_system_dummy_init")));
|
||||
void _system_events_init(void) WEAK __attribute__((alias("_system_dummy_init")));
|
||||
void _system_extint_init(void) WEAK __attribute__((alias("_system_dummy_init")));
|
||||
void _system_divas_init(void) WEAK __attribute__((alias("_system_dummy_init")));
|
||||
# elif defined(__ICCARM__)
|
||||
void system_clock_init(void);
|
||||
void system_board_init(void);
|
||||
void _system_events_init(void);
|
||||
void _system_extint_init(void);
|
||||
void _system_divas_init(void);
|
||||
# pragma weak system_clock_init=_system_dummy_init
|
||||
# pragma weak system_board_init=_system_dummy_init
|
||||
# pragma weak _system_events_init=_system_dummy_init
|
||||
# pragma weak _system_extint_init=_system_dummy_init
|
||||
# pragma weak _system_divas_init=_system_dummy_init
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief Initialize system
|
||||
*
|
||||
* This function will call the various initialization functions within the
|
||||
* system namespace. If a given optional system module is not available, the
|
||||
* associated call will effectively be a NOP (No Operation).
|
||||
*
|
||||
* Currently the following initialization functions are supported:
|
||||
* - System clock initialization (via the SYSTEM CLOCK sub-module)
|
||||
* - Board hardware initialization (via the Board module)
|
||||
* - Event system driver initialization (via the EVSYS module)
|
||||
* - External Interrupt driver initialization (via the EXTINT module)
|
||||
*/
|
||||
void system_init(void)
|
||||
{
|
||||
/* Configure GCLK and clock sources according to conf_clocks.h */
|
||||
system_clock_init();
|
||||
|
||||
/* Initialize board hardware */
|
||||
system_board_init();
|
||||
|
||||
/* Initialize EVSYS hardware */
|
||||
_system_events_init();
|
||||
|
||||
/* Initialize External hardware */
|
||||
_system_extint_init();
|
||||
|
||||
/* Initialize DIVAS hardware */
|
||||
_system_divas_init();
|
||||
}
|
||||
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM System related functionality
|
||||
*
|
||||
* Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
#include <system.h>
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Dummy initialization function, used as a weak alias target for the various
|
||||
* init functions called by \ref system_init().
|
||||
*/
|
||||
void _system_dummy_init(void);
|
||||
void _system_dummy_init(void)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
# if defined(__GNUC__)
|
||||
void system_clock_init(void) WEAK __attribute__((alias("_system_dummy_init")));
|
||||
void system_board_init(void) WEAK __attribute__((alias("_system_dummy_init")));
|
||||
void _system_events_init(void) WEAK __attribute__((alias("_system_dummy_init")));
|
||||
void _system_extint_init(void) WEAK __attribute__((alias("_system_dummy_init")));
|
||||
void _system_divas_init(void) WEAK __attribute__((alias("_system_dummy_init")));
|
||||
# elif defined(__ICCARM__)
|
||||
void system_clock_init(void);
|
||||
void system_board_init(void);
|
||||
void _system_events_init(void);
|
||||
void _system_extint_init(void);
|
||||
void _system_divas_init(void);
|
||||
# pragma weak system_clock_init=_system_dummy_init
|
||||
# pragma weak system_board_init=_system_dummy_init
|
||||
# pragma weak _system_events_init=_system_dummy_init
|
||||
# pragma weak _system_extint_init=_system_dummy_init
|
||||
# pragma weak _system_divas_init=_system_dummy_init
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief Initialize system
|
||||
*
|
||||
* This function will call the various initialization functions within the
|
||||
* system namespace. If a given optional system module is not available, the
|
||||
* associated call will effectively be a NOP (No Operation).
|
||||
*
|
||||
* Currently the following initialization functions are supported:
|
||||
* - System clock initialization (via the SYSTEM CLOCK sub-module)
|
||||
* - Board hardware initialization (via the Board module)
|
||||
* - Event system driver initialization (via the EVSYS module)
|
||||
* - External Interrupt driver initialization (via the EXTINT module)
|
||||
*/
|
||||
void system_init(void)
|
||||
{
|
||||
/* Configure GCLK and clock sources according to conf_clocks.h */
|
||||
system_clock_init();
|
||||
|
||||
/* Initialize board hardware */
|
||||
system_board_init();
|
||||
|
||||
/* Initialize EVSYS hardware */
|
||||
_system_events_init();
|
||||
|
||||
/* Initialize External hardware */
|
||||
_system_extint_init();
|
||||
|
||||
/* Initialize DIVAS hardware */
|
||||
_system_divas_init();
|
||||
}
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,139 +1,139 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM TCC Driver Quick Start
|
||||
*
|
||||
* Copyright (c) 2013-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_tcc_basic_use_case Quick Start Guide for TCC - Basic
|
||||
*
|
||||
* The supported board list:
|
||||
* - SAM D21/R21/L21/L22/DA1/C21/HA1G16A Xplained Pro
|
||||
*
|
||||
* In this use case, the TCC will be used to generate a PWM signal. Here
|
||||
* the pulse width is set to one quarter of the period.
|
||||
* When the PWM signal connects to LED, LED will light. To see the waveform,
|
||||
* you may need an oscilloscope.
|
||||
* SAMHA1G16A Xpro LED is PA00 which isn't connected out, use PA04 instead,
|
||||
* so we can't see LED blink but only see the waveform from oscilloscope.
|
||||
*
|
||||
* The PWM output is set up as follows:
|
||||
* <table>
|
||||
* <tr><th> Board </td><th> Pin </td><th> Connect to </td></tr>
|
||||
* <tr><td> SAM D21 Xpro </td><td> PB30 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM R21 Xpro </td><td> PA19 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM L21 Xpro </td><td> PB10 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM L22 Xpro </td><td> PC27 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM DA1 Xpro </td><td> PB30 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM C21 Xpro </td><td> PA15 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM HA1G16A Xpro </td><td> PA04 </td><td> NULL </td></tr>
|
||||
* </table>
|
||||
*
|
||||
* The TCC module will be set up as follows:
|
||||
* - GCLK generator 0 (GCLK main) clock source
|
||||
* - Use double buffering write when set top, compare, or pattern through API
|
||||
* - No dithering on the counter or compare
|
||||
* - Prescaler is set to 256
|
||||
* - Single Slope PWM wave generation
|
||||
* - GCLK reload action
|
||||
* - Don't run in standby
|
||||
* - No fault or waveform extensions
|
||||
* - No inversion of waveform output
|
||||
* - No capture enabled
|
||||
* - Count upward
|
||||
* - Don't perform one-shot operations
|
||||
* - No event input enabled
|
||||
* - No event action
|
||||
* - No event generation enabled
|
||||
* - Counter starts on 0
|
||||
* - Counter top set to 0xFFFF
|
||||
* - Capture compare channel 0 set to 0xFFFF/4
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_basic_use_case_setup Quick Start
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_basic_use_case_prereq Prerequisites
|
||||
* There are no prerequisites for this use case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_basic_use_case_setup_code Code
|
||||
*
|
||||
* Add to the main application source file, before any functions:
|
||||
* \snippet conf_quick_start.h definition_pwm
|
||||
*
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_tcc_basic.c module_inst
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_tcc_basic.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_tcc_basic.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_basic_use_case_setup_flow Workflow
|
||||
* -# Create a module software instance structure for the TCC module to store
|
||||
* the TCC driver state while it is in use.
|
||||
* \snippet qs_tcc_basic.c module_inst
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
*
|
||||
* -# Configure the TCC module.
|
||||
* -# Create a TCC module configuration struct, which can be filled out to
|
||||
* adjust the configuration of a physical TCC peripheral.
|
||||
* \snippet qs_tcc_basic.c setup_config
|
||||
* -# Initialize the TCC configuration struct with the module's default values.
|
||||
* \snippet qs_tcc_basic.c setup_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Alter the TCC settings to configure the counter width, wave generation
|
||||
* mode, and the compare channel 0 value.
|
||||
* \snippet qs_tcc_basic.c setup_change_config
|
||||
* -# Alter the TCC settings to configure the PWM output on a physical device
|
||||
* pin.
|
||||
* \snippet qs_tcc_basic.c setup_change_config_pwm
|
||||
* -# Configure the TCC module with the desired settings.
|
||||
* \snippet qs_tcc_basic.c setup_set_config
|
||||
* -# Enable the TCC module to start the timer and begin PWM signal generation.
|
||||
* \snippet qs_tcc_basic.c setup_enable
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_basic_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_basic_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_tcc_basic.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_basic_use_case_main_flow Workflow
|
||||
* -# Enter an infinite loop while the PWM wave is generated via the TCC module.
|
||||
* \snippet qs_tcc_basic.c main_loop
|
||||
*/
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM TCC Driver Quick Start
|
||||
*
|
||||
* Copyright (c) 2013-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_tcc_basic_use_case Quick Start Guide for TCC - Basic
|
||||
*
|
||||
* The supported board list:
|
||||
* - SAM D21/R21/L21/L22/DA1/C21/HA1G16A Xplained Pro
|
||||
*
|
||||
* In this use case, the TCC will be used to generate a PWM signal. Here
|
||||
* the pulse width is set to one quarter of the period.
|
||||
* When the PWM signal connects to LED, LED will light. To see the waveform,
|
||||
* you may need an oscilloscope.
|
||||
* SAMHA1G16A Xpro LED is PA00 which isn't connected out, use PA04 instead,
|
||||
* so we can't see LED blink but only see the waveform from oscilloscope.
|
||||
*
|
||||
* The PWM output is set up as follows:
|
||||
* <table>
|
||||
* <tr><th> Board </td><th> Pin </td><th> Connect to </td></tr>
|
||||
* <tr><td> SAM D21 Xpro </td><td> PB30 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM R21 Xpro </td><td> PA19 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM L21 Xpro </td><td> PB10 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM L22 Xpro </td><td> PC27 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM DA1 Xpro </td><td> PB30 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM C21 Xpro </td><td> PA15 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM HA1G16A Xpro </td><td> PA04 </td><td> NULL </td></tr>
|
||||
* </table>
|
||||
*
|
||||
* The TCC module will be set up as follows:
|
||||
* - GCLK generator 0 (GCLK main) clock source
|
||||
* - Use double buffering write when set top, compare, or pattern through API
|
||||
* - No dithering on the counter or compare
|
||||
* - Prescaler is set to 256
|
||||
* - Single Slope PWM wave generation
|
||||
* - GCLK reload action
|
||||
* - Don't run in standby
|
||||
* - No fault or waveform extensions
|
||||
* - No inversion of waveform output
|
||||
* - No capture enabled
|
||||
* - Count upward
|
||||
* - Don't perform one-shot operations
|
||||
* - No event input enabled
|
||||
* - No event action
|
||||
* - No event generation enabled
|
||||
* - Counter starts on 0
|
||||
* - Counter top set to 0xFFFF
|
||||
* - Capture compare channel 0 set to 0xFFFF/4
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_basic_use_case_setup Quick Start
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_basic_use_case_prereq Prerequisites
|
||||
* There are no prerequisites for this use case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_basic_use_case_setup_code Code
|
||||
*
|
||||
* Add to the main application source file, before any functions:
|
||||
* \snippet conf_quick_start.h definition_pwm
|
||||
*
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_tcc_basic.c module_inst
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_tcc_basic.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_tcc_basic.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_basic_use_case_setup_flow Workflow
|
||||
* -# Create a module software instance structure for the TCC module to store
|
||||
* the TCC driver state while it is in use.
|
||||
* \snippet qs_tcc_basic.c module_inst
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
*
|
||||
* -# Configure the TCC module.
|
||||
* -# Create a TCC module configuration struct, which can be filled out to
|
||||
* adjust the configuration of a physical TCC peripheral.
|
||||
* \snippet qs_tcc_basic.c setup_config
|
||||
* -# Initialize the TCC configuration struct with the module's default values.
|
||||
* \snippet qs_tcc_basic.c setup_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Alter the TCC settings to configure the counter width, wave generation
|
||||
* mode, and the compare channel 0 value.
|
||||
* \snippet qs_tcc_basic.c setup_change_config
|
||||
* -# Alter the TCC settings to configure the PWM output on a physical device
|
||||
* pin.
|
||||
* \snippet qs_tcc_basic.c setup_change_config_pwm
|
||||
* -# Configure the TCC module with the desired settings.
|
||||
* \snippet qs_tcc_basic.c setup_set_config
|
||||
* -# Enable the TCC module to start the timer and begin PWM signal generation.
|
||||
* \snippet qs_tcc_basic.c setup_enable
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_basic_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_basic_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_tcc_basic.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_basic_use_case_main_flow Workflow
|
||||
* -# Enter an infinite loop while the PWM wave is generated via the TCC module.
|
||||
* \snippet qs_tcc_basic.c main_loop
|
||||
*/
|
||||
|
||||
@ -1,145 +1,145 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM TCC Driver Double Buffering Quick Start
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_tcc_buffering_use_case Quick Start Guide for TCC - Double Buffering and Circular
|
||||
*
|
||||
* The supported board list:
|
||||
* - SAM D21/R21/L21/L22/DA1/C21/HA1G16A Xplained Pro
|
||||
*
|
||||
* In this use case, the TCC will be used to generate a PWM signal. Here
|
||||
* the pulse width alters in one quarter and three quarter of the period.
|
||||
* When the PWM signal connects to LED, LED will light. To see the waveform,
|
||||
* you may need an oscilloscope.
|
||||
* SAMHA1G16A Xpro LED is PA00 which isn't connected out, use PA04 instead,
|
||||
* so we can't see LED blink but only see the waveform from oscilloscope.
|
||||
*
|
||||
* The PWM output is set up as follows:
|
||||
* <table>
|
||||
* <tr><th> Board </td><th> Pin </td><th> Connect to </td></tr>
|
||||
* <tr><td> SAM D21 Xpro </td><td> PB30 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM R21 Xpro </td><td> PA19 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM L21 Xpro </td><td> PB10 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM L22 Xpro </td><td> PC27 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM DA1 Xpro </td><td> PB30 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM C21 Xpro </td><td> PA15 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM HA1G16A Xpro </td><td> PA04 </td><td> NULL </td></tr>
|
||||
* </table>
|
||||
*
|
||||
* The TCC module will be set up as follows:
|
||||
* - GCLK generator 0 (GCLK main) clock source
|
||||
* - Use double buffering write when set top, compare, or pattern through API
|
||||
* - No dithering on the counter or compare
|
||||
* - Prescaler is set to 1024
|
||||
* - Single Slope PWM wave generation
|
||||
* - GCLK reload action
|
||||
* - Don't run in standby
|
||||
* - No fault or waveform extensions
|
||||
* - No inversion of waveform output
|
||||
* - No capture enabled
|
||||
* - Count upward
|
||||
* - Don't perform one-shot operations
|
||||
* - No event input enabled
|
||||
* - No event action
|
||||
* - No event generation enabled
|
||||
* - Counter starts on 0
|
||||
* - Counter top set to 8000
|
||||
* - Capture compare channel set to 8000/4
|
||||
* - Capture compare channel buffer set to 8000*3/4
|
||||
* - Circular option for compare channel is enabled so that the compare
|
||||
* values keep switching on update condition
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_buffering_use_case_setup Quick Start
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_buffering_use_case_prereq Prerequisites
|
||||
* There are no prerequisites for this use case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_buffering_use_case_setup_code Code
|
||||
*
|
||||
* Add to the main application source file, before any functions:
|
||||
* \snippet conf_quick_start_buffering.h definition_pwm
|
||||
*
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_tcc_buffering.c module_inst
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_tcc_buffering.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_tcc_buffering.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_buffering_use_case_setup_flow Workflow
|
||||
* -# Create a module software instance structure for the TCC module to store
|
||||
* the TCC driver state while it is in use.
|
||||
* \snippet qs_tcc_buffering.c module_inst
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
*
|
||||
* -# Configure the TCC module.
|
||||
* -# Create a TCC module configuration struct, which can be filled out to
|
||||
* adjust the configuration of a physical TCC peripheral.
|
||||
* \snippet qs_tcc_buffering.c setup_config
|
||||
* -# Initialize the TCC configuration struct with the module's default values.
|
||||
* \snippet qs_tcc_buffering.c setup_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Alter the TCC settings to configure the counter width, wave generation
|
||||
* mode, and the compare channel 0 value.
|
||||
* \snippet qs_tcc_buffering.c setup_change_config
|
||||
* -# Alter the TCC settings to configure the PWM output on a physical device
|
||||
* pin.
|
||||
* \snippet qs_tcc_buffering.c setup_change_config_pwm
|
||||
* -# Configure the TCC module with the desired settings.
|
||||
* \snippet qs_tcc_buffering.c setup_set_config
|
||||
* -# Set to compare buffer value and enable circular of double buffered
|
||||
* compare values.
|
||||
* \snippet qs_tcc_buffering.c setup_set_buffering
|
||||
* -# Enable the TCC module to start the timer and begin PWM signal generation.
|
||||
* \snippet qs_tcc_buffering.c setup_enable
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_buffering_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_buffering_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_tcc_buffering.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_buffering_use_case_main_flow Workflow
|
||||
* -# Enter an infinite loop while the PWM wave is generated via the TCC module.
|
||||
* \snippet qs_tcc_buffering.c main_loop
|
||||
*/
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM TCC Driver Double Buffering Quick Start
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_tcc_buffering_use_case Quick Start Guide for TCC - Double Buffering and Circular
|
||||
*
|
||||
* The supported board list:
|
||||
* - SAM D21/R21/L21/L22/DA1/C21/HA1G16A Xplained Pro
|
||||
*
|
||||
* In this use case, the TCC will be used to generate a PWM signal. Here
|
||||
* the pulse width alters in one quarter and three quarter of the period.
|
||||
* When the PWM signal connects to LED, LED will light. To see the waveform,
|
||||
* you may need an oscilloscope.
|
||||
* SAMHA1G16A Xpro LED is PA00 which isn't connected out, use PA04 instead,
|
||||
* so we can't see LED blink but only see the waveform from oscilloscope.
|
||||
*
|
||||
* The PWM output is set up as follows:
|
||||
* <table>
|
||||
* <tr><th> Board </td><th> Pin </td><th> Connect to </td></tr>
|
||||
* <tr><td> SAM D21 Xpro </td><td> PB30 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM R21 Xpro </td><td> PA19 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM L21 Xpro </td><td> PB10 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM L22 Xpro </td><td> PC27 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM DA1 Xpro </td><td> PB30 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM C21 Xpro </td><td> PA15 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM HA1G16A Xpro </td><td> PA04 </td><td> NULL </td></tr>
|
||||
* </table>
|
||||
*
|
||||
* The TCC module will be set up as follows:
|
||||
* - GCLK generator 0 (GCLK main) clock source
|
||||
* - Use double buffering write when set top, compare, or pattern through API
|
||||
* - No dithering on the counter or compare
|
||||
* - Prescaler is set to 1024
|
||||
* - Single Slope PWM wave generation
|
||||
* - GCLK reload action
|
||||
* - Don't run in standby
|
||||
* - No fault or waveform extensions
|
||||
* - No inversion of waveform output
|
||||
* - No capture enabled
|
||||
* - Count upward
|
||||
* - Don't perform one-shot operations
|
||||
* - No event input enabled
|
||||
* - No event action
|
||||
* - No event generation enabled
|
||||
* - Counter starts on 0
|
||||
* - Counter top set to 8000
|
||||
* - Capture compare channel set to 8000/4
|
||||
* - Capture compare channel buffer set to 8000*3/4
|
||||
* - Circular option for compare channel is enabled so that the compare
|
||||
* values keep switching on update condition
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_buffering_use_case_setup Quick Start
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_buffering_use_case_prereq Prerequisites
|
||||
* There are no prerequisites for this use case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_buffering_use_case_setup_code Code
|
||||
*
|
||||
* Add to the main application source file, before any functions:
|
||||
* \snippet conf_quick_start_buffering.h definition_pwm
|
||||
*
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_tcc_buffering.c module_inst
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_tcc_buffering.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_tcc_buffering.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_buffering_use_case_setup_flow Workflow
|
||||
* -# Create a module software instance structure for the TCC module to store
|
||||
* the TCC driver state while it is in use.
|
||||
* \snippet qs_tcc_buffering.c module_inst
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
*
|
||||
* -# Configure the TCC module.
|
||||
* -# Create a TCC module configuration struct, which can be filled out to
|
||||
* adjust the configuration of a physical TCC peripheral.
|
||||
* \snippet qs_tcc_buffering.c setup_config
|
||||
* -# Initialize the TCC configuration struct with the module's default values.
|
||||
* \snippet qs_tcc_buffering.c setup_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Alter the TCC settings to configure the counter width, wave generation
|
||||
* mode, and the compare channel 0 value.
|
||||
* \snippet qs_tcc_buffering.c setup_change_config
|
||||
* -# Alter the TCC settings to configure the PWM output on a physical device
|
||||
* pin.
|
||||
* \snippet qs_tcc_buffering.c setup_change_config_pwm
|
||||
* -# Configure the TCC module with the desired settings.
|
||||
* \snippet qs_tcc_buffering.c setup_set_config
|
||||
* -# Set to compare buffer value and enable circular of double buffered
|
||||
* compare values.
|
||||
* \snippet qs_tcc_buffering.c setup_set_buffering
|
||||
* -# Enable the TCC module to start the timer and begin PWM signal generation.
|
||||
* \snippet qs_tcc_buffering.c setup_enable
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_buffering_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_buffering_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_tcc_buffering.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_buffering_use_case_main_flow Workflow
|
||||
* -# Enter an infinite loop while the PWM wave is generated via the TCC module.
|
||||
* \snippet qs_tcc_buffering.c main_loop
|
||||
*/
|
||||
|
||||
@ -1,151 +1,151 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM TCC - Timer Counter for Control Applications Callback Driver Quick Start
|
||||
*
|
||||
* Copyright (c) 2013-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_tcc_callback_use_case Quick Start Guide for TCC - Callback
|
||||
*
|
||||
* The supported board list:
|
||||
* - SAM D21/R21/L21/L22/DA1/C21/HA1G16A Xplained Pro
|
||||
*
|
||||
* In this use case, the TCC will be used to generate a PWM signal, with a
|
||||
* varying duty cycle. Here the pulse width is increased each time the timer
|
||||
* count matches the set compare value.
|
||||
* When the PWM signal connects to LED, LED will light. To see the waveform,
|
||||
* you may need an oscilloscope.
|
||||
* SAMHA1G16A Xpro LED is PA00 which isn't connected out, use PA04 instead,
|
||||
* so we can't see LED blink but only see the waveform from oscilloscope.
|
||||
*
|
||||
* The PWM output is set up as follows:
|
||||
* <table>
|
||||
* <tr><th> Board </td><th> Pin </td><th> Connect to </td></tr>
|
||||
* <tr><td> SAM D21 Xpro </td><td> PB30 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM R21 Xpro </td><td> PA19 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM L21 Xpro </td><td> PB10 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM L22 Xpro </td><td> PC27 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM DA1 Xpro </td><td> PB30 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM C21 Xpro </td><td> PA15 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM HA1G16A Xpro </td><td> PA04 </td><td> NULL </td></tr>
|
||||
* </table>
|
||||
*
|
||||
* The TCC module will be set up as follows:
|
||||
* - GCLK generator 0 (GCLK main) clock source
|
||||
* - Use double buffering write when set top, compare, or pattern through API
|
||||
* - No dithering on the counter or compare
|
||||
* - No prescaler
|
||||
* - Single Slope PWM wave generation
|
||||
* - GCLK reload action
|
||||
* - Don't run in standby
|
||||
* - No faults or waveform extensions
|
||||
* - No inversion of waveform output
|
||||
* - No capture enabled
|
||||
* - Count upward
|
||||
* - Don't perform one-shot operations
|
||||
* - No event input enabled
|
||||
* - No event action
|
||||
* - No event generation enabled
|
||||
* - Counter starts on 0
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_callback_use_case_setup Quick Start
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_callback_use_case_prereq Prerequisites
|
||||
* There are no prerequisites for this use case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_callback_use_case_setup_code Code
|
||||
*
|
||||
* Add to the main application source file, before any functions:
|
||||
* \snippet conf_quick_start.h definition_pwm
|
||||
*
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_tcc_callback.c module_inst
|
||||
*
|
||||
* Copy-paste the following callback function code to your user application:
|
||||
* \snippet qs_tcc_callback.c callback_funcs
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_tcc_callback.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_tcc_callback.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_callback_use_case_setup_flow Workflow
|
||||
* -# Create a module software instance structure for the TCC module to store
|
||||
* the TCC driver state while it is in use.
|
||||
* \snippet qs_tcc_callback.c module_inst
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
*
|
||||
* -# Configure the TCC module.
|
||||
* -# Create a TCC module configuration struct, which can be filled out to
|
||||
* adjust the configuration of a physical TCC peripheral.
|
||||
* \snippet qs_tcc_callback.c setup_config
|
||||
* -# Initialize the TCC configuration struct with the module's default values.
|
||||
* \snippet qs_tcc_callback.c setup_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Alter the TCC settings to configure the counter width, wave generation
|
||||
* mode, and the compare channel 0 value.
|
||||
* \snippet qs_tcc_callback.c setup_change_config
|
||||
* -# Alter the TCC settings to configure the PWM output on a physical device
|
||||
* pin.
|
||||
* \snippet qs_tcc_callback.c setup_change_config_pwm
|
||||
* -# Configure the TCC module with the desired settings.
|
||||
* \snippet qs_tcc_callback.c setup_set_config
|
||||
* -# Enable the TCC module to start the timer and begin PWM signal generation.
|
||||
* \snippet qs_tcc_callback.c setup_enable
|
||||
* -# Configure the TCC callbacks.
|
||||
* -# Register the Compare Channel 0 Match callback functions with the driver.
|
||||
* \snippet qs_tcc_callback.c setup_register_callback
|
||||
* -# Enable the Compare Channel 0 Match callback so that it will be called by
|
||||
* the driver when appropriate.
|
||||
* \snippet qs_tcc_callback.c setup_enable_callback
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_callback_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_callback_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_tcc_callback.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_callback_use_case_main_flow Workflow
|
||||
* -# Enter an infinite loop while the PWM wave is generated via the TCC module.
|
||||
* \snippet qs_tcc_callback.c main_loop
|
||||
*/
|
||||
|
||||
|
||||
#include <asf.h>
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM TCC - Timer Counter for Control Applications Callback Driver Quick Start
|
||||
*
|
||||
* Copyright (c) 2013-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_tcc_callback_use_case Quick Start Guide for TCC - Callback
|
||||
*
|
||||
* The supported board list:
|
||||
* - SAM D21/R21/L21/L22/DA1/C21/HA1G16A Xplained Pro
|
||||
*
|
||||
* In this use case, the TCC will be used to generate a PWM signal, with a
|
||||
* varying duty cycle. Here the pulse width is increased each time the timer
|
||||
* count matches the set compare value.
|
||||
* When the PWM signal connects to LED, LED will light. To see the waveform,
|
||||
* you may need an oscilloscope.
|
||||
* SAMHA1G16A Xpro LED is PA00 which isn't connected out, use PA04 instead,
|
||||
* so we can't see LED blink but only see the waveform from oscilloscope.
|
||||
*
|
||||
* The PWM output is set up as follows:
|
||||
* <table>
|
||||
* <tr><th> Board </td><th> Pin </td><th> Connect to </td></tr>
|
||||
* <tr><td> SAM D21 Xpro </td><td> PB30 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM R21 Xpro </td><td> PA19 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM L21 Xpro </td><td> PB10 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM L22 Xpro </td><td> PC27 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM DA1 Xpro </td><td> PB30 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM C21 Xpro </td><td> PA15 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM HA1G16A Xpro </td><td> PA04 </td><td> NULL </td></tr>
|
||||
* </table>
|
||||
*
|
||||
* The TCC module will be set up as follows:
|
||||
* - GCLK generator 0 (GCLK main) clock source
|
||||
* - Use double buffering write when set top, compare, or pattern through API
|
||||
* - No dithering on the counter or compare
|
||||
* - No prescaler
|
||||
* - Single Slope PWM wave generation
|
||||
* - GCLK reload action
|
||||
* - Don't run in standby
|
||||
* - No faults or waveform extensions
|
||||
* - No inversion of waveform output
|
||||
* - No capture enabled
|
||||
* - Count upward
|
||||
* - Don't perform one-shot operations
|
||||
* - No event input enabled
|
||||
* - No event action
|
||||
* - No event generation enabled
|
||||
* - Counter starts on 0
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_callback_use_case_setup Quick Start
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_callback_use_case_prereq Prerequisites
|
||||
* There are no prerequisites for this use case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_callback_use_case_setup_code Code
|
||||
*
|
||||
* Add to the main application source file, before any functions:
|
||||
* \snippet conf_quick_start.h definition_pwm
|
||||
*
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_tcc_callback.c module_inst
|
||||
*
|
||||
* Copy-paste the following callback function code to your user application:
|
||||
* \snippet qs_tcc_callback.c callback_funcs
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_tcc_callback.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_tcc_callback.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_callback_use_case_setup_flow Workflow
|
||||
* -# Create a module software instance structure for the TCC module to store
|
||||
* the TCC driver state while it is in use.
|
||||
* \snippet qs_tcc_callback.c module_inst
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
*
|
||||
* -# Configure the TCC module.
|
||||
* -# Create a TCC module configuration struct, which can be filled out to
|
||||
* adjust the configuration of a physical TCC peripheral.
|
||||
* \snippet qs_tcc_callback.c setup_config
|
||||
* -# Initialize the TCC configuration struct with the module's default values.
|
||||
* \snippet qs_tcc_callback.c setup_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Alter the TCC settings to configure the counter width, wave generation
|
||||
* mode, and the compare channel 0 value.
|
||||
* \snippet qs_tcc_callback.c setup_change_config
|
||||
* -# Alter the TCC settings to configure the PWM output on a physical device
|
||||
* pin.
|
||||
* \snippet qs_tcc_callback.c setup_change_config_pwm
|
||||
* -# Configure the TCC module with the desired settings.
|
||||
* \snippet qs_tcc_callback.c setup_set_config
|
||||
* -# Enable the TCC module to start the timer and begin PWM signal generation.
|
||||
* \snippet qs_tcc_callback.c setup_enable
|
||||
* -# Configure the TCC callbacks.
|
||||
* -# Register the Compare Channel 0 Match callback functions with the driver.
|
||||
* \snippet qs_tcc_callback.c setup_register_callback
|
||||
* -# Enable the Compare Channel 0 Match callback so that it will be called by
|
||||
* the driver when appropriate.
|
||||
* \snippet qs_tcc_callback.c setup_enable_callback
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_callback_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_callback_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_tcc_callback.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_callback_use_case_main_flow Workflow
|
||||
* -# Enter an infinite loop while the PWM wave is generated via the TCC module.
|
||||
* \snippet qs_tcc_callback.c main_loop
|
||||
*/
|
||||
|
||||
|
||||
#include <asf.h>
|
||||
#include <conf_clocks.h>
|
||||
@ -1,275 +1,275 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM TCC Driver Quick Start with DMA
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_tcc_dma_use_case Quick Start Guide for Using DMA with TCC
|
||||
*
|
||||
* The supported board list:
|
||||
* - SAM D21/R21/L21/L22/DA1/C21/HA1G16A Xplained Pro
|
||||
*
|
||||
* In this use case, the TCC will be used to generate a PWM signal. Here
|
||||
* the pulse width varies through the following values with the help of DMA
|
||||
* transfer: one quarter of the period, half of the period, and three quarters
|
||||
* of the period.
|
||||
* The PWM output can be used to drive a LED. The waveform can also be
|
||||
* viewed using an oscilloscope.
|
||||
* The output signal is also fed back to another TCC channel by event system,
|
||||
* the event stamps are captured and transferred to a buffer by DMA.
|
||||
* SAMHA1G16A Xpro LED is PA00 which isn't connected out, use PA04 instead,
|
||||
* so we can't see LED blink but only see the waveform from oscilloscope.
|
||||
*
|
||||
* The PWM output is set up as follows:
|
||||
* <table>
|
||||
* <tr><th> Board </td><th> Pin </td><th> Connect to </td></tr>
|
||||
* <tr><td> SAM D21 Xpro </td><td> PB30 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM R21 Xpro </td><td> PA19 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM L21 Xpro </td><td> PB10 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM L22 Xpro </td><td> PC27 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM DA1 Xpro </td><td> PB30 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM C21 Xpro </td><td> PA15 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM HA1G16A Xpro </td><td> PA04 </td><td> NULL </td></tr>
|
||||
* </table>
|
||||
*
|
||||
* The TCC module will be setup as follows:
|
||||
* - GCLK generator 0 (GCLK main) clock source
|
||||
* - Use double buffering write when set top, compare, or pattern through API
|
||||
* - No dithering on the counter or compare
|
||||
* - Prescaler is set to 1024
|
||||
* - Single Slope PWM wave generation
|
||||
* - GCLK reload action
|
||||
* - Don't run in standby
|
||||
* - No fault or waveform extensions
|
||||
* - No inversion of waveform output
|
||||
* - No capture enabled
|
||||
* - Count upward
|
||||
* - Don't perform one-shot operations
|
||||
* - Counter starts on 0
|
||||
* - Counter top set to 0x1000
|
||||
* - Channel 0 (on SAM D21 Xpro) or 3 (on SAM R21 Xpro) is set to
|
||||
* compare and match value 0x1000*3/4 and generate event
|
||||
* - Channel 1 is set to capture on input event
|
||||
*
|
||||
* The event resource of EVSYS module will be setup as follows:
|
||||
* - TCC match capture channel 0 (on SAM D21 Xpro) or 3 (on SAM R21 Xpro) is
|
||||
* selected as event generator
|
||||
* - Event generation is synchronous, with rising edge detected
|
||||
* - TCC match capture channel 1 is the event user
|
||||
*
|
||||
* The DMA resource of DMAC module will be setup as follows:
|
||||
* - Two DMA resources are used
|
||||
* - Both DMA resources use peripheral trigger
|
||||
* - Both DMA resources perform beat transfer on trigger
|
||||
* - Both DMA resources use beat size of 16 bits
|
||||
* - Both DMA resources are configured to transfer three beats and
|
||||
* then repeat again in same buffer
|
||||
* - On DMA resource which controls the compare value
|
||||
* - TCC0 overflow triggers DMA transfer
|
||||
* - The source address increment is enabled
|
||||
* - The destination address is fixed to TCC channel 0 Compare/Capture
|
||||
*register
|
||||
* - On DMA resource which reads the captured value
|
||||
* - TCC0 capture on channel 1 triggers DMA transfer
|
||||
* - The source address is fixed to TCC channel 1 Compare/Capture register
|
||||
* - The destination address increment is enabled
|
||||
* - The captured value is transferred to an array in SRAM
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_dma_use_case_setup Quick Start
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_dma_use_case_prereq Prerequisites
|
||||
* There are no prerequisites for this use case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_dma_use_case_setup_code Code
|
||||
*
|
||||
* Add to the main application source file, before any functions, according to
|
||||
* the kit used:
|
||||
* - SAM D21 Xplained Pro
|
||||
* \snippet samd21_xplained_pro/conf_quick_start_dma.h definition_pwm
|
||||
* \snippet samd21_xplained_pro/conf_quick_start_dma.h definition_feedback
|
||||
* \snippet samd21_xplained_pro/conf_quick_start_dma.h definition_dma_compare_trigger
|
||||
* \snippet samd21_xplained_pro/conf_quick_start_dma.h definition_dma_capture_trigger
|
||||
* - SAM R21 Xplained Pro
|
||||
* \snippet samr21_xplained_pro/conf_quick_start_dma.h definition_pwm
|
||||
* \snippet samr21_xplained_pro/conf_quick_start_dma.h definition_feedback
|
||||
* \snippet samr21_xplained_pro/conf_quick_start_dma.h definition_dma_compare_trigger
|
||||
* \snippet samr21_xplained_pro/conf_quick_start_dma.h definition_dma_capture_trigger
|
||||
* - SAM L21 Xplained Pro
|
||||
* \snippet saml21_xplained_pro/conf_quick_start_dma.h definition_pwm
|
||||
* \snippet saml21_xplained_pro/conf_quick_start_dma.h definition_feedback
|
||||
* \snippet saml21_xplained_pro/conf_quick_start_dma.h definition_dma_compare_trigger
|
||||
* - SAM L22 Xplained Pro
|
||||
* \snippet saml22_xplained_pro/conf_quick_start_dma.h definition_pwm
|
||||
* \snippet saml22_xplained_pro/conf_quick_start_dma.h definition_feedback
|
||||
* \snippet saml22_xplained_pro/conf_quick_start_dma.h definition_dma_compare_trigger
|
||||
* - SAM DA1 Xplained Pro
|
||||
* \snippet samda1_xplained_pro/conf_quick_start_dma.h definition_pwm
|
||||
* \snippet samda1_xplained_pro/conf_quick_start_dma.h definition_feedback
|
||||
* \snippet samda1_xplained_pro/conf_quick_start_dma.h definition_dma_compare_trigger
|
||||
* \snippet samda1_xplained_pro/conf_quick_start_dma.h definition_dma_capture_trigger
|
||||
* - SAM C21 Xplained Pro
|
||||
* \snippet samc21_xplained_pro/conf_quick_start_dma.h definition_pwm
|
||||
* \snippet samc21_xplained_pro/conf_quick_start_dma.h definition_feedback
|
||||
* \snippet samc21_xplained_pro/conf_quick_start_dma.h definition_dma_compare_trigger
|
||||
*
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_tcc_dma.c module_inst
|
||||
* \snippet qs_tcc_dma.c capture_variables
|
||||
* \snippet qs_tcc_dma.c compare_variables
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_tcc_dma.c config_event_for_capture
|
||||
* \snippet qs_tcc_dma.c config_dma_for_capture
|
||||
* \snippet qs_tcc_dma.c config_dma_for_wave
|
||||
* \snippet qs_tcc_dma.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_tcc_dma.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_dma_use_case_setup_flow Workflow
|
||||
* \subsubsection asfdoc_sam0_tcc_dma_use_case_setup_flow_tcc Configure the TCC
|
||||
* -# Create a module software instance structure for the TCC module to store
|
||||
* the TCC driver state while it is in use.
|
||||
* \snippet qs_tcc_dma.c module_inst
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
* -# Create a TCC module configuration struct, which can be filled out to
|
||||
* adjust the configuration of a physical TCC peripheral.
|
||||
* \snippet qs_tcc_dma.c setup_config
|
||||
* -# Initialize the TCC configuration struct with the module's default values.
|
||||
* \snippet qs_tcc_dma.c setup_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
* -# Alter the TCC settings to configure the counter width, wave generation
|
||||
* mode, and the compare channel 0 value.
|
||||
* \snippet qs_tcc_dma.c setup_change_config
|
||||
* -# Alter the TCC settings to configure the PWM output on a physical device
|
||||
* pin.
|
||||
* \snippet qs_tcc_dma.c setup_change_config_pwm
|
||||
* -# Configure the TCC module with the desired settings.
|
||||
* \snippet qs_tcc_dma.c setup_set_config
|
||||
* -# Configure and enable the desired events for the TCC module.
|
||||
* \snippet qs_tcc_dma.c setup_events
|
||||
* \subsubsection asfdoc_sam0_tcc_dma_use_case_setup_flow_event Configure the Event System
|
||||
* Configure the EVSYS module to wire channel 0 event to channel 1.
|
||||
* -# Create an event resource instance.
|
||||
* \snippet qs_tcc_dma.c capture_event_resource
|
||||
* \note This should never go out of scope as long as the resource is in
|
||||
* use. In most cases, this should be global.
|
||||
*
|
||||
* -# Create an event resource configuration struct.
|
||||
* \snippet qs_tcc_dma.c event_setup_1
|
||||
* -# Initialize the event resource configuration struct with default values.
|
||||
* \snippet qs_tcc_dma.c event_setup_2
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
* -# Adjust the event resource configuration to desired values.
|
||||
* \snippet qs_tcc_dma.c event_setup_3
|
||||
* -# Allocate and configure the resource using the configuration structure.
|
||||
* \snippet qs_tcc_dma.c event_setup_4
|
||||
* -# Attach a user to the resource.
|
||||
* \snippet qs_tcc_dma.c event_setup_5
|
||||
* \subsubsection asfdoc_sam0_tcc_dma_use_case_setup_flow_dma_capture Configure the DMA for Capture TCC Channel 1
|
||||
* Configure the DMAC module to obtain captured value from TCC channel 1.
|
||||
* -# Create a DMA resource instance.
|
||||
* \snippet qs_tcc_dma.c capture_dma_resource
|
||||
* \note This should never go out of scope as long as the resource is in
|
||||
* use. In most cases, this should be global.
|
||||
* -# Create a DMA resource configuration struct.
|
||||
* \snippet qs_tcc_dma.c dma_setup_1
|
||||
* -# Initialize the DMA resource configuration struct with default values.
|
||||
* \snippet qs_tcc_dma.c dma_setup_2
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
* -# Adjust the DMA resource configurations.
|
||||
* \snippet qs_tcc_dma.c dma_setup_3
|
||||
* -# Allocate a DMA resource with the configurations.
|
||||
* \snippet qs_tcc_dma.c dma_setup_4
|
||||
* -# Prepare DMA transfer descriptor.
|
||||
* -# Create a DMA transfer descriptor.
|
||||
* \snippet qs_tcc_dma.c capture_dma_descriptor
|
||||
* \note When multiple descriptors are linked, the linked item should
|
||||
* never go out of scope before it is loaded (to DMA Write-Back
|
||||
* memory section). In most cases, if more than one descriptors are
|
||||
* used, they should be global except the very first one.
|
||||
* -# Create a DMA transfer descriptor struct.
|
||||
* -# Create a DMA transfer descriptor configuration structure, which can be
|
||||
* filled out to adjust the configuration of a single DMA transfer.
|
||||
* \snippet qs_tcc_dma.c dma_setup_5
|
||||
* -# Initialize the DMA transfer descriptor configuration struct with
|
||||
* default values.
|
||||
* \snippet qs_tcc_dma.c dma_setup_6
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
* -# Adjust the DMA transfer descriptor configurations.
|
||||
* \snippet qs_tcc_dma.c dma_setup_7
|
||||
* -# Create the DMA transfer descriptor with the given configuration.
|
||||
* \snippet qs_tcc_dma.c dma_setup_8
|
||||
* -# Start DMA transfer job with prepared descriptor.
|
||||
* -# Add the DMA transfer descriptor to the allocated DMA resource.
|
||||
* \snippet qs_tcc_dma.c dma_setup_10
|
||||
* \note When adding multiple descriptors, the last one added is linked
|
||||
* at the end of the descriptor queue. If ringed list is needed,
|
||||
* just add the first descriptor again to build the circle.
|
||||
* -# Start the DMA transfer job with the allocated DMA resource and
|
||||
* transfer descriptor.
|
||||
* \snippet qs_tcc_dma.c dma_setup_11
|
||||
* \subsubsection asfdoc_sam0_tcc_dma_use_case_setup_flow_dma_compare Configure the DMA for Compare TCC Channel 0
|
||||
* Configure the DMAC module to update TCC channel 0 compare value.
|
||||
* The flow is similar to last DMA configure step for capture.
|
||||
* -# Allocate and configure the DMA resource.
|
||||
* \snippet qs_tcc_dma.c compare_dma_resource
|
||||
* \snippet qs_tcc_dma.c config_dma_resource_for_wave
|
||||
* -# Prepare DMA transfer descriptor.
|
||||
* \snippet qs_tcc_dma.c compare_dma_descriptor
|
||||
* \snippet qs_tcc_dma.c config_dma_descriptor_for_wave
|
||||
* -# Start DMA transfer job with prepared descriptor.
|
||||
* \snippet qs_tcc_dma.c config_dma_job_for_wave
|
||||
* -# Enable the TCC module to start the timer and begin PWM signal generation.
|
||||
* \snippet qs_tcc_dma.c setup_enable
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_dma_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_dma_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_tcc_dma.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_dma_use_case_main_flow Workflow
|
||||
* -# Enter an infinite loop while the PWM wave is generated via the TCC module.
|
||||
* \snippet qs_tcc_dma.c main_loop
|
||||
*/
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM TCC Driver Quick Start with DMA
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_tcc_dma_use_case Quick Start Guide for Using DMA with TCC
|
||||
*
|
||||
* The supported board list:
|
||||
* - SAM D21/R21/L21/L22/DA1/C21/HA1G16A Xplained Pro
|
||||
*
|
||||
* In this use case, the TCC will be used to generate a PWM signal. Here
|
||||
* the pulse width varies through the following values with the help of DMA
|
||||
* transfer: one quarter of the period, half of the period, and three quarters
|
||||
* of the period.
|
||||
* The PWM output can be used to drive a LED. The waveform can also be
|
||||
* viewed using an oscilloscope.
|
||||
* The output signal is also fed back to another TCC channel by event system,
|
||||
* the event stamps are captured and transferred to a buffer by DMA.
|
||||
* SAMHA1G16A Xpro LED is PA00 which isn't connected out, use PA04 instead,
|
||||
* so we can't see LED blink but only see the waveform from oscilloscope.
|
||||
*
|
||||
* The PWM output is set up as follows:
|
||||
* <table>
|
||||
* <tr><th> Board </td><th> Pin </td><th> Connect to </td></tr>
|
||||
* <tr><td> SAM D21 Xpro </td><td> PB30 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM R21 Xpro </td><td> PA19 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM L21 Xpro </td><td> PB10 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM L22 Xpro </td><td> PC27 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM DA1 Xpro </td><td> PB30 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM C21 Xpro </td><td> PA15 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM HA1G16A Xpro </td><td> PA04 </td><td> NULL </td></tr>
|
||||
* </table>
|
||||
*
|
||||
* The TCC module will be setup as follows:
|
||||
* - GCLK generator 0 (GCLK main) clock source
|
||||
* - Use double buffering write when set top, compare, or pattern through API
|
||||
* - No dithering on the counter or compare
|
||||
* - Prescaler is set to 1024
|
||||
* - Single Slope PWM wave generation
|
||||
* - GCLK reload action
|
||||
* - Don't run in standby
|
||||
* - No fault or waveform extensions
|
||||
* - No inversion of waveform output
|
||||
* - No capture enabled
|
||||
* - Count upward
|
||||
* - Don't perform one-shot operations
|
||||
* - Counter starts on 0
|
||||
* - Counter top set to 0x1000
|
||||
* - Channel 0 (on SAM D21 Xpro) or 3 (on SAM R21 Xpro) is set to
|
||||
* compare and match value 0x1000*3/4 and generate event
|
||||
* - Channel 1 is set to capture on input event
|
||||
*
|
||||
* The event resource of EVSYS module will be setup as follows:
|
||||
* - TCC match capture channel 0 (on SAM D21 Xpro) or 3 (on SAM R21 Xpro) is
|
||||
* selected as event generator
|
||||
* - Event generation is synchronous, with rising edge detected
|
||||
* - TCC match capture channel 1 is the event user
|
||||
*
|
||||
* The DMA resource of DMAC module will be setup as follows:
|
||||
* - Two DMA resources are used
|
||||
* - Both DMA resources use peripheral trigger
|
||||
* - Both DMA resources perform beat transfer on trigger
|
||||
* - Both DMA resources use beat size of 16 bits
|
||||
* - Both DMA resources are configured to transfer three beats and
|
||||
* then repeat again in same buffer
|
||||
* - On DMA resource which controls the compare value
|
||||
* - TCC0 overflow triggers DMA transfer
|
||||
* - The source address increment is enabled
|
||||
* - The destination address is fixed to TCC channel 0 Compare/Capture
|
||||
*register
|
||||
* - On DMA resource which reads the captured value
|
||||
* - TCC0 capture on channel 1 triggers DMA transfer
|
||||
* - The source address is fixed to TCC channel 1 Compare/Capture register
|
||||
* - The destination address increment is enabled
|
||||
* - The captured value is transferred to an array in SRAM
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_dma_use_case_setup Quick Start
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_dma_use_case_prereq Prerequisites
|
||||
* There are no prerequisites for this use case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_dma_use_case_setup_code Code
|
||||
*
|
||||
* Add to the main application source file, before any functions, according to
|
||||
* the kit used:
|
||||
* - SAM D21 Xplained Pro
|
||||
* \snippet samd21_xplained_pro/conf_quick_start_dma.h definition_pwm
|
||||
* \snippet samd21_xplained_pro/conf_quick_start_dma.h definition_feedback
|
||||
* \snippet samd21_xplained_pro/conf_quick_start_dma.h definition_dma_compare_trigger
|
||||
* \snippet samd21_xplained_pro/conf_quick_start_dma.h definition_dma_capture_trigger
|
||||
* - SAM R21 Xplained Pro
|
||||
* \snippet samr21_xplained_pro/conf_quick_start_dma.h definition_pwm
|
||||
* \snippet samr21_xplained_pro/conf_quick_start_dma.h definition_feedback
|
||||
* \snippet samr21_xplained_pro/conf_quick_start_dma.h definition_dma_compare_trigger
|
||||
* \snippet samr21_xplained_pro/conf_quick_start_dma.h definition_dma_capture_trigger
|
||||
* - SAM L21 Xplained Pro
|
||||
* \snippet saml21_xplained_pro/conf_quick_start_dma.h definition_pwm
|
||||
* \snippet saml21_xplained_pro/conf_quick_start_dma.h definition_feedback
|
||||
* \snippet saml21_xplained_pro/conf_quick_start_dma.h definition_dma_compare_trigger
|
||||
* - SAM L22 Xplained Pro
|
||||
* \snippet saml22_xplained_pro/conf_quick_start_dma.h definition_pwm
|
||||
* \snippet saml22_xplained_pro/conf_quick_start_dma.h definition_feedback
|
||||
* \snippet saml22_xplained_pro/conf_quick_start_dma.h definition_dma_compare_trigger
|
||||
* - SAM DA1 Xplained Pro
|
||||
* \snippet samda1_xplained_pro/conf_quick_start_dma.h definition_pwm
|
||||
* \snippet samda1_xplained_pro/conf_quick_start_dma.h definition_feedback
|
||||
* \snippet samda1_xplained_pro/conf_quick_start_dma.h definition_dma_compare_trigger
|
||||
* \snippet samda1_xplained_pro/conf_quick_start_dma.h definition_dma_capture_trigger
|
||||
* - SAM C21 Xplained Pro
|
||||
* \snippet samc21_xplained_pro/conf_quick_start_dma.h definition_pwm
|
||||
* \snippet samc21_xplained_pro/conf_quick_start_dma.h definition_feedback
|
||||
* \snippet samc21_xplained_pro/conf_quick_start_dma.h definition_dma_compare_trigger
|
||||
*
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_tcc_dma.c module_inst
|
||||
* \snippet qs_tcc_dma.c capture_variables
|
||||
* \snippet qs_tcc_dma.c compare_variables
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_tcc_dma.c config_event_for_capture
|
||||
* \snippet qs_tcc_dma.c config_dma_for_capture
|
||||
* \snippet qs_tcc_dma.c config_dma_for_wave
|
||||
* \snippet qs_tcc_dma.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_tcc_dma.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_dma_use_case_setup_flow Workflow
|
||||
* \subsubsection asfdoc_sam0_tcc_dma_use_case_setup_flow_tcc Configure the TCC
|
||||
* -# Create a module software instance structure for the TCC module to store
|
||||
* the TCC driver state while it is in use.
|
||||
* \snippet qs_tcc_dma.c module_inst
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
* -# Create a TCC module configuration struct, which can be filled out to
|
||||
* adjust the configuration of a physical TCC peripheral.
|
||||
* \snippet qs_tcc_dma.c setup_config
|
||||
* -# Initialize the TCC configuration struct with the module's default values.
|
||||
* \snippet qs_tcc_dma.c setup_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
* -# Alter the TCC settings to configure the counter width, wave generation
|
||||
* mode, and the compare channel 0 value.
|
||||
* \snippet qs_tcc_dma.c setup_change_config
|
||||
* -# Alter the TCC settings to configure the PWM output on a physical device
|
||||
* pin.
|
||||
* \snippet qs_tcc_dma.c setup_change_config_pwm
|
||||
* -# Configure the TCC module with the desired settings.
|
||||
* \snippet qs_tcc_dma.c setup_set_config
|
||||
* -# Configure and enable the desired events for the TCC module.
|
||||
* \snippet qs_tcc_dma.c setup_events
|
||||
* \subsubsection asfdoc_sam0_tcc_dma_use_case_setup_flow_event Configure the Event System
|
||||
* Configure the EVSYS module to wire channel 0 event to channel 1.
|
||||
* -# Create an event resource instance.
|
||||
* \snippet qs_tcc_dma.c capture_event_resource
|
||||
* \note This should never go out of scope as long as the resource is in
|
||||
* use. In most cases, this should be global.
|
||||
*
|
||||
* -# Create an event resource configuration struct.
|
||||
* \snippet qs_tcc_dma.c event_setup_1
|
||||
* -# Initialize the event resource configuration struct with default values.
|
||||
* \snippet qs_tcc_dma.c event_setup_2
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
* -# Adjust the event resource configuration to desired values.
|
||||
* \snippet qs_tcc_dma.c event_setup_3
|
||||
* -# Allocate and configure the resource using the configuration structure.
|
||||
* \snippet qs_tcc_dma.c event_setup_4
|
||||
* -# Attach a user to the resource.
|
||||
* \snippet qs_tcc_dma.c event_setup_5
|
||||
* \subsubsection asfdoc_sam0_tcc_dma_use_case_setup_flow_dma_capture Configure the DMA for Capture TCC Channel 1
|
||||
* Configure the DMAC module to obtain captured value from TCC channel 1.
|
||||
* -# Create a DMA resource instance.
|
||||
* \snippet qs_tcc_dma.c capture_dma_resource
|
||||
* \note This should never go out of scope as long as the resource is in
|
||||
* use. In most cases, this should be global.
|
||||
* -# Create a DMA resource configuration struct.
|
||||
* \snippet qs_tcc_dma.c dma_setup_1
|
||||
* -# Initialize the DMA resource configuration struct with default values.
|
||||
* \snippet qs_tcc_dma.c dma_setup_2
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
* -# Adjust the DMA resource configurations.
|
||||
* \snippet qs_tcc_dma.c dma_setup_3
|
||||
* -# Allocate a DMA resource with the configurations.
|
||||
* \snippet qs_tcc_dma.c dma_setup_4
|
||||
* -# Prepare DMA transfer descriptor.
|
||||
* -# Create a DMA transfer descriptor.
|
||||
* \snippet qs_tcc_dma.c capture_dma_descriptor
|
||||
* \note When multiple descriptors are linked, the linked item should
|
||||
* never go out of scope before it is loaded (to DMA Write-Back
|
||||
* memory section). In most cases, if more than one descriptors are
|
||||
* used, they should be global except the very first one.
|
||||
* -# Create a DMA transfer descriptor struct.
|
||||
* -# Create a DMA transfer descriptor configuration structure, which can be
|
||||
* filled out to adjust the configuration of a single DMA transfer.
|
||||
* \snippet qs_tcc_dma.c dma_setup_5
|
||||
* -# Initialize the DMA transfer descriptor configuration struct with
|
||||
* default values.
|
||||
* \snippet qs_tcc_dma.c dma_setup_6
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
* -# Adjust the DMA transfer descriptor configurations.
|
||||
* \snippet qs_tcc_dma.c dma_setup_7
|
||||
* -# Create the DMA transfer descriptor with the given configuration.
|
||||
* \snippet qs_tcc_dma.c dma_setup_8
|
||||
* -# Start DMA transfer job with prepared descriptor.
|
||||
* -# Add the DMA transfer descriptor to the allocated DMA resource.
|
||||
* \snippet qs_tcc_dma.c dma_setup_10
|
||||
* \note When adding multiple descriptors, the last one added is linked
|
||||
* at the end of the descriptor queue. If ringed list is needed,
|
||||
* just add the first descriptor again to build the circle.
|
||||
* -# Start the DMA transfer job with the allocated DMA resource and
|
||||
* transfer descriptor.
|
||||
* \snippet qs_tcc_dma.c dma_setup_11
|
||||
* \subsubsection asfdoc_sam0_tcc_dma_use_case_setup_flow_dma_compare Configure the DMA for Compare TCC Channel 0
|
||||
* Configure the DMAC module to update TCC channel 0 compare value.
|
||||
* The flow is similar to last DMA configure step for capture.
|
||||
* -# Allocate and configure the DMA resource.
|
||||
* \snippet qs_tcc_dma.c compare_dma_resource
|
||||
* \snippet qs_tcc_dma.c config_dma_resource_for_wave
|
||||
* -# Prepare DMA transfer descriptor.
|
||||
* \snippet qs_tcc_dma.c compare_dma_descriptor
|
||||
* \snippet qs_tcc_dma.c config_dma_descriptor_for_wave
|
||||
* -# Start DMA transfer job with prepared descriptor.
|
||||
* \snippet qs_tcc_dma.c config_dma_job_for_wave
|
||||
* -# Enable the TCC module to start the timer and begin PWM signal generation.
|
||||
* \snippet qs_tcc_dma.c setup_enable
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_dma_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_dma_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_tcc_dma.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_dma_use_case_main_flow Workflow
|
||||
* -# Enter an infinite loop while the PWM wave is generated via the TCC module.
|
||||
* \snippet qs_tcc_dma.c main_loop
|
||||
*/
|
||||
|
||||
@ -1,277 +1,277 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM TCC - Timer Counter for Control Applications Callback Driver Quick Start (with Recoverable Fault)
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_tcc_faultn_use_case Quick Start Guide for TCC - Recoverable Fault
|
||||
*
|
||||
* The supported board list:
|
||||
* - SAM D21/R21/L21/L22/DA1/C21/HA1G16A Xplained Pro
|
||||
*
|
||||
* In this use case, the TCC will be used to generate a PWM signal, with a
|
||||
* varying duty cycle. Here the pulse width is increased each time the timer
|
||||
* count matches the set compare value. There is a recoverable fault input
|
||||
* which controls PWM output. When this fault is active (low) the PWM output
|
||||
* will be frozen (could be off or on, no light changing).
|
||||
* When fault is released (input high) the PWM output will go on.
|
||||
*
|
||||
* When the PWM signal connects to LED, LED will light. If fault input is from
|
||||
* a button, the LED will be frozen and not changing it's light
|
||||
* when the button is down and will go on when the button is up.
|
||||
* To see the PWM waveform, you may need an oscilloscope.
|
||||
* SAMHA1G16A Xpro LED is PA00 which isn't connected out, use PA04 instead,
|
||||
* so we can't see LED blink but only see the waveform from oscilloscope.
|
||||
*
|
||||
* The PWM output and fault input is set up as follows:
|
||||
* <table>
|
||||
* <tr><th> Board </td><th> Pin </td><th> Connect to </td></tr>
|
||||
* <tr><td> SAM D21 Xpro </td><td> PB30 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM D21 Xpro </td><td> PA15 </td><td> SW0 </td></tr>
|
||||
* <tr><td> SAM R21 Xpro </td><td> PA06 </td><td> EXT1 Pin 3 </td></tr>
|
||||
* <tr><td> SAM R21 Xpro </td><td> PA28 </td><td> SW0 </td></tr>
|
||||
* <tr><td> SAM L21 Xpro </td><td> PB10 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM L21 Xpro </td><td> PA16 </td><td> SW0 </td></tr>
|
||||
* <tr><td> SAM L22 Xpro </td><td> PB18 </td><td> EXT3 Pin 9 </td></tr>
|
||||
* <tr><td> SAM L22 Xpro </td><td> PC01 </td><td> SW0 </td></tr>
|
||||
* <tr><td> SAM DA1 Xpro </td><td> PB30 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM DA1 Xpro </td><td> PA15 </td><td> SW0 </td></tr>
|
||||
* <tr><td> SAM C21 Xpro </td><td> PA15 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM C21 Xpro </td><td> PA28 </td><td> SW0 </td></tr>
|
||||
* <tr><td> SAM HA1G16A Xpro </td><td> PA04 </td><td> NULL </td></tr>
|
||||
* <tr><td> SAM HA1G16A Xpro </td><td> PB03 </td><td> SW0 </td></tr>
|
||||
* </table>
|
||||
*
|
||||
* The TCC module will be set up as follows:
|
||||
* - GCLK generator 0 (GCLK main) clock source
|
||||
* - Use double buffering write when set top, compare, or pattern through API
|
||||
* - No dithering on the counter or compare
|
||||
* - No prescaler
|
||||
* - Single Slope PWM wave generation
|
||||
* - GCLK reload action
|
||||
* - Don't run in standby
|
||||
* - No waveform extentions
|
||||
* - No inversion of waveform output
|
||||
* - No capture enabled
|
||||
* - Count upward
|
||||
* - Don't perform one-shot operations
|
||||
* - No event input except channel 0 event enabled
|
||||
* - No event action
|
||||
* - No event generation enabled
|
||||
* - Counter starts on 0
|
||||
* - Recoverable Fault A is generated from channel 0 event input, fault halt
|
||||
* acts as software halt, other actions or options are all disabled
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_faultn_use_case_setup Quick Start
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_faultn_use_case_prereq Prerequisites
|
||||
* There are no prerequisites for this use case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_faultn_use_case_setup_code Code
|
||||
*
|
||||
* Add to the main application source file, before any functions, according to
|
||||
* the kit used:
|
||||
* - SAM D21 Xplained Pro
|
||||
* \snippet samd21_xplained_pro/conf_quick_start_faultn.h definition_pwm
|
||||
* \snippet samd21_xplained_pro/conf_quick_start_faultn.h definition_fault
|
||||
* - SAM R21 Xplained Pro
|
||||
* \snippet samr21_xplained_pro/conf_quick_start_faultn.h definition_pwm
|
||||
* \snippet samr21_xplained_pro/conf_quick_start_faultn.h definition_fault
|
||||
* - SAM L21 Xplained Pro
|
||||
* \snippet saml21_xplained_pro/conf_quick_start_faultn.h definition_pwm
|
||||
* \snippet saml21_xplained_pro/conf_quick_start_faultn.h definition_fault
|
||||
* - SAM L22 Xplained Pro
|
||||
* \snippet saml22_xplained_pro/conf_quick_start_faultn.h definition_pwm
|
||||
* \snippet saml22_xplained_pro/conf_quick_start_faultn.h definition_fault
|
||||
* - SAM DA1 Xplained Pro
|
||||
* \snippet samda1_xplained_pro/conf_quick_start_faultn.h definition_pwm
|
||||
* \snippet samda1_xplained_pro/conf_quick_start_faultn.h definition_fault
|
||||
* - SAM C21 Xplained Pro
|
||||
* \snippet samc21_xplained_pro/conf_quick_start_faultx.h definition_pwm
|
||||
* \snippet samc21_xplained_pro/conf_quick_start_faultx.h definition_fault
|
||||
* - SAM HA1G16A Xplained Pro:
|
||||
* \snippet samha1g16a_xplained_pro/conf_quick_start_faultx.h definition_pwm
|
||||
* \snippet samha1g16a_xplained_pro/conf_quick_start_faultx.h definition_fault
|
||||
*
|
||||
* Add to the main application source file, before any functions:
|
||||
* \snippet qs_tcc_faultn.c additional_include
|
||||
*
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_tcc_faultn.c module_inst
|
||||
* \snippet qs_tcc_faultn.c events_resource
|
||||
*
|
||||
* Copy-paste the following callback function code to your user application:
|
||||
* \snippet qs_tcc_faultn.c callback_funcs
|
||||
* \snippet qs_tcc_faultn.c callback_eic
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_tcc_faultn.c setup
|
||||
* \snippet qs_tcc_faultn.c config_eic
|
||||
* \snippet qs_tcc_faultn.c config_event
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_tcc_faultn.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_faultn_use_case_setup_flow Workflow
|
||||
* \subsubsection asfdoc_sam0_tcc_faultn_use_case_setup_flow_tcc Configure TCC
|
||||
* -# Create a module software instance struct for the TCC module to store
|
||||
* the TCC driver state while it is in use.
|
||||
* \snippet qs_tcc_faultn.c module_inst
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
*
|
||||
* -# Create a TCC module configuration struct, which can be filled out to
|
||||
* adjust the configuration of a physical TCC peripheral.
|
||||
* \snippet qs_tcc_faultn.c setup_config
|
||||
* -# Initialize the TCC configuration struct with the module's default values.
|
||||
* \snippet qs_tcc_faultn.c setup_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Alter the TCC settings to configure the counter width, wave generation
|
||||
* mode, and the compare channel 0 value and fault options. Here the
|
||||
* Recoverable Fault input is enabled and halt action is set to
|
||||
* software mode (must use software to clear halt state).
|
||||
* \snippet qs_tcc_faultn.c setup_change_config
|
||||
* \snippet qs_tcc_faultn.c setup_change_config_faults
|
||||
* -# Alter the TCC settings to configure the PWM output on a physical device
|
||||
* pin.
|
||||
* \snippet qs_tcc_faultn.c setup_change_config_pwm
|
||||
* -# Configure the TCC module with the desired settings.
|
||||
* \snippet qs_tcc_faultn.c setup_set_config
|
||||
*
|
||||
* -# Create a TCC events configuration struct, which can be filled out to
|
||||
* enable/disable events and configure event settings. Reset all fields
|
||||
* to zero.
|
||||
* \snippet qs_tcc_faultn.c setup_events
|
||||
* -# Alter the TCC events settings to enable/disable desired events, to
|
||||
* change event generating options and modify event actions. Here channel
|
||||
* event 0 input is enabled as source of recoverable fault.
|
||||
* \snippet qs_tcc_faultn.c setup_change_events_faults
|
||||
* -# Enable and apply events settings.
|
||||
* \snippet qs_tcc_faultn.c setup_events_enable
|
||||
*
|
||||
* -# Enable the TCC module to start the timer and begin PWM signal generation.
|
||||
* \snippet qs_tcc_faultn.c setup_enable
|
||||
*
|
||||
* -# Register the Compare Channel 0 Match callback functions with the driver.
|
||||
* \snippet qs_tcc_faultn.c setup_register_callback
|
||||
* -# Enable the Compare Channel 0 Match callback so that it will be called by
|
||||
* the driver when appropriate.
|
||||
* \snippet qs_tcc_faultn.c setup_enable_callback
|
||||
*
|
||||
* \subsubsection asfdoc_sam0_tcc_faultn_use_case_setup_flow_eic Configure EXTINT for fault input
|
||||
* -# Create an EXTINT module channel configuration struct, which can be filled
|
||||
* out to adjust the configuration of a single external interrupt channel.
|
||||
* \snippet qs_tcc_faultn.c eic_setup_1
|
||||
* -# Initialize the channel configuration struct with the module's default
|
||||
* values.
|
||||
* \snippet qs_tcc_faultn.c eic_setup_2
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Adjust the configuration struct to configure the pin MUX (to route the
|
||||
* desired physical pin to the logical channel) to the board button, and to
|
||||
* configure the channel to detect both rising and falling edges.
|
||||
* \snippet qs_tcc_faultn.c eic_setup_3
|
||||
* -# Configure external interrupt channel with the desired channel settings.
|
||||
* \snippet qs_tcc_faultn.c eic_setup_4
|
||||
*
|
||||
* -# Create a TXTINT events configuration struct, which can be filled out to
|
||||
* enable/disable events. Reset all fields to zero.
|
||||
* \snippet qs_tcc_faultn.c eic_event_setup_1
|
||||
* -# Adjust the configuration struct, set the channels to be enabled to
|
||||
* \c true. Here the channel to the board button is used.
|
||||
* \snippet qs_tcc_faultn.c eic_event_setup_2
|
||||
* -# Enable the events.
|
||||
* \snippet qs_tcc_faultn.c eic_event_setup_3
|
||||
*
|
||||
* -# Define the EXTINT callback that will be fired when a detection event
|
||||
* occurs. For this example, when fault line is released, the TCC fault
|
||||
* state is cleared to go on PWM generating.
|
||||
* \snippet qs_tcc_faultn.c callback_eic
|
||||
* -# Register a callback function \c eic_callback_to_clear_halt() to handle
|
||||
* detections from the External Interrupt Controller (EIC).
|
||||
* \snippet qs_tcc_faultn.c eic_callback_setup_1
|
||||
* -# Enable the registered callback function for the configured External
|
||||
* Interrupt channel, so that it will be called by the module when the
|
||||
* channel detects an edge.
|
||||
* \snippet qs_tcc_faultn.c eic_callback_setup_2
|
||||
*
|
||||
* \subsubsection asfdoc_sam0_tcc_faultn_use_case_setup_flow_evt Configure EVENTS for fault input
|
||||
* -# Create an event resource instance struct for the EVENTS module to store.
|
||||
* \snippet qs_tcc_faultn.c events_resource
|
||||
* \note This should never go out of scope as long as the resource is in use.
|
||||
* In most cases, this should be global.
|
||||
* -# Create an event channel configuration struct, which can be filled out to
|
||||
* adjust the configuration of a single event channel.
|
||||
* \snippet qs_tcc_faultn.c event_setup_1
|
||||
* -# Initialize the event channel configuration struct with the module's
|
||||
* default values.
|
||||
* \snippet qs_tcc_faultn.c event_setup_2
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Adjust the configuration struct to request that the channel will be attached
|
||||
* to the specified event generator, and that the asynchronous event path will
|
||||
* be used. Here the EIC channel connected to board button is the event
|
||||
* generator.
|
||||
* \snippet qs_tcc_faultn.c event_setup_3
|
||||
* -# Allocate and configure the channel using the configuration structure.
|
||||
* \snippet qs_tcc_faultn.c event_setup_4
|
||||
* \note The existing configuration struct may be re-used, as long as any
|
||||
* values that have been altered from the default settings are taken
|
||||
* into account by the user application.
|
||||
*
|
||||
* -# Attach a user to the channel. Here the user is TCC channel 0 event,
|
||||
* which has been configured as input of Recoverable Fault.
|
||||
* \snippet qs_tcc_faultn.c event_setup_5
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_faultn_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_faultn_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_tcc_callback.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_faultn_use_case_main_flow Workflow
|
||||
* -# Enter an infinite loop while the PWM wave is generated via the TCC module.
|
||||
* \snippet qs_tcc_callback.c main_loop
|
||||
*/
|
||||
|
||||
|
||||
#include <asf.h>
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM TCC - Timer Counter for Control Applications Callback Driver Quick Start (with Recoverable Fault)
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_tcc_faultn_use_case Quick Start Guide for TCC - Recoverable Fault
|
||||
*
|
||||
* The supported board list:
|
||||
* - SAM D21/R21/L21/L22/DA1/C21/HA1G16A Xplained Pro
|
||||
*
|
||||
* In this use case, the TCC will be used to generate a PWM signal, with a
|
||||
* varying duty cycle. Here the pulse width is increased each time the timer
|
||||
* count matches the set compare value. There is a recoverable fault input
|
||||
* which controls PWM output. When this fault is active (low) the PWM output
|
||||
* will be frozen (could be off or on, no light changing).
|
||||
* When fault is released (input high) the PWM output will go on.
|
||||
*
|
||||
* When the PWM signal connects to LED, LED will light. If fault input is from
|
||||
* a button, the LED will be frozen and not changing it's light
|
||||
* when the button is down and will go on when the button is up.
|
||||
* To see the PWM waveform, you may need an oscilloscope.
|
||||
* SAMHA1G16A Xpro LED is PA00 which isn't connected out, use PA04 instead,
|
||||
* so we can't see LED blink but only see the waveform from oscilloscope.
|
||||
*
|
||||
* The PWM output and fault input is set up as follows:
|
||||
* <table>
|
||||
* <tr><th> Board </td><th> Pin </td><th> Connect to </td></tr>
|
||||
* <tr><td> SAM D21 Xpro </td><td> PB30 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM D21 Xpro </td><td> PA15 </td><td> SW0 </td></tr>
|
||||
* <tr><td> SAM R21 Xpro </td><td> PA06 </td><td> EXT1 Pin 3 </td></tr>
|
||||
* <tr><td> SAM R21 Xpro </td><td> PA28 </td><td> SW0 </td></tr>
|
||||
* <tr><td> SAM L21 Xpro </td><td> PB10 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM L21 Xpro </td><td> PA16 </td><td> SW0 </td></tr>
|
||||
* <tr><td> SAM L22 Xpro </td><td> PB18 </td><td> EXT3 Pin 9 </td></tr>
|
||||
* <tr><td> SAM L22 Xpro </td><td> PC01 </td><td> SW0 </td></tr>
|
||||
* <tr><td> SAM DA1 Xpro </td><td> PB30 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM DA1 Xpro </td><td> PA15 </td><td> SW0 </td></tr>
|
||||
* <tr><td> SAM C21 Xpro </td><td> PA15 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM C21 Xpro </td><td> PA28 </td><td> SW0 </td></tr>
|
||||
* <tr><td> SAM HA1G16A Xpro </td><td> PA04 </td><td> NULL </td></tr>
|
||||
* <tr><td> SAM HA1G16A Xpro </td><td> PB03 </td><td> SW0 </td></tr>
|
||||
* </table>
|
||||
*
|
||||
* The TCC module will be set up as follows:
|
||||
* - GCLK generator 0 (GCLK main) clock source
|
||||
* - Use double buffering write when set top, compare, or pattern through API
|
||||
* - No dithering on the counter or compare
|
||||
* - No prescaler
|
||||
* - Single Slope PWM wave generation
|
||||
* - GCLK reload action
|
||||
* - Don't run in standby
|
||||
* - No waveform extentions
|
||||
* - No inversion of waveform output
|
||||
* - No capture enabled
|
||||
* - Count upward
|
||||
* - Don't perform one-shot operations
|
||||
* - No event input except channel 0 event enabled
|
||||
* - No event action
|
||||
* - No event generation enabled
|
||||
* - Counter starts on 0
|
||||
* - Recoverable Fault A is generated from channel 0 event input, fault halt
|
||||
* acts as software halt, other actions or options are all disabled
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_faultn_use_case_setup Quick Start
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_faultn_use_case_prereq Prerequisites
|
||||
* There are no prerequisites for this use case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_faultn_use_case_setup_code Code
|
||||
*
|
||||
* Add to the main application source file, before any functions, according to
|
||||
* the kit used:
|
||||
* - SAM D21 Xplained Pro
|
||||
* \snippet samd21_xplained_pro/conf_quick_start_faultn.h definition_pwm
|
||||
* \snippet samd21_xplained_pro/conf_quick_start_faultn.h definition_fault
|
||||
* - SAM R21 Xplained Pro
|
||||
* \snippet samr21_xplained_pro/conf_quick_start_faultn.h definition_pwm
|
||||
* \snippet samr21_xplained_pro/conf_quick_start_faultn.h definition_fault
|
||||
* - SAM L21 Xplained Pro
|
||||
* \snippet saml21_xplained_pro/conf_quick_start_faultn.h definition_pwm
|
||||
* \snippet saml21_xplained_pro/conf_quick_start_faultn.h definition_fault
|
||||
* - SAM L22 Xplained Pro
|
||||
* \snippet saml22_xplained_pro/conf_quick_start_faultn.h definition_pwm
|
||||
* \snippet saml22_xplained_pro/conf_quick_start_faultn.h definition_fault
|
||||
* - SAM DA1 Xplained Pro
|
||||
* \snippet samda1_xplained_pro/conf_quick_start_faultn.h definition_pwm
|
||||
* \snippet samda1_xplained_pro/conf_quick_start_faultn.h definition_fault
|
||||
* - SAM C21 Xplained Pro
|
||||
* \snippet samc21_xplained_pro/conf_quick_start_faultx.h definition_pwm
|
||||
* \snippet samc21_xplained_pro/conf_quick_start_faultx.h definition_fault
|
||||
* - SAM HA1G16A Xplained Pro:
|
||||
* \snippet samha1g16a_xplained_pro/conf_quick_start_faultx.h definition_pwm
|
||||
* \snippet samha1g16a_xplained_pro/conf_quick_start_faultx.h definition_fault
|
||||
*
|
||||
* Add to the main application source file, before any functions:
|
||||
* \snippet qs_tcc_faultn.c additional_include
|
||||
*
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_tcc_faultn.c module_inst
|
||||
* \snippet qs_tcc_faultn.c events_resource
|
||||
*
|
||||
* Copy-paste the following callback function code to your user application:
|
||||
* \snippet qs_tcc_faultn.c callback_funcs
|
||||
* \snippet qs_tcc_faultn.c callback_eic
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_tcc_faultn.c setup
|
||||
* \snippet qs_tcc_faultn.c config_eic
|
||||
* \snippet qs_tcc_faultn.c config_event
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_tcc_faultn.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_faultn_use_case_setup_flow Workflow
|
||||
* \subsubsection asfdoc_sam0_tcc_faultn_use_case_setup_flow_tcc Configure TCC
|
||||
* -# Create a module software instance struct for the TCC module to store
|
||||
* the TCC driver state while it is in use.
|
||||
* \snippet qs_tcc_faultn.c module_inst
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
*
|
||||
* -# Create a TCC module configuration struct, which can be filled out to
|
||||
* adjust the configuration of a physical TCC peripheral.
|
||||
* \snippet qs_tcc_faultn.c setup_config
|
||||
* -# Initialize the TCC configuration struct with the module's default values.
|
||||
* \snippet qs_tcc_faultn.c setup_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Alter the TCC settings to configure the counter width, wave generation
|
||||
* mode, and the compare channel 0 value and fault options. Here the
|
||||
* Recoverable Fault input is enabled and halt action is set to
|
||||
* software mode (must use software to clear halt state).
|
||||
* \snippet qs_tcc_faultn.c setup_change_config
|
||||
* \snippet qs_tcc_faultn.c setup_change_config_faults
|
||||
* -# Alter the TCC settings to configure the PWM output on a physical device
|
||||
* pin.
|
||||
* \snippet qs_tcc_faultn.c setup_change_config_pwm
|
||||
* -# Configure the TCC module with the desired settings.
|
||||
* \snippet qs_tcc_faultn.c setup_set_config
|
||||
*
|
||||
* -# Create a TCC events configuration struct, which can be filled out to
|
||||
* enable/disable events and configure event settings. Reset all fields
|
||||
* to zero.
|
||||
* \snippet qs_tcc_faultn.c setup_events
|
||||
* -# Alter the TCC events settings to enable/disable desired events, to
|
||||
* change event generating options and modify event actions. Here channel
|
||||
* event 0 input is enabled as source of recoverable fault.
|
||||
* \snippet qs_tcc_faultn.c setup_change_events_faults
|
||||
* -# Enable and apply events settings.
|
||||
* \snippet qs_tcc_faultn.c setup_events_enable
|
||||
*
|
||||
* -# Enable the TCC module to start the timer and begin PWM signal generation.
|
||||
* \snippet qs_tcc_faultn.c setup_enable
|
||||
*
|
||||
* -# Register the Compare Channel 0 Match callback functions with the driver.
|
||||
* \snippet qs_tcc_faultn.c setup_register_callback
|
||||
* -# Enable the Compare Channel 0 Match callback so that it will be called by
|
||||
* the driver when appropriate.
|
||||
* \snippet qs_tcc_faultn.c setup_enable_callback
|
||||
*
|
||||
* \subsubsection asfdoc_sam0_tcc_faultn_use_case_setup_flow_eic Configure EXTINT for fault input
|
||||
* -# Create an EXTINT module channel configuration struct, which can be filled
|
||||
* out to adjust the configuration of a single external interrupt channel.
|
||||
* \snippet qs_tcc_faultn.c eic_setup_1
|
||||
* -# Initialize the channel configuration struct with the module's default
|
||||
* values.
|
||||
* \snippet qs_tcc_faultn.c eic_setup_2
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Adjust the configuration struct to configure the pin MUX (to route the
|
||||
* desired physical pin to the logical channel) to the board button, and to
|
||||
* configure the channel to detect both rising and falling edges.
|
||||
* \snippet qs_tcc_faultn.c eic_setup_3
|
||||
* -# Configure external interrupt channel with the desired channel settings.
|
||||
* \snippet qs_tcc_faultn.c eic_setup_4
|
||||
*
|
||||
* -# Create a TXTINT events configuration struct, which can be filled out to
|
||||
* enable/disable events. Reset all fields to zero.
|
||||
* \snippet qs_tcc_faultn.c eic_event_setup_1
|
||||
* -# Adjust the configuration struct, set the channels to be enabled to
|
||||
* \c true. Here the channel to the board button is used.
|
||||
* \snippet qs_tcc_faultn.c eic_event_setup_2
|
||||
* -# Enable the events.
|
||||
* \snippet qs_tcc_faultn.c eic_event_setup_3
|
||||
*
|
||||
* -# Define the EXTINT callback that will be fired when a detection event
|
||||
* occurs. For this example, when fault line is released, the TCC fault
|
||||
* state is cleared to go on PWM generating.
|
||||
* \snippet qs_tcc_faultn.c callback_eic
|
||||
* -# Register a callback function \c eic_callback_to_clear_halt() to handle
|
||||
* detections from the External Interrupt Controller (EIC).
|
||||
* \snippet qs_tcc_faultn.c eic_callback_setup_1
|
||||
* -# Enable the registered callback function for the configured External
|
||||
* Interrupt channel, so that it will be called by the module when the
|
||||
* channel detects an edge.
|
||||
* \snippet qs_tcc_faultn.c eic_callback_setup_2
|
||||
*
|
||||
* \subsubsection asfdoc_sam0_tcc_faultn_use_case_setup_flow_evt Configure EVENTS for fault input
|
||||
* -# Create an event resource instance struct for the EVENTS module to store.
|
||||
* \snippet qs_tcc_faultn.c events_resource
|
||||
* \note This should never go out of scope as long as the resource is in use.
|
||||
* In most cases, this should be global.
|
||||
* -# Create an event channel configuration struct, which can be filled out to
|
||||
* adjust the configuration of a single event channel.
|
||||
* \snippet qs_tcc_faultn.c event_setup_1
|
||||
* -# Initialize the event channel configuration struct with the module's
|
||||
* default values.
|
||||
* \snippet qs_tcc_faultn.c event_setup_2
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Adjust the configuration struct to request that the channel will be attached
|
||||
* to the specified event generator, and that the asynchronous event path will
|
||||
* be used. Here the EIC channel connected to board button is the event
|
||||
* generator.
|
||||
* \snippet qs_tcc_faultn.c event_setup_3
|
||||
* -# Allocate and configure the channel using the configuration structure.
|
||||
* \snippet qs_tcc_faultn.c event_setup_4
|
||||
* \note The existing configuration struct may be re-used, as long as any
|
||||
* values that have been altered from the default settings are taken
|
||||
* into account by the user application.
|
||||
*
|
||||
* -# Attach a user to the channel. Here the user is TCC channel 0 event,
|
||||
* which has been configured as input of Recoverable Fault.
|
||||
* \snippet qs_tcc_faultn.c event_setup_5
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_faultn_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_faultn_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_tcc_callback.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_faultn_use_case_main_flow Workflow
|
||||
* -# Enter an infinite loop while the PWM wave is generated via the TCC module.
|
||||
* \snippet qs_tcc_callback.c main_loop
|
||||
*/
|
||||
|
||||
|
||||
#include <asf.h>
|
||||
#include <conf_clocks.h>
|
||||
@ -1,273 +1,273 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM TCC - Timer Counter for Control Applications Callback Driver Quick Start (with Non-Recoverable Fault)
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_tcc_faultx_use_case Quick Start Guide for TCC - Non-Recoverable Fault
|
||||
*
|
||||
* The supported kit list:
|
||||
* - SAM D21/R21/L21/L22/DA1/C21/HA1G16A Xplained Pro
|
||||
*
|
||||
* In this use case, the TCC will be used to generate a PWM signal, with a
|
||||
* varying duty cycle. Here the pulse width is increased each time the timer
|
||||
* count matches the set compare value. There is a non-recoverable fault input
|
||||
* which controls PWM output. When this fault is active (low) the PWM output
|
||||
* will be forced to be high. When fault is released (input high) the PWM
|
||||
* output will go on.
|
||||
*
|
||||
* When the PWM signal connects to LED, LED will light. If fault input is from
|
||||
* a button, the LED will be off when the button is down and on when the button
|
||||
* is up. To see the PWM waveform, you may need an oscilloscope.
|
||||
*
|
||||
* SAMHA1G16A Xpro LED is PA00 which isn't connected out, use PA04 instead,
|
||||
* so we can't see LED blink but only see the waveform from oscilloscope.
|
||||
|
||||
* The PWM output and fault input is set up as follows:
|
||||
* <table>
|
||||
* <tr><th> Board </td><th> Pin </td><th> Connect to </td></tr>
|
||||
* <tr><td> SAM D21 Xpro </td><td> PB30 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM D21 Xpro </td><td> PA15 </td><td> SW0 </td></tr>
|
||||
* <tr><td> SAM R21 Xpro </td><td> PA19 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM R21 Xpro </td><td> PA28 </td><td> SW0 </td></tr>
|
||||
* <tr><td> SAM L21 Xpro </td><td> PB10 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM L21 Xpro </td><td> PA16 </td><td> SW0 </td></tr>
|
||||
* <tr><td> SAM L22 Xpro </td><td> PC27 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM L22 Xpro </td><td> PC01 </td><td> SW0 </td></tr>
|
||||
* <tr><td> SAM DA1 Xpro </td><td> PB30 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM DA1 Xpro </td><td> PA15 </td><td> SW0 </td></tr>
|
||||
* <tr><td> SAM C21 Xpro </td><td> PA15 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM C21 Xpro </td><td> PA28 </td><td> SW0 </td></tr>
|
||||
* <tr><td> SAM HA1G16A Xpro </td><td> PA04 </td><td> NULL </td></tr>
|
||||
* <tr><td> SAM HA1G16A Xpro </td><td> PB03 </td><td> SW0 </td></tr>
|
||||
* </table>
|
||||
*
|
||||
* The TCC module will be set up as follows:
|
||||
* - GCLK generator 0 (GCLK main) clock source
|
||||
* - Use double buffering write when set top, compare, or pattern through API
|
||||
* - No dithering on the counter or compare
|
||||
* - No prescaler
|
||||
* - Single Slope PWM wave generation
|
||||
* - GCLK reload action
|
||||
* - Don't run in standby
|
||||
* - No waveform extentions
|
||||
* - No inversion of waveform output
|
||||
* - No capture enabled
|
||||
* - Count upward
|
||||
* - Don't perform one-shot operations
|
||||
* - No event input except TCC event0 enabled
|
||||
* - No event action except TCC event0 acts as Non-Recoverable Fault
|
||||
* - No event generation enabled
|
||||
* - Counter starts on 0
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_faultx_use_case_setup Quick Start
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_faultx_use_case_prereq Prerequisites
|
||||
* There are no prerequisites for this use case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_faultx_use_case_setup_code Code
|
||||
*
|
||||
* Add to the main application source file, before any functions:
|
||||
* - SAM D21 Xplained Pro
|
||||
* \snippet samd21_xplained_pro/conf_quick_start_faultx.h definition_pwm
|
||||
* \snippet samd21_xplained_pro/conf_quick_start_faultx.h definition_fault
|
||||
* - SAM R21 Xplained Pro
|
||||
* \snippet samr21_xplained_pro/conf_quick_start_faultx.h definition_pwm
|
||||
* \snippet samr21_xplained_pro/conf_quick_start_faultx.h definition_fault
|
||||
* - SAM L21 Xplained Pro
|
||||
* \snippet saml21_xplained_pro/conf_quick_start_faultx.h definition_pwm
|
||||
* \snippet saml21_xplained_pro/conf_quick_start_faultx.h definition_fault
|
||||
* - SAM L22 Xplained Pro
|
||||
* \snippet saml22_xplained_pro/conf_quick_start_faultx.h definition_pwm
|
||||
* \snippet saml22_xplained_pro/conf_quick_start_faultx.h definition_fault
|
||||
* - SAM DA1 Xplained Pro
|
||||
* \snippet samda1_xplained_pro/conf_quick_start_faultx.h definition_pwm
|
||||
* \snippet samda1_xplained_pro/conf_quick_start_faultx.h definition_fault
|
||||
* - SAM C21 Xplained Pro
|
||||
* \snippet samc21_xplained_pro/conf_quick_start_faultx.h definition_pwm
|
||||
* \snippet samc21_xplained_pro/conf_quick_start_faultx.h definition_fault
|
||||
* - SAM HA1G16A Xplained Pro:
|
||||
* \snippet samha1g16a_xplained_pro/conf_quick_start_faultx.h definition_pwm
|
||||
* \snippet samha1g16a_xplained_pro/conf_quick_start_faultx.h definition_fault
|
||||
*
|
||||
* Add to the main application source file, before any functions:
|
||||
* \snippet qs_tcc_faultx.c additional_include
|
||||
*
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_tcc_faultx.c module_inst
|
||||
* \snippet qs_tcc_faultx.c events_resource
|
||||
*
|
||||
* Copy-paste the following callback function code to your user application:
|
||||
* \snippet qs_tcc_faultx.c callback_funcs
|
||||
* \snippet qs_tcc_faultx.c callback_eic
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_tcc_faultx.c setup
|
||||
* \snippet qs_tcc_faultx.c config_eic
|
||||
* \snippet qs_tcc_faultx.c config_event
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_tcc_faultx.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_faultx_use_case_setup_flow Workflow
|
||||
* \subsubsection asfdoc_sam0_tcc_faultx_use_case_setup_flow_tcc Configure TCC
|
||||
* -# Create a module software instance struct for the TCC module to store
|
||||
* the TCC driver state while it is in use.
|
||||
* \snippet qs_tcc_faultx.c module_inst
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
*
|
||||
* -# Create a TCC module configuration struct, which can be filled out to
|
||||
* adjust the configuration of a physical TCC peripheral.
|
||||
* \snippet qs_tcc_faultx.c setup_config
|
||||
* -# Initialize the TCC configuration struct with the module's default values.
|
||||
* \snippet qs_tcc_faultx.c setup_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Alter the TCC settings to configure the counter width, wave generation
|
||||
* mode, and the compare channel 0 value and fault options. Here the
|
||||
* Non-Recoverable Fault output is enabled and set to high level (1).
|
||||
* \snippet qs_tcc_faultx.c setup_change_config
|
||||
* \snippet qs_tcc_faultx.c setup_change_config_faults
|
||||
* -# Alter the TCC settings to configure the PWM output on a physical device
|
||||
* pin.
|
||||
* \snippet qs_tcc_faultx.c setup_change_config_pwm
|
||||
* -# Configure the TCC module with the desired settings.
|
||||
* \snippet qs_tcc_faultx.c setup_set_config
|
||||
*
|
||||
* -# Create a TCC events configuration struct, which can be filled out to
|
||||
* enable/disable events and configure event settings. Reset all fields
|
||||
* to zero.
|
||||
* \snippet qs_tcc_faultx.c setup_events
|
||||
* -# Alter the TCC events settings to enable/disable desired events, to
|
||||
* change event generating options and modify event actions. Here TCC
|
||||
* event0 will act as Non-Recoverable Fault input.
|
||||
* \snippet qs_tcc_faultx.c setup_change_events_faults
|
||||
* -# Enable and apply events settings.
|
||||
* \snippet qs_tcc_faultx.c setup_events_enable
|
||||
*
|
||||
* -# Enable the TCC module to start the timer and begin PWM signal generation.
|
||||
* \snippet qs_tcc_faultx.c setup_enable
|
||||
*
|
||||
* -# Register the Compare Channel 0 Match callback functions with the driver.
|
||||
* \snippet qs_tcc_faultx.c setup_register_callback
|
||||
* -# Enable the Compare Channel 0 Match callback so that it will be called by
|
||||
* the driver when appropriate.
|
||||
* \snippet qs_tcc_faultx.c setup_enable_callback
|
||||
*
|
||||
* \subsubsection asfdoc_sam0_tcc_faultx_use_case_setup_flow_eic Configure EXTINT for fault input
|
||||
* -# Create an EXTINT module channel configuration struct, which can be filled
|
||||
* out to adjust the configuration of a single external interrupt channel.
|
||||
* \snippet qs_tcc_faultx.c eic_setup_1
|
||||
* -# Initialize the channel configuration struct with the module's default
|
||||
* values.
|
||||
* \snippet qs_tcc_faultx.c eic_setup_2
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Adjust the configuration struct to configure the pin MUX (to route the
|
||||
* desired physical pin to the logical channel) to the board button, and to
|
||||
* configure the channel to detect both rising and falling edges.
|
||||
* \snippet qs_tcc_faultx.c eic_setup_3
|
||||
* -# Configure external interrupt channel with the desired channel settings.
|
||||
* \snippet qs_tcc_faultx.c eic_setup_4
|
||||
*
|
||||
* -# Create a TXTINT events configuration struct, which can be filled out to
|
||||
* enable/disable events. Reset all fields to zero.
|
||||
* \snippet qs_tcc_faultx.c eic_event_setup_1
|
||||
* -# Adjust the configuration struct, set the channels to be enabled to
|
||||
* \c true. Here the channel to the board button is used.
|
||||
* \snippet qs_tcc_faultx.c eic_event_setup_2
|
||||
* -# Enable the events.
|
||||
* \snippet qs_tcc_faultx.c eic_event_setup_3
|
||||
*
|
||||
* -# Define the EXTINT callback that will be fired when a detection event
|
||||
* occurs. For this example, when fault line is released, the TCC fault
|
||||
* state is cleared to go on PWM generating.
|
||||
* \snippet qs_tcc_faultx.c callback_eic
|
||||
* -# Register a callback function \c eic_callback_to_clear_halt() to handle
|
||||
* detections from the External Interrupt Controller (EIC).
|
||||
* \snippet qs_tcc_faultx.c eic_callback_setup_1
|
||||
* -# Enable the registered callback function for the configured External
|
||||
* Interrupt channel, so that it will be called by the module when the
|
||||
* channel detects an edge.
|
||||
* \snippet qs_tcc_faultx.c eic_callback_setup_2
|
||||
*
|
||||
* \subsubsection asfdoc_sam0_tcc_faultx_use_case_setup_flow_evt Configure EVENTS for fault input
|
||||
* -# Create an event resource instance struct for the EVENTS module to store.
|
||||
* \snippet qs_tcc_faultx.c events_resource
|
||||
* \note This should never go out of scope as long as the resource is in use.
|
||||
* In most cases, this should be global.
|
||||
* -# Create an event channel configuration struct, which can be filled out to
|
||||
* adjust the configuration of a single event channel.
|
||||
* \snippet qs_tcc_faultx.c event_setup_1
|
||||
* -# Initialize the event channel configuration struct with the module's
|
||||
* default values.
|
||||
* \snippet qs_tcc_faultx.c event_setup_2
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Adjust the configuration struct to request that the channel will be attached
|
||||
* to the specified event generator, and that the asynchronous event path will
|
||||
* be used. Here the EIC channel connected to board button is the event
|
||||
* generator.
|
||||
* \snippet qs_tcc_faultx.c event_setup_3
|
||||
* -# Allocate and configure the channel using the configuration structure.
|
||||
* \snippet qs_tcc_faultx.c event_setup_4
|
||||
* \note The existing configuration struct may be re-used, as long as any
|
||||
* values that have been altered from the default settings are taken
|
||||
* into account by the user application.
|
||||
*
|
||||
* -# Attach a user to the channel. Here the user is TCC event0, which has been
|
||||
* configured as input of Non-Recoverable Fault.
|
||||
* \snippet qs_tcc_faultx.c event_setup_5
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_faultx_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_faultx_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_tcc_callback.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_faultx_use_case_main_flow Workflow
|
||||
* -# Enter an infinite loop while the PWM wave is generated via the TCC module.
|
||||
* \snippet qs_tcc_callback.c main_loop
|
||||
*/
|
||||
|
||||
|
||||
#include <asf.h>
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM TCC - Timer Counter for Control Applications Callback Driver Quick Start (with Non-Recoverable Fault)
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_tcc_faultx_use_case Quick Start Guide for TCC - Non-Recoverable Fault
|
||||
*
|
||||
* The supported kit list:
|
||||
* - SAM D21/R21/L21/L22/DA1/C21/HA1G16A Xplained Pro
|
||||
*
|
||||
* In this use case, the TCC will be used to generate a PWM signal, with a
|
||||
* varying duty cycle. Here the pulse width is increased each time the timer
|
||||
* count matches the set compare value. There is a non-recoverable fault input
|
||||
* which controls PWM output. When this fault is active (low) the PWM output
|
||||
* will be forced to be high. When fault is released (input high) the PWM
|
||||
* output will go on.
|
||||
*
|
||||
* When the PWM signal connects to LED, LED will light. If fault input is from
|
||||
* a button, the LED will be off when the button is down and on when the button
|
||||
* is up. To see the PWM waveform, you may need an oscilloscope.
|
||||
*
|
||||
* SAMHA1G16A Xpro LED is PA00 which isn't connected out, use PA04 instead,
|
||||
* so we can't see LED blink but only see the waveform from oscilloscope.
|
||||
|
||||
* The PWM output and fault input is set up as follows:
|
||||
* <table>
|
||||
* <tr><th> Board </td><th> Pin </td><th> Connect to </td></tr>
|
||||
* <tr><td> SAM D21 Xpro </td><td> PB30 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM D21 Xpro </td><td> PA15 </td><td> SW0 </td></tr>
|
||||
* <tr><td> SAM R21 Xpro </td><td> PA19 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM R21 Xpro </td><td> PA28 </td><td> SW0 </td></tr>
|
||||
* <tr><td> SAM L21 Xpro </td><td> PB10 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM L21 Xpro </td><td> PA16 </td><td> SW0 </td></tr>
|
||||
* <tr><td> SAM L22 Xpro </td><td> PC27 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM L22 Xpro </td><td> PC01 </td><td> SW0 </td></tr>
|
||||
* <tr><td> SAM DA1 Xpro </td><td> PB30 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM DA1 Xpro </td><td> PA15 </td><td> SW0 </td></tr>
|
||||
* <tr><td> SAM C21 Xpro </td><td> PA15 </td><td> LED0 </td></tr>
|
||||
* <tr><td> SAM C21 Xpro </td><td> PA28 </td><td> SW0 </td></tr>
|
||||
* <tr><td> SAM HA1G16A Xpro </td><td> PA04 </td><td> NULL </td></tr>
|
||||
* <tr><td> SAM HA1G16A Xpro </td><td> PB03 </td><td> SW0 </td></tr>
|
||||
* </table>
|
||||
*
|
||||
* The TCC module will be set up as follows:
|
||||
* - GCLK generator 0 (GCLK main) clock source
|
||||
* - Use double buffering write when set top, compare, or pattern through API
|
||||
* - No dithering on the counter or compare
|
||||
* - No prescaler
|
||||
* - Single Slope PWM wave generation
|
||||
* - GCLK reload action
|
||||
* - Don't run in standby
|
||||
* - No waveform extentions
|
||||
* - No inversion of waveform output
|
||||
* - No capture enabled
|
||||
* - Count upward
|
||||
* - Don't perform one-shot operations
|
||||
* - No event input except TCC event0 enabled
|
||||
* - No event action except TCC event0 acts as Non-Recoverable Fault
|
||||
* - No event generation enabled
|
||||
* - Counter starts on 0
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_faultx_use_case_setup Quick Start
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_faultx_use_case_prereq Prerequisites
|
||||
* There are no prerequisites for this use case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_faultx_use_case_setup_code Code
|
||||
*
|
||||
* Add to the main application source file, before any functions:
|
||||
* - SAM D21 Xplained Pro
|
||||
* \snippet samd21_xplained_pro/conf_quick_start_faultx.h definition_pwm
|
||||
* \snippet samd21_xplained_pro/conf_quick_start_faultx.h definition_fault
|
||||
* - SAM R21 Xplained Pro
|
||||
* \snippet samr21_xplained_pro/conf_quick_start_faultx.h definition_pwm
|
||||
* \snippet samr21_xplained_pro/conf_quick_start_faultx.h definition_fault
|
||||
* - SAM L21 Xplained Pro
|
||||
* \snippet saml21_xplained_pro/conf_quick_start_faultx.h definition_pwm
|
||||
* \snippet saml21_xplained_pro/conf_quick_start_faultx.h definition_fault
|
||||
* - SAM L22 Xplained Pro
|
||||
* \snippet saml22_xplained_pro/conf_quick_start_faultx.h definition_pwm
|
||||
* \snippet saml22_xplained_pro/conf_quick_start_faultx.h definition_fault
|
||||
* - SAM DA1 Xplained Pro
|
||||
* \snippet samda1_xplained_pro/conf_quick_start_faultx.h definition_pwm
|
||||
* \snippet samda1_xplained_pro/conf_quick_start_faultx.h definition_fault
|
||||
* - SAM C21 Xplained Pro
|
||||
* \snippet samc21_xplained_pro/conf_quick_start_faultx.h definition_pwm
|
||||
* \snippet samc21_xplained_pro/conf_quick_start_faultx.h definition_fault
|
||||
* - SAM HA1G16A Xplained Pro:
|
||||
* \snippet samha1g16a_xplained_pro/conf_quick_start_faultx.h definition_pwm
|
||||
* \snippet samha1g16a_xplained_pro/conf_quick_start_faultx.h definition_fault
|
||||
*
|
||||
* Add to the main application source file, before any functions:
|
||||
* \snippet qs_tcc_faultx.c additional_include
|
||||
*
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_tcc_faultx.c module_inst
|
||||
* \snippet qs_tcc_faultx.c events_resource
|
||||
*
|
||||
* Copy-paste the following callback function code to your user application:
|
||||
* \snippet qs_tcc_faultx.c callback_funcs
|
||||
* \snippet qs_tcc_faultx.c callback_eic
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_tcc_faultx.c setup
|
||||
* \snippet qs_tcc_faultx.c config_eic
|
||||
* \snippet qs_tcc_faultx.c config_event
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_tcc_faultx.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_faultx_use_case_setup_flow Workflow
|
||||
* \subsubsection asfdoc_sam0_tcc_faultx_use_case_setup_flow_tcc Configure TCC
|
||||
* -# Create a module software instance struct for the TCC module to store
|
||||
* the TCC driver state while it is in use.
|
||||
* \snippet qs_tcc_faultx.c module_inst
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
*
|
||||
* -# Create a TCC module configuration struct, which can be filled out to
|
||||
* adjust the configuration of a physical TCC peripheral.
|
||||
* \snippet qs_tcc_faultx.c setup_config
|
||||
* -# Initialize the TCC configuration struct with the module's default values.
|
||||
* \snippet qs_tcc_faultx.c setup_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Alter the TCC settings to configure the counter width, wave generation
|
||||
* mode, and the compare channel 0 value and fault options. Here the
|
||||
* Non-Recoverable Fault output is enabled and set to high level (1).
|
||||
* \snippet qs_tcc_faultx.c setup_change_config
|
||||
* \snippet qs_tcc_faultx.c setup_change_config_faults
|
||||
* -# Alter the TCC settings to configure the PWM output on a physical device
|
||||
* pin.
|
||||
* \snippet qs_tcc_faultx.c setup_change_config_pwm
|
||||
* -# Configure the TCC module with the desired settings.
|
||||
* \snippet qs_tcc_faultx.c setup_set_config
|
||||
*
|
||||
* -# Create a TCC events configuration struct, which can be filled out to
|
||||
* enable/disable events and configure event settings. Reset all fields
|
||||
* to zero.
|
||||
* \snippet qs_tcc_faultx.c setup_events
|
||||
* -# Alter the TCC events settings to enable/disable desired events, to
|
||||
* change event generating options and modify event actions. Here TCC
|
||||
* event0 will act as Non-Recoverable Fault input.
|
||||
* \snippet qs_tcc_faultx.c setup_change_events_faults
|
||||
* -# Enable and apply events settings.
|
||||
* \snippet qs_tcc_faultx.c setup_events_enable
|
||||
*
|
||||
* -# Enable the TCC module to start the timer and begin PWM signal generation.
|
||||
* \snippet qs_tcc_faultx.c setup_enable
|
||||
*
|
||||
* -# Register the Compare Channel 0 Match callback functions with the driver.
|
||||
* \snippet qs_tcc_faultx.c setup_register_callback
|
||||
* -# Enable the Compare Channel 0 Match callback so that it will be called by
|
||||
* the driver when appropriate.
|
||||
* \snippet qs_tcc_faultx.c setup_enable_callback
|
||||
*
|
||||
* \subsubsection asfdoc_sam0_tcc_faultx_use_case_setup_flow_eic Configure EXTINT for fault input
|
||||
* -# Create an EXTINT module channel configuration struct, which can be filled
|
||||
* out to adjust the configuration of a single external interrupt channel.
|
||||
* \snippet qs_tcc_faultx.c eic_setup_1
|
||||
* -# Initialize the channel configuration struct with the module's default
|
||||
* values.
|
||||
* \snippet qs_tcc_faultx.c eic_setup_2
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Adjust the configuration struct to configure the pin MUX (to route the
|
||||
* desired physical pin to the logical channel) to the board button, and to
|
||||
* configure the channel to detect both rising and falling edges.
|
||||
* \snippet qs_tcc_faultx.c eic_setup_3
|
||||
* -# Configure external interrupt channel with the desired channel settings.
|
||||
* \snippet qs_tcc_faultx.c eic_setup_4
|
||||
*
|
||||
* -# Create a TXTINT events configuration struct, which can be filled out to
|
||||
* enable/disable events. Reset all fields to zero.
|
||||
* \snippet qs_tcc_faultx.c eic_event_setup_1
|
||||
* -# Adjust the configuration struct, set the channels to be enabled to
|
||||
* \c true. Here the channel to the board button is used.
|
||||
* \snippet qs_tcc_faultx.c eic_event_setup_2
|
||||
* -# Enable the events.
|
||||
* \snippet qs_tcc_faultx.c eic_event_setup_3
|
||||
*
|
||||
* -# Define the EXTINT callback that will be fired when a detection event
|
||||
* occurs. For this example, when fault line is released, the TCC fault
|
||||
* state is cleared to go on PWM generating.
|
||||
* \snippet qs_tcc_faultx.c callback_eic
|
||||
* -# Register a callback function \c eic_callback_to_clear_halt() to handle
|
||||
* detections from the External Interrupt Controller (EIC).
|
||||
* \snippet qs_tcc_faultx.c eic_callback_setup_1
|
||||
* -# Enable the registered callback function for the configured External
|
||||
* Interrupt channel, so that it will be called by the module when the
|
||||
* channel detects an edge.
|
||||
* \snippet qs_tcc_faultx.c eic_callback_setup_2
|
||||
*
|
||||
* \subsubsection asfdoc_sam0_tcc_faultx_use_case_setup_flow_evt Configure EVENTS for fault input
|
||||
* -# Create an event resource instance struct for the EVENTS module to store.
|
||||
* \snippet qs_tcc_faultx.c events_resource
|
||||
* \note This should never go out of scope as long as the resource is in use.
|
||||
* In most cases, this should be global.
|
||||
* -# Create an event channel configuration struct, which can be filled out to
|
||||
* adjust the configuration of a single event channel.
|
||||
* \snippet qs_tcc_faultx.c event_setup_1
|
||||
* -# Initialize the event channel configuration struct with the module's
|
||||
* default values.
|
||||
* \snippet qs_tcc_faultx.c event_setup_2
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Adjust the configuration struct to request that the channel will be attached
|
||||
* to the specified event generator, and that the asynchronous event path will
|
||||
* be used. Here the EIC channel connected to board button is the event
|
||||
* generator.
|
||||
* \snippet qs_tcc_faultx.c event_setup_3
|
||||
* -# Allocate and configure the channel using the configuration structure.
|
||||
* \snippet qs_tcc_faultx.c event_setup_4
|
||||
* \note The existing configuration struct may be re-used, as long as any
|
||||
* values that have been altered from the default settings are taken
|
||||
* into account by the user application.
|
||||
*
|
||||
* -# Attach a user to the channel. Here the user is TCC event0, which has been
|
||||
* configured as input of Non-Recoverable Fault.
|
||||
* \snippet qs_tcc_faultx.c event_setup_5
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_faultx_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_faultx_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_tcc_callback.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_faultx_use_case_main_flow Workflow
|
||||
* -# Enter an infinite loop while the PWM wave is generated via the TCC module.
|
||||
* \snippet qs_tcc_callback.c main_loop
|
||||
*/
|
||||
|
||||
|
||||
#include <asf.h>
|
||||
#include <conf_clocks.h>
|
||||
@ -1,137 +1,137 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM TCC - Timer Counter for Control Applications Driver Quick Start
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_tcc_timer_use_case Quick Start Guide for TCC - Timer
|
||||
*
|
||||
* The supported board list:
|
||||
* - SAM D21/R21/L21/L22/DA1/C21/HA1G16A Xplained Pro
|
||||
* - SAM D11 Xplained Pro
|
||||
*
|
||||
* In this use case, the TCC will be used as a timer, to generate overflow and
|
||||
* compare match callbacks. In the callbacks the on-board LED is toggled.
|
||||
*
|
||||
* The TCC module will be set up as follows:
|
||||
* - GCLK generator 1 (GCLK 32K) clock source
|
||||
* - Use double buffering write when set top, compare, or pattern through API
|
||||
* - No dithering on the counter or compare
|
||||
* - Prescaler is divided by 64
|
||||
* - GCLK reload action
|
||||
* - Count upward
|
||||
* - Don't run in standby
|
||||
* - No waveform outputs
|
||||
* - No capture enabled
|
||||
* - Don't perform one-shot operations
|
||||
* - No event input enabled
|
||||
* - No event action
|
||||
* - No event generation enabled
|
||||
* - Counter starts on 0
|
||||
* - Counter top set to 2000 (about 4s) and generate overflow callback
|
||||
* - Channel 0 is set to compare and match value 900 and generate callback
|
||||
* - Channel 1 is set to compare and match value 930 and generate callback
|
||||
* - Channel 2 is set to compare and match value 1100 and generate callback
|
||||
* - Channel 3 is set to compare and match value 1250 and generate callback
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_timer_use_case_setup Quick Start
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_timer_use_case_prereq Prerequisites
|
||||
* For this use case, XOSC32K/OSC32K should be enabled and available through GCLK
|
||||
* generator 1 clock source selection. Within Atmel Software Framework (ASF)
|
||||
* it can be done through modifying <i>conf_clocks.h</i>.
|
||||
* See \ref asfdoc_sam0_system_clock_group "System Clock Management Driver" for
|
||||
* more details about clock configuration.
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_timer_use_case_setup_code Code
|
||||
*
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_tcc_timer.c module_inst
|
||||
*
|
||||
* Copy-paste the following callback function code to your user application:
|
||||
* \snippet qs_tcc_timer.c callback_funcs
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_tcc_timer.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_tcc_timer.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_timer_use_case_setup_flow Workflow
|
||||
* -# Create a module software instance structure for the TCC module to store
|
||||
* the TCC driver state while it is in use.
|
||||
* \snippet qs_tcc_timer.c module_inst
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
*
|
||||
* -# Configure the TCC module.
|
||||
* -# Create a TCC module configuration struct, which can be filled out to
|
||||
* adjust the configuration of a physical TCC peripheral.
|
||||
* \snippet qs_tcc_timer.c setup_config
|
||||
* -# Initialize the TCC configuration struct with the module's default values.
|
||||
* \snippet qs_tcc_timer.c setup_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Alter the TCC settings to configure the GCLK source, prescaler, period,
|
||||
* and compare channel values.
|
||||
* \snippet qs_tcc_timer.c setup_change_config
|
||||
* -# Configure the TCC module with the desired settings.
|
||||
* \snippet qs_tcc_timer.c setup_set_config
|
||||
* -# Enable the TCC module to start the timer.
|
||||
* \snippet qs_tcc_timer.c setup_enable
|
||||
* -# Configure the TCC callbacks.
|
||||
* -# Register the Overflow and Compare Channel Match callback functions with
|
||||
* the driver.
|
||||
* \snippet qs_tcc_timer.c setup_register_callback
|
||||
* -# Enable the Overflow and Compare Channel Match callbacks so that it will
|
||||
* be called by the driver when appropriate.
|
||||
* \snippet qs_tcc_timer.c setup_enable_callback
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_timer_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_timer_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_tcc_timer.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_timer_use_case_main_flow Workflow
|
||||
* -# Enter an infinite loop while the timer is running.
|
||||
* \snippet qs_tcc_timer.c main_loop
|
||||
*/
|
||||
|
||||
|
||||
#include <asf.h>
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM TCC - Timer Counter for Control Applications Driver Quick Start
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_tcc_timer_use_case Quick Start Guide for TCC - Timer
|
||||
*
|
||||
* The supported board list:
|
||||
* - SAM D21/R21/L21/L22/DA1/C21/HA1G16A Xplained Pro
|
||||
* - SAM D11 Xplained Pro
|
||||
*
|
||||
* In this use case, the TCC will be used as a timer, to generate overflow and
|
||||
* compare match callbacks. In the callbacks the on-board LED is toggled.
|
||||
*
|
||||
* The TCC module will be set up as follows:
|
||||
* - GCLK generator 1 (GCLK 32K) clock source
|
||||
* - Use double buffering write when set top, compare, or pattern through API
|
||||
* - No dithering on the counter or compare
|
||||
* - Prescaler is divided by 64
|
||||
* - GCLK reload action
|
||||
* - Count upward
|
||||
* - Don't run in standby
|
||||
* - No waveform outputs
|
||||
* - No capture enabled
|
||||
* - Don't perform one-shot operations
|
||||
* - No event input enabled
|
||||
* - No event action
|
||||
* - No event generation enabled
|
||||
* - Counter starts on 0
|
||||
* - Counter top set to 2000 (about 4s) and generate overflow callback
|
||||
* - Channel 0 is set to compare and match value 900 and generate callback
|
||||
* - Channel 1 is set to compare and match value 930 and generate callback
|
||||
* - Channel 2 is set to compare and match value 1100 and generate callback
|
||||
* - Channel 3 is set to compare and match value 1250 and generate callback
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_timer_use_case_setup Quick Start
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_timer_use_case_prereq Prerequisites
|
||||
* For this use case, XOSC32K/OSC32K should be enabled and available through GCLK
|
||||
* generator 1 clock source selection. Within Atmel Software Framework (ASF)
|
||||
* it can be done through modifying <i>conf_clocks.h</i>.
|
||||
* See \ref asfdoc_sam0_system_clock_group "System Clock Management Driver" for
|
||||
* more details about clock configuration.
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_timer_use_case_setup_code Code
|
||||
*
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_tcc_timer.c module_inst
|
||||
*
|
||||
* Copy-paste the following callback function code to your user application:
|
||||
* \snippet qs_tcc_timer.c callback_funcs
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_tcc_timer.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_tcc_timer.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_timer_use_case_setup_flow Workflow
|
||||
* -# Create a module software instance structure for the TCC module to store
|
||||
* the TCC driver state while it is in use.
|
||||
* \snippet qs_tcc_timer.c module_inst
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
*
|
||||
* -# Configure the TCC module.
|
||||
* -# Create a TCC module configuration struct, which can be filled out to
|
||||
* adjust the configuration of a physical TCC peripheral.
|
||||
* \snippet qs_tcc_timer.c setup_config
|
||||
* -# Initialize the TCC configuration struct with the module's default values.
|
||||
* \snippet qs_tcc_timer.c setup_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Alter the TCC settings to configure the GCLK source, prescaler, period,
|
||||
* and compare channel values.
|
||||
* \snippet qs_tcc_timer.c setup_change_config
|
||||
* -# Configure the TCC module with the desired settings.
|
||||
* \snippet qs_tcc_timer.c setup_set_config
|
||||
* -# Enable the TCC module to start the timer.
|
||||
* \snippet qs_tcc_timer.c setup_enable
|
||||
* -# Configure the TCC callbacks.
|
||||
* -# Register the Overflow and Compare Channel Match callback functions with
|
||||
* the driver.
|
||||
* \snippet qs_tcc_timer.c setup_register_callback
|
||||
* -# Enable the Overflow and Compare Channel Match callbacks so that it will
|
||||
* be called by the driver when appropriate.
|
||||
* \snippet qs_tcc_timer.c setup_enable_callback
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_tcc_timer_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_timer_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_tcc_timer.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_tcc_timer_use_case_main_flow Workflow
|
||||
* -# Enter an infinite loop while the timer is running.
|
||||
* \snippet qs_tcc_timer.c main_loop
|
||||
*/
|
||||
|
||||
|
||||
#include <asf.h>
|
||||
#include <conf_clocks.h>
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,235 +1,235 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM TCC - Timer Counter for Control Applications Callback Driver
|
||||
*
|
||||
* Copyright (c) 2013-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
#include "tcc_callback.h"
|
||||
|
||||
void *_tcc_instances[TCC_INST_NUM];
|
||||
|
||||
void _tcc_interrupt_handler(uint8_t module_index);
|
||||
|
||||
const uint32_t _tcc_intflag[TCC_CALLBACK_N] = {
|
||||
TCC_INTFLAG_OVF,
|
||||
TCC_INTFLAG_TRG,
|
||||
TCC_INTFLAG_CNT,
|
||||
TCC_INTFLAG_ERR,
|
||||
TCC_INTFLAG_FAULTA,
|
||||
TCC_INTFLAG_FAULTB,
|
||||
TCC_INTFLAG_FAULT0,
|
||||
TCC_INTFLAG_FAULT1,
|
||||
#define _TCC_INTFLAG_MC(n,dummy) TCC_INTFLAG_MC##n,
|
||||
/* TCC_INTFLAG_MC0 ~ ... */
|
||||
MREPEAT(TCC_NUM_CHANNELS, _TCC_INTFLAG_MC, 0)
|
||||
#undef _TCC_INTFLAG_MC
|
||||
};
|
||||
|
||||
# define _TCC_INTERRUPT_VECT_NUM(n, unused) \
|
||||
SYSTEM_INTERRUPT_MODULE_TCC##n,
|
||||
/**
|
||||
* \internal Get the interrupt vector for the given device instance
|
||||
*
|
||||
* \param[in] The TCC module instance number
|
||||
*
|
||||
* \return Interrupt vector for of the given TCC module instance.
|
||||
*/
|
||||
static enum system_interrupt_vector _tcc_interrupt_get_interrupt_vector(
|
||||
uint32_t inst_num)
|
||||
{
|
||||
static uint8_t tcc_interrupt_vectors[TCC_INST_NUM] = {
|
||||
MREPEAT(TCC_INST_NUM, _TCC_INTERRUPT_VECT_NUM, 0)
|
||||
};
|
||||
|
||||
return (enum system_interrupt_vector)tcc_interrupt_vectors[inst_num];
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Registers a callback
|
||||
*
|
||||
* Registers a callback function which is implemented by the user.
|
||||
*
|
||||
* \note The callback must be enabled by \ref tcc_enable_callback,
|
||||
* in order for the interrupt handler to call it when the conditions for the
|
||||
* callback type is met.
|
||||
*
|
||||
* \param[in] module Pointer to TCC software instance struct
|
||||
* \param[in] callback_func Pointer to callback function
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*/
|
||||
enum status_code tcc_register_callback(
|
||||
struct tcc_module *const module,
|
||||
tcc_callback_t callback_func,
|
||||
const enum tcc_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
Assert(callback_func);
|
||||
|
||||
/* Register callback function */
|
||||
module->callback[callback_type] = callback_func;
|
||||
|
||||
/* Set the bit corresponding to the callback_type */
|
||||
module->register_callback_mask |= _tcc_intflag[callback_type];
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Unregisters a callback
|
||||
*
|
||||
* Unregisters a callback function implemented by the user. The callback should
|
||||
* be disabled before it is unregistered.
|
||||
*
|
||||
* \param[in] module Pointer to TCC software instance struct
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*/
|
||||
enum status_code tcc_unregister_callback(
|
||||
struct tcc_module *const module,
|
||||
const enum tcc_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
|
||||
/* Unregister callback function */
|
||||
module->callback[callback_type] = NULL;
|
||||
|
||||
/* Clear the bit corresponding to the callback_type */
|
||||
module->register_callback_mask &= ~_tcc_intflag[callback_type];
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Enables callback
|
||||
*
|
||||
* Enables the callback function registered by the \ref
|
||||
* tcc_register_callback. The callback function will be called from the
|
||||
* interrupt handler when the conditions for the callback type are
|
||||
* met. This function will also enable the appropriate interrupts.
|
||||
*
|
||||
* \param[in] module Pointer to TCC software instance struct
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*/
|
||||
void tcc_enable_callback(
|
||||
struct tcc_module *const module,
|
||||
const enum tcc_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
Assert(module->hw);
|
||||
|
||||
/* Enable interrupts for this TCC module */
|
||||
system_interrupt_enable(_tcc_interrupt_get_interrupt_vector(
|
||||
_tcc_get_inst_index(module->hw)));
|
||||
|
||||
/* Enable channel or other callbacks */
|
||||
module->enable_callback_mask |= _tcc_intflag[callback_type];
|
||||
module->hw->INTENSET.reg = _tcc_intflag[callback_type];
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disables callback
|
||||
*
|
||||
* Disables the callback function registered by the \ref
|
||||
* tcc_register_callback, and the callback will not be called from the
|
||||
* interrupt routine. The function will also disable the appropriate
|
||||
* interrupts.
|
||||
*
|
||||
* \param[in] module Pointer to TCC software instance struct
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*/
|
||||
void tcc_disable_callback(
|
||||
struct tcc_module *const module,
|
||||
const enum tcc_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
Assert(module->hw);
|
||||
|
||||
/* Disable interrupts for this TCC module */
|
||||
system_interrupt_disable(_tcc_interrupt_get_interrupt_vector(
|
||||
_tcc_get_inst_index(module->hw)));
|
||||
|
||||
/* Disable channel or other callbacks */
|
||||
module->enable_callback_mask &= ~_tcc_intflag[callback_type];
|
||||
module->hw->INTENCLR.reg = _tcc_intflag[callback_type];
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* \internal ISR handler for TCC
|
||||
*
|
||||
* Auto-generate a set of interrupt handlers for each TCC in the device.
|
||||
*/
|
||||
#define _TCC_INTERRUPT_HANDLER(n, m) \
|
||||
void TCC##n##_Handler(void) \
|
||||
{ \
|
||||
_tcc_interrupt_handler(n); \
|
||||
}
|
||||
|
||||
MREPEAT(TCC_INST_NUM, _TCC_INTERRUPT_HANDLER, 0)
|
||||
|
||||
/**
|
||||
* \internal Interrupt handler for the TCC module
|
||||
*
|
||||
* Handles interrupts as they occur, it will run the callback functions
|
||||
* that are registered and enabled.
|
||||
*
|
||||
* \param[in] module_index ID of the TCC instance calling the interrupt
|
||||
* handler
|
||||
*/
|
||||
void _tcc_interrupt_handler(
|
||||
uint8_t module_index)
|
||||
{
|
||||
int i;
|
||||
|
||||
uint32_t interrupt_and_callback_status_mask;
|
||||
|
||||
struct tcc_module *module =
|
||||
(struct tcc_module *)_tcc_instances[module_index];
|
||||
|
||||
interrupt_and_callback_status_mask = (module->hw->INTFLAG.reg &
|
||||
module->register_callback_mask &
|
||||
module->enable_callback_mask);
|
||||
|
||||
/* Check if callback interrupt has occured */
|
||||
for (i = 0; i < TCC_CALLBACK_N; i ++) {
|
||||
if (interrupt_and_callback_status_mask & _tcc_intflag[i]) {
|
||||
/* Invoke the registered and enabled callback function */
|
||||
(module->callback[i])(module);
|
||||
/* Clear interrupt flag */
|
||||
module->hw->INTFLAG.reg = _tcc_intflag[i];
|
||||
}
|
||||
}
|
||||
}
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM TCC - Timer Counter for Control Applications Callback Driver
|
||||
*
|
||||
* Copyright (c) 2013-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
#include "tcc_callback.h"
|
||||
|
||||
void *_tcc_instances[TCC_INST_NUM];
|
||||
|
||||
void _tcc_interrupt_handler(uint8_t module_index);
|
||||
|
||||
const uint32_t _tcc_intflag[TCC_CALLBACK_N] = {
|
||||
TCC_INTFLAG_OVF,
|
||||
TCC_INTFLAG_TRG,
|
||||
TCC_INTFLAG_CNT,
|
||||
TCC_INTFLAG_ERR,
|
||||
TCC_INTFLAG_FAULTA,
|
||||
TCC_INTFLAG_FAULTB,
|
||||
TCC_INTFLAG_FAULT0,
|
||||
TCC_INTFLAG_FAULT1,
|
||||
#define _TCC_INTFLAG_MC(n,dummy) TCC_INTFLAG_MC##n,
|
||||
/* TCC_INTFLAG_MC0 ~ ... */
|
||||
MREPEAT(TCC_NUM_CHANNELS, _TCC_INTFLAG_MC, 0)
|
||||
#undef _TCC_INTFLAG_MC
|
||||
};
|
||||
|
||||
# define _TCC_INTERRUPT_VECT_NUM(n, unused) \
|
||||
SYSTEM_INTERRUPT_MODULE_TCC##n,
|
||||
/**
|
||||
* \internal Get the interrupt vector for the given device instance
|
||||
*
|
||||
* \param[in] The TCC module instance number
|
||||
*
|
||||
* \return Interrupt vector for of the given TCC module instance.
|
||||
*/
|
||||
static enum system_interrupt_vector _tcc_interrupt_get_interrupt_vector(
|
||||
uint32_t inst_num)
|
||||
{
|
||||
static uint8_t tcc_interrupt_vectors[TCC_INST_NUM] = {
|
||||
MREPEAT(TCC_INST_NUM, _TCC_INTERRUPT_VECT_NUM, 0)
|
||||
};
|
||||
|
||||
return (enum system_interrupt_vector)tcc_interrupt_vectors[inst_num];
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Registers a callback
|
||||
*
|
||||
* Registers a callback function which is implemented by the user.
|
||||
*
|
||||
* \note The callback must be enabled by \ref tcc_enable_callback,
|
||||
* in order for the interrupt handler to call it when the conditions for the
|
||||
* callback type is met.
|
||||
*
|
||||
* \param[in] module Pointer to TCC software instance struct
|
||||
* \param[in] callback_func Pointer to callback function
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*/
|
||||
enum status_code tcc_register_callback(
|
||||
struct tcc_module *const module,
|
||||
tcc_callback_t callback_func,
|
||||
const enum tcc_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
Assert(callback_func);
|
||||
|
||||
/* Register callback function */
|
||||
module->callback[callback_type] = callback_func;
|
||||
|
||||
/* Set the bit corresponding to the callback_type */
|
||||
module->register_callback_mask |= _tcc_intflag[callback_type];
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Unregisters a callback
|
||||
*
|
||||
* Unregisters a callback function implemented by the user. The callback should
|
||||
* be disabled before it is unregistered.
|
||||
*
|
||||
* \param[in] module Pointer to TCC software instance struct
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*/
|
||||
enum status_code tcc_unregister_callback(
|
||||
struct tcc_module *const module,
|
||||
const enum tcc_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
|
||||
/* Unregister callback function */
|
||||
module->callback[callback_type] = NULL;
|
||||
|
||||
/* Clear the bit corresponding to the callback_type */
|
||||
module->register_callback_mask &= ~_tcc_intflag[callback_type];
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Enables callback
|
||||
*
|
||||
* Enables the callback function registered by the \ref
|
||||
* tcc_register_callback. The callback function will be called from the
|
||||
* interrupt handler when the conditions for the callback type are
|
||||
* met. This function will also enable the appropriate interrupts.
|
||||
*
|
||||
* \param[in] module Pointer to TCC software instance struct
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*/
|
||||
void tcc_enable_callback(
|
||||
struct tcc_module *const module,
|
||||
const enum tcc_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
Assert(module->hw);
|
||||
|
||||
/* Enable interrupts for this TCC module */
|
||||
system_interrupt_enable(_tcc_interrupt_get_interrupt_vector(
|
||||
_tcc_get_inst_index(module->hw)));
|
||||
|
||||
/* Enable channel or other callbacks */
|
||||
module->enable_callback_mask |= _tcc_intflag[callback_type];
|
||||
module->hw->INTENSET.reg = _tcc_intflag[callback_type];
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disables callback
|
||||
*
|
||||
* Disables the callback function registered by the \ref
|
||||
* tcc_register_callback, and the callback will not be called from the
|
||||
* interrupt routine. The function will also disable the appropriate
|
||||
* interrupts.
|
||||
*
|
||||
* \param[in] module Pointer to TCC software instance struct
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*/
|
||||
void tcc_disable_callback(
|
||||
struct tcc_module *const module,
|
||||
const enum tcc_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
Assert(module->hw);
|
||||
|
||||
/* Disable interrupts for this TCC module */
|
||||
system_interrupt_disable(_tcc_interrupt_get_interrupt_vector(
|
||||
_tcc_get_inst_index(module->hw)));
|
||||
|
||||
/* Disable channel or other callbacks */
|
||||
module->enable_callback_mask &= ~_tcc_intflag[callback_type];
|
||||
module->hw->INTENCLR.reg = _tcc_intflag[callback_type];
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* \internal ISR handler for TCC
|
||||
*
|
||||
* Auto-generate a set of interrupt handlers for each TCC in the device.
|
||||
*/
|
||||
#define _TCC_INTERRUPT_HANDLER(n, m) \
|
||||
void TCC##n##_Handler(void) \
|
||||
{ \
|
||||
_tcc_interrupt_handler(n); \
|
||||
}
|
||||
|
||||
MREPEAT(TCC_INST_NUM, _TCC_INTERRUPT_HANDLER, 0)
|
||||
|
||||
/**
|
||||
* \internal Interrupt handler for the TCC module
|
||||
*
|
||||
* Handles interrupts as they occur, it will run the callback functions
|
||||
* that are registered and enabled.
|
||||
*
|
||||
* \param[in] module_index ID of the TCC instance calling the interrupt
|
||||
* handler
|
||||
*/
|
||||
void _tcc_interrupt_handler(
|
||||
uint8_t module_index)
|
||||
{
|
||||
int i;
|
||||
|
||||
uint32_t interrupt_and_callback_status_mask;
|
||||
|
||||
struct tcc_module *module =
|
||||
(struct tcc_module *)_tcc_instances[module_index];
|
||||
|
||||
interrupt_and_callback_status_mask = (module->hw->INTFLAG.reg &
|
||||
module->register_callback_mask &
|
||||
module->enable_callback_mask);
|
||||
|
||||
/* Check if callback interrupt has occured */
|
||||
for (i = 0; i < TCC_CALLBACK_N; i ++) {
|
||||
if (interrupt_and_callback_status_mask & _tcc_intflag[i]) {
|
||||
/* Invoke the registered and enabled callback function */
|
||||
(module->callback[i])(module);
|
||||
/* Clear interrupt flag */
|
||||
module->hw->INTFLAG.reg = _tcc_intflag[i];
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -1,83 +1,83 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM TCC - Timer Counter for Control Applications Callback Driver
|
||||
*
|
||||
* Copyright (c) 2013-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
|
||||
#ifndef TCC_CALLBACK_H_INCLUDED
|
||||
#define TCC_CALLBACK_H_INCLUDED
|
||||
|
||||
#include "tcc.h"
|
||||
#include <system_interrupt.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
extern void *_tcc_instances[TCC_INST_NUM];
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* \name Callback Management
|
||||
* {@
|
||||
*/
|
||||
|
||||
enum status_code tcc_register_callback(
|
||||
struct tcc_module *const module,
|
||||
tcc_callback_t callback_func,
|
||||
const enum tcc_callback callback_type);
|
||||
|
||||
enum status_code tcc_unregister_callback(
|
||||
struct tcc_module *const module,
|
||||
const enum tcc_callback callback_type);
|
||||
|
||||
void tcc_enable_callback(
|
||||
struct tcc_module *const module,
|
||||
const enum tcc_callback callback_type);
|
||||
|
||||
void tcc_disable_callback(
|
||||
struct tcc_module *const module,
|
||||
const enum tcc_callback callback_type);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* TCC_CALLBACK_H_INCLUDED */
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM TCC - Timer Counter for Control Applications Callback Driver
|
||||
*
|
||||
* Copyright (c) 2013-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
|
||||
*/
|
||||
|
||||
|
||||
#ifndef TCC_CALLBACK_H_INCLUDED
|
||||
#define TCC_CALLBACK_H_INCLUDED
|
||||
|
||||
#include "tcc.h"
|
||||
#include <system_interrupt.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
extern void *_tcc_instances[TCC_INST_NUM];
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* \name Callback Management
|
||||
* {@
|
||||
*/
|
||||
|
||||
enum status_code tcc_register_callback(
|
||||
struct tcc_module *const module,
|
||||
tcc_callback_t callback_func,
|
||||
const enum tcc_callback callback_type);
|
||||
|
||||
enum status_code tcc_unregister_callback(
|
||||
struct tcc_module *const module,
|
||||
const enum tcc_callback callback_type);
|
||||
|
||||
void tcc_enable_callback(
|
||||
struct tcc_module *const module,
|
||||
const enum tcc_callback callback_type);
|
||||
|
||||
void tcc_disable_callback(
|
||||
struct tcc_module *const module,
|
||||
const enum tcc_callback callback_type);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* TCC_CALLBACK_H_INCLUDED */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,276 +1,276 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Component description for DAC
|
||||
*
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_DAC_COMPONENT_
|
||||
#define _SAMD21_DAC_COMPONENT_
|
||||
|
||||
/* ========================================================================== */
|
||||
/** SOFTWARE API DEFINITION FOR DAC */
|
||||
/* ========================================================================== */
|
||||
/** \addtogroup SAMD21_DAC Digital Analog Converter */
|
||||
/*@{*/
|
||||
|
||||
#define DAC_U2214
|
||||
#define REV_DAC 0x110
|
||||
|
||||
/* -------- DAC_CTRLA : (DAC Offset: 0x0) (R/W 8) Control A -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint8_t SWRST:1; /*!< bit: 0 Software Reset */
|
||||
uint8_t ENABLE:1; /*!< bit: 1 Enable */
|
||||
uint8_t RUNSTDBY:1; /*!< bit: 2 Run in Standby */
|
||||
uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} DAC_CTRLA_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define DAC_CTRLA_OFFSET 0x0 /**< \brief (DAC_CTRLA offset) Control A */
|
||||
#define DAC_CTRLA_RESETVALUE 0x00ul /**< \brief (DAC_CTRLA reset_value) Control A */
|
||||
|
||||
#define DAC_CTRLA_SWRST_Pos 0 /**< \brief (DAC_CTRLA) Software Reset */
|
||||
#define DAC_CTRLA_SWRST (0x1ul << DAC_CTRLA_SWRST_Pos)
|
||||
#define DAC_CTRLA_ENABLE_Pos 1 /**< \brief (DAC_CTRLA) Enable */
|
||||
#define DAC_CTRLA_ENABLE (0x1ul << DAC_CTRLA_ENABLE_Pos)
|
||||
#define DAC_CTRLA_RUNSTDBY_Pos 2 /**< \brief (DAC_CTRLA) Run in Standby */
|
||||
#define DAC_CTRLA_RUNSTDBY (0x1ul << DAC_CTRLA_RUNSTDBY_Pos)
|
||||
#define DAC_CTRLA_MASK 0x07ul /**< \brief (DAC_CTRLA) MASK Register */
|
||||
|
||||
/* -------- DAC_CTRLB : (DAC Offset: 0x1) (R/W 8) Control B -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint8_t EOEN:1; /*!< bit: 0 External Output Enable */
|
||||
uint8_t IOEN:1; /*!< bit: 1 Internal Output Enable */
|
||||
uint8_t LEFTADJ:1; /*!< bit: 2 Left Adjusted Data */
|
||||
uint8_t VPD:1; /*!< bit: 3 Voltage Pump Disable */
|
||||
uint8_t BDWP:1; /*!< bit: 4 Bypass DATABUF Write Protection */
|
||||
uint8_t :1; /*!< bit: 5 Reserved */
|
||||
uint8_t REFSEL:2; /*!< bit: 6.. 7 Reference Selection */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} DAC_CTRLB_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define DAC_CTRLB_OFFSET 0x1 /**< \brief (DAC_CTRLB offset) Control B */
|
||||
#define DAC_CTRLB_RESETVALUE 0x00ul /**< \brief (DAC_CTRLB reset_value) Control B */
|
||||
|
||||
#define DAC_CTRLB_EOEN_Pos 0 /**< \brief (DAC_CTRLB) External Output Enable */
|
||||
#define DAC_CTRLB_EOEN (0x1ul << DAC_CTRLB_EOEN_Pos)
|
||||
#define DAC_CTRLB_IOEN_Pos 1 /**< \brief (DAC_CTRLB) Internal Output Enable */
|
||||
#define DAC_CTRLB_IOEN (0x1ul << DAC_CTRLB_IOEN_Pos)
|
||||
#define DAC_CTRLB_LEFTADJ_Pos 2 /**< \brief (DAC_CTRLB) Left Adjusted Data */
|
||||
#define DAC_CTRLB_LEFTADJ (0x1ul << DAC_CTRLB_LEFTADJ_Pos)
|
||||
#define DAC_CTRLB_VPD_Pos 3 /**< \brief (DAC_CTRLB) Voltage Pump Disable */
|
||||
#define DAC_CTRLB_VPD (0x1ul << DAC_CTRLB_VPD_Pos)
|
||||
#define DAC_CTRLB_BDWP_Pos 4 /**< \brief (DAC_CTRLB) Bypass DATABUF Write Protection */
|
||||
#define DAC_CTRLB_BDWP (0x1ul << DAC_CTRLB_BDWP_Pos)
|
||||
#define DAC_CTRLB_REFSEL_Pos 6 /**< \brief (DAC_CTRLB) Reference Selection */
|
||||
#define DAC_CTRLB_REFSEL_Msk (0x3ul << DAC_CTRLB_REFSEL_Pos)
|
||||
#define DAC_CTRLB_REFSEL(value) (DAC_CTRLB_REFSEL_Msk & ((value) << DAC_CTRLB_REFSEL_Pos))
|
||||
#define DAC_CTRLB_REFSEL_INT1V_Val 0x0ul /**< \brief (DAC_CTRLB) Internal 1.0V reference */
|
||||
#define DAC_CTRLB_REFSEL_AVCC_Val 0x1ul /**< \brief (DAC_CTRLB) AVCC */
|
||||
#define DAC_CTRLB_REFSEL_VREFP_Val 0x2ul /**< \brief (DAC_CTRLB) External reference */
|
||||
#define DAC_CTRLB_REFSEL_INT1V (DAC_CTRLB_REFSEL_INT1V_Val << DAC_CTRLB_REFSEL_Pos)
|
||||
#define DAC_CTRLB_REFSEL_AVCC (DAC_CTRLB_REFSEL_AVCC_Val << DAC_CTRLB_REFSEL_Pos)
|
||||
#define DAC_CTRLB_REFSEL_VREFP (DAC_CTRLB_REFSEL_VREFP_Val << DAC_CTRLB_REFSEL_Pos)
|
||||
#define DAC_CTRLB_MASK 0xDFul /**< \brief (DAC_CTRLB) MASK Register */
|
||||
|
||||
/* -------- DAC_EVCTRL : (DAC Offset: 0x2) (R/W 8) Event Control -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint8_t STARTEI:1; /*!< bit: 0 Start Conversion Event Input */
|
||||
uint8_t EMPTYEO:1; /*!< bit: 1 Data Buffer Empty Event Output */
|
||||
uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} DAC_EVCTRL_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define DAC_EVCTRL_OFFSET 0x2 /**< \brief (DAC_EVCTRL offset) Event Control */
|
||||
#define DAC_EVCTRL_RESETVALUE 0x00ul /**< \brief (DAC_EVCTRL reset_value) Event Control */
|
||||
|
||||
#define DAC_EVCTRL_STARTEI_Pos 0 /**< \brief (DAC_EVCTRL) Start Conversion Event Input */
|
||||
#define DAC_EVCTRL_STARTEI (0x1ul << DAC_EVCTRL_STARTEI_Pos)
|
||||
#define DAC_EVCTRL_EMPTYEO_Pos 1 /**< \brief (DAC_EVCTRL) Data Buffer Empty Event Output */
|
||||
#define DAC_EVCTRL_EMPTYEO (0x1ul << DAC_EVCTRL_EMPTYEO_Pos)
|
||||
#define DAC_EVCTRL_MASK 0x03ul /**< \brief (DAC_EVCTRL) MASK Register */
|
||||
|
||||
/* -------- DAC_INTENCLR : (DAC Offset: 0x4) (R/W 8) Interrupt Enable Clear -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint8_t UNDERRUN:1; /*!< bit: 0 Underrun Interrupt Enable */
|
||||
uint8_t EMPTY:1; /*!< bit: 1 Data Buffer Empty Interrupt Enable */
|
||||
uint8_t SYNCRDY:1; /*!< bit: 2 Synchronization Ready Interrupt Enable */
|
||||
uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} DAC_INTENCLR_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define DAC_INTENCLR_OFFSET 0x4 /**< \brief (DAC_INTENCLR offset) Interrupt Enable Clear */
|
||||
#define DAC_INTENCLR_RESETVALUE 0x00ul /**< \brief (DAC_INTENCLR reset_value) Interrupt Enable Clear */
|
||||
|
||||
#define DAC_INTENCLR_UNDERRUN_Pos 0 /**< \brief (DAC_INTENCLR) Underrun Interrupt Enable */
|
||||
#define DAC_INTENCLR_UNDERRUN (0x1ul << DAC_INTENCLR_UNDERRUN_Pos)
|
||||
#define DAC_INTENCLR_EMPTY_Pos 1 /**< \brief (DAC_INTENCLR) Data Buffer Empty Interrupt Enable */
|
||||
#define DAC_INTENCLR_EMPTY (0x1ul << DAC_INTENCLR_EMPTY_Pos)
|
||||
#define DAC_INTENCLR_SYNCRDY_Pos 2 /**< \brief (DAC_INTENCLR) Synchronization Ready Interrupt Enable */
|
||||
#define DAC_INTENCLR_SYNCRDY (0x1ul << DAC_INTENCLR_SYNCRDY_Pos)
|
||||
#define DAC_INTENCLR_MASK 0x07ul /**< \brief (DAC_INTENCLR) MASK Register */
|
||||
|
||||
/* -------- DAC_INTENSET : (DAC Offset: 0x5) (R/W 8) Interrupt Enable Set -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint8_t UNDERRUN:1; /*!< bit: 0 Underrun Interrupt Enable */
|
||||
uint8_t EMPTY:1; /*!< bit: 1 Data Buffer Empty Interrupt Enable */
|
||||
uint8_t SYNCRDY:1; /*!< bit: 2 Synchronization Ready Interrupt Enable */
|
||||
uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} DAC_INTENSET_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define DAC_INTENSET_OFFSET 0x5 /**< \brief (DAC_INTENSET offset) Interrupt Enable Set */
|
||||
#define DAC_INTENSET_RESETVALUE 0x00ul /**< \brief (DAC_INTENSET reset_value) Interrupt Enable Set */
|
||||
|
||||
#define DAC_INTENSET_UNDERRUN_Pos 0 /**< \brief (DAC_INTENSET) Underrun Interrupt Enable */
|
||||
#define DAC_INTENSET_UNDERRUN (0x1ul << DAC_INTENSET_UNDERRUN_Pos)
|
||||
#define DAC_INTENSET_EMPTY_Pos 1 /**< \brief (DAC_INTENSET) Data Buffer Empty Interrupt Enable */
|
||||
#define DAC_INTENSET_EMPTY (0x1ul << DAC_INTENSET_EMPTY_Pos)
|
||||
#define DAC_INTENSET_SYNCRDY_Pos 2 /**< \brief (DAC_INTENSET) Synchronization Ready Interrupt Enable */
|
||||
#define DAC_INTENSET_SYNCRDY (0x1ul << DAC_INTENSET_SYNCRDY_Pos)
|
||||
#define DAC_INTENSET_MASK 0x07ul /**< \brief (DAC_INTENSET) MASK Register */
|
||||
|
||||
/* -------- DAC_INTFLAG : (DAC Offset: 0x6) (R/W 8) Interrupt Flag Status and Clear -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t UNDERRUN:1; /*!< bit: 0 Underrun */
|
||||
__I uint8_t EMPTY:1; /*!< bit: 1 Data Buffer Empty */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 2 Synchronization Ready */
|
||||
__I uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} DAC_INTFLAG_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define DAC_INTFLAG_OFFSET 0x6 /**< \brief (DAC_INTFLAG offset) Interrupt Flag Status and Clear */
|
||||
#define DAC_INTFLAG_RESETVALUE 0x00ul /**< \brief (DAC_INTFLAG reset_value) Interrupt Flag Status and Clear */
|
||||
|
||||
#define DAC_INTFLAG_UNDERRUN_Pos 0 /**< \brief (DAC_INTFLAG) Underrun */
|
||||
#define DAC_INTFLAG_UNDERRUN (0x1ul << DAC_INTFLAG_UNDERRUN_Pos)
|
||||
#define DAC_INTFLAG_EMPTY_Pos 1 /**< \brief (DAC_INTFLAG) Data Buffer Empty */
|
||||
#define DAC_INTFLAG_EMPTY (0x1ul << DAC_INTFLAG_EMPTY_Pos)
|
||||
#define DAC_INTFLAG_SYNCRDY_Pos 2 /**< \brief (DAC_INTFLAG) Synchronization Ready */
|
||||
#define DAC_INTFLAG_SYNCRDY (0x1ul << DAC_INTFLAG_SYNCRDY_Pos)
|
||||
#define DAC_INTFLAG_MASK 0x07ul /**< \brief (DAC_INTFLAG) MASK Register */
|
||||
|
||||
/* -------- DAC_STATUS : (DAC Offset: 0x7) (R/ 8) Status -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint8_t :7; /*!< bit: 0.. 6 Reserved */
|
||||
uint8_t SYNCBUSY:1; /*!< bit: 7 Synchronization Busy Status */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} DAC_STATUS_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define DAC_STATUS_OFFSET 0x7 /**< \brief (DAC_STATUS offset) Status */
|
||||
#define DAC_STATUS_RESETVALUE 0x00ul /**< \brief (DAC_STATUS reset_value) Status */
|
||||
|
||||
#define DAC_STATUS_SYNCBUSY_Pos 7 /**< \brief (DAC_STATUS) Synchronization Busy Status */
|
||||
#define DAC_STATUS_SYNCBUSY (0x1ul << DAC_STATUS_SYNCBUSY_Pos)
|
||||
#define DAC_STATUS_MASK 0x80ul /**< \brief (DAC_STATUS) MASK Register */
|
||||
|
||||
/* -------- DAC_DATA : (DAC Offset: 0x8) (R/W 16) Data -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint16_t DATA:16; /*!< bit: 0..15 Data value to be converted */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint16_t reg; /*!< Type used for register access */
|
||||
} DAC_DATA_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define DAC_DATA_OFFSET 0x8 /**< \brief (DAC_DATA offset) Data */
|
||||
#define DAC_DATA_RESETVALUE 0x0000ul /**< \brief (DAC_DATA reset_value) Data */
|
||||
|
||||
#define DAC_DATA_DATA_Pos 0 /**< \brief (DAC_DATA) Data value to be converted */
|
||||
#define DAC_DATA_DATA_Msk (0xFFFFul << DAC_DATA_DATA_Pos)
|
||||
#define DAC_DATA_DATA(value) (DAC_DATA_DATA_Msk & ((value) << DAC_DATA_DATA_Pos))
|
||||
#define DAC_DATA_MASK 0xFFFFul /**< \brief (DAC_DATA) MASK Register */
|
||||
|
||||
/* -------- DAC_DATABUF : (DAC Offset: 0xC) (R/W 16) Data Buffer -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint16_t DATABUF:16; /*!< bit: 0..15 Data Buffer */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint16_t reg; /*!< Type used for register access */
|
||||
} DAC_DATABUF_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define DAC_DATABUF_OFFSET 0xC /**< \brief (DAC_DATABUF offset) Data Buffer */
|
||||
#define DAC_DATABUF_RESETVALUE 0x0000ul /**< \brief (DAC_DATABUF reset_value) Data Buffer */
|
||||
|
||||
#define DAC_DATABUF_DATABUF_Pos 0 /**< \brief (DAC_DATABUF) Data Buffer */
|
||||
#define DAC_DATABUF_DATABUF_Msk (0xFFFFul << DAC_DATABUF_DATABUF_Pos)
|
||||
#define DAC_DATABUF_DATABUF(value) (DAC_DATABUF_DATABUF_Msk & ((value) << DAC_DATABUF_DATABUF_Pos))
|
||||
#define DAC_DATABUF_MASK 0xFFFFul /**< \brief (DAC_DATABUF) MASK Register */
|
||||
|
||||
/** \brief DAC hardware registers */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef struct {
|
||||
__IO DAC_CTRLA_Type CTRLA; /**< \brief Offset: 0x0 (R/W 8) Control A */
|
||||
__IO DAC_CTRLB_Type CTRLB; /**< \brief Offset: 0x1 (R/W 8) Control B */
|
||||
__IO DAC_EVCTRL_Type EVCTRL; /**< \brief Offset: 0x2 (R/W 8) Event Control */
|
||||
RoReg8 Reserved1[0x1];
|
||||
__IO DAC_INTENCLR_Type INTENCLR; /**< \brief Offset: 0x4 (R/W 8) Interrupt Enable Clear */
|
||||
__IO DAC_INTENSET_Type INTENSET; /**< \brief Offset: 0x5 (R/W 8) Interrupt Enable Set */
|
||||
__IO DAC_INTFLAG_Type INTFLAG; /**< \brief Offset: 0x6 (R/W 8) Interrupt Flag Status and Clear */
|
||||
__I DAC_STATUS_Type STATUS; /**< \brief Offset: 0x7 (R/ 8) Status */
|
||||
__IO DAC_DATA_Type DATA; /**< \brief Offset: 0x8 (R/W 16) Data */
|
||||
RoReg8 Reserved2[0x2];
|
||||
__IO DAC_DATABUF_Type DATABUF; /**< \brief Offset: 0xC (R/W 16) Data Buffer */
|
||||
} Dac;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/*@}*/
|
||||
|
||||
#endif /* _SAMD21_DAC_COMPONENT_ */
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Component description for DAC
|
||||
*
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_DAC_COMPONENT_
|
||||
#define _SAMD21_DAC_COMPONENT_
|
||||
|
||||
/* ========================================================================== */
|
||||
/** SOFTWARE API DEFINITION FOR DAC */
|
||||
/* ========================================================================== */
|
||||
/** \addtogroup SAMD21_DAC Digital Analog Converter */
|
||||
/*@{*/
|
||||
|
||||
#define DAC_U2214
|
||||
#define REV_DAC 0x110
|
||||
|
||||
/* -------- DAC_CTRLA : (DAC Offset: 0x0) (R/W 8) Control A -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint8_t SWRST:1; /*!< bit: 0 Software Reset */
|
||||
uint8_t ENABLE:1; /*!< bit: 1 Enable */
|
||||
uint8_t RUNSTDBY:1; /*!< bit: 2 Run in Standby */
|
||||
uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} DAC_CTRLA_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define DAC_CTRLA_OFFSET 0x0 /**< \brief (DAC_CTRLA offset) Control A */
|
||||
#define DAC_CTRLA_RESETVALUE 0x00ul /**< \brief (DAC_CTRLA reset_value) Control A */
|
||||
|
||||
#define DAC_CTRLA_SWRST_Pos 0 /**< \brief (DAC_CTRLA) Software Reset */
|
||||
#define DAC_CTRLA_SWRST (0x1ul << DAC_CTRLA_SWRST_Pos)
|
||||
#define DAC_CTRLA_ENABLE_Pos 1 /**< \brief (DAC_CTRLA) Enable */
|
||||
#define DAC_CTRLA_ENABLE (0x1ul << DAC_CTRLA_ENABLE_Pos)
|
||||
#define DAC_CTRLA_RUNSTDBY_Pos 2 /**< \brief (DAC_CTRLA) Run in Standby */
|
||||
#define DAC_CTRLA_RUNSTDBY (0x1ul << DAC_CTRLA_RUNSTDBY_Pos)
|
||||
#define DAC_CTRLA_MASK 0x07ul /**< \brief (DAC_CTRLA) MASK Register */
|
||||
|
||||
/* -------- DAC_CTRLB : (DAC Offset: 0x1) (R/W 8) Control B -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint8_t EOEN:1; /*!< bit: 0 External Output Enable */
|
||||
uint8_t IOEN:1; /*!< bit: 1 Internal Output Enable */
|
||||
uint8_t LEFTADJ:1; /*!< bit: 2 Left Adjusted Data */
|
||||
uint8_t VPD:1; /*!< bit: 3 Voltage Pump Disable */
|
||||
uint8_t BDWP:1; /*!< bit: 4 Bypass DATABUF Write Protection */
|
||||
uint8_t :1; /*!< bit: 5 Reserved */
|
||||
uint8_t REFSEL:2; /*!< bit: 6.. 7 Reference Selection */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} DAC_CTRLB_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define DAC_CTRLB_OFFSET 0x1 /**< \brief (DAC_CTRLB offset) Control B */
|
||||
#define DAC_CTRLB_RESETVALUE 0x00ul /**< \brief (DAC_CTRLB reset_value) Control B */
|
||||
|
||||
#define DAC_CTRLB_EOEN_Pos 0 /**< \brief (DAC_CTRLB) External Output Enable */
|
||||
#define DAC_CTRLB_EOEN (0x1ul << DAC_CTRLB_EOEN_Pos)
|
||||
#define DAC_CTRLB_IOEN_Pos 1 /**< \brief (DAC_CTRLB) Internal Output Enable */
|
||||
#define DAC_CTRLB_IOEN (0x1ul << DAC_CTRLB_IOEN_Pos)
|
||||
#define DAC_CTRLB_LEFTADJ_Pos 2 /**< \brief (DAC_CTRLB) Left Adjusted Data */
|
||||
#define DAC_CTRLB_LEFTADJ (0x1ul << DAC_CTRLB_LEFTADJ_Pos)
|
||||
#define DAC_CTRLB_VPD_Pos 3 /**< \brief (DAC_CTRLB) Voltage Pump Disable */
|
||||
#define DAC_CTRLB_VPD (0x1ul << DAC_CTRLB_VPD_Pos)
|
||||
#define DAC_CTRLB_BDWP_Pos 4 /**< \brief (DAC_CTRLB) Bypass DATABUF Write Protection */
|
||||
#define DAC_CTRLB_BDWP (0x1ul << DAC_CTRLB_BDWP_Pos)
|
||||
#define DAC_CTRLB_REFSEL_Pos 6 /**< \brief (DAC_CTRLB) Reference Selection */
|
||||
#define DAC_CTRLB_REFSEL_Msk (0x3ul << DAC_CTRLB_REFSEL_Pos)
|
||||
#define DAC_CTRLB_REFSEL(value) (DAC_CTRLB_REFSEL_Msk & ((value) << DAC_CTRLB_REFSEL_Pos))
|
||||
#define DAC_CTRLB_REFSEL_INT1V_Val 0x0ul /**< \brief (DAC_CTRLB) Internal 1.0V reference */
|
||||
#define DAC_CTRLB_REFSEL_AVCC_Val 0x1ul /**< \brief (DAC_CTRLB) AVCC */
|
||||
#define DAC_CTRLB_REFSEL_VREFP_Val 0x2ul /**< \brief (DAC_CTRLB) External reference */
|
||||
#define DAC_CTRLB_REFSEL_INT1V (DAC_CTRLB_REFSEL_INT1V_Val << DAC_CTRLB_REFSEL_Pos)
|
||||
#define DAC_CTRLB_REFSEL_AVCC (DAC_CTRLB_REFSEL_AVCC_Val << DAC_CTRLB_REFSEL_Pos)
|
||||
#define DAC_CTRLB_REFSEL_VREFP (DAC_CTRLB_REFSEL_VREFP_Val << DAC_CTRLB_REFSEL_Pos)
|
||||
#define DAC_CTRLB_MASK 0xDFul /**< \brief (DAC_CTRLB) MASK Register */
|
||||
|
||||
/* -------- DAC_EVCTRL : (DAC Offset: 0x2) (R/W 8) Event Control -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint8_t STARTEI:1; /*!< bit: 0 Start Conversion Event Input */
|
||||
uint8_t EMPTYEO:1; /*!< bit: 1 Data Buffer Empty Event Output */
|
||||
uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} DAC_EVCTRL_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define DAC_EVCTRL_OFFSET 0x2 /**< \brief (DAC_EVCTRL offset) Event Control */
|
||||
#define DAC_EVCTRL_RESETVALUE 0x00ul /**< \brief (DAC_EVCTRL reset_value) Event Control */
|
||||
|
||||
#define DAC_EVCTRL_STARTEI_Pos 0 /**< \brief (DAC_EVCTRL) Start Conversion Event Input */
|
||||
#define DAC_EVCTRL_STARTEI (0x1ul << DAC_EVCTRL_STARTEI_Pos)
|
||||
#define DAC_EVCTRL_EMPTYEO_Pos 1 /**< \brief (DAC_EVCTRL) Data Buffer Empty Event Output */
|
||||
#define DAC_EVCTRL_EMPTYEO (0x1ul << DAC_EVCTRL_EMPTYEO_Pos)
|
||||
#define DAC_EVCTRL_MASK 0x03ul /**< \brief (DAC_EVCTRL) MASK Register */
|
||||
|
||||
/* -------- DAC_INTENCLR : (DAC Offset: 0x4) (R/W 8) Interrupt Enable Clear -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint8_t UNDERRUN:1; /*!< bit: 0 Underrun Interrupt Enable */
|
||||
uint8_t EMPTY:1; /*!< bit: 1 Data Buffer Empty Interrupt Enable */
|
||||
uint8_t SYNCRDY:1; /*!< bit: 2 Synchronization Ready Interrupt Enable */
|
||||
uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} DAC_INTENCLR_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define DAC_INTENCLR_OFFSET 0x4 /**< \brief (DAC_INTENCLR offset) Interrupt Enable Clear */
|
||||
#define DAC_INTENCLR_RESETVALUE 0x00ul /**< \brief (DAC_INTENCLR reset_value) Interrupt Enable Clear */
|
||||
|
||||
#define DAC_INTENCLR_UNDERRUN_Pos 0 /**< \brief (DAC_INTENCLR) Underrun Interrupt Enable */
|
||||
#define DAC_INTENCLR_UNDERRUN (0x1ul << DAC_INTENCLR_UNDERRUN_Pos)
|
||||
#define DAC_INTENCLR_EMPTY_Pos 1 /**< \brief (DAC_INTENCLR) Data Buffer Empty Interrupt Enable */
|
||||
#define DAC_INTENCLR_EMPTY (0x1ul << DAC_INTENCLR_EMPTY_Pos)
|
||||
#define DAC_INTENCLR_SYNCRDY_Pos 2 /**< \brief (DAC_INTENCLR) Synchronization Ready Interrupt Enable */
|
||||
#define DAC_INTENCLR_SYNCRDY (0x1ul << DAC_INTENCLR_SYNCRDY_Pos)
|
||||
#define DAC_INTENCLR_MASK 0x07ul /**< \brief (DAC_INTENCLR) MASK Register */
|
||||
|
||||
/* -------- DAC_INTENSET : (DAC Offset: 0x5) (R/W 8) Interrupt Enable Set -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint8_t UNDERRUN:1; /*!< bit: 0 Underrun Interrupt Enable */
|
||||
uint8_t EMPTY:1; /*!< bit: 1 Data Buffer Empty Interrupt Enable */
|
||||
uint8_t SYNCRDY:1; /*!< bit: 2 Synchronization Ready Interrupt Enable */
|
||||
uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} DAC_INTENSET_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define DAC_INTENSET_OFFSET 0x5 /**< \brief (DAC_INTENSET offset) Interrupt Enable Set */
|
||||
#define DAC_INTENSET_RESETVALUE 0x00ul /**< \brief (DAC_INTENSET reset_value) Interrupt Enable Set */
|
||||
|
||||
#define DAC_INTENSET_UNDERRUN_Pos 0 /**< \brief (DAC_INTENSET) Underrun Interrupt Enable */
|
||||
#define DAC_INTENSET_UNDERRUN (0x1ul << DAC_INTENSET_UNDERRUN_Pos)
|
||||
#define DAC_INTENSET_EMPTY_Pos 1 /**< \brief (DAC_INTENSET) Data Buffer Empty Interrupt Enable */
|
||||
#define DAC_INTENSET_EMPTY (0x1ul << DAC_INTENSET_EMPTY_Pos)
|
||||
#define DAC_INTENSET_SYNCRDY_Pos 2 /**< \brief (DAC_INTENSET) Synchronization Ready Interrupt Enable */
|
||||
#define DAC_INTENSET_SYNCRDY (0x1ul << DAC_INTENSET_SYNCRDY_Pos)
|
||||
#define DAC_INTENSET_MASK 0x07ul /**< \brief (DAC_INTENSET) MASK Register */
|
||||
|
||||
/* -------- DAC_INTFLAG : (DAC Offset: 0x6) (R/W 8) Interrupt Flag Status and Clear -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t UNDERRUN:1; /*!< bit: 0 Underrun */
|
||||
__I uint8_t EMPTY:1; /*!< bit: 1 Data Buffer Empty */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 2 Synchronization Ready */
|
||||
__I uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} DAC_INTFLAG_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define DAC_INTFLAG_OFFSET 0x6 /**< \brief (DAC_INTFLAG offset) Interrupt Flag Status and Clear */
|
||||
#define DAC_INTFLAG_RESETVALUE 0x00ul /**< \brief (DAC_INTFLAG reset_value) Interrupt Flag Status and Clear */
|
||||
|
||||
#define DAC_INTFLAG_UNDERRUN_Pos 0 /**< \brief (DAC_INTFLAG) Underrun */
|
||||
#define DAC_INTFLAG_UNDERRUN (0x1ul << DAC_INTFLAG_UNDERRUN_Pos)
|
||||
#define DAC_INTFLAG_EMPTY_Pos 1 /**< \brief (DAC_INTFLAG) Data Buffer Empty */
|
||||
#define DAC_INTFLAG_EMPTY (0x1ul << DAC_INTFLAG_EMPTY_Pos)
|
||||
#define DAC_INTFLAG_SYNCRDY_Pos 2 /**< \brief (DAC_INTFLAG) Synchronization Ready */
|
||||
#define DAC_INTFLAG_SYNCRDY (0x1ul << DAC_INTFLAG_SYNCRDY_Pos)
|
||||
#define DAC_INTFLAG_MASK 0x07ul /**< \brief (DAC_INTFLAG) MASK Register */
|
||||
|
||||
/* -------- DAC_STATUS : (DAC Offset: 0x7) (R/ 8) Status -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint8_t :7; /*!< bit: 0.. 6 Reserved */
|
||||
uint8_t SYNCBUSY:1; /*!< bit: 7 Synchronization Busy Status */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} DAC_STATUS_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define DAC_STATUS_OFFSET 0x7 /**< \brief (DAC_STATUS offset) Status */
|
||||
#define DAC_STATUS_RESETVALUE 0x00ul /**< \brief (DAC_STATUS reset_value) Status */
|
||||
|
||||
#define DAC_STATUS_SYNCBUSY_Pos 7 /**< \brief (DAC_STATUS) Synchronization Busy Status */
|
||||
#define DAC_STATUS_SYNCBUSY (0x1ul << DAC_STATUS_SYNCBUSY_Pos)
|
||||
#define DAC_STATUS_MASK 0x80ul /**< \brief (DAC_STATUS) MASK Register */
|
||||
|
||||
/* -------- DAC_DATA : (DAC Offset: 0x8) (R/W 16) Data -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint16_t DATA:16; /*!< bit: 0..15 Data value to be converted */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint16_t reg; /*!< Type used for register access */
|
||||
} DAC_DATA_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define DAC_DATA_OFFSET 0x8 /**< \brief (DAC_DATA offset) Data */
|
||||
#define DAC_DATA_RESETVALUE 0x0000ul /**< \brief (DAC_DATA reset_value) Data */
|
||||
|
||||
#define DAC_DATA_DATA_Pos 0 /**< \brief (DAC_DATA) Data value to be converted */
|
||||
#define DAC_DATA_DATA_Msk (0xFFFFul << DAC_DATA_DATA_Pos)
|
||||
#define DAC_DATA_DATA(value) (DAC_DATA_DATA_Msk & ((value) << DAC_DATA_DATA_Pos))
|
||||
#define DAC_DATA_MASK 0xFFFFul /**< \brief (DAC_DATA) MASK Register */
|
||||
|
||||
/* -------- DAC_DATABUF : (DAC Offset: 0xC) (R/W 16) Data Buffer -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint16_t DATABUF:16; /*!< bit: 0..15 Data Buffer */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint16_t reg; /*!< Type used for register access */
|
||||
} DAC_DATABUF_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define DAC_DATABUF_OFFSET 0xC /**< \brief (DAC_DATABUF offset) Data Buffer */
|
||||
#define DAC_DATABUF_RESETVALUE 0x0000ul /**< \brief (DAC_DATABUF reset_value) Data Buffer */
|
||||
|
||||
#define DAC_DATABUF_DATABUF_Pos 0 /**< \brief (DAC_DATABUF) Data Buffer */
|
||||
#define DAC_DATABUF_DATABUF_Msk (0xFFFFul << DAC_DATABUF_DATABUF_Pos)
|
||||
#define DAC_DATABUF_DATABUF(value) (DAC_DATABUF_DATABUF_Msk & ((value) << DAC_DATABUF_DATABUF_Pos))
|
||||
#define DAC_DATABUF_MASK 0xFFFFul /**< \brief (DAC_DATABUF) MASK Register */
|
||||
|
||||
/** \brief DAC hardware registers */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef struct {
|
||||
__IO DAC_CTRLA_Type CTRLA; /**< \brief Offset: 0x0 (R/W 8) Control A */
|
||||
__IO DAC_CTRLB_Type CTRLB; /**< \brief Offset: 0x1 (R/W 8) Control B */
|
||||
__IO DAC_EVCTRL_Type EVCTRL; /**< \brief Offset: 0x2 (R/W 8) Event Control */
|
||||
RoReg8 Reserved1[0x1];
|
||||
__IO DAC_INTENCLR_Type INTENCLR; /**< \brief Offset: 0x4 (R/W 8) Interrupt Enable Clear */
|
||||
__IO DAC_INTENSET_Type INTENSET; /**< \brief Offset: 0x5 (R/W 8) Interrupt Enable Set */
|
||||
__IO DAC_INTFLAG_Type INTFLAG; /**< \brief Offset: 0x6 (R/W 8) Interrupt Flag Status and Clear */
|
||||
__I DAC_STATUS_Type STATUS; /**< \brief Offset: 0x7 (R/ 8) Status */
|
||||
__IO DAC_DATA_Type DATA; /**< \brief Offset: 0x8 (R/W 16) Data */
|
||||
RoReg8 Reserved2[0x2];
|
||||
__IO DAC_DATABUF_Type DATABUF; /**< \brief Offset: 0xC (R/W 16) Data Buffer */
|
||||
} Dac;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/*@}*/
|
||||
|
||||
#endif /* _SAMD21_DAC_COMPONENT_ */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,300 +1,300 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Component description for GCLK
|
||||
*
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_GCLK_COMPONENT_
|
||||
#define _SAMD21_GCLK_COMPONENT_
|
||||
|
||||
/* ========================================================================== */
|
||||
/** SOFTWARE API DEFINITION FOR GCLK */
|
||||
/* ========================================================================== */
|
||||
/** \addtogroup SAMD21_GCLK Generic Clock Generator */
|
||||
/*@{*/
|
||||
|
||||
#define GCLK_U2102
|
||||
#define REV_GCLK 0x210
|
||||
|
||||
/* -------- GCLK_CTRL : (GCLK Offset: 0x0) (R/W 8) Control -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint8_t SWRST:1; /*!< bit: 0 Software Reset */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} GCLK_CTRL_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define GCLK_CTRL_OFFSET 0x0 /**< \brief (GCLK_CTRL offset) Control */
|
||||
#define GCLK_CTRL_RESETVALUE 0x00ul /**< \brief (GCLK_CTRL reset_value) Control */
|
||||
|
||||
#define GCLK_CTRL_SWRST_Pos 0 /**< \brief (GCLK_CTRL) Software Reset */
|
||||
#define GCLK_CTRL_SWRST (0x1ul << GCLK_CTRL_SWRST_Pos)
|
||||
#define GCLK_CTRL_MASK 0x01ul /**< \brief (GCLK_CTRL) MASK Register */
|
||||
|
||||
/* -------- GCLK_STATUS : (GCLK Offset: 0x1) (R/ 8) Status -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint8_t :7; /*!< bit: 0.. 6 Reserved */
|
||||
uint8_t SYNCBUSY:1; /*!< bit: 7 Synchronization Busy Status */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} GCLK_STATUS_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define GCLK_STATUS_OFFSET 0x1 /**< \brief (GCLK_STATUS offset) Status */
|
||||
#define GCLK_STATUS_RESETVALUE 0x00ul /**< \brief (GCLK_STATUS reset_value) Status */
|
||||
|
||||
#define GCLK_STATUS_SYNCBUSY_Pos 7 /**< \brief (GCLK_STATUS) Synchronization Busy Status */
|
||||
#define GCLK_STATUS_SYNCBUSY (0x1ul << GCLK_STATUS_SYNCBUSY_Pos)
|
||||
#define GCLK_STATUS_MASK 0x80ul /**< \brief (GCLK_STATUS) MASK Register */
|
||||
|
||||
/* -------- GCLK_CLKCTRL : (GCLK Offset: 0x2) (R/W 16) Generic Clock Control -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint16_t ID:6; /*!< bit: 0.. 5 Generic Clock Selection ID */
|
||||
uint16_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
uint16_t GEN:4; /*!< bit: 8..11 Generic Clock Generator */
|
||||
uint16_t :2; /*!< bit: 12..13 Reserved */
|
||||
uint16_t CLKEN:1; /*!< bit: 14 Clock Enable */
|
||||
uint16_t WRTLOCK:1; /*!< bit: 15 Write Lock */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint16_t reg; /*!< Type used for register access */
|
||||
} GCLK_CLKCTRL_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define GCLK_CLKCTRL_OFFSET 0x2 /**< \brief (GCLK_CLKCTRL offset) Generic Clock Control */
|
||||
#define GCLK_CLKCTRL_RESETVALUE 0x0000ul /**< \brief (GCLK_CLKCTRL reset_value) Generic Clock Control */
|
||||
|
||||
#define GCLK_CLKCTRL_ID_Pos 0 /**< \brief (GCLK_CLKCTRL) Generic Clock Selection ID */
|
||||
#define GCLK_CLKCTRL_ID_Msk (0x3Ful << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID(value) (GCLK_CLKCTRL_ID_Msk & ((value) << GCLK_CLKCTRL_ID_Pos))
|
||||
#define GCLK_CLKCTRL_ID_DFLL48_Val 0x0ul /**< \brief (GCLK_CLKCTRL) DFLL48 */
|
||||
#define GCLK_CLKCTRL_ID_FDPLL_Val 0x1ul /**< \brief (GCLK_CLKCTRL) FDPLL */
|
||||
#define GCLK_CLKCTRL_ID_FDPLL32K_Val 0x2ul /**< \brief (GCLK_CLKCTRL) FDPLL32K */
|
||||
#define GCLK_CLKCTRL_ID_WDT_Val 0x3ul /**< \brief (GCLK_CLKCTRL) WDT */
|
||||
#define GCLK_CLKCTRL_ID_RTC_Val 0x4ul /**< \brief (GCLK_CLKCTRL) RTC */
|
||||
#define GCLK_CLKCTRL_ID_EIC_Val 0x5ul /**< \brief (GCLK_CLKCTRL) EIC */
|
||||
#define GCLK_CLKCTRL_ID_USB_Val 0x6ul /**< \brief (GCLK_CLKCTRL) USB */
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_0_Val 0x7ul /**< \brief (GCLK_CLKCTRL) EVSYS_0 */
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_1_Val 0x8ul /**< \brief (GCLK_CLKCTRL) EVSYS_1 */
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_2_Val 0x9ul /**< \brief (GCLK_CLKCTRL) EVSYS_2 */
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_3_Val 0xAul /**< \brief (GCLK_CLKCTRL) EVSYS_3 */
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_4_Val 0xBul /**< \brief (GCLK_CLKCTRL) EVSYS_4 */
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_5_Val 0xCul /**< \brief (GCLK_CLKCTRL) EVSYS_5 */
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_6_Val 0xDul /**< \brief (GCLK_CLKCTRL) EVSYS_6 */
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_7_Val 0xEul /**< \brief (GCLK_CLKCTRL) EVSYS_7 */
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_8_Val 0xFul /**< \brief (GCLK_CLKCTRL) EVSYS_8 */
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_9_Val 0x10ul /**< \brief (GCLK_CLKCTRL) EVSYS_9 */
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_10_Val 0x11ul /**< \brief (GCLK_CLKCTRL) EVSYS_10 */
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_11_Val 0x12ul /**< \brief (GCLK_CLKCTRL) EVSYS_11 */
|
||||
#define GCLK_CLKCTRL_ID_SERCOMX_SLOW_Val 0x13ul /**< \brief (GCLK_CLKCTRL) SERCOMX_SLOW */
|
||||
#define GCLK_CLKCTRL_ID_SERCOM0_CORE_Val 0x14ul /**< \brief (GCLK_CLKCTRL) SERCOM0_CORE */
|
||||
#define GCLK_CLKCTRL_ID_SERCOM1_CORE_Val 0x15ul /**< \brief (GCLK_CLKCTRL) SERCOM1_CORE */
|
||||
#define GCLK_CLKCTRL_ID_SERCOM2_CORE_Val 0x16ul /**< \brief (GCLK_CLKCTRL) SERCOM2_CORE */
|
||||
#define GCLK_CLKCTRL_ID_SERCOM3_CORE_Val 0x17ul /**< \brief (GCLK_CLKCTRL) SERCOM3_CORE */
|
||||
#define GCLK_CLKCTRL_ID_SERCOM4_CORE_Val 0x18ul /**< \brief (GCLK_CLKCTRL) SERCOM4_CORE */
|
||||
#define GCLK_CLKCTRL_ID_SERCOM5_CORE_Val 0x19ul /**< \brief (GCLK_CLKCTRL) SERCOM5_CORE */
|
||||
#define GCLK_CLKCTRL_ID_TCC0_TCC1_Val 0x1Aul /**< \brief (GCLK_CLKCTRL) TCC0_TCC1 */
|
||||
#define GCLK_CLKCTRL_ID_TCC2_TC3_Val 0x1Bul /**< \brief (GCLK_CLKCTRL) TCC2_TC3 */
|
||||
#define GCLK_CLKCTRL_ID_TC4_TC5_Val 0x1Cul /**< \brief (GCLK_CLKCTRL) TC4_TC5 */
|
||||
#define GCLK_CLKCTRL_ID_TC6_TC7_Val 0x1Dul /**< \brief (GCLK_CLKCTRL) TC6_TC7 */
|
||||
#define GCLK_CLKCTRL_ID_ADC_Val 0x1Eul /**< \brief (GCLK_CLKCTRL) ADC */
|
||||
#define GCLK_CLKCTRL_ID_AC_DIG_Val 0x1Ful /**< \brief (GCLK_CLKCTRL) AC_DIG */
|
||||
#define GCLK_CLKCTRL_ID_AC_ANA_Val 0x20ul /**< \brief (GCLK_CLKCTRL) AC_ANA */
|
||||
#define GCLK_CLKCTRL_ID_DAC_Val 0x21ul /**< \brief (GCLK_CLKCTRL) DAC */
|
||||
#define GCLK_CLKCTRL_ID_PTC_Val 0x22ul /**< \brief (GCLK_CLKCTRL) PTC */
|
||||
#define GCLK_CLKCTRL_ID_I2S_0_Val 0x23ul /**< \brief (GCLK_CLKCTRL) I2S_0 */
|
||||
#define GCLK_CLKCTRL_ID_I2S_1_Val 0x24ul /**< \brief (GCLK_CLKCTRL) I2S_1 */
|
||||
#define GCLK_CLKCTRL_ID_DFLL48 (GCLK_CLKCTRL_ID_DFLL48_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_FDPLL (GCLK_CLKCTRL_ID_FDPLL_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_FDPLL32K (GCLK_CLKCTRL_ID_FDPLL32K_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_WDT (GCLK_CLKCTRL_ID_WDT_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_RTC (GCLK_CLKCTRL_ID_RTC_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EIC (GCLK_CLKCTRL_ID_EIC_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_USB (GCLK_CLKCTRL_ID_USB_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_0 (GCLK_CLKCTRL_ID_EVSYS_0_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_1 (GCLK_CLKCTRL_ID_EVSYS_1_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_2 (GCLK_CLKCTRL_ID_EVSYS_2_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_3 (GCLK_CLKCTRL_ID_EVSYS_3_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_4 (GCLK_CLKCTRL_ID_EVSYS_4_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_5 (GCLK_CLKCTRL_ID_EVSYS_5_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_6 (GCLK_CLKCTRL_ID_EVSYS_6_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_7 (GCLK_CLKCTRL_ID_EVSYS_7_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_8 (GCLK_CLKCTRL_ID_EVSYS_8_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_9 (GCLK_CLKCTRL_ID_EVSYS_9_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_10 (GCLK_CLKCTRL_ID_EVSYS_10_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_11 (GCLK_CLKCTRL_ID_EVSYS_11_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_SERCOMX_SLOW (GCLK_CLKCTRL_ID_SERCOMX_SLOW_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_SERCOM0_CORE (GCLK_CLKCTRL_ID_SERCOM0_CORE_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_SERCOM1_CORE (GCLK_CLKCTRL_ID_SERCOM1_CORE_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_SERCOM2_CORE (GCLK_CLKCTRL_ID_SERCOM2_CORE_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_SERCOM3_CORE (GCLK_CLKCTRL_ID_SERCOM3_CORE_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_SERCOM4_CORE (GCLK_CLKCTRL_ID_SERCOM4_CORE_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_SERCOM5_CORE (GCLK_CLKCTRL_ID_SERCOM5_CORE_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_TCC0_TCC1 (GCLK_CLKCTRL_ID_TCC0_TCC1_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_TCC2_TC3 (GCLK_CLKCTRL_ID_TCC2_TC3_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_TC4_TC5 (GCLK_CLKCTRL_ID_TC4_TC5_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_TC6_TC7 (GCLK_CLKCTRL_ID_TC6_TC7_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_ADC (GCLK_CLKCTRL_ID_ADC_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_AC_DIG (GCLK_CLKCTRL_ID_AC_DIG_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_AC_ANA (GCLK_CLKCTRL_ID_AC_ANA_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_DAC (GCLK_CLKCTRL_ID_DAC_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_PTC (GCLK_CLKCTRL_ID_PTC_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_I2S_0 (GCLK_CLKCTRL_ID_I2S_0_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_I2S_1 (GCLK_CLKCTRL_ID_I2S_1_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_GEN_Pos 8 /**< \brief (GCLK_CLKCTRL) Generic Clock Generator */
|
||||
#define GCLK_CLKCTRL_GEN_Msk (0xFul << GCLK_CLKCTRL_GEN_Pos)
|
||||
#define GCLK_CLKCTRL_GEN(value) (GCLK_CLKCTRL_GEN_Msk & ((value) << GCLK_CLKCTRL_GEN_Pos))
|
||||
#define GCLK_CLKCTRL_GEN_GCLK0_Val 0x0ul /**< \brief (GCLK_CLKCTRL) Generic clock generator 0 */
|
||||
#define GCLK_CLKCTRL_GEN_GCLK1_Val 0x1ul /**< \brief (GCLK_CLKCTRL) Generic clock generator 1 */
|
||||
#define GCLK_CLKCTRL_GEN_GCLK2_Val 0x2ul /**< \brief (GCLK_CLKCTRL) Generic clock generator 2 */
|
||||
#define GCLK_CLKCTRL_GEN_GCLK3_Val 0x3ul /**< \brief (GCLK_CLKCTRL) Generic clock generator 3 */
|
||||
#define GCLK_CLKCTRL_GEN_GCLK4_Val 0x4ul /**< \brief (GCLK_CLKCTRL) Generic clock generator 4 */
|
||||
#define GCLK_CLKCTRL_GEN_GCLK5_Val 0x5ul /**< \brief (GCLK_CLKCTRL) Generic clock generator 5 */
|
||||
#define GCLK_CLKCTRL_GEN_GCLK6_Val 0x6ul /**< \brief (GCLK_CLKCTRL) Generic clock generator 6 */
|
||||
#define GCLK_CLKCTRL_GEN_GCLK7_Val 0x7ul /**< \brief (GCLK_CLKCTRL) Generic clock generator 7 */
|
||||
#define GCLK_CLKCTRL_GEN_GCLK0 (GCLK_CLKCTRL_GEN_GCLK0_Val << GCLK_CLKCTRL_GEN_Pos)
|
||||
#define GCLK_CLKCTRL_GEN_GCLK1 (GCLK_CLKCTRL_GEN_GCLK1_Val << GCLK_CLKCTRL_GEN_Pos)
|
||||
#define GCLK_CLKCTRL_GEN_GCLK2 (GCLK_CLKCTRL_GEN_GCLK2_Val << GCLK_CLKCTRL_GEN_Pos)
|
||||
#define GCLK_CLKCTRL_GEN_GCLK3 (GCLK_CLKCTRL_GEN_GCLK3_Val << GCLK_CLKCTRL_GEN_Pos)
|
||||
#define GCLK_CLKCTRL_GEN_GCLK4 (GCLK_CLKCTRL_GEN_GCLK4_Val << GCLK_CLKCTRL_GEN_Pos)
|
||||
#define GCLK_CLKCTRL_GEN_GCLK5 (GCLK_CLKCTRL_GEN_GCLK5_Val << GCLK_CLKCTRL_GEN_Pos)
|
||||
#define GCLK_CLKCTRL_GEN_GCLK6 (GCLK_CLKCTRL_GEN_GCLK6_Val << GCLK_CLKCTRL_GEN_Pos)
|
||||
#define GCLK_CLKCTRL_GEN_GCLK7 (GCLK_CLKCTRL_GEN_GCLK7_Val << GCLK_CLKCTRL_GEN_Pos)
|
||||
#define GCLK_CLKCTRL_CLKEN_Pos 14 /**< \brief (GCLK_CLKCTRL) Clock Enable */
|
||||
#define GCLK_CLKCTRL_CLKEN (0x1ul << GCLK_CLKCTRL_CLKEN_Pos)
|
||||
#define GCLK_CLKCTRL_WRTLOCK_Pos 15 /**< \brief (GCLK_CLKCTRL) Write Lock */
|
||||
#define GCLK_CLKCTRL_WRTLOCK (0x1ul << GCLK_CLKCTRL_WRTLOCK_Pos)
|
||||
#define GCLK_CLKCTRL_MASK 0xCF3Ful /**< \brief (GCLK_CLKCTRL) MASK Register */
|
||||
|
||||
/* -------- GCLK_GENCTRL : (GCLK Offset: 0x4) (R/W 32) Generic Clock Generator Control -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t ID:4; /*!< bit: 0.. 3 Generic Clock Generator Selection */
|
||||
uint32_t :4; /*!< bit: 4.. 7 Reserved */
|
||||
uint32_t SRC:5; /*!< bit: 8..12 Source Select */
|
||||
uint32_t :3; /*!< bit: 13..15 Reserved */
|
||||
uint32_t GENEN:1; /*!< bit: 16 Generic Clock Generator Enable */
|
||||
uint32_t IDC:1; /*!< bit: 17 Improve Duty Cycle */
|
||||
uint32_t OOV:1; /*!< bit: 18 Output Off Value */
|
||||
uint32_t OE:1; /*!< bit: 19 Output Enable */
|
||||
uint32_t DIVSEL:1; /*!< bit: 20 Divide Selection */
|
||||
uint32_t RUNSTDBY:1; /*!< bit: 21 Run in Standby */
|
||||
uint32_t :10; /*!< bit: 22..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} GCLK_GENCTRL_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define GCLK_GENCTRL_OFFSET 0x4 /**< \brief (GCLK_GENCTRL offset) Generic Clock Generator Control */
|
||||
#define GCLK_GENCTRL_RESETVALUE 0x00000000ul /**< \brief (GCLK_GENCTRL reset_value) Generic Clock Generator Control */
|
||||
|
||||
#define GCLK_GENCTRL_ID_Pos 0 /**< \brief (GCLK_GENCTRL) Generic Clock Generator Selection */
|
||||
#define GCLK_GENCTRL_ID_Msk (0xFul << GCLK_GENCTRL_ID_Pos)
|
||||
#define GCLK_GENCTRL_ID(value) (GCLK_GENCTRL_ID_Msk & ((value) << GCLK_GENCTRL_ID_Pos))
|
||||
#define GCLK_GENCTRL_SRC_Pos 8 /**< \brief (GCLK_GENCTRL) Source Select */
|
||||
#define GCLK_GENCTRL_SRC_Msk (0x1Ful << GCLK_GENCTRL_SRC_Pos)
|
||||
#define GCLK_GENCTRL_SRC(value) (GCLK_GENCTRL_SRC_Msk & ((value) << GCLK_GENCTRL_SRC_Pos))
|
||||
#define GCLK_GENCTRL_SRC_XOSC_Val 0x0ul /**< \brief (GCLK_GENCTRL) XOSC oscillator output */
|
||||
#define GCLK_GENCTRL_SRC_GCLKIN_Val 0x1ul /**< \brief (GCLK_GENCTRL) Generator input pad */
|
||||
#define GCLK_GENCTRL_SRC_GCLKGEN1_Val 0x2ul /**< \brief (GCLK_GENCTRL) Generic clock generator 1 output */
|
||||
#define GCLK_GENCTRL_SRC_OSCULP32K_Val 0x3ul /**< \brief (GCLK_GENCTRL) OSCULP32K oscillator output */
|
||||
#define GCLK_GENCTRL_SRC_OSC32K_Val 0x4ul /**< \brief (GCLK_GENCTRL) OSC32K oscillator output */
|
||||
#define GCLK_GENCTRL_SRC_XOSC32K_Val 0x5ul /**< \brief (GCLK_GENCTRL) XOSC32K oscillator output */
|
||||
#define GCLK_GENCTRL_SRC_OSC8M_Val 0x6ul /**< \brief (GCLK_GENCTRL) OSC8M oscillator output */
|
||||
#define GCLK_GENCTRL_SRC_DFLL48M_Val 0x7ul /**< \brief (GCLK_GENCTRL) DFLL48M output */
|
||||
#define GCLK_GENCTRL_SRC_FDPLL_Val 0x8ul /**< \brief (GCLK_GENCTRL) FDPLL output */
|
||||
#define GCLK_GENCTRL_SRC_XOSC (GCLK_GENCTRL_SRC_XOSC_Val << GCLK_GENCTRL_SRC_Pos)
|
||||
#define GCLK_GENCTRL_SRC_GCLKIN (GCLK_GENCTRL_SRC_GCLKIN_Val << GCLK_GENCTRL_SRC_Pos)
|
||||
#define GCLK_GENCTRL_SRC_GCLKGEN1 (GCLK_GENCTRL_SRC_GCLKGEN1_Val << GCLK_GENCTRL_SRC_Pos)
|
||||
#define GCLK_GENCTRL_SRC_OSCULP32K (GCLK_GENCTRL_SRC_OSCULP32K_Val << GCLK_GENCTRL_SRC_Pos)
|
||||
#define GCLK_GENCTRL_SRC_OSC32K (GCLK_GENCTRL_SRC_OSC32K_Val << GCLK_GENCTRL_SRC_Pos)
|
||||
#define GCLK_GENCTRL_SRC_XOSC32K (GCLK_GENCTRL_SRC_XOSC32K_Val << GCLK_GENCTRL_SRC_Pos)
|
||||
#define GCLK_GENCTRL_SRC_OSC8M (GCLK_GENCTRL_SRC_OSC8M_Val << GCLK_GENCTRL_SRC_Pos)
|
||||
#define GCLK_GENCTRL_SRC_DFLL48M (GCLK_GENCTRL_SRC_DFLL48M_Val << GCLK_GENCTRL_SRC_Pos)
|
||||
#define GCLK_GENCTRL_SRC_FDPLL (GCLK_GENCTRL_SRC_FDPLL_Val << GCLK_GENCTRL_SRC_Pos)
|
||||
#define GCLK_GENCTRL_GENEN_Pos 16 /**< \brief (GCLK_GENCTRL) Generic Clock Generator Enable */
|
||||
#define GCLK_GENCTRL_GENEN (0x1ul << GCLK_GENCTRL_GENEN_Pos)
|
||||
#define GCLK_GENCTRL_IDC_Pos 17 /**< \brief (GCLK_GENCTRL) Improve Duty Cycle */
|
||||
#define GCLK_GENCTRL_IDC (0x1ul << GCLK_GENCTRL_IDC_Pos)
|
||||
#define GCLK_GENCTRL_OOV_Pos 18 /**< \brief (GCLK_GENCTRL) Output Off Value */
|
||||
#define GCLK_GENCTRL_OOV (0x1ul << GCLK_GENCTRL_OOV_Pos)
|
||||
#define GCLK_GENCTRL_OE_Pos 19 /**< \brief (GCLK_GENCTRL) Output Enable */
|
||||
#define GCLK_GENCTRL_OE (0x1ul << GCLK_GENCTRL_OE_Pos)
|
||||
#define GCLK_GENCTRL_DIVSEL_Pos 20 /**< \brief (GCLK_GENCTRL) Divide Selection */
|
||||
#define GCLK_GENCTRL_DIVSEL (0x1ul << GCLK_GENCTRL_DIVSEL_Pos)
|
||||
#define GCLK_GENCTRL_RUNSTDBY_Pos 21 /**< \brief (GCLK_GENCTRL) Run in Standby */
|
||||
#define GCLK_GENCTRL_RUNSTDBY (0x1ul << GCLK_GENCTRL_RUNSTDBY_Pos)
|
||||
#define GCLK_GENCTRL_MASK 0x003F1F0Ful /**< \brief (GCLK_GENCTRL) MASK Register */
|
||||
|
||||
/* -------- GCLK_GENDIV : (GCLK Offset: 0x8) (R/W 32) Generic Clock Generator Division -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t ID:4; /*!< bit: 0.. 3 Generic Clock Generator Selection */
|
||||
uint32_t :4; /*!< bit: 4.. 7 Reserved */
|
||||
uint32_t DIV:16; /*!< bit: 8..23 Division Factor */
|
||||
uint32_t :8; /*!< bit: 24..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} GCLK_GENDIV_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define GCLK_GENDIV_OFFSET 0x8 /**< \brief (GCLK_GENDIV offset) Generic Clock Generator Division */
|
||||
#define GCLK_GENDIV_RESETVALUE 0x00000000ul /**< \brief (GCLK_GENDIV reset_value) Generic Clock Generator Division */
|
||||
|
||||
#define GCLK_GENDIV_ID_Pos 0 /**< \brief (GCLK_GENDIV) Generic Clock Generator Selection */
|
||||
#define GCLK_GENDIV_ID_Msk (0xFul << GCLK_GENDIV_ID_Pos)
|
||||
#define GCLK_GENDIV_ID(value) (GCLK_GENDIV_ID_Msk & ((value) << GCLK_GENDIV_ID_Pos))
|
||||
#define GCLK_GENDIV_DIV_Pos 8 /**< \brief (GCLK_GENDIV) Division Factor */
|
||||
#define GCLK_GENDIV_DIV_Msk (0xFFFFul << GCLK_GENDIV_DIV_Pos)
|
||||
#define GCLK_GENDIV_DIV(value) (GCLK_GENDIV_DIV_Msk & ((value) << GCLK_GENDIV_DIV_Pos))
|
||||
#define GCLK_GENDIV_MASK 0x00FFFF0Ful /**< \brief (GCLK_GENDIV) MASK Register */
|
||||
|
||||
/** \brief GCLK hardware registers */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef struct {
|
||||
__IO GCLK_CTRL_Type CTRL; /**< \brief Offset: 0x0 (R/W 8) Control */
|
||||
__I GCLK_STATUS_Type STATUS; /**< \brief Offset: 0x1 (R/ 8) Status */
|
||||
__IO GCLK_CLKCTRL_Type CLKCTRL; /**< \brief Offset: 0x2 (R/W 16) Generic Clock Control */
|
||||
__IO GCLK_GENCTRL_Type GENCTRL; /**< \brief Offset: 0x4 (R/W 32) Generic Clock Generator Control */
|
||||
__IO GCLK_GENDIV_Type GENDIV; /**< \brief Offset: 0x8 (R/W 32) Generic Clock Generator Division */
|
||||
} Gclk;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/*@}*/
|
||||
|
||||
#endif /* _SAMD21_GCLK_COMPONENT_ */
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Component description for GCLK
|
||||
*
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_GCLK_COMPONENT_
|
||||
#define _SAMD21_GCLK_COMPONENT_
|
||||
|
||||
/* ========================================================================== */
|
||||
/** SOFTWARE API DEFINITION FOR GCLK */
|
||||
/* ========================================================================== */
|
||||
/** \addtogroup SAMD21_GCLK Generic Clock Generator */
|
||||
/*@{*/
|
||||
|
||||
#define GCLK_U2102
|
||||
#define REV_GCLK 0x210
|
||||
|
||||
/* -------- GCLK_CTRL : (GCLK Offset: 0x0) (R/W 8) Control -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint8_t SWRST:1; /*!< bit: 0 Software Reset */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} GCLK_CTRL_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define GCLK_CTRL_OFFSET 0x0 /**< \brief (GCLK_CTRL offset) Control */
|
||||
#define GCLK_CTRL_RESETVALUE 0x00ul /**< \brief (GCLK_CTRL reset_value) Control */
|
||||
|
||||
#define GCLK_CTRL_SWRST_Pos 0 /**< \brief (GCLK_CTRL) Software Reset */
|
||||
#define GCLK_CTRL_SWRST (0x1ul << GCLK_CTRL_SWRST_Pos)
|
||||
#define GCLK_CTRL_MASK 0x01ul /**< \brief (GCLK_CTRL) MASK Register */
|
||||
|
||||
/* -------- GCLK_STATUS : (GCLK Offset: 0x1) (R/ 8) Status -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint8_t :7; /*!< bit: 0.. 6 Reserved */
|
||||
uint8_t SYNCBUSY:1; /*!< bit: 7 Synchronization Busy Status */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} GCLK_STATUS_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define GCLK_STATUS_OFFSET 0x1 /**< \brief (GCLK_STATUS offset) Status */
|
||||
#define GCLK_STATUS_RESETVALUE 0x00ul /**< \brief (GCLK_STATUS reset_value) Status */
|
||||
|
||||
#define GCLK_STATUS_SYNCBUSY_Pos 7 /**< \brief (GCLK_STATUS) Synchronization Busy Status */
|
||||
#define GCLK_STATUS_SYNCBUSY (0x1ul << GCLK_STATUS_SYNCBUSY_Pos)
|
||||
#define GCLK_STATUS_MASK 0x80ul /**< \brief (GCLK_STATUS) MASK Register */
|
||||
|
||||
/* -------- GCLK_CLKCTRL : (GCLK Offset: 0x2) (R/W 16) Generic Clock Control -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint16_t ID:6; /*!< bit: 0.. 5 Generic Clock Selection ID */
|
||||
uint16_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
uint16_t GEN:4; /*!< bit: 8..11 Generic Clock Generator */
|
||||
uint16_t :2; /*!< bit: 12..13 Reserved */
|
||||
uint16_t CLKEN:1; /*!< bit: 14 Clock Enable */
|
||||
uint16_t WRTLOCK:1; /*!< bit: 15 Write Lock */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint16_t reg; /*!< Type used for register access */
|
||||
} GCLK_CLKCTRL_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define GCLK_CLKCTRL_OFFSET 0x2 /**< \brief (GCLK_CLKCTRL offset) Generic Clock Control */
|
||||
#define GCLK_CLKCTRL_RESETVALUE 0x0000ul /**< \brief (GCLK_CLKCTRL reset_value) Generic Clock Control */
|
||||
|
||||
#define GCLK_CLKCTRL_ID_Pos 0 /**< \brief (GCLK_CLKCTRL) Generic Clock Selection ID */
|
||||
#define GCLK_CLKCTRL_ID_Msk (0x3Ful << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID(value) (GCLK_CLKCTRL_ID_Msk & ((value) << GCLK_CLKCTRL_ID_Pos))
|
||||
#define GCLK_CLKCTRL_ID_DFLL48_Val 0x0ul /**< \brief (GCLK_CLKCTRL) DFLL48 */
|
||||
#define GCLK_CLKCTRL_ID_FDPLL_Val 0x1ul /**< \brief (GCLK_CLKCTRL) FDPLL */
|
||||
#define GCLK_CLKCTRL_ID_FDPLL32K_Val 0x2ul /**< \brief (GCLK_CLKCTRL) FDPLL32K */
|
||||
#define GCLK_CLKCTRL_ID_WDT_Val 0x3ul /**< \brief (GCLK_CLKCTRL) WDT */
|
||||
#define GCLK_CLKCTRL_ID_RTC_Val 0x4ul /**< \brief (GCLK_CLKCTRL) RTC */
|
||||
#define GCLK_CLKCTRL_ID_EIC_Val 0x5ul /**< \brief (GCLK_CLKCTRL) EIC */
|
||||
#define GCLK_CLKCTRL_ID_USB_Val 0x6ul /**< \brief (GCLK_CLKCTRL) USB */
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_0_Val 0x7ul /**< \brief (GCLK_CLKCTRL) EVSYS_0 */
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_1_Val 0x8ul /**< \brief (GCLK_CLKCTRL) EVSYS_1 */
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_2_Val 0x9ul /**< \brief (GCLK_CLKCTRL) EVSYS_2 */
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_3_Val 0xAul /**< \brief (GCLK_CLKCTRL) EVSYS_3 */
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_4_Val 0xBul /**< \brief (GCLK_CLKCTRL) EVSYS_4 */
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_5_Val 0xCul /**< \brief (GCLK_CLKCTRL) EVSYS_5 */
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_6_Val 0xDul /**< \brief (GCLK_CLKCTRL) EVSYS_6 */
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_7_Val 0xEul /**< \brief (GCLK_CLKCTRL) EVSYS_7 */
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_8_Val 0xFul /**< \brief (GCLK_CLKCTRL) EVSYS_8 */
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_9_Val 0x10ul /**< \brief (GCLK_CLKCTRL) EVSYS_9 */
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_10_Val 0x11ul /**< \brief (GCLK_CLKCTRL) EVSYS_10 */
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_11_Val 0x12ul /**< \brief (GCLK_CLKCTRL) EVSYS_11 */
|
||||
#define GCLK_CLKCTRL_ID_SERCOMX_SLOW_Val 0x13ul /**< \brief (GCLK_CLKCTRL) SERCOMX_SLOW */
|
||||
#define GCLK_CLKCTRL_ID_SERCOM0_CORE_Val 0x14ul /**< \brief (GCLK_CLKCTRL) SERCOM0_CORE */
|
||||
#define GCLK_CLKCTRL_ID_SERCOM1_CORE_Val 0x15ul /**< \brief (GCLK_CLKCTRL) SERCOM1_CORE */
|
||||
#define GCLK_CLKCTRL_ID_SERCOM2_CORE_Val 0x16ul /**< \brief (GCLK_CLKCTRL) SERCOM2_CORE */
|
||||
#define GCLK_CLKCTRL_ID_SERCOM3_CORE_Val 0x17ul /**< \brief (GCLK_CLKCTRL) SERCOM3_CORE */
|
||||
#define GCLK_CLKCTRL_ID_SERCOM4_CORE_Val 0x18ul /**< \brief (GCLK_CLKCTRL) SERCOM4_CORE */
|
||||
#define GCLK_CLKCTRL_ID_SERCOM5_CORE_Val 0x19ul /**< \brief (GCLK_CLKCTRL) SERCOM5_CORE */
|
||||
#define GCLK_CLKCTRL_ID_TCC0_TCC1_Val 0x1Aul /**< \brief (GCLK_CLKCTRL) TCC0_TCC1 */
|
||||
#define GCLK_CLKCTRL_ID_TCC2_TC3_Val 0x1Bul /**< \brief (GCLK_CLKCTRL) TCC2_TC3 */
|
||||
#define GCLK_CLKCTRL_ID_TC4_TC5_Val 0x1Cul /**< \brief (GCLK_CLKCTRL) TC4_TC5 */
|
||||
#define GCLK_CLKCTRL_ID_TC6_TC7_Val 0x1Dul /**< \brief (GCLK_CLKCTRL) TC6_TC7 */
|
||||
#define GCLK_CLKCTRL_ID_ADC_Val 0x1Eul /**< \brief (GCLK_CLKCTRL) ADC */
|
||||
#define GCLK_CLKCTRL_ID_AC_DIG_Val 0x1Ful /**< \brief (GCLK_CLKCTRL) AC_DIG */
|
||||
#define GCLK_CLKCTRL_ID_AC_ANA_Val 0x20ul /**< \brief (GCLK_CLKCTRL) AC_ANA */
|
||||
#define GCLK_CLKCTRL_ID_DAC_Val 0x21ul /**< \brief (GCLK_CLKCTRL) DAC */
|
||||
#define GCLK_CLKCTRL_ID_PTC_Val 0x22ul /**< \brief (GCLK_CLKCTRL) PTC */
|
||||
#define GCLK_CLKCTRL_ID_I2S_0_Val 0x23ul /**< \brief (GCLK_CLKCTRL) I2S_0 */
|
||||
#define GCLK_CLKCTRL_ID_I2S_1_Val 0x24ul /**< \brief (GCLK_CLKCTRL) I2S_1 */
|
||||
#define GCLK_CLKCTRL_ID_DFLL48 (GCLK_CLKCTRL_ID_DFLL48_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_FDPLL (GCLK_CLKCTRL_ID_FDPLL_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_FDPLL32K (GCLK_CLKCTRL_ID_FDPLL32K_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_WDT (GCLK_CLKCTRL_ID_WDT_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_RTC (GCLK_CLKCTRL_ID_RTC_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EIC (GCLK_CLKCTRL_ID_EIC_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_USB (GCLK_CLKCTRL_ID_USB_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_0 (GCLK_CLKCTRL_ID_EVSYS_0_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_1 (GCLK_CLKCTRL_ID_EVSYS_1_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_2 (GCLK_CLKCTRL_ID_EVSYS_2_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_3 (GCLK_CLKCTRL_ID_EVSYS_3_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_4 (GCLK_CLKCTRL_ID_EVSYS_4_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_5 (GCLK_CLKCTRL_ID_EVSYS_5_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_6 (GCLK_CLKCTRL_ID_EVSYS_6_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_7 (GCLK_CLKCTRL_ID_EVSYS_7_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_8 (GCLK_CLKCTRL_ID_EVSYS_8_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_9 (GCLK_CLKCTRL_ID_EVSYS_9_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_10 (GCLK_CLKCTRL_ID_EVSYS_10_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_EVSYS_11 (GCLK_CLKCTRL_ID_EVSYS_11_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_SERCOMX_SLOW (GCLK_CLKCTRL_ID_SERCOMX_SLOW_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_SERCOM0_CORE (GCLK_CLKCTRL_ID_SERCOM0_CORE_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_SERCOM1_CORE (GCLK_CLKCTRL_ID_SERCOM1_CORE_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_SERCOM2_CORE (GCLK_CLKCTRL_ID_SERCOM2_CORE_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_SERCOM3_CORE (GCLK_CLKCTRL_ID_SERCOM3_CORE_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_SERCOM4_CORE (GCLK_CLKCTRL_ID_SERCOM4_CORE_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_SERCOM5_CORE (GCLK_CLKCTRL_ID_SERCOM5_CORE_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_TCC0_TCC1 (GCLK_CLKCTRL_ID_TCC0_TCC1_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_TCC2_TC3 (GCLK_CLKCTRL_ID_TCC2_TC3_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_TC4_TC5 (GCLK_CLKCTRL_ID_TC4_TC5_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_TC6_TC7 (GCLK_CLKCTRL_ID_TC6_TC7_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_ADC (GCLK_CLKCTRL_ID_ADC_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_AC_DIG (GCLK_CLKCTRL_ID_AC_DIG_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_AC_ANA (GCLK_CLKCTRL_ID_AC_ANA_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_DAC (GCLK_CLKCTRL_ID_DAC_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_PTC (GCLK_CLKCTRL_ID_PTC_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_I2S_0 (GCLK_CLKCTRL_ID_I2S_0_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_ID_I2S_1 (GCLK_CLKCTRL_ID_I2S_1_Val << GCLK_CLKCTRL_ID_Pos)
|
||||
#define GCLK_CLKCTRL_GEN_Pos 8 /**< \brief (GCLK_CLKCTRL) Generic Clock Generator */
|
||||
#define GCLK_CLKCTRL_GEN_Msk (0xFul << GCLK_CLKCTRL_GEN_Pos)
|
||||
#define GCLK_CLKCTRL_GEN(value) (GCLK_CLKCTRL_GEN_Msk & ((value) << GCLK_CLKCTRL_GEN_Pos))
|
||||
#define GCLK_CLKCTRL_GEN_GCLK0_Val 0x0ul /**< \brief (GCLK_CLKCTRL) Generic clock generator 0 */
|
||||
#define GCLK_CLKCTRL_GEN_GCLK1_Val 0x1ul /**< \brief (GCLK_CLKCTRL) Generic clock generator 1 */
|
||||
#define GCLK_CLKCTRL_GEN_GCLK2_Val 0x2ul /**< \brief (GCLK_CLKCTRL) Generic clock generator 2 */
|
||||
#define GCLK_CLKCTRL_GEN_GCLK3_Val 0x3ul /**< \brief (GCLK_CLKCTRL) Generic clock generator 3 */
|
||||
#define GCLK_CLKCTRL_GEN_GCLK4_Val 0x4ul /**< \brief (GCLK_CLKCTRL) Generic clock generator 4 */
|
||||
#define GCLK_CLKCTRL_GEN_GCLK5_Val 0x5ul /**< \brief (GCLK_CLKCTRL) Generic clock generator 5 */
|
||||
#define GCLK_CLKCTRL_GEN_GCLK6_Val 0x6ul /**< \brief (GCLK_CLKCTRL) Generic clock generator 6 */
|
||||
#define GCLK_CLKCTRL_GEN_GCLK7_Val 0x7ul /**< \brief (GCLK_CLKCTRL) Generic clock generator 7 */
|
||||
#define GCLK_CLKCTRL_GEN_GCLK0 (GCLK_CLKCTRL_GEN_GCLK0_Val << GCLK_CLKCTRL_GEN_Pos)
|
||||
#define GCLK_CLKCTRL_GEN_GCLK1 (GCLK_CLKCTRL_GEN_GCLK1_Val << GCLK_CLKCTRL_GEN_Pos)
|
||||
#define GCLK_CLKCTRL_GEN_GCLK2 (GCLK_CLKCTRL_GEN_GCLK2_Val << GCLK_CLKCTRL_GEN_Pos)
|
||||
#define GCLK_CLKCTRL_GEN_GCLK3 (GCLK_CLKCTRL_GEN_GCLK3_Val << GCLK_CLKCTRL_GEN_Pos)
|
||||
#define GCLK_CLKCTRL_GEN_GCLK4 (GCLK_CLKCTRL_GEN_GCLK4_Val << GCLK_CLKCTRL_GEN_Pos)
|
||||
#define GCLK_CLKCTRL_GEN_GCLK5 (GCLK_CLKCTRL_GEN_GCLK5_Val << GCLK_CLKCTRL_GEN_Pos)
|
||||
#define GCLK_CLKCTRL_GEN_GCLK6 (GCLK_CLKCTRL_GEN_GCLK6_Val << GCLK_CLKCTRL_GEN_Pos)
|
||||
#define GCLK_CLKCTRL_GEN_GCLK7 (GCLK_CLKCTRL_GEN_GCLK7_Val << GCLK_CLKCTRL_GEN_Pos)
|
||||
#define GCLK_CLKCTRL_CLKEN_Pos 14 /**< \brief (GCLK_CLKCTRL) Clock Enable */
|
||||
#define GCLK_CLKCTRL_CLKEN (0x1ul << GCLK_CLKCTRL_CLKEN_Pos)
|
||||
#define GCLK_CLKCTRL_WRTLOCK_Pos 15 /**< \brief (GCLK_CLKCTRL) Write Lock */
|
||||
#define GCLK_CLKCTRL_WRTLOCK (0x1ul << GCLK_CLKCTRL_WRTLOCK_Pos)
|
||||
#define GCLK_CLKCTRL_MASK 0xCF3Ful /**< \brief (GCLK_CLKCTRL) MASK Register */
|
||||
|
||||
/* -------- GCLK_GENCTRL : (GCLK Offset: 0x4) (R/W 32) Generic Clock Generator Control -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t ID:4; /*!< bit: 0.. 3 Generic Clock Generator Selection */
|
||||
uint32_t :4; /*!< bit: 4.. 7 Reserved */
|
||||
uint32_t SRC:5; /*!< bit: 8..12 Source Select */
|
||||
uint32_t :3; /*!< bit: 13..15 Reserved */
|
||||
uint32_t GENEN:1; /*!< bit: 16 Generic Clock Generator Enable */
|
||||
uint32_t IDC:1; /*!< bit: 17 Improve Duty Cycle */
|
||||
uint32_t OOV:1; /*!< bit: 18 Output Off Value */
|
||||
uint32_t OE:1; /*!< bit: 19 Output Enable */
|
||||
uint32_t DIVSEL:1; /*!< bit: 20 Divide Selection */
|
||||
uint32_t RUNSTDBY:1; /*!< bit: 21 Run in Standby */
|
||||
uint32_t :10; /*!< bit: 22..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} GCLK_GENCTRL_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define GCLK_GENCTRL_OFFSET 0x4 /**< \brief (GCLK_GENCTRL offset) Generic Clock Generator Control */
|
||||
#define GCLK_GENCTRL_RESETVALUE 0x00000000ul /**< \brief (GCLK_GENCTRL reset_value) Generic Clock Generator Control */
|
||||
|
||||
#define GCLK_GENCTRL_ID_Pos 0 /**< \brief (GCLK_GENCTRL) Generic Clock Generator Selection */
|
||||
#define GCLK_GENCTRL_ID_Msk (0xFul << GCLK_GENCTRL_ID_Pos)
|
||||
#define GCLK_GENCTRL_ID(value) (GCLK_GENCTRL_ID_Msk & ((value) << GCLK_GENCTRL_ID_Pos))
|
||||
#define GCLK_GENCTRL_SRC_Pos 8 /**< \brief (GCLK_GENCTRL) Source Select */
|
||||
#define GCLK_GENCTRL_SRC_Msk (0x1Ful << GCLK_GENCTRL_SRC_Pos)
|
||||
#define GCLK_GENCTRL_SRC(value) (GCLK_GENCTRL_SRC_Msk & ((value) << GCLK_GENCTRL_SRC_Pos))
|
||||
#define GCLK_GENCTRL_SRC_XOSC_Val 0x0ul /**< \brief (GCLK_GENCTRL) XOSC oscillator output */
|
||||
#define GCLK_GENCTRL_SRC_GCLKIN_Val 0x1ul /**< \brief (GCLK_GENCTRL) Generator input pad */
|
||||
#define GCLK_GENCTRL_SRC_GCLKGEN1_Val 0x2ul /**< \brief (GCLK_GENCTRL) Generic clock generator 1 output */
|
||||
#define GCLK_GENCTRL_SRC_OSCULP32K_Val 0x3ul /**< \brief (GCLK_GENCTRL) OSCULP32K oscillator output */
|
||||
#define GCLK_GENCTRL_SRC_OSC32K_Val 0x4ul /**< \brief (GCLK_GENCTRL) OSC32K oscillator output */
|
||||
#define GCLK_GENCTRL_SRC_XOSC32K_Val 0x5ul /**< \brief (GCLK_GENCTRL) XOSC32K oscillator output */
|
||||
#define GCLK_GENCTRL_SRC_OSC8M_Val 0x6ul /**< \brief (GCLK_GENCTRL) OSC8M oscillator output */
|
||||
#define GCLK_GENCTRL_SRC_DFLL48M_Val 0x7ul /**< \brief (GCLK_GENCTRL) DFLL48M output */
|
||||
#define GCLK_GENCTRL_SRC_FDPLL_Val 0x8ul /**< \brief (GCLK_GENCTRL) FDPLL output */
|
||||
#define GCLK_GENCTRL_SRC_XOSC (GCLK_GENCTRL_SRC_XOSC_Val << GCLK_GENCTRL_SRC_Pos)
|
||||
#define GCLK_GENCTRL_SRC_GCLKIN (GCLK_GENCTRL_SRC_GCLKIN_Val << GCLK_GENCTRL_SRC_Pos)
|
||||
#define GCLK_GENCTRL_SRC_GCLKGEN1 (GCLK_GENCTRL_SRC_GCLKGEN1_Val << GCLK_GENCTRL_SRC_Pos)
|
||||
#define GCLK_GENCTRL_SRC_OSCULP32K (GCLK_GENCTRL_SRC_OSCULP32K_Val << GCLK_GENCTRL_SRC_Pos)
|
||||
#define GCLK_GENCTRL_SRC_OSC32K (GCLK_GENCTRL_SRC_OSC32K_Val << GCLK_GENCTRL_SRC_Pos)
|
||||
#define GCLK_GENCTRL_SRC_XOSC32K (GCLK_GENCTRL_SRC_XOSC32K_Val << GCLK_GENCTRL_SRC_Pos)
|
||||
#define GCLK_GENCTRL_SRC_OSC8M (GCLK_GENCTRL_SRC_OSC8M_Val << GCLK_GENCTRL_SRC_Pos)
|
||||
#define GCLK_GENCTRL_SRC_DFLL48M (GCLK_GENCTRL_SRC_DFLL48M_Val << GCLK_GENCTRL_SRC_Pos)
|
||||
#define GCLK_GENCTRL_SRC_FDPLL (GCLK_GENCTRL_SRC_FDPLL_Val << GCLK_GENCTRL_SRC_Pos)
|
||||
#define GCLK_GENCTRL_GENEN_Pos 16 /**< \brief (GCLK_GENCTRL) Generic Clock Generator Enable */
|
||||
#define GCLK_GENCTRL_GENEN (0x1ul << GCLK_GENCTRL_GENEN_Pos)
|
||||
#define GCLK_GENCTRL_IDC_Pos 17 /**< \brief (GCLK_GENCTRL) Improve Duty Cycle */
|
||||
#define GCLK_GENCTRL_IDC (0x1ul << GCLK_GENCTRL_IDC_Pos)
|
||||
#define GCLK_GENCTRL_OOV_Pos 18 /**< \brief (GCLK_GENCTRL) Output Off Value */
|
||||
#define GCLK_GENCTRL_OOV (0x1ul << GCLK_GENCTRL_OOV_Pos)
|
||||
#define GCLK_GENCTRL_OE_Pos 19 /**< \brief (GCLK_GENCTRL) Output Enable */
|
||||
#define GCLK_GENCTRL_OE (0x1ul << GCLK_GENCTRL_OE_Pos)
|
||||
#define GCLK_GENCTRL_DIVSEL_Pos 20 /**< \brief (GCLK_GENCTRL) Divide Selection */
|
||||
#define GCLK_GENCTRL_DIVSEL (0x1ul << GCLK_GENCTRL_DIVSEL_Pos)
|
||||
#define GCLK_GENCTRL_RUNSTDBY_Pos 21 /**< \brief (GCLK_GENCTRL) Run in Standby */
|
||||
#define GCLK_GENCTRL_RUNSTDBY (0x1ul << GCLK_GENCTRL_RUNSTDBY_Pos)
|
||||
#define GCLK_GENCTRL_MASK 0x003F1F0Ful /**< \brief (GCLK_GENCTRL) MASK Register */
|
||||
|
||||
/* -------- GCLK_GENDIV : (GCLK Offset: 0x8) (R/W 32) Generic Clock Generator Division -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t ID:4; /*!< bit: 0.. 3 Generic Clock Generator Selection */
|
||||
uint32_t :4; /*!< bit: 4.. 7 Reserved */
|
||||
uint32_t DIV:16; /*!< bit: 8..23 Division Factor */
|
||||
uint32_t :8; /*!< bit: 24..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} GCLK_GENDIV_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define GCLK_GENDIV_OFFSET 0x8 /**< \brief (GCLK_GENDIV offset) Generic Clock Generator Division */
|
||||
#define GCLK_GENDIV_RESETVALUE 0x00000000ul /**< \brief (GCLK_GENDIV reset_value) Generic Clock Generator Division */
|
||||
|
||||
#define GCLK_GENDIV_ID_Pos 0 /**< \brief (GCLK_GENDIV) Generic Clock Generator Selection */
|
||||
#define GCLK_GENDIV_ID_Msk (0xFul << GCLK_GENDIV_ID_Pos)
|
||||
#define GCLK_GENDIV_ID(value) (GCLK_GENDIV_ID_Msk & ((value) << GCLK_GENDIV_ID_Pos))
|
||||
#define GCLK_GENDIV_DIV_Pos 8 /**< \brief (GCLK_GENDIV) Division Factor */
|
||||
#define GCLK_GENDIV_DIV_Msk (0xFFFFul << GCLK_GENDIV_DIV_Pos)
|
||||
#define GCLK_GENDIV_DIV(value) (GCLK_GENDIV_DIV_Msk & ((value) << GCLK_GENDIV_DIV_Pos))
|
||||
#define GCLK_GENDIV_MASK 0x00FFFF0Ful /**< \brief (GCLK_GENDIV) MASK Register */
|
||||
|
||||
/** \brief GCLK hardware registers */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef struct {
|
||||
__IO GCLK_CTRL_Type CTRL; /**< \brief Offset: 0x0 (R/W 8) Control */
|
||||
__I GCLK_STATUS_Type STATUS; /**< \brief Offset: 0x1 (R/ 8) Status */
|
||||
__IO GCLK_CLKCTRL_Type CLKCTRL; /**< \brief Offset: 0x2 (R/W 16) Generic Clock Control */
|
||||
__IO GCLK_GENCTRL_Type GENCTRL; /**< \brief Offset: 0x4 (R/W 32) Generic Clock Generator Control */
|
||||
__IO GCLK_GENDIV_Type GENDIV; /**< \brief Offset: 0x8 (R/W 32) Generic Clock Generator Division */
|
||||
} Gclk;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/*@}*/
|
||||
|
||||
#endif /* _SAMD21_GCLK_COMPONENT_ */
|
||||
|
||||
@ -1,108 +1,108 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Component description for HMATRIXB
|
||||
*
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_HMATRIXB_COMPONENT_
|
||||
#define _SAMD21_HMATRIXB_COMPONENT_
|
||||
|
||||
/* ========================================================================== */
|
||||
/** SOFTWARE API DEFINITION FOR HMATRIXB */
|
||||
/* ========================================================================== */
|
||||
/** \addtogroup SAMD21_HMATRIXB HSB Matrix */
|
||||
/*@{*/
|
||||
|
||||
#define HMATRIXB_I7638
|
||||
#define REV_HMATRIXB 0x212
|
||||
|
||||
/* -------- HMATRIXB_PRAS : (HMATRIXB Offset: 0x080) (R/W 32) PRS Priority A for Slave -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} HMATRIXB_PRAS_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define HMATRIXB_PRAS_OFFSET 0x080 /**< \brief (HMATRIXB_PRAS offset) Priority A for Slave */
|
||||
#define HMATRIXB_PRAS_RESETVALUE 0x00000000ul /**< \brief (HMATRIXB_PRAS reset_value) Priority A for Slave */
|
||||
|
||||
#define HMATRIXB_PRAS_MASK 0x00000000ul /**< \brief (HMATRIXB_PRAS) MASK Register */
|
||||
|
||||
/* -------- HMATRIXB_PRBS : (HMATRIXB Offset: 0x084) (R/W 32) PRS Priority B for Slave -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} HMATRIXB_PRBS_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define HMATRIXB_PRBS_OFFSET 0x084 /**< \brief (HMATRIXB_PRBS offset) Priority B for Slave */
|
||||
#define HMATRIXB_PRBS_RESETVALUE 0x00000000ul /**< \brief (HMATRIXB_PRBS reset_value) Priority B for Slave */
|
||||
|
||||
#define HMATRIXB_PRBS_MASK 0x00000000ul /**< \brief (HMATRIXB_PRBS) MASK Register */
|
||||
|
||||
/* -------- HMATRIXB_SFR : (HMATRIXB Offset: 0x110) (R/W 32) Special Function -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t SFR:32; /*!< bit: 0..31 Special Function Register */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} HMATRIXB_SFR_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define HMATRIXB_SFR_OFFSET 0x110 /**< \brief (HMATRIXB_SFR offset) Special Function */
|
||||
#define HMATRIXB_SFR_RESETVALUE 0x00000000ul /**< \brief (HMATRIXB_SFR reset_value) Special Function */
|
||||
|
||||
#define HMATRIXB_SFR_SFR_Pos 0 /**< \brief (HMATRIXB_SFR) Special Function Register */
|
||||
#define HMATRIXB_SFR_SFR_Msk (0xFFFFFFFFul << HMATRIXB_SFR_SFR_Pos)
|
||||
#define HMATRIXB_SFR_SFR(value) (HMATRIXB_SFR_SFR_Msk & ((value) << HMATRIXB_SFR_SFR_Pos))
|
||||
#define HMATRIXB_SFR_MASK 0xFFFFFFFFul /**< \brief (HMATRIXB_SFR) MASK Register */
|
||||
|
||||
/** \brief HmatrixbPrs hardware registers */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef struct {
|
||||
__IO HMATRIXB_PRAS_Type PRAS; /**< \brief Offset: 0x000 (R/W 32) Priority A for Slave */
|
||||
__IO HMATRIXB_PRBS_Type PRBS; /**< \brief Offset: 0x004 (R/W 32) Priority B for Slave */
|
||||
} HmatrixbPrs;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/** \brief HMATRIXB hardware registers */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef struct {
|
||||
RoReg8 Reserved1[0x80];
|
||||
HmatrixbPrs Prs[16]; /**< \brief Offset: 0x080 HmatrixbPrs groups */
|
||||
RoReg8 Reserved2[0x10];
|
||||
__IO HMATRIXB_SFR_Type SFR[16]; /**< \brief Offset: 0x110 (R/W 32) Special Function */
|
||||
} Hmatrixb;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/*@}*/
|
||||
|
||||
#endif /* _SAMD21_HMATRIXB_COMPONENT_ */
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Component description for HMATRIXB
|
||||
*
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_HMATRIXB_COMPONENT_
|
||||
#define _SAMD21_HMATRIXB_COMPONENT_
|
||||
|
||||
/* ========================================================================== */
|
||||
/** SOFTWARE API DEFINITION FOR HMATRIXB */
|
||||
/* ========================================================================== */
|
||||
/** \addtogroup SAMD21_HMATRIXB HSB Matrix */
|
||||
/*@{*/
|
||||
|
||||
#define HMATRIXB_I7638
|
||||
#define REV_HMATRIXB 0x212
|
||||
|
||||
/* -------- HMATRIXB_PRAS : (HMATRIXB Offset: 0x080) (R/W 32) PRS Priority A for Slave -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} HMATRIXB_PRAS_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define HMATRIXB_PRAS_OFFSET 0x080 /**< \brief (HMATRIXB_PRAS offset) Priority A for Slave */
|
||||
#define HMATRIXB_PRAS_RESETVALUE 0x00000000ul /**< \brief (HMATRIXB_PRAS reset_value) Priority A for Slave */
|
||||
|
||||
#define HMATRIXB_PRAS_MASK 0x00000000ul /**< \brief (HMATRIXB_PRAS) MASK Register */
|
||||
|
||||
/* -------- HMATRIXB_PRBS : (HMATRIXB Offset: 0x084) (R/W 32) PRS Priority B for Slave -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} HMATRIXB_PRBS_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define HMATRIXB_PRBS_OFFSET 0x084 /**< \brief (HMATRIXB_PRBS offset) Priority B for Slave */
|
||||
#define HMATRIXB_PRBS_RESETVALUE 0x00000000ul /**< \brief (HMATRIXB_PRBS reset_value) Priority B for Slave */
|
||||
|
||||
#define HMATRIXB_PRBS_MASK 0x00000000ul /**< \brief (HMATRIXB_PRBS) MASK Register */
|
||||
|
||||
/* -------- HMATRIXB_SFR : (HMATRIXB Offset: 0x110) (R/W 32) Special Function -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t SFR:32; /*!< bit: 0..31 Special Function Register */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} HMATRIXB_SFR_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define HMATRIXB_SFR_OFFSET 0x110 /**< \brief (HMATRIXB_SFR offset) Special Function */
|
||||
#define HMATRIXB_SFR_RESETVALUE 0x00000000ul /**< \brief (HMATRIXB_SFR reset_value) Special Function */
|
||||
|
||||
#define HMATRIXB_SFR_SFR_Pos 0 /**< \brief (HMATRIXB_SFR) Special Function Register */
|
||||
#define HMATRIXB_SFR_SFR_Msk (0xFFFFFFFFul << HMATRIXB_SFR_SFR_Pos)
|
||||
#define HMATRIXB_SFR_SFR(value) (HMATRIXB_SFR_SFR_Msk & ((value) << HMATRIXB_SFR_SFR_Pos))
|
||||
#define HMATRIXB_SFR_MASK 0xFFFFFFFFul /**< \brief (HMATRIXB_SFR) MASK Register */
|
||||
|
||||
/** \brief HmatrixbPrs hardware registers */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef struct {
|
||||
__IO HMATRIXB_PRAS_Type PRAS; /**< \brief Offset: 0x000 (R/W 32) Priority A for Slave */
|
||||
__IO HMATRIXB_PRBS_Type PRBS; /**< \brief Offset: 0x004 (R/W 32) Priority B for Slave */
|
||||
} HmatrixbPrs;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/** \brief HMATRIXB hardware registers */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef struct {
|
||||
RoReg8 Reserved1[0x80];
|
||||
HmatrixbPrs Prs[16]; /**< \brief Offset: 0x080 HmatrixbPrs groups */
|
||||
RoReg8 Reserved2[0x10];
|
||||
__IO HMATRIXB_SFR_Type SFR[16]; /**< \brief Offset: 0x110 (R/W 32) Special Function */
|
||||
} Hmatrixb;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/*@}*/
|
||||
|
||||
#endif /* _SAMD21_HMATRIXB_COMPONENT_ */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,386 +1,386 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Component description for MTB
|
||||
*
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_MTB_COMPONENT_
|
||||
#define _SAMD21_MTB_COMPONENT_
|
||||
|
||||
/* ========================================================================== */
|
||||
/** SOFTWARE API DEFINITION FOR MTB */
|
||||
/* ========================================================================== */
|
||||
/** \addtogroup SAMD21_MTB Cortex-M0+ Micro-Trace Buffer */
|
||||
/*@{*/
|
||||
|
||||
#define MTB_U2002
|
||||
#define REV_MTB 0x100
|
||||
|
||||
/* -------- MTB_POSITION : (MTB Offset: 0x000) (R/W 32) MTB Position -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t :2; /*!< bit: 0.. 1 Reserved */
|
||||
uint32_t WRAP:1; /*!< bit: 2 Pointer Value Wraps */
|
||||
uint32_t POINTER:29; /*!< bit: 3..31 Trace Packet Location Pointer */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_POSITION_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_POSITION_OFFSET 0x000 /**< \brief (MTB_POSITION offset) MTB Position */
|
||||
|
||||
#define MTB_POSITION_WRAP_Pos 2 /**< \brief (MTB_POSITION) Pointer Value Wraps */
|
||||
#define MTB_POSITION_WRAP (0x1ul << MTB_POSITION_WRAP_Pos)
|
||||
#define MTB_POSITION_POINTER_Pos 3 /**< \brief (MTB_POSITION) Trace Packet Location Pointer */
|
||||
#define MTB_POSITION_POINTER_Msk (0x1FFFFFFFul << MTB_POSITION_POINTER_Pos)
|
||||
#define MTB_POSITION_POINTER(value) (MTB_POSITION_POINTER_Msk & ((value) << MTB_POSITION_POINTER_Pos))
|
||||
#define MTB_POSITION_MASK 0xFFFFFFFCul /**< \brief (MTB_POSITION) MASK Register */
|
||||
|
||||
/* -------- MTB_MASTER : (MTB Offset: 0x004) (R/W 32) MTB Master -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t MASK:5; /*!< bit: 0.. 4 Maximum Value of the Trace Buffer in SRAM */
|
||||
uint32_t TSTARTEN:1; /*!< bit: 5 Trace Start Input Enable */
|
||||
uint32_t TSTOPEN:1; /*!< bit: 6 Trace Stop Input Enable */
|
||||
uint32_t SFRWPRIV:1; /*!< bit: 7 Special Function Register Write Privilege */
|
||||
uint32_t RAMPRIV:1; /*!< bit: 8 SRAM Privilege */
|
||||
uint32_t HALTREQ:1; /*!< bit: 9 Halt Request */
|
||||
uint32_t :21; /*!< bit: 10..30 Reserved */
|
||||
uint32_t EN:1; /*!< bit: 31 Main Trace Enable */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_MASTER_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_MASTER_OFFSET 0x004 /**< \brief (MTB_MASTER offset) MTB Master */
|
||||
#define MTB_MASTER_RESETVALUE 0x00000000ul /**< \brief (MTB_MASTER reset_value) MTB Master */
|
||||
|
||||
#define MTB_MASTER_MASK_Pos 0 /**< \brief (MTB_MASTER) Maximum Value of the Trace Buffer in SRAM */
|
||||
#define MTB_MASTER_MASK_Msk (0x1Ful << MTB_MASTER_MASK_Pos)
|
||||
#define MTB_MASTER_MASK(value) (MTB_MASTER_MASK_Msk & ((value) << MTB_MASTER_MASK_Pos))
|
||||
#define MTB_MASTER_TSTARTEN_Pos 5 /**< \brief (MTB_MASTER) Trace Start Input Enable */
|
||||
#define MTB_MASTER_TSTARTEN (0x1ul << MTB_MASTER_TSTARTEN_Pos)
|
||||
#define MTB_MASTER_TSTOPEN_Pos 6 /**< \brief (MTB_MASTER) Trace Stop Input Enable */
|
||||
#define MTB_MASTER_TSTOPEN (0x1ul << MTB_MASTER_TSTOPEN_Pos)
|
||||
#define MTB_MASTER_SFRWPRIV_Pos 7 /**< \brief (MTB_MASTER) Special Function Register Write Privilege */
|
||||
#define MTB_MASTER_SFRWPRIV (0x1ul << MTB_MASTER_SFRWPRIV_Pos)
|
||||
#define MTB_MASTER_RAMPRIV_Pos 8 /**< \brief (MTB_MASTER) SRAM Privilege */
|
||||
#define MTB_MASTER_RAMPRIV (0x1ul << MTB_MASTER_RAMPRIV_Pos)
|
||||
#define MTB_MASTER_HALTREQ_Pos 9 /**< \brief (MTB_MASTER) Halt Request */
|
||||
#define MTB_MASTER_HALTREQ (0x1ul << MTB_MASTER_HALTREQ_Pos)
|
||||
#define MTB_MASTER_EN_Pos 31 /**< \brief (MTB_MASTER) Main Trace Enable */
|
||||
#define MTB_MASTER_EN (0x1ul << MTB_MASTER_EN_Pos)
|
||||
#define MTB_MASTER_MASK_ 0x800003FFul /**< \brief (MTB_MASTER) MASK Register */
|
||||
|
||||
/* -------- MTB_FLOW : (MTB Offset: 0x008) (R/W 32) MTB Flow -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t AUTOSTOP:1; /*!< bit: 0 Auto Stop Tracing */
|
||||
uint32_t AUTOHALT:1; /*!< bit: 1 Auto Halt Request */
|
||||
uint32_t :1; /*!< bit: 2 Reserved */
|
||||
uint32_t WATERMARK:29; /*!< bit: 3..31 Watermark value */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_FLOW_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_FLOW_OFFSET 0x008 /**< \brief (MTB_FLOW offset) MTB Flow */
|
||||
#define MTB_FLOW_RESETVALUE 0x00000000ul /**< \brief (MTB_FLOW reset_value) MTB Flow */
|
||||
|
||||
#define MTB_FLOW_AUTOSTOP_Pos 0 /**< \brief (MTB_FLOW) Auto Stop Tracing */
|
||||
#define MTB_FLOW_AUTOSTOP (0x1ul << MTB_FLOW_AUTOSTOP_Pos)
|
||||
#define MTB_FLOW_AUTOHALT_Pos 1 /**< \brief (MTB_FLOW) Auto Halt Request */
|
||||
#define MTB_FLOW_AUTOHALT (0x1ul << MTB_FLOW_AUTOHALT_Pos)
|
||||
#define MTB_FLOW_WATERMARK_Pos 3 /**< \brief (MTB_FLOW) Watermark value */
|
||||
#define MTB_FLOW_WATERMARK_Msk (0x1FFFFFFFul << MTB_FLOW_WATERMARK_Pos)
|
||||
#define MTB_FLOW_WATERMARK(value) (MTB_FLOW_WATERMARK_Msk & ((value) << MTB_FLOW_WATERMARK_Pos))
|
||||
#define MTB_FLOW_MASK 0xFFFFFFFBul /**< \brief (MTB_FLOW) MASK Register */
|
||||
|
||||
/* -------- MTB_BASE : (MTB Offset: 0x00C) (R/ 32) MTB Base -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_BASE_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_BASE_OFFSET 0x00C /**< \brief (MTB_BASE offset) MTB Base */
|
||||
#define MTB_BASE_MASK 0xFFFFFFFFul /**< \brief (MTB_BASE) MASK Register */
|
||||
|
||||
/* -------- MTB_ITCTRL : (MTB Offset: 0xF00) (R/W 32) MTB Integration Mode Control -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_ITCTRL_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_ITCTRL_OFFSET 0xF00 /**< \brief (MTB_ITCTRL offset) MTB Integration Mode Control */
|
||||
#define MTB_ITCTRL_MASK 0xFFFFFFFFul /**< \brief (MTB_ITCTRL) MASK Register */
|
||||
|
||||
/* -------- MTB_CLAIMSET : (MTB Offset: 0xFA0) (R/W 32) MTB Claim Set -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_CLAIMSET_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_CLAIMSET_OFFSET 0xFA0 /**< \brief (MTB_CLAIMSET offset) MTB Claim Set */
|
||||
#define MTB_CLAIMSET_MASK 0xFFFFFFFFul /**< \brief (MTB_CLAIMSET) MASK Register */
|
||||
|
||||
/* -------- MTB_CLAIMCLR : (MTB Offset: 0xFA4) (R/W 32) MTB Claim Clear -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_CLAIMCLR_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_CLAIMCLR_OFFSET 0xFA4 /**< \brief (MTB_CLAIMCLR offset) MTB Claim Clear */
|
||||
#define MTB_CLAIMCLR_MASK 0xFFFFFFFFul /**< \brief (MTB_CLAIMCLR) MASK Register */
|
||||
|
||||
/* -------- MTB_LOCKACCESS : (MTB Offset: 0xFB0) (R/W 32) MTB Lock Access -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_LOCKACCESS_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_LOCKACCESS_OFFSET 0xFB0 /**< \brief (MTB_LOCKACCESS offset) MTB Lock Access */
|
||||
#define MTB_LOCKACCESS_MASK 0xFFFFFFFFul /**< \brief (MTB_LOCKACCESS) MASK Register */
|
||||
|
||||
/* -------- MTB_LOCKSTATUS : (MTB Offset: 0xFB4) (R/ 32) MTB Lock Status -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_LOCKSTATUS_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_LOCKSTATUS_OFFSET 0xFB4 /**< \brief (MTB_LOCKSTATUS offset) MTB Lock Status */
|
||||
#define MTB_LOCKSTATUS_MASK 0xFFFFFFFFul /**< \brief (MTB_LOCKSTATUS) MASK Register */
|
||||
|
||||
/* -------- MTB_AUTHSTATUS : (MTB Offset: 0xFB8) (R/ 32) MTB Authentication Status -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_AUTHSTATUS_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_AUTHSTATUS_OFFSET 0xFB8 /**< \brief (MTB_AUTHSTATUS offset) MTB Authentication Status */
|
||||
#define MTB_AUTHSTATUS_MASK 0xFFFFFFFFul /**< \brief (MTB_AUTHSTATUS) MASK Register */
|
||||
|
||||
/* -------- MTB_DEVARCH : (MTB Offset: 0xFBC) (R/ 32) MTB Device Architecture -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_DEVARCH_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_DEVARCH_OFFSET 0xFBC /**< \brief (MTB_DEVARCH offset) MTB Device Architecture */
|
||||
#define MTB_DEVARCH_MASK 0xFFFFFFFFul /**< \brief (MTB_DEVARCH) MASK Register */
|
||||
|
||||
/* -------- MTB_DEVID : (MTB Offset: 0xFC8) (R/ 32) MTB Device Configuration -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_DEVID_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_DEVID_OFFSET 0xFC8 /**< \brief (MTB_DEVID offset) MTB Device Configuration */
|
||||
#define MTB_DEVID_MASK 0xFFFFFFFFul /**< \brief (MTB_DEVID) MASK Register */
|
||||
|
||||
/* -------- MTB_DEVTYPE : (MTB Offset: 0xFCC) (R/ 32) MTB Device Type -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_DEVTYPE_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_DEVTYPE_OFFSET 0xFCC /**< \brief (MTB_DEVTYPE offset) MTB Device Type */
|
||||
#define MTB_DEVTYPE_MASK 0xFFFFFFFFul /**< \brief (MTB_DEVTYPE) MASK Register */
|
||||
|
||||
/* -------- MTB_PID4 : (MTB Offset: 0xFD0) (R/ 32) CoreSight -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_PID4_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_PID4_OFFSET 0xFD0 /**< \brief (MTB_PID4 offset) CoreSight */
|
||||
#define MTB_PID4_MASK 0xFFFFFFFFul /**< \brief (MTB_PID4) MASK Register */
|
||||
|
||||
/* -------- MTB_PID5 : (MTB Offset: 0xFD4) (R/ 32) CoreSight -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_PID5_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_PID5_OFFSET 0xFD4 /**< \brief (MTB_PID5 offset) CoreSight */
|
||||
#define MTB_PID5_MASK 0xFFFFFFFFul /**< \brief (MTB_PID5) MASK Register */
|
||||
|
||||
/* -------- MTB_PID6 : (MTB Offset: 0xFD8) (R/ 32) CoreSight -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_PID6_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_PID6_OFFSET 0xFD8 /**< \brief (MTB_PID6 offset) CoreSight */
|
||||
#define MTB_PID6_MASK 0xFFFFFFFFul /**< \brief (MTB_PID6) MASK Register */
|
||||
|
||||
/* -------- MTB_PID7 : (MTB Offset: 0xFDC) (R/ 32) CoreSight -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_PID7_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_PID7_OFFSET 0xFDC /**< \brief (MTB_PID7 offset) CoreSight */
|
||||
#define MTB_PID7_MASK 0xFFFFFFFFul /**< \brief (MTB_PID7) MASK Register */
|
||||
|
||||
/* -------- MTB_PID0 : (MTB Offset: 0xFE0) (R/ 32) CoreSight -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_PID0_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_PID0_OFFSET 0xFE0 /**< \brief (MTB_PID0 offset) CoreSight */
|
||||
#define MTB_PID0_MASK 0xFFFFFFFFul /**< \brief (MTB_PID0) MASK Register */
|
||||
|
||||
/* -------- MTB_PID1 : (MTB Offset: 0xFE4) (R/ 32) CoreSight -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_PID1_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_PID1_OFFSET 0xFE4 /**< \brief (MTB_PID1 offset) CoreSight */
|
||||
#define MTB_PID1_MASK 0xFFFFFFFFul /**< \brief (MTB_PID1) MASK Register */
|
||||
|
||||
/* -------- MTB_PID2 : (MTB Offset: 0xFE8) (R/ 32) CoreSight -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_PID2_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_PID2_OFFSET 0xFE8 /**< \brief (MTB_PID2 offset) CoreSight */
|
||||
#define MTB_PID2_MASK 0xFFFFFFFFul /**< \brief (MTB_PID2) MASK Register */
|
||||
|
||||
/* -------- MTB_PID3 : (MTB Offset: 0xFEC) (R/ 32) CoreSight -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_PID3_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_PID3_OFFSET 0xFEC /**< \brief (MTB_PID3 offset) CoreSight */
|
||||
#define MTB_PID3_MASK 0xFFFFFFFFul /**< \brief (MTB_PID3) MASK Register */
|
||||
|
||||
/* -------- MTB_CID0 : (MTB Offset: 0xFF0) (R/ 32) CoreSight -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_CID0_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_CID0_OFFSET 0xFF0 /**< \brief (MTB_CID0 offset) CoreSight */
|
||||
#define MTB_CID0_MASK 0xFFFFFFFFul /**< \brief (MTB_CID0) MASK Register */
|
||||
|
||||
/* -------- MTB_CID1 : (MTB Offset: 0xFF4) (R/ 32) CoreSight -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_CID1_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_CID1_OFFSET 0xFF4 /**< \brief (MTB_CID1 offset) CoreSight */
|
||||
#define MTB_CID1_MASK 0xFFFFFFFFul /**< \brief (MTB_CID1) MASK Register */
|
||||
|
||||
/* -------- MTB_CID2 : (MTB Offset: 0xFF8) (R/ 32) CoreSight -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_CID2_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_CID2_OFFSET 0xFF8 /**< \brief (MTB_CID2 offset) CoreSight */
|
||||
#define MTB_CID2_MASK 0xFFFFFFFFul /**< \brief (MTB_CID2) MASK Register */
|
||||
|
||||
/* -------- MTB_CID3 : (MTB Offset: 0xFFC) (R/ 32) CoreSight -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_CID3_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_CID3_OFFSET 0xFFC /**< \brief (MTB_CID3 offset) CoreSight */
|
||||
#define MTB_CID3_MASK 0xFFFFFFFFul /**< \brief (MTB_CID3) MASK Register */
|
||||
|
||||
/** \brief MTB hardware registers */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef struct {
|
||||
__IO MTB_POSITION_Type POSITION; /**< \brief Offset: 0x000 (R/W 32) MTB Position */
|
||||
__IO MTB_MASTER_Type MASTER; /**< \brief Offset: 0x004 (R/W 32) MTB Master */
|
||||
__IO MTB_FLOW_Type FLOW; /**< \brief Offset: 0x008 (R/W 32) MTB Flow */
|
||||
__I MTB_BASE_Type BASE; /**< \brief Offset: 0x00C (R/ 32) MTB Base */
|
||||
RoReg8 Reserved1[0xEF0];
|
||||
__IO MTB_ITCTRL_Type ITCTRL; /**< \brief Offset: 0xF00 (R/W 32) MTB Integration Mode Control */
|
||||
RoReg8 Reserved2[0x9C];
|
||||
__IO MTB_CLAIMSET_Type CLAIMSET; /**< \brief Offset: 0xFA0 (R/W 32) MTB Claim Set */
|
||||
__IO MTB_CLAIMCLR_Type CLAIMCLR; /**< \brief Offset: 0xFA4 (R/W 32) MTB Claim Clear */
|
||||
RoReg8 Reserved3[0x8];
|
||||
__IO MTB_LOCKACCESS_Type LOCKACCESS; /**< \brief Offset: 0xFB0 (R/W 32) MTB Lock Access */
|
||||
__I MTB_LOCKSTATUS_Type LOCKSTATUS; /**< \brief Offset: 0xFB4 (R/ 32) MTB Lock Status */
|
||||
__I MTB_AUTHSTATUS_Type AUTHSTATUS; /**< \brief Offset: 0xFB8 (R/ 32) MTB Authentication Status */
|
||||
__I MTB_DEVARCH_Type DEVARCH; /**< \brief Offset: 0xFBC (R/ 32) MTB Device Architecture */
|
||||
RoReg8 Reserved4[0x8];
|
||||
__I MTB_DEVID_Type DEVID; /**< \brief Offset: 0xFC8 (R/ 32) MTB Device Configuration */
|
||||
__I MTB_DEVTYPE_Type DEVTYPE; /**< \brief Offset: 0xFCC (R/ 32) MTB Device Type */
|
||||
__I MTB_PID4_Type PID4; /**< \brief Offset: 0xFD0 (R/ 32) CoreSight */
|
||||
__I MTB_PID5_Type PID5; /**< \brief Offset: 0xFD4 (R/ 32) CoreSight */
|
||||
__I MTB_PID6_Type PID6; /**< \brief Offset: 0xFD8 (R/ 32) CoreSight */
|
||||
__I MTB_PID7_Type PID7; /**< \brief Offset: 0xFDC (R/ 32) CoreSight */
|
||||
__I MTB_PID0_Type PID0; /**< \brief Offset: 0xFE0 (R/ 32) CoreSight */
|
||||
__I MTB_PID1_Type PID1; /**< \brief Offset: 0xFE4 (R/ 32) CoreSight */
|
||||
__I MTB_PID2_Type PID2; /**< \brief Offset: 0xFE8 (R/ 32) CoreSight */
|
||||
__I MTB_PID3_Type PID3; /**< \brief Offset: 0xFEC (R/ 32) CoreSight */
|
||||
__I MTB_CID0_Type CID0; /**< \brief Offset: 0xFF0 (R/ 32) CoreSight */
|
||||
__I MTB_CID1_Type CID1; /**< \brief Offset: 0xFF4 (R/ 32) CoreSight */
|
||||
__I MTB_CID2_Type CID2; /**< \brief Offset: 0xFF8 (R/ 32) CoreSight */
|
||||
__I MTB_CID3_Type CID3; /**< \brief Offset: 0xFFC (R/ 32) CoreSight */
|
||||
} Mtb;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/*@}*/
|
||||
|
||||
#endif /* _SAMD21_MTB_COMPONENT_ */
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Component description for MTB
|
||||
*
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_MTB_COMPONENT_
|
||||
#define _SAMD21_MTB_COMPONENT_
|
||||
|
||||
/* ========================================================================== */
|
||||
/** SOFTWARE API DEFINITION FOR MTB */
|
||||
/* ========================================================================== */
|
||||
/** \addtogroup SAMD21_MTB Cortex-M0+ Micro-Trace Buffer */
|
||||
/*@{*/
|
||||
|
||||
#define MTB_U2002
|
||||
#define REV_MTB 0x100
|
||||
|
||||
/* -------- MTB_POSITION : (MTB Offset: 0x000) (R/W 32) MTB Position -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t :2; /*!< bit: 0.. 1 Reserved */
|
||||
uint32_t WRAP:1; /*!< bit: 2 Pointer Value Wraps */
|
||||
uint32_t POINTER:29; /*!< bit: 3..31 Trace Packet Location Pointer */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_POSITION_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_POSITION_OFFSET 0x000 /**< \brief (MTB_POSITION offset) MTB Position */
|
||||
|
||||
#define MTB_POSITION_WRAP_Pos 2 /**< \brief (MTB_POSITION) Pointer Value Wraps */
|
||||
#define MTB_POSITION_WRAP (0x1ul << MTB_POSITION_WRAP_Pos)
|
||||
#define MTB_POSITION_POINTER_Pos 3 /**< \brief (MTB_POSITION) Trace Packet Location Pointer */
|
||||
#define MTB_POSITION_POINTER_Msk (0x1FFFFFFFul << MTB_POSITION_POINTER_Pos)
|
||||
#define MTB_POSITION_POINTER(value) (MTB_POSITION_POINTER_Msk & ((value) << MTB_POSITION_POINTER_Pos))
|
||||
#define MTB_POSITION_MASK 0xFFFFFFFCul /**< \brief (MTB_POSITION) MASK Register */
|
||||
|
||||
/* -------- MTB_MASTER : (MTB Offset: 0x004) (R/W 32) MTB Master -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t MASK:5; /*!< bit: 0.. 4 Maximum Value of the Trace Buffer in SRAM */
|
||||
uint32_t TSTARTEN:1; /*!< bit: 5 Trace Start Input Enable */
|
||||
uint32_t TSTOPEN:1; /*!< bit: 6 Trace Stop Input Enable */
|
||||
uint32_t SFRWPRIV:1; /*!< bit: 7 Special Function Register Write Privilege */
|
||||
uint32_t RAMPRIV:1; /*!< bit: 8 SRAM Privilege */
|
||||
uint32_t HALTREQ:1; /*!< bit: 9 Halt Request */
|
||||
uint32_t :21; /*!< bit: 10..30 Reserved */
|
||||
uint32_t EN:1; /*!< bit: 31 Main Trace Enable */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_MASTER_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_MASTER_OFFSET 0x004 /**< \brief (MTB_MASTER offset) MTB Master */
|
||||
#define MTB_MASTER_RESETVALUE 0x00000000ul /**< \brief (MTB_MASTER reset_value) MTB Master */
|
||||
|
||||
#define MTB_MASTER_MASK_Pos 0 /**< \brief (MTB_MASTER) Maximum Value of the Trace Buffer in SRAM */
|
||||
#define MTB_MASTER_MASK_Msk (0x1Ful << MTB_MASTER_MASK_Pos)
|
||||
#define MTB_MASTER_MASK(value) (MTB_MASTER_MASK_Msk & ((value) << MTB_MASTER_MASK_Pos))
|
||||
#define MTB_MASTER_TSTARTEN_Pos 5 /**< \brief (MTB_MASTER) Trace Start Input Enable */
|
||||
#define MTB_MASTER_TSTARTEN (0x1ul << MTB_MASTER_TSTARTEN_Pos)
|
||||
#define MTB_MASTER_TSTOPEN_Pos 6 /**< \brief (MTB_MASTER) Trace Stop Input Enable */
|
||||
#define MTB_MASTER_TSTOPEN (0x1ul << MTB_MASTER_TSTOPEN_Pos)
|
||||
#define MTB_MASTER_SFRWPRIV_Pos 7 /**< \brief (MTB_MASTER) Special Function Register Write Privilege */
|
||||
#define MTB_MASTER_SFRWPRIV (0x1ul << MTB_MASTER_SFRWPRIV_Pos)
|
||||
#define MTB_MASTER_RAMPRIV_Pos 8 /**< \brief (MTB_MASTER) SRAM Privilege */
|
||||
#define MTB_MASTER_RAMPRIV (0x1ul << MTB_MASTER_RAMPRIV_Pos)
|
||||
#define MTB_MASTER_HALTREQ_Pos 9 /**< \brief (MTB_MASTER) Halt Request */
|
||||
#define MTB_MASTER_HALTREQ (0x1ul << MTB_MASTER_HALTREQ_Pos)
|
||||
#define MTB_MASTER_EN_Pos 31 /**< \brief (MTB_MASTER) Main Trace Enable */
|
||||
#define MTB_MASTER_EN (0x1ul << MTB_MASTER_EN_Pos)
|
||||
#define MTB_MASTER_MASK_ 0x800003FFul /**< \brief (MTB_MASTER) MASK Register */
|
||||
|
||||
/* -------- MTB_FLOW : (MTB Offset: 0x008) (R/W 32) MTB Flow -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t AUTOSTOP:1; /*!< bit: 0 Auto Stop Tracing */
|
||||
uint32_t AUTOHALT:1; /*!< bit: 1 Auto Halt Request */
|
||||
uint32_t :1; /*!< bit: 2 Reserved */
|
||||
uint32_t WATERMARK:29; /*!< bit: 3..31 Watermark value */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_FLOW_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_FLOW_OFFSET 0x008 /**< \brief (MTB_FLOW offset) MTB Flow */
|
||||
#define MTB_FLOW_RESETVALUE 0x00000000ul /**< \brief (MTB_FLOW reset_value) MTB Flow */
|
||||
|
||||
#define MTB_FLOW_AUTOSTOP_Pos 0 /**< \brief (MTB_FLOW) Auto Stop Tracing */
|
||||
#define MTB_FLOW_AUTOSTOP (0x1ul << MTB_FLOW_AUTOSTOP_Pos)
|
||||
#define MTB_FLOW_AUTOHALT_Pos 1 /**< \brief (MTB_FLOW) Auto Halt Request */
|
||||
#define MTB_FLOW_AUTOHALT (0x1ul << MTB_FLOW_AUTOHALT_Pos)
|
||||
#define MTB_FLOW_WATERMARK_Pos 3 /**< \brief (MTB_FLOW) Watermark value */
|
||||
#define MTB_FLOW_WATERMARK_Msk (0x1FFFFFFFul << MTB_FLOW_WATERMARK_Pos)
|
||||
#define MTB_FLOW_WATERMARK(value) (MTB_FLOW_WATERMARK_Msk & ((value) << MTB_FLOW_WATERMARK_Pos))
|
||||
#define MTB_FLOW_MASK 0xFFFFFFFBul /**< \brief (MTB_FLOW) MASK Register */
|
||||
|
||||
/* -------- MTB_BASE : (MTB Offset: 0x00C) (R/ 32) MTB Base -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_BASE_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_BASE_OFFSET 0x00C /**< \brief (MTB_BASE offset) MTB Base */
|
||||
#define MTB_BASE_MASK 0xFFFFFFFFul /**< \brief (MTB_BASE) MASK Register */
|
||||
|
||||
/* -------- MTB_ITCTRL : (MTB Offset: 0xF00) (R/W 32) MTB Integration Mode Control -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_ITCTRL_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_ITCTRL_OFFSET 0xF00 /**< \brief (MTB_ITCTRL offset) MTB Integration Mode Control */
|
||||
#define MTB_ITCTRL_MASK 0xFFFFFFFFul /**< \brief (MTB_ITCTRL) MASK Register */
|
||||
|
||||
/* -------- MTB_CLAIMSET : (MTB Offset: 0xFA0) (R/W 32) MTB Claim Set -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_CLAIMSET_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_CLAIMSET_OFFSET 0xFA0 /**< \brief (MTB_CLAIMSET offset) MTB Claim Set */
|
||||
#define MTB_CLAIMSET_MASK 0xFFFFFFFFul /**< \brief (MTB_CLAIMSET) MASK Register */
|
||||
|
||||
/* -------- MTB_CLAIMCLR : (MTB Offset: 0xFA4) (R/W 32) MTB Claim Clear -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_CLAIMCLR_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_CLAIMCLR_OFFSET 0xFA4 /**< \brief (MTB_CLAIMCLR offset) MTB Claim Clear */
|
||||
#define MTB_CLAIMCLR_MASK 0xFFFFFFFFul /**< \brief (MTB_CLAIMCLR) MASK Register */
|
||||
|
||||
/* -------- MTB_LOCKACCESS : (MTB Offset: 0xFB0) (R/W 32) MTB Lock Access -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_LOCKACCESS_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_LOCKACCESS_OFFSET 0xFB0 /**< \brief (MTB_LOCKACCESS offset) MTB Lock Access */
|
||||
#define MTB_LOCKACCESS_MASK 0xFFFFFFFFul /**< \brief (MTB_LOCKACCESS) MASK Register */
|
||||
|
||||
/* -------- MTB_LOCKSTATUS : (MTB Offset: 0xFB4) (R/ 32) MTB Lock Status -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_LOCKSTATUS_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_LOCKSTATUS_OFFSET 0xFB4 /**< \brief (MTB_LOCKSTATUS offset) MTB Lock Status */
|
||||
#define MTB_LOCKSTATUS_MASK 0xFFFFFFFFul /**< \brief (MTB_LOCKSTATUS) MASK Register */
|
||||
|
||||
/* -------- MTB_AUTHSTATUS : (MTB Offset: 0xFB8) (R/ 32) MTB Authentication Status -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_AUTHSTATUS_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_AUTHSTATUS_OFFSET 0xFB8 /**< \brief (MTB_AUTHSTATUS offset) MTB Authentication Status */
|
||||
#define MTB_AUTHSTATUS_MASK 0xFFFFFFFFul /**< \brief (MTB_AUTHSTATUS) MASK Register */
|
||||
|
||||
/* -------- MTB_DEVARCH : (MTB Offset: 0xFBC) (R/ 32) MTB Device Architecture -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_DEVARCH_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_DEVARCH_OFFSET 0xFBC /**< \brief (MTB_DEVARCH offset) MTB Device Architecture */
|
||||
#define MTB_DEVARCH_MASK 0xFFFFFFFFul /**< \brief (MTB_DEVARCH) MASK Register */
|
||||
|
||||
/* -------- MTB_DEVID : (MTB Offset: 0xFC8) (R/ 32) MTB Device Configuration -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_DEVID_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_DEVID_OFFSET 0xFC8 /**< \brief (MTB_DEVID offset) MTB Device Configuration */
|
||||
#define MTB_DEVID_MASK 0xFFFFFFFFul /**< \brief (MTB_DEVID) MASK Register */
|
||||
|
||||
/* -------- MTB_DEVTYPE : (MTB Offset: 0xFCC) (R/ 32) MTB Device Type -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_DEVTYPE_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_DEVTYPE_OFFSET 0xFCC /**< \brief (MTB_DEVTYPE offset) MTB Device Type */
|
||||
#define MTB_DEVTYPE_MASK 0xFFFFFFFFul /**< \brief (MTB_DEVTYPE) MASK Register */
|
||||
|
||||
/* -------- MTB_PID4 : (MTB Offset: 0xFD0) (R/ 32) CoreSight -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_PID4_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_PID4_OFFSET 0xFD0 /**< \brief (MTB_PID4 offset) CoreSight */
|
||||
#define MTB_PID4_MASK 0xFFFFFFFFul /**< \brief (MTB_PID4) MASK Register */
|
||||
|
||||
/* -------- MTB_PID5 : (MTB Offset: 0xFD4) (R/ 32) CoreSight -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_PID5_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_PID5_OFFSET 0xFD4 /**< \brief (MTB_PID5 offset) CoreSight */
|
||||
#define MTB_PID5_MASK 0xFFFFFFFFul /**< \brief (MTB_PID5) MASK Register */
|
||||
|
||||
/* -------- MTB_PID6 : (MTB Offset: 0xFD8) (R/ 32) CoreSight -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_PID6_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_PID6_OFFSET 0xFD8 /**< \brief (MTB_PID6 offset) CoreSight */
|
||||
#define MTB_PID6_MASK 0xFFFFFFFFul /**< \brief (MTB_PID6) MASK Register */
|
||||
|
||||
/* -------- MTB_PID7 : (MTB Offset: 0xFDC) (R/ 32) CoreSight -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_PID7_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_PID7_OFFSET 0xFDC /**< \brief (MTB_PID7 offset) CoreSight */
|
||||
#define MTB_PID7_MASK 0xFFFFFFFFul /**< \brief (MTB_PID7) MASK Register */
|
||||
|
||||
/* -------- MTB_PID0 : (MTB Offset: 0xFE0) (R/ 32) CoreSight -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_PID0_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_PID0_OFFSET 0xFE0 /**< \brief (MTB_PID0 offset) CoreSight */
|
||||
#define MTB_PID0_MASK 0xFFFFFFFFul /**< \brief (MTB_PID0) MASK Register */
|
||||
|
||||
/* -------- MTB_PID1 : (MTB Offset: 0xFE4) (R/ 32) CoreSight -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_PID1_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_PID1_OFFSET 0xFE4 /**< \brief (MTB_PID1 offset) CoreSight */
|
||||
#define MTB_PID1_MASK 0xFFFFFFFFul /**< \brief (MTB_PID1) MASK Register */
|
||||
|
||||
/* -------- MTB_PID2 : (MTB Offset: 0xFE8) (R/ 32) CoreSight -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_PID2_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_PID2_OFFSET 0xFE8 /**< \brief (MTB_PID2 offset) CoreSight */
|
||||
#define MTB_PID2_MASK 0xFFFFFFFFul /**< \brief (MTB_PID2) MASK Register */
|
||||
|
||||
/* -------- MTB_PID3 : (MTB Offset: 0xFEC) (R/ 32) CoreSight -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_PID3_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_PID3_OFFSET 0xFEC /**< \brief (MTB_PID3 offset) CoreSight */
|
||||
#define MTB_PID3_MASK 0xFFFFFFFFul /**< \brief (MTB_PID3) MASK Register */
|
||||
|
||||
/* -------- MTB_CID0 : (MTB Offset: 0xFF0) (R/ 32) CoreSight -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_CID0_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_CID0_OFFSET 0xFF0 /**< \brief (MTB_CID0 offset) CoreSight */
|
||||
#define MTB_CID0_MASK 0xFFFFFFFFul /**< \brief (MTB_CID0) MASK Register */
|
||||
|
||||
/* -------- MTB_CID1 : (MTB Offset: 0xFF4) (R/ 32) CoreSight -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_CID1_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_CID1_OFFSET 0xFF4 /**< \brief (MTB_CID1 offset) CoreSight */
|
||||
#define MTB_CID1_MASK 0xFFFFFFFFul /**< \brief (MTB_CID1) MASK Register */
|
||||
|
||||
/* -------- MTB_CID2 : (MTB Offset: 0xFF8) (R/ 32) CoreSight -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_CID2_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_CID2_OFFSET 0xFF8 /**< \brief (MTB_CID2 offset) CoreSight */
|
||||
#define MTB_CID2_MASK 0xFFFFFFFFul /**< \brief (MTB_CID2) MASK Register */
|
||||
|
||||
/* -------- MTB_CID3 : (MTB Offset: 0xFFC) (R/ 32) CoreSight -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} MTB_CID3_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define MTB_CID3_OFFSET 0xFFC /**< \brief (MTB_CID3 offset) CoreSight */
|
||||
#define MTB_CID3_MASK 0xFFFFFFFFul /**< \brief (MTB_CID3) MASK Register */
|
||||
|
||||
/** \brief MTB hardware registers */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef struct {
|
||||
__IO MTB_POSITION_Type POSITION; /**< \brief Offset: 0x000 (R/W 32) MTB Position */
|
||||
__IO MTB_MASTER_Type MASTER; /**< \brief Offset: 0x004 (R/W 32) MTB Master */
|
||||
__IO MTB_FLOW_Type FLOW; /**< \brief Offset: 0x008 (R/W 32) MTB Flow */
|
||||
__I MTB_BASE_Type BASE; /**< \brief Offset: 0x00C (R/ 32) MTB Base */
|
||||
RoReg8 Reserved1[0xEF0];
|
||||
__IO MTB_ITCTRL_Type ITCTRL; /**< \brief Offset: 0xF00 (R/W 32) MTB Integration Mode Control */
|
||||
RoReg8 Reserved2[0x9C];
|
||||
__IO MTB_CLAIMSET_Type CLAIMSET; /**< \brief Offset: 0xFA0 (R/W 32) MTB Claim Set */
|
||||
__IO MTB_CLAIMCLR_Type CLAIMCLR; /**< \brief Offset: 0xFA4 (R/W 32) MTB Claim Clear */
|
||||
RoReg8 Reserved3[0x8];
|
||||
__IO MTB_LOCKACCESS_Type LOCKACCESS; /**< \brief Offset: 0xFB0 (R/W 32) MTB Lock Access */
|
||||
__I MTB_LOCKSTATUS_Type LOCKSTATUS; /**< \brief Offset: 0xFB4 (R/ 32) MTB Lock Status */
|
||||
__I MTB_AUTHSTATUS_Type AUTHSTATUS; /**< \brief Offset: 0xFB8 (R/ 32) MTB Authentication Status */
|
||||
__I MTB_DEVARCH_Type DEVARCH; /**< \brief Offset: 0xFBC (R/ 32) MTB Device Architecture */
|
||||
RoReg8 Reserved4[0x8];
|
||||
__I MTB_DEVID_Type DEVID; /**< \brief Offset: 0xFC8 (R/ 32) MTB Device Configuration */
|
||||
__I MTB_DEVTYPE_Type DEVTYPE; /**< \brief Offset: 0xFCC (R/ 32) MTB Device Type */
|
||||
__I MTB_PID4_Type PID4; /**< \brief Offset: 0xFD0 (R/ 32) CoreSight */
|
||||
__I MTB_PID5_Type PID5; /**< \brief Offset: 0xFD4 (R/ 32) CoreSight */
|
||||
__I MTB_PID6_Type PID6; /**< \brief Offset: 0xFD8 (R/ 32) CoreSight */
|
||||
__I MTB_PID7_Type PID7; /**< \brief Offset: 0xFDC (R/ 32) CoreSight */
|
||||
__I MTB_PID0_Type PID0; /**< \brief Offset: 0xFE0 (R/ 32) CoreSight */
|
||||
__I MTB_PID1_Type PID1; /**< \brief Offset: 0xFE4 (R/ 32) CoreSight */
|
||||
__I MTB_PID2_Type PID2; /**< \brief Offset: 0xFE8 (R/ 32) CoreSight */
|
||||
__I MTB_PID3_Type PID3; /**< \brief Offset: 0xFEC (R/ 32) CoreSight */
|
||||
__I MTB_CID0_Type CID0; /**< \brief Offset: 0xFF0 (R/ 32) CoreSight */
|
||||
__I MTB_CID1_Type CID1; /**< \brief Offset: 0xFF4 (R/ 32) CoreSight */
|
||||
__I MTB_CID2_Type CID2; /**< \brief Offset: 0xFF8 (R/ 32) CoreSight */
|
||||
__I MTB_CID3_Type CID3; /**< \brief Offset: 0xFFC (R/ 32) CoreSight */
|
||||
} Mtb;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/*@}*/
|
||||
|
||||
#endif /* _SAMD21_MTB_COMPONENT_ */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,94 +1,94 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Component description for PAC
|
||||
*
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_PAC_COMPONENT_
|
||||
#define _SAMD21_PAC_COMPONENT_
|
||||
|
||||
/* ========================================================================== */
|
||||
/** SOFTWARE API DEFINITION FOR PAC */
|
||||
/* ========================================================================== */
|
||||
/** \addtogroup SAMD21_PAC Peripheral Access Controller */
|
||||
/*@{*/
|
||||
|
||||
#define PAC_U2211
|
||||
#define REV_PAC 0x101
|
||||
|
||||
/* -------- PAC_WPCLR : (PAC Offset: 0x0) (R/W 32) Write Protection Clear -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t :1; /*!< bit: 0 Reserved */
|
||||
uint32_t WP:31; /*!< bit: 1..31 Write Protection Clear */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PAC_WPCLR_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PAC_WPCLR_OFFSET 0x0 /**< \brief (PAC_WPCLR offset) Write Protection Clear */
|
||||
#define PAC_WPCLR_RESETVALUE 0x00000000ul /**< \brief (PAC_WPCLR reset_value) Write Protection Clear */
|
||||
|
||||
#define PAC_WPCLR_WP_Pos 1 /**< \brief (PAC_WPCLR) Write Protection Clear */
|
||||
#define PAC_WPCLR_WP_Msk (0x7FFFFFFFul << PAC_WPCLR_WP_Pos)
|
||||
#define PAC_WPCLR_WP(value) (PAC_WPCLR_WP_Msk & ((value) << PAC_WPCLR_WP_Pos))
|
||||
#define PAC_WPCLR_MASK 0xFFFFFFFEul /**< \brief (PAC_WPCLR) MASK Register */
|
||||
|
||||
/* -------- PAC_WPSET : (PAC Offset: 0x4) (R/W 32) Write Protection Set -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t :1; /*!< bit: 0 Reserved */
|
||||
uint32_t WP:31; /*!< bit: 1..31 Write Protection Set */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PAC_WPSET_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PAC_WPSET_OFFSET 0x4 /**< \brief (PAC_WPSET offset) Write Protection Set */
|
||||
#define PAC_WPSET_RESETVALUE 0x00000000ul /**< \brief (PAC_WPSET reset_value) Write Protection Set */
|
||||
|
||||
#define PAC_WPSET_WP_Pos 1 /**< \brief (PAC_WPSET) Write Protection Set */
|
||||
#define PAC_WPSET_WP_Msk (0x7FFFFFFFul << PAC_WPSET_WP_Pos)
|
||||
#define PAC_WPSET_WP(value) (PAC_WPSET_WP_Msk & ((value) << PAC_WPSET_WP_Pos))
|
||||
#define PAC_WPSET_MASK 0xFFFFFFFEul /**< \brief (PAC_WPSET) MASK Register */
|
||||
|
||||
/** \brief PAC hardware registers */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef struct {
|
||||
__IO PAC_WPCLR_Type WPCLR; /**< \brief Offset: 0x0 (R/W 32) Write Protection Clear */
|
||||
__IO PAC_WPSET_Type WPSET; /**< \brief Offset: 0x4 (R/W 32) Write Protection Set */
|
||||
} Pac;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/*@}*/
|
||||
|
||||
#endif /* _SAMD21_PAC_COMPONENT_ */
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Component description for PAC
|
||||
*
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_PAC_COMPONENT_
|
||||
#define _SAMD21_PAC_COMPONENT_
|
||||
|
||||
/* ========================================================================== */
|
||||
/** SOFTWARE API DEFINITION FOR PAC */
|
||||
/* ========================================================================== */
|
||||
/** \addtogroup SAMD21_PAC Peripheral Access Controller */
|
||||
/*@{*/
|
||||
|
||||
#define PAC_U2211
|
||||
#define REV_PAC 0x101
|
||||
|
||||
/* -------- PAC_WPCLR : (PAC Offset: 0x0) (R/W 32) Write Protection Clear -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t :1; /*!< bit: 0 Reserved */
|
||||
uint32_t WP:31; /*!< bit: 1..31 Write Protection Clear */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PAC_WPCLR_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PAC_WPCLR_OFFSET 0x0 /**< \brief (PAC_WPCLR offset) Write Protection Clear */
|
||||
#define PAC_WPCLR_RESETVALUE 0x00000000ul /**< \brief (PAC_WPCLR reset_value) Write Protection Clear */
|
||||
|
||||
#define PAC_WPCLR_WP_Pos 1 /**< \brief (PAC_WPCLR) Write Protection Clear */
|
||||
#define PAC_WPCLR_WP_Msk (0x7FFFFFFFul << PAC_WPCLR_WP_Pos)
|
||||
#define PAC_WPCLR_WP(value) (PAC_WPCLR_WP_Msk & ((value) << PAC_WPCLR_WP_Pos))
|
||||
#define PAC_WPCLR_MASK 0xFFFFFFFEul /**< \brief (PAC_WPCLR) MASK Register */
|
||||
|
||||
/* -------- PAC_WPSET : (PAC Offset: 0x4) (R/W 32) Write Protection Set -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t :1; /*!< bit: 0 Reserved */
|
||||
uint32_t WP:31; /*!< bit: 1..31 Write Protection Set */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PAC_WPSET_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PAC_WPSET_OFFSET 0x4 /**< \brief (PAC_WPSET offset) Write Protection Set */
|
||||
#define PAC_WPSET_RESETVALUE 0x00000000ul /**< \brief (PAC_WPSET reset_value) Write Protection Set */
|
||||
|
||||
#define PAC_WPSET_WP_Pos 1 /**< \brief (PAC_WPSET) Write Protection Set */
|
||||
#define PAC_WPSET_WP_Msk (0x7FFFFFFFul << PAC_WPSET_WP_Pos)
|
||||
#define PAC_WPSET_WP(value) (PAC_WPSET_WP_Msk & ((value) << PAC_WPSET_WP_Pos))
|
||||
#define PAC_WPSET_MASK 0xFFFFFFFEul /**< \brief (PAC_WPSET) MASK Register */
|
||||
|
||||
/** \brief PAC hardware registers */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef struct {
|
||||
__IO PAC_WPCLR_Type WPCLR; /**< \brief Offset: 0x0 (R/W 32) Write Protection Clear */
|
||||
__IO PAC_WPSET_Type WPSET; /**< \brief Offset: 0x4 (R/W 32) Write Protection Set */
|
||||
} Pac;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/*@}*/
|
||||
|
||||
#endif /* _SAMD21_PAC_COMPONENT_ */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,384 +1,384 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Component description for PORT
|
||||
*
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_PORT_COMPONENT_
|
||||
#define _SAMD21_PORT_COMPONENT_
|
||||
|
||||
/* ========================================================================== */
|
||||
/** SOFTWARE API DEFINITION FOR PORT */
|
||||
/* ========================================================================== */
|
||||
/** \addtogroup SAMD21_PORT Port Module */
|
||||
/*@{*/
|
||||
|
||||
#define PORT_U2210
|
||||
#define REV_PORT 0x100
|
||||
|
||||
/* -------- PORT_DIR : (PORT Offset: 0x00) (R/W 32) GROUP Data Direction -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t DIR:32; /*!< bit: 0..31 Port Data Direction */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PORT_DIR_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_DIR_OFFSET 0x00 /**< \brief (PORT_DIR offset) Data Direction */
|
||||
#define PORT_DIR_RESETVALUE 0x00000000ul /**< \brief (PORT_DIR reset_value) Data Direction */
|
||||
|
||||
#define PORT_DIR_DIR_Pos 0 /**< \brief (PORT_DIR) Port Data Direction */
|
||||
#define PORT_DIR_DIR_Msk (0xFFFFFFFFul << PORT_DIR_DIR_Pos)
|
||||
#define PORT_DIR_DIR(value) (PORT_DIR_DIR_Msk & ((value) << PORT_DIR_DIR_Pos))
|
||||
#define PORT_DIR_MASK 0xFFFFFFFFul /**< \brief (PORT_DIR) MASK Register */
|
||||
|
||||
/* -------- PORT_DIRCLR : (PORT Offset: 0x04) (R/W 32) GROUP Data Direction Clear -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t DIRCLR:32; /*!< bit: 0..31 Port Data Direction Clear */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PORT_DIRCLR_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_DIRCLR_OFFSET 0x04 /**< \brief (PORT_DIRCLR offset) Data Direction Clear */
|
||||
#define PORT_DIRCLR_RESETVALUE 0x00000000ul /**< \brief (PORT_DIRCLR reset_value) Data Direction Clear */
|
||||
|
||||
#define PORT_DIRCLR_DIRCLR_Pos 0 /**< \brief (PORT_DIRCLR) Port Data Direction Clear */
|
||||
#define PORT_DIRCLR_DIRCLR_Msk (0xFFFFFFFFul << PORT_DIRCLR_DIRCLR_Pos)
|
||||
#define PORT_DIRCLR_DIRCLR(value) (PORT_DIRCLR_DIRCLR_Msk & ((value) << PORT_DIRCLR_DIRCLR_Pos))
|
||||
#define PORT_DIRCLR_MASK 0xFFFFFFFFul /**< \brief (PORT_DIRCLR) MASK Register */
|
||||
|
||||
/* -------- PORT_DIRSET : (PORT Offset: 0x08) (R/W 32) GROUP Data Direction Set -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t DIRSET:32; /*!< bit: 0..31 Port Data Direction Set */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PORT_DIRSET_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_DIRSET_OFFSET 0x08 /**< \brief (PORT_DIRSET offset) Data Direction Set */
|
||||
#define PORT_DIRSET_RESETVALUE 0x00000000ul /**< \brief (PORT_DIRSET reset_value) Data Direction Set */
|
||||
|
||||
#define PORT_DIRSET_DIRSET_Pos 0 /**< \brief (PORT_DIRSET) Port Data Direction Set */
|
||||
#define PORT_DIRSET_DIRSET_Msk (0xFFFFFFFFul << PORT_DIRSET_DIRSET_Pos)
|
||||
#define PORT_DIRSET_DIRSET(value) (PORT_DIRSET_DIRSET_Msk & ((value) << PORT_DIRSET_DIRSET_Pos))
|
||||
#define PORT_DIRSET_MASK 0xFFFFFFFFul /**< \brief (PORT_DIRSET) MASK Register */
|
||||
|
||||
/* -------- PORT_DIRTGL : (PORT Offset: 0x0C) (R/W 32) GROUP Data Direction Toggle -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t DIRTGL:32; /*!< bit: 0..31 Port Data Direction Toggle */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PORT_DIRTGL_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_DIRTGL_OFFSET 0x0C /**< \brief (PORT_DIRTGL offset) Data Direction Toggle */
|
||||
#define PORT_DIRTGL_RESETVALUE 0x00000000ul /**< \brief (PORT_DIRTGL reset_value) Data Direction Toggle */
|
||||
|
||||
#define PORT_DIRTGL_DIRTGL_Pos 0 /**< \brief (PORT_DIRTGL) Port Data Direction Toggle */
|
||||
#define PORT_DIRTGL_DIRTGL_Msk (0xFFFFFFFFul << PORT_DIRTGL_DIRTGL_Pos)
|
||||
#define PORT_DIRTGL_DIRTGL(value) (PORT_DIRTGL_DIRTGL_Msk & ((value) << PORT_DIRTGL_DIRTGL_Pos))
|
||||
#define PORT_DIRTGL_MASK 0xFFFFFFFFul /**< \brief (PORT_DIRTGL) MASK Register */
|
||||
|
||||
/* -------- PORT_OUT : (PORT Offset: 0x10) (R/W 32) GROUP Data Output Value -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t OUT:32; /*!< bit: 0..31 Port Data Output Value */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PORT_OUT_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_OUT_OFFSET 0x10 /**< \brief (PORT_OUT offset) Data Output Value */
|
||||
#define PORT_OUT_RESETVALUE 0x00000000ul /**< \brief (PORT_OUT reset_value) Data Output Value */
|
||||
|
||||
#define PORT_OUT_OUT_Pos 0 /**< \brief (PORT_OUT) Port Data Output Value */
|
||||
#define PORT_OUT_OUT_Msk (0xFFFFFFFFul << PORT_OUT_OUT_Pos)
|
||||
#define PORT_OUT_OUT(value) (PORT_OUT_OUT_Msk & ((value) << PORT_OUT_OUT_Pos))
|
||||
#define PORT_OUT_MASK 0xFFFFFFFFul /**< \brief (PORT_OUT) MASK Register */
|
||||
|
||||
/* -------- PORT_OUTCLR : (PORT Offset: 0x14) (R/W 32) GROUP Data Output Value Clear -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t OUTCLR:32; /*!< bit: 0..31 Port Data Output Value Clear */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PORT_OUTCLR_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_OUTCLR_OFFSET 0x14 /**< \brief (PORT_OUTCLR offset) Data Output Value Clear */
|
||||
#define PORT_OUTCLR_RESETVALUE 0x00000000ul /**< \brief (PORT_OUTCLR reset_value) Data Output Value Clear */
|
||||
|
||||
#define PORT_OUTCLR_OUTCLR_Pos 0 /**< \brief (PORT_OUTCLR) Port Data Output Value Clear */
|
||||
#define PORT_OUTCLR_OUTCLR_Msk (0xFFFFFFFFul << PORT_OUTCLR_OUTCLR_Pos)
|
||||
#define PORT_OUTCLR_OUTCLR(value) (PORT_OUTCLR_OUTCLR_Msk & ((value) << PORT_OUTCLR_OUTCLR_Pos))
|
||||
#define PORT_OUTCLR_MASK 0xFFFFFFFFul /**< \brief (PORT_OUTCLR) MASK Register */
|
||||
|
||||
/* -------- PORT_OUTSET : (PORT Offset: 0x18) (R/W 32) GROUP Data Output Value Set -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t OUTSET:32; /*!< bit: 0..31 Port Data Output Value Set */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PORT_OUTSET_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_OUTSET_OFFSET 0x18 /**< \brief (PORT_OUTSET offset) Data Output Value Set */
|
||||
#define PORT_OUTSET_RESETVALUE 0x00000000ul /**< \brief (PORT_OUTSET reset_value) Data Output Value Set */
|
||||
|
||||
#define PORT_OUTSET_OUTSET_Pos 0 /**< \brief (PORT_OUTSET) Port Data Output Value Set */
|
||||
#define PORT_OUTSET_OUTSET_Msk (0xFFFFFFFFul << PORT_OUTSET_OUTSET_Pos)
|
||||
#define PORT_OUTSET_OUTSET(value) (PORT_OUTSET_OUTSET_Msk & ((value) << PORT_OUTSET_OUTSET_Pos))
|
||||
#define PORT_OUTSET_MASK 0xFFFFFFFFul /**< \brief (PORT_OUTSET) MASK Register */
|
||||
|
||||
/* -------- PORT_OUTTGL : (PORT Offset: 0x1C) (R/W 32) GROUP Data Output Value Toggle -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t OUTTGL:32; /*!< bit: 0..31 Port Data Output Value Toggle */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PORT_OUTTGL_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_OUTTGL_OFFSET 0x1C /**< \brief (PORT_OUTTGL offset) Data Output Value Toggle */
|
||||
#define PORT_OUTTGL_RESETVALUE 0x00000000ul /**< \brief (PORT_OUTTGL reset_value) Data Output Value Toggle */
|
||||
|
||||
#define PORT_OUTTGL_OUTTGL_Pos 0 /**< \brief (PORT_OUTTGL) Port Data Output Value Toggle */
|
||||
#define PORT_OUTTGL_OUTTGL_Msk (0xFFFFFFFFul << PORT_OUTTGL_OUTTGL_Pos)
|
||||
#define PORT_OUTTGL_OUTTGL(value) (PORT_OUTTGL_OUTTGL_Msk & ((value) << PORT_OUTTGL_OUTTGL_Pos))
|
||||
#define PORT_OUTTGL_MASK 0xFFFFFFFFul /**< \brief (PORT_OUTTGL) MASK Register */
|
||||
|
||||
/* -------- PORT_IN : (PORT Offset: 0x20) (R/ 32) GROUP Data Input Value -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t IN:32; /*!< bit: 0..31 Port Data Input Value */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PORT_IN_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_IN_OFFSET 0x20 /**< \brief (PORT_IN offset) Data Input Value */
|
||||
#define PORT_IN_RESETVALUE 0x00000000ul /**< \brief (PORT_IN reset_value) Data Input Value */
|
||||
|
||||
#define PORT_IN_IN_Pos 0 /**< \brief (PORT_IN) Port Data Input Value */
|
||||
#define PORT_IN_IN_Msk (0xFFFFFFFFul << PORT_IN_IN_Pos)
|
||||
#define PORT_IN_IN(value) (PORT_IN_IN_Msk & ((value) << PORT_IN_IN_Pos))
|
||||
#define PORT_IN_MASK 0xFFFFFFFFul /**< \brief (PORT_IN) MASK Register */
|
||||
|
||||
/* -------- PORT_CTRL : (PORT Offset: 0x24) (R/W 32) GROUP Control -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t SAMPLING:32; /*!< bit: 0..31 Input Sampling Mode */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PORT_CTRL_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_CTRL_OFFSET 0x24 /**< \brief (PORT_CTRL offset) Control */
|
||||
#define PORT_CTRL_RESETVALUE 0x00000000ul /**< \brief (PORT_CTRL reset_value) Control */
|
||||
|
||||
#define PORT_CTRL_SAMPLING_Pos 0 /**< \brief (PORT_CTRL) Input Sampling Mode */
|
||||
#define PORT_CTRL_SAMPLING_Msk (0xFFFFFFFFul << PORT_CTRL_SAMPLING_Pos)
|
||||
#define PORT_CTRL_SAMPLING(value) (PORT_CTRL_SAMPLING_Msk & ((value) << PORT_CTRL_SAMPLING_Pos))
|
||||
#define PORT_CTRL_MASK 0xFFFFFFFFul /**< \brief (PORT_CTRL) MASK Register */
|
||||
|
||||
/* -------- PORT_WRCONFIG : (PORT Offset: 0x28) ( /W 32) GROUP Write Configuration -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t PINMASK:16; /*!< bit: 0..15 Pin Mask for Multiple Pin Configuration */
|
||||
uint32_t PMUXEN:1; /*!< bit: 16 Peripheral Multiplexer Enable */
|
||||
uint32_t INEN:1; /*!< bit: 17 Input Enable */
|
||||
uint32_t PULLEN:1; /*!< bit: 18 Pull Enable */
|
||||
uint32_t :3; /*!< bit: 19..21 Reserved */
|
||||
uint32_t DRVSTR:1; /*!< bit: 22 Output Driver Strength Selection */
|
||||
uint32_t :1; /*!< bit: 23 Reserved */
|
||||
uint32_t PMUX:4; /*!< bit: 24..27 Peripheral Multiplexing */
|
||||
uint32_t WRPMUX:1; /*!< bit: 28 Write PMUX */
|
||||
uint32_t :1; /*!< bit: 29 Reserved */
|
||||
uint32_t WRPINCFG:1; /*!< bit: 30 Write PINCFG */
|
||||
uint32_t HWSEL:1; /*!< bit: 31 Half-Word Select */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PORT_WRCONFIG_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_WRCONFIG_OFFSET 0x28 /**< \brief (PORT_WRCONFIG offset) Write Configuration */
|
||||
#define PORT_WRCONFIG_RESETVALUE 0x00000000ul /**< \brief (PORT_WRCONFIG reset_value) Write Configuration */
|
||||
|
||||
#define PORT_WRCONFIG_PINMASK_Pos 0 /**< \brief (PORT_WRCONFIG) Pin Mask for Multiple Pin Configuration */
|
||||
#define PORT_WRCONFIG_PINMASK_Msk (0xFFFFul << PORT_WRCONFIG_PINMASK_Pos)
|
||||
#define PORT_WRCONFIG_PINMASK(value) (PORT_WRCONFIG_PINMASK_Msk & ((value) << PORT_WRCONFIG_PINMASK_Pos))
|
||||
#define PORT_WRCONFIG_PMUXEN_Pos 16 /**< \brief (PORT_WRCONFIG) Peripheral Multiplexer Enable */
|
||||
#define PORT_WRCONFIG_PMUXEN (0x1ul << PORT_WRCONFIG_PMUXEN_Pos)
|
||||
#define PORT_WRCONFIG_INEN_Pos 17 /**< \brief (PORT_WRCONFIG) Input Enable */
|
||||
#define PORT_WRCONFIG_INEN (0x1ul << PORT_WRCONFIG_INEN_Pos)
|
||||
#define PORT_WRCONFIG_PULLEN_Pos 18 /**< \brief (PORT_WRCONFIG) Pull Enable */
|
||||
#define PORT_WRCONFIG_PULLEN (0x1ul << PORT_WRCONFIG_PULLEN_Pos)
|
||||
#define PORT_WRCONFIG_DRVSTR_Pos 22 /**< \brief (PORT_WRCONFIG) Output Driver Strength Selection */
|
||||
#define PORT_WRCONFIG_DRVSTR (0x1ul << PORT_WRCONFIG_DRVSTR_Pos)
|
||||
#define PORT_WRCONFIG_PMUX_Pos 24 /**< \brief (PORT_WRCONFIG) Peripheral Multiplexing */
|
||||
#define PORT_WRCONFIG_PMUX_Msk (0xFul << PORT_WRCONFIG_PMUX_Pos)
|
||||
#define PORT_WRCONFIG_PMUX(value) (PORT_WRCONFIG_PMUX_Msk & ((value) << PORT_WRCONFIG_PMUX_Pos))
|
||||
#define PORT_WRCONFIG_WRPMUX_Pos 28 /**< \brief (PORT_WRCONFIG) Write PMUX */
|
||||
#define PORT_WRCONFIG_WRPMUX (0x1ul << PORT_WRCONFIG_WRPMUX_Pos)
|
||||
#define PORT_WRCONFIG_WRPINCFG_Pos 30 /**< \brief (PORT_WRCONFIG) Write PINCFG */
|
||||
#define PORT_WRCONFIG_WRPINCFG (0x1ul << PORT_WRCONFIG_WRPINCFG_Pos)
|
||||
#define PORT_WRCONFIG_HWSEL_Pos 31 /**< \brief (PORT_WRCONFIG) Half-Word Select */
|
||||
#define PORT_WRCONFIG_HWSEL (0x1ul << PORT_WRCONFIG_HWSEL_Pos)
|
||||
#define PORT_WRCONFIG_MASK 0xDF47FFFFul /**< \brief (PORT_WRCONFIG) MASK Register */
|
||||
|
||||
/* -------- PORT_PMUX : (PORT Offset: 0x30) (R/W 8) GROUP Peripheral Multiplexing n -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint8_t PMUXE:4; /*!< bit: 0.. 3 Peripheral Multiplexing Even */
|
||||
uint8_t PMUXO:4; /*!< bit: 4.. 7 Peripheral Multiplexing Odd */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} PORT_PMUX_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_PMUX_OFFSET 0x30 /**< \brief (PORT_PMUX offset) Peripheral Multiplexing n */
|
||||
#define PORT_PMUX_RESETVALUE 0x00ul /**< \brief (PORT_PMUX reset_value) Peripheral Multiplexing n */
|
||||
|
||||
#define PORT_PMUX_PMUXE_Pos 0 /**< \brief (PORT_PMUX) Peripheral Multiplexing Even */
|
||||
#define PORT_PMUX_PMUXE_Msk (0xFul << PORT_PMUX_PMUXE_Pos)
|
||||
#define PORT_PMUX_PMUXE(value) (PORT_PMUX_PMUXE_Msk & ((value) << PORT_PMUX_PMUXE_Pos))
|
||||
#define PORT_PMUX_PMUXE_A_Val 0x0ul /**< \brief (PORT_PMUX) Peripheral function A selected */
|
||||
#define PORT_PMUX_PMUXE_B_Val 0x1ul /**< \brief (PORT_PMUX) Peripheral function B selected */
|
||||
#define PORT_PMUX_PMUXE_C_Val 0x2ul /**< \brief (PORT_PMUX) Peripheral function C selected */
|
||||
#define PORT_PMUX_PMUXE_D_Val 0x3ul /**< \brief (PORT_PMUX) Peripheral function D selected */
|
||||
#define PORT_PMUX_PMUXE_E_Val 0x4ul /**< \brief (PORT_PMUX) Peripheral function E selected */
|
||||
#define PORT_PMUX_PMUXE_F_Val 0x5ul /**< \brief (PORT_PMUX) Peripheral function F selected */
|
||||
#define PORT_PMUX_PMUXE_G_Val 0x6ul /**< \brief (PORT_PMUX) Peripheral function G selected */
|
||||
#define PORT_PMUX_PMUXE_H_Val 0x7ul /**< \brief (PORT_PMUX) Peripheral function H selected */
|
||||
#define PORT_PMUX_PMUXE_A (PORT_PMUX_PMUXE_A_Val << PORT_PMUX_PMUXE_Pos)
|
||||
#define PORT_PMUX_PMUXE_B (PORT_PMUX_PMUXE_B_Val << PORT_PMUX_PMUXE_Pos)
|
||||
#define PORT_PMUX_PMUXE_C (PORT_PMUX_PMUXE_C_Val << PORT_PMUX_PMUXE_Pos)
|
||||
#define PORT_PMUX_PMUXE_D (PORT_PMUX_PMUXE_D_Val << PORT_PMUX_PMUXE_Pos)
|
||||
#define PORT_PMUX_PMUXE_E (PORT_PMUX_PMUXE_E_Val << PORT_PMUX_PMUXE_Pos)
|
||||
#define PORT_PMUX_PMUXE_F (PORT_PMUX_PMUXE_F_Val << PORT_PMUX_PMUXE_Pos)
|
||||
#define PORT_PMUX_PMUXE_G (PORT_PMUX_PMUXE_G_Val << PORT_PMUX_PMUXE_Pos)
|
||||
#define PORT_PMUX_PMUXE_H (PORT_PMUX_PMUXE_H_Val << PORT_PMUX_PMUXE_Pos)
|
||||
#define PORT_PMUX_PMUXO_Pos 4 /**< \brief (PORT_PMUX) Peripheral Multiplexing Odd */
|
||||
#define PORT_PMUX_PMUXO_Msk (0xFul << PORT_PMUX_PMUXO_Pos)
|
||||
#define PORT_PMUX_PMUXO(value) (PORT_PMUX_PMUXO_Msk & ((value) << PORT_PMUX_PMUXO_Pos))
|
||||
#define PORT_PMUX_PMUXO_A_Val 0x0ul /**< \brief (PORT_PMUX) Peripheral function A selected */
|
||||
#define PORT_PMUX_PMUXO_B_Val 0x1ul /**< \brief (PORT_PMUX) Peripheral function B selected */
|
||||
#define PORT_PMUX_PMUXO_C_Val 0x2ul /**< \brief (PORT_PMUX) Peripheral function C selected */
|
||||
#define PORT_PMUX_PMUXO_D_Val 0x3ul /**< \brief (PORT_PMUX) Peripheral function D selected */
|
||||
#define PORT_PMUX_PMUXO_E_Val 0x4ul /**< \brief (PORT_PMUX) Peripheral function E selected */
|
||||
#define PORT_PMUX_PMUXO_F_Val 0x5ul /**< \brief (PORT_PMUX) Peripheral function F selected */
|
||||
#define PORT_PMUX_PMUXO_G_Val 0x6ul /**< \brief (PORT_PMUX) Peripheral function G selected */
|
||||
#define PORT_PMUX_PMUXO_H_Val 0x7ul /**< \brief (PORT_PMUX) Peripheral function H selected */
|
||||
#define PORT_PMUX_PMUXO_A (PORT_PMUX_PMUXO_A_Val << PORT_PMUX_PMUXO_Pos)
|
||||
#define PORT_PMUX_PMUXO_B (PORT_PMUX_PMUXO_B_Val << PORT_PMUX_PMUXO_Pos)
|
||||
#define PORT_PMUX_PMUXO_C (PORT_PMUX_PMUXO_C_Val << PORT_PMUX_PMUXO_Pos)
|
||||
#define PORT_PMUX_PMUXO_D (PORT_PMUX_PMUXO_D_Val << PORT_PMUX_PMUXO_Pos)
|
||||
#define PORT_PMUX_PMUXO_E (PORT_PMUX_PMUXO_E_Val << PORT_PMUX_PMUXO_Pos)
|
||||
#define PORT_PMUX_PMUXO_F (PORT_PMUX_PMUXO_F_Val << PORT_PMUX_PMUXO_Pos)
|
||||
#define PORT_PMUX_PMUXO_G (PORT_PMUX_PMUXO_G_Val << PORT_PMUX_PMUXO_Pos)
|
||||
#define PORT_PMUX_PMUXO_H (PORT_PMUX_PMUXO_H_Val << PORT_PMUX_PMUXO_Pos)
|
||||
#define PORT_PMUX_MASK 0xFFul /**< \brief (PORT_PMUX) MASK Register */
|
||||
|
||||
/* -------- PORT_PINCFG : (PORT Offset: 0x40) (R/W 8) GROUP Pin Configuration n -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint8_t PMUXEN:1; /*!< bit: 0 Peripheral Multiplexer Enable */
|
||||
uint8_t INEN:1; /*!< bit: 1 Input Enable */
|
||||
uint8_t PULLEN:1; /*!< bit: 2 Pull Enable */
|
||||
uint8_t :3; /*!< bit: 3.. 5 Reserved */
|
||||
uint8_t DRVSTR:1; /*!< bit: 6 Output Driver Strength Selection */
|
||||
uint8_t :1; /*!< bit: 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} PORT_PINCFG_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_PINCFG_OFFSET 0x40 /**< \brief (PORT_PINCFG offset) Pin Configuration n */
|
||||
#define PORT_PINCFG_RESETVALUE 0x00ul /**< \brief (PORT_PINCFG reset_value) Pin Configuration n */
|
||||
|
||||
#define PORT_PINCFG_PMUXEN_Pos 0 /**< \brief (PORT_PINCFG) Peripheral Multiplexer Enable */
|
||||
#define PORT_PINCFG_PMUXEN (0x1ul << PORT_PINCFG_PMUXEN_Pos)
|
||||
#define PORT_PINCFG_INEN_Pos 1 /**< \brief (PORT_PINCFG) Input Enable */
|
||||
#define PORT_PINCFG_INEN (0x1ul << PORT_PINCFG_INEN_Pos)
|
||||
#define PORT_PINCFG_PULLEN_Pos 2 /**< \brief (PORT_PINCFG) Pull Enable */
|
||||
#define PORT_PINCFG_PULLEN (0x1ul << PORT_PINCFG_PULLEN_Pos)
|
||||
#define PORT_PINCFG_DRVSTR_Pos 6 /**< \brief (PORT_PINCFG) Output Driver Strength Selection */
|
||||
#define PORT_PINCFG_DRVSTR (0x1ul << PORT_PINCFG_DRVSTR_Pos)
|
||||
#define PORT_PINCFG_MASK 0x47ul /**< \brief (PORT_PINCFG) MASK Register */
|
||||
|
||||
/** \brief PortGroup hardware registers */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef struct {
|
||||
__IO PORT_DIR_Type DIR; /**< \brief Offset: 0x00 (R/W 32) Data Direction */
|
||||
__IO PORT_DIRCLR_Type DIRCLR; /**< \brief Offset: 0x04 (R/W 32) Data Direction Clear */
|
||||
__IO PORT_DIRSET_Type DIRSET; /**< \brief Offset: 0x08 (R/W 32) Data Direction Set */
|
||||
__IO PORT_DIRTGL_Type DIRTGL; /**< \brief Offset: 0x0C (R/W 32) Data Direction Toggle */
|
||||
__IO PORT_OUT_Type OUT; /**< \brief Offset: 0x10 (R/W 32) Data Output Value */
|
||||
__IO PORT_OUTCLR_Type OUTCLR; /**< \brief Offset: 0x14 (R/W 32) Data Output Value Clear */
|
||||
__IO PORT_OUTSET_Type OUTSET; /**< \brief Offset: 0x18 (R/W 32) Data Output Value Set */
|
||||
__IO PORT_OUTTGL_Type OUTTGL; /**< \brief Offset: 0x1C (R/W 32) Data Output Value Toggle */
|
||||
__I PORT_IN_Type IN; /**< \brief Offset: 0x20 (R/ 32) Data Input Value */
|
||||
__IO PORT_CTRL_Type CTRL; /**< \brief Offset: 0x24 (R/W 32) Control */
|
||||
__O PORT_WRCONFIG_Type WRCONFIG; /**< \brief Offset: 0x28 ( /W 32) Write Configuration */
|
||||
RoReg8 Reserved1[0x4];
|
||||
__IO PORT_PMUX_Type PMUX[16]; /**< \brief Offset: 0x30 (R/W 8) Peripheral Multiplexing n */
|
||||
__IO PORT_PINCFG_Type PINCFG[32]; /**< \brief Offset: 0x40 (R/W 8) Pin Configuration n */
|
||||
RoReg8 Reserved2[0x20];
|
||||
} PortGroup;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/** \brief PORT hardware registers */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef struct {
|
||||
PortGroup Group[2]; /**< \brief Offset: 0x00 PortGroup groups [GROUPS] */
|
||||
} Port;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/*@}*/
|
||||
|
||||
#endif /* _SAMD21_PORT_COMPONENT_ */
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Component description for PORT
|
||||
*
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_PORT_COMPONENT_
|
||||
#define _SAMD21_PORT_COMPONENT_
|
||||
|
||||
/* ========================================================================== */
|
||||
/** SOFTWARE API DEFINITION FOR PORT */
|
||||
/* ========================================================================== */
|
||||
/** \addtogroup SAMD21_PORT Port Module */
|
||||
/*@{*/
|
||||
|
||||
#define PORT_U2210
|
||||
#define REV_PORT 0x100
|
||||
|
||||
/* -------- PORT_DIR : (PORT Offset: 0x00) (R/W 32) GROUP Data Direction -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t DIR:32; /*!< bit: 0..31 Port Data Direction */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PORT_DIR_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_DIR_OFFSET 0x00 /**< \brief (PORT_DIR offset) Data Direction */
|
||||
#define PORT_DIR_RESETVALUE 0x00000000ul /**< \brief (PORT_DIR reset_value) Data Direction */
|
||||
|
||||
#define PORT_DIR_DIR_Pos 0 /**< \brief (PORT_DIR) Port Data Direction */
|
||||
#define PORT_DIR_DIR_Msk (0xFFFFFFFFul << PORT_DIR_DIR_Pos)
|
||||
#define PORT_DIR_DIR(value) (PORT_DIR_DIR_Msk & ((value) << PORT_DIR_DIR_Pos))
|
||||
#define PORT_DIR_MASK 0xFFFFFFFFul /**< \brief (PORT_DIR) MASK Register */
|
||||
|
||||
/* -------- PORT_DIRCLR : (PORT Offset: 0x04) (R/W 32) GROUP Data Direction Clear -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t DIRCLR:32; /*!< bit: 0..31 Port Data Direction Clear */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PORT_DIRCLR_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_DIRCLR_OFFSET 0x04 /**< \brief (PORT_DIRCLR offset) Data Direction Clear */
|
||||
#define PORT_DIRCLR_RESETVALUE 0x00000000ul /**< \brief (PORT_DIRCLR reset_value) Data Direction Clear */
|
||||
|
||||
#define PORT_DIRCLR_DIRCLR_Pos 0 /**< \brief (PORT_DIRCLR) Port Data Direction Clear */
|
||||
#define PORT_DIRCLR_DIRCLR_Msk (0xFFFFFFFFul << PORT_DIRCLR_DIRCLR_Pos)
|
||||
#define PORT_DIRCLR_DIRCLR(value) (PORT_DIRCLR_DIRCLR_Msk & ((value) << PORT_DIRCLR_DIRCLR_Pos))
|
||||
#define PORT_DIRCLR_MASK 0xFFFFFFFFul /**< \brief (PORT_DIRCLR) MASK Register */
|
||||
|
||||
/* -------- PORT_DIRSET : (PORT Offset: 0x08) (R/W 32) GROUP Data Direction Set -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t DIRSET:32; /*!< bit: 0..31 Port Data Direction Set */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PORT_DIRSET_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_DIRSET_OFFSET 0x08 /**< \brief (PORT_DIRSET offset) Data Direction Set */
|
||||
#define PORT_DIRSET_RESETVALUE 0x00000000ul /**< \brief (PORT_DIRSET reset_value) Data Direction Set */
|
||||
|
||||
#define PORT_DIRSET_DIRSET_Pos 0 /**< \brief (PORT_DIRSET) Port Data Direction Set */
|
||||
#define PORT_DIRSET_DIRSET_Msk (0xFFFFFFFFul << PORT_DIRSET_DIRSET_Pos)
|
||||
#define PORT_DIRSET_DIRSET(value) (PORT_DIRSET_DIRSET_Msk & ((value) << PORT_DIRSET_DIRSET_Pos))
|
||||
#define PORT_DIRSET_MASK 0xFFFFFFFFul /**< \brief (PORT_DIRSET) MASK Register */
|
||||
|
||||
/* -------- PORT_DIRTGL : (PORT Offset: 0x0C) (R/W 32) GROUP Data Direction Toggle -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t DIRTGL:32; /*!< bit: 0..31 Port Data Direction Toggle */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PORT_DIRTGL_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_DIRTGL_OFFSET 0x0C /**< \brief (PORT_DIRTGL offset) Data Direction Toggle */
|
||||
#define PORT_DIRTGL_RESETVALUE 0x00000000ul /**< \brief (PORT_DIRTGL reset_value) Data Direction Toggle */
|
||||
|
||||
#define PORT_DIRTGL_DIRTGL_Pos 0 /**< \brief (PORT_DIRTGL) Port Data Direction Toggle */
|
||||
#define PORT_DIRTGL_DIRTGL_Msk (0xFFFFFFFFul << PORT_DIRTGL_DIRTGL_Pos)
|
||||
#define PORT_DIRTGL_DIRTGL(value) (PORT_DIRTGL_DIRTGL_Msk & ((value) << PORT_DIRTGL_DIRTGL_Pos))
|
||||
#define PORT_DIRTGL_MASK 0xFFFFFFFFul /**< \brief (PORT_DIRTGL) MASK Register */
|
||||
|
||||
/* -------- PORT_OUT : (PORT Offset: 0x10) (R/W 32) GROUP Data Output Value -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t OUT:32; /*!< bit: 0..31 Port Data Output Value */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PORT_OUT_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_OUT_OFFSET 0x10 /**< \brief (PORT_OUT offset) Data Output Value */
|
||||
#define PORT_OUT_RESETVALUE 0x00000000ul /**< \brief (PORT_OUT reset_value) Data Output Value */
|
||||
|
||||
#define PORT_OUT_OUT_Pos 0 /**< \brief (PORT_OUT) Port Data Output Value */
|
||||
#define PORT_OUT_OUT_Msk (0xFFFFFFFFul << PORT_OUT_OUT_Pos)
|
||||
#define PORT_OUT_OUT(value) (PORT_OUT_OUT_Msk & ((value) << PORT_OUT_OUT_Pos))
|
||||
#define PORT_OUT_MASK 0xFFFFFFFFul /**< \brief (PORT_OUT) MASK Register */
|
||||
|
||||
/* -------- PORT_OUTCLR : (PORT Offset: 0x14) (R/W 32) GROUP Data Output Value Clear -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t OUTCLR:32; /*!< bit: 0..31 Port Data Output Value Clear */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PORT_OUTCLR_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_OUTCLR_OFFSET 0x14 /**< \brief (PORT_OUTCLR offset) Data Output Value Clear */
|
||||
#define PORT_OUTCLR_RESETVALUE 0x00000000ul /**< \brief (PORT_OUTCLR reset_value) Data Output Value Clear */
|
||||
|
||||
#define PORT_OUTCLR_OUTCLR_Pos 0 /**< \brief (PORT_OUTCLR) Port Data Output Value Clear */
|
||||
#define PORT_OUTCLR_OUTCLR_Msk (0xFFFFFFFFul << PORT_OUTCLR_OUTCLR_Pos)
|
||||
#define PORT_OUTCLR_OUTCLR(value) (PORT_OUTCLR_OUTCLR_Msk & ((value) << PORT_OUTCLR_OUTCLR_Pos))
|
||||
#define PORT_OUTCLR_MASK 0xFFFFFFFFul /**< \brief (PORT_OUTCLR) MASK Register */
|
||||
|
||||
/* -------- PORT_OUTSET : (PORT Offset: 0x18) (R/W 32) GROUP Data Output Value Set -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t OUTSET:32; /*!< bit: 0..31 Port Data Output Value Set */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PORT_OUTSET_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_OUTSET_OFFSET 0x18 /**< \brief (PORT_OUTSET offset) Data Output Value Set */
|
||||
#define PORT_OUTSET_RESETVALUE 0x00000000ul /**< \brief (PORT_OUTSET reset_value) Data Output Value Set */
|
||||
|
||||
#define PORT_OUTSET_OUTSET_Pos 0 /**< \brief (PORT_OUTSET) Port Data Output Value Set */
|
||||
#define PORT_OUTSET_OUTSET_Msk (0xFFFFFFFFul << PORT_OUTSET_OUTSET_Pos)
|
||||
#define PORT_OUTSET_OUTSET(value) (PORT_OUTSET_OUTSET_Msk & ((value) << PORT_OUTSET_OUTSET_Pos))
|
||||
#define PORT_OUTSET_MASK 0xFFFFFFFFul /**< \brief (PORT_OUTSET) MASK Register */
|
||||
|
||||
/* -------- PORT_OUTTGL : (PORT Offset: 0x1C) (R/W 32) GROUP Data Output Value Toggle -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t OUTTGL:32; /*!< bit: 0..31 Port Data Output Value Toggle */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PORT_OUTTGL_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_OUTTGL_OFFSET 0x1C /**< \brief (PORT_OUTTGL offset) Data Output Value Toggle */
|
||||
#define PORT_OUTTGL_RESETVALUE 0x00000000ul /**< \brief (PORT_OUTTGL reset_value) Data Output Value Toggle */
|
||||
|
||||
#define PORT_OUTTGL_OUTTGL_Pos 0 /**< \brief (PORT_OUTTGL) Port Data Output Value Toggle */
|
||||
#define PORT_OUTTGL_OUTTGL_Msk (0xFFFFFFFFul << PORT_OUTTGL_OUTTGL_Pos)
|
||||
#define PORT_OUTTGL_OUTTGL(value) (PORT_OUTTGL_OUTTGL_Msk & ((value) << PORT_OUTTGL_OUTTGL_Pos))
|
||||
#define PORT_OUTTGL_MASK 0xFFFFFFFFul /**< \brief (PORT_OUTTGL) MASK Register */
|
||||
|
||||
/* -------- PORT_IN : (PORT Offset: 0x20) (R/ 32) GROUP Data Input Value -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t IN:32; /*!< bit: 0..31 Port Data Input Value */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PORT_IN_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_IN_OFFSET 0x20 /**< \brief (PORT_IN offset) Data Input Value */
|
||||
#define PORT_IN_RESETVALUE 0x00000000ul /**< \brief (PORT_IN reset_value) Data Input Value */
|
||||
|
||||
#define PORT_IN_IN_Pos 0 /**< \brief (PORT_IN) Port Data Input Value */
|
||||
#define PORT_IN_IN_Msk (0xFFFFFFFFul << PORT_IN_IN_Pos)
|
||||
#define PORT_IN_IN(value) (PORT_IN_IN_Msk & ((value) << PORT_IN_IN_Pos))
|
||||
#define PORT_IN_MASK 0xFFFFFFFFul /**< \brief (PORT_IN) MASK Register */
|
||||
|
||||
/* -------- PORT_CTRL : (PORT Offset: 0x24) (R/W 32) GROUP Control -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t SAMPLING:32; /*!< bit: 0..31 Input Sampling Mode */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PORT_CTRL_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_CTRL_OFFSET 0x24 /**< \brief (PORT_CTRL offset) Control */
|
||||
#define PORT_CTRL_RESETVALUE 0x00000000ul /**< \brief (PORT_CTRL reset_value) Control */
|
||||
|
||||
#define PORT_CTRL_SAMPLING_Pos 0 /**< \brief (PORT_CTRL) Input Sampling Mode */
|
||||
#define PORT_CTRL_SAMPLING_Msk (0xFFFFFFFFul << PORT_CTRL_SAMPLING_Pos)
|
||||
#define PORT_CTRL_SAMPLING(value) (PORT_CTRL_SAMPLING_Msk & ((value) << PORT_CTRL_SAMPLING_Pos))
|
||||
#define PORT_CTRL_MASK 0xFFFFFFFFul /**< \brief (PORT_CTRL) MASK Register */
|
||||
|
||||
/* -------- PORT_WRCONFIG : (PORT Offset: 0x28) ( /W 32) GROUP Write Configuration -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t PINMASK:16; /*!< bit: 0..15 Pin Mask for Multiple Pin Configuration */
|
||||
uint32_t PMUXEN:1; /*!< bit: 16 Peripheral Multiplexer Enable */
|
||||
uint32_t INEN:1; /*!< bit: 17 Input Enable */
|
||||
uint32_t PULLEN:1; /*!< bit: 18 Pull Enable */
|
||||
uint32_t :3; /*!< bit: 19..21 Reserved */
|
||||
uint32_t DRVSTR:1; /*!< bit: 22 Output Driver Strength Selection */
|
||||
uint32_t :1; /*!< bit: 23 Reserved */
|
||||
uint32_t PMUX:4; /*!< bit: 24..27 Peripheral Multiplexing */
|
||||
uint32_t WRPMUX:1; /*!< bit: 28 Write PMUX */
|
||||
uint32_t :1; /*!< bit: 29 Reserved */
|
||||
uint32_t WRPINCFG:1; /*!< bit: 30 Write PINCFG */
|
||||
uint32_t HWSEL:1; /*!< bit: 31 Half-Word Select */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} PORT_WRCONFIG_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_WRCONFIG_OFFSET 0x28 /**< \brief (PORT_WRCONFIG offset) Write Configuration */
|
||||
#define PORT_WRCONFIG_RESETVALUE 0x00000000ul /**< \brief (PORT_WRCONFIG reset_value) Write Configuration */
|
||||
|
||||
#define PORT_WRCONFIG_PINMASK_Pos 0 /**< \brief (PORT_WRCONFIG) Pin Mask for Multiple Pin Configuration */
|
||||
#define PORT_WRCONFIG_PINMASK_Msk (0xFFFFul << PORT_WRCONFIG_PINMASK_Pos)
|
||||
#define PORT_WRCONFIG_PINMASK(value) (PORT_WRCONFIG_PINMASK_Msk & ((value) << PORT_WRCONFIG_PINMASK_Pos))
|
||||
#define PORT_WRCONFIG_PMUXEN_Pos 16 /**< \brief (PORT_WRCONFIG) Peripheral Multiplexer Enable */
|
||||
#define PORT_WRCONFIG_PMUXEN (0x1ul << PORT_WRCONFIG_PMUXEN_Pos)
|
||||
#define PORT_WRCONFIG_INEN_Pos 17 /**< \brief (PORT_WRCONFIG) Input Enable */
|
||||
#define PORT_WRCONFIG_INEN (0x1ul << PORT_WRCONFIG_INEN_Pos)
|
||||
#define PORT_WRCONFIG_PULLEN_Pos 18 /**< \brief (PORT_WRCONFIG) Pull Enable */
|
||||
#define PORT_WRCONFIG_PULLEN (0x1ul << PORT_WRCONFIG_PULLEN_Pos)
|
||||
#define PORT_WRCONFIG_DRVSTR_Pos 22 /**< \brief (PORT_WRCONFIG) Output Driver Strength Selection */
|
||||
#define PORT_WRCONFIG_DRVSTR (0x1ul << PORT_WRCONFIG_DRVSTR_Pos)
|
||||
#define PORT_WRCONFIG_PMUX_Pos 24 /**< \brief (PORT_WRCONFIG) Peripheral Multiplexing */
|
||||
#define PORT_WRCONFIG_PMUX_Msk (0xFul << PORT_WRCONFIG_PMUX_Pos)
|
||||
#define PORT_WRCONFIG_PMUX(value) (PORT_WRCONFIG_PMUX_Msk & ((value) << PORT_WRCONFIG_PMUX_Pos))
|
||||
#define PORT_WRCONFIG_WRPMUX_Pos 28 /**< \brief (PORT_WRCONFIG) Write PMUX */
|
||||
#define PORT_WRCONFIG_WRPMUX (0x1ul << PORT_WRCONFIG_WRPMUX_Pos)
|
||||
#define PORT_WRCONFIG_WRPINCFG_Pos 30 /**< \brief (PORT_WRCONFIG) Write PINCFG */
|
||||
#define PORT_WRCONFIG_WRPINCFG (0x1ul << PORT_WRCONFIG_WRPINCFG_Pos)
|
||||
#define PORT_WRCONFIG_HWSEL_Pos 31 /**< \brief (PORT_WRCONFIG) Half-Word Select */
|
||||
#define PORT_WRCONFIG_HWSEL (0x1ul << PORT_WRCONFIG_HWSEL_Pos)
|
||||
#define PORT_WRCONFIG_MASK 0xDF47FFFFul /**< \brief (PORT_WRCONFIG) MASK Register */
|
||||
|
||||
/* -------- PORT_PMUX : (PORT Offset: 0x30) (R/W 8) GROUP Peripheral Multiplexing n -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint8_t PMUXE:4; /*!< bit: 0.. 3 Peripheral Multiplexing Even */
|
||||
uint8_t PMUXO:4; /*!< bit: 4.. 7 Peripheral Multiplexing Odd */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} PORT_PMUX_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_PMUX_OFFSET 0x30 /**< \brief (PORT_PMUX offset) Peripheral Multiplexing n */
|
||||
#define PORT_PMUX_RESETVALUE 0x00ul /**< \brief (PORT_PMUX reset_value) Peripheral Multiplexing n */
|
||||
|
||||
#define PORT_PMUX_PMUXE_Pos 0 /**< \brief (PORT_PMUX) Peripheral Multiplexing Even */
|
||||
#define PORT_PMUX_PMUXE_Msk (0xFul << PORT_PMUX_PMUXE_Pos)
|
||||
#define PORT_PMUX_PMUXE(value) (PORT_PMUX_PMUXE_Msk & ((value) << PORT_PMUX_PMUXE_Pos))
|
||||
#define PORT_PMUX_PMUXE_A_Val 0x0ul /**< \brief (PORT_PMUX) Peripheral function A selected */
|
||||
#define PORT_PMUX_PMUXE_B_Val 0x1ul /**< \brief (PORT_PMUX) Peripheral function B selected */
|
||||
#define PORT_PMUX_PMUXE_C_Val 0x2ul /**< \brief (PORT_PMUX) Peripheral function C selected */
|
||||
#define PORT_PMUX_PMUXE_D_Val 0x3ul /**< \brief (PORT_PMUX) Peripheral function D selected */
|
||||
#define PORT_PMUX_PMUXE_E_Val 0x4ul /**< \brief (PORT_PMUX) Peripheral function E selected */
|
||||
#define PORT_PMUX_PMUXE_F_Val 0x5ul /**< \brief (PORT_PMUX) Peripheral function F selected */
|
||||
#define PORT_PMUX_PMUXE_G_Val 0x6ul /**< \brief (PORT_PMUX) Peripheral function G selected */
|
||||
#define PORT_PMUX_PMUXE_H_Val 0x7ul /**< \brief (PORT_PMUX) Peripheral function H selected */
|
||||
#define PORT_PMUX_PMUXE_A (PORT_PMUX_PMUXE_A_Val << PORT_PMUX_PMUXE_Pos)
|
||||
#define PORT_PMUX_PMUXE_B (PORT_PMUX_PMUXE_B_Val << PORT_PMUX_PMUXE_Pos)
|
||||
#define PORT_PMUX_PMUXE_C (PORT_PMUX_PMUXE_C_Val << PORT_PMUX_PMUXE_Pos)
|
||||
#define PORT_PMUX_PMUXE_D (PORT_PMUX_PMUXE_D_Val << PORT_PMUX_PMUXE_Pos)
|
||||
#define PORT_PMUX_PMUXE_E (PORT_PMUX_PMUXE_E_Val << PORT_PMUX_PMUXE_Pos)
|
||||
#define PORT_PMUX_PMUXE_F (PORT_PMUX_PMUXE_F_Val << PORT_PMUX_PMUXE_Pos)
|
||||
#define PORT_PMUX_PMUXE_G (PORT_PMUX_PMUXE_G_Val << PORT_PMUX_PMUXE_Pos)
|
||||
#define PORT_PMUX_PMUXE_H (PORT_PMUX_PMUXE_H_Val << PORT_PMUX_PMUXE_Pos)
|
||||
#define PORT_PMUX_PMUXO_Pos 4 /**< \brief (PORT_PMUX) Peripheral Multiplexing Odd */
|
||||
#define PORT_PMUX_PMUXO_Msk (0xFul << PORT_PMUX_PMUXO_Pos)
|
||||
#define PORT_PMUX_PMUXO(value) (PORT_PMUX_PMUXO_Msk & ((value) << PORT_PMUX_PMUXO_Pos))
|
||||
#define PORT_PMUX_PMUXO_A_Val 0x0ul /**< \brief (PORT_PMUX) Peripheral function A selected */
|
||||
#define PORT_PMUX_PMUXO_B_Val 0x1ul /**< \brief (PORT_PMUX) Peripheral function B selected */
|
||||
#define PORT_PMUX_PMUXO_C_Val 0x2ul /**< \brief (PORT_PMUX) Peripheral function C selected */
|
||||
#define PORT_PMUX_PMUXO_D_Val 0x3ul /**< \brief (PORT_PMUX) Peripheral function D selected */
|
||||
#define PORT_PMUX_PMUXO_E_Val 0x4ul /**< \brief (PORT_PMUX) Peripheral function E selected */
|
||||
#define PORT_PMUX_PMUXO_F_Val 0x5ul /**< \brief (PORT_PMUX) Peripheral function F selected */
|
||||
#define PORT_PMUX_PMUXO_G_Val 0x6ul /**< \brief (PORT_PMUX) Peripheral function G selected */
|
||||
#define PORT_PMUX_PMUXO_H_Val 0x7ul /**< \brief (PORT_PMUX) Peripheral function H selected */
|
||||
#define PORT_PMUX_PMUXO_A (PORT_PMUX_PMUXO_A_Val << PORT_PMUX_PMUXO_Pos)
|
||||
#define PORT_PMUX_PMUXO_B (PORT_PMUX_PMUXO_B_Val << PORT_PMUX_PMUXO_Pos)
|
||||
#define PORT_PMUX_PMUXO_C (PORT_PMUX_PMUXO_C_Val << PORT_PMUX_PMUXO_Pos)
|
||||
#define PORT_PMUX_PMUXO_D (PORT_PMUX_PMUXO_D_Val << PORT_PMUX_PMUXO_Pos)
|
||||
#define PORT_PMUX_PMUXO_E (PORT_PMUX_PMUXO_E_Val << PORT_PMUX_PMUXO_Pos)
|
||||
#define PORT_PMUX_PMUXO_F (PORT_PMUX_PMUXO_F_Val << PORT_PMUX_PMUXO_Pos)
|
||||
#define PORT_PMUX_PMUXO_G (PORT_PMUX_PMUXO_G_Val << PORT_PMUX_PMUXO_Pos)
|
||||
#define PORT_PMUX_PMUXO_H (PORT_PMUX_PMUXO_H_Val << PORT_PMUX_PMUXO_Pos)
|
||||
#define PORT_PMUX_MASK 0xFFul /**< \brief (PORT_PMUX) MASK Register */
|
||||
|
||||
/* -------- PORT_PINCFG : (PORT Offset: 0x40) (R/W 8) GROUP Pin Configuration n -------- */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union {
|
||||
struct {
|
||||
uint8_t PMUXEN:1; /*!< bit: 0 Peripheral Multiplexer Enable */
|
||||
uint8_t INEN:1; /*!< bit: 1 Input Enable */
|
||||
uint8_t PULLEN:1; /*!< bit: 2 Pull Enable */
|
||||
uint8_t :3; /*!< bit: 3.. 5 Reserved */
|
||||
uint8_t DRVSTR:1; /*!< bit: 6 Output Driver Strength Selection */
|
||||
uint8_t :1; /*!< bit: 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} PORT_PINCFG_Type;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
#define PORT_PINCFG_OFFSET 0x40 /**< \brief (PORT_PINCFG offset) Pin Configuration n */
|
||||
#define PORT_PINCFG_RESETVALUE 0x00ul /**< \brief (PORT_PINCFG reset_value) Pin Configuration n */
|
||||
|
||||
#define PORT_PINCFG_PMUXEN_Pos 0 /**< \brief (PORT_PINCFG) Peripheral Multiplexer Enable */
|
||||
#define PORT_PINCFG_PMUXEN (0x1ul << PORT_PINCFG_PMUXEN_Pos)
|
||||
#define PORT_PINCFG_INEN_Pos 1 /**< \brief (PORT_PINCFG) Input Enable */
|
||||
#define PORT_PINCFG_INEN (0x1ul << PORT_PINCFG_INEN_Pos)
|
||||
#define PORT_PINCFG_PULLEN_Pos 2 /**< \brief (PORT_PINCFG) Pull Enable */
|
||||
#define PORT_PINCFG_PULLEN (0x1ul << PORT_PINCFG_PULLEN_Pos)
|
||||
#define PORT_PINCFG_DRVSTR_Pos 6 /**< \brief (PORT_PINCFG) Output Driver Strength Selection */
|
||||
#define PORT_PINCFG_DRVSTR (0x1ul << PORT_PINCFG_DRVSTR_Pos)
|
||||
#define PORT_PINCFG_MASK 0x47ul /**< \brief (PORT_PINCFG) MASK Register */
|
||||
|
||||
/** \brief PortGroup hardware registers */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef struct {
|
||||
__IO PORT_DIR_Type DIR; /**< \brief Offset: 0x00 (R/W 32) Data Direction */
|
||||
__IO PORT_DIRCLR_Type DIRCLR; /**< \brief Offset: 0x04 (R/W 32) Data Direction Clear */
|
||||
__IO PORT_DIRSET_Type DIRSET; /**< \brief Offset: 0x08 (R/W 32) Data Direction Set */
|
||||
__IO PORT_DIRTGL_Type DIRTGL; /**< \brief Offset: 0x0C (R/W 32) Data Direction Toggle */
|
||||
__IO PORT_OUT_Type OUT; /**< \brief Offset: 0x10 (R/W 32) Data Output Value */
|
||||
__IO PORT_OUTCLR_Type OUTCLR; /**< \brief Offset: 0x14 (R/W 32) Data Output Value Clear */
|
||||
__IO PORT_OUTSET_Type OUTSET; /**< \brief Offset: 0x18 (R/W 32) Data Output Value Set */
|
||||
__IO PORT_OUTTGL_Type OUTTGL; /**< \brief Offset: 0x1C (R/W 32) Data Output Value Toggle */
|
||||
__I PORT_IN_Type IN; /**< \brief Offset: 0x20 (R/ 32) Data Input Value */
|
||||
__IO PORT_CTRL_Type CTRL; /**< \brief Offset: 0x24 (R/W 32) Control */
|
||||
__O PORT_WRCONFIG_Type WRCONFIG; /**< \brief Offset: 0x28 ( /W 32) Write Configuration */
|
||||
RoReg8 Reserved1[0x4];
|
||||
__IO PORT_PMUX_Type PMUX[16]; /**< \brief Offset: 0x30 (R/W 8) Peripheral Multiplexing n */
|
||||
__IO PORT_PINCFG_Type PINCFG[32]; /**< \brief Offset: 0x40 (R/W 8) Pin Configuration n */
|
||||
RoReg8 Reserved2[0x20];
|
||||
} PortGroup;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/** \brief PORT hardware registers */
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef struct {
|
||||
PortGroup Group[2]; /**< \brief Offset: 0x00 PortGroup groups [GROUPS] */
|
||||
} Port;
|
||||
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/*@}*/
|
||||
|
||||
#endif /* _SAMD21_PORT_COMPONENT_ */
|
||||
|
||||
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Reference in New Issue