doc/html/component_2i2s_8h_source.html

#ifndef _SAME54_I2S_COMPONENT_

#define _SAME54_I2S_COMPONENT_


/* ========================================================================== */

/* ========================================================================== */


#define I2S_U2224

#define REV_I2S                     0x200


/* -------- I2S_CTRLA : (I2S Offset: 0x00) (R/W  8) Control A -------- */

#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))

typedef union {

  struct {

    uint8_t  SWRST:1;

    uint8_t  ENABLE:1;

    uint8_t  CKEN0:1;

    uint8_t  CKEN1:1;

    uint8_t  TXEN:1;

    uint8_t  RXEN:1;

    uint8_t  :2;

  } bit;

  struct {

    uint8_t  :2;

    uint8_t  CKEN:2;

    uint8_t  :4;

  } vec;

  uint8_t reg;

} I2S_CTRLA_Type;

#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */


#define I2S_CTRLA_OFFSET            0x00

#define I2S_CTRLA_RESETVALUE        _U_(0x00)

#define I2S_CTRLA_SWRST_Pos         0

#define I2S_CTRLA_SWRST             (_U_(0x1) << I2S_CTRLA_SWRST_Pos)

#define I2S_CTRLA_ENABLE_Pos        1

#define I2S_CTRLA_ENABLE            (_U_(0x1) << I2S_CTRLA_ENABLE_Pos)

#define I2S_CTRLA_CKEN0_Pos         2

#define I2S_CTRLA_CKEN0             (_U_(1) << I2S_CTRLA_CKEN0_Pos)

#define I2S_CTRLA_CKEN1_Pos         3

#define I2S_CTRLA_CKEN1             (_U_(1) << I2S_CTRLA_CKEN1_Pos)

#define I2S_CTRLA_CKEN_Pos          2

#define I2S_CTRLA_CKEN_Msk          (_U_(0x3) << I2S_CTRLA_CKEN_Pos)

#define I2S_CTRLA_CKEN(value)       (I2S_CTRLA_CKEN_Msk & ((value) << I2S_CTRLA_CKEN_Pos))

#define I2S_CTRLA_TXEN_Pos          4

#define I2S_CTRLA_TXEN              (_U_(0x1) << I2S_CTRLA_TXEN_Pos)

#define I2S_CTRLA_RXEN_Pos          5

#define I2S_CTRLA_RXEN              (_U_(0x1) << I2S_CTRLA_RXEN_Pos)

#define I2S_CTRLA_MASK              _U_(0x3F)

/* -------- I2S_CLKCTRL : (I2S Offset: 0x04) (R/W 32) Clock Unit n Control -------- */

#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))

typedef union {

  struct {

    uint32_t SLOTSIZE:2;

    uint32_t NBSLOTS:3;

    uint32_t FSWIDTH:2;

    uint32_t BITDELAY:1;

    uint32_t FSSEL:1;

    uint32_t FSINV:1;

    uint32_t FSOUTINV:1;

    uint32_t SCKSEL:1;

    uint32_t SCKOUTINV:1;

    uint32_t MCKSEL:1;

    uint32_t MCKEN:1;

    uint32_t MCKOUTINV:1;

    uint32_t MCKDIV:6;

    uint32_t :2;

    uint32_t MCKOUTDIV:6;

    uint32_t :2;

  } bit;

  uint32_t reg;

} I2S_CLKCTRL_Type;

#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */


#define I2S_CLKCTRL_OFFSET          0x04

#define I2S_CLKCTRL_RESETVALUE      _U_(0x00000000)

#define I2S_CLKCTRL_SLOTSIZE_Pos    0

#define I2S_CLKCTRL_SLOTSIZE_Msk    (_U_(0x3) << I2S_CLKCTRL_SLOTSIZE_Pos)

#define I2S_CLKCTRL_SLOTSIZE(value) (I2S_CLKCTRL_SLOTSIZE_Msk & ((value) << I2S_CLKCTRL_SLOTSIZE_Pos))

#define   I2S_CLKCTRL_SLOTSIZE_8_Val      _U_(0x0)

#define   I2S_CLKCTRL_SLOTSIZE_16_Val     _U_(0x1)

#define   I2S_CLKCTRL_SLOTSIZE_24_Val     _U_(0x2)

#define   I2S_CLKCTRL_SLOTSIZE_32_Val     _U_(0x3)

#define I2S_CLKCTRL_SLOTSIZE_8      (I2S_CLKCTRL_SLOTSIZE_8_Val    << I2S_CLKCTRL_SLOTSIZE_Pos)

#define I2S_CLKCTRL_SLOTSIZE_16     (I2S_CLKCTRL_SLOTSIZE_16_Val   << I2S_CLKCTRL_SLOTSIZE_Pos)

#define I2S_CLKCTRL_SLOTSIZE_24     (I2S_CLKCTRL_SLOTSIZE_24_Val   << I2S_CLKCTRL_SLOTSIZE_Pos)

#define I2S_CLKCTRL_SLOTSIZE_32     (I2S_CLKCTRL_SLOTSIZE_32_Val   << I2S_CLKCTRL_SLOTSIZE_Pos)

#define I2S_CLKCTRL_NBSLOTS_Pos     2

#define I2S_CLKCTRL_NBSLOTS_Msk     (_U_(0x7) << I2S_CLKCTRL_NBSLOTS_Pos)

#define I2S_CLKCTRL_NBSLOTS(value)  (I2S_CLKCTRL_NBSLOTS_Msk & ((value) << I2S_CLKCTRL_NBSLOTS_Pos))

#define I2S_CLKCTRL_FSWIDTH_Pos     5

#define I2S_CLKCTRL_FSWIDTH_Msk     (_U_(0x3) << I2S_CLKCTRL_FSWIDTH_Pos)

#define I2S_CLKCTRL_FSWIDTH(value)  (I2S_CLKCTRL_FSWIDTH_Msk & ((value) << I2S_CLKCTRL_FSWIDTH_Pos))

#define   I2S_CLKCTRL_FSWIDTH_SLOT_Val    _U_(0x0)

#define   I2S_CLKCTRL_FSWIDTH_HALF_Val    _U_(0x1)

#define   I2S_CLKCTRL_FSWIDTH_BIT_Val     _U_(0x2)

#define   I2S_CLKCTRL_FSWIDTH_BURST_Val   _U_(0x3)

#define I2S_CLKCTRL_FSWIDTH_SLOT    (I2S_CLKCTRL_FSWIDTH_SLOT_Val  << I2S_CLKCTRL_FSWIDTH_Pos)

#define I2S_CLKCTRL_FSWIDTH_HALF    (I2S_CLKCTRL_FSWIDTH_HALF_Val  << I2S_CLKCTRL_FSWIDTH_Pos)

#define I2S_CLKCTRL_FSWIDTH_BIT     (I2S_CLKCTRL_FSWIDTH_BIT_Val   << I2S_CLKCTRL_FSWIDTH_Pos)

#define I2S_CLKCTRL_FSWIDTH_BURST   (I2S_CLKCTRL_FSWIDTH_BURST_Val << I2S_CLKCTRL_FSWIDTH_Pos)

#define I2S_CLKCTRL_BITDELAY_Pos    7

#define I2S_CLKCTRL_BITDELAY        (_U_(0x1) << I2S_CLKCTRL_BITDELAY_Pos)

#define   I2S_CLKCTRL_BITDELAY_LJ_Val     _U_(0x0)

#define   I2S_CLKCTRL_BITDELAY_I2S_Val    _U_(0x1)

#define I2S_CLKCTRL_BITDELAY_LJ     (I2S_CLKCTRL_BITDELAY_LJ_Val   << I2S_CLKCTRL_BITDELAY_Pos)

#define I2S_CLKCTRL_BITDELAY_I2S    (I2S_CLKCTRL_BITDELAY_I2S_Val  << I2S_CLKCTRL_BITDELAY_Pos)

#define I2S_CLKCTRL_FSSEL_Pos       8

#define I2S_CLKCTRL_FSSEL           (_U_(0x1) << I2S_CLKCTRL_FSSEL_Pos)

#define   I2S_CLKCTRL_FSSEL_SCKDIV_Val    _U_(0x0)

#define   I2S_CLKCTRL_FSSEL_FSPIN_Val     _U_(0x1)

#define I2S_CLKCTRL_FSSEL_SCKDIV    (I2S_CLKCTRL_FSSEL_SCKDIV_Val  << I2S_CLKCTRL_FSSEL_Pos)

#define I2S_CLKCTRL_FSSEL_FSPIN     (I2S_CLKCTRL_FSSEL_FSPIN_Val   << I2S_CLKCTRL_FSSEL_Pos)

#define I2S_CLKCTRL_FSINV_Pos       9

#define I2S_CLKCTRL_FSINV           (_U_(0x1) << I2S_CLKCTRL_FSINV_Pos)

#define I2S_CLKCTRL_FSOUTINV_Pos    10

#define I2S_CLKCTRL_FSOUTINV        (_U_(0x1) << I2S_CLKCTRL_FSOUTINV_Pos)

#define I2S_CLKCTRL_SCKSEL_Pos      11

#define I2S_CLKCTRL_SCKSEL          (_U_(0x1) << I2S_CLKCTRL_SCKSEL_Pos)

#define   I2S_CLKCTRL_SCKSEL_MCKDIV_Val   _U_(0x0)

#define   I2S_CLKCTRL_SCKSEL_SCKPIN_Val   _U_(0x1)

#define I2S_CLKCTRL_SCKSEL_MCKDIV   (I2S_CLKCTRL_SCKSEL_MCKDIV_Val << I2S_CLKCTRL_SCKSEL_Pos)

#define I2S_CLKCTRL_SCKSEL_SCKPIN   (I2S_CLKCTRL_SCKSEL_SCKPIN_Val << I2S_CLKCTRL_SCKSEL_Pos)

#define I2S_CLKCTRL_SCKOUTINV_Pos   12

#define I2S_CLKCTRL_SCKOUTINV       (_U_(0x1) << I2S_CLKCTRL_SCKOUTINV_Pos)

#define I2S_CLKCTRL_MCKSEL_Pos      13

#define I2S_CLKCTRL_MCKSEL          (_U_(0x1) << I2S_CLKCTRL_MCKSEL_Pos)

#define   I2S_CLKCTRL_MCKSEL_GCLK_Val     _U_(0x0)

#define   I2S_CLKCTRL_MCKSEL_MCKPIN_Val   _U_(0x1)

#define I2S_CLKCTRL_MCKSEL_GCLK     (I2S_CLKCTRL_MCKSEL_GCLK_Val   << I2S_CLKCTRL_MCKSEL_Pos)

#define I2S_CLKCTRL_MCKSEL_MCKPIN   (I2S_CLKCTRL_MCKSEL_MCKPIN_Val << I2S_CLKCTRL_MCKSEL_Pos)

#define I2S_CLKCTRL_MCKEN_Pos       14

#define I2S_CLKCTRL_MCKEN           (_U_(0x1) << I2S_CLKCTRL_MCKEN_Pos)

#define I2S_CLKCTRL_MCKOUTINV_Pos   15

#define I2S_CLKCTRL_MCKOUTINV       (_U_(0x1) << I2S_CLKCTRL_MCKOUTINV_Pos)

#define I2S_CLKCTRL_MCKDIV_Pos      16

#define I2S_CLKCTRL_MCKDIV_Msk      (_U_(0x3F) << I2S_CLKCTRL_MCKDIV_Pos)

#define I2S_CLKCTRL_MCKDIV(value)   (I2S_CLKCTRL_MCKDIV_Msk & ((value) << I2S_CLKCTRL_MCKDIV_Pos))

#define I2S_CLKCTRL_MCKOUTDIV_Pos   24

#define I2S_CLKCTRL_MCKOUTDIV_Msk   (_U_(0x3F) << I2S_CLKCTRL_MCKOUTDIV_Pos)

#define I2S_CLKCTRL_MCKOUTDIV(value) (I2S_CLKCTRL_MCKOUTDIV_Msk & ((value) << I2S_CLKCTRL_MCKOUTDIV_Pos))

#define I2S_CLKCTRL_MASK            _U_(0x3F3FFFFF)

/* -------- I2S_INTENCLR : (I2S Offset: 0x0C) (R/W 16) Interrupt Enable Clear -------- */

#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))

typedef union {

  struct {

    uint16_t RXRDY0:1;

    uint16_t RXRDY1:1;

    uint16_t :2;

    uint16_t RXOR0:1;

    uint16_t RXOR1:1;

    uint16_t :2;

    uint16_t TXRDY0:1;

    uint16_t TXRDY1:1;

    uint16_t :2;

    uint16_t TXUR0:1;

    uint16_t TXUR1:1;

    uint16_t :2;

  } bit;

  struct {

    uint16_t RXRDY:2;

    uint16_t :2;

    uint16_t RXOR:2;

    uint16_t :2;

    uint16_t TXRDY:2;

    uint16_t :2;

    uint16_t TXUR:2;

    uint16_t :2;

  } vec;

  uint16_t reg;

} I2S_INTENCLR_Type;

#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */


#define I2S_INTENCLR_OFFSET         0x0C

#define I2S_INTENCLR_RESETVALUE     _U_(0x0000)

#define I2S_INTENCLR_RXRDY0_Pos     0

#define I2S_INTENCLR_RXRDY0         (_U_(1) << I2S_INTENCLR_RXRDY0_Pos)

#define I2S_INTENCLR_RXRDY1_Pos     1

#define I2S_INTENCLR_RXRDY1         (_U_(1) << I2S_INTENCLR_RXRDY1_Pos)

#define I2S_INTENCLR_RXRDY_Pos      0

#define I2S_INTENCLR_RXRDY_Msk      (_U_(0x3) << I2S_INTENCLR_RXRDY_Pos)

#define I2S_INTENCLR_RXRDY(value)   (I2S_INTENCLR_RXRDY_Msk & ((value) << I2S_INTENCLR_RXRDY_Pos))

#define I2S_INTENCLR_RXOR0_Pos      4

#define I2S_INTENCLR_RXOR0          (_U_(1) << I2S_INTENCLR_RXOR0_Pos)

#define I2S_INTENCLR_RXOR1_Pos      5

#define I2S_INTENCLR_RXOR1          (_U_(1) << I2S_INTENCLR_RXOR1_Pos)

#define I2S_INTENCLR_RXOR_Pos       4

#define I2S_INTENCLR_RXOR_Msk       (_U_(0x3) << I2S_INTENCLR_RXOR_Pos)

#define I2S_INTENCLR_RXOR(value)    (I2S_INTENCLR_RXOR_Msk & ((value) << I2S_INTENCLR_RXOR_Pos))

#define I2S_INTENCLR_TXRDY0_Pos     8

#define I2S_INTENCLR_TXRDY0         (_U_(1) << I2S_INTENCLR_TXRDY0_Pos)

#define I2S_INTENCLR_TXRDY1_Pos     9

#define I2S_INTENCLR_TXRDY1         (_U_(1) << I2S_INTENCLR_TXRDY1_Pos)

#define I2S_INTENCLR_TXRDY_Pos      8

#define I2S_INTENCLR_TXRDY_Msk      (_U_(0x3) << I2S_INTENCLR_TXRDY_Pos)

#define I2S_INTENCLR_TXRDY(value)   (I2S_INTENCLR_TXRDY_Msk & ((value) << I2S_INTENCLR_TXRDY_Pos))

#define I2S_INTENCLR_TXUR0_Pos      12

#define I2S_INTENCLR_TXUR0          (_U_(1) << I2S_INTENCLR_TXUR0_Pos)

#define I2S_INTENCLR_TXUR1_Pos      13

#define I2S_INTENCLR_TXUR1          (_U_(1) << I2S_INTENCLR_TXUR1_Pos)

#define I2S_INTENCLR_TXUR_Pos       12

#define I2S_INTENCLR_TXUR_Msk       (_U_(0x3) << I2S_INTENCLR_TXUR_Pos)

#define I2S_INTENCLR_TXUR(value)    (I2S_INTENCLR_TXUR_Msk & ((value) << I2S_INTENCLR_TXUR_Pos))

#define I2S_INTENCLR_MASK           _U_(0x3333)

/* -------- I2S_INTENSET : (I2S Offset: 0x10) (R/W 16) Interrupt Enable Set -------- */

#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))

typedef union {

  struct {

    uint16_t RXRDY0:1;

    uint16_t RXRDY1:1;

    uint16_t :2;

    uint16_t RXOR0:1;

    uint16_t RXOR1:1;

    uint16_t :2;

    uint16_t TXRDY0:1;

    uint16_t TXRDY1:1;

    uint16_t :2;

    uint16_t TXUR0:1;

    uint16_t TXUR1:1;

    uint16_t :2;

  } bit;

  struct {

    uint16_t RXRDY:2;

    uint16_t :2;

    uint16_t RXOR:2;

    uint16_t :2;

    uint16_t TXRDY:2;

    uint16_t :2;

    uint16_t TXUR:2;

    uint16_t :2;

  } vec;

  uint16_t reg;

} I2S_INTENSET_Type;

#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */


#define I2S_INTENSET_OFFSET         0x10

#define I2S_INTENSET_RESETVALUE     _U_(0x0000)

#define I2S_INTENSET_RXRDY0_Pos     0

#define I2S_INTENSET_RXRDY0         (_U_(1) << I2S_INTENSET_RXRDY0_Pos)

#define I2S_INTENSET_RXRDY1_Pos     1

#define I2S_INTENSET_RXRDY1         (_U_(1) << I2S_INTENSET_RXRDY1_Pos)

#define I2S_INTENSET_RXRDY_Pos      0

#define I2S_INTENSET_RXRDY_Msk      (_U_(0x3) << I2S_INTENSET_RXRDY_Pos)

#define I2S_INTENSET_RXRDY(value)   (I2S_INTENSET_RXRDY_Msk & ((value) << I2S_INTENSET_RXRDY_Pos))

#define I2S_INTENSET_RXOR0_Pos      4

#define I2S_INTENSET_RXOR0          (_U_(1) << I2S_INTENSET_RXOR0_Pos)

#define I2S_INTENSET_RXOR1_Pos      5

#define I2S_INTENSET_RXOR1          (_U_(1) << I2S_INTENSET_RXOR1_Pos)

#define I2S_INTENSET_RXOR_Pos       4

#define I2S_INTENSET_RXOR_Msk       (_U_(0x3) << I2S_INTENSET_RXOR_Pos)

#define I2S_INTENSET_RXOR(value)    (I2S_INTENSET_RXOR_Msk & ((value) << I2S_INTENSET_RXOR_Pos))

#define I2S_INTENSET_TXRDY0_Pos     8

#define I2S_INTENSET_TXRDY0         (_U_(1) << I2S_INTENSET_TXRDY0_Pos)

#define I2S_INTENSET_TXRDY1_Pos     9

#define I2S_INTENSET_TXRDY1         (_U_(1) << I2S_INTENSET_TXRDY1_Pos)

#define I2S_INTENSET_TXRDY_Pos      8

#define I2S_INTENSET_TXRDY_Msk      (_U_(0x3) << I2S_INTENSET_TXRDY_Pos)

#define I2S_INTENSET_TXRDY(value)   (I2S_INTENSET_TXRDY_Msk & ((value) << I2S_INTENSET_TXRDY_Pos))

#define I2S_INTENSET_TXUR0_Pos      12

#define I2S_INTENSET_TXUR0          (_U_(1) << I2S_INTENSET_TXUR0_Pos)

#define I2S_INTENSET_TXUR1_Pos      13

#define I2S_INTENSET_TXUR1          (_U_(1) << I2S_INTENSET_TXUR1_Pos)

#define I2S_INTENSET_TXUR_Pos       12

#define I2S_INTENSET_TXUR_Msk       (_U_(0x3) << I2S_INTENSET_TXUR_Pos)

#define I2S_INTENSET_TXUR(value)    (I2S_INTENSET_TXUR_Msk & ((value) << I2S_INTENSET_TXUR_Pos))

#define I2S_INTENSET_MASK           _U_(0x3333)

/* -------- I2S_INTFLAG : (I2S Offset: 0x14) (R/W 16) Interrupt Flag Status and Clear -------- */

#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))

typedef union { // __I to avoid read-modify-write on write-to-clear register

  struct {

    __I uint16_t RXRDY0:1;

    __I uint16_t RXRDY1:1;

    __I uint16_t :2;

    __I uint16_t RXOR0:1;

    __I uint16_t RXOR1:1;

    __I uint16_t :2;

    __I uint16_t TXRDY0:1;

    __I uint16_t TXRDY1:1;

    __I uint16_t :2;

    __I uint16_t TXUR0:1;

    __I uint16_t TXUR1:1;

    __I uint16_t :2;

  } bit;

  struct {

    __I uint16_t RXRDY:2;

    __I uint16_t :2;

    __I uint16_t RXOR:2;

    __I uint16_t :2;

    __I uint16_t TXRDY:2;

    __I uint16_t :2;

    __I uint16_t TXUR:2;

    __I uint16_t :2;

  } vec;

  uint16_t reg;

} I2S_INTFLAG_Type;

#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */


#define I2S_INTFLAG_OFFSET          0x14

#define I2S_INTFLAG_RESETVALUE      _U_(0x0000)

#define I2S_INTFLAG_RXRDY0_Pos      0

#define I2S_INTFLAG_RXRDY0          (_U_(1) << I2S_INTFLAG_RXRDY0_Pos)

#define I2S_INTFLAG_RXRDY1_Pos      1

#define I2S_INTFLAG_RXRDY1          (_U_(1) << I2S_INTFLAG_RXRDY1_Pos)

#define I2S_INTFLAG_RXRDY_Pos       0

#define I2S_INTFLAG_RXRDY_Msk       (_U_(0x3) << I2S_INTFLAG_RXRDY_Pos)

#define I2S_INTFLAG_RXRDY(value)    (I2S_INTFLAG_RXRDY_Msk & ((value) << I2S_INTFLAG_RXRDY_Pos))

#define I2S_INTFLAG_RXOR0_Pos       4

#define I2S_INTFLAG_RXOR0           (_U_(1) << I2S_INTFLAG_RXOR0_Pos)

#define I2S_INTFLAG_RXOR1_Pos       5

#define I2S_INTFLAG_RXOR1           (_U_(1) << I2S_INTFLAG_RXOR1_Pos)

#define I2S_INTFLAG_RXOR_Pos        4

#define I2S_INTFLAG_RXOR_Msk        (_U_(0x3) << I2S_INTFLAG_RXOR_Pos)

#define I2S_INTFLAG_RXOR(value)     (I2S_INTFLAG_RXOR_Msk & ((value) << I2S_INTFLAG_RXOR_Pos))

#define I2S_INTFLAG_TXRDY0_Pos      8

#define I2S_INTFLAG_TXRDY0          (_U_(1) << I2S_INTFLAG_TXRDY0_Pos)

#define I2S_INTFLAG_TXRDY1_Pos      9

#define I2S_INTFLAG_TXRDY1          (_U_(1) << I2S_INTFLAG_TXRDY1_Pos)

#define I2S_INTFLAG_TXRDY_Pos       8

#define I2S_INTFLAG_TXRDY_Msk       (_U_(0x3) << I2S_INTFLAG_TXRDY_Pos)

#define I2S_INTFLAG_TXRDY(value)    (I2S_INTFLAG_TXRDY_Msk & ((value) << I2S_INTFLAG_TXRDY_Pos))

#define I2S_INTFLAG_TXUR0_Pos       12

#define I2S_INTFLAG_TXUR0           (_U_(1) << I2S_INTFLAG_TXUR0_Pos)

#define I2S_INTFLAG_TXUR1_Pos       13

#define I2S_INTFLAG_TXUR1           (_U_(1) << I2S_INTFLAG_TXUR1_Pos)

#define I2S_INTFLAG_TXUR_Pos        12

#define I2S_INTFLAG_TXUR_Msk        (_U_(0x3) << I2S_INTFLAG_TXUR_Pos)

#define I2S_INTFLAG_TXUR(value)     (I2S_INTFLAG_TXUR_Msk & ((value) << I2S_INTFLAG_TXUR_Pos))

#define I2S_INTFLAG_MASK            _U_(0x3333)

/* -------- I2S_SYNCBUSY : (I2S Offset: 0x18) (R/  16) Synchronization Status -------- */

#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))

typedef union {

  struct {

    uint16_t SWRST:1;

    uint16_t ENABLE:1;

    uint16_t CKEN0:1;

    uint16_t CKEN1:1;

    uint16_t TXEN:1;

    uint16_t RXEN:1;

    uint16_t :2;

    uint16_t TXDATA:1;

    uint16_t RXDATA:1;

    uint16_t :6;

  } bit;

  struct {

    uint16_t :2;

    uint16_t CKEN:2;

    uint16_t :12;

  } vec;

  uint16_t reg;

} I2S_SYNCBUSY_Type;

#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */


#define I2S_SYNCBUSY_OFFSET         0x18

#define I2S_SYNCBUSY_RESETVALUE     _U_(0x0000)

#define I2S_SYNCBUSY_SWRST_Pos      0

#define I2S_SYNCBUSY_SWRST          (_U_(0x1) << I2S_SYNCBUSY_SWRST_Pos)

#define I2S_SYNCBUSY_ENABLE_Pos     1

#define I2S_SYNCBUSY_ENABLE         (_U_(0x1) << I2S_SYNCBUSY_ENABLE_Pos)

#define I2S_SYNCBUSY_CKEN0_Pos      2

#define I2S_SYNCBUSY_CKEN0          (_U_(1) << I2S_SYNCBUSY_CKEN0_Pos)

#define I2S_SYNCBUSY_CKEN1_Pos      3

#define I2S_SYNCBUSY_CKEN1          (_U_(1) << I2S_SYNCBUSY_CKEN1_Pos)

#define I2S_SYNCBUSY_CKEN_Pos       2

#define I2S_SYNCBUSY_CKEN_Msk       (_U_(0x3) << I2S_SYNCBUSY_CKEN_Pos)

#define I2S_SYNCBUSY_CKEN(value)    (I2S_SYNCBUSY_CKEN_Msk & ((value) << I2S_SYNCBUSY_CKEN_Pos))

#define I2S_SYNCBUSY_TXEN_Pos       4

#define I2S_SYNCBUSY_TXEN           (_U_(0x1) << I2S_SYNCBUSY_TXEN_Pos)

#define I2S_SYNCBUSY_RXEN_Pos       5

#define I2S_SYNCBUSY_RXEN           (_U_(0x1) << I2S_SYNCBUSY_RXEN_Pos)

#define I2S_SYNCBUSY_TXDATA_Pos     8

#define I2S_SYNCBUSY_TXDATA         (_U_(0x1) << I2S_SYNCBUSY_TXDATA_Pos)

#define I2S_SYNCBUSY_RXDATA_Pos     9

#define I2S_SYNCBUSY_RXDATA         (_U_(0x1) << I2S_SYNCBUSY_RXDATA_Pos)

#define I2S_SYNCBUSY_MASK           _U_(0x033F)

/* -------- I2S_TXCTRL : (I2S Offset: 0x20) (R/W 32) Tx Serializer Control -------- */

#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))

typedef union {

  struct {

    uint32_t :2;

    uint32_t TXDEFAULT:2;

    uint32_t TXSAME:1;

    uint32_t :2;

    uint32_t SLOTADJ:1;

    uint32_t DATASIZE:3;

    uint32_t :1;

    uint32_t WORDADJ:1;

    uint32_t EXTEND:2;

    uint32_t BITREV:1;

    uint32_t SLOTDIS0:1;

    uint32_t SLOTDIS1:1;

    uint32_t SLOTDIS2:1;

    uint32_t SLOTDIS3:1;

    uint32_t SLOTDIS4:1;

    uint32_t SLOTDIS5:1;

    uint32_t SLOTDIS6:1;

    uint32_t SLOTDIS7:1;

    uint32_t MONO:1;

    uint32_t DMA:1;

    uint32_t :6;

  } bit;

  struct {

    uint32_t :16;

    uint32_t SLOTDIS:8;

    uint32_t :8;

  } vec;

  uint32_t reg;

} I2S_TXCTRL_Type;

#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */


#define I2S_TXCTRL_OFFSET           0x20

#define I2S_TXCTRL_RESETVALUE       _U_(0x00000000)

#define I2S_TXCTRL_TXDEFAULT_Pos    2

#define I2S_TXCTRL_TXDEFAULT_Msk    (_U_(0x3) << I2S_TXCTRL_TXDEFAULT_Pos)

#define I2S_TXCTRL_TXDEFAULT(value) (I2S_TXCTRL_TXDEFAULT_Msk & ((value) << I2S_TXCTRL_TXDEFAULT_Pos))

#define   I2S_TXCTRL_TXDEFAULT_ZERO_Val   _U_(0x0)

#define   I2S_TXCTRL_TXDEFAULT_ONE_Val    _U_(0x1)

#define   I2S_TXCTRL_TXDEFAULT_HIZ_Val    _U_(0x3)

#define I2S_TXCTRL_TXDEFAULT_ZERO   (I2S_TXCTRL_TXDEFAULT_ZERO_Val << I2S_TXCTRL_TXDEFAULT_Pos)

#define I2S_TXCTRL_TXDEFAULT_ONE    (I2S_TXCTRL_TXDEFAULT_ONE_Val  << I2S_TXCTRL_TXDEFAULT_Pos)

#define I2S_TXCTRL_TXDEFAULT_HIZ    (I2S_TXCTRL_TXDEFAULT_HIZ_Val  << I2S_TXCTRL_TXDEFAULT_Pos)

#define I2S_TXCTRL_TXSAME_Pos       4

#define I2S_TXCTRL_TXSAME           (_U_(0x1) << I2S_TXCTRL_TXSAME_Pos)

#define   I2S_TXCTRL_TXSAME_ZERO_Val      _U_(0x0)

#define   I2S_TXCTRL_TXSAME_SAME_Val      _U_(0x1)

#define I2S_TXCTRL_TXSAME_ZERO      (I2S_TXCTRL_TXSAME_ZERO_Val    << I2S_TXCTRL_TXSAME_Pos)

#define I2S_TXCTRL_TXSAME_SAME      (I2S_TXCTRL_TXSAME_SAME_Val    << I2S_TXCTRL_TXSAME_Pos)

#define I2S_TXCTRL_SLOTADJ_Pos      7

#define I2S_TXCTRL_SLOTADJ          (_U_(0x1) << I2S_TXCTRL_SLOTADJ_Pos)

#define   I2S_TXCTRL_SLOTADJ_RIGHT_Val    _U_(0x0)

#define   I2S_TXCTRL_SLOTADJ_LEFT_Val     _U_(0x1)

#define I2S_TXCTRL_SLOTADJ_RIGHT    (I2S_TXCTRL_SLOTADJ_RIGHT_Val  << I2S_TXCTRL_SLOTADJ_Pos)

#define I2S_TXCTRL_SLOTADJ_LEFT     (I2S_TXCTRL_SLOTADJ_LEFT_Val   << I2S_TXCTRL_SLOTADJ_Pos)

#define I2S_TXCTRL_DATASIZE_Pos     8

#define I2S_TXCTRL_DATASIZE_Msk     (_U_(0x7) << I2S_TXCTRL_DATASIZE_Pos)

#define I2S_TXCTRL_DATASIZE(value)  (I2S_TXCTRL_DATASIZE_Msk & ((value) << I2S_TXCTRL_DATASIZE_Pos))

#define   I2S_TXCTRL_DATASIZE_32_Val      _U_(0x0)

#define   I2S_TXCTRL_DATASIZE_24_Val      _U_(0x1)

#define   I2S_TXCTRL_DATASIZE_20_Val      _U_(0x2)

#define   I2S_TXCTRL_DATASIZE_18_Val      _U_(0x3)

#define   I2S_TXCTRL_DATASIZE_16_Val      _U_(0x4)

#define   I2S_TXCTRL_DATASIZE_16C_Val     _U_(0x5)

#define   I2S_TXCTRL_DATASIZE_8_Val       _U_(0x6)

#define   I2S_TXCTRL_DATASIZE_8C_Val      _U_(0x7)

#define I2S_TXCTRL_DATASIZE_32      (I2S_TXCTRL_DATASIZE_32_Val    << I2S_TXCTRL_DATASIZE_Pos)

#define I2S_TXCTRL_DATASIZE_24      (I2S_TXCTRL_DATASIZE_24_Val    << I2S_TXCTRL_DATASIZE_Pos)

#define I2S_TXCTRL_DATASIZE_20      (I2S_TXCTRL_DATASIZE_20_Val    << I2S_TXCTRL_DATASIZE_Pos)

#define I2S_TXCTRL_DATASIZE_18      (I2S_TXCTRL_DATASIZE_18_Val    << I2S_TXCTRL_DATASIZE_Pos)

#define I2S_TXCTRL_DATASIZE_16      (I2S_TXCTRL_DATASIZE_16_Val    << I2S_TXCTRL_DATASIZE_Pos)

#define I2S_TXCTRL_DATASIZE_16C     (I2S_TXCTRL_DATASIZE_16C_Val   << I2S_TXCTRL_DATASIZE_Pos)

#define I2S_TXCTRL_DATASIZE_8       (I2S_TXCTRL_DATASIZE_8_Val     << I2S_TXCTRL_DATASIZE_Pos)

#define I2S_TXCTRL_DATASIZE_8C      (I2S_TXCTRL_DATASIZE_8C_Val    << I2S_TXCTRL_DATASIZE_Pos)

#define I2S_TXCTRL_WORDADJ_Pos      12

#define I2S_TXCTRL_WORDADJ          (_U_(0x1) << I2S_TXCTRL_WORDADJ_Pos)

#define   I2S_TXCTRL_WORDADJ_RIGHT_Val    _U_(0x0)

#define   I2S_TXCTRL_WORDADJ_LEFT_Val     _U_(0x1)

#define I2S_TXCTRL_WORDADJ_RIGHT    (I2S_TXCTRL_WORDADJ_RIGHT_Val  << I2S_TXCTRL_WORDADJ_Pos)

#define I2S_TXCTRL_WORDADJ_LEFT     (I2S_TXCTRL_WORDADJ_LEFT_Val   << I2S_TXCTRL_WORDADJ_Pos)

#define I2S_TXCTRL_EXTEND_Pos       13

#define I2S_TXCTRL_EXTEND_Msk       (_U_(0x3) << I2S_TXCTRL_EXTEND_Pos)

#define I2S_TXCTRL_EXTEND(value)    (I2S_TXCTRL_EXTEND_Msk & ((value) << I2S_TXCTRL_EXTEND_Pos))

#define   I2S_TXCTRL_EXTEND_ZERO_Val      _U_(0x0)

#define   I2S_TXCTRL_EXTEND_ONE_Val       _U_(0x1)

#define   I2S_TXCTRL_EXTEND_MSBIT_Val     _U_(0x2)

#define   I2S_TXCTRL_EXTEND_LSBIT_Val     _U_(0x3)

#define I2S_TXCTRL_EXTEND_ZERO      (I2S_TXCTRL_EXTEND_ZERO_Val    << I2S_TXCTRL_EXTEND_Pos)

#define I2S_TXCTRL_EXTEND_ONE       (I2S_TXCTRL_EXTEND_ONE_Val     << I2S_TXCTRL_EXTEND_Pos)

#define I2S_TXCTRL_EXTEND_MSBIT     (I2S_TXCTRL_EXTEND_MSBIT_Val   << I2S_TXCTRL_EXTEND_Pos)

#define I2S_TXCTRL_EXTEND_LSBIT     (I2S_TXCTRL_EXTEND_LSBIT_Val   << I2S_TXCTRL_EXTEND_Pos)

#define I2S_TXCTRL_BITREV_Pos       15

#define I2S_TXCTRL_BITREV           (_U_(0x1) << I2S_TXCTRL_BITREV_Pos)

#define   I2S_TXCTRL_BITREV_MSBIT_Val     _U_(0x0)

#define   I2S_TXCTRL_BITREV_LSBIT_Val     _U_(0x1)

#define I2S_TXCTRL_BITREV_MSBIT     (I2S_TXCTRL_BITREV_MSBIT_Val   << I2S_TXCTRL_BITREV_Pos)

#define I2S_TXCTRL_BITREV_LSBIT     (I2S_TXCTRL_BITREV_LSBIT_Val   << I2S_TXCTRL_BITREV_Pos)

#define I2S_TXCTRL_SLOTDIS0_Pos     16

#define I2S_TXCTRL_SLOTDIS0         (_U_(1) << I2S_TXCTRL_SLOTDIS0_Pos)

#define I2S_TXCTRL_SLOTDIS1_Pos     17

#define I2S_TXCTRL_SLOTDIS1         (_U_(1) << I2S_TXCTRL_SLOTDIS1_Pos)

#define I2S_TXCTRL_SLOTDIS2_Pos     18

#define I2S_TXCTRL_SLOTDIS2         (_U_(1) << I2S_TXCTRL_SLOTDIS2_Pos)

#define I2S_TXCTRL_SLOTDIS3_Pos     19

#define I2S_TXCTRL_SLOTDIS3         (_U_(1) << I2S_TXCTRL_SLOTDIS3_Pos)

#define I2S_TXCTRL_SLOTDIS4_Pos     20

#define I2S_TXCTRL_SLOTDIS4         (_U_(1) << I2S_TXCTRL_SLOTDIS4_Pos)

#define I2S_TXCTRL_SLOTDIS5_Pos     21

#define I2S_TXCTRL_SLOTDIS5         (_U_(1) << I2S_TXCTRL_SLOTDIS5_Pos)

#define I2S_TXCTRL_SLOTDIS6_Pos     22

#define I2S_TXCTRL_SLOTDIS6         (_U_(1) << I2S_TXCTRL_SLOTDIS6_Pos)

#define I2S_TXCTRL_SLOTDIS7_Pos     23

#define I2S_TXCTRL_SLOTDIS7         (_U_(1) << I2S_TXCTRL_SLOTDIS7_Pos)

#define I2S_TXCTRL_SLOTDIS_Pos      16

#define I2S_TXCTRL_SLOTDIS_Msk      (_U_(0xFF) << I2S_TXCTRL_SLOTDIS_Pos)

#define I2S_TXCTRL_SLOTDIS(value)   (I2S_TXCTRL_SLOTDIS_Msk & ((value) << I2S_TXCTRL_SLOTDIS_Pos))

#define I2S_TXCTRL_MONO_Pos         24

#define I2S_TXCTRL_MONO             (_U_(0x1) << I2S_TXCTRL_MONO_Pos)

#define   I2S_TXCTRL_MONO_STEREO_Val      _U_(0x0)

#define   I2S_TXCTRL_MONO_MONO_Val        _U_(0x1)

#define I2S_TXCTRL_MONO_STEREO      (I2S_TXCTRL_MONO_STEREO_Val    << I2S_TXCTRL_MONO_Pos)

#define I2S_TXCTRL_MONO_MONO        (I2S_TXCTRL_MONO_MONO_Val      << I2S_TXCTRL_MONO_Pos)

#define I2S_TXCTRL_DMA_Pos          25

#define I2S_TXCTRL_DMA              (_U_(0x1) << I2S_TXCTRL_DMA_Pos)

#define   I2S_TXCTRL_DMA_SINGLE_Val       _U_(0x0)

#define   I2S_TXCTRL_DMA_MULTIPLE_Val     _U_(0x1)

#define I2S_TXCTRL_DMA_SINGLE       (I2S_TXCTRL_DMA_SINGLE_Val     << I2S_TXCTRL_DMA_Pos)

#define I2S_TXCTRL_DMA_MULTIPLE     (I2S_TXCTRL_DMA_MULTIPLE_Val   << I2S_TXCTRL_DMA_Pos)

#define I2S_TXCTRL_MASK             _U_(0x03FFF79C)

/* -------- I2S_RXCTRL : (I2S Offset: 0x24) (R/W 32) Rx Serializer Control -------- */

#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))

typedef union {

  struct {

    uint32_t SERMODE:2;

    uint32_t :3;

    uint32_t CLKSEL:1;

    uint32_t :1;

    uint32_t SLOTADJ:1;

    uint32_t DATASIZE:3;

    uint32_t :1;

    uint32_t WORDADJ:1;

    uint32_t EXTEND:2;

    uint32_t BITREV:1;

    uint32_t SLOTDIS0:1;

    uint32_t SLOTDIS1:1;

    uint32_t SLOTDIS2:1;

    uint32_t SLOTDIS3:1;

    uint32_t SLOTDIS4:1;

    uint32_t SLOTDIS5:1;

    uint32_t SLOTDIS6:1;

    uint32_t SLOTDIS7:1;

    uint32_t MONO:1;

    uint32_t DMA:1;

    uint32_t RXLOOP:1;

    uint32_t :5;

  } bit;

  struct {

    uint32_t :16;

    uint32_t SLOTDIS:8;

    uint32_t :8;

  } vec;

  uint32_t reg;

} I2S_RXCTRL_Type;

#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */


#define I2S_RXCTRL_OFFSET           0x24

#define I2S_RXCTRL_RESETVALUE       _U_(0x00000000)

#define I2S_RXCTRL_SERMODE_Pos      0

#define I2S_RXCTRL_SERMODE_Msk      (_U_(0x3) << I2S_RXCTRL_SERMODE_Pos)

#define I2S_RXCTRL_SERMODE(value)   (I2S_RXCTRL_SERMODE_Msk & ((value) << I2S_RXCTRL_SERMODE_Pos))

#define   I2S_RXCTRL_SERMODE_RX_Val       _U_(0x0)

#define   I2S_RXCTRL_SERMODE_PDM2_Val     _U_(0x2)

#define I2S_RXCTRL_SERMODE_RX       (I2S_RXCTRL_SERMODE_RX_Val     << I2S_RXCTRL_SERMODE_Pos)

#define I2S_RXCTRL_SERMODE_PDM2     (I2S_RXCTRL_SERMODE_PDM2_Val   << I2S_RXCTRL_SERMODE_Pos)

#define I2S_RXCTRL_CLKSEL_Pos       5

#define I2S_RXCTRL_CLKSEL           (_U_(0x1) << I2S_RXCTRL_CLKSEL_Pos)

#define   I2S_RXCTRL_CLKSEL_CLK0_Val      _U_(0x0)

#define   I2S_RXCTRL_CLKSEL_CLK1_Val      _U_(0x1)

#define I2S_RXCTRL_CLKSEL_CLK0      (I2S_RXCTRL_CLKSEL_CLK0_Val    << I2S_RXCTRL_CLKSEL_Pos)

#define I2S_RXCTRL_CLKSEL_CLK1      (I2S_RXCTRL_CLKSEL_CLK1_Val    << I2S_RXCTRL_CLKSEL_Pos)

#define I2S_RXCTRL_SLOTADJ_Pos      7

#define I2S_RXCTRL_SLOTADJ          (_U_(0x1) << I2S_RXCTRL_SLOTADJ_Pos)

#define   I2S_RXCTRL_SLOTADJ_RIGHT_Val    _U_(0x0)

#define   I2S_RXCTRL_SLOTADJ_LEFT_Val     _U_(0x1)

#define I2S_RXCTRL_SLOTADJ_RIGHT    (I2S_RXCTRL_SLOTADJ_RIGHT_Val  << I2S_RXCTRL_SLOTADJ_Pos)

#define I2S_RXCTRL_SLOTADJ_LEFT     (I2S_RXCTRL_SLOTADJ_LEFT_Val   << I2S_RXCTRL_SLOTADJ_Pos)

#define I2S_RXCTRL_DATASIZE_Pos     8

#define I2S_RXCTRL_DATASIZE_Msk     (_U_(0x7) << I2S_RXCTRL_DATASIZE_Pos)

#define I2S_RXCTRL_DATASIZE(value)  (I2S_RXCTRL_DATASIZE_Msk & ((value) << I2S_RXCTRL_DATASIZE_Pos))

#define   I2S_RXCTRL_DATASIZE_32_Val      _U_(0x0)

#define   I2S_RXCTRL_DATASIZE_24_Val      _U_(0x1)

#define   I2S_RXCTRL_DATASIZE_20_Val      _U_(0x2)

#define   I2S_RXCTRL_DATASIZE_18_Val      _U_(0x3)

#define   I2S_RXCTRL_DATASIZE_16_Val      _U_(0x4)

#define   I2S_RXCTRL_DATASIZE_16C_Val     _U_(0x5)

#define   I2S_RXCTRL_DATASIZE_8_Val       _U_(0x6)

#define   I2S_RXCTRL_DATASIZE_8C_Val      _U_(0x7)

#define I2S_RXCTRL_DATASIZE_32      (I2S_RXCTRL_DATASIZE_32_Val    << I2S_RXCTRL_DATASIZE_Pos)

#define I2S_RXCTRL_DATASIZE_24      (I2S_RXCTRL_DATASIZE_24_Val    << I2S_RXCTRL_DATASIZE_Pos)

#define I2S_RXCTRL_DATASIZE_20      (I2S_RXCTRL_DATASIZE_20_Val    << I2S_RXCTRL_DATASIZE_Pos)

#define I2S_RXCTRL_DATASIZE_18      (I2S_RXCTRL_DATASIZE_18_Val    << I2S_RXCTRL_DATASIZE_Pos)

#define I2S_RXCTRL_DATASIZE_16      (I2S_RXCTRL_DATASIZE_16_Val    << I2S_RXCTRL_DATASIZE_Pos)

#define I2S_RXCTRL_DATASIZE_16C     (I2S_RXCTRL_DATASIZE_16C_Val   << I2S_RXCTRL_DATASIZE_Pos)

#define I2S_RXCTRL_DATASIZE_8       (I2S_RXCTRL_DATASIZE_8_Val     << I2S_RXCTRL_DATASIZE_Pos)

#define I2S_RXCTRL_DATASIZE_8C      (I2S_RXCTRL_DATASIZE_8C_Val    << I2S_RXCTRL_DATASIZE_Pos)

#define I2S_RXCTRL_WORDADJ_Pos      12

#define I2S_RXCTRL_WORDADJ          (_U_(0x1) << I2S_RXCTRL_WORDADJ_Pos)

#define   I2S_RXCTRL_WORDADJ_RIGHT_Val    _U_(0x0)

#define   I2S_RXCTRL_WORDADJ_LEFT_Val     _U_(0x1)

#define I2S_RXCTRL_WORDADJ_RIGHT    (I2S_RXCTRL_WORDADJ_RIGHT_Val  << I2S_RXCTRL_WORDADJ_Pos)

#define I2S_RXCTRL_WORDADJ_LEFT     (I2S_RXCTRL_WORDADJ_LEFT_Val   << I2S_RXCTRL_WORDADJ_Pos)

#define I2S_RXCTRL_EXTEND_Pos       13

#define I2S_RXCTRL_EXTEND_Msk       (_U_(0x3) << I2S_RXCTRL_EXTEND_Pos)

#define I2S_RXCTRL_EXTEND(value)    (I2S_RXCTRL_EXTEND_Msk & ((value) << I2S_RXCTRL_EXTEND_Pos))

#define   I2S_RXCTRL_EXTEND_ZERO_Val      _U_(0x0)

#define   I2S_RXCTRL_EXTEND_ONE_Val       _U_(0x1)

#define   I2S_RXCTRL_EXTEND_MSBIT_Val     _U_(0x2)

#define   I2S_RXCTRL_EXTEND_LSBIT_Val     _U_(0x3)

#define I2S_RXCTRL_EXTEND_ZERO      (I2S_RXCTRL_EXTEND_ZERO_Val    << I2S_RXCTRL_EXTEND_Pos)

#define I2S_RXCTRL_EXTEND_ONE       (I2S_RXCTRL_EXTEND_ONE_Val     << I2S_RXCTRL_EXTEND_Pos)

#define I2S_RXCTRL_EXTEND_MSBIT     (I2S_RXCTRL_EXTEND_MSBIT_Val   << I2S_RXCTRL_EXTEND_Pos)

#define I2S_RXCTRL_EXTEND_LSBIT     (I2S_RXCTRL_EXTEND_LSBIT_Val   << I2S_RXCTRL_EXTEND_Pos)

#define I2S_RXCTRL_BITREV_Pos       15

#define I2S_RXCTRL_BITREV           (_U_(0x1) << I2S_RXCTRL_BITREV_Pos)

#define   I2S_RXCTRL_BITREV_MSBIT_Val     _U_(0x0)

#define   I2S_RXCTRL_BITREV_LSBIT_Val     _U_(0x1)

#define I2S_RXCTRL_BITREV_MSBIT     (I2S_RXCTRL_BITREV_MSBIT_Val   << I2S_RXCTRL_BITREV_Pos)

#define I2S_RXCTRL_BITREV_LSBIT     (I2S_RXCTRL_BITREV_LSBIT_Val   << I2S_RXCTRL_BITREV_Pos)

#define I2S_RXCTRL_SLOTDIS0_Pos     16

#define I2S_RXCTRL_SLOTDIS0         (_U_(1) << I2S_RXCTRL_SLOTDIS0_Pos)

#define I2S_RXCTRL_SLOTDIS1_Pos     17

#define I2S_RXCTRL_SLOTDIS1         (_U_(1) << I2S_RXCTRL_SLOTDIS1_Pos)

#define I2S_RXCTRL_SLOTDIS2_Pos     18

#define I2S_RXCTRL_SLOTDIS2         (_U_(1) << I2S_RXCTRL_SLOTDIS2_Pos)

#define I2S_RXCTRL_SLOTDIS3_Pos     19

#define I2S_RXCTRL_SLOTDIS3         (_U_(1) << I2S_RXCTRL_SLOTDIS3_Pos)

#define I2S_RXCTRL_SLOTDIS4_Pos     20

#define I2S_RXCTRL_SLOTDIS4         (_U_(1) << I2S_RXCTRL_SLOTDIS4_Pos)

#define I2S_RXCTRL_SLOTDIS5_Pos     21

#define I2S_RXCTRL_SLOTDIS5         (_U_(1) << I2S_RXCTRL_SLOTDIS5_Pos)

#define I2S_RXCTRL_SLOTDIS6_Pos     22

#define I2S_RXCTRL_SLOTDIS6         (_U_(1) << I2S_RXCTRL_SLOTDIS6_Pos)

#define I2S_RXCTRL_SLOTDIS7_Pos     23

#define I2S_RXCTRL_SLOTDIS7         (_U_(1) << I2S_RXCTRL_SLOTDIS7_Pos)

#define I2S_RXCTRL_SLOTDIS_Pos      16

#define I2S_RXCTRL_SLOTDIS_Msk      (_U_(0xFF) << I2S_RXCTRL_SLOTDIS_Pos)

#define I2S_RXCTRL_SLOTDIS(value)   (I2S_RXCTRL_SLOTDIS_Msk & ((value) << I2S_RXCTRL_SLOTDIS_Pos))

#define I2S_RXCTRL_MONO_Pos         24

#define I2S_RXCTRL_MONO             (_U_(0x1) << I2S_RXCTRL_MONO_Pos)

#define   I2S_RXCTRL_MONO_STEREO_Val      _U_(0x0)

#define   I2S_RXCTRL_MONO_MONO_Val        _U_(0x1)

#define I2S_RXCTRL_MONO_STEREO      (I2S_RXCTRL_MONO_STEREO_Val    << I2S_RXCTRL_MONO_Pos)

#define I2S_RXCTRL_MONO_MONO        (I2S_RXCTRL_MONO_MONO_Val      << I2S_RXCTRL_MONO_Pos)

#define I2S_RXCTRL_DMA_Pos          25

#define I2S_RXCTRL_DMA              (_U_(0x1) << I2S_RXCTRL_DMA_Pos)

#define   I2S_RXCTRL_DMA_SINGLE_Val       _U_(0x0)

#define   I2S_RXCTRL_DMA_MULTIPLE_Val     _U_(0x1)

#define I2S_RXCTRL_DMA_SINGLE       (I2S_RXCTRL_DMA_SINGLE_Val     << I2S_RXCTRL_DMA_Pos)

#define I2S_RXCTRL_DMA_MULTIPLE     (I2S_RXCTRL_DMA_MULTIPLE_Val   << I2S_RXCTRL_DMA_Pos)

#define I2S_RXCTRL_RXLOOP_Pos       26

#define I2S_RXCTRL_RXLOOP           (_U_(0x1) << I2S_RXCTRL_RXLOOP_Pos)

#define I2S_RXCTRL_MASK             _U_(0x07FFF7A3)

/* -------- I2S_TXDATA : (I2S Offset: 0x30) ( /W 32) Tx Data -------- */

#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))

typedef union {

  struct {

    uint32_t DATA:32;

  } bit;

  uint32_t reg;

} I2S_TXDATA_Type;

#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */


#define I2S_TXDATA_OFFSET           0x30

#define I2S_TXDATA_RESETVALUE       _U_(0x00000000)

#define I2S_TXDATA_DATA_Pos         0

#define I2S_TXDATA_DATA_Msk         (_U_(0xFFFFFFFF) << I2S_TXDATA_DATA_Pos)

#define I2S_TXDATA_DATA(value)      (I2S_TXDATA_DATA_Msk & ((value) << I2S_TXDATA_DATA_Pos))

#define I2S_TXDATA_MASK             _U_(0xFFFFFFFF)

/* -------- I2S_RXDATA : (I2S Offset: 0x34) (R/  32) Rx Data -------- */

#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))

typedef union {

  struct {

    uint32_t DATA:32;

  } bit;

  uint32_t reg;

} I2S_RXDATA_Type;

#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */


#define I2S_RXDATA_OFFSET           0x34

#define I2S_RXDATA_RESETVALUE       _U_(0x00000000)

#define I2S_RXDATA_DATA_Pos         0

#define I2S_RXDATA_DATA_Msk         (_U_(0xFFFFFFFF) << I2S_RXDATA_DATA_Pos)

#define I2S_RXDATA_DATA(value)      (I2S_RXDATA_DATA_Msk & ((value) << I2S_RXDATA_DATA_Pos))

#define I2S_RXDATA_MASK             _U_(0xFFFFFFFF)

#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))

typedef struct {

  __IO I2S_CTRLA_Type            CTRLA;

       RoReg8                    Reserved1[0x3];

  __IO I2S_CLKCTRL_Type          CLKCTRL[2];

  __IO I2S_INTENCLR_Type         INTENCLR;

       RoReg8                    Reserved2[0x2];

  __IO I2S_INTENSET_Type         INTENSET;

       RoReg8                    Reserved3[0x2];

  __IO I2S_INTFLAG_Type          INTFLAG;

       RoReg8                    Reserved4[0x2];

  __I  I2S_SYNCBUSY_Type         SYNCBUSY;

       RoReg8                    Reserved5[0x6];

  __IO I2S_TXCTRL_Type           TXCTRL;

  __IO I2S_RXCTRL_Type           RXCTRL;

       RoReg8                    Reserved6[0x8];

  __O  I2S_TXDATA_Type           TXDATA;

  __I  I2S_RXDATA_Type           RXDATA;

} I2s;

#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */


#endif /* _SAME54_I2S_COMPONENT_ */