Data Fields
struct {
uint16_t RXRDY0:1

uint16_t RXRDY1:1

uint16_t __pad0__:2

uint16_t RXOR0:1

uint16_t RXOR1:1

uint16_t __pad1__:2

uint16_t TXRDY0:1

uint16_t TXRDY1:1

uint16_t __pad2__:2

uint16_t TXUR0:1

uint16_t TXUR1:1

uint16_t __pad3__:2

}	bit

struct {
uint16_t RXRDY:2

uint16_t __pad0__:2

uint16_t RXOR:2

uint16_t __pad1__:2

uint16_t TXRDY:2

uint16_t __pad2__:2

uint16_t TXUR:2

uint16_t __pad3__:2

}	vec

uint16_t	reg

Detailed Description

Definition at line 244 of file i2s.h.

Field Documentation

◆ pad0

uint16_t I2S_INTENSET_Type::__pad0__

bit: 2.. 3 Reserved

Definition at line 248 of file i2s.h.

◆ pad1

uint16_t I2S_INTENSET_Type::__pad1__

bit: 6.. 7 Reserved

Definition at line 251 of file i2s.h.

◆ pad2

uint16_t I2S_INTENSET_Type::__pad2__

bit: 10..11 Reserved

Definition at line 254 of file i2s.h.

◆ pad3

uint16_t I2S_INTENSET_Type::__pad3__

bit: 14..15 Reserved

Definition at line 257 of file i2s.h.

◆ bit

struct { ... } I2S_INTENSET_Type::bit

Structure used for bit access

◆ reg

uint16_t I2S_INTENSET_Type::reg

Type used for register access

Definition at line 269 of file i2s.h.

◆ RXOR

uint16_t I2S_INTENSET_Type::RXOR

bit: 4.. 5 Receive Overrun x Interrupt Enable

Definition at line 262 of file i2s.h.

◆ RXOR0

uint16_t I2S_INTENSET_Type::RXOR0

bit: 4 Receive Overrun 0 Interrupt Enable

Definition at line 249 of file i2s.h.

◆ RXOR1

uint16_t I2S_INTENSET_Type::RXOR1

bit: 5 Receive Overrun 1 Interrupt Enable

Definition at line 250 of file i2s.h.

◆ RXRDY

uint16_t I2S_INTENSET_Type::RXRDY

bit: 0.. 1 Receive Ready x Interrupt Enable

Definition at line 260 of file i2s.h.

◆ RXRDY0

uint16_t I2S_INTENSET_Type::RXRDY0

bit: 0 Receive Ready 0 Interrupt Enable

Definition at line 246 of file i2s.h.

◆ RXRDY1

uint16_t I2S_INTENSET_Type::RXRDY1

bit: 1 Receive Ready 1 Interrupt Enable

Definition at line 247 of file i2s.h.

◆ TXRDY

uint16_t I2S_INTENSET_Type::TXRDY

bit: 8.. 9 Transmit Ready x Interrupt Enable

Definition at line 264 of file i2s.h.

◆ TXRDY0

uint16_t I2S_INTENSET_Type::TXRDY0

bit: 8 Transmit Ready 0 Interrupt Enable

Definition at line 252 of file i2s.h.

◆ TXRDY1

uint16_t I2S_INTENSET_Type::TXRDY1

bit: 9 Transmit Ready 1 Interrupt Enable

Definition at line 253 of file i2s.h.

◆ TXUR

uint16_t I2S_INTENSET_Type::TXUR

bit: 12..13 Transmit Underrun x Interrupt Enable

Definition at line 266 of file i2s.h.

◆ TXUR0

uint16_t I2S_INTENSET_Type::TXUR0

bit: 12 Transmit Underrun 0 Interrupt Enable

Definition at line 255 of file i2s.h.

◆ TXUR1

uint16_t I2S_INTENSET_Type::TXUR1

bit: 13 Transmit Underrun 1 Interrupt Enable

Definition at line 256 of file i2s.h.

◆ vec

struct { ... } I2S_INTENSET_Type::vec

Structure used for vec access

The documentation for this union was generated from the following file:

/storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/i2s.h

Data Fields