finished making e54 symbol... snapeda one was garbage
parent
e4fd722550
commit
df5085aeb6
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EESchema-LIBRARY Version 2.4
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#encoding utf-8
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#
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# p_ATSAME54P20A-AU_p_ATSAME54P20A-AU
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#
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DEF p_ATSAME54P20A-AU_p_ATSAME54P20A-AU U 0 40 Y Y 5 L N
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F0 "U" 0 -2600 50 H V C CNN
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F1 "p_ATSAME54P20A-AU_p_ATSAME54P20A-AU" 0 1050 50 H V C CNN
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F2 "" -1200 1250 50 H I C CNN
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F3 "" -1200 1250 50 H I C CNN
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DRAW
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T 0 0 950 50 0 1 0 "Port A" Normal 0 C C
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T 0 0 800 50 0 2 0 "Port B" Normal 0 C C
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T 0 0 750 50 0 3 0 "Port C" Normal 0 C C
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T 0 0 850 50 0 4 0 "Port D" Normal 0 C C
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T 0 50 650 50 0 5 0 "Power Bus" Normal 0 C C
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S -450 1000 400 -2150 1 1 0 f
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S -500 900 500 -2550 2 1 0 f
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S -450 850 450 -2250 3 1 0 f
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S -400 900 400 -150 4 1 0 f
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S -800 750 800 -1450 5 1 0 f
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X XIN32/PA00 1 600 750 200 L 50 50 1 1 B
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X PA03 10 600 450 200 L 50 50 1 1 B
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X PA27 113 600 -1850 200 L 50 50 1 1 B
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X SWCLK/PA30 119 600 -1950 200 L 50 50 1 1 B
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X SWDIO/PA31 120 600 -2050 200 L 50 50 1 1 B
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X XOUT32/PA01 2 600 650 200 L 50 50 1 1 B
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X PA04 21 600 350 200 L 50 50 1 1 B
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X PA05 22 600 250 200 L 50 50 1 1 B
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X PA06 23 600 150 200 L 50 50 1 1 B
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X PA07 24 600 50 200 L 50 50 1 1 B
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X PA08 33 600 -50 200 L 50 50 1 1 B
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X PA09 34 600 -150 200 L 50 50 1 1 B
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X PA10 35 600 -250 200 L 50 50 1 1 B
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X PA11 36 600 -350 200 L 50 50 1 1 B
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X PA12 60 600 -450 200 L 50 50 1 1 B
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X PA13 61 600 -550 200 L 50 50 1 1 B
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X XIN0/PA14 62 600 -650 200 L 50 50 1 1 B
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X XOUT0/PA15 63 600 -750 200 L 50 50 1 1 B
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X PA16 66 600 -850 200 L 50 50 1 1 B
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X PA17 67 600 -950 200 L 50 50 1 1 B
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X PA18 68 600 -1050 200 L 50 50 1 1 B
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X PA19 69 600 -1150 200 L 50 50 1 1 B
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X PA20 88 600 -1250 200 L 50 50 1 1 B
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X PA21 89 600 -1350 200 L 50 50 1 1 B
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X PA02 9 600 550 200 L 50 50 1 1 B
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X PA22 92 600 -1450 200 L 50 50 1 1 B
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X PA23 93 600 -1550 200 L 50 50 1 1 B
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X PA24 94 600 -1650 200 L 50 50 1 1 B
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X PA25 95 600 -1750 200 L 50 50 1 1 B
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X PB24 100 700 -1750 197 L 50 50 2 1 B
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X PB25 101 700 -1850 197 L 50 50 2 1 B
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X PB26 102 700 -1950 197 L 50 50 2 1 B
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X PB27 103 700 -2050 197 L 50 50 2 1 B
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X PB28 104 700 -2150 197 L 50 50 2 1 B
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X PB29 105 700 -2250 197 L 50 50 2 1 B
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X PB04 11 700 250 197 L 50 50 2 1 B
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X PB05 12 700 150 197 L 50 50 2 1 B
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X SWO/PB30 121 700 -2350 197 L 50 50 2 1 B
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X PB31 122 700 -2450 197 L 50 50 2 1 B
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X PB00 125 700 650 197 L 50 50 2 1 B
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X PB01 126 700 550 197 L 50 50 2 1 B
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X PB02 127 700 450 197 L 50 50 2 1 B
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X PB03 128 700 350 197 L 50 50 2 1 B
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X PB06 17 700 50 197 L 50 50 2 1 B
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X PB07 18 700 -50 197 L 50 50 2 1 B
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X PB08 19 700 -150 197 L 50 50 2 1 B
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X PB09 20 700 -250 197 L 50 50 2 1 B
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X PB10 39 700 -350 197 L 50 50 2 1 B
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X PB11 40 700 -450 197 L 50 50 2 1 B
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X PB12 41 700 -550 197 L 50 50 2 1 B
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X PB13 42 700 -650 197 L 50 50 2 1 B
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X PB14 43 700 -750 197 L 50 50 2 1 B
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X PB15 44 700 -850 197 L 50 50 2 1 B
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X PB16 82 700 -950 197 L 50 50 2 1 B
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X PB17 83 700 -1050 197 L 50 50 2 1 B
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X PB18 84 700 -1150 197 L 50 50 2 1 B
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X PB19 85 700 -1250 197 L 50 50 2 1 B
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X PB20 86 700 -1350 197 L 50 50 2 1 B
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X PB21 87 700 -1450 197 L 50 50 2 1 B
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X XIN1/PB22 98 700 -1550 197 L 50 50 2 1 B
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X XOUT1/PB23 99 700 -1650 197 L 50 50 2 1 B
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X PC24 108 650 -1550 197 L 50 50 3 1 B
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X PC25 109 650 -1650 197 L 50 50 3 1 B
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X PC26 110 650 -1750 197 L 50 50 3 1 B
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X PC27 111 650 -1850 197 L 50 50 3 1 B
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X PC28 112 650 -1950 197 L 50 50 3 1 B
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X PC30 123 650 -2050 197 L 50 50 3 1 B
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X PC31 124 650 -2150 197 L 50 50 3 1 B
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X PC04 27 650 250 197 L 50 50 3 1 B
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X PC05 28 650 150 197 L 50 50 3 1 B
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X PC06 29 650 50 197 L 50 50 3 1 B
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X PC00 3 650 650 197 L 50 50 3 1 B
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X PC07 30 650 -50 197 L 50 50 3 1 B
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X PC01 4 650 550 197 L 50 50 3 1 B
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X PC10 52 650 -150 197 L 50 50 3 1 B
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X PC11 55 650 -250 197 L 50 50 3 1 B
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X PC12 56 650 -350 197 L 50 50 3 1 B
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X PC13 57 650 -450 197 L 50 50 3 1 B
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X PC14 58 650 -550 197 L 50 50 3 1 B
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X PC15 59 650 -650 197 L 50 50 3 1 B
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X PC02 7 650 450 197 L 50 50 3 1 B
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X PC16 70 650 -750 197 L 50 50 3 1 B
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X PC17 71 650 -850 197 L 50 50 3 1 B
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X PC18 72 650 -950 197 L 50 50 3 1 B
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X PC19 73 650 -1050 197 L 50 50 3 1 B
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X PC20 74 650 -1150 197 L 50 50 3 1 B
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X PC21 75 650 -1250 197 L 50 50 3 1 B
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X PC22 76 650 -1350 197 L 50 50 3 1 B
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X PC23 77 650 -1450 197 L 50 50 3 1 B
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X PC03 8 650 350 197 L 50 50 3 1 B
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X PD00 13 600 750 197 L 50 50 4 1 B
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X PD01 16 600 650 197 L 50 50 4 1 B
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X PD08 47 600 550 197 L 50 50 4 1 B
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X PD09 48 600 450 197 L 50 50 4 1 B
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X PD10 49 600 350 197 L 50 50 4 1 B
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X PD11 50 600 250 197 L 50 50 4 1 B
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X PD12 51 600 150 197 L 50 50 4 1 B
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X PD20 80 600 50 197 L 50 50 4 1 B
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X PD21 81 600 -50 197 L 50 50 4 1 B
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X VDDIO7 107 -1000 -900 197 R 50 50 5 1 W
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X ~RESET 114 -1000 650 197 R 50 50 5 1 B
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X VDDCORE 115 -1000 -1150 197 R 50 50 5 1 W
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X GNDIO 116 1000 -850 197 L 50 50 5 1 W
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X VSW 117 -1000 -1300 197 R 50 50 5 1 W
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X VDDIO8 118 -1000 -1000 197 R 50 50 5 1 W
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X GNDANA1 14 1000 -500 197 L 50 50 5 1 W
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X VDDANA2 15 -1000 300 197 R 50 50 5 1 B
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X GNDANA2 25 1000 -600 197 L 50 50 5 1 W
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X VDDANA3 26 -1000 200 197 R 50 50 5 1 B
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X VDDIOB1 32 -1000 0 197 R 50 50 5 1 B
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X VDDIOB2 37 -1000 -100 197 R 50 50 5 1 B
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X VDDIO1 46 -1000 -300 197 R 50 50 5 1 W
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X GND1 5 1000 650 197 L 50 50 5 1 W
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X GND10 5 1000 -250 197 L 50 50 5 1 W
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X GND2 5 1000 550 197 L 50 50 5 1 W
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X GND3 5 1000 450 197 L 50 50 5 1 W
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X GND4 5 1000 350 197 L 50 50 5 1 W
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X GND5 5 1000 250 197 L 50 50 5 1 W
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X GND6 5 1000 150 197 L 50 50 5 1 W
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X GND7 5 1000 50 197 L 50 50 5 1 W
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X GND8 5 1000 -50 197 L 50 50 5 1 W
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X GND9 5 1000 -150 197 L 50 50 5 1 W
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X VDDIO2 54 -1000 -400 197 R 50 50 5 1 W
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X VDDANA1 6 -1000 400 197 R 50 50 5 1 B
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X VDDIO3 65 -1000 -500 197 R 50 50 5 1 W
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X VDDIO4 79 -1000 -600 197 R 50 50 5 1 W
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X VDDIO5 91 -1000 -700 197 R 50 50 5 1 W
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X VDDIO6 97 -1000 -800 197 R 50 50 5 1 W
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ENDDRAW
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ENDDEF
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#
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#End Library
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@ -0,0 +1,110 @@
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(kicad_pcb (version 20171130) (host pcbnew "(5.1.5)-3")
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(general
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(thickness 1.6)
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(drawings 5)
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(tracks 0)
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(zones 0)
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(modules 0)
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(nets 1)
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)
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(page A4)
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(layers
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(0 F.Cu signal)
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(31 B.Cu signal)
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(32 B.Adhes user)
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(33 F.Adhes user)
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(34 B.Paste user)
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(35 F.Paste user)
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(36 B.SilkS user)
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(37 F.SilkS user)
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(38 B.Mask user)
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(39 F.Mask user)
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(40 Dwgs.User user)
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(41 Cmts.User user)
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(42 Eco1.User user)
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(43 Eco2.User user)
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(44 Edge.Cuts user)
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(45 Margin user)
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(46 B.CrtYd user)
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(47 F.CrtYd user)
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(48 B.Fab user)
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(49 F.Fab user)
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)
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(setup
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(last_trace_width 0.25)
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(trace_clearance 0.2)
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(zone_clearance 0.508)
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(zone_45_only no)
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(trace_min 0.2)
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(via_size 0.8)
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(via_drill 0.4)
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(via_min_size 0.4)
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(via_min_drill 0.3)
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(uvia_size 0.3)
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(uvia_drill 0.1)
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(uvias_allowed no)
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(uvia_min_size 0.2)
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(uvia_min_drill 0.1)
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(edge_width 0.05)
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(segment_width 0.2)
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(pcb_text_width 0.3)
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(pcb_text_size 1.5 1.5)
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(mod_edge_width 0.12)
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(mod_text_size 1 1)
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(mod_text_width 0.15)
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(pad_size 1.524 1.524)
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(pad_drill 0.762)
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(pad_to_mask_clearance 0.051)
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(solder_mask_min_width 0.25)
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(aux_axis_origin 0 0)
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(visible_elements FFFFFF7F)
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(pcbplotparams
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(layerselection 0x010fc_ffffffff)
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(usegerberextensions false)
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(usegerberattributes false)
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(usegerberadvancedattributes false)
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(creategerberjobfile false)
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(excludeedgelayer true)
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(linewidth 0.100000)
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(plotframeref false)
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(viasonmask false)
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(mode 1)
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(useauxorigin false)
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(hpglpennumber 1)
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(hpglpenspeed 20)
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(hpglpendiameter 15.000000)
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(psnegative false)
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(psa4output false)
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(plotreference true)
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(plotvalue true)
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(plotinvisibletext false)
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(padsonsilk false)
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(subtractmaskfromsilk false)
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(outputformat 1)
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(mirror false)
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(drillshape 1)
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(scaleselection 1)
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(outputdirectory ""))
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)
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(net 0 "")
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(net_class Default "This is the default net class."
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(clearance 0.2)
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(trace_width 0.25)
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(via_dia 0.8)
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(via_drill 0.4)
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(uvia_dia 0.3)
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(uvia_drill 0.1)
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)
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(gr_line (start 50.8 50.8) (end 53.34 50.8) (layer Edge.Cuts) (width 0.05) (tstamp 5E6E9EBC))
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(gr_line (start 50.8 134.62) (end 50.8 50.8) (layer Edge.Cuts) (width 0.05))
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(gr_line (start 228.6 134.62) (end 50.8 134.62) (layer Edge.Cuts) (width 0.05))
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(gr_line (start 228.6 50.8) (end 228.6 134.62) (layer Edge.Cuts) (width 0.05))
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(gr_line (start 53.34 50.8) (end 228.6 50.8) (layer Edge.Cuts) (width 0.05))
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)
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@ -0,0 +1 @@
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(kicad_pcb (version 4) (host kicad "dummy file") )
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@ -0,0 +1,33 @@
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update=22/05/2015 07:44:53
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version=1
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last_client=kicad
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[general]
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version=1
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RootSch=
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BoardNm=
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[pcbnew]
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version=1
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LastNetListRead=
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UseCmpFile=1
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PadDrill=0.600000000000
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PadDrillOvalY=0.600000000000
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PadSizeH=1.500000000000
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PadSizeV=1.500000000000
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PcbTextSizeV=1.500000000000
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PcbTextSizeH=1.500000000000
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PcbTextThickness=0.300000000000
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ModuleTextSizeV=1.000000000000
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ModuleTextSizeH=1.000000000000
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ModuleTextSizeThickness=0.150000000000
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SolderMaskClearance=0.000000000000
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SolderMaskMinWidth=0.000000000000
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DrawSegmentWidth=0.200000000000
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BoardOutlineThickness=0.100000000000
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ModuleOutlineThickness=0.150000000000
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[cvpcb]
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version=1
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NetIExt=net
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[eeschema]
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version=1
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LibDir=
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[eeschema/libraries]
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@ -0,0 +1,38 @@
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EESchema Schematic File Version 4
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EELAYER 30 0
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EELAYER END
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$Descr A4 11693 8268
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encoding utf-8
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Sheet 1 1
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Title ""
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Date ""
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Rev ""
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Comp ""
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Comment1 ""
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Comment2 ""
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Comment3 ""
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Comment4 ""
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$EndDescr
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$Comp
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L p_ATSAME54P20A-AU:p_ATSAME54P20A-AU U?
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U 1 1 5E73E542
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P 1500 2100
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F 0 "U?" H 1583 3265 50 0000 C CNN
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F 1 "p_ATSAME54P20A-AU" H 1583 3174 50 0000 C CNN
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F 2 "" H 300 3350 50 0001 C CNN
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F 3 "" H 300 3350 50 0001 C CNN
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1 1500 2100
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1 0 0 -1
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$EndComp
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$Comp
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L p_ATSAME54P20A-AU:p_ATSAME54P20A-AU U?
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U 2 1 5E742312
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P 3350 1900
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F 0 "U?" H 3458 2965 50 0000 C CNN
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F 1 "p_ATSAME54P20A-AU" H 3458 2874 50 0000 C CNN
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F 2 "" H 2150 3150 50 0001 C CNN
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F 3 "" H 2150 3150 50 0001 C CNN
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2 3350 1900
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1 0 0 -1
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$EndComp
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$EndSCHEMATC
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@ -0,0 +1,4 @@
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EESchema Schematic File Version 2
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EELAYER 25 0
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EELAYER END
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$EndSCHEMATC
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Reference in New Issue