SAME54 consistently presenting a nice image!

stable
Penguin 5 years ago
parent 14b392d668
commit 7ea3c89300

@ -59,8 +59,11 @@ void ssd1963_init(void)
ssd1963_reset();
LV_DRV_DISP_PAR_CS(0);
ssd1963_cmd(0xE2); //PLL multiplier, set PLL clock to 120M
ssd1963_data(0x23); //N=0x36 for 6.5M, 0x23 for 10M crystal
ssd1963_data(0x02);
//ssd1963_data(0x23); //N=0x36 for 6.5M, 0x23 for 10M crystal
//ssd1963_data(0x02);
//ssd1963_data(0x54);
ssd1963_data(0x2F); //N=0x36 for 6.5M, 0x23 for 10M crystal
ssd1963_data(0x03);
ssd1963_data(0x54);
ssd1963_cmd(0xE0); // PLL enable
@ -73,12 +76,15 @@ void ssd1963_init(void)
delay_ms(1);
ssd1963_cmd(0xE6); //PLL setting for PCLK, depends on resolution
ssd1963_data(0x04);
ssd1963_data(0x3A);
ssd1963_data(0xB6);
//ssd1963_data(0x04);
//ssd1963_data(0x3A);
//ssd1963_data(0xB6);
//ssd1963_data(0x01);
//ssd1963_data(0x55);
//ssd1963_data(0x54);
ssd1963_data(0x01);
ssd1963_data(0xCC);
ssd1963_data(0xCC);
ssd1963_cmd(0xB0);
ssd1963_data(0x28); // set 18-bit for 7" panel TY700TFT800480
ssd1963_data(0x80); // set TTL mode

@ -63,9 +63,7 @@ void p_gpio_parallel_write(PortGroup* group, uint32_t mask, uint16_t data)
{
gpio_set_pin_level(SSD1963_TFT_CS, 0);
p_gpio_set_port_data(group, mask, (uint32_t)data);
p_weird_delay();
gpio_set_pin_level(SSD1963_TFT_WR, 0);
p_weird_delay();
gpio_set_pin_level(SSD1963_TFT_WR, 1);
gpio_set_pin_level(SSD1963_TFT_CS, 1);