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149 lines
3.9 KiB
C
149 lines
3.9 KiB
C
/**
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* \file
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*
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* \brief Global interrupt management for 8-bit AVR
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*
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* Copyright (C) 2010-2016 Atmel Corporation. All rights reserved.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* 4. This software may only be redistributed and used in connection with an
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* Atmel microcontroller product.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* \asf_license_stop
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*
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*/
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/*
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* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
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*/
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#ifndef UTILS_INTERRUPT_INTERRUPT_H
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#define UTILS_INTERRUPT_INTERRUPT_H
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#include <compiler.h>
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#include <parts.h>
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/**
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* \weakgroup interrupt_group
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*
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* @{
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*/
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#ifdef ISR_CUSTOM_H
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# include ISR_CUSTOM_H
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#else
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/**
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* \def ISR
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* \brief Define service routine for specified interrupt vector
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*
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* Usage:
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* \code
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ISR(FOO_vect)
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{
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...
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}
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\endcode
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*
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* \param vect Interrupt vector name as found in the device header files.
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*/
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#if defined(__DOXYGEN__)
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# define ISR(vect)
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#elif defined(__GNUC__)
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# include <avr/interrupt.h>
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#elif defined(__ICCAVR__)
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# define __ISR(x) _Pragma(#x)
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# define ISR(vect) __ISR(vector=vect) __interrupt void handler_##vect(void)
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#endif
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#endif // ISR_CUSTOM_H
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#if XMEGA
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/**
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* \brief Initialize interrupt vectors
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* Enables all interrupt levels, with vectors located in the application section
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* and fixed priority scheduling.
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*/
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#define irq_initialize_vectors() \
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PMIC.CTRL = PMIC_LOLVLEN_bm | PMIC_MEDLVLEN_bm | PMIC_HILVLEN_bm;
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#elif MEGA_RF
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#define irq_initialize_vectors()
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#endif
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#ifdef __GNUC__
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# define cpu_irq_enable() sei()
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# define cpu_irq_disable() cli()
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#else
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# define cpu_irq_enable() __enable_interrupt()
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# define cpu_irq_disable() __disable_interrupt()
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#endif
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typedef uint8_t irqflags_t;
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static inline irqflags_t cpu_irq_save(void)
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{
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volatile irqflags_t flags = SREG;
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cpu_irq_disable();
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return flags;
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}
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static inline void cpu_irq_restore(irqflags_t flags)
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{
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barrier();
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SREG = flags;
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}
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static inline bool cpu_irq_is_enabled_flags(irqflags_t flags)
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{
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#if XMEGA
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# ifdef __GNUC__
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return flags & CPU_I_bm;
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# else
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return flags & I_bm;
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# endif
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#elif MEGA || TINY
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return flags & (1 << SREG_I);
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#endif
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}
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#define cpu_irq_is_enabled() cpu_irq_is_enabled_flags(SREG)
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//! @}
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/**
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* \weakgroup interrupt_deprecated_group
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* @{
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*/
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// Deprecated definitions.
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#define Enable_global_interrupt() cpu_irq_enable()
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#define Disable_global_interrupt() cpu_irq_disable()
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#define Is_global_interrupt_enabled() cpu_irq_is_enabled()
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//! @}
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#endif /* UTILS_INTERRUPT_INTERRUPT_H */
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