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106 lines
3.0 KiB
C
106 lines
3.0 KiB
C
#include "p_gpio.h"
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static void p_weird_delay(void)
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{
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for(int x = 0; x < 8; x++)
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{
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asm volatile("nop");
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}
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}
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void p_gpio_init(void)
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{
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// set data port config
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p_port_config data_config;
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memset(&data_config, 0, sizeof(data_config));
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data_config.direction = GPIO_DIRECTION_OUT;
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data_config.pull_mode = GPIO_PULL_OFF;
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data_config.function = GPIO_PIN_FUNCTION_OFF;
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p_gpio_set_port_group_config(SSD1963_TFT_DATA_PORT, SSD1963_TFT_DATA_MASK, &data_config);
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// set lcd control pin configs
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// Chip select
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gpio_set_pin_direction(SSD1963_TFT_CS, GPIO_DIRECTION_OUT);
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gpio_set_pin_pull_mode(SSD1963_TFT_CS, GPIO_PULL_OFF);
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gpio_set_pin_function(SSD1963_TFT_CS, GPIO_PIN_FUNCTION_OFF);
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// Reset pin
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gpio_set_pin_direction(SSD1963_TFT_nRST, GPIO_DIRECTION_OUT);
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gpio_set_pin_pull_mode(SSD1963_TFT_nRST, GPIO_PULL_OFF);
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gpio_set_pin_function(SSD1963_TFT_nRST, GPIO_PIN_FUNCTION_OFF);
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// Read pin
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gpio_set_pin_direction(SSD1963_TFT_RD, GPIO_DIRECTION_OUT);
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gpio_set_pin_pull_mode(SSD1963_TFT_RD, GPIO_PULL_OFF);
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gpio_set_pin_function(SSD1963_TFT_RD, GPIO_PIN_FUNCTION_OFF);
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// RSDC pin, aka Read/Send Data/Command pin
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gpio_set_pin_direction(SSD1963_TFT_RSDC, GPIO_DIRECTION_OUT);
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gpio_set_pin_pull_mode(SSD1963_TFT_RSDC, GPIO_PULL_OFF);
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gpio_set_pin_function(SSD1963_TFT_RSDC, GPIO_PIN_FUNCTION_OFF);
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// Write Pin
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gpio_set_pin_direction(SSD1963_TFT_WR, GPIO_DIRECTION_OUT);
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gpio_set_pin_pull_mode(SSD1963_TFT_WR, GPIO_PULL_OFF);
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gpio_set_pin_function(SSD1963_TFT_WR, GPIO_PIN_FUNCTION_OFF);
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// TE, tear enable, aka frame sync
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gpio_set_pin_direction(SSD1963_TFT_TE, GPIO_DIRECTION_IN);
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gpio_set_pin_pull_mode(SSD1963_TFT_TE, GPIO_PULL_DOWN);
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gpio_set_pin_function(SSD1963_TFT_TE, GPIO_PIN_FUNCTION_OFF);
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gpio_set_pin_level(SSD1963_TFT_CS, 1);
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gpio_set_pin_level(SSD1963_TFT_nRST, 1);
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gpio_set_pin_level(SSD1963_TFT_RD, 1);
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gpio_set_pin_level(SSD1963_TFT_WR, 1);
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}
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void p_gpio_parallel_write(PortGroup* group, uint32_t mask, uint16_t data)
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{
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gpio_set_pin_level(SSD1963_TFT_CS, 0);
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p_gpio_set_port_data(group, mask, (uint32_t)data);
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p_weird_delay();
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gpio_set_pin_level(SSD1963_TFT_WR, 0);
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p_weird_delay();
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gpio_set_pin_level(SSD1963_TFT_WR, 1);
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gpio_set_pin_level(SSD1963_TFT_CS, 1);
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}
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void p_gpio_parallel_write_arr(PortGroup* group, uint32_t mask, uint16_t* data, uint16_t len)
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{
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for(int ind = 0; ind < len; ind++)
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{
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p_gpio_parallel_write(group, mask, data[ind]);
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}
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}
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void p_gpio_set_port_data(PortGroup* const port, const uint32_t mask, const uint32_t data)
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{
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uint32_t dword = (uint32_t)(SSD1963_TFT_DATA_FIX(data));
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port->OUTSET.reg = (mask & dword);
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port->OUTCLR.reg = (mask & ~dword);
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}
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void p_gpio_set_port_group_config(enum gpio_port port, const uint32_t mask, p_port_config* config)
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{
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for(uint8_t i = 0; i < 32; i++)
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{
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if(mask & (1UL << i))
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{
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uint32_t _gpio_pin = GPIO(port, i);
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gpio_set_pin_direction(_gpio_pin, config->direction);
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gpio_set_pin_pull_mode(_gpio_pin, config->pull_mode);
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gpio_set_pin_function(_gpio_pin, config->function);
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gpio_set_pin_level(_gpio_pin, 0);
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}
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}
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}
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