mainline: linux: spi up: microchip-corespi 20108000.spi: Registered SPI controller 0

Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
default-cape-symlinks
Robert Nelson 1 year ago
parent 2bde9fae08
commit 584a849bc7

@ -32,6 +32,7 @@ fi
make ARCH=riscv CROSS_COMPILE=${CC} clean make ARCH=riscv CROSS_COMPILE=${CC} clean
if [ -f arch/riscv/configs/mpfs_defconfig ] ; then if [ -f arch/riscv/configs/mpfs_defconfig ] ; then
echo "make ARCH=riscv CROSS_COMPILE=${CC} mpfs_defconfig"
make ARCH=riscv CROSS_COMPILE=${CC} mpfs_defconfig make ARCH=riscv CROSS_COMPILE=${CC} mpfs_defconfig
# #
@ -121,16 +122,24 @@ if [ -f arch/riscv/configs/mpfs_defconfig ] ; then
#./scripts/config --disable CONFIG_VMAP_STACK #./scripts/config --disable CONFIG_VMAP_STACK
#./scripts/config --disable CONFIG_SMP #./scripts/config --disable CONFIG_SMP
echo "make -j${CORES} ARCH=riscv CROSS_COMPILE=${CC} olddefconfig"
make -j${CORES} ARCH=riscv CROSS_COMPILE=${CC} olddefconfig
else else
echo "make ARCH=riscv CROSS_COMPILE=${CC} defconfig"
make ARCH=riscv CROSS_COMPILE=${CC} defconfig make ARCH=riscv CROSS_COMPILE=${CC} defconfig
#./scripts/config --enable
./scripts/config --enable CONFIG_PCIE_MICROCHIP_HOST ./scripts/config --enable CONFIG_PCIE_MICROCHIP_HOST
./scripts/config --enable CONFIG_OF_OVERLAY ./scripts/config --enable CONFIG_OF_OVERLAY
./scripts/config --enable CONFIG_I2C ./scripts/config --enable CONFIG_I2C
./scripts/config --enable CONFIG_EEPROM_AT24 ./scripts/config --enable CONFIG_EEPROM_AT24
./scripts/config --enable CONFIG_I2C_MICROCHIP_CORE ./scripts/config --enable CONFIG_I2C_MICROCHIP_CORE
./scripts/config --enable CONFIG_SPI_MICROCHIP_CORE
./scripts/config --enable CONFIG_SPI_MICROCHIP_CORE_QSPI
./scripts/config --module CONFIG_SPI_SPIDEV
./scripts/config --enable CONFIG_GPIO_SYSFS
echo "make -j${CORES} ARCH=riscv CROSS_COMPILE=${CC} olddefconfig"
make -j${CORES} ARCH=riscv CROSS_COMPILE=${CC} olddefconfig make -j${CORES} ARCH=riscv CROSS_COMPILE=${CC} olddefconfig
fi fi

@ -32,6 +32,7 @@ fi
make ARCH=riscv CROSS_COMPILE=${CC} clean make ARCH=riscv CROSS_COMPILE=${CC} clean
if [ -f arch/riscv/configs/mpfs_defconfig ] ; then if [ -f arch/riscv/configs/mpfs_defconfig ] ; then
echo "make ARCH=riscv CROSS_COMPILE=${CC} mpfs_defconfig"
make ARCH=riscv CROSS_COMPILE=${CC} mpfs_defconfig make ARCH=riscv CROSS_COMPILE=${CC} mpfs_defconfig
# #
@ -121,10 +122,28 @@ if [ -f arch/riscv/configs/mpfs_defconfig ] ; then
#./scripts/config --disable CONFIG_VMAP_STACK #./scripts/config --disable CONFIG_VMAP_STACK
#./scripts/config --disable CONFIG_SMP #./scripts/config --disable CONFIG_SMP
echo "make -j${CORES} ARCH=riscv CROSS_COMPILE=${CC} olddefconfig"
make -j${CORES} ARCH=riscv CROSS_COMPILE=${CC} olddefconfig
else else
echo "make ARCH=riscv CROSS_COMPILE=${CC} defconfig"
make ARCH=riscv CROSS_COMPILE=${CC} defconfig make ARCH=riscv CROSS_COMPILE=${CC} defconfig
./scripts/config --enable CONFIG_PCIE_MICROCHIP_HOST
./scripts/config --enable CONFIG_OF_OVERLAY
./scripts/config --enable CONFIG_I2C
./scripts/config --enable CONFIG_EEPROM_AT24
./scripts/config --enable CONFIG_I2C_MICROCHIP_CORE
./scripts/config --enable CONFIG_SPI_MICROCHIP_CORE
./scripts/config --enable CONFIG_SPI_MICROCHIP_CORE_QSPI
./scripts/config --module CONFIG_SPI_SPIDEV
./scripts/config --enable CONFIG_GPIO_SYSFS
echo "make -j${CORES} ARCH=riscv CROSS_COMPILE=${CC} olddefconfig"
make -j${CORES} ARCH=riscv CROSS_COMPILE=${CC} olddefconfig
fi fi
echo "make ARCH=riscv CROSS_COMPILE=${CC} menuconfig"
make ARCH=riscv CROSS_COMPILE=${CC} menuconfig make ARCH=riscv CROSS_COMPILE=${CC} menuconfig
echo "make -j${CORES} ARCH=riscv CROSS_COMPILE=${CC} Image modules dtbs" echo "make -j${CORES} ARCH=riscv CROSS_COMPILE=${CC} Image modules dtbs"

@ -2360,8 +2360,8 @@ CONFIG_SPI_MASTER=y
# CONFIG_SPI_DESIGNWARE is not set # CONFIG_SPI_DESIGNWARE is not set
# CONFIG_SPI_GPIO is not set # CONFIG_SPI_GPIO is not set
# CONFIG_SPI_FSL_SPI is not set # CONFIG_SPI_FSL_SPI is not set
# CONFIG_SPI_MICROCHIP_CORE is not set CONFIG_SPI_MICROCHIP_CORE=y
# CONFIG_SPI_MICROCHIP_CORE_QSPI is not set CONFIG_SPI_MICROCHIP_CORE_QSPI=y
# CONFIG_SPI_OC_TINY is not set # CONFIG_SPI_OC_TINY is not set
# CONFIG_SPI_PCI1XXXX is not set # CONFIG_SPI_PCI1XXXX is not set
# CONFIG_SPI_PXA2XX is not set # CONFIG_SPI_PXA2XX is not set
@ -2387,7 +2387,7 @@ CONFIG_SPI_SUN6I=y
# #
# SPI Protocol Masters # SPI Protocol Masters
# #
# CONFIG_SPI_SPIDEV is not set CONFIG_SPI_SPIDEV=m
# CONFIG_SPI_LOOPBACK_TEST is not set # CONFIG_SPI_LOOPBACK_TEST is not set
# CONFIG_SPI_TLE62X0 is not set # CONFIG_SPI_TLE62X0 is not set
# CONFIG_SPI_SLAVE is not set # CONFIG_SPI_SLAVE is not set
@ -2465,7 +2465,7 @@ CONFIG_OF_GPIO=y
CONFIG_GPIO_ACPI=y CONFIG_GPIO_ACPI=y
CONFIG_GPIOLIB_IRQCHIP=y CONFIG_GPIOLIB_IRQCHIP=y
# CONFIG_DEBUG_GPIO is not set # CONFIG_DEBUG_GPIO is not set
# CONFIG_GPIO_SYSFS is not set CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_CDEV=y CONFIG_GPIO_CDEV=y
CONFIG_GPIO_CDEV_V1=y CONFIG_GPIO_CDEV_V1=y
CONFIG_GPIO_GENERIC=y CONFIG_GPIO_GENERIC=y

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