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BeagleV-Fire-ubuntu
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config: ubuntu is shipping firmware with zstd compression now

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Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
main
Robert Nelson 4 weeks ago
parent 048a5491ce
commit 0d86651979
4 changed files with 586 additions and 268 deletions
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4
04_build_linux.sh
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@ -87,6 +87,10 @@ if [ -f arch/riscv/configs/mpfs_defconfig ] ; then
#non-workable on RevA
./scripts/config --disable CONFIG_VIDEO_IMX219
./scripts/config --enable CONFIG_FW_LOADER_COMPRESS
./scripts/config --enable CONFIG_FW_LOADER_COMPRESS_XZ
./scripts/config --enable CONFIG_FW_LOADER_COMPRESS_ZSTD
echo "make -j${CORES} ARCH=riscv CROSS_COMPILE=${CC} olddefconfig"
make -j${CORES} ARCH=riscv CROSS_COMPILE=${CC} olddefconfig
else

74
patches/linux/dts/mpfs-beaglev-fire-fabric.dtsi
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@ -4,28 +4,69 @@
#include "dt-bindings/mailbox/miv-ihc.h"
/ {
compatible = "microchip,mpfs-icicle-reference-rtlv2210";
fabric_clk3: fabric-clk3 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
};
fabric_clk1: fabric-clk1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>;
};
fabric-bus@40000000 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x40000000 0x0 0x40000000 0x0 0x20000000>, /* FIC3-FAB */
<0x0 0x60000000 0x0 0x60000000 0x0 0x20000000>, /* FIC0, LO */
<0x0 0xe0000000 0x0 0xe0000000 0x0 0x20000000>, /* FIC1, LO */
<0x20 0x0 0x20 0x0 0x10 0x0>, /* FIC0,HI */
<0x30 0x0 0x30 0x0 0x10 0x0>; /* FIC1,HI */
<0x0 0x60000000 0x0 0x60000000 0x0 0x20000000>, /* FIC0, LO */
<0x0 0xe0000000 0x0 0xe0000000 0x0 0x20000000>, /* FIC1, LO */
<0x20 0x0 0x20 0x0 0x10 0x0>, /* FIC0,HI */
<0x30 0x0 0x30 0x0 0x10 0x0>; /* FIC1,HI */
cape_gpios_p8: gpio@41100000 {
compatible = "microchip,coregpio-rtl-v3";
reg = <0x0 0x41100000 0x0 0x1000>;
clocks = <&fabric_clk3>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
gpio-line-names = "P8_PIN31", "P8_PIN32", "P8_PIN33", "P8_PIN34",
"P8_PIN35", "P8_PIN36", "P8_PIN37", "P8_PIN38",
"P8_PIN39", "P8_PIN40", "P8_PIN41", "P8_PIN42",
"P8_PIN43", "P8_PIN44", "P8_PIN45", "P8_PIN46";
};
fabric_clk3: fabric-clk3 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
cape_gpios_p9: gpio@41200000 {
compatible = "microchip,coregpio-rtl-v3";
reg = <0x0 0x41200000 0x0 0x1000>;
clocks = <&fabric_clk3>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <20>;
gpio-line-names = "P9_PIN11", "P9_PIN12", "P9_PIN13", "P9_PIN14",
"P9_PIN15", "P9_PIN16", "P9_PIN17", "P9_PIN18",
"P9_PIN21", "P9_PIN22", "P9_PIN23", "P9_PIN24",
"P9_PIN25", "P9_PIN26", "P9_PIN27", "P9_PIN28",
"P9_PIN29", "P9_PIN31", "P9_PIN41", "P9_PIN42";
};
fabric_clk1: fabric-clk1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>;
hsi_gpios: gpio@44000000 {
compatible = "microchip,coregpio-rtl-v3";
reg = <0x0 0x44000000 0x0 0x1000>;
clocks = <&fabric_clk3>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <20>;
gpio-line-names = "B0_HSIO70N", "B0_HSIO71N", "B0_HSIO83N",
"B0_HSIO73N_C2P_CLKN", "B0_HSIO70P", "B0_HSIO71P",
"B0_HSIO83P", "B0_HSIO73N_C2P_CLKP", "XCVR1_RX_VALID",
"XCVR1_LOCK", "XCVR1_ERROR", "XCVR2_RX_VALID",
"XCVR2_LOCK", "XCVR2_ERROR", "XCVR3_RX_VALID",
"XCVR3_LOCK", "XCVR3_ERROR", "XCVR_0B_REF_CLK_PLL_LOCK",
"XCVR_0C_REF_CLK_PLL_LOCK", "B0_HSIO81N";
};
};
@ -57,8 +98,8 @@
#size-cells = <0x2>;
device_type = "pci";
dma-noncoherent;
reg = <0x30 0x0 0x0 0x8000000>, <0x0 0x43000000 0x0 0x10000>;
reg-names = "cfg", "apb";
reg = <0x30 0x0 0x0 0x8000000>, <0x0 0x43004000 0x0 0x2000>, <0x0 0x43006000 0x0 0x2000>;
reg-names = "cfg", "bridge", "ctrl";
bus-range = <0x0 0x7f>;
interrupt-parent = <&plic>;
interrupts = <119>;
@ -67,7 +108,8 @@
<0 0 0 3 &pcie_intc 2>,
<0 0 0 4 &pcie_intc 3>;
interrupt-map-mask = <0 0 0 7>;
clocks = <&ccc_nw CLK_CCC_PLL0_OUT1>, <&ccc_nw CLK_CCC_PLL0_OUT3>;
clocks = <&ccc_nw CLK_CCC_PLL0_OUT1>,
<&ccc_nw CLK_CCC_PLL0_OUT3>;
clock-names = "fic1", "fic3";
ranges = <0x43000000 0x0 0x9000000 0x30 0x9000000 0x0 0xf000000>,
<0x1000000 0x0 0x8000000 0x30 0x8000000 0x0 0x1000000>,

232
patches/linux/dts/mpfs-beaglev-fire.dts
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@ -6,6 +6,7 @@
#include <dt-bindings/gpio/gpio.h>
#include "mpfs.dtsi"
#include "mpfs-beaglev-fire-fabric.dtsi"
#include "mpfs-beaglev-fire-pinmux.dtsi"
/* Clock frequency (in Hz) of the rtcclk */
#define RTCCLK_FREQ 1000000
@ -14,7 +15,7 @@
#address-cells = <2>;
#size-cells = <2>;
model = "BeagleBoard BeagleV-Fire";
compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs";
compatible = "beagle,beaglev-fire", "microchip,mpfs";
soc {
dma-ranges = <0x14 0x0 0x0 0x80000000 0x0 0x4000000>,
@ -25,8 +26,6 @@
};
aliases {
mmc0 = &mmc;
ethernet0 = &mac1;
serial0 = &mmuart0;
serial1 = &mmuart1;
serial2 = &mmuart2;
@ -82,7 +81,6 @@
compatible = "shared-dma-pool";
size = <0x0 0x4000000>;
no-map;
linux,dma-default;
alloc-ranges = <0x0 0xc4000000 0x0 0x4000000>;
};
@ -95,100 +93,96 @@
};
};
imx219_vana: fixedregulator@0 {
imx219_vana: fixedregulator-0 {
compatible = "regulator-fixed";
regulator-name = "imx219_vana";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
imx219_vdig: fixedregulator@1 {
imx219_vdig: fixedregulator-1 {
compatible = "regulator-fixed";
regulator-name = "imx219_vdig";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
imx219_vddl: fixedregulator@2 {
imx219_vddl: fixedregulator-2 {
compatible = "regulator-fixed";
regulator-name = "imx219_vddl";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
imx219_clk: camera-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};
&gpio0 {
ngpios=<14>;
gpio-line-names = "", "", "", "", "", "", "", "", "", "", "", "", "SD_CARD_CS", "USER_BUTTON";
gpio-line-names = "", "", "", "", "", "", "",
"", "", "", "", "", "SD_CARD_CS", "USER_BUTTON";
status = "okay";
sd_card_cs {
sd-card-cs-hog {
gpio-hog;
gpios = <12 12>;
output_high;
output-high;
line-name = "SD_CARD_CS";
};
user-button-hog {
gpio-hog;
gpios = <13 13>;
input;
line-name = "USER_BUTTON";
};
};
&gpio1 {
ngpios=<24>;
gpio-line-names = "", "", "", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "", "", "",
"ADC_IRQn", "", "", "USB_OCn";
"", "", "", "", "", "", "", "", "", "",
"ADC_IRQn", "", "", "USB_OCn";
status = "okay";
adc_irqn {
adc-irqn-hog {
gpio-hog;
gpios = <20 20>;
input;
line-name = "ADC_IRQn";
};
user_button {
usb-ocn-hog {
gpio-hog;
gpios = <23 23>;
input;
line-name = "USB_OCn";
};
};
&gpio2 {
interrupts = <53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>;
gpio-line-names = "P8_PIN3_USER_LED_0", "P8_PIN4_USER_LED_1", "P8_PIN5_USER_LED_2",
"P8_PIN6_USER_LED_3", "P8_PIN7_USER_LED_4", "P8_PIN8_USER_LED_5",
"P8_PIN9_USER_LED_6", "P8_PIN10_USER_LED_7", "P8_PIN11_USER_LED_8",
"P8_PIN12_USER_LED_9", "P8_PIN13_USER_LED_10", "P8_PIN14_USER_LED_11",
"P8_PIN15", "P8_PIN16", "P8_PIN17", "P8_PIN18", "P8_PIN19",
"P8_PIN20", "P8_PIN21", "P8_PIN22", "P8_PIN23", "P8_PIN24",
"P8_PIN25", "P8_PIN26", "P8_PIN27", "P8_PIN28", "P8_PIN29",
"P8_PIN30",
"M2_W_DISABLE1", "M2_W_DISABLE2",
"VIO_ENABLE", "SD_DET";
"P8_PIN6_USER_LED_3", "P8_PIN7_USER_LED_4", "P8_PIN8_USER_LED_5",
"P8_PIN9_USER_LED_6", "P8_PIN10_USER_LED_7", "P8_PIN11_USER_LED_8",
"P8_PIN12_USER_LED_9", "P8_PIN13_USER_LED_10", "P8_PIN14_USER_LED_11",
"P8_PIN15", "P8_PIN16", "P8_PIN17", "P8_PIN18", "P8_PIN19", "P8_PIN20",
"P8_PIN21", "P8_PIN22", "P8_PIN23", "P8_PIN24", "P8_PIN25", "P8_PIN26",
"P8_PIN27", "P8_PIN28", "P8_PIN29", "P8_PIN30", "M2_W_DISABLE1",
"M2_W_DISABLE2", "VIO_ENABLE", "SD_DET";
status = "okay";
vio_enable {
vio-enable-hog {
gpio-hog;
gpios = <30 30>;
output_high;
output-high;
line-name = "VIO_ENABLE";
};
sd_det {
sd-det-hog {
gpio-hog;
gpios = <31 31>;
input;
@ -202,9 +196,9 @@
&i2c1 {
status = "okay";
eeprom: eeprom@50 {
compatible = "atmel,24c32";
pagesize = <32>;
compatible = "at,24c32";
reg = <0x50>;
};
@ -218,15 +212,12 @@
port {
imx219_0: endpoint {
// remote-endpoint = <&csi1_ep>;
data-lanes = <1 2>;
clock-noncontinuous;
link-frequencies = /bits/ 64 <456000000>;
};
};
};
};
&mac0 {
@ -239,29 +230,10 @@
};
};
&mac1 {
dma-noncoherent;
status = "okay";
phy-mode = "sgmii";
phy-handle = <&phy1>;
phy1: ethernet-phy@0 {
reg = <0>;
};
};
&mbox {
status = "okay";
};
//&mmc {
// status = "okay";
// bus-width = <8>;
// disable-wp;
// cap-mmc-highspeed;
// mmc-ddr-1_8v;
// mmc-hs200-1_8v;
//};
&mmc {
dma-noncoherent;
bus-width = <4>;
@ -277,7 +249,6 @@
status = "okay";
};
&mmuart0 {
status = "okay";
};
@ -286,36 +257,97 @@
status = "okay";
};
//&mmuart2 {
// status = "okay";
//};
&refclk {
clock-frequency = <125000000>;
};
&refclk_ccc {
clock-frequency = <50000000>;
};
&rtc {
status = "okay";
};
&spi0 {
status = "okay";
};
//&mmuart3 //{
// statu//s = "okay";
//};//
//
//&mmuart4 {
// status = "okay";
//};
&spi1 {
status = "okay";
};
//&pcie {
// status = "okay";
//};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&qspi {
status = "okay";
cs-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>, <&gpio0 12 GPIO_ACTIVE_LOW>;
num-cs = <2>;
adc@0 {
compatible = "microchip,mcp3464r";
reg = <0>; /* CE0 */
spi-cpol;
spi-cpha;
spi-max-frequency = <5000000>;
microchip,hw-device-address = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
channel@0 {
/* CH0 to AGND */
reg = <0>;
label = "CH0";
};
channel@1 {
/* CH1 to AGND */
reg = <1>;
label = "CH1";
};
channel@2 {
/* CH2 to AGND */
reg = <2>;
label = "CH2";
};
channel@3 {
/* CH3 to AGND */
reg = <3>;
label = "CH3";
};
channel@4 {
/* CH4 to AGND */
reg = <4>;
label = "CH4";
};
channel@5 {
/* CH5 to AGND */
reg = <5>;
label = "CH5";
};
mcp3464: mcp3464@0 {
compatible = "microchip,mcp3464r";
reg = <0>; /* CE0 */
spi-cpol;
spi-cpha;
spi-max-frequency = <15000000>;
status = "okay";
microchip,hw-device-address = <1>;
channel@6 {
/* CH6 to AGND */
reg = <6>;
label = "CH6";
};
channel@7 {
/* CH7 is connected to AGND */
reg = <7>;
label = "CH7";
};
};
mmc-slot@1 {
@ -323,30 +355,11 @@
reg = <1>;
gpios = <&gpio2 31 1>;
voltage-ranges = <3300 3300>;
spi-max-frequency = <15000000>;
spi-max-frequency = <5000000>;
disable-wp;
};
};
&refclk {
clock-frequency = <125000000>;
};
&refclk_ccc {
clock-frequency = <50000000>;
};
&rtc {
status = "okay";
};
&spi0 {
status = "okay";
};
&spi1 {
status = "okay";
};
&syscontroller {
microchip,bitstream-flash = <&sys_ctrl_flash>;
@ -366,19 +379,8 @@
};
};
&usb {
dma-noncoherent;
status = "okay";
dr_mode = "otg";
};
// UARTs
//bone_uart_4: &mmuart4 {
// symlink = "bone/uart/4";
//};
// I2Cs
bone_i2c_2: &i2c0 {
symlink = "bone/i2c/2";
};

544
patches/linux/mpfs_defconfig
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