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ePenguin-Software-Framework/test/same54p20a_test/doc/html/unionNVMCTRL__CTRLA__Type.html

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Data Fields</h2></td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<p class="definition">Definition at line <a class="el" href="component_2nvmctrl_8h_source.html#l00044">44</a> of file <a class="el" href="component_2nvmctrl_8h_source.html">nvmctrl.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#ad1dcc5ff570a3c710aa29340a0f82445">&#9670;&nbsp;</a></span>__pad0__</h2>
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<p>bit: 0.. 1 Reserved <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2nvmctrl_8h_source.html#l00046">46</a> of file <a class="el" href="component_2nvmctrl_8h_source.html">nvmctrl.h</a>.</p>
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<p>bit: 12 Force AHB0 access to NONSEQ, burst transfers are continuously rearbitrated </p>
<p class="definition">Definition at line <a class="el" href="component_2nvmctrl_8h_source.html#l00052">52</a> of file <a class="el" href="component_2nvmctrl_8h_source.html">nvmctrl.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a514f4360f729f5cd90e5421293f620ee">&#9670;&nbsp;</a></span>AHBNS1</h2>
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<p>bit: 13 Force AHB1 access to NONSEQ, burst transfers are continuously rearbitrated </p>
<p class="definition">Definition at line <a class="el" href="component_2nvmctrl_8h_source.html#l00053">53</a> of file <a class="el" href="component_2nvmctrl_8h_source.html">nvmctrl.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a681489c8c6abf9104a2fab49f0b7f6fe">&#9670;&nbsp;</a></span>AUTOWS</h2>
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<p>bit: 2 Auto Wait State Enable <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2nvmctrl_8h_source.html#l00047">47</a> of file <a class="el" href="component_2nvmctrl_8h_source.html">nvmctrl.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a08ae6bbf8650bda375060d39f4122221">&#9670;&nbsp;</a></span>bit</h2>
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<p>Structure used for bit access <br />
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<a id="a326ec917cd719be68c60f3dba461e529"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a326ec917cd719be68c60f3dba461e529">&#9670;&nbsp;</a></span>CACHEDIS0</h2>
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<p>bit: 14 AHB0 Cache Disable <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2nvmctrl_8h_source.html#l00054">54</a> of file <a class="el" href="component_2nvmctrl_8h_source.html">nvmctrl.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#ae906ccf75cdbcbe61cb732d71b205aaa">&#9670;&nbsp;</a></span>CACHEDIS1</h2>
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<p>bit: 15 AHB1 Cache Disable <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2nvmctrl_8h_source.html#l00055">55</a> of file <a class="el" href="component_2nvmctrl_8h_source.html">nvmctrl.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a07cb354a8474052820dddae6fb60b601">&#9670;&nbsp;</a></span>PRM</h2>
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<p>bit: 6.. 7 Power Reduction Mode during Sleep <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2nvmctrl_8h_source.html#l00050">50</a> of file <a class="el" href="component_2nvmctrl_8h_source.html">nvmctrl.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a675bd7dd11996723b783028b20c0c280">&#9670;&nbsp;</a></span>reg</h2>
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<p>Type used for register access <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2nvmctrl_8h_source.html#l00057">57</a> of file <a class="el" href="component_2nvmctrl_8h_source.html">nvmctrl.h</a>.</p>
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<a id="ac25be3eb6ef2954bb84c10da7659e4fd"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ac25be3eb6ef2954bb84c10da7659e4fd">&#9670;&nbsp;</a></span>RWS</h2>
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<p>bit: 8..11 NVM Read Wait States <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2nvmctrl_8h_source.html#l00051">51</a> of file <a class="el" href="component_2nvmctrl_8h_source.html">nvmctrl.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a3bbab66b83056fd662612f08a715ae30">&#9670;&nbsp;</a></span>SUSPEN</h2>
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<p>bit: 3 Suspend Enable <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2nvmctrl_8h_source.html#l00048">48</a> of file <a class="el" href="component_2nvmctrl_8h_source.html">nvmctrl.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#adbd3afd8e391e8c2f43182d8e68f78a4">&#9670;&nbsp;</a></span>WMODE</h2>
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<p>bit: 4.. 5 Write Mode <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2nvmctrl_8h_source.html#l00049">49</a> of file <a class="el" href="component_2nvmctrl_8h_source.html">nvmctrl.h</a>.</p>
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<hr/>The documentation for this union was generated from the following file:<ul>
<li>/storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/<a class="el" href="component_2nvmctrl_8h_source.html">nvmctrl.h</a></li>
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