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419 lines
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419 lines
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<title>SAME54P20A Test Project: /storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/instance/sercom5.h File Reference</title>
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<div id="projectname">SAME54P20A Test Project
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<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_92b117bae75cf16a05ca7611db29e9c7.html">instance</a></li> </ul>
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<a href="#define-members">Macros</a> </div>
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<div class="title">sercom5.h File Reference</div> </div>
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</div><!--header-->
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<div class="contents">
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<p>Instance description for SERCOM5.
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<a href="#details">More...</a></p>
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<p><a href="sercom5_8h_source.html">Go to the source code of this file.</a></p>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:a0de8b79a3ebdd73a72c849c97f8e620c"><td class="memItemLeft" align="right" valign="top"><a id="a0de8b79a3ebdd73a72c849c97f8e620c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a0de8b79a3ebdd73a72c849c97f8e620c">REG_SERCOM5_I2CM_CTRLA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43000400UL)</td></tr>
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<tr class="memdesc:a0de8b79a3ebdd73a72c849c97f8e620c"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) I2CM Control A <br /></td></tr>
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<tr class="separator:a0de8b79a3ebdd73a72c849c97f8e620c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5ec3c9b1c81a1bdc4accc5d37083ad61"><td class="memItemLeft" align="right" valign="top"><a id="a5ec3c9b1c81a1bdc4accc5d37083ad61"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a5ec3c9b1c81a1bdc4accc5d37083ad61">REG_SERCOM5_I2CM_CTRLB</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43000404UL)</td></tr>
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<tr class="memdesc:a5ec3c9b1c81a1bdc4accc5d37083ad61"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) I2CM Control B <br /></td></tr>
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<tr class="separator:a5ec3c9b1c81a1bdc4accc5d37083ad61"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afd6788e3dd3bed804063f85fdbc17d95"><td class="memItemLeft" align="right" valign="top"><a id="afd6788e3dd3bed804063f85fdbc17d95"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#afd6788e3dd3bed804063f85fdbc17d95">REG_SERCOM5_I2CM_CTRLC</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43000408UL)</td></tr>
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<tr class="memdesc:afd6788e3dd3bed804063f85fdbc17d95"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) I2CM Control C <br /></td></tr>
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<tr class="separator:afd6788e3dd3bed804063f85fdbc17d95"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab6ba79cb18d9dbe8dd81b03e5c012bcb"><td class="memItemLeft" align="right" valign="top"><a id="ab6ba79cb18d9dbe8dd81b03e5c012bcb"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#ab6ba79cb18d9dbe8dd81b03e5c012bcb">REG_SERCOM5_I2CM_BAUD</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4300040CUL)</td></tr>
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<tr class="memdesc:ab6ba79cb18d9dbe8dd81b03e5c012bcb"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) I2CM Baud Rate <br /></td></tr>
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<tr class="separator:ab6ba79cb18d9dbe8dd81b03e5c012bcb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a43ecedec11c46e630fd2c69c7f371d70"><td class="memItemLeft" align="right" valign="top"><a id="a43ecedec11c46e630fd2c69c7f371d70"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a43ecedec11c46e630fd2c69c7f371d70">REG_SERCOM5_I2CM_INTENCLR</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43000414UL)</td></tr>
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<tr class="memdesc:a43ecedec11c46e630fd2c69c7f371d70"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) I2CM Interrupt Enable Clear <br /></td></tr>
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<tr class="separator:a43ecedec11c46e630fd2c69c7f371d70"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a89c95de38163ff7109565927f60af5a3"><td class="memItemLeft" align="right" valign="top"><a id="a89c95de38163ff7109565927f60af5a3"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a89c95de38163ff7109565927f60af5a3">REG_SERCOM5_I2CM_INTENSET</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43000416UL)</td></tr>
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<tr class="memdesc:a89c95de38163ff7109565927f60af5a3"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) I2CM Interrupt Enable Set <br /></td></tr>
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<tr class="separator:a89c95de38163ff7109565927f60af5a3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9e4b3f5a5f4440fc899f03272a22cd0f"><td class="memItemLeft" align="right" valign="top"><a id="a9e4b3f5a5f4440fc899f03272a22cd0f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a9e4b3f5a5f4440fc899f03272a22cd0f">REG_SERCOM5_I2CM_INTFLAG</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43000418UL)</td></tr>
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<tr class="memdesc:a9e4b3f5a5f4440fc899f03272a22cd0f"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) I2CM Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="separator:a9e4b3f5a5f4440fc899f03272a22cd0f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1745325a96793079cca5ab96c084b42d"><td class="memItemLeft" align="right" valign="top"><a id="a1745325a96793079cca5ab96c084b42d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a1745325a96793079cca5ab96c084b42d">REG_SERCOM5_I2CM_STATUS</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x4300041AUL)</td></tr>
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<tr class="memdesc:a1745325a96793079cca5ab96c084b42d"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) I2CM Status <br /></td></tr>
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<tr class="separator:a1745325a96793079cca5ab96c084b42d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7543f246d311b0298d1e906a700b95dd"><td class="memItemLeft" align="right" valign="top"><a id="a7543f246d311b0298d1e906a700b95dd"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a7543f246d311b0298d1e906a700b95dd">REG_SERCOM5_I2CM_SYNCBUSY</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x4300041CUL)</td></tr>
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<tr class="memdesc:a7543f246d311b0298d1e906a700b95dd"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) I2CM Synchronization Busy <br /></td></tr>
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<tr class="separator:a7543f246d311b0298d1e906a700b95dd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8048f0a77f768395dd9a82058732edb3"><td class="memItemLeft" align="right" valign="top"><a id="a8048f0a77f768395dd9a82058732edb3"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a8048f0a77f768395dd9a82058732edb3">REG_SERCOM5_I2CM_ADDR</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43000424UL)</td></tr>
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<tr class="memdesc:a8048f0a77f768395dd9a82058732edb3"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) I2CM Address <br /></td></tr>
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<tr class="separator:a8048f0a77f768395dd9a82058732edb3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3ee5bd41549748b815770187b3e9cf66"><td class="memItemLeft" align="right" valign="top"><a id="a3ee5bd41549748b815770187b3e9cf66"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a3ee5bd41549748b815770187b3e9cf66">REG_SERCOM5_I2CM_DATA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43000428UL)</td></tr>
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<tr class="memdesc:a3ee5bd41549748b815770187b3e9cf66"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) I2CM Data <br /></td></tr>
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<tr class="separator:a3ee5bd41549748b815770187b3e9cf66"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af9e1f772ce74a1a8411cf6f864f5bc01"><td class="memItemLeft" align="right" valign="top"><a id="af9e1f772ce74a1a8411cf6f864f5bc01"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#af9e1f772ce74a1a8411cf6f864f5bc01">REG_SERCOM5_I2CM_DBGCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43000430UL)</td></tr>
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<tr class="memdesc:af9e1f772ce74a1a8411cf6f864f5bc01"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) I2CM Debug Control <br /></td></tr>
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<tr class="separator:af9e1f772ce74a1a8411cf6f864f5bc01"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aba9449b7c4a3547389add2d8382ebb11"><td class="memItemLeft" align="right" valign="top"><a id="aba9449b7c4a3547389add2d8382ebb11"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#aba9449b7c4a3547389add2d8382ebb11">REG_SERCOM5_I2CS_CTRLA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43000400UL)</td></tr>
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<tr class="memdesc:aba9449b7c4a3547389add2d8382ebb11"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) I2CS Control A <br /></td></tr>
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<tr class="separator:aba9449b7c4a3547389add2d8382ebb11"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9a524c4a0aaef3857fe66f480470a191"><td class="memItemLeft" align="right" valign="top"><a id="a9a524c4a0aaef3857fe66f480470a191"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a9a524c4a0aaef3857fe66f480470a191">REG_SERCOM5_I2CS_CTRLB</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43000404UL)</td></tr>
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<tr class="memdesc:a9a524c4a0aaef3857fe66f480470a191"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) I2CS Control B <br /></td></tr>
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<tr class="separator:a9a524c4a0aaef3857fe66f480470a191"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a54f6b87654fd8162f2b5666a4c8cbade"><td class="memItemLeft" align="right" valign="top"><a id="a54f6b87654fd8162f2b5666a4c8cbade"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a54f6b87654fd8162f2b5666a4c8cbade">REG_SERCOM5_I2CS_CTRLC</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43000408UL)</td></tr>
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<tr class="memdesc:a54f6b87654fd8162f2b5666a4c8cbade"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) I2CS Control C <br /></td></tr>
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<tr class="separator:a54f6b87654fd8162f2b5666a4c8cbade"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a14313f32808ee08f5db015ada5878810"><td class="memItemLeft" align="right" valign="top"><a id="a14313f32808ee08f5db015ada5878810"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a14313f32808ee08f5db015ada5878810">REG_SERCOM5_I2CS_INTENCLR</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43000414UL)</td></tr>
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<tr class="memdesc:a14313f32808ee08f5db015ada5878810"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) I2CS Interrupt Enable Clear <br /></td></tr>
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<tr class="separator:a14313f32808ee08f5db015ada5878810"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3da4380f924035cc3c87aabf689d6ec3"><td class="memItemLeft" align="right" valign="top"><a id="a3da4380f924035cc3c87aabf689d6ec3"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a3da4380f924035cc3c87aabf689d6ec3">REG_SERCOM5_I2CS_INTENSET</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43000416UL)</td></tr>
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<tr class="memdesc:a3da4380f924035cc3c87aabf689d6ec3"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) I2CS Interrupt Enable Set <br /></td></tr>
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<tr class="separator:a3da4380f924035cc3c87aabf689d6ec3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2793f0ca16677bdd2f1d26090dbc0045"><td class="memItemLeft" align="right" valign="top"><a id="a2793f0ca16677bdd2f1d26090dbc0045"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a2793f0ca16677bdd2f1d26090dbc0045">REG_SERCOM5_I2CS_INTFLAG</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43000418UL)</td></tr>
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<tr class="memdesc:a2793f0ca16677bdd2f1d26090dbc0045"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) I2CS Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="separator:a2793f0ca16677bdd2f1d26090dbc0045"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad5d5d3ec13b0679f1741ac939e248d6c"><td class="memItemLeft" align="right" valign="top"><a id="ad5d5d3ec13b0679f1741ac939e248d6c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#ad5d5d3ec13b0679f1741ac939e248d6c">REG_SERCOM5_I2CS_STATUS</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x4300041AUL)</td></tr>
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<tr class="memdesc:ad5d5d3ec13b0679f1741ac939e248d6c"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) I2CS Status <br /></td></tr>
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<tr class="separator:ad5d5d3ec13b0679f1741ac939e248d6c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a641630bf82e85a8ef0a5054e5a466a97"><td class="memItemLeft" align="right" valign="top"><a id="a641630bf82e85a8ef0a5054e5a466a97"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a641630bf82e85a8ef0a5054e5a466a97">REG_SERCOM5_I2CS_SYNCBUSY</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x4300041CUL)</td></tr>
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<tr class="memdesc:a641630bf82e85a8ef0a5054e5a466a97"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) I2CS Synchronization Busy <br /></td></tr>
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<tr class="separator:a641630bf82e85a8ef0a5054e5a466a97"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac563a33a6b486d6c93a8ab292a358cfb"><td class="memItemLeft" align="right" valign="top"><a id="ac563a33a6b486d6c93a8ab292a358cfb"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#ac563a33a6b486d6c93a8ab292a358cfb">REG_SERCOM5_I2CS_LENGTH</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x43000422UL)</td></tr>
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<tr class="memdesc:ac563a33a6b486d6c93a8ab292a358cfb"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) I2CS Length <br /></td></tr>
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<tr class="separator:ac563a33a6b486d6c93a8ab292a358cfb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad5daeb767eef5f4e23bce462d9e0bd35"><td class="memItemLeft" align="right" valign="top"><a id="ad5daeb767eef5f4e23bce462d9e0bd35"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#ad5daeb767eef5f4e23bce462d9e0bd35">REG_SERCOM5_I2CS_ADDR</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43000424UL)</td></tr>
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<tr class="memdesc:ad5daeb767eef5f4e23bce462d9e0bd35"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) I2CS Address <br /></td></tr>
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<tr class="separator:ad5daeb767eef5f4e23bce462d9e0bd35"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af14d97e9f92359cc2573bdab52769fb0"><td class="memItemLeft" align="right" valign="top"><a id="af14d97e9f92359cc2573bdab52769fb0"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#af14d97e9f92359cc2573bdab52769fb0">REG_SERCOM5_I2CS_DATA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43000428UL)</td></tr>
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<tr class="memdesc:af14d97e9f92359cc2573bdab52769fb0"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) I2CS Data <br /></td></tr>
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<tr class="separator:af14d97e9f92359cc2573bdab52769fb0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad4a9bba22626064a5fbe13207eafc3a3"><td class="memItemLeft" align="right" valign="top"><a id="ad4a9bba22626064a5fbe13207eafc3a3"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#ad4a9bba22626064a5fbe13207eafc3a3">REG_SERCOM5_SPI_CTRLA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43000400UL)</td></tr>
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<tr class="memdesc:ad4a9bba22626064a5fbe13207eafc3a3"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) SPI Control A <br /></td></tr>
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<tr class="separator:ad4a9bba22626064a5fbe13207eafc3a3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3ddf065a6dab6b05bd543c5c140a3cf8"><td class="memItemLeft" align="right" valign="top"><a id="a3ddf065a6dab6b05bd543c5c140a3cf8"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a3ddf065a6dab6b05bd543c5c140a3cf8">REG_SERCOM5_SPI_CTRLB</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43000404UL)</td></tr>
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<tr class="memdesc:a3ddf065a6dab6b05bd543c5c140a3cf8"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) SPI Control B <br /></td></tr>
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<tr class="separator:a3ddf065a6dab6b05bd543c5c140a3cf8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:adf8c430aea13e5f794dc360c8e7c037c"><td class="memItemLeft" align="right" valign="top"><a id="adf8c430aea13e5f794dc360c8e7c037c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#adf8c430aea13e5f794dc360c8e7c037c">REG_SERCOM5_SPI_CTRLC</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43000408UL)</td></tr>
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<tr class="memdesc:adf8c430aea13e5f794dc360c8e7c037c"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) SPI Control C <br /></td></tr>
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<tr class="separator:adf8c430aea13e5f794dc360c8e7c037c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abf2566576c05a359bd1b64b5cc0dcbac"><td class="memItemLeft" align="right" valign="top"><a id="abf2566576c05a359bd1b64b5cc0dcbac"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#abf2566576c05a359bd1b64b5cc0dcbac">REG_SERCOM5_SPI_BAUD</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4300040CUL)</td></tr>
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<tr class="memdesc:abf2566576c05a359bd1b64b5cc0dcbac"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) SPI Baud Rate <br /></td></tr>
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<tr class="separator:abf2566576c05a359bd1b64b5cc0dcbac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a181b326b5d1a04581ffcfd9c2aacefc2"><td class="memItemLeft" align="right" valign="top"><a id="a181b326b5d1a04581ffcfd9c2aacefc2"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a181b326b5d1a04581ffcfd9c2aacefc2">REG_SERCOM5_SPI_INTENCLR</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43000414UL)</td></tr>
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<tr class="memdesc:a181b326b5d1a04581ffcfd9c2aacefc2"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) SPI Interrupt Enable Clear <br /></td></tr>
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<tr class="separator:a181b326b5d1a04581ffcfd9c2aacefc2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a376c1095857537bfa4388567cb844907"><td class="memItemLeft" align="right" valign="top"><a id="a376c1095857537bfa4388567cb844907"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a376c1095857537bfa4388567cb844907">REG_SERCOM5_SPI_INTENSET</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43000416UL)</td></tr>
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<tr class="memdesc:a376c1095857537bfa4388567cb844907"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) SPI Interrupt Enable Set <br /></td></tr>
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<tr class="separator:a376c1095857537bfa4388567cb844907"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a292d991c16b35c156ecfe2d84f1dd8c3"><td class="memItemLeft" align="right" valign="top"><a id="a292d991c16b35c156ecfe2d84f1dd8c3"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a292d991c16b35c156ecfe2d84f1dd8c3">REG_SERCOM5_SPI_INTFLAG</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43000418UL)</td></tr>
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<tr class="memdesc:a292d991c16b35c156ecfe2d84f1dd8c3"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) SPI Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="separator:a292d991c16b35c156ecfe2d84f1dd8c3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a09d44746c58fd86d36dbd51f23d2fc78"><td class="memItemLeft" align="right" valign="top"><a id="a09d44746c58fd86d36dbd51f23d2fc78"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a09d44746c58fd86d36dbd51f23d2fc78">REG_SERCOM5_SPI_STATUS</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x4300041AUL)</td></tr>
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<tr class="memdesc:a09d44746c58fd86d36dbd51f23d2fc78"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) SPI Status <br /></td></tr>
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<tr class="separator:a09d44746c58fd86d36dbd51f23d2fc78"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6c956d8dcd153027f74efaa097c4c820"><td class="memItemLeft" align="right" valign="top"><a id="a6c956d8dcd153027f74efaa097c4c820"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a6c956d8dcd153027f74efaa097c4c820">REG_SERCOM5_SPI_SYNCBUSY</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x4300041CUL)</td></tr>
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<tr class="memdesc:a6c956d8dcd153027f74efaa097c4c820"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) SPI Synchronization Busy <br /></td></tr>
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<tr class="separator:a6c956d8dcd153027f74efaa097c4c820"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a36e4800682bbecd6ee6c87fd78e45e18"><td class="memItemLeft" align="right" valign="top"><a id="a36e4800682bbecd6ee6c87fd78e45e18"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a36e4800682bbecd6ee6c87fd78e45e18">REG_SERCOM5_SPI_LENGTH</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x43000422UL)</td></tr>
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<tr class="memdesc:a36e4800682bbecd6ee6c87fd78e45e18"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) SPI Length <br /></td></tr>
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<tr class="separator:a36e4800682bbecd6ee6c87fd78e45e18"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae7c70e9fbcb3289a32b1b526e01c29e2"><td class="memItemLeft" align="right" valign="top"><a id="ae7c70e9fbcb3289a32b1b526e01c29e2"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#ae7c70e9fbcb3289a32b1b526e01c29e2">REG_SERCOM5_SPI_ADDR</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43000424UL)</td></tr>
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<tr class="memdesc:ae7c70e9fbcb3289a32b1b526e01c29e2"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) SPI Address <br /></td></tr>
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<tr class="separator:ae7c70e9fbcb3289a32b1b526e01c29e2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0389e07e9b75d8e035984f1dadff0e23"><td class="memItemLeft" align="right" valign="top"><a id="a0389e07e9b75d8e035984f1dadff0e23"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a0389e07e9b75d8e035984f1dadff0e23">REG_SERCOM5_SPI_DATA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43000428UL)</td></tr>
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<tr class="memdesc:a0389e07e9b75d8e035984f1dadff0e23"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) SPI Data <br /></td></tr>
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<tr class="separator:a0389e07e9b75d8e035984f1dadff0e23"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae446fc6c50800598a456cdde2598313b"><td class="memItemLeft" align="right" valign="top"><a id="ae446fc6c50800598a456cdde2598313b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#ae446fc6c50800598a456cdde2598313b">REG_SERCOM5_SPI_DBGCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43000430UL)</td></tr>
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<tr class="memdesc:ae446fc6c50800598a456cdde2598313b"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) SPI Debug Control <br /></td></tr>
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<tr class="separator:ae446fc6c50800598a456cdde2598313b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4eaa0d321f1a3c39545541d3d1e04708"><td class="memItemLeft" align="right" valign="top"><a id="a4eaa0d321f1a3c39545541d3d1e04708"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a4eaa0d321f1a3c39545541d3d1e04708">REG_SERCOM5_USART_CTRLA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43000400UL)</td></tr>
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<tr class="memdesc:a4eaa0d321f1a3c39545541d3d1e04708"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) USART Control A <br /></td></tr>
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<tr class="separator:a4eaa0d321f1a3c39545541d3d1e04708"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0ebc02aeed689ce2d7071a5db1480532"><td class="memItemLeft" align="right" valign="top"><a id="a0ebc02aeed689ce2d7071a5db1480532"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a0ebc02aeed689ce2d7071a5db1480532">REG_SERCOM5_USART_CTRLB</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43000404UL)</td></tr>
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<tr class="memdesc:a0ebc02aeed689ce2d7071a5db1480532"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) USART Control B <br /></td></tr>
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<tr class="separator:a0ebc02aeed689ce2d7071a5db1480532"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac107d68f762060780258ad2cde241d36"><td class="memItemLeft" align="right" valign="top"><a id="ac107d68f762060780258ad2cde241d36"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#ac107d68f762060780258ad2cde241d36">REG_SERCOM5_USART_CTRLC</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43000408UL)</td></tr>
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<tr class="memdesc:ac107d68f762060780258ad2cde241d36"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) USART Control C <br /></td></tr>
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<tr class="separator:ac107d68f762060780258ad2cde241d36"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a293c40d5b5695b6d361f119b55521436"><td class="memItemLeft" align="right" valign="top"><a id="a293c40d5b5695b6d361f119b55521436"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a293c40d5b5695b6d361f119b55521436">REG_SERCOM5_USART_BAUD</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x4300040CUL)</td></tr>
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<tr class="memdesc:a293c40d5b5695b6d361f119b55521436"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) USART Baud Rate <br /></td></tr>
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<tr class="separator:a293c40d5b5695b6d361f119b55521436"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2a51f3cbe63be4191cf612eedd7c7851"><td class="memItemLeft" align="right" valign="top"><a id="a2a51f3cbe63be4191cf612eedd7c7851"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a2a51f3cbe63be4191cf612eedd7c7851">REG_SERCOM5_USART_RXPL</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4300040EUL)</td></tr>
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<tr class="memdesc:a2a51f3cbe63be4191cf612eedd7c7851"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) USART Receive Pulse Length <br /></td></tr>
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<tr class="separator:a2a51f3cbe63be4191cf612eedd7c7851"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2aad4967f4484c667f3a0e12193072a6"><td class="memItemLeft" align="right" valign="top"><a id="a2aad4967f4484c667f3a0e12193072a6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a2aad4967f4484c667f3a0e12193072a6">REG_SERCOM5_USART_INTENCLR</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43000414UL)</td></tr>
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<tr class="memdesc:a2aad4967f4484c667f3a0e12193072a6"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) USART Interrupt Enable Clear <br /></td></tr>
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<tr class="separator:a2aad4967f4484c667f3a0e12193072a6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7866dc9477aeb7b5bfb044d0f47c9c92"><td class="memItemLeft" align="right" valign="top"><a id="a7866dc9477aeb7b5bfb044d0f47c9c92"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a7866dc9477aeb7b5bfb044d0f47c9c92">REG_SERCOM5_USART_INTENSET</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43000416UL)</td></tr>
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<tr class="memdesc:a7866dc9477aeb7b5bfb044d0f47c9c92"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) USART Interrupt Enable Set <br /></td></tr>
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<tr class="separator:a7866dc9477aeb7b5bfb044d0f47c9c92"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acc589f71ca926b95d4fa53ad76e4d8f1"><td class="memItemLeft" align="right" valign="top"><a id="acc589f71ca926b95d4fa53ad76e4d8f1"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#acc589f71ca926b95d4fa53ad76e4d8f1">REG_SERCOM5_USART_INTFLAG</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43000418UL)</td></tr>
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<tr class="memdesc:acc589f71ca926b95d4fa53ad76e4d8f1"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) USART Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="separator:acc589f71ca926b95d4fa53ad76e4d8f1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5db75f5f2699111dd2b18caee6e50de6"><td class="memItemLeft" align="right" valign="top"><a id="a5db75f5f2699111dd2b18caee6e50de6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a5db75f5f2699111dd2b18caee6e50de6">REG_SERCOM5_USART_STATUS</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x4300041AUL)</td></tr>
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<tr class="memdesc:a5db75f5f2699111dd2b18caee6e50de6"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) USART Status <br /></td></tr>
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<tr class="separator:a5db75f5f2699111dd2b18caee6e50de6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab24ecaedcb5abcc9282e8b3ed7d2263a"><td class="memItemLeft" align="right" valign="top"><a id="ab24ecaedcb5abcc9282e8b3ed7d2263a"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#ab24ecaedcb5abcc9282e8b3ed7d2263a">REG_SERCOM5_USART_SYNCBUSY</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x4300041CUL)</td></tr>
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<tr class="memdesc:ab24ecaedcb5abcc9282e8b3ed7d2263a"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) USART Synchronization Busy <br /></td></tr>
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<tr class="separator:ab24ecaedcb5abcc9282e8b3ed7d2263a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a27d4eb24d6616810cb6947275c371ab7"><td class="memItemLeft" align="right" valign="top"><a id="a27d4eb24d6616810cb6947275c371ab7"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a27d4eb24d6616810cb6947275c371ab7">REG_SERCOM5_USART_RXERRCNT</a>   (*(<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> *)0x43000420UL)</td></tr>
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<tr class="memdesc:a27d4eb24d6616810cb6947275c371ab7"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) USART Receive Error Count <br /></td></tr>
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<tr class="separator:a27d4eb24d6616810cb6947275c371ab7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4eab1dcd27be1f24f5566be2e757ac75"><td class="memItemLeft" align="right" valign="top"><a id="a4eab1dcd27be1f24f5566be2e757ac75"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a4eab1dcd27be1f24f5566be2e757ac75">REG_SERCOM5_USART_LENGTH</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x43000422UL)</td></tr>
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<tr class="memdesc:a4eab1dcd27be1f24f5566be2e757ac75"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) USART Length <br /></td></tr>
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<tr class="separator:a4eab1dcd27be1f24f5566be2e757ac75"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ada4fe87a38180eb6d85018442701b2ea"><td class="memItemLeft" align="right" valign="top"><a id="ada4fe87a38180eb6d85018442701b2ea"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#ada4fe87a38180eb6d85018442701b2ea">REG_SERCOM5_USART_DATA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43000428UL)</td></tr>
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<tr class="memdesc:ada4fe87a38180eb6d85018442701b2ea"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) USART Data <br /></td></tr>
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<tr class="separator:ada4fe87a38180eb6d85018442701b2ea"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5210226c095561549a0937d60df2e150"><td class="memItemLeft" align="right" valign="top"><a id="a5210226c095561549a0937d60df2e150"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom5_8h.html#a5210226c095561549a0937d60df2e150">REG_SERCOM5_USART_DBGCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43000430UL)</td></tr>
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<tr class="memdesc:a5210226c095561549a0937d60df2e150"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM5) USART Debug Control <br /></td></tr>
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<tr class="separator:a5210226c095561549a0937d60df2e150"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7f5bd1c053c1879985b4b53e13838227"><td class="memItemLeft" align="right" valign="top"><a id="a7f5bd1c053c1879985b4b53e13838227"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_CLK_REDUCTION</b>   1</td></tr>
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<tr class="separator:a7f5bd1c053c1879985b4b53e13838227"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acb3003a6aced075ae7d1086475acfc92"><td class="memItemLeft" align="right" valign="top"><a id="acb3003a6aced075ae7d1086475acfc92"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_DLY_COMPENSATION</b>   1</td></tr>
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<tr class="separator:acb3003a6aced075ae7d1086475acfc92"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab89c196743b983f4b04821311f2be504"><td class="memItemLeft" align="right" valign="top"><a id="ab89c196743b983f4b04821311f2be504"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_DMA</b>   1</td></tr>
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<tr class="separator:ab89c196743b983f4b04821311f2be504"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a24944592fdfc7c0821841f8de96c30b0"><td class="memItemLeft" align="right" valign="top"><a id="a24944592fdfc7c0821841f8de96c30b0"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_DMAC_ID_RX</b>   14</td></tr>
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<tr class="separator:a24944592fdfc7c0821841f8de96c30b0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9c1d161a2cff0b7ecf94033780200841"><td class="memItemLeft" align="right" valign="top"><a id="a9c1d161a2cff0b7ecf94033780200841"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_DMAC_ID_TX</b>   15</td></tr>
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<tr class="separator:a9c1d161a2cff0b7ecf94033780200841"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa0142439970019d7730a8f611f36998f"><td class="memItemLeft" align="right" valign="top"><a id="aa0142439970019d7730a8f611f36998f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_FIFO_DEPTH_POWER</b>   1</td></tr>
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<tr class="separator:aa0142439970019d7730a8f611f36998f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac4ba41a2963bbd0e87e64f16560d67c5"><td class="memItemLeft" align="right" valign="top"><a id="ac4ba41a2963bbd0e87e64f16560d67c5"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_GCLK_ID_CORE</b>   35</td></tr>
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<tr class="separator:ac4ba41a2963bbd0e87e64f16560d67c5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aea8c02c0913a62da6c9f285836635cc0"><td class="memItemLeft" align="right" valign="top"><a id="aea8c02c0913a62da6c9f285836635cc0"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_GCLK_ID_SLOW</b>   3</td></tr>
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<tr class="separator:aea8c02c0913a62da6c9f285836635cc0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a77944c0a58eabd7771dd353ce36a13ef"><td class="memItemLeft" align="right" valign="top"><a id="a77944c0a58eabd7771dd353ce36a13ef"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_INT_MSB</b>   6</td></tr>
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<tr class="separator:a77944c0a58eabd7771dd353ce36a13ef"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a860c9138d9b5443ee1a10e3784a2d2bf"><td class="memItemLeft" align="right" valign="top"><a id="a860c9138d9b5443ee1a10e3784a2d2bf"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_I2CM</b>   1</td></tr>
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<tr class="separator:a860c9138d9b5443ee1a10e3784a2d2bf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a18bf86dcba0fb60ce0ddc0aa3e0dce2f"><td class="memItemLeft" align="right" valign="top"><a id="a18bf86dcba0fb60ce0ddc0aa3e0dce2f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_I2CS</b>   1</td></tr>
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<tr class="separator:a18bf86dcba0fb60ce0ddc0aa3e0dce2f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a63db6628c07bb69cb87ad955eef44550"><td class="memItemLeft" align="right" valign="top"><a id="a63db6628c07bb69cb87ad955eef44550"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_I2CS_AUTO_ACK</b>   1</td></tr>
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<tr class="separator:a63db6628c07bb69cb87ad955eef44550"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a647f8cb1ddbf3eb8d4ce6f5314a91572"><td class="memItemLeft" align="right" valign="top"><a id="a647f8cb1ddbf3eb8d4ce6f5314a91572"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_I2CS_GROUP_CMD</b>   1</td></tr>
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<tr class="separator:a647f8cb1ddbf3eb8d4ce6f5314a91572"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a366cb168ba419e8941c7c144c6970ca3"><td class="memItemLeft" align="right" valign="top"><a id="a366cb168ba419e8941c7c144c6970ca3"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_I2CS_SDASETUP_CNT_SIZE</b>   8</td></tr>
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<tr class="separator:a366cb168ba419e8941c7c144c6970ca3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae981e8ac1bca4d6fa610a8b04bc5eb07"><td class="memItemLeft" align="right" valign="top"><a id="ae981e8ac1bca4d6fa610a8b04bc5eb07"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_I2CS_SDASETUP_SIZE</b>   4</td></tr>
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<tr class="separator:ae981e8ac1bca4d6fa610a8b04bc5eb07"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6ae9d136d41ca10066fac217965447c2"><td class="memItemLeft" align="right" valign="top"><a id="a6ae9d136d41ca10066fac217965447c2"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_I2CS_SUDAT</b>   1</td></tr>
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<tr class="separator:a6ae9d136d41ca10066fac217965447c2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a19b2e48d15e1d2948bff18e7f49b76e9"><td class="memItemLeft" align="right" valign="top"><a id="a19b2e48d15e1d2948bff18e7f49b76e9"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_I2C_FASTMP</b>   1</td></tr>
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<tr class="separator:a19b2e48d15e1d2948bff18e7f49b76e9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a82cbb09a2de6cd4f77c25e352f0bedc0"><td class="memItemLeft" align="right" valign="top"><a id="a82cbb09a2de6cd4f77c25e352f0bedc0"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_I2C_HSMODE</b>   1</td></tr>
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<tr class="separator:a82cbb09a2de6cd4f77c25e352f0bedc0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aaa6a8aa6beefab087628e617666b9749"><td class="memItemLeft" align="right" valign="top"><a id="aaa6a8aa6beefab087628e617666b9749"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_I2C_SCLSM_MODE</b>   1</td></tr>
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<tr class="separator:aaa6a8aa6beefab087628e617666b9749"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abc20594dc20cde2fc408c69269e5a5e9"><td class="memItemLeft" align="right" valign="top"><a id="abc20594dc20cde2fc408c69269e5a5e9"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_I2C_SMB_TIMEOUTS</b>   1</td></tr>
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<tr class="separator:abc20594dc20cde2fc408c69269e5a5e9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a05e4bf18072b8a4475c7f3beda665a30"><td class="memItemLeft" align="right" valign="top"><a id="a05e4bf18072b8a4475c7f3beda665a30"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_I2C_TENBIT_ADR</b>   1</td></tr>
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<tr class="separator:a05e4bf18072b8a4475c7f3beda665a30"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a47e1aec57f57185b84cc1ddfcbb04e3b"><td class="memItemLeft" align="right" valign="top"><a id="a47e1aec57f57185b84cc1ddfcbb04e3b"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_PMSB</b>   3</td></tr>
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<tr class="separator:a47e1aec57f57185b84cc1ddfcbb04e3b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac795b1b0ad6b4a37ea1bb68351d1a9fe"><td class="memItemLeft" align="right" valign="top"><a id="ac795b1b0ad6b4a37ea1bb68351d1a9fe"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_RETENTION_SUPPORT</b>   0</td></tr>
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<tr class="separator:ac795b1b0ad6b4a37ea1bb68351d1a9fe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:accccf827607f8f9f445870bf67b0b30f"><td class="memItemLeft" align="right" valign="top"><a id="accccf827607f8f9f445870bf67b0b30f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_SE_CNT</b>   1</td></tr>
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<tr class="separator:accccf827607f8f9f445870bf67b0b30f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7f2940fb33af707a3d28e974286e8025"><td class="memItemLeft" align="right" valign="top"><a id="a7f2940fb33af707a3d28e974286e8025"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_SPI</b>   1</td></tr>
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<tr class="separator:a7f2940fb33af707a3d28e974286e8025"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7fc6fba420c406f65acb620e36cac2ca"><td class="memItemLeft" align="right" valign="top"><a id="a7fc6fba420c406f65acb620e36cac2ca"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_SPI_HW_SS_CTRL</b>   1</td></tr>
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<tr class="separator:a7fc6fba420c406f65acb620e36cac2ca"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4032a949d1834998f3c0e29aa956b306"><td class="memItemLeft" align="right" valign="top"><a id="a4032a949d1834998f3c0e29aa956b306"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_SPI_ICSPACE_EXT</b>   1</td></tr>
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<tr class="separator:a4032a949d1834998f3c0e29aa956b306"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1fdd7a4fe2d362904a2663d6ed142689"><td class="memItemLeft" align="right" valign="top"><a id="a1fdd7a4fe2d362904a2663d6ed142689"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_SPI_OZMO</b>   0</td></tr>
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<tr class="separator:a1fdd7a4fe2d362904a2663d6ed142689"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af9b410edf980afc4e1ad241e89550d91"><td class="memItemLeft" align="right" valign="top"><a id="af9b410edf980afc4e1ad241e89550d91"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_SPI_WAKE_ON_SSL</b>   1</td></tr>
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<tr class="separator:af9b410edf980afc4e1ad241e89550d91"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1bcf14c0d9ad06ee03650d61a60ee52a"><td class="memItemLeft" align="right" valign="top"><a id="a1bcf14c0d9ad06ee03650d61a60ee52a"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_TTBIT_EXTENSION</b>   1</td></tr>
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<tr class="separator:a1bcf14c0d9ad06ee03650d61a60ee52a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a21a2dd775a303201f754ce8f7546ab59"><td class="memItemLeft" align="right" valign="top"><a id="a21a2dd775a303201f754ce8f7546ab59"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_USART</b>   1</td></tr>
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<tr class="separator:a21a2dd775a303201f754ce8f7546ab59"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a47e75eac70abc97008b03db7eb2c551b"><td class="memItemLeft" align="right" valign="top"><a id="a47e75eac70abc97008b03db7eb2c551b"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_USART_AUTOBAUD</b>   1</td></tr>
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<tr class="separator:a47e75eac70abc97008b03db7eb2c551b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a283f85bd0873596d02e44a11a96db65e"><td class="memItemLeft" align="right" valign="top"><a id="a283f85bd0873596d02e44a11a96db65e"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_USART_COLDET</b>   1</td></tr>
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<tr class="separator:a283f85bd0873596d02e44a11a96db65e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a63411749064ddfa49a396877685eaa6c"><td class="memItemLeft" align="right" valign="top"><a id="a63411749064ddfa49a396877685eaa6c"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_USART_FLOW_CTRL</b>   1</td></tr>
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<tr class="separator:a63411749064ddfa49a396877685eaa6c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a852383ccc3d2bbfe370e1938035b75f7"><td class="memItemLeft" align="right" valign="top"><a id="a852383ccc3d2bbfe370e1938035b75f7"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_USART_FRAC_BAUD</b>   1</td></tr>
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<tr class="separator:a852383ccc3d2bbfe370e1938035b75f7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a713cc139e111d09c7a44a1413070854c"><td class="memItemLeft" align="right" valign="top"><a id="a713cc139e111d09c7a44a1413070854c"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_USART_IRDA</b>   1</td></tr>
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<tr class="separator:a713cc139e111d09c7a44a1413070854c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a224004b00e717a83361b05ad5e5cb748"><td class="memItemLeft" align="right" valign="top"><a id="a224004b00e717a83361b05ad5e5cb748"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_USART_ISO7816</b>   1</td></tr>
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<tr class="separator:a224004b00e717a83361b05ad5e5cb748"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a370ddb365b9e82d4bc934a080474ca5d"><td class="memItemLeft" align="right" valign="top"><a id="a370ddb365b9e82d4bc934a080474ca5d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_USART_LIN_MASTER</b>   1</td></tr>
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<tr class="separator:a370ddb365b9e82d4bc934a080474ca5d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2d68142784d0ac3b7f06850e8802993c"><td class="memItemLeft" align="right" valign="top"><a id="a2d68142784d0ac3b7f06850e8802993c"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_USART_RS485</b>   1</td></tr>
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<tr class="separator:a2d68142784d0ac3b7f06850e8802993c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a51cc13e8125bfac7da6d69f5458c3112"><td class="memItemLeft" align="right" valign="top"><a id="a51cc13e8125bfac7da6d69f5458c3112"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_USART_SAMPA_EXT</b>   1</td></tr>
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<tr class="separator:a51cc13e8125bfac7da6d69f5458c3112"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6bdd7ca675a3832c1aae51b8a1939c22"><td class="memItemLeft" align="right" valign="top"><a id="a6bdd7ca675a3832c1aae51b8a1939c22"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM5_USART_SAMPR_EXT</b>   1</td></tr>
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<tr class="separator:a6bdd7ca675a3832c1aae51b8a1939c22"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<div class="textblock"><p>Instance description for SERCOM5. </p>
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<p>Copyright (c) 2019 Microchip Technology Inc.</p>
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<p>\asf_license_start </p>
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<p class="definition">Definition in file <a class="el" href="sercom5_8h_source.html">sercom5.h</a>.</p>
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