Instance description for SERCOM5. More...

Macros
#define	REG_SERCOM5_I2CM_CTRLA ((RwReg )0x43000400UL)
	(SERCOM5) I2CM Control A

#define	REG_SERCOM5_I2CM_CTRLB ((RwReg )0x43000404UL)
	(SERCOM5) I2CM Control B

#define	REG_SERCOM5_I2CM_CTRLC ((RwReg )0x43000408UL)
	(SERCOM5) I2CM Control C

#define	REG_SERCOM5_I2CM_BAUD ((RwReg )0x4300040CUL)
	(SERCOM5) I2CM Baud Rate

#define	REG_SERCOM5_I2CM_INTENCLR ((RwReg8 )0x43000414UL)
	(SERCOM5) I2CM Interrupt Enable Clear

#define	REG_SERCOM5_I2CM_INTENSET ((RwReg8 )0x43000416UL)
	(SERCOM5) I2CM Interrupt Enable Set

#define	REG_SERCOM5_I2CM_INTFLAG ((RwReg8 )0x43000418UL)
	(SERCOM5) I2CM Interrupt Flag Status and Clear

#define	REG_SERCOM5_I2CM_STATUS ((RwReg16)0x4300041AUL)
	(SERCOM5) I2CM Status

#define	REG_SERCOM5_I2CM_SYNCBUSY ((RoReg )0x4300041CUL)
	(SERCOM5) I2CM Synchronization Busy

#define	REG_SERCOM5_I2CM_ADDR ((RwReg )0x43000424UL)
	(SERCOM5) I2CM Address

#define	REG_SERCOM5_I2CM_DATA ((RwReg )0x43000428UL)
	(SERCOM5) I2CM Data

#define	REG_SERCOM5_I2CM_DBGCTRL ((RwReg8 )0x43000430UL)
	(SERCOM5) I2CM Debug Control

#define	REG_SERCOM5_I2CS_CTRLA ((RwReg )0x43000400UL)
	(SERCOM5) I2CS Control A

#define	REG_SERCOM5_I2CS_CTRLB ((RwReg )0x43000404UL)
	(SERCOM5) I2CS Control B

#define	REG_SERCOM5_I2CS_CTRLC ((RwReg )0x43000408UL)
	(SERCOM5) I2CS Control C

#define	REG_SERCOM5_I2CS_INTENCLR ((RwReg8 )0x43000414UL)
	(SERCOM5) I2CS Interrupt Enable Clear

#define	REG_SERCOM5_I2CS_INTENSET ((RwReg8 )0x43000416UL)
	(SERCOM5) I2CS Interrupt Enable Set

#define	REG_SERCOM5_I2CS_INTFLAG ((RwReg8 )0x43000418UL)
	(SERCOM5) I2CS Interrupt Flag Status and Clear

#define	REG_SERCOM5_I2CS_STATUS ((RwReg16)0x4300041AUL)
	(SERCOM5) I2CS Status

#define	REG_SERCOM5_I2CS_SYNCBUSY ((RoReg )0x4300041CUL)
	(SERCOM5) I2CS Synchronization Busy

#define	REG_SERCOM5_I2CS_LENGTH ((RwReg16)0x43000422UL)
	(SERCOM5) I2CS Length

#define	REG_SERCOM5_I2CS_ADDR ((RwReg )0x43000424UL)
	(SERCOM5) I2CS Address

#define	REG_SERCOM5_I2CS_DATA ((RwReg )0x43000428UL)
	(SERCOM5) I2CS Data

#define	REG_SERCOM5_SPI_CTRLA ((RwReg )0x43000400UL)
	(SERCOM5) SPI Control A

#define	REG_SERCOM5_SPI_CTRLB ((RwReg )0x43000404UL)
	(SERCOM5) SPI Control B

#define	REG_SERCOM5_SPI_CTRLC ((RwReg )0x43000408UL)
	(SERCOM5) SPI Control C

#define	REG_SERCOM5_SPI_BAUD ((RwReg8 )0x4300040CUL)
	(SERCOM5) SPI Baud Rate

#define	REG_SERCOM5_SPI_INTENCLR ((RwReg8 )0x43000414UL)
	(SERCOM5) SPI Interrupt Enable Clear

#define	REG_SERCOM5_SPI_INTENSET ((RwReg8 )0x43000416UL)
	(SERCOM5) SPI Interrupt Enable Set

#define	REG_SERCOM5_SPI_INTFLAG ((RwReg8 )0x43000418UL)
	(SERCOM5) SPI Interrupt Flag Status and Clear

#define	REG_SERCOM5_SPI_STATUS ((RwReg16)0x4300041AUL)
	(SERCOM5) SPI Status

#define	REG_SERCOM5_SPI_SYNCBUSY ((RoReg )0x4300041CUL)
	(SERCOM5) SPI Synchronization Busy

#define	REG_SERCOM5_SPI_LENGTH ((RwReg16)0x43000422UL)
	(SERCOM5) SPI Length

#define	REG_SERCOM5_SPI_ADDR ((RwReg )0x43000424UL)
	(SERCOM5) SPI Address

#define	REG_SERCOM5_SPI_DATA ((RwReg )0x43000428UL)
	(SERCOM5) SPI Data

#define	REG_SERCOM5_SPI_DBGCTRL ((RwReg8 )0x43000430UL)
	(SERCOM5) SPI Debug Control

#define	REG_SERCOM5_USART_CTRLA ((RwReg )0x43000400UL)
	(SERCOM5) USART Control A

#define	REG_SERCOM5_USART_CTRLB ((RwReg )0x43000404UL)
	(SERCOM5) USART Control B

#define	REG_SERCOM5_USART_CTRLC ((RwReg )0x43000408UL)
	(SERCOM5) USART Control C

#define	REG_SERCOM5_USART_BAUD ((RwReg16)0x4300040CUL)
	(SERCOM5) USART Baud Rate

#define	REG_SERCOM5_USART_RXPL ((RwReg8 )0x4300040EUL)
	(SERCOM5) USART Receive Pulse Length

#define	REG_SERCOM5_USART_INTENCLR ((RwReg8 )0x43000414UL)
	(SERCOM5) USART Interrupt Enable Clear

#define	REG_SERCOM5_USART_INTENSET ((RwReg8 )0x43000416UL)
	(SERCOM5) USART Interrupt Enable Set

#define	REG_SERCOM5_USART_INTFLAG ((RwReg8 )0x43000418UL)
	(SERCOM5) USART Interrupt Flag Status and Clear

#define	REG_SERCOM5_USART_STATUS ((RwReg16)0x4300041AUL)
	(SERCOM5) USART Status

#define	REG_SERCOM5_USART_SYNCBUSY ((RoReg )0x4300041CUL)
	(SERCOM5) USART Synchronization Busy

#define	REG_SERCOM5_USART_RXERRCNT ((RoReg8 )0x43000420UL)
	(SERCOM5) USART Receive Error Count

#define	REG_SERCOM5_USART_LENGTH ((RwReg16)0x43000422UL)
	(SERCOM5) USART Length

#define	REG_SERCOM5_USART_DATA ((RwReg )0x43000428UL)
	(SERCOM5) USART Data

#define	REG_SERCOM5_USART_DBGCTRL ((RwReg8 )0x43000430UL)
	(SERCOM5) USART Debug Control

#define	SERCOM5_CLK_REDUCTION 1

#define	SERCOM5_DLY_COMPENSATION 1

#define	SERCOM5_DMA 1

#define	SERCOM5_DMAC_ID_RX 14

#define	SERCOM5_DMAC_ID_TX 15

#define	SERCOM5_FIFO_DEPTH_POWER 1

#define	SERCOM5_GCLK_ID_CORE 35

#define	SERCOM5_GCLK_ID_SLOW 3

#define	SERCOM5_INT_MSB 6

#define	SERCOM5_I2CM 1

#define	SERCOM5_I2CS 1

#define	SERCOM5_I2CS_AUTO_ACK 1

#define	SERCOM5_I2CS_GROUP_CMD 1

#define	SERCOM5_I2CS_SDASETUP_CNT_SIZE 8

#define	SERCOM5_I2CS_SDASETUP_SIZE 4

#define	SERCOM5_I2CS_SUDAT 1

#define	SERCOM5_I2C_FASTMP 1

#define	SERCOM5_I2C_HSMODE 1

#define	SERCOM5_I2C_SCLSM_MODE 1

#define	SERCOM5_I2C_SMB_TIMEOUTS 1

#define	SERCOM5_I2C_TENBIT_ADR 1

#define	SERCOM5_PMSB 3

#define	SERCOM5_RETENTION_SUPPORT 0

#define	SERCOM5_SE_CNT 1

#define	SERCOM5_SPI 1

#define	SERCOM5_SPI_HW_SS_CTRL 1

#define	SERCOM5_SPI_ICSPACE_EXT 1

#define	SERCOM5_SPI_OZMO 0

#define	SERCOM5_SPI_WAKE_ON_SSL 1

#define	SERCOM5_TTBIT_EXTENSION 1

#define	SERCOM5_USART 1

#define	SERCOM5_USART_AUTOBAUD 1

#define	SERCOM5_USART_COLDET 1

#define	SERCOM5_USART_FLOW_CTRL 1

#define	SERCOM5_USART_FRAC_BAUD 1

#define	SERCOM5_USART_IRDA 1

#define	SERCOM5_USART_ISO7816 1

#define	SERCOM5_USART_LIN_MASTER 1

#define	SERCOM5_USART_RS485 1

#define	SERCOM5_USART_SAMPA_EXT 1

#define	SERCOM5_USART_SAMPR_EXT 1

Detailed Description

Instance description for SERCOM5.

\asf_license_start

Definition in file sercom5.h.

Macros

Detailed Description