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<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_92b117bae75cf16a05ca7611db29e9c7.html">instance</a></li> </ul>
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<div class="title">sdhc0.h</div> </div>
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<div class="contents">
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<a href="sdhc0_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>  </div>
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<div class="line"><a name="l00030"></a><span class="lineno"> 30</span> <span class="preprocessor">#ifndef _SAME54_SDHC0_INSTANCE_</span></div>
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<div class="line"><a name="l00031"></a><span class="lineno"> 31</span> <span class="preprocessor">#define _SAME54_SDHC0_INSTANCE_</span></div>
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<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>  </div>
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<div class="line"><a name="l00033"></a><span class="lineno"> 33</span> <span class="comment">/* ========== Register definition for SDHC0 peripheral ========== */</span></div>
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<div class="line"><a name="l00034"></a><span class="lineno"> 34</span> <span class="preprocessor">#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
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<div class="line"><a name="l00035"></a><span class="lineno"> 35</span> <span class="preprocessor">#define REG_SDHC0_SSAR (0x45000000) </span></div>
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<div class="line"><a name="l00036"></a><span class="lineno"> 36</span> <span class="preprocessor">#define REG_SDHC0_BSR (0x45000004) </span></div>
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<div class="line"><a name="l00037"></a><span class="lineno"> 37</span> <span class="preprocessor">#define REG_SDHC0_BCR (0x45000006) </span></div>
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<div class="line"><a name="l00038"></a><span class="lineno"> 38</span> <span class="preprocessor">#define REG_SDHC0_ARG1R (0x45000008) </span></div>
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<div class="line"><a name="l00039"></a><span class="lineno"> 39</span> <span class="preprocessor">#define REG_SDHC0_TMR (0x4500000C) </span></div>
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<div class="line"><a name="l00040"></a><span class="lineno"> 40</span> <span class="preprocessor">#define REG_SDHC0_CR (0x4500000E) </span></div>
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<div class="line"><a name="l00041"></a><span class="lineno"> 41</span> <span class="preprocessor">#define REG_SDHC0_RR0 (0x45000010) </span></div>
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<div class="line"><a name="l00042"></a><span class="lineno"> 42</span> <span class="preprocessor">#define REG_SDHC0_RR1 (0x45000014) </span></div>
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<div class="line"><a name="l00043"></a><span class="lineno"> 43</span> <span class="preprocessor">#define REG_SDHC0_RR2 (0x45000018) </span></div>
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<div class="line"><a name="l00044"></a><span class="lineno"> 44</span> <span class="preprocessor">#define REG_SDHC0_RR3 (0x4500001C) </span></div>
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<div class="line"><a name="l00045"></a><span class="lineno"> 45</span> <span class="preprocessor">#define REG_SDHC0_BDPR (0x45000020) </span></div>
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<div class="line"><a name="l00046"></a><span class="lineno"> 46</span> <span class="preprocessor">#define REG_SDHC0_PSR (0x45000024) </span></div>
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<div class="line"><a name="l00047"></a><span class="lineno"> 47</span> <span class="preprocessor">#define REG_SDHC0_HC1R (0x45000028) </span></div>
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<div class="line"><a name="l00048"></a><span class="lineno"> 48</span> <span class="preprocessor">#define REG_SDHC0_PCR (0x45000029) </span></div>
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<div class="line"><a name="l00049"></a><span class="lineno"> 49</span> <span class="preprocessor">#define REG_SDHC0_BGCR (0x4500002A) </span></div>
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<div class="line"><a name="l00050"></a><span class="lineno"> 50</span> <span class="preprocessor">#define REG_SDHC0_WCR (0x4500002B) </span></div>
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<div class="line"><a name="l00051"></a><span class="lineno"> 51</span> <span class="preprocessor">#define REG_SDHC0_CCR (0x4500002C) </span></div>
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<div class="line"><a name="l00052"></a><span class="lineno"> 52</span> <span class="preprocessor">#define REG_SDHC0_TCR (0x4500002E) </span></div>
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<div class="line"><a name="l00053"></a><span class="lineno"> 53</span> <span class="preprocessor">#define REG_SDHC0_SRR (0x4500002F) </span></div>
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<div class="line"><a name="l00054"></a><span class="lineno"> 54</span> <span class="preprocessor">#define REG_SDHC0_NISTR (0x45000030) </span></div>
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<div class="line"><a name="l00055"></a><span class="lineno"> 55</span> <span class="preprocessor">#define REG_SDHC0_EISTR (0x45000032) </span></div>
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<div class="line"><a name="l00056"></a><span class="lineno"> 56</span> <span class="preprocessor">#define REG_SDHC0_NISTER (0x45000034) </span></div>
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<div class="line"><a name="l00057"></a><span class="lineno"> 57</span> <span class="preprocessor">#define REG_SDHC0_EISTER (0x45000036) </span></div>
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<div class="line"><a name="l00058"></a><span class="lineno"> 58</span> <span class="preprocessor">#define REG_SDHC0_NISIER (0x45000038) </span></div>
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<div class="line"><a name="l00059"></a><span class="lineno"> 59</span> <span class="preprocessor">#define REG_SDHC0_EISIER (0x4500003A) </span></div>
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<div class="line"><a name="l00060"></a><span class="lineno"> 60</span> <span class="preprocessor">#define REG_SDHC0_ACESR (0x4500003C) </span></div>
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<div class="line"><a name="l00061"></a><span class="lineno"> 61</span> <span class="preprocessor">#define REG_SDHC0_HC2R (0x4500003E) </span></div>
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<div class="line"><a name="l00062"></a><span class="lineno"> 62</span> <span class="preprocessor">#define REG_SDHC0_CA0R (0x45000040) </span></div>
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<div class="line"><a name="l00063"></a><span class="lineno"> 63</span> <span class="preprocessor">#define REG_SDHC0_CA1R (0x45000044) </span></div>
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<div class="line"><a name="l00064"></a><span class="lineno"> 64</span> <span class="preprocessor">#define REG_SDHC0_MCCAR (0x45000048) </span></div>
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<div class="line"><a name="l00065"></a><span class="lineno"> 65</span> <span class="preprocessor">#define REG_SDHC0_FERACES (0x45000050) </span></div>
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<div class="line"><a name="l00066"></a><span class="lineno"> 66</span> <span class="preprocessor">#define REG_SDHC0_FEREIS (0x45000052) </span></div>
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<div class="line"><a name="l00067"></a><span class="lineno"> 67</span> <span class="preprocessor">#define REG_SDHC0_AESR (0x45000054) </span></div>
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<div class="line"><a name="l00068"></a><span class="lineno"> 68</span> <span class="preprocessor">#define REG_SDHC0_ASAR0 (0x45000058) </span></div>
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<div class="line"><a name="l00069"></a><span class="lineno"> 69</span> <span class="preprocessor">#define REG_SDHC0_PVR0 (0x45000060) </span></div>
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<div class="line"><a name="l00070"></a><span class="lineno"> 70</span> <span class="preprocessor">#define REG_SDHC0_PVR1 (0x45000062) </span></div>
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<div class="line"><a name="l00071"></a><span class="lineno"> 71</span> <span class="preprocessor">#define REG_SDHC0_PVR2 (0x45000064) </span></div>
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<div class="line"><a name="l00072"></a><span class="lineno"> 72</span> <span class="preprocessor">#define REG_SDHC0_PVR3 (0x45000066) </span></div>
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<div class="line"><a name="l00073"></a><span class="lineno"> 73</span> <span class="preprocessor">#define REG_SDHC0_PVR4 (0x45000068) </span></div>
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<div class="line"><a name="l00074"></a><span class="lineno"> 74</span> <span class="preprocessor">#define REG_SDHC0_PVR5 (0x4500006A) </span></div>
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<div class="line"><a name="l00075"></a><span class="lineno"> 75</span> <span class="preprocessor">#define REG_SDHC0_PVR6 (0x4500006C) </span></div>
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<div class="line"><a name="l00076"></a><span class="lineno"> 76</span> <span class="preprocessor">#define REG_SDHC0_PVR7 (0x4500006E) </span></div>
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<div class="line"><a name="l00077"></a><span class="lineno"> 77</span> <span class="preprocessor">#define REG_SDHC0_SISR (0x450000FC) </span></div>
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<div class="line"><a name="l00078"></a><span class="lineno"> 78</span> <span class="preprocessor">#define REG_SDHC0_HCVR (0x450000FE) </span></div>
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<div class="line"><a name="l00079"></a><span class="lineno"> 79</span> <span class="preprocessor">#define REG_SDHC0_MC1R (0x45000204) </span></div>
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<div class="line"><a name="l00080"></a><span class="lineno"> 80</span> <span class="preprocessor">#define REG_SDHC0_MC2R (0x45000205) </span></div>
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<div class="line"><a name="l00081"></a><span class="lineno"> 81</span> <span class="preprocessor">#define REG_SDHC0_ACR (0x45000208) </span></div>
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<div class="line"><a name="l00082"></a><span class="lineno"> 82</span> <span class="preprocessor">#define REG_SDHC0_CC2R (0x4500020C) </span></div>
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<div class="line"><a name="l00083"></a><span class="lineno"> 83</span> <span class="preprocessor">#define REG_SDHC0_CACR (0x45000230) </span></div>
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<div class="line"><a name="l00084"></a><span class="lineno"> 84</span> <span class="preprocessor">#define REG_SDHC0_DBGR (0x45000234) </span></div>
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<div class="line"><a name="l00085"></a><span class="lineno"> 85</span> <span class="preprocessor">#else</span></div>
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<div class="line"><a name="l00086"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a3695cb2179c6ba0b73670c7c2a0e3ba0"> 86</a></span> <span class="preprocessor">#define REG_SDHC0_SSAR (*(RwReg *)0x45000000UL) </span></div>
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<div class="line"><a name="l00087"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a6e4a2e3551a2c80965626b8d50a99f25"> 87</a></span> <span class="preprocessor">#define REG_SDHC0_BSR (*(RwReg16*)0x45000004UL) </span></div>
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<div class="line"><a name="l00088"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#adb52791aa544884480994bfa6eb75fd0"> 88</a></span> <span class="preprocessor">#define REG_SDHC0_BCR (*(RwReg16*)0x45000006UL) </span></div>
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<div class="line"><a name="l00089"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#ad58d1f9c45f36e6fdf46312798880eae"> 89</a></span> <span class="preprocessor">#define REG_SDHC0_ARG1R (*(RwReg *)0x45000008UL) </span></div>
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<div class="line"><a name="l00090"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a7326f90f66f7ea6c5abc3a67808ee4c3"> 90</a></span> <span class="preprocessor">#define REG_SDHC0_TMR (*(RwReg16*)0x4500000CUL) </span></div>
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<div class="line"><a name="l00091"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#acebe2e5b7c8e5a606871e1ef2504dd7d"> 91</a></span> <span class="preprocessor">#define REG_SDHC0_CR (*(RwReg16*)0x4500000EUL) </span></div>
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<div class="line"><a name="l00092"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#ad3cd56a71426e6367a4d2c8009cc0f38"> 92</a></span> <span class="preprocessor">#define REG_SDHC0_RR0 (*(RoReg *)0x45000010UL) </span></div>
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<div class="line"><a name="l00093"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#af8e35725407edde52eb484ed948e6cd7"> 93</a></span> <span class="preprocessor">#define REG_SDHC0_RR1 (*(RoReg *)0x45000014UL) </span></div>
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<div class="line"><a name="l00094"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a455c7976200ddbf1fa9b6bca155828f7"> 94</a></span> <span class="preprocessor">#define REG_SDHC0_RR2 (*(RoReg *)0x45000018UL) </span></div>
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<div class="line"><a name="l00095"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a38420fbdc8db86ff4f5893b6caa335bb"> 95</a></span> <span class="preprocessor">#define REG_SDHC0_RR3 (*(RoReg *)0x4500001CUL) </span></div>
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<div class="line"><a name="l00096"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a59b4ced585ad7176acb3b92739724a5d"> 96</a></span> <span class="preprocessor">#define REG_SDHC0_BDPR (*(RwReg *)0x45000020UL) </span></div>
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<div class="line"><a name="l00097"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#ae714d8136f42942701851e84f9f8da83"> 97</a></span> <span class="preprocessor">#define REG_SDHC0_PSR (*(RoReg *)0x45000024UL) </span></div>
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<div class="line"><a name="l00098"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a06b3d080fd02861d1f5ecf1d4f22e462"> 98</a></span> <span class="preprocessor">#define REG_SDHC0_HC1R (*(RwReg8 *)0x45000028UL) </span></div>
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<div class="line"><a name="l00099"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a29bdc3880bc43b731a3daaa73cb68e84"> 99</a></span> <span class="preprocessor">#define REG_SDHC0_PCR (*(RwReg8 *)0x45000029UL) </span></div>
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<div class="line"><a name="l00100"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#aaccd503df351230a5db360fc1601d679"> 100</a></span> <span class="preprocessor">#define REG_SDHC0_BGCR (*(RwReg8 *)0x4500002AUL) </span></div>
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<div class="line"><a name="l00101"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a2ea595abf511c6c02adfec5714ab5fef"> 101</a></span> <span class="preprocessor">#define REG_SDHC0_WCR (*(RwReg8 *)0x4500002BUL) </span></div>
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<div class="line"><a name="l00102"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#ac75f9f32870dd366d220260ea3de9431"> 102</a></span> <span class="preprocessor">#define REG_SDHC0_CCR (*(RwReg16*)0x4500002CUL) </span></div>
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<div class="line"><a name="l00103"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a54d19d359e5f1a7008e8b06463a7227b"> 103</a></span> <span class="preprocessor">#define REG_SDHC0_TCR (*(RwReg8 *)0x4500002EUL) </span></div>
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<div class="line"><a name="l00104"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a846bdd51d47c4f9fb956cb94c4898d25"> 104</a></span> <span class="preprocessor">#define REG_SDHC0_SRR (*(RwReg8 *)0x4500002FUL) </span></div>
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<div class="line"><a name="l00105"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a22e5137d5a791d12287f400cc248a86e"> 105</a></span> <span class="preprocessor">#define REG_SDHC0_NISTR (*(RwReg16*)0x45000030UL) </span></div>
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<div class="line"><a name="l00106"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#afee4ce1af019f9525680c63bc11c66a5"> 106</a></span> <span class="preprocessor">#define REG_SDHC0_EISTR (*(RwReg16*)0x45000032UL) </span></div>
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<div class="line"><a name="l00107"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#af01e54658554c5ab36e8dbe6404afac2"> 107</a></span> <span class="preprocessor">#define REG_SDHC0_NISTER (*(RwReg16*)0x45000034UL) </span></div>
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<div class="line"><a name="l00108"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#ae42ad685b4c5eb512902caf3c7c28f5f"> 108</a></span> <span class="preprocessor">#define REG_SDHC0_EISTER (*(RwReg16*)0x45000036UL) </span></div>
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<div class="line"><a name="l00109"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#ab2f2ab02827eb11f4880d9b32e010d59"> 109</a></span> <span class="preprocessor">#define REG_SDHC0_NISIER (*(RwReg16*)0x45000038UL) </span></div>
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<div class="line"><a name="l00110"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a3c2cfb7ec143b61384b546293c68b3f9"> 110</a></span> <span class="preprocessor">#define REG_SDHC0_EISIER (*(RwReg16*)0x4500003AUL) </span></div>
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<div class="line"><a name="l00111"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a8219bd02b101c7bcd2af365c2a9fe481"> 111</a></span> <span class="preprocessor">#define REG_SDHC0_ACESR (*(RoReg16*)0x4500003CUL) </span></div>
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<div class="line"><a name="l00112"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#ab82e5a790d6ec89390c7d4aa5666db5f"> 112</a></span> <span class="preprocessor">#define REG_SDHC0_HC2R (*(RwReg16*)0x4500003EUL) </span></div>
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<div class="line"><a name="l00113"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a865e5cf75b21647416ba9c7ab514c409"> 113</a></span> <span class="preprocessor">#define REG_SDHC0_CA0R (*(RoReg *)0x45000040UL) </span></div>
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<div class="line"><a name="l00114"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a0b2de4fa31463afcad2c78a7dee8e30f"> 114</a></span> <span class="preprocessor">#define REG_SDHC0_CA1R (*(RoReg *)0x45000044UL) </span></div>
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<div class="line"><a name="l00115"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a802640cecf001888af7a8542d200717a"> 115</a></span> <span class="preprocessor">#define REG_SDHC0_MCCAR (*(RoReg *)0x45000048UL) </span></div>
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<div class="line"><a name="l00116"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#af4b154a9e23d23b3d295a225886ff3db"> 116</a></span> <span class="preprocessor">#define REG_SDHC0_FERACES (*(WoReg16*)0x45000050UL) </span></div>
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<div class="line"><a name="l00117"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a113f41481ffa3737bcfa7fc77bcb393c"> 117</a></span> <span class="preprocessor">#define REG_SDHC0_FEREIS (*(WoReg16*)0x45000052UL) </span></div>
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<div class="line"><a name="l00118"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#abbeb89ce1658423d64509263c505e5ed"> 118</a></span> <span class="preprocessor">#define REG_SDHC0_AESR (*(RoReg8 *)0x45000054UL) </span></div>
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<div class="line"><a name="l00119"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a01b67e59d23e1bf5d51c1455c71cbf9d"> 119</a></span> <span class="preprocessor">#define REG_SDHC0_ASAR0 (*(RwReg *)0x45000058UL) </span></div>
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<div class="line"><a name="l00120"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a5ededed3623b008b851d6013b71385df"> 120</a></span> <span class="preprocessor">#define REG_SDHC0_PVR0 (*(RwReg16*)0x45000060UL) </span></div>
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<div class="line"><a name="l00121"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#aa7f687a5f11f86ca6bbdded8220b3a3f"> 121</a></span> <span class="preprocessor">#define REG_SDHC0_PVR1 (*(RwReg16*)0x45000062UL) </span></div>
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<div class="line"><a name="l00122"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#ae42ac93bc95d1843a9e00f8a080a9abc"> 122</a></span> <span class="preprocessor">#define REG_SDHC0_PVR2 (*(RwReg16*)0x45000064UL) </span></div>
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<div class="line"><a name="l00123"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#ac7200583b01b1c23e10721ada67dfb42"> 123</a></span> <span class="preprocessor">#define REG_SDHC0_PVR3 (*(RwReg16*)0x45000066UL) </span></div>
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<div class="line"><a name="l00124"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#af32132b4d1bd45e6034f43e9e29ff786"> 124</a></span> <span class="preprocessor">#define REG_SDHC0_PVR4 (*(RwReg16*)0x45000068UL) </span></div>
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<div class="line"><a name="l00125"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a83ffc2c8ee862aac765e29a5ef691967"> 125</a></span> <span class="preprocessor">#define REG_SDHC0_PVR5 (*(RwReg16*)0x4500006AUL) </span></div>
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<div class="line"><a name="l00126"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a820e282b1a4a9322e476758aca91afdc"> 126</a></span> <span class="preprocessor">#define REG_SDHC0_PVR6 (*(RwReg16*)0x4500006CUL) </span></div>
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<div class="line"><a name="l00127"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#aa603acee5c06a96653d8f7aadbae7bc3"> 127</a></span> <span class="preprocessor">#define REG_SDHC0_PVR7 (*(RwReg16*)0x4500006EUL) </span></div>
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<div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a3cf10b105f2388cf57b4c2a9c483dbba"> 128</a></span> <span class="preprocessor">#define REG_SDHC0_SISR (*(RoReg16*)0x450000FCUL) </span></div>
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<div class="line"><a name="l00129"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#aec1b9dfc99591aca10aec7dcff241912"> 129</a></span> <span class="preprocessor">#define REG_SDHC0_HCVR (*(RoReg16*)0x450000FEUL) </span></div>
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<div class="line"><a name="l00130"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a16d94bce19764c546698dee52d72c33c"> 130</a></span> <span class="preprocessor">#define REG_SDHC0_MC1R (*(RwReg8 *)0x45000204UL) </span></div>
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<div class="line"><a name="l00131"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a293c2130e7b0235b4b2dd126de440343"> 131</a></span> <span class="preprocessor">#define REG_SDHC0_MC2R (*(WoReg8 *)0x45000205UL) </span></div>
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<div class="line"><a name="l00132"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a4d95eb39eecfb3662e5da58c0b6caead"> 132</a></span> <span class="preprocessor">#define REG_SDHC0_ACR (*(RwReg *)0x45000208UL) </span></div>
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<div class="line"><a name="l00133"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a05190211f9e011750ee27a84d2691bad"> 133</a></span> <span class="preprocessor">#define REG_SDHC0_CC2R (*(RwReg *)0x4500020CUL) </span></div>
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<div class="line"><a name="l00134"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a31f207b7486da4fe61b6f3ee94216a1f"> 134</a></span> <span class="preprocessor">#define REG_SDHC0_CACR (*(RwReg *)0x45000230UL) </span></div>
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<div class="line"><a name="l00135"></a><span class="lineno"><a class="line" href="sdhc0_8h.html#a9f8587caee794d6f4e61f49cdbadf394"> 135</a></span> <span class="preprocessor">#define REG_SDHC0_DBGR (*(RwReg8 *)0x45000234UL) </span></div>
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<div class="line"><a name="l00136"></a><span class="lineno"> 136</span> <span class="preprocessor">#endif </span><span class="comment">/* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00137"></a><span class="lineno"> 137</span>  </div>
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<div class="line"><a name="l00138"></a><span class="lineno"> 138</span> <span class="comment">/* ========== Instance parameters for SDHC0 peripheral ========== */</span></div>
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<div class="line"><a name="l00139"></a><span class="lineno"> 139</span> <span class="preprocessor">#define SDHC0_CARD_DATA_SIZE 4 </span></div>
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<div class="line"><a name="l00140"></a><span class="lineno"> 140</span> <span class="preprocessor">#define SDHC0_CLK_AHB_ID 15 </span></div>
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<div class="line"><a name="l00141"></a><span class="lineno"> 141</span> <span class="preprocessor">#define SDHC0_GCLK_ID 45 </span></div>
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<div class="line"><a name="l00142"></a><span class="lineno"> 142</span> <span class="preprocessor">#define SDHC0_GCLK_ID_SLOW 3 </span></div>
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<div class="line"><a name="l00143"></a><span class="lineno"> 143</span> <span class="preprocessor">#define SDHC0_NB_OF_DEVICES 1 </span></div>
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<div class="line"><a name="l00144"></a><span class="lineno"> 144</span> <span class="preprocessor">#define SDHC0_NB_REG_PVR 8 </span></div>
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<div class="line"><a name="l00145"></a><span class="lineno"> 145</span> <span class="preprocessor">#define SDHC0_NB_REG_RR 4 </span></div>
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<div class="line"><a name="l00146"></a><span class="lineno"> 146</span>  </div>
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<div class="line"><a name="l00147"></a><span class="lineno"> 147</span> <span class="preprocessor">#endif </span><span class="comment">/* _SAME54_SDHC0_INSTANCE_ */</span><span class="preprocessor"></span></div>
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