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#ifndef _SAME54_CCL_COMPONENT_

#define _SAME54_CCL_COMPONENT_


/* ========================================================================== */

/* ========================================================================== */


#define CCL_U2225

#define REV_CCL                     0x110


/* -------- CCL_CTRL : (CCL Offset: 0x0) (R/W  8) Control -------- */

#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))

typedef union {

  struct {

    uint8_t  SWRST:1;

    uint8_t  ENABLE:1;

    uint8_t  :4;

    uint8_t  RUNSTDBY:1;

    uint8_t  :1;

  } bit;

  uint8_t reg;

} CCL_CTRL_Type;

#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */


#define CCL_CTRL_OFFSET             0x0

#define CCL_CTRL_RESETVALUE         _U_(0x00)

#define CCL_CTRL_SWRST_Pos          0

#define CCL_CTRL_SWRST              (_U_(0x1) << CCL_CTRL_SWRST_Pos)

#define CCL_CTRL_ENABLE_Pos         1

#define CCL_CTRL_ENABLE             (_U_(0x1) << CCL_CTRL_ENABLE_Pos)

#define CCL_CTRL_RUNSTDBY_Pos       6

#define CCL_CTRL_RUNSTDBY           (_U_(0x1) << CCL_CTRL_RUNSTDBY_Pos)

#define CCL_CTRL_MASK               _U_(0x43)

/* -------- CCL_SEQCTRL : (CCL Offset: 0x4) (R/W  8) SEQ Control x -------- */

#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))

typedef union {

  struct {

    uint8_t  SEQSEL:4;

    uint8_t  :4;

  } bit;

  uint8_t reg;

} CCL_SEQCTRL_Type;

#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */


#define CCL_SEQCTRL_OFFSET          0x4

#define CCL_SEQCTRL_RESETVALUE      _U_(0x00)

#define CCL_SEQCTRL_SEQSEL_Pos      0

#define CCL_SEQCTRL_SEQSEL_Msk      (_U_(0xF) << CCL_SEQCTRL_SEQSEL_Pos)

#define CCL_SEQCTRL_SEQSEL(value)   (CCL_SEQCTRL_SEQSEL_Msk & ((value) << CCL_SEQCTRL_SEQSEL_Pos))

#define   CCL_SEQCTRL_SEQSEL_DISABLE_Val  _U_(0x0)

#define   CCL_SEQCTRL_SEQSEL_DFF_Val      _U_(0x1)

#define   CCL_SEQCTRL_SEQSEL_JK_Val       _U_(0x2)

#define   CCL_SEQCTRL_SEQSEL_LATCH_Val    _U_(0x3)

#define   CCL_SEQCTRL_SEQSEL_RS_Val       _U_(0x4)

#define CCL_SEQCTRL_SEQSEL_DISABLE  (CCL_SEQCTRL_SEQSEL_DISABLE_Val << CCL_SEQCTRL_SEQSEL_Pos)

#define CCL_SEQCTRL_SEQSEL_DFF      (CCL_SEQCTRL_SEQSEL_DFF_Val    << CCL_SEQCTRL_SEQSEL_Pos)

#define CCL_SEQCTRL_SEQSEL_JK       (CCL_SEQCTRL_SEQSEL_JK_Val     << CCL_SEQCTRL_SEQSEL_Pos)

#define CCL_SEQCTRL_SEQSEL_LATCH    (CCL_SEQCTRL_SEQSEL_LATCH_Val  << CCL_SEQCTRL_SEQSEL_Pos)

#define CCL_SEQCTRL_SEQSEL_RS       (CCL_SEQCTRL_SEQSEL_RS_Val     << CCL_SEQCTRL_SEQSEL_Pos)

#define CCL_SEQCTRL_MASK            _U_(0x0F)

/* -------- CCL_LUTCTRL : (CCL Offset: 0x8) (R/W 32) LUT Control x -------- */

#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))

typedef union {

  struct {

    uint32_t :1;

    uint32_t ENABLE:1;

    uint32_t :2;

    uint32_t FILTSEL:2;

    uint32_t :1;

    uint32_t EDGESEL:1;

    uint32_t INSEL0:4;

    uint32_t INSEL1:4;

    uint32_t INSEL2:4;

    uint32_t INVEI:1;

    uint32_t LUTEI:1;

    uint32_t LUTEO:1;

    uint32_t :1;

    uint32_t TRUTH:8;

  } bit;

  uint32_t reg;

} CCL_LUTCTRL_Type;

#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */


#define CCL_LUTCTRL_OFFSET          0x8

#define CCL_LUTCTRL_RESETVALUE      _U_(0x00000000)

#define CCL_LUTCTRL_ENABLE_Pos      1

#define CCL_LUTCTRL_ENABLE          (_U_(0x1) << CCL_LUTCTRL_ENABLE_Pos)

#define CCL_LUTCTRL_FILTSEL_Pos     4

#define CCL_LUTCTRL_FILTSEL_Msk     (_U_(0x3) << CCL_LUTCTRL_FILTSEL_Pos)

#define CCL_LUTCTRL_FILTSEL(value)  (CCL_LUTCTRL_FILTSEL_Msk & ((value) << CCL_LUTCTRL_FILTSEL_Pos))

#define   CCL_LUTCTRL_FILTSEL_DISABLE_Val _U_(0x0)

#define   CCL_LUTCTRL_FILTSEL_SYNCH_Val   _U_(0x1)

#define   CCL_LUTCTRL_FILTSEL_FILTER_Val  _U_(0x2)

#define CCL_LUTCTRL_FILTSEL_DISABLE (CCL_LUTCTRL_FILTSEL_DISABLE_Val << CCL_LUTCTRL_FILTSEL_Pos)

#define CCL_LUTCTRL_FILTSEL_SYNCH   (CCL_LUTCTRL_FILTSEL_SYNCH_Val << CCL_LUTCTRL_FILTSEL_Pos)

#define CCL_LUTCTRL_FILTSEL_FILTER  (CCL_LUTCTRL_FILTSEL_FILTER_Val << CCL_LUTCTRL_FILTSEL_Pos)

#define CCL_LUTCTRL_EDGESEL_Pos     7

#define CCL_LUTCTRL_EDGESEL         (_U_(0x1) << CCL_LUTCTRL_EDGESEL_Pos)

#define CCL_LUTCTRL_INSEL0_Pos      8

#define CCL_LUTCTRL_INSEL0_Msk      (_U_(0xF) << CCL_LUTCTRL_INSEL0_Pos)

#define CCL_LUTCTRL_INSEL0(value)   (CCL_LUTCTRL_INSEL0_Msk & ((value) << CCL_LUTCTRL_INSEL0_Pos))

#define   CCL_LUTCTRL_INSEL0_MASK_Val     _U_(0x0)

#define   CCL_LUTCTRL_INSEL0_FEEDBACK_Val _U_(0x1)

#define   CCL_LUTCTRL_INSEL0_LINK_Val     _U_(0x2)

#define   CCL_LUTCTRL_INSEL0_EVENT_Val    _U_(0x3)

#define   CCL_LUTCTRL_INSEL0_IO_Val       _U_(0x4)

#define   CCL_LUTCTRL_INSEL0_AC_Val       _U_(0x5)

#define   CCL_LUTCTRL_INSEL0_TC_Val       _U_(0x6)

#define   CCL_LUTCTRL_INSEL0_ALTTC_Val    _U_(0x7)

#define   CCL_LUTCTRL_INSEL0_TCC_Val      _U_(0x8)

#define   CCL_LUTCTRL_INSEL0_SERCOM_Val   _U_(0x9)

#define CCL_LUTCTRL_INSEL0_MASK     (CCL_LUTCTRL_INSEL0_MASK_Val   << CCL_LUTCTRL_INSEL0_Pos)

#define CCL_LUTCTRL_INSEL0_FEEDBACK (CCL_LUTCTRL_INSEL0_FEEDBACK_Val << CCL_LUTCTRL_INSEL0_Pos)

#define CCL_LUTCTRL_INSEL0_LINK     (CCL_LUTCTRL_INSEL0_LINK_Val   << CCL_LUTCTRL_INSEL0_Pos)

#define CCL_LUTCTRL_INSEL0_EVENT    (CCL_LUTCTRL_INSEL0_EVENT_Val  << CCL_LUTCTRL_INSEL0_Pos)

#define CCL_LUTCTRL_INSEL0_IO       (CCL_LUTCTRL_INSEL0_IO_Val     << CCL_LUTCTRL_INSEL0_Pos)

#define CCL_LUTCTRL_INSEL0_AC       (CCL_LUTCTRL_INSEL0_AC_Val     << CCL_LUTCTRL_INSEL0_Pos)

#define CCL_LUTCTRL_INSEL0_TC       (CCL_LUTCTRL_INSEL0_TC_Val     << CCL_LUTCTRL_INSEL0_Pos)

#define CCL_LUTCTRL_INSEL0_ALTTC    (CCL_LUTCTRL_INSEL0_ALTTC_Val  << CCL_LUTCTRL_INSEL0_Pos)

#define CCL_LUTCTRL_INSEL0_TCC      (CCL_LUTCTRL_INSEL0_TCC_Val    << CCL_LUTCTRL_INSEL0_Pos)

#define CCL_LUTCTRL_INSEL0_SERCOM   (CCL_LUTCTRL_INSEL0_SERCOM_Val << CCL_LUTCTRL_INSEL0_Pos)

#define CCL_LUTCTRL_INSEL1_Pos      12

#define CCL_LUTCTRL_INSEL1_Msk      (_U_(0xF) << CCL_LUTCTRL_INSEL1_Pos)

#define CCL_LUTCTRL_INSEL1(value)   (CCL_LUTCTRL_INSEL1_Msk & ((value) << CCL_LUTCTRL_INSEL1_Pos))

#define   CCL_LUTCTRL_INSEL1_MASK_Val     _U_(0x0)

#define   CCL_LUTCTRL_INSEL1_FEEDBACK_Val _U_(0x1)

#define   CCL_LUTCTRL_INSEL1_LINK_Val     _U_(0x2)

#define   CCL_LUTCTRL_INSEL1_EVENT_Val    _U_(0x3)

#define   CCL_LUTCTRL_INSEL1_IO_Val       _U_(0x4)

#define   CCL_LUTCTRL_INSEL1_AC_Val       _U_(0x5)

#define   CCL_LUTCTRL_INSEL1_TC_Val       _U_(0x6)

#define   CCL_LUTCTRL_INSEL1_ALTTC_Val    _U_(0x7)

#define   CCL_LUTCTRL_INSEL1_TCC_Val      _U_(0x8)

#define   CCL_LUTCTRL_INSEL1_SERCOM_Val   _U_(0x9)

#define CCL_LUTCTRL_INSEL1_MASK     (CCL_LUTCTRL_INSEL1_MASK_Val   << CCL_LUTCTRL_INSEL1_Pos)

#define CCL_LUTCTRL_INSEL1_FEEDBACK (CCL_LUTCTRL_INSEL1_FEEDBACK_Val << CCL_LUTCTRL_INSEL1_Pos)

#define CCL_LUTCTRL_INSEL1_LINK     (CCL_LUTCTRL_INSEL1_LINK_Val   << CCL_LUTCTRL_INSEL1_Pos)

#define CCL_LUTCTRL_INSEL1_EVENT    (CCL_LUTCTRL_INSEL1_EVENT_Val  << CCL_LUTCTRL_INSEL1_Pos)

#define CCL_LUTCTRL_INSEL1_IO       (CCL_LUTCTRL_INSEL1_IO_Val     << CCL_LUTCTRL_INSEL1_Pos)

#define CCL_LUTCTRL_INSEL1_AC       (CCL_LUTCTRL_INSEL1_AC_Val     << CCL_LUTCTRL_INSEL1_Pos)

#define CCL_LUTCTRL_INSEL1_TC       (CCL_LUTCTRL_INSEL1_TC_Val     << CCL_LUTCTRL_INSEL1_Pos)

#define CCL_LUTCTRL_INSEL1_ALTTC    (CCL_LUTCTRL_INSEL1_ALTTC_Val  << CCL_LUTCTRL_INSEL1_Pos)

#define CCL_LUTCTRL_INSEL1_TCC      (CCL_LUTCTRL_INSEL1_TCC_Val    << CCL_LUTCTRL_INSEL1_Pos)

#define CCL_LUTCTRL_INSEL1_SERCOM   (CCL_LUTCTRL_INSEL1_SERCOM_Val << CCL_LUTCTRL_INSEL1_Pos)

#define CCL_LUTCTRL_INSEL2_Pos      16

#define CCL_LUTCTRL_INSEL2_Msk      (_U_(0xF) << CCL_LUTCTRL_INSEL2_Pos)

#define CCL_LUTCTRL_INSEL2(value)   (CCL_LUTCTRL_INSEL2_Msk & ((value) << CCL_LUTCTRL_INSEL2_Pos))

#define   CCL_LUTCTRL_INSEL2_MASK_Val     _U_(0x0)

#define   CCL_LUTCTRL_INSEL2_FEEDBACK_Val _U_(0x1)

#define   CCL_LUTCTRL_INSEL2_LINK_Val     _U_(0x2)

#define   CCL_LUTCTRL_INSEL2_EVENT_Val    _U_(0x3)

#define   CCL_LUTCTRL_INSEL2_IO_Val       _U_(0x4)

#define   CCL_LUTCTRL_INSEL2_AC_Val       _U_(0x5)

#define   CCL_LUTCTRL_INSEL2_TC_Val       _U_(0x6)

#define   CCL_LUTCTRL_INSEL2_ALTTC_Val    _U_(0x7)

#define   CCL_LUTCTRL_INSEL2_TCC_Val      _U_(0x8)

#define   CCL_LUTCTRL_INSEL2_SERCOM_Val   _U_(0x9)

#define CCL_LUTCTRL_INSEL2_MASK     (CCL_LUTCTRL_INSEL2_MASK_Val   << CCL_LUTCTRL_INSEL2_Pos)

#define CCL_LUTCTRL_INSEL2_FEEDBACK (CCL_LUTCTRL_INSEL2_FEEDBACK_Val << CCL_LUTCTRL_INSEL2_Pos)

#define CCL_LUTCTRL_INSEL2_LINK     (CCL_LUTCTRL_INSEL2_LINK_Val   << CCL_LUTCTRL_INSEL2_Pos)

#define CCL_LUTCTRL_INSEL2_EVENT    (CCL_LUTCTRL_INSEL2_EVENT_Val  << CCL_LUTCTRL_INSEL2_Pos)

#define CCL_LUTCTRL_INSEL2_IO       (CCL_LUTCTRL_INSEL2_IO_Val     << CCL_LUTCTRL_INSEL2_Pos)

#define CCL_LUTCTRL_INSEL2_AC       (CCL_LUTCTRL_INSEL2_AC_Val     << CCL_LUTCTRL_INSEL2_Pos)

#define CCL_LUTCTRL_INSEL2_TC       (CCL_LUTCTRL_INSEL2_TC_Val     << CCL_LUTCTRL_INSEL2_Pos)

#define CCL_LUTCTRL_INSEL2_ALTTC    (CCL_LUTCTRL_INSEL2_ALTTC_Val  << CCL_LUTCTRL_INSEL2_Pos)

#define CCL_LUTCTRL_INSEL2_TCC      (CCL_LUTCTRL_INSEL2_TCC_Val    << CCL_LUTCTRL_INSEL2_Pos)

#define CCL_LUTCTRL_INSEL2_SERCOM   (CCL_LUTCTRL_INSEL2_SERCOM_Val << CCL_LUTCTRL_INSEL2_Pos)

#define CCL_LUTCTRL_INVEI_Pos       20

#define CCL_LUTCTRL_INVEI           (_U_(0x1) << CCL_LUTCTRL_INVEI_Pos)

#define CCL_LUTCTRL_LUTEI_Pos       21

#define CCL_LUTCTRL_LUTEI           (_U_(0x1) << CCL_LUTCTRL_LUTEI_Pos)

#define CCL_LUTCTRL_LUTEO_Pos       22

#define CCL_LUTCTRL_LUTEO           (_U_(0x1) << CCL_LUTCTRL_LUTEO_Pos)

#define CCL_LUTCTRL_TRUTH_Pos       24

#define CCL_LUTCTRL_TRUTH_Msk       (_U_(0xFF) << CCL_LUTCTRL_TRUTH_Pos)

#define CCL_LUTCTRL_TRUTH(value)    (CCL_LUTCTRL_TRUTH_Msk & ((value) << CCL_LUTCTRL_TRUTH_Pos))

#define CCL_LUTCTRL_MASK            _U_(0xFF7FFFB2)

#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))

typedef struct {

  __IO CCL_CTRL_Type             CTRL;

       RoReg8                    Reserved1[0x3];

  __IO CCL_SEQCTRL_Type          SEQCTRL[2];

       RoReg8                    Reserved2[0x2];

  __IO CCL_LUTCTRL_Type          LUTCTRL[4];

} Ccl;

#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */


#endif /* _SAME54_CCL_COMPONENT_ */