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ePenguin-Software-Framework
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migrating again? not sure why this didn't go through

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stable
Penguin 3 years ago
parent b30da262c3
commit 17ce76defd
1692 changed files with 12 additions and 582065 deletions
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20
arch/arm/SAME54/SAME54A/manifest/same54a.toml
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@ -1,11 +1,11 @@
[esf.links]
common = "arch/arm/common"
mcu = "arch/arm/SAME54/SAME54A/mcu/"
ld = "arch/arm/SAME54/SAME54A/ld/"
cfg = "arch/arm/SAME54/SAME54A/manifest/"
[esf.includes]
IGLOO_INCLUDES = ["sam.h"]
[esf]
name = "${TARGET}"
links = ["arch/arm/common", "arch/arm/SAME54/SAME54A/mcu",
"arch/arm/SAME54/SAME54A/ld"]
includes = ["sam.h"]
scripts = ["arch/arm/SAME54/SAME54A/scripts/${TARGET}.cfg", "scripts/push.gdb",
"scripts/debug.gdb"]
series = "arch.arm.same54a.${TARGET}"
# These are defaults. Once a project is generated, the .cfg can be freely edited without fear of anything being overwritten. However, I do not recommend editing any of the _cfg variables.
[esf.openocd]
scripts = "arch/arm/SAME54/SAME54A/scripts/"
[user]
# Add user config options here

2
manifest/make-manifest.toml
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@ -207,6 +207,8 @@ OBJS = ["esf/arm/SAME54/SAME54A/mcu/src/startup_same54.o",
"esf/arm/SAME54/SAME54A/mcu/src/system_same54.o"]
CFLAGS = ["-D$(MCU)", "-mcpu=$(MCPU)"]
ELF_FLAGS = ["-D$(MCU)", "-mcpu=$(MCPU)"]
DIR_INCLUDES = ["-I$(QUOTE)../../../esf/arm/SAME54/SAME54A/mcu/inc$(QUOTE)"]
LD_PATH = "../../../esf/arm/SAME54/SAME54A/ld"
[arch.arm.same54a.same54n19a]
MCU = "__SAME54N19A__"

0
test.txt
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8
test/same54p20a_test/.dir-locals.el
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((c-mode . ((helm-make-build-dir . ".igloo/target/same54p20a")
(lsp-clients-clangd-args . ("--query-driver=/usr/bin/arm-none-eabi-gcc"
"--compile-commands-dir=.igloo/target/same54p20a/"
"--pch-storage=memory"
"--background-index"
"-j=4"
))
)))

15
test/same54p20a_test/.igloo/target/same54p20a/.gitignore vendored
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@ -1,15 +0,0 @@
*
!gcc
!gcc/same54p20a_flash.ld
!gcc/same54p20a_sram.ld
!gcc/startup_same54.c
!scripts
!scripts/push.gdb
!scripts/debug.gdb
!scripts/same54p20a.cfg
!scripts/bmdebug.gdb
!scripts/bmpush.gdb
!.gitignore
!system_same54.c
!Makefile

219
test/same54p20a_test/.igloo/target/same54p20a/Makefile
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@ -1,219 +0,0 @@
# ePenguin Generated Variables
PROJECT_NAME=same54p20a_test
TARGET_NAME=same54p20a
TOOLCHAIN=${ESF_DIR}/toolchains/arm-none-eabi-toolchain/bin/arm-none-eabi
CC=${TOOLCHAIN}-gcc
CXX=${TOOLCHAIN}-g++
OBJCOPY=${TOOLCHAIN}-objcopy
OBJDUMP=${TOOLCHAIN}-objdump
GDB=${TOOLCHAIN}-gdb-py
SIZE=${TOOLCHAIN}-size
AS=${TOOLCHAIN}-as
MCPU=cortex-m4
MCU=__SAME54P20A__
LD_PATH=../../../ESF/ld
LD_SCRIPT=$(LD_PATH)/same54p20a_flash.ld
CFLAGS= \
-D$(MCU) \
-mcpu=$(MCPU) \
-x c \
-DDEBUG \
-Os \
-g3 \
-Wall \
-c \
-std=gnu99 \
$(DIR_INCLUDES) \
-MD -MP \
-MF$(QUOTE)$(@:%.o=%.d)$(QUOTE) \
-MT$(QUOTE)$(@:%.o=%.d)$(QUOTE) \
-MT$(QUOTE)$(@:%.o=%.o)$(QUOTE)
ELF_FLAGS= \
$(DIR_INCLUDES) \
-D$(MCU) \
-mcpu=$(MCPU) \
-Wl,--start-group -l m \
-Wl,--end-group -mthumb \
-Wl,-Map=$(QUOTE)$(PROJECT_NAME).map$(QUOTE) \
--specs=nano.specs \
-Wl,--gc-sections \
-T$(QUOTE)$(LD_SCRIPT)$(QUOTE) \
-L$(QUOTE)$(LD_PATH)$(QUOTE)
HEX_FLAGS= \
-R .eeprom \
-R .fuse \
-R .lock \
-R .signature
EEP_FLAGS= \
-j .eeprom --set-section-flags=.eeprom=alloc,load \
--change-section-lma \
.eeprom=0 \
--no-change-warnings
ifdef SystemRoot
SHELL = cmd.exe
MK_DIR = mkdir
else
ifeq ($(shell uname), Linux)
MK_DIR = mkdir -p
endif
ifeq ($(shell uname | cut -d _ -f 1), CYGWIN)
MK_DIR = mkdir -p
endif
ifeq ($(shell uname | cut -d _ -f 1), MINGW32)
MK_DIR = mkdir -p
endif
ifeq ($(shell uname | cut -d _ -f 1), MINGW64)
MK_DIR = mkdir -p
endif
ifeq ($(shell uname | cut -d _ -f 1), DARWIN)
MK_DIR = mkdir -p
endif
endif
SUB_DIRS+= \
src \
ESF/mcu/src \
ESF/modules/core \
ESF/modules/usart_sync
OBJS+= \
ESF/mcu/src/startup_same54.o \
ESF/mcu/src/system_same54.o \
ESF/modules/core/core.o \
ESF/modules/core/event.o \
ESF/modules/core/memory.o \
ESF/modules/core/clocks.o \
ESF/modules/usart_sync/usart_sync.o \
src/main.o
OBJS_AS_ARGS+= \
$(QUOTE)ESF/mcu/src/startup_same54.o$(QUOTE) \
$(QUOTE)ESF/mcu/src/system_same54.o$(QUOTE) \
$(QUOTE)ESF/modules/core/core.o$(QUOTE) \
$(QUOTE)ESF/modules/core/clocks.o$(QUOTE) \
$(QUOTE)ESF/modules/core/event.o$(QUOTE) \
$(QUOTE)ESF/modules/core/memory.o$(QUOTE) \
$(QUOTE)ESF/modules/usart_sync/usart_sync.o$(QUOTE) \
$(QUOTE)src/main.o$(QUOTE)
DIR_INCLUDES+= \
-I$(QUOTE)../../../ESF/common/inc$(QUOTE) \
-I$(QUOTE)../../../ESF/common/inc/cmsis$(QUOTE) \
-I$(QUOTE)../../../ESF/modules$(QUOTE) \
-I$(QUOTE)../../../ESF/modules/core$(QUOTE) \
-I$(QUOTE)../../../ESF/modules/usart_sync$(QUOTE) \
-I$(QUOTE)../../../ESF/mcu/inc$(QUOTE) \
-I$(QUOTE)../../../cfg$(QUOTE) \
-I$(QUOTE)../../../inc$(QUOTE)
DEPS:=$(OBJS:%.o=%.d)
DEPS_AS_ARGS:=$(OBJS_AS_ARGS:%.o=%.d)
vpath %.c ../../../
vpath %.s ../../../
vpath %.S ../../../
all: $(SUB_DIRS)\
$(PROJECT_NAME).elf\
$(PROJECT_NAME).bin\
$(PROJECT_NAME).hex\
$(PROJECT_NAME).eep\
$(PROJECT_NAME).lss
$(QUOTE)$(SIZE)$(QUOTE) $(QUOTE)$(PROJECT_NAME).elf$(QUOTE)
$(PROJECT_NAME).elf:\
$(OBJS)
$(QUOTE)$(CC)$(QUOTE) -o $@ $(OBJS_AS_ARGS) $(ELF_FLAGS)
$(PROJECT_NAME).bin:\
$(PROJECT_NAME).elf
$(QUOTE)$(OBJCOPY)$(QUOTE) -O binary $(QUOTE)$<$(QUOTE) $(QUOTE)$@$(QUOTE)
$(PROJECT_NAME).hex:\
$(PROJECT_NAME).elf
$(QUOTE)$(OBJCOPY)$(QUOTE) -O ihex $(HEX_FLAGS) $(QUOTE)$<$(QUOTE) $(QUOTE)$@$(QUOTE)
$(PROJECT_NAME).eep:\
$(PROJECT_NAME).elf
$(QUOTE)$(OBJCOPY)$(QUOTE) $(EEP_FLAGS) -O binary $(QUOTE)$<$(QUOTE) $(QUOTE)$@$(QUOTE) || exit 0
$(PROJECT_NAME).lss:\
$(PROJECT_NAME).elf
$(QUOTE)$(OBJDUMP)$(QUOTE) -h -S $(QUOTE)$<$(QUOTE) > $(QUOTE)$@$(QUOTE)
# Compiler targets
%.o: %.c
@echo Building file: $<
@echo ARM/GNU C Compiler
$(QUOTE)$(CC)$(QUOTE) $(CFLAGS) -o $(QUOTE)$@$(QUOTE) $(QUOTE)$<$(QUOTE)
@echo Finished building: $<
%.o: %.s
@echo Building file: $<
@echo ARM/GNU Assembler
$(QUOTE)$(AS)$(QUOTE) $(CFLAGS) -o $(QUOTE)$@$(QUOTE) $(QUOTE)$<$(QUOTE)
@echo Finished building: $<
%.o: %.S
@echo Building file: $<
@echo ARM/GNU Preprocessing Assembler
$(QUOTE)$(CC)$(QUOTE) $(CFLAGS) -o $(QUOTE)$@$(QUOTE) $(QUOTE)$<$(QUOTE)
@echo Finished building: $<
$(SUB_DIRS):
$(MK_DIR) $(QUOTE)$@$(QUOTE)
ifneq ($(MAKECMDGOALS),clean)
ifneq ($(strip $(DEPS)),)
-include $(DEPS)
endif
endif
clean:
@rm -f $(PROJECT_NAME).a
@rm -f $(PROJECT_NAME).lss
@rm -f $(PROJECT_NAME).srec
@rm -f $(PROJECT_NAME).map
@rm -f $(PROJECT_NAME).eep
@rm -f $(OBJS_AS_ARGS)
@rm -f $(DEPS_AS_ARGS)
@rm -f $(PROJECT_NAME).bin
@rm -f $(PROJECT_NAME).elf
@rm -f $(PROJECT_NAME).hex
debug:\
all
@$(GDB) $(PROJECT_NAME).elf -x $(QUOTE)scripts/bmdebug.gdb$(QUOTE)
push:\
all
@echo $(QUOTE)$(QUOTE)
@echo $(QUOTE)Uploading $(PROJECT_NAME).elf...$(QUOTE)
@$(GDB) $(PROJECT_NAME).elf -x $(QUOTE)scripts/bmpush.gdb$(QUOTE) >/dev/null
@echo $(QUOTE)$(QUOTE)$(PROJECT_NAME).elf $(QUOTE) uploaded!$(QUOTE)
@$(QUOTE)$(SIZE)$(QUOTE) $(QUOTE)$(PROJECT_NAME).elf$(QUOTE)
QUOTE:="

10
test/same54p20a_test/.igloo/target/same54p20a/scripts/bmdebug.gdb
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set pagination off
set logging file gdb.txt
set logging on
set mem inaccessible-by-default off
tar ext /dev/blackmagic_0
mon s
attach 1
b main
load
r

13
test/same54p20a_test/.igloo/target/same54p20a/scripts/bmpush.gdb
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set pagination off
set logging file gdb.txt
set logging redirect on
set logging on
tar ext /dev/blackmagic_0
mon s
attach 1
b main
load
r
detach
q
y

1
test/same54p20a_test/.igloo/target/same54p20a/scripts/debug.gdb
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/storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/scripts/debug.gdb

1
test/same54p20a_test/.igloo/target/same54p20a/scripts/push.gdb
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/storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/scripts/push.gdb

12
test/same54p20a_test/.igloo/target/same54p20a/scripts/same54p20a.cfg
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#
# ePenguin Generated OpenOCD Config Script
#
# Transport Select
source [find interface/jlink.cfg]
transport select swd
# Chip Information
set CHIPNAME same54p20a
source [find target/atsame5x.cfg]

0
test/same54p20a_test/.projectile
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test/same54p20a_test/ESF/cfg
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/storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/manifest/

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test/same54p20a_test/ESF/common
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/storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/common

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test/same54p20a_test/ESF/ld
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/storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/ld/

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test/same54p20a_test/ESF/mcu
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/storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/

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test/same54p20a_test/ESF/modules/core/clocks.c
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#include "clocks.h"
#include "conf_core.h"
#if CONF_CORE_CLK_XOSC0_FREQUENCY > 24000000
#define CONF_CORE_CLK_XOSC0_IPTAT (3)
#define CONF_CORE_CLK_XOSC0_IMULT (6)
#define CONF_CORE_CLK_XOSC0_CFDPRESC (0x0)
#elif CONF_CORE_CLK_XOSC0_FREQUENCY > 16000000
#define CONF_CORE_CLK_XOSC0_IPTAT (3)
#define CONF_CORE_CLK_XOSC0_IMULT (5)
#define CONF_CORE_CLK_XOSC0_CFDPRESC (0x1)
#elif CONF_CORE_CLK_XOSC0_FREQUENCY > 8000000
#define CONF_CORE_CLK_XOSC0_IPTAT (3)
#define CONF_CORE_CLK_XOSC0_IMULT (4)
#define CONF_CORE_CLK_XOSC0_CFDPRESC (0x2)
#else
#define CONF_CORE_CLK_XOSC0_IPTAT (2)
#define CONF_CORE_CLK_XOSC0_IMULT (3)
#define CONF_CORE_CLK_XOSC0_CFDPRESC (0x3)
#endif
#if CONF_CORE_CLK_XOSC1_FREQUENCY > 24000000
#define CONF_CORE_CLK_XOSC1_IPTAT (3)
#define CONF_CORE_CLK_XOSC1_IMULT (6)
#define CONF_CORE_CLK_XOSC1_CFDPRESC (0x0)
#elif CONF_CORE_CLK_XOSC1_FREQUENCY > 16000000
#define CONF_CORE_CLK_XOSC1_IPTAT (3)
#define CONF_CORE_CLK_XOSC1_IMULT (5)
#define CONF_CORE_CLK_XOSC1_CFDPRESC (0x1)
#elif CONF_CORE_CLK_XOSC1_FREQUENCY > 8000000
#define CONF_CORE_CLK_XOSC1_IPTAT (3)
#define CONF_CORE_CLK_XOSC1_IMULT (4)
#define CONF_CORE_CLK_XOSC1_CFDPRESC (0x2)
#else
#define CONF_CORE_CLK_XOSC1_IPTAT (2)
#define CONF_CORE_CLK_XOSC1_IMULT (3)
#define CONF_CORE_CLK_XOSC1_CFDPRESC (0x3)
#endif
void clock_osc32k_init(void)
{
#if CONF_CORE_CLK_XOSC32K_ENABLE == 1
OSC32KCTRL->XOSC32K.bit.CGM = CONF_CORE_CLK_XOSC32K_CGM;
OSC32KCTRL->XOSC32K.bit.WRTLOCK = CONF_CORE_CLK_XOSC32K_WRTLOCK;
OSC32KCTRL->XOSC32K.bit.STARTUP = CONF_CORE_CLK_XOSC32K_STARTUP_TIME;
OSC32KCTRL->XOSC32K.bit.RUNSTDBY = CONF_CORE_CLK_XOSC32K_RUNSTDBY;
OSC32KCTRL->XOSC32K.bit.ONDEMAND = CONF_CORE_CLK_XOSC32K_ONDEMAND;
OSC32KCTRL->XOSC32K.bit.EN1K = CONF_CORE_CLK_XOSC32K_EN1K;
OSC32KCTRL->XOSC32K.bit.EN32K = CONF_CORE_CLK_XOSC32K_EN32K;
OSC32KCTRL->XOSC32K.bit.XTALEN = CONF_CORE_CLK_XOSC32K_XTALEN;
OSC32KCTRL->CFDCTRL.bit.CFDPRESC = CONF_CORE_CLK_XOSC32K_CFDPRESC;
OSC32KCTRL->CFDCTRL.bit.SWBACK = CONF_CORE_CLK_XOSC32K_SWBACK;
OSC32KCTRL->CFDCTRL.bit.CFDEN = CONF_CORE_CLK_XOSC32K_CFDEN;
#if CONF_CORE_CLK_XOSC32K_ENABLE == 1 && CONF_CORE_CLK_XOSC32K_ONDEMAND == 0
while(OSC32KCTRL->STATUS.bit.XOSC32KRDY == 0);
#endif
#endif
}
void clock_osc_init(void)
{
#if CONF_CORE_CLK_XOSC0_ENABLE == 1
CRITICAL_SECTION_ENTER();
OSCCTRL->XOSCCTRL[0].bit.XTALEN = CONF_CORE_CLK_XOSC0_XTALEN;
OSCCTRL->XOSCCTRL[0].bit.RUNSTDBY = CONF_CORE_CLK_XOSC0_RUNSTDBY;
OSCCTRL->XOSCCTRL[0].bit.ONDEMAND = CONF_CORE_CLK_XOSC0_ONDEMAND;
OSCCTRL->XOSCCTRL[0].bit.LOWBUFGAIN = CONF_CORE_CLK_XOSC0_LOWBUFGAIN;
OSCCTRL->XOSCCTRL[0].bit.IPTAT = CONF_CORE_CLK_XOSC0_IPTAT;
OSCCTRL->XOSCCTRL[0].bit.IMULT = CONF_CORE_CLK_XOSC0_IMULT;
OSCCTRL->XOSCCTRL[0].bit.ENALC = CONF_CORE_CLK_XOSC0_ENALC;
OSCCTRL->XOSCCTRL[0].bit.CFDEN = CONF_CORE_CLK_XOSC0_CFDEN;
OSCCTRL->XOSCCTRL[0].bit.CFDPRESC = CONF_CORE_CLK_XOSC0_CFDPRESC;
OSCCTRL->XOSCCTRL[0].bit.SWBEN = CONF_CORE_CLK_XOSC0_SWBEN;
OSCCTRL->XOSCCTRL[0].bit.STARTUP = CONF_CORE_CLK_XOSC0_STARTUP_TIME;
OSCCTRL->XOSCCTRL[0].bit.ENABLE = CONF_CORE_CLK_XOSC0_ENABLE;
CRITICAL_SECTION_LEAVE();
while(0 == OSCCTRL->STATUS.bit.XOSCRDY0);
#endif
#if CONF_CORE_CLK_XOSC1_ENABLE == 1
CRITICAL_SECTION_ENTER();
OSCCTRL->XOSCCTRL[1].bit.XTALEN = CONF_CORE_CLK_XOSC1_XTALEN;
OSCCTRL->XOSCCTRL[1].bit.RUNSTDBY = CONF_CORE_CLK_XOSC1_RUNSTDBY;
OSCCTRL->XOSCCTRL[1].bit.LOWBUFGAIN = CONF_CORE_CLK_XOSC1_LOWBUFGAIN;
OSCCTRL->XOSCCTRL[1].bit.IPTAT = CONF_CORE_CLK_XOSC1_IPTAT;
OSCCTRL->XOSCCTRL[1].bit.IMULT = CONF_CORE_CLK_XOSC1_IMULT;
OSCCTRL->XOSCCTRL[1].bit.CFDEN = CONF_CORE_CLK_XOSC1_CFDEN;
OSCCTRL->XOSCCTRL[1].bit.CFDPRESC = CONF_CORE_CLK_XOSC1_CFDPRESC;
OSCCTRL->XOSCCTRL[1].bit.SWBEN = CONF_CORE_CLK_XOSC1_SWBEN;
OSCCTRL->XOSCCTRL[1].bit.STARTUP = CONF_CORE_CLK_XOSC1_STARTUP_TIME;
OSCCTRL->XOSCCTRL[1].bit.ENABLE = CONF_CORE_CLK_XOSC1_ENABLE;
CRITICAL_SECTION_LEAVE();
while(0 == OSCCTRL->STATUS.bit.XOSCRDY1);
#endif
#if CONF_CORE_CLK_XOSC0_ENABLE == 1
CRITICAL_SECTION_ENTER();
#if CONF_CORE_CLK_XOSC0_ENALC == 1
OSCCTRL->XOSCCTRL[0].bit.ENALC = CONF_CORE_CLK_XOSC0_ENALC;
#endif
#if CONF_CORE_CLK_XOSC0_ONDEMAND == 1
OSCCTRL->XOSCCTRL[0].bit.ONDEMAND = CONF_CORE_CLK_XOSC0_ONDEMAND;
#endif
CRITICAL_SECTION_LEAVE();
#endif
#if CONF_CORE_CLK_XOSC1_ENABLE == 1
CRITICAL_SECTION_ENTER();
#if CONF_CORE_CLK_XOSC1_ENALC == 1
OSCCTRL->XOSCCTRL[1].bit.ENALC = CONF_CORE_CLK_XOSC1_ENALC;
#endif
#if CONF_CORE_CLK_XOSC1_ONDEMAND == 1
OSCCTRL->XOSCCTRL[1].bit.ONDEMAND = CONF_CORE_CLK_XOSC1_ONDEMAND;
#endif
CRITICAL_SECTION_LEAVE();
#endif
}
void clock_mclk_init(void)
{
CRITICAL_SECTION_ENTER();
MCLK->CPUDIV.reg = CONF_CORE_MCLK_CPUDIV;
CRITICAL_SECTION_LEAVE();
}
void clock_gclk_init(void)
{
#if CONF_CORE_GCLK_0_ENABLE == 1
CRITICAL_SECTION_ENTER();
GCLK->GENCTRL[0].bit.DIV = CONF_CORE_GCLK_0_DIV_VAL;
GCLK->GENCTRL[0].bit.DIVSEL = CONF_CORE_GCLK_0_DIVSEL;
GCLK->GENCTRL[0].bit.RUNSTDBY = CONF_CORE_GCLK_0_RUN_IN_STANDBY;
GCLK->GENCTRL[0].bit.OE = CONF_CORE_GCLK_0_OUTPUT_ENABLE;
GCLK->GENCTRL[0].bit.OOV = CONF_CORE_GCLK_0_DIVSEL;
GCLK->GENCTRL[0].bit.IDC = CONF_CORE_GCLK_0_IDC;
GCLK->GENCTRL[0].bit.GENEN = CONF_CORE_GCLK_0_ENABLE;
GCLK->GENCTRL[0].bit.SRC = CONF_CORE_GCLK_0_CLOCK_SOURCE;
CRITICAL_SECTION_LEAVE();
#endif
#if CONF_CORE_GCLK_1_ENABLE == 1
CRITICAL_SECTION_ENTER();
GCLK->GENCTRL[1].bit.DIV = CONF_CORE_GCLK_1_DIV_VAL;
GCLK->GENCTRL[1].bit.DIVSEL = CONF_CORE_GCLK_1_DIVSEL;
GCLK->GENCTRL[1].bit.RUNSTDBY = CONF_CORE_GCLK_1_RUN_IN_STANDBY;
GCLK->GENCTRL[1].bit.OE = CONF_CORE_GCLK_1_OUTPUT_ENABLE;
GCLK->GENCTRL[1].bit.OOV = CONF_CORE_GCLK_1_DIVSEL;
GCLK->GENCTRL[1].bit.IDC = CONF_CORE_GCLK_1_IDC;
GCLK->GENCTRL[1].bit.GENEN = CONF_CORE_GCLK_1_ENABLE;
GCLK->GENCTRL[1].bit.SRC = CONF_CORE_GCLK_1_CLOCK_SOURCE;
CRITICAL_SECTION_LEAVE();
#endif
#if CONF_CORE_GCLK_2_ENABLE == 1
CRITICAL_SECTION_ENTER();
GCLK->GENCTRL[2].bit.DIV = CONF_CORE_GCLK_2_DIV_VAL;
GCLK->GENCTRL[2].bit.DIVSEL = CONF_CORE_GCLK_2_DIVSEL;
GCLK->GENCTRL[2].bit.RUNSTDBY = CONF_CORE_GCLK_2_RUN_IN_STANDBY;
GCLK->GENCTRL[2].bit.OE = CONF_CORE_GCLK_2_OUTPUT_ENABLE;
GCLK->GENCTRL[2].bit.OOV = CONF_CORE_GCLK_2_DIVSEL;
GCLK->GENCTRL[2].bit.IDC = CONF_CORE_GCLK_2_IDC;
GCLK->GENCTRL[2].bit.GENEN = CONF_CORE_GCLK_2_ENABLE;
GCLK->GENCTRL[2].bit.SRC = CONF_CORE_GCLK_2_CLOCK_SOURCE;
CRITICAL_SECTION_LEAVE();
#endif
#if CONF_CORE_GCLK_3_ENABLE == 1
CRITICAL_SECTION_ENTER();
GCLK->GENCTRL[3].bit.DIV = CONF_CORE_GCLK_3_DIV_VAL;
GCLK->GENCTRL[3].bit.DIVSEL = CONF_CORE_GCLK_3_DIVSEL;
GCLK->GENCTRL[3].bit.RUNSTDBY = CONF_CORE_GCLK_3_RUN_IN_STANDBY;
GCLK->GENCTRL[3].bit.OE = CONF_CORE_GCLK_3_OUTPUT_ENABLE;
GCLK->GENCTRL[3].bit.OOV = CONF_CORE_GCLK_3_DIVSEL;
GCLK->GENCTRL[3].bit.IDC = CONF_CORE_GCLK_3_IDC;
GCLK->GENCTRL[3].bit.GENEN = CONF_CORE_GCLK_3_ENABLE;
GCLK->GENCTRL[3].bit.SRC = CONF_CORE_GCLK_3_CLOCK_SOURCE;
CRITICAL_SECTION_LEAVE();
#endif
#if CONF_CORE_GCLK_4_ENABLE == 1
CRITICAL_SECTION_ENTER();
GCLK->GENCTRL[4].bit.DIV = CONF_CORE_GCLK_4_DIV_VAL;
GCLK->GENCTRL[4].bit.DIVSEL = CONF_CORE_GCLK_4_DIVSEL;
GCLK->GENCTRL[4].bit.RUNSTDBY = CONF_CORE_GCLK_4_RUN_IN_STANDBY;
GCLK->GENCTRL[4].bit.OE = CONF_CORE_GCLK_4_OUTPUT_ENABLE;
GCLK->GENCTRL[4].bit.OOV = CONF_CORE_GCLK_4_DIVSEL;
GCLK->GENCTRL[4].bit.IDC = CONF_CORE_GCLK_4_IDC;
GCLK->GENCTRL[4].bit.GENEN = CONF_CORE_GCLK_4_ENABLE;
GCLK->GENCTRL[4].bit.SRC = CONF_CORE_GCLK_4_CLOCK_SOURCE;
CRITICAL_SECTION_LEAVE();
#endif
#if CONF_CORE_GCLK_5_ENABLE == 1
CRITICAL_SECTION_ENTER();
GCLK->GENCTRL[5].bit.DIV = CONF_CORE_GCLK_5_DIV_VAL;
GCLK->GENCTRL[5].bit.DIVSEL = CONF_CORE_GCLK_5_DIVSEL;
GCLK->GENCTRL[5].bit.RUNSTDBY = CONF_CORE_GCLK_5_RUN_IN_STANDBY;
GCLK->GENCTRL[5].bit.OE = CONF_CORE_GCLK_5_OUTPUT_ENABLE;
GCLK->GENCTRL[5].bit.OOV = CONF_CORE_GCLK_5_DIVSEL;
GCLK->GENCTRL[5].bit.IDC = CONF_CORE_GCLK_5_IDC;
GCLK->GENCTRL[5].bit.GENEN = CONF_CORE_GCLK_5_ENABLE;
GCLK->GENCTRL[5].bit.SRC = CONF_CORE_GCLK_5_CLOCK_SOURCE;
CRITICAL_SECTION_LEAVE();
#endif
#if CONF_CORE_GCLK_6_ENABLE == 1
CRITICAL_SECTION_ENTER();
GCLK->GENCTRL[6].bit.DIV = CONF_CORE_GCLK_6_DIV_VAL;
GCLK->GENCTRL[6].bit.DIVSEL = CONF_CORE_GCLK_6_DIVSEL;
GCLK->GENCTRL[6].bit.RUNSTDBY = CONF_CORE_GCLK_6_RUN_IN_STANDBY;
GCLK->GENCTRL[6].bit.OE = CONF_CORE_GCLK_6_OUTPUT_ENABLE;
GCLK->GENCTRL[6].bit.OOV = CONF_CORE_GCLK_6_DIVSEL;
GCLK->GENCTRL[6].bit.IDC = CONF_CORE_GCLK_6_IDC;
GCLK->GENCTRL[6].bit.GENEN = CONF_CORE_GCLK_6_ENABLE;
GCLK->GENCTRL[6].bit.SRC = CONF_CORE_GCLK_6_CLOCK_SOURCE;
CRITICAL_SECTION_LEAVE();
#endif
#if CONF_CORE_GCLK_7_ENABLE == 1
CRITICAL_SECTION_ENTER();
GCLK->GENCTRL[7].bit.DIV = CONF_CORE_GCLK_7_DIV_VAL;
GCLK->GENCTRL[7].bit.DIVSEL = CONF_CORE_GCLK_7_DIVSEL;
GCLK->GENCTRL[7].bit.RUNSTDBY = CONF_CORE_GCLK_7_RUN_IN_STANDBY;
GCLK->GENCTRL[7].bit.OE = CONF_CORE_GCLK_7_OUTPUT_ENABLE;
GCLK->GENCTRL[7].bit.OOV = CONF_CORE_GCLK_7_DIVSEL;
GCLK->GENCTRL[7].bit.IDC = CONF_CORE_GCLK_7_IDC;
GCLK->GENCTRL[7].bit.GENEN = CONF_CORE_GCLK_7_ENABLE;
GCLK->GENCTRL[7].bit.SRC = CONF_CORE_GCLK_7_CLOCK_SOURCE;
CRITICAL_SECTION_LEAVE();
#endif
#if CONF_CORE_GCLK_8_ENABLE == 1
CRITICAL_SECTION_ENTER();
GCLK->GENCTRL[8].bit.DIV = CONF_CORE_GCLK_8_DIV_VAL;
GCLK->GENCTRL[8].bit.DIVSEL = CONF_CORE_GCLK_8_DIVSEL;
GCLK->GENCTRL[8].bit.RUNSTDBY = CONF_CORE_GCLK_8_RUN_IN_STANDBY;
GCLK->GENCTRL[8].bit.OE = CONF_CORE_GCLK_8_OUTPUT_ENABLE;
GCLK->GENCTRL[8].bit.OOV = CONF_CORE_GCLK_8_DIVSEL;
GCLK->GENCTRL[8].bit.IDC = CONF_CORE_GCLK_8_IDC;
GCLK->GENCTRL[8].bit.GENEN = CONF_CORE_GCLK_8_ENABLE;
GCLK->GENCTRL[8].bit.SRC = CONF_CORE_GCLK_8_CLOCK_SOURCE;
CRITICAL_SECTION_LEAVE();
#endif
#if CONF_CORE_GCLK_9_ENABLE == 1
CRITICAL_SECTION_ENTER();
GCLK->GENCTRL[9].bit.DIV = CONF_CORE_GCLK_9_DIV_VAL;
GCLK->GENCTRL[9].bit.DIVSEL = CONF_CORE_GCLK_9_DIVSEL;
GCLK->GENCTRL[9].bit.RUNSTDBY = CONF_CORE_GCLK_9_RUN_IN_STANDBY;
GCLK->GENCTRL[9].bit.OE = CONF_CORE_GCLK_9_OUTPUT_ENABLE;
GCLK->GENCTRL[9].bit.OOV = CONF_CORE_GCLK_9_DIVSEL;
GCLK->GENCTRL[9].bit.IDC = CONF_CORE_GCLK_9_IDC;
GCLK->GENCTRL[9].bit.GENEN = CONF_CORE_GCLK_9_ENABLE;
GCLK->GENCTRL[9].bit.SRC = CONF_CORE_GCLK_9_CLOCK_SOURCE;
CRITICAL_SECTION_LEAVE();
#endif
#if CONF_CORE_GCLK_10_ENABLE == 1
CRITICAL_SECTION_ENTER();
GCLK->GENCTRL[10].bit.DIV = CONF_CORE_GCLK_10_DIV_VAL;
GCLK->GENCTRL[10].bit.DIVSEL = CONF_CORE_GCLK_10_DIVSEL;
GCLK->GENCTRL[10].bit.RUNSTDBY = CONF_CORE_GCLK_10_RUN_IN_STANDBY;
GCLK->GENCTRL[10].bit.OE = CONF_CORE_GCLK_10_OUTPUT_ENABLE;
GCLK->GENCTRL[10].bit.OOV = CONF_CORE_GCLK_10_DIVSEL;
GCLK->GENCTRL[10].bit.IDC = CONF_CORE_GCLK_10_IDC;
GCLK->GENCTRL[10].bit.GENEN = CONF_CORE_GCLK_10_ENABLE;
GCLK->GENCTRL[10].bit.SRC = CONF_CORE_GCLK_10_CLOCK_SOURCE;
CRITICAL_SECTION_LEAVE();
#endif
#if CONF_CORE_GCLK_11_ENABLE == 1
CRITICAL_SECTION_ENTER();
GCLK->GENCTRL[11].bit.DIV = CONF_CORE_GCLK_11_DIV_VAL;
GCLK->GENCTRL[11].bit.DIVSEL = CONF_CORE_GCLK_11_DIVSEL;
GCLK->GENCTRL[11].bit.RUNSTDBY = CONF_CORE_GCLK_11_RUN_IN_STANDBY;
GCLK->GENCTRL[11].bit.OE = CONF_CORE_GCLK_11_OUTPUT_ENABLE;
GCLK->GENCTRL[11].bit.OOV = CONF_CORE_GCLK_11_DIVSEL;
GCLK->GENCTRL[11].bit.IDC = CONF_CORE_GCLK_11_IDC;
GCLK->GENCTRL[11].bit.GENEN = CONF_CORE_GCLK_11_ENABLE;
GCLK->GENCTRL[11].bit.SRC = CONF_CORE_GCLK_11_CLOCK_SOURCE;
CRITICAL_SECTION_LEAVE();
#endif
}
void clock_dpll_init(void)
{
#if CONF_CORE_CLK_DPLL0_ENABLE == 1
#if CONF_CORE_CLK_DPLL0_REFCLK == 0
CRITICAL_SECTION_ENTER();
GCLK->PCHCTRL[OSCCTRL_GCLK_ID_FDPLL0].bit.GEN =
GCLK_PCHCTRL_GEN(CONF_CORE_CLK_DPLL0_GCLK_SRC);
GCLK->PCHCTRL[OSCCTRL_GCLK_ID_FDPLL0].bit.CHEN =
CONF_CORE_CLK_DPLL0_ENABLE;
CRITICAL_SECTION_LEAVE();
#endif
CRITICAL_SECTION_ENTER();
// write dpll ratio
OSCCTRL->Dpll[0].DPLLRATIO.bit.LDRFRAC = CONF_CORE_CLK_DPLL0_LDRFRAC_VAL;
OSCCTRL->Dpll[0].DPLLRATIO.bit.LDR = CONF_CORE_CLK_DPLL0_LDR_VAL;
// write dpll ctrlb
OSCCTRL->Dpll[0].DPLLCTRLB.bit.DIV = CONF_CORE_CLK_DPLL0_DIV_VAL;
OSCCTRL->Dpll[0].DPLLCTRLB.bit.DCOEN = CONF_CORE_CLK_DPLL0_DCOEN;
OSCCTRL->Dpll[0].DPLLCTRLB.bit.DCOFILTER = CONF_CORE_CLK_DPLL0_DCOFILTER;
OSCCTRL->Dpll[0].DPLLCTRLB.bit.LBYPASS = CONF_CORE_CLK_DPLL0_LBYPASS;
OSCCTRL->Dpll[0].DPLLCTRLB.bit.LTIME = CONF_CORE_CLK_DPLL0_LTIME;
OSCCTRL->Dpll[0].DPLLCTRLB.bit.REFCLK = CONF_CORE_CLK_DPLL0_REFCLK;
OSCCTRL->Dpll[0].DPLLCTRLB.bit.WUF = CONF_CORE_CLK_DPLL0_WUF;
OSCCTRL->Dpll[0].DPLLCTRLB.bit.FILTER = CONF_CORE_CLK_DPLL0_FILTER;
CRITICAL_SECTION_LEAVE();
CRITICAL_SECTION_ENTER();
OSCCTRL->Dpll[0].DPLLCTRLA.reg = 0;
OSCCTRL->Dpll[0].DPLLCTRLA.bit.RUNSTDBY = CONF_CORE_CLK_DPLL0_RUNSTDBY;
OSCCTRL->Dpll[0].DPLLCTRLA.bit.ENABLE = CONF_CORE_CLK_DPLL0_ENABLE;
CRITICAL_SECTION_LEAVE();
#endif
#if CONF_CORE_CLK_DPLL1_ENABLE == 1
#if CONF_CORE_CLK_DPLL0_REFCLK == 0
CRITICAL_SECTION_ENTER();
GCLK->PCHCTRL[OSCCTRL_GCLK_ID_FDPLL1].bit.GEN =
GCLK_PCHCTRL_GEN(CONF_CORE_CLK_DPLL1_GCLK_SRC);
GCLK->PCHCTRL[OSCCTRL_GCLK_ID_FDPLL1].bit.CHEN =
CONF_CORE_CLK_DPLL1_ENABLE;
CRITICAL_SECTION_LEAVE();
#endif
CRITICAL_SECTION_ENTER();
// write dpll ratio
OSCCTRL->Dpll[1].DPLLRATIO.bit.LDRFRAC = CONF_CORE_CLK_DPLL1_LDRFRAC_VAL;
OSCCTRL->Dpll[1].DPLLRATIO.bit.LDR = CONF_CORE_CLK_DPLL1_LDR_VAL;
// write dpll ctrlb
OSCCTRL->Dpll[1].DPLLCTRLB.bit.DIV = CONF_CORE_CLK_DPLL1_DIV_VAL;
OSCCTRL->Dpll[1].DPLLCTRLB.bit.DCOEN = CONF_CORE_CLK_DPLL1_DCOEN;
OSCCTRL->Dpll[1].DPLLCTRLB.bit.DCOFILTER = CONF_CORE_CLK_DPLL1_DCOFILTER;
OSCCTRL->Dpll[1].DPLLCTRLB.bit.LBYPASS = CONF_CORE_CLK_DPLL1_LBYPASS;
OSCCTRL->Dpll[1].DPLLCTRLB.bit.LTIME = CONF_CORE_CLK_DPLL1_LTIME;
OSCCTRL->Dpll[1].DPLLCTRLB.bit.REFCLK = CONF_CORE_CLK_DPLL1_REFCLK;
OSCCTRL->Dpll[1].DPLLCTRLB.bit.WUF = CONF_CORE_CLK_DPLL1_WUF;
OSCCTRL->Dpll[1].DPLLCTRLB.bit.FILTER = CONF_CORE_CLK_DPLL1_FILTER;
CRITICAL_SECTION_LEAVE();
CRITICAL_SECTION_ENTER();
OSCCTRL->Dpll[1].DPLLCTRLA.reg = 0;
OSCCTRL->Dpll[1].DPLLCTRLA.bit.RUNSTDBY = CONF_CORE_CLK_DPLL1_RUNSTDBY;
OSCCTRL->Dpll[1].DPLLCTRLA.bit.ENABLE = CONF_CORE_CLK_DPLL1_ENABLE;
CRITICAL_SECTION_LEAVE();
#endif
#if CONF_CORE_CLK_DPLL0_ENABLE == 1
while(!(OSCCTRL->Dpll[0].DPLLSTATUS.bit.LOCK || OSCCTRL->Dpll[0].DPLLSTATUS.bit.CLKRDY));
CRITICAL_SECTION_ENTER();
#if CONF_CORE_CLK_DPLL0_ONDEMAND == 1
OSCCTRL->Dpll[0].DPLLCTRLA.bit.ONDEMAND = CONF_CORE_CLK_DPLL0_ONDEMAND;
#endif
CRITICAL_SECTION_LEAVE();
#endif
#if CONF_CORE_CLK_DPLL1_ENABLE == 1
while(!(OSCCTRL->Dpll[1].DPLLSTATUS.bit.LOCK || OSCCTRL->Dpll[1].DPLLSTATUS.bit.CLKRDY));
CRITICAL_SECTION_ENTER();
#if CONF_CORE_CLK_DPLL1_ONDEMAND == 1
OSCCTRL->Dpll[1].DPLLCTRLA.bit.ONDEMAND = CONF_CORE_CLK_DPLL1_ONDEMAND;
#endif
CRITICAL_SECTION_LEAVE();
#endif
}
void clock_dfll_init(void)
{
#if CONF_CORE_CLK_DFLL_ENABLE
CRITICAL_SECTION_ENTER();
GCLK->GENCTRL[0].bit.SRC = GCLK_GENCTRL_SRC_OSCULP32K;
CRITICAL_SECTION_LEAVE();
while(GCLK->SYNCBUSY.bit.GENCTRL0);
CRITICAL_SECTION_ENTER();
// reset stuff
OSCCTRL->DFLLCTRLA.reg = 0;
CRITICAL_SECTION_LEAVE();
#if CONF_CORE_CLK_DFLL_USBCRM != 1 && CONF_CORE_CLK_DFLL_MODE != 0
CRITICAL_SECTION_ENTER();
// reset stuff
GCLK->PCHCTRL[OSCCTRL_GCLK_ID_DFLL48].bit.GEN =
GCLK_PCHCTRL_GEN(CONF_CORE_CLK_DFLL_GCLK_SRC);
GCLK->PCHCTRL[OSCCTRL_GCLK_ID_DFLL48].bit.EN = CONF_CORE_CLK_DFLL_ENABLE;
CRITICAL_SECTION_LEAVE();
#endif
CRITICAL_SECTION_ENTER();
// configure clock multiplier stuff
OSCCTRL->DFLLMUL.bit.MUL = CONF_CORE_CLK_DFLL_MUL_VAL;
OSCCTRL->DFLLMUL.bit.CSTEP = CONF_CORE_CLK_DFLL_CSTEP_VAL;
OSCCTRL->DFLLMUL.bit.FSTEP = CONF_CORE_CLK_DFLL_FSTEP_VAL;
CRITICAL_SECTION_LEAVE();
while(OSCCTRL->DFLLSYNC.bit.DFLLMUL);
CRITICAL_SECTION_ENTER();
// reset dfll ctrlb
OSCCTRL->DFLLCTRLB.reg = 0;
CRITICAL_SECTION_LEAVE();
// wait for ctrlb sync
while(OSCCTRL->DFLLSYNC.bit.DFLLCTRLB);
CRITICAL_SECTION_ENTER();
OSCCTRL->DFLLCTRLA.bit.RUNSTDBY = CONF_CORE_CLK_DFLL_RUNSTDBY;
OSCCTRL->DFLLCTRLA.bit.ENABLE = CONF_CORE_CLK_DFLL_ENABLE;
CRITICAL_SECTION_LEAVE();
while(OSCCTRL->DFLLSYNC.bit.ENABLE);
#if CONF_CORE_CLK_DFLL_OVERWRITE_CAL == 1
CRITICAL_SECTION_ENTER();
// set calib for dfll48m
OSCCTRL->DFLLVAL.bit.COARSE = CONF_CORE_CLK_DFLL_COARSE_VAL;
OSCCTRL->DFLLVAL.bit.FINE = CONF_CORE_CLK_DFLL_FINE_VAL;
OSCCTRL->DFLLVAL.bit.DIFF = CONF_CORE_CLK_DFLL_DIFF_VAL;
CRITICAL_SECTION_LEAVE();
#endif
CRITICAL_SECTION_ENTER();
// write dfll val
// rewriting this for some reason?
OSCCTRL->DFLLVAL.reg = OSCCTRL->DFLLVAL.reg;
CRITICAL_SECTION_LEAVE();
// let dfll val sync
while(OSCCTRL->DFLLSYNC.bit.DFLLVAL);
CRITICAL_SECTION_ENTER();
// write dfll ctrlb
OSCCTRL->DFLLCTRLB.bit.WAITLOCK = CONF_CORE_CLK_DFLL_WAITLOCK;
OSCCTRL->DFLLCTRLB.bit.BPLCKC = CONF_CORE_CLK_DFLL_BPLKC;
OSCCTRL->DFLLCTRLB.bit.QLDIS = CONF_CORE_CLK_DFLL_QLDIS;
OSCCTRL->DFLLCTRLB.bit.CCDIS = CONF_CORE_CLK_DFLL_CCDIS;
OSCCTRL->DFLLCTRLB.bit.USBCRM = CONF_CORE_CLK_DFLL_USBCRM;
OSCCTRL->DFLLCTRLB.bit.LLAW = CONF_CORE_CLK_DFLL_LLAW;
OSCCTRL->DFLLCTRLB.bit.STABLE = CONF_CORE_CLK_DFLL_STABLE_FCALIB;
OSCCTRL->DFLLCTRLB.bit.MODE = CONF_CORE_CLK_DFLL_MODE;
CRITICAL_SECTION_LEAVE();
while(OSCCTRL->DFLLSYNC.bit.DFLLCTRLB);
if (OSCCTRL->DFLLCTRLB.bit.MODE)
{
volatile uint32_t status_mask = OSCCTRL_STATUS_DFLLRDY | OSCCTRL_STATUS_DFLLLCKC;
while((OSCCTRL->STATUS.reg & status_mask) != status_mask);
}
else
{
while(!OSCCTRL->STATUS.bit.DFLLRDY);
}
#if CONF_CORE_CLK_DFLL_ONDEMAND == 1
CRITICAL_SECTION_ENTER();
OSCCTRL->DFLLCTRLA.bit.ONDEMAND = CONF_CORE_CLK_DFLL_ONDEMAND;
CRITICAL_SECTION_LEAVE();
#endif
while(GCLK->SYNCBUSY.reg);
CRITICAL_SECTION_ENTER();
// reset gclk 0
GCLK->GENCTRL[0].bit.SRC = CONF_CORE_GCLK_0_CLOCK_SOURCE;
CRITICAL_SECTION_LEAVE();
#endif
}

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test/same54p20a_test/ESF/modules/core/clocks.h
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#ifndef _CLOCKS_H_
#define _CLOCKS_H_
#include "core.h"
#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_62592us (0x0)
#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_125092us (0x1)
#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_500092us (0x2)
#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_1000009200ns (0x3)
#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_2000009200ns (0x4)
#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_4000009200ns (0x5)
#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_8000009200ns (0x6)
// Oscillator Current Multiplier
#define CONF_CORE_CLK_XOSCCTRL_IMULT_24MHZ_TO_48MHZ (6)
#define CONF_CORE_CLK_XOSCCTRL_IMULT_16MHZ_TO_24MHZ (5)
#define CONF_CORE_CLK_XOSCCTRL_IMULT_8MHZ_TO_16MHZ (4)
#define CONF_CORE_CLK_XOSCCTRL_IMULT_8MHZ (3)
// Oscillator Current Reference
#define CONF_CORE_CLK_XOSCCTRL_IPTAT_24MHZ_TO_48MHZ (3)
#define CONF_CORE_CLK_XOSCCTRL_IPTAT_16MHZ_TO_24MHZ (3)
#define CONF_CORE_CLK_XOSCCTRL_IPTAT_8MHZ_TO_16MHZ (3)
#define CONF_CORE_CLK_XOSCCTRL_IPTAT_8MHZ (2)
// DFLL Definitions
#define CONF_CORE_CLK_DFLLCTRL_STABLE_FCALIB_NOT_FIXED (0)
#define CONF_CORE_CLK_DFLLCTRL_STABLE_FCALIB_FIXED (1)
// DPLL Definitions
#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_3210KHZ (0x0)
#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_1600KHZ (0x1)
#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_1100KHZ (0x2)
#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_800KHZ (0x3)
#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_640KHZ (0x4)
#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_550KHZ (0x5)
#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_450KHZ (0x6)
#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_400KHZ (0x7)
#define CONF_CORE_CLK_DPLLCTRL_LTIME_TIMEOUT_NONE (0x0)
#define CONF_CORE_CLK_DPLLCTRL_LTIME_TIMEOUT_800us (0x4)
#define CONF_CORE_CLK_DPLLCTRL_LTIME_TIMEOUT_900us (0x5)
#define CONF_CORE_CLK_DPLLCTRL_LTIME_TIMEOUT_1000us (0x6)
#define CONF_CORE_CLK_DPLLCTRL_LTIME_TIMEOUT_1100us (0x7)
#define CONF_CORE_CLK_DPLLCTRL_REFCLK_GCLK (0x0)
#define CONF_CORE_CLK_DPLLCTRL_REFCLK_XOSC32 (0x1)
#define CONF_CORE_CLK_DPLLCTRL_REFCLK_XOSC0 (0x2)
#define CONF_CORE_CLK_DPLLCTRL_REFCLK_XOSC1 (0x3)
void clock_osc32k_init(void);
void clock_osc_init(void);
void clock_mclk_init(void);
void clock_gclk_init(void);
void clock_dpll_init(void);
void clock_dfll_init(void);
#endif

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test/same54p20a_test/ESF/modules/core/core.c
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#include "core.h"
#include "clocks.h"
#include "memory.h"
void mcu_init(void)
{
// nvm init
mem_nvm_init();
// osc32k init
clock_osc32k_init();
// osc init
clock_osc_init();
clock_dfll_init();
clock_dpll_init();
// master clock init
clock_mclk_init();
// generators init
clock_gclk_init();
// dma init
mem_dma_init();
// port event init
// cache init
mem_cache_init();
}
void atomic_enter_critical(uint32_t volatile* atomic)
{
*atomic = __get_PRIMASK();
__disable_irq();
__DMB();
}
void atomic_leave_critical(uint32_t volatile* atomic)
{
__DMB();
__set_PRIMASK(*atomic);
}

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test/same54p20a_test/ESF/modules/core/core.h
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#ifndef _CORE_H_
#define _CORE_H_
#include "sam.h"
void mcu_init(void);
void atomic_enter_critical(uint32_t volatile* atomic);
void atomic_leave_critical(uint32_t volatile* atomic);
#define CRITICAL_SECTION_ENTER() \
{\
volatile uint32_t __atomic;\
atomic_enter_critical(&__atomic);
#define CRITICAL_SECTION_LEAVE() \
atomic_leave_critical(&__atomic); \
}
#endif

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test/same54p20a_test/ESF/modules/core/event.c
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test/same54p20a_test/ESF/modules/core/event.h
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#ifndef _EVENT_H_
#define _EVENT_H_
static inline void event_init(void)
{
}
#endif

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test/same54p20a_test/ESF/modules/core/memory.c
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#include "memory.h"
#include "conf_core.h"
void mem_nvm_init(void)
{
CRITICAL_SECTION_ENTER();
NVMCTRL->CTRLA.bit.RWS = CONF_CORE_MCLK_NVM_WAIT_STATE;
CRITICAL_SECTION_LEAVE();
}
void mem_cache_init(void)
{
#if CORE_CONF_CMCC_ENABLE == 1
#endif
}
void mem_dma_init(void)
{
#if CORE_CONF_DMA_ENABLE
CRITICAL_SECTION_ENTER();
MCLK->AHBMASK.reg |= MCLK_AHBMASK_DMAC;
CRITICAL_SECTION_LEAVE();
#endif
}

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test/same54p20a_test/ESF/modules/core/memory.h
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#ifndef _MEMORY_H_
#define _MEMORY_H_
#include "core.h"
void mem_nvm_init(void);
void mem_cache_init(void);
void mem_dma_init(void);
#endif

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test/same54p20a_test/ESF/modules/sercom/sercom.h
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#ifndef __SERCOM_H__
#define __SERCOM_H__
#endif

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test/same54p20a_test/ESF/modules/usart_sync/usart_sync.c
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#include "usart_sync.h"
#include "core.h"
#define USART_TX PIN_PA04
#define USART_RX PIN_PA05
#define USART_SERCOM SERCOM0
void usart_init(void)
{
// CLOCKS INIT PCHCTRL
if(!SERCOM0->USART.SYNCBUSY.bit.SWRST)
{
uint32_t mode = SERCOM0->USART.CTRLA.bit.MODE;
if(SERCOM0->USART.CTRLA.bit.ENABLE)
{
SERCOM0->USART.CTRLA.bit.ENABLE = 0;
while(SERCOM0->USART.SYNCBUSY.bit.ENABLE);
}
SERCOM0->USART.CTRLA.reg = mode | SERCOM_USART_CTRLA_SWRST;
while(SERCOM0->USART.SYNCBUSY.bit.SWRST || SERCOM0->USART.SYNCBUSY.bit.ENABLE);
}
while(SERCOM0->USART.SYNCBUSY.bit.SWRST);
CRITICAL_SECTION_ENTER();
SERCOM0->USART.CTRLA.bit.MODE =
CRITICAL_SECTION_LEAVE();
}

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test/same54p20a_test/ESF/modules/usart_sync/usart_sync.h
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#ifndef _USART_H_
#define _USART_H_
#include "igloo.h"
void usart_init(void);
#endif

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test/same54p20a_test/cfg/conf_core.h
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/**
* @file conf_core.h
* @author Penguin
*
* @section Description
*
* This is the master config for the core module for this mcu. This file is *required*
* for the core module to function.
*/
#ifndef _CONF_CLOCKS_H_
#define _CONF_CLOCKS_H_
#include "clocks.h"
/** @name Core-Master-Clock-Configuration
* Configuration options for the master clock.
* @{
*/
/**
* @brief Define the number of wait states for the master clock.
* <br>Can be [0-15].
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=605">Datasheet Reference</a>
*/
#define CONF_CORE_MCLK_NVM_WAIT_STATE 0x5
/**
* @brief Define the master clock divisor.
* - 0x1 => Clock Divide by 1
* - 0x2 => Clock Divide by 2
* - 0x4 => Clock Divide by 4
* - 0x8 => Clock Divide by 8
* - 0x10 => Clock Divide by 16
* - 0x20 => Clock Divide by 32
* - 0x40 => Clock Divide by 64
* - 0x80 => Clock Divide by 128
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=170">Datasheet Reference</a>
*/
#define CONF_CORE_MCLK_CPUDIV 0x1
/** @} */
/**
* Define whether the DMAC is enabled or not.
* - 0 => Disabled
* - 1 => Enabled
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=172">Datasheet Reference</a>
*/
#define CONF_CORE_DMA_ENABLE (0)
/**
* Define whether the CMCC (Cortex-M Cache Controller) is enabled or not.
* - 0 => Disabled
* - 1 => Enabled
*/
#define CONF_CORE_CMCC_ENABLE (0)
/** Currently Unused */
#define CONF_CORE_PORT_EVCTRL_0_ENABLE (0)
/** Currently Unused */
#define CONF_CORE_PORT_EVCTRL_1_ENABLE (0)
/** Currently Unused */
#define CONF_CORE_PORT_EVCTRL_2_ENABLE (0)
/** @name Core-XOSC0-Configuration
* Configuration options for XOSC0.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=693">Datasheet Reference</a>
* @{
*/
/**
* XOSC0 Enable
* @brief Enables or Disables the XOSC0 Clock
* - 0 => Disables XOSC0
* - 1 => Enables XOSC0
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=723">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC0_ENABLE (1)
/**
* XOSC0 XTALEN
* @brief This bit controls the connections between the I/O pads and the external clock or crystal oscillator XOSC0:
* - 0 => External clock connected on XIN. XOUT can be used as general purpose I/O.
* - 1 => Crystal connected to XIN/XOUT.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=723">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC0_XTALEN (1)
/**
* XOSC0 Run in Standby
* @brief This bit controls how the XOSC0 behaves during standby sleep mode:
* - 0 => XOSC0 is not running in standby sleep mode if no peripheral requests the clock.
* - 1 => XOSC0 is running in standby sleep mode.
* If ONDEMAND is 1, XOSC0 will be running when a peripheral is requesting the clock.
* If ONDEMAND is 0, the clock source will always be running in standby sleep mode.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=723">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC0_RUNSTDBY (0)
/**
* XOSC0 On Demand Control
* @brief The On Demand operation mode allows the oscillator XOSC0 to be enabled or disabled, depending on peripheral clock requests.
* - 0 => Oscillator is always on.
* - 1 => The oscillator is running when a peripheral is requesting the oscillator to be used as a clock source.
* The oscillator is not running if no peripheral is requesting the clock source.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=722">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC0_ONDEMAND (0)
/**
* XOSC0 Low Buffer Gain Control Bit
* @brief The default value of LOWBUFGAIN=0 should be used to allow operating with a low amplitude oscillator.
* Don't use this setting except to solve stability issues.
* - 0 => The low buffer gain of XOSC0 is disabled.
* - 1 => The low buffer gain of XOSC0 is enabled.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=722">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC0_LOWBUFGAIN (0)
/**
* XOSC0 Automatic Loop Control
* @brief This bit controls the XOSC0 automatic loop control:
* - 0 => The automatic loop control is disabled.
* - 1 => The automatic loop control is enabled. Oscillator's amplitude will be automatically adjusted during Crystal Oscillator operation.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=722">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC0_ENALC (1)
/**
* XOSC0 Clock Failure Detector Control
* @brief This bit controls the XOSC0 clock failure detector:
* - 0 => Clock Failure Detector is disabled.
* - 1 => Clock Failure Detector is enabled.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=722">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC0_CFDEN (1)
/**
* XOSC0 Clock Switch Enable
* @brief This bit controls the XOSC0 output clock switch back to the external clock or crystal oscillator in case of clock recovery:
* - 0 => The clock switch back is disabled.
* - 1 => The clock switch back is enabled.
* This bit is reset once the XOSC0 output clock is switched back to the external clock or crystal oscillator.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=722">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC0_SWBEN (0)
/**
* XOSC0 Startup Time
* @brief These bits select start-up time for XOSC0 according to the table below:
* - 0x00 => 31us
* - 0x01 => 61us
* - 0x02 => 122us
* - 0x03 => 244us
* - 0x04 => 488us
* - 0x05 => 977us
* - 0x06 => 1953us
* - 0x07 => 3906us
* - 0x08 => 7813us
* - 0x09 => 15625us
* - 0x0A => 31250us
* - 0x0B => 62500us
* - 0x0C => 125000us
* - 0x0D => 250000us
* - 0x0E => 500000us
* - 0x0F => 1000000us
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=721">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC0_STARTUP_TIME (0x00)
/**
* XOSC0 Frequency
* @brief This is the frequency of the external clock you're using for XOSC0.
* This can be anything from 8MHz to 48MHz.
*/
#define CONF_CORE_CLK_XOSC0_FREQUENCY 12000000
/** @} */
/** @name Core-XOSC1-Configuration
* Configuration options for XOSC1.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=693">Datasheet Reference</a>
* @{
*/
/**
* XOSC1 Enable
* @brief Enables or Disables the XOSC1 Clock
* - 0 => Disables XOSC1
* - 1 => Enables XOSC1
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=723">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC1_ENABLE (0)
/**
* XOSC1 XTALEN
* @brief This bit controls the connections between the I/O pads and the external clock or crystal oscillator XOSC1:
* - 0 => External clock connected on XIN. XOUT can be used as general purpose I/O.
* - 1 => Crystal connected to XIN/XOUT.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=723">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC1_XTALEN (0)
/**
* XOSC1 Run in Standby
* @brief This bit controls how the XOSC1 behaves during standby sleep mode:
* - 0 => XOSC1 is not running in standby sleep mode if no peripheral requests the clock.
* - 1 => XOSC1 is running in standby sleep mode.
* If ONDEMAND is 1, XOSC1 will be running when a peripheral is requesting the clock.
* If ONDEMAND is 0, the clock source will always be running in standby sleep mode.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=723">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC1_RUNSTDBY (0)
/**
* XOSC1 On Demand Control
* @brief The On Demand operation mode allows the oscillator XOSC1 to be enabled or disabled, depending on peripheral clock requests.
* - 0 => Oscillator is always on.
* - 1 => The oscillator is running when a peripheral is requesting the oscillator to be used as a clock source.
* The oscillator is not running if no peripheral is requesting the clock source.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=722">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC1_ONDEMAND (0)
/**
* XOSC1 Low Buffer Gain Control Bit
* @brief The default value of LOWBUFGAIN=0 should be used to allow operating with a low amplitude oscillator.
* Don't use this setting except to solve stability issues.
* - 0 => The low buffer gain of XOSC1 is disabled.
* - 1 => The low buffer gain of XOSC1 is enabled.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=722">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC1_LOWBUFGAIN (0)
/**
* XOSC1 Automatic Loop Control
* @brief This bit controls the XOSC1 automatic loop control:
* - 0 => The automatic loop control is disabled.
* - 1 => The automatic loop control is enabled. Oscillator's amplitude will be automatically adjusted during Crystal Oscillator operation.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=722">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC1_ENALC (0)
/**
* XOSC1 Clock Failure Detector Control
* @brief This bit controls the XOSC1 clock failure detector:
* - 0 => Clock Failure Detector is disabled.
* - 1 => Clock Failure Detector is enabled.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=722">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC1_CFDEN (0)
/**
* XOSC1 Clock Switch Enable
* @brief This bit controls the XOSC1 output clock switch back to the external clock or crystal oscillator in case of clock recovery:
* - 0 => The clock switch back is disabled.
* - 1 => The clock switch back is enabled.
* This bit is reset once the XOSC1 output clock is switched back to the external clock or crystal oscillator.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=722">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC1_SWBEN (0)
/**
* XOSC1 Startup Time
* @brief These bits select start-up time for XOSC1 according to the table below:
* - 0x00 => 31us
* - 0x01 => 61us
* - 0x02 => 122us
* - 0x03 => 244us
* - 0x04 => 488us
* - 0x05 => 977us
* - 0x06 => 1953us
* - 0x07 => 3906us
* - 0x08 => 7813us
* - 0x09 => 15625us
* - 0x0A => 31250us
* - 0x0B => 62500us
* - 0x0C => 125000us
* - 0x0D => 250000us
* - 0x0E => 500000us
* - 0x0F => 1000000us
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=721">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC1_STARTUP_TIME (0x00)
/**
* XOSC1 Frequency
* @brief This is the frequency of the external clock you're using for XOSC1.
* This can be anything from 8MHz to 48MHz.
*/
#define CONF_CORE_CLK_XOSC1_FREQUENCY 12000000
/** @} */
/** @name Core-XOSC32K-Configuration
* Configuration options for the external 32khz oscillator.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=735">Datasheet Reference</a>
* @{
*/
/**
* XOSC32K Enable
* @brief Enables or Disables XOSC32K.
* - 0 => The oscillator is disabled.
* - 1 => The oscillator is enabled.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=749">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC32K_ENABLE (1)
/**
* XOSC32K Control Gain Mode
* @brief These bits control the gain of the external crstal oscillator.
* - 0x00 => Low Power Mode
* - 0x01 => Standard Mode (Default)
* - 0x02 => High Speed Mode
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=748">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC32K_CGM (0x01)
/**
* XOSC32K Startup Time
* @brief These bits select the startup time for the oscillator.
* - 0x00 => 62.592ms
* - 0x01 => 125.092ms
* - 0x02 => 500.092ms
* - 0x03 => 1000.0092ms
* - 0x04 => 2000.0092ms
* - 0x05 => 4000.0092ms
* - 0x06 => 8000.0092ms
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=748">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC32K_STARTUP_TIME CONF_CORE_CLK_XOSC32KCTRL_STARTUP_62592us
/**
* XOSC32K On Demand Control
* @brief This bit controls how XOSC32K behaves when a peripheral clock request is detected.
* - 0 => On Demand Control disabled
* - 1 => On Demand Control enabled
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=748">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC32K_ONDEMAND (1)
/**
* XOSC32K Run in Standby
* @brief This bit controls how XOSC32K behaves during standby sleep mode.
* - 0 => Run if requested by peripheral.
* - 1 => Run if requested by peripheral OR always run depending ONDEMAND value.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=748">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC32K_RUNSTDBY (0)
/**
* XOSC32K 1KHz Output Control
* - 0 => 1KHz output is disabled.
* - 1 => 1KHz output is enabled.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=749">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC32K_EN1K (0)
/**
* XOSC32K 32KHz Output Control
* - 0 => 32KHz output is disabled.
* - 1 => 32KHz output is enabled.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=749">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC32K_EN32K (1)
/**
* XOSC32K Crystal Oscillator Enable
* @brief This bit controls the connections between the I/O pads and the external clock or crystal oscillator.
* - 0 => External clock is connected on XIN32. XOUT32 can be used as general-purpose I/O.
* - 1 => Crystal connected to XIN32/XOUT32.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=749">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC32K_XTALEN (1)
/**
* XOSC32K Clock Failure Detector Prescaler
* @brief This bit selects the prescaler for the CLock Failure Detector:
* - 0 => The CFD safe clock frequency is the OSCULP32K frequency.
* - 1 => The CFD safe clock frequency is the OSCULP32K frequency divided by 2.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=750">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC32K_CFDPRESC (0)
/**
* XOSC32K Clock Failure Detector Control
* @brief This bit selects the Clock Failulre Detector state.
* - 0 => The CFD is disabled.
* - 1 => The CFD is enabled.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=750">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC32K_CFDEN (0)
/**
* XOSC32K Clock Switch Back
* @brief This bit controls the XOSC32K output switch back to the external clock or crystal oscillator in case of clock recovery.
* - 0 => The clock switch is disabled.
* - 1 => The clock switch is enabled. This bit is reset when XOSC32K output is switched back to the external clock or crystal oscillator.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=750">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC32K_SWBACK (0)
/**
* XOSC32K Write Lock
* @brief This bit locks the XOSC32K register for future writes, effectively freezing the XOSC32K configuration.
* - 0 => XOSC32K configuration is not locked.
* - 1 => XOSC32K configuration is locked.
* <br>See <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf#page=748">Datasheet Reference</a>
*/
#define CONF_CORE_CLK_XOSC32K_WRTLOCK (0)
/** @} */
/** @name Core-DFLL48M-Configuration
* Configuration options for DFLL48M
*/
/** @{ */
/**
* DFLL48M Enable
* @brief Enables or Disables the DFLL48M Clock
* - 0 => Disables DFLL48M
* - 1 => Enables DFLL48M
* <br>pg. 724 of datasheet
*/
#define CONF_CORE_CLK_DFLL_ENABLE (1)
/**
* DFLL48M On Demand Control
* @brief Enables or Disables on-demand operation
* - 0 => Disables On Demand Operation
* - 1 => Enables On Demand Operation
* <br>pg. 724 of datasheet
*/
#define CONF_CORE_CLK_DFLL_ONDEMAND (0)
/**
* DFLL48M Run in Standby Control
* @brief Enables or Disables run-in-standby operation
* - 0 => Disables run-in-standby operation
* - 1 => Enables run-in-standby operation
* <br>pg. 724 of datasheet
*/
#define CONF_CORE_CLK_DFLL_RUNSTDBY (0)
/**
* DFLL48M Wait Lock Control
@brief This bit controls the DFLL output clock, depending on the lock status:
* - 0 => Output clock before the DFLL is locked.
* - 1 => Output clock when DFLL is locked (Fine lock).
* <br>pg. 725 of datasheet
*/
#define CONF_CORE_CLK_DFLL_WAITLOCK (0)
#define CONF_CORE_CLK_DFLL_BPLKC (0)
#define CONF_CORE_CLK_DFLL_QLDIS (0)
#define CONF_CORE_CLK_DFLL_CCDIS (1)
#define CONF_CORE_CLK_DFLL_USBCRM (1)
#define CONF_CORE_CLK_DFLL_LLAW (0)
#define CONF_CORE_CLK_DFLL_STABLE_FCALIB CONF_CORE_CLK_DFLLCTRL_STABLE_FCALIB_NOT_FIXED
#define CONF_CORE_CLK_DFLL_MODE 0x01
#define CONF_CORE_CLK_DFLL_DIFF_VAL 0
#define CONF_CORE_CLK_DFLL_COARSE_VAL (0x1f / 4)
#define CONF_CORE_CLK_DFLL_FINE_VAL 128
#define CONF_CORE_CLK_DFLL_CSTEP_VAL 1
#define CONF_CORE_CLK_DFLL_FSTEP_VAL 1
#define CONF_CORE_CLK_DFLL_MUL_VAL (48000000)
/**
* DFLL48M GCLK Source
* @brief GCLK Source used to generate DFLL48M
* - 0 => Generic clock generator 0
* - 1 => Generic clock generator 1
* - 2 => Generic clock generator 2
* - 3 => Generic clock generator 3
* - 4 => Generic clock generator 4
* - 5 => Generic clock generator 5
* - 6 => Generic clock generator 6
* - 7 => Generic clock generator 7
* - 8 => Generic clock generator 8
* - 9 => Generic clock generator 9
* - 10 => Generic clock generator 10
* - 11 => Generic clock generator 11
*/
#define CONF_CORE_CLK_DFLL_GCLK_SRC 3
#define CONF_CORE_CLK_DFLL_OVERWRITE_CAL 0
/** @} */
/** @name Core-DPLL0-Configuration
* Configuration Options for DPLL0.
* @{
*/
#define CONF_CORE_CLK_DPLL0_ENABLE (1)
#define CONF_CORE_CLK_DPLL0_ONDEMAND (0)
#define CONF_CORE_CLK_DPLL0_RUNSTDBY (0)
#define CONF_CORE_CLK_DPLL0_LDRFRAC_VAL 0
#define CONF_CORE_CLK_DPLL0_LDR_VAL (119)
#define CONF_CORE_CLK_DPLL0_DIV_VAL (5)
#define CONF_CORE_CLK_DPLL0_DCOEN 0
#define CONF_CORE_CLK_DPLL0_DCOFILTER CONF_CORE_CLK_DPLLCTRL_DCOFILTER_3210KHZ
#define CONF_CORE_CLK_DPLL0_LBYPASS 1
#define CONF_CORE_CLK_DPLL0_LTIME 0
#define CONF_CORE_CLK_DPLL0_WUF 0
#define CONF_CORE_CLK_DPLL0_GCLK_SRC GCLK_GENCTRL_SRC_XOSC0
#define CONF_CORE_CLK_DPLL0_REFCLK CONF_CORE_CLK_DPLLCTRL_REFCLK_XOSC0
/**
* pg. 732 of the datasheet
* ~~~
* FILTER[3:0] | PLL Bandwidth (fn) | Damping Factor
* 0x0 | 92.7 kHz | 0.76
* 0x1 | 131 kHz | 1.08
* 0x2 | 46.4 kHz | 0.38
* 0x3 | 65.6 kHz | 0.54
* 0x4 | 131 kHz | 0.56
* 0x5 | 185 kHz | 0.79
* 0x6 | 65.6 kHz | 0.28
* 0x7 | 92.7 kHz | 0.39
* 0x8 | 46.4 kHz | 1.49
* 0x9 | 65.6 kHz | 2.11
* 0xA | 23.2 kHz | 0.75
* 0xB | 32.8 kHz | 1.06
* 0xC | 65.6 kHz | 1.07
* 0xD | 92.7 kHz | 1.51
* 0xE | 32.8 kHz | 0.53
* 0xF | 46.4 kHz | 0.75
* ~~~
*
* When in doubt, leave this at its default.
*/
#define CONF_CORE_CLK_DPLL0_FILTER 0x0
/** @} */
/** @name Core-DPLL1-Configuration
* Configuration Options for DPLL1.
* @{
*/
#define CONF_CORE_CLK_DPLL1_ENABLE (0)
#define CONF_CORE_CLK_DPLL1_ONDEMAND (0)
#define CONF_CORE_CLK_DPLL1_RUNSTDBY (0)
#define CONF_CORE_CLK_DPLL1_LDRFRAC_VAL 0
#define CONF_CORE_CLK_DPLL1_LDR_VAL (0)
#define CONF_CORE_CLK_DPLL1_DIV_VAL (0)
#define CONF_CORE_CLK_DPLL1_DCOEN 0
#define CONF_CORE_CLK_DPLL1_DCOFILTER CONF_CORE_CLK_DPLLCTRL_DCOFILTER_3210KHZ
#define CONF_CORE_CLK_DPLL1_LBYPASS 0
#define CONF_CORE_CLK_DPLL1_LTIME 0
#define CONF_CORE_CLK_DPLL1_WUF 0
#define CONF_CORE_CLK_DPLL1_GCLK_SRC GCLK_GENCTRL_SRC_XOSC0
#define CONF_CORE_CLK_DPLL1_REFCLK CONF_CORE_CLK_DPLLCTRL_REFCLK_XOSC0
/**
* pg. 732 of the datasheet
* ~~~
* FILTER[3:0] | PLL Bandwidth (fn) | Damping Factor
* 0x0 | 92.7 kHz | 0.76
* 0x1 | 131 kHz | 1.08
* 0x2 | 46.4 kHz | 0.38
* 0x3 | 65.6 kHz | 0.54
* 0x4 | 131 kHz | 0.56
* 0x5 | 185 kHz | 0.79
* 0x6 | 65.6 kHz | 0.28
* 0x7 | 92.7 kHz | 0.39
* 0x8 | 46.4 kHz | 1.49
* 0x9 | 65.6 kHz | 2.11
* 0xA | 23.2 kHz | 0.75
* 0xB | 32.8 kHz | 1.06
* 0xC | 65.6 kHz | 1.07
* 0xD | 92.7 kHz | 1.51
* 0xE | 32.8 kHz | 0.53
* 0xF | 46.4 kHz | 0.75
* ~~~
*
* When in doubt, leave this at its default.
*/
#define CONF_CORE_CLK_DPLL1_FILTER 0x0
/** @} */
// GCLK Generators Config
#define CONF_CORE_GCLK_0_ENABLE 1
#define CONF_CORE_GCLK_0_RUN_IN_STANDBY 1
#define CONF_CORE_GCLK_0_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC0
#define CONF_CORE_GCLK_0_DIV_VAL 1
#define CONF_CORE_GCLK_0_DIVSEL 0
#define CONF_CORE_GCLK_0_OUTPUT_ENABLE 1
#define CONF_CORE_GCLK_0_OUTPUT_OFF_VALUE 1
#define CONF_CORE_GCLK_0_IDC 1
#define CONF_CORE_GCLK_1_ENABLE 0
#define CONF_CORE_GCLK_1_RUN_IN_STANDBY 0
#define CONF_CORE_GCLK_1_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC0
#define CONF_CORE_GCLK_1_DIV_VAL 1
#define CONF_CORE_GCLK_1_DIVSEL 0
#define CONF_CORE_GCLK_1_OUTPUT_ENABLE 0
#define CONF_CORE_GCLK_1_OUTPUT_OFF_VALUE 0
#define CONF_CORE_GCLK_1_IDC 0
#define CONF_CORE_GCLK_2_ENABLE 0
#define CONF_CORE_GCLK_2_RUN_IN_STANDBY 0
#define CONF_CORE_GCLK_2_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC0
#define CONF_CORE_GCLK_2_DIV_VAL 1
#define CONF_CORE_GCLK_2_DIVSEL 0
#define CONF_CORE_GCLK_2_OUTPUT_ENABLE 0
#define CONF_CORE_GCLK_2_OUTPUT_OFF_VALUE 0
#define CONF_CORE_GCLK_2_IDC 0
#define CONF_CORE_GCLK_3_ENABLE 1
#define CONF_CORE_GCLK_3_RUN_IN_STANDBY 0
#define CONF_CORE_GCLK_3_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC32K
#define CONF_CORE_GCLK_3_DIV_VAL 1
#define CONF_CORE_GCLK_3_DIVSEL 0
#define CONF_CORE_GCLK_3_OUTPUT_ENABLE 0
#define CONF_CORE_GCLK_3_OUTPUT_OFF_VALUE 0
#define CONF_CORE_GCLK_3_IDC 0
#define CONF_CORE_GCLK_4_ENABLE 0
#define CONF_CORE_GCLK_4_RUN_IN_STANDBY 0
#define CONF_CORE_GCLK_4_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC0
#define CONF_CORE_GCLK_4_DIV_VAL 1
#define CONF_CORE_GCLK_4_DIVSEL 1
#define CONF_CORE_GCLK_4_OUTPUT_ENABLE 0
#define CONF_CORE_GCLK_4_OUTPUT_OFF_VALUE 0
#define CONF_CORE_GCLK_4_IDC 0
#define CONF_CORE_GCLK_5_ENABLE 0
#define CONF_CORE_GCLK_5_RUN_IN_STANDBY 0
#define CONF_CORE_GCLK_5_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC0
#define CONF_CORE_GCLK_5_DIV_VAL 1
#define CONF_CORE_GCLK_5_DIVSEL 0
#define CONF_CORE_GCLK_5_OUTPUT_ENABLE 0
#define CONF_CORE_GCLK_5_OUTPUT_OFF_VALUE 0
#define CONF_CORE_GCLK_5_IDC 0
#define CONF_CORE_GCLK_6_ENABLE 0
#define CONF_CORE_GCLK_6_RUN_IN_STANDBY 0
#define CONF_CORE_GCLK_6_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC0
#define CONF_CORE_GCLK_6_DIV_VAL 1
#define CONF_CORE_GCLK_6_DIVSEL 0
#define CONF_CORE_GCLK_6_OUTPUT_ENABLE 0
#define CONF_CORE_GCLK_6_OUTPUT_OFF_VALUE 0
#define CONF_CORE_GCLK_6_IDC 0
#define CONF_CORE_GCLK_7_ENABLE 0
#define CONF_CORE_GCLK_7_RUN_IN_STANDBY 0
#define CONF_CORE_GCLK_7_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC0
#define CONF_CORE_GCLK_7_DIV_VAL 1
#define CONF_CORE_GCLK_7_DIVSEL 0
#define CONF_CORE_GCLK_7_OUTPUT_ENABLE 0
#define CONF_CORE_GCLK_7_OUTPUT_OFF_VALUE 0
#define CONF_CORE_GCLK_7_IDC 0
#define CONF_CORE_GCLK_8_ENABLE 0
#define CONF_CORE_GCLK_8_RUN_IN_STANDBY 0
#define CONF_CORE_GCLK_8_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC0
#define CONF_CORE_GCLK_8_DIV_VAL 1
#define CONF_CORE_GCLK_8_DIVSEL 0
#define CONF_CORE_GCLK_8_OUTPUT_ENABLE 0
#define CONF_CORE_GCLK_8_OUTPUT_OFF_VALUE 0
#define CONF_CORE_GCLK_8_IDC 0
#define CONF_CORE_GCLK_9_ENABLE 0
#define CONF_CORE_GCLK_9_RUN_IN_STANDBY 0
#define CONF_CORE_GCLK_9_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC0
#define CONF_CORE_GCLK_9_DIV_VAL 1
#define CONF_CORE_GCLK_9_DIVSEL 0
#define CONF_CORE_GCLK_9_OUTPUT_ENABLE 0
#define CONF_CORE_GCLK_9_OUTPUT_OFF_VALUE 0
#define CONF_CORE_GCLK_9_IDC 0
#define CONF_CORE_GCLK_10_ENABLE 0
#define CONF_CORE_GCLK_10_RUN_IN_STANDBY 0
#define CONF_CORE_GCLK_10_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC0
#define CONF_CORE_GCLK_10_DIV_VAL 1
#define CONF_CORE_GCLK_10_DIVSEL 0
#define CONF_CORE_GCLK_10_OUTPUT_ENABLE 0
#define CONF_CORE_GCLK_10_OUTPUT_OFF_VALUE 0
#define CONF_CORE_GCLK_10_IDC 0
#define CONF_CORE_GCLK_11_ENABLE 0
#define CONF_CORE_GCLK_11_RUN_IN_STANDBY 0
#define CONF_CORE_GCLK_11_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC0
#define CONF_CORE_GCLK_11_DIV_VAL 1
#define CONF_CORE_GCLK_11_DIVSEL 0
#define CONF_CORE_GCLK_11_OUTPUT_ENABLE 0
#define CONF_CORE_GCLK_11_OUTPUT_OFF_VALUE 0
#define CONF_CORE_GCLK_11_IDC 0
#endif

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test/same54p20a_test/cfg/conf_sercom.h
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#ifndef __CONF_SERCOM_H__
#define __CONF_SERCOM_H__
#define CONF_SERCOM_0_ENABLE (0)
#define CONF_SERCOM_1_ENABLE (0)
#define CONF_SERCOM_2_ENABLE (0)
#define CONF_SERCOM_3_ENABLE (0)
#define CONF_SERCOM_4_ENABLE (0)
#define CONF_SERCOM_5_ENABLE (0)
#define CONF_SERCOM_6_ENABLE (0)
#define CONF_SERCOM_7_ENABLE (0)
#define CONF_SERCOM_0_USART_ENABLE 1
#define CONF_SERCOM_0_USART_RXEN 1
#define CONF_SERCOM_0_USART_TXEN 1
#define CONF_SERCOM_0_USART_PARITY 0
#define CONF_SERCOM_0_USART_CHSIZE 0
#define CONF_SERCOM_0_USART_SBMODE 0
#define CONF_SERCOM_0_USART_BAUD 115200
#define CONF_SERCOM_0_USART_ADVANCED_CONFIG 0
#define CONF_SERCOM_0_USART_RUNSTANDBY 0
#define CONF_SERCOM_0_USART_IBON 0
#define CONF_SERCOM_0_USART_SFDE 0
#define CONF_SERCOM_0_USART_CLODEN 0
#define CONF_SERCOM_0_USART_MODE 0x1
#define CONF_SERCOM_0_USART_SAMPR 0x0
#define CONF_SERCOM_0_USART_SAMPA 0x0
#define CONF_SERCOM_0_USART_DORD 1
#define CONF_SERCOM_0_USART_CPOL 0
#define CONF_SERCOM_0_USART_ENC 0
#define CONF_SERCOM_0_USART_LIN_SLAVE_ENABLE 0
#define CONF_SERCOM_0_USART_DEBUG_STOP_MODE 0
#define CONF_SERCOM_0_USART_INACK 0x0
#define CONF_SERCOM_0_USART_DSNACK 0x0
#define CONF_SERCOM_0_USART_MAXITER 0x7
#define CONF_SERCOM_0_USART_GTIME 0x2
#define CONF_SERCOM_0_USART_RXINV 0x0
#define CONF_SERCOM_0_USART_TXINV 0x0
#define CONF_SERCOM_0_USART_CMODE 1
#define CONF_SERCOM_0_USART_RXPO 1 // RX is on PIN_PA05
#define CONF_SERCOM_0_USART_TXPO 0
#if CONF_SERCOM_0_USART_LIN_SLAVE_ENABLE == 1
#if CONF_SERCOM_0_USART_PARITY == 0
#define CONF_SERCOM_0_USART_PMODE 0
#define CONF_SERCOM_0_USART_FORM 4
#else
#define CONF_SERCOM_0_USART_PMODE CONF_SERCOM_0_USART_PARITY - 1
#define CONF_SERCOM_0_USART_FORM 5
#endif
#else
#if CONF_SERCOM_0_USART_PARITY == 0
#define CONF_SERCOM_0_USART_PMODE 0
#define CONF_SERCOM_0_USART_FORM 0
#else
#define CONF_SERCOM_0_USART_PMODE CONF_SERCOM_0_USART_PARITY - 1
#define CONF_SERCOM_0_USART_FORM 1
#endif
#endif
#if CONF_SERCOM_0_USART_SAMPR == 0
#define CONF_SERCOM_0_USART_BAUD_RATE \
(65536 - ((65536 * 16.0f * CONF_SERCOM_0_USART_BAUD) / CONF_GCLK_SERCOM0_CORE_FREQUENCY))

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Macros</h2></td></tr>
<tr class="memitem:a9c44654964789482627e57ff5071a07e"><td class="memItemLeft" align="right" valign="top"><a id="a9c44654964789482627e57ff5071a07e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc0_8h.html#a9c44654964789482627e57ff5071a07e">REG_ADC0_CTRLA</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x43001C00UL)</td></tr>
<tr class="memdesc:a9c44654964789482627e57ff5071a07e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC0) Control A <br /></td></tr>
<tr class="separator:a9c44654964789482627e57ff5071a07e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a026712b3837538e8277d8154f47169a7"><td class="memItemLeft" align="right" valign="top"><a id="a026712b3837538e8277d8154f47169a7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc0_8h.html#a026712b3837538e8277d8154f47169a7">REG_ADC0_EVCTRL</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43001C02UL)</td></tr>
<tr class="memdesc:a026712b3837538e8277d8154f47169a7"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC0) Event Control <br /></td></tr>
<tr class="separator:a026712b3837538e8277d8154f47169a7"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc0_8h.html#a89bc5e8029ad34ddc5e1f8eca07ffc47">REG_ADC0_DBGCTRL</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43001C03UL)</td></tr>
<tr class="memdesc:a89bc5e8029ad34ddc5e1f8eca07ffc47"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC0) Debug Control <br /></td></tr>
<tr class="separator:a89bc5e8029ad34ddc5e1f8eca07ffc47"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1ff6f7b23dbd51f99217830bcca9b664"><td class="memItemLeft" align="right" valign="top"><a id="a1ff6f7b23dbd51f99217830bcca9b664"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc0_8h.html#a1ff6f7b23dbd51f99217830bcca9b664">REG_ADC0_INPUTCTRL</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x43001C04UL)</td></tr>
<tr class="memdesc:a1ff6f7b23dbd51f99217830bcca9b664"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC0) Input Control <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc0_8h.html#afd40546059b3a35d6396fbfd6c8b585f">REG_ADC0_CTRLB</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x43001C06UL)</td></tr>
<tr class="memdesc:afd40546059b3a35d6396fbfd6c8b585f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC0) Control B <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc0_8h.html#aaf24a8578351101f1763e8abc79ec933">REG_ADC0_REFCTRL</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43001C08UL)</td></tr>
<tr class="memdesc:aaf24a8578351101f1763e8abc79ec933"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC0) Reference Control <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc0_8h.html#a8952a2b2bb668406de90b8c4fb1cdd6b">REG_ADC0_AVGCTRL</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43001C0AUL)</td></tr>
<tr class="memdesc:a8952a2b2bb668406de90b8c4fb1cdd6b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC0) Average Control <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc0_8h.html#afdcaef912fad2e2b46eeba24d72b4a45">REG_ADC0_SAMPCTRL</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43001C0BUL)</td></tr>
<tr class="memdesc:afdcaef912fad2e2b46eeba24d72b4a45"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC0) Sample Time Control <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc0_8h.html#a026503ed8170e8870378faaa9a114c66">REG_ADC0_WINLT</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x43001C0CUL)</td></tr>
<tr class="memdesc:a026503ed8170e8870378faaa9a114c66"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC0) Window Monitor Lower Threshold <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc0_8h.html#a251d70cd9f80815364ea3f827aa99fef">REG_ADC0_WINUT</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x43001C0EUL)</td></tr>
<tr class="memdesc:a251d70cd9f80815364ea3f827aa99fef"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC0) Window Monitor Upper Threshold <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc0_8h.html#ac42157160d191aeea77d9d685abe50fc">REG_ADC0_GAINCORR</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x43001C10UL)</td></tr>
<tr class="memdesc:ac42157160d191aeea77d9d685abe50fc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC0) Gain Correction <br /></td></tr>
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<tr class="memitem:a5cdecdc886b77341d36f648e7fb0fe3b"><td class="memItemLeft" align="right" valign="top"><a id="a5cdecdc886b77341d36f648e7fb0fe3b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc0_8h.html#a5cdecdc886b77341d36f648e7fb0fe3b">REG_ADC0_OFFSETCORR</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x43001C12UL)</td></tr>
<tr class="memdesc:a5cdecdc886b77341d36f648e7fb0fe3b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC0) Offset Correction <br /></td></tr>
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<tr class="memitem:a0b0e88a17a2d0503d6194c8500ec7f6c"><td class="memItemLeft" align="right" valign="top"><a id="a0b0e88a17a2d0503d6194c8500ec7f6c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc0_8h.html#a0b0e88a17a2d0503d6194c8500ec7f6c">REG_ADC0_SWTRIG</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43001C14UL)</td></tr>
<tr class="memdesc:a0b0e88a17a2d0503d6194c8500ec7f6c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC0) Software Trigger <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc0_8h.html#a0b79fa5de2a0c2f579a7df8861a1bc01">REG_ADC0_INTENCLR</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43001C2CUL)</td></tr>
<tr class="memdesc:a0b79fa5de2a0c2f579a7df8861a1bc01"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC0) Interrupt Enable Clear <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc0_8h.html#a5c2c445c5b9dbf2b0d3e8143eb858546">REG_ADC0_INTENSET</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43001C2DUL)</td></tr>
<tr class="memdesc:a5c2c445c5b9dbf2b0d3e8143eb858546"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC0) Interrupt Enable Set <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc0_8h.html#a63608c90cac35807698cd20ef4709a6f">REG_ADC0_INTFLAG</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43001C2EUL)</td></tr>
<tr class="memdesc:a63608c90cac35807698cd20ef4709a6f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC0) Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="memitem:a4d4e83d475b9725af6adbcf73a534fef"><td class="memItemLeft" align="right" valign="top"><a id="a4d4e83d475b9725af6adbcf73a534fef"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc0_8h.html#a4d4e83d475b9725af6adbcf73a534fef">REG_ADC0_STATUS</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> *)0x43001C2FUL)</td></tr>
<tr class="memdesc:a4d4e83d475b9725af6adbcf73a534fef"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC0) Status <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc0_8h.html#ae5b477ada134263a79f333977a355445">REG_ADC0_SYNCBUSY</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x43001C30UL)</td></tr>
<tr class="memdesc:ae5b477ada134263a79f333977a355445"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC0) Synchronization Busy <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc0_8h.html#af6e1172e49d902e0ceefabf7e0dc73f5">REG_ADC0_DSEQDATA</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#ac0f96d4e8018367b38f527007cf0eafd">WoReg</a> *)0x43001C34UL)</td></tr>
<tr class="memdesc:af6e1172e49d902e0ceefabf7e0dc73f5"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC0) DMA Sequencial Data <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc0_8h.html#ac3f568691226998d2fe342ead8839cc1">REG_ADC0_DSEQCTRL</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43001C38UL)</td></tr>
<tr class="memdesc:ac3f568691226998d2fe342ead8839cc1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC0) DMA Sequential Control <br /></td></tr>
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<tr class="memitem:a821cac42870b3e9378da57aa64293d3c"><td class="memItemLeft" align="right" valign="top"><a id="a821cac42870b3e9378da57aa64293d3c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc0_8h.html#a821cac42870b3e9378da57aa64293d3c">REG_ADC0_DSEQSTAT</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x43001C3CUL)</td></tr>
<tr class="memdesc:a821cac42870b3e9378da57aa64293d3c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC0) DMA Sequencial Status <br /></td></tr>
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<tr class="memitem:aae29476dcfda186cbf333babd08b7697"><td class="memItemLeft" align="right" valign="top"><a id="aae29476dcfda186cbf333babd08b7697"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc0_8h.html#aae29476dcfda186cbf333babd08b7697">REG_ADC0_RESULT</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#aebf6e33c2d49a802e06e22a95ea9d0d0">RoReg16</a>*)0x43001C40UL)</td></tr>
<tr class="memdesc:aae29476dcfda186cbf333babd08b7697"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC0) Result Conversion Value <br /></td></tr>
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<tr class="memitem:acf6c96f34d09ae75760f59c38967ade9"><td class="memItemLeft" align="right" valign="top"><a id="acf6c96f34d09ae75760f59c38967ade9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc0_8h.html#acf6c96f34d09ae75760f59c38967ade9">REG_ADC0_RESS</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#aebf6e33c2d49a802e06e22a95ea9d0d0">RoReg16</a>*)0x43001C44UL)</td></tr>
<tr class="memdesc:acf6c96f34d09ae75760f59c38967ade9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC0) Last Sample Result <br /></td></tr>
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<tr class="memitem:afafc7b0a4ce23db4f0cd5911b382b562"><td class="memItemLeft" align="right" valign="top"><a id="afafc7b0a4ce23db4f0cd5911b382b562"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc0_8h.html#afafc7b0a4ce23db4f0cd5911b382b562">REG_ADC0_CALIB</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x43001C48UL)</td></tr>
<tr class="memdesc:afafc7b0a4ce23db4f0cd5911b382b562"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC0) Calibration <br /></td></tr>
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<tr class="memitem:a7279f9e7d4ae97ad2a0e2ce2d5f99b8e"><td class="memItemLeft" align="right" valign="top"><a id="a7279f9e7d4ae97ad2a0e2ce2d5f99b8e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ADC0_BANDGAP</b>&#160;&#160;&#160;27</td></tr>
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<tr class="memitem:af6d9ea3c751e05cf0d99244e332435d1"><td class="memItemLeft" align="right" valign="top"><a id="af6d9ea3c751e05cf0d99244e332435d1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ADC0_CTAT</b>&#160;&#160;&#160;29</td></tr>
<tr class="separator:af6d9ea3c751e05cf0d99244e332435d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a10d39498b8311f40ff238dd5ce85dd01"><td class="memItemLeft" align="right" valign="top"><a id="a10d39498b8311f40ff238dd5ce85dd01"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ADC0_DMAC_ID_RESRDY</b>&#160;&#160;&#160;68</td></tr>
<tr class="separator:a10d39498b8311f40ff238dd5ce85dd01"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a69ac879b25d16e604821f76521e2efef"><td class="memItemLeft" align="right" valign="top"><a id="a69ac879b25d16e604821f76521e2efef"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ADC0_DMAC_ID_SEQ</b>&#160;&#160;&#160;69</td></tr>
<tr class="separator:a69ac879b25d16e604821f76521e2efef"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa1b3b4d9cba40e82decbc3522ffa0e28"><td class="memItemLeft" align="right" valign="top"><a id="aa1b3b4d9cba40e82decbc3522ffa0e28"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ADC0_EXTCHANNEL_MSB</b>&#160;&#160;&#160;15</td></tr>
<tr class="separator:aa1b3b4d9cba40e82decbc3522ffa0e28"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6f1acb6df0affaa0c12ba765fa51459c"><td class="memItemLeft" align="right" valign="top"><a id="a6f1acb6df0affaa0c12ba765fa51459c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ADC0_GCLK_ID</b>&#160;&#160;&#160;40</td></tr>
<tr class="separator:a6f1acb6df0affaa0c12ba765fa51459c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a61bd276272d9d314b5b738dcadd89451"><td class="memItemLeft" align="right" valign="top"><a id="a61bd276272d9d314b5b738dcadd89451"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ADC0_MASTER_SLAVE_MODE</b>&#160;&#160;&#160;1</td></tr>
<tr class="separator:a61bd276272d9d314b5b738dcadd89451"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa4d7e913b76ea3572b81e11ec9a8f20a"><td class="memItemLeft" align="right" valign="top"><a id="aa4d7e913b76ea3572b81e11ec9a8f20a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ADC0_OPAMP2</b>&#160;&#160;&#160;0</td></tr>
<tr class="separator:aa4d7e913b76ea3572b81e11ec9a8f20a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9a1e0383e6b0cee0b4d4a003a233ef2d"><td class="memItemLeft" align="right" valign="top"><a id="a9a1e0383e6b0cee0b4d4a003a233ef2d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ADC0_OPAMP01</b>&#160;&#160;&#160;0</td></tr>
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<tr class="memitem:adcca29282aa3ddebcd649d30c39fcb93"><td class="memItemLeft" align="right" valign="top"><a id="adcca29282aa3ddebcd649d30c39fcb93"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ADC0_PTAT</b>&#160;&#160;&#160;28</td></tr>
<tr class="separator:adcca29282aa3ddebcd649d30c39fcb93"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9d3e577532ebc0936abb892a77828839"><td class="memItemLeft" align="right" valign="top"><a id="a9d3e577532ebc0936abb892a77828839"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ADC0_TOUCH_IMPLEMENTED</b>&#160;&#160;&#160;1</td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Instance description for ADC0. </p>
<p>Copyright (c) 2019 Microchip Technology Inc.</p>
<p>\asf_license_start </p>
<p class="definition">Definition in file <a class="el" href="adc0_8h_source.html">adc0.h</a>.</p>
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<a href="adc0_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_ADC0_INSTANCE_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_ADC0_INSTANCE_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="comment">/* ========== Register definition for ADC0 peripheral ========== */</span></div>
<div class="line"><a name="l00034"></a><span class="lineno"> 34</span>&#160;<span class="preprocessor">#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="preprocessor">#define REG_ADC0_CTRLA (0x43001C00) </span></div>
<div class="line"><a name="l00036"></a><span class="lineno"> 36</span>&#160;<span class="preprocessor">#define REG_ADC0_EVCTRL (0x43001C02) </span></div>
<div class="line"><a name="l00037"></a><span class="lineno"> 37</span>&#160;<span class="preprocessor">#define REG_ADC0_DBGCTRL (0x43001C03) </span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160;<span class="preprocessor">#define REG_ADC0_INPUTCTRL (0x43001C04) </span></div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define REG_ADC0_CTRLB (0x43001C06) </span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define REG_ADC0_REFCTRL (0x43001C08) </span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160;<span class="preprocessor">#define REG_ADC0_AVGCTRL (0x43001C0A) </span></div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="preprocessor">#define REG_ADC0_SAMPCTRL (0x43001C0B) </span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#define REG_ADC0_WINLT (0x43001C0C) </span></div>
<div class="line"><a name="l00044"></a><span class="lineno"> 44</span>&#160;<span class="preprocessor">#define REG_ADC0_WINUT (0x43001C0E) </span></div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160;<span class="preprocessor">#define REG_ADC0_GAINCORR (0x43001C10) </span></div>
<div class="line"><a name="l00046"></a><span class="lineno"> 46</span>&#160;<span class="preprocessor">#define REG_ADC0_OFFSETCORR (0x43001C12) </span></div>
<div class="line"><a name="l00047"></a><span class="lineno"> 47</span>&#160;<span class="preprocessor">#define REG_ADC0_SWTRIG (0x43001C14) </span></div>
<div class="line"><a name="l00048"></a><span class="lineno"> 48</span>&#160;<span class="preprocessor">#define REG_ADC0_INTENCLR (0x43001C2C) </span></div>
<div class="line"><a name="l00049"></a><span class="lineno"> 49</span>&#160;<span class="preprocessor">#define REG_ADC0_INTENSET (0x43001C2D) </span></div>
<div class="line"><a name="l00050"></a><span class="lineno"> 50</span>&#160;<span class="preprocessor">#define REG_ADC0_INTFLAG (0x43001C2E) </span></div>
<div class="line"><a name="l00051"></a><span class="lineno"> 51</span>&#160;<span class="preprocessor">#define REG_ADC0_STATUS (0x43001C2F) </span></div>
<div class="line"><a name="l00052"></a><span class="lineno"> 52</span>&#160;<span class="preprocessor">#define REG_ADC0_SYNCBUSY (0x43001C30) </span></div>
<div class="line"><a name="l00053"></a><span class="lineno"> 53</span>&#160;<span class="preprocessor">#define REG_ADC0_DSEQDATA (0x43001C34) </span></div>
<div class="line"><a name="l00054"></a><span class="lineno"> 54</span>&#160;<span class="preprocessor">#define REG_ADC0_DSEQCTRL (0x43001C38) </span></div>
<div class="line"><a name="l00055"></a><span class="lineno"> 55</span>&#160;<span class="preprocessor">#define REG_ADC0_DSEQSTAT (0x43001C3C) </span></div>
<div class="line"><a name="l00056"></a><span class="lineno"> 56</span>&#160;<span class="preprocessor">#define REG_ADC0_RESULT (0x43001C40) </span></div>
<div class="line"><a name="l00057"></a><span class="lineno"> 57</span>&#160;<span class="preprocessor">#define REG_ADC0_RESS (0x43001C44) </span></div>
<div class="line"><a name="l00058"></a><span class="lineno"> 58</span>&#160;<span class="preprocessor">#define REG_ADC0_CALIB (0x43001C48) </span></div>
<div class="line"><a name="l00059"></a><span class="lineno"> 59</span>&#160;<span class="preprocessor">#else</span></div>
<div class="line"><a name="l00060"></a><span class="lineno"><a class="line" href="adc0_8h.html#a9c44654964789482627e57ff5071a07e"> 60</a></span>&#160;<span class="preprocessor">#define REG_ADC0_CTRLA (*(RwReg16*)0x43001C00UL) </span></div>
<div class="line"><a name="l00061"></a><span class="lineno"><a class="line" href="adc0_8h.html#a026712b3837538e8277d8154f47169a7"> 61</a></span>&#160;<span class="preprocessor">#define REG_ADC0_EVCTRL (*(RwReg8 *)0x43001C02UL) </span></div>
<div class="line"><a name="l00062"></a><span class="lineno"><a class="line" href="adc0_8h.html#a89bc5e8029ad34ddc5e1f8eca07ffc47"> 62</a></span>&#160;<span class="preprocessor">#define REG_ADC0_DBGCTRL (*(RwReg8 *)0x43001C03UL) </span></div>
<div class="line"><a name="l00063"></a><span class="lineno"><a class="line" href="adc0_8h.html#a1ff6f7b23dbd51f99217830bcca9b664"> 63</a></span>&#160;<span class="preprocessor">#define REG_ADC0_INPUTCTRL (*(RwReg16*)0x43001C04UL) </span></div>
<div class="line"><a name="l00064"></a><span class="lineno"><a class="line" href="adc0_8h.html#afd40546059b3a35d6396fbfd6c8b585f"> 64</a></span>&#160;<span class="preprocessor">#define REG_ADC0_CTRLB (*(RwReg16*)0x43001C06UL) </span></div>
<div class="line"><a name="l00065"></a><span class="lineno"><a class="line" href="adc0_8h.html#aaf24a8578351101f1763e8abc79ec933"> 65</a></span>&#160;<span class="preprocessor">#define REG_ADC0_REFCTRL (*(RwReg8 *)0x43001C08UL) </span></div>
<div class="line"><a name="l00066"></a><span class="lineno"><a class="line" href="adc0_8h.html#a8952a2b2bb668406de90b8c4fb1cdd6b"> 66</a></span>&#160;<span class="preprocessor">#define REG_ADC0_AVGCTRL (*(RwReg8 *)0x43001C0AUL) </span></div>
<div class="line"><a name="l00067"></a><span class="lineno"><a class="line" href="adc0_8h.html#afdcaef912fad2e2b46eeba24d72b4a45"> 67</a></span>&#160;<span class="preprocessor">#define REG_ADC0_SAMPCTRL (*(RwReg8 *)0x43001C0BUL) </span></div>
<div class="line"><a name="l00068"></a><span class="lineno"><a class="line" href="adc0_8h.html#a026503ed8170e8870378faaa9a114c66"> 68</a></span>&#160;<span class="preprocessor">#define REG_ADC0_WINLT (*(RwReg16*)0x43001C0CUL) </span></div>
<div class="line"><a name="l00069"></a><span class="lineno"><a class="line" href="adc0_8h.html#a251d70cd9f80815364ea3f827aa99fef"> 69</a></span>&#160;<span class="preprocessor">#define REG_ADC0_WINUT (*(RwReg16*)0x43001C0EUL) </span></div>
<div class="line"><a name="l00070"></a><span class="lineno"><a class="line" href="adc0_8h.html#ac42157160d191aeea77d9d685abe50fc"> 70</a></span>&#160;<span class="preprocessor">#define REG_ADC0_GAINCORR (*(RwReg16*)0x43001C10UL) </span></div>
<div class="line"><a name="l00071"></a><span class="lineno"><a class="line" href="adc0_8h.html#a5cdecdc886b77341d36f648e7fb0fe3b"> 71</a></span>&#160;<span class="preprocessor">#define REG_ADC0_OFFSETCORR (*(RwReg16*)0x43001C12UL) </span></div>
<div class="line"><a name="l00072"></a><span class="lineno"><a class="line" href="adc0_8h.html#a0b0e88a17a2d0503d6194c8500ec7f6c"> 72</a></span>&#160;<span class="preprocessor">#define REG_ADC0_SWTRIG (*(RwReg8 *)0x43001C14UL) </span></div>
<div class="line"><a name="l00073"></a><span class="lineno"><a class="line" href="adc0_8h.html#a0b79fa5de2a0c2f579a7df8861a1bc01"> 73</a></span>&#160;<span class="preprocessor">#define REG_ADC0_INTENCLR (*(RwReg8 *)0x43001C2CUL) </span></div>
<div class="line"><a name="l00074"></a><span class="lineno"><a class="line" href="adc0_8h.html#a5c2c445c5b9dbf2b0d3e8143eb858546"> 74</a></span>&#160;<span class="preprocessor">#define REG_ADC0_INTENSET (*(RwReg8 *)0x43001C2DUL) </span></div>
<div class="line"><a name="l00075"></a><span class="lineno"><a class="line" href="adc0_8h.html#a63608c90cac35807698cd20ef4709a6f"> 75</a></span>&#160;<span class="preprocessor">#define REG_ADC0_INTFLAG (*(RwReg8 *)0x43001C2EUL) </span></div>
<div class="line"><a name="l00076"></a><span class="lineno"><a class="line" href="adc0_8h.html#a4d4e83d475b9725af6adbcf73a534fef"> 76</a></span>&#160;<span class="preprocessor">#define REG_ADC0_STATUS (*(RoReg8 *)0x43001C2FUL) </span></div>
<div class="line"><a name="l00077"></a><span class="lineno"><a class="line" href="adc0_8h.html#ae5b477ada134263a79f333977a355445"> 77</a></span>&#160;<span class="preprocessor">#define REG_ADC0_SYNCBUSY (*(RoReg *)0x43001C30UL) </span></div>
<div class="line"><a name="l00078"></a><span class="lineno"><a class="line" href="adc0_8h.html#af6e1172e49d902e0ceefabf7e0dc73f5"> 78</a></span>&#160;<span class="preprocessor">#define REG_ADC0_DSEQDATA (*(WoReg *)0x43001C34UL) </span></div>
<div class="line"><a name="l00079"></a><span class="lineno"><a class="line" href="adc0_8h.html#ac3f568691226998d2fe342ead8839cc1"> 79</a></span>&#160;<span class="preprocessor">#define REG_ADC0_DSEQCTRL (*(RwReg *)0x43001C38UL) </span></div>
<div class="line"><a name="l00080"></a><span class="lineno"><a class="line" href="adc0_8h.html#a821cac42870b3e9378da57aa64293d3c"> 80</a></span>&#160;<span class="preprocessor">#define REG_ADC0_DSEQSTAT (*(RoReg *)0x43001C3CUL) </span></div>
<div class="line"><a name="l00081"></a><span class="lineno"><a class="line" href="adc0_8h.html#aae29476dcfda186cbf333babd08b7697"> 81</a></span>&#160;<span class="preprocessor">#define REG_ADC0_RESULT (*(RoReg16*)0x43001C40UL) </span></div>
<div class="line"><a name="l00082"></a><span class="lineno"><a class="line" href="adc0_8h.html#acf6c96f34d09ae75760f59c38967ade9"> 82</a></span>&#160;<span class="preprocessor">#define REG_ADC0_RESS (*(RoReg16*)0x43001C44UL) </span></div>
<div class="line"><a name="l00083"></a><span class="lineno"><a class="line" href="adc0_8h.html#afafc7b0a4ce23db4f0cd5911b382b562"> 83</a></span>&#160;<span class="preprocessor">#define REG_ADC0_CALIB (*(RwReg16*)0x43001C48UL) </span></div>
<div class="line"><a name="l00084"></a><span class="lineno"> 84</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00085"></a><span class="lineno"> 85</span>&#160; </div>
<div class="line"><a name="l00086"></a><span class="lineno"> 86</span>&#160;<span class="comment">/* ========== Instance parameters for ADC0 peripheral ========== */</span></div>
<div class="line"><a name="l00087"></a><span class="lineno"> 87</span>&#160;<span class="preprocessor">#define ADC0_BANDGAP 27 // MUXPOS value to select BANDGAP</span></div>
<div class="line"><a name="l00088"></a><span class="lineno"> 88</span>&#160;<span class="preprocessor">#define ADC0_CTAT 29 // MUXPOS value to select CTAT</span></div>
<div class="line"><a name="l00089"></a><span class="lineno"> 89</span>&#160;<span class="preprocessor">#define ADC0_DMAC_ID_RESRDY 68 // index of DMA RESRDY trigger</span></div>
<div class="line"><a name="l00090"></a><span class="lineno"> 90</span>&#160;<span class="preprocessor">#define ADC0_DMAC_ID_SEQ 69 // Index of DMA SEQ trigger</span></div>
<div class="line"><a name="l00091"></a><span class="lineno"> 91</span>&#160;<span class="preprocessor">#define ADC0_EXTCHANNEL_MSB 15 // Number of external channels</span></div>
<div class="line"><a name="l00092"></a><span class="lineno"> 92</span>&#160;<span class="preprocessor">#define ADC0_GCLK_ID 40 // index of Generic Clock</span></div>
<div class="line"><a name="l00093"></a><span class="lineno"> 93</span>&#160;<span class="preprocessor">#define ADC0_MASTER_SLAVE_MODE 1 // ADC Master/Slave Mode</span></div>
<div class="line"><a name="l00094"></a><span class="lineno"> 94</span>&#160;<span class="preprocessor">#define ADC0_OPAMP2 0 // MUXPOS value to select OPAMP2</span></div>
<div class="line"><a name="l00095"></a><span class="lineno"> 95</span>&#160;<span class="preprocessor">#define ADC0_OPAMP01 0 // MUXPOS value to select OPAMP01</span></div>
<div class="line"><a name="l00096"></a><span class="lineno"> 96</span>&#160;<span class="preprocessor">#define ADC0_PTAT 28 // MUXPOS value to select PTAT</span></div>
<div class="line"><a name="l00097"></a><span class="lineno"> 97</span>&#160;<span class="preprocessor">#define ADC0_TOUCH_IMPLEMENTED 1 // TOUCH implemented or not</span></div>
<div class="line"><a name="l00098"></a><span class="lineno"> 98</span>&#160; </div>
<div class="line"><a name="l00099"></a><span class="lineno"> 99</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_ADC0_INSTANCE_ */</span><span class="preprocessor"></span></div>
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<p>Instance description for ADC1.
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:a889bb4afda6f19016be53f942d9dcaa7"><td class="memItemLeft" align="right" valign="top"><a id="a889bb4afda6f19016be53f942d9dcaa7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a889bb4afda6f19016be53f942d9dcaa7">REG_ADC1_CTRLA</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x43002000UL)</td></tr>
<tr class="memdesc:a889bb4afda6f19016be53f942d9dcaa7"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC1) Control A <br /></td></tr>
<tr class="separator:a889bb4afda6f19016be53f942d9dcaa7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8d8a85da254fa6254195ec9590c7b90c"><td class="memItemLeft" align="right" valign="top"><a id="a8d8a85da254fa6254195ec9590c7b90c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a8d8a85da254fa6254195ec9590c7b90c">REG_ADC1_EVCTRL</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43002002UL)</td></tr>
<tr class="memdesc:a8d8a85da254fa6254195ec9590c7b90c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC1) Event Control <br /></td></tr>
<tr class="separator:a8d8a85da254fa6254195ec9590c7b90c"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a27832ea3120141700dff4462b11a45bf">REG_ADC1_DBGCTRL</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43002003UL)</td></tr>
<tr class="memdesc:a27832ea3120141700dff4462b11a45bf"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC1) Debug Control <br /></td></tr>
<tr class="separator:a27832ea3120141700dff4462b11a45bf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab87e5bf0001e98a97dc2b818b13f60d2"><td class="memItemLeft" align="right" valign="top"><a id="ab87e5bf0001e98a97dc2b818b13f60d2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#ab87e5bf0001e98a97dc2b818b13f60d2">REG_ADC1_INPUTCTRL</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x43002004UL)</td></tr>
<tr class="memdesc:ab87e5bf0001e98a97dc2b818b13f60d2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC1) Input Control <br /></td></tr>
<tr class="separator:ab87e5bf0001e98a97dc2b818b13f60d2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a83295a9be8f972c0fb1d88c4e4981bb7"><td class="memItemLeft" align="right" valign="top"><a id="a83295a9be8f972c0fb1d88c4e4981bb7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a83295a9be8f972c0fb1d88c4e4981bb7">REG_ADC1_CTRLB</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x43002006UL)</td></tr>
<tr class="memdesc:a83295a9be8f972c0fb1d88c4e4981bb7"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC1) Control B <br /></td></tr>
<tr class="separator:a83295a9be8f972c0fb1d88c4e4981bb7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0955264b6ddf8ba672544fbe4ae006ae"><td class="memItemLeft" align="right" valign="top"><a id="a0955264b6ddf8ba672544fbe4ae006ae"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a0955264b6ddf8ba672544fbe4ae006ae">REG_ADC1_REFCTRL</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43002008UL)</td></tr>
<tr class="memdesc:a0955264b6ddf8ba672544fbe4ae006ae"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC1) Reference Control <br /></td></tr>
<tr class="separator:a0955264b6ddf8ba672544fbe4ae006ae"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a513d8fd03493a42685bb94d7efc4805f"><td class="memItemLeft" align="right" valign="top"><a id="a513d8fd03493a42685bb94d7efc4805f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a513d8fd03493a42685bb94d7efc4805f">REG_ADC1_AVGCTRL</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4300200AUL)</td></tr>
<tr class="memdesc:a513d8fd03493a42685bb94d7efc4805f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC1) Average Control <br /></td></tr>
<tr class="separator:a513d8fd03493a42685bb94d7efc4805f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a60c711563b4e055a18e89ddbc234222a"><td class="memItemLeft" align="right" valign="top"><a id="a60c711563b4e055a18e89ddbc234222a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a60c711563b4e055a18e89ddbc234222a">REG_ADC1_SAMPCTRL</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4300200BUL)</td></tr>
<tr class="memdesc:a60c711563b4e055a18e89ddbc234222a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC1) Sample Time Control <br /></td></tr>
<tr class="separator:a60c711563b4e055a18e89ddbc234222a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad8ca474fabf2ec762ada61c55acbe14f"><td class="memItemLeft" align="right" valign="top"><a id="ad8ca474fabf2ec762ada61c55acbe14f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#ad8ca474fabf2ec762ada61c55acbe14f">REG_ADC1_WINLT</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x4300200CUL)</td></tr>
<tr class="memdesc:ad8ca474fabf2ec762ada61c55acbe14f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC1) Window Monitor Lower Threshold <br /></td></tr>
<tr class="separator:ad8ca474fabf2ec762ada61c55acbe14f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8c1f48f8ab952dd8b725c4d225c54ccf"><td class="memItemLeft" align="right" valign="top"><a id="a8c1f48f8ab952dd8b725c4d225c54ccf"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a8c1f48f8ab952dd8b725c4d225c54ccf">REG_ADC1_WINUT</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x4300200EUL)</td></tr>
<tr class="memdesc:a8c1f48f8ab952dd8b725c4d225c54ccf"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC1) Window Monitor Upper Threshold <br /></td></tr>
<tr class="separator:a8c1f48f8ab952dd8b725c4d225c54ccf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8f200e75abed6b2df5bb8a525179cbd8"><td class="memItemLeft" align="right" valign="top"><a id="a8f200e75abed6b2df5bb8a525179cbd8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a8f200e75abed6b2df5bb8a525179cbd8">REG_ADC1_GAINCORR</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x43002010UL)</td></tr>
<tr class="memdesc:a8f200e75abed6b2df5bb8a525179cbd8"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC1) Gain Correction <br /></td></tr>
<tr class="separator:a8f200e75abed6b2df5bb8a525179cbd8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a681c424b05b5d2602f21ca924e6d2c05"><td class="memItemLeft" align="right" valign="top"><a id="a681c424b05b5d2602f21ca924e6d2c05"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a681c424b05b5d2602f21ca924e6d2c05">REG_ADC1_OFFSETCORR</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x43002012UL)</td></tr>
<tr class="memdesc:a681c424b05b5d2602f21ca924e6d2c05"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC1) Offset Correction <br /></td></tr>
<tr class="separator:a681c424b05b5d2602f21ca924e6d2c05"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5925f329a44958467668fc3b65d94454"><td class="memItemLeft" align="right" valign="top"><a id="a5925f329a44958467668fc3b65d94454"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a5925f329a44958467668fc3b65d94454">REG_ADC1_SWTRIG</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43002014UL)</td></tr>
<tr class="memdesc:a5925f329a44958467668fc3b65d94454"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC1) Software Trigger <br /></td></tr>
<tr class="separator:a5925f329a44958467668fc3b65d94454"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab0808e68ce2115779f62d8a27f4d5482"><td class="memItemLeft" align="right" valign="top"><a id="ab0808e68ce2115779f62d8a27f4d5482"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#ab0808e68ce2115779f62d8a27f4d5482">REG_ADC1_INTENCLR</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4300202CUL)</td></tr>
<tr class="memdesc:ab0808e68ce2115779f62d8a27f4d5482"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC1) Interrupt Enable Clear <br /></td></tr>
<tr class="separator:ab0808e68ce2115779f62d8a27f4d5482"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2462454fb3d48f8af9277c0d535223ec"><td class="memItemLeft" align="right" valign="top"><a id="a2462454fb3d48f8af9277c0d535223ec"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a2462454fb3d48f8af9277c0d535223ec">REG_ADC1_INTENSET</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4300202DUL)</td></tr>
<tr class="memdesc:a2462454fb3d48f8af9277c0d535223ec"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC1) Interrupt Enable Set <br /></td></tr>
<tr class="separator:a2462454fb3d48f8af9277c0d535223ec"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a72cbb9a06ebed167d2d093451364c983"><td class="memItemLeft" align="right" valign="top"><a id="a72cbb9a06ebed167d2d093451364c983"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a72cbb9a06ebed167d2d093451364c983">REG_ADC1_INTFLAG</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4300202EUL)</td></tr>
<tr class="memdesc:a72cbb9a06ebed167d2d093451364c983"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC1) Interrupt Flag Status and Clear <br /></td></tr>
<tr class="separator:a72cbb9a06ebed167d2d093451364c983"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9ab116d19eca9b554fd39520cf34de34"><td class="memItemLeft" align="right" valign="top"><a id="a9ab116d19eca9b554fd39520cf34de34"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a9ab116d19eca9b554fd39520cf34de34">REG_ADC1_STATUS</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> *)0x4300202FUL)</td></tr>
<tr class="memdesc:a9ab116d19eca9b554fd39520cf34de34"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC1) Status <br /></td></tr>
<tr class="separator:a9ab116d19eca9b554fd39520cf34de34"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a956ac5ca7327440f1214b92502179c87"><td class="memItemLeft" align="right" valign="top"><a id="a956ac5ca7327440f1214b92502179c87"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a956ac5ca7327440f1214b92502179c87">REG_ADC1_SYNCBUSY</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x43002030UL)</td></tr>
<tr class="memdesc:a956ac5ca7327440f1214b92502179c87"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC1) Synchronization Busy <br /></td></tr>
<tr class="separator:a956ac5ca7327440f1214b92502179c87"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7023a0f2e1d714e4d3481355dec02ab0"><td class="memItemLeft" align="right" valign="top"><a id="a7023a0f2e1d714e4d3481355dec02ab0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a7023a0f2e1d714e4d3481355dec02ab0">REG_ADC1_DSEQDATA</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#ac0f96d4e8018367b38f527007cf0eafd">WoReg</a> *)0x43002034UL)</td></tr>
<tr class="memdesc:a7023a0f2e1d714e4d3481355dec02ab0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC1) DMA Sequencial Data <br /></td></tr>
<tr class="separator:a7023a0f2e1d714e4d3481355dec02ab0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa1061d5398537fbe439e81ad56bad5f1"><td class="memItemLeft" align="right" valign="top"><a id="aa1061d5398537fbe439e81ad56bad5f1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#aa1061d5398537fbe439e81ad56bad5f1">REG_ADC1_DSEQCTRL</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43002038UL)</td></tr>
<tr class="memdesc:aa1061d5398537fbe439e81ad56bad5f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC1) DMA Sequential Control <br /></td></tr>
<tr class="separator:aa1061d5398537fbe439e81ad56bad5f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a91cc5991ee8fa9df4d8feff7b187b903"><td class="memItemLeft" align="right" valign="top"><a id="a91cc5991ee8fa9df4d8feff7b187b903"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a91cc5991ee8fa9df4d8feff7b187b903">REG_ADC1_DSEQSTAT</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x4300203CUL)</td></tr>
<tr class="memdesc:a91cc5991ee8fa9df4d8feff7b187b903"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC1) DMA Sequencial Status <br /></td></tr>
<tr class="separator:a91cc5991ee8fa9df4d8feff7b187b903"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab26c130fe7a9aaa2b2468f22b6eebb38"><td class="memItemLeft" align="right" valign="top"><a id="ab26c130fe7a9aaa2b2468f22b6eebb38"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#ab26c130fe7a9aaa2b2468f22b6eebb38">REG_ADC1_RESULT</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#aebf6e33c2d49a802e06e22a95ea9d0d0">RoReg16</a>*)0x43002040UL)</td></tr>
<tr class="memdesc:ab26c130fe7a9aaa2b2468f22b6eebb38"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC1) Result Conversion Value <br /></td></tr>
<tr class="separator:ab26c130fe7a9aaa2b2468f22b6eebb38"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3f84a3d776fd892f17cd25f486cf9f85"><td class="memItemLeft" align="right" valign="top"><a id="a3f84a3d776fd892f17cd25f486cf9f85"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a3f84a3d776fd892f17cd25f486cf9f85">REG_ADC1_RESS</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#aebf6e33c2d49a802e06e22a95ea9d0d0">RoReg16</a>*)0x43002044UL)</td></tr>
<tr class="memdesc:a3f84a3d776fd892f17cd25f486cf9f85"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC1) Last Sample Result <br /></td></tr>
<tr class="separator:a3f84a3d776fd892f17cd25f486cf9f85"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a500784578d055a8a70b2f8743c94472c"><td class="memItemLeft" align="right" valign="top"><a id="a500784578d055a8a70b2f8743c94472c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a500784578d055a8a70b2f8743c94472c">REG_ADC1_CALIB</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x43002048UL)</td></tr>
<tr class="memdesc:a500784578d055a8a70b2f8743c94472c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(ADC1) Calibration <br /></td></tr>
<tr class="separator:a500784578d055a8a70b2f8743c94472c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae631c69ae57f187850b2a872b7789f7e"><td class="memItemLeft" align="right" valign="top"><a id="ae631c69ae57f187850b2a872b7789f7e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ADC1_BANDGAP</b>&#160;&#160;&#160;27</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>ADC1_CTAT</b>&#160;&#160;&#160;29</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>ADC1_DMAC_ID_RESRDY</b>&#160;&#160;&#160;70</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>ADC1_DMAC_ID_SEQ</b>&#160;&#160;&#160;71</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>ADC1_EXTCHANNEL_MSB</b>&#160;&#160;&#160;15</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>ADC1_GCLK_ID</b>&#160;&#160;&#160;41</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>ADC1_MASTER_SLAVE_MODE</b>&#160;&#160;&#160;2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>ADC1_OPAMP2</b>&#160;&#160;&#160;0</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>ADC1_OPAMP01</b>&#160;&#160;&#160;0</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>ADC1_PTAT</b>&#160;&#160;&#160;28</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>ADC1_TOUCH_IMPLEMENTED</b>&#160;&#160;&#160;0</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>ADC1_TOUCH_LINES_NUM</b>&#160;&#160;&#160;1</td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Instance description for ADC1. </p>
<p>Copyright (c) 2019 Microchip Technology Inc.</p>
<p>\asf_license_start </p>
<p class="definition">Definition in file <a class="el" href="adc1_8h_source.html">adc1.h</a>.</p>
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<a href="adc1_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_ADC1_INSTANCE_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_ADC1_INSTANCE_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="comment">/* ========== Register definition for ADC1 peripheral ========== */</span></div>
<div class="line"><a name="l00034"></a><span class="lineno"> 34</span>&#160;<span class="preprocessor">#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="preprocessor">#define REG_ADC1_CTRLA (0x43002000) </span></div>
<div class="line"><a name="l00036"></a><span class="lineno"> 36</span>&#160;<span class="preprocessor">#define REG_ADC1_EVCTRL (0x43002002) </span></div>
<div class="line"><a name="l00037"></a><span class="lineno"> 37</span>&#160;<span class="preprocessor">#define REG_ADC1_DBGCTRL (0x43002003) </span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160;<span class="preprocessor">#define REG_ADC1_INPUTCTRL (0x43002004) </span></div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define REG_ADC1_CTRLB (0x43002006) </span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define REG_ADC1_REFCTRL (0x43002008) </span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160;<span class="preprocessor">#define REG_ADC1_AVGCTRL (0x4300200A) </span></div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="preprocessor">#define REG_ADC1_SAMPCTRL (0x4300200B) </span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#define REG_ADC1_WINLT (0x4300200C) </span></div>
<div class="line"><a name="l00044"></a><span class="lineno"> 44</span>&#160;<span class="preprocessor">#define REG_ADC1_WINUT (0x4300200E) </span></div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160;<span class="preprocessor">#define REG_ADC1_GAINCORR (0x43002010) </span></div>
<div class="line"><a name="l00046"></a><span class="lineno"> 46</span>&#160;<span class="preprocessor">#define REG_ADC1_OFFSETCORR (0x43002012) </span></div>
<div class="line"><a name="l00047"></a><span class="lineno"> 47</span>&#160;<span class="preprocessor">#define REG_ADC1_SWTRIG (0x43002014) </span></div>
<div class="line"><a name="l00048"></a><span class="lineno"> 48</span>&#160;<span class="preprocessor">#define REG_ADC1_INTENCLR (0x4300202C) </span></div>
<div class="line"><a name="l00049"></a><span class="lineno"> 49</span>&#160;<span class="preprocessor">#define REG_ADC1_INTENSET (0x4300202D) </span></div>
<div class="line"><a name="l00050"></a><span class="lineno"> 50</span>&#160;<span class="preprocessor">#define REG_ADC1_INTFLAG (0x4300202E) </span></div>
<div class="line"><a name="l00051"></a><span class="lineno"> 51</span>&#160;<span class="preprocessor">#define REG_ADC1_STATUS (0x4300202F) </span></div>
<div class="line"><a name="l00052"></a><span class="lineno"> 52</span>&#160;<span class="preprocessor">#define REG_ADC1_SYNCBUSY (0x43002030) </span></div>
<div class="line"><a name="l00053"></a><span class="lineno"> 53</span>&#160;<span class="preprocessor">#define REG_ADC1_DSEQDATA (0x43002034) </span></div>
<div class="line"><a name="l00054"></a><span class="lineno"> 54</span>&#160;<span class="preprocessor">#define REG_ADC1_DSEQCTRL (0x43002038) </span></div>
<div class="line"><a name="l00055"></a><span class="lineno"> 55</span>&#160;<span class="preprocessor">#define REG_ADC1_DSEQSTAT (0x4300203C) </span></div>
<div class="line"><a name="l00056"></a><span class="lineno"> 56</span>&#160;<span class="preprocessor">#define REG_ADC1_RESULT (0x43002040) </span></div>
<div class="line"><a name="l00057"></a><span class="lineno"> 57</span>&#160;<span class="preprocessor">#define REG_ADC1_RESS (0x43002044) </span></div>
<div class="line"><a name="l00058"></a><span class="lineno"> 58</span>&#160;<span class="preprocessor">#define REG_ADC1_CALIB (0x43002048) </span></div>
<div class="line"><a name="l00059"></a><span class="lineno"> 59</span>&#160;<span class="preprocessor">#else</span></div>
<div class="line"><a name="l00060"></a><span class="lineno"><a class="line" href="adc1_8h.html#a889bb4afda6f19016be53f942d9dcaa7"> 60</a></span>&#160;<span class="preprocessor">#define REG_ADC1_CTRLA (*(RwReg16*)0x43002000UL) </span></div>
<div class="line"><a name="l00061"></a><span class="lineno"><a class="line" href="adc1_8h.html#a8d8a85da254fa6254195ec9590c7b90c"> 61</a></span>&#160;<span class="preprocessor">#define REG_ADC1_EVCTRL (*(RwReg8 *)0x43002002UL) </span></div>
<div class="line"><a name="l00062"></a><span class="lineno"><a class="line" href="adc1_8h.html#a27832ea3120141700dff4462b11a45bf"> 62</a></span>&#160;<span class="preprocessor">#define REG_ADC1_DBGCTRL (*(RwReg8 *)0x43002003UL) </span></div>
<div class="line"><a name="l00063"></a><span class="lineno"><a class="line" href="adc1_8h.html#ab87e5bf0001e98a97dc2b818b13f60d2"> 63</a></span>&#160;<span class="preprocessor">#define REG_ADC1_INPUTCTRL (*(RwReg16*)0x43002004UL) </span></div>
<div class="line"><a name="l00064"></a><span class="lineno"><a class="line" href="adc1_8h.html#a83295a9be8f972c0fb1d88c4e4981bb7"> 64</a></span>&#160;<span class="preprocessor">#define REG_ADC1_CTRLB (*(RwReg16*)0x43002006UL) </span></div>
<div class="line"><a name="l00065"></a><span class="lineno"><a class="line" href="adc1_8h.html#a0955264b6ddf8ba672544fbe4ae006ae"> 65</a></span>&#160;<span class="preprocessor">#define REG_ADC1_REFCTRL (*(RwReg8 *)0x43002008UL) </span></div>
<div class="line"><a name="l00066"></a><span class="lineno"><a class="line" href="adc1_8h.html#a513d8fd03493a42685bb94d7efc4805f"> 66</a></span>&#160;<span class="preprocessor">#define REG_ADC1_AVGCTRL (*(RwReg8 *)0x4300200AUL) </span></div>
<div class="line"><a name="l00067"></a><span class="lineno"><a class="line" href="adc1_8h.html#a60c711563b4e055a18e89ddbc234222a"> 67</a></span>&#160;<span class="preprocessor">#define REG_ADC1_SAMPCTRL (*(RwReg8 *)0x4300200BUL) </span></div>
<div class="line"><a name="l00068"></a><span class="lineno"><a class="line" href="adc1_8h.html#ad8ca474fabf2ec762ada61c55acbe14f"> 68</a></span>&#160;<span class="preprocessor">#define REG_ADC1_WINLT (*(RwReg16*)0x4300200CUL) </span></div>
<div class="line"><a name="l00069"></a><span class="lineno"><a class="line" href="adc1_8h.html#a8c1f48f8ab952dd8b725c4d225c54ccf"> 69</a></span>&#160;<span class="preprocessor">#define REG_ADC1_WINUT (*(RwReg16*)0x4300200EUL) </span></div>
<div class="line"><a name="l00070"></a><span class="lineno"><a class="line" href="adc1_8h.html#a8f200e75abed6b2df5bb8a525179cbd8"> 70</a></span>&#160;<span class="preprocessor">#define REG_ADC1_GAINCORR (*(RwReg16*)0x43002010UL) </span></div>
<div class="line"><a name="l00071"></a><span class="lineno"><a class="line" href="adc1_8h.html#a681c424b05b5d2602f21ca924e6d2c05"> 71</a></span>&#160;<span class="preprocessor">#define REG_ADC1_OFFSETCORR (*(RwReg16*)0x43002012UL) </span></div>
<div class="line"><a name="l00072"></a><span class="lineno"><a class="line" href="adc1_8h.html#a5925f329a44958467668fc3b65d94454"> 72</a></span>&#160;<span class="preprocessor">#define REG_ADC1_SWTRIG (*(RwReg8 *)0x43002014UL) </span></div>
<div class="line"><a name="l00073"></a><span class="lineno"><a class="line" href="adc1_8h.html#ab0808e68ce2115779f62d8a27f4d5482"> 73</a></span>&#160;<span class="preprocessor">#define REG_ADC1_INTENCLR (*(RwReg8 *)0x4300202CUL) </span></div>
<div class="line"><a name="l00074"></a><span class="lineno"><a class="line" href="adc1_8h.html#a2462454fb3d48f8af9277c0d535223ec"> 74</a></span>&#160;<span class="preprocessor">#define REG_ADC1_INTENSET (*(RwReg8 *)0x4300202DUL) </span></div>
<div class="line"><a name="l00075"></a><span class="lineno"><a class="line" href="adc1_8h.html#a72cbb9a06ebed167d2d093451364c983"> 75</a></span>&#160;<span class="preprocessor">#define REG_ADC1_INTFLAG (*(RwReg8 *)0x4300202EUL) </span></div>
<div class="line"><a name="l00076"></a><span class="lineno"><a class="line" href="adc1_8h.html#a9ab116d19eca9b554fd39520cf34de34"> 76</a></span>&#160;<span class="preprocessor">#define REG_ADC1_STATUS (*(RoReg8 *)0x4300202FUL) </span></div>
<div class="line"><a name="l00077"></a><span class="lineno"><a class="line" href="adc1_8h.html#a956ac5ca7327440f1214b92502179c87"> 77</a></span>&#160;<span class="preprocessor">#define REG_ADC1_SYNCBUSY (*(RoReg *)0x43002030UL) </span></div>
<div class="line"><a name="l00078"></a><span class="lineno"><a class="line" href="adc1_8h.html#a7023a0f2e1d714e4d3481355dec02ab0"> 78</a></span>&#160;<span class="preprocessor">#define REG_ADC1_DSEQDATA (*(WoReg *)0x43002034UL) </span></div>
<div class="line"><a name="l00079"></a><span class="lineno"><a class="line" href="adc1_8h.html#aa1061d5398537fbe439e81ad56bad5f1"> 79</a></span>&#160;<span class="preprocessor">#define REG_ADC1_DSEQCTRL (*(RwReg *)0x43002038UL) </span></div>
<div class="line"><a name="l00080"></a><span class="lineno"><a class="line" href="adc1_8h.html#a91cc5991ee8fa9df4d8feff7b187b903"> 80</a></span>&#160;<span class="preprocessor">#define REG_ADC1_DSEQSTAT (*(RoReg *)0x4300203CUL) </span></div>
<div class="line"><a name="l00081"></a><span class="lineno"><a class="line" href="adc1_8h.html#ab26c130fe7a9aaa2b2468f22b6eebb38"> 81</a></span>&#160;<span class="preprocessor">#define REG_ADC1_RESULT (*(RoReg16*)0x43002040UL) </span></div>
<div class="line"><a name="l00082"></a><span class="lineno"><a class="line" href="adc1_8h.html#a3f84a3d776fd892f17cd25f486cf9f85"> 82</a></span>&#160;<span class="preprocessor">#define REG_ADC1_RESS (*(RoReg16*)0x43002044UL) </span></div>
<div class="line"><a name="l00083"></a><span class="lineno"><a class="line" href="adc1_8h.html#a500784578d055a8a70b2f8743c94472c"> 83</a></span>&#160;<span class="preprocessor">#define REG_ADC1_CALIB (*(RwReg16*)0x43002048UL) </span></div>
<div class="line"><a name="l00084"></a><span class="lineno"> 84</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00085"></a><span class="lineno"> 85</span>&#160; </div>
<div class="line"><a name="l00086"></a><span class="lineno"> 86</span>&#160;<span class="comment">/* ========== Instance parameters for ADC1 peripheral ========== */</span></div>
<div class="line"><a name="l00087"></a><span class="lineno"> 87</span>&#160;<span class="preprocessor">#define ADC1_BANDGAP 27 // MUXPOS value to select BANDGAP</span></div>
<div class="line"><a name="l00088"></a><span class="lineno"> 88</span>&#160;<span class="preprocessor">#define ADC1_CTAT 29 // MUXPOS value to select CTAT</span></div>
<div class="line"><a name="l00089"></a><span class="lineno"> 89</span>&#160;<span class="preprocessor">#define ADC1_DMAC_ID_RESRDY 70 // Index of DMA RESRDY trigger</span></div>
<div class="line"><a name="l00090"></a><span class="lineno"> 90</span>&#160;<span class="preprocessor">#define ADC1_DMAC_ID_SEQ 71 // Index of DMA SEQ trigger</span></div>
<div class="line"><a name="l00091"></a><span class="lineno"> 91</span>&#160;<span class="preprocessor">#define ADC1_EXTCHANNEL_MSB 15 // Number of external channels</span></div>
<div class="line"><a name="l00092"></a><span class="lineno"> 92</span>&#160;<span class="preprocessor">#define ADC1_GCLK_ID 41 // Index of Generic Clock</span></div>
<div class="line"><a name="l00093"></a><span class="lineno"> 93</span>&#160;<span class="preprocessor">#define ADC1_MASTER_SLAVE_MODE 2 // ADC Master/Slave Mode</span></div>
<div class="line"><a name="l00094"></a><span class="lineno"> 94</span>&#160;<span class="preprocessor">#define ADC1_OPAMP2 0 // MUXPOS value to select OPAMP2</span></div>
<div class="line"><a name="l00095"></a><span class="lineno"> 95</span>&#160;<span class="preprocessor">#define ADC1_OPAMP01 0 // MUXPOS value to select OPAMP01</span></div>
<div class="line"><a name="l00096"></a><span class="lineno"> 96</span>&#160;<span class="preprocessor">#define ADC1_PTAT 28 // MUXPOS value to select PTAT</span></div>
<div class="line"><a name="l00097"></a><span class="lineno"> 97</span>&#160;<span class="preprocessor">#define ADC1_TOUCH_IMPLEMENTED 0 // TOUCH implemented or not</span></div>
<div class="line"><a name="l00098"></a><span class="lineno"> 98</span>&#160;<span class="preprocessor">#define ADC1_TOUCH_LINES_NUM 1 // Number of touch lines</span></div>
<div class="line"><a name="l00099"></a><span class="lineno"> 99</span>&#160; </div>
<div class="line"><a name="l00100"></a><span class="lineno"> 100</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_ADC1_INSTANCE_ */</span><span class="preprocessor"></span></div>
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Macros</h2></td></tr>
<tr class="memitem:a449efb29c6abed35e2aa0e93d14e84ad"><td class="memItemLeft" align="right" valign="top"><a id="a449efb29c6abed35e2aa0e93d14e84ad"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a449efb29c6abed35e2aa0e93d14e84ad">REG_CAN0_CREL</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000000UL)</td></tr>
<tr class="memdesc:a449efb29c6abed35e2aa0e93d14e84ad"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Core Release <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#af85411a25615dd0b3831fe74a5173e17">REG_CAN0_ENDN</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000004UL)</td></tr>
<tr class="memdesc:af85411a25615dd0b3831fe74a5173e17"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Endian <br /></td></tr>
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<tr class="memitem:ac595795560be949de07d82f41764a319"><td class="memItemLeft" align="right" valign="top"><a id="ac595795560be949de07d82f41764a319"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#ac595795560be949de07d82f41764a319">REG_CAN0_MRCFG</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000008UL)</td></tr>
<tr class="memdesc:ac595795560be949de07d82f41764a319"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Message RAM Configuration <br /></td></tr>
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<tr class="memitem:abb0e5f859a165cc9a373511623420f8c"><td class="memItemLeft" align="right" valign="top"><a id="abb0e5f859a165cc9a373511623420f8c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#abb0e5f859a165cc9a373511623420f8c">REG_CAN0_DBTP</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4200000CUL)</td></tr>
<tr class="memdesc:abb0e5f859a165cc9a373511623420f8c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Fast Bit Timing and Prescaler <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#ae029a3656c7e567002eb4fbc936f209d">REG_CAN0_TEST</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000010UL)</td></tr>
<tr class="memdesc:ae029a3656c7e567002eb4fbc936f209d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Test <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a78b1dd73d667635e4e713782f354b17f">REG_CAN0_RWD</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000014UL)</td></tr>
<tr class="memdesc:a78b1dd73d667635e4e713782f354b17f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) RAM Watchdog <br /></td></tr>
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<tr class="memitem:a904004cddcc5fe5143a2126fbd0d7b1d"><td class="memItemLeft" align="right" valign="top"><a id="a904004cddcc5fe5143a2126fbd0d7b1d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a904004cddcc5fe5143a2126fbd0d7b1d">REG_CAN0_CCCR</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000018UL)</td></tr>
<tr class="memdesc:a904004cddcc5fe5143a2126fbd0d7b1d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) CC Control <br /></td></tr>
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<tr class="memitem:a6269e25f48b8c7d2d2ce1f88d32de23b"><td class="memItemLeft" align="right" valign="top"><a id="a6269e25f48b8c7d2d2ce1f88d32de23b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a6269e25f48b8c7d2d2ce1f88d32de23b">REG_CAN0_NBTP</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4200001CUL)</td></tr>
<tr class="memdesc:a6269e25f48b8c7d2d2ce1f88d32de23b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Nominal Bit Timing and Prescaler <br /></td></tr>
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<tr class="memitem:a98dbec03d5a5522f5c4db9b173daa5ea"><td class="memItemLeft" align="right" valign="top"><a id="a98dbec03d5a5522f5c4db9b173daa5ea"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a98dbec03d5a5522f5c4db9b173daa5ea">REG_CAN0_TSCC</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000020UL)</td></tr>
<tr class="memdesc:a98dbec03d5a5522f5c4db9b173daa5ea"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Timestamp Counter Configuration <br /></td></tr>
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<tr class="memitem:ae69d1aae93a642d34d916ab18a2ab9ea"><td class="memItemLeft" align="right" valign="top"><a id="ae69d1aae93a642d34d916ab18a2ab9ea"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#ae69d1aae93a642d34d916ab18a2ab9ea">REG_CAN0_TSCV</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000024UL)</td></tr>
<tr class="memdesc:ae69d1aae93a642d34d916ab18a2ab9ea"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Timestamp Counter Value <br /></td></tr>
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<tr class="memitem:a503df71a059bf085515d292ea3cfe78b"><td class="memItemLeft" align="right" valign="top"><a id="a503df71a059bf085515d292ea3cfe78b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a503df71a059bf085515d292ea3cfe78b">REG_CAN0_TOCC</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000028UL)</td></tr>
<tr class="memdesc:a503df71a059bf085515d292ea3cfe78b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Timeout Counter Configuration <br /></td></tr>
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<tr class="memitem:a3b620bcd156becd408e1fe7dec46c716"><td class="memItemLeft" align="right" valign="top"><a id="a3b620bcd156becd408e1fe7dec46c716"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a3b620bcd156becd408e1fe7dec46c716">REG_CAN0_TOCV</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4200002CUL)</td></tr>
<tr class="memdesc:a3b620bcd156becd408e1fe7dec46c716"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Timeout Counter Value <br /></td></tr>
<tr class="separator:a3b620bcd156becd408e1fe7dec46c716"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad9b7daaf9b7b03d5be1b979194742784"><td class="memItemLeft" align="right" valign="top"><a id="ad9b7daaf9b7b03d5be1b979194742784"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#ad9b7daaf9b7b03d5be1b979194742784">REG_CAN0_ECR</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000040UL)</td></tr>
<tr class="memdesc:ad9b7daaf9b7b03d5be1b979194742784"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Error Counter <br /></td></tr>
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<tr class="memitem:a0a5ec38192586ce82891ff8658ba1871"><td class="memItemLeft" align="right" valign="top"><a id="a0a5ec38192586ce82891ff8658ba1871"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a0a5ec38192586ce82891ff8658ba1871">REG_CAN0_PSR</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000044UL)</td></tr>
<tr class="memdesc:a0a5ec38192586ce82891ff8658ba1871"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Protocol Status <br /></td></tr>
<tr class="separator:a0a5ec38192586ce82891ff8658ba1871"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7a5c155bd6ada1b4273ee9722058e583"><td class="memItemLeft" align="right" valign="top"><a id="a7a5c155bd6ada1b4273ee9722058e583"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a7a5c155bd6ada1b4273ee9722058e583">REG_CAN0_TDCR</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000048UL)</td></tr>
<tr class="memdesc:a7a5c155bd6ada1b4273ee9722058e583"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Extended ID Filter Configuration <br /></td></tr>
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<tr class="memitem:a0a65795d772174c6878246c57ae2b4cc"><td class="memItemLeft" align="right" valign="top"><a id="a0a65795d772174c6878246c57ae2b4cc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a0a65795d772174c6878246c57ae2b4cc">REG_CAN0_IR</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000050UL)</td></tr>
<tr class="memdesc:a0a65795d772174c6878246c57ae2b4cc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Interrupt <br /></td></tr>
<tr class="separator:a0a65795d772174c6878246c57ae2b4cc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a212d9ba27b17d94fa6c1b0606ca0dd50"><td class="memItemLeft" align="right" valign="top"><a id="a212d9ba27b17d94fa6c1b0606ca0dd50"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a212d9ba27b17d94fa6c1b0606ca0dd50">REG_CAN0_IE</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000054UL)</td></tr>
<tr class="memdesc:a212d9ba27b17d94fa6c1b0606ca0dd50"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Interrupt Enable <br /></td></tr>
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<tr class="memitem:a69fe9af8871de113d98c88869f09f699"><td class="memItemLeft" align="right" valign="top"><a id="a69fe9af8871de113d98c88869f09f699"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a69fe9af8871de113d98c88869f09f699">REG_CAN0_ILS</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000058UL)</td></tr>
<tr class="memdesc:a69fe9af8871de113d98c88869f09f699"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Interrupt Line Select <br /></td></tr>
<tr class="separator:a69fe9af8871de113d98c88869f09f699"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a35ccc25e65d5ba96731d837c80aaa69e"><td class="memItemLeft" align="right" valign="top"><a id="a35ccc25e65d5ba96731d837c80aaa69e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a35ccc25e65d5ba96731d837c80aaa69e">REG_CAN0_ILE</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4200005CUL)</td></tr>
<tr class="memdesc:a35ccc25e65d5ba96731d837c80aaa69e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Interrupt Line Enable <br /></td></tr>
<tr class="separator:a35ccc25e65d5ba96731d837c80aaa69e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8154a5854c66d8ce3072f9b3daee8794"><td class="memItemLeft" align="right" valign="top"><a id="a8154a5854c66d8ce3072f9b3daee8794"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a8154a5854c66d8ce3072f9b3daee8794">REG_CAN0_GFC</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000080UL)</td></tr>
<tr class="memdesc:a8154a5854c66d8ce3072f9b3daee8794"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Global Filter Configuration <br /></td></tr>
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<tr class="memitem:a8433ec4eb43a86bdeefec641448bc426"><td class="memItemLeft" align="right" valign="top"><a id="a8433ec4eb43a86bdeefec641448bc426"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a8433ec4eb43a86bdeefec641448bc426">REG_CAN0_SIDFC</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000084UL)</td></tr>
<tr class="memdesc:a8433ec4eb43a86bdeefec641448bc426"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Standard ID Filter Configuration <br /></td></tr>
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<tr class="memitem:a7b77bac0b6d81dcd4f2a476c8a97e115"><td class="memItemLeft" align="right" valign="top"><a id="a7b77bac0b6d81dcd4f2a476c8a97e115"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a7b77bac0b6d81dcd4f2a476c8a97e115">REG_CAN0_XIDFC</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000088UL)</td></tr>
<tr class="memdesc:a7b77bac0b6d81dcd4f2a476c8a97e115"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Extended ID Filter Configuration <br /></td></tr>
<tr class="separator:a7b77bac0b6d81dcd4f2a476c8a97e115"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6ff316ef5816c3ad50e083816547bf9a"><td class="memItemLeft" align="right" valign="top"><a id="a6ff316ef5816c3ad50e083816547bf9a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a6ff316ef5816c3ad50e083816547bf9a">REG_CAN0_XIDAM</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000090UL)</td></tr>
<tr class="memdesc:a6ff316ef5816c3ad50e083816547bf9a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Extended ID AND Mask <br /></td></tr>
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<tr class="memitem:acef49af23336ffb2049f9c1cd4565a9e"><td class="memItemLeft" align="right" valign="top"><a id="acef49af23336ffb2049f9c1cd4565a9e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#acef49af23336ffb2049f9c1cd4565a9e">REG_CAN0_HPMS</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000094UL)</td></tr>
<tr class="memdesc:acef49af23336ffb2049f9c1cd4565a9e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) High Priority Message Status <br /></td></tr>
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<tr class="memitem:a6d9c9cc51367f5c178dfb4595722968d"><td class="memItemLeft" align="right" valign="top"><a id="a6d9c9cc51367f5c178dfb4595722968d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a6d9c9cc51367f5c178dfb4595722968d">REG_CAN0_NDAT1</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000098UL)</td></tr>
<tr class="memdesc:a6d9c9cc51367f5c178dfb4595722968d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) New Data 1 <br /></td></tr>
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<tr class="memitem:a20dd31879065f711f986da74408c237d"><td class="memItemLeft" align="right" valign="top"><a id="a20dd31879065f711f986da74408c237d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a20dd31879065f711f986da74408c237d">REG_CAN0_NDAT2</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4200009CUL)</td></tr>
<tr class="memdesc:a20dd31879065f711f986da74408c237d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) New Data 2 <br /></td></tr>
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<tr class="memdesc:a4c9a625a26cd01e57dad56a40ba2afd9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Rx FIFO 1 Configuration <br /></td></tr>
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<tr class="memdesc:a50d2a9c26237c4bbe57eeddbe8cf1b9f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Rx FIFO 1 Status <br /></td></tr>
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<tr class="memdesc:a6c2e21ab20809fffc82ee036bff485a0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Rx FIFO 1 Acknowledge <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a64522c510e7e11fd348cce55971abd59">REG_CAN0_RXESC</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420000BCUL)</td></tr>
<tr class="memdesc:a64522c510e7e11fd348cce55971abd59"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Rx Buffer / FIFO Element Size Configuration <br /></td></tr>
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<tr class="memdesc:acd43dc2ce51efdb97e96eb92e84f7193"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Tx Buffer Configuration <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a8560ea3aebd28604c8368ba4ea421786">REG_CAN0_TXFQS</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420000C4UL)</td></tr>
<tr class="memdesc:a8560ea3aebd28604c8368ba4ea421786"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Tx FIFO / Queue Status <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a2ebbcdab4c92bf3efcc7f59e6f0eb739">REG_CAN0_TXESC</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420000C8UL)</td></tr>
<tr class="memdesc:a2ebbcdab4c92bf3efcc7f59e6f0eb739"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Tx Buffer Element Size Configuration <br /></td></tr>
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<tr class="memdesc:a7d010450c605245bb095641e1d5a08c7"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Tx Buffer Request Pending <br /></td></tr>
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<tr class="memitem:a703ec9b292dd6425448e9dfd8ad0240d"><td class="memItemLeft" align="right" valign="top"><a id="a703ec9b292dd6425448e9dfd8ad0240d"></a>
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<tr class="memdesc:a703ec9b292dd6425448e9dfd8ad0240d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Tx Buffer Add Request <br /></td></tr>
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<tr class="memdesc:a95e0fa7fc64efb36df006d3cd9ca20fd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Tx Buffer Cancellation Request <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a54148a226eb3925a4a994c4e218afa90">REG_CAN0_TXBTO</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420000D8UL)</td></tr>
<tr class="memdesc:a54148a226eb3925a4a994c4e218afa90"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Tx Buffer Transmission Occurred <br /></td></tr>
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<tr class="memdesc:a4b91469a069e06269301dc348b7f01d5"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Tx Buffer Cancellation Finished <br /></td></tr>
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<tr class="memitem:a2bec8f6811eda9d184039a7a87452e85"><td class="memItemLeft" align="right" valign="top"><a id="a2bec8f6811eda9d184039a7a87452e85"></a>
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<tr class="memdesc:a2bec8f6811eda9d184039a7a87452e85"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Tx Buffer Transmission Interrupt Enable <br /></td></tr>
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<tr class="memitem:ae88f1a1bc2e2dcb1668132ed13df03a0"><td class="memItemLeft" align="right" valign="top"><a id="ae88f1a1bc2e2dcb1668132ed13df03a0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#ae88f1a1bc2e2dcb1668132ed13df03a0">REG_CAN0_TXBCIE</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420000E4UL)</td></tr>
<tr class="memdesc:ae88f1a1bc2e2dcb1668132ed13df03a0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Tx Buffer Cancellation Finished Interrupt Enable <br /></td></tr>
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<tr class="memitem:a38d320a7baf11fc13de21e41494b9432"><td class="memItemLeft" align="right" valign="top"><a id="a38d320a7baf11fc13de21e41494b9432"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a38d320a7baf11fc13de21e41494b9432">REG_CAN0_TXEFC</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420000F0UL)</td></tr>
<tr class="memdesc:a38d320a7baf11fc13de21e41494b9432"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Tx Event FIFO Configuration <br /></td></tr>
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<tr class="memitem:a649645ed86a43cb92a0407a128cddb94"><td class="memItemLeft" align="right" valign="top"><a id="a649645ed86a43cb92a0407a128cddb94"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can0_8h.html#a649645ed86a43cb92a0407a128cddb94">REG_CAN0_TXEFS</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420000F4UL)</td></tr>
<tr class="memdesc:a649645ed86a43cb92a0407a128cddb94"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Tx Event FIFO Status <br /></td></tr>
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<tr class="memitem:a3a197a7618d54c5d81484ceab851f2ee"><td class="memItemLeft" align="right" valign="top"><a id="a3a197a7618d54c5d81484ceab851f2ee"></a>
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<tr class="memdesc:a3a197a7618d54c5d81484ceab851f2ee"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN0) Tx Event FIFO Acknowledge <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CAN0_DMAC_ID_DEBUG</b>&#160;&#160;&#160;20</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CAN0_GCLK_ID</b>&#160;&#160;&#160;27</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CAN0_MSG_RAM_ADDR</b>&#160;&#160;&#160;0x20000000</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CAN0_QOS_RESET_VAL</b>&#160;&#160;&#160;1</td></tr>
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</table>
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Instance description for CAN0. </p>
<p>Copyright (c) 2019 Microchip Technology Inc.</p>
<p>\asf_license_start </p>
<p class="definition">Definition in file <a class="el" href="can0_8h_source.html">can0.h</a>.</p>
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<a href="can0_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_CAN0_INSTANCE_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_CAN0_INSTANCE_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="comment">/* ========== Register definition for CAN0 peripheral ========== */</span></div>
<div class="line"><a name="l00034"></a><span class="lineno"> 34</span>&#160;<span class="preprocessor">#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="preprocessor">#define REG_CAN0_CREL (0x42000000) </span></div>
<div class="line"><a name="l00036"></a><span class="lineno"> 36</span>&#160;<span class="preprocessor">#define REG_CAN0_ENDN (0x42000004) </span></div>
<div class="line"><a name="l00037"></a><span class="lineno"> 37</span>&#160;<span class="preprocessor">#define REG_CAN0_MRCFG (0x42000008) </span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160;<span class="preprocessor">#define REG_CAN0_DBTP (0x4200000C) </span></div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define REG_CAN0_TEST (0x42000010) </span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define REG_CAN0_RWD (0x42000014) </span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160;<span class="preprocessor">#define REG_CAN0_CCCR (0x42000018) </span></div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="preprocessor">#define REG_CAN0_NBTP (0x4200001C) </span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#define REG_CAN0_TSCC (0x42000020) </span></div>
<div class="line"><a name="l00044"></a><span class="lineno"> 44</span>&#160;<span class="preprocessor">#define REG_CAN0_TSCV (0x42000024) </span></div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160;<span class="preprocessor">#define REG_CAN0_TOCC (0x42000028) </span></div>
<div class="line"><a name="l00046"></a><span class="lineno"> 46</span>&#160;<span class="preprocessor">#define REG_CAN0_TOCV (0x4200002C) </span></div>
<div class="line"><a name="l00047"></a><span class="lineno"> 47</span>&#160;<span class="preprocessor">#define REG_CAN0_ECR (0x42000040) </span></div>
<div class="line"><a name="l00048"></a><span class="lineno"> 48</span>&#160;<span class="preprocessor">#define REG_CAN0_PSR (0x42000044) </span></div>
<div class="line"><a name="l00049"></a><span class="lineno"> 49</span>&#160;<span class="preprocessor">#define REG_CAN0_TDCR (0x42000048) </span></div>
<div class="line"><a name="l00050"></a><span class="lineno"> 50</span>&#160;<span class="preprocessor">#define REG_CAN0_IR (0x42000050) </span></div>
<div class="line"><a name="l00051"></a><span class="lineno"> 51</span>&#160;<span class="preprocessor">#define REG_CAN0_IE (0x42000054) </span></div>
<div class="line"><a name="l00052"></a><span class="lineno"> 52</span>&#160;<span class="preprocessor">#define REG_CAN0_ILS (0x42000058) </span></div>
<div class="line"><a name="l00053"></a><span class="lineno"> 53</span>&#160;<span class="preprocessor">#define REG_CAN0_ILE (0x4200005C) </span></div>
<div class="line"><a name="l00054"></a><span class="lineno"> 54</span>&#160;<span class="preprocessor">#define REG_CAN0_GFC (0x42000080) </span></div>
<div class="line"><a name="l00055"></a><span class="lineno"> 55</span>&#160;<span class="preprocessor">#define REG_CAN0_SIDFC (0x42000084) </span></div>
<div class="line"><a name="l00056"></a><span class="lineno"> 56</span>&#160;<span class="preprocessor">#define REG_CAN0_XIDFC (0x42000088) </span></div>
<div class="line"><a name="l00057"></a><span class="lineno"> 57</span>&#160;<span class="preprocessor">#define REG_CAN0_XIDAM (0x42000090) </span></div>
<div class="line"><a name="l00058"></a><span class="lineno"> 58</span>&#160;<span class="preprocessor">#define REG_CAN0_HPMS (0x42000094) </span></div>
<div class="line"><a name="l00059"></a><span class="lineno"> 59</span>&#160;<span class="preprocessor">#define REG_CAN0_NDAT1 (0x42000098) </span></div>
<div class="line"><a name="l00060"></a><span class="lineno"> 60</span>&#160;<span class="preprocessor">#define REG_CAN0_NDAT2 (0x4200009C) </span></div>
<div class="line"><a name="l00061"></a><span class="lineno"> 61</span>&#160;<span class="preprocessor">#define REG_CAN0_RXF0C (0x420000A0) </span></div>
<div class="line"><a name="l00062"></a><span class="lineno"> 62</span>&#160;<span class="preprocessor">#define REG_CAN0_RXF0S (0x420000A4) </span></div>
<div class="line"><a name="l00063"></a><span class="lineno"> 63</span>&#160;<span class="preprocessor">#define REG_CAN0_RXF0A (0x420000A8) </span></div>
<div class="line"><a name="l00064"></a><span class="lineno"> 64</span>&#160;<span class="preprocessor">#define REG_CAN0_RXBC (0x420000AC) </span></div>
<div class="line"><a name="l00065"></a><span class="lineno"> 65</span>&#160;<span class="preprocessor">#define REG_CAN0_RXF1C (0x420000B0) </span></div>
<div class="line"><a name="l00066"></a><span class="lineno"> 66</span>&#160;<span class="preprocessor">#define REG_CAN0_RXF1S (0x420000B4) </span></div>
<div class="line"><a name="l00067"></a><span class="lineno"> 67</span>&#160;<span class="preprocessor">#define REG_CAN0_RXF1A (0x420000B8) </span></div>
<div class="line"><a name="l00068"></a><span class="lineno"> 68</span>&#160;<span class="preprocessor">#define REG_CAN0_RXESC (0x420000BC) </span></div>
<div class="line"><a name="l00069"></a><span class="lineno"> 69</span>&#160;<span class="preprocessor">#define REG_CAN0_TXBC (0x420000C0) </span></div>
<div class="line"><a name="l00070"></a><span class="lineno"> 70</span>&#160;<span class="preprocessor">#define REG_CAN0_TXFQS (0x420000C4) </span></div>
<div class="line"><a name="l00071"></a><span class="lineno"> 71</span>&#160;<span class="preprocessor">#define REG_CAN0_TXESC (0x420000C8) </span></div>
<div class="line"><a name="l00072"></a><span class="lineno"> 72</span>&#160;<span class="preprocessor">#define REG_CAN0_TXBRP (0x420000CC) </span></div>
<div class="line"><a name="l00073"></a><span class="lineno"> 73</span>&#160;<span class="preprocessor">#define REG_CAN0_TXBAR (0x420000D0) </span></div>
<div class="line"><a name="l00074"></a><span class="lineno"> 74</span>&#160;<span class="preprocessor">#define REG_CAN0_TXBCR (0x420000D4) </span></div>
<div class="line"><a name="l00075"></a><span class="lineno"> 75</span>&#160;<span class="preprocessor">#define REG_CAN0_TXBTO (0x420000D8) </span></div>
<div class="line"><a name="l00076"></a><span class="lineno"> 76</span>&#160;<span class="preprocessor">#define REG_CAN0_TXBCF (0x420000DC) </span></div>
<div class="line"><a name="l00077"></a><span class="lineno"> 77</span>&#160;<span class="preprocessor">#define REG_CAN0_TXBTIE (0x420000E0) </span></div>
<div class="line"><a name="l00078"></a><span class="lineno"> 78</span>&#160;<span class="preprocessor">#define REG_CAN0_TXBCIE (0x420000E4) </span></div>
<div class="line"><a name="l00079"></a><span class="lineno"> 79</span>&#160;<span class="preprocessor">#define REG_CAN0_TXEFC (0x420000F0) </span></div>
<div class="line"><a name="l00080"></a><span class="lineno"> 80</span>&#160;<span class="preprocessor">#define REG_CAN0_TXEFS (0x420000F4) </span></div>
<div class="line"><a name="l00081"></a><span class="lineno"> 81</span>&#160;<span class="preprocessor">#define REG_CAN0_TXEFA (0x420000F8) </span></div>
<div class="line"><a name="l00082"></a><span class="lineno"> 82</span>&#160;<span class="preprocessor">#else</span></div>
<div class="line"><a name="l00083"></a><span class="lineno"><a class="line" href="can0_8h.html#a449efb29c6abed35e2aa0e93d14e84ad"> 83</a></span>&#160;<span class="preprocessor">#define REG_CAN0_CREL (*(RoReg *)0x42000000UL) </span></div>
<div class="line"><a name="l00084"></a><span class="lineno"><a class="line" href="can0_8h.html#af85411a25615dd0b3831fe74a5173e17"> 84</a></span>&#160;<span class="preprocessor">#define REG_CAN0_ENDN (*(RoReg *)0x42000004UL) </span></div>
<div class="line"><a name="l00085"></a><span class="lineno"><a class="line" href="can0_8h.html#ac595795560be949de07d82f41764a319"> 85</a></span>&#160;<span class="preprocessor">#define REG_CAN0_MRCFG (*(RwReg *)0x42000008UL) </span></div>
<div class="line"><a name="l00086"></a><span class="lineno"><a class="line" href="can0_8h.html#abb0e5f859a165cc9a373511623420f8c"> 86</a></span>&#160;<span class="preprocessor">#define REG_CAN0_DBTP (*(RwReg *)0x4200000CUL) </span></div>
<div class="line"><a name="l00087"></a><span class="lineno"><a class="line" href="can0_8h.html#ae029a3656c7e567002eb4fbc936f209d"> 87</a></span>&#160;<span class="preprocessor">#define REG_CAN0_TEST (*(RwReg *)0x42000010UL) </span></div>
<div class="line"><a name="l00088"></a><span class="lineno"><a class="line" href="can0_8h.html#a78b1dd73d667635e4e713782f354b17f"> 88</a></span>&#160;<span class="preprocessor">#define REG_CAN0_RWD (*(RwReg *)0x42000014UL) </span></div>
<div class="line"><a name="l00089"></a><span class="lineno"><a class="line" href="can0_8h.html#a904004cddcc5fe5143a2126fbd0d7b1d"> 89</a></span>&#160;<span class="preprocessor">#define REG_CAN0_CCCR (*(RwReg *)0x42000018UL) </span></div>
<div class="line"><a name="l00090"></a><span class="lineno"><a class="line" href="can0_8h.html#a6269e25f48b8c7d2d2ce1f88d32de23b"> 90</a></span>&#160;<span class="preprocessor">#define REG_CAN0_NBTP (*(RwReg *)0x4200001CUL) </span></div>
<div class="line"><a name="l00091"></a><span class="lineno"><a class="line" href="can0_8h.html#a98dbec03d5a5522f5c4db9b173daa5ea"> 91</a></span>&#160;<span class="preprocessor">#define REG_CAN0_TSCC (*(RwReg *)0x42000020UL) </span></div>
<div class="line"><a name="l00092"></a><span class="lineno"><a class="line" href="can0_8h.html#ae69d1aae93a642d34d916ab18a2ab9ea"> 92</a></span>&#160;<span class="preprocessor">#define REG_CAN0_TSCV (*(RoReg *)0x42000024UL) </span></div>
<div class="line"><a name="l00093"></a><span class="lineno"><a class="line" href="can0_8h.html#a503df71a059bf085515d292ea3cfe78b"> 93</a></span>&#160;<span class="preprocessor">#define REG_CAN0_TOCC (*(RwReg *)0x42000028UL) </span></div>
<div class="line"><a name="l00094"></a><span class="lineno"><a class="line" href="can0_8h.html#a3b620bcd156becd408e1fe7dec46c716"> 94</a></span>&#160;<span class="preprocessor">#define REG_CAN0_TOCV (*(RwReg *)0x4200002CUL) </span></div>
<div class="line"><a name="l00095"></a><span class="lineno"><a class="line" href="can0_8h.html#ad9b7daaf9b7b03d5be1b979194742784"> 95</a></span>&#160;<span class="preprocessor">#define REG_CAN0_ECR (*(RoReg *)0x42000040UL) </span></div>
<div class="line"><a name="l00096"></a><span class="lineno"><a class="line" href="can0_8h.html#a0a5ec38192586ce82891ff8658ba1871"> 96</a></span>&#160;<span class="preprocessor">#define REG_CAN0_PSR (*(RoReg *)0x42000044UL) </span></div>
<div class="line"><a name="l00097"></a><span class="lineno"><a class="line" href="can0_8h.html#a7a5c155bd6ada1b4273ee9722058e583"> 97</a></span>&#160;<span class="preprocessor">#define REG_CAN0_TDCR (*(RwReg *)0x42000048UL) </span></div>
<div class="line"><a name="l00098"></a><span class="lineno"><a class="line" href="can0_8h.html#a0a65795d772174c6878246c57ae2b4cc"> 98</a></span>&#160;<span class="preprocessor">#define REG_CAN0_IR (*(RwReg *)0x42000050UL) </span></div>
<div class="line"><a name="l00099"></a><span class="lineno"><a class="line" href="can0_8h.html#a212d9ba27b17d94fa6c1b0606ca0dd50"> 99</a></span>&#160;<span class="preprocessor">#define REG_CAN0_IE (*(RwReg *)0x42000054UL) </span></div>
<div class="line"><a name="l00100"></a><span class="lineno"><a class="line" href="can0_8h.html#a69fe9af8871de113d98c88869f09f699"> 100</a></span>&#160;<span class="preprocessor">#define REG_CAN0_ILS (*(RwReg *)0x42000058UL) </span></div>
<div class="line"><a name="l00101"></a><span class="lineno"><a class="line" href="can0_8h.html#a35ccc25e65d5ba96731d837c80aaa69e"> 101</a></span>&#160;<span class="preprocessor">#define REG_CAN0_ILE (*(RwReg *)0x4200005CUL) </span></div>
<div class="line"><a name="l00102"></a><span class="lineno"><a class="line" href="can0_8h.html#a8154a5854c66d8ce3072f9b3daee8794"> 102</a></span>&#160;<span class="preprocessor">#define REG_CAN0_GFC (*(RwReg *)0x42000080UL) </span></div>
<div class="line"><a name="l00103"></a><span class="lineno"><a class="line" href="can0_8h.html#a8433ec4eb43a86bdeefec641448bc426"> 103</a></span>&#160;<span class="preprocessor">#define REG_CAN0_SIDFC (*(RwReg *)0x42000084UL) </span></div>
<div class="line"><a name="l00104"></a><span class="lineno"><a class="line" href="can0_8h.html#a7b77bac0b6d81dcd4f2a476c8a97e115"> 104</a></span>&#160;<span class="preprocessor">#define REG_CAN0_XIDFC (*(RwReg *)0x42000088UL) </span></div>
<div class="line"><a name="l00105"></a><span class="lineno"><a class="line" href="can0_8h.html#a6ff316ef5816c3ad50e083816547bf9a"> 105</a></span>&#160;<span class="preprocessor">#define REG_CAN0_XIDAM (*(RwReg *)0x42000090UL) </span></div>
<div class="line"><a name="l00106"></a><span class="lineno"><a class="line" href="can0_8h.html#acef49af23336ffb2049f9c1cd4565a9e"> 106</a></span>&#160;<span class="preprocessor">#define REG_CAN0_HPMS (*(RoReg *)0x42000094UL) </span></div>
<div class="line"><a name="l00107"></a><span class="lineno"><a class="line" href="can0_8h.html#a6d9c9cc51367f5c178dfb4595722968d"> 107</a></span>&#160;<span class="preprocessor">#define REG_CAN0_NDAT1 (*(RwReg *)0x42000098UL) </span></div>
<div class="line"><a name="l00108"></a><span class="lineno"><a class="line" href="can0_8h.html#a20dd31879065f711f986da74408c237d"> 108</a></span>&#160;<span class="preprocessor">#define REG_CAN0_NDAT2 (*(RwReg *)0x4200009CUL) </span></div>
<div class="line"><a name="l00109"></a><span class="lineno"><a class="line" href="can0_8h.html#a18bed93e3bb4d03c9336985fdf39e727"> 109</a></span>&#160;<span class="preprocessor">#define REG_CAN0_RXF0C (*(RwReg *)0x420000A0UL) </span></div>
<div class="line"><a name="l00110"></a><span class="lineno"><a class="line" href="can0_8h.html#acbb93b36e76f7bb9b3a47c05c4755d68"> 110</a></span>&#160;<span class="preprocessor">#define REG_CAN0_RXF0S (*(RoReg *)0x420000A4UL) </span></div>
<div class="line"><a name="l00111"></a><span class="lineno"><a class="line" href="can0_8h.html#adb84d9f3bcc150d0d528b487ffdaddfa"> 111</a></span>&#160;<span class="preprocessor">#define REG_CAN0_RXF0A (*(RwReg *)0x420000A8UL) </span></div>
<div class="line"><a name="l00112"></a><span class="lineno"><a class="line" href="can0_8h.html#a8b8324a6470af3586cac6213f066a56d"> 112</a></span>&#160;<span class="preprocessor">#define REG_CAN0_RXBC (*(RwReg *)0x420000ACUL) </span></div>
<div class="line"><a name="l00113"></a><span class="lineno"><a class="line" href="can0_8h.html#a4c9a625a26cd01e57dad56a40ba2afd9"> 113</a></span>&#160;<span class="preprocessor">#define REG_CAN0_RXF1C (*(RwReg *)0x420000B0UL) </span></div>
<div class="line"><a name="l00114"></a><span class="lineno"><a class="line" href="can0_8h.html#a50d2a9c26237c4bbe57eeddbe8cf1b9f"> 114</a></span>&#160;<span class="preprocessor">#define REG_CAN0_RXF1S (*(RoReg *)0x420000B4UL) </span></div>
<div class="line"><a name="l00115"></a><span class="lineno"><a class="line" href="can0_8h.html#a6c2e21ab20809fffc82ee036bff485a0"> 115</a></span>&#160;<span class="preprocessor">#define REG_CAN0_RXF1A (*(RwReg *)0x420000B8UL) </span></div>
<div class="line"><a name="l00116"></a><span class="lineno"><a class="line" href="can0_8h.html#a64522c510e7e11fd348cce55971abd59"> 116</a></span>&#160;<span class="preprocessor">#define REG_CAN0_RXESC (*(RwReg *)0x420000BCUL) </span></div>
<div class="line"><a name="l00117"></a><span class="lineno"><a class="line" href="can0_8h.html#acd43dc2ce51efdb97e96eb92e84f7193"> 117</a></span>&#160;<span class="preprocessor">#define REG_CAN0_TXBC (*(RwReg *)0x420000C0UL) </span></div>
<div class="line"><a name="l00118"></a><span class="lineno"><a class="line" href="can0_8h.html#a8560ea3aebd28604c8368ba4ea421786"> 118</a></span>&#160;<span class="preprocessor">#define REG_CAN0_TXFQS (*(RoReg *)0x420000C4UL) </span></div>
<div class="line"><a name="l00119"></a><span class="lineno"><a class="line" href="can0_8h.html#a2ebbcdab4c92bf3efcc7f59e6f0eb739"> 119</a></span>&#160;<span class="preprocessor">#define REG_CAN0_TXESC (*(RwReg *)0x420000C8UL) </span></div>
<div class="line"><a name="l00120"></a><span class="lineno"><a class="line" href="can0_8h.html#a7d010450c605245bb095641e1d5a08c7"> 120</a></span>&#160;<span class="preprocessor">#define REG_CAN0_TXBRP (*(RoReg *)0x420000CCUL) </span></div>
<div class="line"><a name="l00121"></a><span class="lineno"><a class="line" href="can0_8h.html#a703ec9b292dd6425448e9dfd8ad0240d"> 121</a></span>&#160;<span class="preprocessor">#define REG_CAN0_TXBAR (*(RwReg *)0x420000D0UL) </span></div>
<div class="line"><a name="l00122"></a><span class="lineno"><a class="line" href="can0_8h.html#a95e0fa7fc64efb36df006d3cd9ca20fd"> 122</a></span>&#160;<span class="preprocessor">#define REG_CAN0_TXBCR (*(RwReg *)0x420000D4UL) </span></div>
<div class="line"><a name="l00123"></a><span class="lineno"><a class="line" href="can0_8h.html#a54148a226eb3925a4a994c4e218afa90"> 123</a></span>&#160;<span class="preprocessor">#define REG_CAN0_TXBTO (*(RoReg *)0x420000D8UL) </span></div>
<div class="line"><a name="l00124"></a><span class="lineno"><a class="line" href="can0_8h.html#a4b91469a069e06269301dc348b7f01d5"> 124</a></span>&#160;<span class="preprocessor">#define REG_CAN0_TXBCF (*(RoReg *)0x420000DCUL) </span></div>
<div class="line"><a name="l00125"></a><span class="lineno"><a class="line" href="can0_8h.html#a2bec8f6811eda9d184039a7a87452e85"> 125</a></span>&#160;<span class="preprocessor">#define REG_CAN0_TXBTIE (*(RwReg *)0x420000E0UL) </span></div>
<div class="line"><a name="l00126"></a><span class="lineno"><a class="line" href="can0_8h.html#ae88f1a1bc2e2dcb1668132ed13df03a0"> 126</a></span>&#160;<span class="preprocessor">#define REG_CAN0_TXBCIE (*(RwReg *)0x420000E4UL) </span></div>
<div class="line"><a name="l00127"></a><span class="lineno"><a class="line" href="can0_8h.html#a38d320a7baf11fc13de21e41494b9432"> 127</a></span>&#160;<span class="preprocessor">#define REG_CAN0_TXEFC (*(RwReg *)0x420000F0UL) </span></div>
<div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="can0_8h.html#a649645ed86a43cb92a0407a128cddb94"> 128</a></span>&#160;<span class="preprocessor">#define REG_CAN0_TXEFS (*(RoReg *)0x420000F4UL) </span></div>
<div class="line"><a name="l00129"></a><span class="lineno"><a class="line" href="can0_8h.html#a3a197a7618d54c5d81484ceab851f2ee"> 129</a></span>&#160;<span class="preprocessor">#define REG_CAN0_TXEFA (*(RwReg *)0x420000F8UL) </span></div>
<div class="line"><a name="l00130"></a><span class="lineno"> 130</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00131"></a><span class="lineno"> 131</span>&#160; </div>
<div class="line"><a name="l00132"></a><span class="lineno"> 132</span>&#160;<span class="comment">/* ========== Instance parameters for CAN0 peripheral ========== */</span></div>
<div class="line"><a name="l00133"></a><span class="lineno"> 133</span>&#160;<span class="preprocessor">#define CAN0_CLK_AHB_ID 17 // Index of AHB clock</span></div>
<div class="line"><a name="l00134"></a><span class="lineno"> 134</span>&#160;<span class="preprocessor">#define CAN0_DMAC_ID_DEBUG 20 // DMA CAN Debug Req</span></div>
<div class="line"><a name="l00135"></a><span class="lineno"> 135</span>&#160;<span class="preprocessor">#define CAN0_GCLK_ID 27 // Index of Generic Clock</span></div>
<div class="line"><a name="l00136"></a><span class="lineno"> 136</span>&#160;<span class="preprocessor">#define CAN0_MSG_RAM_ADDR 0x20000000</span></div>
<div class="line"><a name="l00137"></a><span class="lineno"> 137</span>&#160;<span class="preprocessor">#define CAN0_QOS_RESET_VAL 1 // QOS reset value</span></div>
<div class="line"><a name="l00138"></a><span class="lineno"> 138</span>&#160; </div>
<div class="line"><a name="l00139"></a><span class="lineno"> 139</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_CAN0_INSTANCE_ */</span><span class="preprocessor"></span></div>
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<p>Instance description for CAN1.
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Macros</h2></td></tr>
<tr class="memitem:a59ee2251dbaeffbdf8ccf8799c92220c"><td class="memItemLeft" align="right" valign="top"><a id="a59ee2251dbaeffbdf8ccf8799c92220c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a59ee2251dbaeffbdf8ccf8799c92220c">REG_CAN1_CREL</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000400UL)</td></tr>
<tr class="memdesc:a59ee2251dbaeffbdf8ccf8799c92220c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Core Release <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#ae634cf07fb4e342f2a4ca4c08d6f50cf">REG_CAN1_ENDN</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000404UL)</td></tr>
<tr class="memdesc:ae634cf07fb4e342f2a4ca4c08d6f50cf"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Endian <br /></td></tr>
<tr class="separator:ae634cf07fb4e342f2a4ca4c08d6f50cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5ad7df01e2356786472b1a7e9c463c9d"><td class="memItemLeft" align="right" valign="top"><a id="a5ad7df01e2356786472b1a7e9c463c9d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a5ad7df01e2356786472b1a7e9c463c9d">REG_CAN1_MRCFG</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000408UL)</td></tr>
<tr class="memdesc:a5ad7df01e2356786472b1a7e9c463c9d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Message RAM Configuration <br /></td></tr>
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<tr class="memitem:abba79d61995499a274f20d5b5f4b7aba"><td class="memItemLeft" align="right" valign="top"><a id="abba79d61995499a274f20d5b5f4b7aba"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#abba79d61995499a274f20d5b5f4b7aba">REG_CAN1_DBTP</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4200040CUL)</td></tr>
<tr class="memdesc:abba79d61995499a274f20d5b5f4b7aba"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Fast Bit Timing and Prescaler <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a470abb8ee63aa5041957e73718b760ca">REG_CAN1_TEST</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000410UL)</td></tr>
<tr class="memdesc:a470abb8ee63aa5041957e73718b760ca"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Test <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#ac153897aacd488e7789e7cccc0746245">REG_CAN1_RWD</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000414UL)</td></tr>
<tr class="memdesc:ac153897aacd488e7789e7cccc0746245"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) RAM Watchdog <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#ab4d209956fcbd2bc5474d40b60543664">REG_CAN1_CCCR</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000418UL)</td></tr>
<tr class="memdesc:ab4d209956fcbd2bc5474d40b60543664"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) CC Control <br /></td></tr>
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<tr class="memitem:a4caa2592c5c2bb2772ee2a6b54fdda46"><td class="memItemLeft" align="right" valign="top"><a id="a4caa2592c5c2bb2772ee2a6b54fdda46"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a4caa2592c5c2bb2772ee2a6b54fdda46">REG_CAN1_NBTP</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4200041CUL)</td></tr>
<tr class="memdesc:a4caa2592c5c2bb2772ee2a6b54fdda46"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Nominal Bit Timing and Prescaler <br /></td></tr>
<tr class="separator:a4caa2592c5c2bb2772ee2a6b54fdda46"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a309188ead4dfb0b9fff7a8df2ca386ba"><td class="memItemLeft" align="right" valign="top"><a id="a309188ead4dfb0b9fff7a8df2ca386ba"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a309188ead4dfb0b9fff7a8df2ca386ba">REG_CAN1_TSCC</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000420UL)</td></tr>
<tr class="memdesc:a309188ead4dfb0b9fff7a8df2ca386ba"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Timestamp Counter Configuration <br /></td></tr>
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<tr class="memitem:aec2b57598deb21aac5278f737a5de49b"><td class="memItemLeft" align="right" valign="top"><a id="aec2b57598deb21aac5278f737a5de49b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#aec2b57598deb21aac5278f737a5de49b">REG_CAN1_TSCV</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000424UL)</td></tr>
<tr class="memdesc:aec2b57598deb21aac5278f737a5de49b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Timestamp Counter Value <br /></td></tr>
<tr class="separator:aec2b57598deb21aac5278f737a5de49b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2b5eb175d1812f94eefe18ff7f5414ec"><td class="memItemLeft" align="right" valign="top"><a id="a2b5eb175d1812f94eefe18ff7f5414ec"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a2b5eb175d1812f94eefe18ff7f5414ec">REG_CAN1_TOCC</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000428UL)</td></tr>
<tr class="memdesc:a2b5eb175d1812f94eefe18ff7f5414ec"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Timeout Counter Configuration <br /></td></tr>
<tr class="separator:a2b5eb175d1812f94eefe18ff7f5414ec"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4319ad0f3c98cfb1a016d04b55c2c3ba"><td class="memItemLeft" align="right" valign="top"><a id="a4319ad0f3c98cfb1a016d04b55c2c3ba"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a4319ad0f3c98cfb1a016d04b55c2c3ba">REG_CAN1_TOCV</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4200042CUL)</td></tr>
<tr class="memdesc:a4319ad0f3c98cfb1a016d04b55c2c3ba"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Timeout Counter Value <br /></td></tr>
<tr class="separator:a4319ad0f3c98cfb1a016d04b55c2c3ba"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4d89c28482aa9c664e93099bbb2ff3a5"><td class="memItemLeft" align="right" valign="top"><a id="a4d89c28482aa9c664e93099bbb2ff3a5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a4d89c28482aa9c664e93099bbb2ff3a5">REG_CAN1_ECR</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000440UL)</td></tr>
<tr class="memdesc:a4d89c28482aa9c664e93099bbb2ff3a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Error Counter <br /></td></tr>
<tr class="separator:a4d89c28482aa9c664e93099bbb2ff3a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa6b875959828d94ad909b34d2b845091"><td class="memItemLeft" align="right" valign="top"><a id="aa6b875959828d94ad909b34d2b845091"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#aa6b875959828d94ad909b34d2b845091">REG_CAN1_PSR</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000444UL)</td></tr>
<tr class="memdesc:aa6b875959828d94ad909b34d2b845091"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Protocol Status <br /></td></tr>
<tr class="separator:aa6b875959828d94ad909b34d2b845091"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a40136d905788b45f4aea683831dbd04e"><td class="memItemLeft" align="right" valign="top"><a id="a40136d905788b45f4aea683831dbd04e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a40136d905788b45f4aea683831dbd04e">REG_CAN1_TDCR</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000448UL)</td></tr>
<tr class="memdesc:a40136d905788b45f4aea683831dbd04e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Extended ID Filter Configuration <br /></td></tr>
<tr class="separator:a40136d905788b45f4aea683831dbd04e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aeb39471220816a31e454ab41838a2355"><td class="memItemLeft" align="right" valign="top"><a id="aeb39471220816a31e454ab41838a2355"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#aeb39471220816a31e454ab41838a2355">REG_CAN1_IR</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000450UL)</td></tr>
<tr class="memdesc:aeb39471220816a31e454ab41838a2355"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Interrupt <br /></td></tr>
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<tr class="memitem:acab7b4c88a26260c0f6bbcdaa41bcc07"><td class="memItemLeft" align="right" valign="top"><a id="acab7b4c88a26260c0f6bbcdaa41bcc07"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#acab7b4c88a26260c0f6bbcdaa41bcc07">REG_CAN1_IE</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000454UL)</td></tr>
<tr class="memdesc:acab7b4c88a26260c0f6bbcdaa41bcc07"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Interrupt Enable <br /></td></tr>
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<tr class="memitem:a34983ab7904733fe8e2d09d5b0259c90"><td class="memItemLeft" align="right" valign="top"><a id="a34983ab7904733fe8e2d09d5b0259c90"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a34983ab7904733fe8e2d09d5b0259c90">REG_CAN1_ILS</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000458UL)</td></tr>
<tr class="memdesc:a34983ab7904733fe8e2d09d5b0259c90"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Interrupt Line Select <br /></td></tr>
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<tr class="memitem:ad9fe025c66cf37b817dae5376cf4dfc9"><td class="memItemLeft" align="right" valign="top"><a id="ad9fe025c66cf37b817dae5376cf4dfc9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#ad9fe025c66cf37b817dae5376cf4dfc9">REG_CAN1_ILE</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4200045CUL)</td></tr>
<tr class="memdesc:ad9fe025c66cf37b817dae5376cf4dfc9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Interrupt Line Enable <br /></td></tr>
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<tr class="memitem:a0d7a34ff4a872a2684ba5ce7d2b297ac"><td class="memItemLeft" align="right" valign="top"><a id="a0d7a34ff4a872a2684ba5ce7d2b297ac"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a0d7a34ff4a872a2684ba5ce7d2b297ac">REG_CAN1_GFC</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000480UL)</td></tr>
<tr class="memdesc:a0d7a34ff4a872a2684ba5ce7d2b297ac"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Global Filter Configuration <br /></td></tr>
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<tr class="memitem:a01e287dd78a8add38c298c579a89d9f1"><td class="memItemLeft" align="right" valign="top"><a id="a01e287dd78a8add38c298c579a89d9f1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a01e287dd78a8add38c298c579a89d9f1">REG_CAN1_SIDFC</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000484UL)</td></tr>
<tr class="memdesc:a01e287dd78a8add38c298c579a89d9f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Standard ID Filter Configuration <br /></td></tr>
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<tr class="memitem:a476a694551a7934c348f5ec6bddcc427"><td class="memItemLeft" align="right" valign="top"><a id="a476a694551a7934c348f5ec6bddcc427"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a476a694551a7934c348f5ec6bddcc427">REG_CAN1_XIDFC</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000488UL)</td></tr>
<tr class="memdesc:a476a694551a7934c348f5ec6bddcc427"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Extended ID Filter Configuration <br /></td></tr>
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<tr class="memitem:a790adffed271c32377330e14544e9e33"><td class="memItemLeft" align="right" valign="top"><a id="a790adffed271c32377330e14544e9e33"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a790adffed271c32377330e14544e9e33">REG_CAN1_XIDAM</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000490UL)</td></tr>
<tr class="memdesc:a790adffed271c32377330e14544e9e33"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Extended ID AND Mask <br /></td></tr>
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<tr class="memitem:a6369b6cdfae8e0ee574e38ecc3e785d7"><td class="memItemLeft" align="right" valign="top"><a id="a6369b6cdfae8e0ee574e38ecc3e785d7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a6369b6cdfae8e0ee574e38ecc3e785d7">REG_CAN1_HPMS</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000494UL)</td></tr>
<tr class="memdesc:a6369b6cdfae8e0ee574e38ecc3e785d7"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) High Priority Message Status <br /></td></tr>
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<tr class="memitem:a90895aa051339198129f754b6dcc79f0"><td class="memItemLeft" align="right" valign="top"><a id="a90895aa051339198129f754b6dcc79f0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a90895aa051339198129f754b6dcc79f0">REG_CAN1_NDAT1</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000498UL)</td></tr>
<tr class="memdesc:a90895aa051339198129f754b6dcc79f0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) New Data 1 <br /></td></tr>
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<tr class="memitem:aefc9660202b318fb52a2907142ba5822"><td class="memItemLeft" align="right" valign="top"><a id="aefc9660202b318fb52a2907142ba5822"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#aefc9660202b318fb52a2907142ba5822">REG_CAN1_NDAT2</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4200049CUL)</td></tr>
<tr class="memdesc:aefc9660202b318fb52a2907142ba5822"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) New Data 2 <br /></td></tr>
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<tr class="memitem:acda403a045674f6fb09c1407dbc886e6"><td class="memItemLeft" align="right" valign="top"><a id="acda403a045674f6fb09c1407dbc886e6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#acda403a045674f6fb09c1407dbc886e6">REG_CAN1_RXF0C</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420004A0UL)</td></tr>
<tr class="memdesc:acda403a045674f6fb09c1407dbc886e6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Rx FIFO 0 Configuration <br /></td></tr>
<tr class="separator:acda403a045674f6fb09c1407dbc886e6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab0e9e0550498e2a871aec0456cc4660b"><td class="memItemLeft" align="right" valign="top"><a id="ab0e9e0550498e2a871aec0456cc4660b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#ab0e9e0550498e2a871aec0456cc4660b">REG_CAN1_RXF0S</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420004A4UL)</td></tr>
<tr class="memdesc:ab0e9e0550498e2a871aec0456cc4660b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Rx FIFO 0 Status <br /></td></tr>
<tr class="separator:ab0e9e0550498e2a871aec0456cc4660b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a41c962c900a460d6d0d35673c394ffff"><td class="memItemLeft" align="right" valign="top"><a id="a41c962c900a460d6d0d35673c394ffff"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a41c962c900a460d6d0d35673c394ffff">REG_CAN1_RXF0A</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420004A8UL)</td></tr>
<tr class="memdesc:a41c962c900a460d6d0d35673c394ffff"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Rx FIFO 0 Acknowledge <br /></td></tr>
<tr class="separator:a41c962c900a460d6d0d35673c394ffff"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a41a571045833355aaa13e174c1fffad8"><td class="memItemLeft" align="right" valign="top"><a id="a41a571045833355aaa13e174c1fffad8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a41a571045833355aaa13e174c1fffad8">REG_CAN1_RXBC</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420004ACUL)</td></tr>
<tr class="memdesc:a41a571045833355aaa13e174c1fffad8"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Rx Buffer Configuration <br /></td></tr>
<tr class="separator:a41a571045833355aaa13e174c1fffad8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a37e41c6c5954dabfa9e8ff1b19307a86"><td class="memItemLeft" align="right" valign="top"><a id="a37e41c6c5954dabfa9e8ff1b19307a86"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a37e41c6c5954dabfa9e8ff1b19307a86">REG_CAN1_RXF1C</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420004B0UL)</td></tr>
<tr class="memdesc:a37e41c6c5954dabfa9e8ff1b19307a86"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Rx FIFO 1 Configuration <br /></td></tr>
<tr class="separator:a37e41c6c5954dabfa9e8ff1b19307a86"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af5d09f06c9c8c12b8a8b8db3c9554cff"><td class="memItemLeft" align="right" valign="top"><a id="af5d09f06c9c8c12b8a8b8db3c9554cff"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#af5d09f06c9c8c12b8a8b8db3c9554cff">REG_CAN1_RXF1S</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420004B4UL)</td></tr>
<tr class="memdesc:af5d09f06c9c8c12b8a8b8db3c9554cff"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Rx FIFO 1 Status <br /></td></tr>
<tr class="separator:af5d09f06c9c8c12b8a8b8db3c9554cff"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a30424e3f79fe3084a8a8b2ca6fd0f993"><td class="memItemLeft" align="right" valign="top"><a id="a30424e3f79fe3084a8a8b2ca6fd0f993"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a30424e3f79fe3084a8a8b2ca6fd0f993">REG_CAN1_RXF1A</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420004B8UL)</td></tr>
<tr class="memdesc:a30424e3f79fe3084a8a8b2ca6fd0f993"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Rx FIFO 1 Acknowledge <br /></td></tr>
<tr class="separator:a30424e3f79fe3084a8a8b2ca6fd0f993"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afd6c12c59967b60b7ab3d3cb20ecc81f"><td class="memItemLeft" align="right" valign="top"><a id="afd6c12c59967b60b7ab3d3cb20ecc81f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#afd6c12c59967b60b7ab3d3cb20ecc81f">REG_CAN1_RXESC</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420004BCUL)</td></tr>
<tr class="memdesc:afd6c12c59967b60b7ab3d3cb20ecc81f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Rx Buffer / FIFO Element Size Configuration <br /></td></tr>
<tr class="separator:afd6c12c59967b60b7ab3d3cb20ecc81f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab791821f96c43a4e65105f8279d201eb"><td class="memItemLeft" align="right" valign="top"><a id="ab791821f96c43a4e65105f8279d201eb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#ab791821f96c43a4e65105f8279d201eb">REG_CAN1_TXBC</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420004C0UL)</td></tr>
<tr class="memdesc:ab791821f96c43a4e65105f8279d201eb"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Tx Buffer Configuration <br /></td></tr>
<tr class="separator:ab791821f96c43a4e65105f8279d201eb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a292fbf2fe86d962c9330a9498de6110f"><td class="memItemLeft" align="right" valign="top"><a id="a292fbf2fe86d962c9330a9498de6110f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a292fbf2fe86d962c9330a9498de6110f">REG_CAN1_TXFQS</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420004C4UL)</td></tr>
<tr class="memdesc:a292fbf2fe86d962c9330a9498de6110f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Tx FIFO / Queue Status <br /></td></tr>
<tr class="separator:a292fbf2fe86d962c9330a9498de6110f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae6f535f610581cf84eff90443c96bacf"><td class="memItemLeft" align="right" valign="top"><a id="ae6f535f610581cf84eff90443c96bacf"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#ae6f535f610581cf84eff90443c96bacf">REG_CAN1_TXESC</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420004C8UL)</td></tr>
<tr class="memdesc:ae6f535f610581cf84eff90443c96bacf"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Tx Buffer Element Size Configuration <br /></td></tr>
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<tr class="memitem:a80f61743d27d067724dad94e7b2df9a5"><td class="memItemLeft" align="right" valign="top"><a id="a80f61743d27d067724dad94e7b2df9a5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a80f61743d27d067724dad94e7b2df9a5">REG_CAN1_TXBRP</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420004CCUL)</td></tr>
<tr class="memdesc:a80f61743d27d067724dad94e7b2df9a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Tx Buffer Request Pending <br /></td></tr>
<tr class="separator:a80f61743d27d067724dad94e7b2df9a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0219b4b0027a5a01969abd60c93fb322"><td class="memItemLeft" align="right" valign="top"><a id="a0219b4b0027a5a01969abd60c93fb322"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a0219b4b0027a5a01969abd60c93fb322">REG_CAN1_TXBAR</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420004D0UL)</td></tr>
<tr class="memdesc:a0219b4b0027a5a01969abd60c93fb322"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Tx Buffer Add Request <br /></td></tr>
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<tr class="memitem:a8ff5e7aeb1d9b15a0bcca054cf152c89"><td class="memItemLeft" align="right" valign="top"><a id="a8ff5e7aeb1d9b15a0bcca054cf152c89"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a8ff5e7aeb1d9b15a0bcca054cf152c89">REG_CAN1_TXBCR</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420004D4UL)</td></tr>
<tr class="memdesc:a8ff5e7aeb1d9b15a0bcca054cf152c89"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Tx Buffer Cancellation Request <br /></td></tr>
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<tr class="memitem:ab2ccd3ca7df88be7034ad2f7da497f1f"><td class="memItemLeft" align="right" valign="top"><a id="ab2ccd3ca7df88be7034ad2f7da497f1f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#ab2ccd3ca7df88be7034ad2f7da497f1f">REG_CAN1_TXBTO</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420004D8UL)</td></tr>
<tr class="memdesc:ab2ccd3ca7df88be7034ad2f7da497f1f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Tx Buffer Transmission Occurred <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#aa2237b89e8c6ba8d92d5daae0d0cc7ba">REG_CAN1_TXBCF</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420004DCUL)</td></tr>
<tr class="memdesc:aa2237b89e8c6ba8d92d5daae0d0cc7ba"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Tx Buffer Cancellation Finished <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a53fb66a9bdf3de41bdd78f256896dd7f">REG_CAN1_TXBTIE</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420004E0UL)</td></tr>
<tr class="memdesc:a53fb66a9bdf3de41bdd78f256896dd7f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Tx Buffer Transmission Interrupt Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#aa1cbc9ed54637e8494420e7e40c4a2e4">REG_CAN1_TXBCIE</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420004E4UL)</td></tr>
<tr class="memdesc:aa1cbc9ed54637e8494420e7e40c4a2e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Tx Buffer Cancellation Finished Interrupt Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#aad61247c3ad6da3063ef9a8310ce0753">REG_CAN1_TXEFC</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420004F0UL)</td></tr>
<tr class="memdesc:aad61247c3ad6da3063ef9a8310ce0753"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Tx Event FIFO Configuration <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#ad9db6f7f90147931fbe228ddb4942371">REG_CAN1_TXEFS</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420004F4UL)</td></tr>
<tr class="memdesc:ad9db6f7f90147931fbe228ddb4942371"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Tx Event FIFO Status <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="can1_8h.html#a014f9b55f4c435ef0878513f5d1bbef1">REG_CAN1_TXEFA</a>&#160;&#160;&#160;(*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420004F8UL)</td></tr>
<tr class="memdesc:a014f9b55f4c435ef0878513f5d1bbef1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CAN1) Tx Event FIFO Acknowledge <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CAN1_CLK_AHB_ID</b>&#160;&#160;&#160;18</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CAN1_DMAC_ID_DEBUG</b>&#160;&#160;&#160;21</td></tr>
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<tr class="memitem:af2b96c319beefeb0ec92e749226f56cd"><td class="memItemLeft" align="right" valign="top"><a id="af2b96c319beefeb0ec92e749226f56cd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CAN1_GCLK_ID</b>&#160;&#160;&#160;28</td></tr>
<tr class="separator:af2b96c319beefeb0ec92e749226f56cd"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CAN1_MSG_RAM_ADDR</b>&#160;&#160;&#160;0x20000000</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CAN1_QOS_RESET_VAL</b>&#160;&#160;&#160;1</td></tr>
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</table>
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Instance description for CAN1. </p>
<p>Copyright (c) 2019 Microchip Technology Inc.</p>
<p>\asf_license_start </p>
<p class="definition">Definition in file <a class="el" href="can1_8h_source.html">can1.h</a>.</p>
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<a href="can1_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_CAN1_INSTANCE_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_CAN1_INSTANCE_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="comment">/* ========== Register definition for CAN1 peripheral ========== */</span></div>
<div class="line"><a name="l00034"></a><span class="lineno"> 34</span>&#160;<span class="preprocessor">#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="preprocessor">#define REG_CAN1_CREL (0x42000400) </span></div>
<div class="line"><a name="l00036"></a><span class="lineno"> 36</span>&#160;<span class="preprocessor">#define REG_CAN1_ENDN (0x42000404) </span></div>
<div class="line"><a name="l00037"></a><span class="lineno"> 37</span>&#160;<span class="preprocessor">#define REG_CAN1_MRCFG (0x42000408) </span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160;<span class="preprocessor">#define REG_CAN1_DBTP (0x4200040C) </span></div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define REG_CAN1_TEST (0x42000410) </span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define REG_CAN1_RWD (0x42000414) </span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160;<span class="preprocessor">#define REG_CAN1_CCCR (0x42000418) </span></div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="preprocessor">#define REG_CAN1_NBTP (0x4200041C) </span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#define REG_CAN1_TSCC (0x42000420) </span></div>
<div class="line"><a name="l00044"></a><span class="lineno"> 44</span>&#160;<span class="preprocessor">#define REG_CAN1_TSCV (0x42000424) </span></div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160;<span class="preprocessor">#define REG_CAN1_TOCC (0x42000428) </span></div>
<div class="line"><a name="l00046"></a><span class="lineno"> 46</span>&#160;<span class="preprocessor">#define REG_CAN1_TOCV (0x4200042C) </span></div>
<div class="line"><a name="l00047"></a><span class="lineno"> 47</span>&#160;<span class="preprocessor">#define REG_CAN1_ECR (0x42000440) </span></div>
<div class="line"><a name="l00048"></a><span class="lineno"> 48</span>&#160;<span class="preprocessor">#define REG_CAN1_PSR (0x42000444) </span></div>
<div class="line"><a name="l00049"></a><span class="lineno"> 49</span>&#160;<span class="preprocessor">#define REG_CAN1_TDCR (0x42000448) </span></div>
<div class="line"><a name="l00050"></a><span class="lineno"> 50</span>&#160;<span class="preprocessor">#define REG_CAN1_IR (0x42000450) </span></div>
<div class="line"><a name="l00051"></a><span class="lineno"> 51</span>&#160;<span class="preprocessor">#define REG_CAN1_IE (0x42000454) </span></div>
<div class="line"><a name="l00052"></a><span class="lineno"> 52</span>&#160;<span class="preprocessor">#define REG_CAN1_ILS (0x42000458) </span></div>
<div class="line"><a name="l00053"></a><span class="lineno"> 53</span>&#160;<span class="preprocessor">#define REG_CAN1_ILE (0x4200045C) </span></div>
<div class="line"><a name="l00054"></a><span class="lineno"> 54</span>&#160;<span class="preprocessor">#define REG_CAN1_GFC (0x42000480) </span></div>
<div class="line"><a name="l00055"></a><span class="lineno"> 55</span>&#160;<span class="preprocessor">#define REG_CAN1_SIDFC (0x42000484) </span></div>
<div class="line"><a name="l00056"></a><span class="lineno"> 56</span>&#160;<span class="preprocessor">#define REG_CAN1_XIDFC (0x42000488) </span></div>
<div class="line"><a name="l00057"></a><span class="lineno"> 57</span>&#160;<span class="preprocessor">#define REG_CAN1_XIDAM (0x42000490) </span></div>
<div class="line"><a name="l00058"></a><span class="lineno"> 58</span>&#160;<span class="preprocessor">#define REG_CAN1_HPMS (0x42000494) </span></div>
<div class="line"><a name="l00059"></a><span class="lineno"> 59</span>&#160;<span class="preprocessor">#define REG_CAN1_NDAT1 (0x42000498) </span></div>
<div class="line"><a name="l00060"></a><span class="lineno"> 60</span>&#160;<span class="preprocessor">#define REG_CAN1_NDAT2 (0x4200049C) </span></div>
<div class="line"><a name="l00061"></a><span class="lineno"> 61</span>&#160;<span class="preprocessor">#define REG_CAN1_RXF0C (0x420004A0) </span></div>
<div class="line"><a name="l00062"></a><span class="lineno"> 62</span>&#160;<span class="preprocessor">#define REG_CAN1_RXF0S (0x420004A4) </span></div>
<div class="line"><a name="l00063"></a><span class="lineno"> 63</span>&#160;<span class="preprocessor">#define REG_CAN1_RXF0A (0x420004A8) </span></div>
<div class="line"><a name="l00064"></a><span class="lineno"> 64</span>&#160;<span class="preprocessor">#define REG_CAN1_RXBC (0x420004AC) </span></div>
<div class="line"><a name="l00065"></a><span class="lineno"> 65</span>&#160;<span class="preprocessor">#define REG_CAN1_RXF1C (0x420004B0) </span></div>
<div class="line"><a name="l00066"></a><span class="lineno"> 66</span>&#160;<span class="preprocessor">#define REG_CAN1_RXF1S (0x420004B4) </span></div>
<div class="line"><a name="l00067"></a><span class="lineno"> 67</span>&#160;<span class="preprocessor">#define REG_CAN1_RXF1A (0x420004B8) </span></div>
<div class="line"><a name="l00068"></a><span class="lineno"> 68</span>&#160;<span class="preprocessor">#define REG_CAN1_RXESC (0x420004BC) </span></div>
<div class="line"><a name="l00069"></a><span class="lineno"> 69</span>&#160;<span class="preprocessor">#define REG_CAN1_TXBC (0x420004C0) </span></div>
<div class="line"><a name="l00070"></a><span class="lineno"> 70</span>&#160;<span class="preprocessor">#define REG_CAN1_TXFQS (0x420004C4) </span></div>
<div class="line"><a name="l00071"></a><span class="lineno"> 71</span>&#160;<span class="preprocessor">#define REG_CAN1_TXESC (0x420004C8) </span></div>
<div class="line"><a name="l00072"></a><span class="lineno"> 72</span>&#160;<span class="preprocessor">#define REG_CAN1_TXBRP (0x420004CC) </span></div>
<div class="line"><a name="l00073"></a><span class="lineno"> 73</span>&#160;<span class="preprocessor">#define REG_CAN1_TXBAR (0x420004D0) </span></div>
<div class="line"><a name="l00074"></a><span class="lineno"> 74</span>&#160;<span class="preprocessor">#define REG_CAN1_TXBCR (0x420004D4) </span></div>
<div class="line"><a name="l00075"></a><span class="lineno"> 75</span>&#160;<span class="preprocessor">#define REG_CAN1_TXBTO (0x420004D8) </span></div>
<div class="line"><a name="l00076"></a><span class="lineno"> 76</span>&#160;<span class="preprocessor">#define REG_CAN1_TXBCF (0x420004DC) </span></div>
<div class="line"><a name="l00077"></a><span class="lineno"> 77</span>&#160;<span class="preprocessor">#define REG_CAN1_TXBTIE (0x420004E0) </span></div>
<div class="line"><a name="l00078"></a><span class="lineno"> 78</span>&#160;<span class="preprocessor">#define REG_CAN1_TXBCIE (0x420004E4) </span></div>
<div class="line"><a name="l00079"></a><span class="lineno"> 79</span>&#160;<span class="preprocessor">#define REG_CAN1_TXEFC (0x420004F0) </span></div>
<div class="line"><a name="l00080"></a><span class="lineno"> 80</span>&#160;<span class="preprocessor">#define REG_CAN1_TXEFS (0x420004F4) </span></div>
<div class="line"><a name="l00081"></a><span class="lineno"> 81</span>&#160;<span class="preprocessor">#define REG_CAN1_TXEFA (0x420004F8) </span></div>
<div class="line"><a name="l00082"></a><span class="lineno"> 82</span>&#160;<span class="preprocessor">#else</span></div>
<div class="line"><a name="l00083"></a><span class="lineno"><a class="line" href="can1_8h.html#a59ee2251dbaeffbdf8ccf8799c92220c"> 83</a></span>&#160;<span class="preprocessor">#define REG_CAN1_CREL (*(RoReg *)0x42000400UL) </span></div>
<div class="line"><a name="l00084"></a><span class="lineno"><a class="line" href="can1_8h.html#ae634cf07fb4e342f2a4ca4c08d6f50cf"> 84</a></span>&#160;<span class="preprocessor">#define REG_CAN1_ENDN (*(RoReg *)0x42000404UL) </span></div>
<div class="line"><a name="l00085"></a><span class="lineno"><a class="line" href="can1_8h.html#a5ad7df01e2356786472b1a7e9c463c9d"> 85</a></span>&#160;<span class="preprocessor">#define REG_CAN1_MRCFG (*(RwReg *)0x42000408UL) </span></div>
<div class="line"><a name="l00086"></a><span class="lineno"><a class="line" href="can1_8h.html#abba79d61995499a274f20d5b5f4b7aba"> 86</a></span>&#160;<span class="preprocessor">#define REG_CAN1_DBTP (*(RwReg *)0x4200040CUL) </span></div>
<div class="line"><a name="l00087"></a><span class="lineno"><a class="line" href="can1_8h.html#a470abb8ee63aa5041957e73718b760ca"> 87</a></span>&#160;<span class="preprocessor">#define REG_CAN1_TEST (*(RwReg *)0x42000410UL) </span></div>
<div class="line"><a name="l00088"></a><span class="lineno"><a class="line" href="can1_8h.html#ac153897aacd488e7789e7cccc0746245"> 88</a></span>&#160;<span class="preprocessor">#define REG_CAN1_RWD (*(RwReg *)0x42000414UL) </span></div>
<div class="line"><a name="l00089"></a><span class="lineno"><a class="line" href="can1_8h.html#ab4d209956fcbd2bc5474d40b60543664"> 89</a></span>&#160;<span class="preprocessor">#define REG_CAN1_CCCR (*(RwReg *)0x42000418UL) </span></div>
<div class="line"><a name="l00090"></a><span class="lineno"><a class="line" href="can1_8h.html#a4caa2592c5c2bb2772ee2a6b54fdda46"> 90</a></span>&#160;<span class="preprocessor">#define REG_CAN1_NBTP (*(RwReg *)0x4200041CUL) </span></div>
<div class="line"><a name="l00091"></a><span class="lineno"><a class="line" href="can1_8h.html#a309188ead4dfb0b9fff7a8df2ca386ba"> 91</a></span>&#160;<span class="preprocessor">#define REG_CAN1_TSCC (*(RwReg *)0x42000420UL) </span></div>
<div class="line"><a name="l00092"></a><span class="lineno"><a class="line" href="can1_8h.html#aec2b57598deb21aac5278f737a5de49b"> 92</a></span>&#160;<span class="preprocessor">#define REG_CAN1_TSCV (*(RoReg *)0x42000424UL) </span></div>
<div class="line"><a name="l00093"></a><span class="lineno"><a class="line" href="can1_8h.html#a2b5eb175d1812f94eefe18ff7f5414ec"> 93</a></span>&#160;<span class="preprocessor">#define REG_CAN1_TOCC (*(RwReg *)0x42000428UL) </span></div>
<div class="line"><a name="l00094"></a><span class="lineno"><a class="line" href="can1_8h.html#a4319ad0f3c98cfb1a016d04b55c2c3ba"> 94</a></span>&#160;<span class="preprocessor">#define REG_CAN1_TOCV (*(RwReg *)0x4200042CUL) </span></div>
<div class="line"><a name="l00095"></a><span class="lineno"><a class="line" href="can1_8h.html#a4d89c28482aa9c664e93099bbb2ff3a5"> 95</a></span>&#160;<span class="preprocessor">#define REG_CAN1_ECR (*(RoReg *)0x42000440UL) </span></div>
<div class="line"><a name="l00096"></a><span class="lineno"><a class="line" href="can1_8h.html#aa6b875959828d94ad909b34d2b845091"> 96</a></span>&#160;<span class="preprocessor">#define REG_CAN1_PSR (*(RoReg *)0x42000444UL) </span></div>
<div class="line"><a name="l00097"></a><span class="lineno"><a class="line" href="can1_8h.html#a40136d905788b45f4aea683831dbd04e"> 97</a></span>&#160;<span class="preprocessor">#define REG_CAN1_TDCR (*(RwReg *)0x42000448UL) </span></div>
<div class="line"><a name="l00098"></a><span class="lineno"><a class="line" href="can1_8h.html#aeb39471220816a31e454ab41838a2355"> 98</a></span>&#160;<span class="preprocessor">#define REG_CAN1_IR (*(RwReg *)0x42000450UL) </span></div>
<div class="line"><a name="l00099"></a><span class="lineno"><a class="line" href="can1_8h.html#acab7b4c88a26260c0f6bbcdaa41bcc07"> 99</a></span>&#160;<span class="preprocessor">#define REG_CAN1_IE (*(RwReg *)0x42000454UL) </span></div>
<div class="line"><a name="l00100"></a><span class="lineno"><a class="line" href="can1_8h.html#a34983ab7904733fe8e2d09d5b0259c90"> 100</a></span>&#160;<span class="preprocessor">#define REG_CAN1_ILS (*(RwReg *)0x42000458UL) </span></div>
<div class="line"><a name="l00101"></a><span class="lineno"><a class="line" href="can1_8h.html#ad9fe025c66cf37b817dae5376cf4dfc9"> 101</a></span>&#160;<span class="preprocessor">#define REG_CAN1_ILE (*(RwReg *)0x4200045CUL) </span></div>
<div class="line"><a name="l00102"></a><span class="lineno"><a class="line" href="can1_8h.html#a0d7a34ff4a872a2684ba5ce7d2b297ac"> 102</a></span>&#160;<span class="preprocessor">#define REG_CAN1_GFC (*(RwReg *)0x42000480UL) </span></div>
<div class="line"><a name="l00103"></a><span class="lineno"><a class="line" href="can1_8h.html#a01e287dd78a8add38c298c579a89d9f1"> 103</a></span>&#160;<span class="preprocessor">#define REG_CAN1_SIDFC (*(RwReg *)0x42000484UL) </span></div>
<div class="line"><a name="l00104"></a><span class="lineno"><a class="line" href="can1_8h.html#a476a694551a7934c348f5ec6bddcc427"> 104</a></span>&#160;<span class="preprocessor">#define REG_CAN1_XIDFC (*(RwReg *)0x42000488UL) </span></div>
<div class="line"><a name="l00105"></a><span class="lineno"><a class="line" href="can1_8h.html#a790adffed271c32377330e14544e9e33"> 105</a></span>&#160;<span class="preprocessor">#define REG_CAN1_XIDAM (*(RwReg *)0x42000490UL) </span></div>
<div class="line"><a name="l00106"></a><span class="lineno"><a class="line" href="can1_8h.html#a6369b6cdfae8e0ee574e38ecc3e785d7"> 106</a></span>&#160;<span class="preprocessor">#define REG_CAN1_HPMS (*(RoReg *)0x42000494UL) </span></div>
<div class="line"><a name="l00107"></a><span class="lineno"><a class="line" href="can1_8h.html#a90895aa051339198129f754b6dcc79f0"> 107</a></span>&#160;<span class="preprocessor">#define REG_CAN1_NDAT1 (*(RwReg *)0x42000498UL) </span></div>
<div class="line"><a name="l00108"></a><span class="lineno"><a class="line" href="can1_8h.html#aefc9660202b318fb52a2907142ba5822"> 108</a></span>&#160;<span class="preprocessor">#define REG_CAN1_NDAT2 (*(RwReg *)0x4200049CUL) </span></div>
<div class="line"><a name="l00109"></a><span class="lineno"><a class="line" href="can1_8h.html#acda403a045674f6fb09c1407dbc886e6"> 109</a></span>&#160;<span class="preprocessor">#define REG_CAN1_RXF0C (*(RwReg *)0x420004A0UL) </span></div>
<div class="line"><a name="l00110"></a><span class="lineno"><a class="line" href="can1_8h.html#ab0e9e0550498e2a871aec0456cc4660b"> 110</a></span>&#160;<span class="preprocessor">#define REG_CAN1_RXF0S (*(RoReg *)0x420004A4UL) </span></div>
<div class="line"><a name="l00111"></a><span class="lineno"><a class="line" href="can1_8h.html#a41c962c900a460d6d0d35673c394ffff"> 111</a></span>&#160;<span class="preprocessor">#define REG_CAN1_RXF0A (*(RwReg *)0x420004A8UL) </span></div>
<div class="line"><a name="l00112"></a><span class="lineno"><a class="line" href="can1_8h.html#a41a571045833355aaa13e174c1fffad8"> 112</a></span>&#160;<span class="preprocessor">#define REG_CAN1_RXBC (*(RwReg *)0x420004ACUL) </span></div>
<div class="line"><a name="l00113"></a><span class="lineno"><a class="line" href="can1_8h.html#a37e41c6c5954dabfa9e8ff1b19307a86"> 113</a></span>&#160;<span class="preprocessor">#define REG_CAN1_RXF1C (*(RwReg *)0x420004B0UL) </span></div>
<div class="line"><a name="l00114"></a><span class="lineno"><a class="line" href="can1_8h.html#af5d09f06c9c8c12b8a8b8db3c9554cff"> 114</a></span>&#160;<span class="preprocessor">#define REG_CAN1_RXF1S (*(RoReg *)0x420004B4UL) </span></div>
<div class="line"><a name="l00115"></a><span class="lineno"><a class="line" href="can1_8h.html#a30424e3f79fe3084a8a8b2ca6fd0f993"> 115</a></span>&#160;<span class="preprocessor">#define REG_CAN1_RXF1A (*(RwReg *)0x420004B8UL) </span></div>
<div class="line"><a name="l00116"></a><span class="lineno"><a class="line" href="can1_8h.html#afd6c12c59967b60b7ab3d3cb20ecc81f"> 116</a></span>&#160;<span class="preprocessor">#define REG_CAN1_RXESC (*(RwReg *)0x420004BCUL) </span></div>
<div class="line"><a name="l00117"></a><span class="lineno"><a class="line" href="can1_8h.html#ab791821f96c43a4e65105f8279d201eb"> 117</a></span>&#160;<span class="preprocessor">#define REG_CAN1_TXBC (*(RwReg *)0x420004C0UL) </span></div>
<div class="line"><a name="l00118"></a><span class="lineno"><a class="line" href="can1_8h.html#a292fbf2fe86d962c9330a9498de6110f"> 118</a></span>&#160;<span class="preprocessor">#define REG_CAN1_TXFQS (*(RoReg *)0x420004C4UL) </span></div>
<div class="line"><a name="l00119"></a><span class="lineno"><a class="line" href="can1_8h.html#ae6f535f610581cf84eff90443c96bacf"> 119</a></span>&#160;<span class="preprocessor">#define REG_CAN1_TXESC (*(RwReg *)0x420004C8UL) </span></div>
<div class="line"><a name="l00120"></a><span class="lineno"><a class="line" href="can1_8h.html#a80f61743d27d067724dad94e7b2df9a5"> 120</a></span>&#160;<span class="preprocessor">#define REG_CAN1_TXBRP (*(RoReg *)0x420004CCUL) </span></div>
<div class="line"><a name="l00121"></a><span class="lineno"><a class="line" href="can1_8h.html#a0219b4b0027a5a01969abd60c93fb322"> 121</a></span>&#160;<span class="preprocessor">#define REG_CAN1_TXBAR (*(RwReg *)0x420004D0UL) </span></div>
<div class="line"><a name="l00122"></a><span class="lineno"><a class="line" href="can1_8h.html#a8ff5e7aeb1d9b15a0bcca054cf152c89"> 122</a></span>&#160;<span class="preprocessor">#define REG_CAN1_TXBCR (*(RwReg *)0x420004D4UL) </span></div>
<div class="line"><a name="l00123"></a><span class="lineno"><a class="line" href="can1_8h.html#ab2ccd3ca7df88be7034ad2f7da497f1f"> 123</a></span>&#160;<span class="preprocessor">#define REG_CAN1_TXBTO (*(RoReg *)0x420004D8UL) </span></div>
<div class="line"><a name="l00124"></a><span class="lineno"><a class="line" href="can1_8h.html#aa2237b89e8c6ba8d92d5daae0d0cc7ba"> 124</a></span>&#160;<span class="preprocessor">#define REG_CAN1_TXBCF (*(RoReg *)0x420004DCUL) </span></div>
<div class="line"><a name="l00125"></a><span class="lineno"><a class="line" href="can1_8h.html#a53fb66a9bdf3de41bdd78f256896dd7f"> 125</a></span>&#160;<span class="preprocessor">#define REG_CAN1_TXBTIE (*(RwReg *)0x420004E0UL) </span></div>
<div class="line"><a name="l00126"></a><span class="lineno"><a class="line" href="can1_8h.html#aa1cbc9ed54637e8494420e7e40c4a2e4"> 126</a></span>&#160;<span class="preprocessor">#define REG_CAN1_TXBCIE (*(RwReg *)0x420004E4UL) </span></div>
<div class="line"><a name="l00127"></a><span class="lineno"><a class="line" href="can1_8h.html#aad61247c3ad6da3063ef9a8310ce0753"> 127</a></span>&#160;<span class="preprocessor">#define REG_CAN1_TXEFC (*(RwReg *)0x420004F0UL) </span></div>
<div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="can1_8h.html#ad9db6f7f90147931fbe228ddb4942371"> 128</a></span>&#160;<span class="preprocessor">#define REG_CAN1_TXEFS (*(RoReg *)0x420004F4UL) </span></div>
<div class="line"><a name="l00129"></a><span class="lineno"><a class="line" href="can1_8h.html#a014f9b55f4c435ef0878513f5d1bbef1"> 129</a></span>&#160;<span class="preprocessor">#define REG_CAN1_TXEFA (*(RwReg *)0x420004F8UL) </span></div>
<div class="line"><a name="l00130"></a><span class="lineno"> 130</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00131"></a><span class="lineno"> 131</span>&#160; </div>
<div class="line"><a name="l00132"></a><span class="lineno"> 132</span>&#160;<span class="comment">/* ========== Instance parameters for CAN1 peripheral ========== */</span></div>
<div class="line"><a name="l00133"></a><span class="lineno"> 133</span>&#160;<span class="preprocessor">#define CAN1_CLK_AHB_ID 18 // Index of AHB clock</span></div>
<div class="line"><a name="l00134"></a><span class="lineno"> 134</span>&#160;<span class="preprocessor">#define CAN1_DMAC_ID_DEBUG 21 // DMA CAN Debug Req</span></div>
<div class="line"><a name="l00135"></a><span class="lineno"> 135</span>&#160;<span class="preprocessor">#define CAN1_GCLK_ID 28 // Index of Generic Clock</span></div>
<div class="line"><a name="l00136"></a><span class="lineno"> 136</span>&#160;<span class="preprocessor">#define CAN1_MSG_RAM_ADDR 0x20000000</span></div>
<div class="line"><a name="l00137"></a><span class="lineno"> 137</span>&#160;<span class="preprocessor">#define CAN1_QOS_RESET_VAL 1 // QOS reset value</span></div>
<div class="line"><a name="l00138"></a><span class="lineno"> 138</span>&#160; </div>
<div class="line"><a name="l00139"></a><span class="lineno"> 139</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_CAN1_INSTANCE_ */</span><span class="preprocessor"></span></div>
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<li class="navelem"><a class="el" href="dir_e498f07834f57e09d3c418a37b65ec3b.html">ESF</a></li><li class="navelem"><a class="el" href="dir_2c010a15ee55606c39d249a8f09d70a6.html">modules</a></li><li class="navelem"><a class="el" href="dir_1e3b112bfad1074f4c8038c4c4396c2b.html">core</a></li> </ul>
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<div class="title">clocks.c</div> </div>
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<div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160;<span class="preprocessor">#include &quot;clocks.h&quot;</span></div>
<div class="line"><a name="l00002"></a><span class="lineno"> 2</span>&#160;<span class="preprocessor">#include &quot;<a class="code" href="conf__core_8h.html">conf_core.h</a>&quot;</span></div>
<div class="line"><a name="l00003"></a><span class="lineno"> 3</span>&#160; </div>
<div class="line"><a name="l00004"></a><span class="lineno"> 4</span>&#160;<span class="preprocessor">#if CONF_CORE_CLK_XOSC0_FREQUENCY &gt; 24000000</span></div>
<div class="line"><a name="l00005"></a><span class="lineno"> 5</span>&#160;<span class="preprocessor"> #define CONF_CORE_CLK_XOSC0_IPTAT (3)</span></div>
<div class="line"><a name="l00006"></a><span class="lineno"> 6</span>&#160;<span class="preprocessor"> #define CONF_CORE_CLK_XOSC0_IMULT (6)</span></div>
<div class="line"><a name="l00007"></a><span class="lineno"> 7</span>&#160;<span class="preprocessor"> #define CONF_CORE_CLK_XOSC0_CFDPRESC (0x0)</span></div>
<div class="line"><a name="l00008"></a><span class="lineno"> 8</span>&#160;<span class="preprocessor">#elif CONF_CORE_CLK_XOSC0_FREQUENCY &gt; 16000000</span></div>
<div class="line"><a name="l00009"></a><span class="lineno"> 9</span>&#160;<span class="preprocessor"> #define CONF_CORE_CLK_XOSC0_IPTAT (3)</span></div>
<div class="line"><a name="l00010"></a><span class="lineno"> 10</span>&#160;<span class="preprocessor"> #define CONF_CORE_CLK_XOSC0_IMULT (5)</span></div>
<div class="line"><a name="l00011"></a><span class="lineno"> 11</span>&#160;<span class="preprocessor"> #define CONF_CORE_CLK_XOSC0_CFDPRESC (0x1)</span></div>
<div class="line"><a name="l00012"></a><span class="lineno"> 12</span>&#160;<span class="preprocessor">#elif CONF_CORE_CLK_XOSC0_FREQUENCY &gt; 8000000</span></div>
<div class="line"><a name="l00013"></a><span class="lineno"> 13</span>&#160;<span class="preprocessor"> #define CONF_CORE_CLK_XOSC0_IPTAT (3)</span></div>
<div class="line"><a name="l00014"></a><span class="lineno"> 14</span>&#160;<span class="preprocessor"> #define CONF_CORE_CLK_XOSC0_IMULT (4)</span></div>
<div class="line"><a name="l00015"></a><span class="lineno"> 15</span>&#160;<span class="preprocessor"> #define CONF_CORE_CLK_XOSC0_CFDPRESC (0x2)</span></div>
<div class="line"><a name="l00016"></a><span class="lineno"> 16</span>&#160;<span class="preprocessor">#else</span></div>
<div class="line"><a name="l00017"></a><span class="lineno"> 17</span>&#160;<span class="preprocessor"> #define CONF_CORE_CLK_XOSC0_IPTAT (2)</span></div>
<div class="line"><a name="l00018"></a><span class="lineno"> 18</span>&#160;<span class="preprocessor"> #define CONF_CORE_CLK_XOSC0_IMULT (3)</span></div>
<div class="line"><a name="l00019"></a><span class="lineno"> 19</span>&#160;<span class="preprocessor"> #define CONF_CORE_CLK_XOSC0_CFDPRESC (0x3)</span></div>
<div class="line"><a name="l00020"></a><span class="lineno"> 20</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00021"></a><span class="lineno"> 21</span>&#160; </div>
<div class="line"><a name="l00022"></a><span class="lineno"> 22</span>&#160;<span class="preprocessor">#if CONF_CORE_CLK_XOSC1_FREQUENCY &gt; 24000000</span></div>
<div class="line"><a name="l00023"></a><span class="lineno"> 23</span>&#160;<span class="preprocessor"> #define CONF_CORE_CLK_XOSC1_IPTAT (3)</span></div>
<div class="line"><a name="l00024"></a><span class="lineno"> 24</span>&#160;<span class="preprocessor"> #define CONF_CORE_CLK_XOSC1_IMULT (6)</span></div>
<div class="line"><a name="l00025"></a><span class="lineno"> 25</span>&#160;<span class="preprocessor"> #define CONF_CORE_CLK_XOSC1_CFDPRESC (0x0)</span></div>
<div class="line"><a name="l00026"></a><span class="lineno"> 26</span>&#160;<span class="preprocessor">#elif CONF_CORE_CLK_XOSC1_FREQUENCY &gt; 16000000</span></div>
<div class="line"><a name="l00027"></a><span class="lineno"> 27</span>&#160;<span class="preprocessor"> #define CONF_CORE_CLK_XOSC1_IPTAT (3)</span></div>
<div class="line"><a name="l00028"></a><span class="lineno"> 28</span>&#160;<span class="preprocessor"> #define CONF_CORE_CLK_XOSC1_IMULT (5)</span></div>
<div class="line"><a name="l00029"></a><span class="lineno"> 29</span>&#160;<span class="preprocessor"> #define CONF_CORE_CLK_XOSC1_CFDPRESC (0x1)</span></div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#elif CONF_CORE_CLK_XOSC1_FREQUENCY &gt; 8000000</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor"> #define CONF_CORE_CLK_XOSC1_IPTAT (3)</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160;<span class="preprocessor"> #define CONF_CORE_CLK_XOSC1_IMULT (4)</span></div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="preprocessor"> #define CONF_CORE_CLK_XOSC1_CFDPRESC (0x2)</span></div>
<div class="line"><a name="l00034"></a><span class="lineno"> 34</span>&#160;<span class="preprocessor">#else</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="preprocessor"> #define CONF_CORE_CLK_XOSC1_IPTAT (2)</span></div>
<div class="line"><a name="l00036"></a><span class="lineno"> 36</span>&#160;<span class="preprocessor"> #define CONF_CORE_CLK_XOSC1_IMULT (3)</span></div>
<div class="line"><a name="l00037"></a><span class="lineno"> 37</span>&#160;<span class="preprocessor"> #define CONF_CORE_CLK_XOSC1_CFDPRESC (0x3)</span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160; </div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="keywordtype">void</span> clock_osc32k_init(<span class="keywordtype">void</span>)</div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160;{</div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="preprocessor">#if CONF_CORE_CLK_XOSC32K_ENABLE == 1</span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160; <a class="code" href="same54n19a_8h.html#af1a4b8f1d1a2265b93f22621f7903f88">OSC32KCTRL</a>-&gt;XOSC32K.bit.CGM = <a class="code" href="conf__core_8h.html#a031a77340c697036538d218724837de1">CONF_CORE_CLK_XOSC32K_CGM</a>;</div>
<div class="line"><a name="l00044"></a><span class="lineno"> 44</span>&#160; <a class="code" href="same54n19a_8h.html#af1a4b8f1d1a2265b93f22621f7903f88">OSC32KCTRL</a>-&gt;XOSC32K.bit.WRTLOCK = <a class="code" href="conf__core_8h.html#a42b0270d2f3c0f51c4b3d2b8ac397fda">CONF_CORE_CLK_XOSC32K_WRTLOCK</a>;</div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160; <a class="code" href="same54n19a_8h.html#af1a4b8f1d1a2265b93f22621f7903f88">OSC32KCTRL</a>-&gt;XOSC32K.bit.STARTUP = <a class="code" href="conf__core_8h.html#a314b78ee48f1ecf6c40f4bad7ef63d9d">CONF_CORE_CLK_XOSC32K_STARTUP_TIME</a>;</div>
<div class="line"><a name="l00046"></a><span class="lineno"> 46</span>&#160; <a class="code" href="same54n19a_8h.html#af1a4b8f1d1a2265b93f22621f7903f88">OSC32KCTRL</a>-&gt;XOSC32K.bit.RUNSTDBY = <a class="code" href="conf__core_8h.html#adc7a2f161e9e8e54388b1f290066247e">CONF_CORE_CLK_XOSC32K_RUNSTDBY</a>;</div>
<div class="line"><a name="l00047"></a><span class="lineno"> 47</span>&#160; <a class="code" href="same54n19a_8h.html#af1a4b8f1d1a2265b93f22621f7903f88">OSC32KCTRL</a>-&gt;XOSC32K.bit.ONDEMAND = <a class="code" href="conf__core_8h.html#a8d70a30b50febec035af6b982daac395">CONF_CORE_CLK_XOSC32K_ONDEMAND</a>;</div>
<div class="line"><a name="l00048"></a><span class="lineno"> 48</span>&#160; <a class="code" href="same54n19a_8h.html#af1a4b8f1d1a2265b93f22621f7903f88">OSC32KCTRL</a>-&gt;XOSC32K.bit.EN1K = <a class="code" href="conf__core_8h.html#a033f3571fb50a6ed02278d65ea84b45e">CONF_CORE_CLK_XOSC32K_EN1K</a>;</div>
<div class="line"><a name="l00049"></a><span class="lineno"> 49</span>&#160; <a class="code" href="same54n19a_8h.html#af1a4b8f1d1a2265b93f22621f7903f88">OSC32KCTRL</a>-&gt;XOSC32K.bit.EN32K = <a class="code" href="conf__core_8h.html#ae9fbb8d05dc5808f510eae4e8a629826">CONF_CORE_CLK_XOSC32K_EN32K</a>;</div>
<div class="line"><a name="l00050"></a><span class="lineno"> 50</span>&#160; <a class="code" href="same54n19a_8h.html#af1a4b8f1d1a2265b93f22621f7903f88">OSC32KCTRL</a>-&gt;XOSC32K.bit.XTALEN = <a class="code" href="conf__core_8h.html#a6a65a6f4bf7e21dc2003b61a7045e24a">CONF_CORE_CLK_XOSC32K_XTALEN</a>;</div>
<div class="line"><a name="l00051"></a><span class="lineno"> 51</span>&#160; <a class="code" href="same54n19a_8h.html#af1a4b8f1d1a2265b93f22621f7903f88">OSC32KCTRL</a>-&gt;CFDCTRL.bit.CFDPRESC = <a class="code" href="conf__core_8h.html#a79567f94a0f3ad2d628bcf5e1cff62d1">CONF_CORE_CLK_XOSC32K_CFDPRESC</a>;</div>
<div class="line"><a name="l00052"></a><span class="lineno"> 52</span>&#160; <a class="code" href="same54n19a_8h.html#af1a4b8f1d1a2265b93f22621f7903f88">OSC32KCTRL</a>-&gt;CFDCTRL.bit.SWBACK = <a class="code" href="conf__core_8h.html#ac6e671eee4ca4aeb9fcbb87d52b457b5">CONF_CORE_CLK_XOSC32K_SWBACK</a>;</div>
<div class="line"><a name="l00053"></a><span class="lineno"> 53</span>&#160; <a class="code" href="same54n19a_8h.html#af1a4b8f1d1a2265b93f22621f7903f88">OSC32KCTRL</a>-&gt;CFDCTRL.bit.CFDEN = <a class="code" href="conf__core_8h.html#a668d68edf9a7ac05be5b9cda247225ad">CONF_CORE_CLK_XOSC32K_CFDEN</a>;</div>
<div class="line"><a name="l00054"></a><span class="lineno"> 54</span>&#160; </div>
<div class="line"><a name="l00055"></a><span class="lineno"> 55</span>&#160;<span class="preprocessor">#if CONF_CORE_CLK_XOSC32K_ENABLE == 1 &amp;&amp; CONF_CORE_CLK_XOSC32K_ONDEMAND == 0</span></div>
<div class="line"><a name="l00056"></a><span class="lineno"> 56</span>&#160; <span class="keywordflow">while</span>(<a class="code" href="same54n19a_8h.html#af1a4b8f1d1a2265b93f22621f7903f88">OSC32KCTRL</a>-&gt;STATUS.bit.XOSC32KRDY == 0);</div>
<div class="line"><a name="l00057"></a><span class="lineno"> 57</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00058"></a><span class="lineno"> 58</span>&#160; </div>
<div class="line"><a name="l00059"></a><span class="lineno"> 59</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00060"></a><span class="lineno"> 60</span>&#160;}</div>
<div class="line"><a name="l00061"></a><span class="lineno"> 61</span>&#160;<span class="keywordtype">void</span> clock_osc_init(<span class="keywordtype">void</span>)</div>
<div class="line"><a name="l00062"></a><span class="lineno"> 62</span>&#160;{</div>
<div class="line"><a name="l00063"></a><span class="lineno"> 63</span>&#160;<span class="preprocessor">#if CONF_CORE_CLK_XOSC0_ENABLE == 1</span></div>
<div class="line"><a name="l00064"></a><span class="lineno"> 64</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00065"></a><span class="lineno"> 65</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[0].bit.XTALEN = <a class="code" href="conf__core_8h.html#ac2ca0e9037347eb69d53a0011f989910">CONF_CORE_CLK_XOSC0_XTALEN</a>;</div>
<div class="line"><a name="l00066"></a><span class="lineno"> 66</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[0].bit.RUNSTDBY = <a class="code" href="conf__core_8h.html#afac0686157854cc021424410ded071f1">CONF_CORE_CLK_XOSC0_RUNSTDBY</a>;</div>
<div class="line"><a name="l00067"></a><span class="lineno"> 67</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[0].bit.ONDEMAND = <a class="code" href="conf__core_8h.html#a5ffaa1551b7ffb8a342b2cc5fbc5950c">CONF_CORE_CLK_XOSC0_ONDEMAND</a>;</div>
<div class="line"><a name="l00068"></a><span class="lineno"> 68</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[0].bit.LOWBUFGAIN = <a class="code" href="conf__core_8h.html#aeea7b0d3663bb6d5ccc3218017f9a05b">CONF_CORE_CLK_XOSC0_LOWBUFGAIN</a>;</div>
<div class="line"><a name="l00069"></a><span class="lineno"> 69</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[0].bit.IPTAT = CONF_CORE_CLK_XOSC0_IPTAT;</div>
<div class="line"><a name="l00070"></a><span class="lineno"> 70</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[0].bit.IMULT = CONF_CORE_CLK_XOSC0_IMULT;</div>
<div class="line"><a name="l00071"></a><span class="lineno"> 71</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[0].bit.ENALC = <a class="code" href="conf__core_8h.html#a2683d3721ab44a85e60cfff0d0cbf96e">CONF_CORE_CLK_XOSC0_ENALC</a>;</div>
<div class="line"><a name="l00072"></a><span class="lineno"> 72</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[0].bit.CFDEN = <a class="code" href="conf__core_8h.html#a17cd20bb954bc137251cf7fb63889151">CONF_CORE_CLK_XOSC0_CFDEN</a>;</div>
<div class="line"><a name="l00073"></a><span class="lineno"> 73</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[0].bit.CFDPRESC = CONF_CORE_CLK_XOSC0_CFDPRESC;</div>
<div class="line"><a name="l00074"></a><span class="lineno"> 74</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[0].bit.SWBEN = <a class="code" href="conf__core_8h.html#abe235b3b13f253acb855d15c8f33c95a">CONF_CORE_CLK_XOSC0_SWBEN</a>;</div>
<div class="line"><a name="l00075"></a><span class="lineno"> 75</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[0].bit.STARTUP = <a class="code" href="conf__core_8h.html#affc8201cf2340d2236ba9ca44a1e657c">CONF_CORE_CLK_XOSC0_STARTUP_TIME</a>;</div>
<div class="line"><a name="l00076"></a><span class="lineno"> 76</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[0].bit.ENABLE = <a class="code" href="conf__core_8h.html#a61559adc856ce1dcfa046e749af63bc3">CONF_CORE_CLK_XOSC0_ENABLE</a>;</div>
<div class="line"><a name="l00077"></a><span class="lineno"> 77</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00078"></a><span class="lineno"> 78</span>&#160; <span class="keywordflow">while</span>(0 == <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;STATUS.bit.XOSCRDY0);</div>
<div class="line"><a name="l00079"></a><span class="lineno"> 79</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00080"></a><span class="lineno"> 80</span>&#160; </div>
<div class="line"><a name="l00081"></a><span class="lineno"> 81</span>&#160;<span class="preprocessor">#if CONF_CORE_CLK_XOSC1_ENABLE == 1</span></div>
<div class="line"><a name="l00082"></a><span class="lineno"> 82</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00083"></a><span class="lineno"> 83</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[1].bit.XTALEN = <a class="code" href="conf__core_8h.html#ae3f8741e2be4b37a46dfb49af2c2a09d">CONF_CORE_CLK_XOSC1_XTALEN</a>;</div>
<div class="line"><a name="l00084"></a><span class="lineno"> 84</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[1].bit.RUNSTDBY = <a class="code" href="conf__core_8h.html#a8bec34fdc01ac38ec0c2d13112f28aa0">CONF_CORE_CLK_XOSC1_RUNSTDBY</a>;</div>
<div class="line"><a name="l00085"></a><span class="lineno"> 85</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[1].bit.LOWBUFGAIN = <a class="code" href="conf__core_8h.html#a985ebd23986d9411d3602040e33bb405">CONF_CORE_CLK_XOSC1_LOWBUFGAIN</a>;</div>
<div class="line"><a name="l00086"></a><span class="lineno"> 86</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[1].bit.IPTAT = CONF_CORE_CLK_XOSC1_IPTAT;</div>
<div class="line"><a name="l00087"></a><span class="lineno"> 87</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[1].bit.IMULT = CONF_CORE_CLK_XOSC1_IMULT;</div>
<div class="line"><a name="l00088"></a><span class="lineno"> 88</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[1].bit.CFDEN = <a class="code" href="conf__core_8h.html#a924214b0f469bde71ff28fe5544466db">CONF_CORE_CLK_XOSC1_CFDEN</a>;</div>
<div class="line"><a name="l00089"></a><span class="lineno"> 89</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[1].bit.CFDPRESC = CONF_CORE_CLK_XOSC1_CFDPRESC;</div>
<div class="line"><a name="l00090"></a><span class="lineno"> 90</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[1].bit.SWBEN = <a class="code" href="conf__core_8h.html#a590b1e68a3f666bdea576a32f4e74ba0">CONF_CORE_CLK_XOSC1_SWBEN</a>;</div>
<div class="line"><a name="l00091"></a><span class="lineno"> 91</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[1].bit.STARTUP = <a class="code" href="conf__core_8h.html#ae8d2fdac3b52964174863149986db625">CONF_CORE_CLK_XOSC1_STARTUP_TIME</a>;</div>
<div class="line"><a name="l00092"></a><span class="lineno"> 92</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[1].bit.ENABLE = <a class="code" href="conf__core_8h.html#aa54465cc56631333a22ae84ab66d5f3a">CONF_CORE_CLK_XOSC1_ENABLE</a>;</div>
<div class="line"><a name="l00093"></a><span class="lineno"> 93</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00094"></a><span class="lineno"> 94</span>&#160; <span class="keywordflow">while</span>(0 == <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;STATUS.bit.XOSCRDY1);</div>
<div class="line"><a name="l00095"></a><span class="lineno"> 95</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00096"></a><span class="lineno"> 96</span>&#160; </div>
<div class="line"><a name="l00097"></a><span class="lineno"> 97</span>&#160;<span class="preprocessor">#if CONF_CORE_CLK_XOSC0_ENABLE == 1</span></div>
<div class="line"><a name="l00098"></a><span class="lineno"> 98</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00099"></a><span class="lineno"> 99</span>&#160;<span class="preprocessor">#if CONF_CORE_CLK_XOSC0_ENALC == 1</span></div>
<div class="line"><a name="l00100"></a><span class="lineno"> 100</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[0].bit.ENALC = <a class="code" href="conf__core_8h.html#a2683d3721ab44a85e60cfff0d0cbf96e">CONF_CORE_CLK_XOSC0_ENALC</a>;</div>
<div class="line"><a name="l00101"></a><span class="lineno"> 101</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00102"></a><span class="lineno"> 102</span>&#160; </div>
<div class="line"><a name="l00103"></a><span class="lineno"> 103</span>&#160;<span class="preprocessor">#if CONF_CORE_CLK_XOSC0_ONDEMAND == 1</span></div>
<div class="line"><a name="l00104"></a><span class="lineno"> 104</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[0].bit.ONDEMAND = <a class="code" href="conf__core_8h.html#a5ffaa1551b7ffb8a342b2cc5fbc5950c">CONF_CORE_CLK_XOSC0_ONDEMAND</a>;</div>
<div class="line"><a name="l00105"></a><span class="lineno"> 105</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00106"></a><span class="lineno"> 106</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00107"></a><span class="lineno"> 107</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00108"></a><span class="lineno"> 108</span>&#160; </div>
<div class="line"><a name="l00109"></a><span class="lineno"> 109</span>&#160;<span class="preprocessor">#if CONF_CORE_CLK_XOSC1_ENABLE == 1</span></div>
<div class="line"><a name="l00110"></a><span class="lineno"> 110</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00111"></a><span class="lineno"> 111</span>&#160;<span class="preprocessor">#if CONF_CORE_CLK_XOSC1_ENALC == 1</span></div>
<div class="line"><a name="l00112"></a><span class="lineno"> 112</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[1].bit.ENALC = <a class="code" href="conf__core_8h.html#a3a42de5c6251540e7b8c000974acfc62">CONF_CORE_CLK_XOSC1_ENALC</a>;</div>
<div class="line"><a name="l00113"></a><span class="lineno"> 113</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00114"></a><span class="lineno"> 114</span>&#160; </div>
<div class="line"><a name="l00115"></a><span class="lineno"> 115</span>&#160;<span class="preprocessor">#if CONF_CORE_CLK_XOSC1_ONDEMAND == 1</span></div>
<div class="line"><a name="l00116"></a><span class="lineno"> 116</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;XOSCCTRL[1].bit.ONDEMAND = <a class="code" href="conf__core_8h.html#aaf561ace0fee1e373536a251ce8a9726">CONF_CORE_CLK_XOSC1_ONDEMAND</a>;</div>
<div class="line"><a name="l00117"></a><span class="lineno"> 117</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00118"></a><span class="lineno"> 118</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00119"></a><span class="lineno"> 119</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00120"></a><span class="lineno"> 120</span>&#160;}</div>
<div class="line"><a name="l00121"></a><span class="lineno"> 121</span>&#160; </div>
<div class="line"><a name="l00122"></a><span class="lineno"> 122</span>&#160;<span class="keywordtype">void</span> clock_mclk_init(<span class="keywordtype">void</span>)</div>
<div class="line"><a name="l00123"></a><span class="lineno"> 123</span>&#160;{</div>
<div class="line"><a name="l00124"></a><span class="lineno"> 124</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00125"></a><span class="lineno"> 125</span>&#160; <a class="code" href="same54n19a_8h.html#a625e6fdb4c2120fc163e1b04178af3dd">MCLK</a>-&gt;CPUDIV.reg = <a class="code" href="conf__core_8h.html#aa9643e96439d0d47e0684a4b11c1f529">CONF_CORE_MCLK_CPUDIV</a>;</div>
<div class="line"><a name="l00126"></a><span class="lineno"> 126</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00127"></a><span class="lineno"> 127</span>&#160;}</div>
<div class="line"><a name="l00128"></a><span class="lineno"> 128</span>&#160; </div>
<div class="line"><a name="l00129"></a><span class="lineno"> 129</span>&#160;<span class="keywordtype">void</span> clock_gclk_init(<span class="keywordtype">void</span>)</div>
<div class="line"><a name="l00130"></a><span class="lineno"> 130</span>&#160;{</div>
<div class="line"><a name="l00131"></a><span class="lineno"> 131</span>&#160;<span class="preprocessor">#if CONF_CORE_GCLK_0_ENABLE == 1</span></div>
<div class="line"><a name="l00132"></a><span class="lineno"> 132</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00133"></a><span class="lineno"> 133</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[0].bit.DIV = CONF_CORE_GCLK_0_DIV_VAL;</div>
<div class="line"><a name="l00134"></a><span class="lineno"> 134</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[0].bit.DIVSEL = CONF_CORE_GCLK_0_DIVSEL;</div>
<div class="line"><a name="l00135"></a><span class="lineno"> 135</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[0].bit.RUNSTDBY = CONF_CORE_GCLK_0_RUN_IN_STANDBY;</div>
<div class="line"><a name="l00136"></a><span class="lineno"> 136</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[0].bit.OE = CONF_CORE_GCLK_0_OUTPUT_ENABLE;</div>
<div class="line"><a name="l00137"></a><span class="lineno"> 137</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[0].bit.OOV = CONF_CORE_GCLK_0_DIVSEL;</div>
<div class="line"><a name="l00138"></a><span class="lineno"> 138</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[0].bit.IDC = CONF_CORE_GCLK_0_IDC;</div>
<div class="line"><a name="l00139"></a><span class="lineno"> 139</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[0].bit.GENEN = CONF_CORE_GCLK_0_ENABLE;</div>
<div class="line"><a name="l00140"></a><span class="lineno"> 140</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[0].bit.SRC = CONF_CORE_GCLK_0_CLOCK_SOURCE;</div>
<div class="line"><a name="l00141"></a><span class="lineno"> 141</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00142"></a><span class="lineno"> 142</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00143"></a><span class="lineno"> 143</span>&#160;<span class="preprocessor">#if CONF_CORE_GCLK_1_ENABLE == 1</span></div>
<div class="line"><a name="l00144"></a><span class="lineno"> 144</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00145"></a><span class="lineno"> 145</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[1].bit.DIV = CONF_CORE_GCLK_1_DIV_VAL;</div>
<div class="line"><a name="l00146"></a><span class="lineno"> 146</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[1].bit.DIVSEL = CONF_CORE_GCLK_1_DIVSEL;</div>
<div class="line"><a name="l00147"></a><span class="lineno"> 147</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[1].bit.RUNSTDBY = CONF_CORE_GCLK_1_RUN_IN_STANDBY;</div>
<div class="line"><a name="l00148"></a><span class="lineno"> 148</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[1].bit.OE = CONF_CORE_GCLK_1_OUTPUT_ENABLE;</div>
<div class="line"><a name="l00149"></a><span class="lineno"> 149</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[1].bit.OOV = CONF_CORE_GCLK_1_DIVSEL;</div>
<div class="line"><a name="l00150"></a><span class="lineno"> 150</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[1].bit.IDC = CONF_CORE_GCLK_1_IDC;</div>
<div class="line"><a name="l00151"></a><span class="lineno"> 151</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[1].bit.GENEN = CONF_CORE_GCLK_1_ENABLE;</div>
<div class="line"><a name="l00152"></a><span class="lineno"> 152</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[1].bit.SRC = CONF_CORE_GCLK_1_CLOCK_SOURCE;</div>
<div class="line"><a name="l00153"></a><span class="lineno"> 153</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00154"></a><span class="lineno"> 154</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00155"></a><span class="lineno"> 155</span>&#160;<span class="preprocessor">#if CONF_CORE_GCLK_2_ENABLE == 1</span></div>
<div class="line"><a name="l00156"></a><span class="lineno"> 156</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00157"></a><span class="lineno"> 157</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[2].bit.DIV = CONF_CORE_GCLK_2_DIV_VAL;</div>
<div class="line"><a name="l00158"></a><span class="lineno"> 158</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[2].bit.DIVSEL = CONF_CORE_GCLK_2_DIVSEL;</div>
<div class="line"><a name="l00159"></a><span class="lineno"> 159</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[2].bit.RUNSTDBY = CONF_CORE_GCLK_2_RUN_IN_STANDBY;</div>
<div class="line"><a name="l00160"></a><span class="lineno"> 160</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[2].bit.OE = CONF_CORE_GCLK_2_OUTPUT_ENABLE;</div>
<div class="line"><a name="l00161"></a><span class="lineno"> 161</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[2].bit.OOV = CONF_CORE_GCLK_2_DIVSEL;</div>
<div class="line"><a name="l00162"></a><span class="lineno"> 162</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[2].bit.IDC = CONF_CORE_GCLK_2_IDC;</div>
<div class="line"><a name="l00163"></a><span class="lineno"> 163</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[2].bit.GENEN = CONF_CORE_GCLK_2_ENABLE;</div>
<div class="line"><a name="l00164"></a><span class="lineno"> 164</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[2].bit.SRC = CONF_CORE_GCLK_2_CLOCK_SOURCE;</div>
<div class="line"><a name="l00165"></a><span class="lineno"> 165</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00166"></a><span class="lineno"> 166</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00167"></a><span class="lineno"> 167</span>&#160;<span class="preprocessor">#if CONF_CORE_GCLK_3_ENABLE == 1</span></div>
<div class="line"><a name="l00168"></a><span class="lineno"> 168</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00169"></a><span class="lineno"> 169</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[3].bit.DIV = CONF_CORE_GCLK_3_DIV_VAL;</div>
<div class="line"><a name="l00170"></a><span class="lineno"> 170</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[3].bit.DIVSEL = CONF_CORE_GCLK_3_DIVSEL;</div>
<div class="line"><a name="l00171"></a><span class="lineno"> 171</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[3].bit.RUNSTDBY = CONF_CORE_GCLK_3_RUN_IN_STANDBY;</div>
<div class="line"><a name="l00172"></a><span class="lineno"> 172</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[3].bit.OE = CONF_CORE_GCLK_3_OUTPUT_ENABLE;</div>
<div class="line"><a name="l00173"></a><span class="lineno"> 173</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[3].bit.OOV = CONF_CORE_GCLK_3_DIVSEL;</div>
<div class="line"><a name="l00174"></a><span class="lineno"> 174</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[3].bit.IDC = CONF_CORE_GCLK_3_IDC;</div>
<div class="line"><a name="l00175"></a><span class="lineno"> 175</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[3].bit.GENEN = CONF_CORE_GCLK_3_ENABLE;</div>
<div class="line"><a name="l00176"></a><span class="lineno"> 176</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[3].bit.SRC = CONF_CORE_GCLK_3_CLOCK_SOURCE;</div>
<div class="line"><a name="l00177"></a><span class="lineno"> 177</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00178"></a><span class="lineno"> 178</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00179"></a><span class="lineno"> 179</span>&#160;<span class="preprocessor">#if CONF_CORE_GCLK_4_ENABLE == 1</span></div>
<div class="line"><a name="l00180"></a><span class="lineno"> 180</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00181"></a><span class="lineno"> 181</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[4].bit.DIV = CONF_CORE_GCLK_4_DIV_VAL;</div>
<div class="line"><a name="l00182"></a><span class="lineno"> 182</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[4].bit.DIVSEL = CONF_CORE_GCLK_4_DIVSEL;</div>
<div class="line"><a name="l00183"></a><span class="lineno"> 183</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[4].bit.RUNSTDBY = CONF_CORE_GCLK_4_RUN_IN_STANDBY;</div>
<div class="line"><a name="l00184"></a><span class="lineno"> 184</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[4].bit.OE = CONF_CORE_GCLK_4_OUTPUT_ENABLE;</div>
<div class="line"><a name="l00185"></a><span class="lineno"> 185</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[4].bit.OOV = CONF_CORE_GCLK_4_DIVSEL;</div>
<div class="line"><a name="l00186"></a><span class="lineno"> 186</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[4].bit.IDC = CONF_CORE_GCLK_4_IDC;</div>
<div class="line"><a name="l00187"></a><span class="lineno"> 187</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[4].bit.GENEN = CONF_CORE_GCLK_4_ENABLE;</div>
<div class="line"><a name="l00188"></a><span class="lineno"> 188</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[4].bit.SRC = CONF_CORE_GCLK_4_CLOCK_SOURCE;</div>
<div class="line"><a name="l00189"></a><span class="lineno"> 189</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00190"></a><span class="lineno"> 190</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00191"></a><span class="lineno"> 191</span>&#160;<span class="preprocessor">#if CONF_CORE_GCLK_5_ENABLE == 1</span></div>
<div class="line"><a name="l00192"></a><span class="lineno"> 192</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00193"></a><span class="lineno"> 193</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[5].bit.DIV = CONF_CORE_GCLK_5_DIV_VAL;</div>
<div class="line"><a name="l00194"></a><span class="lineno"> 194</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[5].bit.DIVSEL = CONF_CORE_GCLK_5_DIVSEL;</div>
<div class="line"><a name="l00195"></a><span class="lineno"> 195</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[5].bit.RUNSTDBY = CONF_CORE_GCLK_5_RUN_IN_STANDBY;</div>
<div class="line"><a name="l00196"></a><span class="lineno"> 196</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[5].bit.OE = CONF_CORE_GCLK_5_OUTPUT_ENABLE;</div>
<div class="line"><a name="l00197"></a><span class="lineno"> 197</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[5].bit.OOV = CONF_CORE_GCLK_5_DIVSEL;</div>
<div class="line"><a name="l00198"></a><span class="lineno"> 198</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[5].bit.IDC = CONF_CORE_GCLK_5_IDC;</div>
<div class="line"><a name="l00199"></a><span class="lineno"> 199</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[5].bit.GENEN = CONF_CORE_GCLK_5_ENABLE;</div>
<div class="line"><a name="l00200"></a><span class="lineno"> 200</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[5].bit.SRC = CONF_CORE_GCLK_5_CLOCK_SOURCE;</div>
<div class="line"><a name="l00201"></a><span class="lineno"> 201</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00202"></a><span class="lineno"> 202</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00203"></a><span class="lineno"> 203</span>&#160;<span class="preprocessor">#if CONF_CORE_GCLK_6_ENABLE == 1</span></div>
<div class="line"><a name="l00204"></a><span class="lineno"> 204</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00205"></a><span class="lineno"> 205</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[6].bit.DIV = CONF_CORE_GCLK_6_DIV_VAL;</div>
<div class="line"><a name="l00206"></a><span class="lineno"> 206</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[6].bit.DIVSEL = CONF_CORE_GCLK_6_DIVSEL;</div>
<div class="line"><a name="l00207"></a><span class="lineno"> 207</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[6].bit.RUNSTDBY = CONF_CORE_GCLK_6_RUN_IN_STANDBY;</div>
<div class="line"><a name="l00208"></a><span class="lineno"> 208</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[6].bit.OE = CONF_CORE_GCLK_6_OUTPUT_ENABLE;</div>
<div class="line"><a name="l00209"></a><span class="lineno"> 209</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[6].bit.OOV = CONF_CORE_GCLK_6_DIVSEL;</div>
<div class="line"><a name="l00210"></a><span class="lineno"> 210</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[6].bit.IDC = CONF_CORE_GCLK_6_IDC;</div>
<div class="line"><a name="l00211"></a><span class="lineno"> 211</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[6].bit.GENEN = CONF_CORE_GCLK_6_ENABLE;</div>
<div class="line"><a name="l00212"></a><span class="lineno"> 212</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[6].bit.SRC = CONF_CORE_GCLK_6_CLOCK_SOURCE;</div>
<div class="line"><a name="l00213"></a><span class="lineno"> 213</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00214"></a><span class="lineno"> 214</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00215"></a><span class="lineno"> 215</span>&#160;<span class="preprocessor">#if CONF_CORE_GCLK_7_ENABLE == 1</span></div>
<div class="line"><a name="l00216"></a><span class="lineno"> 216</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00217"></a><span class="lineno"> 217</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[7].bit.DIV = CONF_CORE_GCLK_7_DIV_VAL;</div>
<div class="line"><a name="l00218"></a><span class="lineno"> 218</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[7].bit.DIVSEL = CONF_CORE_GCLK_7_DIVSEL;</div>
<div class="line"><a name="l00219"></a><span class="lineno"> 219</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[7].bit.RUNSTDBY = CONF_CORE_GCLK_7_RUN_IN_STANDBY;</div>
<div class="line"><a name="l00220"></a><span class="lineno"> 220</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[7].bit.OE = CONF_CORE_GCLK_7_OUTPUT_ENABLE;</div>
<div class="line"><a name="l00221"></a><span class="lineno"> 221</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[7].bit.OOV = CONF_CORE_GCLK_7_DIVSEL;</div>
<div class="line"><a name="l00222"></a><span class="lineno"> 222</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[7].bit.IDC = CONF_CORE_GCLK_7_IDC;</div>
<div class="line"><a name="l00223"></a><span class="lineno"> 223</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[7].bit.GENEN = CONF_CORE_GCLK_7_ENABLE;</div>
<div class="line"><a name="l00224"></a><span class="lineno"> 224</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[7].bit.SRC = CONF_CORE_GCLK_7_CLOCK_SOURCE;</div>
<div class="line"><a name="l00225"></a><span class="lineno"> 225</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00226"></a><span class="lineno"> 226</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00227"></a><span class="lineno"> 227</span>&#160;<span class="preprocessor">#if CONF_CORE_GCLK_8_ENABLE == 1</span></div>
<div class="line"><a name="l00228"></a><span class="lineno"> 228</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00229"></a><span class="lineno"> 229</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[8].bit.DIV = CONF_CORE_GCLK_8_DIV_VAL;</div>
<div class="line"><a name="l00230"></a><span class="lineno"> 230</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[8].bit.DIVSEL = CONF_CORE_GCLK_8_DIVSEL;</div>
<div class="line"><a name="l00231"></a><span class="lineno"> 231</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[8].bit.RUNSTDBY = CONF_CORE_GCLK_8_RUN_IN_STANDBY;</div>
<div class="line"><a name="l00232"></a><span class="lineno"> 232</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[8].bit.OE = CONF_CORE_GCLK_8_OUTPUT_ENABLE;</div>
<div class="line"><a name="l00233"></a><span class="lineno"> 233</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[8].bit.OOV = CONF_CORE_GCLK_8_DIVSEL;</div>
<div class="line"><a name="l00234"></a><span class="lineno"> 234</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[8].bit.IDC = CONF_CORE_GCLK_8_IDC;</div>
<div class="line"><a name="l00235"></a><span class="lineno"> 235</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[8].bit.GENEN = CONF_CORE_GCLK_8_ENABLE;</div>
<div class="line"><a name="l00236"></a><span class="lineno"> 236</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[8].bit.SRC = CONF_CORE_GCLK_8_CLOCK_SOURCE;</div>
<div class="line"><a name="l00237"></a><span class="lineno"> 237</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00238"></a><span class="lineno"> 238</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00239"></a><span class="lineno"> 239</span>&#160;<span class="preprocessor">#if CONF_CORE_GCLK_9_ENABLE == 1</span></div>
<div class="line"><a name="l00240"></a><span class="lineno"> 240</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00241"></a><span class="lineno"> 241</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[9].bit.DIV = CONF_CORE_GCLK_9_DIV_VAL;</div>
<div class="line"><a name="l00242"></a><span class="lineno"> 242</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[9].bit.DIVSEL = CONF_CORE_GCLK_9_DIVSEL;</div>
<div class="line"><a name="l00243"></a><span class="lineno"> 243</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[9].bit.RUNSTDBY = CONF_CORE_GCLK_9_RUN_IN_STANDBY;</div>
<div class="line"><a name="l00244"></a><span class="lineno"> 244</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[9].bit.OE = CONF_CORE_GCLK_9_OUTPUT_ENABLE;</div>
<div class="line"><a name="l00245"></a><span class="lineno"> 245</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[9].bit.OOV = CONF_CORE_GCLK_9_DIVSEL;</div>
<div class="line"><a name="l00246"></a><span class="lineno"> 246</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[9].bit.IDC = CONF_CORE_GCLK_9_IDC;</div>
<div class="line"><a name="l00247"></a><span class="lineno"> 247</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[9].bit.GENEN = CONF_CORE_GCLK_9_ENABLE;</div>
<div class="line"><a name="l00248"></a><span class="lineno"> 248</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[9].bit.SRC = CONF_CORE_GCLK_9_CLOCK_SOURCE;</div>
<div class="line"><a name="l00249"></a><span class="lineno"> 249</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00250"></a><span class="lineno"> 250</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00251"></a><span class="lineno"> 251</span>&#160;<span class="preprocessor">#if CONF_CORE_GCLK_10_ENABLE == 1</span></div>
<div class="line"><a name="l00252"></a><span class="lineno"> 252</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00253"></a><span class="lineno"> 253</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[10].bit.DIV = CONF_CORE_GCLK_10_DIV_VAL;</div>
<div class="line"><a name="l00254"></a><span class="lineno"> 254</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[10].bit.DIVSEL = CONF_CORE_GCLK_10_DIVSEL;</div>
<div class="line"><a name="l00255"></a><span class="lineno"> 255</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[10].bit.RUNSTDBY = CONF_CORE_GCLK_10_RUN_IN_STANDBY;</div>
<div class="line"><a name="l00256"></a><span class="lineno"> 256</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[10].bit.OE = CONF_CORE_GCLK_10_OUTPUT_ENABLE;</div>
<div class="line"><a name="l00257"></a><span class="lineno"> 257</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[10].bit.OOV = CONF_CORE_GCLK_10_DIVSEL;</div>
<div class="line"><a name="l00258"></a><span class="lineno"> 258</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[10].bit.IDC = CONF_CORE_GCLK_10_IDC;</div>
<div class="line"><a name="l00259"></a><span class="lineno"> 259</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[10].bit.GENEN = CONF_CORE_GCLK_10_ENABLE;</div>
<div class="line"><a name="l00260"></a><span class="lineno"> 260</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[10].bit.SRC = CONF_CORE_GCLK_10_CLOCK_SOURCE;</div>
<div class="line"><a name="l00261"></a><span class="lineno"> 261</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00262"></a><span class="lineno"> 262</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00263"></a><span class="lineno"> 263</span>&#160;<span class="preprocessor">#if CONF_CORE_GCLK_11_ENABLE == 1</span></div>
<div class="line"><a name="l00264"></a><span class="lineno"> 264</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00265"></a><span class="lineno"> 265</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[11].bit.DIV = CONF_CORE_GCLK_11_DIV_VAL;</div>
<div class="line"><a name="l00266"></a><span class="lineno"> 266</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[11].bit.DIVSEL = CONF_CORE_GCLK_11_DIVSEL;</div>
<div class="line"><a name="l00267"></a><span class="lineno"> 267</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[11].bit.RUNSTDBY = CONF_CORE_GCLK_11_RUN_IN_STANDBY;</div>
<div class="line"><a name="l00268"></a><span class="lineno"> 268</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[11].bit.OE = CONF_CORE_GCLK_11_OUTPUT_ENABLE;</div>
<div class="line"><a name="l00269"></a><span class="lineno"> 269</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[11].bit.OOV = CONF_CORE_GCLK_11_DIVSEL;</div>
<div class="line"><a name="l00270"></a><span class="lineno"> 270</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[11].bit.IDC = CONF_CORE_GCLK_11_IDC;</div>
<div class="line"><a name="l00271"></a><span class="lineno"> 271</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[11].bit.GENEN = CONF_CORE_GCLK_11_ENABLE;</div>
<div class="line"><a name="l00272"></a><span class="lineno"> 272</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[11].bit.SRC = CONF_CORE_GCLK_11_CLOCK_SOURCE;</div>
<div class="line"><a name="l00273"></a><span class="lineno"> 273</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00274"></a><span class="lineno"> 274</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00275"></a><span class="lineno"> 275</span>&#160;}</div>
<div class="line"><a name="l00276"></a><span class="lineno"> 276</span>&#160; </div>
<div class="line"><a name="l00277"></a><span class="lineno"> 277</span>&#160;<span class="keywordtype">void</span> clock_dpll_init(<span class="keywordtype">void</span>)</div>
<div class="line"><a name="l00278"></a><span class="lineno"> 278</span>&#160;{</div>
<div class="line"><a name="l00279"></a><span class="lineno"> 279</span>&#160;<span class="preprocessor">#if CONF_CORE_CLK_DPLL0_ENABLE == 1</span></div>
<div class="line"><a name="l00280"></a><span class="lineno"> 280</span>&#160;<span class="preprocessor">#if CONF_CORE_CLK_DPLL0_REFCLK == 0</span></div>
<div class="line"><a name="l00281"></a><span class="lineno"> 281</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00282"></a><span class="lineno"> 282</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;PCHCTRL[OSCCTRL_GCLK_ID_FDPLL0].bit.GEN =</div>
<div class="line"><a name="l00283"></a><span class="lineno"> 283</span>&#160; GCLK_PCHCTRL_GEN(CONF_CORE_CLK_DPLL0_GCLK_SRC);</div>
<div class="line"><a name="l00284"></a><span class="lineno"> 284</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;PCHCTRL[OSCCTRL_GCLK_ID_FDPLL0].bit.CHEN =</div>
<div class="line"><a name="l00285"></a><span class="lineno"> 285</span>&#160; CONF_CORE_CLK_DPLL0_ENABLE;</div>
<div class="line"><a name="l00286"></a><span class="lineno"> 286</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00287"></a><span class="lineno"> 287</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00288"></a><span class="lineno"> 288</span>&#160; </div>
<div class="line"><a name="l00289"></a><span class="lineno"> 289</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00290"></a><span class="lineno"> 290</span>&#160; <span class="comment">// write dpll ratio</span></div>
<div class="line"><a name="l00291"></a><span class="lineno"> 291</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[0].DPLLRATIO.bit.LDRFRAC = CONF_CORE_CLK_DPLL0_LDRFRAC_VAL;</div>
<div class="line"><a name="l00292"></a><span class="lineno"> 292</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[0].DPLLRATIO.bit.LDR = CONF_CORE_CLK_DPLL0_LDR_VAL;</div>
<div class="line"><a name="l00293"></a><span class="lineno"> 293</span>&#160; </div>
<div class="line"><a name="l00294"></a><span class="lineno"> 294</span>&#160; <span class="comment">// write dpll ctrlb</span></div>
<div class="line"><a name="l00295"></a><span class="lineno"> 295</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[0].DPLLCTRLB.bit.DIV = CONF_CORE_CLK_DPLL0_DIV_VAL;</div>
<div class="line"><a name="l00296"></a><span class="lineno"> 296</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[0].DPLLCTRLB.bit.DCOEN = CONF_CORE_CLK_DPLL0_DCOEN;</div>
<div class="line"><a name="l00297"></a><span class="lineno"> 297</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[0].DPLLCTRLB.bit.DCOFILTER = CONF_CORE_CLK_DPLL0_DCOFILTER;</div>
<div class="line"><a name="l00298"></a><span class="lineno"> 298</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[0].DPLLCTRLB.bit.LBYPASS = CONF_CORE_CLK_DPLL0_LBYPASS;</div>
<div class="line"><a name="l00299"></a><span class="lineno"> 299</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[0].DPLLCTRLB.bit.LTIME = CONF_CORE_CLK_DPLL0_LTIME;</div>
<div class="line"><a name="l00300"></a><span class="lineno"> 300</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[0].DPLLCTRLB.bit.REFCLK = CONF_CORE_CLK_DPLL0_REFCLK;</div>
<div class="line"><a name="l00301"></a><span class="lineno"> 301</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[0].DPLLCTRLB.bit.WUF = CONF_CORE_CLK_DPLL0_WUF;</div>
<div class="line"><a name="l00302"></a><span class="lineno"> 302</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[0].DPLLCTRLB.bit.FILTER = <a class="code" href="conf__core_8h.html#a5cd9abca6f486eaebb6ddd236960b01a">CONF_CORE_CLK_DPLL0_FILTER</a>;</div>
<div class="line"><a name="l00303"></a><span class="lineno"> 303</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00304"></a><span class="lineno"> 304</span>&#160; </div>
<div class="line"><a name="l00305"></a><span class="lineno"> 305</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00306"></a><span class="lineno"> 306</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[0].DPLLCTRLA.reg = 0;</div>
<div class="line"><a name="l00307"></a><span class="lineno"> 307</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[0].DPLLCTRLA.bit.RUNSTDBY = CONF_CORE_CLK_DPLL0_RUNSTDBY;</div>
<div class="line"><a name="l00308"></a><span class="lineno"> 308</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[0].DPLLCTRLA.bit.ENABLE = CONF_CORE_CLK_DPLL0_ENABLE;</div>
<div class="line"><a name="l00309"></a><span class="lineno"> 309</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00310"></a><span class="lineno"> 310</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00311"></a><span class="lineno"> 311</span>&#160; </div>
<div class="line"><a name="l00312"></a><span class="lineno"> 312</span>&#160;<span class="preprocessor">#if CONF_CORE_CLK_DPLL1_ENABLE == 1</span></div>
<div class="line"><a name="l00313"></a><span class="lineno"> 313</span>&#160;<span class="preprocessor">#if CONF_CORE_CLK_DPLL0_REFCLK == 0</span></div>
<div class="line"><a name="l00314"></a><span class="lineno"> 314</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00315"></a><span class="lineno"> 315</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;PCHCTRL[OSCCTRL_GCLK_ID_FDPLL1].bit.GEN =</div>
<div class="line"><a name="l00316"></a><span class="lineno"> 316</span>&#160; GCLK_PCHCTRL_GEN(CONF_CORE_CLK_DPLL1_GCLK_SRC);</div>
<div class="line"><a name="l00317"></a><span class="lineno"> 317</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;PCHCTRL[OSCCTRL_GCLK_ID_FDPLL1].bit.CHEN =</div>
<div class="line"><a name="l00318"></a><span class="lineno"> 318</span>&#160; CONF_CORE_CLK_DPLL1_ENABLE;</div>
<div class="line"><a name="l00319"></a><span class="lineno"> 319</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00320"></a><span class="lineno"> 320</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00321"></a><span class="lineno"> 321</span>&#160; </div>
<div class="line"><a name="l00322"></a><span class="lineno"> 322</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00323"></a><span class="lineno"> 323</span>&#160; <span class="comment">// write dpll ratio</span></div>
<div class="line"><a name="l00324"></a><span class="lineno"> 324</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[1].DPLLRATIO.bit.LDRFRAC = CONF_CORE_CLK_DPLL1_LDRFRAC_VAL;</div>
<div class="line"><a name="l00325"></a><span class="lineno"> 325</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[1].DPLLRATIO.bit.LDR = CONF_CORE_CLK_DPLL1_LDR_VAL;</div>
<div class="line"><a name="l00326"></a><span class="lineno"> 326</span>&#160; <span class="comment">// write dpll ctrlb</span></div>
<div class="line"><a name="l00327"></a><span class="lineno"> 327</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[1].DPLLCTRLB.bit.DIV = CONF_CORE_CLK_DPLL1_DIV_VAL;</div>
<div class="line"><a name="l00328"></a><span class="lineno"> 328</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[1].DPLLCTRLB.bit.DCOEN = CONF_CORE_CLK_DPLL1_DCOEN;</div>
<div class="line"><a name="l00329"></a><span class="lineno"> 329</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[1].DPLLCTRLB.bit.DCOFILTER = CONF_CORE_CLK_DPLL1_DCOFILTER;</div>
<div class="line"><a name="l00330"></a><span class="lineno"> 330</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[1].DPLLCTRLB.bit.LBYPASS = CONF_CORE_CLK_DPLL1_LBYPASS;</div>
<div class="line"><a name="l00331"></a><span class="lineno"> 331</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[1].DPLLCTRLB.bit.LTIME = CONF_CORE_CLK_DPLL1_LTIME;</div>
<div class="line"><a name="l00332"></a><span class="lineno"> 332</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[1].DPLLCTRLB.bit.REFCLK = CONF_CORE_CLK_DPLL1_REFCLK;</div>
<div class="line"><a name="l00333"></a><span class="lineno"> 333</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[1].DPLLCTRLB.bit.WUF = CONF_CORE_CLK_DPLL1_WUF;</div>
<div class="line"><a name="l00334"></a><span class="lineno"> 334</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[1].DPLLCTRLB.bit.FILTER = <a class="code" href="conf__core_8h.html#a9de3ab7eb7e3c001d6aa7040f6311f10">CONF_CORE_CLK_DPLL1_FILTER</a>;</div>
<div class="line"><a name="l00335"></a><span class="lineno"> 335</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00336"></a><span class="lineno"> 336</span>&#160; </div>
<div class="line"><a name="l00337"></a><span class="lineno"> 337</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00338"></a><span class="lineno"> 338</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[1].DPLLCTRLA.reg = 0;</div>
<div class="line"><a name="l00339"></a><span class="lineno"> 339</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[1].DPLLCTRLA.bit.RUNSTDBY = CONF_CORE_CLK_DPLL1_RUNSTDBY;</div>
<div class="line"><a name="l00340"></a><span class="lineno"> 340</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[1].DPLLCTRLA.bit.ENABLE = CONF_CORE_CLK_DPLL1_ENABLE;</div>
<div class="line"><a name="l00341"></a><span class="lineno"> 341</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00342"></a><span class="lineno"> 342</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00343"></a><span class="lineno"> 343</span>&#160; </div>
<div class="line"><a name="l00344"></a><span class="lineno"> 344</span>&#160;<span class="preprocessor">#if CONF_CORE_CLK_DPLL0_ENABLE == 1</span></div>
<div class="line"><a name="l00345"></a><span class="lineno"> 345</span>&#160; <span class="keywordflow">while</span>(!(<a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[0].DPLLSTATUS.bit.LOCK || <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[0].DPLLSTATUS.bit.CLKRDY));</div>
<div class="line"><a name="l00346"></a><span class="lineno"> 346</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00347"></a><span class="lineno"> 347</span>&#160;<span class="preprocessor">#if CONF_CORE_CLK_DPLL0_ONDEMAND == 1</span></div>
<div class="line"><a name="l00348"></a><span class="lineno"> 348</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[0].DPLLCTRLA.bit.ONDEMAND = CONF_CORE_CLK_DPLL0_ONDEMAND;</div>
<div class="line"><a name="l00349"></a><span class="lineno"> 349</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00350"></a><span class="lineno"> 350</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00351"></a><span class="lineno"> 351</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00352"></a><span class="lineno"> 352</span>&#160; </div>
<div class="line"><a name="l00353"></a><span class="lineno"> 353</span>&#160;<span class="preprocessor">#if CONF_CORE_CLK_DPLL1_ENABLE == 1</span></div>
<div class="line"><a name="l00354"></a><span class="lineno"> 354</span>&#160; <span class="keywordflow">while</span>(!(<a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[1].DPLLSTATUS.bit.LOCK || <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[1].DPLLSTATUS.bit.CLKRDY));</div>
<div class="line"><a name="l00355"></a><span class="lineno"> 355</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00356"></a><span class="lineno"> 356</span>&#160;<span class="preprocessor">#if CONF_CORE_CLK_DPLL1_ONDEMAND == 1</span></div>
<div class="line"><a name="l00357"></a><span class="lineno"> 357</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;Dpll[1].DPLLCTRLA.bit.ONDEMAND = CONF_CORE_CLK_DPLL1_ONDEMAND;</div>
<div class="line"><a name="l00358"></a><span class="lineno"> 358</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00359"></a><span class="lineno"> 359</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00360"></a><span class="lineno"> 360</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00361"></a><span class="lineno"> 361</span>&#160;}</div>
<div class="line"><a name="l00362"></a><span class="lineno"> 362</span>&#160; </div>
<div class="line"><a name="l00363"></a><span class="lineno"> 363</span>&#160;<span class="keywordtype">void</span> clock_dfll_init(<span class="keywordtype">void</span>)</div>
<div class="line"><a name="l00364"></a><span class="lineno"> 364</span>&#160;{</div>
<div class="line"><a name="l00365"></a><span class="lineno"> 365</span>&#160;<span class="preprocessor">#if CONF_CORE_CLK_DFLL_ENABLE</span></div>
<div class="line"><a name="l00366"></a><span class="lineno"> 366</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00367"></a><span class="lineno"> 367</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[0].bit.SRC = GCLK_GENCTRL_SRC_OSCULP32K;</div>
<div class="line"><a name="l00368"></a><span class="lineno"> 368</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00369"></a><span class="lineno"> 369</span>&#160; <span class="keywordflow">while</span>(<a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;SYNCBUSY.bit.GENCTRL0);</div>
<div class="line"><a name="l00370"></a><span class="lineno"> 370</span>&#160; </div>
<div class="line"><a name="l00371"></a><span class="lineno"> 371</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00372"></a><span class="lineno"> 372</span>&#160; <span class="comment">// reset stuff</span></div>
<div class="line"><a name="l00373"></a><span class="lineno"> 373</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLCTRLA.reg = 0;</div>
<div class="line"><a name="l00374"></a><span class="lineno"> 374</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00375"></a><span class="lineno"> 375</span>&#160;<span class="preprocessor">#if CONF_CORE_CLK_DFLL_USBCRM != 1 &amp;&amp; CONF_CORE_CLK_DFLL_MODE != 0</span></div>
<div class="line"><a name="l00376"></a><span class="lineno"> 376</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00377"></a><span class="lineno"> 377</span>&#160; <span class="comment">// reset stuff</span></div>
<div class="line"><a name="l00378"></a><span class="lineno"> 378</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;PCHCTRL[OSCCTRL_GCLK_ID_DFLL48].bit.GEN =</div>
<div class="line"><a name="l00379"></a><span class="lineno"> 379</span>&#160; GCLK_PCHCTRL_GEN(<a class="code" href="conf__core_8h.html#a0d8e56832f3d1f24b98173e3a3aa0046">CONF_CORE_CLK_DFLL_GCLK_SRC</a>);</div>
<div class="line"><a name="l00380"></a><span class="lineno"> 380</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;PCHCTRL[OSCCTRL_GCLK_ID_DFLL48].bit.EN = <a class="code" href="conf__core_8h.html#a03160c4c7871685bbde0e96f02825842">CONF_CORE_CLK_DFLL_ENABLE</a>;</div>
<div class="line"><a name="l00381"></a><span class="lineno"> 381</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00382"></a><span class="lineno"> 382</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00383"></a><span class="lineno"> 383</span>&#160; </div>
<div class="line"><a name="l00384"></a><span class="lineno"> 384</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00385"></a><span class="lineno"> 385</span>&#160; <span class="comment">// configure clock multiplier stuff</span></div>
<div class="line"><a name="l00386"></a><span class="lineno"> 386</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLMUL.bit.MUL = CONF_CORE_CLK_DFLL_MUL_VAL;</div>
<div class="line"><a name="l00387"></a><span class="lineno"> 387</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLMUL.bit.CSTEP = CONF_CORE_CLK_DFLL_CSTEP_VAL;</div>
<div class="line"><a name="l00388"></a><span class="lineno"> 388</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLMUL.bit.FSTEP = CONF_CORE_CLK_DFLL_FSTEP_VAL;</div>
<div class="line"><a name="l00389"></a><span class="lineno"> 389</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00390"></a><span class="lineno"> 390</span>&#160; <span class="keywordflow">while</span>(<a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLSYNC.bit.DFLLMUL);</div>
<div class="line"><a name="l00391"></a><span class="lineno"> 391</span>&#160; </div>
<div class="line"><a name="l00392"></a><span class="lineno"> 392</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00393"></a><span class="lineno"> 393</span>&#160; <span class="comment">// reset dfll ctrlb</span></div>
<div class="line"><a name="l00394"></a><span class="lineno"> 394</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLCTRLB.reg = 0;</div>
<div class="line"><a name="l00395"></a><span class="lineno"> 395</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00396"></a><span class="lineno"> 396</span>&#160; <span class="comment">// wait for ctrlb sync</span></div>
<div class="line"><a name="l00397"></a><span class="lineno"> 397</span>&#160; <span class="keywordflow">while</span>(<a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLSYNC.bit.DFLLCTRLB);</div>
<div class="line"><a name="l00398"></a><span class="lineno"> 398</span>&#160; </div>
<div class="line"><a name="l00399"></a><span class="lineno"> 399</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00400"></a><span class="lineno"> 400</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLCTRLA.bit.RUNSTDBY = <a class="code" href="conf__core_8h.html#ab6b320dcf67ec88f534adcbf77e2ce7b">CONF_CORE_CLK_DFLL_RUNSTDBY</a>;</div>
<div class="line"><a name="l00401"></a><span class="lineno"> 401</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLCTRLA.bit.ENABLE = <a class="code" href="conf__core_8h.html#a03160c4c7871685bbde0e96f02825842">CONF_CORE_CLK_DFLL_ENABLE</a>;</div>
<div class="line"><a name="l00402"></a><span class="lineno"> 402</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00403"></a><span class="lineno"> 403</span>&#160; <span class="keywordflow">while</span>(<a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLSYNC.bit.ENABLE);</div>
<div class="line"><a name="l00404"></a><span class="lineno"> 404</span>&#160;<span class="preprocessor">#if CONF_CORE_CLK_DFLL_OVERWRITE_CAL == 1</span></div>
<div class="line"><a name="l00405"></a><span class="lineno"> 405</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00406"></a><span class="lineno"> 406</span>&#160; <span class="comment">// set calib for dfll48m</span></div>
<div class="line"><a name="l00407"></a><span class="lineno"> 407</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLVAL.bit.COARSE = CONF_CORE_CLK_DFLL_COARSE_VAL;</div>
<div class="line"><a name="l00408"></a><span class="lineno"> 408</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLVAL.bit.FINE = CONF_CORE_CLK_DFLL_FINE_VAL;</div>
<div class="line"><a name="l00409"></a><span class="lineno"> 409</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLVAL.bit.DIFF = CONF_CORE_CLK_DFLL_DIFF_VAL;</div>
<div class="line"><a name="l00410"></a><span class="lineno"> 410</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00411"></a><span class="lineno"> 411</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00412"></a><span class="lineno"> 412</span>&#160; </div>
<div class="line"><a name="l00413"></a><span class="lineno"> 413</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00414"></a><span class="lineno"> 414</span>&#160; <span class="comment">// write dfll val</span></div>
<div class="line"><a name="l00415"></a><span class="lineno"> 415</span>&#160; <span class="comment">// rewriting this for some reason?</span></div>
<div class="line"><a name="l00416"></a><span class="lineno"> 416</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLVAL.reg = <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLVAL.reg;</div>
<div class="line"><a name="l00417"></a><span class="lineno"> 417</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00418"></a><span class="lineno"> 418</span>&#160; <span class="comment">// let dfll val sync</span></div>
<div class="line"><a name="l00419"></a><span class="lineno"> 419</span>&#160; <span class="keywordflow">while</span>(<a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLSYNC.bit.DFLLVAL);</div>
<div class="line"><a name="l00420"></a><span class="lineno"> 420</span>&#160; </div>
<div class="line"><a name="l00421"></a><span class="lineno"> 421</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00422"></a><span class="lineno"> 422</span>&#160; <span class="comment">// write dfll ctrlb</span></div>
<div class="line"><a name="l00423"></a><span class="lineno"> 423</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLCTRLB.bit.WAITLOCK = <a class="code" href="conf__core_8h.html#a1f088d6654bb907ff388ced455b2dbb2">CONF_CORE_CLK_DFLL_WAITLOCK</a>;</div>
<div class="line"><a name="l00424"></a><span class="lineno"> 424</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLCTRLB.bit.BPLCKC = CONF_CORE_CLK_DFLL_BPLKC;</div>
<div class="line"><a name="l00425"></a><span class="lineno"> 425</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLCTRLB.bit.QLDIS = CONF_CORE_CLK_DFLL_QLDIS;</div>
<div class="line"><a name="l00426"></a><span class="lineno"> 426</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLCTRLB.bit.CCDIS = CONF_CORE_CLK_DFLL_CCDIS;</div>
<div class="line"><a name="l00427"></a><span class="lineno"> 427</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLCTRLB.bit.USBCRM = CONF_CORE_CLK_DFLL_USBCRM;</div>
<div class="line"><a name="l00428"></a><span class="lineno"> 428</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLCTRLB.bit.LLAW = CONF_CORE_CLK_DFLL_LLAW;</div>
<div class="line"><a name="l00429"></a><span class="lineno"> 429</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLCTRLB.bit.STABLE = CONF_CORE_CLK_DFLL_STABLE_FCALIB;</div>
<div class="line"><a name="l00430"></a><span class="lineno"> 430</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLCTRLB.bit.MODE = CONF_CORE_CLK_DFLL_MODE;</div>
<div class="line"><a name="l00431"></a><span class="lineno"> 431</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00432"></a><span class="lineno"> 432</span>&#160; <span class="keywordflow">while</span>(<a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLSYNC.bit.DFLLCTRLB);</div>
<div class="line"><a name="l00433"></a><span class="lineno"> 433</span>&#160; </div>
<div class="line"><a name="l00434"></a><span class="lineno"> 434</span>&#160; <span class="keywordflow">if</span> (<a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLCTRLB.bit.MODE)</div>
<div class="line"><a name="l00435"></a><span class="lineno"> 435</span>&#160; {</div>
<div class="line"><a name="l00436"></a><span class="lineno"> 436</span>&#160; <span class="keyword">volatile</span> uint32_t status_mask = OSCCTRL_STATUS_DFLLRDY | OSCCTRL_STATUS_DFLLLCKC;</div>
<div class="line"><a name="l00437"></a><span class="lineno"> 437</span>&#160; <span class="keywordflow">while</span>((<a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;STATUS.reg &amp; status_mask) != status_mask);</div>
<div class="line"><a name="l00438"></a><span class="lineno"> 438</span>&#160; }</div>
<div class="line"><a name="l00439"></a><span class="lineno"> 439</span>&#160; <span class="keywordflow">else</span></div>
<div class="line"><a name="l00440"></a><span class="lineno"> 440</span>&#160; {</div>
<div class="line"><a name="l00441"></a><span class="lineno"> 441</span>&#160; <span class="keywordflow">while</span>(!<a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;STATUS.bit.DFLLRDY);</div>
<div class="line"><a name="l00442"></a><span class="lineno"> 442</span>&#160; }</div>
<div class="line"><a name="l00443"></a><span class="lineno"> 443</span>&#160; </div>
<div class="line"><a name="l00444"></a><span class="lineno"> 444</span>&#160;<span class="preprocessor">#if CONF_CORE_CLK_DFLL_ONDEMAND == 1</span></div>
<div class="line"><a name="l00445"></a><span class="lineno"> 445</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00446"></a><span class="lineno"> 446</span>&#160; <a class="code" href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a>-&gt;DFLLCTRLA.bit.ONDEMAND = <a class="code" href="conf__core_8h.html#a55515b150245a993779a0d5f417cc828">CONF_CORE_CLK_DFLL_ONDEMAND</a>;</div>
<div class="line"><a name="l00447"></a><span class="lineno"> 447</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00448"></a><span class="lineno"> 448</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00449"></a><span class="lineno"> 449</span>&#160; </div>
<div class="line"><a name="l00450"></a><span class="lineno"> 450</span>&#160; <span class="keywordflow">while</span>(<a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;SYNCBUSY.reg);</div>
<div class="line"><a name="l00451"></a><span class="lineno"> 451</span>&#160; CRITICAL_SECTION_ENTER();</div>
<div class="line"><a name="l00452"></a><span class="lineno"> 452</span>&#160; <span class="comment">// reset gclk 0</span></div>
<div class="line"><a name="l00453"></a><span class="lineno"> 453</span>&#160; <a class="code" href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a>-&gt;GENCTRL[0].bit.SRC = CONF_CORE_GCLK_0_CLOCK_SOURCE;</div>
<div class="line"><a name="l00454"></a><span class="lineno"> 454</span>&#160; CRITICAL_SECTION_LEAVE();</div>
<div class="line"><a name="l00455"></a><span class="lineno"> 455</span>&#160;<span class="preprocessor">#endif</span></div>
<div class="line"><a name="l00456"></a><span class="lineno"> 456</span>&#160;}</div>
</div><!-- fragment --></div><!-- contents -->
<div class="ttc" id="aconf__core_8h_html_a1f088d6654bb907ff388ced455b2dbb2"><div class="ttname"><a href="conf__core_8h.html#a1f088d6654bb907ff388ced455b2dbb2">CONF_CORE_CLK_DFLL_WAITLOCK</a></div><div class="ttdeci">#define CONF_CORE_CLK_DFLL_WAITLOCK</div><div class="ttdoc">This bit controls the DFLL output clock, depending on the lock status:</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00414">conf_core.h:414</a></div></div>
<div class="ttc" id="aconf__core_8h_html_aaf561ace0fee1e373536a251ce8a9726"><div class="ttname"><a href="conf__core_8h.html#aaf561ace0fee1e373536a251ce8a9726">CONF_CORE_CLK_XOSC1_ONDEMAND</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC1_ONDEMAND</div><div class="ttdoc">The On Demand operation mode allows the oscillator XOSC1 to be enabled or disabled,...</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00207">conf_core.h:207</a></div></div>
<div class="ttc" id="aconf__core_8h_html_a17cd20bb954bc137251cf7fb63889151"><div class="ttname"><a href="conf__core_8h.html#a17cd20bb954bc137251cf7fb63889151">CONF_CORE_CLK_XOSC0_CFDEN</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC0_CFDEN</div><div class="ttdoc">This bit controls the XOSC0 clock failure detector:</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00128">conf_core.h:128</a></div></div>
<div class="ttc" id="aconf__core_8h_html_a9de3ab7eb7e3c001d6aa7040f6311f10"><div class="ttname"><a href="conf__core_8h.html#a9de3ab7eb7e3c001d6aa7040f6311f10">CONF_CORE_CLK_DPLL1_FILTER</a></div><div class="ttdeci">#define CONF_CORE_CLK_DPLL1_FILTER</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00535">conf_core.h:535</a></div></div>
<div class="ttc" id="aconf__core_8h_html_a590b1e68a3f666bdea576a32f4e74ba0"><div class="ttname"><a href="conf__core_8h.html#a590b1e68a3f666bdea576a32f4e74ba0">CONF_CORE_CLK_XOSC1_SWBEN</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC1_SWBEN</div><div class="ttdoc">This bit controls the XOSC1 output clock switch back to the external clock or crystal oscillator in c...</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00241">conf_core.h:241</a></div></div>
<div class="ttc" id="aconf__core_8h_html_a2683d3721ab44a85e60cfff0d0cbf96e"><div class="ttname"><a href="conf__core_8h.html#a2683d3721ab44a85e60cfff0d0cbf96e">CONF_CORE_CLK_XOSC0_ENALC</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC0_ENALC</div><div class="ttdoc">This bit controls the XOSC0 automatic loop control:</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00120">conf_core.h:120</a></div></div>
<div class="ttc" id="aconf__core_8h_html_ae9fbb8d05dc5808f510eae4e8a629826"><div class="ttname"><a href="conf__core_8h.html#ae9fbb8d05dc5808f510eae4e8a629826">CONF_CORE_CLK_XOSC32K_EN32K</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC32K_EN32K</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00336">conf_core.h:336</a></div></div>
<div class="ttc" id="aconf__core_8h_html_a5cd9abca6f486eaebb6ddd236960b01a"><div class="ttname"><a href="conf__core_8h.html#a5cd9abca6f486eaebb6ddd236960b01a">CONF_CORE_CLK_DPLL0_FILTER</a></div><div class="ttdeci">#define CONF_CORE_CLK_DPLL0_FILTER</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00490">conf_core.h:490</a></div></div>
<div class="ttc" id="aconf__core_8h_html_a031a77340c697036538d218724837de1"><div class="ttname"><a href="conf__core_8h.html#a031a77340c697036538d218724837de1">CONF_CORE_CLK_XOSC32K_CGM</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC32K_CGM</div><div class="ttdoc">These bits control the gain of the external crstal oscillator.</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00293">conf_core.h:293</a></div></div>
<div class="ttc" id="aconf__core_8h_html_aa9643e96439d0d47e0684a4b11c1f529"><div class="ttname"><a href="conf__core_8h.html#aa9643e96439d0d47e0684a4b11c1f529">CONF_CORE_MCLK_CPUDIV</a></div><div class="ttdeci">#define CONF_CORE_MCLK_CPUDIV</div><div class="ttdoc">Define the master clock divisor.</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00038">conf_core.h:38</a></div></div>
<div class="ttc" id="aconf__core_8h_html_ac2ca0e9037347eb69d53a0011f989910"><div class="ttname"><a href="conf__core_8h.html#ac2ca0e9037347eb69d53a0011f989910">CONF_CORE_CLK_XOSC0_XTALEN</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC0_XTALEN</div><div class="ttdoc">This bit controls the connections between the I/O pads and the external clock or crystal oscillator X...</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00084">conf_core.h:84</a></div></div>
<div class="ttc" id="aconf__core_8h_html_a8bec34fdc01ac38ec0c2d13112f28aa0"><div class="ttname"><a href="conf__core_8h.html#a8bec34fdc01ac38ec0c2d13112f28aa0">CONF_CORE_CLK_XOSC1_RUNSTDBY</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC1_RUNSTDBY</div><div class="ttdoc">This bit controls how the XOSC1 behaves during standby sleep mode:</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00198">conf_core.h:198</a></div></div>
<div class="ttc" id="aconf__core_8h_html_a924214b0f469bde71ff28fe5544466db"><div class="ttname"><a href="conf__core_8h.html#a924214b0f469bde71ff28fe5544466db">CONF_CORE_CLK_XOSC1_CFDEN</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC1_CFDEN</div><div class="ttdoc">This bit controls the XOSC1 clock failure detector:</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00232">conf_core.h:232</a></div></div>
<div class="ttc" id="aconf__core_8h_html_a668d68edf9a7ac05be5b9cda247225ad"><div class="ttname"><a href="conf__core_8h.html#a668d68edf9a7ac05be5b9cda247225ad">CONF_CORE_CLK_XOSC32K_CFDEN</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC32K_CFDEN</div><div class="ttdoc">This bit selects the Clock Failulre Detector state.</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00360">conf_core.h:360</a></div></div>
<div class="ttc" id="asame54n19a_8h_html_a625e6fdb4c2120fc163e1b04178af3dd"><div class="ttname"><a href="same54n19a_8h.html#a625e6fdb4c2120fc163e1b04178af3dd">MCLK</a></div><div class="ttdeci">#define MCLK</div><div class="ttdoc">(MCLK) APB Base Address</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00914">same54n19a.h:914</a></div></div>
<div class="ttc" id="aconf__core_8h_html_aa54465cc56631333a22ae84ab66d5f3a"><div class="ttname"><a href="conf__core_8h.html#aa54465cc56631333a22ae84ab66d5f3a">CONF_CORE_CLK_XOSC1_ENABLE</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC1_ENABLE</div><div class="ttdoc">Enables or Disables the XOSC1 Clock.</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00180">conf_core.h:180</a></div></div>
<div class="ttc" id="aconf__core_8h_html_a3a42de5c6251540e7b8c000974acfc62"><div class="ttname"><a href="conf__core_8h.html#a3a42de5c6251540e7b8c000974acfc62">CONF_CORE_CLK_XOSC1_ENALC</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC1_ENALC</div><div class="ttdoc">This bit controls the XOSC1 automatic loop control:</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00224">conf_core.h:224</a></div></div>
<div class="ttc" id="aconf__core_8h_html_abe235b3b13f253acb855d15c8f33c95a"><div class="ttname"><a href="conf__core_8h.html#abe235b3b13f253acb855d15c8f33c95a">CONF_CORE_CLK_XOSC0_SWBEN</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC0_SWBEN</div><div class="ttdoc">This bit controls the XOSC0 output clock switch back to the external clock or crystal oscillator in c...</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00137">conf_core.h:137</a></div></div>
<div class="ttc" id="aconf__core_8h_html_a61559adc856ce1dcfa046e749af63bc3"><div class="ttname"><a href="conf__core_8h.html#a61559adc856ce1dcfa046e749af63bc3">CONF_CORE_CLK_XOSC0_ENABLE</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC0_ENABLE</div><div class="ttdoc">Enables or Disables the XOSC0 Clock.</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00076">conf_core.h:76</a></div></div>
<div class="ttc" id="aconf__core_8h_html_ae3f8741e2be4b37a46dfb49af2c2a09d"><div class="ttname"><a href="conf__core_8h.html#ae3f8741e2be4b37a46dfb49af2c2a09d">CONF_CORE_CLK_XOSC1_XTALEN</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC1_XTALEN</div><div class="ttdoc">This bit controls the connections between the I/O pads and the external clock or crystal oscillator X...</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00188">conf_core.h:188</a></div></div>
<div class="ttc" id="aconf__core_8h_html_a6a65a6f4bf7e21dc2003b61a7045e24a"><div class="ttname"><a href="conf__core_8h.html#a6a65a6f4bf7e21dc2003b61a7045e24a">CONF_CORE_CLK_XOSC32K_XTALEN</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC32K_XTALEN</div><div class="ttdoc">This bit controls the connections between the I/O pads and the external clock or crystal oscillator.</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00344">conf_core.h:344</a></div></div>
<div class="ttc" id="asame54n19a_8h_html_af1a4b8f1d1a2265b93f22621f7903f88"><div class="ttname"><a href="same54n19a_8h.html#af1a4b8f1d1a2265b93f22621f7903f88">OSC32KCTRL</a></div><div class="ttdeci">#define OSC32KCTRL</div><div class="ttdoc">(OSC32KCTRL) APB Base Address</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00929">same54n19a.h:929</a></div></div>
<div class="ttc" id="aconf__core_8h_html_a314b78ee48f1ecf6c40f4bad7ef63d9d"><div class="ttname"><a href="conf__core_8h.html#a314b78ee48f1ecf6c40f4bad7ef63d9d">CONF_CORE_CLK_XOSC32K_STARTUP_TIME</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC32K_STARTUP_TIME</div><div class="ttdoc">These bits select the startup time for the oscillator.</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00306">conf_core.h:306</a></div></div>
<div class="ttc" id="aconf__core_8h_html_a55515b150245a993779a0d5f417cc828"><div class="ttname"><a href="conf__core_8h.html#a55515b150245a993779a0d5f417cc828">CONF_CORE_CLK_DFLL_ONDEMAND</a></div><div class="ttdeci">#define CONF_CORE_CLK_DFLL_ONDEMAND</div><div class="ttdoc">Enables or Disables on-demand operation.</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00398">conf_core.h:398</a></div></div>
<div class="ttc" id="aconf__core_8h_html_adc7a2f161e9e8e54388b1f290066247e"><div class="ttname"><a href="conf__core_8h.html#adc7a2f161e9e8e54388b1f290066247e">CONF_CORE_CLK_XOSC32K_RUNSTDBY</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC32K_RUNSTDBY</div><div class="ttdoc">This bit controls how XOSC32K behaves during standby sleep mode.</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00322">conf_core.h:322</a></div></div>
<div class="ttc" id="aconf__core_8h_html_affc8201cf2340d2236ba9ca44a1e657c"><div class="ttname"><a href="conf__core_8h.html#affc8201cf2340d2236ba9ca44a1e657c">CONF_CORE_CLK_XOSC0_STARTUP_TIME</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC0_STARTUP_TIME</div><div class="ttdoc">These bits select start-up time for XOSC0 according to the table below:</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00159">conf_core.h:159</a></div></div>
<div class="ttc" id="aconf__core_8h_html_a8d70a30b50febec035af6b982daac395"><div class="ttname"><a href="conf__core_8h.html#a8d70a30b50febec035af6b982daac395">CONF_CORE_CLK_XOSC32K_ONDEMAND</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC32K_ONDEMAND</div><div class="ttdoc">This bit controls how XOSC32K behaves when a peripheral clock request is detected.</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00314">conf_core.h:314</a></div></div>
<div class="ttc" id="asame54n19a_8h_html_a49136ad5bf1adc9e9a0232349bcdce57"><div class="ttname"><a href="same54n19a_8h.html#a49136ad5bf1adc9e9a0232349bcdce57">OSCCTRL</a></div><div class="ttdeci">#define OSCCTRL</div><div class="ttdoc">(OSCCTRL) APB Base Address</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00925">same54n19a.h:925</a></div></div>
<div class="ttc" id="aconf__core_8h_html_a42b0270d2f3c0f51c4b3d2b8ac397fda"><div class="ttname"><a href="conf__core_8h.html#a42b0270d2f3c0f51c4b3d2b8ac397fda">CONF_CORE_CLK_XOSC32K_WRTLOCK</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC32K_WRTLOCK</div><div class="ttdoc">This bit locks the XOSC32K register for future writes, effectively freezing the XOSC32K configuration...</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00376">conf_core.h:376</a></div></div>
<div class="ttc" id="aconf__core_8h_html_a79567f94a0f3ad2d628bcf5e1cff62d1"><div class="ttname"><a href="conf__core_8h.html#a79567f94a0f3ad2d628bcf5e1cff62d1">CONF_CORE_CLK_XOSC32K_CFDPRESC</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC32K_CFDPRESC</div><div class="ttdoc">This bit selects the prescaler for the CLock Failure Detector:</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00352">conf_core.h:352</a></div></div>
<div class="ttc" id="aconf__core_8h_html_afac0686157854cc021424410ded071f1"><div class="ttname"><a href="conf__core_8h.html#afac0686157854cc021424410ded071f1">CONF_CORE_CLK_XOSC0_RUNSTDBY</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC0_RUNSTDBY</div><div class="ttdoc">This bit controls how the XOSC0 behaves during standby sleep mode:</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00094">conf_core.h:94</a></div></div>
<div class="ttc" id="aconf__core_8h_html_ae8d2fdac3b52964174863149986db625"><div class="ttname"><a href="conf__core_8h.html#ae8d2fdac3b52964174863149986db625">CONF_CORE_CLK_XOSC1_STARTUP_TIME</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC1_STARTUP_TIME</div><div class="ttdoc">These bits select start-up time for XOSC1 according to the table below:</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00263">conf_core.h:263</a></div></div>
<div class="ttc" id="aconf__core_8h_html_a033f3571fb50a6ed02278d65ea84b45e"><div class="ttname"><a href="conf__core_8h.html#a033f3571fb50a6ed02278d65ea84b45e">CONF_CORE_CLK_XOSC32K_EN1K</a></div><div class="ttdeci">#define CONF_CORE_CLK_XOSC32K_EN1K</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00329">conf_core.h:329</a></div></div>
<div class="ttc" id="aconf__core_8h_html_ab6b320dcf67ec88f534adcbf77e2ce7b"><div class="ttname"><a href="conf__core_8h.html#ab6b320dcf67ec88f534adcbf77e2ce7b">CONF_CORE_CLK_DFLL_RUNSTDBY</a></div><div class="ttdeci">#define CONF_CORE_CLK_DFLL_RUNSTDBY</div><div class="ttdoc">Enables or Disables run-in-standby operation.</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00406">conf_core.h:406</a></div></div>
<div class="ttc" id="aconf__core_8h_html"><div class="ttname"><a href="conf__core_8h.html">conf_core.h</a></div></div>
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<div class="ttc" id="aconf__core_8h_html_a03160c4c7871685bbde0e96f02825842"><div class="ttname"><a href="conf__core_8h.html#a03160c4c7871685bbde0e96f02825842">CONF_CORE_CLK_DFLL_ENABLE</a></div><div class="ttdeci">#define CONF_CORE_CLK_DFLL_ENABLE</div><div class="ttdoc">Enables or Disables the DFLL48M Clock.</div><div class="ttdef"><b>Definition:</b> <a href="conf__core_8h_source.html#l00390">conf_core.h:390</a></div></div>
<div class="ttc" id="asame54n19a_8h_html_a23f9186cfd6ee5e60c8485315183271f"><div class="ttname"><a href="same54n19a_8h.html#a23f9186cfd6ee5e60c8485315183271f">GCLK</a></div><div class="ttdeci">#define GCLK</div><div class="ttdoc">(GCLK) APB Base Address</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00894">same54n19a.h:894</a></div></div>
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<div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160;<span class="preprocessor">#ifndef _CLOCKS_H_</span></div>
<div class="line"><a name="l00002"></a><span class="lineno"> 2</span>&#160;<span class="preprocessor">#define _CLOCKS_H_</span></div>
<div class="line"><a name="l00003"></a><span class="lineno"> 3</span>&#160; </div>
<div class="line"><a name="l00004"></a><span class="lineno"> 4</span>&#160;<span class="preprocessor">#include &quot;core.h&quot;</span></div>
<div class="line"><a name="l00005"></a><span class="lineno"> 5</span>&#160; </div>
<div class="line"><a name="l00006"></a><span class="lineno"> 6</span>&#160;<span class="comment">// XOSC32K Definitions</span></div>
<div class="line"><a name="l00007"></a><span class="lineno"> 7</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_XOSC32KCTRL_CGM_LP_MODE (0x0)</span></div>
<div class="line"><a name="l00008"></a><span class="lineno"> 8</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_XOSC32KCTRL_CGM_STD_MODE (0x1)</span></div>
<div class="line"><a name="l00009"></a><span class="lineno"> 9</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_XOSC32KCTRL_CGM_HS_MODE (0x2)</span></div>
<div class="line"><a name="l00010"></a><span class="lineno"> 10</span>&#160; </div>
<div class="line"><a name="l00011"></a><span class="lineno"> 11</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_62592us (0x0)</span></div>
<div class="line"><a name="l00012"></a><span class="lineno"> 12</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_125092us (0x1)</span></div>
<div class="line"><a name="l00013"></a><span class="lineno"> 13</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_500092us (0x2)</span></div>
<div class="line"><a name="l00014"></a><span class="lineno"> 14</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_1000009200ns (0x3)</span></div>
<div class="line"><a name="l00015"></a><span class="lineno"> 15</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_2000009200ns (0x4)</span></div>
<div class="line"><a name="l00016"></a><span class="lineno"> 16</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_4000009200ns (0x5)</span></div>
<div class="line"><a name="l00017"></a><span class="lineno"> 17</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_8000009200ns (0x6)</span></div>
<div class="line"><a name="l00018"></a><span class="lineno"> 18</span>&#160; </div>
<div class="line"><a name="l00019"></a><span class="lineno"> 19</span>&#160;<span class="comment">// Oscillator Current Multiplier</span></div>
<div class="line"><a name="l00020"></a><span class="lineno"> 20</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_XOSCCTRL_IMULT_24MHZ_TO_48MHZ (6)</span></div>
<div class="line"><a name="l00021"></a><span class="lineno"> 21</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_XOSCCTRL_IMULT_16MHZ_TO_24MHZ (5)</span></div>
<div class="line"><a name="l00022"></a><span class="lineno"> 22</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_XOSCCTRL_IMULT_8MHZ_TO_16MHZ (4)</span></div>
<div class="line"><a name="l00023"></a><span class="lineno"> 23</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_XOSCCTRL_IMULT_8MHZ (3)</span></div>
<div class="line"><a name="l00024"></a><span class="lineno"> 24</span>&#160; </div>
<div class="line"><a name="l00025"></a><span class="lineno"> 25</span>&#160;<span class="comment">// Oscillator Current Reference</span></div>
<div class="line"><a name="l00026"></a><span class="lineno"> 26</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_XOSCCTRL_IPTAT_24MHZ_TO_48MHZ (3)</span></div>
<div class="line"><a name="l00027"></a><span class="lineno"> 27</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_XOSCCTRL_IPTAT_16MHZ_TO_24MHZ (3)</span></div>
<div class="line"><a name="l00028"></a><span class="lineno"> 28</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_XOSCCTRL_IPTAT_8MHZ_TO_16MHZ (3)</span></div>
<div class="line"><a name="l00029"></a><span class="lineno"> 29</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_XOSCCTRL_IPTAT_8MHZ (2)</span></div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160; </div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="comment">// DFLL Definitions</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_DFLLCTRL_STABLE_FCALIB_NOT_FIXED (0)</span></div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_DFLLCTRL_STABLE_FCALIB_FIXED (1)</span></div>
<div class="line"><a name="l00034"></a><span class="lineno"> 34</span>&#160; </div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="comment">// DPLL Definitions</span></div>
<div class="line"><a name="l00036"></a><span class="lineno"> 36</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_3210KHZ (0x0)</span></div>
<div class="line"><a name="l00037"></a><span class="lineno"> 37</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_1600KHZ (0x1)</span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_1100KHZ (0x2)</span></div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_800KHZ (0x3)</span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_640KHZ (0x4)</span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_550KHZ (0x5)</span></div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_450KHZ (0x6)</span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_400KHZ (0x7)</span></div>
<div class="line"><a name="l00044"></a><span class="lineno"> 44</span>&#160; </div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_LTIME_TIMEOUT_NONE (0x0)</span></div>
<div class="line"><a name="l00046"></a><span class="lineno"> 46</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_LTIME_TIMEOUT_800us (0x4)</span></div>
<div class="line"><a name="l00047"></a><span class="lineno"> 47</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_LTIME_TIMEOUT_900us (0x5)</span></div>
<div class="line"><a name="l00048"></a><span class="lineno"> 48</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_LTIME_TIMEOUT_1000us (0x6)</span></div>
<div class="line"><a name="l00049"></a><span class="lineno"> 49</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_LTIME_TIMEOUT_1100us (0x7)</span></div>
<div class="line"><a name="l00050"></a><span class="lineno"> 50</span>&#160; </div>
<div class="line"><a name="l00051"></a><span class="lineno"> 51</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_REFCLK_GCLK (0x0)</span></div>
<div class="line"><a name="l00052"></a><span class="lineno"> 52</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_REFCLK_XOSC32 (0x1)</span></div>
<div class="line"><a name="l00053"></a><span class="lineno"> 53</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_REFCLK_XOSC0 (0x2)</span></div>
<div class="line"><a name="l00054"></a><span class="lineno"> 54</span>&#160;<span class="preprocessor">#define CONF_CORE_CLK_DPLLCTRL_REFCLK_XOSC1 (0x3)</span></div>
<div class="line"><a name="l00055"></a><span class="lineno"> 55</span>&#160; </div>
<div class="line"><a name="l00056"></a><span class="lineno"> 56</span>&#160;<span class="keywordtype">void</span> clock_osc32k_init(<span class="keywordtype">void</span>);</div>
<div class="line"><a name="l00057"></a><span class="lineno"> 57</span>&#160;<span class="keywordtype">void</span> clock_osc_init(<span class="keywordtype">void</span>);</div>
<div class="line"><a name="l00058"></a><span class="lineno"> 58</span>&#160;<span class="keywordtype">void</span> clock_mclk_init(<span class="keywordtype">void</span>);</div>
<div class="line"><a name="l00059"></a><span class="lineno"> 59</span>&#160;<span class="keywordtype">void</span> clock_gclk_init(<span class="keywordtype">void</span>);</div>
<div class="line"><a name="l00060"></a><span class="lineno"> 60</span>&#160;<span class="keywordtype">void</span> clock_dpll_init(<span class="keywordtype">void</span>);</div>
<div class="line"><a name="l00061"></a><span class="lineno"> 61</span>&#160;<span class="keywordtype">void</span> clock_dfll_init(<span class="keywordtype">void</span>);</div>
<div class="line"><a name="l00062"></a><span class="lineno"> 62</span>&#160;<span class="preprocessor">#endif</span></div>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>COMPONENT_VERSION_MAJOR</b>&#160;&#160;&#160;1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>COMPONENT_VERSION_MINOR</b>&#160;&#160;&#160;1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>COMPONENT_VERSION</b>&#160;&#160;&#160;10001</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>BUILD_NUMBER</b>&#160;&#160;&#160;134</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>COMPONENT_VERSION_STRING</b>&#160;&#160;&#160;&quot;1.1&quot;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>COMPONENT_DATE_STRING</b>&#160;&#160;&#160;&quot;2019-04-09 08:16:19&quot;</td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Component version header file. </p>
<p>Copyright (c) 2019 Atmel Corporation, a wholly owned subsidiary of Microchip Technology Inc.</p>
<p>\license_start </p>
<p class="definition">Definition in file <a class="el" href="component-version_8h_source.html">component-version.h</a>.</p>
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<a href="component-version_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00028"></a><span class="lineno"> 28</span>&#160;<span class="preprocessor">#ifndef _COMPONENT_VERSION_H_INCLUDED</span></div>
<div class="line"><a name="l00029"></a><span class="lineno"> 29</span>&#160;<span class="preprocessor">#define _COMPONENT_VERSION_H_INCLUDED</span></div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160; </div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define COMPONENT_VERSION_MAJOR 1</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160;<span class="preprocessor">#define COMPONENT_VERSION_MINOR 1</span></div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160; </div>
<div class="line"><a name="l00034"></a><span class="lineno"> 34</span>&#160;<span class="comment">//</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="comment">// The COMPONENT_VERSION define is composed of the major and the minor version number.</span></div>
<div class="line"><a name="l00036"></a><span class="lineno"> 36</span>&#160;<span class="comment">//</span></div>
<div class="line"><a name="l00037"></a><span class="lineno"> 37</span>&#160;<span class="comment">// The last four digits of the COMPONENT_VERSION is the minor version with leading zeros.</span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160;<span class="comment">// The rest of the COMPONENT_VERSION is the major version.</span></div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="comment">//</span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define COMPONENT_VERSION 10001</span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160; </div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="comment">//</span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="comment">// The build number does not refer to the component, but to the build number</span></div>
<div class="line"><a name="l00044"></a><span class="lineno"> 44</span>&#160;<span class="comment">// of the device pack that provides the component.</span></div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160;<span class="comment">//</span></div>
<div class="line"><a name="l00046"></a><span class="lineno"> 46</span>&#160;<span class="preprocessor">#define BUILD_NUMBER 134</span></div>
<div class="line"><a name="l00047"></a><span class="lineno"> 47</span>&#160; </div>
<div class="line"><a name="l00048"></a><span class="lineno"> 48</span>&#160;<span class="comment">//</span></div>
<div class="line"><a name="l00049"></a><span class="lineno"> 49</span>&#160;<span class="comment">// The COMPONENT_VERSION_STRING is a string (enclosed in &quot;) that can be used for logging or embedding.</span></div>
<div class="line"><a name="l00050"></a><span class="lineno"> 50</span>&#160;<span class="comment">//</span></div>
<div class="line"><a name="l00051"></a><span class="lineno"> 51</span>&#160;<span class="preprocessor">#define COMPONENT_VERSION_STRING &quot;1.1&quot;</span></div>
<div class="line"><a name="l00052"></a><span class="lineno"> 52</span>&#160; </div>
<div class="line"><a name="l00053"></a><span class="lineno"> 53</span>&#160;<span class="comment">//</span></div>
<div class="line"><a name="l00054"></a><span class="lineno"> 54</span>&#160;<span class="comment">// The COMPONENT_DATE_STRING contains a timestamp of when the pack was generated.</span></div>
<div class="line"><a name="l00055"></a><span class="lineno"> 55</span>&#160;<span class="comment">//</span></div>
<div class="line"><a name="l00056"></a><span class="lineno"> 56</span>&#160;<span class="comment">// The COMPONENT_DATE_STRING is written out using the following strftime pattern.</span></div>
<div class="line"><a name="l00057"></a><span class="lineno"> 57</span>&#160;<span class="comment">//</span></div>
<div class="line"><a name="l00058"></a><span class="lineno"> 58</span>&#160;<span class="comment">// &quot;%Y-%m-%d %H:%M:%S&quot;</span></div>
<div class="line"><a name="l00059"></a><span class="lineno"> 59</span>&#160;<span class="comment">//</span></div>
<div class="line"><a name="l00060"></a><span class="lineno"> 60</span>&#160;<span class="comment">//</span></div>
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<div class="line"><a name="l00062"></a><span class="lineno"> 62</span>&#160; </div>
<div class="line"><a name="l00063"></a><span class="lineno"> 63</span>&#160;<span class="preprocessor">#endif</span><span class="comment">/* #ifndef _COMPONENT_VERSION_H_INCLUDED */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00064"></a><span class="lineno"> 64</span>&#160; </div>
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<a href="component_2ac_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_AC_COMPONENT_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_AC_COMPONENT_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
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<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160; </div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define AC_U2501</span></div>
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<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160; </div>
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<div class="line"><a name="l00047"></a><span class="lineno"><a class="line" href="unionAC__CTRLA__Type.html#a7d4dbc05e6d8ee0ca55797be6b20ce23"> 47</a></span>&#160; uint8_t <a class="code" href="unionAC__CTRLA__Type.html#a7d4dbc05e6d8ee0ca55797be6b20ce23">ENABLE</a>:1; </div>
<div class="line"><a name="l00048"></a><span class="lineno"><a class="line" href="unionAC__CTRLA__Type.html#a098d6d687cac4efb942fbc1298cd0a8f"> 48</a></span>&#160; uint8_t :6; </div>
<div class="line"><a name="l00049"></a><span class="lineno"><a class="line" href="unionAC__CTRLA__Type.html#ae02ae10d71458ad571659a882958af87"> 49</a></span>&#160; } bit; </div>
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<div class="line"><a name="l00054"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a2b8253e09cb53fcb96e93f5d425a97b4"> 54</a></span>&#160;<span class="preprocessor">#define AC_CTRLA_OFFSET 0x00 </span></div>
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<div class="line"><a name="l00057"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#ab2cf4a760261959d3e1b82e930e1bb98"> 57</a></span>&#160;<span class="preprocessor">#define AC_CTRLA_SWRST_Pos 0 </span></div>
<div class="line"><a name="l00058"></a><span class="lineno"> 58</span>&#160;<span class="preprocessor">#define AC_CTRLA_SWRST (_U_(0x1) &lt;&lt; AC_CTRLA_SWRST_Pos)</span></div>
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<div class="line"><a name="l00060"></a><span class="lineno"> 60</span>&#160;<span class="preprocessor">#define AC_CTRLA_ENABLE (_U_(0x1) &lt;&lt; AC_CTRLA_ENABLE_Pos)</span></div>
<div class="line"><a name="l00061"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a9825c7ce5b1a6de685e38859c9cd282d"> 61</a></span>&#160;<span class="preprocessor">#define AC_CTRLA_MASK _U_(0x03) </span></div>
<div class="line"><a name="l00063"></a><span class="lineno"> 63</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AC_CTRLB : (AC Offset: 0x01) ( /W 8) Control B -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00064"></a><span class="lineno"> 64</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00065"></a><span class="lineno"><a class="line" href="unionAC__CTRLB__Type.html"> 65</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00066"></a><span class="lineno"> 66</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00067"></a><span class="lineno"><a class="line" href="unionAC__CTRLB__Type.html#a760d1ae61b939e39b8d3beb201554ce1"> 67</a></span>&#160; uint8_t <a class="code" href="unionAC__CTRLB__Type.html#a760d1ae61b939e39b8d3beb201554ce1">START0</a>:1; </div>
<div class="line"><a name="l00068"></a><span class="lineno"><a class="line" href="unionAC__CTRLB__Type.html#a17398190707110456c97dd422752d8db"> 68</a></span>&#160; uint8_t <a class="code" href="unionAC__CTRLB__Type.html#a17398190707110456c97dd422752d8db">START1</a>:1; </div>
<div class="line"><a name="l00069"></a><span class="lineno"><a class="line" href="unionAC__CTRLB__Type.html#a4d7e22b19511161c0cf1c3bbf930aad0"> 69</a></span>&#160; uint8_t :6; </div>
<div class="line"><a name="l00070"></a><span class="lineno"><a class="line" href="unionAC__CTRLB__Type.html#aaf2bf5602ad1f26a93a67ffec5d9d2cb"> 70</a></span>&#160; } bit; </div>
<div class="line"><a name="l00071"></a><span class="lineno"> 71</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00072"></a><span class="lineno"><a class="line" href="unionAC__CTRLB__Type.html#ac9815f20dd05fa3dca5cd44a7db9069d"> 72</a></span>&#160; uint8_t <a class="code" href="unionAC__CTRLB__Type.html#ac9815f20dd05fa3dca5cd44a7db9069d">START</a>:2; </div>
<div class="line"><a name="l00073"></a><span class="lineno"> 73</span>&#160; uint8_t :6; </div>
<div class="line"><a name="l00074"></a><span class="lineno"><a class="line" href="unionAC__CTRLB__Type.html#a7e8ca7b3f1936203528e7fcf076a074c"> 74</a></span>&#160; } vec; </div>
<div class="line"><a name="l00075"></a><span class="lineno"><a class="line" href="unionAC__CTRLB__Type.html#ad032eca8740fe2f0e8471bc9080db59e"> 75</a></span>&#160; uint8_t <a class="code" href="unionAC__CTRLB__Type.html#ad032eca8740fe2f0e8471bc9080db59e">reg</a>; </div>
<div class="line"><a name="l00076"></a><span class="lineno"> 76</span>&#160;} <a class="code" href="unionAC__CTRLB__Type.html">AC_CTRLB_Type</a>;</div>
<div class="line"><a name="l00077"></a><span class="lineno"> 77</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00078"></a><span class="lineno"> 78</span>&#160; </div>
<div class="line"><a name="l00079"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a63f35a95c3a9ef7fa1664630f3831991"> 79</a></span>&#160;<span class="preprocessor">#define AC_CTRLB_OFFSET 0x01 </span></div>
<div class="line"><a name="l00080"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a50ffeb7cd3de2b4dda6da39ff8cae69e"> 80</a></span>&#160;<span class="preprocessor">#define AC_CTRLB_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00082"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a9fe01e62bcc1df5dd7eebbdae8e28ebb"> 82</a></span>&#160;<span class="preprocessor">#define AC_CTRLB_START0_Pos 0 </span></div>
<div class="line"><a name="l00083"></a><span class="lineno"> 83</span>&#160;<span class="preprocessor">#define AC_CTRLB_START0 (_U_(1) &lt;&lt; AC_CTRLB_START0_Pos)</span></div>
<div class="line"><a name="l00084"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a285cbdca40bedb61659d00dbb41a2d7f"> 84</a></span>&#160;<span class="preprocessor">#define AC_CTRLB_START1_Pos 1 </span></div>
<div class="line"><a name="l00085"></a><span class="lineno"> 85</span>&#160;<span class="preprocessor">#define AC_CTRLB_START1 (_U_(1) &lt;&lt; AC_CTRLB_START1_Pos)</span></div>
<div class="line"><a name="l00086"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a5699a352a32415762e7ae47f727c34e2"> 86</a></span>&#160;<span class="preprocessor">#define AC_CTRLB_START_Pos 0 </span></div>
<div class="line"><a name="l00087"></a><span class="lineno"> 87</span>&#160;<span class="preprocessor">#define AC_CTRLB_START_Msk (_U_(0x3) &lt;&lt; AC_CTRLB_START_Pos)</span></div>
<div class="line"><a name="l00088"></a><span class="lineno"> 88</span>&#160;<span class="preprocessor">#define AC_CTRLB_START(value) (AC_CTRLB_START_Msk &amp; ((value) &lt;&lt; AC_CTRLB_START_Pos))</span></div>
<div class="line"><a name="l00089"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a877d20a90ea3bf5063d3465e511670bf"> 89</a></span>&#160;<span class="preprocessor">#define AC_CTRLB_MASK _U_(0x03) </span></div>
<div class="line"><a name="l00091"></a><span class="lineno"> 91</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AC_EVCTRL : (AC Offset: 0x02) (R/W 16) Event Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00092"></a><span class="lineno"> 92</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00093"></a><span class="lineno"><a class="line" href="unionAC__EVCTRL__Type.html"> 93</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00094"></a><span class="lineno"> 94</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00095"></a><span class="lineno"><a class="line" href="unionAC__EVCTRL__Type.html#a7ea623ba38e6a03b4cc4e3d493d87014"> 95</a></span>&#160; uint16_t <a class="code" href="unionAC__EVCTRL__Type.html#a7ea623ba38e6a03b4cc4e3d493d87014">COMPEO0</a>:1; </div>
<div class="line"><a name="l00096"></a><span class="lineno"><a class="line" href="unionAC__EVCTRL__Type.html#ab4ef9d19685a1f172bd8445083216512"> 96</a></span>&#160; uint16_t <a class="code" href="unionAC__EVCTRL__Type.html#ab4ef9d19685a1f172bd8445083216512">COMPEO1</a>:1; </div>
<div class="line"><a name="l00097"></a><span class="lineno"><a class="line" href="unionAC__EVCTRL__Type.html#a630aaeff3fd68e38679416d2403012cd"> 97</a></span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00098"></a><span class="lineno"><a class="line" href="unionAC__EVCTRL__Type.html#a3436fe70198f6e81e92a2404bd178574"> 98</a></span>&#160; uint16_t <a class="code" href="unionAC__EVCTRL__Type.html#a3436fe70198f6e81e92a2404bd178574">WINEO0</a>:1; </div>
<div class="line"><a name="l00099"></a><span class="lineno"><a class="line" href="unionAC__EVCTRL__Type.html#a691d83b865a49e9ed4a1d36657278e8d"> 99</a></span>&#160; uint16_t :3; </div>
<div class="line"><a name="l00100"></a><span class="lineno"><a class="line" href="unionAC__EVCTRL__Type.html#a00045659dd1fbd923931bbf9b81e7c6b"> 100</a></span>&#160; uint16_t <a class="code" href="unionAC__EVCTRL__Type.html#a00045659dd1fbd923931bbf9b81e7c6b">COMPEI0</a>:1; </div>
<div class="line"><a name="l00101"></a><span class="lineno"><a class="line" href="unionAC__EVCTRL__Type.html#a7ad83dec94ecd1af02f74c0114696673"> 101</a></span>&#160; uint16_t <a class="code" href="unionAC__EVCTRL__Type.html#a7ad83dec94ecd1af02f74c0114696673">COMPEI1</a>:1; </div>
<div class="line"><a name="l00102"></a><span class="lineno"><a class="line" href="unionAC__EVCTRL__Type.html#abc26f7efd8c22df7bb030f5b3facfaf8"> 102</a></span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00103"></a><span class="lineno"><a class="line" href="unionAC__EVCTRL__Type.html#a1ca0ff027125761a6ca1049a9e549a18"> 103</a></span>&#160; uint16_t <a class="code" href="unionAC__EVCTRL__Type.html#a1ca0ff027125761a6ca1049a9e549a18">INVEI0</a>:1; </div>
<div class="line"><a name="l00104"></a><span class="lineno"><a class="line" href="unionAC__EVCTRL__Type.html#a9c3e7ed4fbb3058255cf3dc0ae712254"> 104</a></span>&#160; uint16_t <a class="code" href="unionAC__EVCTRL__Type.html#a9c3e7ed4fbb3058255cf3dc0ae712254">INVEI1</a>:1; </div>
<div class="line"><a name="l00105"></a><span class="lineno"><a class="line" href="unionAC__EVCTRL__Type.html#aa62aeea0057ca1f3f8026e8de2f1c7a9"> 105</a></span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00106"></a><span class="lineno"><a class="line" href="unionAC__EVCTRL__Type.html#ac16297293519b8dc158c2c9c4f338b12"> 106</a></span>&#160; } bit; </div>
<div class="line"><a name="l00107"></a><span class="lineno"> 107</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00108"></a><span class="lineno"><a class="line" href="unionAC__EVCTRL__Type.html#a74bfb16a5a12d5476bbcbd4fc51cd8ee"> 108</a></span>&#160; uint16_t <a class="code" href="unionAC__EVCTRL__Type.html#a74bfb16a5a12d5476bbcbd4fc51cd8ee">COMPEO</a>:2; </div>
<div class="line"><a name="l00109"></a><span class="lineno"> 109</span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00110"></a><span class="lineno"><a class="line" href="unionAC__EVCTRL__Type.html#ac26ab4051408af4f6ef5f28f54e9b7e2"> 110</a></span>&#160; uint16_t <a class="code" href="unionAC__EVCTRL__Type.html#ac26ab4051408af4f6ef5f28f54e9b7e2">WINEO</a>:1; </div>
<div class="line"><a name="l00111"></a><span class="lineno"> 111</span>&#160; uint16_t :3; </div>
<div class="line"><a name="l00112"></a><span class="lineno"><a class="line" href="unionAC__EVCTRL__Type.html#a9e65bdb6d81e1f9d93abdb815b1e1a09"> 112</a></span>&#160; uint16_t <a class="code" href="unionAC__EVCTRL__Type.html#a9e65bdb6d81e1f9d93abdb815b1e1a09">COMPEI</a>:2; </div>
<div class="line"><a name="l00113"></a><span class="lineno"> 113</span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00114"></a><span class="lineno"><a class="line" href="unionAC__EVCTRL__Type.html#aed5e8dd2038203472a017dd9e017db71"> 114</a></span>&#160; uint16_t <a class="code" href="unionAC__EVCTRL__Type.html#aed5e8dd2038203472a017dd9e017db71">INVEI</a>:2; </div>
<div class="line"><a name="l00115"></a><span class="lineno"> 115</span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00116"></a><span class="lineno"><a class="line" href="unionAC__EVCTRL__Type.html#a3f479b48e881e162a3c2683931fa05e6"> 116</a></span>&#160; } vec; </div>
<div class="line"><a name="l00117"></a><span class="lineno"><a class="line" href="unionAC__EVCTRL__Type.html#ae1ec2935d7ee9422bb7789a149620341"> 117</a></span>&#160; uint16_t <a class="code" href="unionAC__EVCTRL__Type.html#ae1ec2935d7ee9422bb7789a149620341">reg</a>; </div>
<div class="line"><a name="l00118"></a><span class="lineno"> 118</span>&#160;} <a class="code" href="unionAC__EVCTRL__Type.html">AC_EVCTRL_Type</a>;</div>
<div class="line"><a name="l00119"></a><span class="lineno"> 119</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00120"></a><span class="lineno"> 120</span>&#160; </div>
<div class="line"><a name="l00121"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a2084b522a096a69a32b82b24e5e56b35"> 121</a></span>&#160;<span class="preprocessor">#define AC_EVCTRL_OFFSET 0x02 </span></div>
<div class="line"><a name="l00122"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#ada78dcdc73d5a68c8647ba0ec61004e3"> 122</a></span>&#160;<span class="preprocessor">#define AC_EVCTRL_RESETVALUE _U_(0x0000) </span></div>
<div class="line"><a name="l00124"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#aa70b302d7f87b0f6d8ab915ca5b7bf8f"> 124</a></span>&#160;<span class="preprocessor">#define AC_EVCTRL_COMPEO0_Pos 0 </span></div>
<div class="line"><a name="l00125"></a><span class="lineno"> 125</span>&#160;<span class="preprocessor">#define AC_EVCTRL_COMPEO0 (_U_(1) &lt;&lt; AC_EVCTRL_COMPEO0_Pos)</span></div>
<div class="line"><a name="l00126"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a2a8ed3ce927004e2e47d23ece31c48be"> 126</a></span>&#160;<span class="preprocessor">#define AC_EVCTRL_COMPEO1_Pos 1 </span></div>
<div class="line"><a name="l00127"></a><span class="lineno"> 127</span>&#160;<span class="preprocessor">#define AC_EVCTRL_COMPEO1 (_U_(1) &lt;&lt; AC_EVCTRL_COMPEO1_Pos)</span></div>
<div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a9a60df9204a6150ee4ce9fc489666d9d"> 128</a></span>&#160;<span class="preprocessor">#define AC_EVCTRL_COMPEO_Pos 0 </span></div>
<div class="line"><a name="l00129"></a><span class="lineno"> 129</span>&#160;<span class="preprocessor">#define AC_EVCTRL_COMPEO_Msk (_U_(0x3) &lt;&lt; AC_EVCTRL_COMPEO_Pos)</span></div>
<div class="line"><a name="l00130"></a><span class="lineno"> 130</span>&#160;<span class="preprocessor">#define AC_EVCTRL_COMPEO(value) (AC_EVCTRL_COMPEO_Msk &amp; ((value) &lt;&lt; AC_EVCTRL_COMPEO_Pos))</span></div>
<div class="line"><a name="l00131"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a0e39ab9106d32a5826c0b03c25f0f010"> 131</a></span>&#160;<span class="preprocessor">#define AC_EVCTRL_WINEO0_Pos 4 </span></div>
<div class="line"><a name="l00132"></a><span class="lineno"> 132</span>&#160;<span class="preprocessor">#define AC_EVCTRL_WINEO0 (_U_(1) &lt;&lt; AC_EVCTRL_WINEO0_Pos)</span></div>
<div class="line"><a name="l00133"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a1afab4ba445e18743d95471ac63fc5f3"> 133</a></span>&#160;<span class="preprocessor">#define AC_EVCTRL_WINEO_Pos 4 </span></div>
<div class="line"><a name="l00134"></a><span class="lineno"> 134</span>&#160;<span class="preprocessor">#define AC_EVCTRL_WINEO_Msk (_U_(0x1) &lt;&lt; AC_EVCTRL_WINEO_Pos)</span></div>
<div class="line"><a name="l00135"></a><span class="lineno"> 135</span>&#160;<span class="preprocessor">#define AC_EVCTRL_WINEO(value) (AC_EVCTRL_WINEO_Msk &amp; ((value) &lt;&lt; AC_EVCTRL_WINEO_Pos))</span></div>
<div class="line"><a name="l00136"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a586fb057733a1c4b9f7c81586a2f6854"> 136</a></span>&#160;<span class="preprocessor">#define AC_EVCTRL_COMPEI0_Pos 8 </span></div>
<div class="line"><a name="l00137"></a><span class="lineno"> 137</span>&#160;<span class="preprocessor">#define AC_EVCTRL_COMPEI0 (_U_(1) &lt;&lt; AC_EVCTRL_COMPEI0_Pos)</span></div>
<div class="line"><a name="l00138"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a744dba4ce32648fec57677d38bcf2be5"> 138</a></span>&#160;<span class="preprocessor">#define AC_EVCTRL_COMPEI1_Pos 9 </span></div>
<div class="line"><a name="l00139"></a><span class="lineno"> 139</span>&#160;<span class="preprocessor">#define AC_EVCTRL_COMPEI1 (_U_(1) &lt;&lt; AC_EVCTRL_COMPEI1_Pos)</span></div>
<div class="line"><a name="l00140"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a3ecb80c6d080322ab734ade29f0fb26e"> 140</a></span>&#160;<span class="preprocessor">#define AC_EVCTRL_COMPEI_Pos 8 </span></div>
<div class="line"><a name="l00141"></a><span class="lineno"> 141</span>&#160;<span class="preprocessor">#define AC_EVCTRL_COMPEI_Msk (_U_(0x3) &lt;&lt; AC_EVCTRL_COMPEI_Pos)</span></div>
<div class="line"><a name="l00142"></a><span class="lineno"> 142</span>&#160;<span class="preprocessor">#define AC_EVCTRL_COMPEI(value) (AC_EVCTRL_COMPEI_Msk &amp; ((value) &lt;&lt; AC_EVCTRL_COMPEI_Pos))</span></div>
<div class="line"><a name="l00143"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#ac5b3dfa3ee04752686c12a34effd852b"> 143</a></span>&#160;<span class="preprocessor">#define AC_EVCTRL_INVEI0_Pos 12 </span></div>
<div class="line"><a name="l00144"></a><span class="lineno"> 144</span>&#160;<span class="preprocessor">#define AC_EVCTRL_INVEI0 (_U_(1) &lt;&lt; AC_EVCTRL_INVEI0_Pos)</span></div>
<div class="line"><a name="l00145"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a4f2994930271c93cb896b8370ef41b00"> 145</a></span>&#160;<span class="preprocessor">#define AC_EVCTRL_INVEI1_Pos 13 </span></div>
<div class="line"><a name="l00146"></a><span class="lineno"> 146</span>&#160;<span class="preprocessor">#define AC_EVCTRL_INVEI1 (_U_(1) &lt;&lt; AC_EVCTRL_INVEI1_Pos)</span></div>
<div class="line"><a name="l00147"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a59a28973d23bf2b2c04b3a9b6897674d"> 147</a></span>&#160;<span class="preprocessor">#define AC_EVCTRL_INVEI_Pos 12 </span></div>
<div class="line"><a name="l00148"></a><span class="lineno"> 148</span>&#160;<span class="preprocessor">#define AC_EVCTRL_INVEI_Msk (_U_(0x3) &lt;&lt; AC_EVCTRL_INVEI_Pos)</span></div>
<div class="line"><a name="l00149"></a><span class="lineno"> 149</span>&#160;<span class="preprocessor">#define AC_EVCTRL_INVEI(value) (AC_EVCTRL_INVEI_Msk &amp; ((value) &lt;&lt; AC_EVCTRL_INVEI_Pos))</span></div>
<div class="line"><a name="l00150"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a6cdb3ec1006044a008363289c16bb6a5"> 150</a></span>&#160;<span class="preprocessor">#define AC_EVCTRL_MASK _U_(0x3313) </span></div>
<div class="line"><a name="l00152"></a><span class="lineno"> 152</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AC_INTENCLR : (AC Offset: 0x04) (R/W 8) Interrupt Enable Clear -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00153"></a><span class="lineno"> 153</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00154"></a><span class="lineno"><a class="line" href="unionAC__INTENCLR__Type.html"> 154</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00155"></a><span class="lineno"> 155</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00156"></a><span class="lineno"><a class="line" href="unionAC__INTENCLR__Type.html#a19bd605e4a259f63839a819c484ae925"> 156</a></span>&#160; uint8_t <a class="code" href="unionAC__INTENCLR__Type.html#a19bd605e4a259f63839a819c484ae925">COMP0</a>:1; </div>
<div class="line"><a name="l00157"></a><span class="lineno"><a class="line" href="unionAC__INTENCLR__Type.html#a77caac22c3b30a179a8f395907220e94"> 157</a></span>&#160; uint8_t <a class="code" href="unionAC__INTENCLR__Type.html#a77caac22c3b30a179a8f395907220e94">COMP1</a>:1; </div>
<div class="line"><a name="l00158"></a><span class="lineno"><a class="line" href="unionAC__INTENCLR__Type.html#a9ca415e1a3eda4afa909b10c36de906b"> 158</a></span>&#160; uint8_t :2; </div>
<div class="line"><a name="l00159"></a><span class="lineno"><a class="line" href="unionAC__INTENCLR__Type.html#aa0138a6b5c6c745c76b4e59b9b2b4f47"> 159</a></span>&#160; uint8_t <a class="code" href="unionAC__INTENCLR__Type.html#aa0138a6b5c6c745c76b4e59b9b2b4f47">WIN0</a>:1; </div>
<div class="line"><a name="l00160"></a><span class="lineno"><a class="line" href="unionAC__INTENCLR__Type.html#a1b181c6b459f0500236c7537a86690c0"> 160</a></span>&#160; uint8_t :3; </div>
<div class="line"><a name="l00161"></a><span class="lineno"><a class="line" href="unionAC__INTENCLR__Type.html#a402fb806a15cb9c231329cd1a90936de"> 161</a></span>&#160; } bit; </div>
<div class="line"><a name="l00162"></a><span class="lineno"> 162</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00163"></a><span class="lineno"><a class="line" href="unionAC__INTENCLR__Type.html#a9576a4c3d508394435e1986d4b08415f"> 163</a></span>&#160; uint8_t <a class="code" href="unionAC__INTENCLR__Type.html#a9576a4c3d508394435e1986d4b08415f">COMP</a>:2; </div>
<div class="line"><a name="l00164"></a><span class="lineno"> 164</span>&#160; uint8_t :2; </div>
<div class="line"><a name="l00165"></a><span class="lineno"><a class="line" href="unionAC__INTENCLR__Type.html#a6552dbc0a8e405aaa50d1da95a81baa7"> 165</a></span>&#160; uint8_t <a class="code" href="unionAC__INTENCLR__Type.html#a6552dbc0a8e405aaa50d1da95a81baa7">WIN</a>:1; </div>
<div class="line"><a name="l00166"></a><span class="lineno"> 166</span>&#160; uint8_t :3; </div>
<div class="line"><a name="l00167"></a><span class="lineno"><a class="line" href="unionAC__INTENCLR__Type.html#addf2c8687dab3d50d3d1c93270d97bdf"> 167</a></span>&#160; } vec; </div>
<div class="line"><a name="l00168"></a><span class="lineno"><a class="line" href="unionAC__INTENCLR__Type.html#a63e79491ef9af2be69a99ba6a19b2444"> 168</a></span>&#160; uint8_t <a class="code" href="unionAC__INTENCLR__Type.html#a63e79491ef9af2be69a99ba6a19b2444">reg</a>; </div>
<div class="line"><a name="l00169"></a><span class="lineno"> 169</span>&#160;} <a class="code" href="unionAC__INTENCLR__Type.html">AC_INTENCLR_Type</a>;</div>
<div class="line"><a name="l00170"></a><span class="lineno"> 170</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00171"></a><span class="lineno"> 171</span>&#160; </div>
<div class="line"><a name="l00172"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#ad6b968b57c8516a8820878fd349e0d3c"> 172</a></span>&#160;<span class="preprocessor">#define AC_INTENCLR_OFFSET 0x04 </span></div>
<div class="line"><a name="l00173"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#aa39f9b02199c37ef041fc8e0d31e231d"> 173</a></span>&#160;<span class="preprocessor">#define AC_INTENCLR_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00175"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a4168c6a55362a465c232cdfae855edb6"> 175</a></span>&#160;<span class="preprocessor">#define AC_INTENCLR_COMP0_Pos 0 </span></div>
<div class="line"><a name="l00176"></a><span class="lineno"> 176</span>&#160;<span class="preprocessor">#define AC_INTENCLR_COMP0 (_U_(1) &lt;&lt; AC_INTENCLR_COMP0_Pos)</span></div>
<div class="line"><a name="l00177"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#ae1f585c9c3dfbbcbb14748de3d028334"> 177</a></span>&#160;<span class="preprocessor">#define AC_INTENCLR_COMP1_Pos 1 </span></div>
<div class="line"><a name="l00178"></a><span class="lineno"> 178</span>&#160;<span class="preprocessor">#define AC_INTENCLR_COMP1 (_U_(1) &lt;&lt; AC_INTENCLR_COMP1_Pos)</span></div>
<div class="line"><a name="l00179"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a444b400feaaa1e25e0626635cfdf1144"> 179</a></span>&#160;<span class="preprocessor">#define AC_INTENCLR_COMP_Pos 0 </span></div>
<div class="line"><a name="l00180"></a><span class="lineno"> 180</span>&#160;<span class="preprocessor">#define AC_INTENCLR_COMP_Msk (_U_(0x3) &lt;&lt; AC_INTENCLR_COMP_Pos)</span></div>
<div class="line"><a name="l00181"></a><span class="lineno"> 181</span>&#160;<span class="preprocessor">#define AC_INTENCLR_COMP(value) (AC_INTENCLR_COMP_Msk &amp; ((value) &lt;&lt; AC_INTENCLR_COMP_Pos))</span></div>
<div class="line"><a name="l00182"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a8743138d490de623c23681827c5f9ed7"> 182</a></span>&#160;<span class="preprocessor">#define AC_INTENCLR_WIN0_Pos 4 </span></div>
<div class="line"><a name="l00183"></a><span class="lineno"> 183</span>&#160;<span class="preprocessor">#define AC_INTENCLR_WIN0 (_U_(1) &lt;&lt; AC_INTENCLR_WIN0_Pos)</span></div>
<div class="line"><a name="l00184"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a0db0a40e376eff9df159115da9de0920"> 184</a></span>&#160;<span class="preprocessor">#define AC_INTENCLR_WIN_Pos 4 </span></div>
<div class="line"><a name="l00185"></a><span class="lineno"> 185</span>&#160;<span class="preprocessor">#define AC_INTENCLR_WIN_Msk (_U_(0x1) &lt;&lt; AC_INTENCLR_WIN_Pos)</span></div>
<div class="line"><a name="l00186"></a><span class="lineno"> 186</span>&#160;<span class="preprocessor">#define AC_INTENCLR_WIN(value) (AC_INTENCLR_WIN_Msk &amp; ((value) &lt;&lt; AC_INTENCLR_WIN_Pos))</span></div>
<div class="line"><a name="l00187"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a9c1df17ec7ebc764d76c0432181c94a2"> 187</a></span>&#160;<span class="preprocessor">#define AC_INTENCLR_MASK _U_(0x13) </span></div>
<div class="line"><a name="l00189"></a><span class="lineno"> 189</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AC_INTENSET : (AC Offset: 0x05) (R/W 8) Interrupt Enable Set -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00190"></a><span class="lineno"> 190</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00191"></a><span class="lineno"><a class="line" href="unionAC__INTENSET__Type.html"> 191</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00192"></a><span class="lineno"> 192</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00193"></a><span class="lineno"><a class="line" href="unionAC__INTENSET__Type.html#a8142ae02fea535b70e28e5f5846b276b"> 193</a></span>&#160; uint8_t <a class="code" href="unionAC__INTENSET__Type.html#a8142ae02fea535b70e28e5f5846b276b">COMP0</a>:1; </div>
<div class="line"><a name="l00194"></a><span class="lineno"><a class="line" href="unionAC__INTENSET__Type.html#ae40a778d0f2e270a2c9cc98daa12fdea"> 194</a></span>&#160; uint8_t <a class="code" href="unionAC__INTENSET__Type.html#ae40a778d0f2e270a2c9cc98daa12fdea">COMP1</a>:1; </div>
<div class="line"><a name="l00195"></a><span class="lineno"><a class="line" href="unionAC__INTENSET__Type.html#aaaf1d8d13d50cab2970e28b594a60b13"> 195</a></span>&#160; uint8_t :2; </div>
<div class="line"><a name="l00196"></a><span class="lineno"><a class="line" href="unionAC__INTENSET__Type.html#a39873288bd0e9d091d0ae83d396d24da"> 196</a></span>&#160; uint8_t <a class="code" href="unionAC__INTENSET__Type.html#a39873288bd0e9d091d0ae83d396d24da">WIN0</a>:1; </div>
<div class="line"><a name="l00197"></a><span class="lineno"><a class="line" href="unionAC__INTENSET__Type.html#ad08b6bc75a2a3c4fb06ce5639ba51aef"> 197</a></span>&#160; uint8_t :3; </div>
<div class="line"><a name="l00198"></a><span class="lineno"><a class="line" href="unionAC__INTENSET__Type.html#aa7c0870931e9774112020556306dcc2c"> 198</a></span>&#160; } bit; </div>
<div class="line"><a name="l00199"></a><span class="lineno"> 199</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00200"></a><span class="lineno"><a class="line" href="unionAC__INTENSET__Type.html#a42e5f855d701ade3ba8bd54b11f80a80"> 200</a></span>&#160; uint8_t <a class="code" href="unionAC__INTENSET__Type.html#a42e5f855d701ade3ba8bd54b11f80a80">COMP</a>:2; </div>
<div class="line"><a name="l00201"></a><span class="lineno"> 201</span>&#160; uint8_t :2; </div>
<div class="line"><a name="l00202"></a><span class="lineno"><a class="line" href="unionAC__INTENSET__Type.html#a15d52e6fc36216e401abb8029b2fdf54"> 202</a></span>&#160; uint8_t <a class="code" href="unionAC__INTENSET__Type.html#a15d52e6fc36216e401abb8029b2fdf54">WIN</a>:1; </div>
<div class="line"><a name="l00203"></a><span class="lineno"> 203</span>&#160; uint8_t :3; </div>
<div class="line"><a name="l00204"></a><span class="lineno"><a class="line" href="unionAC__INTENSET__Type.html#a00427d43cf0e8b6d27a85875010b5d8b"> 204</a></span>&#160; } vec; </div>
<div class="line"><a name="l00205"></a><span class="lineno"><a class="line" href="unionAC__INTENSET__Type.html#a4da1edfb85054d040062f34a65d86fd1"> 205</a></span>&#160; uint8_t <a class="code" href="unionAC__INTENSET__Type.html#a4da1edfb85054d040062f34a65d86fd1">reg</a>; </div>
<div class="line"><a name="l00206"></a><span class="lineno"> 206</span>&#160;} <a class="code" href="unionAC__INTENSET__Type.html">AC_INTENSET_Type</a>;</div>
<div class="line"><a name="l00207"></a><span class="lineno"> 207</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00208"></a><span class="lineno"> 208</span>&#160; </div>
<div class="line"><a name="l00209"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#ace22713b52e7875bc9d364ff71821f03"> 209</a></span>&#160;<span class="preprocessor">#define AC_INTENSET_OFFSET 0x05 </span></div>
<div class="line"><a name="l00210"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a567ae9819bd9349410623b23b8cc04e8"> 210</a></span>&#160;<span class="preprocessor">#define AC_INTENSET_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00212"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a165b37facbcb1af2c424f505995a98c5"> 212</a></span>&#160;<span class="preprocessor">#define AC_INTENSET_COMP0_Pos 0 </span></div>
<div class="line"><a name="l00213"></a><span class="lineno"> 213</span>&#160;<span class="preprocessor">#define AC_INTENSET_COMP0 (_U_(1) &lt;&lt; AC_INTENSET_COMP0_Pos)</span></div>
<div class="line"><a name="l00214"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#affb9e6ec2b081b05fe380f0a8bc71b03"> 214</a></span>&#160;<span class="preprocessor">#define AC_INTENSET_COMP1_Pos 1 </span></div>
<div class="line"><a name="l00215"></a><span class="lineno"> 215</span>&#160;<span class="preprocessor">#define AC_INTENSET_COMP1 (_U_(1) &lt;&lt; AC_INTENSET_COMP1_Pos)</span></div>
<div class="line"><a name="l00216"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a2b61c7a2be4d8dac26ce19d694a91b60"> 216</a></span>&#160;<span class="preprocessor">#define AC_INTENSET_COMP_Pos 0 </span></div>
<div class="line"><a name="l00217"></a><span class="lineno"> 217</span>&#160;<span class="preprocessor">#define AC_INTENSET_COMP_Msk (_U_(0x3) &lt;&lt; AC_INTENSET_COMP_Pos)</span></div>
<div class="line"><a name="l00218"></a><span class="lineno"> 218</span>&#160;<span class="preprocessor">#define AC_INTENSET_COMP(value) (AC_INTENSET_COMP_Msk &amp; ((value) &lt;&lt; AC_INTENSET_COMP_Pos))</span></div>
<div class="line"><a name="l00219"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#ac6e5dbfd1035305c4817fa3da1f1f338"> 219</a></span>&#160;<span class="preprocessor">#define AC_INTENSET_WIN0_Pos 4 </span></div>
<div class="line"><a name="l00220"></a><span class="lineno"> 220</span>&#160;<span class="preprocessor">#define AC_INTENSET_WIN0 (_U_(1) &lt;&lt; AC_INTENSET_WIN0_Pos)</span></div>
<div class="line"><a name="l00221"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a4e44fa65ab29f61ec05f25c67c2f8f25"> 221</a></span>&#160;<span class="preprocessor">#define AC_INTENSET_WIN_Pos 4 </span></div>
<div class="line"><a name="l00222"></a><span class="lineno"> 222</span>&#160;<span class="preprocessor">#define AC_INTENSET_WIN_Msk (_U_(0x1) &lt;&lt; AC_INTENSET_WIN_Pos)</span></div>
<div class="line"><a name="l00223"></a><span class="lineno"> 223</span>&#160;<span class="preprocessor">#define AC_INTENSET_WIN(value) (AC_INTENSET_WIN_Msk &amp; ((value) &lt;&lt; AC_INTENSET_WIN_Pos))</span></div>
<div class="line"><a name="l00224"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a6eb6eed878938f2a3a5dc2b0bc7c1cb7"> 224</a></span>&#160;<span class="preprocessor">#define AC_INTENSET_MASK _U_(0x13) </span></div>
<div class="line"><a name="l00226"></a><span class="lineno"> 226</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AC_INTFLAG : (AC Offset: 0x06) (R/W 8) Interrupt Flag Status and Clear -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00227"></a><span class="lineno"> 227</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00228"></a><span class="lineno"><a class="line" href="unionAC__INTFLAG__Type.html"> 228</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{ <span class="comment">// __I to avoid read-modify-write on write-to-clear register</span></div>
<div class="line"><a name="l00229"></a><span class="lineno"> 229</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00230"></a><span class="lineno"><a class="line" href="unionAC__INTFLAG__Type.html#a353bd26947fa5d90c75d8d848823b499"> 230</a></span>&#160; __I uint8_t <a class="code" href="unionAC__INTFLAG__Type.html#a353bd26947fa5d90c75d8d848823b499">COMP0</a>:1; </div>
<div class="line"><a name="l00231"></a><span class="lineno"><a class="line" href="unionAC__INTFLAG__Type.html#a476c42bc7087402bcd8126347e5fc4c5"> 231</a></span>&#160; __I uint8_t <a class="code" href="unionAC__INTFLAG__Type.html#a476c42bc7087402bcd8126347e5fc4c5">COMP1</a>:1; </div>
<div class="line"><a name="l00232"></a><span class="lineno"><a class="line" href="unionAC__INTFLAG__Type.html#ad58500b89fa5a233363adf0c7d116ee4"> 232</a></span>&#160; __I <a class="code" href="unionAC__INTFLAG__Type.html#ad58500b89fa5a233363adf0c7d116ee4">uint8_t</a> :2; </div>
<div class="line"><a name="l00233"></a><span class="lineno"><a class="line" href="unionAC__INTFLAG__Type.html#a83708cf4e9af92a15d890824bc1ea3a5"> 233</a></span>&#160; __I uint8_t <a class="code" href="unionAC__INTFLAG__Type.html#a83708cf4e9af92a15d890824bc1ea3a5">WIN0</a>:1; </div>
<div class="line"><a name="l00234"></a><span class="lineno"> 234</span>&#160; __I uint8_t :3; </div>
<div class="line"><a name="l00235"></a><span class="lineno"><a class="line" href="unionAC__INTFLAG__Type.html#af99ce7edd3e92444c23de6cd62a3019e"> 235</a></span>&#160; } bit; </div>
<div class="line"><a name="l00236"></a><span class="lineno"> 236</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00237"></a><span class="lineno"><a class="line" href="unionAC__INTFLAG__Type.html#a898036bc7f728751a0414e4391d41cf4"> 237</a></span>&#160; __I uint8_t <a class="code" href="unionAC__INTFLAG__Type.html#a898036bc7f728751a0414e4391d41cf4">COMP</a>:2; </div>
<div class="line"><a name="l00238"></a><span class="lineno"> 238</span>&#160; __I uint8_t :2; </div>
<div class="line"><a name="l00239"></a><span class="lineno"><a class="line" href="unionAC__INTFLAG__Type.html#a389125c1799b8dc8f0c9cf0d2761cb0c"> 239</a></span>&#160; __I uint8_t <a class="code" href="unionAC__INTFLAG__Type.html#a389125c1799b8dc8f0c9cf0d2761cb0c">WIN</a>:1; </div>
<div class="line"><a name="l00240"></a><span class="lineno"> 240</span>&#160; __I uint8_t :3; </div>
<div class="line"><a name="l00241"></a><span class="lineno"><a class="line" href="unionAC__INTFLAG__Type.html#af1a09c11334dfac9dabbec66070c9d83"> 241</a></span>&#160; } vec; </div>
<div class="line"><a name="l00242"></a><span class="lineno"><a class="line" href="unionAC__INTFLAG__Type.html#a5f63bf1df4ff997b6c0e30711301ae35"> 242</a></span>&#160; uint8_t <a class="code" href="unionAC__INTFLAG__Type.html#a5f63bf1df4ff997b6c0e30711301ae35">reg</a>; </div>
<div class="line"><a name="l00243"></a><span class="lineno"> 243</span>&#160;} <a class="code" href="unionAC__INTFLAG__Type.html">AC_INTFLAG_Type</a>;</div>
<div class="line"><a name="l00244"></a><span class="lineno"> 244</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00245"></a><span class="lineno"> 245</span>&#160; </div>
<div class="line"><a name="l00246"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#ae663a8f3156ac7555b109208126e6d66"> 246</a></span>&#160;<span class="preprocessor">#define AC_INTFLAG_OFFSET 0x06 </span></div>
<div class="line"><a name="l00247"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#ab2b31c52d59794ebe58100c5df360881"> 247</a></span>&#160;<span class="preprocessor">#define AC_INTFLAG_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00249"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#abbdc400bbcac3a9c39d34452585974d1"> 249</a></span>&#160;<span class="preprocessor">#define AC_INTFLAG_COMP0_Pos 0 </span></div>
<div class="line"><a name="l00250"></a><span class="lineno"> 250</span>&#160;<span class="preprocessor">#define AC_INTFLAG_COMP0 (_U_(1) &lt;&lt; AC_INTFLAG_COMP0_Pos)</span></div>
<div class="line"><a name="l00251"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#ab160a35daee4074f1fd5921b02c00acb"> 251</a></span>&#160;<span class="preprocessor">#define AC_INTFLAG_COMP1_Pos 1 </span></div>
<div class="line"><a name="l00252"></a><span class="lineno"> 252</span>&#160;<span class="preprocessor">#define AC_INTFLAG_COMP1 (_U_(1) &lt;&lt; AC_INTFLAG_COMP1_Pos)</span></div>
<div class="line"><a name="l00253"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a5ec6d9f6399298e5873a182d7c171cd6"> 253</a></span>&#160;<span class="preprocessor">#define AC_INTFLAG_COMP_Pos 0 </span></div>
<div class="line"><a name="l00254"></a><span class="lineno"> 254</span>&#160;<span class="preprocessor">#define AC_INTFLAG_COMP_Msk (_U_(0x3) &lt;&lt; AC_INTFLAG_COMP_Pos)</span></div>
<div class="line"><a name="l00255"></a><span class="lineno"> 255</span>&#160;<span class="preprocessor">#define AC_INTFLAG_COMP(value) (AC_INTFLAG_COMP_Msk &amp; ((value) &lt;&lt; AC_INTFLAG_COMP_Pos))</span></div>
<div class="line"><a name="l00256"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a9db46160e34e14edd76900fd5f8420f3"> 256</a></span>&#160;<span class="preprocessor">#define AC_INTFLAG_WIN0_Pos 4 </span></div>
<div class="line"><a name="l00257"></a><span class="lineno"> 257</span>&#160;<span class="preprocessor">#define AC_INTFLAG_WIN0 (_U_(1) &lt;&lt; AC_INTFLAG_WIN0_Pos)</span></div>
<div class="line"><a name="l00258"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#ab8feb07a41c8519472bce0d6b09d568d"> 258</a></span>&#160;<span class="preprocessor">#define AC_INTFLAG_WIN_Pos 4 </span></div>
<div class="line"><a name="l00259"></a><span class="lineno"> 259</span>&#160;<span class="preprocessor">#define AC_INTFLAG_WIN_Msk (_U_(0x1) &lt;&lt; AC_INTFLAG_WIN_Pos)</span></div>
<div class="line"><a name="l00260"></a><span class="lineno"> 260</span>&#160;<span class="preprocessor">#define AC_INTFLAG_WIN(value) (AC_INTFLAG_WIN_Msk &amp; ((value) &lt;&lt; AC_INTFLAG_WIN_Pos))</span></div>
<div class="line"><a name="l00261"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a3b147673fba8c46ce42c8825d397964b"> 261</a></span>&#160;<span class="preprocessor">#define AC_INTFLAG_MASK _U_(0x13) </span></div>
<div class="line"><a name="l00263"></a><span class="lineno"> 263</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AC_STATUSA : (AC Offset: 0x07) (R/ 8) Status A -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00264"></a><span class="lineno"> 264</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00265"></a><span class="lineno"><a class="line" href="unionAC__STATUSA__Type.html"> 265</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00266"></a><span class="lineno"> 266</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00267"></a><span class="lineno"><a class="line" href="unionAC__STATUSA__Type.html#aca8e6670ce7505c53de0519c88122fda"> 267</a></span>&#160; uint8_t <a class="code" href="unionAC__STATUSA__Type.html#aca8e6670ce7505c53de0519c88122fda">STATE0</a>:1; </div>
<div class="line"><a name="l00268"></a><span class="lineno"><a class="line" href="unionAC__STATUSA__Type.html#a2a3ce21d0bd3155ed36bb422a079518b"> 268</a></span>&#160; uint8_t <a class="code" href="unionAC__STATUSA__Type.html#a2a3ce21d0bd3155ed36bb422a079518b">STATE1</a>:1; </div>
<div class="line"><a name="l00269"></a><span class="lineno"><a class="line" href="unionAC__STATUSA__Type.html#a045abe85255aacdd8832456f80b740b6"> 269</a></span>&#160; uint8_t :2; </div>
<div class="line"><a name="l00270"></a><span class="lineno"><a class="line" href="unionAC__STATUSA__Type.html#ac8b9a13007924855fee58c699c5762c5"> 270</a></span>&#160; uint8_t <a class="code" href="unionAC__STATUSA__Type.html#ac8b9a13007924855fee58c699c5762c5">WSTATE0</a>:2; </div>
<div class="line"><a name="l00271"></a><span class="lineno"><a class="line" href="unionAC__STATUSA__Type.html#a76b0dda918f11e09041616195d76db6b"> 271</a></span>&#160; uint8_t :2; </div>
<div class="line"><a name="l00272"></a><span class="lineno"><a class="line" href="unionAC__STATUSA__Type.html#ae9c2555ea478a0bf65282dbb1cb2d264"> 272</a></span>&#160; } bit; </div>
<div class="line"><a name="l00273"></a><span class="lineno"> 273</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00274"></a><span class="lineno"><a class="line" href="unionAC__STATUSA__Type.html#a6e72d715598dca97b6d250da54fde40c"> 274</a></span>&#160; uint8_t <a class="code" href="unionAC__STATUSA__Type.html#a6e72d715598dca97b6d250da54fde40c">STATE</a>:2; </div>
<div class="line"><a name="l00275"></a><span class="lineno"> 275</span>&#160; uint8_t :6; </div>
<div class="line"><a name="l00276"></a><span class="lineno"><a class="line" href="unionAC__STATUSA__Type.html#a1b1a5587c0142555558c299711de6885"> 276</a></span>&#160; } vec; </div>
<div class="line"><a name="l00277"></a><span class="lineno"><a class="line" href="unionAC__STATUSA__Type.html#aafc204d5f99edf223fe6182171df9e78"> 277</a></span>&#160; uint8_t <a class="code" href="unionAC__STATUSA__Type.html#aafc204d5f99edf223fe6182171df9e78">reg</a>; </div>
<div class="line"><a name="l00278"></a><span class="lineno"> 278</span>&#160;} <a class="code" href="unionAC__STATUSA__Type.html">AC_STATUSA_Type</a>;</div>
<div class="line"><a name="l00279"></a><span class="lineno"> 279</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00280"></a><span class="lineno"> 280</span>&#160; </div>
<div class="line"><a name="l00281"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a7357f0e4cff320ccdcfce8cfa4446590"> 281</a></span>&#160;<span class="preprocessor">#define AC_STATUSA_OFFSET 0x07 </span></div>
<div class="line"><a name="l00282"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a1d0c5a8f06130ee70400f50068aa162a"> 282</a></span>&#160;<span class="preprocessor">#define AC_STATUSA_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00284"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#ae23aae3cd17aca60cfa3046da6f432c0"> 284</a></span>&#160;<span class="preprocessor">#define AC_STATUSA_STATE0_Pos 0 </span></div>
<div class="line"><a name="l00285"></a><span class="lineno"> 285</span>&#160;<span class="preprocessor">#define AC_STATUSA_STATE0 (_U_(1) &lt;&lt; AC_STATUSA_STATE0_Pos)</span></div>
<div class="line"><a name="l00286"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#aa15668b5c57b09a6b65cab3c19bef8e5"> 286</a></span>&#160;<span class="preprocessor">#define AC_STATUSA_STATE1_Pos 1 </span></div>
<div class="line"><a name="l00287"></a><span class="lineno"> 287</span>&#160;<span class="preprocessor">#define AC_STATUSA_STATE1 (_U_(1) &lt;&lt; AC_STATUSA_STATE1_Pos)</span></div>
<div class="line"><a name="l00288"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#ac205365550f29571c942656a16ca58f6"> 288</a></span>&#160;<span class="preprocessor">#define AC_STATUSA_STATE_Pos 0 </span></div>
<div class="line"><a name="l00289"></a><span class="lineno"> 289</span>&#160;<span class="preprocessor">#define AC_STATUSA_STATE_Msk (_U_(0x3) &lt;&lt; AC_STATUSA_STATE_Pos)</span></div>
<div class="line"><a name="l00290"></a><span class="lineno"> 290</span>&#160;<span class="preprocessor">#define AC_STATUSA_STATE(value) (AC_STATUSA_STATE_Msk &amp; ((value) &lt;&lt; AC_STATUSA_STATE_Pos))</span></div>
<div class="line"><a name="l00291"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a1339364deea09e22e0aa9d6cc65e9548"> 291</a></span>&#160;<span class="preprocessor">#define AC_STATUSA_WSTATE0_Pos 4 </span></div>
<div class="line"><a name="l00292"></a><span class="lineno"> 292</span>&#160;<span class="preprocessor">#define AC_STATUSA_WSTATE0_Msk (_U_(0x3) &lt;&lt; AC_STATUSA_WSTATE0_Pos)</span></div>
<div class="line"><a name="l00293"></a><span class="lineno"> 293</span>&#160;<span class="preprocessor">#define AC_STATUSA_WSTATE0(value) (AC_STATUSA_WSTATE0_Msk &amp; ((value) &lt;&lt; AC_STATUSA_WSTATE0_Pos))</span></div>
<div class="line"><a name="l00294"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a5d68a94c071ee73a4849497dfc57f3a0"> 294</a></span>&#160;<span class="preprocessor">#define AC_STATUSA_WSTATE0_ABOVE_Val _U_(0x0) </span></div>
<div class="line"><a name="l00295"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a98fe4b3c6fd307062f3a7e2c5709bc78"> 295</a></span>&#160;<span class="preprocessor">#define AC_STATUSA_WSTATE0_INSIDE_Val _U_(0x1) </span></div>
<div class="line"><a name="l00296"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a7481f1780b3d9ee3f4bb5a35e63e4782"> 296</a></span>&#160;<span class="preprocessor">#define AC_STATUSA_WSTATE0_BELOW_Val _U_(0x2) </span></div>
<div class="line"><a name="l00297"></a><span class="lineno"> 297</span>&#160;<span class="preprocessor">#define AC_STATUSA_WSTATE0_ABOVE (AC_STATUSA_WSTATE0_ABOVE_Val &lt;&lt; AC_STATUSA_WSTATE0_Pos)</span></div>
<div class="line"><a name="l00298"></a><span class="lineno"> 298</span>&#160;<span class="preprocessor">#define AC_STATUSA_WSTATE0_INSIDE (AC_STATUSA_WSTATE0_INSIDE_Val &lt;&lt; AC_STATUSA_WSTATE0_Pos)</span></div>
<div class="line"><a name="l00299"></a><span class="lineno"> 299</span>&#160;<span class="preprocessor">#define AC_STATUSA_WSTATE0_BELOW (AC_STATUSA_WSTATE0_BELOW_Val &lt;&lt; AC_STATUSA_WSTATE0_Pos)</span></div>
<div class="line"><a name="l00300"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a85081ed7ee5f3dd1a625b6e4aff72be5"> 300</a></span>&#160;<span class="preprocessor">#define AC_STATUSA_MASK _U_(0x33) </span></div>
<div class="line"><a name="l00302"></a><span class="lineno"> 302</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AC_STATUSB : (AC Offset: 0x08) (R/ 8) Status B -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00303"></a><span class="lineno"> 303</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00304"></a><span class="lineno"><a class="line" href="unionAC__STATUSB__Type.html"> 304</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00305"></a><span class="lineno"> 305</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00306"></a><span class="lineno"><a class="line" href="unionAC__STATUSB__Type.html#a8824f2b68d7416b63ba3801b9c7058e9"> 306</a></span>&#160; uint8_t <a class="code" href="unionAC__STATUSB__Type.html#a8824f2b68d7416b63ba3801b9c7058e9">READY0</a>:1; </div>
<div class="line"><a name="l00307"></a><span class="lineno"><a class="line" href="unionAC__STATUSB__Type.html#af62af0387d980f78fb5f370bfd4724fb"> 307</a></span>&#160; uint8_t <a class="code" href="unionAC__STATUSB__Type.html#af62af0387d980f78fb5f370bfd4724fb">READY1</a>:1; </div>
<div class="line"><a name="l00308"></a><span class="lineno"><a class="line" href="unionAC__STATUSB__Type.html#a18491fb33b70f3700a4538023d610e3d"> 308</a></span>&#160; uint8_t :6; </div>
<div class="line"><a name="l00309"></a><span class="lineno"><a class="line" href="unionAC__STATUSB__Type.html#acdb72a5df49443100c71cba8b817154b"> 309</a></span>&#160; } bit; </div>
<div class="line"><a name="l00310"></a><span class="lineno"> 310</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00311"></a><span class="lineno"><a class="line" href="unionAC__STATUSB__Type.html#a25df121d8933b26079d8697c479cfdc4"> 311</a></span>&#160; uint8_t <a class="code" href="unionAC__STATUSB__Type.html#a25df121d8933b26079d8697c479cfdc4">READY</a>:2; </div>
<div class="line"><a name="l00312"></a><span class="lineno"> 312</span>&#160; uint8_t :6; </div>
<div class="line"><a name="l00313"></a><span class="lineno"><a class="line" href="unionAC__STATUSB__Type.html#abcc0f911db168ccfe031b653712bdc0a"> 313</a></span>&#160; } vec; </div>
<div class="line"><a name="l00314"></a><span class="lineno"><a class="line" href="unionAC__STATUSB__Type.html#a0896ac0096e3e0a7c3ffb99e15f78677"> 314</a></span>&#160; uint8_t <a class="code" href="unionAC__STATUSB__Type.html#a0896ac0096e3e0a7c3ffb99e15f78677">reg</a>; </div>
<div class="line"><a name="l00315"></a><span class="lineno"> 315</span>&#160;} <a class="code" href="unionAC__STATUSB__Type.html">AC_STATUSB_Type</a>;</div>
<div class="line"><a name="l00316"></a><span class="lineno"> 316</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00317"></a><span class="lineno"> 317</span>&#160; </div>
<div class="line"><a name="l00318"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a61e64bbbcd8d070e127dc143ac1badf7"> 318</a></span>&#160;<span class="preprocessor">#define AC_STATUSB_OFFSET 0x08 </span></div>
<div class="line"><a name="l00319"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a35348c0f09306ec32f756769f1c8544b"> 319</a></span>&#160;<span class="preprocessor">#define AC_STATUSB_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00321"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a0d6d9dbdd414988aaf79e423983fc8a0"> 321</a></span>&#160;<span class="preprocessor">#define AC_STATUSB_READY0_Pos 0 </span></div>
<div class="line"><a name="l00322"></a><span class="lineno"> 322</span>&#160;<span class="preprocessor">#define AC_STATUSB_READY0 (_U_(1) &lt;&lt; AC_STATUSB_READY0_Pos)</span></div>
<div class="line"><a name="l00323"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#ac6991f3944dc31c5897b9fef7107b25d"> 323</a></span>&#160;<span class="preprocessor">#define AC_STATUSB_READY1_Pos 1 </span></div>
<div class="line"><a name="l00324"></a><span class="lineno"> 324</span>&#160;<span class="preprocessor">#define AC_STATUSB_READY1 (_U_(1) &lt;&lt; AC_STATUSB_READY1_Pos)</span></div>
<div class="line"><a name="l00325"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a97f22583e9717be73effe4c24a88d435"> 325</a></span>&#160;<span class="preprocessor">#define AC_STATUSB_READY_Pos 0 </span></div>
<div class="line"><a name="l00326"></a><span class="lineno"> 326</span>&#160;<span class="preprocessor">#define AC_STATUSB_READY_Msk (_U_(0x3) &lt;&lt; AC_STATUSB_READY_Pos)</span></div>
<div class="line"><a name="l00327"></a><span class="lineno"> 327</span>&#160;<span class="preprocessor">#define AC_STATUSB_READY(value) (AC_STATUSB_READY_Msk &amp; ((value) &lt;&lt; AC_STATUSB_READY_Pos))</span></div>
<div class="line"><a name="l00328"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a4e32c46f408ba606dc303acdd3e4e546"> 328</a></span>&#160;<span class="preprocessor">#define AC_STATUSB_MASK _U_(0x03) </span></div>
<div class="line"><a name="l00330"></a><span class="lineno"> 330</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AC_DBGCTRL : (AC Offset: 0x09) (R/W 8) Debug Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00331"></a><span class="lineno"> 331</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00332"></a><span class="lineno"><a class="line" href="unionAC__DBGCTRL__Type.html"> 332</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00333"></a><span class="lineno"> 333</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00334"></a><span class="lineno"><a class="line" href="unionAC__DBGCTRL__Type.html#a6ecc7ace6ccdaff93e210bc5f06bae1b"> 334</a></span>&#160; uint8_t <a class="code" href="unionAC__DBGCTRL__Type.html#a6ecc7ace6ccdaff93e210bc5f06bae1b">DBGRUN</a>:1; </div>
<div class="line"><a name="l00335"></a><span class="lineno"><a class="line" href="unionAC__DBGCTRL__Type.html#a4ab369451a99e7c69676757dd73eb02c"> 335</a></span>&#160; uint8_t :7; </div>
<div class="line"><a name="l00336"></a><span class="lineno"><a class="line" href="unionAC__DBGCTRL__Type.html#aee427e2ce889ffcb6a0305cbfb47ac61"> 336</a></span>&#160; } bit; </div>
<div class="line"><a name="l00337"></a><span class="lineno"><a class="line" href="unionAC__DBGCTRL__Type.html#aa8ab552df384f072ba1bfeb0d07ae92d"> 337</a></span>&#160; uint8_t <a class="code" href="unionAC__DBGCTRL__Type.html#aa8ab552df384f072ba1bfeb0d07ae92d">reg</a>; </div>
<div class="line"><a name="l00338"></a><span class="lineno"> 338</span>&#160;} <a class="code" href="unionAC__DBGCTRL__Type.html">AC_DBGCTRL_Type</a>;</div>
<div class="line"><a name="l00339"></a><span class="lineno"> 339</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00340"></a><span class="lineno"> 340</span>&#160; </div>
<div class="line"><a name="l00341"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a69363893cfacb917641cebeda802c472"> 341</a></span>&#160;<span class="preprocessor">#define AC_DBGCTRL_OFFSET 0x09 </span></div>
<div class="line"><a name="l00342"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a28fb1da99e1b90257b2781ccfa96444b"> 342</a></span>&#160;<span class="preprocessor">#define AC_DBGCTRL_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00344"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#adbf4394f54e90e39f863e9c8662c0f5e"> 344</a></span>&#160;<span class="preprocessor">#define AC_DBGCTRL_DBGRUN_Pos 0 </span></div>
<div class="line"><a name="l00345"></a><span class="lineno"> 345</span>&#160;<span class="preprocessor">#define AC_DBGCTRL_DBGRUN (_U_(0x1) &lt;&lt; AC_DBGCTRL_DBGRUN_Pos)</span></div>
<div class="line"><a name="l00346"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#aa892616a52af86d5390677c339647575"> 346</a></span>&#160;<span class="preprocessor">#define AC_DBGCTRL_MASK _U_(0x01) </span></div>
<div class="line"><a name="l00348"></a><span class="lineno"> 348</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AC_WINCTRL : (AC Offset: 0x0A) (R/W 8) Window Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00349"></a><span class="lineno"> 349</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00350"></a><span class="lineno"><a class="line" href="unionAC__WINCTRL__Type.html"> 350</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00351"></a><span class="lineno"> 351</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00352"></a><span class="lineno"><a class="line" href="unionAC__WINCTRL__Type.html#a72a4c9afb389393cb713615978a7813f"> 352</a></span>&#160; uint8_t <a class="code" href="unionAC__WINCTRL__Type.html#a72a4c9afb389393cb713615978a7813f">WEN0</a>:1; </div>
<div class="line"><a name="l00353"></a><span class="lineno"><a class="line" href="unionAC__WINCTRL__Type.html#a4c5609462535a1c98e79acb0526f0eae"> 353</a></span>&#160; uint8_t <a class="code" href="unionAC__WINCTRL__Type.html#a4c5609462535a1c98e79acb0526f0eae">WINTSEL0</a>:2; </div>
<div class="line"><a name="l00354"></a><span class="lineno"><a class="line" href="unionAC__WINCTRL__Type.html#ac56f61cb71dd3f1dd04c6377f36b06bf"> 354</a></span>&#160; uint8_t :5; </div>
<div class="line"><a name="l00355"></a><span class="lineno"><a class="line" href="unionAC__WINCTRL__Type.html#af67c74a9ce7fa91a0596e072445180f7"> 355</a></span>&#160; } bit; </div>
<div class="line"><a name="l00356"></a><span class="lineno"><a class="line" href="unionAC__WINCTRL__Type.html#a490f80fdbd4ca4de30969c9e862efe0c"> 356</a></span>&#160; uint8_t <a class="code" href="unionAC__WINCTRL__Type.html#a490f80fdbd4ca4de30969c9e862efe0c">reg</a>; </div>
<div class="line"><a name="l00357"></a><span class="lineno"> 357</span>&#160;} <a class="code" href="unionAC__WINCTRL__Type.html">AC_WINCTRL_Type</a>;</div>
<div class="line"><a name="l00358"></a><span class="lineno"> 358</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00359"></a><span class="lineno"> 359</span>&#160; </div>
<div class="line"><a name="l00360"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a7075f883b140c498d62e6de94e22f975"> 360</a></span>&#160;<span class="preprocessor">#define AC_WINCTRL_OFFSET 0x0A </span></div>
<div class="line"><a name="l00361"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#aef191946603b0aebaf28aebcc5331ce8"> 361</a></span>&#160;<span class="preprocessor">#define AC_WINCTRL_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00363"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#ab5ded8b8be62ba307c7df588787f6754"> 363</a></span>&#160;<span class="preprocessor">#define AC_WINCTRL_WEN0_Pos 0 </span></div>
<div class="line"><a name="l00364"></a><span class="lineno"> 364</span>&#160;<span class="preprocessor">#define AC_WINCTRL_WEN0 (_U_(0x1) &lt;&lt; AC_WINCTRL_WEN0_Pos)</span></div>
<div class="line"><a name="l00365"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#af7bc05aa7122fff6ea05ae690cbc8486"> 365</a></span>&#160;<span class="preprocessor">#define AC_WINCTRL_WINTSEL0_Pos 1 </span></div>
<div class="line"><a name="l00366"></a><span class="lineno"> 366</span>&#160;<span class="preprocessor">#define AC_WINCTRL_WINTSEL0_Msk (_U_(0x3) &lt;&lt; AC_WINCTRL_WINTSEL0_Pos)</span></div>
<div class="line"><a name="l00367"></a><span class="lineno"> 367</span>&#160;<span class="preprocessor">#define AC_WINCTRL_WINTSEL0(value) (AC_WINCTRL_WINTSEL0_Msk &amp; ((value) &lt;&lt; AC_WINCTRL_WINTSEL0_Pos))</span></div>
<div class="line"><a name="l00368"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a4e693526712b2cfcabdab157f1f8be71"> 368</a></span>&#160;<span class="preprocessor">#define AC_WINCTRL_WINTSEL0_ABOVE_Val _U_(0x0) </span></div>
<div class="line"><a name="l00369"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a68bafe85eeb71ce0ce83d48a51cb95f6"> 369</a></span>&#160;<span class="preprocessor">#define AC_WINCTRL_WINTSEL0_INSIDE_Val _U_(0x1) </span></div>
<div class="line"><a name="l00370"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#ab989630a135aae7f20d8d1161fae744a"> 370</a></span>&#160;<span class="preprocessor">#define AC_WINCTRL_WINTSEL0_BELOW_Val _U_(0x2) </span></div>
<div class="line"><a name="l00371"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a75d730dac04d0f2fdf146b55d1fe4b7f"> 371</a></span>&#160;<span class="preprocessor">#define AC_WINCTRL_WINTSEL0_OUTSIDE_Val _U_(0x3) </span></div>
<div class="line"><a name="l00372"></a><span class="lineno"> 372</span>&#160;<span class="preprocessor">#define AC_WINCTRL_WINTSEL0_ABOVE (AC_WINCTRL_WINTSEL0_ABOVE_Val &lt;&lt; AC_WINCTRL_WINTSEL0_Pos)</span></div>
<div class="line"><a name="l00373"></a><span class="lineno"> 373</span>&#160;<span class="preprocessor">#define AC_WINCTRL_WINTSEL0_INSIDE (AC_WINCTRL_WINTSEL0_INSIDE_Val &lt;&lt; AC_WINCTRL_WINTSEL0_Pos)</span></div>
<div class="line"><a name="l00374"></a><span class="lineno"> 374</span>&#160;<span class="preprocessor">#define AC_WINCTRL_WINTSEL0_BELOW (AC_WINCTRL_WINTSEL0_BELOW_Val &lt;&lt; AC_WINCTRL_WINTSEL0_Pos)</span></div>
<div class="line"><a name="l00375"></a><span class="lineno"> 375</span>&#160;<span class="preprocessor">#define AC_WINCTRL_WINTSEL0_OUTSIDE (AC_WINCTRL_WINTSEL0_OUTSIDE_Val &lt;&lt; AC_WINCTRL_WINTSEL0_Pos)</span></div>
<div class="line"><a name="l00376"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#af99df28572c59d0f3105b754519a1db6"> 376</a></span>&#160;<span class="preprocessor">#define AC_WINCTRL_MASK _U_(0x07) </span></div>
<div class="line"><a name="l00378"></a><span class="lineno"> 378</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AC_SCALER : (AC Offset: 0x0C) (R/W 8) Scaler n -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00379"></a><span class="lineno"> 379</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00380"></a><span class="lineno"><a class="line" href="unionAC__SCALER__Type.html"> 380</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00381"></a><span class="lineno"> 381</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00382"></a><span class="lineno"><a class="line" href="unionAC__SCALER__Type.html#a88f5e429a40283199bcb682c425e8511"> 382</a></span>&#160; uint8_t <a class="code" href="unionAC__SCALER__Type.html#a88f5e429a40283199bcb682c425e8511">VALUE</a>:6; </div>
<div class="line"><a name="l00383"></a><span class="lineno"><a class="line" href="unionAC__SCALER__Type.html#a8f4ba0a3c3f66cd6c674aa89c52128b6"> 383</a></span>&#160; uint8_t :2; </div>
<div class="line"><a name="l00384"></a><span class="lineno"><a class="line" href="unionAC__SCALER__Type.html#abbcf72c4b8db99c6471dbe4c40a45503"> 384</a></span>&#160; } bit; </div>
<div class="line"><a name="l00385"></a><span class="lineno"><a class="line" href="unionAC__SCALER__Type.html#a3b844736f1cb54de918fcc21b3e23de9"> 385</a></span>&#160; uint8_t <a class="code" href="unionAC__SCALER__Type.html#a3b844736f1cb54de918fcc21b3e23de9">reg</a>; </div>
<div class="line"><a name="l00386"></a><span class="lineno"> 386</span>&#160;} <a class="code" href="unionAC__SCALER__Type.html">AC_SCALER_Type</a>;</div>
<div class="line"><a name="l00387"></a><span class="lineno"> 387</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00388"></a><span class="lineno"> 388</span>&#160; </div>
<div class="line"><a name="l00389"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a35b0b56e4247a7e1de9e30ebb621cb3d"> 389</a></span>&#160;<span class="preprocessor">#define AC_SCALER_OFFSET 0x0C </span></div>
<div class="line"><a name="l00390"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a42557feb56a587a53af8fcae1f738d4f"> 390</a></span>&#160;<span class="preprocessor">#define AC_SCALER_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00392"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a1afb18c8a62012c570ed01f711dac8f4"> 392</a></span>&#160;<span class="preprocessor">#define AC_SCALER_VALUE_Pos 0 </span></div>
<div class="line"><a name="l00393"></a><span class="lineno"> 393</span>&#160;<span class="preprocessor">#define AC_SCALER_VALUE_Msk (_U_(0x3F) &lt;&lt; AC_SCALER_VALUE_Pos)</span></div>
<div class="line"><a name="l00394"></a><span class="lineno"> 394</span>&#160;<span class="preprocessor">#define AC_SCALER_VALUE(value) (AC_SCALER_VALUE_Msk &amp; ((value) &lt;&lt; AC_SCALER_VALUE_Pos))</span></div>
<div class="line"><a name="l00395"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#af91bd55c59e267338586cba14d252c31"> 395</a></span>&#160;<span class="preprocessor">#define AC_SCALER_MASK _U_(0x3F) </span></div>
<div class="line"><a name="l00397"></a><span class="lineno"> 397</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AC_COMPCTRL : (AC Offset: 0x10) (R/W 32) Comparator Control n -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00398"></a><span class="lineno"> 398</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00399"></a><span class="lineno"><a class="line" href="unionAC__COMPCTRL__Type.html"> 399</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00400"></a><span class="lineno"> 400</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00401"></a><span class="lineno"><a class="line" href="unionAC__COMPCTRL__Type.html#ace7d1d23775af033f228ca6781f02cc2"> 401</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00402"></a><span class="lineno"><a class="line" href="unionAC__COMPCTRL__Type.html#a15f8af3162ea9033a60d3e3d356c6a56"> 402</a></span>&#160; uint32_t <a class="code" href="unionAC__COMPCTRL__Type.html#a15f8af3162ea9033a60d3e3d356c6a56">ENABLE</a>:1; </div>
<div class="line"><a name="l00403"></a><span class="lineno"><a class="line" href="unionAC__COMPCTRL__Type.html#acb031b1494dbf34f49d344ad918f9357"> 403</a></span>&#160; uint32_t <a class="code" href="unionAC__COMPCTRL__Type.html#acb031b1494dbf34f49d344ad918f9357">SINGLE</a>:1; </div>
<div class="line"><a name="l00404"></a><span class="lineno"><a class="line" href="unionAC__COMPCTRL__Type.html#a95f33ef2691b5cda0fea29595af971a4"> 404</a></span>&#160; uint32_t <a class="code" href="unionAC__COMPCTRL__Type.html#a95f33ef2691b5cda0fea29595af971a4">INTSEL</a>:2; </div>
<div class="line"><a name="l00405"></a><span class="lineno"><a class="line" href="unionAC__COMPCTRL__Type.html#a00323150f58b7d44e156d8f380052be1"> 405</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00406"></a><span class="lineno"><a class="line" href="unionAC__COMPCTRL__Type.html#ae3b3f2b8ddb2c47af63d82664c1c3ea4"> 406</a></span>&#160; uint32_t <a class="code" href="unionAC__COMPCTRL__Type.html#ae3b3f2b8ddb2c47af63d82664c1c3ea4">RUNSTDBY</a>:1; </div>
<div class="line"><a name="l00407"></a><span class="lineno"><a class="line" href="unionAC__COMPCTRL__Type.html#aa0edaba7f23187d3ce19cbdb874406b9"> 407</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00408"></a><span class="lineno"><a class="line" href="unionAC__COMPCTRL__Type.html#a46f2e7662c18b2108a2c8de43c00b39f"> 408</a></span>&#160; uint32_t <a class="code" href="unionAC__COMPCTRL__Type.html#a46f2e7662c18b2108a2c8de43c00b39f">MUXNEG</a>:3; </div>
<div class="line"><a name="l00409"></a><span class="lineno"><a class="line" href="unionAC__COMPCTRL__Type.html#a9185f31b63ef1c37d7ae8f3f628487de"> 409</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00410"></a><span class="lineno"><a class="line" href="unionAC__COMPCTRL__Type.html#aa4274235084b7d672bf0f4c08f214050"> 410</a></span>&#160; uint32_t <a class="code" href="unionAC__COMPCTRL__Type.html#aa4274235084b7d672bf0f4c08f214050">MUXPOS</a>:3; </div>
<div class="line"><a name="l00411"></a><span class="lineno"><a class="line" href="unionAC__COMPCTRL__Type.html#afae8be6944e4719e72b122c4b58025b5"> 411</a></span>&#160; uint32_t <a class="code" href="unionAC__COMPCTRL__Type.html#afae8be6944e4719e72b122c4b58025b5">SWAP</a>:1; </div>
<div class="line"><a name="l00412"></a><span class="lineno"><a class="line" href="unionAC__COMPCTRL__Type.html#a1f7c96647c51593fd749cb5611f4b320"> 412</a></span>&#160; uint32_t <a class="code" href="unionAC__COMPCTRL__Type.html#a1f7c96647c51593fd749cb5611f4b320">SPEED</a>:2; </div>
<div class="line"><a name="l00413"></a><span class="lineno"><a class="line" href="unionAC__COMPCTRL__Type.html#aa85536a651e7f5d7a162b619efd0e178"> 413</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00414"></a><span class="lineno"><a class="line" href="unionAC__COMPCTRL__Type.html#a6f9f071746c46a04cabc33c965d8cdb5"> 414</a></span>&#160; uint32_t <a class="code" href="unionAC__COMPCTRL__Type.html#a6f9f071746c46a04cabc33c965d8cdb5">HYSTEN</a>:1; </div>
<div class="line"><a name="l00415"></a><span class="lineno"><a class="line" href="unionAC__COMPCTRL__Type.html#ab6a2ee44b0ba4da3ce7fc4bc1ba7f78a"> 415</a></span>&#160; uint32_t <a class="code" href="unionAC__COMPCTRL__Type.html#ab6a2ee44b0ba4da3ce7fc4bc1ba7f78a">HYST</a>:2; </div>
<div class="line"><a name="l00416"></a><span class="lineno"><a class="line" href="unionAC__COMPCTRL__Type.html#aa69a3b12ddc186f5c43e61b1fda9dd7c"> 416</a></span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00417"></a><span class="lineno"><a class="line" href="unionAC__COMPCTRL__Type.html#ad0a2a07795535199a9823b0b8acf9e6b"> 417</a></span>&#160; uint32_t <a class="code" href="unionAC__COMPCTRL__Type.html#ad0a2a07795535199a9823b0b8acf9e6b">FLEN</a>:3; </div>
<div class="line"><a name="l00418"></a><span class="lineno"><a class="line" href="unionAC__COMPCTRL__Type.html#a09e4aa1fef664b04d43010ca876008e1"> 418</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00419"></a><span class="lineno"><a class="line" href="unionAC__COMPCTRL__Type.html#a1b15c83fc337723c7dfada178ded5717"> 419</a></span>&#160; uint32_t <a class="code" href="unionAC__COMPCTRL__Type.html#a1b15c83fc337723c7dfada178ded5717">OUT</a>:2; </div>
<div class="line"><a name="l00420"></a><span class="lineno"><a class="line" href="unionAC__COMPCTRL__Type.html#ab8e6255766041fa8580b8cc253ab12c5"> 420</a></span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00421"></a><span class="lineno"><a class="line" href="unionAC__COMPCTRL__Type.html#acb36a7cbb218af2a4efd650f40cc8623"> 421</a></span>&#160; } bit; </div>
<div class="line"><a name="l00422"></a><span class="lineno"><a class="line" href="unionAC__COMPCTRL__Type.html#a76749cc9c2d3bc908b2ea9c1ece23ec3"> 422</a></span>&#160; uint32_t <a class="code" href="unionAC__COMPCTRL__Type.html#a76749cc9c2d3bc908b2ea9c1ece23ec3">reg</a>; </div>
<div class="line"><a name="l00423"></a><span class="lineno"> 423</span>&#160;} <a class="code" href="unionAC__COMPCTRL__Type.html">AC_COMPCTRL_Type</a>;</div>
<div class="line"><a name="l00424"></a><span class="lineno"> 424</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00425"></a><span class="lineno"> 425</span>&#160; </div>
<div class="line"><a name="l00426"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a9adbf00895d91af14908e942640e2e2d"> 426</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_OFFSET 0x10 </span></div>
<div class="line"><a name="l00427"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a7aff9c3d55f6002d210eacea4f433a40"> 427</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00429"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a492935af6daf7ba71e20073cd04c4e79"> 429</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_ENABLE_Pos 1 </span></div>
<div class="line"><a name="l00430"></a><span class="lineno"> 430</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_ENABLE (_U_(0x1) &lt;&lt; AC_COMPCTRL_ENABLE_Pos)</span></div>
<div class="line"><a name="l00431"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#af813cfd0ab476ddfe67bfe59dfe42c2b"> 431</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_SINGLE_Pos 2 </span></div>
<div class="line"><a name="l00432"></a><span class="lineno"> 432</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_SINGLE (_U_(0x1) &lt;&lt; AC_COMPCTRL_SINGLE_Pos)</span></div>
<div class="line"><a name="l00433"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#af17b8514f92bb9fa7999607938ab4994"> 433</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_INTSEL_Pos 3 </span></div>
<div class="line"><a name="l00434"></a><span class="lineno"> 434</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_INTSEL_Msk (_U_(0x3) &lt;&lt; AC_COMPCTRL_INTSEL_Pos)</span></div>
<div class="line"><a name="l00435"></a><span class="lineno"> 435</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_INTSEL(value) (AC_COMPCTRL_INTSEL_Msk &amp; ((value) &lt;&lt; AC_COMPCTRL_INTSEL_Pos))</span></div>
<div class="line"><a name="l00436"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#aea16ed868355094251d2cdf1c1208f98"> 436</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_INTSEL_TOGGLE_Val _U_(0x0) </span></div>
<div class="line"><a name="l00437"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#abeacc3b641a9b183888b92ce7e3361fd"> 437</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_INTSEL_RISING_Val _U_(0x1) </span></div>
<div class="line"><a name="l00438"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a67a517d1951cfe979b43f56a11cebaf0"> 438</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_INTSEL_FALLING_Val _U_(0x2) </span></div>
<div class="line"><a name="l00439"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#ad5b505d36ebe43b2bd56cc421c3f4ff7"> 439</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_INTSEL_EOC_Val _U_(0x3) </span></div>
<div class="line"><a name="l00440"></a><span class="lineno"> 440</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_INTSEL_TOGGLE (AC_COMPCTRL_INTSEL_TOGGLE_Val &lt;&lt; AC_COMPCTRL_INTSEL_Pos)</span></div>
<div class="line"><a name="l00441"></a><span class="lineno"> 441</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_INTSEL_RISING (AC_COMPCTRL_INTSEL_RISING_Val &lt;&lt; AC_COMPCTRL_INTSEL_Pos)</span></div>
<div class="line"><a name="l00442"></a><span class="lineno"> 442</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_INTSEL_FALLING (AC_COMPCTRL_INTSEL_FALLING_Val &lt;&lt; AC_COMPCTRL_INTSEL_Pos)</span></div>
<div class="line"><a name="l00443"></a><span class="lineno"> 443</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_INTSEL_EOC (AC_COMPCTRL_INTSEL_EOC_Val &lt;&lt; AC_COMPCTRL_INTSEL_Pos)</span></div>
<div class="line"><a name="l00444"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a209a69c0a7c751dc9e096044568b9ebd"> 444</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_RUNSTDBY_Pos 6 </span></div>
<div class="line"><a name="l00445"></a><span class="lineno"> 445</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_RUNSTDBY (_U_(0x1) &lt;&lt; AC_COMPCTRL_RUNSTDBY_Pos)</span></div>
<div class="line"><a name="l00446"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#ae66ccdb1fdce71c5b35d4acf2dcd5234"> 446</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXNEG_Pos 8 </span></div>
<div class="line"><a name="l00447"></a><span class="lineno"> 447</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXNEG_Msk (_U_(0x7) &lt;&lt; AC_COMPCTRL_MUXNEG_Pos)</span></div>
<div class="line"><a name="l00448"></a><span class="lineno"> 448</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXNEG(value) (AC_COMPCTRL_MUXNEG_Msk &amp; ((value) &lt;&lt; AC_COMPCTRL_MUXNEG_Pos))</span></div>
<div class="line"><a name="l00449"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a6ac9acc365e62893a521696477b34269"> 449</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXNEG_PIN0_Val _U_(0x0) </span></div>
<div class="line"><a name="l00450"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a873c2d1c95b263a318071d6689addd68"> 450</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXNEG_PIN1_Val _U_(0x1) </span></div>
<div class="line"><a name="l00451"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#aaf2bd6174b14f8ca4bdd9f20ec55e017"> 451</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXNEG_PIN2_Val _U_(0x2) </span></div>
<div class="line"><a name="l00452"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#ac9fa005049fffc6404e5517a25ace420"> 452</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXNEG_PIN3_Val _U_(0x3) </span></div>
<div class="line"><a name="l00453"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a04da0d95ff4ac4513cfca85f607ca882"> 453</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXNEG_GND_Val _U_(0x4) </span></div>
<div class="line"><a name="l00454"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a6c73eec576197476fa0e9ed08bfe24a2"> 454</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXNEG_VSCALE_Val _U_(0x5) </span></div>
<div class="line"><a name="l00455"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#acef3eff54dde36e480ae03d0812de305"> 455</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXNEG_BANDGAP_Val _U_(0x6) </span></div>
<div class="line"><a name="l00456"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a8e6a3e15110f0de0d04e4f3d91025027"> 456</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXNEG_DAC_Val _U_(0x7) </span></div>
<div class="line"><a name="l00457"></a><span class="lineno"> 457</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXNEG_PIN0 (AC_COMPCTRL_MUXNEG_PIN0_Val &lt;&lt; AC_COMPCTRL_MUXNEG_Pos)</span></div>
<div class="line"><a name="l00458"></a><span class="lineno"> 458</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXNEG_PIN1 (AC_COMPCTRL_MUXNEG_PIN1_Val &lt;&lt; AC_COMPCTRL_MUXNEG_Pos)</span></div>
<div class="line"><a name="l00459"></a><span class="lineno"> 459</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXNEG_PIN2 (AC_COMPCTRL_MUXNEG_PIN2_Val &lt;&lt; AC_COMPCTRL_MUXNEG_Pos)</span></div>
<div class="line"><a name="l00460"></a><span class="lineno"> 460</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXNEG_PIN3 (AC_COMPCTRL_MUXNEG_PIN3_Val &lt;&lt; AC_COMPCTRL_MUXNEG_Pos)</span></div>
<div class="line"><a name="l00461"></a><span class="lineno"> 461</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXNEG_GND (AC_COMPCTRL_MUXNEG_GND_Val &lt;&lt; AC_COMPCTRL_MUXNEG_Pos)</span></div>
<div class="line"><a name="l00462"></a><span class="lineno"> 462</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXNEG_VSCALE (AC_COMPCTRL_MUXNEG_VSCALE_Val &lt;&lt; AC_COMPCTRL_MUXNEG_Pos)</span></div>
<div class="line"><a name="l00463"></a><span class="lineno"> 463</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXNEG_BANDGAP (AC_COMPCTRL_MUXNEG_BANDGAP_Val &lt;&lt; AC_COMPCTRL_MUXNEG_Pos)</span></div>
<div class="line"><a name="l00464"></a><span class="lineno"> 464</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXNEG_DAC (AC_COMPCTRL_MUXNEG_DAC_Val &lt;&lt; AC_COMPCTRL_MUXNEG_Pos)</span></div>
<div class="line"><a name="l00465"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#ad4bb8c36791a0ea8139ae435b00e4365"> 465</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXPOS_Pos 12 </span></div>
<div class="line"><a name="l00466"></a><span class="lineno"> 466</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXPOS_Msk (_U_(0x7) &lt;&lt; AC_COMPCTRL_MUXPOS_Pos)</span></div>
<div class="line"><a name="l00467"></a><span class="lineno"> 467</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXPOS(value) (AC_COMPCTRL_MUXPOS_Msk &amp; ((value) &lt;&lt; AC_COMPCTRL_MUXPOS_Pos))</span></div>
<div class="line"><a name="l00468"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#aa1bfbd8fc89186f1a11a61237e80c4c5"> 468</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXPOS_PIN0_Val _U_(0x0) </span></div>
<div class="line"><a name="l00469"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a9fb0459c9bcee7f1ecde923e57096492"> 469</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXPOS_PIN1_Val _U_(0x1) </span></div>
<div class="line"><a name="l00470"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a6e55540b07d767a9d998e64c7d27972b"> 470</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXPOS_PIN2_Val _U_(0x2) </span></div>
<div class="line"><a name="l00471"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a3fa0d80ee6e615fa69c31af219f66c4a"> 471</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXPOS_PIN3_Val _U_(0x3) </span></div>
<div class="line"><a name="l00472"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a4e6961d30aa8bf0ed3f905ac3169ebdf"> 472</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXPOS_VSCALE_Val _U_(0x4) </span></div>
<div class="line"><a name="l00473"></a><span class="lineno"> 473</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXPOS_PIN0 (AC_COMPCTRL_MUXPOS_PIN0_Val &lt;&lt; AC_COMPCTRL_MUXPOS_Pos)</span></div>
<div class="line"><a name="l00474"></a><span class="lineno"> 474</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXPOS_PIN1 (AC_COMPCTRL_MUXPOS_PIN1_Val &lt;&lt; AC_COMPCTRL_MUXPOS_Pos)</span></div>
<div class="line"><a name="l00475"></a><span class="lineno"> 475</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXPOS_PIN2 (AC_COMPCTRL_MUXPOS_PIN2_Val &lt;&lt; AC_COMPCTRL_MUXPOS_Pos)</span></div>
<div class="line"><a name="l00476"></a><span class="lineno"> 476</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXPOS_PIN3 (AC_COMPCTRL_MUXPOS_PIN3_Val &lt;&lt; AC_COMPCTRL_MUXPOS_Pos)</span></div>
<div class="line"><a name="l00477"></a><span class="lineno"> 477</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MUXPOS_VSCALE (AC_COMPCTRL_MUXPOS_VSCALE_Val &lt;&lt; AC_COMPCTRL_MUXPOS_Pos)</span></div>
<div class="line"><a name="l00478"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a4e28f151d0fc3d299c8d3be58f7af79d"> 478</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_SWAP_Pos 15 </span></div>
<div class="line"><a name="l00479"></a><span class="lineno"> 479</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_SWAP (_U_(0x1) &lt;&lt; AC_COMPCTRL_SWAP_Pos)</span></div>
<div class="line"><a name="l00480"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#af0d15bf42764457190c7bf06e67c0d9c"> 480</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_SPEED_Pos 16 </span></div>
<div class="line"><a name="l00481"></a><span class="lineno"> 481</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_SPEED_Msk (_U_(0x3) &lt;&lt; AC_COMPCTRL_SPEED_Pos)</span></div>
<div class="line"><a name="l00482"></a><span class="lineno"> 482</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_SPEED(value) (AC_COMPCTRL_SPEED_Msk &amp; ((value) &lt;&lt; AC_COMPCTRL_SPEED_Pos))</span></div>
<div class="line"><a name="l00483"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a6b45b0641286de29f24da3deb2330cc4"> 483</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_SPEED_HIGH_Val _U_(0x3) </span></div>
<div class="line"><a name="l00484"></a><span class="lineno"> 484</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_SPEED_HIGH (AC_COMPCTRL_SPEED_HIGH_Val &lt;&lt; AC_COMPCTRL_SPEED_Pos)</span></div>
<div class="line"><a name="l00485"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#abbef1d3d199fcbe0c3a003a4ea60515f"> 485</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_HYSTEN_Pos 19 </span></div>
<div class="line"><a name="l00486"></a><span class="lineno"> 486</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_HYSTEN (_U_(0x1) &lt;&lt; AC_COMPCTRL_HYSTEN_Pos)</span></div>
<div class="line"><a name="l00487"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a080eedbd8cdba82fc0d24013941b523b"> 487</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_HYST_Pos 20 </span></div>
<div class="line"><a name="l00488"></a><span class="lineno"> 488</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_HYST_Msk (_U_(0x3) &lt;&lt; AC_COMPCTRL_HYST_Pos)</span></div>
<div class="line"><a name="l00489"></a><span class="lineno"> 489</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_HYST(value) (AC_COMPCTRL_HYST_Msk &amp; ((value) &lt;&lt; AC_COMPCTRL_HYST_Pos))</span></div>
<div class="line"><a name="l00490"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#ad32217a0763207fb52502050a20cc73a"> 490</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_HYST_HYST50_Val _U_(0x0) </span></div>
<div class="line"><a name="l00491"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a76d9532c9af08b035ac979b62ba01ada"> 491</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_HYST_HYST100_Val _U_(0x1) </span></div>
<div class="line"><a name="l00492"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#abcba321c8007319ad90e4a393ded42e4"> 492</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_HYST_HYST150_Val _U_(0x2) </span></div>
<div class="line"><a name="l00493"></a><span class="lineno"> 493</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_HYST_HYST50 (AC_COMPCTRL_HYST_HYST50_Val &lt;&lt; AC_COMPCTRL_HYST_Pos)</span></div>
<div class="line"><a name="l00494"></a><span class="lineno"> 494</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_HYST_HYST100 (AC_COMPCTRL_HYST_HYST100_Val &lt;&lt; AC_COMPCTRL_HYST_Pos)</span></div>
<div class="line"><a name="l00495"></a><span class="lineno"> 495</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_HYST_HYST150 (AC_COMPCTRL_HYST_HYST150_Val &lt;&lt; AC_COMPCTRL_HYST_Pos)</span></div>
<div class="line"><a name="l00496"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a66181eff5fbbb90049f3aae3b27b5a62"> 496</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_FLEN_Pos 24 </span></div>
<div class="line"><a name="l00497"></a><span class="lineno"> 497</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_FLEN_Msk (_U_(0x7) &lt;&lt; AC_COMPCTRL_FLEN_Pos)</span></div>
<div class="line"><a name="l00498"></a><span class="lineno"> 498</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_FLEN(value) (AC_COMPCTRL_FLEN_Msk &amp; ((value) &lt;&lt; AC_COMPCTRL_FLEN_Pos))</span></div>
<div class="line"><a name="l00499"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a724ff78f629c59a482f3318c76dca04e"> 499</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_FLEN_OFF_Val _U_(0x0) </span></div>
<div class="line"><a name="l00500"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a7e847b79ecfd83187149193ecaead562"> 500</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_FLEN_MAJ3_Val _U_(0x1) </span></div>
<div class="line"><a name="l00501"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#aaf4628cdfeb3c447df3cab7adf2665a8"> 501</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_FLEN_MAJ5_Val _U_(0x2) </span></div>
<div class="line"><a name="l00502"></a><span class="lineno"> 502</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_FLEN_OFF (AC_COMPCTRL_FLEN_OFF_Val &lt;&lt; AC_COMPCTRL_FLEN_Pos)</span></div>
<div class="line"><a name="l00503"></a><span class="lineno"> 503</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_FLEN_MAJ3 (AC_COMPCTRL_FLEN_MAJ3_Val &lt;&lt; AC_COMPCTRL_FLEN_Pos)</span></div>
<div class="line"><a name="l00504"></a><span class="lineno"> 504</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_FLEN_MAJ5 (AC_COMPCTRL_FLEN_MAJ5_Val &lt;&lt; AC_COMPCTRL_FLEN_Pos)</span></div>
<div class="line"><a name="l00505"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a6dfe864873a0eadaba8922ecf4b25ed1"> 505</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_OUT_Pos 28 </span></div>
<div class="line"><a name="l00506"></a><span class="lineno"> 506</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_OUT_Msk (_U_(0x3) &lt;&lt; AC_COMPCTRL_OUT_Pos)</span></div>
<div class="line"><a name="l00507"></a><span class="lineno"> 507</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_OUT(value) (AC_COMPCTRL_OUT_Msk &amp; ((value) &lt;&lt; AC_COMPCTRL_OUT_Pos))</span></div>
<div class="line"><a name="l00508"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#af53c9e960f0c4a3279b6068973c65cc7"> 508</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_OUT_OFF_Val _U_(0x0) </span></div>
<div class="line"><a name="l00509"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a45c6b70bb8a6f53dc173f631c9ac7fca"> 509</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_OUT_ASYNC_Val _U_(0x1) </span></div>
<div class="line"><a name="l00510"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a85ea47206d4f4b7d3b3a59244ae48705"> 510</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_OUT_SYNC_Val _U_(0x2) </span></div>
<div class="line"><a name="l00511"></a><span class="lineno"> 511</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_OUT_OFF (AC_COMPCTRL_OUT_OFF_Val &lt;&lt; AC_COMPCTRL_OUT_Pos)</span></div>
<div class="line"><a name="l00512"></a><span class="lineno"> 512</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_OUT_ASYNC (AC_COMPCTRL_OUT_ASYNC_Val &lt;&lt; AC_COMPCTRL_OUT_Pos)</span></div>
<div class="line"><a name="l00513"></a><span class="lineno"> 513</span>&#160;<span class="preprocessor">#define AC_COMPCTRL_OUT_SYNC (AC_COMPCTRL_OUT_SYNC_Val &lt;&lt; AC_COMPCTRL_OUT_Pos)</span></div>
<div class="line"><a name="l00514"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a485a4ac9ac9bea7b8d650fed87e02230"> 514</a></span>&#160;<span class="preprocessor">#define AC_COMPCTRL_MASK _U_(0x373BF75E) </span></div>
<div class="line"><a name="l00516"></a><span class="lineno"> 516</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AC_SYNCBUSY : (AC Offset: 0x20) (R/ 32) Synchronization Busy -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00517"></a><span class="lineno"> 517</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00518"></a><span class="lineno"><a class="line" href="unionAC__SYNCBUSY__Type.html"> 518</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00519"></a><span class="lineno"> 519</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00520"></a><span class="lineno"><a class="line" href="unionAC__SYNCBUSY__Type.html#a371186ce8951cf705e078e892de9d4b4"> 520</a></span>&#160; uint32_t <a class="code" href="unionAC__SYNCBUSY__Type.html#a371186ce8951cf705e078e892de9d4b4">SWRST</a>:1; </div>
<div class="line"><a name="l00521"></a><span class="lineno"><a class="line" href="unionAC__SYNCBUSY__Type.html#a19e84b59933235bfb9d735f7c6b7acd4"> 521</a></span>&#160; uint32_t <a class="code" href="unionAC__SYNCBUSY__Type.html#a19e84b59933235bfb9d735f7c6b7acd4">ENABLE</a>:1; </div>
<div class="line"><a name="l00522"></a><span class="lineno"><a class="line" href="unionAC__SYNCBUSY__Type.html#a0b1dcb649b6fa53e53c743818544a46a"> 522</a></span>&#160; uint32_t <a class="code" href="unionAC__SYNCBUSY__Type.html#a0b1dcb649b6fa53e53c743818544a46a">WINCTRL</a>:1; </div>
<div class="line"><a name="l00523"></a><span class="lineno"><a class="line" href="unionAC__SYNCBUSY__Type.html#ae8202bea34802ef5e4b2e9003616018f"> 523</a></span>&#160; uint32_t <a class="code" href="unionAC__SYNCBUSY__Type.html#ae8202bea34802ef5e4b2e9003616018f">COMPCTRL0</a>:1; </div>
<div class="line"><a name="l00524"></a><span class="lineno"><a class="line" href="unionAC__SYNCBUSY__Type.html#ab20b258d33e85c8649d14e05624f00ca"> 524</a></span>&#160; uint32_t <a class="code" href="unionAC__SYNCBUSY__Type.html#ab20b258d33e85c8649d14e05624f00ca">COMPCTRL1</a>:1; </div>
<div class="line"><a name="l00525"></a><span class="lineno"><a class="line" href="unionAC__SYNCBUSY__Type.html#af5109e413224118e2522471e998cc459"> 525</a></span>&#160; uint32_t :27; </div>
<div class="line"><a name="l00526"></a><span class="lineno"><a class="line" href="unionAC__SYNCBUSY__Type.html#a1b156a89436ed307459ab7607b71c3af"> 526</a></span>&#160; } bit; </div>
<div class="line"><a name="l00527"></a><span class="lineno"> 527</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00528"></a><span class="lineno"> 528</span>&#160; uint32_t :3; </div>
<div class="line"><a name="l00529"></a><span class="lineno"><a class="line" href="unionAC__SYNCBUSY__Type.html#a23ecd9c4fb7f223221a0cb3180caaf3a"> 529</a></span>&#160; uint32_t <a class="code" href="unionAC__SYNCBUSY__Type.html#a23ecd9c4fb7f223221a0cb3180caaf3a">COMPCTRL</a>:2; </div>
<div class="line"><a name="l00530"></a><span class="lineno"><a class="line" href="unionAC__SYNCBUSY__Type.html#a4e331db93ee50a7fc192754cc3d55807"> 530</a></span>&#160; uint32_t :27; </div>
<div class="line"><a name="l00531"></a><span class="lineno"><a class="line" href="unionAC__SYNCBUSY__Type.html#af631f408cb7b75eb01380e45df148fc4"> 531</a></span>&#160; } vec; </div>
<div class="line"><a name="l00532"></a><span class="lineno"><a class="line" href="unionAC__SYNCBUSY__Type.html#ad045a3877ef6750ead591a06c0c3598e"> 532</a></span>&#160; uint32_t <a class="code" href="unionAC__SYNCBUSY__Type.html#ad045a3877ef6750ead591a06c0c3598e">reg</a>; </div>
<div class="line"><a name="l00533"></a><span class="lineno"> 533</span>&#160;} <a class="code" href="unionAC__SYNCBUSY__Type.html">AC_SYNCBUSY_Type</a>;</div>
<div class="line"><a name="l00534"></a><span class="lineno"> 534</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00535"></a><span class="lineno"> 535</span>&#160; </div>
<div class="line"><a name="l00536"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a1df5236f5d319dd7f69d24c1513d8040"> 536</a></span>&#160;<span class="preprocessor">#define AC_SYNCBUSY_OFFSET 0x20 </span></div>
<div class="line"><a name="l00537"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a9042c602ca89a85a0bab56483064837b"> 537</a></span>&#160;<span class="preprocessor">#define AC_SYNCBUSY_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00539"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a115ebb8e897e6d11abcba20bd23e73f4"> 539</a></span>&#160;<span class="preprocessor">#define AC_SYNCBUSY_SWRST_Pos 0 </span></div>
<div class="line"><a name="l00540"></a><span class="lineno"> 540</span>&#160;<span class="preprocessor">#define AC_SYNCBUSY_SWRST (_U_(0x1) &lt;&lt; AC_SYNCBUSY_SWRST_Pos)</span></div>
<div class="line"><a name="l00541"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#af1545b69ee527353f1cf98de43c70ce0"> 541</a></span>&#160;<span class="preprocessor">#define AC_SYNCBUSY_ENABLE_Pos 1 </span></div>
<div class="line"><a name="l00542"></a><span class="lineno"> 542</span>&#160;<span class="preprocessor">#define AC_SYNCBUSY_ENABLE (_U_(0x1) &lt;&lt; AC_SYNCBUSY_ENABLE_Pos)</span></div>
<div class="line"><a name="l00543"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a60c112d3aebed9fcf80f298bdadb6ff0"> 543</a></span>&#160;<span class="preprocessor">#define AC_SYNCBUSY_WINCTRL_Pos 2 </span></div>
<div class="line"><a name="l00544"></a><span class="lineno"> 544</span>&#160;<span class="preprocessor">#define AC_SYNCBUSY_WINCTRL (_U_(0x1) &lt;&lt; AC_SYNCBUSY_WINCTRL_Pos)</span></div>
<div class="line"><a name="l00545"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#ab453d4ad66ae224e4dc090f1b824d463"> 545</a></span>&#160;<span class="preprocessor">#define AC_SYNCBUSY_COMPCTRL0_Pos 3 </span></div>
<div class="line"><a name="l00546"></a><span class="lineno"> 546</span>&#160;<span class="preprocessor">#define AC_SYNCBUSY_COMPCTRL0 (_U_(1) &lt;&lt; AC_SYNCBUSY_COMPCTRL0_Pos)</span></div>
<div class="line"><a name="l00547"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a8adb9efe1160b8939c9c7dcdb13b97d8"> 547</a></span>&#160;<span class="preprocessor">#define AC_SYNCBUSY_COMPCTRL1_Pos 4 </span></div>
<div class="line"><a name="l00548"></a><span class="lineno"> 548</span>&#160;<span class="preprocessor">#define AC_SYNCBUSY_COMPCTRL1 (_U_(1) &lt;&lt; AC_SYNCBUSY_COMPCTRL1_Pos)</span></div>
<div class="line"><a name="l00549"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#abc5074f82b91baf62ff2b8ab4a6ab5f1"> 549</a></span>&#160;<span class="preprocessor">#define AC_SYNCBUSY_COMPCTRL_Pos 3 </span></div>
<div class="line"><a name="l00550"></a><span class="lineno"> 550</span>&#160;<span class="preprocessor">#define AC_SYNCBUSY_COMPCTRL_Msk (_U_(0x3) &lt;&lt; AC_SYNCBUSY_COMPCTRL_Pos)</span></div>
<div class="line"><a name="l00551"></a><span class="lineno"> 551</span>&#160;<span class="preprocessor">#define AC_SYNCBUSY_COMPCTRL(value) (AC_SYNCBUSY_COMPCTRL_Msk &amp; ((value) &lt;&lt; AC_SYNCBUSY_COMPCTRL_Pos))</span></div>
<div class="line"><a name="l00552"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a70886b642d59dc0d984049d60ba72fbf"> 552</a></span>&#160;<span class="preprocessor">#define AC_SYNCBUSY_MASK _U_(0x0000001F) </span></div>
<div class="line"><a name="l00554"></a><span class="lineno"> 554</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AC_CALIB : (AC Offset: 0x24) (R/W 16) Calibration -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00555"></a><span class="lineno"> 555</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00556"></a><span class="lineno"><a class="line" href="unionAC__CALIB__Type.html"> 556</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00557"></a><span class="lineno"> 557</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00558"></a><span class="lineno"><a class="line" href="unionAC__CALIB__Type.html#a6fb71b0d51260c3f772370b9bf8495a9"> 558</a></span>&#160; uint16_t <a class="code" href="unionAC__CALIB__Type.html#a6fb71b0d51260c3f772370b9bf8495a9">BIAS0</a>:2; </div>
<div class="line"><a name="l00559"></a><span class="lineno"><a class="line" href="unionAC__CALIB__Type.html#acc176c204c0b025e6ddcdbfc84fa9d94"> 559</a></span>&#160; uint16_t :14; </div>
<div class="line"><a name="l00560"></a><span class="lineno"><a class="line" href="unionAC__CALIB__Type.html#aef8449440708df2a9b2f6f161ac5b288"> 560</a></span>&#160; } bit; </div>
<div class="line"><a name="l00561"></a><span class="lineno"><a class="line" href="unionAC__CALIB__Type.html#a19571fbae9a393f23ca3e74501efbd8d"> 561</a></span>&#160; uint16_t <a class="code" href="unionAC__CALIB__Type.html#a19571fbae9a393f23ca3e74501efbd8d">reg</a>; </div>
<div class="line"><a name="l00562"></a><span class="lineno"> 562</span>&#160;} <a class="code" href="unionAC__CALIB__Type.html">AC_CALIB_Type</a>;</div>
<div class="line"><a name="l00563"></a><span class="lineno"> 563</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00564"></a><span class="lineno"> 564</span>&#160; </div>
<div class="line"><a name="l00565"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a66776d54dd073666f77d33add83b2259"> 565</a></span>&#160;<span class="preprocessor">#define AC_CALIB_OFFSET 0x24 </span></div>
<div class="line"><a name="l00566"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#a4d10a9229a1809664a99b5b64158b4d1"> 566</a></span>&#160;<span class="preprocessor">#define AC_CALIB_RESETVALUE _U_(0x0101) </span></div>
<div class="line"><a name="l00568"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#aa5330e11bd761c4c6f0d5614b994d139"> 568</a></span>&#160;<span class="preprocessor">#define AC_CALIB_BIAS0_Pos 0 </span></div>
<div class="line"><a name="l00569"></a><span class="lineno"> 569</span>&#160;<span class="preprocessor">#define AC_CALIB_BIAS0_Msk (_U_(0x3) &lt;&lt; AC_CALIB_BIAS0_Pos)</span></div>
<div class="line"><a name="l00570"></a><span class="lineno"> 570</span>&#160;<span class="preprocessor">#define AC_CALIB_BIAS0(value) (AC_CALIB_BIAS0_Msk &amp; ((value) &lt;&lt; AC_CALIB_BIAS0_Pos))</span></div>
<div class="line"><a name="l00571"></a><span class="lineno"><a class="line" href="component_2ac_8h.html#ae23b6385c98b8d26f94509c4679a802f"> 571</a></span>&#160;<span class="preprocessor">#define AC_CALIB_MASK _U_(0x0003) </span></div>
<div class="line"><a name="l00574"></a><span class="lineno"> 574</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00575"></a><span class="lineno"><a class="line" href="structAc.html"> 575</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00576"></a><span class="lineno"><a class="line" href="structAc.html#a630e7dd91672e1c2b74ee673f39de93b"> 576</a></span>&#160; __IO <a class="code" href="unionAC__CTRLA__Type.html">AC_CTRLA_Type</a> <a class="code" href="structAc.html#a630e7dd91672e1c2b74ee673f39de93b">CTRLA</a>; </div>
<div class="line"><a name="l00577"></a><span class="lineno"><a class="line" href="structAc.html#a640781efaa613b49c38ed2480eaae796"> 577</a></span>&#160; __O <a class="code" href="unionAC__CTRLB__Type.html">AC_CTRLB_Type</a> <a class="code" href="structAc.html#a640781efaa613b49c38ed2480eaae796">CTRLB</a>; </div>
<div class="line"><a name="l00578"></a><span class="lineno"><a class="line" href="structAc.html#a5c833d847f90ca3c0efc0329166d5253"> 578</a></span>&#160; __IO <a class="code" href="unionAC__EVCTRL__Type.html">AC_EVCTRL_Type</a> <a class="code" href="structAc.html#a5c833d847f90ca3c0efc0329166d5253">EVCTRL</a>; </div>
<div class="line"><a name="l00579"></a><span class="lineno"><a class="line" href="structAc.html#a6dc958f6971494d41ef59d7785a8d1bb"> 579</a></span>&#160; __IO <a class="code" href="unionAC__INTENCLR__Type.html">AC_INTENCLR_Type</a> <a class="code" href="structAc.html#a6dc958f6971494d41ef59d7785a8d1bb">INTENCLR</a>; </div>
<div class="line"><a name="l00580"></a><span class="lineno"><a class="line" href="structAc.html#a3c53909f19187625e2423f7dbb57ddc7"> 580</a></span>&#160; __IO <a class="code" href="unionAC__INTENSET__Type.html">AC_INTENSET_Type</a> <a class="code" href="structAc.html#a3c53909f19187625e2423f7dbb57ddc7">INTENSET</a>; </div>
<div class="line"><a name="l00581"></a><span class="lineno"><a class="line" href="structAc.html#ab41fe4ec783d82e9b137148ab6be1e79"> 581</a></span>&#160; __IO <a class="code" href="unionAC__INTFLAG__Type.html">AC_INTFLAG_Type</a> <a class="code" href="structAc.html#ab41fe4ec783d82e9b137148ab6be1e79">INTFLAG</a>; </div>
<div class="line"><a name="l00582"></a><span class="lineno"><a class="line" href="structAc.html#ae1cfeeabd4b015c858003981ec70b2cb"> 582</a></span>&#160; __I <a class="code" href="unionAC__STATUSA__Type.html">AC_STATUSA_Type</a> <a class="code" href="structAc.html#ae1cfeeabd4b015c858003981ec70b2cb">STATUSA</a>; </div>
<div class="line"><a name="l00583"></a><span class="lineno"><a class="line" href="structAc.html#a4a386445b8b453b61021c2c4ec254b08"> 583</a></span>&#160; __I <a class="code" href="unionAC__STATUSB__Type.html">AC_STATUSB_Type</a> <a class="code" href="structAc.html#a4a386445b8b453b61021c2c4ec254b08">STATUSB</a>; </div>
<div class="line"><a name="l00584"></a><span class="lineno"><a class="line" href="structAc.html#a84b627a429bf5982a743542af4e70465"> 584</a></span>&#160; __IO <a class="code" href="unionAC__DBGCTRL__Type.html">AC_DBGCTRL_Type</a> <a class="code" href="structAc.html#a84b627a429bf5982a743542af4e70465">DBGCTRL</a>; </div>
<div class="line"><a name="l00585"></a><span class="lineno"><a class="line" href="structAc.html#aae674ade4d82dfa07869611331e97a65"> 585</a></span>&#160; __IO <a class="code" href="unionAC__WINCTRL__Type.html">AC_WINCTRL_Type</a> <a class="code" href="structAc.html#aae674ade4d82dfa07869611331e97a65">WINCTRL</a>; </div>
<div class="line"><a name="l00586"></a><span class="lineno"> 586</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved1[0x1];</div>
<div class="line"><a name="l00587"></a><span class="lineno"><a class="line" href="structAc.html#adfdeb677da8b637683a5abab830bf0ac"> 587</a></span>&#160; __IO <a class="code" href="unionAC__SCALER__Type.html">AC_SCALER_Type</a> SCALER[2]; </div>
<div class="line"><a name="l00588"></a><span class="lineno"> 588</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved2[0x2];</div>
<div class="line"><a name="l00589"></a><span class="lineno"><a class="line" href="structAc.html#ad8522955c5cff403b2f5e47c960553bb"> 589</a></span>&#160; __IO <a class="code" href="unionAC__COMPCTRL__Type.html">AC_COMPCTRL_Type</a> COMPCTRL[2]; </div>
<div class="line"><a name="l00590"></a><span class="lineno"> 590</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved3[0x8];</div>
<div class="line"><a name="l00591"></a><span class="lineno"><a class="line" href="structAc.html#a684ba345b88de1da540457a3bb1a85b8"> 591</a></span>&#160; __I <a class="code" href="unionAC__SYNCBUSY__Type.html">AC_SYNCBUSY_Type</a> <a class="code" href="structAc.html#a684ba345b88de1da540457a3bb1a85b8">SYNCBUSY</a>; </div>
<div class="line"><a name="l00592"></a><span class="lineno"><a class="line" href="structAc.html#a450c34c42ea810f30a42e8adb8c4efa1"> 592</a></span>&#160; __IO <a class="code" href="unionAC__CALIB__Type.html">AC_CALIB_Type</a> <a class="code" href="structAc.html#a450c34c42ea810f30a42e8adb8c4efa1">CALIB</a>; </div>
<div class="line"><a name="l00593"></a><span class="lineno"> 593</span>&#160;} <a class="code" href="structAc.html">Ac</a>;</div>
<div class="line"><a name="l00594"></a><span class="lineno"> 594</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00595"></a><span class="lineno"> 595</span>&#160; </div>
<div class="line"><a name="l00598"></a><span class="lineno"> 598</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_AC_COMPONENT_ */</span><span class="preprocessor"></span></div>
</div><!-- fragment --></div><!-- contents -->
<div class="ttc" id="aunionAC__INTENSET__Type_html_ae40a778d0f2e270a2c9cc98daa12fdea"><div class="ttname"><a href="unionAC__INTENSET__Type.html#ae40a778d0f2e270a2c9cc98daa12fdea">AC_INTENSET_Type::COMP1</a></div><div class="ttdeci">uint8_t COMP1</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00194">ac.h:194</a></div></div>
<div class="ttc" id="aunionAC__INTENCLR__Type_html_a6552dbc0a8e405aaa50d1da95a81baa7"><div class="ttname"><a href="unionAC__INTENCLR__Type.html#a6552dbc0a8e405aaa50d1da95a81baa7">AC_INTENCLR_Type::WIN</a></div><div class="ttdeci">uint8_t WIN</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00165">ac.h:165</a></div></div>
<div class="ttc" id="aunionAC__STATUSA__Type_html_a2a3ce21d0bd3155ed36bb422a079518b"><div class="ttname"><a href="unionAC__STATUSA__Type.html#a2a3ce21d0bd3155ed36bb422a079518b">AC_STATUSA_Type::STATE1</a></div><div class="ttdeci">uint8_t STATE1</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00268">ac.h:268</a></div></div>
<div class="ttc" id="aunionAC__CTRLB__Type_html_a760d1ae61b939e39b8d3beb201554ce1"><div class="ttname"><a href="unionAC__CTRLB__Type.html#a760d1ae61b939e39b8d3beb201554ce1">AC_CTRLB_Type::START0</a></div><div class="ttdeci">uint8_t START0</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00067">ac.h:67</a></div></div>
<div class="ttc" id="aunionAC__INTENSET__Type_html"><div class="ttname"><a href="unionAC__INTENSET__Type.html">AC_INTENSET_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00191">ac.h:191</a></div></div>
<div class="ttc" id="aunionAC__COMPCTRL__Type_html_acb031b1494dbf34f49d344ad918f9357"><div class="ttname"><a href="unionAC__COMPCTRL__Type.html#acb031b1494dbf34f49d344ad918f9357">AC_COMPCTRL_Type::SINGLE</a></div><div class="ttdeci">uint32_t SINGLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00403">ac.h:403</a></div></div>
<div class="ttc" id="aunionAC__SYNCBUSY__Type_html_a371186ce8951cf705e078e892de9d4b4"><div class="ttname"><a href="unionAC__SYNCBUSY__Type.html#a371186ce8951cf705e078e892de9d4b4">AC_SYNCBUSY_Type::SWRST</a></div><div class="ttdeci">uint32_t SWRST</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00520">ac.h:520</a></div></div>
<div class="ttc" id="aunionAC__SCALER__Type_html_a3b844736f1cb54de918fcc21b3e23de9"><div class="ttname"><a href="unionAC__SCALER__Type.html#a3b844736f1cb54de918fcc21b3e23de9">AC_SCALER_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00385">ac.h:385</a></div></div>
<div class="ttc" id="aunionAC__EVCTRL__Type_html_a1ca0ff027125761a6ca1049a9e549a18"><div class="ttname"><a href="unionAC__EVCTRL__Type.html#a1ca0ff027125761a6ca1049a9e549a18">AC_EVCTRL_Type::INVEI0</a></div><div class="ttdeci">uint16_t INVEI0</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00103">ac.h:103</a></div></div>
<div class="ttc" id="aunionAC__EVCTRL__Type_html_a3436fe70198f6e81e92a2404bd178574"><div class="ttname"><a href="unionAC__EVCTRL__Type.html#a3436fe70198f6e81e92a2404bd178574">AC_EVCTRL_Type::WINEO0</a></div><div class="ttdeci">uint16_t WINEO0</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00098">ac.h:98</a></div></div>
<div class="ttc" id="aunionAC__CALIB__Type_html"><div class="ttname"><a href="unionAC__CALIB__Type.html">AC_CALIB_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00556">ac.h:556</a></div></div>
<div class="ttc" id="aunionAC__SYNCBUSY__Type_html_a0b1dcb649b6fa53e53c743818544a46a"><div class="ttname"><a href="unionAC__SYNCBUSY__Type.html#a0b1dcb649b6fa53e53c743818544a46a">AC_SYNCBUSY_Type::WINCTRL</a></div><div class="ttdeci">uint32_t WINCTRL</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00522">ac.h:522</a></div></div>
<div class="ttc" id="aunionAC__EVCTRL__Type_html_a00045659dd1fbd923931bbf9b81e7c6b"><div class="ttname"><a href="unionAC__EVCTRL__Type.html#a00045659dd1fbd923931bbf9b81e7c6b">AC_EVCTRL_Type::COMPEI0</a></div><div class="ttdeci">uint16_t COMPEI0</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00100">ac.h:100</a></div></div>
<div class="ttc" id="astructAc_html_aae674ade4d82dfa07869611331e97a65"><div class="ttname"><a href="structAc.html#aae674ade4d82dfa07869611331e97a65">Ac::WINCTRL</a></div><div class="ttdeci">__IO AC_WINCTRL_Type WINCTRL</div><div class="ttdoc">Offset: 0x0A (R/W 8) Window Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00585">ac.h:585</a></div></div>
<div class="ttc" id="aunionAC__STATUSA__Type_html_ac8b9a13007924855fee58c699c5762c5"><div class="ttname"><a href="unionAC__STATUSA__Type.html#ac8b9a13007924855fee58c699c5762c5">AC_STATUSA_Type::WSTATE0</a></div><div class="ttdeci">uint8_t WSTATE0</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00270">ac.h:270</a></div></div>
<div class="ttc" id="aunionAC__COMPCTRL__Type_html_aa4274235084b7d672bf0f4c08f214050"><div class="ttname"><a href="unionAC__COMPCTRL__Type.html#aa4274235084b7d672bf0f4c08f214050">AC_COMPCTRL_Type::MUXPOS</a></div><div class="ttdeci">uint32_t MUXPOS</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00410">ac.h:410</a></div></div>
<div class="ttc" id="aunionAC__CALIB__Type_html_a6fb71b0d51260c3f772370b9bf8495a9"><div class="ttname"><a href="unionAC__CALIB__Type.html#a6fb71b0d51260c3f772370b9bf8495a9">AC_CALIB_Type::BIAS0</a></div><div class="ttdeci">uint16_t BIAS0</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00558">ac.h:558</a></div></div>
<div class="ttc" id="aunionAC__STATUSB__Type_html"><div class="ttname"><a href="unionAC__STATUSB__Type.html">AC_STATUSB_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00304">ac.h:304</a></div></div>
<div class="ttc" id="aunionAC__INTENSET__Type_html_a8142ae02fea535b70e28e5f5846b276b"><div class="ttname"><a href="unionAC__INTENSET__Type.html#a8142ae02fea535b70e28e5f5846b276b">AC_INTENSET_Type::COMP0</a></div><div class="ttdeci">uint8_t COMP0</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00193">ac.h:193</a></div></div>
<div class="ttc" id="aunionAC__EVCTRL__Type_html_a7ea623ba38e6a03b4cc4e3d493d87014"><div class="ttname"><a href="unionAC__EVCTRL__Type.html#a7ea623ba38e6a03b4cc4e3d493d87014">AC_EVCTRL_Type::COMPEO0</a></div><div class="ttdeci">uint16_t COMPEO0</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00095">ac.h:95</a></div></div>
<div class="ttc" id="aunionAC__COMPCTRL__Type_html_a1f7c96647c51593fd749cb5611f4b320"><div class="ttname"><a href="unionAC__COMPCTRL__Type.html#a1f7c96647c51593fd749cb5611f4b320">AC_COMPCTRL_Type::SPEED</a></div><div class="ttdeci">uint32_t SPEED</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00412">ac.h:412</a></div></div>
<div class="ttc" id="aunionAC__CALIB__Type_html_a19571fbae9a393f23ca3e74501efbd8d"><div class="ttname"><a href="unionAC__CALIB__Type.html#a19571fbae9a393f23ca3e74501efbd8d">AC_CALIB_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00561">ac.h:561</a></div></div>
<div class="ttc" id="aunionAC__COMPCTRL__Type_html_ae3b3f2b8ddb2c47af63d82664c1c3ea4"><div class="ttname"><a href="unionAC__COMPCTRL__Type.html#ae3b3f2b8ddb2c47af63d82664c1c3ea4">AC_COMPCTRL_Type::RUNSTDBY</a></div><div class="ttdeci">uint32_t RUNSTDBY</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00406">ac.h:406</a></div></div>
<div class="ttc" id="aunionAC__EVCTRL__Type_html_a9e65bdb6d81e1f9d93abdb815b1e1a09"><div class="ttname"><a href="unionAC__EVCTRL__Type.html#a9e65bdb6d81e1f9d93abdb815b1e1a09">AC_EVCTRL_Type::COMPEI</a></div><div class="ttdeci">uint16_t COMPEI</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00112">ac.h:112</a></div></div>
<div class="ttc" id="aunionAC__EVCTRL__Type_html"><div class="ttname"><a href="unionAC__EVCTRL__Type.html">AC_EVCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00093">ac.h:93</a></div></div>
<div class="ttc" id="aunionAC__DBGCTRL__Type_html_aa8ab552df384f072ba1bfeb0d07ae92d"><div class="ttname"><a href="unionAC__DBGCTRL__Type.html#aa8ab552df384f072ba1bfeb0d07ae92d">AC_DBGCTRL_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00337">ac.h:337</a></div></div>
<div class="ttc" id="aunionAC__EVCTRL__Type_html_aed5e8dd2038203472a017dd9e017db71"><div class="ttname"><a href="unionAC__EVCTRL__Type.html#aed5e8dd2038203472a017dd9e017db71">AC_EVCTRL_Type::INVEI</a></div><div class="ttdeci">uint16_t INVEI</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00114">ac.h:114</a></div></div>
<div class="ttc" id="aunionAC__WINCTRL__Type_html_a4c5609462535a1c98e79acb0526f0eae"><div class="ttname"><a href="unionAC__WINCTRL__Type.html#a4c5609462535a1c98e79acb0526f0eae">AC_WINCTRL_Type::WINTSEL0</a></div><div class="ttdeci">uint8_t WINTSEL0</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00353">ac.h:353</a></div></div>
<div class="ttc" id="astructAc_html_a84b627a429bf5982a743542af4e70465"><div class="ttname"><a href="structAc.html#a84b627a429bf5982a743542af4e70465">Ac::DBGCTRL</a></div><div class="ttdeci">__IO AC_DBGCTRL_Type DBGCTRL</div><div class="ttdoc">Offset: 0x09 (R/W 8) Debug Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00584">ac.h:584</a></div></div>
<div class="ttc" id="astructAc_html_ab41fe4ec783d82e9b137148ab6be1e79"><div class="ttname"><a href="structAc.html#ab41fe4ec783d82e9b137148ab6be1e79">Ac::INTFLAG</a></div><div class="ttdeci">__IO AC_INTFLAG_Type INTFLAG</div><div class="ttdoc">Offset: 0x06 (R/W 8) Interrupt Flag Status and Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00581">ac.h:581</a></div></div>
<div class="ttc" id="aunionAC__INTFLAG__Type_html_a389125c1799b8dc8f0c9cf0d2761cb0c"><div class="ttname"><a href="unionAC__INTFLAG__Type.html#a389125c1799b8dc8f0c9cf0d2761cb0c">AC_INTFLAG_Type::WIN</a></div><div class="ttdeci">__I uint8_t WIN</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00239">ac.h:239</a></div></div>
<div class="ttc" id="aunionAC__COMPCTRL__Type_html_afae8be6944e4719e72b122c4b58025b5"><div class="ttname"><a href="unionAC__COMPCTRL__Type.html#afae8be6944e4719e72b122c4b58025b5">AC_COMPCTRL_Type::SWAP</a></div><div class="ttdeci">uint32_t SWAP</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00411">ac.h:411</a></div></div>
<div class="ttc" id="aunionAC__SYNCBUSY__Type_html"><div class="ttname"><a href="unionAC__SYNCBUSY__Type.html">AC_SYNCBUSY_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00518">ac.h:518</a></div></div>
<div class="ttc" id="aunionAC__CTRLB__Type_html_a17398190707110456c97dd422752d8db"><div class="ttname"><a href="unionAC__CTRLB__Type.html#a17398190707110456c97dd422752d8db">AC_CTRLB_Type::START1</a></div><div class="ttdeci">uint8_t START1</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00068">ac.h:68</a></div></div>
<div class="ttc" id="aunionAC__EVCTRL__Type_html_a74bfb16a5a12d5476bbcbd4fc51cd8ee"><div class="ttname"><a href="unionAC__EVCTRL__Type.html#a74bfb16a5a12d5476bbcbd4fc51cd8ee">AC_EVCTRL_Type::COMPEO</a></div><div class="ttdeci">uint16_t COMPEO</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00108">ac.h:108</a></div></div>
<div class="ttc" id="aunionAC__WINCTRL__Type_html_a490f80fdbd4ca4de30969c9e862efe0c"><div class="ttname"><a href="unionAC__WINCTRL__Type.html#a490f80fdbd4ca4de30969c9e862efe0c">AC_WINCTRL_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00356">ac.h:356</a></div></div>
<div class="ttc" id="aunionAC__EVCTRL__Type_html_ab4ef9d19685a1f172bd8445083216512"><div class="ttname"><a href="unionAC__EVCTRL__Type.html#ab4ef9d19685a1f172bd8445083216512">AC_EVCTRL_Type::COMPEO1</a></div><div class="ttdeci">uint16_t COMPEO1</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00096">ac.h:96</a></div></div>
<div class="ttc" id="aunionAC__STATUSB__Type_html_a0896ac0096e3e0a7c3ffb99e15f78677"><div class="ttname"><a href="unionAC__STATUSB__Type.html#a0896ac0096e3e0a7c3ffb99e15f78677">AC_STATUSB_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00314">ac.h:314</a></div></div>
<div class="ttc" id="aunionAC__CTRLA__Type_html_a4e34b7052621296ebf635fa09bb60c01"><div class="ttname"><a href="unionAC__CTRLA__Type.html#a4e34b7052621296ebf635fa09bb60c01">AC_CTRLA_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00050">ac.h:50</a></div></div>
<div class="ttc" id="aunionAC__STATUSB__Type_html_a25df121d8933b26079d8697c479cfdc4"><div class="ttname"><a href="unionAC__STATUSB__Type.html#a25df121d8933b26079d8697c479cfdc4">AC_STATUSB_Type::READY</a></div><div class="ttdeci">uint8_t READY</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00311">ac.h:311</a></div></div>
<div class="ttc" id="aunionAC__INTFLAG__Type_html_a898036bc7f728751a0414e4391d41cf4"><div class="ttname"><a href="unionAC__INTFLAG__Type.html#a898036bc7f728751a0414e4391d41cf4">AC_INTFLAG_Type::COMP</a></div><div class="ttdeci">__I uint8_t COMP</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00237">ac.h:237</a></div></div>
<div class="ttc" id="aunionAC__CTRLB__Type_html"><div class="ttname"><a href="unionAC__CTRLB__Type.html">AC_CTRLB_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00065">ac.h:65</a></div></div>
<div class="ttc" id="aunionAC__STATUSA__Type_html_a6e72d715598dca97b6d250da54fde40c"><div class="ttname"><a href="unionAC__STATUSA__Type.html#a6e72d715598dca97b6d250da54fde40c">AC_STATUSA_Type::STATE</a></div><div class="ttdeci">uint8_t STATE</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00274">ac.h:274</a></div></div>
<div class="ttc" id="aunionAC__INTENCLR__Type_html_a19bd605e4a259f63839a819c484ae925"><div class="ttname"><a href="unionAC__INTENCLR__Type.html#a19bd605e4a259f63839a819c484ae925">AC_INTENCLR_Type::COMP0</a></div><div class="ttdeci">uint8_t COMP0</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00156">ac.h:156</a></div></div>
<div class="ttc" id="aunionAC__COMPCTRL__Type_html_a46f2e7662c18b2108a2c8de43c00b39f"><div class="ttname"><a href="unionAC__COMPCTRL__Type.html#a46f2e7662c18b2108a2c8de43c00b39f">AC_COMPCTRL_Type::MUXNEG</a></div><div class="ttdeci">uint32_t MUXNEG</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00408">ac.h:408</a></div></div>
<div class="ttc" id="aunionAC__INTFLAG__Type_html_a5f63bf1df4ff997b6c0e30711301ae35"><div class="ttname"><a href="unionAC__INTFLAG__Type.html#a5f63bf1df4ff997b6c0e30711301ae35">AC_INTFLAG_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00242">ac.h:242</a></div></div>
<div class="ttc" id="aunionAC__SYNCBUSY__Type_html_a19e84b59933235bfb9d735f7c6b7acd4"><div class="ttname"><a href="unionAC__SYNCBUSY__Type.html#a19e84b59933235bfb9d735f7c6b7acd4">AC_SYNCBUSY_Type::ENABLE</a></div><div class="ttdeci">uint32_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00521">ac.h:521</a></div></div>
<div class="ttc" id="astructAc_html_a5c833d847f90ca3c0efc0329166d5253"><div class="ttname"><a href="structAc.html#a5c833d847f90ca3c0efc0329166d5253">Ac::EVCTRL</a></div><div class="ttdeci">__IO AC_EVCTRL_Type EVCTRL</div><div class="ttdoc">Offset: 0x02 (R/W 16) Event Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00578">ac.h:578</a></div></div>
<div class="ttc" id="aunionAC__INTFLAG__Type_html"><div class="ttname"><a href="unionAC__INTFLAG__Type.html">AC_INTFLAG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00228">ac.h:228</a></div></div>
<div class="ttc" id="aunionAC__INTENCLR__Type_html_a9576a4c3d508394435e1986d4b08415f"><div class="ttname"><a href="unionAC__INTENCLR__Type.html#a9576a4c3d508394435e1986d4b08415f">AC_INTENCLR_Type::COMP</a></div><div class="ttdeci">uint8_t COMP</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00163">ac.h:163</a></div></div>
<div class="ttc" id="astructAc_html_a6dc958f6971494d41ef59d7785a8d1bb"><div class="ttname"><a href="structAc.html#a6dc958f6971494d41ef59d7785a8d1bb">Ac::INTENCLR</a></div><div class="ttdeci">__IO AC_INTENCLR_Type INTENCLR</div><div class="ttdoc">Offset: 0x04 (R/W 8) Interrupt Enable Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00579">ac.h:579</a></div></div>
<div class="ttc" id="aunionAC__INTENCLR__Type_html_a63e79491ef9af2be69a99ba6a19b2444"><div class="ttname"><a href="unionAC__INTENCLR__Type.html#a63e79491ef9af2be69a99ba6a19b2444">AC_INTENCLR_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00168">ac.h:168</a></div></div>
<div class="ttc" id="astructAc_html_a4a386445b8b453b61021c2c4ec254b08"><div class="ttname"><a href="structAc.html#a4a386445b8b453b61021c2c4ec254b08">Ac::STATUSB</a></div><div class="ttdeci">__I AC_STATUSB_Type STATUSB</div><div class="ttdoc">Offset: 0x08 (R/ 8) Status B.</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00583">ac.h:583</a></div></div>
<div class="ttc" id="aunionAC__INTFLAG__Type_html_a476c42bc7087402bcd8126347e5fc4c5"><div class="ttname"><a href="unionAC__INTFLAG__Type.html#a476c42bc7087402bcd8126347e5fc4c5">AC_INTFLAG_Type::COMP1</a></div><div class="ttdeci">__I uint8_t COMP1</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00231">ac.h:231</a></div></div>
<div class="ttc" id="aunionAC__COMPCTRL__Type_html_a95f33ef2691b5cda0fea29595af971a4"><div class="ttname"><a href="unionAC__COMPCTRL__Type.html#a95f33ef2691b5cda0fea29595af971a4">AC_COMPCTRL_Type::INTSEL</a></div><div class="ttdeci">uint32_t INTSEL</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00404">ac.h:404</a></div></div>
<div class="ttc" id="aunionAC__WINCTRL__Type_html"><div class="ttname"><a href="unionAC__WINCTRL__Type.html">AC_WINCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00350">ac.h:350</a></div></div>
<div class="ttc" id="aunionAC__INTENSET__Type_html_a42e5f855d701ade3ba8bd54b11f80a80"><div class="ttname"><a href="unionAC__INTENSET__Type.html#a42e5f855d701ade3ba8bd54b11f80a80">AC_INTENSET_Type::COMP</a></div><div class="ttdeci">uint8_t COMP</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00200">ac.h:200</a></div></div>
<div class="ttc" id="aunionAC__CTRLB__Type_html_ac9815f20dd05fa3dca5cd44a7db9069d"><div class="ttname"><a href="unionAC__CTRLB__Type.html#ac9815f20dd05fa3dca5cd44a7db9069d">AC_CTRLB_Type::START</a></div><div class="ttdeci">uint8_t START</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00072">ac.h:72</a></div></div>
<div class="ttc" id="astructAc_html_a640781efaa613b49c38ed2480eaae796"><div class="ttname"><a href="structAc.html#a640781efaa613b49c38ed2480eaae796">Ac::CTRLB</a></div><div class="ttdeci">__O AC_CTRLB_Type CTRLB</div><div class="ttdoc">Offset: 0x01 ( /W 8) Control B.</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00577">ac.h:577</a></div></div>
<div class="ttc" id="aunionAC__SCALER__Type_html_a88f5e429a40283199bcb682c425e8511"><div class="ttname"><a href="unionAC__SCALER__Type.html#a88f5e429a40283199bcb682c425e8511">AC_SCALER_Type::VALUE</a></div><div class="ttdeci">uint8_t VALUE</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00382">ac.h:382</a></div></div>
<div class="ttc" id="aunionAC__EVCTRL__Type_html_ac26ab4051408af4f6ef5f28f54e9b7e2"><div class="ttname"><a href="unionAC__EVCTRL__Type.html#ac26ab4051408af4f6ef5f28f54e9b7e2">AC_EVCTRL_Type::WINEO</a></div><div class="ttdeci">uint16_t WINEO</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00110">ac.h:110</a></div></div>
<div class="ttc" id="aunionAC__INTFLAG__Type_html_a83708cf4e9af92a15d890824bc1ea3a5"><div class="ttname"><a href="unionAC__INTFLAG__Type.html#a83708cf4e9af92a15d890824bc1ea3a5">AC_INTFLAG_Type::WIN0</a></div><div class="ttdeci">__I uint8_t WIN0</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00233">ac.h:233</a></div></div>
<div class="ttc" id="aunionAC__CTRLA__Type_html_a58c730b4e10c52e2cb6ad4a7acafb275"><div class="ttname"><a href="unionAC__CTRLA__Type.html#a58c730b4e10c52e2cb6ad4a7acafb275">AC_CTRLA_Type::SWRST</a></div><div class="ttdeci">uint8_t SWRST</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00046">ac.h:46</a></div></div>
<div class="ttc" id="aunionAC__STATUSB__Type_html_a8824f2b68d7416b63ba3801b9c7058e9"><div class="ttname"><a href="unionAC__STATUSB__Type.html#a8824f2b68d7416b63ba3801b9c7058e9">AC_STATUSB_Type::READY0</a></div><div class="ttdeci">uint8_t READY0</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00306">ac.h:306</a></div></div>
<div class="ttc" id="aunionAC__EVCTRL__Type_html_ae1ec2935d7ee9422bb7789a149620341"><div class="ttname"><a href="unionAC__EVCTRL__Type.html#ae1ec2935d7ee9422bb7789a149620341">AC_EVCTRL_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00117">ac.h:117</a></div></div>
<div class="ttc" id="aunionAC__STATUSA__Type_html"><div class="ttname"><a href="unionAC__STATUSA__Type.html">AC_STATUSA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00265">ac.h:265</a></div></div>
<div class="ttc" id="aunionAC__COMPCTRL__Type_html_a6f9f071746c46a04cabc33c965d8cdb5"><div class="ttname"><a href="unionAC__COMPCTRL__Type.html#a6f9f071746c46a04cabc33c965d8cdb5">AC_COMPCTRL_Type::HYSTEN</a></div><div class="ttdeci">uint32_t HYSTEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00414">ac.h:414</a></div></div>
<div class="ttc" id="aunionAC__COMPCTRL__Type_html_a15f8af3162ea9033a60d3e3d356c6a56"><div class="ttname"><a href="unionAC__COMPCTRL__Type.html#a15f8af3162ea9033a60d3e3d356c6a56">AC_COMPCTRL_Type::ENABLE</a></div><div class="ttdeci">uint32_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00402">ac.h:402</a></div></div>
<div class="ttc" id="aunionAC__INTENSET__Type_html_a15d52e6fc36216e401abb8029b2fdf54"><div class="ttname"><a href="unionAC__INTENSET__Type.html#a15d52e6fc36216e401abb8029b2fdf54">AC_INTENSET_Type::WIN</a></div><div class="ttdeci">uint8_t WIN</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00202">ac.h:202</a></div></div>
<div class="ttc" id="aunionAC__INTENSET__Type_html_a39873288bd0e9d091d0ae83d396d24da"><div class="ttname"><a href="unionAC__INTENSET__Type.html#a39873288bd0e9d091d0ae83d396d24da">AC_INTENSET_Type::WIN0</a></div><div class="ttdeci">uint8_t WIN0</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00196">ac.h:196</a></div></div>
<div class="ttc" id="aunionAC__WINCTRL__Type_html_a72a4c9afb389393cb713615978a7813f"><div class="ttname"><a href="unionAC__WINCTRL__Type.html#a72a4c9afb389393cb713615978a7813f">AC_WINCTRL_Type::WEN0</a></div><div class="ttdeci">uint8_t WEN0</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00352">ac.h:352</a></div></div>
<div class="ttc" id="aunionAC__SCALER__Type_html"><div class="ttname"><a href="unionAC__SCALER__Type.html">AC_SCALER_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00380">ac.h:380</a></div></div>
<div class="ttc" id="aunionAC__INTENSET__Type_html_a4da1edfb85054d040062f34a65d86fd1"><div class="ttname"><a href="unionAC__INTENSET__Type.html#a4da1edfb85054d040062f34a65d86fd1">AC_INTENSET_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00205">ac.h:205</a></div></div>
<div class="ttc" id="aunionAC__COMPCTRL__Type_html_a1b15c83fc337723c7dfada178ded5717"><div class="ttname"><a href="unionAC__COMPCTRL__Type.html#a1b15c83fc337723c7dfada178ded5717">AC_COMPCTRL_Type::OUT</a></div><div class="ttdeci">uint32_t OUT</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00419">ac.h:419</a></div></div>
<div class="ttc" id="aunionAC__STATUSA__Type_html_aca8e6670ce7505c53de0519c88122fda"><div class="ttname"><a href="unionAC__STATUSA__Type.html#aca8e6670ce7505c53de0519c88122fda">AC_STATUSA_Type::STATE0</a></div><div class="ttdeci">uint8_t STATE0</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00267">ac.h:267</a></div></div>
<div class="ttc" id="astructAc_html_a450c34c42ea810f30a42e8adb8c4efa1"><div class="ttname"><a href="structAc.html#a450c34c42ea810f30a42e8adb8c4efa1">Ac::CALIB</a></div><div class="ttdeci">__IO AC_CALIB_Type CALIB</div><div class="ttdoc">Offset: 0x24 (R/W 16) Calibration.</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00592">ac.h:592</a></div></div>
<div class="ttc" id="astructAc_html_ae1cfeeabd4b015c858003981ec70b2cb"><div class="ttname"><a href="structAc.html#ae1cfeeabd4b015c858003981ec70b2cb">Ac::STATUSA</a></div><div class="ttdeci">__I AC_STATUSA_Type STATUSA</div><div class="ttdoc">Offset: 0x07 (R/ 8) Status A.</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00582">ac.h:582</a></div></div>
<div class="ttc" id="astructAc_html"><div class="ttname"><a href="structAc.html">Ac</a></div><div class="ttdoc">AC hardware registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00575">ac.h:575</a></div></div>
<div class="ttc" id="astructAc_html_a684ba345b88de1da540457a3bb1a85b8"><div class="ttname"><a href="structAc.html#a684ba345b88de1da540457a3bb1a85b8">Ac::SYNCBUSY</a></div><div class="ttdeci">__I AC_SYNCBUSY_Type SYNCBUSY</div><div class="ttdoc">Offset: 0x20 (R/ 32) Synchronization Busy.</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00591">ac.h:591</a></div></div>
<div class="ttc" id="aunionAC__SYNCBUSY__Type_html_ad045a3877ef6750ead591a06c0c3598e"><div class="ttname"><a href="unionAC__SYNCBUSY__Type.html#ad045a3877ef6750ead591a06c0c3598e">AC_SYNCBUSY_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00532">ac.h:532</a></div></div>
<div class="ttc" id="aunionAC__COMPCTRL__Type_html_ab6a2ee44b0ba4da3ce7fc4bc1ba7f78a"><div class="ttname"><a href="unionAC__COMPCTRL__Type.html#ab6a2ee44b0ba4da3ce7fc4bc1ba7f78a">AC_COMPCTRL_Type::HYST</a></div><div class="ttdeci">uint32_t HYST</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00415">ac.h:415</a></div></div>
<div class="ttc" id="aunionAC__INTFLAG__Type_html_a353bd26947fa5d90c75d8d848823b499"><div class="ttname"><a href="unionAC__INTFLAG__Type.html#a353bd26947fa5d90c75d8d848823b499">AC_INTFLAG_Type::COMP0</a></div><div class="ttdeci">__I uint8_t COMP0</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00230">ac.h:230</a></div></div>
<div class="ttc" id="aunionAC__COMPCTRL__Type_html"><div class="ttname"><a href="unionAC__COMPCTRL__Type.html">AC_COMPCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00399">ac.h:399</a></div></div>
<div class="ttc" id="astructAc_html_a630e7dd91672e1c2b74ee673f39de93b"><div class="ttname"><a href="structAc.html#a630e7dd91672e1c2b74ee673f39de93b">Ac::CTRLA</a></div><div class="ttdeci">__IO AC_CTRLA_Type CTRLA</div><div class="ttdoc">Offset: 0x00 (R/W 8) Control A.</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00576">ac.h:576</a></div></div>
<div class="ttc" id="aunionAC__STATUSB__Type_html_af62af0387d980f78fb5f370bfd4724fb"><div class="ttname"><a href="unionAC__STATUSB__Type.html#af62af0387d980f78fb5f370bfd4724fb">AC_STATUSB_Type::READY1</a></div><div class="ttdeci">uint8_t READY1</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00307">ac.h:307</a></div></div>
<div class="ttc" id="aunionAC__CTRLA__Type_html"><div class="ttname"><a href="unionAC__CTRLA__Type.html">AC_CTRLA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00044">ac.h:44</a></div></div>
<div class="ttc" id="aunionAC__SYNCBUSY__Type_html_ab20b258d33e85c8649d14e05624f00ca"><div class="ttname"><a href="unionAC__SYNCBUSY__Type.html#ab20b258d33e85c8649d14e05624f00ca">AC_SYNCBUSY_Type::COMPCTRL1</a></div><div class="ttdeci">uint32_t COMPCTRL1</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00524">ac.h:524</a></div></div>
<div class="ttc" id="aunionAC__SYNCBUSY__Type_html_a23ecd9c4fb7f223221a0cb3180caaf3a"><div class="ttname"><a href="unionAC__SYNCBUSY__Type.html#a23ecd9c4fb7f223221a0cb3180caaf3a">AC_SYNCBUSY_Type::COMPCTRL</a></div><div class="ttdeci">uint32_t COMPCTRL</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00529">ac.h:529</a></div></div>
<div class="ttc" id="asame54n19a_8h_html_a0d957f1433aaf5d70e4dc2b68288442d"><div class="ttname"><a href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a></div><div class="ttdeci">volatile const uint8_t RoReg8</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00053">same54n19a.h:53</a></div></div>
<div class="ttc" id="aunionAC__CTRLA__Type_html_a7d4dbc05e6d8ee0ca55797be6b20ce23"><div class="ttname"><a href="unionAC__CTRLA__Type.html#a7d4dbc05e6d8ee0ca55797be6b20ce23">AC_CTRLA_Type::ENABLE</a></div><div class="ttdeci">uint8_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00047">ac.h:47</a></div></div>
<div class="ttc" id="aunionAC__INTFLAG__Type_html_ad58500b89fa5a233363adf0c7d116ee4"><div class="ttname"><a href="unionAC__INTFLAG__Type.html#ad58500b89fa5a233363adf0c7d116ee4">AC_INTFLAG_Type::uint8_t</a></div><div class="ttdeci">__I uint8_t</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00232">ac.h:232</a></div></div>
<div class="ttc" id="aunionAC__EVCTRL__Type_html_a7ad83dec94ecd1af02f74c0114696673"><div class="ttname"><a href="unionAC__EVCTRL__Type.html#a7ad83dec94ecd1af02f74c0114696673">AC_EVCTRL_Type::COMPEI1</a></div><div class="ttdeci">uint16_t COMPEI1</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00101">ac.h:101</a></div></div>
<div class="ttc" id="aunionAC__SYNCBUSY__Type_html_ae8202bea34802ef5e4b2e9003616018f"><div class="ttname"><a href="unionAC__SYNCBUSY__Type.html#ae8202bea34802ef5e4b2e9003616018f">AC_SYNCBUSY_Type::COMPCTRL0</a></div><div class="ttdeci">uint32_t COMPCTRL0</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00523">ac.h:523</a></div></div>
<div class="ttc" id="aunionAC__COMPCTRL__Type_html_a76749cc9c2d3bc908b2ea9c1ece23ec3"><div class="ttname"><a href="unionAC__COMPCTRL__Type.html#a76749cc9c2d3bc908b2ea9c1ece23ec3">AC_COMPCTRL_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00422">ac.h:422</a></div></div>
<div class="ttc" id="aunionAC__INTENCLR__Type_html"><div class="ttname"><a href="unionAC__INTENCLR__Type.html">AC_INTENCLR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00154">ac.h:154</a></div></div>
<div class="ttc" id="aunionAC__COMPCTRL__Type_html_ad0a2a07795535199a9823b0b8acf9e6b"><div class="ttname"><a href="unionAC__COMPCTRL__Type.html#ad0a2a07795535199a9823b0b8acf9e6b">AC_COMPCTRL_Type::FLEN</a></div><div class="ttdeci">uint32_t FLEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00417">ac.h:417</a></div></div>
<div class="ttc" id="astructAc_html_a3c53909f19187625e2423f7dbb57ddc7"><div class="ttname"><a href="structAc.html#a3c53909f19187625e2423f7dbb57ddc7">Ac::INTENSET</a></div><div class="ttdeci">__IO AC_INTENSET_Type INTENSET</div><div class="ttdoc">Offset: 0x05 (R/W 8) Interrupt Enable Set.</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00580">ac.h:580</a></div></div>
<div class="ttc" id="aunionAC__CTRLB__Type_html_ad032eca8740fe2f0e8471bc9080db59e"><div class="ttname"><a href="unionAC__CTRLB__Type.html#ad032eca8740fe2f0e8471bc9080db59e">AC_CTRLB_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00075">ac.h:75</a></div></div>
<div class="ttc" id="aunionAC__EVCTRL__Type_html_a9c3e7ed4fbb3058255cf3dc0ae712254"><div class="ttname"><a href="unionAC__EVCTRL__Type.html#a9c3e7ed4fbb3058255cf3dc0ae712254">AC_EVCTRL_Type::INVEI1</a></div><div class="ttdeci">uint16_t INVEI1</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00104">ac.h:104</a></div></div>
<div class="ttc" id="aunionAC__STATUSA__Type_html_aafc204d5f99edf223fe6182171df9e78"><div class="ttname"><a href="unionAC__STATUSA__Type.html#aafc204d5f99edf223fe6182171df9e78">AC_STATUSA_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00277">ac.h:277</a></div></div>
<div class="ttc" id="aunionAC__DBGCTRL__Type_html"><div class="ttname"><a href="unionAC__DBGCTRL__Type.html">AC_DBGCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00332">ac.h:332</a></div></div>
<div class="ttc" id="aunionAC__DBGCTRL__Type_html_a6ecc7ace6ccdaff93e210bc5f06bae1b"><div class="ttname"><a href="unionAC__DBGCTRL__Type.html#a6ecc7ace6ccdaff93e210bc5f06bae1b">AC_DBGCTRL_Type::DBGRUN</a></div><div class="ttdeci">uint8_t DBGRUN</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00334">ac.h:334</a></div></div>
<div class="ttc" id="aunionAC__INTENCLR__Type_html_aa0138a6b5c6c745c76b4e59b9b2b4f47"><div class="ttname"><a href="unionAC__INTENCLR__Type.html#aa0138a6b5c6c745c76b4e59b9b2b4f47">AC_INTENCLR_Type::WIN0</a></div><div class="ttdeci">uint8_t WIN0</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00159">ac.h:159</a></div></div>
<div class="ttc" id="aunionAC__INTENCLR__Type_html_a77caac22c3b30a179a8f395907220e94"><div class="ttname"><a href="unionAC__INTENCLR__Type.html#a77caac22c3b30a179a8f395907220e94">AC_INTENCLR_Type::COMP1</a></div><div class="ttdeci">uint8_t COMP1</div><div class="ttdef"><b>Definition:</b> <a href="component_2ac_8h_source.html#l00157">ac.h:157</a></div></div>
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<p>Component description for AES.
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_U2238</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>REV_AES</b>&#160;&#160;&#160;0x220</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a90e931857a085af986881f27722999e4">AES_CTRLA_OFFSET</a>&#160;&#160;&#160;0x00</td></tr>
<tr class="memdesc:a90e931857a085af986881f27722999e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA offset) Control A <br /></td></tr>
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<tr class="memitem:ad9c6d6bda70f75bbf70b8e1b5acba337"><td class="memItemLeft" align="right" valign="top"><a id="ad9c6d6bda70f75bbf70b8e1b5acba337"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#ad9c6d6bda70f75bbf70b8e1b5acba337">AES_CTRLA_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:ad9c6d6bda70f75bbf70b8e1b5acba337"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA reset_value) Control A <br /></td></tr>
<tr class="separator:ad9c6d6bda70f75bbf70b8e1b5acba337"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad701aaa88264f53b847405a38b088351"><td class="memItemLeft" align="right" valign="top"><a id="ad701aaa88264f53b847405a38b088351"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#ad701aaa88264f53b847405a38b088351">AES_CTRLA_SWRST_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ad701aaa88264f53b847405a38b088351"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) Software Reset <br /></td></tr>
<tr class="separator:ad701aaa88264f53b847405a38b088351"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac549276655cfe2e832c329960f66c8df"><td class="memItemLeft" align="right" valign="top"><a id="ac549276655cfe2e832c329960f66c8df"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_SWRST</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2aes_8h.html#ad701aaa88264f53b847405a38b088351">AES_CTRLA_SWRST_Pos</a>)</td></tr>
<tr class="separator:ac549276655cfe2e832c329960f66c8df"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a852dce37626d080c1920f4a78fd39082"><td class="memItemLeft" align="right" valign="top"><a id="a852dce37626d080c1920f4a78fd39082"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a852dce37626d080c1920f4a78fd39082">AES_CTRLA_ENABLE_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:a852dce37626d080c1920f4a78fd39082"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) Enable <br /></td></tr>
<tr class="separator:a852dce37626d080c1920f4a78fd39082"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a403fdb8bdab7b5178453848ed44e121d"><td class="memItemLeft" align="right" valign="top"><a id="a403fdb8bdab7b5178453848ed44e121d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_ENABLE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2aes_8h.html#a852dce37626d080c1920f4a78fd39082">AES_CTRLA_ENABLE_Pos</a>)</td></tr>
<tr class="separator:a403fdb8bdab7b5178453848ed44e121d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a34f19d66a686bd490bdca835622d028c"><td class="memItemLeft" align="right" valign="top"><a id="a34f19d66a686bd490bdca835622d028c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a34f19d66a686bd490bdca835622d028c">AES_CTRLA_AESMODE_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:a34f19d66a686bd490bdca835622d028c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) AES Modes of operation <br /></td></tr>
<tr class="separator:a34f19d66a686bd490bdca835622d028c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad76a6adcd9f7cba3d63d0b3616971a65"><td class="memItemLeft" align="right" valign="top"><a id="ad76a6adcd9f7cba3d63d0b3616971a65"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_AESMODE_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) &lt;&lt; <a class="el" href="component_2aes_8h.html#a34f19d66a686bd490bdca835622d028c">AES_CTRLA_AESMODE_Pos</a>)</td></tr>
<tr class="separator:ad76a6adcd9f7cba3d63d0b3616971a65"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a38d0e4ce6ddcecd130f0bc4553c96ce2"><td class="memItemLeft" align="right" valign="top"><a id="a38d0e4ce6ddcecd130f0bc4553c96ce2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_AESMODE</b>(value)&#160;&#160;&#160;(AES_CTRLA_AESMODE_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2aes_8h.html#a34f19d66a686bd490bdca835622d028c">AES_CTRLA_AESMODE_Pos</a>))</td></tr>
<tr class="separator:a38d0e4ce6ddcecd130f0bc4553c96ce2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a098b438a3d941936c5ace9c0f33b717d"><td class="memItemLeft" align="right" valign="top"><a id="a098b438a3d941936c5ace9c0f33b717d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a098b438a3d941936c5ace9c0f33b717d">AES_CTRLA_AESMODE_ECB_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a098b438a3d941936c5ace9c0f33b717d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) Electronic code book mode <br /></td></tr>
<tr class="separator:a098b438a3d941936c5ace9c0f33b717d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3e632500edc9f4433c6a8da5a11c4952"><td class="memItemLeft" align="right" valign="top"><a id="a3e632500edc9f4433c6a8da5a11c4952"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a3e632500edc9f4433c6a8da5a11c4952">AES_CTRLA_AESMODE_CBC_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:a3e632500edc9f4433c6a8da5a11c4952"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) Cipher block chaining mode <br /></td></tr>
<tr class="separator:a3e632500edc9f4433c6a8da5a11c4952"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0b9db4f304e59dc4cf2bcca6542f3bb0"><td class="memItemLeft" align="right" valign="top"><a id="a0b9db4f304e59dc4cf2bcca6542f3bb0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a0b9db4f304e59dc4cf2bcca6542f3bb0">AES_CTRLA_AESMODE_OFB_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a0b9db4f304e59dc4cf2bcca6542f3bb0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) Output feedback mode <br /></td></tr>
<tr class="separator:a0b9db4f304e59dc4cf2bcca6542f3bb0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aebc8a6143cb676d80ecc39480c3cbdbc"><td class="memItemLeft" align="right" valign="top"><a id="aebc8a6143cb676d80ecc39480c3cbdbc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#aebc8a6143cb676d80ecc39480c3cbdbc">AES_CTRLA_AESMODE_CFB_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
<tr class="memdesc:aebc8a6143cb676d80ecc39480c3cbdbc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) Cipher feedback mode <br /></td></tr>
<tr class="separator:aebc8a6143cb676d80ecc39480c3cbdbc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0834f927bf839db0687cc2ab5552bc8d"><td class="memItemLeft" align="right" valign="top"><a id="a0834f927bf839db0687cc2ab5552bc8d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a0834f927bf839db0687cc2ab5552bc8d">AES_CTRLA_AESMODE_COUNTER_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
<tr class="memdesc:a0834f927bf839db0687cc2ab5552bc8d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) Counter mode <br /></td></tr>
<tr class="separator:a0834f927bf839db0687cc2ab5552bc8d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab9f33ac4176e8b315c485c6d7c5c2aba"><td class="memItemLeft" align="right" valign="top"><a id="ab9f33ac4176e8b315c485c6d7c5c2aba"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#ab9f33ac4176e8b315c485c6d7c5c2aba">AES_CTRLA_AESMODE_CCM_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
<tr class="memdesc:ab9f33ac4176e8b315c485c6d7c5c2aba"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) CCM mode <br /></td></tr>
<tr class="separator:ab9f33ac4176e8b315c485c6d7c5c2aba"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a92053e62c1213c2c1a349f4f120d98f8"><td class="memItemLeft" align="right" valign="top"><a id="a92053e62c1213c2c1a349f4f120d98f8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a92053e62c1213c2c1a349f4f120d98f8">AES_CTRLA_AESMODE_GCM_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x6)</td></tr>
<tr class="memdesc:a92053e62c1213c2c1a349f4f120d98f8"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) Galois counter mode <br /></td></tr>
<tr class="separator:a92053e62c1213c2c1a349f4f120d98f8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a14d58aa2317207155379ac43edf03d65"><td class="memItemLeft" align="right" valign="top"><a id="a14d58aa2317207155379ac43edf03d65"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_AESMODE_ECB</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#a098b438a3d941936c5ace9c0f33b717d">AES_CTRLA_AESMODE_ECB_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#a34f19d66a686bd490bdca835622d028c">AES_CTRLA_AESMODE_Pos</a>)</td></tr>
<tr class="separator:a14d58aa2317207155379ac43edf03d65"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac5d31f5be87332975b30b6ceb645276a"><td class="memItemLeft" align="right" valign="top"><a id="ac5d31f5be87332975b30b6ceb645276a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_AESMODE_CBC</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#a3e632500edc9f4433c6a8da5a11c4952">AES_CTRLA_AESMODE_CBC_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#a34f19d66a686bd490bdca835622d028c">AES_CTRLA_AESMODE_Pos</a>)</td></tr>
<tr class="separator:ac5d31f5be87332975b30b6ceb645276a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a41d837e2fd24176612bdb6800af69ae2"><td class="memItemLeft" align="right" valign="top"><a id="a41d837e2fd24176612bdb6800af69ae2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_AESMODE_OFB</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#a0b9db4f304e59dc4cf2bcca6542f3bb0">AES_CTRLA_AESMODE_OFB_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#a34f19d66a686bd490bdca835622d028c">AES_CTRLA_AESMODE_Pos</a>)</td></tr>
<tr class="separator:a41d837e2fd24176612bdb6800af69ae2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1d85ed579c0ecd29797f06e51d4e1e55"><td class="memItemLeft" align="right" valign="top"><a id="a1d85ed579c0ecd29797f06e51d4e1e55"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_AESMODE_CFB</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#aebc8a6143cb676d80ecc39480c3cbdbc">AES_CTRLA_AESMODE_CFB_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#a34f19d66a686bd490bdca835622d028c">AES_CTRLA_AESMODE_Pos</a>)</td></tr>
<tr class="separator:a1d85ed579c0ecd29797f06e51d4e1e55"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a26b306a0eaf8be99a0cc4623f96c0bfe"><td class="memItemLeft" align="right" valign="top"><a id="a26b306a0eaf8be99a0cc4623f96c0bfe"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_AESMODE_COUNTER</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#a0834f927bf839db0687cc2ab5552bc8d">AES_CTRLA_AESMODE_COUNTER_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#a34f19d66a686bd490bdca835622d028c">AES_CTRLA_AESMODE_Pos</a>)</td></tr>
<tr class="separator:a26b306a0eaf8be99a0cc4623f96c0bfe"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6a1fb3b61df032607185817032d376ce"><td class="memItemLeft" align="right" valign="top"><a id="a6a1fb3b61df032607185817032d376ce"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_AESMODE_CCM</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#ab9f33ac4176e8b315c485c6d7c5c2aba">AES_CTRLA_AESMODE_CCM_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#a34f19d66a686bd490bdca835622d028c">AES_CTRLA_AESMODE_Pos</a>)</td></tr>
<tr class="separator:a6a1fb3b61df032607185817032d376ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad91006d34ba9df4e3b6a59cefcb13a9c"><td class="memItemLeft" align="right" valign="top"><a id="ad91006d34ba9df4e3b6a59cefcb13a9c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_AESMODE_GCM</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#a92053e62c1213c2c1a349f4f120d98f8">AES_CTRLA_AESMODE_GCM_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#a34f19d66a686bd490bdca835622d028c">AES_CTRLA_AESMODE_Pos</a>)</td></tr>
<tr class="separator:ad91006d34ba9df4e3b6a59cefcb13a9c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aed0081b2f8068882e43b04bd39c0558f"><td class="memItemLeft" align="right" valign="top"><a id="aed0081b2f8068882e43b04bd39c0558f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#aed0081b2f8068882e43b04bd39c0558f">AES_CTRLA_CFBS_Pos</a>&#160;&#160;&#160;5</td></tr>
<tr class="memdesc:aed0081b2f8068882e43b04bd39c0558f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) Cipher Feedback Block Size <br /></td></tr>
<tr class="separator:aed0081b2f8068882e43b04bd39c0558f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a11e5bc2f420bdf81b9b81216e49a5a28"><td class="memItemLeft" align="right" valign="top"><a id="a11e5bc2f420bdf81b9b81216e49a5a28"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_CFBS_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) &lt;&lt; <a class="el" href="component_2aes_8h.html#aed0081b2f8068882e43b04bd39c0558f">AES_CTRLA_CFBS_Pos</a>)</td></tr>
<tr class="separator:a11e5bc2f420bdf81b9b81216e49a5a28"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a23d866b63035e135a0d6ade57b445677"><td class="memItemLeft" align="right" valign="top"><a id="a23d866b63035e135a0d6ade57b445677"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_CFBS</b>(value)&#160;&#160;&#160;(AES_CTRLA_CFBS_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2aes_8h.html#aed0081b2f8068882e43b04bd39c0558f">AES_CTRLA_CFBS_Pos</a>))</td></tr>
<tr class="separator:a23d866b63035e135a0d6ade57b445677"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6711abfcb46c4e4ef14b6ececc87601e"><td class="memItemLeft" align="right" valign="top"><a id="a6711abfcb46c4e4ef14b6ececc87601e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a6711abfcb46c4e4ef14b6ececc87601e">AES_CTRLA_CFBS_128BIT_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a6711abfcb46c4e4ef14b6ececc87601e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) 128-bit Input data block for Encryption/Decryption in Cipher Feedback mode <br /></td></tr>
<tr class="separator:a6711abfcb46c4e4ef14b6ececc87601e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a22b1b7d87e83ae9c9f7d7215186b4d4c"><td class="memItemLeft" align="right" valign="top"><a id="a22b1b7d87e83ae9c9f7d7215186b4d4c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a22b1b7d87e83ae9c9f7d7215186b4d4c">AES_CTRLA_CFBS_64BIT_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:a22b1b7d87e83ae9c9f7d7215186b4d4c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) 64-bit Input data block for Encryption/Decryption in Cipher Feedback mode <br /></td></tr>
<tr class="separator:a22b1b7d87e83ae9c9f7d7215186b4d4c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9255981a1360616c0511a412c269a0ea"><td class="memItemLeft" align="right" valign="top"><a id="a9255981a1360616c0511a412c269a0ea"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a9255981a1360616c0511a412c269a0ea">AES_CTRLA_CFBS_32BIT_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a9255981a1360616c0511a412c269a0ea"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) 32-bit Input data block for Encryption/Decryption in Cipher Feedback mode <br /></td></tr>
<tr class="separator:a9255981a1360616c0511a412c269a0ea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a636c68a01504ee27108961d0c7b92f7e"><td class="memItemLeft" align="right" valign="top"><a id="a636c68a01504ee27108961d0c7b92f7e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a636c68a01504ee27108961d0c7b92f7e">AES_CTRLA_CFBS_16BIT_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
<tr class="memdesc:a636c68a01504ee27108961d0c7b92f7e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) 16-bit Input data block for Encryption/Decryption in Cipher Feedback mode <br /></td></tr>
<tr class="separator:a636c68a01504ee27108961d0c7b92f7e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4e46d835d21bf301e949c68b7ea15e3a"><td class="memItemLeft" align="right" valign="top"><a id="a4e46d835d21bf301e949c68b7ea15e3a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a4e46d835d21bf301e949c68b7ea15e3a">AES_CTRLA_CFBS_8BIT_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
<tr class="memdesc:a4e46d835d21bf301e949c68b7ea15e3a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) 8-bit Input data block for Encryption/Decryption in Cipher Feedback mode <br /></td></tr>
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<tr class="memitem:a4517ade9c27ad6481959e63f8b737c05"><td class="memItemLeft" align="right" valign="top"><a id="a4517ade9c27ad6481959e63f8b737c05"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_CFBS_128BIT</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#a6711abfcb46c4e4ef14b6ececc87601e">AES_CTRLA_CFBS_128BIT_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#aed0081b2f8068882e43b04bd39c0558f">AES_CTRLA_CFBS_Pos</a>)</td></tr>
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<tr class="memitem:ac27c91c7eb1b9c19d0a7af9c9a91d1f3"><td class="memItemLeft" align="right" valign="top"><a id="ac27c91c7eb1b9c19d0a7af9c9a91d1f3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_CFBS_64BIT</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#a22b1b7d87e83ae9c9f7d7215186b4d4c">AES_CTRLA_CFBS_64BIT_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#aed0081b2f8068882e43b04bd39c0558f">AES_CTRLA_CFBS_Pos</a>)</td></tr>
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<tr class="memitem:a1d3b01f69e9999e2e53d669bae7b3cdb"><td class="memItemLeft" align="right" valign="top"><a id="a1d3b01f69e9999e2e53d669bae7b3cdb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_CFBS_32BIT</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#a9255981a1360616c0511a412c269a0ea">AES_CTRLA_CFBS_32BIT_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#aed0081b2f8068882e43b04bd39c0558f">AES_CTRLA_CFBS_Pos</a>)</td></tr>
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<tr class="memitem:a7dcc00fdec1f22b29623f2d70623254d"><td class="memItemLeft" align="right" valign="top"><a id="a7dcc00fdec1f22b29623f2d70623254d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_CFBS_16BIT</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#a636c68a01504ee27108961d0c7b92f7e">AES_CTRLA_CFBS_16BIT_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#aed0081b2f8068882e43b04bd39c0558f">AES_CTRLA_CFBS_Pos</a>)</td></tr>
<tr class="separator:a7dcc00fdec1f22b29623f2d70623254d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2392a98965cc0f09892ed31fbe807732"><td class="memItemLeft" align="right" valign="top"><a id="a2392a98965cc0f09892ed31fbe807732"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_CFBS_8BIT</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#a4e46d835d21bf301e949c68b7ea15e3a">AES_CTRLA_CFBS_8BIT_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#aed0081b2f8068882e43b04bd39c0558f">AES_CTRLA_CFBS_Pos</a>)</td></tr>
<tr class="separator:a2392a98965cc0f09892ed31fbe807732"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a48a5ec79fc1a2dddbed967d4322fb98f"><td class="memItemLeft" align="right" valign="top"><a id="a48a5ec79fc1a2dddbed967d4322fb98f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a48a5ec79fc1a2dddbed967d4322fb98f">AES_CTRLA_KEYSIZE_Pos</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:a48a5ec79fc1a2dddbed967d4322fb98f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) Encryption Key Size <br /></td></tr>
<tr class="separator:a48a5ec79fc1a2dddbed967d4322fb98f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae1e87b18adcf08e1d0ccb376655f9002"><td class="memItemLeft" align="right" valign="top"><a id="ae1e87b18adcf08e1d0ccb376655f9002"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_KEYSIZE_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2aes_8h.html#a48a5ec79fc1a2dddbed967d4322fb98f">AES_CTRLA_KEYSIZE_Pos</a>)</td></tr>
<tr class="separator:ae1e87b18adcf08e1d0ccb376655f9002"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad7fe55824672554d8f4753435bed64e7"><td class="memItemLeft" align="right" valign="top"><a id="ad7fe55824672554d8f4753435bed64e7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_KEYSIZE</b>(value)&#160;&#160;&#160;(AES_CTRLA_KEYSIZE_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2aes_8h.html#a48a5ec79fc1a2dddbed967d4322fb98f">AES_CTRLA_KEYSIZE_Pos</a>))</td></tr>
<tr class="separator:ad7fe55824672554d8f4753435bed64e7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a87b5b6b70f9a922464332015e0dbf3d6"><td class="memItemLeft" align="right" valign="top"><a id="a87b5b6b70f9a922464332015e0dbf3d6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a87b5b6b70f9a922464332015e0dbf3d6">AES_CTRLA_KEYSIZE_128BIT_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a87b5b6b70f9a922464332015e0dbf3d6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) 128-bit Key for Encryption / Decryption <br /></td></tr>
<tr class="separator:a87b5b6b70f9a922464332015e0dbf3d6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad67bdc4b7851877250d1b90d8da52565"><td class="memItemLeft" align="right" valign="top"><a id="ad67bdc4b7851877250d1b90d8da52565"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#ad67bdc4b7851877250d1b90d8da52565">AES_CTRLA_KEYSIZE_192BIT_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:ad67bdc4b7851877250d1b90d8da52565"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) 192-bit Key for Encryption / Decryption <br /></td></tr>
<tr class="separator:ad67bdc4b7851877250d1b90d8da52565"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af068e9e0d64cf0da58b4813e41ae2e0a"><td class="memItemLeft" align="right" valign="top"><a id="af068e9e0d64cf0da58b4813e41ae2e0a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#af068e9e0d64cf0da58b4813e41ae2e0a">AES_CTRLA_KEYSIZE_256BIT_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:af068e9e0d64cf0da58b4813e41ae2e0a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) 256-bit Key for Encryption / Decryption <br /></td></tr>
<tr class="separator:af068e9e0d64cf0da58b4813e41ae2e0a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a81142d8b379287aa4bfaff33aab64ffc"><td class="memItemLeft" align="right" valign="top"><a id="a81142d8b379287aa4bfaff33aab64ffc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_KEYSIZE_128BIT</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#a87b5b6b70f9a922464332015e0dbf3d6">AES_CTRLA_KEYSIZE_128BIT_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#a48a5ec79fc1a2dddbed967d4322fb98f">AES_CTRLA_KEYSIZE_Pos</a>)</td></tr>
<tr class="separator:a81142d8b379287aa4bfaff33aab64ffc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae31b361b6a617655470af284f8f1c7ea"><td class="memItemLeft" align="right" valign="top"><a id="ae31b361b6a617655470af284f8f1c7ea"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_KEYSIZE_192BIT</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#ad67bdc4b7851877250d1b90d8da52565">AES_CTRLA_KEYSIZE_192BIT_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#a48a5ec79fc1a2dddbed967d4322fb98f">AES_CTRLA_KEYSIZE_Pos</a>)</td></tr>
<tr class="separator:ae31b361b6a617655470af284f8f1c7ea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5d179d910b23e4416ceef386384d53ad"><td class="memItemLeft" align="right" valign="top"><a id="a5d179d910b23e4416ceef386384d53ad"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_KEYSIZE_256BIT</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#af068e9e0d64cf0da58b4813e41ae2e0a">AES_CTRLA_KEYSIZE_256BIT_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#a48a5ec79fc1a2dddbed967d4322fb98f">AES_CTRLA_KEYSIZE_Pos</a>)</td></tr>
<tr class="separator:a5d179d910b23e4416ceef386384d53ad"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a25c49e1e3486f33caa38cdffaecd2024"><td class="memItemLeft" align="right" valign="top"><a id="a25c49e1e3486f33caa38cdffaecd2024"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a25c49e1e3486f33caa38cdffaecd2024">AES_CTRLA_CIPHER_Pos</a>&#160;&#160;&#160;10</td></tr>
<tr class="memdesc:a25c49e1e3486f33caa38cdffaecd2024"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) Cipher Mode <br /></td></tr>
<tr class="separator:a25c49e1e3486f33caa38cdffaecd2024"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac564c1ac0494b0a74cbbbb1d6d0204af"><td class="memItemLeft" align="right" valign="top"><a id="ac564c1ac0494b0a74cbbbb1d6d0204af"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_CIPHER</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2aes_8h.html#a25c49e1e3486f33caa38cdffaecd2024">AES_CTRLA_CIPHER_Pos</a>)</td></tr>
<tr class="separator:ac564c1ac0494b0a74cbbbb1d6d0204af"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a01464e8411876289eaa270378dcd0d73"><td class="memItemLeft" align="right" valign="top"><a id="a01464e8411876289eaa270378dcd0d73"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a01464e8411876289eaa270378dcd0d73">AES_CTRLA_CIPHER_DEC_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a01464e8411876289eaa270378dcd0d73"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) Decryption <br /></td></tr>
<tr class="separator:a01464e8411876289eaa270378dcd0d73"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6a4b8a6bf66c02e172f0a765738ffe58"><td class="memItemLeft" align="right" valign="top"><a id="a6a4b8a6bf66c02e172f0a765738ffe58"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a6a4b8a6bf66c02e172f0a765738ffe58">AES_CTRLA_CIPHER_ENC_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:a6a4b8a6bf66c02e172f0a765738ffe58"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) Encryption <br /></td></tr>
<tr class="separator:a6a4b8a6bf66c02e172f0a765738ffe58"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a152977e93350ed0ed742e4036ba499eb"><td class="memItemLeft" align="right" valign="top"><a id="a152977e93350ed0ed742e4036ba499eb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_CIPHER_DEC</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#a01464e8411876289eaa270378dcd0d73">AES_CTRLA_CIPHER_DEC_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#a25c49e1e3486f33caa38cdffaecd2024">AES_CTRLA_CIPHER_Pos</a>)</td></tr>
<tr class="separator:a152977e93350ed0ed742e4036ba499eb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a82a8e1513dfc818c694a37157d70d253"><td class="memItemLeft" align="right" valign="top"><a id="a82a8e1513dfc818c694a37157d70d253"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_CIPHER_ENC</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#a6a4b8a6bf66c02e172f0a765738ffe58">AES_CTRLA_CIPHER_ENC_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#a25c49e1e3486f33caa38cdffaecd2024">AES_CTRLA_CIPHER_Pos</a>)</td></tr>
<tr class="separator:a82a8e1513dfc818c694a37157d70d253"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a785ffe6bd686b87bd010931ffd325043"><td class="memItemLeft" align="right" valign="top"><a id="a785ffe6bd686b87bd010931ffd325043"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a785ffe6bd686b87bd010931ffd325043">AES_CTRLA_STARTMODE_Pos</a>&#160;&#160;&#160;11</td></tr>
<tr class="memdesc:a785ffe6bd686b87bd010931ffd325043"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) Start Mode Select <br /></td></tr>
<tr class="separator:a785ffe6bd686b87bd010931ffd325043"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7f652048efc1b2f0ce7610881a109178"><td class="memItemLeft" align="right" valign="top"><a id="a7f652048efc1b2f0ce7610881a109178"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_STARTMODE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2aes_8h.html#a785ffe6bd686b87bd010931ffd325043">AES_CTRLA_STARTMODE_Pos</a>)</td></tr>
<tr class="separator:a7f652048efc1b2f0ce7610881a109178"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad7e65c90f21d677de34526fe70156ce4"><td class="memItemLeft" align="right" valign="top"><a id="ad7e65c90f21d677de34526fe70156ce4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#ad7e65c90f21d677de34526fe70156ce4">AES_CTRLA_STARTMODE_MANUAL_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:ad7e65c90f21d677de34526fe70156ce4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) Start Encryption / Decryption in Manual mode <br /></td></tr>
<tr class="separator:ad7e65c90f21d677de34526fe70156ce4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6844c348979b9d67156784c1204e81c1"><td class="memItemLeft" align="right" valign="top"><a id="a6844c348979b9d67156784c1204e81c1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a6844c348979b9d67156784c1204e81c1">AES_CTRLA_STARTMODE_AUTO_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:a6844c348979b9d67156784c1204e81c1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) Start Encryption / Decryption in Auto mode <br /></td></tr>
<tr class="separator:a6844c348979b9d67156784c1204e81c1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a00cddc09c1708fb5dd76c4fbb32979be"><td class="memItemLeft" align="right" valign="top"><a id="a00cddc09c1708fb5dd76c4fbb32979be"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_STARTMODE_MANUAL</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#ad7e65c90f21d677de34526fe70156ce4">AES_CTRLA_STARTMODE_MANUAL_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#a785ffe6bd686b87bd010931ffd325043">AES_CTRLA_STARTMODE_Pos</a>)</td></tr>
<tr class="separator:a00cddc09c1708fb5dd76c4fbb32979be"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a90aa744772eb033d4203002fac2ca8d0"><td class="memItemLeft" align="right" valign="top"><a id="a90aa744772eb033d4203002fac2ca8d0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_STARTMODE_AUTO</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#a6844c348979b9d67156784c1204e81c1">AES_CTRLA_STARTMODE_AUTO_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#a785ffe6bd686b87bd010931ffd325043">AES_CTRLA_STARTMODE_Pos</a>)</td></tr>
<tr class="separator:a90aa744772eb033d4203002fac2ca8d0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af6e4b7aee8ec535dfaf64b94f3df787a"><td class="memItemLeft" align="right" valign="top"><a id="af6e4b7aee8ec535dfaf64b94f3df787a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#af6e4b7aee8ec535dfaf64b94f3df787a">AES_CTRLA_LOD_Pos</a>&#160;&#160;&#160;12</td></tr>
<tr class="memdesc:af6e4b7aee8ec535dfaf64b94f3df787a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) Last Output Data Mode <br /></td></tr>
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<tr class="memitem:a894e7837b51c42802e9d2fbb5f036fde"><td class="memItemLeft" align="right" valign="top"><a id="a894e7837b51c42802e9d2fbb5f036fde"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_LOD</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2aes_8h.html#af6e4b7aee8ec535dfaf64b94f3df787a">AES_CTRLA_LOD_Pos</a>)</td></tr>
<tr class="separator:a894e7837b51c42802e9d2fbb5f036fde"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab0e6011c9e47708ecbbc00f02a0d7790"><td class="memItemLeft" align="right" valign="top"><a id="ab0e6011c9e47708ecbbc00f02a0d7790"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#ab0e6011c9e47708ecbbc00f02a0d7790">AES_CTRLA_LOD_NONE_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:ab0e6011c9e47708ecbbc00f02a0d7790"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) No effect <br /></td></tr>
<tr class="separator:ab0e6011c9e47708ecbbc00f02a0d7790"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a47c2d51199c68923a8d27506dde9ef05"><td class="memItemLeft" align="right" valign="top"><a id="a47c2d51199c68923a8d27506dde9ef05"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a47c2d51199c68923a8d27506dde9ef05">AES_CTRLA_LOD_LAST_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:a47c2d51199c68923a8d27506dde9ef05"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) Start encryption in Last Output Data mode <br /></td></tr>
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<tr class="memitem:a6c29a8f7a93aa993f2957373e38f011d"><td class="memItemLeft" align="right" valign="top"><a id="a6c29a8f7a93aa993f2957373e38f011d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_LOD_NONE</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#ab0e6011c9e47708ecbbc00f02a0d7790">AES_CTRLA_LOD_NONE_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#af6e4b7aee8ec535dfaf64b94f3df787a">AES_CTRLA_LOD_Pos</a>)</td></tr>
<tr class="separator:a6c29a8f7a93aa993f2957373e38f011d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8dcc2a6a1489b679d663eb2ffa76150b"><td class="memItemLeft" align="right" valign="top"><a id="a8dcc2a6a1489b679d663eb2ffa76150b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_LOD_LAST</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#a47c2d51199c68923a8d27506dde9ef05">AES_CTRLA_LOD_LAST_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#af6e4b7aee8ec535dfaf64b94f3df787a">AES_CTRLA_LOD_Pos</a>)</td></tr>
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<tr class="memitem:a55ca29e4273692d315f1b00528d26e66"><td class="memItemLeft" align="right" valign="top"><a id="a55ca29e4273692d315f1b00528d26e66"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a55ca29e4273692d315f1b00528d26e66">AES_CTRLA_KEYGEN_Pos</a>&#160;&#160;&#160;13</td></tr>
<tr class="memdesc:a55ca29e4273692d315f1b00528d26e66"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) Last Key Generation <br /></td></tr>
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<tr class="memitem:a40b063ff72ea55cc0319e34aa3767113"><td class="memItemLeft" align="right" valign="top"><a id="a40b063ff72ea55cc0319e34aa3767113"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_KEYGEN</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2aes_8h.html#a55ca29e4273692d315f1b00528d26e66">AES_CTRLA_KEYGEN_Pos</a>)</td></tr>
<tr class="separator:a40b063ff72ea55cc0319e34aa3767113"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5546431e3132fd71abad6972799e9d92"><td class="memItemLeft" align="right" valign="top"><a id="a5546431e3132fd71abad6972799e9d92"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a5546431e3132fd71abad6972799e9d92">AES_CTRLA_KEYGEN_NONE_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a5546431e3132fd71abad6972799e9d92"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) No effect <br /></td></tr>
<tr class="separator:a5546431e3132fd71abad6972799e9d92"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afb04e48eea55b84ff8e4b9d134929ed6"><td class="memItemLeft" align="right" valign="top"><a id="afb04e48eea55b84ff8e4b9d134929ed6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#afb04e48eea55b84ff8e4b9d134929ed6">AES_CTRLA_KEYGEN_LAST_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:afb04e48eea55b84ff8e4b9d134929ed6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) Start Computation of the last NK words of the expanded key <br /></td></tr>
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<tr class="memitem:a276881cd803cb5df50480bbd1dcc2a22"><td class="memItemLeft" align="right" valign="top"><a id="a276881cd803cb5df50480bbd1dcc2a22"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_KEYGEN_NONE</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#a5546431e3132fd71abad6972799e9d92">AES_CTRLA_KEYGEN_NONE_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#a55ca29e4273692d315f1b00528d26e66">AES_CTRLA_KEYGEN_Pos</a>)</td></tr>
<tr class="separator:a276881cd803cb5df50480bbd1dcc2a22"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae07324a63d4d1b06c0f84834bde79abc"><td class="memItemLeft" align="right" valign="top"><a id="ae07324a63d4d1b06c0f84834bde79abc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_KEYGEN_LAST</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#afb04e48eea55b84ff8e4b9d134929ed6">AES_CTRLA_KEYGEN_LAST_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#a55ca29e4273692d315f1b00528d26e66">AES_CTRLA_KEYGEN_Pos</a>)</td></tr>
<tr class="separator:ae07324a63d4d1b06c0f84834bde79abc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ada84c7624ddefe20ad58bb1cb83e6a10"><td class="memItemLeft" align="right" valign="top"><a id="ada84c7624ddefe20ad58bb1cb83e6a10"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#ada84c7624ddefe20ad58bb1cb83e6a10">AES_CTRLA_XORKEY_Pos</a>&#160;&#160;&#160;14</td></tr>
<tr class="memdesc:ada84c7624ddefe20ad58bb1cb83e6a10"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) XOR Key Operation <br /></td></tr>
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<tr class="memitem:a915933995c89d8a3b509e918dd152ddb"><td class="memItemLeft" align="right" valign="top"><a id="a915933995c89d8a3b509e918dd152ddb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_XORKEY</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2aes_8h.html#ada84c7624ddefe20ad58bb1cb83e6a10">AES_CTRLA_XORKEY_Pos</a>)</td></tr>
<tr class="separator:a915933995c89d8a3b509e918dd152ddb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3de48ab257592839780f58f8ce29c925"><td class="memItemLeft" align="right" valign="top"><a id="a3de48ab257592839780f58f8ce29c925"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a3de48ab257592839780f58f8ce29c925">AES_CTRLA_XORKEY_NONE_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a3de48ab257592839780f58f8ce29c925"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) No effect <br /></td></tr>
<tr class="separator:a3de48ab257592839780f58f8ce29c925"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8dd7975a44849ac7545db404d7ca0934"><td class="memItemLeft" align="right" valign="top"><a id="a8dd7975a44849ac7545db404d7ca0934"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a8dd7975a44849ac7545db404d7ca0934">AES_CTRLA_XORKEY_XOR_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:a8dd7975a44849ac7545db404d7ca0934"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) The user keyword gets XORed with the previous keyword register content. <br /></td></tr>
<tr class="separator:a8dd7975a44849ac7545db404d7ca0934"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5d4cfd7b5f6e9948de6d96df399a1250"><td class="memItemLeft" align="right" valign="top"><a id="a5d4cfd7b5f6e9948de6d96df399a1250"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_XORKEY_NONE</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#a3de48ab257592839780f58f8ce29c925">AES_CTRLA_XORKEY_NONE_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#ada84c7624ddefe20ad58bb1cb83e6a10">AES_CTRLA_XORKEY_Pos</a>)</td></tr>
<tr class="separator:a5d4cfd7b5f6e9948de6d96df399a1250"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a93511a78c02611fc753341b7ba18eb94"><td class="memItemLeft" align="right" valign="top"><a id="a93511a78c02611fc753341b7ba18eb94"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_XORKEY_XOR</b>&#160;&#160;&#160;(<a class="el" href="component_2aes_8h.html#a8dd7975a44849ac7545db404d7ca0934">AES_CTRLA_XORKEY_XOR_Val</a> &lt;&lt; <a class="el" href="component_2aes_8h.html#ada84c7624ddefe20ad58bb1cb83e6a10">AES_CTRLA_XORKEY_Pos</a>)</td></tr>
<tr class="separator:a93511a78c02611fc753341b7ba18eb94"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0bfd0c90e0ee148b5a49d5d732a88caa"><td class="memItemLeft" align="right" valign="top"><a id="a0bfd0c90e0ee148b5a49d5d732a88caa"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a0bfd0c90e0ee148b5a49d5d732a88caa">AES_CTRLA_CTYPE_Pos</a>&#160;&#160;&#160;16</td></tr>
<tr class="memdesc:a0bfd0c90e0ee148b5a49d5d732a88caa"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) Counter Measure Type <br /></td></tr>
<tr class="separator:a0bfd0c90e0ee148b5a49d5d732a88caa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a054686d9f1ccf568d62d0cf2d2e6f9c6"><td class="memItemLeft" align="right" valign="top"><a id="a054686d9f1ccf568d62d0cf2d2e6f9c6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_CTYPE_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2aes_8h.html#a0bfd0c90e0ee148b5a49d5d732a88caa">AES_CTRLA_CTYPE_Pos</a>)</td></tr>
<tr class="separator:a054686d9f1ccf568d62d0cf2d2e6f9c6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae72968b666f5988d628485feb0655879"><td class="memItemLeft" align="right" valign="top"><a id="ae72968b666f5988d628485feb0655879"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLA_CTYPE</b>(value)&#160;&#160;&#160;(AES_CTRLA_CTYPE_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2aes_8h.html#a0bfd0c90e0ee148b5a49d5d732a88caa">AES_CTRLA_CTYPE_Pos</a>))</td></tr>
<tr class="separator:ae72968b666f5988d628485feb0655879"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad3d6155566850d559b4d5beb3da78125"><td class="memItemLeft" align="right" valign="top"><a id="ad3d6155566850d559b4d5beb3da78125"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#ad3d6155566850d559b4d5beb3da78125">AES_CTRLA_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x000F7FFF)</td></tr>
<tr class="memdesc:ad3d6155566850d559b4d5beb3da78125"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLA) MASK Register <br /></td></tr>
<tr class="separator:ad3d6155566850d559b4d5beb3da78125"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2f786e95894df5f05ff890a6748b7407"><td class="memItemLeft" align="right" valign="top"><a id="a2f786e95894df5f05ff890a6748b7407"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a2f786e95894df5f05ff890a6748b7407">AES_CTRLB_OFFSET</a>&#160;&#160;&#160;0x04</td></tr>
<tr class="memdesc:a2f786e95894df5f05ff890a6748b7407"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLB offset) Control B <br /></td></tr>
<tr class="separator:a2f786e95894df5f05ff890a6748b7407"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae33dc747714673fa684e0b0775460cf2"><td class="memItemLeft" align="right" valign="top"><a id="ae33dc747714673fa684e0b0775460cf2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#ae33dc747714673fa684e0b0775460cf2">AES_CTRLB_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:ae33dc747714673fa684e0b0775460cf2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLB reset_value) Control B <br /></td></tr>
<tr class="separator:ae33dc747714673fa684e0b0775460cf2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5cef25ba4d85f57f405363a1d79fc7cd"><td class="memItemLeft" align="right" valign="top"><a id="a5cef25ba4d85f57f405363a1d79fc7cd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a5cef25ba4d85f57f405363a1d79fc7cd">AES_CTRLB_START_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a5cef25ba4d85f57f405363a1d79fc7cd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLB) Start Encryption/Decryption <br /></td></tr>
<tr class="separator:a5cef25ba4d85f57f405363a1d79fc7cd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4ea6ae6c157958d04c50fc1baaf44448"><td class="memItemLeft" align="right" valign="top"><a id="a4ea6ae6c157958d04c50fc1baaf44448"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLB_START</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2aes_8h.html#a5cef25ba4d85f57f405363a1d79fc7cd">AES_CTRLB_START_Pos</a>)</td></tr>
<tr class="separator:a4ea6ae6c157958d04c50fc1baaf44448"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a962d612a59f8ac1b633fb52f2423a0a4"><td class="memItemLeft" align="right" valign="top"><a id="a962d612a59f8ac1b633fb52f2423a0a4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a962d612a59f8ac1b633fb52f2423a0a4">AES_CTRLB_NEWMSG_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:a962d612a59f8ac1b633fb52f2423a0a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLB) New message <br /></td></tr>
<tr class="separator:a962d612a59f8ac1b633fb52f2423a0a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a751c9256092414fa3a5ad41bd09d933c"><td class="memItemLeft" align="right" valign="top"><a id="a751c9256092414fa3a5ad41bd09d933c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLB_NEWMSG</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2aes_8h.html#a962d612a59f8ac1b633fb52f2423a0a4">AES_CTRLB_NEWMSG_Pos</a>)</td></tr>
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<tr class="memitem:aa7b1c7532b75cda1bb64fe22119fc29f"><td class="memItemLeft" align="right" valign="top"><a id="aa7b1c7532b75cda1bb64fe22119fc29f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#aa7b1c7532b75cda1bb64fe22119fc29f">AES_CTRLB_EOM_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:aa7b1c7532b75cda1bb64fe22119fc29f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLB) End of message <br /></td></tr>
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<tr class="memitem:aa4d9675cf88a1c45b86baad3495f11af"><td class="memItemLeft" align="right" valign="top"><a id="aa4d9675cf88a1c45b86baad3495f11af"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLB_EOM</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2aes_8h.html#aa7b1c7532b75cda1bb64fe22119fc29f">AES_CTRLB_EOM_Pos</a>)</td></tr>
<tr class="separator:aa4d9675cf88a1c45b86baad3495f11af"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1d4dac849fc2f226972fc7915ce2bb9a"><td class="memItemLeft" align="right" valign="top"><a id="a1d4dac849fc2f226972fc7915ce2bb9a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a1d4dac849fc2f226972fc7915ce2bb9a">AES_CTRLB_GFMUL_Pos</a>&#160;&#160;&#160;3</td></tr>
<tr class="memdesc:a1d4dac849fc2f226972fc7915ce2bb9a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLB) GF Multiplication <br /></td></tr>
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<tr class="memitem:a8aeb19745f0d7baffe861584a4753db5"><td class="memItemLeft" align="right" valign="top"><a id="a8aeb19745f0d7baffe861584a4753db5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_CTRLB_GFMUL</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2aes_8h.html#a1d4dac849fc2f226972fc7915ce2bb9a">AES_CTRLB_GFMUL_Pos</a>)</td></tr>
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<tr class="memitem:a405604e13781e19236f362bbbbebfd57"><td class="memItemLeft" align="right" valign="top"><a id="a405604e13781e19236f362bbbbebfd57"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a405604e13781e19236f362bbbbebfd57">AES_CTRLB_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0F)</td></tr>
<tr class="memdesc:a405604e13781e19236f362bbbbebfd57"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CTRLB) MASK Register <br /></td></tr>
<tr class="separator:a405604e13781e19236f362bbbbebfd57"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a64c9898fc7d9f702e0c1b3764fd70c28"><td class="memItemLeft" align="right" valign="top"><a id="a64c9898fc7d9f702e0c1b3764fd70c28"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a64c9898fc7d9f702e0c1b3764fd70c28">AES_INTENCLR_OFFSET</a>&#160;&#160;&#160;0x05</td></tr>
<tr class="memdesc:a64c9898fc7d9f702e0c1b3764fd70c28"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_INTENCLR offset) Interrupt Enable Clear <br /></td></tr>
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<tr class="memitem:aa9b0902c4985f9ed2a378655d8e9af06"><td class="memItemLeft" align="right" valign="top"><a id="aa9b0902c4985f9ed2a378655d8e9af06"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#aa9b0902c4985f9ed2a378655d8e9af06">AES_INTENCLR_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:aa9b0902c4985f9ed2a378655d8e9af06"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_INTENCLR reset_value) Interrupt Enable Clear <br /></td></tr>
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<tr class="memitem:a9f0b2df1c42584d5ac86a900ad27543a"><td class="memItemLeft" align="right" valign="top"><a id="a9f0b2df1c42584d5ac86a900ad27543a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a9f0b2df1c42584d5ac86a900ad27543a">AES_INTENCLR_ENCCMP_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a9f0b2df1c42584d5ac86a900ad27543a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_INTENCLR) Encryption Complete Interrupt Enable <br /></td></tr>
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<tr class="memitem:a7e6d870ee04c7d8b7441b78691892d7f"><td class="memItemLeft" align="right" valign="top"><a id="a7e6d870ee04c7d8b7441b78691892d7f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_INTENCLR_ENCCMP</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2aes_8h.html#a9f0b2df1c42584d5ac86a900ad27543a">AES_INTENCLR_ENCCMP_Pos</a>)</td></tr>
<tr class="separator:a7e6d870ee04c7d8b7441b78691892d7f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a69c8e4f1c9a1bb1ed6eade39cb48715b"><td class="memItemLeft" align="right" valign="top"><a id="a69c8e4f1c9a1bb1ed6eade39cb48715b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a69c8e4f1c9a1bb1ed6eade39cb48715b">AES_INTENCLR_GFMCMP_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:a69c8e4f1c9a1bb1ed6eade39cb48715b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_INTENCLR) GF Multiplication Complete Interrupt Enable <br /></td></tr>
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<tr class="memitem:a46c9c3dfcd2b6bd042c86d1f06667588"><td class="memItemLeft" align="right" valign="top"><a id="a46c9c3dfcd2b6bd042c86d1f06667588"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_INTENCLR_GFMCMP</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2aes_8h.html#a69c8e4f1c9a1bb1ed6eade39cb48715b">AES_INTENCLR_GFMCMP_Pos</a>)</td></tr>
<tr class="separator:a46c9c3dfcd2b6bd042c86d1f06667588"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a28f6072f3596258d9dc75220163b45bd"><td class="memItemLeft" align="right" valign="top"><a id="a28f6072f3596258d9dc75220163b45bd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a28f6072f3596258d9dc75220163b45bd">AES_INTENCLR_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x03)</td></tr>
<tr class="memdesc:a28f6072f3596258d9dc75220163b45bd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_INTENCLR) MASK Register <br /></td></tr>
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<tr class="memitem:a2c2335c63929a0ec59348053f8a4a6b8"><td class="memItemLeft" align="right" valign="top"><a id="a2c2335c63929a0ec59348053f8a4a6b8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a2c2335c63929a0ec59348053f8a4a6b8">AES_INTENSET_OFFSET</a>&#160;&#160;&#160;0x06</td></tr>
<tr class="memdesc:a2c2335c63929a0ec59348053f8a4a6b8"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_INTENSET offset) Interrupt Enable Set <br /></td></tr>
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<tr class="memitem:ac6efb10bfdf13c1a656ce565e3a22c6c"><td class="memItemLeft" align="right" valign="top"><a id="ac6efb10bfdf13c1a656ce565e3a22c6c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#ac6efb10bfdf13c1a656ce565e3a22c6c">AES_INTENSET_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:ac6efb10bfdf13c1a656ce565e3a22c6c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_INTENSET reset_value) Interrupt Enable Set <br /></td></tr>
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<tr class="memitem:a62a56a2e423ef41dd36947677b3be1e6"><td class="memItemLeft" align="right" valign="top"><a id="a62a56a2e423ef41dd36947677b3be1e6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a62a56a2e423ef41dd36947677b3be1e6">AES_INTENSET_ENCCMP_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a62a56a2e423ef41dd36947677b3be1e6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_INTENSET) Encryption Complete Interrupt Enable <br /></td></tr>
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<tr class="memitem:ad9366fdb4b380bf689ea37e1ab876390"><td class="memItemLeft" align="right" valign="top"><a id="ad9366fdb4b380bf689ea37e1ab876390"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_INTENSET_ENCCMP</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2aes_8h.html#a62a56a2e423ef41dd36947677b3be1e6">AES_INTENSET_ENCCMP_Pos</a>)</td></tr>
<tr class="separator:ad9366fdb4b380bf689ea37e1ab876390"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aafaf0866499eeb2c3ffadc68c2e99bb6"><td class="memItemLeft" align="right" valign="top"><a id="aafaf0866499eeb2c3ffadc68c2e99bb6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#aafaf0866499eeb2c3ffadc68c2e99bb6">AES_INTENSET_GFMCMP_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:aafaf0866499eeb2c3ffadc68c2e99bb6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_INTENSET) GF Multiplication Complete Interrupt Enable <br /></td></tr>
<tr class="separator:aafaf0866499eeb2c3ffadc68c2e99bb6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa682b8f8d98fafcddc7941ff549e7d50"><td class="memItemLeft" align="right" valign="top"><a id="aa682b8f8d98fafcddc7941ff549e7d50"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_INTENSET_GFMCMP</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2aes_8h.html#aafaf0866499eeb2c3ffadc68c2e99bb6">AES_INTENSET_GFMCMP_Pos</a>)</td></tr>
<tr class="separator:aa682b8f8d98fafcddc7941ff549e7d50"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac931ed9e37384df0876640e451699362"><td class="memItemLeft" align="right" valign="top"><a id="ac931ed9e37384df0876640e451699362"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#ac931ed9e37384df0876640e451699362">AES_INTENSET_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x03)</td></tr>
<tr class="memdesc:ac931ed9e37384df0876640e451699362"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_INTENSET) MASK Register <br /></td></tr>
<tr class="separator:ac931ed9e37384df0876640e451699362"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a608bb8f3da491602172f6599ca53e82f"><td class="memItemLeft" align="right" valign="top"><a id="a608bb8f3da491602172f6599ca53e82f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a608bb8f3da491602172f6599ca53e82f">AES_INTFLAG_OFFSET</a>&#160;&#160;&#160;0x07</td></tr>
<tr class="memdesc:a608bb8f3da491602172f6599ca53e82f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_INTFLAG offset) Interrupt Flag Status <br /></td></tr>
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<tr class="memitem:aaf1ed5becb953ddbe6047832971a78d1"><td class="memItemLeft" align="right" valign="top"><a id="aaf1ed5becb953ddbe6047832971a78d1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#aaf1ed5becb953ddbe6047832971a78d1">AES_INTFLAG_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:aaf1ed5becb953ddbe6047832971a78d1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_INTFLAG reset_value) Interrupt Flag Status <br /></td></tr>
<tr class="separator:aaf1ed5becb953ddbe6047832971a78d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a275779488d387fbd93b7b368e148caa6"><td class="memItemLeft" align="right" valign="top"><a id="a275779488d387fbd93b7b368e148caa6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a275779488d387fbd93b7b368e148caa6">AES_INTFLAG_ENCCMP_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a275779488d387fbd93b7b368e148caa6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_INTFLAG) Encryption Complete <br /></td></tr>
<tr class="separator:a275779488d387fbd93b7b368e148caa6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5b4f69fe874307e8054c5c508ca07f91"><td class="memItemLeft" align="right" valign="top"><a id="a5b4f69fe874307e8054c5c508ca07f91"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_INTFLAG_ENCCMP</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2aes_8h.html#a275779488d387fbd93b7b368e148caa6">AES_INTFLAG_ENCCMP_Pos</a>)</td></tr>
<tr class="separator:a5b4f69fe874307e8054c5c508ca07f91"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a331dfca6188312fceed2ee7acd16a184"><td class="memItemLeft" align="right" valign="top"><a id="a331dfca6188312fceed2ee7acd16a184"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a331dfca6188312fceed2ee7acd16a184">AES_INTFLAG_GFMCMP_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:a331dfca6188312fceed2ee7acd16a184"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_INTFLAG) GF Multiplication Complete <br /></td></tr>
<tr class="separator:a331dfca6188312fceed2ee7acd16a184"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af086ef0f7df725e86ceecd07c83c69ad"><td class="memItemLeft" align="right" valign="top"><a id="af086ef0f7df725e86ceecd07c83c69ad"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_INTFLAG_GFMCMP</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2aes_8h.html#a331dfca6188312fceed2ee7acd16a184">AES_INTFLAG_GFMCMP_Pos</a>)</td></tr>
<tr class="separator:af086ef0f7df725e86ceecd07c83c69ad"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:adc21177c51fa0ebba980cb432571f2a3"><td class="memItemLeft" align="right" valign="top"><a id="adc21177c51fa0ebba980cb432571f2a3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#adc21177c51fa0ebba980cb432571f2a3">AES_INTFLAG_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x03)</td></tr>
<tr class="memdesc:adc21177c51fa0ebba980cb432571f2a3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_INTFLAG) MASK Register <br /></td></tr>
<tr class="separator:adc21177c51fa0ebba980cb432571f2a3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a12823b5739ecdb1fdd676b6d5a8e701c"><td class="memItemLeft" align="right" valign="top"><a id="a12823b5739ecdb1fdd676b6d5a8e701c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a12823b5739ecdb1fdd676b6d5a8e701c">AES_DATABUFPTR_OFFSET</a>&#160;&#160;&#160;0x08</td></tr>
<tr class="memdesc:a12823b5739ecdb1fdd676b6d5a8e701c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_DATABUFPTR offset) Data buffer pointer <br /></td></tr>
<tr class="separator:a12823b5739ecdb1fdd676b6d5a8e701c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1318e685042491228cf65adbc20e847d"><td class="memItemLeft" align="right" valign="top"><a id="a1318e685042491228cf65adbc20e847d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a1318e685042491228cf65adbc20e847d">AES_DATABUFPTR_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a1318e685042491228cf65adbc20e847d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_DATABUFPTR reset_value) Data buffer pointer <br /></td></tr>
<tr class="separator:a1318e685042491228cf65adbc20e847d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a915d567de3a6921a7af37e419cbfb473"><td class="memItemLeft" align="right" valign="top"><a id="a915d567de3a6921a7af37e419cbfb473"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a915d567de3a6921a7af37e419cbfb473">AES_DATABUFPTR_INDATAPTR_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a915d567de3a6921a7af37e419cbfb473"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_DATABUFPTR) Input Data Pointer <br /></td></tr>
<tr class="separator:a915d567de3a6921a7af37e419cbfb473"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9bd9be7126842692db96aec68f0e2569"><td class="memItemLeft" align="right" valign="top"><a id="a9bd9be7126842692db96aec68f0e2569"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_DATABUFPTR_INDATAPTR_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2aes_8h.html#a915d567de3a6921a7af37e419cbfb473">AES_DATABUFPTR_INDATAPTR_Pos</a>)</td></tr>
<tr class="separator:a9bd9be7126842692db96aec68f0e2569"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab2c19a926220999d0c753abd58c2b71d"><td class="memItemLeft" align="right" valign="top"><a id="ab2c19a926220999d0c753abd58c2b71d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_DATABUFPTR_INDATAPTR</b>(value)&#160;&#160;&#160;(AES_DATABUFPTR_INDATAPTR_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2aes_8h.html#a915d567de3a6921a7af37e419cbfb473">AES_DATABUFPTR_INDATAPTR_Pos</a>))</td></tr>
<tr class="separator:ab2c19a926220999d0c753abd58c2b71d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a976dbeb7c942e941c35c792b909beb45"><td class="memItemLeft" align="right" valign="top"><a id="a976dbeb7c942e941c35c792b909beb45"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a976dbeb7c942e941c35c792b909beb45">AES_DATABUFPTR_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x03)</td></tr>
<tr class="memdesc:a976dbeb7c942e941c35c792b909beb45"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_DATABUFPTR) MASK Register <br /></td></tr>
<tr class="separator:a976dbeb7c942e941c35c792b909beb45"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a35726f74c47a7e351127014531da2f47"><td class="memItemLeft" align="right" valign="top"><a id="a35726f74c47a7e351127014531da2f47"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a35726f74c47a7e351127014531da2f47">AES_DBGCTRL_OFFSET</a>&#160;&#160;&#160;0x09</td></tr>
<tr class="memdesc:a35726f74c47a7e351127014531da2f47"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_DBGCTRL offset) Debug control <br /></td></tr>
<tr class="separator:a35726f74c47a7e351127014531da2f47"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a365d4b4068e5939248cd6302b995a413"><td class="memItemLeft" align="right" valign="top"><a id="a365d4b4068e5939248cd6302b995a413"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a365d4b4068e5939248cd6302b995a413">AES_DBGCTRL_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a365d4b4068e5939248cd6302b995a413"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_DBGCTRL reset_value) Debug control <br /></td></tr>
<tr class="separator:a365d4b4068e5939248cd6302b995a413"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab28725525ff73bde31c6d28b588ba0d0"><td class="memItemLeft" align="right" valign="top"><a id="ab28725525ff73bde31c6d28b588ba0d0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#ab28725525ff73bde31c6d28b588ba0d0">AES_DBGCTRL_DBGRUN_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ab28725525ff73bde31c6d28b588ba0d0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_DBGCTRL) Debug Run <br /></td></tr>
<tr class="separator:ab28725525ff73bde31c6d28b588ba0d0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7971d87d5a58292b4ac3dd7950cdc254"><td class="memItemLeft" align="right" valign="top"><a id="a7971d87d5a58292b4ac3dd7950cdc254"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>AES_DBGCTRL_DBGRUN</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2aes_8h.html#ab28725525ff73bde31c6d28b588ba0d0">AES_DBGCTRL_DBGRUN_Pos</a>)</td></tr>
<tr class="separator:a7971d87d5a58292b4ac3dd7950cdc254"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae63e1673c0101507547e6ae1571013d0"><td class="memItemLeft" align="right" valign="top"><a id="ae63e1673c0101507547e6ae1571013d0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#ae63e1673c0101507547e6ae1571013d0">AES_DBGCTRL_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x01)</td></tr>
<tr class="memdesc:ae63e1673c0101507547e6ae1571013d0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_DBGCTRL) MASK Register <br /></td></tr>
<tr class="separator:ae63e1673c0101507547e6ae1571013d0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad43961e3649400d0297ac0bf45f66b51"><td class="memItemLeft" align="right" valign="top"><a id="ad43961e3649400d0297ac0bf45f66b51"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#ad43961e3649400d0297ac0bf45f66b51">AES_KEYWORD_OFFSET</a>&#160;&#160;&#160;0x0C</td></tr>
<tr class="memdesc:ad43961e3649400d0297ac0bf45f66b51"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_KEYWORD offset) Keyword n <br /></td></tr>
<tr class="separator:ad43961e3649400d0297ac0bf45f66b51"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1230f0ffc6944df9a46528ed89a81833"><td class="memItemLeft" align="right" valign="top"><a id="a1230f0ffc6944df9a46528ed89a81833"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a1230f0ffc6944df9a46528ed89a81833">AES_KEYWORD_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a1230f0ffc6944df9a46528ed89a81833"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_KEYWORD reset_value) Keyword n <br /></td></tr>
<tr class="separator:a1230f0ffc6944df9a46528ed89a81833"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5c4c97c4c5130e8f70a9c1a90a844c40"><td class="memItemLeft" align="right" valign="top"><a id="a5c4c97c4c5130e8f70a9c1a90a844c40"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a5c4c97c4c5130e8f70a9c1a90a844c40">AES_KEYWORD_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:a5c4c97c4c5130e8f70a9c1a90a844c40"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_KEYWORD) MASK Register <br /></td></tr>
<tr class="separator:a5c4c97c4c5130e8f70a9c1a90a844c40"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a44da44594903a13541f89f88b344de14"><td class="memItemLeft" align="right" valign="top"><a id="a44da44594903a13541f89f88b344de14"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a44da44594903a13541f89f88b344de14">AES_INDATA_OFFSET</a>&#160;&#160;&#160;0x38</td></tr>
<tr class="memdesc:a44da44594903a13541f89f88b344de14"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_INDATA offset) Indata <br /></td></tr>
<tr class="separator:a44da44594903a13541f89f88b344de14"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa7300347777050df07b81c1aeab9c53f"><td class="memItemLeft" align="right" valign="top"><a id="aa7300347777050df07b81c1aeab9c53f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#aa7300347777050df07b81c1aeab9c53f">AES_INDATA_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:aa7300347777050df07b81c1aeab9c53f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_INDATA reset_value) Indata <br /></td></tr>
<tr class="separator:aa7300347777050df07b81c1aeab9c53f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a180788b3469c7f201c64f2ab908c0bae"><td class="memItemLeft" align="right" valign="top"><a id="a180788b3469c7f201c64f2ab908c0bae"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a180788b3469c7f201c64f2ab908c0bae">AES_INDATA_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:a180788b3469c7f201c64f2ab908c0bae"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_INDATA) MASK Register <br /></td></tr>
<tr class="separator:a180788b3469c7f201c64f2ab908c0bae"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7294686ad7460e413304e1149f3041f4"><td class="memItemLeft" align="right" valign="top"><a id="a7294686ad7460e413304e1149f3041f4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a7294686ad7460e413304e1149f3041f4">AES_INTVECTV_OFFSET</a>&#160;&#160;&#160;0x3C</td></tr>
<tr class="memdesc:a7294686ad7460e413304e1149f3041f4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_INTVECTV offset) Initialisation Vector n <br /></td></tr>
<tr class="separator:a7294686ad7460e413304e1149f3041f4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af925266e565155a6b467e88c6341c270"><td class="memItemLeft" align="right" valign="top"><a id="af925266e565155a6b467e88c6341c270"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#af925266e565155a6b467e88c6341c270">AES_INTVECTV_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:af925266e565155a6b467e88c6341c270"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_INTVECTV reset_value) Initialisation Vector n <br /></td></tr>
<tr class="separator:af925266e565155a6b467e88c6341c270"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aec52e9f6855e8ef708bccb15554f07f2"><td class="memItemLeft" align="right" valign="top"><a id="aec52e9f6855e8ef708bccb15554f07f2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#aec52e9f6855e8ef708bccb15554f07f2">AES_INTVECTV_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:aec52e9f6855e8ef708bccb15554f07f2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_INTVECTV) MASK Register <br /></td></tr>
<tr class="separator:aec52e9f6855e8ef708bccb15554f07f2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3de03bc2ec0bd79c019df510cea8fea6"><td class="memItemLeft" align="right" valign="top"><a id="a3de03bc2ec0bd79c019df510cea8fea6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a3de03bc2ec0bd79c019df510cea8fea6">AES_HASHKEY_OFFSET</a>&#160;&#160;&#160;0x5C</td></tr>
<tr class="memdesc:a3de03bc2ec0bd79c019df510cea8fea6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_HASHKEY offset) Hash key n <br /></td></tr>
<tr class="separator:a3de03bc2ec0bd79c019df510cea8fea6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa08592d15b578a0cadb9dbe80b6a861c"><td class="memItemLeft" align="right" valign="top"><a id="aa08592d15b578a0cadb9dbe80b6a861c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#aa08592d15b578a0cadb9dbe80b6a861c">AES_HASHKEY_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:aa08592d15b578a0cadb9dbe80b6a861c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_HASHKEY reset_value) Hash key n <br /></td></tr>
<tr class="separator:aa08592d15b578a0cadb9dbe80b6a861c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a83df005ae089b7f19cf8ea39c15de70f"><td class="memItemLeft" align="right" valign="top"><a id="a83df005ae089b7f19cf8ea39c15de70f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a83df005ae089b7f19cf8ea39c15de70f">AES_HASHKEY_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:a83df005ae089b7f19cf8ea39c15de70f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_HASHKEY) MASK Register <br /></td></tr>
<tr class="separator:a83df005ae089b7f19cf8ea39c15de70f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abdc82d19fc90c68e64609ef90ba0346d"><td class="memItemLeft" align="right" valign="top"><a id="abdc82d19fc90c68e64609ef90ba0346d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#abdc82d19fc90c68e64609ef90ba0346d">AES_GHASH_OFFSET</a>&#160;&#160;&#160;0x6C</td></tr>
<tr class="memdesc:abdc82d19fc90c68e64609ef90ba0346d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_GHASH offset) Galois Hash n <br /></td></tr>
<tr class="separator:abdc82d19fc90c68e64609ef90ba0346d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2e6d76c3282e89760281d4f1325c3531"><td class="memItemLeft" align="right" valign="top"><a id="a2e6d76c3282e89760281d4f1325c3531"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a2e6d76c3282e89760281d4f1325c3531">AES_GHASH_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a2e6d76c3282e89760281d4f1325c3531"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_GHASH reset_value) Galois Hash n <br /></td></tr>
<tr class="separator:a2e6d76c3282e89760281d4f1325c3531"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3d0d670007ecc74cf84ba2442017a466"><td class="memItemLeft" align="right" valign="top"><a id="a3d0d670007ecc74cf84ba2442017a466"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a3d0d670007ecc74cf84ba2442017a466">AES_GHASH_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:a3d0d670007ecc74cf84ba2442017a466"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_GHASH) MASK Register <br /></td></tr>
<tr class="separator:a3d0d670007ecc74cf84ba2442017a466"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5f0cafe0945c9251a1f82a2a53639e53"><td class="memItemLeft" align="right" valign="top"><a id="a5f0cafe0945c9251a1f82a2a53639e53"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a5f0cafe0945c9251a1f82a2a53639e53">AES_CIPLEN_OFFSET</a>&#160;&#160;&#160;0x80</td></tr>
<tr class="memdesc:a5f0cafe0945c9251a1f82a2a53639e53"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CIPLEN offset) Cipher Length <br /></td></tr>
<tr class="separator:a5f0cafe0945c9251a1f82a2a53639e53"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2a5bed37ca6f471a82065f70da4e3a2d"><td class="memItemLeft" align="right" valign="top"><a id="a2a5bed37ca6f471a82065f70da4e3a2d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a2a5bed37ca6f471a82065f70da4e3a2d">AES_CIPLEN_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a2a5bed37ca6f471a82065f70da4e3a2d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CIPLEN reset_value) Cipher Length <br /></td></tr>
<tr class="separator:a2a5bed37ca6f471a82065f70da4e3a2d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3d019b62fbb83ca231956680099ae1c5"><td class="memItemLeft" align="right" valign="top"><a id="a3d019b62fbb83ca231956680099ae1c5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a3d019b62fbb83ca231956680099ae1c5">AES_CIPLEN_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:a3d019b62fbb83ca231956680099ae1c5"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_CIPLEN) MASK Register <br /></td></tr>
<tr class="separator:a3d019b62fbb83ca231956680099ae1c5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a66e87bea67036acb95cd23de742c0022"><td class="memItemLeft" align="right" valign="top"><a id="a66e87bea67036acb95cd23de742c0022"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a66e87bea67036acb95cd23de742c0022">AES_RANDSEED_OFFSET</a>&#160;&#160;&#160;0x84</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#a455525ebfad19c0e2ceb82ef10424d25">AES_RANDSEED_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2aes_8h.html#ad290ffaf9510c1afd29efcbccd4768b1">AES_RANDSEED_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:ad290ffaf9510c1afd29efcbccd4768b1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(AES_RANDSEED) MASK Register <br /></td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Component description for AES. </p>
<p>Copyright (c) 2019 Microchip Technology Inc.</p>
<p>\asf_license_start </p>
<p class="definition">Definition in file <a class="el" href="component_2aes_8h_source.html">aes.h</a>.</p>
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<a href="component_2aes_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_AES_COMPONENT_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_AES_COMPONENT_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160; </div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define AES_U2238</span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define REV_AES 0x220</span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160; </div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="comment">/* -------- AES_CTRLA : (AES Offset: 0x00) (R/W 32) Control A -------- */</span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00044"></a><span class="lineno"><a class="line" href="unionAES__CTRLA__Type.html"> 44</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00046"></a><span class="lineno"><a class="line" href="unionAES__CTRLA__Type.html#a44eb6e22be4a98a9db57841eb93f6112"> 46</a></span>&#160; uint32_t <a class="code" href="unionAES__CTRLA__Type.html#a44eb6e22be4a98a9db57841eb93f6112">SWRST</a>:1; </div>
<div class="line"><a name="l00047"></a><span class="lineno"><a class="line" href="unionAES__CTRLA__Type.html#a8f57bb965493a497e8868480af6050e2"> 47</a></span>&#160; uint32_t <a class="code" href="unionAES__CTRLA__Type.html#a8f57bb965493a497e8868480af6050e2">ENABLE</a>:1; </div>
<div class="line"><a name="l00048"></a><span class="lineno"><a class="line" href="unionAES__CTRLA__Type.html#a973815ef63eb2a205b8c2099a994ce5f"> 48</a></span>&#160; uint32_t <a class="code" href="unionAES__CTRLA__Type.html#a973815ef63eb2a205b8c2099a994ce5f">AESMODE</a>:3; </div>
<div class="line"><a name="l00049"></a><span class="lineno"><a class="line" href="unionAES__CTRLA__Type.html#a25f454ad6919e04f8f1af2311b5d3d26"> 49</a></span>&#160; uint32_t <a class="code" href="unionAES__CTRLA__Type.html#a25f454ad6919e04f8f1af2311b5d3d26">CFBS</a>:3; </div>
<div class="line"><a name="l00050"></a><span class="lineno"><a class="line" href="unionAES__CTRLA__Type.html#a5295f8b99d5a0de58c6917a25ba774dc"> 50</a></span>&#160; uint32_t <a class="code" href="unionAES__CTRLA__Type.html#a5295f8b99d5a0de58c6917a25ba774dc">KEYSIZE</a>:2; </div>
<div class="line"><a name="l00051"></a><span class="lineno"><a class="line" href="unionAES__CTRLA__Type.html#ab57d8a616c21a7b24374e034a8e387d4"> 51</a></span>&#160; uint32_t <a class="code" href="unionAES__CTRLA__Type.html#ab57d8a616c21a7b24374e034a8e387d4">CIPHER</a>:1; </div>
<div class="line"><a name="l00052"></a><span class="lineno"><a class="line" href="unionAES__CTRLA__Type.html#a2de99b253d4f7d643673431bae0ce517"> 52</a></span>&#160; uint32_t <a class="code" href="unionAES__CTRLA__Type.html#a2de99b253d4f7d643673431bae0ce517">STARTMODE</a>:1; </div>
<div class="line"><a name="l00053"></a><span class="lineno"><a class="line" href="unionAES__CTRLA__Type.html#a1f00bd81b78e62d92ac19a6df42ea176"> 53</a></span>&#160; uint32_t <a class="code" href="unionAES__CTRLA__Type.html#a1f00bd81b78e62d92ac19a6df42ea176">LOD</a>:1; </div>
<div class="line"><a name="l00054"></a><span class="lineno"><a class="line" href="unionAES__CTRLA__Type.html#aa54b2619f86e7514067db59e24eb23da"> 54</a></span>&#160; uint32_t <a class="code" href="unionAES__CTRLA__Type.html#aa54b2619f86e7514067db59e24eb23da">KEYGEN</a>:1; </div>
<div class="line"><a name="l00055"></a><span class="lineno"><a class="line" href="unionAES__CTRLA__Type.html#a872c1c272fe22e69f912cebe650df9b0"> 55</a></span>&#160; uint32_t <a class="code" href="unionAES__CTRLA__Type.html#a872c1c272fe22e69f912cebe650df9b0">XORKEY</a>:1; </div>
<div class="line"><a name="l00056"></a><span class="lineno"><a class="line" href="unionAES__CTRLA__Type.html#a2ea1f711e15af3ed375a291e392a40b1"> 56</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00057"></a><span class="lineno"><a class="line" href="unionAES__CTRLA__Type.html#a7f40eaa9542a949ff7a7e9c6b8158706"> 57</a></span>&#160; uint32_t <a class="code" href="unionAES__CTRLA__Type.html#a7f40eaa9542a949ff7a7e9c6b8158706">CTYPE</a>:4; </div>
<div class="line"><a name="l00058"></a><span class="lineno"><a class="line" href="unionAES__CTRLA__Type.html#acef6082042ac196aece7743090b7fa0b"> 58</a></span>&#160; uint32_t :12; </div>
<div class="line"><a name="l00059"></a><span class="lineno"><a class="line" href="unionAES__CTRLA__Type.html#aa50994459cc5c31ebcc9a93492c3fa91"> 59</a></span>&#160; } bit; </div>
<div class="line"><a name="l00060"></a><span class="lineno"><a class="line" href="unionAES__CTRLA__Type.html#af9dd8eb4dad1fbc00c3f5b3a995cbd41"> 60</a></span>&#160; uint32_t <a class="code" href="unionAES__CTRLA__Type.html#af9dd8eb4dad1fbc00c3f5b3a995cbd41">reg</a>; </div>
<div class="line"><a name="l00061"></a><span class="lineno"> 61</span>&#160;} <a class="code" href="unionAES__CTRLA__Type.html">AES_CTRLA_Type</a>;</div>
<div class="line"><a name="l00062"></a><span class="lineno"> 62</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00063"></a><span class="lineno"> 63</span>&#160; </div>
<div class="line"><a name="l00064"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a90e931857a085af986881f27722999e4"> 64</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_OFFSET 0x00 </span></div>
<div class="line"><a name="l00065"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#ad9c6d6bda70f75bbf70b8e1b5acba337"> 65</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00067"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#ad701aaa88264f53b847405a38b088351"> 67</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_SWRST_Pos 0 </span></div>
<div class="line"><a name="l00068"></a><span class="lineno"> 68</span>&#160;<span class="preprocessor">#define AES_CTRLA_SWRST (_U_(0x1) &lt;&lt; AES_CTRLA_SWRST_Pos)</span></div>
<div class="line"><a name="l00069"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a852dce37626d080c1920f4a78fd39082"> 69</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_ENABLE_Pos 1 </span></div>
<div class="line"><a name="l00070"></a><span class="lineno"> 70</span>&#160;<span class="preprocessor">#define AES_CTRLA_ENABLE (_U_(0x1) &lt;&lt; AES_CTRLA_ENABLE_Pos)</span></div>
<div class="line"><a name="l00071"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a34f19d66a686bd490bdca835622d028c"> 71</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_AESMODE_Pos 2 </span></div>
<div class="line"><a name="l00072"></a><span class="lineno"> 72</span>&#160;<span class="preprocessor">#define AES_CTRLA_AESMODE_Msk (_U_(0x7) &lt;&lt; AES_CTRLA_AESMODE_Pos)</span></div>
<div class="line"><a name="l00073"></a><span class="lineno"> 73</span>&#160;<span class="preprocessor">#define AES_CTRLA_AESMODE(value) (AES_CTRLA_AESMODE_Msk &amp; ((value) &lt;&lt; AES_CTRLA_AESMODE_Pos))</span></div>
<div class="line"><a name="l00074"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a098b438a3d941936c5ace9c0f33b717d"> 74</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_AESMODE_ECB_Val _U_(0x0) </span></div>
<div class="line"><a name="l00075"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a3e632500edc9f4433c6a8da5a11c4952"> 75</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_AESMODE_CBC_Val _U_(0x1) </span></div>
<div class="line"><a name="l00076"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a0b9db4f304e59dc4cf2bcca6542f3bb0"> 76</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_AESMODE_OFB_Val _U_(0x2) </span></div>
<div class="line"><a name="l00077"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#aebc8a6143cb676d80ecc39480c3cbdbc"> 77</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_AESMODE_CFB_Val _U_(0x3) </span></div>
<div class="line"><a name="l00078"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a0834f927bf839db0687cc2ab5552bc8d"> 78</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_AESMODE_COUNTER_Val _U_(0x4) </span></div>
<div class="line"><a name="l00079"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#ab9f33ac4176e8b315c485c6d7c5c2aba"> 79</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_AESMODE_CCM_Val _U_(0x5) </span></div>
<div class="line"><a name="l00080"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a92053e62c1213c2c1a349f4f120d98f8"> 80</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_AESMODE_GCM_Val _U_(0x6) </span></div>
<div class="line"><a name="l00081"></a><span class="lineno"> 81</span>&#160;<span class="preprocessor">#define AES_CTRLA_AESMODE_ECB (AES_CTRLA_AESMODE_ECB_Val &lt;&lt; AES_CTRLA_AESMODE_Pos)</span></div>
<div class="line"><a name="l00082"></a><span class="lineno"> 82</span>&#160;<span class="preprocessor">#define AES_CTRLA_AESMODE_CBC (AES_CTRLA_AESMODE_CBC_Val &lt;&lt; AES_CTRLA_AESMODE_Pos)</span></div>
<div class="line"><a name="l00083"></a><span class="lineno"> 83</span>&#160;<span class="preprocessor">#define AES_CTRLA_AESMODE_OFB (AES_CTRLA_AESMODE_OFB_Val &lt;&lt; AES_CTRLA_AESMODE_Pos)</span></div>
<div class="line"><a name="l00084"></a><span class="lineno"> 84</span>&#160;<span class="preprocessor">#define AES_CTRLA_AESMODE_CFB (AES_CTRLA_AESMODE_CFB_Val &lt;&lt; AES_CTRLA_AESMODE_Pos)</span></div>
<div class="line"><a name="l00085"></a><span class="lineno"> 85</span>&#160;<span class="preprocessor">#define AES_CTRLA_AESMODE_COUNTER (AES_CTRLA_AESMODE_COUNTER_Val &lt;&lt; AES_CTRLA_AESMODE_Pos)</span></div>
<div class="line"><a name="l00086"></a><span class="lineno"> 86</span>&#160;<span class="preprocessor">#define AES_CTRLA_AESMODE_CCM (AES_CTRLA_AESMODE_CCM_Val &lt;&lt; AES_CTRLA_AESMODE_Pos)</span></div>
<div class="line"><a name="l00087"></a><span class="lineno"> 87</span>&#160;<span class="preprocessor">#define AES_CTRLA_AESMODE_GCM (AES_CTRLA_AESMODE_GCM_Val &lt;&lt; AES_CTRLA_AESMODE_Pos)</span></div>
<div class="line"><a name="l00088"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#aed0081b2f8068882e43b04bd39c0558f"> 88</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_CFBS_Pos 5 </span></div>
<div class="line"><a name="l00089"></a><span class="lineno"> 89</span>&#160;<span class="preprocessor">#define AES_CTRLA_CFBS_Msk (_U_(0x7) &lt;&lt; AES_CTRLA_CFBS_Pos)</span></div>
<div class="line"><a name="l00090"></a><span class="lineno"> 90</span>&#160;<span class="preprocessor">#define AES_CTRLA_CFBS(value) (AES_CTRLA_CFBS_Msk &amp; ((value) &lt;&lt; AES_CTRLA_CFBS_Pos))</span></div>
<div class="line"><a name="l00091"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a6711abfcb46c4e4ef14b6ececc87601e"> 91</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_CFBS_128BIT_Val _U_(0x0) </span></div>
<div class="line"><a name="l00092"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a22b1b7d87e83ae9c9f7d7215186b4d4c"> 92</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_CFBS_64BIT_Val _U_(0x1) </span></div>
<div class="line"><a name="l00093"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a9255981a1360616c0511a412c269a0ea"> 93</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_CFBS_32BIT_Val _U_(0x2) </span></div>
<div class="line"><a name="l00094"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a636c68a01504ee27108961d0c7b92f7e"> 94</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_CFBS_16BIT_Val _U_(0x3) </span></div>
<div class="line"><a name="l00095"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a4e46d835d21bf301e949c68b7ea15e3a"> 95</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_CFBS_8BIT_Val _U_(0x4) </span></div>
<div class="line"><a name="l00096"></a><span class="lineno"> 96</span>&#160;<span class="preprocessor">#define AES_CTRLA_CFBS_128BIT (AES_CTRLA_CFBS_128BIT_Val &lt;&lt; AES_CTRLA_CFBS_Pos)</span></div>
<div class="line"><a name="l00097"></a><span class="lineno"> 97</span>&#160;<span class="preprocessor">#define AES_CTRLA_CFBS_64BIT (AES_CTRLA_CFBS_64BIT_Val &lt;&lt; AES_CTRLA_CFBS_Pos)</span></div>
<div class="line"><a name="l00098"></a><span class="lineno"> 98</span>&#160;<span class="preprocessor">#define AES_CTRLA_CFBS_32BIT (AES_CTRLA_CFBS_32BIT_Val &lt;&lt; AES_CTRLA_CFBS_Pos)</span></div>
<div class="line"><a name="l00099"></a><span class="lineno"> 99</span>&#160;<span class="preprocessor">#define AES_CTRLA_CFBS_16BIT (AES_CTRLA_CFBS_16BIT_Val &lt;&lt; AES_CTRLA_CFBS_Pos)</span></div>
<div class="line"><a name="l00100"></a><span class="lineno"> 100</span>&#160;<span class="preprocessor">#define AES_CTRLA_CFBS_8BIT (AES_CTRLA_CFBS_8BIT_Val &lt;&lt; AES_CTRLA_CFBS_Pos)</span></div>
<div class="line"><a name="l00101"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a48a5ec79fc1a2dddbed967d4322fb98f"> 101</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_KEYSIZE_Pos 8 </span></div>
<div class="line"><a name="l00102"></a><span class="lineno"> 102</span>&#160;<span class="preprocessor">#define AES_CTRLA_KEYSIZE_Msk (_U_(0x3) &lt;&lt; AES_CTRLA_KEYSIZE_Pos)</span></div>
<div class="line"><a name="l00103"></a><span class="lineno"> 103</span>&#160;<span class="preprocessor">#define AES_CTRLA_KEYSIZE(value) (AES_CTRLA_KEYSIZE_Msk &amp; ((value) &lt;&lt; AES_CTRLA_KEYSIZE_Pos))</span></div>
<div class="line"><a name="l00104"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a87b5b6b70f9a922464332015e0dbf3d6"> 104</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_KEYSIZE_128BIT_Val _U_(0x0) </span></div>
<div class="line"><a name="l00105"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#ad67bdc4b7851877250d1b90d8da52565"> 105</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_KEYSIZE_192BIT_Val _U_(0x1) </span></div>
<div class="line"><a name="l00106"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#af068e9e0d64cf0da58b4813e41ae2e0a"> 106</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_KEYSIZE_256BIT_Val _U_(0x2) </span></div>
<div class="line"><a name="l00107"></a><span class="lineno"> 107</span>&#160;<span class="preprocessor">#define AES_CTRLA_KEYSIZE_128BIT (AES_CTRLA_KEYSIZE_128BIT_Val &lt;&lt; AES_CTRLA_KEYSIZE_Pos)</span></div>
<div class="line"><a name="l00108"></a><span class="lineno"> 108</span>&#160;<span class="preprocessor">#define AES_CTRLA_KEYSIZE_192BIT (AES_CTRLA_KEYSIZE_192BIT_Val &lt;&lt; AES_CTRLA_KEYSIZE_Pos)</span></div>
<div class="line"><a name="l00109"></a><span class="lineno"> 109</span>&#160;<span class="preprocessor">#define AES_CTRLA_KEYSIZE_256BIT (AES_CTRLA_KEYSIZE_256BIT_Val &lt;&lt; AES_CTRLA_KEYSIZE_Pos)</span></div>
<div class="line"><a name="l00110"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a25c49e1e3486f33caa38cdffaecd2024"> 110</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_CIPHER_Pos 10 </span></div>
<div class="line"><a name="l00111"></a><span class="lineno"> 111</span>&#160;<span class="preprocessor">#define AES_CTRLA_CIPHER (_U_(0x1) &lt;&lt; AES_CTRLA_CIPHER_Pos)</span></div>
<div class="line"><a name="l00112"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a01464e8411876289eaa270378dcd0d73"> 112</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_CIPHER_DEC_Val _U_(0x0) </span></div>
<div class="line"><a name="l00113"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a6a4b8a6bf66c02e172f0a765738ffe58"> 113</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_CIPHER_ENC_Val _U_(0x1) </span></div>
<div class="line"><a name="l00114"></a><span class="lineno"> 114</span>&#160;<span class="preprocessor">#define AES_CTRLA_CIPHER_DEC (AES_CTRLA_CIPHER_DEC_Val &lt;&lt; AES_CTRLA_CIPHER_Pos)</span></div>
<div class="line"><a name="l00115"></a><span class="lineno"> 115</span>&#160;<span class="preprocessor">#define AES_CTRLA_CIPHER_ENC (AES_CTRLA_CIPHER_ENC_Val &lt;&lt; AES_CTRLA_CIPHER_Pos)</span></div>
<div class="line"><a name="l00116"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a785ffe6bd686b87bd010931ffd325043"> 116</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_STARTMODE_Pos 11 </span></div>
<div class="line"><a name="l00117"></a><span class="lineno"> 117</span>&#160;<span class="preprocessor">#define AES_CTRLA_STARTMODE (_U_(0x1) &lt;&lt; AES_CTRLA_STARTMODE_Pos)</span></div>
<div class="line"><a name="l00118"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#ad7e65c90f21d677de34526fe70156ce4"> 118</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_STARTMODE_MANUAL_Val _U_(0x0) </span></div>
<div class="line"><a name="l00119"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a6844c348979b9d67156784c1204e81c1"> 119</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_STARTMODE_AUTO_Val _U_(0x1) </span></div>
<div class="line"><a name="l00120"></a><span class="lineno"> 120</span>&#160;<span class="preprocessor">#define AES_CTRLA_STARTMODE_MANUAL (AES_CTRLA_STARTMODE_MANUAL_Val &lt;&lt; AES_CTRLA_STARTMODE_Pos)</span></div>
<div class="line"><a name="l00121"></a><span class="lineno"> 121</span>&#160;<span class="preprocessor">#define AES_CTRLA_STARTMODE_AUTO (AES_CTRLA_STARTMODE_AUTO_Val &lt;&lt; AES_CTRLA_STARTMODE_Pos)</span></div>
<div class="line"><a name="l00122"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#af6e4b7aee8ec535dfaf64b94f3df787a"> 122</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_LOD_Pos 12 </span></div>
<div class="line"><a name="l00123"></a><span class="lineno"> 123</span>&#160;<span class="preprocessor">#define AES_CTRLA_LOD (_U_(0x1) &lt;&lt; AES_CTRLA_LOD_Pos)</span></div>
<div class="line"><a name="l00124"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#ab0e6011c9e47708ecbbc00f02a0d7790"> 124</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_LOD_NONE_Val _U_(0x0) </span></div>
<div class="line"><a name="l00125"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a47c2d51199c68923a8d27506dde9ef05"> 125</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_LOD_LAST_Val _U_(0x1) </span></div>
<div class="line"><a name="l00126"></a><span class="lineno"> 126</span>&#160;<span class="preprocessor">#define AES_CTRLA_LOD_NONE (AES_CTRLA_LOD_NONE_Val &lt;&lt; AES_CTRLA_LOD_Pos)</span></div>
<div class="line"><a name="l00127"></a><span class="lineno"> 127</span>&#160;<span class="preprocessor">#define AES_CTRLA_LOD_LAST (AES_CTRLA_LOD_LAST_Val &lt;&lt; AES_CTRLA_LOD_Pos)</span></div>
<div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a55ca29e4273692d315f1b00528d26e66"> 128</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_KEYGEN_Pos 13 </span></div>
<div class="line"><a name="l00129"></a><span class="lineno"> 129</span>&#160;<span class="preprocessor">#define AES_CTRLA_KEYGEN (_U_(0x1) &lt;&lt; AES_CTRLA_KEYGEN_Pos)</span></div>
<div class="line"><a name="l00130"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a5546431e3132fd71abad6972799e9d92"> 130</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_KEYGEN_NONE_Val _U_(0x0) </span></div>
<div class="line"><a name="l00131"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#afb04e48eea55b84ff8e4b9d134929ed6"> 131</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_KEYGEN_LAST_Val _U_(0x1) </span></div>
<div class="line"><a name="l00132"></a><span class="lineno"> 132</span>&#160;<span class="preprocessor">#define AES_CTRLA_KEYGEN_NONE (AES_CTRLA_KEYGEN_NONE_Val &lt;&lt; AES_CTRLA_KEYGEN_Pos)</span></div>
<div class="line"><a name="l00133"></a><span class="lineno"> 133</span>&#160;<span class="preprocessor">#define AES_CTRLA_KEYGEN_LAST (AES_CTRLA_KEYGEN_LAST_Val &lt;&lt; AES_CTRLA_KEYGEN_Pos)</span></div>
<div class="line"><a name="l00134"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#ada84c7624ddefe20ad58bb1cb83e6a10"> 134</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_XORKEY_Pos 14 </span></div>
<div class="line"><a name="l00135"></a><span class="lineno"> 135</span>&#160;<span class="preprocessor">#define AES_CTRLA_XORKEY (_U_(0x1) &lt;&lt; AES_CTRLA_XORKEY_Pos)</span></div>
<div class="line"><a name="l00136"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a3de48ab257592839780f58f8ce29c925"> 136</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_XORKEY_NONE_Val _U_(0x0) </span></div>
<div class="line"><a name="l00137"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a8dd7975a44849ac7545db404d7ca0934"> 137</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_XORKEY_XOR_Val _U_(0x1) </span></div>
<div class="line"><a name="l00138"></a><span class="lineno"> 138</span>&#160;<span class="preprocessor">#define AES_CTRLA_XORKEY_NONE (AES_CTRLA_XORKEY_NONE_Val &lt;&lt; AES_CTRLA_XORKEY_Pos)</span></div>
<div class="line"><a name="l00139"></a><span class="lineno"> 139</span>&#160;<span class="preprocessor">#define AES_CTRLA_XORKEY_XOR (AES_CTRLA_XORKEY_XOR_Val &lt;&lt; AES_CTRLA_XORKEY_Pos)</span></div>
<div class="line"><a name="l00140"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a0bfd0c90e0ee148b5a49d5d732a88caa"> 140</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_CTYPE_Pos 16 </span></div>
<div class="line"><a name="l00141"></a><span class="lineno"> 141</span>&#160;<span class="preprocessor">#define AES_CTRLA_CTYPE_Msk (_U_(0xF) &lt;&lt; AES_CTRLA_CTYPE_Pos)</span></div>
<div class="line"><a name="l00142"></a><span class="lineno"> 142</span>&#160;<span class="preprocessor">#define AES_CTRLA_CTYPE(value) (AES_CTRLA_CTYPE_Msk &amp; ((value) &lt;&lt; AES_CTRLA_CTYPE_Pos))</span></div>
<div class="line"><a name="l00143"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#ad3d6155566850d559b4d5beb3da78125"> 143</a></span>&#160;<span class="preprocessor">#define AES_CTRLA_MASK _U_(0x000F7FFF) </span></div>
<div class="line"><a name="l00145"></a><span class="lineno"> 145</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AES_CTRLB : (AES Offset: 0x04) (R/W 8) Control B -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00146"></a><span class="lineno"> 146</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00147"></a><span class="lineno"><a class="line" href="unionAES__CTRLB__Type.html"> 147</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00148"></a><span class="lineno"> 148</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00149"></a><span class="lineno"><a class="line" href="unionAES__CTRLB__Type.html#aa31f59e6afc99839a09e1b19dae91389"> 149</a></span>&#160; uint8_t <a class="code" href="unionAES__CTRLB__Type.html#aa31f59e6afc99839a09e1b19dae91389">START</a>:1; </div>
<div class="line"><a name="l00150"></a><span class="lineno"><a class="line" href="unionAES__CTRLB__Type.html#abe825134364341c05b58c0586c3b408a"> 150</a></span>&#160; uint8_t <a class="code" href="unionAES__CTRLB__Type.html#abe825134364341c05b58c0586c3b408a">NEWMSG</a>:1; </div>
<div class="line"><a name="l00151"></a><span class="lineno"><a class="line" href="unionAES__CTRLB__Type.html#a1d9370e57379911ace6c2349dcb38bd5"> 151</a></span>&#160; uint8_t <a class="code" href="unionAES__CTRLB__Type.html#a1d9370e57379911ace6c2349dcb38bd5">EOM</a>:1; </div>
<div class="line"><a name="l00152"></a><span class="lineno"><a class="line" href="unionAES__CTRLB__Type.html#a682f9503c21dff33bc9ee12658e64eb8"> 152</a></span>&#160; uint8_t <a class="code" href="unionAES__CTRLB__Type.html#a682f9503c21dff33bc9ee12658e64eb8">GFMUL</a>:1; </div>
<div class="line"><a name="l00153"></a><span class="lineno"><a class="line" href="unionAES__CTRLB__Type.html#a4f85ee21cfa378186cd359bc51255fc8"> 153</a></span>&#160; uint8_t :4; </div>
<div class="line"><a name="l00154"></a><span class="lineno"><a class="line" href="unionAES__CTRLB__Type.html#a3b6f55990dabbb4a770b90fc968ca693"> 154</a></span>&#160; } bit; </div>
<div class="line"><a name="l00155"></a><span class="lineno"><a class="line" href="unionAES__CTRLB__Type.html#a57c4cde933bba0b71cd09215676ec71e"> 155</a></span>&#160; uint8_t <a class="code" href="unionAES__CTRLB__Type.html#a57c4cde933bba0b71cd09215676ec71e">reg</a>; </div>
<div class="line"><a name="l00156"></a><span class="lineno"> 156</span>&#160;} <a class="code" href="unionAES__CTRLB__Type.html">AES_CTRLB_Type</a>;</div>
<div class="line"><a name="l00157"></a><span class="lineno"> 157</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00158"></a><span class="lineno"> 158</span>&#160; </div>
<div class="line"><a name="l00159"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a2f786e95894df5f05ff890a6748b7407"> 159</a></span>&#160;<span class="preprocessor">#define AES_CTRLB_OFFSET 0x04 </span></div>
<div class="line"><a name="l00160"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#ae33dc747714673fa684e0b0775460cf2"> 160</a></span>&#160;<span class="preprocessor">#define AES_CTRLB_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00162"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a5cef25ba4d85f57f405363a1d79fc7cd"> 162</a></span>&#160;<span class="preprocessor">#define AES_CTRLB_START_Pos 0 </span></div>
<div class="line"><a name="l00163"></a><span class="lineno"> 163</span>&#160;<span class="preprocessor">#define AES_CTRLB_START (_U_(0x1) &lt;&lt; AES_CTRLB_START_Pos)</span></div>
<div class="line"><a name="l00164"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a962d612a59f8ac1b633fb52f2423a0a4"> 164</a></span>&#160;<span class="preprocessor">#define AES_CTRLB_NEWMSG_Pos 1 </span></div>
<div class="line"><a name="l00165"></a><span class="lineno"> 165</span>&#160;<span class="preprocessor">#define AES_CTRLB_NEWMSG (_U_(0x1) &lt;&lt; AES_CTRLB_NEWMSG_Pos)</span></div>
<div class="line"><a name="l00166"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#aa7b1c7532b75cda1bb64fe22119fc29f"> 166</a></span>&#160;<span class="preprocessor">#define AES_CTRLB_EOM_Pos 2 </span></div>
<div class="line"><a name="l00167"></a><span class="lineno"> 167</span>&#160;<span class="preprocessor">#define AES_CTRLB_EOM (_U_(0x1) &lt;&lt; AES_CTRLB_EOM_Pos)</span></div>
<div class="line"><a name="l00168"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a1d4dac849fc2f226972fc7915ce2bb9a"> 168</a></span>&#160;<span class="preprocessor">#define AES_CTRLB_GFMUL_Pos 3 </span></div>
<div class="line"><a name="l00169"></a><span class="lineno"> 169</span>&#160;<span class="preprocessor">#define AES_CTRLB_GFMUL (_U_(0x1) &lt;&lt; AES_CTRLB_GFMUL_Pos)</span></div>
<div class="line"><a name="l00170"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a405604e13781e19236f362bbbbebfd57"> 170</a></span>&#160;<span class="preprocessor">#define AES_CTRLB_MASK _U_(0x0F) </span></div>
<div class="line"><a name="l00172"></a><span class="lineno"> 172</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AES_INTENCLR : (AES Offset: 0x05) (R/W 8) Interrupt Enable Clear -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00173"></a><span class="lineno"> 173</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00174"></a><span class="lineno"><a class="line" href="unionAES__INTENCLR__Type.html"> 174</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00175"></a><span class="lineno"> 175</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00176"></a><span class="lineno"><a class="line" href="unionAES__INTENCLR__Type.html#a084c741eaf3f4253518bdd20ac1d4df0"> 176</a></span>&#160; uint8_t <a class="code" href="unionAES__INTENCLR__Type.html#a084c741eaf3f4253518bdd20ac1d4df0">ENCCMP</a>:1; </div>
<div class="line"><a name="l00177"></a><span class="lineno"><a class="line" href="unionAES__INTENCLR__Type.html#a077683c584eed9db5a7aecd888d55272"> 177</a></span>&#160; uint8_t <a class="code" href="unionAES__INTENCLR__Type.html#a077683c584eed9db5a7aecd888d55272">GFMCMP</a>:1; </div>
<div class="line"><a name="l00178"></a><span class="lineno"><a class="line" href="unionAES__INTENCLR__Type.html#a47bcf2c971d509b9b09a7bd5dceb0a49"> 178</a></span>&#160; uint8_t :6; </div>
<div class="line"><a name="l00179"></a><span class="lineno"><a class="line" href="unionAES__INTENCLR__Type.html#aed7cee878d3b05ba129415a558d08cd9"> 179</a></span>&#160; } bit; </div>
<div class="line"><a name="l00180"></a><span class="lineno"><a class="line" href="unionAES__INTENCLR__Type.html#a6c802108fb9201c92f73739dccd70f02"> 180</a></span>&#160; uint8_t <a class="code" href="unionAES__INTENCLR__Type.html#a6c802108fb9201c92f73739dccd70f02">reg</a>; </div>
<div class="line"><a name="l00181"></a><span class="lineno"> 181</span>&#160;} <a class="code" href="unionAES__INTENCLR__Type.html">AES_INTENCLR_Type</a>;</div>
<div class="line"><a name="l00182"></a><span class="lineno"> 182</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00183"></a><span class="lineno"> 183</span>&#160; </div>
<div class="line"><a name="l00184"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a64c9898fc7d9f702e0c1b3764fd70c28"> 184</a></span>&#160;<span class="preprocessor">#define AES_INTENCLR_OFFSET 0x05 </span></div>
<div class="line"><a name="l00185"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#aa9b0902c4985f9ed2a378655d8e9af06"> 185</a></span>&#160;<span class="preprocessor">#define AES_INTENCLR_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00187"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a9f0b2df1c42584d5ac86a900ad27543a"> 187</a></span>&#160;<span class="preprocessor">#define AES_INTENCLR_ENCCMP_Pos 0 </span></div>
<div class="line"><a name="l00188"></a><span class="lineno"> 188</span>&#160;<span class="preprocessor">#define AES_INTENCLR_ENCCMP (_U_(0x1) &lt;&lt; AES_INTENCLR_ENCCMP_Pos)</span></div>
<div class="line"><a name="l00189"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a69c8e4f1c9a1bb1ed6eade39cb48715b"> 189</a></span>&#160;<span class="preprocessor">#define AES_INTENCLR_GFMCMP_Pos 1 </span></div>
<div class="line"><a name="l00190"></a><span class="lineno"> 190</span>&#160;<span class="preprocessor">#define AES_INTENCLR_GFMCMP (_U_(0x1) &lt;&lt; AES_INTENCLR_GFMCMP_Pos)</span></div>
<div class="line"><a name="l00191"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a28f6072f3596258d9dc75220163b45bd"> 191</a></span>&#160;<span class="preprocessor">#define AES_INTENCLR_MASK _U_(0x03) </span></div>
<div class="line"><a name="l00193"></a><span class="lineno"> 193</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AES_INTENSET : (AES Offset: 0x06) (R/W 8) Interrupt Enable Set -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00194"></a><span class="lineno"> 194</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00195"></a><span class="lineno"><a class="line" href="unionAES__INTENSET__Type.html"> 195</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00196"></a><span class="lineno"> 196</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00197"></a><span class="lineno"><a class="line" href="unionAES__INTENSET__Type.html#a9a7b155b9954634f4a028bacddfeb48c"> 197</a></span>&#160; uint8_t <a class="code" href="unionAES__INTENSET__Type.html#a9a7b155b9954634f4a028bacddfeb48c">ENCCMP</a>:1; </div>
<div class="line"><a name="l00198"></a><span class="lineno"><a class="line" href="unionAES__INTENSET__Type.html#a729bd92bc5c778d04699623db49b0932"> 198</a></span>&#160; uint8_t <a class="code" href="unionAES__INTENSET__Type.html#a729bd92bc5c778d04699623db49b0932">GFMCMP</a>:1; </div>
<div class="line"><a name="l00199"></a><span class="lineno"><a class="line" href="unionAES__INTENSET__Type.html#a0bc4d763824ab60241054f6a07ac0a44"> 199</a></span>&#160; uint8_t :6; </div>
<div class="line"><a name="l00200"></a><span class="lineno"><a class="line" href="unionAES__INTENSET__Type.html#a4e9b25279d61e3ed21c147316b2a7ce4"> 200</a></span>&#160; } bit; </div>
<div class="line"><a name="l00201"></a><span class="lineno"><a class="line" href="unionAES__INTENSET__Type.html#aad2067f4c70c5743fd6d493b24349aba"> 201</a></span>&#160; uint8_t <a class="code" href="unionAES__INTENSET__Type.html#aad2067f4c70c5743fd6d493b24349aba">reg</a>; </div>
<div class="line"><a name="l00202"></a><span class="lineno"> 202</span>&#160;} <a class="code" href="unionAES__INTENSET__Type.html">AES_INTENSET_Type</a>;</div>
<div class="line"><a name="l00203"></a><span class="lineno"> 203</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00204"></a><span class="lineno"> 204</span>&#160; </div>
<div class="line"><a name="l00205"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a2c2335c63929a0ec59348053f8a4a6b8"> 205</a></span>&#160;<span class="preprocessor">#define AES_INTENSET_OFFSET 0x06 </span></div>
<div class="line"><a name="l00206"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#ac6efb10bfdf13c1a656ce565e3a22c6c"> 206</a></span>&#160;<span class="preprocessor">#define AES_INTENSET_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00208"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a62a56a2e423ef41dd36947677b3be1e6"> 208</a></span>&#160;<span class="preprocessor">#define AES_INTENSET_ENCCMP_Pos 0 </span></div>
<div class="line"><a name="l00209"></a><span class="lineno"> 209</span>&#160;<span class="preprocessor">#define AES_INTENSET_ENCCMP (_U_(0x1) &lt;&lt; AES_INTENSET_ENCCMP_Pos)</span></div>
<div class="line"><a name="l00210"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#aafaf0866499eeb2c3ffadc68c2e99bb6"> 210</a></span>&#160;<span class="preprocessor">#define AES_INTENSET_GFMCMP_Pos 1 </span></div>
<div class="line"><a name="l00211"></a><span class="lineno"> 211</span>&#160;<span class="preprocessor">#define AES_INTENSET_GFMCMP (_U_(0x1) &lt;&lt; AES_INTENSET_GFMCMP_Pos)</span></div>
<div class="line"><a name="l00212"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#ac931ed9e37384df0876640e451699362"> 212</a></span>&#160;<span class="preprocessor">#define AES_INTENSET_MASK _U_(0x03) </span></div>
<div class="line"><a name="l00214"></a><span class="lineno"> 214</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AES_INTFLAG : (AES Offset: 0x07) (R/W 8) Interrupt Flag Status -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00215"></a><span class="lineno"> 215</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00216"></a><span class="lineno"><a class="line" href="unionAES__INTFLAG__Type.html"> 216</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{ <span class="comment">// __I to avoid read-modify-write on write-to-clear register</span></div>
<div class="line"><a name="l00217"></a><span class="lineno"> 217</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00218"></a><span class="lineno"><a class="line" href="unionAES__INTFLAG__Type.html#abc1a326dd2a62fc163819a1b4c64ab4c"> 218</a></span>&#160; __I uint8_t <a class="code" href="unionAES__INTFLAG__Type.html#abc1a326dd2a62fc163819a1b4c64ab4c">ENCCMP</a>:1; </div>
<div class="line"><a name="l00219"></a><span class="lineno"><a class="line" href="unionAES__INTFLAG__Type.html#acff92fd257e93c24c25d4004562c981b"> 219</a></span>&#160; __I uint8_t <a class="code" href="unionAES__INTFLAG__Type.html#acff92fd257e93c24c25d4004562c981b">GFMCMP</a>:1; </div>
<div class="line"><a name="l00220"></a><span class="lineno"><a class="line" href="unionAES__INTFLAG__Type.html#ad4cb04ce25cb3f93d323acb6b3a8c538"> 220</a></span>&#160; __I <a class="code" href="unionAES__INTFLAG__Type.html#ad4cb04ce25cb3f93d323acb6b3a8c538">uint8_t</a> :6; </div>
<div class="line"><a name="l00221"></a><span class="lineno"><a class="line" href="unionAES__INTFLAG__Type.html#adf33dd8317bc2512b0fd0e3374a8773e"> 221</a></span>&#160; } bit; </div>
<div class="line"><a name="l00222"></a><span class="lineno"><a class="line" href="unionAES__INTFLAG__Type.html#ac45f755ed9fec0a0c8f544d069f33352"> 222</a></span>&#160; uint8_t <a class="code" href="unionAES__INTFLAG__Type.html#ac45f755ed9fec0a0c8f544d069f33352">reg</a>; </div>
<div class="line"><a name="l00223"></a><span class="lineno"> 223</span>&#160;} <a class="code" href="unionAES__INTFLAG__Type.html">AES_INTFLAG_Type</a>;</div>
<div class="line"><a name="l00224"></a><span class="lineno"> 224</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00225"></a><span class="lineno"> 225</span>&#160; </div>
<div class="line"><a name="l00226"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a608bb8f3da491602172f6599ca53e82f"> 226</a></span>&#160;<span class="preprocessor">#define AES_INTFLAG_OFFSET 0x07 </span></div>
<div class="line"><a name="l00227"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#aaf1ed5becb953ddbe6047832971a78d1"> 227</a></span>&#160;<span class="preprocessor">#define AES_INTFLAG_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00229"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a275779488d387fbd93b7b368e148caa6"> 229</a></span>&#160;<span class="preprocessor">#define AES_INTFLAG_ENCCMP_Pos 0 </span></div>
<div class="line"><a name="l00230"></a><span class="lineno"> 230</span>&#160;<span class="preprocessor">#define AES_INTFLAG_ENCCMP (_U_(0x1) &lt;&lt; AES_INTFLAG_ENCCMP_Pos)</span></div>
<div class="line"><a name="l00231"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a331dfca6188312fceed2ee7acd16a184"> 231</a></span>&#160;<span class="preprocessor">#define AES_INTFLAG_GFMCMP_Pos 1 </span></div>
<div class="line"><a name="l00232"></a><span class="lineno"> 232</span>&#160;<span class="preprocessor">#define AES_INTFLAG_GFMCMP (_U_(0x1) &lt;&lt; AES_INTFLAG_GFMCMP_Pos)</span></div>
<div class="line"><a name="l00233"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#adc21177c51fa0ebba980cb432571f2a3"> 233</a></span>&#160;<span class="preprocessor">#define AES_INTFLAG_MASK _U_(0x03) </span></div>
<div class="line"><a name="l00235"></a><span class="lineno"> 235</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AES_DATABUFPTR : (AES Offset: 0x08) (R/W 8) Data buffer pointer -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00236"></a><span class="lineno"> 236</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00237"></a><span class="lineno"><a class="line" href="unionAES__DATABUFPTR__Type.html"> 237</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00238"></a><span class="lineno"> 238</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00239"></a><span class="lineno"><a class="line" href="unionAES__DATABUFPTR__Type.html#ace02d51562c13d073e9a162ac6cb3b36"> 239</a></span>&#160; uint8_t <a class="code" href="unionAES__DATABUFPTR__Type.html#ace02d51562c13d073e9a162ac6cb3b36">INDATAPTR</a>:2; </div>
<div class="line"><a name="l00240"></a><span class="lineno"><a class="line" href="unionAES__DATABUFPTR__Type.html#afde63280e07bbd97b1dd3c0463590d63"> 240</a></span>&#160; uint8_t :6; </div>
<div class="line"><a name="l00241"></a><span class="lineno"><a class="line" href="unionAES__DATABUFPTR__Type.html#a56022f43d487448d8377859f079b3b7a"> 241</a></span>&#160; } bit; </div>
<div class="line"><a name="l00242"></a><span class="lineno"><a class="line" href="unionAES__DATABUFPTR__Type.html#aec511a8eddc29a99cf8fd8bf2867df65"> 242</a></span>&#160; uint8_t <a class="code" href="unionAES__DATABUFPTR__Type.html#aec511a8eddc29a99cf8fd8bf2867df65">reg</a>; </div>
<div class="line"><a name="l00243"></a><span class="lineno"> 243</span>&#160;} <a class="code" href="unionAES__DATABUFPTR__Type.html">AES_DATABUFPTR_Type</a>;</div>
<div class="line"><a name="l00244"></a><span class="lineno"> 244</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00245"></a><span class="lineno"> 245</span>&#160; </div>
<div class="line"><a name="l00246"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a12823b5739ecdb1fdd676b6d5a8e701c"> 246</a></span>&#160;<span class="preprocessor">#define AES_DATABUFPTR_OFFSET 0x08 </span></div>
<div class="line"><a name="l00247"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a1318e685042491228cf65adbc20e847d"> 247</a></span>&#160;<span class="preprocessor">#define AES_DATABUFPTR_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00249"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a915d567de3a6921a7af37e419cbfb473"> 249</a></span>&#160;<span class="preprocessor">#define AES_DATABUFPTR_INDATAPTR_Pos 0 </span></div>
<div class="line"><a name="l00250"></a><span class="lineno"> 250</span>&#160;<span class="preprocessor">#define AES_DATABUFPTR_INDATAPTR_Msk (_U_(0x3) &lt;&lt; AES_DATABUFPTR_INDATAPTR_Pos)</span></div>
<div class="line"><a name="l00251"></a><span class="lineno"> 251</span>&#160;<span class="preprocessor">#define AES_DATABUFPTR_INDATAPTR(value) (AES_DATABUFPTR_INDATAPTR_Msk &amp; ((value) &lt;&lt; AES_DATABUFPTR_INDATAPTR_Pos))</span></div>
<div class="line"><a name="l00252"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a976dbeb7c942e941c35c792b909beb45"> 252</a></span>&#160;<span class="preprocessor">#define AES_DATABUFPTR_MASK _U_(0x03) </span></div>
<div class="line"><a name="l00254"></a><span class="lineno"> 254</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AES_DBGCTRL : (AES Offset: 0x09) (R/W 8) Debug control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00255"></a><span class="lineno"> 255</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00256"></a><span class="lineno"><a class="line" href="unionAES__DBGCTRL__Type.html"> 256</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00257"></a><span class="lineno"> 257</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00258"></a><span class="lineno"><a class="line" href="unionAES__DBGCTRL__Type.html#a4ed21265b1b31df44e47416c516dce2f"> 258</a></span>&#160; uint8_t <a class="code" href="unionAES__DBGCTRL__Type.html#a4ed21265b1b31df44e47416c516dce2f">DBGRUN</a>:1; </div>
<div class="line"><a name="l00259"></a><span class="lineno"><a class="line" href="unionAES__DBGCTRL__Type.html#a5aeec31a9afb91031fb150f502aa3e5e"> 259</a></span>&#160; uint8_t :7; </div>
<div class="line"><a name="l00260"></a><span class="lineno"><a class="line" href="unionAES__DBGCTRL__Type.html#a41c7282c2beecf5b8bf1e72883e67e5c"> 260</a></span>&#160; } bit; </div>
<div class="line"><a name="l00261"></a><span class="lineno"><a class="line" href="unionAES__DBGCTRL__Type.html#a475c494fe3b264f5f233e5b35d4fb04c"> 261</a></span>&#160; uint8_t <a class="code" href="unionAES__DBGCTRL__Type.html#a475c494fe3b264f5f233e5b35d4fb04c">reg</a>; </div>
<div class="line"><a name="l00262"></a><span class="lineno"> 262</span>&#160;} <a class="code" href="unionAES__DBGCTRL__Type.html">AES_DBGCTRL_Type</a>;</div>
<div class="line"><a name="l00263"></a><span class="lineno"> 263</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00264"></a><span class="lineno"> 264</span>&#160; </div>
<div class="line"><a name="l00265"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a35726f74c47a7e351127014531da2f47"> 265</a></span>&#160;<span class="preprocessor">#define AES_DBGCTRL_OFFSET 0x09 </span></div>
<div class="line"><a name="l00266"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a365d4b4068e5939248cd6302b995a413"> 266</a></span>&#160;<span class="preprocessor">#define AES_DBGCTRL_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00268"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#ab28725525ff73bde31c6d28b588ba0d0"> 268</a></span>&#160;<span class="preprocessor">#define AES_DBGCTRL_DBGRUN_Pos 0 </span></div>
<div class="line"><a name="l00269"></a><span class="lineno"> 269</span>&#160;<span class="preprocessor">#define AES_DBGCTRL_DBGRUN (_U_(0x1) &lt;&lt; AES_DBGCTRL_DBGRUN_Pos)</span></div>
<div class="line"><a name="l00270"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#ae63e1673c0101507547e6ae1571013d0"> 270</a></span>&#160;<span class="preprocessor">#define AES_DBGCTRL_MASK _U_(0x01) </span></div>
<div class="line"><a name="l00272"></a><span class="lineno"> 272</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AES_KEYWORD : (AES Offset: 0x0C) ( /W 32) Keyword n -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00273"></a><span class="lineno"> 273</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00274"></a><span class="lineno"><a class="line" href="unionAES__KEYWORD__Type.html"> 274</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00275"></a><span class="lineno"><a class="line" href="unionAES__KEYWORD__Type.html#a6a64cec662edddadb2db1243e3f92f5f"> 275</a></span>&#160; uint32_t <a class="code" href="unionAES__KEYWORD__Type.html#a6a64cec662edddadb2db1243e3f92f5f">reg</a>; </div>
<div class="line"><a name="l00276"></a><span class="lineno"> 276</span>&#160;} <a class="code" href="unionAES__KEYWORD__Type.html">AES_KEYWORD_Type</a>;</div>
<div class="line"><a name="l00277"></a><span class="lineno"> 277</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00278"></a><span class="lineno"> 278</span>&#160; </div>
<div class="line"><a name="l00279"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#ad43961e3649400d0297ac0bf45f66b51"> 279</a></span>&#160;<span class="preprocessor">#define AES_KEYWORD_OFFSET 0x0C </span></div>
<div class="line"><a name="l00280"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a1230f0ffc6944df9a46528ed89a81833"> 280</a></span>&#160;<span class="preprocessor">#define AES_KEYWORD_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00281"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a5c4c97c4c5130e8f70a9c1a90a844c40"> 281</a></span>&#160;<span class="preprocessor">#define AES_KEYWORD_MASK _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00283"></a><span class="lineno"> 283</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AES_INDATA : (AES Offset: 0x38) (R/W 32) Indata -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00284"></a><span class="lineno"> 284</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00285"></a><span class="lineno"><a class="line" href="unionAES__INDATA__Type.html"> 285</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00286"></a><span class="lineno"><a class="line" href="unionAES__INDATA__Type.html#a22372ead8e298510a9cc6fc1a4d60d7b"> 286</a></span>&#160; uint32_t <a class="code" href="unionAES__INDATA__Type.html#a22372ead8e298510a9cc6fc1a4d60d7b">reg</a>; </div>
<div class="line"><a name="l00287"></a><span class="lineno"> 287</span>&#160;} <a class="code" href="unionAES__INDATA__Type.html">AES_INDATA_Type</a>;</div>
<div class="line"><a name="l00288"></a><span class="lineno"> 288</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00289"></a><span class="lineno"> 289</span>&#160; </div>
<div class="line"><a name="l00290"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a44da44594903a13541f89f88b344de14"> 290</a></span>&#160;<span class="preprocessor">#define AES_INDATA_OFFSET 0x38 </span></div>
<div class="line"><a name="l00291"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#aa7300347777050df07b81c1aeab9c53f"> 291</a></span>&#160;<span class="preprocessor">#define AES_INDATA_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00292"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a180788b3469c7f201c64f2ab908c0bae"> 292</a></span>&#160;<span class="preprocessor">#define AES_INDATA_MASK _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00294"></a><span class="lineno"> 294</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AES_INTVECTV : (AES Offset: 0x3C) ( /W 32) Initialisation Vector n -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00295"></a><span class="lineno"> 295</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00296"></a><span class="lineno"><a class="line" href="unionAES__INTVECTV__Type.html"> 296</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00297"></a><span class="lineno"><a class="line" href="unionAES__INTVECTV__Type.html#a31af06d239d8d3541daaa54537983e85"> 297</a></span>&#160; uint32_t <a class="code" href="unionAES__INTVECTV__Type.html#a31af06d239d8d3541daaa54537983e85">reg</a>; </div>
<div class="line"><a name="l00298"></a><span class="lineno"> 298</span>&#160;} <a class="code" href="unionAES__INTVECTV__Type.html">AES_INTVECTV_Type</a>;</div>
<div class="line"><a name="l00299"></a><span class="lineno"> 299</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00300"></a><span class="lineno"> 300</span>&#160; </div>
<div class="line"><a name="l00301"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a7294686ad7460e413304e1149f3041f4"> 301</a></span>&#160;<span class="preprocessor">#define AES_INTVECTV_OFFSET 0x3C </span></div>
<div class="line"><a name="l00302"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#af925266e565155a6b467e88c6341c270"> 302</a></span>&#160;<span class="preprocessor">#define AES_INTVECTV_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00303"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#aec52e9f6855e8ef708bccb15554f07f2"> 303</a></span>&#160;<span class="preprocessor">#define AES_INTVECTV_MASK _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00305"></a><span class="lineno"> 305</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AES_HASHKEY : (AES Offset: 0x5C) (R/W 32) Hash key n -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00306"></a><span class="lineno"> 306</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00307"></a><span class="lineno"><a class="line" href="unionAES__HASHKEY__Type.html"> 307</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00308"></a><span class="lineno"><a class="line" href="unionAES__HASHKEY__Type.html#a196e40cd90014ba418f0659d804fa643"> 308</a></span>&#160; uint32_t <a class="code" href="unionAES__HASHKEY__Type.html#a196e40cd90014ba418f0659d804fa643">reg</a>; </div>
<div class="line"><a name="l00309"></a><span class="lineno"> 309</span>&#160;} <a class="code" href="unionAES__HASHKEY__Type.html">AES_HASHKEY_Type</a>;</div>
<div class="line"><a name="l00310"></a><span class="lineno"> 310</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00311"></a><span class="lineno"> 311</span>&#160; </div>
<div class="line"><a name="l00312"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a3de03bc2ec0bd79c019df510cea8fea6"> 312</a></span>&#160;<span class="preprocessor">#define AES_HASHKEY_OFFSET 0x5C </span></div>
<div class="line"><a name="l00313"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#aa08592d15b578a0cadb9dbe80b6a861c"> 313</a></span>&#160;<span class="preprocessor">#define AES_HASHKEY_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00314"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a83df005ae089b7f19cf8ea39c15de70f"> 314</a></span>&#160;<span class="preprocessor">#define AES_HASHKEY_MASK _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00316"></a><span class="lineno"> 316</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AES_GHASH : (AES Offset: 0x6C) (R/W 32) Galois Hash n -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00317"></a><span class="lineno"> 317</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00318"></a><span class="lineno"><a class="line" href="unionAES__GHASH__Type.html"> 318</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00319"></a><span class="lineno"><a class="line" href="unionAES__GHASH__Type.html#a765a2c03934656022f0c1f5d64f5c987"> 319</a></span>&#160; uint32_t <a class="code" href="unionAES__GHASH__Type.html#a765a2c03934656022f0c1f5d64f5c987">reg</a>; </div>
<div class="line"><a name="l00320"></a><span class="lineno"> 320</span>&#160;} <a class="code" href="unionAES__GHASH__Type.html">AES_GHASH_Type</a>;</div>
<div class="line"><a name="l00321"></a><span class="lineno"> 321</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00322"></a><span class="lineno"> 322</span>&#160; </div>
<div class="line"><a name="l00323"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#abdc82d19fc90c68e64609ef90ba0346d"> 323</a></span>&#160;<span class="preprocessor">#define AES_GHASH_OFFSET 0x6C </span></div>
<div class="line"><a name="l00324"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a2e6d76c3282e89760281d4f1325c3531"> 324</a></span>&#160;<span class="preprocessor">#define AES_GHASH_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00325"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a3d0d670007ecc74cf84ba2442017a466"> 325</a></span>&#160;<span class="preprocessor">#define AES_GHASH_MASK _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00327"></a><span class="lineno"> 327</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AES_CIPLEN : (AES Offset: 0x80) (R/W 32) Cipher Length -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00328"></a><span class="lineno"> 328</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00329"></a><span class="lineno"><a class="line" href="unionAES__CIPLEN__Type.html"> 329</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00330"></a><span class="lineno"><a class="line" href="unionAES__CIPLEN__Type.html#a8d7d8caceee541418859c743a613f54d"> 330</a></span>&#160; uint32_t <a class="code" href="unionAES__CIPLEN__Type.html#a8d7d8caceee541418859c743a613f54d">reg</a>; </div>
<div class="line"><a name="l00331"></a><span class="lineno"> 331</span>&#160;} <a class="code" href="unionAES__CIPLEN__Type.html">AES_CIPLEN_Type</a>;</div>
<div class="line"><a name="l00332"></a><span class="lineno"> 332</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00333"></a><span class="lineno"> 333</span>&#160; </div>
<div class="line"><a name="l00334"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a5f0cafe0945c9251a1f82a2a53639e53"> 334</a></span>&#160;<span class="preprocessor">#define AES_CIPLEN_OFFSET 0x80 </span></div>
<div class="line"><a name="l00335"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a2a5bed37ca6f471a82065f70da4e3a2d"> 335</a></span>&#160;<span class="preprocessor">#define AES_CIPLEN_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00336"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a3d019b62fbb83ca231956680099ae1c5"> 336</a></span>&#160;<span class="preprocessor">#define AES_CIPLEN_MASK _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00338"></a><span class="lineno"> 338</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- AES_RANDSEED : (AES Offset: 0x84) (R/W 32) Random Seed -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00339"></a><span class="lineno"> 339</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00340"></a><span class="lineno"><a class="line" href="unionAES__RANDSEED__Type.html"> 340</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00341"></a><span class="lineno"><a class="line" href="unionAES__RANDSEED__Type.html#a115c5d7a0e6a5f83ded98be228b5fbe9"> 341</a></span>&#160; uint32_t <a class="code" href="unionAES__RANDSEED__Type.html#a115c5d7a0e6a5f83ded98be228b5fbe9">reg</a>; </div>
<div class="line"><a name="l00342"></a><span class="lineno"> 342</span>&#160;} <a class="code" href="unionAES__RANDSEED__Type.html">AES_RANDSEED_Type</a>;</div>
<div class="line"><a name="l00343"></a><span class="lineno"> 343</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00344"></a><span class="lineno"> 344</span>&#160; </div>
<div class="line"><a name="l00345"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a66e87bea67036acb95cd23de742c0022"> 345</a></span>&#160;<span class="preprocessor">#define AES_RANDSEED_OFFSET 0x84 </span></div>
<div class="line"><a name="l00346"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#a455525ebfad19c0e2ceb82ef10424d25"> 346</a></span>&#160;<span class="preprocessor">#define AES_RANDSEED_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00347"></a><span class="lineno"><a class="line" href="component_2aes_8h.html#ad290ffaf9510c1afd29efcbccd4768b1"> 347</a></span>&#160;<span class="preprocessor">#define AES_RANDSEED_MASK _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00350"></a><span class="lineno"> 350</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00351"></a><span class="lineno"><a class="line" href="structAes.html"> 351</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00352"></a><span class="lineno"><a class="line" href="structAes.html#acd4df706ec28523d4886564e202a9711"> 352</a></span>&#160; __IO <a class="code" href="unionAES__CTRLA__Type.html">AES_CTRLA_Type</a> <a class="code" href="structAes.html#acd4df706ec28523d4886564e202a9711">CTRLA</a>; </div>
<div class="line"><a name="l00353"></a><span class="lineno"><a class="line" href="structAes.html#ac1d68d335259d824880676a8d278b0c6"> 353</a></span>&#160; __IO <a class="code" href="unionAES__CTRLB__Type.html">AES_CTRLB_Type</a> <a class="code" href="structAes.html#ac1d68d335259d824880676a8d278b0c6">CTRLB</a>; </div>
<div class="line"><a name="l00354"></a><span class="lineno"><a class="line" href="structAes.html#a956073000295f4bb1622489a55c7024c"> 354</a></span>&#160; __IO <a class="code" href="unionAES__INTENCLR__Type.html">AES_INTENCLR_Type</a> <a class="code" href="structAes.html#a956073000295f4bb1622489a55c7024c">INTENCLR</a>; </div>
<div class="line"><a name="l00355"></a><span class="lineno"><a class="line" href="structAes.html#adf22f32384cfb5506cbc13cd7452fdb4"> 355</a></span>&#160; __IO <a class="code" href="unionAES__INTENSET__Type.html">AES_INTENSET_Type</a> <a class="code" href="structAes.html#adf22f32384cfb5506cbc13cd7452fdb4">INTENSET</a>; </div>
<div class="line"><a name="l00356"></a><span class="lineno"><a class="line" href="structAes.html#a447c2165d5de33de0fa3b6d7ae518c53"> 356</a></span>&#160; __IO <a class="code" href="unionAES__INTFLAG__Type.html">AES_INTFLAG_Type</a> <a class="code" href="structAes.html#a447c2165d5de33de0fa3b6d7ae518c53">INTFLAG</a>; </div>
<div class="line"><a name="l00357"></a><span class="lineno"><a class="line" href="structAes.html#a6a4c853271ec594eec4e6bf7afe9989b"> 357</a></span>&#160; __IO <a class="code" href="unionAES__DATABUFPTR__Type.html">AES_DATABUFPTR_Type</a> <a class="code" href="structAes.html#a6a4c853271ec594eec4e6bf7afe9989b">DATABUFPTR</a>; </div>
<div class="line"><a name="l00358"></a><span class="lineno"><a class="line" href="structAes.html#a15572668a2e544462ee0df1fe0672904"> 358</a></span>&#160; __IO <a class="code" href="unionAES__DBGCTRL__Type.html">AES_DBGCTRL_Type</a> <a class="code" href="structAes.html#a15572668a2e544462ee0df1fe0672904">DBGCTRL</a>; </div>
<div class="line"><a name="l00359"></a><span class="lineno"> 359</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved1[0x2];</div>
<div class="line"><a name="l00360"></a><span class="lineno"><a class="line" href="structAes.html#aa078dad93841d5c347439dddbe038974"> 360</a></span>&#160; __O <a class="code" href="unionAES__KEYWORD__Type.html">AES_KEYWORD_Type</a> KEYWORD[8]; </div>
<div class="line"><a name="l00361"></a><span class="lineno"> 361</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved2[0xC];</div>
<div class="line"><a name="l00362"></a><span class="lineno"><a class="line" href="structAes.html#aa345ed4becce9aafe1f5b8be7f9b6dd4"> 362</a></span>&#160; __IO <a class="code" href="unionAES__INDATA__Type.html">AES_INDATA_Type</a> <a class="code" href="structAes.html#aa345ed4becce9aafe1f5b8be7f9b6dd4">INDATA</a>; </div>
<div class="line"><a name="l00363"></a><span class="lineno"><a class="line" href="structAes.html#ad0639a7a1840080f9755d4d14879a554"> 363</a></span>&#160; __O <a class="code" href="unionAES__INTVECTV__Type.html">AES_INTVECTV_Type</a> INTVECTV[4]; </div>
<div class="line"><a name="l00364"></a><span class="lineno"> 364</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved3[0x10];</div>
<div class="line"><a name="l00365"></a><span class="lineno"><a class="line" href="structAes.html#a373b4c4a4a050241e73d34dd654181cf"> 365</a></span>&#160; __IO <a class="code" href="unionAES__HASHKEY__Type.html">AES_HASHKEY_Type</a> HASHKEY[4]; </div>
<div class="line"><a name="l00366"></a><span class="lineno"><a class="line" href="structAes.html#a97a839177d322d9483061049a0cb940a"> 366</a></span>&#160; __IO <a class="code" href="unionAES__GHASH__Type.html">AES_GHASH_Type</a> GHASH[4]; </div>
<div class="line"><a name="l00367"></a><span class="lineno"> 367</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved4[0x4];</div>
<div class="line"><a name="l00368"></a><span class="lineno"><a class="line" href="structAes.html#a15cd160da7f30ba2700d89f193480608"> 368</a></span>&#160; __IO <a class="code" href="unionAES__CIPLEN__Type.html">AES_CIPLEN_Type</a> <a class="code" href="structAes.html#a15cd160da7f30ba2700d89f193480608">CIPLEN</a>; </div>
<div class="line"><a name="l00369"></a><span class="lineno"><a class="line" href="structAes.html#a42d07825c5bac710f1663063af1a6f88"> 369</a></span>&#160; __IO <a class="code" href="unionAES__RANDSEED__Type.html">AES_RANDSEED_Type</a> <a class="code" href="structAes.html#a42d07825c5bac710f1663063af1a6f88">RANDSEED</a>; </div>
<div class="line"><a name="l00370"></a><span class="lineno"> 370</span>&#160;} <a class="code" href="structAes.html">Aes</a>;</div>
<div class="line"><a name="l00371"></a><span class="lineno"> 371</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00372"></a><span class="lineno"> 372</span>&#160; </div>
<div class="line"><a name="l00375"></a><span class="lineno"> 375</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_AES_COMPONENT_ */</span><span class="preprocessor"></span></div>
</div><!-- fragment --></div><!-- contents -->
<div class="ttc" id="aunionAES__INTENSET__Type_html_a9a7b155b9954634f4a028bacddfeb48c"><div class="ttname"><a href="unionAES__INTENSET__Type.html#a9a7b155b9954634f4a028bacddfeb48c">AES_INTENSET_Type::ENCCMP</a></div><div class="ttdeci">uint8_t ENCCMP</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00197">aes.h:197</a></div></div>
<div class="ttc" id="aunionAES__DATABUFPTR__Type_html"><div class="ttname"><a href="unionAES__DATABUFPTR__Type.html">AES_DATABUFPTR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00237">aes.h:237</a></div></div>
<div class="ttc" id="aunionAES__INTENCLR__Type_html"><div class="ttname"><a href="unionAES__INTENCLR__Type.html">AES_INTENCLR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00174">aes.h:174</a></div></div>
<div class="ttc" id="aunionAES__CTRLA__Type_html_aa54b2619f86e7514067db59e24eb23da"><div class="ttname"><a href="unionAES__CTRLA__Type.html#aa54b2619f86e7514067db59e24eb23da">AES_CTRLA_Type::KEYGEN</a></div><div class="ttdeci">uint32_t KEYGEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00054">aes.h:54</a></div></div>
<div class="ttc" id="aunionAES__CTRLA__Type_html_a5295f8b99d5a0de58c6917a25ba774dc"><div class="ttname"><a href="unionAES__CTRLA__Type.html#a5295f8b99d5a0de58c6917a25ba774dc">AES_CTRLA_Type::KEYSIZE</a></div><div class="ttdeci">uint32_t KEYSIZE</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00050">aes.h:50</a></div></div>
<div class="ttc" id="aunionAES__KEYWORD__Type_html_a6a64cec662edddadb2db1243e3f92f5f"><div class="ttname"><a href="unionAES__KEYWORD__Type.html#a6a64cec662edddadb2db1243e3f92f5f">AES_KEYWORD_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00275">aes.h:275</a></div></div>
<div class="ttc" id="aunionAES__INTVECTV__Type_html"><div class="ttname"><a href="unionAES__INTVECTV__Type.html">AES_INTVECTV_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00296">aes.h:296</a></div></div>
<div class="ttc" id="aunionAES__DATABUFPTR__Type_html_aec511a8eddc29a99cf8fd8bf2867df65"><div class="ttname"><a href="unionAES__DATABUFPTR__Type.html#aec511a8eddc29a99cf8fd8bf2867df65">AES_DATABUFPTR_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00242">aes.h:242</a></div></div>
<div class="ttc" id="aunionAES__INTFLAG__Type_html_ac45f755ed9fec0a0c8f544d069f33352"><div class="ttname"><a href="unionAES__INTFLAG__Type.html#ac45f755ed9fec0a0c8f544d069f33352">AES_INTFLAG_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00222">aes.h:222</a></div></div>
<div class="ttc" id="astructAes_html_a42d07825c5bac710f1663063af1a6f88"><div class="ttname"><a href="structAes.html#a42d07825c5bac710f1663063af1a6f88">Aes::RANDSEED</a></div><div class="ttdeci">__IO AES_RANDSEED_Type RANDSEED</div><div class="ttdoc">Offset: 0x84 (R/W 32) Random Seed.</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00369">aes.h:369</a></div></div>
<div class="ttc" id="aunionAES__DBGCTRL__Type_html"><div class="ttname"><a href="unionAES__DBGCTRL__Type.html">AES_DBGCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00256">aes.h:256</a></div></div>
<div class="ttc" id="aunionAES__HASHKEY__Type_html"><div class="ttname"><a href="unionAES__HASHKEY__Type.html">AES_HASHKEY_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00307">aes.h:307</a></div></div>
<div class="ttc" id="aunionAES__INTFLAG__Type_html"><div class="ttname"><a href="unionAES__INTFLAG__Type.html">AES_INTFLAG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00216">aes.h:216</a></div></div>
<div class="ttc" id="astructAes_html_a447c2165d5de33de0fa3b6d7ae518c53"><div class="ttname"><a href="structAes.html#a447c2165d5de33de0fa3b6d7ae518c53">Aes::INTFLAG</a></div><div class="ttdeci">__IO AES_INTFLAG_Type INTFLAG</div><div class="ttdoc">Offset: 0x07 (R/W 8) Interrupt Flag Status.</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00356">aes.h:356</a></div></div>
<div class="ttc" id="aunionAES__CTRLA__Type_html_af9dd8eb4dad1fbc00c3f5b3a995cbd41"><div class="ttname"><a href="unionAES__CTRLA__Type.html#af9dd8eb4dad1fbc00c3f5b3a995cbd41">AES_CTRLA_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00060">aes.h:60</a></div></div>
<div class="ttc" id="aunionAES__CTRLB__Type_html_abe825134364341c05b58c0586c3b408a"><div class="ttname"><a href="unionAES__CTRLB__Type.html#abe825134364341c05b58c0586c3b408a">AES_CTRLB_Type::NEWMSG</a></div><div class="ttdeci">uint8_t NEWMSG</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00150">aes.h:150</a></div></div>
<div class="ttc" id="aunionAES__INTENCLR__Type_html_a084c741eaf3f4253518bdd20ac1d4df0"><div class="ttname"><a href="unionAES__INTENCLR__Type.html#a084c741eaf3f4253518bdd20ac1d4df0">AES_INTENCLR_Type::ENCCMP</a></div><div class="ttdeci">uint8_t ENCCMP</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00176">aes.h:176</a></div></div>
<div class="ttc" id="aunionAES__CTRLB__Type_html_a1d9370e57379911ace6c2349dcb38bd5"><div class="ttname"><a href="unionAES__CTRLB__Type.html#a1d9370e57379911ace6c2349dcb38bd5">AES_CTRLB_Type::EOM</a></div><div class="ttdeci">uint8_t EOM</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00151">aes.h:151</a></div></div>
<div class="ttc" id="aunionAES__HASHKEY__Type_html_a196e40cd90014ba418f0659d804fa643"><div class="ttname"><a href="unionAES__HASHKEY__Type.html#a196e40cd90014ba418f0659d804fa643">AES_HASHKEY_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00308">aes.h:308</a></div></div>
<div class="ttc" id="aunionAES__DATABUFPTR__Type_html_ace02d51562c13d073e9a162ac6cb3b36"><div class="ttname"><a href="unionAES__DATABUFPTR__Type.html#ace02d51562c13d073e9a162ac6cb3b36">AES_DATABUFPTR_Type::INDATAPTR</a></div><div class="ttdeci">uint8_t INDATAPTR</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00239">aes.h:239</a></div></div>
<div class="ttc" id="aunionAES__INDATA__Type_html"><div class="ttname"><a href="unionAES__INDATA__Type.html">AES_INDATA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00285">aes.h:285</a></div></div>
<div class="ttc" id="aunionAES__CTRLA__Type_html_a973815ef63eb2a205b8c2099a994ce5f"><div class="ttname"><a href="unionAES__CTRLA__Type.html#a973815ef63eb2a205b8c2099a994ce5f">AES_CTRLA_Type::AESMODE</a></div><div class="ttdeci">uint32_t AESMODE</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00048">aes.h:48</a></div></div>
<div class="ttc" id="astructAes_html_ac1d68d335259d824880676a8d278b0c6"><div class="ttname"><a href="structAes.html#ac1d68d335259d824880676a8d278b0c6">Aes::CTRLB</a></div><div class="ttdeci">__IO AES_CTRLB_Type CTRLB</div><div class="ttdoc">Offset: 0x04 (R/W 8) Control B.</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00353">aes.h:353</a></div></div>
<div class="ttc" id="aunionAES__CTRLB__Type_html_a57c4cde933bba0b71cd09215676ec71e"><div class="ttname"><a href="unionAES__CTRLB__Type.html#a57c4cde933bba0b71cd09215676ec71e">AES_CTRLB_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00155">aes.h:155</a></div></div>
<div class="ttc" id="aunionAES__INTFLAG__Type_html_acff92fd257e93c24c25d4004562c981b"><div class="ttname"><a href="unionAES__INTFLAG__Type.html#acff92fd257e93c24c25d4004562c981b">AES_INTFLAG_Type::GFMCMP</a></div><div class="ttdeci">__I uint8_t GFMCMP</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00219">aes.h:219</a></div></div>
<div class="ttc" id="aunionAES__CTRLA__Type_html_a1f00bd81b78e62d92ac19a6df42ea176"><div class="ttname"><a href="unionAES__CTRLA__Type.html#a1f00bd81b78e62d92ac19a6df42ea176">AES_CTRLA_Type::LOD</a></div><div class="ttdeci">uint32_t LOD</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00053">aes.h:53</a></div></div>
<div class="ttc" id="astructAes_html_acd4df706ec28523d4886564e202a9711"><div class="ttname"><a href="structAes.html#acd4df706ec28523d4886564e202a9711">Aes::CTRLA</a></div><div class="ttdeci">__IO AES_CTRLA_Type CTRLA</div><div class="ttdoc">Offset: 0x00 (R/W 32) Control A.</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00352">aes.h:352</a></div></div>
<div class="ttc" id="aunionAES__CTRLA__Type_html_a2de99b253d4f7d643673431bae0ce517"><div class="ttname"><a href="unionAES__CTRLA__Type.html#a2de99b253d4f7d643673431bae0ce517">AES_CTRLA_Type::STARTMODE</a></div><div class="ttdeci">uint32_t STARTMODE</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00052">aes.h:52</a></div></div>
<div class="ttc" id="astructAes_html_a956073000295f4bb1622489a55c7024c"><div class="ttname"><a href="structAes.html#a956073000295f4bb1622489a55c7024c">Aes::INTENCLR</a></div><div class="ttdeci">__IO AES_INTENCLR_Type INTENCLR</div><div class="ttdoc">Offset: 0x05 (R/W 8) Interrupt Enable Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00354">aes.h:354</a></div></div>
<div class="ttc" id="aunionAES__INTFLAG__Type_html_abc1a326dd2a62fc163819a1b4c64ab4c"><div class="ttname"><a href="unionAES__INTFLAG__Type.html#abc1a326dd2a62fc163819a1b4c64ab4c">AES_INTFLAG_Type::ENCCMP</a></div><div class="ttdeci">__I uint8_t ENCCMP</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00218">aes.h:218</a></div></div>
<div class="ttc" id="astructAes_html_a15cd160da7f30ba2700d89f193480608"><div class="ttname"><a href="structAes.html#a15cd160da7f30ba2700d89f193480608">Aes::CIPLEN</a></div><div class="ttdeci">__IO AES_CIPLEN_Type CIPLEN</div><div class="ttdoc">Offset: 0x80 (R/W 32) Cipher Length.</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00368">aes.h:368</a></div></div>
<div class="ttc" id="aunionAES__INTVECTV__Type_html_a31af06d239d8d3541daaa54537983e85"><div class="ttname"><a href="unionAES__INTVECTV__Type.html#a31af06d239d8d3541daaa54537983e85">AES_INTVECTV_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00297">aes.h:297</a></div></div>
<div class="ttc" id="aunionAES__KEYWORD__Type_html"><div class="ttname"><a href="unionAES__KEYWORD__Type.html">AES_KEYWORD_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00274">aes.h:274</a></div></div>
<div class="ttc" id="aunionAES__INTENSET__Type_html_a729bd92bc5c778d04699623db49b0932"><div class="ttname"><a href="unionAES__INTENSET__Type.html#a729bd92bc5c778d04699623db49b0932">AES_INTENSET_Type::GFMCMP</a></div><div class="ttdeci">uint8_t GFMCMP</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00198">aes.h:198</a></div></div>
<div class="ttc" id="aunionAES__CIPLEN__Type_html"><div class="ttname"><a href="unionAES__CIPLEN__Type.html">AES_CIPLEN_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00329">aes.h:329</a></div></div>
<div class="ttc" id="aunionAES__INDATA__Type_html_a22372ead8e298510a9cc6fc1a4d60d7b"><div class="ttname"><a href="unionAES__INDATA__Type.html#a22372ead8e298510a9cc6fc1a4d60d7b">AES_INDATA_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00286">aes.h:286</a></div></div>
<div class="ttc" id="aunionAES__INTENCLR__Type_html_a6c802108fb9201c92f73739dccd70f02"><div class="ttname"><a href="unionAES__INTENCLR__Type.html#a6c802108fb9201c92f73739dccd70f02">AES_INTENCLR_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00180">aes.h:180</a></div></div>
<div class="ttc" id="aunionAES__CTRLA__Type_html_a7f40eaa9542a949ff7a7e9c6b8158706"><div class="ttname"><a href="unionAES__CTRLA__Type.html#a7f40eaa9542a949ff7a7e9c6b8158706">AES_CTRLA_Type::CTYPE</a></div><div class="ttdeci">uint32_t CTYPE</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00057">aes.h:57</a></div></div>
<div class="ttc" id="aunionAES__CTRLA__Type_html_a25f454ad6919e04f8f1af2311b5d3d26"><div class="ttname"><a href="unionAES__CTRLA__Type.html#a25f454ad6919e04f8f1af2311b5d3d26">AES_CTRLA_Type::CFBS</a></div><div class="ttdeci">uint32_t CFBS</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00049">aes.h:49</a></div></div>
<div class="ttc" id="astructAes_html_a6a4c853271ec594eec4e6bf7afe9989b"><div class="ttname"><a href="structAes.html#a6a4c853271ec594eec4e6bf7afe9989b">Aes::DATABUFPTR</a></div><div class="ttdeci">__IO AES_DATABUFPTR_Type DATABUFPTR</div><div class="ttdoc">Offset: 0x08 (R/W 8) Data buffer pointer.</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00357">aes.h:357</a></div></div>
<div class="ttc" id="astructAes_html"><div class="ttname"><a href="structAes.html">Aes</a></div><div class="ttdoc">AES hardware registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00351">aes.h:351</a></div></div>
<div class="ttc" id="aunionAES__INTENSET__Type_html_aad2067f4c70c5743fd6d493b24349aba"><div class="ttname"><a href="unionAES__INTENSET__Type.html#aad2067f4c70c5743fd6d493b24349aba">AES_INTENSET_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00201">aes.h:201</a></div></div>
<div class="ttc" id="aunionAES__RANDSEED__Type_html"><div class="ttname"><a href="unionAES__RANDSEED__Type.html">AES_RANDSEED_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00340">aes.h:340</a></div></div>
<div class="ttc" id="aunionAES__INTENSET__Type_html"><div class="ttname"><a href="unionAES__INTENSET__Type.html">AES_INTENSET_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00195">aes.h:195</a></div></div>
<div class="ttc" id="aunionAES__RANDSEED__Type_html_a115c5d7a0e6a5f83ded98be228b5fbe9"><div class="ttname"><a href="unionAES__RANDSEED__Type.html#a115c5d7a0e6a5f83ded98be228b5fbe9">AES_RANDSEED_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00341">aes.h:341</a></div></div>
<div class="ttc" id="aunionAES__GHASH__Type_html_a765a2c03934656022f0c1f5d64f5c987"><div class="ttname"><a href="unionAES__GHASH__Type.html#a765a2c03934656022f0c1f5d64f5c987">AES_GHASH_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00319">aes.h:319</a></div></div>
<div class="ttc" id="aunionAES__CTRLA__Type_html"><div class="ttname"><a href="unionAES__CTRLA__Type.html">AES_CTRLA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00044">aes.h:44</a></div></div>
<div class="ttc" id="aunionAES__DBGCTRL__Type_html_a4ed21265b1b31df44e47416c516dce2f"><div class="ttname"><a href="unionAES__DBGCTRL__Type.html#a4ed21265b1b31df44e47416c516dce2f">AES_DBGCTRL_Type::DBGRUN</a></div><div class="ttdeci">uint8_t DBGRUN</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00258">aes.h:258</a></div></div>
<div class="ttc" id="aunionAES__CTRLA__Type_html_ab57d8a616c21a7b24374e034a8e387d4"><div class="ttname"><a href="unionAES__CTRLA__Type.html#ab57d8a616c21a7b24374e034a8e387d4">AES_CTRLA_Type::CIPHER</a></div><div class="ttdeci">uint32_t CIPHER</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00051">aes.h:51</a></div></div>
<div class="ttc" id="aunionAES__DBGCTRL__Type_html_a475c494fe3b264f5f233e5b35d4fb04c"><div class="ttname"><a href="unionAES__DBGCTRL__Type.html#a475c494fe3b264f5f233e5b35d4fb04c">AES_DBGCTRL_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00261">aes.h:261</a></div></div>
<div class="ttc" id="aunionAES__INTFLAG__Type_html_ad4cb04ce25cb3f93d323acb6b3a8c538"><div class="ttname"><a href="unionAES__INTFLAG__Type.html#ad4cb04ce25cb3f93d323acb6b3a8c538">AES_INTFLAG_Type::uint8_t</a></div><div class="ttdeci">__I uint8_t</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00220">aes.h:220</a></div></div>
<div class="ttc" id="aunionAES__CTRLB__Type_html"><div class="ttname"><a href="unionAES__CTRLB__Type.html">AES_CTRLB_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00147">aes.h:147</a></div></div>
<div class="ttc" id="aunionAES__CTRLB__Type_html_aa31f59e6afc99839a09e1b19dae91389"><div class="ttname"><a href="unionAES__CTRLB__Type.html#aa31f59e6afc99839a09e1b19dae91389">AES_CTRLB_Type::START</a></div><div class="ttdeci">uint8_t START</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00149">aes.h:149</a></div></div>
<div class="ttc" id="astructAes_html_adf22f32384cfb5506cbc13cd7452fdb4"><div class="ttname"><a href="structAes.html#adf22f32384cfb5506cbc13cd7452fdb4">Aes::INTENSET</a></div><div class="ttdeci">__IO AES_INTENSET_Type INTENSET</div><div class="ttdoc">Offset: 0x06 (R/W 8) Interrupt Enable Set.</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00355">aes.h:355</a></div></div>
<div class="ttc" id="aunionAES__CTRLB__Type_html_a682f9503c21dff33bc9ee12658e64eb8"><div class="ttname"><a href="unionAES__CTRLB__Type.html#a682f9503c21dff33bc9ee12658e64eb8">AES_CTRLB_Type::GFMUL</a></div><div class="ttdeci">uint8_t GFMUL</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00152">aes.h:152</a></div></div>
<div class="ttc" id="astructAes_html_aa345ed4becce9aafe1f5b8be7f9b6dd4"><div class="ttname"><a href="structAes.html#aa345ed4becce9aafe1f5b8be7f9b6dd4">Aes::INDATA</a></div><div class="ttdeci">__IO AES_INDATA_Type INDATA</div><div class="ttdoc">Offset: 0x38 (R/W 32) Indata.</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00362">aes.h:362</a></div></div>
<div class="ttc" id="asame54n19a_8h_html_a0d957f1433aaf5d70e4dc2b68288442d"><div class="ttname"><a href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a></div><div class="ttdeci">volatile const uint8_t RoReg8</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00053">same54n19a.h:53</a></div></div>
<div class="ttc" id="aunionAES__INTENCLR__Type_html_a077683c584eed9db5a7aecd888d55272"><div class="ttname"><a href="unionAES__INTENCLR__Type.html#a077683c584eed9db5a7aecd888d55272">AES_INTENCLR_Type::GFMCMP</a></div><div class="ttdeci">uint8_t GFMCMP</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00177">aes.h:177</a></div></div>
<div class="ttc" id="aunionAES__CTRLA__Type_html_a872c1c272fe22e69f912cebe650df9b0"><div class="ttname"><a href="unionAES__CTRLA__Type.html#a872c1c272fe22e69f912cebe650df9b0">AES_CTRLA_Type::XORKEY</a></div><div class="ttdeci">uint32_t XORKEY</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00055">aes.h:55</a></div></div>
<div class="ttc" id="aunionAES__CTRLA__Type_html_a8f57bb965493a497e8868480af6050e2"><div class="ttname"><a href="unionAES__CTRLA__Type.html#a8f57bb965493a497e8868480af6050e2">AES_CTRLA_Type::ENABLE</a></div><div class="ttdeci">uint32_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00047">aes.h:47</a></div></div>
<div class="ttc" id="aunionAES__GHASH__Type_html"><div class="ttname"><a href="unionAES__GHASH__Type.html">AES_GHASH_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00318">aes.h:318</a></div></div>
<div class="ttc" id="aunionAES__CIPLEN__Type_html_a8d7d8caceee541418859c743a613f54d"><div class="ttname"><a href="unionAES__CIPLEN__Type.html#a8d7d8caceee541418859c743a613f54d">AES_CIPLEN_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00330">aes.h:330</a></div></div>
<div class="ttc" id="aunionAES__CTRLA__Type_html_a44eb6e22be4a98a9db57841eb93f6112"><div class="ttname"><a href="unionAES__CTRLA__Type.html#a44eb6e22be4a98a9db57841eb93f6112">AES_CTRLA_Type::SWRST</a></div><div class="ttdeci">uint32_t SWRST</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00046">aes.h:46</a></div></div>
<div class="ttc" id="astructAes_html_a15572668a2e544462ee0df1fe0672904"><div class="ttname"><a href="structAes.html#a15572668a2e544462ee0df1fe0672904">Aes::DBGCTRL</a></div><div class="ttdeci">__IO AES_DBGCTRL_Type DBGCTRL</div><div class="ttdoc">Offset: 0x09 (R/W 8) Debug control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2aes_8h_source.html#l00358">aes.h:358</a></div></div>
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<title>SAME54P20A Test Project: /storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/ccl.h File Reference</title>
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<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_2bb2e10400507f879251f0324a0a8c7c.html">component</a></li> </ul>
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<a href="#nested-classes">Data Structures</a> &#124;
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<p>Component description for CCL.
<a href="#details">More...</a></p>
<p><a href="component_2ccl_8h_source.html">Go to the source code of this file.</a></p>
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Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionCCL__CTRL__Type.html">CCL_CTRL_Type</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionCCL__SEQCTRL__Type.html">CCL_SEQCTRL_Type</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionCCL__LUTCTRL__Type.html">CCL_LUTCTRL_Type</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structCcl.html">Ccl</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">CCL hardware registers. <a href="structCcl.html#details">More...</a><br /></td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
Macros</h2></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_U2225</b></td></tr>
<tr class="separator:abd6657bb413cbb9a53a44d024ae8e79f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae6ff40ae2ffcdeb55569e4866b97f42c"><td class="memItemLeft" align="right" valign="top"><a id="ae6ff40ae2ffcdeb55569e4866b97f42c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>REV_CCL</b>&#160;&#160;&#160;0x110</td></tr>
<tr class="separator:ae6ff40ae2ffcdeb55569e4866b97f42c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa3f64e2c1b09e63007b082f67e196ada"><td class="memItemLeft" align="right" valign="top"><a id="aa3f64e2c1b09e63007b082f67e196ada"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#aa3f64e2c1b09e63007b082f67e196ada">CCL_CTRL_OFFSET</a>&#160;&#160;&#160;0x0</td></tr>
<tr class="memdesc:aa3f64e2c1b09e63007b082f67e196ada"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_CTRL offset) Control <br /></td></tr>
<tr class="separator:aa3f64e2c1b09e63007b082f67e196ada"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5393c157a133f3e2d5c527f69eb3185d"><td class="memItemLeft" align="right" valign="top"><a id="a5393c157a133f3e2d5c527f69eb3185d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a5393c157a133f3e2d5c527f69eb3185d">CCL_CTRL_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a5393c157a133f3e2d5c527f69eb3185d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_CTRL reset_value) Control <br /></td></tr>
<tr class="separator:a5393c157a133f3e2d5c527f69eb3185d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad7e603a55fe052e0c0a8cc5089e3d268"><td class="memItemLeft" align="right" valign="top"><a id="ad7e603a55fe052e0c0a8cc5089e3d268"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#ad7e603a55fe052e0c0a8cc5089e3d268">CCL_CTRL_SWRST_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ad7e603a55fe052e0c0a8cc5089e3d268"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_CTRL) Software Reset <br /></td></tr>
<tr class="separator:ad7e603a55fe052e0c0a8cc5089e3d268"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac1d6563b01734b75550292ddfb130837"><td class="memItemLeft" align="right" valign="top"><a id="ac1d6563b01734b75550292ddfb130837"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_CTRL_SWRST</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2ccl_8h.html#ad7e603a55fe052e0c0a8cc5089e3d268">CCL_CTRL_SWRST_Pos</a>)</td></tr>
<tr class="separator:ac1d6563b01734b75550292ddfb130837"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab7d01a15f8a8b66256c97685bf99fbdb"><td class="memItemLeft" align="right" valign="top"><a id="ab7d01a15f8a8b66256c97685bf99fbdb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#ab7d01a15f8a8b66256c97685bf99fbdb">CCL_CTRL_ENABLE_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:ab7d01a15f8a8b66256c97685bf99fbdb"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_CTRL) Enable <br /></td></tr>
<tr class="separator:ab7d01a15f8a8b66256c97685bf99fbdb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:add54ee9924f68dbe84ea1f4d3dfa0bb6"><td class="memItemLeft" align="right" valign="top"><a id="add54ee9924f68dbe84ea1f4d3dfa0bb6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_CTRL_ENABLE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2ccl_8h.html#ab7d01a15f8a8b66256c97685bf99fbdb">CCL_CTRL_ENABLE_Pos</a>)</td></tr>
<tr class="separator:add54ee9924f68dbe84ea1f4d3dfa0bb6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3a854eeed76e480b040f7a45ed26f491"><td class="memItemLeft" align="right" valign="top"><a id="a3a854eeed76e480b040f7a45ed26f491"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a3a854eeed76e480b040f7a45ed26f491">CCL_CTRL_RUNSTDBY_Pos</a>&#160;&#160;&#160;6</td></tr>
<tr class="memdesc:a3a854eeed76e480b040f7a45ed26f491"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_CTRL) Run in Standby <br /></td></tr>
<tr class="separator:a3a854eeed76e480b040f7a45ed26f491"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a251e19b8639f00f8c3881b5294f9b7db"><td class="memItemLeft" align="right" valign="top"><a id="a251e19b8639f00f8c3881b5294f9b7db"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_CTRL_RUNSTDBY</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2ccl_8h.html#a3a854eeed76e480b040f7a45ed26f491">CCL_CTRL_RUNSTDBY_Pos</a>)</td></tr>
<tr class="separator:a251e19b8639f00f8c3881b5294f9b7db"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a571cfa892b25f20433df2ea90008aba5"><td class="memItemLeft" align="right" valign="top"><a id="a571cfa892b25f20433df2ea90008aba5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a571cfa892b25f20433df2ea90008aba5">CCL_CTRL_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x43)</td></tr>
<tr class="memdesc:a571cfa892b25f20433df2ea90008aba5"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_CTRL) MASK Register <br /></td></tr>
<tr class="separator:a571cfa892b25f20433df2ea90008aba5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae649ffdde33941cf69204d42db58a328"><td class="memItemLeft" align="right" valign="top"><a id="ae649ffdde33941cf69204d42db58a328"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#ae649ffdde33941cf69204d42db58a328">CCL_SEQCTRL_OFFSET</a>&#160;&#160;&#160;0x4</td></tr>
<tr class="memdesc:ae649ffdde33941cf69204d42db58a328"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_SEQCTRL offset) SEQ Control x <br /></td></tr>
<tr class="separator:ae649ffdde33941cf69204d42db58a328"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9162180b372efd330d8f9e5f30b1c904"><td class="memItemLeft" align="right" valign="top"><a id="a9162180b372efd330d8f9e5f30b1c904"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a9162180b372efd330d8f9e5f30b1c904">CCL_SEQCTRL_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a9162180b372efd330d8f9e5f30b1c904"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_SEQCTRL reset_value) SEQ Control x <br /></td></tr>
<tr class="separator:a9162180b372efd330d8f9e5f30b1c904"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab6ac81501f16a9835f3eee86922b8f3e"><td class="memItemLeft" align="right" valign="top"><a id="ab6ac81501f16a9835f3eee86922b8f3e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#ab6ac81501f16a9835f3eee86922b8f3e">CCL_SEQCTRL_SEQSEL_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ab6ac81501f16a9835f3eee86922b8f3e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_SEQCTRL) Sequential Selection <br /></td></tr>
<tr class="separator:ab6ac81501f16a9835f3eee86922b8f3e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abbc9ec9b0dcca40f589e168b31819f83"><td class="memItemLeft" align="right" valign="top"><a id="abbc9ec9b0dcca40f589e168b31819f83"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_SEQCTRL_SEQSEL_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2ccl_8h.html#ab6ac81501f16a9835f3eee86922b8f3e">CCL_SEQCTRL_SEQSEL_Pos</a>)</td></tr>
<tr class="separator:abbc9ec9b0dcca40f589e168b31819f83"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9702c8de3bb92d30d83edbb39dc45011"><td class="memItemLeft" align="right" valign="top"><a id="a9702c8de3bb92d30d83edbb39dc45011"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_SEQCTRL_SEQSEL</b>(value)&#160;&#160;&#160;(CCL_SEQCTRL_SEQSEL_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2ccl_8h.html#ab6ac81501f16a9835f3eee86922b8f3e">CCL_SEQCTRL_SEQSEL_Pos</a>))</td></tr>
<tr class="separator:a9702c8de3bb92d30d83edbb39dc45011"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aba921443415ad6fa30496a97f2276865"><td class="memItemLeft" align="right" valign="top"><a id="aba921443415ad6fa30496a97f2276865"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#aba921443415ad6fa30496a97f2276865">CCL_SEQCTRL_SEQSEL_DISABLE_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:aba921443415ad6fa30496a97f2276865"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_SEQCTRL) Sequential logic is disabled <br /></td></tr>
<tr class="separator:aba921443415ad6fa30496a97f2276865"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0a98c9dc1d2c6f66e8d7c5d3443c7d47"><td class="memItemLeft" align="right" valign="top"><a id="a0a98c9dc1d2c6f66e8d7c5d3443c7d47"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a0a98c9dc1d2c6f66e8d7c5d3443c7d47">CCL_SEQCTRL_SEQSEL_DFF_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:a0a98c9dc1d2c6f66e8d7c5d3443c7d47"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_SEQCTRL) D flip flop <br /></td></tr>
<tr class="separator:a0a98c9dc1d2c6f66e8d7c5d3443c7d47"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a002d4f2fedfc437e6a45f144ec5ab49c"><td class="memItemLeft" align="right" valign="top"><a id="a002d4f2fedfc437e6a45f144ec5ab49c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a002d4f2fedfc437e6a45f144ec5ab49c">CCL_SEQCTRL_SEQSEL_JK_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a002d4f2fedfc437e6a45f144ec5ab49c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_SEQCTRL) JK flip flop <br /></td></tr>
<tr class="separator:a002d4f2fedfc437e6a45f144ec5ab49c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3583624dff7abfed78f90739f9483bf5"><td class="memItemLeft" align="right" valign="top"><a id="a3583624dff7abfed78f90739f9483bf5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a3583624dff7abfed78f90739f9483bf5">CCL_SEQCTRL_SEQSEL_LATCH_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
<tr class="memdesc:a3583624dff7abfed78f90739f9483bf5"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_SEQCTRL) D latch <br /></td></tr>
<tr class="separator:a3583624dff7abfed78f90739f9483bf5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a190ccdf8b60ec2ab4a231060bcafa23d"><td class="memItemLeft" align="right" valign="top"><a id="a190ccdf8b60ec2ab4a231060bcafa23d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a190ccdf8b60ec2ab4a231060bcafa23d">CCL_SEQCTRL_SEQSEL_RS_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
<tr class="memdesc:a190ccdf8b60ec2ab4a231060bcafa23d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_SEQCTRL) RS latch <br /></td></tr>
<tr class="separator:a190ccdf8b60ec2ab4a231060bcafa23d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3ce6bba2d979f470b7c68de55661d5c8"><td class="memItemLeft" align="right" valign="top"><a id="a3ce6bba2d979f470b7c68de55661d5c8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_SEQCTRL_SEQSEL_DISABLE</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#aba921443415ad6fa30496a97f2276865">CCL_SEQCTRL_SEQSEL_DISABLE_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#ab6ac81501f16a9835f3eee86922b8f3e">CCL_SEQCTRL_SEQSEL_Pos</a>)</td></tr>
<tr class="separator:a3ce6bba2d979f470b7c68de55661d5c8"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_SEQCTRL_SEQSEL_DFF</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a0a98c9dc1d2c6f66e8d7c5d3443c7d47">CCL_SEQCTRL_SEQSEL_DFF_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#ab6ac81501f16a9835f3eee86922b8f3e">CCL_SEQCTRL_SEQSEL_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_SEQCTRL_SEQSEL_JK</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a002d4f2fedfc437e6a45f144ec5ab49c">CCL_SEQCTRL_SEQSEL_JK_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#ab6ac81501f16a9835f3eee86922b8f3e">CCL_SEQCTRL_SEQSEL_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_SEQCTRL_SEQSEL_LATCH</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a3583624dff7abfed78f90739f9483bf5">CCL_SEQCTRL_SEQSEL_LATCH_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#ab6ac81501f16a9835f3eee86922b8f3e">CCL_SEQCTRL_SEQSEL_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_SEQCTRL_SEQSEL_RS</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a190ccdf8b60ec2ab4a231060bcafa23d">CCL_SEQCTRL_SEQSEL_RS_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#ab6ac81501f16a9835f3eee86922b8f3e">CCL_SEQCTRL_SEQSEL_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a476f638353d236d389f6dd16c8078961">CCL_SEQCTRL_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0F)</td></tr>
<tr class="memdesc:a476f638353d236d389f6dd16c8078961"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_SEQCTRL) MASK Register <br /></td></tr>
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<tr class="memitem:a8c1fe1bc471d0b506a046d512a541910"><td class="memItemLeft" align="right" valign="top"><a id="a8c1fe1bc471d0b506a046d512a541910"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a8c1fe1bc471d0b506a046d512a541910">CCL_LUTCTRL_OFFSET</a>&#160;&#160;&#160;0x8</td></tr>
<tr class="memdesc:a8c1fe1bc471d0b506a046d512a541910"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL offset) LUT Control x <br /></td></tr>
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<tr class="memitem:a12c422ed3e6af4d13870470ae9b20f4d"><td class="memItemLeft" align="right" valign="top"><a id="a12c422ed3e6af4d13870470ae9b20f4d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a12c422ed3e6af4d13870470ae9b20f4d">CCL_LUTCTRL_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a12c422ed3e6af4d13870470ae9b20f4d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL reset_value) LUT Control x <br /></td></tr>
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<tr class="memitem:a1672d51c49fc156354197e7f97e73983"><td class="memItemLeft" align="right" valign="top"><a id="a1672d51c49fc156354197e7f97e73983"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a1672d51c49fc156354197e7f97e73983">CCL_LUTCTRL_ENABLE_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:a1672d51c49fc156354197e7f97e73983"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) LUT Enable <br /></td></tr>
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<tr class="memitem:a5ab974c3be539661e95fd9edc10a16d9"><td class="memItemLeft" align="right" valign="top"><a id="a5ab974c3be539661e95fd9edc10a16d9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_ENABLE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2ccl_8h.html#a1672d51c49fc156354197e7f97e73983">CCL_LUTCTRL_ENABLE_Pos</a>)</td></tr>
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<tr class="memitem:a671613b8892335b9651f695fb293057a"><td class="memItemLeft" align="right" valign="top"><a id="a671613b8892335b9651f695fb293057a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a671613b8892335b9651f695fb293057a">CCL_LUTCTRL_FILTSEL_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:a671613b8892335b9651f695fb293057a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Filter Selection <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_FILTSEL_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2ccl_8h.html#a671613b8892335b9651f695fb293057a">CCL_LUTCTRL_FILTSEL_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_FILTSEL</b>(value)&#160;&#160;&#160;(CCL_LUTCTRL_FILTSEL_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2ccl_8h.html#a671613b8892335b9651f695fb293057a">CCL_LUTCTRL_FILTSEL_Pos</a>))</td></tr>
<tr class="separator:a8910a248a5d2c0c6e149e69698f60079"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a269930d96ab20ca97bf3e8dc99362a12"><td class="memItemLeft" align="right" valign="top"><a id="a269930d96ab20ca97bf3e8dc99362a12"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a269930d96ab20ca97bf3e8dc99362a12">CCL_LUTCTRL_FILTSEL_DISABLE_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a269930d96ab20ca97bf3e8dc99362a12"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Filter disabled <br /></td></tr>
<tr class="separator:a269930d96ab20ca97bf3e8dc99362a12"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab1c18dbb5d94f7a480c8dd9e083b471d"><td class="memItemLeft" align="right" valign="top"><a id="ab1c18dbb5d94f7a480c8dd9e083b471d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#ab1c18dbb5d94f7a480c8dd9e083b471d">CCL_LUTCTRL_FILTSEL_SYNCH_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:ab1c18dbb5d94f7a480c8dd9e083b471d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Synchronizer enabled <br /></td></tr>
<tr class="separator:ab1c18dbb5d94f7a480c8dd9e083b471d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a746ff0c425c61df00bf0ff42c89e2300"><td class="memItemLeft" align="right" valign="top"><a id="a746ff0c425c61df00bf0ff42c89e2300"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a746ff0c425c61df00bf0ff42c89e2300">CCL_LUTCTRL_FILTSEL_FILTER_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a746ff0c425c61df00bf0ff42c89e2300"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Filter enabled <br /></td></tr>
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<tr class="memitem:a5f05bae5523ba8e5e019e5ed36e914bd"><td class="memItemLeft" align="right" valign="top"><a id="a5f05bae5523ba8e5e019e5ed36e914bd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_FILTSEL_DISABLE</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a269930d96ab20ca97bf3e8dc99362a12">CCL_LUTCTRL_FILTSEL_DISABLE_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#a671613b8892335b9651f695fb293057a">CCL_LUTCTRL_FILTSEL_Pos</a>)</td></tr>
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<tr class="memitem:a966b10c22eff71d348faae08803639be"><td class="memItemLeft" align="right" valign="top"><a id="a966b10c22eff71d348faae08803639be"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_FILTSEL_SYNCH</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#ab1c18dbb5d94f7a480c8dd9e083b471d">CCL_LUTCTRL_FILTSEL_SYNCH_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#a671613b8892335b9651f695fb293057a">CCL_LUTCTRL_FILTSEL_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_FILTSEL_FILTER</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a746ff0c425c61df00bf0ff42c89e2300">CCL_LUTCTRL_FILTSEL_FILTER_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#a671613b8892335b9651f695fb293057a">CCL_LUTCTRL_FILTSEL_Pos</a>)</td></tr>
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<tr class="memitem:ab20c6c3c219abf3c1f952d47e94c7cae"><td class="memItemLeft" align="right" valign="top"><a id="ab20c6c3c219abf3c1f952d47e94c7cae"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#ab20c6c3c219abf3c1f952d47e94c7cae">CCL_LUTCTRL_EDGESEL_Pos</a>&#160;&#160;&#160;7</td></tr>
<tr class="memdesc:ab20c6c3c219abf3c1f952d47e94c7cae"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Edge Selection <br /></td></tr>
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<tr class="memitem:a87a141871ae76dae36a2f1cc63c286b0"><td class="memItemLeft" align="right" valign="top"><a id="a87a141871ae76dae36a2f1cc63c286b0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_EDGESEL</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2ccl_8h.html#ab20c6c3c219abf3c1f952d47e94c7cae">CCL_LUTCTRL_EDGESEL_Pos</a>)</td></tr>
<tr class="separator:a87a141871ae76dae36a2f1cc63c286b0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae20b08aa5e8fcd9eb3a1a118441de53d"><td class="memItemLeft" align="right" valign="top"><a id="ae20b08aa5e8fcd9eb3a1a118441de53d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#ae20b08aa5e8fcd9eb3a1a118441de53d">CCL_LUTCTRL_INSEL0_Pos</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:ae20b08aa5e8fcd9eb3a1a118441de53d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Input Selection 0 <br /></td></tr>
<tr class="separator:ae20b08aa5e8fcd9eb3a1a118441de53d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af8543ae9dd72413e04d3b6403e5ce238"><td class="memItemLeft" align="right" valign="top"><a id="af8543ae9dd72413e04d3b6403e5ce238"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL0_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2ccl_8h.html#ae20b08aa5e8fcd9eb3a1a118441de53d">CCL_LUTCTRL_INSEL0_Pos</a>)</td></tr>
<tr class="separator:af8543ae9dd72413e04d3b6403e5ce238"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2a479a808c5657571e1d2d4ac99266c8"><td class="memItemLeft" align="right" valign="top"><a id="a2a479a808c5657571e1d2d4ac99266c8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL0</b>(value)&#160;&#160;&#160;(CCL_LUTCTRL_INSEL0_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2ccl_8h.html#ae20b08aa5e8fcd9eb3a1a118441de53d">CCL_LUTCTRL_INSEL0_Pos</a>))</td></tr>
<tr class="separator:a2a479a808c5657571e1d2d4ac99266c8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2fc3f172fd108a2ac9808430a8ac1637"><td class="memItemLeft" align="right" valign="top"><a id="a2fc3f172fd108a2ac9808430a8ac1637"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a2fc3f172fd108a2ac9808430a8ac1637">CCL_LUTCTRL_INSEL0_MASK_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a2fc3f172fd108a2ac9808430a8ac1637"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Masked input <br /></td></tr>
<tr class="separator:a2fc3f172fd108a2ac9808430a8ac1637"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aedcfd4d1e7166bb561c19c59b9efb08f"><td class="memItemLeft" align="right" valign="top"><a id="aedcfd4d1e7166bb561c19c59b9efb08f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#aedcfd4d1e7166bb561c19c59b9efb08f">CCL_LUTCTRL_INSEL0_FEEDBACK_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:aedcfd4d1e7166bb561c19c59b9efb08f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Feedback input source <br /></td></tr>
<tr class="separator:aedcfd4d1e7166bb561c19c59b9efb08f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a96dd3c1ff426f4ef5a004d6259fff801"><td class="memItemLeft" align="right" valign="top"><a id="a96dd3c1ff426f4ef5a004d6259fff801"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a96dd3c1ff426f4ef5a004d6259fff801">CCL_LUTCTRL_INSEL0_LINK_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a96dd3c1ff426f4ef5a004d6259fff801"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Linked LUT input source <br /></td></tr>
<tr class="separator:a96dd3c1ff426f4ef5a004d6259fff801"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a16ec41d6b721dada46dd341a50c2559c"><td class="memItemLeft" align="right" valign="top"><a id="a16ec41d6b721dada46dd341a50c2559c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a16ec41d6b721dada46dd341a50c2559c">CCL_LUTCTRL_INSEL0_EVENT_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
<tr class="memdesc:a16ec41d6b721dada46dd341a50c2559c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Event input source <br /></td></tr>
<tr class="separator:a16ec41d6b721dada46dd341a50c2559c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aec398330a7a9b4476e0223c902ddd0fa"><td class="memItemLeft" align="right" valign="top"><a id="aec398330a7a9b4476e0223c902ddd0fa"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#aec398330a7a9b4476e0223c902ddd0fa">CCL_LUTCTRL_INSEL0_IO_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
<tr class="memdesc:aec398330a7a9b4476e0223c902ddd0fa"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) I/O pin input source <br /></td></tr>
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<tr class="memitem:a6b0b5f0f5cc7959cdb36fada583b7c83"><td class="memItemLeft" align="right" valign="top"><a id="a6b0b5f0f5cc7959cdb36fada583b7c83"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a6b0b5f0f5cc7959cdb36fada583b7c83">CCL_LUTCTRL_INSEL0_AC_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
<tr class="memdesc:a6b0b5f0f5cc7959cdb36fada583b7c83"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) AC input source <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a8cb43425ea1200a431b3086d58e218da">CCL_LUTCTRL_INSEL0_TC_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x6)</td></tr>
<tr class="memdesc:a8cb43425ea1200a431b3086d58e218da"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) TC input source <br /></td></tr>
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<tr class="memitem:a98b064aa8877e7ce77ecb683353fd5d8"><td class="memItemLeft" align="right" valign="top"><a id="a98b064aa8877e7ce77ecb683353fd5d8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a98b064aa8877e7ce77ecb683353fd5d8">CCL_LUTCTRL_INSEL0_ALTTC_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7)</td></tr>
<tr class="memdesc:a98b064aa8877e7ce77ecb683353fd5d8"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Alternate TC input source <br /></td></tr>
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<tr class="memitem:a39755754ab8b792d03a3cf330e481fa1"><td class="memItemLeft" align="right" valign="top"><a id="a39755754ab8b792d03a3cf330e481fa1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a39755754ab8b792d03a3cf330e481fa1">CCL_LUTCTRL_INSEL0_TCC_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x8)</td></tr>
<tr class="memdesc:a39755754ab8b792d03a3cf330e481fa1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) TCC input source <br /></td></tr>
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<tr class="memitem:ad84a8d935132f431e16dbf5b25e6dac9"><td class="memItemLeft" align="right" valign="top"><a id="ad84a8d935132f431e16dbf5b25e6dac9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#ad84a8d935132f431e16dbf5b25e6dac9">CCL_LUTCTRL_INSEL0_SERCOM_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x9)</td></tr>
<tr class="memdesc:ad84a8d935132f431e16dbf5b25e6dac9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) SERCOM input source <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL0_MASK</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a2fc3f172fd108a2ac9808430a8ac1637">CCL_LUTCTRL_INSEL0_MASK_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#ae20b08aa5e8fcd9eb3a1a118441de53d">CCL_LUTCTRL_INSEL0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL0_FEEDBACK</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#aedcfd4d1e7166bb561c19c59b9efb08f">CCL_LUTCTRL_INSEL0_FEEDBACK_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#ae20b08aa5e8fcd9eb3a1a118441de53d">CCL_LUTCTRL_INSEL0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL0_LINK</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a96dd3c1ff426f4ef5a004d6259fff801">CCL_LUTCTRL_INSEL0_LINK_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#ae20b08aa5e8fcd9eb3a1a118441de53d">CCL_LUTCTRL_INSEL0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL0_EVENT</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a16ec41d6b721dada46dd341a50c2559c">CCL_LUTCTRL_INSEL0_EVENT_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#ae20b08aa5e8fcd9eb3a1a118441de53d">CCL_LUTCTRL_INSEL0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL0_IO</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#aec398330a7a9b4476e0223c902ddd0fa">CCL_LUTCTRL_INSEL0_IO_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#ae20b08aa5e8fcd9eb3a1a118441de53d">CCL_LUTCTRL_INSEL0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL0_AC</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a6b0b5f0f5cc7959cdb36fada583b7c83">CCL_LUTCTRL_INSEL0_AC_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#ae20b08aa5e8fcd9eb3a1a118441de53d">CCL_LUTCTRL_INSEL0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL0_TC</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a8cb43425ea1200a431b3086d58e218da">CCL_LUTCTRL_INSEL0_TC_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#ae20b08aa5e8fcd9eb3a1a118441de53d">CCL_LUTCTRL_INSEL0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL0_ALTTC</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a98b064aa8877e7ce77ecb683353fd5d8">CCL_LUTCTRL_INSEL0_ALTTC_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#ae20b08aa5e8fcd9eb3a1a118441de53d">CCL_LUTCTRL_INSEL0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL0_TCC</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a39755754ab8b792d03a3cf330e481fa1">CCL_LUTCTRL_INSEL0_TCC_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#ae20b08aa5e8fcd9eb3a1a118441de53d">CCL_LUTCTRL_INSEL0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL0_SERCOM</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#ad84a8d935132f431e16dbf5b25e6dac9">CCL_LUTCTRL_INSEL0_SERCOM_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#ae20b08aa5e8fcd9eb3a1a118441de53d">CCL_LUTCTRL_INSEL0_Pos</a>)</td></tr>
<tr class="separator:a0703f259e90bac9a08cbf2d235dc8bb9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:adbf5f5876e5d60c375384b2c3eea6c88"><td class="memItemLeft" align="right" valign="top"><a id="adbf5f5876e5d60c375384b2c3eea6c88"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#adbf5f5876e5d60c375384b2c3eea6c88">CCL_LUTCTRL_INSEL1_Pos</a>&#160;&#160;&#160;12</td></tr>
<tr class="memdesc:adbf5f5876e5d60c375384b2c3eea6c88"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Input Selection 1 <br /></td></tr>
<tr class="separator:adbf5f5876e5d60c375384b2c3eea6c88"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae4b8da4d3fd404fb859e7df823bc52fd"><td class="memItemLeft" align="right" valign="top"><a id="ae4b8da4d3fd404fb859e7df823bc52fd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL1_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2ccl_8h.html#adbf5f5876e5d60c375384b2c3eea6c88">CCL_LUTCTRL_INSEL1_Pos</a>)</td></tr>
<tr class="separator:ae4b8da4d3fd404fb859e7df823bc52fd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a49423c60fb4ab4592232fa27388f48ea"><td class="memItemLeft" align="right" valign="top"><a id="a49423c60fb4ab4592232fa27388f48ea"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL1</b>(value)&#160;&#160;&#160;(CCL_LUTCTRL_INSEL1_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2ccl_8h.html#adbf5f5876e5d60c375384b2c3eea6c88">CCL_LUTCTRL_INSEL1_Pos</a>))</td></tr>
<tr class="separator:a49423c60fb4ab4592232fa27388f48ea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2a4670a6ed591d977fa24b6fefcf8730"><td class="memItemLeft" align="right" valign="top"><a id="a2a4670a6ed591d977fa24b6fefcf8730"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a2a4670a6ed591d977fa24b6fefcf8730">CCL_LUTCTRL_INSEL1_MASK_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a2a4670a6ed591d977fa24b6fefcf8730"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Masked input <br /></td></tr>
<tr class="separator:a2a4670a6ed591d977fa24b6fefcf8730"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aba2a228fe19fa16a9a42dbbee48e435f"><td class="memItemLeft" align="right" valign="top"><a id="aba2a228fe19fa16a9a42dbbee48e435f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#aba2a228fe19fa16a9a42dbbee48e435f">CCL_LUTCTRL_INSEL1_FEEDBACK_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:aba2a228fe19fa16a9a42dbbee48e435f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Feedback input source <br /></td></tr>
<tr class="separator:aba2a228fe19fa16a9a42dbbee48e435f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a51c16dbb9dab1ff61c527334226e6a81"><td class="memItemLeft" align="right" valign="top"><a id="a51c16dbb9dab1ff61c527334226e6a81"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a51c16dbb9dab1ff61c527334226e6a81">CCL_LUTCTRL_INSEL1_LINK_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a51c16dbb9dab1ff61c527334226e6a81"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Linked LUT input source <br /></td></tr>
<tr class="separator:a51c16dbb9dab1ff61c527334226e6a81"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab7d11ccd911fea55515d0541c2c74d53"><td class="memItemLeft" align="right" valign="top"><a id="ab7d11ccd911fea55515d0541c2c74d53"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#ab7d11ccd911fea55515d0541c2c74d53">CCL_LUTCTRL_INSEL1_EVENT_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
<tr class="memdesc:ab7d11ccd911fea55515d0541c2c74d53"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Event input source <br /></td></tr>
<tr class="separator:ab7d11ccd911fea55515d0541c2c74d53"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4a8972fb5437e4b299a2aac284955c68"><td class="memItemLeft" align="right" valign="top"><a id="a4a8972fb5437e4b299a2aac284955c68"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a4a8972fb5437e4b299a2aac284955c68">CCL_LUTCTRL_INSEL1_IO_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
<tr class="memdesc:a4a8972fb5437e4b299a2aac284955c68"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) I/O pin input source <br /></td></tr>
<tr class="separator:a4a8972fb5437e4b299a2aac284955c68"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0fd1233ad684da393cb31f88e77fb425"><td class="memItemLeft" align="right" valign="top"><a id="a0fd1233ad684da393cb31f88e77fb425"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a0fd1233ad684da393cb31f88e77fb425">CCL_LUTCTRL_INSEL1_AC_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
<tr class="memdesc:a0fd1233ad684da393cb31f88e77fb425"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) AC input source <br /></td></tr>
<tr class="separator:a0fd1233ad684da393cb31f88e77fb425"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad1731fe45d9d8b911af88cf4e212e9e6"><td class="memItemLeft" align="right" valign="top"><a id="ad1731fe45d9d8b911af88cf4e212e9e6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#ad1731fe45d9d8b911af88cf4e212e9e6">CCL_LUTCTRL_INSEL1_TC_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x6)</td></tr>
<tr class="memdesc:ad1731fe45d9d8b911af88cf4e212e9e6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) TC input source <br /></td></tr>
<tr class="separator:ad1731fe45d9d8b911af88cf4e212e9e6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1a246429ad9ba740e414d55523cbd564"><td class="memItemLeft" align="right" valign="top"><a id="a1a246429ad9ba740e414d55523cbd564"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a1a246429ad9ba740e414d55523cbd564">CCL_LUTCTRL_INSEL1_ALTTC_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7)</td></tr>
<tr class="memdesc:a1a246429ad9ba740e414d55523cbd564"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Alternate TC input source <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a8f9dddb882a645f866ed2cce5d42b232">CCL_LUTCTRL_INSEL1_TCC_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x8)</td></tr>
<tr class="memdesc:a8f9dddb882a645f866ed2cce5d42b232"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) TCC input source <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a04fb3ca32c0cf450304428a89a26c917">CCL_LUTCTRL_INSEL1_SERCOM_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x9)</td></tr>
<tr class="memdesc:a04fb3ca32c0cf450304428a89a26c917"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) SERCOM input source <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL1_MASK</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a2a4670a6ed591d977fa24b6fefcf8730">CCL_LUTCTRL_INSEL1_MASK_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#adbf5f5876e5d60c375384b2c3eea6c88">CCL_LUTCTRL_INSEL1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL1_FEEDBACK</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#aba2a228fe19fa16a9a42dbbee48e435f">CCL_LUTCTRL_INSEL1_FEEDBACK_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#adbf5f5876e5d60c375384b2c3eea6c88">CCL_LUTCTRL_INSEL1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL1_LINK</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a51c16dbb9dab1ff61c527334226e6a81">CCL_LUTCTRL_INSEL1_LINK_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#adbf5f5876e5d60c375384b2c3eea6c88">CCL_LUTCTRL_INSEL1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL1_EVENT</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#ab7d11ccd911fea55515d0541c2c74d53">CCL_LUTCTRL_INSEL1_EVENT_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#adbf5f5876e5d60c375384b2c3eea6c88">CCL_LUTCTRL_INSEL1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL1_IO</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a4a8972fb5437e4b299a2aac284955c68">CCL_LUTCTRL_INSEL1_IO_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#adbf5f5876e5d60c375384b2c3eea6c88">CCL_LUTCTRL_INSEL1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL1_AC</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a0fd1233ad684da393cb31f88e77fb425">CCL_LUTCTRL_INSEL1_AC_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#adbf5f5876e5d60c375384b2c3eea6c88">CCL_LUTCTRL_INSEL1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL1_TC</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#ad1731fe45d9d8b911af88cf4e212e9e6">CCL_LUTCTRL_INSEL1_TC_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#adbf5f5876e5d60c375384b2c3eea6c88">CCL_LUTCTRL_INSEL1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL1_ALTTC</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a1a246429ad9ba740e414d55523cbd564">CCL_LUTCTRL_INSEL1_ALTTC_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#adbf5f5876e5d60c375384b2c3eea6c88">CCL_LUTCTRL_INSEL1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL1_TCC</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a8f9dddb882a645f866ed2cce5d42b232">CCL_LUTCTRL_INSEL1_TCC_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#adbf5f5876e5d60c375384b2c3eea6c88">CCL_LUTCTRL_INSEL1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL1_SERCOM</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a04fb3ca32c0cf450304428a89a26c917">CCL_LUTCTRL_INSEL1_SERCOM_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#adbf5f5876e5d60c375384b2c3eea6c88">CCL_LUTCTRL_INSEL1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a2b985c6f56f3865f10ad2f81f8447410">CCL_LUTCTRL_INSEL2_Pos</a>&#160;&#160;&#160;16</td></tr>
<tr class="memdesc:a2b985c6f56f3865f10ad2f81f8447410"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Input Selection 2 <br /></td></tr>
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<tr class="memitem:a3ee70c7fa67d17872e828267cfd8eb2e"><td class="memItemLeft" align="right" valign="top"><a id="a3ee70c7fa67d17872e828267cfd8eb2e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL2_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2ccl_8h.html#a2b985c6f56f3865f10ad2f81f8447410">CCL_LUTCTRL_INSEL2_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL2</b>(value)&#160;&#160;&#160;(CCL_LUTCTRL_INSEL2_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2ccl_8h.html#a2b985c6f56f3865f10ad2f81f8447410">CCL_LUTCTRL_INSEL2_Pos</a>))</td></tr>
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<tr class="memitem:ab03391eae297d7157a6be47a54de1527"><td class="memItemLeft" align="right" valign="top"><a id="ab03391eae297d7157a6be47a54de1527"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#ab03391eae297d7157a6be47a54de1527">CCL_LUTCTRL_INSEL2_MASK_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:ab03391eae297d7157a6be47a54de1527"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Masked input <br /></td></tr>
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<tr class="memitem:a523c90ff425f03ee7fee92f778239bf2"><td class="memItemLeft" align="right" valign="top"><a id="a523c90ff425f03ee7fee92f778239bf2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a523c90ff425f03ee7fee92f778239bf2">CCL_LUTCTRL_INSEL2_FEEDBACK_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:a523c90ff425f03ee7fee92f778239bf2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Feedback input source <br /></td></tr>
<tr class="separator:a523c90ff425f03ee7fee92f778239bf2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa0aa3dd4ddea419deaaf585b3b8de5d4"><td class="memItemLeft" align="right" valign="top"><a id="aa0aa3dd4ddea419deaaf585b3b8de5d4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#aa0aa3dd4ddea419deaaf585b3b8de5d4">CCL_LUTCTRL_INSEL2_LINK_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:aa0aa3dd4ddea419deaaf585b3b8de5d4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Linked LUT input source <br /></td></tr>
<tr class="separator:aa0aa3dd4ddea419deaaf585b3b8de5d4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3ef34865a9ae60850425eebbb9a2be17"><td class="memItemLeft" align="right" valign="top"><a id="a3ef34865a9ae60850425eebbb9a2be17"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a3ef34865a9ae60850425eebbb9a2be17">CCL_LUTCTRL_INSEL2_EVENT_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
<tr class="memdesc:a3ef34865a9ae60850425eebbb9a2be17"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Event input source <br /></td></tr>
<tr class="separator:a3ef34865a9ae60850425eebbb9a2be17"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac9a84ee3f427bc1b552fb34efc09027c"><td class="memItemLeft" align="right" valign="top"><a id="ac9a84ee3f427bc1b552fb34efc09027c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#ac9a84ee3f427bc1b552fb34efc09027c">CCL_LUTCTRL_INSEL2_IO_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
<tr class="memdesc:ac9a84ee3f427bc1b552fb34efc09027c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) I/O pin input source <br /></td></tr>
<tr class="separator:ac9a84ee3f427bc1b552fb34efc09027c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aab04aa057d10c97a35cbb4857eb9d033"><td class="memItemLeft" align="right" valign="top"><a id="aab04aa057d10c97a35cbb4857eb9d033"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#aab04aa057d10c97a35cbb4857eb9d033">CCL_LUTCTRL_INSEL2_AC_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
<tr class="memdesc:aab04aa057d10c97a35cbb4857eb9d033"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) AC input source <br /></td></tr>
<tr class="separator:aab04aa057d10c97a35cbb4857eb9d033"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac37c0102c064bfca53d81b74513e6b4a"><td class="memItemLeft" align="right" valign="top"><a id="ac37c0102c064bfca53d81b74513e6b4a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#ac37c0102c064bfca53d81b74513e6b4a">CCL_LUTCTRL_INSEL2_TC_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x6)</td></tr>
<tr class="memdesc:ac37c0102c064bfca53d81b74513e6b4a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) TC input source <br /></td></tr>
<tr class="separator:ac37c0102c064bfca53d81b74513e6b4a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a70f30a018e50c5049218a40a42ea2d92"><td class="memItemLeft" align="right" valign="top"><a id="a70f30a018e50c5049218a40a42ea2d92"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a70f30a018e50c5049218a40a42ea2d92">CCL_LUTCTRL_INSEL2_ALTTC_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7)</td></tr>
<tr class="memdesc:a70f30a018e50c5049218a40a42ea2d92"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Alternate TC input source <br /></td></tr>
<tr class="separator:a70f30a018e50c5049218a40a42ea2d92"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a40685c387b713089ee626d6c22a959cf"><td class="memItemLeft" align="right" valign="top"><a id="a40685c387b713089ee626d6c22a959cf"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a40685c387b713089ee626d6c22a959cf">CCL_LUTCTRL_INSEL2_TCC_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x8)</td></tr>
<tr class="memdesc:a40685c387b713089ee626d6c22a959cf"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) TCC input source <br /></td></tr>
<tr class="separator:a40685c387b713089ee626d6c22a959cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a164a16baa0262eb33fd134e396c5ffd0"><td class="memItemLeft" align="right" valign="top"><a id="a164a16baa0262eb33fd134e396c5ffd0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a164a16baa0262eb33fd134e396c5ffd0">CCL_LUTCTRL_INSEL2_SERCOM_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x9)</td></tr>
<tr class="memdesc:a164a16baa0262eb33fd134e396c5ffd0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) SERCOM input source <br /></td></tr>
<tr class="separator:a164a16baa0262eb33fd134e396c5ffd0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac949dfe14dd218880e6be67c9375fc3e"><td class="memItemLeft" align="right" valign="top"><a id="ac949dfe14dd218880e6be67c9375fc3e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL2_MASK</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#ab03391eae297d7157a6be47a54de1527">CCL_LUTCTRL_INSEL2_MASK_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#a2b985c6f56f3865f10ad2f81f8447410">CCL_LUTCTRL_INSEL2_Pos</a>)</td></tr>
<tr class="separator:ac949dfe14dd218880e6be67c9375fc3e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab8796dba36af61d95344e314b66ee41a"><td class="memItemLeft" align="right" valign="top"><a id="ab8796dba36af61d95344e314b66ee41a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL2_FEEDBACK</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a523c90ff425f03ee7fee92f778239bf2">CCL_LUTCTRL_INSEL2_FEEDBACK_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#a2b985c6f56f3865f10ad2f81f8447410">CCL_LUTCTRL_INSEL2_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL2_LINK</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#aa0aa3dd4ddea419deaaf585b3b8de5d4">CCL_LUTCTRL_INSEL2_LINK_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#a2b985c6f56f3865f10ad2f81f8447410">CCL_LUTCTRL_INSEL2_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL2_EVENT</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a3ef34865a9ae60850425eebbb9a2be17">CCL_LUTCTRL_INSEL2_EVENT_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#a2b985c6f56f3865f10ad2f81f8447410">CCL_LUTCTRL_INSEL2_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL2_IO</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#ac9a84ee3f427bc1b552fb34efc09027c">CCL_LUTCTRL_INSEL2_IO_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#a2b985c6f56f3865f10ad2f81f8447410">CCL_LUTCTRL_INSEL2_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL2_AC</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#aab04aa057d10c97a35cbb4857eb9d033">CCL_LUTCTRL_INSEL2_AC_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#a2b985c6f56f3865f10ad2f81f8447410">CCL_LUTCTRL_INSEL2_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL2_TC</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#ac37c0102c064bfca53d81b74513e6b4a">CCL_LUTCTRL_INSEL2_TC_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#a2b985c6f56f3865f10ad2f81f8447410">CCL_LUTCTRL_INSEL2_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL2_ALTTC</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a70f30a018e50c5049218a40a42ea2d92">CCL_LUTCTRL_INSEL2_ALTTC_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#a2b985c6f56f3865f10ad2f81f8447410">CCL_LUTCTRL_INSEL2_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL2_TCC</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a40685c387b713089ee626d6c22a959cf">CCL_LUTCTRL_INSEL2_TCC_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#a2b985c6f56f3865f10ad2f81f8447410">CCL_LUTCTRL_INSEL2_Pos</a>)</td></tr>
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<tr class="memitem:a138234e4a33a6c0f7035f56ff1b4b522"><td class="memItemLeft" align="right" valign="top"><a id="a138234e4a33a6c0f7035f56ff1b4b522"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INSEL2_SERCOM</b>&#160;&#160;&#160;(<a class="el" href="component_2ccl_8h.html#a164a16baa0262eb33fd134e396c5ffd0">CCL_LUTCTRL_INSEL2_SERCOM_Val</a> &lt;&lt; <a class="el" href="component_2ccl_8h.html#a2b985c6f56f3865f10ad2f81f8447410">CCL_LUTCTRL_INSEL2_Pos</a>)</td></tr>
<tr class="separator:a138234e4a33a6c0f7035f56ff1b4b522"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a72778567a0b9bddef619975d2ae08f6f"><td class="memItemLeft" align="right" valign="top"><a id="a72778567a0b9bddef619975d2ae08f6f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a72778567a0b9bddef619975d2ae08f6f">CCL_LUTCTRL_INVEI_Pos</a>&#160;&#160;&#160;20</td></tr>
<tr class="memdesc:a72778567a0b9bddef619975d2ae08f6f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Inverted Event Input Enable <br /></td></tr>
<tr class="separator:a72778567a0b9bddef619975d2ae08f6f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a51f066285008bea41f44167cf3ee4582"><td class="memItemLeft" align="right" valign="top"><a id="a51f066285008bea41f44167cf3ee4582"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_INVEI</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2ccl_8h.html#a72778567a0b9bddef619975d2ae08f6f">CCL_LUTCTRL_INVEI_Pos</a>)</td></tr>
<tr class="separator:a51f066285008bea41f44167cf3ee4582"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2f90398b99ab7e79540c1a4d5362f3ab"><td class="memItemLeft" align="right" valign="top"><a id="a2f90398b99ab7e79540c1a4d5362f3ab"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a2f90398b99ab7e79540c1a4d5362f3ab">CCL_LUTCTRL_LUTEI_Pos</a>&#160;&#160;&#160;21</td></tr>
<tr class="memdesc:a2f90398b99ab7e79540c1a4d5362f3ab"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) LUT Event Input Enable <br /></td></tr>
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<tr class="memitem:a4c7e6d992eecc1a1f9d6b8a06c8d9b20"><td class="memItemLeft" align="right" valign="top"><a id="a4c7e6d992eecc1a1f9d6b8a06c8d9b20"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_LUTEI</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2ccl_8h.html#a2f90398b99ab7e79540c1a4d5362f3ab">CCL_LUTCTRL_LUTEI_Pos</a>)</td></tr>
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<tr class="memitem:adb614536601b4d78fde9d580188bc224"><td class="memItemLeft" align="right" valign="top"><a id="adb614536601b4d78fde9d580188bc224"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#adb614536601b4d78fde9d580188bc224">CCL_LUTCTRL_LUTEO_Pos</a>&#160;&#160;&#160;22</td></tr>
<tr class="memdesc:adb614536601b4d78fde9d580188bc224"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) LUT Event Output Enable <br /></td></tr>
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<tr class="memitem:a3543b4ccfa5317316d92c5449ae4632b"><td class="memItemLeft" align="right" valign="top"><a id="a3543b4ccfa5317316d92c5449ae4632b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_LUTEO</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2ccl_8h.html#adb614536601b4d78fde9d580188bc224">CCL_LUTCTRL_LUTEO_Pos</a>)</td></tr>
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<tr class="memitem:ab080b12c5cb04cea57afcb7c38b7e7ba"><td class="memItemLeft" align="right" valign="top"><a id="ab080b12c5cb04cea57afcb7c38b7e7ba"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#ab080b12c5cb04cea57afcb7c38b7e7ba">CCL_LUTCTRL_TRUTH_Pos</a>&#160;&#160;&#160;24</td></tr>
<tr class="memdesc:ab080b12c5cb04cea57afcb7c38b7e7ba"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) Truth Value <br /></td></tr>
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<tr class="memitem:a721f265a6e25cdd1f2817a6ea1af4f9b"><td class="memItemLeft" align="right" valign="top"><a id="a721f265a6e25cdd1f2817a6ea1af4f9b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_TRUTH_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF) &lt;&lt; <a class="el" href="component_2ccl_8h.html#ab080b12c5cb04cea57afcb7c38b7e7ba">CCL_LUTCTRL_TRUTH_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CCL_LUTCTRL_TRUTH</b>(value)&#160;&#160;&#160;(CCL_LUTCTRL_TRUTH_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2ccl_8h.html#ab080b12c5cb04cea57afcb7c38b7e7ba">CCL_LUTCTRL_TRUTH_Pos</a>))</td></tr>
<tr class="separator:a4a8dc3df6d77e82cb956c8edbf09a444"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2ccl_8h.html#a529e201f32c390da0ffe4798725473aa">CCL_LUTCTRL_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF7FFFB2)</td></tr>
<tr class="memdesc:a529e201f32c390da0ffe4798725473aa"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CCL_LUTCTRL) MASK Register <br /></td></tr>
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</table>
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Component description for CCL. </p>
<p>Copyright (c) 2019 Microchip Technology Inc.</p>
<p>\asf_license_start </p>
<p class="definition">Definition in file <a class="el" href="component_2ccl_8h_source.html">ccl.h</a>.</p>
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<a href="component_2ccl_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_CCL_COMPONENT_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_CCL_COMPONENT_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160; </div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define CCL_U2225</span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define REV_CCL 0x110</span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160; </div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="comment">/* -------- CCL_CTRL : (CCL Offset: 0x0) (R/W 8) Control -------- */</span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00044"></a><span class="lineno"><a class="line" href="unionCCL__CTRL__Type.html"> 44</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00046"></a><span class="lineno"><a class="line" href="unionCCL__CTRL__Type.html#a99731534845b5032df754d326cf55507"> 46</a></span>&#160; uint8_t <a class="code" href="unionCCL__CTRL__Type.html#a99731534845b5032df754d326cf55507">SWRST</a>:1; </div>
<div class="line"><a name="l00047"></a><span class="lineno"><a class="line" href="unionCCL__CTRL__Type.html#aeee09818c8cceabdea06d5654894406a"> 47</a></span>&#160; uint8_t <a class="code" href="unionCCL__CTRL__Type.html#aeee09818c8cceabdea06d5654894406a">ENABLE</a>:1; </div>
<div class="line"><a name="l00048"></a><span class="lineno"><a class="line" href="unionCCL__CTRL__Type.html#a8d836b98f89c325ac7a410f26169b422"> 48</a></span>&#160; uint8_t :4; </div>
<div class="line"><a name="l00049"></a><span class="lineno"><a class="line" href="unionCCL__CTRL__Type.html#a0bd82e8db1dea6be471f27b3f4b40049"> 49</a></span>&#160; uint8_t <a class="code" href="unionCCL__CTRL__Type.html#a0bd82e8db1dea6be471f27b3f4b40049">RUNSTDBY</a>:1; </div>
<div class="line"><a name="l00050"></a><span class="lineno"><a class="line" href="unionCCL__CTRL__Type.html#a910bc11a14ca8f1c2325c5255c8ba87c"> 50</a></span>&#160; uint8_t :1; </div>
<div class="line"><a name="l00051"></a><span class="lineno"><a class="line" href="unionCCL__CTRL__Type.html#a5013ac126ac174466a00bcab0489b6d2"> 51</a></span>&#160; } bit; </div>
<div class="line"><a name="l00052"></a><span class="lineno"><a class="line" href="unionCCL__CTRL__Type.html#a4c9ba3c1197474b305559ed2dfa600d8"> 52</a></span>&#160; uint8_t <a class="code" href="unionCCL__CTRL__Type.html#a4c9ba3c1197474b305559ed2dfa600d8">reg</a>; </div>
<div class="line"><a name="l00053"></a><span class="lineno"> 53</span>&#160;} <a class="code" href="unionCCL__CTRL__Type.html">CCL_CTRL_Type</a>;</div>
<div class="line"><a name="l00054"></a><span class="lineno"> 54</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00055"></a><span class="lineno"> 55</span>&#160; </div>
<div class="line"><a name="l00056"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#aa3f64e2c1b09e63007b082f67e196ada"> 56</a></span>&#160;<span class="preprocessor">#define CCL_CTRL_OFFSET 0x0 </span></div>
<div class="line"><a name="l00057"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a5393c157a133f3e2d5c527f69eb3185d"> 57</a></span>&#160;<span class="preprocessor">#define CCL_CTRL_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00059"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#ad7e603a55fe052e0c0a8cc5089e3d268"> 59</a></span>&#160;<span class="preprocessor">#define CCL_CTRL_SWRST_Pos 0 </span></div>
<div class="line"><a name="l00060"></a><span class="lineno"> 60</span>&#160;<span class="preprocessor">#define CCL_CTRL_SWRST (_U_(0x1) &lt;&lt; CCL_CTRL_SWRST_Pos)</span></div>
<div class="line"><a name="l00061"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#ab7d01a15f8a8b66256c97685bf99fbdb"> 61</a></span>&#160;<span class="preprocessor">#define CCL_CTRL_ENABLE_Pos 1 </span></div>
<div class="line"><a name="l00062"></a><span class="lineno"> 62</span>&#160;<span class="preprocessor">#define CCL_CTRL_ENABLE (_U_(0x1) &lt;&lt; CCL_CTRL_ENABLE_Pos)</span></div>
<div class="line"><a name="l00063"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a3a854eeed76e480b040f7a45ed26f491"> 63</a></span>&#160;<span class="preprocessor">#define CCL_CTRL_RUNSTDBY_Pos 6 </span></div>
<div class="line"><a name="l00064"></a><span class="lineno"> 64</span>&#160;<span class="preprocessor">#define CCL_CTRL_RUNSTDBY (_U_(0x1) &lt;&lt; CCL_CTRL_RUNSTDBY_Pos)</span></div>
<div class="line"><a name="l00065"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a571cfa892b25f20433df2ea90008aba5"> 65</a></span>&#160;<span class="preprocessor">#define CCL_CTRL_MASK _U_(0x43) </span></div>
<div class="line"><a name="l00067"></a><span class="lineno"> 67</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- CCL_SEQCTRL : (CCL Offset: 0x4) (R/W 8) SEQ Control x -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00068"></a><span class="lineno"> 68</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00069"></a><span class="lineno"><a class="line" href="unionCCL__SEQCTRL__Type.html"> 69</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00070"></a><span class="lineno"> 70</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00071"></a><span class="lineno"><a class="line" href="unionCCL__SEQCTRL__Type.html#aee4adb7d1e464f0195c1be29d93753fa"> 71</a></span>&#160; uint8_t <a class="code" href="unionCCL__SEQCTRL__Type.html#aee4adb7d1e464f0195c1be29d93753fa">SEQSEL</a>:4; </div>
<div class="line"><a name="l00072"></a><span class="lineno"><a class="line" href="unionCCL__SEQCTRL__Type.html#a0c5b917c8857a5374b67e1588fe31520"> 72</a></span>&#160; uint8_t :4; </div>
<div class="line"><a name="l00073"></a><span class="lineno"><a class="line" href="unionCCL__SEQCTRL__Type.html#a043424803ceab0f2052c9e74961ac8bf"> 73</a></span>&#160; } bit; </div>
<div class="line"><a name="l00074"></a><span class="lineno"><a class="line" href="unionCCL__SEQCTRL__Type.html#aaf39644e4e1a48bb076a30d9decae7b9"> 74</a></span>&#160; uint8_t <a class="code" href="unionCCL__SEQCTRL__Type.html#aaf39644e4e1a48bb076a30d9decae7b9">reg</a>; </div>
<div class="line"><a name="l00075"></a><span class="lineno"> 75</span>&#160;} <a class="code" href="unionCCL__SEQCTRL__Type.html">CCL_SEQCTRL_Type</a>;</div>
<div class="line"><a name="l00076"></a><span class="lineno"> 76</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00077"></a><span class="lineno"> 77</span>&#160; </div>
<div class="line"><a name="l00078"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#ae649ffdde33941cf69204d42db58a328"> 78</a></span>&#160;<span class="preprocessor">#define CCL_SEQCTRL_OFFSET 0x4 </span></div>
<div class="line"><a name="l00079"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a9162180b372efd330d8f9e5f30b1c904"> 79</a></span>&#160;<span class="preprocessor">#define CCL_SEQCTRL_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00081"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#ab6ac81501f16a9835f3eee86922b8f3e"> 81</a></span>&#160;<span class="preprocessor">#define CCL_SEQCTRL_SEQSEL_Pos 0 </span></div>
<div class="line"><a name="l00082"></a><span class="lineno"> 82</span>&#160;<span class="preprocessor">#define CCL_SEQCTRL_SEQSEL_Msk (_U_(0xF) &lt;&lt; CCL_SEQCTRL_SEQSEL_Pos)</span></div>
<div class="line"><a name="l00083"></a><span class="lineno"> 83</span>&#160;<span class="preprocessor">#define CCL_SEQCTRL_SEQSEL(value) (CCL_SEQCTRL_SEQSEL_Msk &amp; ((value) &lt;&lt; CCL_SEQCTRL_SEQSEL_Pos))</span></div>
<div class="line"><a name="l00084"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#aba921443415ad6fa30496a97f2276865"> 84</a></span>&#160;<span class="preprocessor">#define CCL_SEQCTRL_SEQSEL_DISABLE_Val _U_(0x0) </span></div>
<div class="line"><a name="l00085"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a0a98c9dc1d2c6f66e8d7c5d3443c7d47"> 85</a></span>&#160;<span class="preprocessor">#define CCL_SEQCTRL_SEQSEL_DFF_Val _U_(0x1) </span></div>
<div class="line"><a name="l00086"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a002d4f2fedfc437e6a45f144ec5ab49c"> 86</a></span>&#160;<span class="preprocessor">#define CCL_SEQCTRL_SEQSEL_JK_Val _U_(0x2) </span></div>
<div class="line"><a name="l00087"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a3583624dff7abfed78f90739f9483bf5"> 87</a></span>&#160;<span class="preprocessor">#define CCL_SEQCTRL_SEQSEL_LATCH_Val _U_(0x3) </span></div>
<div class="line"><a name="l00088"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a190ccdf8b60ec2ab4a231060bcafa23d"> 88</a></span>&#160;<span class="preprocessor">#define CCL_SEQCTRL_SEQSEL_RS_Val _U_(0x4) </span></div>
<div class="line"><a name="l00089"></a><span class="lineno"> 89</span>&#160;<span class="preprocessor">#define CCL_SEQCTRL_SEQSEL_DISABLE (CCL_SEQCTRL_SEQSEL_DISABLE_Val &lt;&lt; CCL_SEQCTRL_SEQSEL_Pos)</span></div>
<div class="line"><a name="l00090"></a><span class="lineno"> 90</span>&#160;<span class="preprocessor">#define CCL_SEQCTRL_SEQSEL_DFF (CCL_SEQCTRL_SEQSEL_DFF_Val &lt;&lt; CCL_SEQCTRL_SEQSEL_Pos)</span></div>
<div class="line"><a name="l00091"></a><span class="lineno"> 91</span>&#160;<span class="preprocessor">#define CCL_SEQCTRL_SEQSEL_JK (CCL_SEQCTRL_SEQSEL_JK_Val &lt;&lt; CCL_SEQCTRL_SEQSEL_Pos)</span></div>
<div class="line"><a name="l00092"></a><span class="lineno"> 92</span>&#160;<span class="preprocessor">#define CCL_SEQCTRL_SEQSEL_LATCH (CCL_SEQCTRL_SEQSEL_LATCH_Val &lt;&lt; CCL_SEQCTRL_SEQSEL_Pos)</span></div>
<div class="line"><a name="l00093"></a><span class="lineno"> 93</span>&#160;<span class="preprocessor">#define CCL_SEQCTRL_SEQSEL_RS (CCL_SEQCTRL_SEQSEL_RS_Val &lt;&lt; CCL_SEQCTRL_SEQSEL_Pos)</span></div>
<div class="line"><a name="l00094"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a476f638353d236d389f6dd16c8078961"> 94</a></span>&#160;<span class="preprocessor">#define CCL_SEQCTRL_MASK _U_(0x0F) </span></div>
<div class="line"><a name="l00096"></a><span class="lineno"> 96</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- CCL_LUTCTRL : (CCL Offset: 0x8) (R/W 32) LUT Control x -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00097"></a><span class="lineno"> 97</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00098"></a><span class="lineno"><a class="line" href="unionCCL__LUTCTRL__Type.html"> 98</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00099"></a><span class="lineno"> 99</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00100"></a><span class="lineno"><a class="line" href="unionCCL__LUTCTRL__Type.html#a811ca78441cb64f233c8d4f8e940f3c2"> 100</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00101"></a><span class="lineno"><a class="line" href="unionCCL__LUTCTRL__Type.html#ade2e54206c774239483fb7e0f7c664e1"> 101</a></span>&#160; uint32_t <a class="code" href="unionCCL__LUTCTRL__Type.html#ade2e54206c774239483fb7e0f7c664e1">ENABLE</a>:1; </div>
<div class="line"><a name="l00102"></a><span class="lineno"><a class="line" href="unionCCL__LUTCTRL__Type.html#ad0e4eeca8782cc0ff109e399452702d5"> 102</a></span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00103"></a><span class="lineno"><a class="line" href="unionCCL__LUTCTRL__Type.html#a238de2df04aaf2a103000ab658fc5067"> 103</a></span>&#160; uint32_t <a class="code" href="unionCCL__LUTCTRL__Type.html#a238de2df04aaf2a103000ab658fc5067">FILTSEL</a>:2; </div>
<div class="line"><a name="l00104"></a><span class="lineno"><a class="line" href="unionCCL__LUTCTRL__Type.html#a45dc9371ea29c8292e7fc3ed03bac3df"> 104</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00105"></a><span class="lineno"><a class="line" href="unionCCL__LUTCTRL__Type.html#a5753fae0497a5182dfd3226dc14d9f63"> 105</a></span>&#160; uint32_t <a class="code" href="unionCCL__LUTCTRL__Type.html#a5753fae0497a5182dfd3226dc14d9f63">EDGESEL</a>:1; </div>
<div class="line"><a name="l00106"></a><span class="lineno"><a class="line" href="unionCCL__LUTCTRL__Type.html#ae5b82cf07b6027a784e7f9326d947460"> 106</a></span>&#160; uint32_t <a class="code" href="unionCCL__LUTCTRL__Type.html#ae5b82cf07b6027a784e7f9326d947460">INSEL0</a>:4; </div>
<div class="line"><a name="l00107"></a><span class="lineno"><a class="line" href="unionCCL__LUTCTRL__Type.html#a18d72246ebcc4a16239d0b2320b0d015"> 107</a></span>&#160; uint32_t <a class="code" href="unionCCL__LUTCTRL__Type.html#a18d72246ebcc4a16239d0b2320b0d015">INSEL1</a>:4; </div>
<div class="line"><a name="l00108"></a><span class="lineno"><a class="line" href="unionCCL__LUTCTRL__Type.html#ad3ec17c8a4dbe7a79135341b7c6655c7"> 108</a></span>&#160; uint32_t <a class="code" href="unionCCL__LUTCTRL__Type.html#ad3ec17c8a4dbe7a79135341b7c6655c7">INSEL2</a>:4; </div>
<div class="line"><a name="l00109"></a><span class="lineno"><a class="line" href="unionCCL__LUTCTRL__Type.html#a01eb015c890d0469124f0c9058beb826"> 109</a></span>&#160; uint32_t <a class="code" href="unionCCL__LUTCTRL__Type.html#a01eb015c890d0469124f0c9058beb826">INVEI</a>:1; </div>
<div class="line"><a name="l00110"></a><span class="lineno"><a class="line" href="unionCCL__LUTCTRL__Type.html#aff9ad7a92387c4d9cde5cd34afa0e01b"> 110</a></span>&#160; uint32_t <a class="code" href="unionCCL__LUTCTRL__Type.html#aff9ad7a92387c4d9cde5cd34afa0e01b">LUTEI</a>:1; </div>
<div class="line"><a name="l00111"></a><span class="lineno"><a class="line" href="unionCCL__LUTCTRL__Type.html#a4e5da56f493aeb3de2f1ae3e518565ec"> 111</a></span>&#160; uint32_t <a class="code" href="unionCCL__LUTCTRL__Type.html#a4e5da56f493aeb3de2f1ae3e518565ec">LUTEO</a>:1; </div>
<div class="line"><a name="l00112"></a><span class="lineno"><a class="line" href="unionCCL__LUTCTRL__Type.html#a2eece3281425e1afa66bac9f1d1cb0db"> 112</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00113"></a><span class="lineno"><a class="line" href="unionCCL__LUTCTRL__Type.html#a87a806826d88e36d4c98f9709a3f4d90"> 113</a></span>&#160; uint32_t <a class="code" href="unionCCL__LUTCTRL__Type.html#a87a806826d88e36d4c98f9709a3f4d90">TRUTH</a>:8; </div>
<div class="line"><a name="l00114"></a><span class="lineno"><a class="line" href="unionCCL__LUTCTRL__Type.html#a5ab7f4c69f37b05f82acb8f0b6d7112f"> 114</a></span>&#160; } bit; </div>
<div class="line"><a name="l00115"></a><span class="lineno"><a class="line" href="unionCCL__LUTCTRL__Type.html#ad63dea163684db6a171444da51f80b24"> 115</a></span>&#160; uint32_t <a class="code" href="unionCCL__LUTCTRL__Type.html#ad63dea163684db6a171444da51f80b24">reg</a>; </div>
<div class="line"><a name="l00116"></a><span class="lineno"> 116</span>&#160;} <a class="code" href="unionCCL__LUTCTRL__Type.html">CCL_LUTCTRL_Type</a>;</div>
<div class="line"><a name="l00117"></a><span class="lineno"> 117</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00118"></a><span class="lineno"> 118</span>&#160; </div>
<div class="line"><a name="l00119"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a8c1fe1bc471d0b506a046d512a541910"> 119</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_OFFSET 0x8 </span></div>
<div class="line"><a name="l00120"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a12c422ed3e6af4d13870470ae9b20f4d"> 120</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00122"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a1672d51c49fc156354197e7f97e73983"> 122</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_ENABLE_Pos 1 </span></div>
<div class="line"><a name="l00123"></a><span class="lineno"> 123</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_ENABLE (_U_(0x1) &lt;&lt; CCL_LUTCTRL_ENABLE_Pos)</span></div>
<div class="line"><a name="l00124"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a671613b8892335b9651f695fb293057a"> 124</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_FILTSEL_Pos 4 </span></div>
<div class="line"><a name="l00125"></a><span class="lineno"> 125</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_FILTSEL_Msk (_U_(0x3) &lt;&lt; CCL_LUTCTRL_FILTSEL_Pos)</span></div>
<div class="line"><a name="l00126"></a><span class="lineno"> 126</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_FILTSEL(value) (CCL_LUTCTRL_FILTSEL_Msk &amp; ((value) &lt;&lt; CCL_LUTCTRL_FILTSEL_Pos))</span></div>
<div class="line"><a name="l00127"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a269930d96ab20ca97bf3e8dc99362a12"> 127</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_FILTSEL_DISABLE_Val _U_(0x0) </span></div>
<div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#ab1c18dbb5d94f7a480c8dd9e083b471d"> 128</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_FILTSEL_SYNCH_Val _U_(0x1) </span></div>
<div class="line"><a name="l00129"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a746ff0c425c61df00bf0ff42c89e2300"> 129</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_FILTSEL_FILTER_Val _U_(0x2) </span></div>
<div class="line"><a name="l00130"></a><span class="lineno"> 130</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_FILTSEL_DISABLE (CCL_LUTCTRL_FILTSEL_DISABLE_Val &lt;&lt; CCL_LUTCTRL_FILTSEL_Pos)</span></div>
<div class="line"><a name="l00131"></a><span class="lineno"> 131</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_FILTSEL_SYNCH (CCL_LUTCTRL_FILTSEL_SYNCH_Val &lt;&lt; CCL_LUTCTRL_FILTSEL_Pos)</span></div>
<div class="line"><a name="l00132"></a><span class="lineno"> 132</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_FILTSEL_FILTER (CCL_LUTCTRL_FILTSEL_FILTER_Val &lt;&lt; CCL_LUTCTRL_FILTSEL_Pos)</span></div>
<div class="line"><a name="l00133"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#ab20c6c3c219abf3c1f952d47e94c7cae"> 133</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_EDGESEL_Pos 7 </span></div>
<div class="line"><a name="l00134"></a><span class="lineno"> 134</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_EDGESEL (_U_(0x1) &lt;&lt; CCL_LUTCTRL_EDGESEL_Pos)</span></div>
<div class="line"><a name="l00135"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#ae20b08aa5e8fcd9eb3a1a118441de53d"> 135</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL0_Pos 8 </span></div>
<div class="line"><a name="l00136"></a><span class="lineno"> 136</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL0_Msk (_U_(0xF) &lt;&lt; CCL_LUTCTRL_INSEL0_Pos)</span></div>
<div class="line"><a name="l00137"></a><span class="lineno"> 137</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL0(value) (CCL_LUTCTRL_INSEL0_Msk &amp; ((value) &lt;&lt; CCL_LUTCTRL_INSEL0_Pos))</span></div>
<div class="line"><a name="l00138"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a2fc3f172fd108a2ac9808430a8ac1637"> 138</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL0_MASK_Val _U_(0x0) </span></div>
<div class="line"><a name="l00139"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#aedcfd4d1e7166bb561c19c59b9efb08f"> 139</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL0_FEEDBACK_Val _U_(0x1) </span></div>
<div class="line"><a name="l00140"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a96dd3c1ff426f4ef5a004d6259fff801"> 140</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL0_LINK_Val _U_(0x2) </span></div>
<div class="line"><a name="l00141"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a16ec41d6b721dada46dd341a50c2559c"> 141</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL0_EVENT_Val _U_(0x3) </span></div>
<div class="line"><a name="l00142"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#aec398330a7a9b4476e0223c902ddd0fa"> 142</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL0_IO_Val _U_(0x4) </span></div>
<div class="line"><a name="l00143"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a6b0b5f0f5cc7959cdb36fada583b7c83"> 143</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL0_AC_Val _U_(0x5) </span></div>
<div class="line"><a name="l00144"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a8cb43425ea1200a431b3086d58e218da"> 144</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL0_TC_Val _U_(0x6) </span></div>
<div class="line"><a name="l00145"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a98b064aa8877e7ce77ecb683353fd5d8"> 145</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL0_ALTTC_Val _U_(0x7) </span></div>
<div class="line"><a name="l00146"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a39755754ab8b792d03a3cf330e481fa1"> 146</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL0_TCC_Val _U_(0x8) </span></div>
<div class="line"><a name="l00147"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#ad84a8d935132f431e16dbf5b25e6dac9"> 147</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL0_SERCOM_Val _U_(0x9) </span></div>
<div class="line"><a name="l00148"></a><span class="lineno"> 148</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL0_MASK (CCL_LUTCTRL_INSEL0_MASK_Val &lt;&lt; CCL_LUTCTRL_INSEL0_Pos)</span></div>
<div class="line"><a name="l00149"></a><span class="lineno"> 149</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL0_FEEDBACK (CCL_LUTCTRL_INSEL0_FEEDBACK_Val &lt;&lt; CCL_LUTCTRL_INSEL0_Pos)</span></div>
<div class="line"><a name="l00150"></a><span class="lineno"> 150</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL0_LINK (CCL_LUTCTRL_INSEL0_LINK_Val &lt;&lt; CCL_LUTCTRL_INSEL0_Pos)</span></div>
<div class="line"><a name="l00151"></a><span class="lineno"> 151</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL0_EVENT (CCL_LUTCTRL_INSEL0_EVENT_Val &lt;&lt; CCL_LUTCTRL_INSEL0_Pos)</span></div>
<div class="line"><a name="l00152"></a><span class="lineno"> 152</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL0_IO (CCL_LUTCTRL_INSEL0_IO_Val &lt;&lt; CCL_LUTCTRL_INSEL0_Pos)</span></div>
<div class="line"><a name="l00153"></a><span class="lineno"> 153</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL0_AC (CCL_LUTCTRL_INSEL0_AC_Val &lt;&lt; CCL_LUTCTRL_INSEL0_Pos)</span></div>
<div class="line"><a name="l00154"></a><span class="lineno"> 154</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL0_TC (CCL_LUTCTRL_INSEL0_TC_Val &lt;&lt; CCL_LUTCTRL_INSEL0_Pos)</span></div>
<div class="line"><a name="l00155"></a><span class="lineno"> 155</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL0_ALTTC (CCL_LUTCTRL_INSEL0_ALTTC_Val &lt;&lt; CCL_LUTCTRL_INSEL0_Pos)</span></div>
<div class="line"><a name="l00156"></a><span class="lineno"> 156</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL0_TCC (CCL_LUTCTRL_INSEL0_TCC_Val &lt;&lt; CCL_LUTCTRL_INSEL0_Pos)</span></div>
<div class="line"><a name="l00157"></a><span class="lineno"> 157</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL0_SERCOM (CCL_LUTCTRL_INSEL0_SERCOM_Val &lt;&lt; CCL_LUTCTRL_INSEL0_Pos)</span></div>
<div class="line"><a name="l00158"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#adbf5f5876e5d60c375384b2c3eea6c88"> 158</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL1_Pos 12 </span></div>
<div class="line"><a name="l00159"></a><span class="lineno"> 159</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL1_Msk (_U_(0xF) &lt;&lt; CCL_LUTCTRL_INSEL1_Pos)</span></div>
<div class="line"><a name="l00160"></a><span class="lineno"> 160</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL1(value) (CCL_LUTCTRL_INSEL1_Msk &amp; ((value) &lt;&lt; CCL_LUTCTRL_INSEL1_Pos))</span></div>
<div class="line"><a name="l00161"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a2a4670a6ed591d977fa24b6fefcf8730"> 161</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL1_MASK_Val _U_(0x0) </span></div>
<div class="line"><a name="l00162"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#aba2a228fe19fa16a9a42dbbee48e435f"> 162</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL1_FEEDBACK_Val _U_(0x1) </span></div>
<div class="line"><a name="l00163"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a51c16dbb9dab1ff61c527334226e6a81"> 163</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL1_LINK_Val _U_(0x2) </span></div>
<div class="line"><a name="l00164"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#ab7d11ccd911fea55515d0541c2c74d53"> 164</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL1_EVENT_Val _U_(0x3) </span></div>
<div class="line"><a name="l00165"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a4a8972fb5437e4b299a2aac284955c68"> 165</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL1_IO_Val _U_(0x4) </span></div>
<div class="line"><a name="l00166"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a0fd1233ad684da393cb31f88e77fb425"> 166</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL1_AC_Val _U_(0x5) </span></div>
<div class="line"><a name="l00167"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#ad1731fe45d9d8b911af88cf4e212e9e6"> 167</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL1_TC_Val _U_(0x6) </span></div>
<div class="line"><a name="l00168"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a1a246429ad9ba740e414d55523cbd564"> 168</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL1_ALTTC_Val _U_(0x7) </span></div>
<div class="line"><a name="l00169"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a8f9dddb882a645f866ed2cce5d42b232"> 169</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL1_TCC_Val _U_(0x8) </span></div>
<div class="line"><a name="l00170"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a04fb3ca32c0cf450304428a89a26c917"> 170</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL1_SERCOM_Val _U_(0x9) </span></div>
<div class="line"><a name="l00171"></a><span class="lineno"> 171</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL1_MASK (CCL_LUTCTRL_INSEL1_MASK_Val &lt;&lt; CCL_LUTCTRL_INSEL1_Pos)</span></div>
<div class="line"><a name="l00172"></a><span class="lineno"> 172</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL1_FEEDBACK (CCL_LUTCTRL_INSEL1_FEEDBACK_Val &lt;&lt; CCL_LUTCTRL_INSEL1_Pos)</span></div>
<div class="line"><a name="l00173"></a><span class="lineno"> 173</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL1_LINK (CCL_LUTCTRL_INSEL1_LINK_Val &lt;&lt; CCL_LUTCTRL_INSEL1_Pos)</span></div>
<div class="line"><a name="l00174"></a><span class="lineno"> 174</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL1_EVENT (CCL_LUTCTRL_INSEL1_EVENT_Val &lt;&lt; CCL_LUTCTRL_INSEL1_Pos)</span></div>
<div class="line"><a name="l00175"></a><span class="lineno"> 175</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL1_IO (CCL_LUTCTRL_INSEL1_IO_Val &lt;&lt; CCL_LUTCTRL_INSEL1_Pos)</span></div>
<div class="line"><a name="l00176"></a><span class="lineno"> 176</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL1_AC (CCL_LUTCTRL_INSEL1_AC_Val &lt;&lt; CCL_LUTCTRL_INSEL1_Pos)</span></div>
<div class="line"><a name="l00177"></a><span class="lineno"> 177</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL1_TC (CCL_LUTCTRL_INSEL1_TC_Val &lt;&lt; CCL_LUTCTRL_INSEL1_Pos)</span></div>
<div class="line"><a name="l00178"></a><span class="lineno"> 178</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL1_ALTTC (CCL_LUTCTRL_INSEL1_ALTTC_Val &lt;&lt; CCL_LUTCTRL_INSEL1_Pos)</span></div>
<div class="line"><a name="l00179"></a><span class="lineno"> 179</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL1_TCC (CCL_LUTCTRL_INSEL1_TCC_Val &lt;&lt; CCL_LUTCTRL_INSEL1_Pos)</span></div>
<div class="line"><a name="l00180"></a><span class="lineno"> 180</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL1_SERCOM (CCL_LUTCTRL_INSEL1_SERCOM_Val &lt;&lt; CCL_LUTCTRL_INSEL1_Pos)</span></div>
<div class="line"><a name="l00181"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a2b985c6f56f3865f10ad2f81f8447410"> 181</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL2_Pos 16 </span></div>
<div class="line"><a name="l00182"></a><span class="lineno"> 182</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL2_Msk (_U_(0xF) &lt;&lt; CCL_LUTCTRL_INSEL2_Pos)</span></div>
<div class="line"><a name="l00183"></a><span class="lineno"> 183</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL2(value) (CCL_LUTCTRL_INSEL2_Msk &amp; ((value) &lt;&lt; CCL_LUTCTRL_INSEL2_Pos))</span></div>
<div class="line"><a name="l00184"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#ab03391eae297d7157a6be47a54de1527"> 184</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL2_MASK_Val _U_(0x0) </span></div>
<div class="line"><a name="l00185"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a523c90ff425f03ee7fee92f778239bf2"> 185</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL2_FEEDBACK_Val _U_(0x1) </span></div>
<div class="line"><a name="l00186"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#aa0aa3dd4ddea419deaaf585b3b8de5d4"> 186</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL2_LINK_Val _U_(0x2) </span></div>
<div class="line"><a name="l00187"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a3ef34865a9ae60850425eebbb9a2be17"> 187</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL2_EVENT_Val _U_(0x3) </span></div>
<div class="line"><a name="l00188"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#ac9a84ee3f427bc1b552fb34efc09027c"> 188</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL2_IO_Val _U_(0x4) </span></div>
<div class="line"><a name="l00189"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#aab04aa057d10c97a35cbb4857eb9d033"> 189</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL2_AC_Val _U_(0x5) </span></div>
<div class="line"><a name="l00190"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#ac37c0102c064bfca53d81b74513e6b4a"> 190</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL2_TC_Val _U_(0x6) </span></div>
<div class="line"><a name="l00191"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a70f30a018e50c5049218a40a42ea2d92"> 191</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL2_ALTTC_Val _U_(0x7) </span></div>
<div class="line"><a name="l00192"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a40685c387b713089ee626d6c22a959cf"> 192</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL2_TCC_Val _U_(0x8) </span></div>
<div class="line"><a name="l00193"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a164a16baa0262eb33fd134e396c5ffd0"> 193</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL2_SERCOM_Val _U_(0x9) </span></div>
<div class="line"><a name="l00194"></a><span class="lineno"> 194</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL2_MASK (CCL_LUTCTRL_INSEL2_MASK_Val &lt;&lt; CCL_LUTCTRL_INSEL2_Pos)</span></div>
<div class="line"><a name="l00195"></a><span class="lineno"> 195</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL2_FEEDBACK (CCL_LUTCTRL_INSEL2_FEEDBACK_Val &lt;&lt; CCL_LUTCTRL_INSEL2_Pos)</span></div>
<div class="line"><a name="l00196"></a><span class="lineno"> 196</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL2_LINK (CCL_LUTCTRL_INSEL2_LINK_Val &lt;&lt; CCL_LUTCTRL_INSEL2_Pos)</span></div>
<div class="line"><a name="l00197"></a><span class="lineno"> 197</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL2_EVENT (CCL_LUTCTRL_INSEL2_EVENT_Val &lt;&lt; CCL_LUTCTRL_INSEL2_Pos)</span></div>
<div class="line"><a name="l00198"></a><span class="lineno"> 198</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL2_IO (CCL_LUTCTRL_INSEL2_IO_Val &lt;&lt; CCL_LUTCTRL_INSEL2_Pos)</span></div>
<div class="line"><a name="l00199"></a><span class="lineno"> 199</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL2_AC (CCL_LUTCTRL_INSEL2_AC_Val &lt;&lt; CCL_LUTCTRL_INSEL2_Pos)</span></div>
<div class="line"><a name="l00200"></a><span class="lineno"> 200</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL2_TC (CCL_LUTCTRL_INSEL2_TC_Val &lt;&lt; CCL_LUTCTRL_INSEL2_Pos)</span></div>
<div class="line"><a name="l00201"></a><span class="lineno"> 201</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL2_ALTTC (CCL_LUTCTRL_INSEL2_ALTTC_Val &lt;&lt; CCL_LUTCTRL_INSEL2_Pos)</span></div>
<div class="line"><a name="l00202"></a><span class="lineno"> 202</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL2_TCC (CCL_LUTCTRL_INSEL2_TCC_Val &lt;&lt; CCL_LUTCTRL_INSEL2_Pos)</span></div>
<div class="line"><a name="l00203"></a><span class="lineno"> 203</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INSEL2_SERCOM (CCL_LUTCTRL_INSEL2_SERCOM_Val &lt;&lt; CCL_LUTCTRL_INSEL2_Pos)</span></div>
<div class="line"><a name="l00204"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a72778567a0b9bddef619975d2ae08f6f"> 204</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INVEI_Pos 20 </span></div>
<div class="line"><a name="l00205"></a><span class="lineno"> 205</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_INVEI (_U_(0x1) &lt;&lt; CCL_LUTCTRL_INVEI_Pos)</span></div>
<div class="line"><a name="l00206"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a2f90398b99ab7e79540c1a4d5362f3ab"> 206</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_LUTEI_Pos 21 </span></div>
<div class="line"><a name="l00207"></a><span class="lineno"> 207</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_LUTEI (_U_(0x1) &lt;&lt; CCL_LUTCTRL_LUTEI_Pos)</span></div>
<div class="line"><a name="l00208"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#adb614536601b4d78fde9d580188bc224"> 208</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_LUTEO_Pos 22 </span></div>
<div class="line"><a name="l00209"></a><span class="lineno"> 209</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_LUTEO (_U_(0x1) &lt;&lt; CCL_LUTCTRL_LUTEO_Pos)</span></div>
<div class="line"><a name="l00210"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#ab080b12c5cb04cea57afcb7c38b7e7ba"> 210</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_TRUTH_Pos 24 </span></div>
<div class="line"><a name="l00211"></a><span class="lineno"> 211</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_TRUTH_Msk (_U_(0xFF) &lt;&lt; CCL_LUTCTRL_TRUTH_Pos)</span></div>
<div class="line"><a name="l00212"></a><span class="lineno"> 212</span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_TRUTH(value) (CCL_LUTCTRL_TRUTH_Msk &amp; ((value) &lt;&lt; CCL_LUTCTRL_TRUTH_Pos))</span></div>
<div class="line"><a name="l00213"></a><span class="lineno"><a class="line" href="component_2ccl_8h.html#a529e201f32c390da0ffe4798725473aa"> 213</a></span>&#160;<span class="preprocessor">#define CCL_LUTCTRL_MASK _U_(0xFF7FFFB2) </span></div>
<div class="line"><a name="l00216"></a><span class="lineno"> 216</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00217"></a><span class="lineno"><a class="line" href="structCcl.html"> 217</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00218"></a><span class="lineno"><a class="line" href="structCcl.html#ae587eae18d53d49737c997b0ad5b1d79"> 218</a></span>&#160; __IO <a class="code" href="unionCCL__CTRL__Type.html">CCL_CTRL_Type</a> <a class="code" href="structCcl.html#ae587eae18d53d49737c997b0ad5b1d79">CTRL</a>; </div>
<div class="line"><a name="l00219"></a><span class="lineno"> 219</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved1[0x3];</div>
<div class="line"><a name="l00220"></a><span class="lineno"><a class="line" href="structCcl.html#ae4dbcd44d8c10c8ba075b181eee221f3"> 220</a></span>&#160; __IO <a class="code" href="unionCCL__SEQCTRL__Type.html">CCL_SEQCTRL_Type</a> SEQCTRL[2]; </div>
<div class="line"><a name="l00221"></a><span class="lineno"> 221</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved2[0x2];</div>
<div class="line"><a name="l00222"></a><span class="lineno"><a class="line" href="structCcl.html#a824d62e4b08c0eca3a8a4ead15675f53"> 222</a></span>&#160; __IO <a class="code" href="unionCCL__LUTCTRL__Type.html">CCL_LUTCTRL_Type</a> LUTCTRL[4]; </div>
<div class="line"><a name="l00223"></a><span class="lineno"> 223</span>&#160;} <a class="code" href="structCcl.html">Ccl</a>;</div>
<div class="line"><a name="l00224"></a><span class="lineno"> 224</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00225"></a><span class="lineno"> 225</span>&#160; </div>
<div class="line"><a name="l00228"></a><span class="lineno"> 228</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_CCL_COMPONENT_ */</span><span class="preprocessor"></span></div>
</div><!-- fragment --></div><!-- contents -->
<div class="ttc" id="aunionCCL__CTRL__Type_html_a4c9ba3c1197474b305559ed2dfa600d8"><div class="ttname"><a href="unionCCL__CTRL__Type.html#a4c9ba3c1197474b305559ed2dfa600d8">CCL_CTRL_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2ccl_8h_source.html#l00052">ccl.h:52</a></div></div>
<div class="ttc" id="aunionCCL__CTRL__Type_html_a0bd82e8db1dea6be471f27b3f4b40049"><div class="ttname"><a href="unionCCL__CTRL__Type.html#a0bd82e8db1dea6be471f27b3f4b40049">CCL_CTRL_Type::RUNSTDBY</a></div><div class="ttdeci">uint8_t RUNSTDBY</div><div class="ttdef"><b>Definition:</b> <a href="component_2ccl_8h_source.html#l00049">ccl.h:49</a></div></div>
<div class="ttc" id="aunionCCL__LUTCTRL__Type_html_ade2e54206c774239483fb7e0f7c664e1"><div class="ttname"><a href="unionCCL__LUTCTRL__Type.html#ade2e54206c774239483fb7e0f7c664e1">CCL_LUTCTRL_Type::ENABLE</a></div><div class="ttdeci">uint32_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2ccl_8h_source.html#l00101">ccl.h:101</a></div></div>
<div class="ttc" id="aunionCCL__LUTCTRL__Type_html_ae5b82cf07b6027a784e7f9326d947460"><div class="ttname"><a href="unionCCL__LUTCTRL__Type.html#ae5b82cf07b6027a784e7f9326d947460">CCL_LUTCTRL_Type::INSEL0</a></div><div class="ttdeci">uint32_t INSEL0</div><div class="ttdef"><b>Definition:</b> <a href="component_2ccl_8h_source.html#l00106">ccl.h:106</a></div></div>
<div class="ttc" id="aunionCCL__LUTCTRL__Type_html_a5753fae0497a5182dfd3226dc14d9f63"><div class="ttname"><a href="unionCCL__LUTCTRL__Type.html#a5753fae0497a5182dfd3226dc14d9f63">CCL_LUTCTRL_Type::EDGESEL</a></div><div class="ttdeci">uint32_t EDGESEL</div><div class="ttdef"><b>Definition:</b> <a href="component_2ccl_8h_source.html#l00105">ccl.h:105</a></div></div>
<div class="ttc" id="aunionCCL__SEQCTRL__Type_html_aaf39644e4e1a48bb076a30d9decae7b9"><div class="ttname"><a href="unionCCL__SEQCTRL__Type.html#aaf39644e4e1a48bb076a30d9decae7b9">CCL_SEQCTRL_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2ccl_8h_source.html#l00074">ccl.h:74</a></div></div>
<div class="ttc" id="aunionCCL__CTRL__Type_html_a99731534845b5032df754d326cf55507"><div class="ttname"><a href="unionCCL__CTRL__Type.html#a99731534845b5032df754d326cf55507">CCL_CTRL_Type::SWRST</a></div><div class="ttdeci">uint8_t SWRST</div><div class="ttdef"><b>Definition:</b> <a href="component_2ccl_8h_source.html#l00046">ccl.h:46</a></div></div>
<div class="ttc" id="aunionCCL__CTRL__Type_html"><div class="ttname"><a href="unionCCL__CTRL__Type.html">CCL_CTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2ccl_8h_source.html#l00044">ccl.h:44</a></div></div>
<div class="ttc" id="aunionCCL__LUTCTRL__Type_html_a87a806826d88e36d4c98f9709a3f4d90"><div class="ttname"><a href="unionCCL__LUTCTRL__Type.html#a87a806826d88e36d4c98f9709a3f4d90">CCL_LUTCTRL_Type::TRUTH</a></div><div class="ttdeci">uint32_t TRUTH</div><div class="ttdef"><b>Definition:</b> <a href="component_2ccl_8h_source.html#l00113">ccl.h:113</a></div></div>
<div class="ttc" id="aunionCCL__LUTCTRL__Type_html_aff9ad7a92387c4d9cde5cd34afa0e01b"><div class="ttname"><a href="unionCCL__LUTCTRL__Type.html#aff9ad7a92387c4d9cde5cd34afa0e01b">CCL_LUTCTRL_Type::LUTEI</a></div><div class="ttdeci">uint32_t LUTEI</div><div class="ttdef"><b>Definition:</b> <a href="component_2ccl_8h_source.html#l00110">ccl.h:110</a></div></div>
<div class="ttc" id="aunionCCL__SEQCTRL__Type_html"><div class="ttname"><a href="unionCCL__SEQCTRL__Type.html">CCL_SEQCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2ccl_8h_source.html#l00069">ccl.h:69</a></div></div>
<div class="ttc" id="astructCcl_html_ae587eae18d53d49737c997b0ad5b1d79"><div class="ttname"><a href="structCcl.html#ae587eae18d53d49737c997b0ad5b1d79">Ccl::CTRL</a></div><div class="ttdeci">__IO CCL_CTRL_Type CTRL</div><div class="ttdoc">Offset: 0x0 (R/W 8) Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2ccl_8h_source.html#l00218">ccl.h:218</a></div></div>
<div class="ttc" id="aunionCCL__LUTCTRL__Type_html_ad63dea163684db6a171444da51f80b24"><div class="ttname"><a href="unionCCL__LUTCTRL__Type.html#ad63dea163684db6a171444da51f80b24">CCL_LUTCTRL_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2ccl_8h_source.html#l00115">ccl.h:115</a></div></div>
<div class="ttc" id="aunionCCL__LUTCTRL__Type_html"><div class="ttname"><a href="unionCCL__LUTCTRL__Type.html">CCL_LUTCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2ccl_8h_source.html#l00098">ccl.h:98</a></div></div>
<div class="ttc" id="asame54n19a_8h_html_a0d957f1433aaf5d70e4dc2b68288442d"><div class="ttname"><a href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a></div><div class="ttdeci">volatile const uint8_t RoReg8</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00053">same54n19a.h:53</a></div></div>
<div class="ttc" id="aunionCCL__SEQCTRL__Type_html_aee4adb7d1e464f0195c1be29d93753fa"><div class="ttname"><a href="unionCCL__SEQCTRL__Type.html#aee4adb7d1e464f0195c1be29d93753fa">CCL_SEQCTRL_Type::SEQSEL</a></div><div class="ttdeci">uint8_t SEQSEL</div><div class="ttdef"><b>Definition:</b> <a href="component_2ccl_8h_source.html#l00071">ccl.h:71</a></div></div>
<div class="ttc" id="astructCcl_html"><div class="ttname"><a href="structCcl.html">Ccl</a></div><div class="ttdoc">CCL hardware registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2ccl_8h_source.html#l00217">ccl.h:217</a></div></div>
<div class="ttc" id="aunionCCL__CTRL__Type_html_aeee09818c8cceabdea06d5654894406a"><div class="ttname"><a href="unionCCL__CTRL__Type.html#aeee09818c8cceabdea06d5654894406a">CCL_CTRL_Type::ENABLE</a></div><div class="ttdeci">uint8_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2ccl_8h_source.html#l00047">ccl.h:47</a></div></div>
<div class="ttc" id="aunionCCL__LUTCTRL__Type_html_a01eb015c890d0469124f0c9058beb826"><div class="ttname"><a href="unionCCL__LUTCTRL__Type.html#a01eb015c890d0469124f0c9058beb826">CCL_LUTCTRL_Type::INVEI</a></div><div class="ttdeci">uint32_t INVEI</div><div class="ttdef"><b>Definition:</b> <a href="component_2ccl_8h_source.html#l00109">ccl.h:109</a></div></div>
<div class="ttc" id="aunionCCL__LUTCTRL__Type_html_a4e5da56f493aeb3de2f1ae3e518565ec"><div class="ttname"><a href="unionCCL__LUTCTRL__Type.html#a4e5da56f493aeb3de2f1ae3e518565ec">CCL_LUTCTRL_Type::LUTEO</a></div><div class="ttdeci">uint32_t LUTEO</div><div class="ttdef"><b>Definition:</b> <a href="component_2ccl_8h_source.html#l00111">ccl.h:111</a></div></div>
<div class="ttc" id="aunionCCL__LUTCTRL__Type_html_a18d72246ebcc4a16239d0b2320b0d015"><div class="ttname"><a href="unionCCL__LUTCTRL__Type.html#a18d72246ebcc4a16239d0b2320b0d015">CCL_LUTCTRL_Type::INSEL1</a></div><div class="ttdeci">uint32_t INSEL1</div><div class="ttdef"><b>Definition:</b> <a href="component_2ccl_8h_source.html#l00107">ccl.h:107</a></div></div>
<div class="ttc" id="aunionCCL__LUTCTRL__Type_html_ad3ec17c8a4dbe7a79135341b7c6655c7"><div class="ttname"><a href="unionCCL__LUTCTRL__Type.html#ad3ec17c8a4dbe7a79135341b7c6655c7">CCL_LUTCTRL_Type::INSEL2</a></div><div class="ttdeci">uint32_t INSEL2</div><div class="ttdef"><b>Definition:</b> <a href="component_2ccl_8h_source.html#l00108">ccl.h:108</a></div></div>
<div class="ttc" id="aunionCCL__LUTCTRL__Type_html_a238de2df04aaf2a103000ab658fc5067"><div class="ttname"><a href="unionCCL__LUTCTRL__Type.html#a238de2df04aaf2a103000ab658fc5067">CCL_LUTCTRL_Type::FILTSEL</a></div><div class="ttdeci">uint32_t FILTSEL</div><div class="ttdef"><b>Definition:</b> <a href="component_2ccl_8h_source.html#l00103">ccl.h:103</a></div></div>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_U2015</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>REV_CMCC</b>&#160;&#160;&#160;0x600</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a749d626c3b036b9683d89154e14877ff">CMCC_TYPE_OFFSET</a>&#160;&#160;&#160;0x00</td></tr>
<tr class="memdesc:a749d626c3b036b9683d89154e14877ff"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE offset) Cache Type Register <br /></td></tr>
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<tr class="memitem:a21759c0d826f90da8a582fad475ce140"><td class="memItemLeft" align="right" valign="top"><a id="a21759c0d826f90da8a582fad475ce140"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a21759c0d826f90da8a582fad475ce140">CMCC_TYPE_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x000012D2)</td></tr>
<tr class="memdesc:a21759c0d826f90da8a582fad475ce140"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE reset_value) Cache Type Register <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a6660de3f0a847601e4b7c396a7ef3b1d">CMCC_TYPE_GCLK_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:a6660de3f0a847601e4b7c396a7ef3b1d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE) dynamic Clock Gating supported <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_GCLK</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#a6660de3f0a847601e4b7c396a7ef3b1d">CMCC_TYPE_GCLK_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#af75f143c68e0805c6ed46ab51c6186fe">CMCC_TYPE_RRP_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:af75f143c68e0805c6ed46ab51c6186fe"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE) Round Robin Policy supported <br /></td></tr>
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<tr class="memitem:ac62bae93bc42065ee2e01cee34a7e761"><td class="memItemLeft" align="right" valign="top"><a id="ac62bae93bc42065ee2e01cee34a7e761"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_RRP</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#af75f143c68e0805c6ed46ab51c6186fe">CMCC_TYPE_RRP_Pos</a>)</td></tr>
<tr class="separator:ac62bae93bc42065ee2e01cee34a7e761"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae73acd2e9c604956daef7586d9f5975d"><td class="memItemLeft" align="right" valign="top"><a id="ae73acd2e9c604956daef7586d9f5975d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#ae73acd2e9c604956daef7586d9f5975d">CMCC_TYPE_WAYNUM_Pos</a>&#160;&#160;&#160;5</td></tr>
<tr class="memdesc:ae73acd2e9c604956daef7586d9f5975d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE) Number of Way <br /></td></tr>
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<tr class="memitem:a1e06d2004db5c19b24c424cef0e926d7"><td class="memItemLeft" align="right" valign="top"><a id="a1e06d2004db5c19b24c424cef0e926d7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_WAYNUM_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#ae73acd2e9c604956daef7586d9f5975d">CMCC_TYPE_WAYNUM_Pos</a>)</td></tr>
<tr class="separator:a1e06d2004db5c19b24c424cef0e926d7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5d43188e2060dad01d19962959de2534"><td class="memItemLeft" align="right" valign="top"><a id="a5d43188e2060dad01d19962959de2534"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_WAYNUM</b>(value)&#160;&#160;&#160;(CMCC_TYPE_WAYNUM_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#ae73acd2e9c604956daef7586d9f5975d">CMCC_TYPE_WAYNUM_Pos</a>))</td></tr>
<tr class="separator:a5d43188e2060dad01d19962959de2534"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1fe072aa2cb47c61f5cc6c49c6f390ba"><td class="memItemLeft" align="right" valign="top"><a id="a1fe072aa2cb47c61f5cc6c49c6f390ba"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a1fe072aa2cb47c61f5cc6c49c6f390ba">CMCC_TYPE_WAYNUM_DMAPPED_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a1fe072aa2cb47c61f5cc6c49c6f390ba"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE) Direct Mapped Cache <br /></td></tr>
<tr class="separator:a1fe072aa2cb47c61f5cc6c49c6f390ba"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abcb8e14e6f7b5b6a53e461347becd62a"><td class="memItemLeft" align="right" valign="top"><a id="abcb8e14e6f7b5b6a53e461347becd62a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#abcb8e14e6f7b5b6a53e461347becd62a">CMCC_TYPE_WAYNUM_ARCH2WAY_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:abcb8e14e6f7b5b6a53e461347becd62a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE) 2-WAY set associative <br /></td></tr>
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<tr class="memitem:a3853fdb794dc86b905bd249af9cb238c"><td class="memItemLeft" align="right" valign="top"><a id="a3853fdb794dc86b905bd249af9cb238c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a3853fdb794dc86b905bd249af9cb238c">CMCC_TYPE_WAYNUM_ARCH4WAY_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a3853fdb794dc86b905bd249af9cb238c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE) 4-WAY set associative <br /></td></tr>
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<tr class="memitem:a69e2d7f53ff35d8b933f7bee27cb6e85"><td class="memItemLeft" align="right" valign="top"><a id="a69e2d7f53ff35d8b933f7bee27cb6e85"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_WAYNUM_DMAPPED</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#a1fe072aa2cb47c61f5cc6c49c6f390ba">CMCC_TYPE_WAYNUM_DMAPPED_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#ae73acd2e9c604956daef7586d9f5975d">CMCC_TYPE_WAYNUM_Pos</a>)</td></tr>
<tr class="separator:a69e2d7f53ff35d8b933f7bee27cb6e85"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3923ebe62f34881cd4549e437980f5d5"><td class="memItemLeft" align="right" valign="top"><a id="a3923ebe62f34881cd4549e437980f5d5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_WAYNUM_ARCH2WAY</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#abcb8e14e6f7b5b6a53e461347becd62a">CMCC_TYPE_WAYNUM_ARCH2WAY_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#ae73acd2e9c604956daef7586d9f5975d">CMCC_TYPE_WAYNUM_Pos</a>)</td></tr>
<tr class="separator:a3923ebe62f34881cd4549e437980f5d5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a73e0cfc351d7b918f5c0535940bdfa87"><td class="memItemLeft" align="right" valign="top"><a id="a73e0cfc351d7b918f5c0535940bdfa87"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_WAYNUM_ARCH4WAY</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#a3853fdb794dc86b905bd249af9cb238c">CMCC_TYPE_WAYNUM_ARCH4WAY_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#ae73acd2e9c604956daef7586d9f5975d">CMCC_TYPE_WAYNUM_Pos</a>)</td></tr>
<tr class="separator:a73e0cfc351d7b918f5c0535940bdfa87"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0eb4d58cc01ab3078deb50e5c97b5a47"><td class="memItemLeft" align="right" valign="top"><a id="a0eb4d58cc01ab3078deb50e5c97b5a47"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a0eb4d58cc01ab3078deb50e5c97b5a47">CMCC_TYPE_LCKDOWN_Pos</a>&#160;&#160;&#160;7</td></tr>
<tr class="memdesc:a0eb4d58cc01ab3078deb50e5c97b5a47"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE) Lock Down supported <br /></td></tr>
<tr class="separator:a0eb4d58cc01ab3078deb50e5c97b5a47"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4a4c8de825127db5875a7781c7302117"><td class="memItemLeft" align="right" valign="top"><a id="a4a4c8de825127db5875a7781c7302117"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_LCKDOWN</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#a0eb4d58cc01ab3078deb50e5c97b5a47">CMCC_TYPE_LCKDOWN_Pos</a>)</td></tr>
<tr class="separator:a4a4c8de825127db5875a7781c7302117"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af4d83c89113c8e83588ed68cb260bd81"><td class="memItemLeft" align="right" valign="top"><a id="af4d83c89113c8e83588ed68cb260bd81"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#af4d83c89113c8e83588ed68cb260bd81">CMCC_TYPE_CSIZE_Pos</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:af4d83c89113c8e83588ed68cb260bd81"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE) Cache Size <br /></td></tr>
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<tr class="memitem:a32dcef7194e658428f9ae5ce0304baeb"><td class="memItemLeft" align="right" valign="top"><a id="a32dcef7194e658428f9ae5ce0304baeb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_CSIZE_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#af4d83c89113c8e83588ed68cb260bd81">CMCC_TYPE_CSIZE_Pos</a>)</td></tr>
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<tr class="memitem:aabac04676e6498c1e94ef3e64bc11069"><td class="memItemLeft" align="right" valign="top"><a id="aabac04676e6498c1e94ef3e64bc11069"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_CSIZE</b>(value)&#160;&#160;&#160;(CMCC_TYPE_CSIZE_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#af4d83c89113c8e83588ed68cb260bd81">CMCC_TYPE_CSIZE_Pos</a>))</td></tr>
<tr class="separator:aabac04676e6498c1e94ef3e64bc11069"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aaf6b42c8dc044637f9c23e066c7ddedd"><td class="memItemLeft" align="right" valign="top"><a id="aaf6b42c8dc044637f9c23e066c7ddedd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#aaf6b42c8dc044637f9c23e066c7ddedd">CMCC_TYPE_CSIZE_CSIZE_1KB_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:aaf6b42c8dc044637f9c23e066c7ddedd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE) Cache Size is 1 KB <br /></td></tr>
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<tr class="memitem:a484cd40e415f09156dc1bc3260f690fd"><td class="memItemLeft" align="right" valign="top"><a id="a484cd40e415f09156dc1bc3260f690fd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a484cd40e415f09156dc1bc3260f690fd">CMCC_TYPE_CSIZE_CSIZE_2KB_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:a484cd40e415f09156dc1bc3260f690fd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE) Cache Size is 2 KB <br /></td></tr>
<tr class="separator:a484cd40e415f09156dc1bc3260f690fd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a21c2451ffb0d36e6d6341efc655768e2"><td class="memItemLeft" align="right" valign="top"><a id="a21c2451ffb0d36e6d6341efc655768e2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a21c2451ffb0d36e6d6341efc655768e2">CMCC_TYPE_CSIZE_CSIZE_4KB_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a21c2451ffb0d36e6d6341efc655768e2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE) Cache Size is 4 KB <br /></td></tr>
<tr class="separator:a21c2451ffb0d36e6d6341efc655768e2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1ea946d60c795244c1d2415c73a24dbd"><td class="memItemLeft" align="right" valign="top"><a id="a1ea946d60c795244c1d2415c73a24dbd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a1ea946d60c795244c1d2415c73a24dbd">CMCC_TYPE_CSIZE_CSIZE_8KB_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
<tr class="memdesc:a1ea946d60c795244c1d2415c73a24dbd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE) Cache Size is 8 KB <br /></td></tr>
<tr class="separator:a1ea946d60c795244c1d2415c73a24dbd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afaeec684cd2672d549be2bd3038e9168"><td class="memItemLeft" align="right" valign="top"><a id="afaeec684cd2672d549be2bd3038e9168"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#afaeec684cd2672d549be2bd3038e9168">CMCC_TYPE_CSIZE_CSIZE_16KB_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
<tr class="memdesc:afaeec684cd2672d549be2bd3038e9168"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE) Cache Size is 16 KB <br /></td></tr>
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<tr class="memitem:af29eddb9363c78a211c21cf9978b9757"><td class="memItemLeft" align="right" valign="top"><a id="af29eddb9363c78a211c21cf9978b9757"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#af29eddb9363c78a211c21cf9978b9757">CMCC_TYPE_CSIZE_CSIZE_32KB_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
<tr class="memdesc:af29eddb9363c78a211c21cf9978b9757"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE) Cache Size is 32 KB <br /></td></tr>
<tr class="separator:af29eddb9363c78a211c21cf9978b9757"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6d5457be887f4985cb2b131d0e6d3c0f"><td class="memItemLeft" align="right" valign="top"><a id="a6d5457be887f4985cb2b131d0e6d3c0f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a6d5457be887f4985cb2b131d0e6d3c0f">CMCC_TYPE_CSIZE_CSIZE_64KB_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x6)</td></tr>
<tr class="memdesc:a6d5457be887f4985cb2b131d0e6d3c0f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE) Cache Size is 64 KB <br /></td></tr>
<tr class="separator:a6d5457be887f4985cb2b131d0e6d3c0f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa27835c9a655d1a9d5ff93b413e3c1ab"><td class="memItemLeft" align="right" valign="top"><a id="aa27835c9a655d1a9d5ff93b413e3c1ab"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_CSIZE_CSIZE_1KB</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#aaf6b42c8dc044637f9c23e066c7ddedd">CMCC_TYPE_CSIZE_CSIZE_1KB_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#af4d83c89113c8e83588ed68cb260bd81">CMCC_TYPE_CSIZE_Pos</a>)</td></tr>
<tr class="separator:aa27835c9a655d1a9d5ff93b413e3c1ab"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0abc6689f1e1f28faf204b6274eeac71"><td class="memItemLeft" align="right" valign="top"><a id="a0abc6689f1e1f28faf204b6274eeac71"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_CSIZE_CSIZE_2KB</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#a484cd40e415f09156dc1bc3260f690fd">CMCC_TYPE_CSIZE_CSIZE_2KB_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#af4d83c89113c8e83588ed68cb260bd81">CMCC_TYPE_CSIZE_Pos</a>)</td></tr>
<tr class="separator:a0abc6689f1e1f28faf204b6274eeac71"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a608c6a0a3a21fe5116b3ad61afaa2166"><td class="memItemLeft" align="right" valign="top"><a id="a608c6a0a3a21fe5116b3ad61afaa2166"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_CSIZE_CSIZE_4KB</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#a21c2451ffb0d36e6d6341efc655768e2">CMCC_TYPE_CSIZE_CSIZE_4KB_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#af4d83c89113c8e83588ed68cb260bd81">CMCC_TYPE_CSIZE_Pos</a>)</td></tr>
<tr class="separator:a608c6a0a3a21fe5116b3ad61afaa2166"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8a577d5db425efdb57b2ea5b542f4d47"><td class="memItemLeft" align="right" valign="top"><a id="a8a577d5db425efdb57b2ea5b542f4d47"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_CSIZE_CSIZE_8KB</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#a1ea946d60c795244c1d2415c73a24dbd">CMCC_TYPE_CSIZE_CSIZE_8KB_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#af4d83c89113c8e83588ed68cb260bd81">CMCC_TYPE_CSIZE_Pos</a>)</td></tr>
<tr class="separator:a8a577d5db425efdb57b2ea5b542f4d47"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a48777f23101089c91b9be5f24449a91d"><td class="memItemLeft" align="right" valign="top"><a id="a48777f23101089c91b9be5f24449a91d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_CSIZE_CSIZE_16KB</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#afaeec684cd2672d549be2bd3038e9168">CMCC_TYPE_CSIZE_CSIZE_16KB_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#af4d83c89113c8e83588ed68cb260bd81">CMCC_TYPE_CSIZE_Pos</a>)</td></tr>
<tr class="separator:a48777f23101089c91b9be5f24449a91d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4f69c36158d8f3dd62d527b5f2ce08bd"><td class="memItemLeft" align="right" valign="top"><a id="a4f69c36158d8f3dd62d527b5f2ce08bd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_CSIZE_CSIZE_32KB</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#af29eddb9363c78a211c21cf9978b9757">CMCC_TYPE_CSIZE_CSIZE_32KB_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#af4d83c89113c8e83588ed68cb260bd81">CMCC_TYPE_CSIZE_Pos</a>)</td></tr>
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<tr class="memitem:acf1a3cb6860c62735f42b159fbd023e5"><td class="memItemLeft" align="right" valign="top"><a id="acf1a3cb6860c62735f42b159fbd023e5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_CSIZE_CSIZE_64KB</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#a6d5457be887f4985cb2b131d0e6d3c0f">CMCC_TYPE_CSIZE_CSIZE_64KB_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#af4d83c89113c8e83588ed68cb260bd81">CMCC_TYPE_CSIZE_Pos</a>)</td></tr>
<tr class="separator:acf1a3cb6860c62735f42b159fbd023e5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a427619bf7775ab0a90efd51a8838d5df"><td class="memItemLeft" align="right" valign="top"><a id="a427619bf7775ab0a90efd51a8838d5df"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a427619bf7775ab0a90efd51a8838d5df">CMCC_TYPE_CLSIZE_Pos</a>&#160;&#160;&#160;11</td></tr>
<tr class="memdesc:a427619bf7775ab0a90efd51a8838d5df"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE) Cache Line Size <br /></td></tr>
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<tr class="memitem:a79d170ad1e11f381aef8907d59382157"><td class="memItemLeft" align="right" valign="top"><a id="a79d170ad1e11f381aef8907d59382157"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_CLSIZE_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#a427619bf7775ab0a90efd51a8838d5df">CMCC_TYPE_CLSIZE_Pos</a>)</td></tr>
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<tr class="memitem:a74ef08a97807fe9c20edec874f6063de"><td class="memItemLeft" align="right" valign="top"><a id="a74ef08a97807fe9c20edec874f6063de"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_CLSIZE</b>(value)&#160;&#160;&#160;(CMCC_TYPE_CLSIZE_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#a427619bf7775ab0a90efd51a8838d5df">CMCC_TYPE_CLSIZE_Pos</a>))</td></tr>
<tr class="separator:a74ef08a97807fe9c20edec874f6063de"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2342b4248b0e5f669140aaa2db225de6"><td class="memItemLeft" align="right" valign="top"><a id="a2342b4248b0e5f669140aaa2db225de6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a2342b4248b0e5f669140aaa2db225de6">CMCC_TYPE_CLSIZE_CLSIZE_4B_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a2342b4248b0e5f669140aaa2db225de6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE) Cache Line Size is 4 bytes <br /></td></tr>
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<tr class="memitem:a5fb0f3dc4e8e65f138c2bb7d8c065863"><td class="memItemLeft" align="right" valign="top"><a id="a5fb0f3dc4e8e65f138c2bb7d8c065863"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a5fb0f3dc4e8e65f138c2bb7d8c065863">CMCC_TYPE_CLSIZE_CLSIZE_8B_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:a5fb0f3dc4e8e65f138c2bb7d8c065863"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE) Cache Line Size is 8 bytes <br /></td></tr>
<tr class="separator:a5fb0f3dc4e8e65f138c2bb7d8c065863"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a943552c185a4c137daad598cda5bce16"><td class="memItemLeft" align="right" valign="top"><a id="a943552c185a4c137daad598cda5bce16"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a943552c185a4c137daad598cda5bce16">CMCC_TYPE_CLSIZE_CLSIZE_16B_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a943552c185a4c137daad598cda5bce16"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE) Cache Line Size is 16 bytes <br /></td></tr>
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<tr class="memitem:aece490aaf3c53892f48b98f8ab539693"><td class="memItemLeft" align="right" valign="top"><a id="aece490aaf3c53892f48b98f8ab539693"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#aece490aaf3c53892f48b98f8ab539693">CMCC_TYPE_CLSIZE_CLSIZE_32B_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
<tr class="memdesc:aece490aaf3c53892f48b98f8ab539693"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE) Cache Line Size is 32 bytes <br /></td></tr>
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<tr class="memitem:a0e91a268ab1548c54eab05291ddacae8"><td class="memItemLeft" align="right" valign="top"><a id="a0e91a268ab1548c54eab05291ddacae8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a0e91a268ab1548c54eab05291ddacae8">CMCC_TYPE_CLSIZE_CLSIZE_64B_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
<tr class="memdesc:a0e91a268ab1548c54eab05291ddacae8"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE) Cache Line Size is 64 bytes <br /></td></tr>
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<tr class="memitem:af6a2ce3067cac4c85c73515a93434e3a"><td class="memItemLeft" align="right" valign="top"><a id="af6a2ce3067cac4c85c73515a93434e3a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#af6a2ce3067cac4c85c73515a93434e3a">CMCC_TYPE_CLSIZE_CLSIZE_128B_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
<tr class="memdesc:af6a2ce3067cac4c85c73515a93434e3a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE) Cache Line Size is 128 bytes <br /></td></tr>
<tr class="separator:af6a2ce3067cac4c85c73515a93434e3a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab4a4273d52452953dfe5fb748d8518ad"><td class="memItemLeft" align="right" valign="top"><a id="ab4a4273d52452953dfe5fb748d8518ad"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_CLSIZE_CLSIZE_4B</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#a2342b4248b0e5f669140aaa2db225de6">CMCC_TYPE_CLSIZE_CLSIZE_4B_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#a427619bf7775ab0a90efd51a8838d5df">CMCC_TYPE_CLSIZE_Pos</a>)</td></tr>
<tr class="separator:ab4a4273d52452953dfe5fb748d8518ad"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab75855104bc1f000ab02fc57cbe5daf5"><td class="memItemLeft" align="right" valign="top"><a id="ab75855104bc1f000ab02fc57cbe5daf5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_CLSIZE_CLSIZE_8B</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#a5fb0f3dc4e8e65f138c2bb7d8c065863">CMCC_TYPE_CLSIZE_CLSIZE_8B_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#a427619bf7775ab0a90efd51a8838d5df">CMCC_TYPE_CLSIZE_Pos</a>)</td></tr>
<tr class="separator:ab75855104bc1f000ab02fc57cbe5daf5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5ab969c74884743ac77bf3991066e202"><td class="memItemLeft" align="right" valign="top"><a id="a5ab969c74884743ac77bf3991066e202"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_CLSIZE_CLSIZE_16B</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#a943552c185a4c137daad598cda5bce16">CMCC_TYPE_CLSIZE_CLSIZE_16B_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#a427619bf7775ab0a90efd51a8838d5df">CMCC_TYPE_CLSIZE_Pos</a>)</td></tr>
<tr class="separator:a5ab969c74884743ac77bf3991066e202"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7a1874416d407bc5178ee79d08a79f60"><td class="memItemLeft" align="right" valign="top"><a id="a7a1874416d407bc5178ee79d08a79f60"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_CLSIZE_CLSIZE_32B</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#aece490aaf3c53892f48b98f8ab539693">CMCC_TYPE_CLSIZE_CLSIZE_32B_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#a427619bf7775ab0a90efd51a8838d5df">CMCC_TYPE_CLSIZE_Pos</a>)</td></tr>
<tr class="separator:a7a1874416d407bc5178ee79d08a79f60"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad115e11f103fcd8cde33c6bde6ddf300"><td class="memItemLeft" align="right" valign="top"><a id="ad115e11f103fcd8cde33c6bde6ddf300"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_CLSIZE_CLSIZE_64B</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#a0e91a268ab1548c54eab05291ddacae8">CMCC_TYPE_CLSIZE_CLSIZE_64B_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#a427619bf7775ab0a90efd51a8838d5df">CMCC_TYPE_CLSIZE_Pos</a>)</td></tr>
<tr class="separator:ad115e11f103fcd8cde33c6bde6ddf300"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a90dd682ff05135527f7fa61646d94c12"><td class="memItemLeft" align="right" valign="top"><a id="a90dd682ff05135527f7fa61646d94c12"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_TYPE_CLSIZE_CLSIZE_128B</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#af6a2ce3067cac4c85c73515a93434e3a">CMCC_TYPE_CLSIZE_CLSIZE_128B_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#a427619bf7775ab0a90efd51a8838d5df">CMCC_TYPE_CLSIZE_Pos</a>)</td></tr>
<tr class="separator:a90dd682ff05135527f7fa61646d94c12"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3eb12c62370e8ab2c57d42640fcdb8b2"><td class="memItemLeft" align="right" valign="top"><a id="a3eb12c62370e8ab2c57d42640fcdb8b2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a3eb12c62370e8ab2c57d42640fcdb8b2">CMCC_TYPE_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00003FF2)</td></tr>
<tr class="memdesc:a3eb12c62370e8ab2c57d42640fcdb8b2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_TYPE) MASK Register <br /></td></tr>
<tr class="separator:a3eb12c62370e8ab2c57d42640fcdb8b2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a76abf3768aaa0bcc2c9166cd94cb1f3a"><td class="memItemLeft" align="right" valign="top"><a id="a76abf3768aaa0bcc2c9166cd94cb1f3a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a76abf3768aaa0bcc2c9166cd94cb1f3a">CMCC_CFG_OFFSET</a>&#160;&#160;&#160;0x04</td></tr>
<tr class="memdesc:a76abf3768aaa0bcc2c9166cd94cb1f3a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_CFG offset) Cache Configuration Register <br /></td></tr>
<tr class="separator:a76abf3768aaa0bcc2c9166cd94cb1f3a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a31ff4f356cf4b54e3c7f889600918fe2"><td class="memItemLeft" align="right" valign="top"><a id="a31ff4f356cf4b54e3c7f889600918fe2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a31ff4f356cf4b54e3c7f889600918fe2">CMCC_CFG_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000020)</td></tr>
<tr class="memdesc:a31ff4f356cf4b54e3c7f889600918fe2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_CFG reset_value) Cache Configuration Register <br /></td></tr>
<tr class="separator:a31ff4f356cf4b54e3c7f889600918fe2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1a01f0463370f5cf4141c5f5a2bbae89"><td class="memItemLeft" align="right" valign="top"><a id="a1a01f0463370f5cf4141c5f5a2bbae89"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a1a01f0463370f5cf4141c5f5a2bbae89">CMCC_CFG_ICDIS_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:a1a01f0463370f5cf4141c5f5a2bbae89"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_CFG) Instruction Cache Disable <br /></td></tr>
<tr class="separator:a1a01f0463370f5cf4141c5f5a2bbae89"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7e8865a1b7b857761690583528e1469b"><td class="memItemLeft" align="right" valign="top"><a id="a7e8865a1b7b857761690583528e1469b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_CFG_ICDIS</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#a1a01f0463370f5cf4141c5f5a2bbae89">CMCC_CFG_ICDIS_Pos</a>)</td></tr>
<tr class="separator:a7e8865a1b7b857761690583528e1469b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af7b0bbcc86f07b84720004fbbf2baffb"><td class="memItemLeft" align="right" valign="top"><a id="af7b0bbcc86f07b84720004fbbf2baffb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#af7b0bbcc86f07b84720004fbbf2baffb">CMCC_CFG_DCDIS_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:af7b0bbcc86f07b84720004fbbf2baffb"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_CFG) Data Cache Disable <br /></td></tr>
<tr class="separator:af7b0bbcc86f07b84720004fbbf2baffb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5fec711ea7f7b367495660f109d86ae2"><td class="memItemLeft" align="right" valign="top"><a id="a5fec711ea7f7b367495660f109d86ae2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_CFG_DCDIS</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#af7b0bbcc86f07b84720004fbbf2baffb">CMCC_CFG_DCDIS_Pos</a>)</td></tr>
<tr class="separator:a5fec711ea7f7b367495660f109d86ae2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa1eeae270735d268390e2b3f3b4eaa62"><td class="memItemLeft" align="right" valign="top"><a id="aa1eeae270735d268390e2b3f3b4eaa62"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#aa1eeae270735d268390e2b3f3b4eaa62">CMCC_CFG_CSIZESW_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:aa1eeae270735d268390e2b3f3b4eaa62"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_CFG) Cache size configured by software <br /></td></tr>
<tr class="separator:aa1eeae270735d268390e2b3f3b4eaa62"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1ea1ff9a82c74ecd8fc48987110229af"><td class="memItemLeft" align="right" valign="top"><a id="a1ea1ff9a82c74ecd8fc48987110229af"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_CFG_CSIZESW_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#aa1eeae270735d268390e2b3f3b4eaa62">CMCC_CFG_CSIZESW_Pos</a>)</td></tr>
<tr class="separator:a1ea1ff9a82c74ecd8fc48987110229af"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2a3905fe53a176cc470b84b41caf5973"><td class="memItemLeft" align="right" valign="top"><a id="a2a3905fe53a176cc470b84b41caf5973"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_CFG_CSIZESW</b>(value)&#160;&#160;&#160;(CMCC_CFG_CSIZESW_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#aa1eeae270735d268390e2b3f3b4eaa62">CMCC_CFG_CSIZESW_Pos</a>))</td></tr>
<tr class="separator:a2a3905fe53a176cc470b84b41caf5973"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6346cf89a40533656bab068c403da173"><td class="memItemLeft" align="right" valign="top"><a id="a6346cf89a40533656bab068c403da173"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a6346cf89a40533656bab068c403da173">CMCC_CFG_CSIZESW_CONF_CSIZE_1KB_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a6346cf89a40533656bab068c403da173"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_CFG) the Cache Size is configured to 1KB <br /></td></tr>
<tr class="separator:a6346cf89a40533656bab068c403da173"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2842b182b4cb4aeebab303a493fba176"><td class="memItemLeft" align="right" valign="top"><a id="a2842b182b4cb4aeebab303a493fba176"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a2842b182b4cb4aeebab303a493fba176">CMCC_CFG_CSIZESW_CONF_CSIZE_2KB_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:a2842b182b4cb4aeebab303a493fba176"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_CFG) the Cache Size is configured to 2KB <br /></td></tr>
<tr class="separator:a2842b182b4cb4aeebab303a493fba176"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4dac0fae31032e7fe3a45816b7a8099c"><td class="memItemLeft" align="right" valign="top"><a id="a4dac0fae31032e7fe3a45816b7a8099c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a4dac0fae31032e7fe3a45816b7a8099c">CMCC_CFG_CSIZESW_CONF_CSIZE_4KB_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a4dac0fae31032e7fe3a45816b7a8099c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_CFG) the Cache Size is configured to 4KB <br /></td></tr>
<tr class="separator:a4dac0fae31032e7fe3a45816b7a8099c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3d127c89e98bde6f3d5b8edd087a48ee"><td class="memItemLeft" align="right" valign="top"><a id="a3d127c89e98bde6f3d5b8edd087a48ee"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a3d127c89e98bde6f3d5b8edd087a48ee">CMCC_CFG_CSIZESW_CONF_CSIZE_8KB_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
<tr class="memdesc:a3d127c89e98bde6f3d5b8edd087a48ee"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_CFG) the Cache Size is configured to 8KB <br /></td></tr>
<tr class="separator:a3d127c89e98bde6f3d5b8edd087a48ee"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4e3a8c639977ce43caab50557ba7c87d"><td class="memItemLeft" align="right" valign="top"><a id="a4e3a8c639977ce43caab50557ba7c87d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a4e3a8c639977ce43caab50557ba7c87d">CMCC_CFG_CSIZESW_CONF_CSIZE_16KB_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
<tr class="memdesc:a4e3a8c639977ce43caab50557ba7c87d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_CFG) the Cache Size is configured to 16KB <br /></td></tr>
<tr class="separator:a4e3a8c639977ce43caab50557ba7c87d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac848a5a51eeda5ba7f17510bc61c5d09"><td class="memItemLeft" align="right" valign="top"><a id="ac848a5a51eeda5ba7f17510bc61c5d09"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#ac848a5a51eeda5ba7f17510bc61c5d09">CMCC_CFG_CSIZESW_CONF_CSIZE_32KB_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
<tr class="memdesc:ac848a5a51eeda5ba7f17510bc61c5d09"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_CFG) the Cache Size is configured to 32KB <br /></td></tr>
<tr class="separator:ac848a5a51eeda5ba7f17510bc61c5d09"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a74ef93c2451fcb9ad08cd2bee568b763"><td class="memItemLeft" align="right" valign="top"><a id="a74ef93c2451fcb9ad08cd2bee568b763"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a74ef93c2451fcb9ad08cd2bee568b763">CMCC_CFG_CSIZESW_CONF_CSIZE_64KB_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x6)</td></tr>
<tr class="memdesc:a74ef93c2451fcb9ad08cd2bee568b763"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_CFG) the Cache Size is configured to 64KB <br /></td></tr>
<tr class="separator:a74ef93c2451fcb9ad08cd2bee568b763"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af2aa5cc3adca97a91d7a17a0bd78a894"><td class="memItemLeft" align="right" valign="top"><a id="af2aa5cc3adca97a91d7a17a0bd78a894"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_CFG_CSIZESW_CONF_CSIZE_1KB</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#a6346cf89a40533656bab068c403da173">CMCC_CFG_CSIZESW_CONF_CSIZE_1KB_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#aa1eeae270735d268390e2b3f3b4eaa62">CMCC_CFG_CSIZESW_Pos</a>)</td></tr>
<tr class="separator:af2aa5cc3adca97a91d7a17a0bd78a894"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa3733b6dd49fa72998a63ba64f47635c"><td class="memItemLeft" align="right" valign="top"><a id="aa3733b6dd49fa72998a63ba64f47635c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_CFG_CSIZESW_CONF_CSIZE_2KB</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#a2842b182b4cb4aeebab303a493fba176">CMCC_CFG_CSIZESW_CONF_CSIZE_2KB_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#aa1eeae270735d268390e2b3f3b4eaa62">CMCC_CFG_CSIZESW_Pos</a>)</td></tr>
<tr class="separator:aa3733b6dd49fa72998a63ba64f47635c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2cadd856bfc672e8a4c970ae1efb86f9"><td class="memItemLeft" align="right" valign="top"><a id="a2cadd856bfc672e8a4c970ae1efb86f9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_CFG_CSIZESW_CONF_CSIZE_4KB</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#a4dac0fae31032e7fe3a45816b7a8099c">CMCC_CFG_CSIZESW_CONF_CSIZE_4KB_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#aa1eeae270735d268390e2b3f3b4eaa62">CMCC_CFG_CSIZESW_Pos</a>)</td></tr>
<tr class="separator:a2cadd856bfc672e8a4c970ae1efb86f9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a536f8356a121e31fca5b8d305b27b0fe"><td class="memItemLeft" align="right" valign="top"><a id="a536f8356a121e31fca5b8d305b27b0fe"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_CFG_CSIZESW_CONF_CSIZE_8KB</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#a3d127c89e98bde6f3d5b8edd087a48ee">CMCC_CFG_CSIZESW_CONF_CSIZE_8KB_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#aa1eeae270735d268390e2b3f3b4eaa62">CMCC_CFG_CSIZESW_Pos</a>)</td></tr>
<tr class="separator:a536f8356a121e31fca5b8d305b27b0fe"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae63238d59e1004cc38690dcd7c76b723"><td class="memItemLeft" align="right" valign="top"><a id="ae63238d59e1004cc38690dcd7c76b723"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_CFG_CSIZESW_CONF_CSIZE_16KB</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#a4e3a8c639977ce43caab50557ba7c87d">CMCC_CFG_CSIZESW_CONF_CSIZE_16KB_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#aa1eeae270735d268390e2b3f3b4eaa62">CMCC_CFG_CSIZESW_Pos</a>)</td></tr>
<tr class="separator:ae63238d59e1004cc38690dcd7c76b723"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afeeb716dde3074aba006ee37018d40ba"><td class="memItemLeft" align="right" valign="top"><a id="afeeb716dde3074aba006ee37018d40ba"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_CFG_CSIZESW_CONF_CSIZE_32KB</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#ac848a5a51eeda5ba7f17510bc61c5d09">CMCC_CFG_CSIZESW_CONF_CSIZE_32KB_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#aa1eeae270735d268390e2b3f3b4eaa62">CMCC_CFG_CSIZESW_Pos</a>)</td></tr>
<tr class="separator:afeeb716dde3074aba006ee37018d40ba"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af6bbd86b925abf4a957c198eec3f3b55"><td class="memItemLeft" align="right" valign="top"><a id="af6bbd86b925abf4a957c198eec3f3b55"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_CFG_CSIZESW_CONF_CSIZE_64KB</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#a74ef93c2451fcb9ad08cd2bee568b763">CMCC_CFG_CSIZESW_CONF_CSIZE_64KB_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#aa1eeae270735d268390e2b3f3b4eaa62">CMCC_CFG_CSIZESW_Pos</a>)</td></tr>
<tr class="separator:af6bbd86b925abf4a957c198eec3f3b55"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a964aefb6507c8bbd686aa1515961db01"><td class="memItemLeft" align="right" valign="top"><a id="a964aefb6507c8bbd686aa1515961db01"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a964aefb6507c8bbd686aa1515961db01">CMCC_CFG_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000076)</td></tr>
<tr class="memdesc:a964aefb6507c8bbd686aa1515961db01"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_CFG) MASK Register <br /></td></tr>
<tr class="separator:a964aefb6507c8bbd686aa1515961db01"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1c40c6890eb8d1136c01f2e077960520"><td class="memItemLeft" align="right" valign="top"><a id="a1c40c6890eb8d1136c01f2e077960520"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a1c40c6890eb8d1136c01f2e077960520">CMCC_CTRL_OFFSET</a>&#160;&#160;&#160;0x08</td></tr>
<tr class="memdesc:a1c40c6890eb8d1136c01f2e077960520"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_CTRL offset) Cache Control Register <br /></td></tr>
<tr class="separator:a1c40c6890eb8d1136c01f2e077960520"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a23e8a4d94f9cffe75f8091024550a7bf"><td class="memItemLeft" align="right" valign="top"><a id="a23e8a4d94f9cffe75f8091024550a7bf"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a23e8a4d94f9cffe75f8091024550a7bf">CMCC_CTRL_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a23e8a4d94f9cffe75f8091024550a7bf"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_CTRL reset_value) Cache Control Register <br /></td></tr>
<tr class="separator:a23e8a4d94f9cffe75f8091024550a7bf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa46ac835e7410b4ca7cc83f6deace741"><td class="memItemLeft" align="right" valign="top"><a id="aa46ac835e7410b4ca7cc83f6deace741"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#aa46ac835e7410b4ca7cc83f6deace741">CMCC_CTRL_CEN_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:aa46ac835e7410b4ca7cc83f6deace741"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_CTRL) Cache Controller Enable <br /></td></tr>
<tr class="separator:aa46ac835e7410b4ca7cc83f6deace741"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a18fb3b05514468cf2f94a1bbefcb194a"><td class="memItemLeft" align="right" valign="top"><a id="a18fb3b05514468cf2f94a1bbefcb194a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_CTRL_CEN</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#aa46ac835e7410b4ca7cc83f6deace741">CMCC_CTRL_CEN_Pos</a>)</td></tr>
<tr class="separator:a18fb3b05514468cf2f94a1bbefcb194a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a68003beb067b535aee576899282684ee"><td class="memItemLeft" align="right" valign="top"><a id="a68003beb067b535aee576899282684ee"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a68003beb067b535aee576899282684ee">CMCC_CTRL_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000001)</td></tr>
<tr class="memdesc:a68003beb067b535aee576899282684ee"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_CTRL) MASK Register <br /></td></tr>
<tr class="separator:a68003beb067b535aee576899282684ee"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afc80682870ea0d1268d24f21cb63d8f2"><td class="memItemLeft" align="right" valign="top"><a id="afc80682870ea0d1268d24f21cb63d8f2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#afc80682870ea0d1268d24f21cb63d8f2">CMCC_SR_OFFSET</a>&#160;&#160;&#160;0x0C</td></tr>
<tr class="memdesc:afc80682870ea0d1268d24f21cb63d8f2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_SR offset) Cache Status Register <br /></td></tr>
<tr class="separator:afc80682870ea0d1268d24f21cb63d8f2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a74d11b4f9aea7a95863ee76b1b320644"><td class="memItemLeft" align="right" valign="top"><a id="a74d11b4f9aea7a95863ee76b1b320644"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a74d11b4f9aea7a95863ee76b1b320644">CMCC_SR_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a74d11b4f9aea7a95863ee76b1b320644"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_SR reset_value) Cache Status Register <br /></td></tr>
<tr class="separator:a74d11b4f9aea7a95863ee76b1b320644"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7bbff68a40afb7b99efd16a8aa55bf6d"><td class="memItemLeft" align="right" valign="top"><a id="a7bbff68a40afb7b99efd16a8aa55bf6d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a7bbff68a40afb7b99efd16a8aa55bf6d">CMCC_SR_CSTS_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a7bbff68a40afb7b99efd16a8aa55bf6d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_SR) Cache Controller Status <br /></td></tr>
<tr class="separator:a7bbff68a40afb7b99efd16a8aa55bf6d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aadcf33cca306c91f18645d33e35ed187"><td class="memItemLeft" align="right" valign="top"><a id="aadcf33cca306c91f18645d33e35ed187"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_SR_CSTS</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#a7bbff68a40afb7b99efd16a8aa55bf6d">CMCC_SR_CSTS_Pos</a>)</td></tr>
<tr class="separator:aadcf33cca306c91f18645d33e35ed187"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa5ddc47674b6ddd4950483467009e870"><td class="memItemLeft" align="right" valign="top"><a id="aa5ddc47674b6ddd4950483467009e870"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#aa5ddc47674b6ddd4950483467009e870">CMCC_SR_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000001)</td></tr>
<tr class="memdesc:aa5ddc47674b6ddd4950483467009e870"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_SR) MASK Register <br /></td></tr>
<tr class="separator:aa5ddc47674b6ddd4950483467009e870"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0221440b2b94a1c5a8ed376ff0882b4e"><td class="memItemLeft" align="right" valign="top"><a id="a0221440b2b94a1c5a8ed376ff0882b4e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a0221440b2b94a1c5a8ed376ff0882b4e">CMCC_LCKWAY_OFFSET</a>&#160;&#160;&#160;0x10</td></tr>
<tr class="memdesc:a0221440b2b94a1c5a8ed376ff0882b4e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_LCKWAY offset) Cache Lock per Way Register <br /></td></tr>
<tr class="separator:a0221440b2b94a1c5a8ed376ff0882b4e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:acf2bf0fd51366d65f78200fb96319610"><td class="memItemLeft" align="right" valign="top"><a id="acf2bf0fd51366d65f78200fb96319610"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#acf2bf0fd51366d65f78200fb96319610">CMCC_LCKWAY_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:acf2bf0fd51366d65f78200fb96319610"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_LCKWAY reset_value) Cache Lock per Way Register <br /></td></tr>
<tr class="separator:acf2bf0fd51366d65f78200fb96319610"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a896b91ca6fa1d2fc6237a8577157654a"><td class="memItemLeft" align="right" valign="top"><a id="a896b91ca6fa1d2fc6237a8577157654a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a896b91ca6fa1d2fc6237a8577157654a">CMCC_LCKWAY_LCKWAY_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a896b91ca6fa1d2fc6237a8577157654a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_LCKWAY) Lockdown way Register <br /></td></tr>
<tr class="separator:a896b91ca6fa1d2fc6237a8577157654a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a97c2599db14ed4ae0d6441c3e8c07a15"><td class="memItemLeft" align="right" valign="top"><a id="a97c2599db14ed4ae0d6441c3e8c07a15"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_LCKWAY_LCKWAY_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#a896b91ca6fa1d2fc6237a8577157654a">CMCC_LCKWAY_LCKWAY_Pos</a>)</td></tr>
<tr class="separator:a97c2599db14ed4ae0d6441c3e8c07a15"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a461a9632d8d0511e61adb2484f2ebf73"><td class="memItemLeft" align="right" valign="top"><a id="a461a9632d8d0511e61adb2484f2ebf73"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_LCKWAY_LCKWAY</b>(value)&#160;&#160;&#160;(CMCC_LCKWAY_LCKWAY_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#a896b91ca6fa1d2fc6237a8577157654a">CMCC_LCKWAY_LCKWAY_Pos</a>))</td></tr>
<tr class="separator:a461a9632d8d0511e61adb2484f2ebf73"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4a945351e3699a49ca0a5b878cfa1c2d"><td class="memItemLeft" align="right" valign="top"><a id="a4a945351e3699a49ca0a5b878cfa1c2d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a4a945351e3699a49ca0a5b878cfa1c2d">CMCC_LCKWAY_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000000F)</td></tr>
<tr class="memdesc:a4a945351e3699a49ca0a5b878cfa1c2d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_LCKWAY) MASK Register <br /></td></tr>
<tr class="separator:a4a945351e3699a49ca0a5b878cfa1c2d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abd56aca6ff48aeb9c0b23647d56b65e3"><td class="memItemLeft" align="right" valign="top"><a id="abd56aca6ff48aeb9c0b23647d56b65e3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#abd56aca6ff48aeb9c0b23647d56b65e3">CMCC_MAINT0_OFFSET</a>&#160;&#160;&#160;0x20</td></tr>
<tr class="memdesc:abd56aca6ff48aeb9c0b23647d56b65e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MAINT0 offset) Cache Maintenance Register 0 <br /></td></tr>
<tr class="separator:abd56aca6ff48aeb9c0b23647d56b65e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0797a3a0e1c44e0ac8d822ba1bd92074"><td class="memItemLeft" align="right" valign="top"><a id="a0797a3a0e1c44e0ac8d822ba1bd92074"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a0797a3a0e1c44e0ac8d822ba1bd92074">CMCC_MAINT0_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a0797a3a0e1c44e0ac8d822ba1bd92074"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MAINT0 reset_value) Cache Maintenance Register 0 <br /></td></tr>
<tr class="separator:a0797a3a0e1c44e0ac8d822ba1bd92074"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a846a14dc3882a91b834d9620a93dc9dc"><td class="memItemLeft" align="right" valign="top"><a id="a846a14dc3882a91b834d9620a93dc9dc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a846a14dc3882a91b834d9620a93dc9dc">CMCC_MAINT0_INVALL_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a846a14dc3882a91b834d9620a93dc9dc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MAINT0) Cache Controller invalidate All <br /></td></tr>
<tr class="separator:a846a14dc3882a91b834d9620a93dc9dc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aaa13b5c5a7891f0f02a731d7f3ac167e"><td class="memItemLeft" align="right" valign="top"><a id="aaa13b5c5a7891f0f02a731d7f3ac167e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_MAINT0_INVALL</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#a846a14dc3882a91b834d9620a93dc9dc">CMCC_MAINT0_INVALL_Pos</a>)</td></tr>
<tr class="separator:aaa13b5c5a7891f0f02a731d7f3ac167e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af5df9e2c7604a8fedc53597a6a4a97c3"><td class="memItemLeft" align="right" valign="top"><a id="af5df9e2c7604a8fedc53597a6a4a97c3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#af5df9e2c7604a8fedc53597a6a4a97c3">CMCC_MAINT0_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000001)</td></tr>
<tr class="memdesc:af5df9e2c7604a8fedc53597a6a4a97c3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MAINT0) MASK Register <br /></td></tr>
<tr class="separator:af5df9e2c7604a8fedc53597a6a4a97c3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2896788cc7e8df1f7b644dd407633ea6"><td class="memItemLeft" align="right" valign="top"><a id="a2896788cc7e8df1f7b644dd407633ea6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a2896788cc7e8df1f7b644dd407633ea6">CMCC_MAINT1_OFFSET</a>&#160;&#160;&#160;0x24</td></tr>
<tr class="memdesc:a2896788cc7e8df1f7b644dd407633ea6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MAINT1 offset) Cache Maintenance Register 1 <br /></td></tr>
<tr class="separator:a2896788cc7e8df1f7b644dd407633ea6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa96102dd1002108c74c72669e4d87102"><td class="memItemLeft" align="right" valign="top"><a id="aa96102dd1002108c74c72669e4d87102"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#aa96102dd1002108c74c72669e4d87102">CMCC_MAINT1_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:aa96102dd1002108c74c72669e4d87102"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MAINT1 reset_value) Cache Maintenance Register 1 <br /></td></tr>
<tr class="separator:aa96102dd1002108c74c72669e4d87102"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af77b32ecf9cc53e26475c79bacb831d9"><td class="memItemLeft" align="right" valign="top"><a id="af77b32ecf9cc53e26475c79bacb831d9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#af77b32ecf9cc53e26475c79bacb831d9">CMCC_MAINT1_INDEX_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:af77b32ecf9cc53e26475c79bacb831d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MAINT1) Invalidate Index <br /></td></tr>
<tr class="separator:af77b32ecf9cc53e26475c79bacb831d9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa654feb8d1cced490850856387271f44"><td class="memItemLeft" align="right" valign="top"><a id="aa654feb8d1cced490850856387271f44"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_MAINT1_INDEX_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#af77b32ecf9cc53e26475c79bacb831d9">CMCC_MAINT1_INDEX_Pos</a>)</td></tr>
<tr class="separator:aa654feb8d1cced490850856387271f44"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a600d7fef3abb5f839fe3bfddaa70489d"><td class="memItemLeft" align="right" valign="top"><a id="a600d7fef3abb5f839fe3bfddaa70489d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_MAINT1_INDEX</b>(value)&#160;&#160;&#160;(CMCC_MAINT1_INDEX_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#af77b32ecf9cc53e26475c79bacb831d9">CMCC_MAINT1_INDEX_Pos</a>))</td></tr>
<tr class="separator:a600d7fef3abb5f839fe3bfddaa70489d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab558e70417bf1e1cda667b35bc33d110"><td class="memItemLeft" align="right" valign="top"><a id="ab558e70417bf1e1cda667b35bc33d110"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#ab558e70417bf1e1cda667b35bc33d110">CMCC_MAINT1_WAY_Pos</a>&#160;&#160;&#160;28</td></tr>
<tr class="memdesc:ab558e70417bf1e1cda667b35bc33d110"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MAINT1) Invalidate Way <br /></td></tr>
<tr class="separator:ab558e70417bf1e1cda667b35bc33d110"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9856dd61c24aaf3f0a88d8285a2660d1"><td class="memItemLeft" align="right" valign="top"><a id="a9856dd61c24aaf3f0a88d8285a2660d1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_MAINT1_WAY_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#ab558e70417bf1e1cda667b35bc33d110">CMCC_MAINT1_WAY_Pos</a>)</td></tr>
<tr class="separator:a9856dd61c24aaf3f0a88d8285a2660d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a25900fbd904e683f15d31c10e0d82db1"><td class="memItemLeft" align="right" valign="top"><a id="a25900fbd904e683f15d31c10e0d82db1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_MAINT1_WAY</b>(value)&#160;&#160;&#160;(CMCC_MAINT1_WAY_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#ab558e70417bf1e1cda667b35bc33d110">CMCC_MAINT1_WAY_Pos</a>))</td></tr>
<tr class="separator:a25900fbd904e683f15d31c10e0d82db1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa3afc8c8bd6abd23bb6955302287bc5b"><td class="memItemLeft" align="right" valign="top"><a id="aa3afc8c8bd6abd23bb6955302287bc5b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#aa3afc8c8bd6abd23bb6955302287bc5b">CMCC_MAINT1_WAY_WAY0_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:aa3afc8c8bd6abd23bb6955302287bc5b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MAINT1) Way 0 is selection for index invalidation <br /></td></tr>
<tr class="separator:aa3afc8c8bd6abd23bb6955302287bc5b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac206bb2262e4c6d3f5b2dc9fc97a989c"><td class="memItemLeft" align="right" valign="top"><a id="ac206bb2262e4c6d3f5b2dc9fc97a989c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#ac206bb2262e4c6d3f5b2dc9fc97a989c">CMCC_MAINT1_WAY_WAY1_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:ac206bb2262e4c6d3f5b2dc9fc97a989c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MAINT1) Way 1 is selection for index invalidation <br /></td></tr>
<tr class="separator:ac206bb2262e4c6d3f5b2dc9fc97a989c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad64297c0bc408d6c1b774eb181a7e48d"><td class="memItemLeft" align="right" valign="top"><a id="ad64297c0bc408d6c1b774eb181a7e48d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#ad64297c0bc408d6c1b774eb181a7e48d">CMCC_MAINT1_WAY_WAY2_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:ad64297c0bc408d6c1b774eb181a7e48d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MAINT1) Way 2 is selection for index invalidation <br /></td></tr>
<tr class="separator:ad64297c0bc408d6c1b774eb181a7e48d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4e8246db5e421699abbfe2f6c357eb9e"><td class="memItemLeft" align="right" valign="top"><a id="a4e8246db5e421699abbfe2f6c357eb9e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a4e8246db5e421699abbfe2f6c357eb9e">CMCC_MAINT1_WAY_WAY3_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
<tr class="memdesc:a4e8246db5e421699abbfe2f6c357eb9e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MAINT1) Way 3 is selection for index invalidation <br /></td></tr>
<tr class="separator:a4e8246db5e421699abbfe2f6c357eb9e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3c901e07e1f3f062b148be9c15573687"><td class="memItemLeft" align="right" valign="top"><a id="a3c901e07e1f3f062b148be9c15573687"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_MAINT1_WAY_WAY0</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#aa3afc8c8bd6abd23bb6955302287bc5b">CMCC_MAINT1_WAY_WAY0_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#ab558e70417bf1e1cda667b35bc33d110">CMCC_MAINT1_WAY_Pos</a>)</td></tr>
<tr class="separator:a3c901e07e1f3f062b148be9c15573687"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afcc1a4595a03e18fcc8777304b94d0df"><td class="memItemLeft" align="right" valign="top"><a id="afcc1a4595a03e18fcc8777304b94d0df"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_MAINT1_WAY_WAY1</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#ac206bb2262e4c6d3f5b2dc9fc97a989c">CMCC_MAINT1_WAY_WAY1_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#ab558e70417bf1e1cda667b35bc33d110">CMCC_MAINT1_WAY_Pos</a>)</td></tr>
<tr class="separator:afcc1a4595a03e18fcc8777304b94d0df"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a72543b24b042cbfccd18688c3c318e9a"><td class="memItemLeft" align="right" valign="top"><a id="a72543b24b042cbfccd18688c3c318e9a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_MAINT1_WAY_WAY2</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#ad64297c0bc408d6c1b774eb181a7e48d">CMCC_MAINT1_WAY_WAY2_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#ab558e70417bf1e1cda667b35bc33d110">CMCC_MAINT1_WAY_Pos</a>)</td></tr>
<tr class="separator:a72543b24b042cbfccd18688c3c318e9a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab4a548642a31630daacbf697917340f9"><td class="memItemLeft" align="right" valign="top"><a id="ab4a548642a31630daacbf697917340f9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_MAINT1_WAY_WAY3</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#a4e8246db5e421699abbfe2f6c357eb9e">CMCC_MAINT1_WAY_WAY3_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#ab558e70417bf1e1cda667b35bc33d110">CMCC_MAINT1_WAY_Pos</a>)</td></tr>
<tr class="separator:ab4a548642a31630daacbf697917340f9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0f89cd0e94679de6309ebccf4dd5c4f8"><td class="memItemLeft" align="right" valign="top"><a id="a0f89cd0e94679de6309ebccf4dd5c4f8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a0f89cd0e94679de6309ebccf4dd5c4f8">CMCC_MAINT1_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF0000FF0)</td></tr>
<tr class="memdesc:a0f89cd0e94679de6309ebccf4dd5c4f8"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MAINT1) MASK Register <br /></td></tr>
<tr class="separator:a0f89cd0e94679de6309ebccf4dd5c4f8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3d71f7fcc57c8169f6f52fd0dad9d1af"><td class="memItemLeft" align="right" valign="top"><a id="a3d71f7fcc57c8169f6f52fd0dad9d1af"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a3d71f7fcc57c8169f6f52fd0dad9d1af">CMCC_MCFG_OFFSET</a>&#160;&#160;&#160;0x28</td></tr>
<tr class="memdesc:a3d71f7fcc57c8169f6f52fd0dad9d1af"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MCFG offset) Cache Monitor Configuration Register <br /></td></tr>
<tr class="separator:a3d71f7fcc57c8169f6f52fd0dad9d1af"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a18900cf4e319352c0bdad36552329eea"><td class="memItemLeft" align="right" valign="top"><a id="a18900cf4e319352c0bdad36552329eea"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a18900cf4e319352c0bdad36552329eea">CMCC_MCFG_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a18900cf4e319352c0bdad36552329eea"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MCFG reset_value) Cache Monitor Configuration Register <br /></td></tr>
<tr class="separator:a18900cf4e319352c0bdad36552329eea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8f5a8dc197ff7eacddc8f4fc140c70d9"><td class="memItemLeft" align="right" valign="top"><a id="a8f5a8dc197ff7eacddc8f4fc140c70d9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a8f5a8dc197ff7eacddc8f4fc140c70d9">CMCC_MCFG_MODE_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a8f5a8dc197ff7eacddc8f4fc140c70d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MCFG) Cache Controller Monitor Counter Mode <br /></td></tr>
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<tr class="memitem:a236fc16f4c218aab43d5663560a045e6"><td class="memItemLeft" align="right" valign="top"><a id="a236fc16f4c218aab43d5663560a045e6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_MCFG_MODE_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#a8f5a8dc197ff7eacddc8f4fc140c70d9">CMCC_MCFG_MODE_Pos</a>)</td></tr>
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<tr class="memitem:a2703579be2deb0016a36069e16984b42"><td class="memItemLeft" align="right" valign="top"><a id="a2703579be2deb0016a36069e16984b42"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_MCFG_MODE</b>(value)&#160;&#160;&#160;(CMCC_MCFG_MODE_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#a8f5a8dc197ff7eacddc8f4fc140c70d9">CMCC_MCFG_MODE_Pos</a>))</td></tr>
<tr class="separator:a2703579be2deb0016a36069e16984b42"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae88e77b261ad27607725d1ee1c65ef2a"><td class="memItemLeft" align="right" valign="top"><a id="ae88e77b261ad27607725d1ee1c65ef2a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#ae88e77b261ad27607725d1ee1c65ef2a">CMCC_MCFG_MODE_CYCLE_COUNT_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:ae88e77b261ad27607725d1ee1c65ef2a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MCFG) cycle counter <br /></td></tr>
<tr class="separator:ae88e77b261ad27607725d1ee1c65ef2a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a84afacbd52a58f73ed03eccbc83614c7"><td class="memItemLeft" align="right" valign="top"><a id="a84afacbd52a58f73ed03eccbc83614c7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a84afacbd52a58f73ed03eccbc83614c7">CMCC_MCFG_MODE_IHIT_COUNT_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:a84afacbd52a58f73ed03eccbc83614c7"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MCFG) instruction hit counter <br /></td></tr>
<tr class="separator:a84afacbd52a58f73ed03eccbc83614c7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2c79b4b53faaec07e3ab8b378ef0fd28"><td class="memItemLeft" align="right" valign="top"><a id="a2c79b4b53faaec07e3ab8b378ef0fd28"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a2c79b4b53faaec07e3ab8b378ef0fd28">CMCC_MCFG_MODE_DHIT_COUNT_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a2c79b4b53faaec07e3ab8b378ef0fd28"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MCFG) data hit counter <br /></td></tr>
<tr class="separator:a2c79b4b53faaec07e3ab8b378ef0fd28"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6dede55f664a41aaa9bcf98b475a7798"><td class="memItemLeft" align="right" valign="top"><a id="a6dede55f664a41aaa9bcf98b475a7798"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_MCFG_MODE_CYCLE_COUNT</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#ae88e77b261ad27607725d1ee1c65ef2a">CMCC_MCFG_MODE_CYCLE_COUNT_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#a8f5a8dc197ff7eacddc8f4fc140c70d9">CMCC_MCFG_MODE_Pos</a>)</td></tr>
<tr class="separator:a6dede55f664a41aaa9bcf98b475a7798"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0f85d801970e98ca5f08e6e5a6b3072d"><td class="memItemLeft" align="right" valign="top"><a id="a0f85d801970e98ca5f08e6e5a6b3072d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_MCFG_MODE_IHIT_COUNT</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#a84afacbd52a58f73ed03eccbc83614c7">CMCC_MCFG_MODE_IHIT_COUNT_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#a8f5a8dc197ff7eacddc8f4fc140c70d9">CMCC_MCFG_MODE_Pos</a>)</td></tr>
<tr class="separator:a0f85d801970e98ca5f08e6e5a6b3072d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa1977951480fc7150d69f4c58f08d3bd"><td class="memItemLeft" align="right" valign="top"><a id="aa1977951480fc7150d69f4c58f08d3bd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_MCFG_MODE_DHIT_COUNT</b>&#160;&#160;&#160;(<a class="el" href="component_2cmcc_8h.html#a2c79b4b53faaec07e3ab8b378ef0fd28">CMCC_MCFG_MODE_DHIT_COUNT_Val</a> &lt;&lt; <a class="el" href="component_2cmcc_8h.html#a8f5a8dc197ff7eacddc8f4fc140c70d9">CMCC_MCFG_MODE_Pos</a>)</td></tr>
<tr class="separator:aa1977951480fc7150d69f4c58f08d3bd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a03c688c2d32c7ff71a9f9601eee5be87"><td class="memItemLeft" align="right" valign="top"><a id="a03c688c2d32c7ff71a9f9601eee5be87"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a03c688c2d32c7ff71a9f9601eee5be87">CMCC_MCFG_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000003)</td></tr>
<tr class="memdesc:a03c688c2d32c7ff71a9f9601eee5be87"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MCFG) MASK Register <br /></td></tr>
<tr class="separator:a03c688c2d32c7ff71a9f9601eee5be87"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a92128f9851ca1637e281b2283d4d79b2"><td class="memItemLeft" align="right" valign="top"><a id="a92128f9851ca1637e281b2283d4d79b2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a92128f9851ca1637e281b2283d4d79b2">CMCC_MEN_OFFSET</a>&#160;&#160;&#160;0x2C</td></tr>
<tr class="memdesc:a92128f9851ca1637e281b2283d4d79b2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MEN offset) Cache Monitor Enable Register <br /></td></tr>
<tr class="separator:a92128f9851ca1637e281b2283d4d79b2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8dadf19c9875cf049618db0ca56fb92f"><td class="memItemLeft" align="right" valign="top"><a id="a8dadf19c9875cf049618db0ca56fb92f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a8dadf19c9875cf049618db0ca56fb92f">CMCC_MEN_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a8dadf19c9875cf049618db0ca56fb92f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MEN reset_value) Cache Monitor Enable Register <br /></td></tr>
<tr class="separator:a8dadf19c9875cf049618db0ca56fb92f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af583b3da491f41eee2f89cbe5bb506a0"><td class="memItemLeft" align="right" valign="top"><a id="af583b3da491f41eee2f89cbe5bb506a0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#af583b3da491f41eee2f89cbe5bb506a0">CMCC_MEN_MENABLE_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:af583b3da491f41eee2f89cbe5bb506a0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MEN) Cache Controller Monitor Enable <br /></td></tr>
<tr class="separator:af583b3da491f41eee2f89cbe5bb506a0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5e9c6929e06a7c84796bebb288ef9d46"><td class="memItemLeft" align="right" valign="top"><a id="a5e9c6929e06a7c84796bebb288ef9d46"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_MEN_MENABLE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#af583b3da491f41eee2f89cbe5bb506a0">CMCC_MEN_MENABLE_Pos</a>)</td></tr>
<tr class="separator:a5e9c6929e06a7c84796bebb288ef9d46"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3a9ee7367a5d2ea9b24da6f9519670c5"><td class="memItemLeft" align="right" valign="top"><a id="a3a9ee7367a5d2ea9b24da6f9519670c5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a3a9ee7367a5d2ea9b24da6f9519670c5">CMCC_MEN_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000001)</td></tr>
<tr class="memdesc:a3a9ee7367a5d2ea9b24da6f9519670c5"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MEN) MASK Register <br /></td></tr>
<tr class="separator:a3a9ee7367a5d2ea9b24da6f9519670c5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afc9fd2d60fc0358874e9e6c1a36a68d2"><td class="memItemLeft" align="right" valign="top"><a id="afc9fd2d60fc0358874e9e6c1a36a68d2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#afc9fd2d60fc0358874e9e6c1a36a68d2">CMCC_MCTRL_OFFSET</a>&#160;&#160;&#160;0x30</td></tr>
<tr class="memdesc:afc9fd2d60fc0358874e9e6c1a36a68d2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MCTRL offset) Cache Monitor Control Register <br /></td></tr>
<tr class="separator:afc9fd2d60fc0358874e9e6c1a36a68d2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a45335c51743bab563f9fe15f83dfc78a"><td class="memItemLeft" align="right" valign="top"><a id="a45335c51743bab563f9fe15f83dfc78a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a45335c51743bab563f9fe15f83dfc78a">CMCC_MCTRL_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a45335c51743bab563f9fe15f83dfc78a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MCTRL reset_value) Cache Monitor Control Register <br /></td></tr>
<tr class="separator:a45335c51743bab563f9fe15f83dfc78a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0d9bafa05a7a5b06e167653013fcd043"><td class="memItemLeft" align="right" valign="top"><a id="a0d9bafa05a7a5b06e167653013fcd043"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a0d9bafa05a7a5b06e167653013fcd043">CMCC_MCTRL_SWRST_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a0d9bafa05a7a5b06e167653013fcd043"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MCTRL) Cache Controller Software Reset <br /></td></tr>
<tr class="separator:a0d9bafa05a7a5b06e167653013fcd043"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3aa80dd2f4e429efe4b79205bd677909"><td class="memItemLeft" align="right" valign="top"><a id="a3aa80dd2f4e429efe4b79205bd677909"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_MCTRL_SWRST</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#a0d9bafa05a7a5b06e167653013fcd043">CMCC_MCTRL_SWRST_Pos</a>)</td></tr>
<tr class="separator:a3aa80dd2f4e429efe4b79205bd677909"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af380f2d34e625dda8ccaae84971e7922"><td class="memItemLeft" align="right" valign="top"><a id="af380f2d34e625dda8ccaae84971e7922"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#af380f2d34e625dda8ccaae84971e7922">CMCC_MCTRL_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000001)</td></tr>
<tr class="memdesc:af380f2d34e625dda8ccaae84971e7922"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MCTRL) MASK Register <br /></td></tr>
<tr class="separator:af380f2d34e625dda8ccaae84971e7922"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad67c4f86b6db8bfdc893a80f840fe95c"><td class="memItemLeft" align="right" valign="top"><a id="ad67c4f86b6db8bfdc893a80f840fe95c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#ad67c4f86b6db8bfdc893a80f840fe95c">CMCC_MSR_OFFSET</a>&#160;&#160;&#160;0x34</td></tr>
<tr class="memdesc:ad67c4f86b6db8bfdc893a80f840fe95c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MSR offset) Cache Monitor Status Register <br /></td></tr>
<tr class="separator:ad67c4f86b6db8bfdc893a80f840fe95c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9c9cfab854a595987f81227aa411bc6e"><td class="memItemLeft" align="right" valign="top"><a id="a9c9cfab854a595987f81227aa411bc6e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a9c9cfab854a595987f81227aa411bc6e">CMCC_MSR_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a9c9cfab854a595987f81227aa411bc6e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MSR reset_value) Cache Monitor Status Register <br /></td></tr>
<tr class="separator:a9c9cfab854a595987f81227aa411bc6e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a23e56e447569404b43f4bb371aa3cbc2"><td class="memItemLeft" align="right" valign="top"><a id="a23e56e447569404b43f4bb371aa3cbc2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#a23e56e447569404b43f4bb371aa3cbc2">CMCC_MSR_EVENT_CNT_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a23e56e447569404b43f4bb371aa3cbc2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MSR) Monitor Event Counter <br /></td></tr>
<tr class="separator:a23e56e447569404b43f4bb371aa3cbc2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6c1d254fd1a05478b6427d6ab480f574"><td class="memItemLeft" align="right" valign="top"><a id="a6c1d254fd1a05478b6427d6ab480f574"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_MSR_EVENT_CNT_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#a23e56e447569404b43f4bb371aa3cbc2">CMCC_MSR_EVENT_CNT_Pos</a>)</td></tr>
<tr class="separator:a6c1d254fd1a05478b6427d6ab480f574"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae78bd258aba7c13e8f96d7dd06cecab2"><td class="memItemLeft" align="right" valign="top"><a id="ae78bd258aba7c13e8f96d7dd06cecab2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CMCC_MSR_EVENT_CNT</b>(value)&#160;&#160;&#160;(CMCC_MSR_EVENT_CNT_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2cmcc_8h.html#a23e56e447569404b43f4bb371aa3cbc2">CMCC_MSR_EVENT_CNT_Pos</a>))</td></tr>
<tr class="separator:ae78bd258aba7c13e8f96d7dd06cecab2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad1e5f273e5a25b3aa2c38b8286f8ddfb"><td class="memItemLeft" align="right" valign="top"><a id="ad1e5f273e5a25b3aa2c38b8286f8ddfb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2cmcc_8h.html#ad1e5f273e5a25b3aa2c38b8286f8ddfb">CMCC_MSR_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:ad1e5f273e5a25b3aa2c38b8286f8ddfb"><td class="mdescLeft">&#160;</td><td class="mdescRight">(CMCC_MSR) MASK Register <br /></td></tr>
<tr class="separator:ad1e5f273e5a25b3aa2c38b8286f8ddfb"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Component description for CMCC. </p>
<p>Copyright (c) 2019 Microchip Technology Inc.</p>
<p>\asf_license_start </p>
<p class="definition">Definition in file <a class="el" href="component_2cmcc_8h_source.html">cmcc.h</a>.</p>
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<a href="component_2cmcc_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_CMCC_COMPONENT_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_CMCC_COMPONENT_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160; </div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define CMCC_U2015</span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define REV_CMCC 0x600</span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160; </div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="comment">/* -------- CMCC_TYPE : (CMCC Offset: 0x00) (R/ 32) Cache Type Register -------- */</span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00044"></a><span class="lineno"><a class="line" href="unionCMCC__TYPE__Type.html"> 44</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00046"></a><span class="lineno"><a class="line" href="unionCMCC__TYPE__Type.html#ade36f7f7215053e3f67a6a9e15de507c"> 46</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00047"></a><span class="lineno"><a class="line" href="unionCMCC__TYPE__Type.html#ac024e8c07859cbd5c70deb1b4b5995ff"> 47</a></span>&#160; uint32_t <a class="code" href="unionCMCC__TYPE__Type.html#ac024e8c07859cbd5c70deb1b4b5995ff">GCLK</a>:1; </div>
<div class="line"><a name="l00048"></a><span class="lineno"><a class="line" href="unionCMCC__TYPE__Type.html#a70d682793596dd447c128116778197b1"> 48</a></span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00049"></a><span class="lineno"><a class="line" href="unionCMCC__TYPE__Type.html#a7a06270e88066dc28df998d64ae15c58"> 49</a></span>&#160; uint32_t <a class="code" href="unionCMCC__TYPE__Type.html#a7a06270e88066dc28df998d64ae15c58">RRP</a>:1; </div>
<div class="line"><a name="l00050"></a><span class="lineno"><a class="line" href="unionCMCC__TYPE__Type.html#a7f51dda39d0395023794eca1e533109b"> 50</a></span>&#160; uint32_t <a class="code" href="unionCMCC__TYPE__Type.html#a7f51dda39d0395023794eca1e533109b">WAYNUM</a>:2; </div>
<div class="line"><a name="l00051"></a><span class="lineno"><a class="line" href="unionCMCC__TYPE__Type.html#af2aeea986c35297b98beb63c1f48b93f"> 51</a></span>&#160; uint32_t <a class="code" href="unionCMCC__TYPE__Type.html#af2aeea986c35297b98beb63c1f48b93f">LCKDOWN</a>:1; </div>
<div class="line"><a name="l00052"></a><span class="lineno"><a class="line" href="unionCMCC__TYPE__Type.html#a56b689cc2937945413f7e7518f75b20e"> 52</a></span>&#160; uint32_t <a class="code" href="unionCMCC__TYPE__Type.html#a56b689cc2937945413f7e7518f75b20e">CSIZE</a>:3; </div>
<div class="line"><a name="l00053"></a><span class="lineno"><a class="line" href="unionCMCC__TYPE__Type.html#acb0f3ac56719b193c197cc5981684d2b"> 53</a></span>&#160; uint32_t <a class="code" href="unionCMCC__TYPE__Type.html#acb0f3ac56719b193c197cc5981684d2b">CLSIZE</a>:3; </div>
<div class="line"><a name="l00054"></a><span class="lineno"><a class="line" href="unionCMCC__TYPE__Type.html#a0e895de6039074503ef20d25efa1ca44"> 54</a></span>&#160; uint32_t :18; </div>
<div class="line"><a name="l00055"></a><span class="lineno"><a class="line" href="unionCMCC__TYPE__Type.html#abc244c8b5054260980e9782c1354abcb"> 55</a></span>&#160; } bit; </div>
<div class="line"><a name="l00056"></a><span class="lineno"><a class="line" href="unionCMCC__TYPE__Type.html#a2f7c05d3b39d496b58239d757f896e81"> 56</a></span>&#160; uint32_t <a class="code" href="unionCMCC__TYPE__Type.html#a2f7c05d3b39d496b58239d757f896e81">reg</a>; </div>
<div class="line"><a name="l00057"></a><span class="lineno"> 57</span>&#160;} <a class="code" href="unionCMCC__TYPE__Type.html">CMCC_TYPE_Type</a>;</div>
<div class="line"><a name="l00058"></a><span class="lineno"> 58</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00059"></a><span class="lineno"> 59</span>&#160; </div>
<div class="line"><a name="l00060"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a749d626c3b036b9683d89154e14877ff"> 60</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_OFFSET 0x00 </span></div>
<div class="line"><a name="l00061"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a21759c0d826f90da8a582fad475ce140"> 61</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_RESETVALUE _U_(0x000012D2) </span></div>
<div class="line"><a name="l00063"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a6660de3f0a847601e4b7c396a7ef3b1d"> 63</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_GCLK_Pos 1 </span></div>
<div class="line"><a name="l00064"></a><span class="lineno"> 64</span>&#160;<span class="preprocessor">#define CMCC_TYPE_GCLK (_U_(0x1) &lt;&lt; CMCC_TYPE_GCLK_Pos)</span></div>
<div class="line"><a name="l00065"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#af75f143c68e0805c6ed46ab51c6186fe"> 65</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_RRP_Pos 4 </span></div>
<div class="line"><a name="l00066"></a><span class="lineno"> 66</span>&#160;<span class="preprocessor">#define CMCC_TYPE_RRP (_U_(0x1) &lt;&lt; CMCC_TYPE_RRP_Pos)</span></div>
<div class="line"><a name="l00067"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#ae73acd2e9c604956daef7586d9f5975d"> 67</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_WAYNUM_Pos 5 </span></div>
<div class="line"><a name="l00068"></a><span class="lineno"> 68</span>&#160;<span class="preprocessor">#define CMCC_TYPE_WAYNUM_Msk (_U_(0x3) &lt;&lt; CMCC_TYPE_WAYNUM_Pos)</span></div>
<div class="line"><a name="l00069"></a><span class="lineno"> 69</span>&#160;<span class="preprocessor">#define CMCC_TYPE_WAYNUM(value) (CMCC_TYPE_WAYNUM_Msk &amp; ((value) &lt;&lt; CMCC_TYPE_WAYNUM_Pos))</span></div>
<div class="line"><a name="l00070"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a1fe072aa2cb47c61f5cc6c49c6f390ba"> 70</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_WAYNUM_DMAPPED_Val _U_(0x0) </span></div>
<div class="line"><a name="l00071"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#abcb8e14e6f7b5b6a53e461347becd62a"> 71</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_WAYNUM_ARCH2WAY_Val _U_(0x1) </span></div>
<div class="line"><a name="l00072"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a3853fdb794dc86b905bd249af9cb238c"> 72</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_WAYNUM_ARCH4WAY_Val _U_(0x2) </span></div>
<div class="line"><a name="l00073"></a><span class="lineno"> 73</span>&#160;<span class="preprocessor">#define CMCC_TYPE_WAYNUM_DMAPPED (CMCC_TYPE_WAYNUM_DMAPPED_Val &lt;&lt; CMCC_TYPE_WAYNUM_Pos)</span></div>
<div class="line"><a name="l00074"></a><span class="lineno"> 74</span>&#160;<span class="preprocessor">#define CMCC_TYPE_WAYNUM_ARCH2WAY (CMCC_TYPE_WAYNUM_ARCH2WAY_Val &lt;&lt; CMCC_TYPE_WAYNUM_Pos)</span></div>
<div class="line"><a name="l00075"></a><span class="lineno"> 75</span>&#160;<span class="preprocessor">#define CMCC_TYPE_WAYNUM_ARCH4WAY (CMCC_TYPE_WAYNUM_ARCH4WAY_Val &lt;&lt; CMCC_TYPE_WAYNUM_Pos)</span></div>
<div class="line"><a name="l00076"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a0eb4d58cc01ab3078deb50e5c97b5a47"> 76</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_LCKDOWN_Pos 7 </span></div>
<div class="line"><a name="l00077"></a><span class="lineno"> 77</span>&#160;<span class="preprocessor">#define CMCC_TYPE_LCKDOWN (_U_(0x1) &lt;&lt; CMCC_TYPE_LCKDOWN_Pos)</span></div>
<div class="line"><a name="l00078"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#af4d83c89113c8e83588ed68cb260bd81"> 78</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_CSIZE_Pos 8 </span></div>
<div class="line"><a name="l00079"></a><span class="lineno"> 79</span>&#160;<span class="preprocessor">#define CMCC_TYPE_CSIZE_Msk (_U_(0x7) &lt;&lt; CMCC_TYPE_CSIZE_Pos)</span></div>
<div class="line"><a name="l00080"></a><span class="lineno"> 80</span>&#160;<span class="preprocessor">#define CMCC_TYPE_CSIZE(value) (CMCC_TYPE_CSIZE_Msk &amp; ((value) &lt;&lt; CMCC_TYPE_CSIZE_Pos))</span></div>
<div class="line"><a name="l00081"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#aaf6b42c8dc044637f9c23e066c7ddedd"> 81</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_CSIZE_CSIZE_1KB_Val _U_(0x0) </span></div>
<div class="line"><a name="l00082"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a484cd40e415f09156dc1bc3260f690fd"> 82</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_CSIZE_CSIZE_2KB_Val _U_(0x1) </span></div>
<div class="line"><a name="l00083"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a21c2451ffb0d36e6d6341efc655768e2"> 83</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_CSIZE_CSIZE_4KB_Val _U_(0x2) </span></div>
<div class="line"><a name="l00084"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a1ea946d60c795244c1d2415c73a24dbd"> 84</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_CSIZE_CSIZE_8KB_Val _U_(0x3) </span></div>
<div class="line"><a name="l00085"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#afaeec684cd2672d549be2bd3038e9168"> 85</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_CSIZE_CSIZE_16KB_Val _U_(0x4) </span></div>
<div class="line"><a name="l00086"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#af29eddb9363c78a211c21cf9978b9757"> 86</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_CSIZE_CSIZE_32KB_Val _U_(0x5) </span></div>
<div class="line"><a name="l00087"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a6d5457be887f4985cb2b131d0e6d3c0f"> 87</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_CSIZE_CSIZE_64KB_Val _U_(0x6) </span></div>
<div class="line"><a name="l00088"></a><span class="lineno"> 88</span>&#160;<span class="preprocessor">#define CMCC_TYPE_CSIZE_CSIZE_1KB (CMCC_TYPE_CSIZE_CSIZE_1KB_Val &lt;&lt; CMCC_TYPE_CSIZE_Pos)</span></div>
<div class="line"><a name="l00089"></a><span class="lineno"> 89</span>&#160;<span class="preprocessor">#define CMCC_TYPE_CSIZE_CSIZE_2KB (CMCC_TYPE_CSIZE_CSIZE_2KB_Val &lt;&lt; CMCC_TYPE_CSIZE_Pos)</span></div>
<div class="line"><a name="l00090"></a><span class="lineno"> 90</span>&#160;<span class="preprocessor">#define CMCC_TYPE_CSIZE_CSIZE_4KB (CMCC_TYPE_CSIZE_CSIZE_4KB_Val &lt;&lt; CMCC_TYPE_CSIZE_Pos)</span></div>
<div class="line"><a name="l00091"></a><span class="lineno"> 91</span>&#160;<span class="preprocessor">#define CMCC_TYPE_CSIZE_CSIZE_8KB (CMCC_TYPE_CSIZE_CSIZE_8KB_Val &lt;&lt; CMCC_TYPE_CSIZE_Pos)</span></div>
<div class="line"><a name="l00092"></a><span class="lineno"> 92</span>&#160;<span class="preprocessor">#define CMCC_TYPE_CSIZE_CSIZE_16KB (CMCC_TYPE_CSIZE_CSIZE_16KB_Val &lt;&lt; CMCC_TYPE_CSIZE_Pos)</span></div>
<div class="line"><a name="l00093"></a><span class="lineno"> 93</span>&#160;<span class="preprocessor">#define CMCC_TYPE_CSIZE_CSIZE_32KB (CMCC_TYPE_CSIZE_CSIZE_32KB_Val &lt;&lt; CMCC_TYPE_CSIZE_Pos)</span></div>
<div class="line"><a name="l00094"></a><span class="lineno"> 94</span>&#160;<span class="preprocessor">#define CMCC_TYPE_CSIZE_CSIZE_64KB (CMCC_TYPE_CSIZE_CSIZE_64KB_Val &lt;&lt; CMCC_TYPE_CSIZE_Pos)</span></div>
<div class="line"><a name="l00095"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a427619bf7775ab0a90efd51a8838d5df"> 95</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_CLSIZE_Pos 11 </span></div>
<div class="line"><a name="l00096"></a><span class="lineno"> 96</span>&#160;<span class="preprocessor">#define CMCC_TYPE_CLSIZE_Msk (_U_(0x7) &lt;&lt; CMCC_TYPE_CLSIZE_Pos)</span></div>
<div class="line"><a name="l00097"></a><span class="lineno"> 97</span>&#160;<span class="preprocessor">#define CMCC_TYPE_CLSIZE(value) (CMCC_TYPE_CLSIZE_Msk &amp; ((value) &lt;&lt; CMCC_TYPE_CLSIZE_Pos))</span></div>
<div class="line"><a name="l00098"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a2342b4248b0e5f669140aaa2db225de6"> 98</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_CLSIZE_CLSIZE_4B_Val _U_(0x0) </span></div>
<div class="line"><a name="l00099"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a5fb0f3dc4e8e65f138c2bb7d8c065863"> 99</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_CLSIZE_CLSIZE_8B_Val _U_(0x1) </span></div>
<div class="line"><a name="l00100"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a943552c185a4c137daad598cda5bce16"> 100</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_CLSIZE_CLSIZE_16B_Val _U_(0x2) </span></div>
<div class="line"><a name="l00101"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#aece490aaf3c53892f48b98f8ab539693"> 101</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_CLSIZE_CLSIZE_32B_Val _U_(0x3) </span></div>
<div class="line"><a name="l00102"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a0e91a268ab1548c54eab05291ddacae8"> 102</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_CLSIZE_CLSIZE_64B_Val _U_(0x4) </span></div>
<div class="line"><a name="l00103"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#af6a2ce3067cac4c85c73515a93434e3a"> 103</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_CLSIZE_CLSIZE_128B_Val _U_(0x5) </span></div>
<div class="line"><a name="l00104"></a><span class="lineno"> 104</span>&#160;<span class="preprocessor">#define CMCC_TYPE_CLSIZE_CLSIZE_4B (CMCC_TYPE_CLSIZE_CLSIZE_4B_Val &lt;&lt; CMCC_TYPE_CLSIZE_Pos)</span></div>
<div class="line"><a name="l00105"></a><span class="lineno"> 105</span>&#160;<span class="preprocessor">#define CMCC_TYPE_CLSIZE_CLSIZE_8B (CMCC_TYPE_CLSIZE_CLSIZE_8B_Val &lt;&lt; CMCC_TYPE_CLSIZE_Pos)</span></div>
<div class="line"><a name="l00106"></a><span class="lineno"> 106</span>&#160;<span class="preprocessor">#define CMCC_TYPE_CLSIZE_CLSIZE_16B (CMCC_TYPE_CLSIZE_CLSIZE_16B_Val &lt;&lt; CMCC_TYPE_CLSIZE_Pos)</span></div>
<div class="line"><a name="l00107"></a><span class="lineno"> 107</span>&#160;<span class="preprocessor">#define CMCC_TYPE_CLSIZE_CLSIZE_32B (CMCC_TYPE_CLSIZE_CLSIZE_32B_Val &lt;&lt; CMCC_TYPE_CLSIZE_Pos)</span></div>
<div class="line"><a name="l00108"></a><span class="lineno"> 108</span>&#160;<span class="preprocessor">#define CMCC_TYPE_CLSIZE_CLSIZE_64B (CMCC_TYPE_CLSIZE_CLSIZE_64B_Val &lt;&lt; CMCC_TYPE_CLSIZE_Pos)</span></div>
<div class="line"><a name="l00109"></a><span class="lineno"> 109</span>&#160;<span class="preprocessor">#define CMCC_TYPE_CLSIZE_CLSIZE_128B (CMCC_TYPE_CLSIZE_CLSIZE_128B_Val &lt;&lt; CMCC_TYPE_CLSIZE_Pos)</span></div>
<div class="line"><a name="l00110"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a3eb12c62370e8ab2c57d42640fcdb8b2"> 110</a></span>&#160;<span class="preprocessor">#define CMCC_TYPE_MASK _U_(0x00003FF2) </span></div>
<div class="line"><a name="l00112"></a><span class="lineno"> 112</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- CMCC_CFG : (CMCC Offset: 0x04) (R/W 32) Cache Configuration Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00113"></a><span class="lineno"> 113</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00114"></a><span class="lineno"><a class="line" href="unionCMCC__CFG__Type.html"> 114</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00115"></a><span class="lineno"> 115</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00116"></a><span class="lineno"><a class="line" href="unionCMCC__CFG__Type.html#a6bfa72fb2bdd6f2de30871b4d2e3868d"> 116</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00117"></a><span class="lineno"><a class="line" href="unionCMCC__CFG__Type.html#a9907cf806f1913b0275fb4b88eb0ab2b"> 117</a></span>&#160; uint32_t <a class="code" href="unionCMCC__CFG__Type.html#a9907cf806f1913b0275fb4b88eb0ab2b">ICDIS</a>:1; </div>
<div class="line"><a name="l00118"></a><span class="lineno"><a class="line" href="unionCMCC__CFG__Type.html#a981404663436999d0ad09cfae5465e41"> 118</a></span>&#160; uint32_t <a class="code" href="unionCMCC__CFG__Type.html#a981404663436999d0ad09cfae5465e41">DCDIS</a>:1; </div>
<div class="line"><a name="l00119"></a><span class="lineno"><a class="line" href="unionCMCC__CFG__Type.html#a8a35c409488c291d03e80555f5e83f84"> 119</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00120"></a><span class="lineno"><a class="line" href="unionCMCC__CFG__Type.html#a01e26bfeb199c4c73660e39d0327a431"> 120</a></span>&#160; uint32_t <a class="code" href="unionCMCC__CFG__Type.html#a01e26bfeb199c4c73660e39d0327a431">CSIZESW</a>:3; </div>
<div class="line"><a name="l00121"></a><span class="lineno"><a class="line" href="unionCMCC__CFG__Type.html#a57b4da97e7856672611f178068c1abdd"> 121</a></span>&#160; uint32_t :25; </div>
<div class="line"><a name="l00122"></a><span class="lineno"><a class="line" href="unionCMCC__CFG__Type.html#ab51d4c1573dfb75271ffb0a1d1a89180"> 122</a></span>&#160; } bit; </div>
<div class="line"><a name="l00123"></a><span class="lineno"><a class="line" href="unionCMCC__CFG__Type.html#ada44b76950176be4dd43fb912961be92"> 123</a></span>&#160; uint32_t <a class="code" href="unionCMCC__CFG__Type.html#ada44b76950176be4dd43fb912961be92">reg</a>; </div>
<div class="line"><a name="l00124"></a><span class="lineno"> 124</span>&#160;} <a class="code" href="unionCMCC__CFG__Type.html">CMCC_CFG_Type</a>;</div>
<div class="line"><a name="l00125"></a><span class="lineno"> 125</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00126"></a><span class="lineno"> 126</span>&#160; </div>
<div class="line"><a name="l00127"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a76abf3768aaa0bcc2c9166cd94cb1f3a"> 127</a></span>&#160;<span class="preprocessor">#define CMCC_CFG_OFFSET 0x04 </span></div>
<div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a31ff4f356cf4b54e3c7f889600918fe2"> 128</a></span>&#160;<span class="preprocessor">#define CMCC_CFG_RESETVALUE _U_(0x00000020) </span></div>
<div class="line"><a name="l00130"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a1a01f0463370f5cf4141c5f5a2bbae89"> 130</a></span>&#160;<span class="preprocessor">#define CMCC_CFG_ICDIS_Pos 1 </span></div>
<div class="line"><a name="l00131"></a><span class="lineno"> 131</span>&#160;<span class="preprocessor">#define CMCC_CFG_ICDIS (_U_(0x1) &lt;&lt; CMCC_CFG_ICDIS_Pos)</span></div>
<div class="line"><a name="l00132"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#af7b0bbcc86f07b84720004fbbf2baffb"> 132</a></span>&#160;<span class="preprocessor">#define CMCC_CFG_DCDIS_Pos 2 </span></div>
<div class="line"><a name="l00133"></a><span class="lineno"> 133</span>&#160;<span class="preprocessor">#define CMCC_CFG_DCDIS (_U_(0x1) &lt;&lt; CMCC_CFG_DCDIS_Pos)</span></div>
<div class="line"><a name="l00134"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#aa1eeae270735d268390e2b3f3b4eaa62"> 134</a></span>&#160;<span class="preprocessor">#define CMCC_CFG_CSIZESW_Pos 4 </span></div>
<div class="line"><a name="l00135"></a><span class="lineno"> 135</span>&#160;<span class="preprocessor">#define CMCC_CFG_CSIZESW_Msk (_U_(0x7) &lt;&lt; CMCC_CFG_CSIZESW_Pos)</span></div>
<div class="line"><a name="l00136"></a><span class="lineno"> 136</span>&#160;<span class="preprocessor">#define CMCC_CFG_CSIZESW(value) (CMCC_CFG_CSIZESW_Msk &amp; ((value) &lt;&lt; CMCC_CFG_CSIZESW_Pos))</span></div>
<div class="line"><a name="l00137"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a6346cf89a40533656bab068c403da173"> 137</a></span>&#160;<span class="preprocessor">#define CMCC_CFG_CSIZESW_CONF_CSIZE_1KB_Val _U_(0x0) </span></div>
<div class="line"><a name="l00138"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a2842b182b4cb4aeebab303a493fba176"> 138</a></span>&#160;<span class="preprocessor">#define CMCC_CFG_CSIZESW_CONF_CSIZE_2KB_Val _U_(0x1) </span></div>
<div class="line"><a name="l00139"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a4dac0fae31032e7fe3a45816b7a8099c"> 139</a></span>&#160;<span class="preprocessor">#define CMCC_CFG_CSIZESW_CONF_CSIZE_4KB_Val _U_(0x2) </span></div>
<div class="line"><a name="l00140"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a3d127c89e98bde6f3d5b8edd087a48ee"> 140</a></span>&#160;<span class="preprocessor">#define CMCC_CFG_CSIZESW_CONF_CSIZE_8KB_Val _U_(0x3) </span></div>
<div class="line"><a name="l00141"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a4e3a8c639977ce43caab50557ba7c87d"> 141</a></span>&#160;<span class="preprocessor">#define CMCC_CFG_CSIZESW_CONF_CSIZE_16KB_Val _U_(0x4) </span></div>
<div class="line"><a name="l00142"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#ac848a5a51eeda5ba7f17510bc61c5d09"> 142</a></span>&#160;<span class="preprocessor">#define CMCC_CFG_CSIZESW_CONF_CSIZE_32KB_Val _U_(0x5) </span></div>
<div class="line"><a name="l00143"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a74ef93c2451fcb9ad08cd2bee568b763"> 143</a></span>&#160;<span class="preprocessor">#define CMCC_CFG_CSIZESW_CONF_CSIZE_64KB_Val _U_(0x6) </span></div>
<div class="line"><a name="l00144"></a><span class="lineno"> 144</span>&#160;<span class="preprocessor">#define CMCC_CFG_CSIZESW_CONF_CSIZE_1KB (CMCC_CFG_CSIZESW_CONF_CSIZE_1KB_Val &lt;&lt; CMCC_CFG_CSIZESW_Pos)</span></div>
<div class="line"><a name="l00145"></a><span class="lineno"> 145</span>&#160;<span class="preprocessor">#define CMCC_CFG_CSIZESW_CONF_CSIZE_2KB (CMCC_CFG_CSIZESW_CONF_CSIZE_2KB_Val &lt;&lt; CMCC_CFG_CSIZESW_Pos)</span></div>
<div class="line"><a name="l00146"></a><span class="lineno"> 146</span>&#160;<span class="preprocessor">#define CMCC_CFG_CSIZESW_CONF_CSIZE_4KB (CMCC_CFG_CSIZESW_CONF_CSIZE_4KB_Val &lt;&lt; CMCC_CFG_CSIZESW_Pos)</span></div>
<div class="line"><a name="l00147"></a><span class="lineno"> 147</span>&#160;<span class="preprocessor">#define CMCC_CFG_CSIZESW_CONF_CSIZE_8KB (CMCC_CFG_CSIZESW_CONF_CSIZE_8KB_Val &lt;&lt; CMCC_CFG_CSIZESW_Pos)</span></div>
<div class="line"><a name="l00148"></a><span class="lineno"> 148</span>&#160;<span class="preprocessor">#define CMCC_CFG_CSIZESW_CONF_CSIZE_16KB (CMCC_CFG_CSIZESW_CONF_CSIZE_16KB_Val &lt;&lt; CMCC_CFG_CSIZESW_Pos)</span></div>
<div class="line"><a name="l00149"></a><span class="lineno"> 149</span>&#160;<span class="preprocessor">#define CMCC_CFG_CSIZESW_CONF_CSIZE_32KB (CMCC_CFG_CSIZESW_CONF_CSIZE_32KB_Val &lt;&lt; CMCC_CFG_CSIZESW_Pos)</span></div>
<div class="line"><a name="l00150"></a><span class="lineno"> 150</span>&#160;<span class="preprocessor">#define CMCC_CFG_CSIZESW_CONF_CSIZE_64KB (CMCC_CFG_CSIZESW_CONF_CSIZE_64KB_Val &lt;&lt; CMCC_CFG_CSIZESW_Pos)</span></div>
<div class="line"><a name="l00151"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a964aefb6507c8bbd686aa1515961db01"> 151</a></span>&#160;<span class="preprocessor">#define CMCC_CFG_MASK _U_(0x00000076) </span></div>
<div class="line"><a name="l00153"></a><span class="lineno"> 153</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- CMCC_CTRL : (CMCC Offset: 0x08) ( /W 32) Cache Control Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00154"></a><span class="lineno"> 154</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00155"></a><span class="lineno"><a class="line" href="unionCMCC__CTRL__Type.html"> 155</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00156"></a><span class="lineno"> 156</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00157"></a><span class="lineno"><a class="line" href="unionCMCC__CTRL__Type.html#a9012f18bdaa67974355e8f42a3b7c019"> 157</a></span>&#160; uint32_t <a class="code" href="unionCMCC__CTRL__Type.html#a9012f18bdaa67974355e8f42a3b7c019">CEN</a>:1; </div>
<div class="line"><a name="l00158"></a><span class="lineno"><a class="line" href="unionCMCC__CTRL__Type.html#a16a08edb9311295261b0c4f6fb4ab4b8"> 158</a></span>&#160; uint32_t :31; </div>
<div class="line"><a name="l00159"></a><span class="lineno"><a class="line" href="unionCMCC__CTRL__Type.html#a69148925260d03059bfd5c8762241ff1"> 159</a></span>&#160; } bit; </div>
<div class="line"><a name="l00160"></a><span class="lineno"><a class="line" href="unionCMCC__CTRL__Type.html#a78d20cb1fc915f0475fcd3a5462a790e"> 160</a></span>&#160; uint32_t <a class="code" href="unionCMCC__CTRL__Type.html#a78d20cb1fc915f0475fcd3a5462a790e">reg</a>; </div>
<div class="line"><a name="l00161"></a><span class="lineno"> 161</span>&#160;} <a class="code" href="unionCMCC__CTRL__Type.html">CMCC_CTRL_Type</a>;</div>
<div class="line"><a name="l00162"></a><span class="lineno"> 162</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00163"></a><span class="lineno"> 163</span>&#160; </div>
<div class="line"><a name="l00164"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a1c40c6890eb8d1136c01f2e077960520"> 164</a></span>&#160;<span class="preprocessor">#define CMCC_CTRL_OFFSET 0x08 </span></div>
<div class="line"><a name="l00165"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a23e8a4d94f9cffe75f8091024550a7bf"> 165</a></span>&#160;<span class="preprocessor">#define CMCC_CTRL_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00167"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#aa46ac835e7410b4ca7cc83f6deace741"> 167</a></span>&#160;<span class="preprocessor">#define CMCC_CTRL_CEN_Pos 0 </span></div>
<div class="line"><a name="l00168"></a><span class="lineno"> 168</span>&#160;<span class="preprocessor">#define CMCC_CTRL_CEN (_U_(0x1) &lt;&lt; CMCC_CTRL_CEN_Pos)</span></div>
<div class="line"><a name="l00169"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a68003beb067b535aee576899282684ee"> 169</a></span>&#160;<span class="preprocessor">#define CMCC_CTRL_MASK _U_(0x00000001) </span></div>
<div class="line"><a name="l00171"></a><span class="lineno"> 171</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- CMCC_SR : (CMCC Offset: 0x0C) (R/ 32) Cache Status Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00172"></a><span class="lineno"> 172</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00173"></a><span class="lineno"><a class="line" href="unionCMCC__SR__Type.html"> 173</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00174"></a><span class="lineno"> 174</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00175"></a><span class="lineno"><a class="line" href="unionCMCC__SR__Type.html#ae17c73e40d8c38ca6482e25f6bea9055"> 175</a></span>&#160; uint32_t <a class="code" href="unionCMCC__SR__Type.html#ae17c73e40d8c38ca6482e25f6bea9055">CSTS</a>:1; </div>
<div class="line"><a name="l00176"></a><span class="lineno"><a class="line" href="unionCMCC__SR__Type.html#ae59845774d9eb4351ab9fb85cef49a14"> 176</a></span>&#160; uint32_t :31; </div>
<div class="line"><a name="l00177"></a><span class="lineno"><a class="line" href="unionCMCC__SR__Type.html#a61e393a453266ae79c6b17032fef9aa5"> 177</a></span>&#160; } bit; </div>
<div class="line"><a name="l00178"></a><span class="lineno"><a class="line" href="unionCMCC__SR__Type.html#a6be423b4bb0f6ceaad18f4d9797a3527"> 178</a></span>&#160; uint32_t <a class="code" href="unionCMCC__SR__Type.html#a6be423b4bb0f6ceaad18f4d9797a3527">reg</a>; </div>
<div class="line"><a name="l00179"></a><span class="lineno"> 179</span>&#160;} <a class="code" href="unionCMCC__SR__Type.html">CMCC_SR_Type</a>;</div>
<div class="line"><a name="l00180"></a><span class="lineno"> 180</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00181"></a><span class="lineno"> 181</span>&#160; </div>
<div class="line"><a name="l00182"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#afc80682870ea0d1268d24f21cb63d8f2"> 182</a></span>&#160;<span class="preprocessor">#define CMCC_SR_OFFSET 0x0C </span></div>
<div class="line"><a name="l00183"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a74d11b4f9aea7a95863ee76b1b320644"> 183</a></span>&#160;<span class="preprocessor">#define CMCC_SR_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00185"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a7bbff68a40afb7b99efd16a8aa55bf6d"> 185</a></span>&#160;<span class="preprocessor">#define CMCC_SR_CSTS_Pos 0 </span></div>
<div class="line"><a name="l00186"></a><span class="lineno"> 186</span>&#160;<span class="preprocessor">#define CMCC_SR_CSTS (_U_(0x1) &lt;&lt; CMCC_SR_CSTS_Pos)</span></div>
<div class="line"><a name="l00187"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#aa5ddc47674b6ddd4950483467009e870"> 187</a></span>&#160;<span class="preprocessor">#define CMCC_SR_MASK _U_(0x00000001) </span></div>
<div class="line"><a name="l00189"></a><span class="lineno"> 189</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- CMCC_LCKWAY : (CMCC Offset: 0x10) (R/W 32) Cache Lock per Way Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00190"></a><span class="lineno"> 190</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00191"></a><span class="lineno"><a class="line" href="unionCMCC__LCKWAY__Type.html"> 191</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00192"></a><span class="lineno"> 192</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00193"></a><span class="lineno"><a class="line" href="unionCMCC__LCKWAY__Type.html#aab6d6f12b17ed73e34ae768ff0564478"> 193</a></span>&#160; uint32_t <a class="code" href="unionCMCC__LCKWAY__Type.html#aab6d6f12b17ed73e34ae768ff0564478">LCKWAY</a>:4; </div>
<div class="line"><a name="l00194"></a><span class="lineno"><a class="line" href="unionCMCC__LCKWAY__Type.html#a9bce83d5b5637d586aee448485c82364"> 194</a></span>&#160; uint32_t :28; </div>
<div class="line"><a name="l00195"></a><span class="lineno"><a class="line" href="unionCMCC__LCKWAY__Type.html#a73e10f579ff8c09e2f50e28b87441ac8"> 195</a></span>&#160; } bit; </div>
<div class="line"><a name="l00196"></a><span class="lineno"><a class="line" href="unionCMCC__LCKWAY__Type.html#af5a76282cf118b47c9308f3acaba3699"> 196</a></span>&#160; uint32_t <a class="code" href="unionCMCC__LCKWAY__Type.html#af5a76282cf118b47c9308f3acaba3699">reg</a>; </div>
<div class="line"><a name="l00197"></a><span class="lineno"> 197</span>&#160;} <a class="code" href="unionCMCC__LCKWAY__Type.html">CMCC_LCKWAY_Type</a>;</div>
<div class="line"><a name="l00198"></a><span class="lineno"> 198</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00199"></a><span class="lineno"> 199</span>&#160; </div>
<div class="line"><a name="l00200"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a0221440b2b94a1c5a8ed376ff0882b4e"> 200</a></span>&#160;<span class="preprocessor">#define CMCC_LCKWAY_OFFSET 0x10 </span></div>
<div class="line"><a name="l00201"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#acf2bf0fd51366d65f78200fb96319610"> 201</a></span>&#160;<span class="preprocessor">#define CMCC_LCKWAY_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00203"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a896b91ca6fa1d2fc6237a8577157654a"> 203</a></span>&#160;<span class="preprocessor">#define CMCC_LCKWAY_LCKWAY_Pos 0 </span></div>
<div class="line"><a name="l00204"></a><span class="lineno"> 204</span>&#160;<span class="preprocessor">#define CMCC_LCKWAY_LCKWAY_Msk (_U_(0xF) &lt;&lt; CMCC_LCKWAY_LCKWAY_Pos)</span></div>
<div class="line"><a name="l00205"></a><span class="lineno"> 205</span>&#160;<span class="preprocessor">#define CMCC_LCKWAY_LCKWAY(value) (CMCC_LCKWAY_LCKWAY_Msk &amp; ((value) &lt;&lt; CMCC_LCKWAY_LCKWAY_Pos))</span></div>
<div class="line"><a name="l00206"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a4a945351e3699a49ca0a5b878cfa1c2d"> 206</a></span>&#160;<span class="preprocessor">#define CMCC_LCKWAY_MASK _U_(0x0000000F) </span></div>
<div class="line"><a name="l00208"></a><span class="lineno"> 208</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- CMCC_MAINT0 : (CMCC Offset: 0x20) ( /W 32) Cache Maintenance Register 0 -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00209"></a><span class="lineno"> 209</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00210"></a><span class="lineno"><a class="line" href="unionCMCC__MAINT0__Type.html"> 210</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00211"></a><span class="lineno"> 211</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00212"></a><span class="lineno"><a class="line" href="unionCMCC__MAINT0__Type.html#a001d85c5601ace2b71c2e2f5503fee4b"> 212</a></span>&#160; uint32_t <a class="code" href="unionCMCC__MAINT0__Type.html#a001d85c5601ace2b71c2e2f5503fee4b">INVALL</a>:1; </div>
<div class="line"><a name="l00213"></a><span class="lineno"><a class="line" href="unionCMCC__MAINT0__Type.html#ab02fb0aed4d0c8c66d5f952a33df9581"> 213</a></span>&#160; uint32_t :31; </div>
<div class="line"><a name="l00214"></a><span class="lineno"><a class="line" href="unionCMCC__MAINT0__Type.html#af7c76e46642a837afd0def05a551d33a"> 214</a></span>&#160; } bit; </div>
<div class="line"><a name="l00215"></a><span class="lineno"><a class="line" href="unionCMCC__MAINT0__Type.html#acc057586228e32919d7daec7569eed2b"> 215</a></span>&#160; uint32_t <a class="code" href="unionCMCC__MAINT0__Type.html#acc057586228e32919d7daec7569eed2b">reg</a>; </div>
<div class="line"><a name="l00216"></a><span class="lineno"> 216</span>&#160;} <a class="code" href="unionCMCC__MAINT0__Type.html">CMCC_MAINT0_Type</a>;</div>
<div class="line"><a name="l00217"></a><span class="lineno"> 217</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00218"></a><span class="lineno"> 218</span>&#160; </div>
<div class="line"><a name="l00219"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#abd56aca6ff48aeb9c0b23647d56b65e3"> 219</a></span>&#160;<span class="preprocessor">#define CMCC_MAINT0_OFFSET 0x20 </span></div>
<div class="line"><a name="l00220"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a0797a3a0e1c44e0ac8d822ba1bd92074"> 220</a></span>&#160;<span class="preprocessor">#define CMCC_MAINT0_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00222"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a846a14dc3882a91b834d9620a93dc9dc"> 222</a></span>&#160;<span class="preprocessor">#define CMCC_MAINT0_INVALL_Pos 0 </span></div>
<div class="line"><a name="l00223"></a><span class="lineno"> 223</span>&#160;<span class="preprocessor">#define CMCC_MAINT0_INVALL (_U_(0x1) &lt;&lt; CMCC_MAINT0_INVALL_Pos)</span></div>
<div class="line"><a name="l00224"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#af5df9e2c7604a8fedc53597a6a4a97c3"> 224</a></span>&#160;<span class="preprocessor">#define CMCC_MAINT0_MASK _U_(0x00000001) </span></div>
<div class="line"><a name="l00226"></a><span class="lineno"> 226</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- CMCC_MAINT1 : (CMCC Offset: 0x24) ( /W 32) Cache Maintenance Register 1 -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00227"></a><span class="lineno"> 227</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00228"></a><span class="lineno"><a class="line" href="unionCMCC__MAINT1__Type.html"> 228</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00229"></a><span class="lineno"> 229</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00230"></a><span class="lineno"><a class="line" href="unionCMCC__MAINT1__Type.html#a2e8cf2e6502fe67fa875b3fc3588a9c2"> 230</a></span>&#160; uint32_t :4; </div>
<div class="line"><a name="l00231"></a><span class="lineno"><a class="line" href="unionCMCC__MAINT1__Type.html#a05c3bdba1cf4afd405c548128f0e318a"> 231</a></span>&#160; uint32_t <a class="code" href="unionCMCC__MAINT1__Type.html#a05c3bdba1cf4afd405c548128f0e318a">INDEX</a>:8; </div>
<div class="line"><a name="l00232"></a><span class="lineno"><a class="line" href="unionCMCC__MAINT1__Type.html#a8d7a2d1be0149c026a8a23a1793e4dfd"> 232</a></span>&#160; uint32_t :16; </div>
<div class="line"><a name="l00233"></a><span class="lineno"><a class="line" href="unionCMCC__MAINT1__Type.html#aff428b3aaee8363b9a5fceedb9395a48"> 233</a></span>&#160; uint32_t <a class="code" href="unionCMCC__MAINT1__Type.html#aff428b3aaee8363b9a5fceedb9395a48">WAY</a>:4; </div>
<div class="line"><a name="l00234"></a><span class="lineno"><a class="line" href="unionCMCC__MAINT1__Type.html#a00d4e2fad14185def3f98d86c39f8bf7"> 234</a></span>&#160; } bit; </div>
<div class="line"><a name="l00235"></a><span class="lineno"><a class="line" href="unionCMCC__MAINT1__Type.html#ab94bbd2ac87b621a84e4ae11276c785d"> 235</a></span>&#160; uint32_t <a class="code" href="unionCMCC__MAINT1__Type.html#ab94bbd2ac87b621a84e4ae11276c785d">reg</a>; </div>
<div class="line"><a name="l00236"></a><span class="lineno"> 236</span>&#160;} <a class="code" href="unionCMCC__MAINT1__Type.html">CMCC_MAINT1_Type</a>;</div>
<div class="line"><a name="l00237"></a><span class="lineno"> 237</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00238"></a><span class="lineno"> 238</span>&#160; </div>
<div class="line"><a name="l00239"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a2896788cc7e8df1f7b644dd407633ea6"> 239</a></span>&#160;<span class="preprocessor">#define CMCC_MAINT1_OFFSET 0x24 </span></div>
<div class="line"><a name="l00240"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#aa96102dd1002108c74c72669e4d87102"> 240</a></span>&#160;<span class="preprocessor">#define CMCC_MAINT1_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00242"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#af77b32ecf9cc53e26475c79bacb831d9"> 242</a></span>&#160;<span class="preprocessor">#define CMCC_MAINT1_INDEX_Pos 4 </span></div>
<div class="line"><a name="l00243"></a><span class="lineno"> 243</span>&#160;<span class="preprocessor">#define CMCC_MAINT1_INDEX_Msk (_U_(0xFF) &lt;&lt; CMCC_MAINT1_INDEX_Pos)</span></div>
<div class="line"><a name="l00244"></a><span class="lineno"> 244</span>&#160;<span class="preprocessor">#define CMCC_MAINT1_INDEX(value) (CMCC_MAINT1_INDEX_Msk &amp; ((value) &lt;&lt; CMCC_MAINT1_INDEX_Pos))</span></div>
<div class="line"><a name="l00245"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#ab558e70417bf1e1cda667b35bc33d110"> 245</a></span>&#160;<span class="preprocessor">#define CMCC_MAINT1_WAY_Pos 28 </span></div>
<div class="line"><a name="l00246"></a><span class="lineno"> 246</span>&#160;<span class="preprocessor">#define CMCC_MAINT1_WAY_Msk (_U_(0xF) &lt;&lt; CMCC_MAINT1_WAY_Pos)</span></div>
<div class="line"><a name="l00247"></a><span class="lineno"> 247</span>&#160;<span class="preprocessor">#define CMCC_MAINT1_WAY(value) (CMCC_MAINT1_WAY_Msk &amp; ((value) &lt;&lt; CMCC_MAINT1_WAY_Pos))</span></div>
<div class="line"><a name="l00248"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#aa3afc8c8bd6abd23bb6955302287bc5b"> 248</a></span>&#160;<span class="preprocessor">#define CMCC_MAINT1_WAY_WAY0_Val _U_(0x0) </span></div>
<div class="line"><a name="l00249"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#ac206bb2262e4c6d3f5b2dc9fc97a989c"> 249</a></span>&#160;<span class="preprocessor">#define CMCC_MAINT1_WAY_WAY1_Val _U_(0x1) </span></div>
<div class="line"><a name="l00250"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#ad64297c0bc408d6c1b774eb181a7e48d"> 250</a></span>&#160;<span class="preprocessor">#define CMCC_MAINT1_WAY_WAY2_Val _U_(0x2) </span></div>
<div class="line"><a name="l00251"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a4e8246db5e421699abbfe2f6c357eb9e"> 251</a></span>&#160;<span class="preprocessor">#define CMCC_MAINT1_WAY_WAY3_Val _U_(0x3) </span></div>
<div class="line"><a name="l00252"></a><span class="lineno"> 252</span>&#160;<span class="preprocessor">#define CMCC_MAINT1_WAY_WAY0 (CMCC_MAINT1_WAY_WAY0_Val &lt;&lt; CMCC_MAINT1_WAY_Pos)</span></div>
<div class="line"><a name="l00253"></a><span class="lineno"> 253</span>&#160;<span class="preprocessor">#define CMCC_MAINT1_WAY_WAY1 (CMCC_MAINT1_WAY_WAY1_Val &lt;&lt; CMCC_MAINT1_WAY_Pos)</span></div>
<div class="line"><a name="l00254"></a><span class="lineno"> 254</span>&#160;<span class="preprocessor">#define CMCC_MAINT1_WAY_WAY2 (CMCC_MAINT1_WAY_WAY2_Val &lt;&lt; CMCC_MAINT1_WAY_Pos)</span></div>
<div class="line"><a name="l00255"></a><span class="lineno"> 255</span>&#160;<span class="preprocessor">#define CMCC_MAINT1_WAY_WAY3 (CMCC_MAINT1_WAY_WAY3_Val &lt;&lt; CMCC_MAINT1_WAY_Pos)</span></div>
<div class="line"><a name="l00256"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a0f89cd0e94679de6309ebccf4dd5c4f8"> 256</a></span>&#160;<span class="preprocessor">#define CMCC_MAINT1_MASK _U_(0xF0000FF0) </span></div>
<div class="line"><a name="l00258"></a><span class="lineno"> 258</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- CMCC_MCFG : (CMCC Offset: 0x28) (R/W 32) Cache Monitor Configuration Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00259"></a><span class="lineno"> 259</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00260"></a><span class="lineno"><a class="line" href="unionCMCC__MCFG__Type.html"> 260</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00261"></a><span class="lineno"> 261</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00262"></a><span class="lineno"><a class="line" href="unionCMCC__MCFG__Type.html#aee931ba78eb83e697fad986a4130e510"> 262</a></span>&#160; uint32_t <a class="code" href="unionCMCC__MCFG__Type.html#aee931ba78eb83e697fad986a4130e510">MODE</a>:2; </div>
<div class="line"><a name="l00263"></a><span class="lineno"><a class="line" href="unionCMCC__MCFG__Type.html#aa4a4d2d78e7cf8850db76961ed6f5293"> 263</a></span>&#160; uint32_t :30; </div>
<div class="line"><a name="l00264"></a><span class="lineno"><a class="line" href="unionCMCC__MCFG__Type.html#a648fb28dc7e2d3bccb4f82cad2b6f2ff"> 264</a></span>&#160; } bit; </div>
<div class="line"><a name="l00265"></a><span class="lineno"><a class="line" href="unionCMCC__MCFG__Type.html#a990fcd03e91e1366cb06ec002ac04469"> 265</a></span>&#160; uint32_t <a class="code" href="unionCMCC__MCFG__Type.html#a990fcd03e91e1366cb06ec002ac04469">reg</a>; </div>
<div class="line"><a name="l00266"></a><span class="lineno"> 266</span>&#160;} <a class="code" href="unionCMCC__MCFG__Type.html">CMCC_MCFG_Type</a>;</div>
<div class="line"><a name="l00267"></a><span class="lineno"> 267</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00268"></a><span class="lineno"> 268</span>&#160; </div>
<div class="line"><a name="l00269"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a3d71f7fcc57c8169f6f52fd0dad9d1af"> 269</a></span>&#160;<span class="preprocessor">#define CMCC_MCFG_OFFSET 0x28 </span></div>
<div class="line"><a name="l00270"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a18900cf4e319352c0bdad36552329eea"> 270</a></span>&#160;<span class="preprocessor">#define CMCC_MCFG_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00272"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a8f5a8dc197ff7eacddc8f4fc140c70d9"> 272</a></span>&#160;<span class="preprocessor">#define CMCC_MCFG_MODE_Pos 0 </span></div>
<div class="line"><a name="l00273"></a><span class="lineno"> 273</span>&#160;<span class="preprocessor">#define CMCC_MCFG_MODE_Msk (_U_(0x3) &lt;&lt; CMCC_MCFG_MODE_Pos)</span></div>
<div class="line"><a name="l00274"></a><span class="lineno"> 274</span>&#160;<span class="preprocessor">#define CMCC_MCFG_MODE(value) (CMCC_MCFG_MODE_Msk &amp; ((value) &lt;&lt; CMCC_MCFG_MODE_Pos))</span></div>
<div class="line"><a name="l00275"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#ae88e77b261ad27607725d1ee1c65ef2a"> 275</a></span>&#160;<span class="preprocessor">#define CMCC_MCFG_MODE_CYCLE_COUNT_Val _U_(0x0) </span></div>
<div class="line"><a name="l00276"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a84afacbd52a58f73ed03eccbc83614c7"> 276</a></span>&#160;<span class="preprocessor">#define CMCC_MCFG_MODE_IHIT_COUNT_Val _U_(0x1) </span></div>
<div class="line"><a name="l00277"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a2c79b4b53faaec07e3ab8b378ef0fd28"> 277</a></span>&#160;<span class="preprocessor">#define CMCC_MCFG_MODE_DHIT_COUNT_Val _U_(0x2) </span></div>
<div class="line"><a name="l00278"></a><span class="lineno"> 278</span>&#160;<span class="preprocessor">#define CMCC_MCFG_MODE_CYCLE_COUNT (CMCC_MCFG_MODE_CYCLE_COUNT_Val &lt;&lt; CMCC_MCFG_MODE_Pos)</span></div>
<div class="line"><a name="l00279"></a><span class="lineno"> 279</span>&#160;<span class="preprocessor">#define CMCC_MCFG_MODE_IHIT_COUNT (CMCC_MCFG_MODE_IHIT_COUNT_Val &lt;&lt; CMCC_MCFG_MODE_Pos)</span></div>
<div class="line"><a name="l00280"></a><span class="lineno"> 280</span>&#160;<span class="preprocessor">#define CMCC_MCFG_MODE_DHIT_COUNT (CMCC_MCFG_MODE_DHIT_COUNT_Val &lt;&lt; CMCC_MCFG_MODE_Pos)</span></div>
<div class="line"><a name="l00281"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a03c688c2d32c7ff71a9f9601eee5be87"> 281</a></span>&#160;<span class="preprocessor">#define CMCC_MCFG_MASK _U_(0x00000003) </span></div>
<div class="line"><a name="l00283"></a><span class="lineno"> 283</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- CMCC_MEN : (CMCC Offset: 0x2C) (R/W 32) Cache Monitor Enable Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00284"></a><span class="lineno"> 284</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00285"></a><span class="lineno"><a class="line" href="unionCMCC__MEN__Type.html"> 285</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00286"></a><span class="lineno"> 286</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00287"></a><span class="lineno"><a class="line" href="unionCMCC__MEN__Type.html#a5017cb590c50ab9797a5e15e05dc7700"> 287</a></span>&#160; uint32_t <a class="code" href="unionCMCC__MEN__Type.html#a5017cb590c50ab9797a5e15e05dc7700">MENABLE</a>:1; </div>
<div class="line"><a name="l00288"></a><span class="lineno"><a class="line" href="unionCMCC__MEN__Type.html#ad4ca1ddb3f6195302633e6424882830f"> 288</a></span>&#160; uint32_t :31; </div>
<div class="line"><a name="l00289"></a><span class="lineno"><a class="line" href="unionCMCC__MEN__Type.html#a44c8a33086eb6e6c1afe334ad880cf48"> 289</a></span>&#160; } bit; </div>
<div class="line"><a name="l00290"></a><span class="lineno"><a class="line" href="unionCMCC__MEN__Type.html#a880312b31883559897573bedb2c1e650"> 290</a></span>&#160; uint32_t <a class="code" href="unionCMCC__MEN__Type.html#a880312b31883559897573bedb2c1e650">reg</a>; </div>
<div class="line"><a name="l00291"></a><span class="lineno"> 291</span>&#160;} <a class="code" href="unionCMCC__MEN__Type.html">CMCC_MEN_Type</a>;</div>
<div class="line"><a name="l00292"></a><span class="lineno"> 292</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00293"></a><span class="lineno"> 293</span>&#160; </div>
<div class="line"><a name="l00294"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a92128f9851ca1637e281b2283d4d79b2"> 294</a></span>&#160;<span class="preprocessor">#define CMCC_MEN_OFFSET 0x2C </span></div>
<div class="line"><a name="l00295"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a8dadf19c9875cf049618db0ca56fb92f"> 295</a></span>&#160;<span class="preprocessor">#define CMCC_MEN_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00297"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#af583b3da491f41eee2f89cbe5bb506a0"> 297</a></span>&#160;<span class="preprocessor">#define CMCC_MEN_MENABLE_Pos 0 </span></div>
<div class="line"><a name="l00298"></a><span class="lineno"> 298</span>&#160;<span class="preprocessor">#define CMCC_MEN_MENABLE (_U_(0x1) &lt;&lt; CMCC_MEN_MENABLE_Pos)</span></div>
<div class="line"><a name="l00299"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a3a9ee7367a5d2ea9b24da6f9519670c5"> 299</a></span>&#160;<span class="preprocessor">#define CMCC_MEN_MASK _U_(0x00000001) </span></div>
<div class="line"><a name="l00301"></a><span class="lineno"> 301</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- CMCC_MCTRL : (CMCC Offset: 0x30) ( /W 32) Cache Monitor Control Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00302"></a><span class="lineno"> 302</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00303"></a><span class="lineno"><a class="line" href="unionCMCC__MCTRL__Type.html"> 303</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00304"></a><span class="lineno"> 304</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00305"></a><span class="lineno"><a class="line" href="unionCMCC__MCTRL__Type.html#ad48b27682d9f6c85c2a834e45c236433"> 305</a></span>&#160; uint32_t <a class="code" href="unionCMCC__MCTRL__Type.html#ad48b27682d9f6c85c2a834e45c236433">SWRST</a>:1; </div>
<div class="line"><a name="l00306"></a><span class="lineno"><a class="line" href="unionCMCC__MCTRL__Type.html#a54f24240a2cee81da3ef86754136ad9f"> 306</a></span>&#160; uint32_t :31; </div>
<div class="line"><a name="l00307"></a><span class="lineno"><a class="line" href="unionCMCC__MCTRL__Type.html#a43fcb222f5dc49481fa1d41e59fe36dd"> 307</a></span>&#160; } bit; </div>
<div class="line"><a name="l00308"></a><span class="lineno"><a class="line" href="unionCMCC__MCTRL__Type.html#a7c756b0089f902b86b8f049fa061cf6b"> 308</a></span>&#160; uint32_t <a class="code" href="unionCMCC__MCTRL__Type.html#a7c756b0089f902b86b8f049fa061cf6b">reg</a>; </div>
<div class="line"><a name="l00309"></a><span class="lineno"> 309</span>&#160;} <a class="code" href="unionCMCC__MCTRL__Type.html">CMCC_MCTRL_Type</a>;</div>
<div class="line"><a name="l00310"></a><span class="lineno"> 310</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00311"></a><span class="lineno"> 311</span>&#160; </div>
<div class="line"><a name="l00312"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#afc9fd2d60fc0358874e9e6c1a36a68d2"> 312</a></span>&#160;<span class="preprocessor">#define CMCC_MCTRL_OFFSET 0x30 </span></div>
<div class="line"><a name="l00313"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a45335c51743bab563f9fe15f83dfc78a"> 313</a></span>&#160;<span class="preprocessor">#define CMCC_MCTRL_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00315"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a0d9bafa05a7a5b06e167653013fcd043"> 315</a></span>&#160;<span class="preprocessor">#define CMCC_MCTRL_SWRST_Pos 0 </span></div>
<div class="line"><a name="l00316"></a><span class="lineno"> 316</span>&#160;<span class="preprocessor">#define CMCC_MCTRL_SWRST (_U_(0x1) &lt;&lt; CMCC_MCTRL_SWRST_Pos)</span></div>
<div class="line"><a name="l00317"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#af380f2d34e625dda8ccaae84971e7922"> 317</a></span>&#160;<span class="preprocessor">#define CMCC_MCTRL_MASK _U_(0x00000001) </span></div>
<div class="line"><a name="l00319"></a><span class="lineno"> 319</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- CMCC_MSR : (CMCC Offset: 0x34) (R/ 32) Cache Monitor Status Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00320"></a><span class="lineno"> 320</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00321"></a><span class="lineno"><a class="line" href="unionCMCC__MSR__Type.html"> 321</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00322"></a><span class="lineno"> 322</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00323"></a><span class="lineno"><a class="line" href="unionCMCC__MSR__Type.html#af2a25a473dde5dcfb539f09d47aa954b"> 323</a></span>&#160; uint32_t <a class="code" href="unionCMCC__MSR__Type.html#af2a25a473dde5dcfb539f09d47aa954b">EVENT_CNT</a>:32; </div>
<div class="line"><a name="l00324"></a><span class="lineno"><a class="line" href="unionCMCC__MSR__Type.html#a07c038a10e4ab5d1b7484505365238a8"> 324</a></span>&#160; } bit; </div>
<div class="line"><a name="l00325"></a><span class="lineno"><a class="line" href="unionCMCC__MSR__Type.html#a7b6b7b096faf9e3f7111ce9018ba939f"> 325</a></span>&#160; uint32_t <a class="code" href="unionCMCC__MSR__Type.html#a7b6b7b096faf9e3f7111ce9018ba939f">reg</a>; </div>
<div class="line"><a name="l00326"></a><span class="lineno"> 326</span>&#160;} <a class="code" href="unionCMCC__MSR__Type.html">CMCC_MSR_Type</a>;</div>
<div class="line"><a name="l00327"></a><span class="lineno"> 327</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00328"></a><span class="lineno"> 328</span>&#160; </div>
<div class="line"><a name="l00329"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#ad67c4f86b6db8bfdc893a80f840fe95c"> 329</a></span>&#160;<span class="preprocessor">#define CMCC_MSR_OFFSET 0x34 </span></div>
<div class="line"><a name="l00330"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a9c9cfab854a595987f81227aa411bc6e"> 330</a></span>&#160;<span class="preprocessor">#define CMCC_MSR_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00332"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#a23e56e447569404b43f4bb371aa3cbc2"> 332</a></span>&#160;<span class="preprocessor">#define CMCC_MSR_EVENT_CNT_Pos 0 </span></div>
<div class="line"><a name="l00333"></a><span class="lineno"> 333</span>&#160;<span class="preprocessor">#define CMCC_MSR_EVENT_CNT_Msk (_U_(0xFFFFFFFF) &lt;&lt; CMCC_MSR_EVENT_CNT_Pos)</span></div>
<div class="line"><a name="l00334"></a><span class="lineno"> 334</span>&#160;<span class="preprocessor">#define CMCC_MSR_EVENT_CNT(value) (CMCC_MSR_EVENT_CNT_Msk &amp; ((value) &lt;&lt; CMCC_MSR_EVENT_CNT_Pos))</span></div>
<div class="line"><a name="l00335"></a><span class="lineno"><a class="line" href="component_2cmcc_8h.html#ad1e5f273e5a25b3aa2c38b8286f8ddfb"> 335</a></span>&#160;<span class="preprocessor">#define CMCC_MSR_MASK _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00338"></a><span class="lineno"> 338</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00339"></a><span class="lineno"><a class="line" href="structCmcc.html"> 339</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00340"></a><span class="lineno"><a class="line" href="structCmcc.html#a2d0b2688a6a949aeb2280ba6afda2c65"> 340</a></span>&#160; __I <a class="code" href="unionCMCC__TYPE__Type.html">CMCC_TYPE_Type</a> <a class="code" href="structCmcc.html#a2d0b2688a6a949aeb2280ba6afda2c65">TYPE</a>; </div>
<div class="line"><a name="l00341"></a><span class="lineno"><a class="line" href="structCmcc.html#a87b8d25fecb96434c28107857a8fea2d"> 341</a></span>&#160; __IO <a class="code" href="unionCMCC__CFG__Type.html">CMCC_CFG_Type</a> <a class="code" href="structCmcc.html#a87b8d25fecb96434c28107857a8fea2d">CFG</a>; </div>
<div class="line"><a name="l00342"></a><span class="lineno"><a class="line" href="structCmcc.html#a539558149b21db7c991f0742d30e0481"> 342</a></span>&#160; __O <a class="code" href="unionCMCC__CTRL__Type.html">CMCC_CTRL_Type</a> <a class="code" href="structCmcc.html#a539558149b21db7c991f0742d30e0481">CTRL</a>; </div>
<div class="line"><a name="l00343"></a><span class="lineno"><a class="line" href="structCmcc.html#a2e1006a5b7c2ec83104d7fcdc6766fff"> 343</a></span>&#160; __I <a class="code" href="unionCMCC__SR__Type.html">CMCC_SR_Type</a> <a class="code" href="structCmcc.html#a2e1006a5b7c2ec83104d7fcdc6766fff">SR</a>; </div>
<div class="line"><a name="l00344"></a><span class="lineno"><a class="line" href="structCmcc.html#a8f4925ba24d719ab190d4bf241922f0a"> 344</a></span>&#160; __IO <a class="code" href="unionCMCC__LCKWAY__Type.html">CMCC_LCKWAY_Type</a> <a class="code" href="structCmcc.html#a8f4925ba24d719ab190d4bf241922f0a">LCKWAY</a>; </div>
<div class="line"><a name="l00345"></a><span class="lineno"> 345</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved1[0xC];</div>
<div class="line"><a name="l00346"></a><span class="lineno"><a class="line" href="structCmcc.html#aa33ce67fcc1e3cb34a8bff05455be247"> 346</a></span>&#160; __O <a class="code" href="unionCMCC__MAINT0__Type.html">CMCC_MAINT0_Type</a> <a class="code" href="structCmcc.html#aa33ce67fcc1e3cb34a8bff05455be247">MAINT0</a>; </div>
<div class="line"><a name="l00347"></a><span class="lineno"><a class="line" href="structCmcc.html#a76bb07832821d65765bbddecd48b047f"> 347</a></span>&#160; __O <a class="code" href="unionCMCC__MAINT1__Type.html">CMCC_MAINT1_Type</a> <a class="code" href="structCmcc.html#a76bb07832821d65765bbddecd48b047f">MAINT1</a>; </div>
<div class="line"><a name="l00348"></a><span class="lineno"><a class="line" href="structCmcc.html#a1304e940b4556471b4a722b67b165a8b"> 348</a></span>&#160; __IO <a class="code" href="unionCMCC__MCFG__Type.html">CMCC_MCFG_Type</a> <a class="code" href="structCmcc.html#a1304e940b4556471b4a722b67b165a8b">MCFG</a>; </div>
<div class="line"><a name="l00349"></a><span class="lineno"><a class="line" href="structCmcc.html#a4aadc35cd008a8b59ccbef0afd787cca"> 349</a></span>&#160; __IO <a class="code" href="unionCMCC__MEN__Type.html">CMCC_MEN_Type</a> <a class="code" href="structCmcc.html#a4aadc35cd008a8b59ccbef0afd787cca">MEN</a>; </div>
<div class="line"><a name="l00350"></a><span class="lineno"><a class="line" href="structCmcc.html#a0c4e011510e5e06185b19848f81dd0c9"> 350</a></span>&#160; __O <a class="code" href="unionCMCC__MCTRL__Type.html">CMCC_MCTRL_Type</a> <a class="code" href="structCmcc.html#a0c4e011510e5e06185b19848f81dd0c9">MCTRL</a>; </div>
<div class="line"><a name="l00351"></a><span class="lineno"><a class="line" href="structCmcc.html#a38272d8b430ad87ce4552ac7236255b6"> 351</a></span>&#160; __I <a class="code" href="unionCMCC__MSR__Type.html">CMCC_MSR_Type</a> <a class="code" href="structCmcc.html#a38272d8b430ad87ce4552ac7236255b6">MSR</a>; </div>
<div class="line"><a name="l00352"></a><span class="lineno"> 352</span>&#160;} <a class="code" href="structCmcc.html">Cmcc</a>;</div>
<div class="line"><a name="l00353"></a><span class="lineno"> 353</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00354"></a><span class="lineno"> 354</span>&#160; </div>
<div class="line"><a name="l00357"></a><span class="lineno"> 357</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_CMCC_COMPONENT_ */</span><span class="preprocessor"></span></div>
</div><!-- fragment --></div><!-- contents -->
<div class="ttc" id="astructCmcc_html_a1304e940b4556471b4a722b67b165a8b"><div class="ttname"><a href="structCmcc.html#a1304e940b4556471b4a722b67b165a8b">Cmcc::MCFG</a></div><div class="ttdeci">__IO CMCC_MCFG_Type MCFG</div><div class="ttdoc">Offset: 0x28 (R/W 32) Cache Monitor Configuration Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00348">cmcc.h:348</a></div></div>
<div class="ttc" id="astructCmcc_html_a2d0b2688a6a949aeb2280ba6afda2c65"><div class="ttname"><a href="structCmcc.html#a2d0b2688a6a949aeb2280ba6afda2c65">Cmcc::TYPE</a></div><div class="ttdeci">__I CMCC_TYPE_Type TYPE</div><div class="ttdoc">Offset: 0x00 (R/ 32) Cache Type Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00340">cmcc.h:340</a></div></div>
<div class="ttc" id="aunionCMCC__MAINT0__Type_html_acc057586228e32919d7daec7569eed2b"><div class="ttname"><a href="unionCMCC__MAINT0__Type.html#acc057586228e32919d7daec7569eed2b">CMCC_MAINT0_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00215">cmcc.h:215</a></div></div>
<div class="ttc" id="aunionCMCC__MAINT1__Type_html_a05c3bdba1cf4afd405c548128f0e318a"><div class="ttname"><a href="unionCMCC__MAINT1__Type.html#a05c3bdba1cf4afd405c548128f0e318a">CMCC_MAINT1_Type::INDEX</a></div><div class="ttdeci">uint32_t INDEX</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00231">cmcc.h:231</a></div></div>
<div class="ttc" id="aunionCMCC__TYPE__Type_html_a7f51dda39d0395023794eca1e533109b"><div class="ttname"><a href="unionCMCC__TYPE__Type.html#a7f51dda39d0395023794eca1e533109b">CMCC_TYPE_Type::WAYNUM</a></div><div class="ttdeci">uint32_t WAYNUM</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00050">cmcc.h:50</a></div></div>
<div class="ttc" id="aunionCMCC__MEN__Type_html"><div class="ttname"><a href="unionCMCC__MEN__Type.html">CMCC_MEN_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00285">cmcc.h:285</a></div></div>
<div class="ttc" id="aunionCMCC__TYPE__Type_html"><div class="ttname"><a href="unionCMCC__TYPE__Type.html">CMCC_TYPE_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00044">cmcc.h:44</a></div></div>
<div class="ttc" id="aunionCMCC__SR__Type_html"><div class="ttname"><a href="unionCMCC__SR__Type.html">CMCC_SR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00173">cmcc.h:173</a></div></div>
<div class="ttc" id="aunionCMCC__MCTRL__Type_html_ad48b27682d9f6c85c2a834e45c236433"><div class="ttname"><a href="unionCMCC__MCTRL__Type.html#ad48b27682d9f6c85c2a834e45c236433">CMCC_MCTRL_Type::SWRST</a></div><div class="ttdeci">uint32_t SWRST</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00305">cmcc.h:305</a></div></div>
<div class="ttc" id="aunionCMCC__CFG__Type_html_a01e26bfeb199c4c73660e39d0327a431"><div class="ttname"><a href="unionCMCC__CFG__Type.html#a01e26bfeb199c4c73660e39d0327a431">CMCC_CFG_Type::CSIZESW</a></div><div class="ttdeci">uint32_t CSIZESW</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00120">cmcc.h:120</a></div></div>
<div class="ttc" id="astructCmcc_html_a87b8d25fecb96434c28107857a8fea2d"><div class="ttname"><a href="structCmcc.html#a87b8d25fecb96434c28107857a8fea2d">Cmcc::CFG</a></div><div class="ttdeci">__IO CMCC_CFG_Type CFG</div><div class="ttdoc">Offset: 0x04 (R/W 32) Cache Configuration Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00341">cmcc.h:341</a></div></div>
<div class="ttc" id="aunionCMCC__MEN__Type_html_a880312b31883559897573bedb2c1e650"><div class="ttname"><a href="unionCMCC__MEN__Type.html#a880312b31883559897573bedb2c1e650">CMCC_MEN_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00290">cmcc.h:290</a></div></div>
<div class="ttc" id="astructCmcc_html_aa33ce67fcc1e3cb34a8bff05455be247"><div class="ttname"><a href="structCmcc.html#aa33ce67fcc1e3cb34a8bff05455be247">Cmcc::MAINT0</a></div><div class="ttdeci">__O CMCC_MAINT0_Type MAINT0</div><div class="ttdoc">Offset: 0x20 ( /W 32) Cache Maintenance Register 0.</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00346">cmcc.h:346</a></div></div>
<div class="ttc" id="aunionCMCC__MSR__Type_html"><div class="ttname"><a href="unionCMCC__MSR__Type.html">CMCC_MSR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00321">cmcc.h:321</a></div></div>
<div class="ttc" id="aunionCMCC__CTRL__Type_html_a9012f18bdaa67974355e8f42a3b7c019"><div class="ttname"><a href="unionCMCC__CTRL__Type.html#a9012f18bdaa67974355e8f42a3b7c019">CMCC_CTRL_Type::CEN</a></div><div class="ttdeci">uint32_t CEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00157">cmcc.h:157</a></div></div>
<div class="ttc" id="aunionCMCC__TYPE__Type_html_acb0f3ac56719b193c197cc5981684d2b"><div class="ttname"><a href="unionCMCC__TYPE__Type.html#acb0f3ac56719b193c197cc5981684d2b">CMCC_TYPE_Type::CLSIZE</a></div><div class="ttdeci">uint32_t CLSIZE</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00053">cmcc.h:53</a></div></div>
<div class="ttc" id="astructCmcc_html_a76bb07832821d65765bbddecd48b047f"><div class="ttname"><a href="structCmcc.html#a76bb07832821d65765bbddecd48b047f">Cmcc::MAINT1</a></div><div class="ttdeci">__O CMCC_MAINT1_Type MAINT1</div><div class="ttdoc">Offset: 0x24 ( /W 32) Cache Maintenance Register 1.</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00347">cmcc.h:347</a></div></div>
<div class="ttc" id="aunionCMCC__CFG__Type_html_a981404663436999d0ad09cfae5465e41"><div class="ttname"><a href="unionCMCC__CFG__Type.html#a981404663436999d0ad09cfae5465e41">CMCC_CFG_Type::DCDIS</a></div><div class="ttdeci">uint32_t DCDIS</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00118">cmcc.h:118</a></div></div>
<div class="ttc" id="astructCmcc_html_a539558149b21db7c991f0742d30e0481"><div class="ttname"><a href="structCmcc.html#a539558149b21db7c991f0742d30e0481">Cmcc::CTRL</a></div><div class="ttdeci">__O CMCC_CTRL_Type CTRL</div><div class="ttdoc">Offset: 0x08 ( /W 32) Cache Control Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00342">cmcc.h:342</a></div></div>
<div class="ttc" id="aunionCMCC__MSR__Type_html_a7b6b7b096faf9e3f7111ce9018ba939f"><div class="ttname"><a href="unionCMCC__MSR__Type.html#a7b6b7b096faf9e3f7111ce9018ba939f">CMCC_MSR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00325">cmcc.h:325</a></div></div>
<div class="ttc" id="aunionCMCC__LCKWAY__Type_html"><div class="ttname"><a href="unionCMCC__LCKWAY__Type.html">CMCC_LCKWAY_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00191">cmcc.h:191</a></div></div>
<div class="ttc" id="astructCmcc_html_a38272d8b430ad87ce4552ac7236255b6"><div class="ttname"><a href="structCmcc.html#a38272d8b430ad87ce4552ac7236255b6">Cmcc::MSR</a></div><div class="ttdeci">__I CMCC_MSR_Type MSR</div><div class="ttdoc">Offset: 0x34 (R/ 32) Cache Monitor Status Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00351">cmcc.h:351</a></div></div>
<div class="ttc" id="aunionCMCC__MCTRL__Type_html_a7c756b0089f902b86b8f049fa061cf6b"><div class="ttname"><a href="unionCMCC__MCTRL__Type.html#a7c756b0089f902b86b8f049fa061cf6b">CMCC_MCTRL_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00308">cmcc.h:308</a></div></div>
<div class="ttc" id="aunionCMCC__CFG__Type_html_a9907cf806f1913b0275fb4b88eb0ab2b"><div class="ttname"><a href="unionCMCC__CFG__Type.html#a9907cf806f1913b0275fb4b88eb0ab2b">CMCC_CFG_Type::ICDIS</a></div><div class="ttdeci">uint32_t ICDIS</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00117">cmcc.h:117</a></div></div>
<div class="ttc" id="astructCmcc_html_a0c4e011510e5e06185b19848f81dd0c9"><div class="ttname"><a href="structCmcc.html#a0c4e011510e5e06185b19848f81dd0c9">Cmcc::MCTRL</a></div><div class="ttdeci">__O CMCC_MCTRL_Type MCTRL</div><div class="ttdoc">Offset: 0x30 ( /W 32) Cache Monitor Control Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00350">cmcc.h:350</a></div></div>
<div class="ttc" id="aunionCMCC__MSR__Type_html_af2a25a473dde5dcfb539f09d47aa954b"><div class="ttname"><a href="unionCMCC__MSR__Type.html#af2a25a473dde5dcfb539f09d47aa954b">CMCC_MSR_Type::EVENT_CNT</a></div><div class="ttdeci">uint32_t EVENT_CNT</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00323">cmcc.h:323</a></div></div>
<div class="ttc" id="aunionCMCC__SR__Type_html_ae17c73e40d8c38ca6482e25f6bea9055"><div class="ttname"><a href="unionCMCC__SR__Type.html#ae17c73e40d8c38ca6482e25f6bea9055">CMCC_SR_Type::CSTS</a></div><div class="ttdeci">uint32_t CSTS</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00175">cmcc.h:175</a></div></div>
<div class="ttc" id="astructCmcc_html_a2e1006a5b7c2ec83104d7fcdc6766fff"><div class="ttname"><a href="structCmcc.html#a2e1006a5b7c2ec83104d7fcdc6766fff">Cmcc::SR</a></div><div class="ttdeci">__I CMCC_SR_Type SR</div><div class="ttdoc">Offset: 0x0C (R/ 32) Cache Status Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00343">cmcc.h:343</a></div></div>
<div class="ttc" id="aunionCMCC__CFG__Type_html_ada44b76950176be4dd43fb912961be92"><div class="ttname"><a href="unionCMCC__CFG__Type.html#ada44b76950176be4dd43fb912961be92">CMCC_CFG_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00123">cmcc.h:123</a></div></div>
<div class="ttc" id="aunionCMCC__MAINT0__Type_html"><div class="ttname"><a href="unionCMCC__MAINT0__Type.html">CMCC_MAINT0_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00210">cmcc.h:210</a></div></div>
<div class="ttc" id="astructCmcc_html"><div class="ttname"><a href="structCmcc.html">Cmcc</a></div><div class="ttdoc">CMCC APB hardware registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00339">cmcc.h:339</a></div></div>
<div class="ttc" id="aunionCMCC__CTRL__Type_html"><div class="ttname"><a href="unionCMCC__CTRL__Type.html">CMCC_CTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00155">cmcc.h:155</a></div></div>
<div class="ttc" id="aunionCMCC__TYPE__Type_html_a56b689cc2937945413f7e7518f75b20e"><div class="ttname"><a href="unionCMCC__TYPE__Type.html#a56b689cc2937945413f7e7518f75b20e">CMCC_TYPE_Type::CSIZE</a></div><div class="ttdeci">uint32_t CSIZE</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00052">cmcc.h:52</a></div></div>
<div class="ttc" id="aunionCMCC__CFG__Type_html"><div class="ttname"><a href="unionCMCC__CFG__Type.html">CMCC_CFG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00114">cmcc.h:114</a></div></div>
<div class="ttc" id="aunionCMCC__LCKWAY__Type_html_aab6d6f12b17ed73e34ae768ff0564478"><div class="ttname"><a href="unionCMCC__LCKWAY__Type.html#aab6d6f12b17ed73e34ae768ff0564478">CMCC_LCKWAY_Type::LCKWAY</a></div><div class="ttdeci">uint32_t LCKWAY</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00193">cmcc.h:193</a></div></div>
<div class="ttc" id="aunionCMCC__LCKWAY__Type_html_af5a76282cf118b47c9308f3acaba3699"><div class="ttname"><a href="unionCMCC__LCKWAY__Type.html#af5a76282cf118b47c9308f3acaba3699">CMCC_LCKWAY_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00196">cmcc.h:196</a></div></div>
<div class="ttc" id="aunionCMCC__SR__Type_html_a6be423b4bb0f6ceaad18f4d9797a3527"><div class="ttname"><a href="unionCMCC__SR__Type.html#a6be423b4bb0f6ceaad18f4d9797a3527">CMCC_SR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00178">cmcc.h:178</a></div></div>
<div class="ttc" id="aunionCMCC__TYPE__Type_html_ac024e8c07859cbd5c70deb1b4b5995ff"><div class="ttname"><a href="unionCMCC__TYPE__Type.html#ac024e8c07859cbd5c70deb1b4b5995ff">CMCC_TYPE_Type::GCLK</a></div><div class="ttdeci">uint32_t GCLK</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00047">cmcc.h:47</a></div></div>
<div class="ttc" id="aunionCMCC__MAINT0__Type_html_a001d85c5601ace2b71c2e2f5503fee4b"><div class="ttname"><a href="unionCMCC__MAINT0__Type.html#a001d85c5601ace2b71c2e2f5503fee4b">CMCC_MAINT0_Type::INVALL</a></div><div class="ttdeci">uint32_t INVALL</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00212">cmcc.h:212</a></div></div>
<div class="ttc" id="astructCmcc_html_a8f4925ba24d719ab190d4bf241922f0a"><div class="ttname"><a href="structCmcc.html#a8f4925ba24d719ab190d4bf241922f0a">Cmcc::LCKWAY</a></div><div class="ttdeci">__IO CMCC_LCKWAY_Type LCKWAY</div><div class="ttdoc">Offset: 0x10 (R/W 32) Cache Lock per Way Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00344">cmcc.h:344</a></div></div>
<div class="ttc" id="aunionCMCC__MAINT1__Type_html"><div class="ttname"><a href="unionCMCC__MAINT1__Type.html">CMCC_MAINT1_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00228">cmcc.h:228</a></div></div>
<div class="ttc" id="aunionCMCC__TYPE__Type_html_a7a06270e88066dc28df998d64ae15c58"><div class="ttname"><a href="unionCMCC__TYPE__Type.html#a7a06270e88066dc28df998d64ae15c58">CMCC_TYPE_Type::RRP</a></div><div class="ttdeci">uint32_t RRP</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00049">cmcc.h:49</a></div></div>
<div class="ttc" id="aunionCMCC__TYPE__Type_html_af2aeea986c35297b98beb63c1f48b93f"><div class="ttname"><a href="unionCMCC__TYPE__Type.html#af2aeea986c35297b98beb63c1f48b93f">CMCC_TYPE_Type::LCKDOWN</a></div><div class="ttdeci">uint32_t LCKDOWN</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00051">cmcc.h:51</a></div></div>
<div class="ttc" id="asame54n19a_8h_html_a0d957f1433aaf5d70e4dc2b68288442d"><div class="ttname"><a href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a></div><div class="ttdeci">volatile const uint8_t RoReg8</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00053">same54n19a.h:53</a></div></div>
<div class="ttc" id="aunionCMCC__MAINT1__Type_html_aff428b3aaee8363b9a5fceedb9395a48"><div class="ttname"><a href="unionCMCC__MAINT1__Type.html#aff428b3aaee8363b9a5fceedb9395a48">CMCC_MAINT1_Type::WAY</a></div><div class="ttdeci">uint32_t WAY</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00233">cmcc.h:233</a></div></div>
<div class="ttc" id="astructCmcc_html_a4aadc35cd008a8b59ccbef0afd787cca"><div class="ttname"><a href="structCmcc.html#a4aadc35cd008a8b59ccbef0afd787cca">Cmcc::MEN</a></div><div class="ttdeci">__IO CMCC_MEN_Type MEN</div><div class="ttdoc">Offset: 0x2C (R/W 32) Cache Monitor Enable Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00349">cmcc.h:349</a></div></div>
<div class="ttc" id="aunionCMCC__MCFG__Type_html_a990fcd03e91e1366cb06ec002ac04469"><div class="ttname"><a href="unionCMCC__MCFG__Type.html#a990fcd03e91e1366cb06ec002ac04469">CMCC_MCFG_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00265">cmcc.h:265</a></div></div>
<div class="ttc" id="aunionCMCC__MAINT1__Type_html_ab94bbd2ac87b621a84e4ae11276c785d"><div class="ttname"><a href="unionCMCC__MAINT1__Type.html#ab94bbd2ac87b621a84e4ae11276c785d">CMCC_MAINT1_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00235">cmcc.h:235</a></div></div>
<div class="ttc" id="aunionCMCC__CTRL__Type_html_a78d20cb1fc915f0475fcd3a5462a790e"><div class="ttname"><a href="unionCMCC__CTRL__Type.html#a78d20cb1fc915f0475fcd3a5462a790e">CMCC_CTRL_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00160">cmcc.h:160</a></div></div>
<div class="ttc" id="aunionCMCC__TYPE__Type_html_a2f7c05d3b39d496b58239d757f896e81"><div class="ttname"><a href="unionCMCC__TYPE__Type.html#a2f7c05d3b39d496b58239d757f896e81">CMCC_TYPE_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00056">cmcc.h:56</a></div></div>
<div class="ttc" id="aunionCMCC__MCFG__Type_html_aee931ba78eb83e697fad986a4130e510"><div class="ttname"><a href="unionCMCC__MCFG__Type.html#aee931ba78eb83e697fad986a4130e510">CMCC_MCFG_Type::MODE</a></div><div class="ttdeci">uint32_t MODE</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00262">cmcc.h:262</a></div></div>
<div class="ttc" id="aunionCMCC__MCTRL__Type_html"><div class="ttname"><a href="unionCMCC__MCTRL__Type.html">CMCC_MCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00303">cmcc.h:303</a></div></div>
<div class="ttc" id="aunionCMCC__MEN__Type_html_a5017cb590c50ab9797a5e15e05dc7700"><div class="ttname"><a href="unionCMCC__MEN__Type.html#a5017cb590c50ab9797a5e15e05dc7700">CMCC_MEN_Type::MENABLE</a></div><div class="ttdeci">uint32_t MENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00287">cmcc.h:287</a></div></div>
<div class="ttc" id="aunionCMCC__MCFG__Type_html"><div class="ttname"><a href="unionCMCC__MCFG__Type.html">CMCC_MCFG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2cmcc_8h_source.html#l00260">cmcc.h:260</a></div></div>
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<p>Component description for DAC.
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_U2502</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>REV_DAC</b>&#160;&#160;&#160;0x100</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#aebd4a25fcf855e7d3824acf7f9d3ac83">DAC_CTRLA_OFFSET</a>&#160;&#160;&#160;0x00</td></tr>
<tr class="memdesc:aebd4a25fcf855e7d3824acf7f9d3ac83"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_CTRLA offset) Control A <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a5b2a0ad82560fded073e6276046facfc">DAC_CTRLA_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a5b2a0ad82560fded073e6276046facfc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_CTRLA reset_value) Control A <br /></td></tr>
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<tr class="memitem:afa3f0f563ba0dcc229026ca6d3effdcc"><td class="memItemLeft" align="right" valign="top"><a id="afa3f0f563ba0dcc229026ca6d3effdcc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#afa3f0f563ba0dcc229026ca6d3effdcc">DAC_CTRLA_SWRST_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:afa3f0f563ba0dcc229026ca6d3effdcc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_CTRLA) Software Reset <br /></td></tr>
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<tr class="memitem:ab50aae3a8aa2d5bcfb9892d87f425fd8"><td class="memItemLeft" align="right" valign="top"><a id="ab50aae3a8aa2d5bcfb9892d87f425fd8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_CTRLA_SWRST</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dac_8h.html#afa3f0f563ba0dcc229026ca6d3effdcc">DAC_CTRLA_SWRST_Pos</a>)</td></tr>
<tr class="separator:ab50aae3a8aa2d5bcfb9892d87f425fd8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afa6e69ab386a0acc15ec18b0584091f9"><td class="memItemLeft" align="right" valign="top"><a id="afa6e69ab386a0acc15ec18b0584091f9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#afa6e69ab386a0acc15ec18b0584091f9">DAC_CTRLA_ENABLE_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:afa6e69ab386a0acc15ec18b0584091f9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_CTRLA) Enable DAC Controller <br /></td></tr>
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<tr class="memitem:abdbf590aa240a8a85a49f13e27872353"><td class="memItemLeft" align="right" valign="top"><a id="abdbf590aa240a8a85a49f13e27872353"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_CTRLA_ENABLE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dac_8h.html#afa6e69ab386a0acc15ec18b0584091f9">DAC_CTRLA_ENABLE_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a3194764eec2b07936137bbd3afbde5d2">DAC_CTRLA_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x03)</td></tr>
<tr class="memdesc:a3194764eec2b07936137bbd3afbde5d2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_CTRLA) MASK Register <br /></td></tr>
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<tr class="memitem:a77355709810c770d457b0206b73e12c2"><td class="memItemLeft" align="right" valign="top"><a id="a77355709810c770d457b0206b73e12c2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a77355709810c770d457b0206b73e12c2">DAC_CTRLB_OFFSET</a>&#160;&#160;&#160;0x01</td></tr>
<tr class="memdesc:a77355709810c770d457b0206b73e12c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_CTRLB offset) Control B <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ac2138055bf74ac2fccda007458cdca1d">DAC_CTRLB_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x02)</td></tr>
<tr class="memdesc:ac2138055bf74ac2fccda007458cdca1d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_CTRLB reset_value) Control B <br /></td></tr>
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<tr class="memitem:abbf790da9956c2dd5f02756f9187989c"><td class="memItemLeft" align="right" valign="top"><a id="abbf790da9956c2dd5f02756f9187989c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#abbf790da9956c2dd5f02756f9187989c">DAC_CTRLB_DIFF_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:abbf790da9956c2dd5f02756f9187989c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_CTRLB) Differential mode enable <br /></td></tr>
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<tr class="memitem:a03edadd68f47c3766a9b49135a8dc321"><td class="memItemLeft" align="right" valign="top"><a id="a03edadd68f47c3766a9b49135a8dc321"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_CTRLB_DIFF</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dac_8h.html#abbf790da9956c2dd5f02756f9187989c">DAC_CTRLB_DIFF_Pos</a>)</td></tr>
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<tr class="memitem:ace1da3ee1cda6efe12a220080a718b99"><td class="memItemLeft" align="right" valign="top"><a id="ace1da3ee1cda6efe12a220080a718b99"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ace1da3ee1cda6efe12a220080a718b99">DAC_CTRLB_REFSEL_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:ace1da3ee1cda6efe12a220080a718b99"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_CTRLB) Reference Selection for DAC0/1 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_CTRLB_REFSEL_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dac_8h.html#ace1da3ee1cda6efe12a220080a718b99">DAC_CTRLB_REFSEL_Pos</a>)</td></tr>
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<tr class="memitem:ab75aa87cd7f0a1813d5e73f2dba5057e"><td class="memItemLeft" align="right" valign="top"><a id="ab75aa87cd7f0a1813d5e73f2dba5057e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_CTRLB_REFSEL</b>(value)&#160;&#160;&#160;(DAC_CTRLB_REFSEL_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#ace1da3ee1cda6efe12a220080a718b99">DAC_CTRLB_REFSEL_Pos</a>))</td></tr>
<tr class="separator:ab75aa87cd7f0a1813d5e73f2dba5057e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1fa8cea85f63628846fe1cffd66ce84d"><td class="memItemLeft" align="right" valign="top"><a id="a1fa8cea85f63628846fe1cffd66ce84d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a1fa8cea85f63628846fe1cffd66ce84d">DAC_CTRLB_REFSEL_VREFPU_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a1fa8cea85f63628846fe1cffd66ce84d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_CTRLB) External reference unbuffered <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ae326fd37097c45092004ad8658ef7e64">DAC_CTRLB_REFSEL_VDDANA_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:ae326fd37097c45092004ad8658ef7e64"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_CTRLB) Analog supply <br /></td></tr>
<tr class="separator:ae326fd37097c45092004ad8658ef7e64"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af0266310f4ffdab4a62aed8023e5507c"><td class="memItemLeft" align="right" valign="top"><a id="af0266310f4ffdab4a62aed8023e5507c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#af0266310f4ffdab4a62aed8023e5507c">DAC_CTRLB_REFSEL_VREFPB_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:af0266310f4ffdab4a62aed8023e5507c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_CTRLB) External reference buffered <br /></td></tr>
<tr class="separator:af0266310f4ffdab4a62aed8023e5507c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a23d7b33954fbff27f8d3dcdcf389c185"><td class="memItemLeft" align="right" valign="top"><a id="a23d7b33954fbff27f8d3dcdcf389c185"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a23d7b33954fbff27f8d3dcdcf389c185">DAC_CTRLB_REFSEL_INTREF_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
<tr class="memdesc:a23d7b33954fbff27f8d3dcdcf389c185"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_CTRLB) Internal bandgap reference <br /></td></tr>
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<tr class="memitem:aef02c21f93e4fae94b1c888a61309666"><td class="memItemLeft" align="right" valign="top"><a id="aef02c21f93e4fae94b1c888a61309666"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_CTRLB_REFSEL_VREFPU</b>&#160;&#160;&#160;(<a class="el" href="component_2dac_8h.html#a1fa8cea85f63628846fe1cffd66ce84d">DAC_CTRLB_REFSEL_VREFPU_Val</a> &lt;&lt; <a class="el" href="component_2dac_8h.html#ace1da3ee1cda6efe12a220080a718b99">DAC_CTRLB_REFSEL_Pos</a>)</td></tr>
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<tr class="memitem:ace95cc93c9a20d42d81460f53b69d380"><td class="memItemLeft" align="right" valign="top"><a id="ace95cc93c9a20d42d81460f53b69d380"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_CTRLB_REFSEL_VDDANA</b>&#160;&#160;&#160;(<a class="el" href="component_2dac_8h.html#ae326fd37097c45092004ad8658ef7e64">DAC_CTRLB_REFSEL_VDDANA_Val</a> &lt;&lt; <a class="el" href="component_2dac_8h.html#ace1da3ee1cda6efe12a220080a718b99">DAC_CTRLB_REFSEL_Pos</a>)</td></tr>
<tr class="separator:ace95cc93c9a20d42d81460f53b69d380"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae2b32bff7e12d34e015fb70bd522e7b5"><td class="memItemLeft" align="right" valign="top"><a id="ae2b32bff7e12d34e015fb70bd522e7b5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_CTRLB_REFSEL_VREFPB</b>&#160;&#160;&#160;(<a class="el" href="component_2dac_8h.html#af0266310f4ffdab4a62aed8023e5507c">DAC_CTRLB_REFSEL_VREFPB_Val</a> &lt;&lt; <a class="el" href="component_2dac_8h.html#ace1da3ee1cda6efe12a220080a718b99">DAC_CTRLB_REFSEL_Pos</a>)</td></tr>
<tr class="separator:ae2b32bff7e12d34e015fb70bd522e7b5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af28703bc73b38b9ab5d0b56fb9a3e951"><td class="memItemLeft" align="right" valign="top"><a id="af28703bc73b38b9ab5d0b56fb9a3e951"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_CTRLB_REFSEL_INTREF</b>&#160;&#160;&#160;(<a class="el" href="component_2dac_8h.html#a23d7b33954fbff27f8d3dcdcf389c185">DAC_CTRLB_REFSEL_INTREF_Val</a> &lt;&lt; <a class="el" href="component_2dac_8h.html#ace1da3ee1cda6efe12a220080a718b99">DAC_CTRLB_REFSEL_Pos</a>)</td></tr>
<tr class="separator:af28703bc73b38b9ab5d0b56fb9a3e951"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa12ea04e34d8557ae1e628862714e207"><td class="memItemLeft" align="right" valign="top"><a id="aa12ea04e34d8557ae1e628862714e207"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#aa12ea04e34d8557ae1e628862714e207">DAC_CTRLB_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x07)</td></tr>
<tr class="memdesc:aa12ea04e34d8557ae1e628862714e207"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_CTRLB) MASK Register <br /></td></tr>
<tr class="separator:aa12ea04e34d8557ae1e628862714e207"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a554a475582005e674b535a88927abc9f"><td class="memItemLeft" align="right" valign="top"><a id="a554a475582005e674b535a88927abc9f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a554a475582005e674b535a88927abc9f">DAC_EVCTRL_OFFSET</a>&#160;&#160;&#160;0x02</td></tr>
<tr class="memdesc:a554a475582005e674b535a88927abc9f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_EVCTRL offset) Event Control <br /></td></tr>
<tr class="separator:a554a475582005e674b535a88927abc9f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae95bd54234ae16d3e9ee3291b4c883c5"><td class="memItemLeft" align="right" valign="top"><a id="ae95bd54234ae16d3e9ee3291b4c883c5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ae95bd54234ae16d3e9ee3291b4c883c5">DAC_EVCTRL_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:ae95bd54234ae16d3e9ee3291b4c883c5"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_EVCTRL reset_value) Event Control <br /></td></tr>
<tr class="separator:ae95bd54234ae16d3e9ee3291b4c883c5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a307b56241053d43fae08abd64c6b0f58"><td class="memItemLeft" align="right" valign="top"><a id="a307b56241053d43fae08abd64c6b0f58"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a307b56241053d43fae08abd64c6b0f58">DAC_EVCTRL_STARTEI0_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a307b56241053d43fae08abd64c6b0f58"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_EVCTRL) Start Conversion Event Input DAC 0 <br /></td></tr>
<tr class="separator:a307b56241053d43fae08abd64c6b0f58"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7587f957948231289d39e22423e48e87"><td class="memItemLeft" align="right" valign="top"><a id="a7587f957948231289d39e22423e48e87"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_STARTEI0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a307b56241053d43fae08abd64c6b0f58">DAC_EVCTRL_STARTEI0_Pos</a>)</td></tr>
<tr class="separator:a7587f957948231289d39e22423e48e87"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a23961f1cee221c2823691dc06ee3ed65"><td class="memItemLeft" align="right" valign="top"><a id="a23961f1cee221c2823691dc06ee3ed65"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a23961f1cee221c2823691dc06ee3ed65">DAC_EVCTRL_STARTEI1_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:a23961f1cee221c2823691dc06ee3ed65"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_EVCTRL) Start Conversion Event Input DAC 1 <br /></td></tr>
<tr class="separator:a23961f1cee221c2823691dc06ee3ed65"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3c8790c8afc9d96cbd57afe2bcfea742"><td class="memItemLeft" align="right" valign="top"><a id="a3c8790c8afc9d96cbd57afe2bcfea742"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_STARTEI1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a23961f1cee221c2823691dc06ee3ed65">DAC_EVCTRL_STARTEI1_Pos</a>)</td></tr>
<tr class="separator:a3c8790c8afc9d96cbd57afe2bcfea742"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a31ff6c0f7fef665224fcf1068cd3f3fd"><td class="memItemLeft" align="right" valign="top"><a id="a31ff6c0f7fef665224fcf1068cd3f3fd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a31ff6c0f7fef665224fcf1068cd3f3fd">DAC_EVCTRL_STARTEI_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a31ff6c0f7fef665224fcf1068cd3f3fd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_EVCTRL) Start Conversion Event Input DAC x <br /></td></tr>
<tr class="separator:a31ff6c0f7fef665224fcf1068cd3f3fd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6057a110d8ba07faa5c6ed70955b9ffd"><td class="memItemLeft" align="right" valign="top"><a id="a6057a110d8ba07faa5c6ed70955b9ffd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_STARTEI_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dac_8h.html#a31ff6c0f7fef665224fcf1068cd3f3fd">DAC_EVCTRL_STARTEI_Pos</a>)</td></tr>
<tr class="separator:a6057a110d8ba07faa5c6ed70955b9ffd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6b512270a7756fc1b5a039928b5c9c27"><td class="memItemLeft" align="right" valign="top"><a id="a6b512270a7756fc1b5a039928b5c9c27"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_STARTEI</b>(value)&#160;&#160;&#160;(DAC_EVCTRL_STARTEI_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#a31ff6c0f7fef665224fcf1068cd3f3fd">DAC_EVCTRL_STARTEI_Pos</a>))</td></tr>
<tr class="separator:a6b512270a7756fc1b5a039928b5c9c27"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a539b4b5ee23b56a9277d8d35786f1c3a"><td class="memItemLeft" align="right" valign="top"><a id="a539b4b5ee23b56a9277d8d35786f1c3a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a539b4b5ee23b56a9277d8d35786f1c3a">DAC_EVCTRL_EMPTYEO0_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:a539b4b5ee23b56a9277d8d35786f1c3a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_EVCTRL) Data Buffer Empty Event Output DAC 0 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_EMPTYEO0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a539b4b5ee23b56a9277d8d35786f1c3a">DAC_EVCTRL_EMPTYEO0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#aa44f1da02c684b654a656fc7efc9dc62">DAC_EVCTRL_EMPTYEO1_Pos</a>&#160;&#160;&#160;3</td></tr>
<tr class="memdesc:aa44f1da02c684b654a656fc7efc9dc62"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_EVCTRL) Data Buffer Empty Event Output DAC 1 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_EMPTYEO1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#aa44f1da02c684b654a656fc7efc9dc62">DAC_EVCTRL_EMPTYEO1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a97e13ff75733b38e502c88e75cba9f3d">DAC_EVCTRL_EMPTYEO_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:a97e13ff75733b38e502c88e75cba9f3d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_EVCTRL) Data Buffer Empty Event Output DAC x <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_EMPTYEO_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dac_8h.html#a97e13ff75733b38e502c88e75cba9f3d">DAC_EVCTRL_EMPTYEO_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_EMPTYEO</b>(value)&#160;&#160;&#160;(DAC_EVCTRL_EMPTYEO_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#a97e13ff75733b38e502c88e75cba9f3d">DAC_EVCTRL_EMPTYEO_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#aedf1c4a8e40d019a88fe9e5dd7090e48">DAC_EVCTRL_INVEI0_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:aedf1c4a8e40d019a88fe9e5dd7090e48"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_EVCTRL) Enable Invertion of DAC 0 input event <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_INVEI0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#aedf1c4a8e40d019a88fe9e5dd7090e48">DAC_EVCTRL_INVEI0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ae64023a88f14c6fab237d0d7f4ecb6de">DAC_EVCTRL_INVEI1_Pos</a>&#160;&#160;&#160;5</td></tr>
<tr class="memdesc:ae64023a88f14c6fab237d0d7f4ecb6de"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_EVCTRL) Enable Invertion of DAC 1 input event <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_INVEI1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#ae64023a88f14c6fab237d0d7f4ecb6de">DAC_EVCTRL_INVEI1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#aefbcfa90869ef66266567b81682f3f0e">DAC_EVCTRL_INVEI_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:aefbcfa90869ef66266567b81682f3f0e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_EVCTRL) Enable Invertion of DAC x input event <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_INVEI_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dac_8h.html#aefbcfa90869ef66266567b81682f3f0e">DAC_EVCTRL_INVEI_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_INVEI</b>(value)&#160;&#160;&#160;(DAC_EVCTRL_INVEI_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#aefbcfa90869ef66266567b81682f3f0e">DAC_EVCTRL_INVEI_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#aca95cca7b4c752931b4ac9c0bd784309">DAC_EVCTRL_RESRDYEO0_Pos</a>&#160;&#160;&#160;6</td></tr>
<tr class="memdesc:aca95cca7b4c752931b4ac9c0bd784309"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_EVCTRL) Result Ready Event Output 0 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_RESRDYEO0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#aca95cca7b4c752931b4ac9c0bd784309">DAC_EVCTRL_RESRDYEO0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ad4995cd4bb9caa1071696b0cec3cc6e9">DAC_EVCTRL_RESRDYEO1_Pos</a>&#160;&#160;&#160;7</td></tr>
<tr class="memdesc:ad4995cd4bb9caa1071696b0cec3cc6e9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_EVCTRL) Result Ready Event Output 1 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_RESRDYEO1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#ad4995cd4bb9caa1071696b0cec3cc6e9">DAC_EVCTRL_RESRDYEO1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ab07dbe9a9135a4c67c5c59a151027718">DAC_EVCTRL_RESRDYEO_Pos</a>&#160;&#160;&#160;6</td></tr>
<tr class="memdesc:ab07dbe9a9135a4c67c5c59a151027718"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_EVCTRL) Result Ready Event Output x <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_RESRDYEO_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dac_8h.html#ab07dbe9a9135a4c67c5c59a151027718">DAC_EVCTRL_RESRDYEO_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_RESRDYEO</b>(value)&#160;&#160;&#160;(DAC_EVCTRL_RESRDYEO_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#ab07dbe9a9135a4c67c5c59a151027718">DAC_EVCTRL_RESRDYEO_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a8290fa8981af7c9f3374d64bfd643575">DAC_EVCTRL_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF)</td></tr>
<tr class="memdesc:a8290fa8981af7c9f3374d64bfd643575"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_EVCTRL) MASK Register <br /></td></tr>
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<tr class="memitem:a4b29525af7de15de08715677c874b359"><td class="memItemLeft" align="right" valign="top"><a id="a4b29525af7de15de08715677c874b359"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a4b29525af7de15de08715677c874b359">DAC_INTENCLR_OFFSET</a>&#160;&#160;&#160;0x04</td></tr>
<tr class="memdesc:a4b29525af7de15de08715677c874b359"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENCLR offset) Interrupt Enable Clear <br /></td></tr>
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<tr class="memitem:a0052bdf4a77d5d851ff2dc3981b47f84"><td class="memItemLeft" align="right" valign="top"><a id="a0052bdf4a77d5d851ff2dc3981b47f84"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a0052bdf4a77d5d851ff2dc3981b47f84">DAC_INTENCLR_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a0052bdf4a77d5d851ff2dc3981b47f84"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENCLR reset_value) Interrupt Enable Clear <br /></td></tr>
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<tr class="memitem:af014e05835054e1c9f63e9a4cf8ff275"><td class="memItemLeft" align="right" valign="top"><a id="af014e05835054e1c9f63e9a4cf8ff275"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#af014e05835054e1c9f63e9a4cf8ff275">DAC_INTENCLR_UNDERRUN0_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:af014e05835054e1c9f63e9a4cf8ff275"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENCLR) Underrun 0 Interrupt Enable <br /></td></tr>
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<tr class="memitem:ab26a91de109d45f13cb1a09a697ef2d6"><td class="memItemLeft" align="right" valign="top"><a id="ab26a91de109d45f13cb1a09a697ef2d6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_UNDERRUN0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#af014e05835054e1c9f63e9a4cf8ff275">DAC_INTENCLR_UNDERRUN0_Pos</a>)</td></tr>
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<tr class="memitem:a7cf06d6965801dd4129c2951435cf4cc"><td class="memItemLeft" align="right" valign="top"><a id="a7cf06d6965801dd4129c2951435cf4cc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a7cf06d6965801dd4129c2951435cf4cc">DAC_INTENCLR_UNDERRUN1_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:a7cf06d6965801dd4129c2951435cf4cc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENCLR) Underrun 1 Interrupt Enable <br /></td></tr>
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<tr class="memitem:aaa2eb25d29830511584d2206d3dd0cf3"><td class="memItemLeft" align="right" valign="top"><a id="aaa2eb25d29830511584d2206d3dd0cf3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_UNDERRUN1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a7cf06d6965801dd4129c2951435cf4cc">DAC_INTENCLR_UNDERRUN1_Pos</a>)</td></tr>
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<tr class="memitem:a1a17f5ec1b6b1d51eb7caa0e41fd01f8"><td class="memItemLeft" align="right" valign="top"><a id="a1a17f5ec1b6b1d51eb7caa0e41fd01f8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a1a17f5ec1b6b1d51eb7caa0e41fd01f8">DAC_INTENCLR_UNDERRUN_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a1a17f5ec1b6b1d51eb7caa0e41fd01f8"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENCLR) Underrun x Interrupt Enable <br /></td></tr>
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<tr class="memitem:a7180d3cd0ea848af08e9029f18cd86c3"><td class="memItemLeft" align="right" valign="top"><a id="a7180d3cd0ea848af08e9029f18cd86c3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_UNDERRUN_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dac_8h.html#a1a17f5ec1b6b1d51eb7caa0e41fd01f8">DAC_INTENCLR_UNDERRUN_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_UNDERRUN</b>(value)&#160;&#160;&#160;(DAC_INTENCLR_UNDERRUN_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#a1a17f5ec1b6b1d51eb7caa0e41fd01f8">DAC_INTENCLR_UNDERRUN_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a1de573071bd6e76fc8364ced19f28830">DAC_INTENCLR_EMPTY0_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:a1de573071bd6e76fc8364ced19f28830"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENCLR) Data Buffer 0 Empty Interrupt Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_EMPTY0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a1de573071bd6e76fc8364ced19f28830">DAC_INTENCLR_EMPTY0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#acc84fea126c3689c58e3e4675fd3f7eb">DAC_INTENCLR_EMPTY1_Pos</a>&#160;&#160;&#160;3</td></tr>
<tr class="memdesc:acc84fea126c3689c58e3e4675fd3f7eb"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENCLR) Data Buffer 1 Empty Interrupt Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_EMPTY1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#acc84fea126c3689c58e3e4675fd3f7eb">DAC_INTENCLR_EMPTY1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ae91b3684292cdb9164d07f4b2de13b80">DAC_INTENCLR_EMPTY_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:ae91b3684292cdb9164d07f4b2de13b80"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENCLR) Data Buffer x Empty Interrupt Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_EMPTY_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dac_8h.html#ae91b3684292cdb9164d07f4b2de13b80">DAC_INTENCLR_EMPTY_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_EMPTY</b>(value)&#160;&#160;&#160;(DAC_INTENCLR_EMPTY_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#ae91b3684292cdb9164d07f4b2de13b80">DAC_INTENCLR_EMPTY_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a4cd5f9618f7aa2cd0992ad3728ecd506">DAC_INTENCLR_RESRDY0_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:a4cd5f9618f7aa2cd0992ad3728ecd506"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENCLR) Result 0 Ready Interrupt Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_RESRDY0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a4cd5f9618f7aa2cd0992ad3728ecd506">DAC_INTENCLR_RESRDY0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a37389d570aca219d6a18bf94ee291cf4">DAC_INTENCLR_RESRDY1_Pos</a>&#160;&#160;&#160;5</td></tr>
<tr class="memdesc:a37389d570aca219d6a18bf94ee291cf4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENCLR) Result 1 Ready Interrupt Enable <br /></td></tr>
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<tr class="memitem:a807f3a232a0fcad66c2ea59a13b09b0c"><td class="memItemLeft" align="right" valign="top"><a id="a807f3a232a0fcad66c2ea59a13b09b0c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_RESRDY1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a37389d570aca219d6a18bf94ee291cf4">DAC_INTENCLR_RESRDY1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#abc3e7719399aaea9a4292bd3ece497f8">DAC_INTENCLR_RESRDY_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:abc3e7719399aaea9a4292bd3ece497f8"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENCLR) Result x Ready Interrupt Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_RESRDY_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dac_8h.html#abc3e7719399aaea9a4292bd3ece497f8">DAC_INTENCLR_RESRDY_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_RESRDY</b>(value)&#160;&#160;&#160;(DAC_INTENCLR_RESRDY_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#abc3e7719399aaea9a4292bd3ece497f8">DAC_INTENCLR_RESRDY_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a40e7c12f99e0f0bfe6f9b7c7625274b6">DAC_INTENCLR_OVERRUN0_Pos</a>&#160;&#160;&#160;6</td></tr>
<tr class="memdesc:a40e7c12f99e0f0bfe6f9b7c7625274b6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENCLR) Overrun 0 Interrupt Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_OVERRUN0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a40e7c12f99e0f0bfe6f9b7c7625274b6">DAC_INTENCLR_OVERRUN0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ab5bf229e3363a161d79a079df7115a2e">DAC_INTENCLR_OVERRUN1_Pos</a>&#160;&#160;&#160;7</td></tr>
<tr class="memdesc:ab5bf229e3363a161d79a079df7115a2e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENCLR) Overrun 1 Interrupt Enable <br /></td></tr>
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<tr class="memitem:a0f2d432be46ff57eca18571c2dafcb63"><td class="memItemLeft" align="right" valign="top"><a id="a0f2d432be46ff57eca18571c2dafcb63"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_OVERRUN1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#ab5bf229e3363a161d79a079df7115a2e">DAC_INTENCLR_OVERRUN1_Pos</a>)</td></tr>
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<tr class="memitem:abe04d1d326ac85acc5e348bd958e7451"><td class="memItemLeft" align="right" valign="top"><a id="abe04d1d326ac85acc5e348bd958e7451"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#abe04d1d326ac85acc5e348bd958e7451">DAC_INTENCLR_OVERRUN_Pos</a>&#160;&#160;&#160;6</td></tr>
<tr class="memdesc:abe04d1d326ac85acc5e348bd958e7451"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENCLR) Overrun x Interrupt Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_OVERRUN_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dac_8h.html#abe04d1d326ac85acc5e348bd958e7451">DAC_INTENCLR_OVERRUN_Pos</a>)</td></tr>
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<tr class="memitem:afc0bd68e1f05f5cda9513a222d80b9b5"><td class="memItemLeft" align="right" valign="top"><a id="afc0bd68e1f05f5cda9513a222d80b9b5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_OVERRUN</b>(value)&#160;&#160;&#160;(DAC_INTENCLR_OVERRUN_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#abe04d1d326ac85acc5e348bd958e7451">DAC_INTENCLR_OVERRUN_Pos</a>))</td></tr>
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<tr class="memitem:a85bb6a4ca23cf5a609ff966cfe6ac6eb"><td class="memItemLeft" align="right" valign="top"><a id="a85bb6a4ca23cf5a609ff966cfe6ac6eb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a85bb6a4ca23cf5a609ff966cfe6ac6eb">DAC_INTENCLR_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF)</td></tr>
<tr class="memdesc:a85bb6a4ca23cf5a609ff966cfe6ac6eb"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENCLR) MASK Register <br /></td></tr>
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<tr class="memitem:a0ccf063ca605c99a4d7675883da90a35"><td class="memItemLeft" align="right" valign="top"><a id="a0ccf063ca605c99a4d7675883da90a35"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a0ccf063ca605c99a4d7675883da90a35">DAC_INTENSET_OFFSET</a>&#160;&#160;&#160;0x05</td></tr>
<tr class="memdesc:a0ccf063ca605c99a4d7675883da90a35"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENSET offset) Interrupt Enable Set <br /></td></tr>
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<tr class="memitem:ac03fead9c4f7f214a3e9c0718a629b84"><td class="memItemLeft" align="right" valign="top"><a id="ac03fead9c4f7f214a3e9c0718a629b84"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ac03fead9c4f7f214a3e9c0718a629b84">DAC_INTENSET_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:ac03fead9c4f7f214a3e9c0718a629b84"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENSET reset_value) Interrupt Enable Set <br /></td></tr>
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<tr class="memitem:af4044c3c930888eb9883abb4c0209232"><td class="memItemLeft" align="right" valign="top"><a id="af4044c3c930888eb9883abb4c0209232"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#af4044c3c930888eb9883abb4c0209232">DAC_INTENSET_UNDERRUN0_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:af4044c3c930888eb9883abb4c0209232"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENSET) Underrun 0 Interrupt Enable <br /></td></tr>
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<tr class="memitem:a9a65c7c82e61e62657a29f3fe75e8dab"><td class="memItemLeft" align="right" valign="top"><a id="a9a65c7c82e61e62657a29f3fe75e8dab"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_UNDERRUN0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#af4044c3c930888eb9883abb4c0209232">DAC_INTENSET_UNDERRUN0_Pos</a>)</td></tr>
<tr class="separator:a9a65c7c82e61e62657a29f3fe75e8dab"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a57579d33be3bcfb3f7a9b510b91ae165"><td class="memItemLeft" align="right" valign="top"><a id="a57579d33be3bcfb3f7a9b510b91ae165"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a57579d33be3bcfb3f7a9b510b91ae165">DAC_INTENSET_UNDERRUN1_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:a57579d33be3bcfb3f7a9b510b91ae165"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENSET) Underrun 1 Interrupt Enable <br /></td></tr>
<tr class="separator:a57579d33be3bcfb3f7a9b510b91ae165"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af7d60356b41c884c967d170894930535"><td class="memItemLeft" align="right" valign="top"><a id="af7d60356b41c884c967d170894930535"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_UNDERRUN1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a57579d33be3bcfb3f7a9b510b91ae165">DAC_INTENSET_UNDERRUN1_Pos</a>)</td></tr>
<tr class="separator:af7d60356b41c884c967d170894930535"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a38aa2d8302976875d983b1e2c6b0ced2"><td class="memItemLeft" align="right" valign="top"><a id="a38aa2d8302976875d983b1e2c6b0ced2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a38aa2d8302976875d983b1e2c6b0ced2">DAC_INTENSET_UNDERRUN_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a38aa2d8302976875d983b1e2c6b0ced2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENSET) Underrun x Interrupt Enable <br /></td></tr>
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<tr class="memitem:aee8eacc62123398f6f2165cfac7e4d0e"><td class="memItemLeft" align="right" valign="top"><a id="aee8eacc62123398f6f2165cfac7e4d0e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_UNDERRUN_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dac_8h.html#a38aa2d8302976875d983b1e2c6b0ced2">DAC_INTENSET_UNDERRUN_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_UNDERRUN</b>(value)&#160;&#160;&#160;(DAC_INTENSET_UNDERRUN_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#a38aa2d8302976875d983b1e2c6b0ced2">DAC_INTENSET_UNDERRUN_Pos</a>))</td></tr>
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<tr class="memitem:a71699d638d22b68c3ae3d4d4bd85d3bd"><td class="memItemLeft" align="right" valign="top"><a id="a71699d638d22b68c3ae3d4d4bd85d3bd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a71699d638d22b68c3ae3d4d4bd85d3bd">DAC_INTENSET_EMPTY0_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:a71699d638d22b68c3ae3d4d4bd85d3bd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENSET) Data Buffer 0 Empty Interrupt Enable <br /></td></tr>
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<tr class="memitem:a9e329b92d3ec11f8a944ebb87de1b6d0"><td class="memItemLeft" align="right" valign="top"><a id="a9e329b92d3ec11f8a944ebb87de1b6d0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_EMPTY0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a71699d638d22b68c3ae3d4d4bd85d3bd">DAC_INTENSET_EMPTY0_Pos</a>)</td></tr>
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<tr class="memitem:a3404b5813c75e2017e7b3de2aa672ac1"><td class="memItemLeft" align="right" valign="top"><a id="a3404b5813c75e2017e7b3de2aa672ac1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a3404b5813c75e2017e7b3de2aa672ac1">DAC_INTENSET_EMPTY1_Pos</a>&#160;&#160;&#160;3</td></tr>
<tr class="memdesc:a3404b5813c75e2017e7b3de2aa672ac1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENSET) Data Buffer 1 Empty Interrupt Enable <br /></td></tr>
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<tr class="memitem:add5526b8e72aa555e23fcd7983b8a90b"><td class="memItemLeft" align="right" valign="top"><a id="add5526b8e72aa555e23fcd7983b8a90b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_EMPTY1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a3404b5813c75e2017e7b3de2aa672ac1">DAC_INTENSET_EMPTY1_Pos</a>)</td></tr>
<tr class="separator:add5526b8e72aa555e23fcd7983b8a90b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a12375d6d098ab02a3889530b60730fc4"><td class="memItemLeft" align="right" valign="top"><a id="a12375d6d098ab02a3889530b60730fc4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a12375d6d098ab02a3889530b60730fc4">DAC_INTENSET_EMPTY_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:a12375d6d098ab02a3889530b60730fc4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENSET) Data Buffer x Empty Interrupt Enable <br /></td></tr>
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<tr class="memitem:abdd31c6ff6ac6c1165d9727020b4720f"><td class="memItemLeft" align="right" valign="top"><a id="abdd31c6ff6ac6c1165d9727020b4720f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_EMPTY_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dac_8h.html#a12375d6d098ab02a3889530b60730fc4">DAC_INTENSET_EMPTY_Pos</a>)</td></tr>
<tr class="separator:abdd31c6ff6ac6c1165d9727020b4720f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a72a5d71bf44ba73259156adbf9d4417e"><td class="memItemLeft" align="right" valign="top"><a id="a72a5d71bf44ba73259156adbf9d4417e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_EMPTY</b>(value)&#160;&#160;&#160;(DAC_INTENSET_EMPTY_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#a12375d6d098ab02a3889530b60730fc4">DAC_INTENSET_EMPTY_Pos</a>))</td></tr>
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<tr class="memitem:a663c3cd696c8d95461326c78342fd7e3"><td class="memItemLeft" align="right" valign="top"><a id="a663c3cd696c8d95461326c78342fd7e3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a663c3cd696c8d95461326c78342fd7e3">DAC_INTENSET_RESRDY0_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:a663c3cd696c8d95461326c78342fd7e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENSET) Result 0 Ready Interrupt Enable <br /></td></tr>
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<tr class="memitem:ad81607633547b8f22b467caa5e70c98d"><td class="memItemLeft" align="right" valign="top"><a id="ad81607633547b8f22b467caa5e70c98d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_RESRDY0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a663c3cd696c8d95461326c78342fd7e3">DAC_INTENSET_RESRDY0_Pos</a>)</td></tr>
<tr class="separator:ad81607633547b8f22b467caa5e70c98d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a970d61c62be63706b204b363c2422f95"><td class="memItemLeft" align="right" valign="top"><a id="a970d61c62be63706b204b363c2422f95"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a970d61c62be63706b204b363c2422f95">DAC_INTENSET_RESRDY1_Pos</a>&#160;&#160;&#160;5</td></tr>
<tr class="memdesc:a970d61c62be63706b204b363c2422f95"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENSET) Result 1 Ready Interrupt Enable <br /></td></tr>
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<tr class="memitem:a30c565e6281c46e6205715846c4cfa32"><td class="memItemLeft" align="right" valign="top"><a id="a30c565e6281c46e6205715846c4cfa32"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_RESRDY1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a970d61c62be63706b204b363c2422f95">DAC_INTENSET_RESRDY1_Pos</a>)</td></tr>
<tr class="separator:a30c565e6281c46e6205715846c4cfa32"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aab9324e6326b7d52691a5c8da52c3444"><td class="memItemLeft" align="right" valign="top"><a id="aab9324e6326b7d52691a5c8da52c3444"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#aab9324e6326b7d52691a5c8da52c3444">DAC_INTENSET_RESRDY_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:aab9324e6326b7d52691a5c8da52c3444"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENSET) Result x Ready Interrupt Enable <br /></td></tr>
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<tr class="memitem:a5abd904922f52cd5697e767e528ee48d"><td class="memItemLeft" align="right" valign="top"><a id="a5abd904922f52cd5697e767e528ee48d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_RESRDY_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dac_8h.html#aab9324e6326b7d52691a5c8da52c3444">DAC_INTENSET_RESRDY_Pos</a>)</td></tr>
<tr class="separator:a5abd904922f52cd5697e767e528ee48d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a392041d63f4612f0ef7ee01c44e3de15"><td class="memItemLeft" align="right" valign="top"><a id="a392041d63f4612f0ef7ee01c44e3de15"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_RESRDY</b>(value)&#160;&#160;&#160;(DAC_INTENSET_RESRDY_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#aab9324e6326b7d52691a5c8da52c3444">DAC_INTENSET_RESRDY_Pos</a>))</td></tr>
<tr class="separator:a392041d63f4612f0ef7ee01c44e3de15"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8e7cb5e3e4c52fb11f03a9afbca9021b"><td class="memItemLeft" align="right" valign="top"><a id="a8e7cb5e3e4c52fb11f03a9afbca9021b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a8e7cb5e3e4c52fb11f03a9afbca9021b">DAC_INTENSET_OVERRUN0_Pos</a>&#160;&#160;&#160;6</td></tr>
<tr class="memdesc:a8e7cb5e3e4c52fb11f03a9afbca9021b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENSET) Overrun 0 Interrupt Enable <br /></td></tr>
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<tr class="memitem:a706ca4f89fcf78e5af00251ddb2feba9"><td class="memItemLeft" align="right" valign="top"><a id="a706ca4f89fcf78e5af00251ddb2feba9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_OVERRUN0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a8e7cb5e3e4c52fb11f03a9afbca9021b">DAC_INTENSET_OVERRUN0_Pos</a>)</td></tr>
<tr class="separator:a706ca4f89fcf78e5af00251ddb2feba9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa29bbdbc60c3e2fc82f8bd18ff55c4aa"><td class="memItemLeft" align="right" valign="top"><a id="aa29bbdbc60c3e2fc82f8bd18ff55c4aa"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#aa29bbdbc60c3e2fc82f8bd18ff55c4aa">DAC_INTENSET_OVERRUN1_Pos</a>&#160;&#160;&#160;7</td></tr>
<tr class="memdesc:aa29bbdbc60c3e2fc82f8bd18ff55c4aa"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENSET) Overrun 1 Interrupt Enable <br /></td></tr>
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<tr class="memitem:a61b7e83bd47c3a7d26cde1154ad3458d"><td class="memItemLeft" align="right" valign="top"><a id="a61b7e83bd47c3a7d26cde1154ad3458d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_OVERRUN1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#aa29bbdbc60c3e2fc82f8bd18ff55c4aa">DAC_INTENSET_OVERRUN1_Pos</a>)</td></tr>
<tr class="separator:a61b7e83bd47c3a7d26cde1154ad3458d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ade4c9791433ae733298029a1b51f3adb"><td class="memItemLeft" align="right" valign="top"><a id="ade4c9791433ae733298029a1b51f3adb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ade4c9791433ae733298029a1b51f3adb">DAC_INTENSET_OVERRUN_Pos</a>&#160;&#160;&#160;6</td></tr>
<tr class="memdesc:ade4c9791433ae733298029a1b51f3adb"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENSET) Overrun x Interrupt Enable <br /></td></tr>
<tr class="separator:ade4c9791433ae733298029a1b51f3adb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aef2671f1d6989d483682f9b59b54c526"><td class="memItemLeft" align="right" valign="top"><a id="aef2671f1d6989d483682f9b59b54c526"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_OVERRUN_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dac_8h.html#ade4c9791433ae733298029a1b51f3adb">DAC_INTENSET_OVERRUN_Pos</a>)</td></tr>
<tr class="separator:aef2671f1d6989d483682f9b59b54c526"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aae56691c28788b4f2d1b79563114d152"><td class="memItemLeft" align="right" valign="top"><a id="aae56691c28788b4f2d1b79563114d152"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_OVERRUN</b>(value)&#160;&#160;&#160;(DAC_INTENSET_OVERRUN_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#ade4c9791433ae733298029a1b51f3adb">DAC_INTENSET_OVERRUN_Pos</a>))</td></tr>
<tr class="separator:aae56691c28788b4f2d1b79563114d152"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a16937f1a74d06e17331ee7d86534570a"><td class="memItemLeft" align="right" valign="top"><a id="a16937f1a74d06e17331ee7d86534570a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a16937f1a74d06e17331ee7d86534570a">DAC_INTENSET_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF)</td></tr>
<tr class="memdesc:a16937f1a74d06e17331ee7d86534570a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTENSET) MASK Register <br /></td></tr>
<tr class="separator:a16937f1a74d06e17331ee7d86534570a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:adb76074cbcb6b6dbbe088030f72d5a4b"><td class="memItemLeft" align="right" valign="top"><a id="adb76074cbcb6b6dbbe088030f72d5a4b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#adb76074cbcb6b6dbbe088030f72d5a4b">DAC_INTFLAG_OFFSET</a>&#160;&#160;&#160;0x06</td></tr>
<tr class="memdesc:adb76074cbcb6b6dbbe088030f72d5a4b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTFLAG offset) Interrupt Flag Status and Clear <br /></td></tr>
<tr class="separator:adb76074cbcb6b6dbbe088030f72d5a4b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9f73e182aae9decbe33d83db01b2830b"><td class="memItemLeft" align="right" valign="top"><a id="a9f73e182aae9decbe33d83db01b2830b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a9f73e182aae9decbe33d83db01b2830b">DAC_INTFLAG_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a9f73e182aae9decbe33d83db01b2830b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTFLAG reset_value) Interrupt Flag Status and Clear <br /></td></tr>
<tr class="separator:a9f73e182aae9decbe33d83db01b2830b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a99534e1a9968859517da0d7890ceedf1"><td class="memItemLeft" align="right" valign="top"><a id="a99534e1a9968859517da0d7890ceedf1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a99534e1a9968859517da0d7890ceedf1">DAC_INTFLAG_UNDERRUN0_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a99534e1a9968859517da0d7890ceedf1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTFLAG) Result 0 Underrun <br /></td></tr>
<tr class="separator:a99534e1a9968859517da0d7890ceedf1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab0f1209d81d340c6dcc9d3b6dcb05882"><td class="memItemLeft" align="right" valign="top"><a id="ab0f1209d81d340c6dcc9d3b6dcb05882"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_UNDERRUN0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a99534e1a9968859517da0d7890ceedf1">DAC_INTFLAG_UNDERRUN0_Pos</a>)</td></tr>
<tr class="separator:ab0f1209d81d340c6dcc9d3b6dcb05882"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac4c87b8b90e57a6044d2954eb478dcb6"><td class="memItemLeft" align="right" valign="top"><a id="ac4c87b8b90e57a6044d2954eb478dcb6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ac4c87b8b90e57a6044d2954eb478dcb6">DAC_INTFLAG_UNDERRUN1_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:ac4c87b8b90e57a6044d2954eb478dcb6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTFLAG) Result 1 Underrun <br /></td></tr>
<tr class="separator:ac4c87b8b90e57a6044d2954eb478dcb6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa49bdfea65580cfa6eeef451b0250d91"><td class="memItemLeft" align="right" valign="top"><a id="aa49bdfea65580cfa6eeef451b0250d91"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_UNDERRUN1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#ac4c87b8b90e57a6044d2954eb478dcb6">DAC_INTFLAG_UNDERRUN1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a6c43469c26efeb772af1a2ceba6e472b">DAC_INTFLAG_UNDERRUN_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a6c43469c26efeb772af1a2ceba6e472b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTFLAG) Result x Underrun <br /></td></tr>
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<tr class="memitem:a07d9e8afc2c3b26a092b0e50a84cfa07"><td class="memItemLeft" align="right" valign="top"><a id="a07d9e8afc2c3b26a092b0e50a84cfa07"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_UNDERRUN_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dac_8h.html#a6c43469c26efeb772af1a2ceba6e472b">DAC_INTFLAG_UNDERRUN_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_UNDERRUN</b>(value)&#160;&#160;&#160;(DAC_INTFLAG_UNDERRUN_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#a6c43469c26efeb772af1a2ceba6e472b">DAC_INTFLAG_UNDERRUN_Pos</a>))</td></tr>
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<tr class="memitem:ad32de3852e2d2484e2832be4819d4364"><td class="memItemLeft" align="right" valign="top"><a id="ad32de3852e2d2484e2832be4819d4364"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ad32de3852e2d2484e2832be4819d4364">DAC_INTFLAG_EMPTY0_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:ad32de3852e2d2484e2832be4819d4364"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTFLAG) Data Buffer 0 Empty <br /></td></tr>
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<tr class="memitem:a0dea5c850eb6905e594a704f39e96265"><td class="memItemLeft" align="right" valign="top"><a id="a0dea5c850eb6905e594a704f39e96265"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_EMPTY0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#ad32de3852e2d2484e2832be4819d4364">DAC_INTFLAG_EMPTY0_Pos</a>)</td></tr>
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<tr class="memitem:a7e3bd4dd4fca96ba8d463b959c91d5dd"><td class="memItemLeft" align="right" valign="top"><a id="a7e3bd4dd4fca96ba8d463b959c91d5dd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a7e3bd4dd4fca96ba8d463b959c91d5dd">DAC_INTFLAG_EMPTY1_Pos</a>&#160;&#160;&#160;3</td></tr>
<tr class="memdesc:a7e3bd4dd4fca96ba8d463b959c91d5dd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTFLAG) Data Buffer 1 Empty <br /></td></tr>
<tr class="separator:a7e3bd4dd4fca96ba8d463b959c91d5dd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3366022ba576c500769b03f891d28453"><td class="memItemLeft" align="right" valign="top"><a id="a3366022ba576c500769b03f891d28453"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_EMPTY1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a7e3bd4dd4fca96ba8d463b959c91d5dd">DAC_INTFLAG_EMPTY1_Pos</a>)</td></tr>
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<tr class="memitem:a0dac29b106d18582f439752a01102763"><td class="memItemLeft" align="right" valign="top"><a id="a0dac29b106d18582f439752a01102763"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a0dac29b106d18582f439752a01102763">DAC_INTFLAG_EMPTY_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:a0dac29b106d18582f439752a01102763"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTFLAG) Data Buffer x Empty <br /></td></tr>
<tr class="separator:a0dac29b106d18582f439752a01102763"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af190df8dfe6ad43d3bb7f0066d295845"><td class="memItemLeft" align="right" valign="top"><a id="af190df8dfe6ad43d3bb7f0066d295845"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_EMPTY_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dac_8h.html#a0dac29b106d18582f439752a01102763">DAC_INTFLAG_EMPTY_Pos</a>)</td></tr>
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<tr class="memitem:a7da99f63d5a2d03f99681a95f9b793a0"><td class="memItemLeft" align="right" valign="top"><a id="a7da99f63d5a2d03f99681a95f9b793a0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_EMPTY</b>(value)&#160;&#160;&#160;(DAC_INTFLAG_EMPTY_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#a0dac29b106d18582f439752a01102763">DAC_INTFLAG_EMPTY_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a427673598aab80580409cf27ad38392a">DAC_INTFLAG_RESRDY0_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:a427673598aab80580409cf27ad38392a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTFLAG) Result 0 Ready <br /></td></tr>
<tr class="separator:a427673598aab80580409cf27ad38392a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8cd88556b6fde4c8bddd482f365b3633"><td class="memItemLeft" align="right" valign="top"><a id="a8cd88556b6fde4c8bddd482f365b3633"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_RESRDY0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a427673598aab80580409cf27ad38392a">DAC_INTFLAG_RESRDY0_Pos</a>)</td></tr>
<tr class="separator:a8cd88556b6fde4c8bddd482f365b3633"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a936fafa26e268d86c70b9902d8ea1952"><td class="memItemLeft" align="right" valign="top"><a id="a936fafa26e268d86c70b9902d8ea1952"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a936fafa26e268d86c70b9902d8ea1952">DAC_INTFLAG_RESRDY1_Pos</a>&#160;&#160;&#160;5</td></tr>
<tr class="memdesc:a936fafa26e268d86c70b9902d8ea1952"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTFLAG) Result 1 Ready <br /></td></tr>
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<tr class="memitem:a359c2a1802d79f2330b0dc9edf7757e7"><td class="memItemLeft" align="right" valign="top"><a id="a359c2a1802d79f2330b0dc9edf7757e7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_RESRDY1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a936fafa26e268d86c70b9902d8ea1952">DAC_INTFLAG_RESRDY1_Pos</a>)</td></tr>
<tr class="separator:a359c2a1802d79f2330b0dc9edf7757e7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af9c101b304080de5ca7c81db6f3433d1"><td class="memItemLeft" align="right" valign="top"><a id="af9c101b304080de5ca7c81db6f3433d1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#af9c101b304080de5ca7c81db6f3433d1">DAC_INTFLAG_RESRDY_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:af9c101b304080de5ca7c81db6f3433d1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTFLAG) Result x Ready <br /></td></tr>
<tr class="separator:af9c101b304080de5ca7c81db6f3433d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5135031a40df1406c3f0c3b411343a72"><td class="memItemLeft" align="right" valign="top"><a id="a5135031a40df1406c3f0c3b411343a72"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_RESRDY_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dac_8h.html#af9c101b304080de5ca7c81db6f3433d1">DAC_INTFLAG_RESRDY_Pos</a>)</td></tr>
<tr class="separator:a5135031a40df1406c3f0c3b411343a72"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a36bbb64be7713f4efe39a88ebdffcd42"><td class="memItemLeft" align="right" valign="top"><a id="a36bbb64be7713f4efe39a88ebdffcd42"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_RESRDY</b>(value)&#160;&#160;&#160;(DAC_INTFLAG_RESRDY_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#af9c101b304080de5ca7c81db6f3433d1">DAC_INTFLAG_RESRDY_Pos</a>))</td></tr>
<tr class="separator:a36bbb64be7713f4efe39a88ebdffcd42"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aeb99a9e50d4cb04a7b718c0bde593779"><td class="memItemLeft" align="right" valign="top"><a id="aeb99a9e50d4cb04a7b718c0bde593779"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#aeb99a9e50d4cb04a7b718c0bde593779">DAC_INTFLAG_OVERRUN0_Pos</a>&#160;&#160;&#160;6</td></tr>
<tr class="memdesc:aeb99a9e50d4cb04a7b718c0bde593779"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTFLAG) Result 0 Overrun <br /></td></tr>
<tr class="separator:aeb99a9e50d4cb04a7b718c0bde593779"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae24565cdf0e20e4c57b808f774d31aaa"><td class="memItemLeft" align="right" valign="top"><a id="ae24565cdf0e20e4c57b808f774d31aaa"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_OVERRUN0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#aeb99a9e50d4cb04a7b718c0bde593779">DAC_INTFLAG_OVERRUN0_Pos</a>)</td></tr>
<tr class="separator:ae24565cdf0e20e4c57b808f774d31aaa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afcb222d8386690e91cbd4a9428a4f60e"><td class="memItemLeft" align="right" valign="top"><a id="afcb222d8386690e91cbd4a9428a4f60e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#afcb222d8386690e91cbd4a9428a4f60e">DAC_INTFLAG_OVERRUN1_Pos</a>&#160;&#160;&#160;7</td></tr>
<tr class="memdesc:afcb222d8386690e91cbd4a9428a4f60e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTFLAG) Result 1 Overrun <br /></td></tr>
<tr class="separator:afcb222d8386690e91cbd4a9428a4f60e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2a5728b9db1621ca4dfde30f3992347d"><td class="memItemLeft" align="right" valign="top"><a id="a2a5728b9db1621ca4dfde30f3992347d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_OVERRUN1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#afcb222d8386690e91cbd4a9428a4f60e">DAC_INTFLAG_OVERRUN1_Pos</a>)</td></tr>
<tr class="separator:a2a5728b9db1621ca4dfde30f3992347d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ade5afe2053ab21e01c28212eaef0fe55"><td class="memItemLeft" align="right" valign="top"><a id="ade5afe2053ab21e01c28212eaef0fe55"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ade5afe2053ab21e01c28212eaef0fe55">DAC_INTFLAG_OVERRUN_Pos</a>&#160;&#160;&#160;6</td></tr>
<tr class="memdesc:ade5afe2053ab21e01c28212eaef0fe55"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTFLAG) Result x Overrun <br /></td></tr>
<tr class="separator:ade5afe2053ab21e01c28212eaef0fe55"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af7868e9ac6c97d8fbf47db794e05dba3"><td class="memItemLeft" align="right" valign="top"><a id="af7868e9ac6c97d8fbf47db794e05dba3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_OVERRUN_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dac_8h.html#ade5afe2053ab21e01c28212eaef0fe55">DAC_INTFLAG_OVERRUN_Pos</a>)</td></tr>
<tr class="separator:af7868e9ac6c97d8fbf47db794e05dba3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac608495ff02a380656109a77748455c6"><td class="memItemLeft" align="right" valign="top"><a id="ac608495ff02a380656109a77748455c6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_OVERRUN</b>(value)&#160;&#160;&#160;(DAC_INTFLAG_OVERRUN_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#ade5afe2053ab21e01c28212eaef0fe55">DAC_INTFLAG_OVERRUN_Pos</a>))</td></tr>
<tr class="separator:ac608495ff02a380656109a77748455c6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7610b49b2915578cf29db233149cf421"><td class="memItemLeft" align="right" valign="top"><a id="a7610b49b2915578cf29db233149cf421"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a7610b49b2915578cf29db233149cf421">DAC_INTFLAG_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF)</td></tr>
<tr class="memdesc:a7610b49b2915578cf29db233149cf421"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_INTFLAG) MASK Register <br /></td></tr>
<tr class="separator:a7610b49b2915578cf29db233149cf421"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a515f997330d2406b1230c8b83e7c5a6b"><td class="memItemLeft" align="right" valign="top"><a id="a515f997330d2406b1230c8b83e7c5a6b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a515f997330d2406b1230c8b83e7c5a6b">DAC_STATUS_OFFSET</a>&#160;&#160;&#160;0x07</td></tr>
<tr class="memdesc:a515f997330d2406b1230c8b83e7c5a6b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_STATUS offset) Status <br /></td></tr>
<tr class="separator:a515f997330d2406b1230c8b83e7c5a6b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a114959003f1b29d6a60514c7e42781e3"><td class="memItemLeft" align="right" valign="top"><a id="a114959003f1b29d6a60514c7e42781e3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a114959003f1b29d6a60514c7e42781e3">DAC_STATUS_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a114959003f1b29d6a60514c7e42781e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_STATUS reset_value) Status <br /></td></tr>
<tr class="separator:a114959003f1b29d6a60514c7e42781e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4486c687c5a4ab1839b2a265c050585c"><td class="memItemLeft" align="right" valign="top"><a id="a4486c687c5a4ab1839b2a265c050585c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a4486c687c5a4ab1839b2a265c050585c">DAC_STATUS_READY0_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a4486c687c5a4ab1839b2a265c050585c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_STATUS) DAC 0 Startup Ready <br /></td></tr>
<tr class="separator:a4486c687c5a4ab1839b2a265c050585c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a93b26c48449c852d120576cf700cace4"><td class="memItemLeft" align="right" valign="top"><a id="a93b26c48449c852d120576cf700cace4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_STATUS_READY0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a4486c687c5a4ab1839b2a265c050585c">DAC_STATUS_READY0_Pos</a>)</td></tr>
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<tr class="memitem:a18d69a63dd603174ef5ff40ea7afbb8e"><td class="memItemLeft" align="right" valign="top"><a id="a18d69a63dd603174ef5ff40ea7afbb8e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a18d69a63dd603174ef5ff40ea7afbb8e">DAC_STATUS_READY1_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:a18d69a63dd603174ef5ff40ea7afbb8e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_STATUS) DAC 1 Startup Ready <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_STATUS_READY1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a18d69a63dd603174ef5ff40ea7afbb8e">DAC_STATUS_READY1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a466a35ff7aea713f86197f0fba85d7ae">DAC_STATUS_READY_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a466a35ff7aea713f86197f0fba85d7ae"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_STATUS) DAC x Startup Ready <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_STATUS_READY_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dac_8h.html#a466a35ff7aea713f86197f0fba85d7ae">DAC_STATUS_READY_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_STATUS_READY</b>(value)&#160;&#160;&#160;(DAC_STATUS_READY_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#a466a35ff7aea713f86197f0fba85d7ae">DAC_STATUS_READY_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ae9501a2a26e724e737609569a91c03d3">DAC_STATUS_EOC0_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:ae9501a2a26e724e737609569a91c03d3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_STATUS) DAC 0 End of Conversion <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_STATUS_EOC0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#ae9501a2a26e724e737609569a91c03d3">DAC_STATUS_EOC0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#aa4eeac4108e1883eb87c11c9c2f122be">DAC_STATUS_EOC1_Pos</a>&#160;&#160;&#160;3</td></tr>
<tr class="memdesc:aa4eeac4108e1883eb87c11c9c2f122be"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_STATUS) DAC 1 End of Conversion <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_STATUS_EOC1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#aa4eeac4108e1883eb87c11c9c2f122be">DAC_STATUS_EOC1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a8f0382f0b6c03183ecfbb3f71270053d">DAC_STATUS_EOC_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:a8f0382f0b6c03183ecfbb3f71270053d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_STATUS) DAC x End of Conversion <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_STATUS_EOC_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dac_8h.html#a8f0382f0b6c03183ecfbb3f71270053d">DAC_STATUS_EOC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_STATUS_EOC</b>(value)&#160;&#160;&#160;(DAC_STATUS_EOC_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#a8f0382f0b6c03183ecfbb3f71270053d">DAC_STATUS_EOC_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a989b67a3f83996021dc0214e918aaddf">DAC_STATUS_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0F)</td></tr>
<tr class="memdesc:a989b67a3f83996021dc0214e918aaddf"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_STATUS) MASK Register <br /></td></tr>
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<tr class="memitem:ab524594209eea0ef54d7e77a42be7863"><td class="memItemLeft" align="right" valign="top"><a id="ab524594209eea0ef54d7e77a42be7863"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ab524594209eea0ef54d7e77a42be7863">DAC_SYNCBUSY_OFFSET</a>&#160;&#160;&#160;0x08</td></tr>
<tr class="memdesc:ab524594209eea0ef54d7e77a42be7863"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_SYNCBUSY offset) Synchronization Busy <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a5decef95bed07e847ab4c1b586df8f3d">DAC_SYNCBUSY_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a5decef95bed07e847ab4c1b586df8f3d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_SYNCBUSY reset_value) Synchronization Busy <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a0ab7aff18f93be96e950be32c7cb04cb">DAC_SYNCBUSY_SWRST_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a0ab7aff18f93be96e950be32c7cb04cb"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_SYNCBUSY) Software Reset <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_SYNCBUSY_SWRST</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a0ab7aff18f93be96e950be32c7cb04cb">DAC_SYNCBUSY_SWRST_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a230872861abc95e2225e3f5c4246f141">DAC_SYNCBUSY_ENABLE_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:a230872861abc95e2225e3f5c4246f141"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_SYNCBUSY) DAC Enable Status <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_SYNCBUSY_ENABLE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a230872861abc95e2225e3f5c4246f141">DAC_SYNCBUSY_ENABLE_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a9f415827b3ff10d6dcff38f9e03d2dd3">DAC_SYNCBUSY_DATA0_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:a9f415827b3ff10d6dcff38f9e03d2dd3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_SYNCBUSY) Data DAC 0 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_SYNCBUSY_DATA0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a9f415827b3ff10d6dcff38f9e03d2dd3">DAC_SYNCBUSY_DATA0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a42acf2c6875f6e0d2ab1997ac3cf71cd">DAC_SYNCBUSY_DATA1_Pos</a>&#160;&#160;&#160;3</td></tr>
<tr class="memdesc:a42acf2c6875f6e0d2ab1997ac3cf71cd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_SYNCBUSY) Data DAC 1 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_SYNCBUSY_DATA1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a42acf2c6875f6e0d2ab1997ac3cf71cd">DAC_SYNCBUSY_DATA1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a2c7fa799e63254f6fe31997f8d74ab69">DAC_SYNCBUSY_DATA_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:a2c7fa799e63254f6fe31997f8d74ab69"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_SYNCBUSY) Data DAC x <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_SYNCBUSY_DATA_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dac_8h.html#a2c7fa799e63254f6fe31997f8d74ab69">DAC_SYNCBUSY_DATA_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_SYNCBUSY_DATA</b>(value)&#160;&#160;&#160;(DAC_SYNCBUSY_DATA_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#a2c7fa799e63254f6fe31997f8d74ab69">DAC_SYNCBUSY_DATA_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#abcfee0c9deae7256c79904ede1fb80f3">DAC_SYNCBUSY_DATABUF0_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:abcfee0c9deae7256c79904ede1fb80f3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_SYNCBUSY) Data Buffer DAC 0 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_SYNCBUSY_DATABUF0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#abcfee0c9deae7256c79904ede1fb80f3">DAC_SYNCBUSY_DATABUF0_Pos</a>)</td></tr>
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<tr class="memitem:af33c0e2294a830ae02a2fa7b8ace4080"><td class="memItemLeft" align="right" valign="top"><a id="af33c0e2294a830ae02a2fa7b8ace4080"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#af33c0e2294a830ae02a2fa7b8ace4080">DAC_SYNCBUSY_DATABUF1_Pos</a>&#160;&#160;&#160;5</td></tr>
<tr class="memdesc:af33c0e2294a830ae02a2fa7b8ace4080"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_SYNCBUSY) Data Buffer DAC 1 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_SYNCBUSY_DATABUF1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dac_8h.html#af33c0e2294a830ae02a2fa7b8ace4080">DAC_SYNCBUSY_DATABUF1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a04b32c9d531c11ebc9ded7e77709d39e">DAC_SYNCBUSY_DATABUF_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:a04b32c9d531c11ebc9ded7e77709d39e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_SYNCBUSY) Data Buffer DAC x <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_SYNCBUSY_DATABUF_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dac_8h.html#a04b32c9d531c11ebc9ded7e77709d39e">DAC_SYNCBUSY_DATABUF_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_SYNCBUSY_DATABUF</b>(value)&#160;&#160;&#160;(DAC_SYNCBUSY_DATABUF_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#a04b32c9d531c11ebc9ded7e77709d39e">DAC_SYNCBUSY_DATABUF_Pos</a>))</td></tr>
<tr class="separator:adfb2f74717ac4791a1b8ccd0e9be9699"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a9f12d800862e02454c05ef89c9fb3b88">DAC_SYNCBUSY_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000003F)</td></tr>
<tr class="memdesc:a9f12d800862e02454c05ef89c9fb3b88"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_SYNCBUSY) MASK Register <br /></td></tr>
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<tr class="memitem:a84ebc513c3813810220d0effb64d32a6"><td class="memItemLeft" align="right" valign="top"><a id="a84ebc513c3813810220d0effb64d32a6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a84ebc513c3813810220d0effb64d32a6">DAC_DACCTRL_OFFSET</a>&#160;&#160;&#160;0x0C</td></tr>
<tr class="memdesc:a84ebc513c3813810220d0effb64d32a6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DACCTRL offset) DAC n Control <br /></td></tr>
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<tr class="memitem:a3035c8be28b7caae01f7d985eefa0240"><td class="memItemLeft" align="right" valign="top"><a id="a3035c8be28b7caae01f7d985eefa0240"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a3035c8be28b7caae01f7d985eefa0240">DAC_DACCTRL_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000)</td></tr>
<tr class="memdesc:a3035c8be28b7caae01f7d985eefa0240"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DACCTRL reset_value) DAC n Control <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#aa211888989fa388c431ac25dea23b398">DAC_DACCTRL_LEFTADJ_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:aa211888989fa388c431ac25dea23b398"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DACCTRL) Left Adjusted Data <br /></td></tr>
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<tr class="memitem:ae967f060155c9faf29e8cf4efa45abb5"><td class="memItemLeft" align="right" valign="top"><a id="ae967f060155c9faf29e8cf4efa45abb5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_LEFTADJ</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dac_8h.html#aa211888989fa388c431ac25dea23b398">DAC_DACCTRL_LEFTADJ_Pos</a>)</td></tr>
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<tr class="memitem:a8ff7f04caf3d817ce0400efb42538924"><td class="memItemLeft" align="right" valign="top"><a id="a8ff7f04caf3d817ce0400efb42538924"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a8ff7f04caf3d817ce0400efb42538924">DAC_DACCTRL_ENABLE_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:a8ff7f04caf3d817ce0400efb42538924"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DACCTRL) Enable DAC0 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_ENABLE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a8ff7f04caf3d817ce0400efb42538924">DAC_DACCTRL_ENABLE_Pos</a>)</td></tr>
<tr class="separator:a6ac83f6e5e81f4ceed5387bf4c971ab9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a99c14926d2b1e10dcdf3495435242fb2"><td class="memItemLeft" align="right" valign="top"><a id="a99c14926d2b1e10dcdf3495435242fb2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a99c14926d2b1e10dcdf3495435242fb2">DAC_DACCTRL_CCTRL_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:a99c14926d2b1e10dcdf3495435242fb2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DACCTRL) Current Control <br /></td></tr>
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<tr class="memitem:a701f95bfdc7ec511991ee3f37c825f1e"><td class="memItemLeft" align="right" valign="top"><a id="a701f95bfdc7ec511991ee3f37c825f1e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_CCTRL_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dac_8h.html#a99c14926d2b1e10dcdf3495435242fb2">DAC_DACCTRL_CCTRL_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_CCTRL</b>(value)&#160;&#160;&#160;(DAC_DACCTRL_CCTRL_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#a99c14926d2b1e10dcdf3495435242fb2">DAC_DACCTRL_CCTRL_Pos</a>))</td></tr>
<tr class="separator:adee5e56871ec428bb6b3ae5744ae0b2f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a64aa7d99ee21bf0fcc63c55df258a865"><td class="memItemLeft" align="right" valign="top"><a id="a64aa7d99ee21bf0fcc63c55df258a865"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a64aa7d99ee21bf0fcc63c55df258a865">DAC_DACCTRL_CCTRL_CC100K_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a64aa7d99ee21bf0fcc63c55df258a865"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DACCTRL) GCLK_DAC ≤ 1.2MHz (100kSPS) <br /></td></tr>
<tr class="separator:a64aa7d99ee21bf0fcc63c55df258a865"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0eae47cb1607b2737281a3839708581f"><td class="memItemLeft" align="right" valign="top"><a id="a0eae47cb1607b2737281a3839708581f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a0eae47cb1607b2737281a3839708581f">DAC_DACCTRL_CCTRL_CC1M_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:a0eae47cb1607b2737281a3839708581f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DACCTRL) 1.2MHz &lt; GCLK_DAC ≤ 6MHz (500kSPS) <br /></td></tr>
<tr class="separator:a0eae47cb1607b2737281a3839708581f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a47d57d2b4da612791e27d9e1a5574926"><td class="memItemLeft" align="right" valign="top"><a id="a47d57d2b4da612791e27d9e1a5574926"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a47d57d2b4da612791e27d9e1a5574926">DAC_DACCTRL_CCTRL_CC12M_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a47d57d2b4da612791e27d9e1a5574926"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DACCTRL) 6MHz &lt; GCLK_DAC ≤ 12MHz (1MSPS) <br /></td></tr>
<tr class="separator:a47d57d2b4da612791e27d9e1a5574926"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab7ebf1c9eaad10a93d17ce83471472a4"><td class="memItemLeft" align="right" valign="top"><a id="ab7ebf1c9eaad10a93d17ce83471472a4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_CCTRL_CC100K</b>&#160;&#160;&#160;(<a class="el" href="component_2dac_8h.html#a64aa7d99ee21bf0fcc63c55df258a865">DAC_DACCTRL_CCTRL_CC100K_Val</a> &lt;&lt; <a class="el" href="component_2dac_8h.html#a99c14926d2b1e10dcdf3495435242fb2">DAC_DACCTRL_CCTRL_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_CCTRL_CC1M</b>&#160;&#160;&#160;(<a class="el" href="component_2dac_8h.html#a0eae47cb1607b2737281a3839708581f">DAC_DACCTRL_CCTRL_CC1M_Val</a> &lt;&lt; <a class="el" href="component_2dac_8h.html#a99c14926d2b1e10dcdf3495435242fb2">DAC_DACCTRL_CCTRL_Pos</a>)</td></tr>
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<tr class="memitem:a063ea40425fabd90ab37345e818bc448"><td class="memItemLeft" align="right" valign="top"><a id="a063ea40425fabd90ab37345e818bc448"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_CCTRL_CC12M</b>&#160;&#160;&#160;(<a class="el" href="component_2dac_8h.html#a47d57d2b4da612791e27d9e1a5574926">DAC_DACCTRL_CCTRL_CC12M_Val</a> &lt;&lt; <a class="el" href="component_2dac_8h.html#a99c14926d2b1e10dcdf3495435242fb2">DAC_DACCTRL_CCTRL_Pos</a>)</td></tr>
<tr class="separator:a063ea40425fabd90ab37345e818bc448"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7aacb6f50e4b47e5c436bda9c3c3d772"><td class="memItemLeft" align="right" valign="top"><a id="a7aacb6f50e4b47e5c436bda9c3c3d772"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a7aacb6f50e4b47e5c436bda9c3c3d772">DAC_DACCTRL_FEXT_Pos</a>&#160;&#160;&#160;5</td></tr>
<tr class="memdesc:a7aacb6f50e4b47e5c436bda9c3c3d772"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DACCTRL) Standalone Filter <br /></td></tr>
<tr class="separator:a7aacb6f50e4b47e5c436bda9c3c3d772"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3a07c1bfd1f07aff2b5fdc2ee76843cb"><td class="memItemLeft" align="right" valign="top"><a id="a3a07c1bfd1f07aff2b5fdc2ee76843cb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_FEXT</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a7aacb6f50e4b47e5c436bda9c3c3d772">DAC_DACCTRL_FEXT_Pos</a>)</td></tr>
<tr class="separator:a3a07c1bfd1f07aff2b5fdc2ee76843cb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af3ba0076e55be71014f13602c7e9de14"><td class="memItemLeft" align="right" valign="top"><a id="af3ba0076e55be71014f13602c7e9de14"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#af3ba0076e55be71014f13602c7e9de14">DAC_DACCTRL_RUNSTDBY_Pos</a>&#160;&#160;&#160;6</td></tr>
<tr class="memdesc:af3ba0076e55be71014f13602c7e9de14"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DACCTRL) Run in Standby <br /></td></tr>
<tr class="separator:af3ba0076e55be71014f13602c7e9de14"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab4a6d29fd16a3ce31665c3298e6b94fc"><td class="memItemLeft" align="right" valign="top"><a id="ab4a6d29fd16a3ce31665c3298e6b94fc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_RUNSTDBY</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dac_8h.html#af3ba0076e55be71014f13602c7e9de14">DAC_DACCTRL_RUNSTDBY_Pos</a>)</td></tr>
<tr class="separator:ab4a6d29fd16a3ce31665c3298e6b94fc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8f75bd83f35ebe6cd292e79233343400"><td class="memItemLeft" align="right" valign="top"><a id="a8f75bd83f35ebe6cd292e79233343400"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a8f75bd83f35ebe6cd292e79233343400">DAC_DACCTRL_DITHER_Pos</a>&#160;&#160;&#160;7</td></tr>
<tr class="memdesc:a8f75bd83f35ebe6cd292e79233343400"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DACCTRL) Dithering Mode <br /></td></tr>
<tr class="separator:a8f75bd83f35ebe6cd292e79233343400"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a588b9ac85119ed7dfbfeea72f77334d4"><td class="memItemLeft" align="right" valign="top"><a id="a588b9ac85119ed7dfbfeea72f77334d4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_DITHER</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a8f75bd83f35ebe6cd292e79233343400">DAC_DACCTRL_DITHER_Pos</a>)</td></tr>
<tr class="separator:a588b9ac85119ed7dfbfeea72f77334d4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a40153043ea62df2085c32f96ba056fca"><td class="memItemLeft" align="right" valign="top"><a id="a40153043ea62df2085c32f96ba056fca"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a40153043ea62df2085c32f96ba056fca">DAC_DACCTRL_REFRESH_Pos</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:a40153043ea62df2085c32f96ba056fca"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DACCTRL) Refresh period <br /></td></tr>
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<tr class="memitem:a3d9183dbfb728784f2ed562952a60245"><td class="memItemLeft" align="right" valign="top"><a id="a3d9183dbfb728784f2ed562952a60245"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_REFRESH_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2dac_8h.html#a40153043ea62df2085c32f96ba056fca">DAC_DACCTRL_REFRESH_Pos</a>)</td></tr>
<tr class="separator:a3d9183dbfb728784f2ed562952a60245"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a16b719fc4e853b93591bae9d5b32a1aa"><td class="memItemLeft" align="right" valign="top"><a id="a16b719fc4e853b93591bae9d5b32a1aa"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_REFRESH</b>(value)&#160;&#160;&#160;(DAC_DACCTRL_REFRESH_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#a40153043ea62df2085c32f96ba056fca">DAC_DACCTRL_REFRESH_Pos</a>))</td></tr>
<tr class="separator:a16b719fc4e853b93591bae9d5b32a1aa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3e30d4da7f6767e50a2bc4a0c959a222"><td class="memItemLeft" align="right" valign="top"><a id="a3e30d4da7f6767e50a2bc4a0c959a222"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a3e30d4da7f6767e50a2bc4a0c959a222">DAC_DACCTRL_OSR_Pos</a>&#160;&#160;&#160;13</td></tr>
<tr class="memdesc:a3e30d4da7f6767e50a2bc4a0c959a222"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DACCTRL) Sampling Rate <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_OSR_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) &lt;&lt; <a class="el" href="component_2dac_8h.html#a3e30d4da7f6767e50a2bc4a0c959a222">DAC_DACCTRL_OSR_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_OSR</b>(value)&#160;&#160;&#160;(DAC_DACCTRL_OSR_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#a3e30d4da7f6767e50a2bc4a0c959a222">DAC_DACCTRL_OSR_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a3d9ce4bc003bffdea6fb98da402d2318">DAC_DACCTRL_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xEFEF)</td></tr>
<tr class="memdesc:a3d9ce4bc003bffdea6fb98da402d2318"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DACCTRL) MASK Register <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a927b65fb825b37f7f7b23d90604430be">DAC_DATA_OFFSET</a>&#160;&#160;&#160;0x10</td></tr>
<tr class="memdesc:a927b65fb825b37f7f7b23d90604430be"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DATA offset) DAC n Data <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a18ce37ed9fbd7ceef65e3837f2ed73ec">DAC_DATA_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000)</td></tr>
<tr class="memdesc:a18ce37ed9fbd7ceef65e3837f2ed73ec"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DATA reset_value) DAC n Data <br /></td></tr>
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<tr class="memitem:abb4ad33edb03cfa83cacba4fbfcae055"><td class="memItemLeft" align="right" valign="top"><a id="abb4ad33edb03cfa83cacba4fbfcae055"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#abb4ad33edb03cfa83cacba4fbfcae055">DAC_DATA_DATA_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:abb4ad33edb03cfa83cacba4fbfcae055"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DATA) DAC0 Data <br /></td></tr>
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<tr class="memitem:a171d99dfcf0786683343dee659c78c1f"><td class="memItemLeft" align="right" valign="top"><a id="a171d99dfcf0786683343dee659c78c1f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_DATA_DATA_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF) &lt;&lt; <a class="el" href="component_2dac_8h.html#abb4ad33edb03cfa83cacba4fbfcae055">DAC_DATA_DATA_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_DATA_DATA</b>(value)&#160;&#160;&#160;(DAC_DATA_DATA_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#abb4ad33edb03cfa83cacba4fbfcae055">DAC_DATA_DATA_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a1bb2391625c1bf82261cfb3a23c32181">DAC_DATA_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF)</td></tr>
<tr class="memdesc:a1bb2391625c1bf82261cfb3a23c32181"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DATA) MASK Register <br /></td></tr>
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<tr class="memitem:a925e76e2151662945396d1937062bdf7"><td class="memItemLeft" align="right" valign="top"><a id="a925e76e2151662945396d1937062bdf7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a925e76e2151662945396d1937062bdf7">DAC_DATABUF_OFFSET</a>&#160;&#160;&#160;0x14</td></tr>
<tr class="memdesc:a925e76e2151662945396d1937062bdf7"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DATABUF offset) DAC n Data Buffer <br /></td></tr>
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<tr class="memitem:a3649ae1cf9dbb0179c3a00c0e210bc23"><td class="memItemLeft" align="right" valign="top"><a id="a3649ae1cf9dbb0179c3a00c0e210bc23"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a3649ae1cf9dbb0179c3a00c0e210bc23">DAC_DATABUF_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000)</td></tr>
<tr class="memdesc:a3649ae1cf9dbb0179c3a00c0e210bc23"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DATABUF reset_value) DAC n Data Buffer <br /></td></tr>
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<tr class="memitem:a3fe3d9c9181741d88429ff03b62828e5"><td class="memItemLeft" align="right" valign="top"><a id="a3fe3d9c9181741d88429ff03b62828e5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a3fe3d9c9181741d88429ff03b62828e5">DAC_DATABUF_DATABUF_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a3fe3d9c9181741d88429ff03b62828e5"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DATABUF) DAC0 Data Buffer <br /></td></tr>
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<tr class="memitem:ab9b1749e7a45e018441aa8987cc29c16"><td class="memItemLeft" align="right" valign="top"><a id="ab9b1749e7a45e018441aa8987cc29c16"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_DATABUF_DATABUF_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF) &lt;&lt; <a class="el" href="component_2dac_8h.html#a3fe3d9c9181741d88429ff03b62828e5">DAC_DATABUF_DATABUF_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_DATABUF_DATABUF</b>(value)&#160;&#160;&#160;(DAC_DATABUF_DATABUF_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#a3fe3d9c9181741d88429ff03b62828e5">DAC_DATABUF_DATABUF_Pos</a>))</td></tr>
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<tr class="memitem:a09bc5edc17c5afd32066807527a78ba1"><td class="memItemLeft" align="right" valign="top"><a id="a09bc5edc17c5afd32066807527a78ba1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a09bc5edc17c5afd32066807527a78ba1">DAC_DATABUF_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF)</td></tr>
<tr class="memdesc:a09bc5edc17c5afd32066807527a78ba1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DATABUF) MASK Register <br /></td></tr>
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<tr class="memitem:ad921df6ba2692bf586910433879cfc97"><td class="memItemLeft" align="right" valign="top"><a id="ad921df6ba2692bf586910433879cfc97"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ad921df6ba2692bf586910433879cfc97">DAC_DBGCTRL_OFFSET</a>&#160;&#160;&#160;0x18</td></tr>
<tr class="memdesc:ad921df6ba2692bf586910433879cfc97"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DBGCTRL offset) Debug Control <br /></td></tr>
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<tr class="memitem:ab17f08ba0800da1162482ada6b8e2624"><td class="memItemLeft" align="right" valign="top"><a id="ab17f08ba0800da1162482ada6b8e2624"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ab17f08ba0800da1162482ada6b8e2624">DAC_DBGCTRL_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:ab17f08ba0800da1162482ada6b8e2624"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DBGCTRL reset_value) Debug Control <br /></td></tr>
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<tr class="memitem:a942d362f9041cbc6fd9b5d70c04b3eee"><td class="memItemLeft" align="right" valign="top"><a id="a942d362f9041cbc6fd9b5d70c04b3eee"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a942d362f9041cbc6fd9b5d70c04b3eee">DAC_DBGCTRL_DBGRUN_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a942d362f9041cbc6fd9b5d70c04b3eee"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DBGCTRL) Debug Run <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_DBGCTRL_DBGRUN</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dac_8h.html#a942d362f9041cbc6fd9b5d70c04b3eee">DAC_DBGCTRL_DBGRUN_Pos</a>)</td></tr>
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<tr class="memitem:af587f004b2e652bebe2c8d2443acf5bd"><td class="memItemLeft" align="right" valign="top"><a id="af587f004b2e652bebe2c8d2443acf5bd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#af587f004b2e652bebe2c8d2443acf5bd">DAC_DBGCTRL_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x01)</td></tr>
<tr class="memdesc:af587f004b2e652bebe2c8d2443acf5bd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_DBGCTRL) MASK Register <br /></td></tr>
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<tr class="memitem:a5fa7bdf46fd439a061df15be496ce0d0"><td class="memItemLeft" align="right" valign="top"><a id="a5fa7bdf46fd439a061df15be496ce0d0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a5fa7bdf46fd439a061df15be496ce0d0">DAC_RESULT_OFFSET</a>&#160;&#160;&#160;0x1C</td></tr>
<tr class="memdesc:a5fa7bdf46fd439a061df15be496ce0d0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_RESULT offset) Filter Result <br /></td></tr>
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<tr class="memitem:affd951824551823018058bba3d9ab4ee"><td class="memItemLeft" align="right" valign="top"><a id="affd951824551823018058bba3d9ab4ee"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#affd951824551823018058bba3d9ab4ee">DAC_RESULT_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000)</td></tr>
<tr class="memdesc:affd951824551823018058bba3d9ab4ee"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_RESULT reset_value) Filter Result <br /></td></tr>
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<tr class="memitem:a8a398adb95ea7d38d15874b2d85a429a"><td class="memItemLeft" align="right" valign="top"><a id="a8a398adb95ea7d38d15874b2d85a429a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a8a398adb95ea7d38d15874b2d85a429a">DAC_RESULT_RESULT_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a8a398adb95ea7d38d15874b2d85a429a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_RESULT) Filter Result <br /></td></tr>
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<tr class="memitem:af9906821d28a7c81d0cb155e14d0f3b6"><td class="memItemLeft" align="right" valign="top"><a id="af9906821d28a7c81d0cb155e14d0f3b6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_RESULT_RESULT_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF) &lt;&lt; <a class="el" href="component_2dac_8h.html#a8a398adb95ea7d38d15874b2d85a429a">DAC_RESULT_RESULT_Pos</a>)</td></tr>
<tr class="separator:af9906821d28a7c81d0cb155e14d0f3b6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab464be173c31aa95a3ab7e2255e4ab8d"><td class="memItemLeft" align="right" valign="top"><a id="ab464be173c31aa95a3ab7e2255e4ab8d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DAC_RESULT_RESULT</b>(value)&#160;&#160;&#160;(DAC_RESULT_RESULT_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dac_8h.html#a8a398adb95ea7d38d15874b2d85a429a">DAC_RESULT_RESULT_Pos</a>))</td></tr>
<tr class="separator:ab464be173c31aa95a3ab7e2255e4ab8d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a902484aa6dbe487bff73b0192974f08c"><td class="memItemLeft" align="right" valign="top"><a id="a902484aa6dbe487bff73b0192974f08c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a902484aa6dbe487bff73b0192974f08c">DAC_RESULT_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF)</td></tr>
<tr class="memdesc:a902484aa6dbe487bff73b0192974f08c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DAC_RESULT) MASK Register <br /></td></tr>
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</table>
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Component description for DAC. </p>
<p>Copyright (c) 2019 Microchip Technology Inc.</p>
<p>\asf_license_start </p>
<p class="definition">Definition in file <a class="el" href="component_2dac_8h_source.html">dac.h</a>.</p>
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<a href="component_2dac_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_DAC_COMPONENT_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_DAC_COMPONENT_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160; </div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define DAC_U2502</span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define REV_DAC 0x100</span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160; </div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="comment">/* -------- DAC_CTRLA : (DAC Offset: 0x00) (R/W 8) Control A -------- */</span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00044"></a><span class="lineno"><a class="line" href="unionDAC__CTRLA__Type.html"> 44</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00046"></a><span class="lineno"><a class="line" href="unionDAC__CTRLA__Type.html#a22b2e72ef2e0397f663a058adbfbd835"> 46</a></span>&#160; uint8_t <a class="code" href="unionDAC__CTRLA__Type.html#a22b2e72ef2e0397f663a058adbfbd835">SWRST</a>:1; </div>
<div class="line"><a name="l00047"></a><span class="lineno"><a class="line" href="unionDAC__CTRLA__Type.html#ad05d4e8a7a5715904fba69a1ba984a99"> 47</a></span>&#160; uint8_t <a class="code" href="unionDAC__CTRLA__Type.html#ad05d4e8a7a5715904fba69a1ba984a99">ENABLE</a>:1; </div>
<div class="line"><a name="l00048"></a><span class="lineno"><a class="line" href="unionDAC__CTRLA__Type.html#a7ff1c674cfc0be227d5add69996a86ba"> 48</a></span>&#160; uint8_t :6; </div>
<div class="line"><a name="l00049"></a><span class="lineno"><a class="line" href="unionDAC__CTRLA__Type.html#a2acb6bf4b8cef6babde75806ed1464c5"> 49</a></span>&#160; } bit; </div>
<div class="line"><a name="l00050"></a><span class="lineno"><a class="line" href="unionDAC__CTRLA__Type.html#a0f1f01ca12501f780f1536e526bc59a7"> 50</a></span>&#160; uint8_t <a class="code" href="unionDAC__CTRLA__Type.html#a0f1f01ca12501f780f1536e526bc59a7">reg</a>; </div>
<div class="line"><a name="l00051"></a><span class="lineno"> 51</span>&#160;} <a class="code" href="unionDAC__CTRLA__Type.html">DAC_CTRLA_Type</a>;</div>
<div class="line"><a name="l00052"></a><span class="lineno"> 52</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00053"></a><span class="lineno"> 53</span>&#160; </div>
<div class="line"><a name="l00054"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#aebd4a25fcf855e7d3824acf7f9d3ac83"> 54</a></span>&#160;<span class="preprocessor">#define DAC_CTRLA_OFFSET 0x00 </span></div>
<div class="line"><a name="l00055"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a5b2a0ad82560fded073e6276046facfc"> 55</a></span>&#160;<span class="preprocessor">#define DAC_CTRLA_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00057"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#afa3f0f563ba0dcc229026ca6d3effdcc"> 57</a></span>&#160;<span class="preprocessor">#define DAC_CTRLA_SWRST_Pos 0 </span></div>
<div class="line"><a name="l00058"></a><span class="lineno"> 58</span>&#160;<span class="preprocessor">#define DAC_CTRLA_SWRST (_U_(0x1) &lt;&lt; DAC_CTRLA_SWRST_Pos)</span></div>
<div class="line"><a name="l00059"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#afa6e69ab386a0acc15ec18b0584091f9"> 59</a></span>&#160;<span class="preprocessor">#define DAC_CTRLA_ENABLE_Pos 1 </span></div>
<div class="line"><a name="l00060"></a><span class="lineno"> 60</span>&#160;<span class="preprocessor">#define DAC_CTRLA_ENABLE (_U_(0x1) &lt;&lt; DAC_CTRLA_ENABLE_Pos)</span></div>
<div class="line"><a name="l00061"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a3194764eec2b07936137bbd3afbde5d2"> 61</a></span>&#160;<span class="preprocessor">#define DAC_CTRLA_MASK _U_(0x03) </span></div>
<div class="line"><a name="l00063"></a><span class="lineno"> 63</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DAC_CTRLB : (DAC Offset: 0x01) (R/W 8) Control B -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00064"></a><span class="lineno"> 64</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00065"></a><span class="lineno"><a class="line" href="unionDAC__CTRLB__Type.html"> 65</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00066"></a><span class="lineno"> 66</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00067"></a><span class="lineno"><a class="line" href="unionDAC__CTRLB__Type.html#a36ce1d05dce04bf5b9b02d18c326792a"> 67</a></span>&#160; uint8_t <a class="code" href="unionDAC__CTRLB__Type.html#a36ce1d05dce04bf5b9b02d18c326792a">DIFF</a>:1; </div>
<div class="line"><a name="l00068"></a><span class="lineno"><a class="line" href="unionDAC__CTRLB__Type.html#a41a1648ba57151884dab41420448386e"> 68</a></span>&#160; uint8_t <a class="code" href="unionDAC__CTRLB__Type.html#a41a1648ba57151884dab41420448386e">REFSEL</a>:2; </div>
<div class="line"><a name="l00069"></a><span class="lineno"><a class="line" href="unionDAC__CTRLB__Type.html#ae09065b3e41c719b8697892338782b50"> 69</a></span>&#160; uint8_t :5; </div>
<div class="line"><a name="l00070"></a><span class="lineno"><a class="line" href="unionDAC__CTRLB__Type.html#ab0bfe882f2b2be772e6174ca1bc08144"> 70</a></span>&#160; } bit; </div>
<div class="line"><a name="l00071"></a><span class="lineno"><a class="line" href="unionDAC__CTRLB__Type.html#a6df27cf4278f30a13f448420f792eebd"> 71</a></span>&#160; uint8_t <a class="code" href="unionDAC__CTRLB__Type.html#a6df27cf4278f30a13f448420f792eebd">reg</a>; </div>
<div class="line"><a name="l00072"></a><span class="lineno"> 72</span>&#160;} <a class="code" href="unionDAC__CTRLB__Type.html">DAC_CTRLB_Type</a>;</div>
<div class="line"><a name="l00073"></a><span class="lineno"> 73</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00074"></a><span class="lineno"> 74</span>&#160; </div>
<div class="line"><a name="l00075"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a77355709810c770d457b0206b73e12c2"> 75</a></span>&#160;<span class="preprocessor">#define DAC_CTRLB_OFFSET 0x01 </span></div>
<div class="line"><a name="l00076"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#ac2138055bf74ac2fccda007458cdca1d"> 76</a></span>&#160;<span class="preprocessor">#define DAC_CTRLB_RESETVALUE _U_(0x02) </span></div>
<div class="line"><a name="l00078"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#abbf790da9956c2dd5f02756f9187989c"> 78</a></span>&#160;<span class="preprocessor">#define DAC_CTRLB_DIFF_Pos 0 </span></div>
<div class="line"><a name="l00079"></a><span class="lineno"> 79</span>&#160;<span class="preprocessor">#define DAC_CTRLB_DIFF (_U_(0x1) &lt;&lt; DAC_CTRLB_DIFF_Pos)</span></div>
<div class="line"><a name="l00080"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#ace1da3ee1cda6efe12a220080a718b99"> 80</a></span>&#160;<span class="preprocessor">#define DAC_CTRLB_REFSEL_Pos 1 </span></div>
<div class="line"><a name="l00081"></a><span class="lineno"> 81</span>&#160;<span class="preprocessor">#define DAC_CTRLB_REFSEL_Msk (_U_(0x3) &lt;&lt; DAC_CTRLB_REFSEL_Pos)</span></div>
<div class="line"><a name="l00082"></a><span class="lineno"> 82</span>&#160;<span class="preprocessor">#define DAC_CTRLB_REFSEL(value) (DAC_CTRLB_REFSEL_Msk &amp; ((value) &lt;&lt; DAC_CTRLB_REFSEL_Pos))</span></div>
<div class="line"><a name="l00083"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a1fa8cea85f63628846fe1cffd66ce84d"> 83</a></span>&#160;<span class="preprocessor">#define DAC_CTRLB_REFSEL_VREFPU_Val _U_(0x0) </span></div>
<div class="line"><a name="l00084"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#ae326fd37097c45092004ad8658ef7e64"> 84</a></span>&#160;<span class="preprocessor">#define DAC_CTRLB_REFSEL_VDDANA_Val _U_(0x1) </span></div>
<div class="line"><a name="l00085"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#af0266310f4ffdab4a62aed8023e5507c"> 85</a></span>&#160;<span class="preprocessor">#define DAC_CTRLB_REFSEL_VREFPB_Val _U_(0x2) </span></div>
<div class="line"><a name="l00086"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a23d7b33954fbff27f8d3dcdcf389c185"> 86</a></span>&#160;<span class="preprocessor">#define DAC_CTRLB_REFSEL_INTREF_Val _U_(0x3) </span></div>
<div class="line"><a name="l00087"></a><span class="lineno"> 87</span>&#160;<span class="preprocessor">#define DAC_CTRLB_REFSEL_VREFPU (DAC_CTRLB_REFSEL_VREFPU_Val &lt;&lt; DAC_CTRLB_REFSEL_Pos)</span></div>
<div class="line"><a name="l00088"></a><span class="lineno"> 88</span>&#160;<span class="preprocessor">#define DAC_CTRLB_REFSEL_VDDANA (DAC_CTRLB_REFSEL_VDDANA_Val &lt;&lt; DAC_CTRLB_REFSEL_Pos)</span></div>
<div class="line"><a name="l00089"></a><span class="lineno"> 89</span>&#160;<span class="preprocessor">#define DAC_CTRLB_REFSEL_VREFPB (DAC_CTRLB_REFSEL_VREFPB_Val &lt;&lt; DAC_CTRLB_REFSEL_Pos)</span></div>
<div class="line"><a name="l00090"></a><span class="lineno"> 90</span>&#160;<span class="preprocessor">#define DAC_CTRLB_REFSEL_INTREF (DAC_CTRLB_REFSEL_INTREF_Val &lt;&lt; DAC_CTRLB_REFSEL_Pos)</span></div>
<div class="line"><a name="l00091"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#aa12ea04e34d8557ae1e628862714e207"> 91</a></span>&#160;<span class="preprocessor">#define DAC_CTRLB_MASK _U_(0x07) </span></div>
<div class="line"><a name="l00093"></a><span class="lineno"> 93</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DAC_EVCTRL : (DAC Offset: 0x02) (R/W 8) Event Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00094"></a><span class="lineno"> 94</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00095"></a><span class="lineno"><a class="line" href="unionDAC__EVCTRL__Type.html"> 95</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00096"></a><span class="lineno"> 96</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00097"></a><span class="lineno"><a class="line" href="unionDAC__EVCTRL__Type.html#ad9c66533734aa108a0801b830f06d536"> 97</a></span>&#160; uint8_t <a class="code" href="unionDAC__EVCTRL__Type.html#ad9c66533734aa108a0801b830f06d536">STARTEI0</a>:1; </div>
<div class="line"><a name="l00098"></a><span class="lineno"><a class="line" href="unionDAC__EVCTRL__Type.html#aa0972f50da74e8b3dc008e88bfa53d8e"> 98</a></span>&#160; uint8_t <a class="code" href="unionDAC__EVCTRL__Type.html#aa0972f50da74e8b3dc008e88bfa53d8e">STARTEI1</a>:1; </div>
<div class="line"><a name="l00099"></a><span class="lineno"><a class="line" href="unionDAC__EVCTRL__Type.html#a30c4b5c9af415bf84512565f2cb9d5ae"> 99</a></span>&#160; uint8_t <a class="code" href="unionDAC__EVCTRL__Type.html#a30c4b5c9af415bf84512565f2cb9d5ae">EMPTYEO0</a>:1; </div>
<div class="line"><a name="l00100"></a><span class="lineno"><a class="line" href="unionDAC__EVCTRL__Type.html#a83c09c1ac963ec058130834921fd3316"> 100</a></span>&#160; uint8_t <a class="code" href="unionDAC__EVCTRL__Type.html#a83c09c1ac963ec058130834921fd3316">EMPTYEO1</a>:1; </div>
<div class="line"><a name="l00101"></a><span class="lineno"><a class="line" href="unionDAC__EVCTRL__Type.html#a43d27b9550af4563ce15b91901f0a91d"> 101</a></span>&#160; uint8_t <a class="code" href="unionDAC__EVCTRL__Type.html#a43d27b9550af4563ce15b91901f0a91d">INVEI0</a>:1; </div>
<div class="line"><a name="l00102"></a><span class="lineno"><a class="line" href="unionDAC__EVCTRL__Type.html#a94fb42e5631ffec7e91f8b9117f5b8dc"> 102</a></span>&#160; uint8_t <a class="code" href="unionDAC__EVCTRL__Type.html#a94fb42e5631ffec7e91f8b9117f5b8dc">INVEI1</a>:1; </div>
<div class="line"><a name="l00103"></a><span class="lineno"><a class="line" href="unionDAC__EVCTRL__Type.html#a91b9c5aab763549738430949f63e2d34"> 103</a></span>&#160; uint8_t <a class="code" href="unionDAC__EVCTRL__Type.html#a91b9c5aab763549738430949f63e2d34">RESRDYEO0</a>:1; </div>
<div class="line"><a name="l00104"></a><span class="lineno"><a class="line" href="unionDAC__EVCTRL__Type.html#a6175c572864f3edd0b35c821eea6564c"> 104</a></span>&#160; uint8_t <a class="code" href="unionDAC__EVCTRL__Type.html#a6175c572864f3edd0b35c821eea6564c">RESRDYEO1</a>:1; </div>
<div class="line"><a name="l00105"></a><span class="lineno"><a class="line" href="unionDAC__EVCTRL__Type.html#a9583b8d047933306cdf74466c54c94c4"> 105</a></span>&#160; } bit; </div>
<div class="line"><a name="l00106"></a><span class="lineno"> 106</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00107"></a><span class="lineno"><a class="line" href="unionDAC__EVCTRL__Type.html#ae3e5ab1ba691562fad0d0598c5837a7f"> 107</a></span>&#160; uint8_t <a class="code" href="unionDAC__EVCTRL__Type.html#ae3e5ab1ba691562fad0d0598c5837a7f">STARTEI</a>:2; </div>
<div class="line"><a name="l00108"></a><span class="lineno"><a class="line" href="unionDAC__EVCTRL__Type.html#a89211a83a66f08f696fc0f69ab14d30e"> 108</a></span>&#160; uint8_t <a class="code" href="unionDAC__EVCTRL__Type.html#a89211a83a66f08f696fc0f69ab14d30e">EMPTYEO</a>:2; </div>
<div class="line"><a name="l00109"></a><span class="lineno"><a class="line" href="unionDAC__EVCTRL__Type.html#a1d8c9af6bd653312ebed482e78b13eba"> 109</a></span>&#160; uint8_t <a class="code" href="unionDAC__EVCTRL__Type.html#a1d8c9af6bd653312ebed482e78b13eba">INVEI</a>:2; </div>
<div class="line"><a name="l00110"></a><span class="lineno"><a class="line" href="unionDAC__EVCTRL__Type.html#a7b3cf1046563bd3ce1309a7b4bd311e1"> 110</a></span>&#160; uint8_t <a class="code" href="unionDAC__EVCTRL__Type.html#a7b3cf1046563bd3ce1309a7b4bd311e1">RESRDYEO</a>:2; </div>
<div class="line"><a name="l00111"></a><span class="lineno"><a class="line" href="unionDAC__EVCTRL__Type.html#aaa174f5727de08ce1576176de0d01221"> 111</a></span>&#160; } vec; </div>
<div class="line"><a name="l00112"></a><span class="lineno"><a class="line" href="unionDAC__EVCTRL__Type.html#a6727440faefea4c89abdee1618726900"> 112</a></span>&#160; uint8_t <a class="code" href="unionDAC__EVCTRL__Type.html#a6727440faefea4c89abdee1618726900">reg</a>; </div>
<div class="line"><a name="l00113"></a><span class="lineno"> 113</span>&#160;} <a class="code" href="unionDAC__EVCTRL__Type.html">DAC_EVCTRL_Type</a>;</div>
<div class="line"><a name="l00114"></a><span class="lineno"> 114</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00115"></a><span class="lineno"> 115</span>&#160; </div>
<div class="line"><a name="l00116"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a554a475582005e674b535a88927abc9f"> 116</a></span>&#160;<span class="preprocessor">#define DAC_EVCTRL_OFFSET 0x02 </span></div>
<div class="line"><a name="l00117"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#ae95bd54234ae16d3e9ee3291b4c883c5"> 117</a></span>&#160;<span class="preprocessor">#define DAC_EVCTRL_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00119"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a307b56241053d43fae08abd64c6b0f58"> 119</a></span>&#160;<span class="preprocessor">#define DAC_EVCTRL_STARTEI0_Pos 0 </span></div>
<div class="line"><a name="l00120"></a><span class="lineno"> 120</span>&#160;<span class="preprocessor">#define DAC_EVCTRL_STARTEI0 (_U_(1) &lt;&lt; DAC_EVCTRL_STARTEI0_Pos)</span></div>
<div class="line"><a name="l00121"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a23961f1cee221c2823691dc06ee3ed65"> 121</a></span>&#160;<span class="preprocessor">#define DAC_EVCTRL_STARTEI1_Pos 1 </span></div>
<div class="line"><a name="l00122"></a><span class="lineno"> 122</span>&#160;<span class="preprocessor">#define DAC_EVCTRL_STARTEI1 (_U_(1) &lt;&lt; DAC_EVCTRL_STARTEI1_Pos)</span></div>
<div class="line"><a name="l00123"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a31ff6c0f7fef665224fcf1068cd3f3fd"> 123</a></span>&#160;<span class="preprocessor">#define DAC_EVCTRL_STARTEI_Pos 0 </span></div>
<div class="line"><a name="l00124"></a><span class="lineno"> 124</span>&#160;<span class="preprocessor">#define DAC_EVCTRL_STARTEI_Msk (_U_(0x3) &lt;&lt; DAC_EVCTRL_STARTEI_Pos)</span></div>
<div class="line"><a name="l00125"></a><span class="lineno"> 125</span>&#160;<span class="preprocessor">#define DAC_EVCTRL_STARTEI(value) (DAC_EVCTRL_STARTEI_Msk &amp; ((value) &lt;&lt; DAC_EVCTRL_STARTEI_Pos))</span></div>
<div class="line"><a name="l00126"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a539b4b5ee23b56a9277d8d35786f1c3a"> 126</a></span>&#160;<span class="preprocessor">#define DAC_EVCTRL_EMPTYEO0_Pos 2 </span></div>
<div class="line"><a name="l00127"></a><span class="lineno"> 127</span>&#160;<span class="preprocessor">#define DAC_EVCTRL_EMPTYEO0 (_U_(1) &lt;&lt; DAC_EVCTRL_EMPTYEO0_Pos)</span></div>
<div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#aa44f1da02c684b654a656fc7efc9dc62"> 128</a></span>&#160;<span class="preprocessor">#define DAC_EVCTRL_EMPTYEO1_Pos 3 </span></div>
<div class="line"><a name="l00129"></a><span class="lineno"> 129</span>&#160;<span class="preprocessor">#define DAC_EVCTRL_EMPTYEO1 (_U_(1) &lt;&lt; DAC_EVCTRL_EMPTYEO1_Pos)</span></div>
<div class="line"><a name="l00130"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a97e13ff75733b38e502c88e75cba9f3d"> 130</a></span>&#160;<span class="preprocessor">#define DAC_EVCTRL_EMPTYEO_Pos 2 </span></div>
<div class="line"><a name="l00131"></a><span class="lineno"> 131</span>&#160;<span class="preprocessor">#define DAC_EVCTRL_EMPTYEO_Msk (_U_(0x3) &lt;&lt; DAC_EVCTRL_EMPTYEO_Pos)</span></div>
<div class="line"><a name="l00132"></a><span class="lineno"> 132</span>&#160;<span class="preprocessor">#define DAC_EVCTRL_EMPTYEO(value) (DAC_EVCTRL_EMPTYEO_Msk &amp; ((value) &lt;&lt; DAC_EVCTRL_EMPTYEO_Pos))</span></div>
<div class="line"><a name="l00133"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#aedf1c4a8e40d019a88fe9e5dd7090e48"> 133</a></span>&#160;<span class="preprocessor">#define DAC_EVCTRL_INVEI0_Pos 4 </span></div>
<div class="line"><a name="l00134"></a><span class="lineno"> 134</span>&#160;<span class="preprocessor">#define DAC_EVCTRL_INVEI0 (_U_(1) &lt;&lt; DAC_EVCTRL_INVEI0_Pos)</span></div>
<div class="line"><a name="l00135"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#ae64023a88f14c6fab237d0d7f4ecb6de"> 135</a></span>&#160;<span class="preprocessor">#define DAC_EVCTRL_INVEI1_Pos 5 </span></div>
<div class="line"><a name="l00136"></a><span class="lineno"> 136</span>&#160;<span class="preprocessor">#define DAC_EVCTRL_INVEI1 (_U_(1) &lt;&lt; DAC_EVCTRL_INVEI1_Pos)</span></div>
<div class="line"><a name="l00137"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#aefbcfa90869ef66266567b81682f3f0e"> 137</a></span>&#160;<span class="preprocessor">#define DAC_EVCTRL_INVEI_Pos 4 </span></div>
<div class="line"><a name="l00138"></a><span class="lineno"> 138</span>&#160;<span class="preprocessor">#define DAC_EVCTRL_INVEI_Msk (_U_(0x3) &lt;&lt; DAC_EVCTRL_INVEI_Pos)</span></div>
<div class="line"><a name="l00139"></a><span class="lineno"> 139</span>&#160;<span class="preprocessor">#define DAC_EVCTRL_INVEI(value) (DAC_EVCTRL_INVEI_Msk &amp; ((value) &lt;&lt; DAC_EVCTRL_INVEI_Pos))</span></div>
<div class="line"><a name="l00140"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#aca95cca7b4c752931b4ac9c0bd784309"> 140</a></span>&#160;<span class="preprocessor">#define DAC_EVCTRL_RESRDYEO0_Pos 6 </span></div>
<div class="line"><a name="l00141"></a><span class="lineno"> 141</span>&#160;<span class="preprocessor">#define DAC_EVCTRL_RESRDYEO0 (_U_(1) &lt;&lt; DAC_EVCTRL_RESRDYEO0_Pos)</span></div>
<div class="line"><a name="l00142"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#ad4995cd4bb9caa1071696b0cec3cc6e9"> 142</a></span>&#160;<span class="preprocessor">#define DAC_EVCTRL_RESRDYEO1_Pos 7 </span></div>
<div class="line"><a name="l00143"></a><span class="lineno"> 143</span>&#160;<span class="preprocessor">#define DAC_EVCTRL_RESRDYEO1 (_U_(1) &lt;&lt; DAC_EVCTRL_RESRDYEO1_Pos)</span></div>
<div class="line"><a name="l00144"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#ab07dbe9a9135a4c67c5c59a151027718"> 144</a></span>&#160;<span class="preprocessor">#define DAC_EVCTRL_RESRDYEO_Pos 6 </span></div>
<div class="line"><a name="l00145"></a><span class="lineno"> 145</span>&#160;<span class="preprocessor">#define DAC_EVCTRL_RESRDYEO_Msk (_U_(0x3) &lt;&lt; DAC_EVCTRL_RESRDYEO_Pos)</span></div>
<div class="line"><a name="l00146"></a><span class="lineno"> 146</span>&#160;<span class="preprocessor">#define DAC_EVCTRL_RESRDYEO(value) (DAC_EVCTRL_RESRDYEO_Msk &amp; ((value) &lt;&lt; DAC_EVCTRL_RESRDYEO_Pos))</span></div>
<div class="line"><a name="l00147"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a8290fa8981af7c9f3374d64bfd643575"> 147</a></span>&#160;<span class="preprocessor">#define DAC_EVCTRL_MASK _U_(0xFF) </span></div>
<div class="line"><a name="l00149"></a><span class="lineno"> 149</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DAC_INTENCLR : (DAC Offset: 0x04) (R/W 8) Interrupt Enable Clear -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00150"></a><span class="lineno"> 150</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00151"></a><span class="lineno"><a class="line" href="unionDAC__INTENCLR__Type.html"> 151</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00152"></a><span class="lineno"> 152</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00153"></a><span class="lineno"><a class="line" href="unionDAC__INTENCLR__Type.html#ae4062ffc6ff37aa54d35e713f5811a23"> 153</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENCLR__Type.html#ae4062ffc6ff37aa54d35e713f5811a23">UNDERRUN0</a>:1; </div>
<div class="line"><a name="l00154"></a><span class="lineno"><a class="line" href="unionDAC__INTENCLR__Type.html#a5c5d812fa0ca6ed7c50b8be1188216c2"> 154</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENCLR__Type.html#a5c5d812fa0ca6ed7c50b8be1188216c2">UNDERRUN1</a>:1; </div>
<div class="line"><a name="l00155"></a><span class="lineno"><a class="line" href="unionDAC__INTENCLR__Type.html#a49443490ac0803c0d5bd4d37ee38a20d"> 155</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENCLR__Type.html#a49443490ac0803c0d5bd4d37ee38a20d">EMPTY0</a>:1; </div>
<div class="line"><a name="l00156"></a><span class="lineno"><a class="line" href="unionDAC__INTENCLR__Type.html#a5590c2ffd3fccb8fa1a8450cc7c32510"> 156</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENCLR__Type.html#a5590c2ffd3fccb8fa1a8450cc7c32510">EMPTY1</a>:1; </div>
<div class="line"><a name="l00157"></a><span class="lineno"><a class="line" href="unionDAC__INTENCLR__Type.html#aa2a492243b64e3bafc95c176bb46d865"> 157</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENCLR__Type.html#aa2a492243b64e3bafc95c176bb46d865">RESRDY0</a>:1; </div>
<div class="line"><a name="l00158"></a><span class="lineno"><a class="line" href="unionDAC__INTENCLR__Type.html#a2bdfc2a521201543f0a1992001a0c6a4"> 158</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENCLR__Type.html#a2bdfc2a521201543f0a1992001a0c6a4">RESRDY1</a>:1; </div>
<div class="line"><a name="l00159"></a><span class="lineno"><a class="line" href="unionDAC__INTENCLR__Type.html#ac5327f90399d8aa1e8b6ef7f5b969a80"> 159</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENCLR__Type.html#ac5327f90399d8aa1e8b6ef7f5b969a80">OVERRUN0</a>:1; </div>
<div class="line"><a name="l00160"></a><span class="lineno"><a class="line" href="unionDAC__INTENCLR__Type.html#a8839bfcc54df87418e83d0ff8912c9bc"> 160</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENCLR__Type.html#a8839bfcc54df87418e83d0ff8912c9bc">OVERRUN1</a>:1; </div>
<div class="line"><a name="l00161"></a><span class="lineno"><a class="line" href="unionDAC__INTENCLR__Type.html#a58bd85ae1c9efe6c29b7ba2b3210f5f9"> 161</a></span>&#160; } bit; </div>
<div class="line"><a name="l00162"></a><span class="lineno"> 162</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00163"></a><span class="lineno"><a class="line" href="unionDAC__INTENCLR__Type.html#af96da0c477868c26b66597bfcaeb69a1"> 163</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENCLR__Type.html#af96da0c477868c26b66597bfcaeb69a1">UNDERRUN</a>:2; </div>
<div class="line"><a name="l00164"></a><span class="lineno"><a class="line" href="unionDAC__INTENCLR__Type.html#a7a765df1f712cf0db56c0451767483cb"> 164</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENCLR__Type.html#a7a765df1f712cf0db56c0451767483cb">EMPTY</a>:2; </div>
<div class="line"><a name="l00165"></a><span class="lineno"><a class="line" href="unionDAC__INTENCLR__Type.html#ad6bfb96fe82e70d190532e0a5b391fd9"> 165</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENCLR__Type.html#ad6bfb96fe82e70d190532e0a5b391fd9">RESRDY</a>:2; </div>
<div class="line"><a name="l00166"></a><span class="lineno"><a class="line" href="unionDAC__INTENCLR__Type.html#ad6dbb3ca7276b7e47252ab54ec320976"> 166</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENCLR__Type.html#ad6dbb3ca7276b7e47252ab54ec320976">OVERRUN</a>:2; </div>
<div class="line"><a name="l00167"></a><span class="lineno"><a class="line" href="unionDAC__INTENCLR__Type.html#a7001e76ca3f4e615fe88a873e8a099c3"> 167</a></span>&#160; } vec; </div>
<div class="line"><a name="l00168"></a><span class="lineno"><a class="line" href="unionDAC__INTENCLR__Type.html#a5edf827f18a5857bd9ffc064f47a4dd1"> 168</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENCLR__Type.html#a5edf827f18a5857bd9ffc064f47a4dd1">reg</a>; </div>
<div class="line"><a name="l00169"></a><span class="lineno"> 169</span>&#160;} <a class="code" href="unionDAC__INTENCLR__Type.html">DAC_INTENCLR_Type</a>;</div>
<div class="line"><a name="l00170"></a><span class="lineno"> 170</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00171"></a><span class="lineno"> 171</span>&#160; </div>
<div class="line"><a name="l00172"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a4b29525af7de15de08715677c874b359"> 172</a></span>&#160;<span class="preprocessor">#define DAC_INTENCLR_OFFSET 0x04 </span></div>
<div class="line"><a name="l00173"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a0052bdf4a77d5d851ff2dc3981b47f84"> 173</a></span>&#160;<span class="preprocessor">#define DAC_INTENCLR_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00175"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#af014e05835054e1c9f63e9a4cf8ff275"> 175</a></span>&#160;<span class="preprocessor">#define DAC_INTENCLR_UNDERRUN0_Pos 0 </span></div>
<div class="line"><a name="l00176"></a><span class="lineno"> 176</span>&#160;<span class="preprocessor">#define DAC_INTENCLR_UNDERRUN0 (_U_(1) &lt;&lt; DAC_INTENCLR_UNDERRUN0_Pos)</span></div>
<div class="line"><a name="l00177"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a7cf06d6965801dd4129c2951435cf4cc"> 177</a></span>&#160;<span class="preprocessor">#define DAC_INTENCLR_UNDERRUN1_Pos 1 </span></div>
<div class="line"><a name="l00178"></a><span class="lineno"> 178</span>&#160;<span class="preprocessor">#define DAC_INTENCLR_UNDERRUN1 (_U_(1) &lt;&lt; DAC_INTENCLR_UNDERRUN1_Pos)</span></div>
<div class="line"><a name="l00179"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a1a17f5ec1b6b1d51eb7caa0e41fd01f8"> 179</a></span>&#160;<span class="preprocessor">#define DAC_INTENCLR_UNDERRUN_Pos 0 </span></div>
<div class="line"><a name="l00180"></a><span class="lineno"> 180</span>&#160;<span class="preprocessor">#define DAC_INTENCLR_UNDERRUN_Msk (_U_(0x3) &lt;&lt; DAC_INTENCLR_UNDERRUN_Pos)</span></div>
<div class="line"><a name="l00181"></a><span class="lineno"> 181</span>&#160;<span class="preprocessor">#define DAC_INTENCLR_UNDERRUN(value) (DAC_INTENCLR_UNDERRUN_Msk &amp; ((value) &lt;&lt; DAC_INTENCLR_UNDERRUN_Pos))</span></div>
<div class="line"><a name="l00182"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a1de573071bd6e76fc8364ced19f28830"> 182</a></span>&#160;<span class="preprocessor">#define DAC_INTENCLR_EMPTY0_Pos 2 </span></div>
<div class="line"><a name="l00183"></a><span class="lineno"> 183</span>&#160;<span class="preprocessor">#define DAC_INTENCLR_EMPTY0 (_U_(1) &lt;&lt; DAC_INTENCLR_EMPTY0_Pos)</span></div>
<div class="line"><a name="l00184"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#acc84fea126c3689c58e3e4675fd3f7eb"> 184</a></span>&#160;<span class="preprocessor">#define DAC_INTENCLR_EMPTY1_Pos 3 </span></div>
<div class="line"><a name="l00185"></a><span class="lineno"> 185</span>&#160;<span class="preprocessor">#define DAC_INTENCLR_EMPTY1 (_U_(1) &lt;&lt; DAC_INTENCLR_EMPTY1_Pos)</span></div>
<div class="line"><a name="l00186"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#ae91b3684292cdb9164d07f4b2de13b80"> 186</a></span>&#160;<span class="preprocessor">#define DAC_INTENCLR_EMPTY_Pos 2 </span></div>
<div class="line"><a name="l00187"></a><span class="lineno"> 187</span>&#160;<span class="preprocessor">#define DAC_INTENCLR_EMPTY_Msk (_U_(0x3) &lt;&lt; DAC_INTENCLR_EMPTY_Pos)</span></div>
<div class="line"><a name="l00188"></a><span class="lineno"> 188</span>&#160;<span class="preprocessor">#define DAC_INTENCLR_EMPTY(value) (DAC_INTENCLR_EMPTY_Msk &amp; ((value) &lt;&lt; DAC_INTENCLR_EMPTY_Pos))</span></div>
<div class="line"><a name="l00189"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a4cd5f9618f7aa2cd0992ad3728ecd506"> 189</a></span>&#160;<span class="preprocessor">#define DAC_INTENCLR_RESRDY0_Pos 4 </span></div>
<div class="line"><a name="l00190"></a><span class="lineno"> 190</span>&#160;<span class="preprocessor">#define DAC_INTENCLR_RESRDY0 (_U_(1) &lt;&lt; DAC_INTENCLR_RESRDY0_Pos)</span></div>
<div class="line"><a name="l00191"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a37389d570aca219d6a18bf94ee291cf4"> 191</a></span>&#160;<span class="preprocessor">#define DAC_INTENCLR_RESRDY1_Pos 5 </span></div>
<div class="line"><a name="l00192"></a><span class="lineno"> 192</span>&#160;<span class="preprocessor">#define DAC_INTENCLR_RESRDY1 (_U_(1) &lt;&lt; DAC_INTENCLR_RESRDY1_Pos)</span></div>
<div class="line"><a name="l00193"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#abc3e7719399aaea9a4292bd3ece497f8"> 193</a></span>&#160;<span class="preprocessor">#define DAC_INTENCLR_RESRDY_Pos 4 </span></div>
<div class="line"><a name="l00194"></a><span class="lineno"> 194</span>&#160;<span class="preprocessor">#define DAC_INTENCLR_RESRDY_Msk (_U_(0x3) &lt;&lt; DAC_INTENCLR_RESRDY_Pos)</span></div>
<div class="line"><a name="l00195"></a><span class="lineno"> 195</span>&#160;<span class="preprocessor">#define DAC_INTENCLR_RESRDY(value) (DAC_INTENCLR_RESRDY_Msk &amp; ((value) &lt;&lt; DAC_INTENCLR_RESRDY_Pos))</span></div>
<div class="line"><a name="l00196"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a40e7c12f99e0f0bfe6f9b7c7625274b6"> 196</a></span>&#160;<span class="preprocessor">#define DAC_INTENCLR_OVERRUN0_Pos 6 </span></div>
<div class="line"><a name="l00197"></a><span class="lineno"> 197</span>&#160;<span class="preprocessor">#define DAC_INTENCLR_OVERRUN0 (_U_(1) &lt;&lt; DAC_INTENCLR_OVERRUN0_Pos)</span></div>
<div class="line"><a name="l00198"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#ab5bf229e3363a161d79a079df7115a2e"> 198</a></span>&#160;<span class="preprocessor">#define DAC_INTENCLR_OVERRUN1_Pos 7 </span></div>
<div class="line"><a name="l00199"></a><span class="lineno"> 199</span>&#160;<span class="preprocessor">#define DAC_INTENCLR_OVERRUN1 (_U_(1) &lt;&lt; DAC_INTENCLR_OVERRUN1_Pos)</span></div>
<div class="line"><a name="l00200"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#abe04d1d326ac85acc5e348bd958e7451"> 200</a></span>&#160;<span class="preprocessor">#define DAC_INTENCLR_OVERRUN_Pos 6 </span></div>
<div class="line"><a name="l00201"></a><span class="lineno"> 201</span>&#160;<span class="preprocessor">#define DAC_INTENCLR_OVERRUN_Msk (_U_(0x3) &lt;&lt; DAC_INTENCLR_OVERRUN_Pos)</span></div>
<div class="line"><a name="l00202"></a><span class="lineno"> 202</span>&#160;<span class="preprocessor">#define DAC_INTENCLR_OVERRUN(value) (DAC_INTENCLR_OVERRUN_Msk &amp; ((value) &lt;&lt; DAC_INTENCLR_OVERRUN_Pos))</span></div>
<div class="line"><a name="l00203"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a85bb6a4ca23cf5a609ff966cfe6ac6eb"> 203</a></span>&#160;<span class="preprocessor">#define DAC_INTENCLR_MASK _U_(0xFF) </span></div>
<div class="line"><a name="l00205"></a><span class="lineno"> 205</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DAC_INTENSET : (DAC Offset: 0x05) (R/W 8) Interrupt Enable Set -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00206"></a><span class="lineno"> 206</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00207"></a><span class="lineno"><a class="line" href="unionDAC__INTENSET__Type.html"> 207</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00208"></a><span class="lineno"> 208</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00209"></a><span class="lineno"><a class="line" href="unionDAC__INTENSET__Type.html#ad1421288cf8c6cb079b146555fa63545"> 209</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENSET__Type.html#ad1421288cf8c6cb079b146555fa63545">UNDERRUN0</a>:1; </div>
<div class="line"><a name="l00210"></a><span class="lineno"><a class="line" href="unionDAC__INTENSET__Type.html#a8187b0cbb48a68d2fe1f1949f5e1bb21"> 210</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENSET__Type.html#a8187b0cbb48a68d2fe1f1949f5e1bb21">UNDERRUN1</a>:1; </div>
<div class="line"><a name="l00211"></a><span class="lineno"><a class="line" href="unionDAC__INTENSET__Type.html#af878b7486fdb30f6b8a29c004dd57053"> 211</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENSET__Type.html#af878b7486fdb30f6b8a29c004dd57053">EMPTY0</a>:1; </div>
<div class="line"><a name="l00212"></a><span class="lineno"><a class="line" href="unionDAC__INTENSET__Type.html#a2f195b47d61b46533479e4646f86e0c9"> 212</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENSET__Type.html#a2f195b47d61b46533479e4646f86e0c9">EMPTY1</a>:1; </div>
<div class="line"><a name="l00213"></a><span class="lineno"><a class="line" href="unionDAC__INTENSET__Type.html#aa7b82a8c0fcf13b421395cb990c32fe5"> 213</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENSET__Type.html#aa7b82a8c0fcf13b421395cb990c32fe5">RESRDY0</a>:1; </div>
<div class="line"><a name="l00214"></a><span class="lineno"><a class="line" href="unionDAC__INTENSET__Type.html#ab24e1cc70c41950dbe716735fce363f0"> 214</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENSET__Type.html#ab24e1cc70c41950dbe716735fce363f0">RESRDY1</a>:1; </div>
<div class="line"><a name="l00215"></a><span class="lineno"><a class="line" href="unionDAC__INTENSET__Type.html#a1eb4798944a0e48348a7213e6636a008"> 215</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENSET__Type.html#a1eb4798944a0e48348a7213e6636a008">OVERRUN0</a>:1; </div>
<div class="line"><a name="l00216"></a><span class="lineno"><a class="line" href="unionDAC__INTENSET__Type.html#ada2192e243a4beb894e3bf211085f259"> 216</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENSET__Type.html#ada2192e243a4beb894e3bf211085f259">OVERRUN1</a>:1; </div>
<div class="line"><a name="l00217"></a><span class="lineno"><a class="line" href="unionDAC__INTENSET__Type.html#aaedaeb2c302860f81d67ae79086e400c"> 217</a></span>&#160; } bit; </div>
<div class="line"><a name="l00218"></a><span class="lineno"> 218</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00219"></a><span class="lineno"><a class="line" href="unionDAC__INTENSET__Type.html#a468aeaf616ad2919bf78a29cc00f01a6"> 219</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENSET__Type.html#a468aeaf616ad2919bf78a29cc00f01a6">UNDERRUN</a>:2; </div>
<div class="line"><a name="l00220"></a><span class="lineno"><a class="line" href="unionDAC__INTENSET__Type.html#ace2282b99d87ab3f4434f9379aa47a45"> 220</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENSET__Type.html#ace2282b99d87ab3f4434f9379aa47a45">EMPTY</a>:2; </div>
<div class="line"><a name="l00221"></a><span class="lineno"><a class="line" href="unionDAC__INTENSET__Type.html#acae097cbaf64e6db4f9eb62ca8169f5e"> 221</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENSET__Type.html#acae097cbaf64e6db4f9eb62ca8169f5e">RESRDY</a>:2; </div>
<div class="line"><a name="l00222"></a><span class="lineno"><a class="line" href="unionDAC__INTENSET__Type.html#a09a0b1c2bca29cff8d9a73e599f6db25"> 222</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENSET__Type.html#a09a0b1c2bca29cff8d9a73e599f6db25">OVERRUN</a>:2; </div>
<div class="line"><a name="l00223"></a><span class="lineno"><a class="line" href="unionDAC__INTENSET__Type.html#a18628536e264db4eaa6860da2aa80ad3"> 223</a></span>&#160; } vec; </div>
<div class="line"><a name="l00224"></a><span class="lineno"><a class="line" href="unionDAC__INTENSET__Type.html#a9fd921a600e0f4a7907432fc56a964a5"> 224</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTENSET__Type.html#a9fd921a600e0f4a7907432fc56a964a5">reg</a>; </div>
<div class="line"><a name="l00225"></a><span class="lineno"> 225</span>&#160;} <a class="code" href="unionDAC__INTENSET__Type.html">DAC_INTENSET_Type</a>;</div>
<div class="line"><a name="l00226"></a><span class="lineno"> 226</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00227"></a><span class="lineno"> 227</span>&#160; </div>
<div class="line"><a name="l00228"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a0ccf063ca605c99a4d7675883da90a35"> 228</a></span>&#160;<span class="preprocessor">#define DAC_INTENSET_OFFSET 0x05 </span></div>
<div class="line"><a name="l00229"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#ac03fead9c4f7f214a3e9c0718a629b84"> 229</a></span>&#160;<span class="preprocessor">#define DAC_INTENSET_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00231"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#af4044c3c930888eb9883abb4c0209232"> 231</a></span>&#160;<span class="preprocessor">#define DAC_INTENSET_UNDERRUN0_Pos 0 </span></div>
<div class="line"><a name="l00232"></a><span class="lineno"> 232</span>&#160;<span class="preprocessor">#define DAC_INTENSET_UNDERRUN0 (_U_(1) &lt;&lt; DAC_INTENSET_UNDERRUN0_Pos)</span></div>
<div class="line"><a name="l00233"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a57579d33be3bcfb3f7a9b510b91ae165"> 233</a></span>&#160;<span class="preprocessor">#define DAC_INTENSET_UNDERRUN1_Pos 1 </span></div>
<div class="line"><a name="l00234"></a><span class="lineno"> 234</span>&#160;<span class="preprocessor">#define DAC_INTENSET_UNDERRUN1 (_U_(1) &lt;&lt; DAC_INTENSET_UNDERRUN1_Pos)</span></div>
<div class="line"><a name="l00235"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a38aa2d8302976875d983b1e2c6b0ced2"> 235</a></span>&#160;<span class="preprocessor">#define DAC_INTENSET_UNDERRUN_Pos 0 </span></div>
<div class="line"><a name="l00236"></a><span class="lineno"> 236</span>&#160;<span class="preprocessor">#define DAC_INTENSET_UNDERRUN_Msk (_U_(0x3) &lt;&lt; DAC_INTENSET_UNDERRUN_Pos)</span></div>
<div class="line"><a name="l00237"></a><span class="lineno"> 237</span>&#160;<span class="preprocessor">#define DAC_INTENSET_UNDERRUN(value) (DAC_INTENSET_UNDERRUN_Msk &amp; ((value) &lt;&lt; DAC_INTENSET_UNDERRUN_Pos))</span></div>
<div class="line"><a name="l00238"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a71699d638d22b68c3ae3d4d4bd85d3bd"> 238</a></span>&#160;<span class="preprocessor">#define DAC_INTENSET_EMPTY0_Pos 2 </span></div>
<div class="line"><a name="l00239"></a><span class="lineno"> 239</span>&#160;<span class="preprocessor">#define DAC_INTENSET_EMPTY0 (_U_(1) &lt;&lt; DAC_INTENSET_EMPTY0_Pos)</span></div>
<div class="line"><a name="l00240"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a3404b5813c75e2017e7b3de2aa672ac1"> 240</a></span>&#160;<span class="preprocessor">#define DAC_INTENSET_EMPTY1_Pos 3 </span></div>
<div class="line"><a name="l00241"></a><span class="lineno"> 241</span>&#160;<span class="preprocessor">#define DAC_INTENSET_EMPTY1 (_U_(1) &lt;&lt; DAC_INTENSET_EMPTY1_Pos)</span></div>
<div class="line"><a name="l00242"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a12375d6d098ab02a3889530b60730fc4"> 242</a></span>&#160;<span class="preprocessor">#define DAC_INTENSET_EMPTY_Pos 2 </span></div>
<div class="line"><a name="l00243"></a><span class="lineno"> 243</span>&#160;<span class="preprocessor">#define DAC_INTENSET_EMPTY_Msk (_U_(0x3) &lt;&lt; DAC_INTENSET_EMPTY_Pos)</span></div>
<div class="line"><a name="l00244"></a><span class="lineno"> 244</span>&#160;<span class="preprocessor">#define DAC_INTENSET_EMPTY(value) (DAC_INTENSET_EMPTY_Msk &amp; ((value) &lt;&lt; DAC_INTENSET_EMPTY_Pos))</span></div>
<div class="line"><a name="l00245"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a663c3cd696c8d95461326c78342fd7e3"> 245</a></span>&#160;<span class="preprocessor">#define DAC_INTENSET_RESRDY0_Pos 4 </span></div>
<div class="line"><a name="l00246"></a><span class="lineno"> 246</span>&#160;<span class="preprocessor">#define DAC_INTENSET_RESRDY0 (_U_(1) &lt;&lt; DAC_INTENSET_RESRDY0_Pos)</span></div>
<div class="line"><a name="l00247"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a970d61c62be63706b204b363c2422f95"> 247</a></span>&#160;<span class="preprocessor">#define DAC_INTENSET_RESRDY1_Pos 5 </span></div>
<div class="line"><a name="l00248"></a><span class="lineno"> 248</span>&#160;<span class="preprocessor">#define DAC_INTENSET_RESRDY1 (_U_(1) &lt;&lt; DAC_INTENSET_RESRDY1_Pos)</span></div>
<div class="line"><a name="l00249"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#aab9324e6326b7d52691a5c8da52c3444"> 249</a></span>&#160;<span class="preprocessor">#define DAC_INTENSET_RESRDY_Pos 4 </span></div>
<div class="line"><a name="l00250"></a><span class="lineno"> 250</span>&#160;<span class="preprocessor">#define DAC_INTENSET_RESRDY_Msk (_U_(0x3) &lt;&lt; DAC_INTENSET_RESRDY_Pos)</span></div>
<div class="line"><a name="l00251"></a><span class="lineno"> 251</span>&#160;<span class="preprocessor">#define DAC_INTENSET_RESRDY(value) (DAC_INTENSET_RESRDY_Msk &amp; ((value) &lt;&lt; DAC_INTENSET_RESRDY_Pos))</span></div>
<div class="line"><a name="l00252"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a8e7cb5e3e4c52fb11f03a9afbca9021b"> 252</a></span>&#160;<span class="preprocessor">#define DAC_INTENSET_OVERRUN0_Pos 6 </span></div>
<div class="line"><a name="l00253"></a><span class="lineno"> 253</span>&#160;<span class="preprocessor">#define DAC_INTENSET_OVERRUN0 (_U_(1) &lt;&lt; DAC_INTENSET_OVERRUN0_Pos)</span></div>
<div class="line"><a name="l00254"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#aa29bbdbc60c3e2fc82f8bd18ff55c4aa"> 254</a></span>&#160;<span class="preprocessor">#define DAC_INTENSET_OVERRUN1_Pos 7 </span></div>
<div class="line"><a name="l00255"></a><span class="lineno"> 255</span>&#160;<span class="preprocessor">#define DAC_INTENSET_OVERRUN1 (_U_(1) &lt;&lt; DAC_INTENSET_OVERRUN1_Pos)</span></div>
<div class="line"><a name="l00256"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#ade4c9791433ae733298029a1b51f3adb"> 256</a></span>&#160;<span class="preprocessor">#define DAC_INTENSET_OVERRUN_Pos 6 </span></div>
<div class="line"><a name="l00257"></a><span class="lineno"> 257</span>&#160;<span class="preprocessor">#define DAC_INTENSET_OVERRUN_Msk (_U_(0x3) &lt;&lt; DAC_INTENSET_OVERRUN_Pos)</span></div>
<div class="line"><a name="l00258"></a><span class="lineno"> 258</span>&#160;<span class="preprocessor">#define DAC_INTENSET_OVERRUN(value) (DAC_INTENSET_OVERRUN_Msk &amp; ((value) &lt;&lt; DAC_INTENSET_OVERRUN_Pos))</span></div>
<div class="line"><a name="l00259"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a16937f1a74d06e17331ee7d86534570a"> 259</a></span>&#160;<span class="preprocessor">#define DAC_INTENSET_MASK _U_(0xFF) </span></div>
<div class="line"><a name="l00261"></a><span class="lineno"> 261</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DAC_INTFLAG : (DAC Offset: 0x06) (R/W 8) Interrupt Flag Status and Clear -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00262"></a><span class="lineno"> 262</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00263"></a><span class="lineno"><a class="line" href="unionDAC__INTFLAG__Type.html"> 263</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{ <span class="comment">// __I to avoid read-modify-write on write-to-clear register</span></div>
<div class="line"><a name="l00264"></a><span class="lineno"> 264</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00265"></a><span class="lineno"><a class="line" href="unionDAC__INTFLAG__Type.html#ad48f3d9a755f623aff55cabd79c4db53"> 265</a></span>&#160; __I uint8_t <a class="code" href="unionDAC__INTFLAG__Type.html#ad48f3d9a755f623aff55cabd79c4db53">UNDERRUN0</a>:1; </div>
<div class="line"><a name="l00266"></a><span class="lineno"><a class="line" href="unionDAC__INTFLAG__Type.html#a41588479dc5baf24935a3f0c21abef81"> 266</a></span>&#160; __I uint8_t <a class="code" href="unionDAC__INTFLAG__Type.html#a41588479dc5baf24935a3f0c21abef81">UNDERRUN1</a>:1; </div>
<div class="line"><a name="l00267"></a><span class="lineno"><a class="line" href="unionDAC__INTFLAG__Type.html#a904d8ef0941bafcdbef918329321640d"> 267</a></span>&#160; __I uint8_t <a class="code" href="unionDAC__INTFLAG__Type.html#a904d8ef0941bafcdbef918329321640d">EMPTY0</a>:1; </div>
<div class="line"><a name="l00268"></a><span class="lineno"><a class="line" href="unionDAC__INTFLAG__Type.html#a9fdf9dffaecb13056a031437169d1df1"> 268</a></span>&#160; __I uint8_t <a class="code" href="unionDAC__INTFLAG__Type.html#a9fdf9dffaecb13056a031437169d1df1">EMPTY1</a>:1; </div>
<div class="line"><a name="l00269"></a><span class="lineno"><a class="line" href="unionDAC__INTFLAG__Type.html#a473fbd8f3187ef3405d606a9f0c861fa"> 269</a></span>&#160; __I uint8_t <a class="code" href="unionDAC__INTFLAG__Type.html#a473fbd8f3187ef3405d606a9f0c861fa">RESRDY0</a>:1; </div>
<div class="line"><a name="l00270"></a><span class="lineno"><a class="line" href="unionDAC__INTFLAG__Type.html#a6f38103ed48484b86a2b34e4a9662e32"> 270</a></span>&#160; __I uint8_t <a class="code" href="unionDAC__INTFLAG__Type.html#a6f38103ed48484b86a2b34e4a9662e32">RESRDY1</a>:1; </div>
<div class="line"><a name="l00271"></a><span class="lineno"><a class="line" href="unionDAC__INTFLAG__Type.html#a8ae2012caf50a6cd17c0bbf4e0d731a4"> 271</a></span>&#160; __I uint8_t <a class="code" href="unionDAC__INTFLAG__Type.html#a8ae2012caf50a6cd17c0bbf4e0d731a4">OVERRUN0</a>:1; </div>
<div class="line"><a name="l00272"></a><span class="lineno"><a class="line" href="unionDAC__INTFLAG__Type.html#a15b6a21e7290cdc42956ddef0835955a"> 272</a></span>&#160; __I uint8_t <a class="code" href="unionDAC__INTFLAG__Type.html#a15b6a21e7290cdc42956ddef0835955a">OVERRUN1</a>:1; </div>
<div class="line"><a name="l00273"></a><span class="lineno"><a class="line" href="unionDAC__INTFLAG__Type.html#a38047ac72bc595402470fc2a93f0de3a"> 273</a></span>&#160; } bit; </div>
<div class="line"><a name="l00274"></a><span class="lineno"> 274</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00275"></a><span class="lineno"><a class="line" href="unionDAC__INTFLAG__Type.html#a60e13d64d227231f79dff13a8ab8f7b6"> 275</a></span>&#160; __I uint8_t <a class="code" href="unionDAC__INTFLAG__Type.html#a60e13d64d227231f79dff13a8ab8f7b6">UNDERRUN</a>:2; </div>
<div class="line"><a name="l00276"></a><span class="lineno"><a class="line" href="unionDAC__INTFLAG__Type.html#a0ed0c3497b566c94354b9dab7af60031"> 276</a></span>&#160; __I uint8_t <a class="code" href="unionDAC__INTFLAG__Type.html#a0ed0c3497b566c94354b9dab7af60031">EMPTY</a>:2; </div>
<div class="line"><a name="l00277"></a><span class="lineno"><a class="line" href="unionDAC__INTFLAG__Type.html#a8a0758f5583bdc7e18988ef276273e1d"> 277</a></span>&#160; __I uint8_t <a class="code" href="unionDAC__INTFLAG__Type.html#a8a0758f5583bdc7e18988ef276273e1d">RESRDY</a>:2; </div>
<div class="line"><a name="l00278"></a><span class="lineno"><a class="line" href="unionDAC__INTFLAG__Type.html#a48b4955ed9956d4ded5d6500419c8e25"> 278</a></span>&#160; __I uint8_t <a class="code" href="unionDAC__INTFLAG__Type.html#a48b4955ed9956d4ded5d6500419c8e25">OVERRUN</a>:2; </div>
<div class="line"><a name="l00279"></a><span class="lineno"><a class="line" href="unionDAC__INTFLAG__Type.html#aebe6e7c770739e824fbdb616fbb4d99f"> 279</a></span>&#160; } vec; </div>
<div class="line"><a name="l00280"></a><span class="lineno"><a class="line" href="unionDAC__INTFLAG__Type.html#acf0eb6614c1b35e4d6be3db9687d376d"> 280</a></span>&#160; uint8_t <a class="code" href="unionDAC__INTFLAG__Type.html#acf0eb6614c1b35e4d6be3db9687d376d">reg</a>; </div>
<div class="line"><a name="l00281"></a><span class="lineno"> 281</span>&#160;} <a class="code" href="unionDAC__INTFLAG__Type.html">DAC_INTFLAG_Type</a>;</div>
<div class="line"><a name="l00282"></a><span class="lineno"> 282</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00283"></a><span class="lineno"> 283</span>&#160; </div>
<div class="line"><a name="l00284"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#adb76074cbcb6b6dbbe088030f72d5a4b"> 284</a></span>&#160;<span class="preprocessor">#define DAC_INTFLAG_OFFSET 0x06 </span></div>
<div class="line"><a name="l00285"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a9f73e182aae9decbe33d83db01b2830b"> 285</a></span>&#160;<span class="preprocessor">#define DAC_INTFLAG_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00287"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a99534e1a9968859517da0d7890ceedf1"> 287</a></span>&#160;<span class="preprocessor">#define DAC_INTFLAG_UNDERRUN0_Pos 0 </span></div>
<div class="line"><a name="l00288"></a><span class="lineno"> 288</span>&#160;<span class="preprocessor">#define DAC_INTFLAG_UNDERRUN0 (_U_(1) &lt;&lt; DAC_INTFLAG_UNDERRUN0_Pos)</span></div>
<div class="line"><a name="l00289"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#ac4c87b8b90e57a6044d2954eb478dcb6"> 289</a></span>&#160;<span class="preprocessor">#define DAC_INTFLAG_UNDERRUN1_Pos 1 </span></div>
<div class="line"><a name="l00290"></a><span class="lineno"> 290</span>&#160;<span class="preprocessor">#define DAC_INTFLAG_UNDERRUN1 (_U_(1) &lt;&lt; DAC_INTFLAG_UNDERRUN1_Pos)</span></div>
<div class="line"><a name="l00291"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a6c43469c26efeb772af1a2ceba6e472b"> 291</a></span>&#160;<span class="preprocessor">#define DAC_INTFLAG_UNDERRUN_Pos 0 </span></div>
<div class="line"><a name="l00292"></a><span class="lineno"> 292</span>&#160;<span class="preprocessor">#define DAC_INTFLAG_UNDERRUN_Msk (_U_(0x3) &lt;&lt; DAC_INTFLAG_UNDERRUN_Pos)</span></div>
<div class="line"><a name="l00293"></a><span class="lineno"> 293</span>&#160;<span class="preprocessor">#define DAC_INTFLAG_UNDERRUN(value) (DAC_INTFLAG_UNDERRUN_Msk &amp; ((value) &lt;&lt; DAC_INTFLAG_UNDERRUN_Pos))</span></div>
<div class="line"><a name="l00294"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#ad32de3852e2d2484e2832be4819d4364"> 294</a></span>&#160;<span class="preprocessor">#define DAC_INTFLAG_EMPTY0_Pos 2 </span></div>
<div class="line"><a name="l00295"></a><span class="lineno"> 295</span>&#160;<span class="preprocessor">#define DAC_INTFLAG_EMPTY0 (_U_(1) &lt;&lt; DAC_INTFLAG_EMPTY0_Pos)</span></div>
<div class="line"><a name="l00296"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a7e3bd4dd4fca96ba8d463b959c91d5dd"> 296</a></span>&#160;<span class="preprocessor">#define DAC_INTFLAG_EMPTY1_Pos 3 </span></div>
<div class="line"><a name="l00297"></a><span class="lineno"> 297</span>&#160;<span class="preprocessor">#define DAC_INTFLAG_EMPTY1 (_U_(1) &lt;&lt; DAC_INTFLAG_EMPTY1_Pos)</span></div>
<div class="line"><a name="l00298"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a0dac29b106d18582f439752a01102763"> 298</a></span>&#160;<span class="preprocessor">#define DAC_INTFLAG_EMPTY_Pos 2 </span></div>
<div class="line"><a name="l00299"></a><span class="lineno"> 299</span>&#160;<span class="preprocessor">#define DAC_INTFLAG_EMPTY_Msk (_U_(0x3) &lt;&lt; DAC_INTFLAG_EMPTY_Pos)</span></div>
<div class="line"><a name="l00300"></a><span class="lineno"> 300</span>&#160;<span class="preprocessor">#define DAC_INTFLAG_EMPTY(value) (DAC_INTFLAG_EMPTY_Msk &amp; ((value) &lt;&lt; DAC_INTFLAG_EMPTY_Pos))</span></div>
<div class="line"><a name="l00301"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a427673598aab80580409cf27ad38392a"> 301</a></span>&#160;<span class="preprocessor">#define DAC_INTFLAG_RESRDY0_Pos 4 </span></div>
<div class="line"><a name="l00302"></a><span class="lineno"> 302</span>&#160;<span class="preprocessor">#define DAC_INTFLAG_RESRDY0 (_U_(1) &lt;&lt; DAC_INTFLAG_RESRDY0_Pos)</span></div>
<div class="line"><a name="l00303"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a936fafa26e268d86c70b9902d8ea1952"> 303</a></span>&#160;<span class="preprocessor">#define DAC_INTFLAG_RESRDY1_Pos 5 </span></div>
<div class="line"><a name="l00304"></a><span class="lineno"> 304</span>&#160;<span class="preprocessor">#define DAC_INTFLAG_RESRDY1 (_U_(1) &lt;&lt; DAC_INTFLAG_RESRDY1_Pos)</span></div>
<div class="line"><a name="l00305"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#af9c101b304080de5ca7c81db6f3433d1"> 305</a></span>&#160;<span class="preprocessor">#define DAC_INTFLAG_RESRDY_Pos 4 </span></div>
<div class="line"><a name="l00306"></a><span class="lineno"> 306</span>&#160;<span class="preprocessor">#define DAC_INTFLAG_RESRDY_Msk (_U_(0x3) &lt;&lt; DAC_INTFLAG_RESRDY_Pos)</span></div>
<div class="line"><a name="l00307"></a><span class="lineno"> 307</span>&#160;<span class="preprocessor">#define DAC_INTFLAG_RESRDY(value) (DAC_INTFLAG_RESRDY_Msk &amp; ((value) &lt;&lt; DAC_INTFLAG_RESRDY_Pos))</span></div>
<div class="line"><a name="l00308"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#aeb99a9e50d4cb04a7b718c0bde593779"> 308</a></span>&#160;<span class="preprocessor">#define DAC_INTFLAG_OVERRUN0_Pos 6 </span></div>
<div class="line"><a name="l00309"></a><span class="lineno"> 309</span>&#160;<span class="preprocessor">#define DAC_INTFLAG_OVERRUN0 (_U_(1) &lt;&lt; DAC_INTFLAG_OVERRUN0_Pos)</span></div>
<div class="line"><a name="l00310"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#afcb222d8386690e91cbd4a9428a4f60e"> 310</a></span>&#160;<span class="preprocessor">#define DAC_INTFLAG_OVERRUN1_Pos 7 </span></div>
<div class="line"><a name="l00311"></a><span class="lineno"> 311</span>&#160;<span class="preprocessor">#define DAC_INTFLAG_OVERRUN1 (_U_(1) &lt;&lt; DAC_INTFLAG_OVERRUN1_Pos)</span></div>
<div class="line"><a name="l00312"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#ade5afe2053ab21e01c28212eaef0fe55"> 312</a></span>&#160;<span class="preprocessor">#define DAC_INTFLAG_OVERRUN_Pos 6 </span></div>
<div class="line"><a name="l00313"></a><span class="lineno"> 313</span>&#160;<span class="preprocessor">#define DAC_INTFLAG_OVERRUN_Msk (_U_(0x3) &lt;&lt; DAC_INTFLAG_OVERRUN_Pos)</span></div>
<div class="line"><a name="l00314"></a><span class="lineno"> 314</span>&#160;<span class="preprocessor">#define DAC_INTFLAG_OVERRUN(value) (DAC_INTFLAG_OVERRUN_Msk &amp; ((value) &lt;&lt; DAC_INTFLAG_OVERRUN_Pos))</span></div>
<div class="line"><a name="l00315"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a7610b49b2915578cf29db233149cf421"> 315</a></span>&#160;<span class="preprocessor">#define DAC_INTFLAG_MASK _U_(0xFF) </span></div>
<div class="line"><a name="l00317"></a><span class="lineno"> 317</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DAC_STATUS : (DAC Offset: 0x07) (R/ 8) Status -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00318"></a><span class="lineno"> 318</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00319"></a><span class="lineno"><a class="line" href="unionDAC__STATUS__Type.html"> 319</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00320"></a><span class="lineno"> 320</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00321"></a><span class="lineno"><a class="line" href="unionDAC__STATUS__Type.html#a5c09f6dfcaf4e47031bc240036d96203"> 321</a></span>&#160; uint8_t <a class="code" href="unionDAC__STATUS__Type.html#a5c09f6dfcaf4e47031bc240036d96203">READY0</a>:1; </div>
<div class="line"><a name="l00322"></a><span class="lineno"><a class="line" href="unionDAC__STATUS__Type.html#a6bf611d203f71c9b9fe6e5f7d4945e73"> 322</a></span>&#160; uint8_t <a class="code" href="unionDAC__STATUS__Type.html#a6bf611d203f71c9b9fe6e5f7d4945e73">READY1</a>:1; </div>
<div class="line"><a name="l00323"></a><span class="lineno"><a class="line" href="unionDAC__STATUS__Type.html#a673f070d4127c2c7ae330f58d830a7b0"> 323</a></span>&#160; uint8_t <a class="code" href="unionDAC__STATUS__Type.html#a673f070d4127c2c7ae330f58d830a7b0">EOC0</a>:1; </div>
<div class="line"><a name="l00324"></a><span class="lineno"><a class="line" href="unionDAC__STATUS__Type.html#a021333f764025eda9e1dcb6b261473a3"> 324</a></span>&#160; uint8_t <a class="code" href="unionDAC__STATUS__Type.html#a021333f764025eda9e1dcb6b261473a3">EOC1</a>:1; </div>
<div class="line"><a name="l00325"></a><span class="lineno"><a class="line" href="unionDAC__STATUS__Type.html#a42fc78852678a12976c99a7562764fca"> 325</a></span>&#160; uint8_t :4; </div>
<div class="line"><a name="l00326"></a><span class="lineno"><a class="line" href="unionDAC__STATUS__Type.html#a0ec81e755e780317dcd66bcb9c5fbb71"> 326</a></span>&#160; } bit; </div>
<div class="line"><a name="l00327"></a><span class="lineno"> 327</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00328"></a><span class="lineno"><a class="line" href="unionDAC__STATUS__Type.html#ada6b3d84893475e85322f4c41a2c3386"> 328</a></span>&#160; uint8_t <a class="code" href="unionDAC__STATUS__Type.html#ada6b3d84893475e85322f4c41a2c3386">READY</a>:2; </div>
<div class="line"><a name="l00329"></a><span class="lineno"><a class="line" href="unionDAC__STATUS__Type.html#a25a9909aa3172c3a9e500901e72cb3f7"> 329</a></span>&#160; uint8_t <a class="code" href="unionDAC__STATUS__Type.html#a25a9909aa3172c3a9e500901e72cb3f7">EOC</a>:2; </div>
<div class="line"><a name="l00330"></a><span class="lineno"> 330</span>&#160; uint8_t :4; </div>
<div class="line"><a name="l00331"></a><span class="lineno"><a class="line" href="unionDAC__STATUS__Type.html#a688a763687ceea4107af24ee2693cda7"> 331</a></span>&#160; } vec; </div>
<div class="line"><a name="l00332"></a><span class="lineno"><a class="line" href="unionDAC__STATUS__Type.html#a3789a2c1436192872cddbb20daa4a93a"> 332</a></span>&#160; uint8_t <a class="code" href="unionDAC__STATUS__Type.html#a3789a2c1436192872cddbb20daa4a93a">reg</a>; </div>
<div class="line"><a name="l00333"></a><span class="lineno"> 333</span>&#160;} <a class="code" href="unionDAC__STATUS__Type.html">DAC_STATUS_Type</a>;</div>
<div class="line"><a name="l00334"></a><span class="lineno"> 334</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00335"></a><span class="lineno"> 335</span>&#160; </div>
<div class="line"><a name="l00336"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a515f997330d2406b1230c8b83e7c5a6b"> 336</a></span>&#160;<span class="preprocessor">#define DAC_STATUS_OFFSET 0x07 </span></div>
<div class="line"><a name="l00337"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a114959003f1b29d6a60514c7e42781e3"> 337</a></span>&#160;<span class="preprocessor">#define DAC_STATUS_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00339"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a4486c687c5a4ab1839b2a265c050585c"> 339</a></span>&#160;<span class="preprocessor">#define DAC_STATUS_READY0_Pos 0 </span></div>
<div class="line"><a name="l00340"></a><span class="lineno"> 340</span>&#160;<span class="preprocessor">#define DAC_STATUS_READY0 (_U_(1) &lt;&lt; DAC_STATUS_READY0_Pos)</span></div>
<div class="line"><a name="l00341"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a18d69a63dd603174ef5ff40ea7afbb8e"> 341</a></span>&#160;<span class="preprocessor">#define DAC_STATUS_READY1_Pos 1 </span></div>
<div class="line"><a name="l00342"></a><span class="lineno"> 342</span>&#160;<span class="preprocessor">#define DAC_STATUS_READY1 (_U_(1) &lt;&lt; DAC_STATUS_READY1_Pos)</span></div>
<div class="line"><a name="l00343"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a466a35ff7aea713f86197f0fba85d7ae"> 343</a></span>&#160;<span class="preprocessor">#define DAC_STATUS_READY_Pos 0 </span></div>
<div class="line"><a name="l00344"></a><span class="lineno"> 344</span>&#160;<span class="preprocessor">#define DAC_STATUS_READY_Msk (_U_(0x3) &lt;&lt; DAC_STATUS_READY_Pos)</span></div>
<div class="line"><a name="l00345"></a><span class="lineno"> 345</span>&#160;<span class="preprocessor">#define DAC_STATUS_READY(value) (DAC_STATUS_READY_Msk &amp; ((value) &lt;&lt; DAC_STATUS_READY_Pos))</span></div>
<div class="line"><a name="l00346"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#ae9501a2a26e724e737609569a91c03d3"> 346</a></span>&#160;<span class="preprocessor">#define DAC_STATUS_EOC0_Pos 2 </span></div>
<div class="line"><a name="l00347"></a><span class="lineno"> 347</span>&#160;<span class="preprocessor">#define DAC_STATUS_EOC0 (_U_(1) &lt;&lt; DAC_STATUS_EOC0_Pos)</span></div>
<div class="line"><a name="l00348"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#aa4eeac4108e1883eb87c11c9c2f122be"> 348</a></span>&#160;<span class="preprocessor">#define DAC_STATUS_EOC1_Pos 3 </span></div>
<div class="line"><a name="l00349"></a><span class="lineno"> 349</span>&#160;<span class="preprocessor">#define DAC_STATUS_EOC1 (_U_(1) &lt;&lt; DAC_STATUS_EOC1_Pos)</span></div>
<div class="line"><a name="l00350"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a8f0382f0b6c03183ecfbb3f71270053d"> 350</a></span>&#160;<span class="preprocessor">#define DAC_STATUS_EOC_Pos 2 </span></div>
<div class="line"><a name="l00351"></a><span class="lineno"> 351</span>&#160;<span class="preprocessor">#define DAC_STATUS_EOC_Msk (_U_(0x3) &lt;&lt; DAC_STATUS_EOC_Pos)</span></div>
<div class="line"><a name="l00352"></a><span class="lineno"> 352</span>&#160;<span class="preprocessor">#define DAC_STATUS_EOC(value) (DAC_STATUS_EOC_Msk &amp; ((value) &lt;&lt; DAC_STATUS_EOC_Pos))</span></div>
<div class="line"><a name="l00353"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a989b67a3f83996021dc0214e918aaddf"> 353</a></span>&#160;<span class="preprocessor">#define DAC_STATUS_MASK _U_(0x0F) </span></div>
<div class="line"><a name="l00355"></a><span class="lineno"> 355</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DAC_SYNCBUSY : (DAC Offset: 0x08) (R/ 32) Synchronization Busy -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00356"></a><span class="lineno"> 356</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00357"></a><span class="lineno"><a class="line" href="unionDAC__SYNCBUSY__Type.html"> 357</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00358"></a><span class="lineno"> 358</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00359"></a><span class="lineno"><a class="line" href="unionDAC__SYNCBUSY__Type.html#a71801dfb81eab01206ff3f4d63d01e43"> 359</a></span>&#160; uint32_t <a class="code" href="unionDAC__SYNCBUSY__Type.html#a71801dfb81eab01206ff3f4d63d01e43">SWRST</a>:1; </div>
<div class="line"><a name="l00360"></a><span class="lineno"><a class="line" href="unionDAC__SYNCBUSY__Type.html#ab903f92294b140db54635ae37de493e7"> 360</a></span>&#160; uint32_t <a class="code" href="unionDAC__SYNCBUSY__Type.html#ab903f92294b140db54635ae37de493e7">ENABLE</a>:1; </div>
<div class="line"><a name="l00361"></a><span class="lineno"><a class="line" href="unionDAC__SYNCBUSY__Type.html#ae6bb4fead68d3643d265d46f31350a9a"> 361</a></span>&#160; uint32_t <a class="code" href="unionDAC__SYNCBUSY__Type.html#ae6bb4fead68d3643d265d46f31350a9a">DATA0</a>:1; </div>
<div class="line"><a name="l00362"></a><span class="lineno"><a class="line" href="unionDAC__SYNCBUSY__Type.html#af61638d4b754e75dcbde34088a2d2fa2"> 362</a></span>&#160; uint32_t <a class="code" href="unionDAC__SYNCBUSY__Type.html#af61638d4b754e75dcbde34088a2d2fa2">DATA1</a>:1; </div>
<div class="line"><a name="l00363"></a><span class="lineno"><a class="line" href="unionDAC__SYNCBUSY__Type.html#a4531266e90241f1261eaf670fb35a143"> 363</a></span>&#160; uint32_t <a class="code" href="unionDAC__SYNCBUSY__Type.html#a4531266e90241f1261eaf670fb35a143">DATABUF0</a>:1; </div>
<div class="line"><a name="l00364"></a><span class="lineno"><a class="line" href="unionDAC__SYNCBUSY__Type.html#ae17006048f3241612d94258d3f1d339d"> 364</a></span>&#160; uint32_t <a class="code" href="unionDAC__SYNCBUSY__Type.html#ae17006048f3241612d94258d3f1d339d">DATABUF1</a>:1; </div>
<div class="line"><a name="l00365"></a><span class="lineno"><a class="line" href="unionDAC__SYNCBUSY__Type.html#ab9b50bc5e2a482d1db4ca65b63ce2162"> 365</a></span>&#160; uint32_t :26; </div>
<div class="line"><a name="l00366"></a><span class="lineno"><a class="line" href="unionDAC__SYNCBUSY__Type.html#af1d955b134f6de284a3476f979a33fcb"> 366</a></span>&#160; } bit; </div>
<div class="line"><a name="l00367"></a><span class="lineno"> 367</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00368"></a><span class="lineno"> 368</span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00369"></a><span class="lineno"><a class="line" href="unionDAC__SYNCBUSY__Type.html#a44ec94935648b60d93dad622dd1e2b08"> 369</a></span>&#160; uint32_t <a class="code" href="unionDAC__SYNCBUSY__Type.html#a44ec94935648b60d93dad622dd1e2b08">DATA</a>:2; </div>
<div class="line"><a name="l00370"></a><span class="lineno"><a class="line" href="unionDAC__SYNCBUSY__Type.html#a740f7133f6a1fbd190b79daa6629887b"> 370</a></span>&#160; uint32_t <a class="code" href="unionDAC__SYNCBUSY__Type.html#a740f7133f6a1fbd190b79daa6629887b">DATABUF</a>:2; </div>
<div class="line"><a name="l00371"></a><span class="lineno"><a class="line" href="unionDAC__SYNCBUSY__Type.html#ab15d8375253f32f8bf3146b783b515d8"> 371</a></span>&#160; uint32_t :26; </div>
<div class="line"><a name="l00372"></a><span class="lineno"><a class="line" href="unionDAC__SYNCBUSY__Type.html#a2c43c2829a1aa7494d528c6451d4836b"> 372</a></span>&#160; } vec; </div>
<div class="line"><a name="l00373"></a><span class="lineno"><a class="line" href="unionDAC__SYNCBUSY__Type.html#af0b0c9e75058125af29030bc68c6b139"> 373</a></span>&#160; uint32_t <a class="code" href="unionDAC__SYNCBUSY__Type.html#af0b0c9e75058125af29030bc68c6b139">reg</a>; </div>
<div class="line"><a name="l00374"></a><span class="lineno"> 374</span>&#160;} <a class="code" href="unionDAC__SYNCBUSY__Type.html">DAC_SYNCBUSY_Type</a>;</div>
<div class="line"><a name="l00375"></a><span class="lineno"> 375</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00376"></a><span class="lineno"> 376</span>&#160; </div>
<div class="line"><a name="l00377"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#ab524594209eea0ef54d7e77a42be7863"> 377</a></span>&#160;<span class="preprocessor">#define DAC_SYNCBUSY_OFFSET 0x08 </span></div>
<div class="line"><a name="l00378"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a5decef95bed07e847ab4c1b586df8f3d"> 378</a></span>&#160;<span class="preprocessor">#define DAC_SYNCBUSY_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00380"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a0ab7aff18f93be96e950be32c7cb04cb"> 380</a></span>&#160;<span class="preprocessor">#define DAC_SYNCBUSY_SWRST_Pos 0 </span></div>
<div class="line"><a name="l00381"></a><span class="lineno"> 381</span>&#160;<span class="preprocessor">#define DAC_SYNCBUSY_SWRST (_U_(0x1) &lt;&lt; DAC_SYNCBUSY_SWRST_Pos)</span></div>
<div class="line"><a name="l00382"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a230872861abc95e2225e3f5c4246f141"> 382</a></span>&#160;<span class="preprocessor">#define DAC_SYNCBUSY_ENABLE_Pos 1 </span></div>
<div class="line"><a name="l00383"></a><span class="lineno"> 383</span>&#160;<span class="preprocessor">#define DAC_SYNCBUSY_ENABLE (_U_(0x1) &lt;&lt; DAC_SYNCBUSY_ENABLE_Pos)</span></div>
<div class="line"><a name="l00384"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a9f415827b3ff10d6dcff38f9e03d2dd3"> 384</a></span>&#160;<span class="preprocessor">#define DAC_SYNCBUSY_DATA0_Pos 2 </span></div>
<div class="line"><a name="l00385"></a><span class="lineno"> 385</span>&#160;<span class="preprocessor">#define DAC_SYNCBUSY_DATA0 (_U_(1) &lt;&lt; DAC_SYNCBUSY_DATA0_Pos)</span></div>
<div class="line"><a name="l00386"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a42acf2c6875f6e0d2ab1997ac3cf71cd"> 386</a></span>&#160;<span class="preprocessor">#define DAC_SYNCBUSY_DATA1_Pos 3 </span></div>
<div class="line"><a name="l00387"></a><span class="lineno"> 387</span>&#160;<span class="preprocessor">#define DAC_SYNCBUSY_DATA1 (_U_(1) &lt;&lt; DAC_SYNCBUSY_DATA1_Pos)</span></div>
<div class="line"><a name="l00388"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a2c7fa799e63254f6fe31997f8d74ab69"> 388</a></span>&#160;<span class="preprocessor">#define DAC_SYNCBUSY_DATA_Pos 2 </span></div>
<div class="line"><a name="l00389"></a><span class="lineno"> 389</span>&#160;<span class="preprocessor">#define DAC_SYNCBUSY_DATA_Msk (_U_(0x3) &lt;&lt; DAC_SYNCBUSY_DATA_Pos)</span></div>
<div class="line"><a name="l00390"></a><span class="lineno"> 390</span>&#160;<span class="preprocessor">#define DAC_SYNCBUSY_DATA(value) (DAC_SYNCBUSY_DATA_Msk &amp; ((value) &lt;&lt; DAC_SYNCBUSY_DATA_Pos))</span></div>
<div class="line"><a name="l00391"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#abcfee0c9deae7256c79904ede1fb80f3"> 391</a></span>&#160;<span class="preprocessor">#define DAC_SYNCBUSY_DATABUF0_Pos 4 </span></div>
<div class="line"><a name="l00392"></a><span class="lineno"> 392</span>&#160;<span class="preprocessor">#define DAC_SYNCBUSY_DATABUF0 (_U_(1) &lt;&lt; DAC_SYNCBUSY_DATABUF0_Pos)</span></div>
<div class="line"><a name="l00393"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#af33c0e2294a830ae02a2fa7b8ace4080"> 393</a></span>&#160;<span class="preprocessor">#define DAC_SYNCBUSY_DATABUF1_Pos 5 </span></div>
<div class="line"><a name="l00394"></a><span class="lineno"> 394</span>&#160;<span class="preprocessor">#define DAC_SYNCBUSY_DATABUF1 (_U_(1) &lt;&lt; DAC_SYNCBUSY_DATABUF1_Pos)</span></div>
<div class="line"><a name="l00395"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a04b32c9d531c11ebc9ded7e77709d39e"> 395</a></span>&#160;<span class="preprocessor">#define DAC_SYNCBUSY_DATABUF_Pos 4 </span></div>
<div class="line"><a name="l00396"></a><span class="lineno"> 396</span>&#160;<span class="preprocessor">#define DAC_SYNCBUSY_DATABUF_Msk (_U_(0x3) &lt;&lt; DAC_SYNCBUSY_DATABUF_Pos)</span></div>
<div class="line"><a name="l00397"></a><span class="lineno"> 397</span>&#160;<span class="preprocessor">#define DAC_SYNCBUSY_DATABUF(value) (DAC_SYNCBUSY_DATABUF_Msk &amp; ((value) &lt;&lt; DAC_SYNCBUSY_DATABUF_Pos))</span></div>
<div class="line"><a name="l00398"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a9f12d800862e02454c05ef89c9fb3b88"> 398</a></span>&#160;<span class="preprocessor">#define DAC_SYNCBUSY_MASK _U_(0x0000003F) </span></div>
<div class="line"><a name="l00400"></a><span class="lineno"> 400</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DAC_DACCTRL : (DAC Offset: 0x0C) (R/W 16) DAC n Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00401"></a><span class="lineno"> 401</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00402"></a><span class="lineno"><a class="line" href="unionDAC__DACCTRL__Type.html"> 402</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00403"></a><span class="lineno"> 403</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00404"></a><span class="lineno"><a class="line" href="unionDAC__DACCTRL__Type.html#ad065c50db4f793eb52702331e932e24b"> 404</a></span>&#160; uint16_t <a class="code" href="unionDAC__DACCTRL__Type.html#ad065c50db4f793eb52702331e932e24b">LEFTADJ</a>:1; </div>
<div class="line"><a name="l00405"></a><span class="lineno"><a class="line" href="unionDAC__DACCTRL__Type.html#afed61d7540b9523f6ce79c2c2a43cbf8"> 405</a></span>&#160; uint16_t <a class="code" href="unionDAC__DACCTRL__Type.html#afed61d7540b9523f6ce79c2c2a43cbf8">ENABLE</a>:1; </div>
<div class="line"><a name="l00406"></a><span class="lineno"><a class="line" href="unionDAC__DACCTRL__Type.html#a7eda99b8d0fdfa055537dc960755780e"> 406</a></span>&#160; uint16_t <a class="code" href="unionDAC__DACCTRL__Type.html#a7eda99b8d0fdfa055537dc960755780e">CCTRL</a>:2; </div>
<div class="line"><a name="l00407"></a><span class="lineno"><a class="line" href="unionDAC__DACCTRL__Type.html#a3e12b69cab3993bd809e7acd96997c93"> 407</a></span>&#160; uint16_t :1; </div>
<div class="line"><a name="l00408"></a><span class="lineno"><a class="line" href="unionDAC__DACCTRL__Type.html#a09f51b06c0b7ad014bc0e710237bcb6e"> 408</a></span>&#160; uint16_t <a class="code" href="unionDAC__DACCTRL__Type.html#a09f51b06c0b7ad014bc0e710237bcb6e">FEXT</a>:1; </div>
<div class="line"><a name="l00409"></a><span class="lineno"><a class="line" href="unionDAC__DACCTRL__Type.html#ae5c989cd1e1214e3a6d0574a3c73642e"> 409</a></span>&#160; uint16_t <a class="code" href="unionDAC__DACCTRL__Type.html#ae5c989cd1e1214e3a6d0574a3c73642e">RUNSTDBY</a>:1; </div>
<div class="line"><a name="l00410"></a><span class="lineno"><a class="line" href="unionDAC__DACCTRL__Type.html#a674598dd467f9ca2cdc971a8f4eff7c4"> 410</a></span>&#160; uint16_t <a class="code" href="unionDAC__DACCTRL__Type.html#a674598dd467f9ca2cdc971a8f4eff7c4">DITHER</a>:1; </div>
<div class="line"><a name="l00411"></a><span class="lineno"><a class="line" href="unionDAC__DACCTRL__Type.html#a311d0562a16d3427b77ecac5725bcbe0"> 411</a></span>&#160; uint16_t <a class="code" href="unionDAC__DACCTRL__Type.html#a311d0562a16d3427b77ecac5725bcbe0">REFRESH</a>:4; </div>
<div class="line"><a name="l00412"></a><span class="lineno"><a class="line" href="unionDAC__DACCTRL__Type.html#ab619223b0ecc24da31e2e889d29a9075"> 412</a></span>&#160; uint16_t :1; </div>
<div class="line"><a name="l00413"></a><span class="lineno"><a class="line" href="unionDAC__DACCTRL__Type.html#acef7802aaf41154b469d4a206c8684c4"> 413</a></span>&#160; uint16_t <a class="code" href="unionDAC__DACCTRL__Type.html#acef7802aaf41154b469d4a206c8684c4">OSR</a>:3; </div>
<div class="line"><a name="l00414"></a><span class="lineno"><a class="line" href="unionDAC__DACCTRL__Type.html#aaa4c05aae29f82d158d5b1a8aa5bac5b"> 414</a></span>&#160; } bit; </div>
<div class="line"><a name="l00415"></a><span class="lineno"><a class="line" href="unionDAC__DACCTRL__Type.html#a7fcb49127690e2bfdc5aa622f4fe12a3"> 415</a></span>&#160; uint16_t <a class="code" href="unionDAC__DACCTRL__Type.html#a7fcb49127690e2bfdc5aa622f4fe12a3">reg</a>; </div>
<div class="line"><a name="l00416"></a><span class="lineno"> 416</span>&#160;} <a class="code" href="unionDAC__DACCTRL__Type.html">DAC_DACCTRL_Type</a>;</div>
<div class="line"><a name="l00417"></a><span class="lineno"> 417</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00418"></a><span class="lineno"> 418</span>&#160; </div>
<div class="line"><a name="l00419"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a84ebc513c3813810220d0effb64d32a6"> 419</a></span>&#160;<span class="preprocessor">#define DAC_DACCTRL_OFFSET 0x0C </span></div>
<div class="line"><a name="l00420"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a3035c8be28b7caae01f7d985eefa0240"> 420</a></span>&#160;<span class="preprocessor">#define DAC_DACCTRL_RESETVALUE _U_(0x0000) </span></div>
<div class="line"><a name="l00422"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#aa211888989fa388c431ac25dea23b398"> 422</a></span>&#160;<span class="preprocessor">#define DAC_DACCTRL_LEFTADJ_Pos 0 </span></div>
<div class="line"><a name="l00423"></a><span class="lineno"> 423</span>&#160;<span class="preprocessor">#define DAC_DACCTRL_LEFTADJ (_U_(0x1) &lt;&lt; DAC_DACCTRL_LEFTADJ_Pos)</span></div>
<div class="line"><a name="l00424"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a8ff7f04caf3d817ce0400efb42538924"> 424</a></span>&#160;<span class="preprocessor">#define DAC_DACCTRL_ENABLE_Pos 1 </span></div>
<div class="line"><a name="l00425"></a><span class="lineno"> 425</span>&#160;<span class="preprocessor">#define DAC_DACCTRL_ENABLE (_U_(0x1) &lt;&lt; DAC_DACCTRL_ENABLE_Pos)</span></div>
<div class="line"><a name="l00426"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a99c14926d2b1e10dcdf3495435242fb2"> 426</a></span>&#160;<span class="preprocessor">#define DAC_DACCTRL_CCTRL_Pos 2 </span></div>
<div class="line"><a name="l00427"></a><span class="lineno"> 427</span>&#160;<span class="preprocessor">#define DAC_DACCTRL_CCTRL_Msk (_U_(0x3) &lt;&lt; DAC_DACCTRL_CCTRL_Pos)</span></div>
<div class="line"><a name="l00428"></a><span class="lineno"> 428</span>&#160;<span class="preprocessor">#define DAC_DACCTRL_CCTRL(value) (DAC_DACCTRL_CCTRL_Msk &amp; ((value) &lt;&lt; DAC_DACCTRL_CCTRL_Pos))</span></div>
<div class="line"><a name="l00429"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a64aa7d99ee21bf0fcc63c55df258a865"> 429</a></span>&#160;<span class="preprocessor">#define DAC_DACCTRL_CCTRL_CC100K_Val _U_(0x0) </span></div>
<div class="line"><a name="l00430"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a0eae47cb1607b2737281a3839708581f"> 430</a></span>&#160;<span class="preprocessor">#define DAC_DACCTRL_CCTRL_CC1M_Val _U_(0x1) </span></div>
<div class="line"><a name="l00431"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a47d57d2b4da612791e27d9e1a5574926"> 431</a></span>&#160;<span class="preprocessor">#define DAC_DACCTRL_CCTRL_CC12M_Val _U_(0x2) </span></div>
<div class="line"><a name="l00432"></a><span class="lineno"> 432</span>&#160;<span class="preprocessor">#define DAC_DACCTRL_CCTRL_CC100K (DAC_DACCTRL_CCTRL_CC100K_Val &lt;&lt; DAC_DACCTRL_CCTRL_Pos)</span></div>
<div class="line"><a name="l00433"></a><span class="lineno"> 433</span>&#160;<span class="preprocessor">#define DAC_DACCTRL_CCTRL_CC1M (DAC_DACCTRL_CCTRL_CC1M_Val &lt;&lt; DAC_DACCTRL_CCTRL_Pos)</span></div>
<div class="line"><a name="l00434"></a><span class="lineno"> 434</span>&#160;<span class="preprocessor">#define DAC_DACCTRL_CCTRL_CC12M (DAC_DACCTRL_CCTRL_CC12M_Val &lt;&lt; DAC_DACCTRL_CCTRL_Pos)</span></div>
<div class="line"><a name="l00435"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a7aacb6f50e4b47e5c436bda9c3c3d772"> 435</a></span>&#160;<span class="preprocessor">#define DAC_DACCTRL_FEXT_Pos 5 </span></div>
<div class="line"><a name="l00436"></a><span class="lineno"> 436</span>&#160;<span class="preprocessor">#define DAC_DACCTRL_FEXT (_U_(0x1) &lt;&lt; DAC_DACCTRL_FEXT_Pos)</span></div>
<div class="line"><a name="l00437"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#af3ba0076e55be71014f13602c7e9de14"> 437</a></span>&#160;<span class="preprocessor">#define DAC_DACCTRL_RUNSTDBY_Pos 6 </span></div>
<div class="line"><a name="l00438"></a><span class="lineno"> 438</span>&#160;<span class="preprocessor">#define DAC_DACCTRL_RUNSTDBY (_U_(0x1) &lt;&lt; DAC_DACCTRL_RUNSTDBY_Pos)</span></div>
<div class="line"><a name="l00439"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a8f75bd83f35ebe6cd292e79233343400"> 439</a></span>&#160;<span class="preprocessor">#define DAC_DACCTRL_DITHER_Pos 7 </span></div>
<div class="line"><a name="l00440"></a><span class="lineno"> 440</span>&#160;<span class="preprocessor">#define DAC_DACCTRL_DITHER (_U_(0x1) &lt;&lt; DAC_DACCTRL_DITHER_Pos)</span></div>
<div class="line"><a name="l00441"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a40153043ea62df2085c32f96ba056fca"> 441</a></span>&#160;<span class="preprocessor">#define DAC_DACCTRL_REFRESH_Pos 8 </span></div>
<div class="line"><a name="l00442"></a><span class="lineno"> 442</span>&#160;<span class="preprocessor">#define DAC_DACCTRL_REFRESH_Msk (_U_(0xF) &lt;&lt; DAC_DACCTRL_REFRESH_Pos)</span></div>
<div class="line"><a name="l00443"></a><span class="lineno"> 443</span>&#160;<span class="preprocessor">#define DAC_DACCTRL_REFRESH(value) (DAC_DACCTRL_REFRESH_Msk &amp; ((value) &lt;&lt; DAC_DACCTRL_REFRESH_Pos))</span></div>
<div class="line"><a name="l00444"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a3e30d4da7f6767e50a2bc4a0c959a222"> 444</a></span>&#160;<span class="preprocessor">#define DAC_DACCTRL_OSR_Pos 13 </span></div>
<div class="line"><a name="l00445"></a><span class="lineno"> 445</span>&#160;<span class="preprocessor">#define DAC_DACCTRL_OSR_Msk (_U_(0x7) &lt;&lt; DAC_DACCTRL_OSR_Pos)</span></div>
<div class="line"><a name="l00446"></a><span class="lineno"> 446</span>&#160;<span class="preprocessor">#define DAC_DACCTRL_OSR(value) (DAC_DACCTRL_OSR_Msk &amp; ((value) &lt;&lt; DAC_DACCTRL_OSR_Pos))</span></div>
<div class="line"><a name="l00447"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a3d9ce4bc003bffdea6fb98da402d2318"> 447</a></span>&#160;<span class="preprocessor">#define DAC_DACCTRL_MASK _U_(0xEFEF) </span></div>
<div class="line"><a name="l00449"></a><span class="lineno"> 449</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DAC_DATA : (DAC Offset: 0x10) ( /W 16) DAC n Data -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00450"></a><span class="lineno"> 450</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00451"></a><span class="lineno"><a class="line" href="unionDAC__DATA__Type.html"> 451</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00452"></a><span class="lineno"> 452</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00453"></a><span class="lineno"><a class="line" href="unionDAC__DATA__Type.html#a93328b2ca1a5a44a8324a7be3bd1c054"> 453</a></span>&#160; uint16_t <a class="code" href="unionDAC__DATA__Type.html#a93328b2ca1a5a44a8324a7be3bd1c054">DATA</a>:16; </div>
<div class="line"><a name="l00454"></a><span class="lineno"><a class="line" href="unionDAC__DATA__Type.html#a0d737bd793de15a5ffb5671c093e3a59"> 454</a></span>&#160; } bit; </div>
<div class="line"><a name="l00455"></a><span class="lineno"><a class="line" href="unionDAC__DATA__Type.html#a614ba06bb004daa2f3cb44126943c8d4"> 455</a></span>&#160; uint16_t <a class="code" href="unionDAC__DATA__Type.html#a614ba06bb004daa2f3cb44126943c8d4">reg</a>; </div>
<div class="line"><a name="l00456"></a><span class="lineno"> 456</span>&#160;} <a class="code" href="unionDAC__DATA__Type.html">DAC_DATA_Type</a>;</div>
<div class="line"><a name="l00457"></a><span class="lineno"> 457</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00458"></a><span class="lineno"> 458</span>&#160; </div>
<div class="line"><a name="l00459"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a927b65fb825b37f7f7b23d90604430be"> 459</a></span>&#160;<span class="preprocessor">#define DAC_DATA_OFFSET 0x10 </span></div>
<div class="line"><a name="l00460"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a18ce37ed9fbd7ceef65e3837f2ed73ec"> 460</a></span>&#160;<span class="preprocessor">#define DAC_DATA_RESETVALUE _U_(0x0000) </span></div>
<div class="line"><a name="l00462"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#abb4ad33edb03cfa83cacba4fbfcae055"> 462</a></span>&#160;<span class="preprocessor">#define DAC_DATA_DATA_Pos 0 </span></div>
<div class="line"><a name="l00463"></a><span class="lineno"> 463</span>&#160;<span class="preprocessor">#define DAC_DATA_DATA_Msk (_U_(0xFFFF) &lt;&lt; DAC_DATA_DATA_Pos)</span></div>
<div class="line"><a name="l00464"></a><span class="lineno"> 464</span>&#160;<span class="preprocessor">#define DAC_DATA_DATA(value) (DAC_DATA_DATA_Msk &amp; ((value) &lt;&lt; DAC_DATA_DATA_Pos))</span></div>
<div class="line"><a name="l00465"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a1bb2391625c1bf82261cfb3a23c32181"> 465</a></span>&#160;<span class="preprocessor">#define DAC_DATA_MASK _U_(0xFFFF) </span></div>
<div class="line"><a name="l00467"></a><span class="lineno"> 467</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DAC_DATABUF : (DAC Offset: 0x14) ( /W 16) DAC n Data Buffer -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00468"></a><span class="lineno"> 468</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00469"></a><span class="lineno"><a class="line" href="unionDAC__DATABUF__Type.html"> 469</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00470"></a><span class="lineno"> 470</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00471"></a><span class="lineno"><a class="line" href="unionDAC__DATABUF__Type.html#ab9a6cd5eb29792c27334c7a4f365313a"> 471</a></span>&#160; uint16_t <a class="code" href="unionDAC__DATABUF__Type.html#ab9a6cd5eb29792c27334c7a4f365313a">DATABUF</a>:16; </div>
<div class="line"><a name="l00472"></a><span class="lineno"><a class="line" href="unionDAC__DATABUF__Type.html#a9e25c2825890c965e8a3c7142e3e05fc"> 472</a></span>&#160; } bit; </div>
<div class="line"><a name="l00473"></a><span class="lineno"><a class="line" href="unionDAC__DATABUF__Type.html#afc4e0e261c760d07cd9343171083e0d4"> 473</a></span>&#160; uint16_t <a class="code" href="unionDAC__DATABUF__Type.html#afc4e0e261c760d07cd9343171083e0d4">reg</a>; </div>
<div class="line"><a name="l00474"></a><span class="lineno"> 474</span>&#160;} <a class="code" href="unionDAC__DATABUF__Type.html">DAC_DATABUF_Type</a>;</div>
<div class="line"><a name="l00475"></a><span class="lineno"> 475</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00476"></a><span class="lineno"> 476</span>&#160; </div>
<div class="line"><a name="l00477"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a925e76e2151662945396d1937062bdf7"> 477</a></span>&#160;<span class="preprocessor">#define DAC_DATABUF_OFFSET 0x14 </span></div>
<div class="line"><a name="l00478"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a3649ae1cf9dbb0179c3a00c0e210bc23"> 478</a></span>&#160;<span class="preprocessor">#define DAC_DATABUF_RESETVALUE _U_(0x0000) </span></div>
<div class="line"><a name="l00480"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a3fe3d9c9181741d88429ff03b62828e5"> 480</a></span>&#160;<span class="preprocessor">#define DAC_DATABUF_DATABUF_Pos 0 </span></div>
<div class="line"><a name="l00481"></a><span class="lineno"> 481</span>&#160;<span class="preprocessor">#define DAC_DATABUF_DATABUF_Msk (_U_(0xFFFF) &lt;&lt; DAC_DATABUF_DATABUF_Pos)</span></div>
<div class="line"><a name="l00482"></a><span class="lineno"> 482</span>&#160;<span class="preprocessor">#define DAC_DATABUF_DATABUF(value) (DAC_DATABUF_DATABUF_Msk &amp; ((value) &lt;&lt; DAC_DATABUF_DATABUF_Pos))</span></div>
<div class="line"><a name="l00483"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a09bc5edc17c5afd32066807527a78ba1"> 483</a></span>&#160;<span class="preprocessor">#define DAC_DATABUF_MASK _U_(0xFFFF) </span></div>
<div class="line"><a name="l00485"></a><span class="lineno"> 485</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DAC_DBGCTRL : (DAC Offset: 0x18) (R/W 8) Debug Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00486"></a><span class="lineno"> 486</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00487"></a><span class="lineno"><a class="line" href="unionDAC__DBGCTRL__Type.html"> 487</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00488"></a><span class="lineno"> 488</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00489"></a><span class="lineno"><a class="line" href="unionDAC__DBGCTRL__Type.html#a180d96a66ce719b3e36d53b0323d3e01"> 489</a></span>&#160; uint8_t <a class="code" href="unionDAC__DBGCTRL__Type.html#a180d96a66ce719b3e36d53b0323d3e01">DBGRUN</a>:1; </div>
<div class="line"><a name="l00490"></a><span class="lineno"><a class="line" href="unionDAC__DBGCTRL__Type.html#a7e5f8cb49c8eeb6da2d702f5a8af255b"> 490</a></span>&#160; uint8_t :7; </div>
<div class="line"><a name="l00491"></a><span class="lineno"><a class="line" href="unionDAC__DBGCTRL__Type.html#a243c8c016fe43a87328d12888ee523e1"> 491</a></span>&#160; } bit; </div>
<div class="line"><a name="l00492"></a><span class="lineno"><a class="line" href="unionDAC__DBGCTRL__Type.html#af296ee8c4d12c5f3cbab5a92752740cc"> 492</a></span>&#160; uint8_t <a class="code" href="unionDAC__DBGCTRL__Type.html#af296ee8c4d12c5f3cbab5a92752740cc">reg</a>; </div>
<div class="line"><a name="l00493"></a><span class="lineno"> 493</span>&#160;} <a class="code" href="unionDAC__DBGCTRL__Type.html">DAC_DBGCTRL_Type</a>;</div>
<div class="line"><a name="l00494"></a><span class="lineno"> 494</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00495"></a><span class="lineno"> 495</span>&#160; </div>
<div class="line"><a name="l00496"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#ad921df6ba2692bf586910433879cfc97"> 496</a></span>&#160;<span class="preprocessor">#define DAC_DBGCTRL_OFFSET 0x18 </span></div>
<div class="line"><a name="l00497"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#ab17f08ba0800da1162482ada6b8e2624"> 497</a></span>&#160;<span class="preprocessor">#define DAC_DBGCTRL_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00499"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a942d362f9041cbc6fd9b5d70c04b3eee"> 499</a></span>&#160;<span class="preprocessor">#define DAC_DBGCTRL_DBGRUN_Pos 0 </span></div>
<div class="line"><a name="l00500"></a><span class="lineno"> 500</span>&#160;<span class="preprocessor">#define DAC_DBGCTRL_DBGRUN (_U_(0x1) &lt;&lt; DAC_DBGCTRL_DBGRUN_Pos)</span></div>
<div class="line"><a name="l00501"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#af587f004b2e652bebe2c8d2443acf5bd"> 501</a></span>&#160;<span class="preprocessor">#define DAC_DBGCTRL_MASK _U_(0x01) </span></div>
<div class="line"><a name="l00503"></a><span class="lineno"> 503</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DAC_RESULT : (DAC Offset: 0x1C) (R/ 16) Filter Result -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00504"></a><span class="lineno"> 504</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00505"></a><span class="lineno"><a class="line" href="unionDAC__RESULT__Type.html"> 505</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00506"></a><span class="lineno"> 506</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00507"></a><span class="lineno"><a class="line" href="unionDAC__RESULT__Type.html#a267bb34f9bc82c661cbe71560f02ee3c"> 507</a></span>&#160; uint16_t <a class="code" href="unionDAC__RESULT__Type.html#a267bb34f9bc82c661cbe71560f02ee3c">RESULT</a>:16; </div>
<div class="line"><a name="l00508"></a><span class="lineno"><a class="line" href="unionDAC__RESULT__Type.html#a06d1091923c5338381b4bc27627aee4e"> 508</a></span>&#160; } bit; </div>
<div class="line"><a name="l00509"></a><span class="lineno"><a class="line" href="unionDAC__RESULT__Type.html#a34b00bf83d59bcfbe34d4f4177d88ca3"> 509</a></span>&#160; uint16_t <a class="code" href="unionDAC__RESULT__Type.html#a34b00bf83d59bcfbe34d4f4177d88ca3">reg</a>; </div>
<div class="line"><a name="l00510"></a><span class="lineno"> 510</span>&#160;} <a class="code" href="unionDAC__RESULT__Type.html">DAC_RESULT_Type</a>;</div>
<div class="line"><a name="l00511"></a><span class="lineno"> 511</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00512"></a><span class="lineno"> 512</span>&#160; </div>
<div class="line"><a name="l00513"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a5fa7bdf46fd439a061df15be496ce0d0"> 513</a></span>&#160;<span class="preprocessor">#define DAC_RESULT_OFFSET 0x1C </span></div>
<div class="line"><a name="l00514"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#affd951824551823018058bba3d9ab4ee"> 514</a></span>&#160;<span class="preprocessor">#define DAC_RESULT_RESETVALUE _U_(0x0000) </span></div>
<div class="line"><a name="l00516"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a8a398adb95ea7d38d15874b2d85a429a"> 516</a></span>&#160;<span class="preprocessor">#define DAC_RESULT_RESULT_Pos 0 </span></div>
<div class="line"><a name="l00517"></a><span class="lineno"> 517</span>&#160;<span class="preprocessor">#define DAC_RESULT_RESULT_Msk (_U_(0xFFFF) &lt;&lt; DAC_RESULT_RESULT_Pos)</span></div>
<div class="line"><a name="l00518"></a><span class="lineno"> 518</span>&#160;<span class="preprocessor">#define DAC_RESULT_RESULT(value) (DAC_RESULT_RESULT_Msk &amp; ((value) &lt;&lt; DAC_RESULT_RESULT_Pos))</span></div>
<div class="line"><a name="l00519"></a><span class="lineno"><a class="line" href="component_2dac_8h.html#a902484aa6dbe487bff73b0192974f08c"> 519</a></span>&#160;<span class="preprocessor">#define DAC_RESULT_MASK _U_(0xFFFF) </span></div>
<div class="line"><a name="l00522"></a><span class="lineno"> 522</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00523"></a><span class="lineno"><a class="line" href="structDac.html"> 523</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00524"></a><span class="lineno"><a class="line" href="structDac.html#ae64d3013c578889b3bc5bc9f0cfda66e"> 524</a></span>&#160; __IO <a class="code" href="unionDAC__CTRLA__Type.html">DAC_CTRLA_Type</a> <a class="code" href="structDac.html#ae64d3013c578889b3bc5bc9f0cfda66e">CTRLA</a>; </div>
<div class="line"><a name="l00525"></a><span class="lineno"><a class="line" href="structDac.html#a36fa8a7f785454c1af6d1bd41caa8e7a"> 525</a></span>&#160; __IO <a class="code" href="unionDAC__CTRLB__Type.html">DAC_CTRLB_Type</a> <a class="code" href="structDac.html#a36fa8a7f785454c1af6d1bd41caa8e7a">CTRLB</a>; </div>
<div class="line"><a name="l00526"></a><span class="lineno"><a class="line" href="structDac.html#ae32cabe063f42303d39b109034781a8c"> 526</a></span>&#160; __IO <a class="code" href="unionDAC__EVCTRL__Type.html">DAC_EVCTRL_Type</a> <a class="code" href="structDac.html#ae32cabe063f42303d39b109034781a8c">EVCTRL</a>; </div>
<div class="line"><a name="l00527"></a><span class="lineno"> 527</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved1[0x1];</div>
<div class="line"><a name="l00528"></a><span class="lineno"><a class="line" href="structDac.html#a02bfbb17949d48af6df846837a977723"> 528</a></span>&#160; __IO <a class="code" href="unionDAC__INTENCLR__Type.html">DAC_INTENCLR_Type</a> <a class="code" href="structDac.html#a02bfbb17949d48af6df846837a977723">INTENCLR</a>; </div>
<div class="line"><a name="l00529"></a><span class="lineno"><a class="line" href="structDac.html#a6a92c98c095897a17be5869798d408f5"> 529</a></span>&#160; __IO <a class="code" href="unionDAC__INTENSET__Type.html">DAC_INTENSET_Type</a> <a class="code" href="structDac.html#a6a92c98c095897a17be5869798d408f5">INTENSET</a>; </div>
<div class="line"><a name="l00530"></a><span class="lineno"><a class="line" href="structDac.html#aeafbfa143f0c3c637251a76946396ea9"> 530</a></span>&#160; __IO <a class="code" href="unionDAC__INTFLAG__Type.html">DAC_INTFLAG_Type</a> <a class="code" href="structDac.html#aeafbfa143f0c3c637251a76946396ea9">INTFLAG</a>; </div>
<div class="line"><a name="l00531"></a><span class="lineno"><a class="line" href="structDac.html#a0d0a06cbd41a340403915871fe2c2188"> 531</a></span>&#160; __I <a class="code" href="unionDAC__STATUS__Type.html">DAC_STATUS_Type</a> <a class="code" href="structDac.html#a0d0a06cbd41a340403915871fe2c2188">STATUS</a>; </div>
<div class="line"><a name="l00532"></a><span class="lineno"><a class="line" href="structDac.html#a313da4a56adf63066a0ba2e42248ae17"> 532</a></span>&#160; __I <a class="code" href="unionDAC__SYNCBUSY__Type.html">DAC_SYNCBUSY_Type</a> <a class="code" href="structDac.html#a313da4a56adf63066a0ba2e42248ae17">SYNCBUSY</a>; </div>
<div class="line"><a name="l00533"></a><span class="lineno"><a class="line" href="structDac.html#a4dd6fe47e9f0503ade8cef7d154c9490"> 533</a></span>&#160; __IO <a class="code" href="unionDAC__DACCTRL__Type.html">DAC_DACCTRL_Type</a> DACCTRL[2]; </div>
<div class="line"><a name="l00534"></a><span class="lineno"><a class="line" href="structDac.html#a35c02595c7c67921e41a0d6d78cfe39e"> 534</a></span>&#160; __O <a class="code" href="unionDAC__DATA__Type.html">DAC_DATA_Type</a> DATA[2]; </div>
<div class="line"><a name="l00535"></a><span class="lineno"><a class="line" href="structDac.html#a89b7cbc57ffaf876555e80d25a4b1d72"> 535</a></span>&#160; __O <a class="code" href="unionDAC__DATABUF__Type.html">DAC_DATABUF_Type</a> DATABUF[2]; </div>
<div class="line"><a name="l00536"></a><span class="lineno"><a class="line" href="structDac.html#a41d3f7de223368a4dd5d60ed5370947a"> 536</a></span>&#160; __IO <a class="code" href="unionDAC__DBGCTRL__Type.html">DAC_DBGCTRL_Type</a> <a class="code" href="structDac.html#a41d3f7de223368a4dd5d60ed5370947a">DBGCTRL</a>; </div>
<div class="line"><a name="l00537"></a><span class="lineno"> 537</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved2[0x3];</div>
<div class="line"><a name="l00538"></a><span class="lineno"><a class="line" href="structDac.html#ad8fa64e973fb5bcd3907233e39aac97f"> 538</a></span>&#160; __I <a class="code" href="unionDAC__RESULT__Type.html">DAC_RESULT_Type</a> RESULT[2]; </div>
<div class="line"><a name="l00539"></a><span class="lineno"> 539</span>&#160;} <a class="code" href="structDac.html">Dac</a>;</div>
<div class="line"><a name="l00540"></a><span class="lineno"> 540</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00541"></a><span class="lineno"> 541</span>&#160; </div>
<div class="line"><a name="l00544"></a><span class="lineno"> 544</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_DAC_COMPONENT_ */</span><span class="preprocessor"></span></div>
</div><!-- fragment --></div><!-- contents -->
<div class="ttc" id="aunionDAC__INTFLAG__Type_html_ad48f3d9a755f623aff55cabd79c4db53"><div class="ttname"><a href="unionDAC__INTFLAG__Type.html#ad48f3d9a755f623aff55cabd79c4db53">DAC_INTFLAG_Type::UNDERRUN0</a></div><div class="ttdeci">__I uint8_t UNDERRUN0</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00265">dac.h:265</a></div></div>
<div class="ttc" id="aunionDAC__SYNCBUSY__Type_html_ab903f92294b140db54635ae37de493e7"><div class="ttname"><a href="unionDAC__SYNCBUSY__Type.html#ab903f92294b140db54635ae37de493e7">DAC_SYNCBUSY_Type::ENABLE</a></div><div class="ttdeci">uint32_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00360">dac.h:360</a></div></div>
<div class="ttc" id="aunionDAC__DACCTRL__Type_html_acef7802aaf41154b469d4a206c8684c4"><div class="ttname"><a href="unionDAC__DACCTRL__Type.html#acef7802aaf41154b469d4a206c8684c4">DAC_DACCTRL_Type::OSR</a></div><div class="ttdeci">uint16_t OSR</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00413">dac.h:413</a></div></div>
<div class="ttc" id="aunionDAC__INTENCLR__Type_html_ae4062ffc6ff37aa54d35e713f5811a23"><div class="ttname"><a href="unionDAC__INTENCLR__Type.html#ae4062ffc6ff37aa54d35e713f5811a23">DAC_INTENCLR_Type::UNDERRUN0</a></div><div class="ttdeci">uint8_t UNDERRUN0</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00153">dac.h:153</a></div></div>
<div class="ttc" id="aunionDAC__DACCTRL__Type_html_afed61d7540b9523f6ce79c2c2a43cbf8"><div class="ttname"><a href="unionDAC__DACCTRL__Type.html#afed61d7540b9523f6ce79c2c2a43cbf8">DAC_DACCTRL_Type::ENABLE</a></div><div class="ttdeci">uint16_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00405">dac.h:405</a></div></div>
<div class="ttc" id="aunionDAC__INTENCLR__Type_html_a5edf827f18a5857bd9ffc064f47a4dd1"><div class="ttname"><a href="unionDAC__INTENCLR__Type.html#a5edf827f18a5857bd9ffc064f47a4dd1">DAC_INTENCLR_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00168">dac.h:168</a></div></div>
<div class="ttc" id="aunionDAC__INTENSET__Type_html_a1eb4798944a0e48348a7213e6636a008"><div class="ttname"><a href="unionDAC__INTENSET__Type.html#a1eb4798944a0e48348a7213e6636a008">DAC_INTENSET_Type::OVERRUN0</a></div><div class="ttdeci">uint8_t OVERRUN0</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00215">dac.h:215</a></div></div>
<div class="ttc" id="aunionDAC__DACCTRL__Type_html"><div class="ttname"><a href="unionDAC__DACCTRL__Type.html">DAC_DACCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00402">dac.h:402</a></div></div>
<div class="ttc" id="aunionDAC__INTFLAG__Type_html_a60e13d64d227231f79dff13a8ab8f7b6"><div class="ttname"><a href="unionDAC__INTFLAG__Type.html#a60e13d64d227231f79dff13a8ab8f7b6">DAC_INTFLAG_Type::UNDERRUN</a></div><div class="ttdeci">__I uint8_t UNDERRUN</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00275">dac.h:275</a></div></div>
<div class="ttc" id="aunionDAC__EVCTRL__Type_html_a43d27b9550af4563ce15b91901f0a91d"><div class="ttname"><a href="unionDAC__EVCTRL__Type.html#a43d27b9550af4563ce15b91901f0a91d">DAC_EVCTRL_Type::INVEI0</a></div><div class="ttdeci">uint8_t INVEI0</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00101">dac.h:101</a></div></div>
<div class="ttc" id="aunionDAC__STATUS__Type_html_a673f070d4127c2c7ae330f58d830a7b0"><div class="ttname"><a href="unionDAC__STATUS__Type.html#a673f070d4127c2c7ae330f58d830a7b0">DAC_STATUS_Type::EOC0</a></div><div class="ttdeci">uint8_t EOC0</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00323">dac.h:323</a></div></div>
<div class="ttc" id="astructDac_html_a0d0a06cbd41a340403915871fe2c2188"><div class="ttname"><a href="structDac.html#a0d0a06cbd41a340403915871fe2c2188">Dac::STATUS</a></div><div class="ttdeci">__I DAC_STATUS_Type STATUS</div><div class="ttdoc">Offset: 0x07 (R/ 8) Status.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00531">dac.h:531</a></div></div>
<div class="ttc" id="aunionDAC__CTRLA__Type_html"><div class="ttname"><a href="unionDAC__CTRLA__Type.html">DAC_CTRLA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00044">dac.h:44</a></div></div>
<div class="ttc" id="aunionDAC__INTENSET__Type_html_a8187b0cbb48a68d2fe1f1949f5e1bb21"><div class="ttname"><a href="unionDAC__INTENSET__Type.html#a8187b0cbb48a68d2fe1f1949f5e1bb21">DAC_INTENSET_Type::UNDERRUN1</a></div><div class="ttdeci">uint8_t UNDERRUN1</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00210">dac.h:210</a></div></div>
<div class="ttc" id="aunionDAC__INTENSET__Type_html_aa7b82a8c0fcf13b421395cb990c32fe5"><div class="ttname"><a href="unionDAC__INTENSET__Type.html#aa7b82a8c0fcf13b421395cb990c32fe5">DAC_INTENSET_Type::RESRDY0</a></div><div class="ttdeci">uint8_t RESRDY0</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00213">dac.h:213</a></div></div>
<div class="ttc" id="astructDac_html_a313da4a56adf63066a0ba2e42248ae17"><div class="ttname"><a href="structDac.html#a313da4a56adf63066a0ba2e42248ae17">Dac::SYNCBUSY</a></div><div class="ttdeci">__I DAC_SYNCBUSY_Type SYNCBUSY</div><div class="ttdoc">Offset: 0x08 (R/ 32) Synchronization Busy.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00532">dac.h:532</a></div></div>
<div class="ttc" id="aunionDAC__INTENCLR__Type_html_af96da0c477868c26b66597bfcaeb69a1"><div class="ttname"><a href="unionDAC__INTENCLR__Type.html#af96da0c477868c26b66597bfcaeb69a1">DAC_INTENCLR_Type::UNDERRUN</a></div><div class="ttdeci">uint8_t UNDERRUN</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00163">dac.h:163</a></div></div>
<div class="ttc" id="aunionDAC__DBGCTRL__Type_html"><div class="ttname"><a href="unionDAC__DBGCTRL__Type.html">DAC_DBGCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00487">dac.h:487</a></div></div>
<div class="ttc" id="aunionDAC__INTENCLR__Type_html_ac5327f90399d8aa1e8b6ef7f5b969a80"><div class="ttname"><a href="unionDAC__INTENCLR__Type.html#ac5327f90399d8aa1e8b6ef7f5b969a80">DAC_INTENCLR_Type::OVERRUN0</a></div><div class="ttdeci">uint8_t OVERRUN0</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00159">dac.h:159</a></div></div>
<div class="ttc" id="aunionDAC__STATUS__Type_html_a5c09f6dfcaf4e47031bc240036d96203"><div class="ttname"><a href="unionDAC__STATUS__Type.html#a5c09f6dfcaf4e47031bc240036d96203">DAC_STATUS_Type::READY0</a></div><div class="ttdeci">uint8_t READY0</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00321">dac.h:321</a></div></div>
<div class="ttc" id="aunionDAC__RESULT__Type_html"><div class="ttname"><a href="unionDAC__RESULT__Type.html">DAC_RESULT_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00505">dac.h:505</a></div></div>
<div class="ttc" id="aunionDAC__EVCTRL__Type_html_aa0972f50da74e8b3dc008e88bfa53d8e"><div class="ttname"><a href="unionDAC__EVCTRL__Type.html#aa0972f50da74e8b3dc008e88bfa53d8e">DAC_EVCTRL_Type::STARTEI1</a></div><div class="ttdeci">uint8_t STARTEI1</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00098">dac.h:98</a></div></div>
<div class="ttc" id="astructDac_html_a41d3f7de223368a4dd5d60ed5370947a"><div class="ttname"><a href="structDac.html#a41d3f7de223368a4dd5d60ed5370947a">Dac::DBGCTRL</a></div><div class="ttdeci">__IO DAC_DBGCTRL_Type DBGCTRL</div><div class="ttdoc">Offset: 0x18 (R/W 8) Debug Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00536">dac.h:536</a></div></div>
<div class="ttc" id="aunionDAC__EVCTRL__Type_html_a83c09c1ac963ec058130834921fd3316"><div class="ttname"><a href="unionDAC__EVCTRL__Type.html#a83c09c1ac963ec058130834921fd3316">DAC_EVCTRL_Type::EMPTYEO1</a></div><div class="ttdeci">uint8_t EMPTYEO1</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00100">dac.h:100</a></div></div>
<div class="ttc" id="aunionDAC__CTRLB__Type_html"><div class="ttname"><a href="unionDAC__CTRLB__Type.html">DAC_CTRLB_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00065">dac.h:65</a></div></div>
<div class="ttc" id="aunionDAC__SYNCBUSY__Type_html_a44ec94935648b60d93dad622dd1e2b08"><div class="ttname"><a href="unionDAC__SYNCBUSY__Type.html#a44ec94935648b60d93dad622dd1e2b08">DAC_SYNCBUSY_Type::DATA</a></div><div class="ttdeci">uint32_t DATA</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00369">dac.h:369</a></div></div>
<div class="ttc" id="aunionDAC__INTFLAG__Type_html_a48b4955ed9956d4ded5d6500419c8e25"><div class="ttname"><a href="unionDAC__INTFLAG__Type.html#a48b4955ed9956d4ded5d6500419c8e25">DAC_INTFLAG_Type::OVERRUN</a></div><div class="ttdeci">__I uint8_t OVERRUN</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00278">dac.h:278</a></div></div>
<div class="ttc" id="astructDac_html_ae32cabe063f42303d39b109034781a8c"><div class="ttname"><a href="structDac.html#ae32cabe063f42303d39b109034781a8c">Dac::EVCTRL</a></div><div class="ttdeci">__IO DAC_EVCTRL_Type EVCTRL</div><div class="ttdoc">Offset: 0x02 (R/W 8) Event Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00526">dac.h:526</a></div></div>
<div class="ttc" id="aunionDAC__CTRLB__Type_html_a6df27cf4278f30a13f448420f792eebd"><div class="ttname"><a href="unionDAC__CTRLB__Type.html#a6df27cf4278f30a13f448420f792eebd">DAC_CTRLB_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00071">dac.h:71</a></div></div>
<div class="ttc" id="aunionDAC__CTRLA__Type_html_a0f1f01ca12501f780f1536e526bc59a7"><div class="ttname"><a href="unionDAC__CTRLA__Type.html#a0f1f01ca12501f780f1536e526bc59a7">DAC_CTRLA_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00050">dac.h:50</a></div></div>
<div class="ttc" id="aunionDAC__INTENSET__Type_html_acae097cbaf64e6db4f9eb62ca8169f5e"><div class="ttname"><a href="unionDAC__INTENSET__Type.html#acae097cbaf64e6db4f9eb62ca8169f5e">DAC_INTENSET_Type::RESRDY</a></div><div class="ttdeci">uint8_t RESRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00221">dac.h:221</a></div></div>
<div class="ttc" id="aunionDAC__INTENSET__Type_html_ad1421288cf8c6cb079b146555fa63545"><div class="ttname"><a href="unionDAC__INTENSET__Type.html#ad1421288cf8c6cb079b146555fa63545">DAC_INTENSET_Type::UNDERRUN0</a></div><div class="ttdeci">uint8_t UNDERRUN0</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00209">dac.h:209</a></div></div>
<div class="ttc" id="aunionDAC__SYNCBUSY__Type_html_ae6bb4fead68d3643d265d46f31350a9a"><div class="ttname"><a href="unionDAC__SYNCBUSY__Type.html#ae6bb4fead68d3643d265d46f31350a9a">DAC_SYNCBUSY_Type::DATA0</a></div><div class="ttdeci">uint32_t DATA0</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00361">dac.h:361</a></div></div>
<div class="ttc" id="aunionDAC__DBGCTRL__Type_html_a180d96a66ce719b3e36d53b0323d3e01"><div class="ttname"><a href="unionDAC__DBGCTRL__Type.html#a180d96a66ce719b3e36d53b0323d3e01">DAC_DBGCTRL_Type::DBGRUN</a></div><div class="ttdeci">uint8_t DBGRUN</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00489">dac.h:489</a></div></div>
<div class="ttc" id="aunionDAC__INTENCLR__Type_html_a2bdfc2a521201543f0a1992001a0c6a4"><div class="ttname"><a href="unionDAC__INTENCLR__Type.html#a2bdfc2a521201543f0a1992001a0c6a4">DAC_INTENCLR_Type::RESRDY1</a></div><div class="ttdeci">uint8_t RESRDY1</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00158">dac.h:158</a></div></div>
<div class="ttc" id="aunionDAC__INTENSET__Type_html_a468aeaf616ad2919bf78a29cc00f01a6"><div class="ttname"><a href="unionDAC__INTENSET__Type.html#a468aeaf616ad2919bf78a29cc00f01a6">DAC_INTENSET_Type::UNDERRUN</a></div><div class="ttdeci">uint8_t UNDERRUN</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00219">dac.h:219</a></div></div>
<div class="ttc" id="aunionDAC__INTENCLR__Type_html_ad6dbb3ca7276b7e47252ab54ec320976"><div class="ttname"><a href="unionDAC__INTENCLR__Type.html#ad6dbb3ca7276b7e47252ab54ec320976">DAC_INTENCLR_Type::OVERRUN</a></div><div class="ttdeci">uint8_t OVERRUN</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00166">dac.h:166</a></div></div>
<div class="ttc" id="aunionDAC__EVCTRL__Type_html_a7b3cf1046563bd3ce1309a7b4bd311e1"><div class="ttname"><a href="unionDAC__EVCTRL__Type.html#a7b3cf1046563bd3ce1309a7b4bd311e1">DAC_EVCTRL_Type::RESRDYEO</a></div><div class="ttdeci">uint8_t RESRDYEO</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00110">dac.h:110</a></div></div>
<div class="ttc" id="aunionDAC__INTENSET__Type_html_a09a0b1c2bca29cff8d9a73e599f6db25"><div class="ttname"><a href="unionDAC__INTENSET__Type.html#a09a0b1c2bca29cff8d9a73e599f6db25">DAC_INTENSET_Type::OVERRUN</a></div><div class="ttdeci">uint8_t OVERRUN</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00222">dac.h:222</a></div></div>
<div class="ttc" id="aunionDAC__STATUS__Type_html_a6bf611d203f71c9b9fe6e5f7d4945e73"><div class="ttname"><a href="unionDAC__STATUS__Type.html#a6bf611d203f71c9b9fe6e5f7d4945e73">DAC_STATUS_Type::READY1</a></div><div class="ttdeci">uint8_t READY1</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00322">dac.h:322</a></div></div>
<div class="ttc" id="aunionDAC__INTFLAG__Type_html_a904d8ef0941bafcdbef918329321640d"><div class="ttname"><a href="unionDAC__INTFLAG__Type.html#a904d8ef0941bafcdbef918329321640d">DAC_INTFLAG_Type::EMPTY0</a></div><div class="ttdeci">__I uint8_t EMPTY0</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00267">dac.h:267</a></div></div>
<div class="ttc" id="astructDac_html"><div class="ttname"><a href="structDac.html">Dac</a></div><div class="ttdoc">DAC hardware registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00523">dac.h:523</a></div></div>
<div class="ttc" id="aunionDAC__INTENCLR__Type_html_a5590c2ffd3fccb8fa1a8450cc7c32510"><div class="ttname"><a href="unionDAC__INTENCLR__Type.html#a5590c2ffd3fccb8fa1a8450cc7c32510">DAC_INTENCLR_Type::EMPTY1</a></div><div class="ttdeci">uint8_t EMPTY1</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00156">dac.h:156</a></div></div>
<div class="ttc" id="aunionDAC__INTENSET__Type_html_ab24e1cc70c41950dbe716735fce363f0"><div class="ttname"><a href="unionDAC__INTENSET__Type.html#ab24e1cc70c41950dbe716735fce363f0">DAC_INTENSET_Type::RESRDY1</a></div><div class="ttdeci">uint8_t RESRDY1</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00214">dac.h:214</a></div></div>
<div class="ttc" id="aunionDAC__SYNCBUSY__Type_html_ae17006048f3241612d94258d3f1d339d"><div class="ttname"><a href="unionDAC__SYNCBUSY__Type.html#ae17006048f3241612d94258d3f1d339d">DAC_SYNCBUSY_Type::DATABUF1</a></div><div class="ttdeci">uint32_t DATABUF1</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00364">dac.h:364</a></div></div>
<div class="ttc" id="aunionDAC__RESULT__Type_html_a267bb34f9bc82c661cbe71560f02ee3c"><div class="ttname"><a href="unionDAC__RESULT__Type.html#a267bb34f9bc82c661cbe71560f02ee3c">DAC_RESULT_Type::RESULT</a></div><div class="ttdeci">uint16_t RESULT</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00507">dac.h:507</a></div></div>
<div class="ttc" id="aunionDAC__INTFLAG__Type_html_a6f38103ed48484b86a2b34e4a9662e32"><div class="ttname"><a href="unionDAC__INTFLAG__Type.html#a6f38103ed48484b86a2b34e4a9662e32">DAC_INTFLAG_Type::RESRDY1</a></div><div class="ttdeci">__I uint8_t RESRDY1</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00270">dac.h:270</a></div></div>
<div class="ttc" id="aunionDAC__DBGCTRL__Type_html_af296ee8c4d12c5f3cbab5a92752740cc"><div class="ttname"><a href="unionDAC__DBGCTRL__Type.html#af296ee8c4d12c5f3cbab5a92752740cc">DAC_DBGCTRL_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00492">dac.h:492</a></div></div>
<div class="ttc" id="aunionDAC__STATUS__Type_html_a3789a2c1436192872cddbb20daa4a93a"><div class="ttname"><a href="unionDAC__STATUS__Type.html#a3789a2c1436192872cddbb20daa4a93a">DAC_STATUS_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00332">dac.h:332</a></div></div>
<div class="ttc" id="aunionDAC__INTENCLR__Type_html_a49443490ac0803c0d5bd4d37ee38a20d"><div class="ttname"><a href="unionDAC__INTENCLR__Type.html#a49443490ac0803c0d5bd4d37ee38a20d">DAC_INTENCLR_Type::EMPTY0</a></div><div class="ttdeci">uint8_t EMPTY0</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00155">dac.h:155</a></div></div>
<div class="ttc" id="aunionDAC__EVCTRL__Type_html_a89211a83a66f08f696fc0f69ab14d30e"><div class="ttname"><a href="unionDAC__EVCTRL__Type.html#a89211a83a66f08f696fc0f69ab14d30e">DAC_EVCTRL_Type::EMPTYEO</a></div><div class="ttdeci">uint8_t EMPTYEO</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00108">dac.h:108</a></div></div>
<div class="ttc" id="aunionDAC__EVCTRL__Type_html_a6727440faefea4c89abdee1618726900"><div class="ttname"><a href="unionDAC__EVCTRL__Type.html#a6727440faefea4c89abdee1618726900">DAC_EVCTRL_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00112">dac.h:112</a></div></div>
<div class="ttc" id="aunionDAC__CTRLB__Type_html_a36ce1d05dce04bf5b9b02d18c326792a"><div class="ttname"><a href="unionDAC__CTRLB__Type.html#a36ce1d05dce04bf5b9b02d18c326792a">DAC_CTRLB_Type::DIFF</a></div><div class="ttdeci">uint8_t DIFF</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00067">dac.h:67</a></div></div>
<div class="ttc" id="aunionDAC__DACCTRL__Type_html_a7eda99b8d0fdfa055537dc960755780e"><div class="ttname"><a href="unionDAC__DACCTRL__Type.html#a7eda99b8d0fdfa055537dc960755780e">DAC_DACCTRL_Type::CCTRL</a></div><div class="ttdeci">uint16_t CCTRL</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00406">dac.h:406</a></div></div>
<div class="ttc" id="aunionDAC__INTENSET__Type_html_ace2282b99d87ab3f4434f9379aa47a45"><div class="ttname"><a href="unionDAC__INTENSET__Type.html#ace2282b99d87ab3f4434f9379aa47a45">DAC_INTENSET_Type::EMPTY</a></div><div class="ttdeci">uint8_t EMPTY</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00220">dac.h:220</a></div></div>
<div class="ttc" id="aunionDAC__CTRLA__Type_html_a22b2e72ef2e0397f663a058adbfbd835"><div class="ttname"><a href="unionDAC__CTRLA__Type.html#a22b2e72ef2e0397f663a058adbfbd835">DAC_CTRLA_Type::SWRST</a></div><div class="ttdeci">uint8_t SWRST</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00046">dac.h:46</a></div></div>
<div class="ttc" id="aunionDAC__INTENSET__Type_html_a2f195b47d61b46533479e4646f86e0c9"><div class="ttname"><a href="unionDAC__INTENSET__Type.html#a2f195b47d61b46533479e4646f86e0c9">DAC_INTENSET_Type::EMPTY1</a></div><div class="ttdeci">uint8_t EMPTY1</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00212">dac.h:212</a></div></div>
<div class="ttc" id="aunionDAC__INTFLAG__Type_html_a8a0758f5583bdc7e18988ef276273e1d"><div class="ttname"><a href="unionDAC__INTFLAG__Type.html#a8a0758f5583bdc7e18988ef276273e1d">DAC_INTFLAG_Type::RESRDY</a></div><div class="ttdeci">__I uint8_t RESRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00277">dac.h:277</a></div></div>
<div class="ttc" id="aunionDAC__EVCTRL__Type_html_a94fb42e5631ffec7e91f8b9117f5b8dc"><div class="ttname"><a href="unionDAC__EVCTRL__Type.html#a94fb42e5631ffec7e91f8b9117f5b8dc">DAC_EVCTRL_Type::INVEI1</a></div><div class="ttdeci">uint8_t INVEI1</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00102">dac.h:102</a></div></div>
<div class="ttc" id="aunionDAC__INTFLAG__Type_html_a8ae2012caf50a6cd17c0bbf4e0d731a4"><div class="ttname"><a href="unionDAC__INTFLAG__Type.html#a8ae2012caf50a6cd17c0bbf4e0d731a4">DAC_INTFLAG_Type::OVERRUN0</a></div><div class="ttdeci">__I uint8_t OVERRUN0</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00271">dac.h:271</a></div></div>
<div class="ttc" id="aunionDAC__INTENCLR__Type_html_aa2a492243b64e3bafc95c176bb46d865"><div class="ttname"><a href="unionDAC__INTENCLR__Type.html#aa2a492243b64e3bafc95c176bb46d865">DAC_INTENCLR_Type::RESRDY0</a></div><div class="ttdeci">uint8_t RESRDY0</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00157">dac.h:157</a></div></div>
<div class="ttc" id="aunionDAC__DACCTRL__Type_html_ae5c989cd1e1214e3a6d0574a3c73642e"><div class="ttname"><a href="unionDAC__DACCTRL__Type.html#ae5c989cd1e1214e3a6d0574a3c73642e">DAC_DACCTRL_Type::RUNSTDBY</a></div><div class="ttdeci">uint16_t RUNSTDBY</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00409">dac.h:409</a></div></div>
<div class="ttc" id="aunionDAC__INTENSET__Type_html_ada2192e243a4beb894e3bf211085f259"><div class="ttname"><a href="unionDAC__INTENSET__Type.html#ada2192e243a4beb894e3bf211085f259">DAC_INTENSET_Type::OVERRUN1</a></div><div class="ttdeci">uint8_t OVERRUN1</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00216">dac.h:216</a></div></div>
<div class="ttc" id="aunionDAC__INTENCLR__Type_html_a8839bfcc54df87418e83d0ff8912c9bc"><div class="ttname"><a href="unionDAC__INTENCLR__Type.html#a8839bfcc54df87418e83d0ff8912c9bc">DAC_INTENCLR_Type::OVERRUN1</a></div><div class="ttdeci">uint8_t OVERRUN1</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00160">dac.h:160</a></div></div>
<div class="ttc" id="aunionDAC__DATABUF__Type_html"><div class="ttname"><a href="unionDAC__DATABUF__Type.html">DAC_DATABUF_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00469">dac.h:469</a></div></div>
<div class="ttc" id="aunionDAC__INTFLAG__Type_html_a0ed0c3497b566c94354b9dab7af60031"><div class="ttname"><a href="unionDAC__INTFLAG__Type.html#a0ed0c3497b566c94354b9dab7af60031">DAC_INTFLAG_Type::EMPTY</a></div><div class="ttdeci">__I uint8_t EMPTY</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00276">dac.h:276</a></div></div>
<div class="ttc" id="aunionDAC__DACCTRL__Type_html_ad065c50db4f793eb52702331e932e24b"><div class="ttname"><a href="unionDAC__DACCTRL__Type.html#ad065c50db4f793eb52702331e932e24b">DAC_DACCTRL_Type::LEFTADJ</a></div><div class="ttdeci">uint16_t LEFTADJ</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00404">dac.h:404</a></div></div>
<div class="ttc" id="aunionDAC__EVCTRL__Type_html_a91b9c5aab763549738430949f63e2d34"><div class="ttname"><a href="unionDAC__EVCTRL__Type.html#a91b9c5aab763549738430949f63e2d34">DAC_EVCTRL_Type::RESRDYEO0</a></div><div class="ttdeci">uint8_t RESRDYEO0</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00103">dac.h:103</a></div></div>
<div class="ttc" id="aunionDAC__INTENSET__Type_html_a9fd921a600e0f4a7907432fc56a964a5"><div class="ttname"><a href="unionDAC__INTENSET__Type.html#a9fd921a600e0f4a7907432fc56a964a5">DAC_INTENSET_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00224">dac.h:224</a></div></div>
<div class="ttc" id="aunionDAC__DATA__Type_html"><div class="ttname"><a href="unionDAC__DATA__Type.html">DAC_DATA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00451">dac.h:451</a></div></div>
<div class="ttc" id="astructDac_html_a36fa8a7f785454c1af6d1bd41caa8e7a"><div class="ttname"><a href="structDac.html#a36fa8a7f785454c1af6d1bd41caa8e7a">Dac::CTRLB</a></div><div class="ttdeci">__IO DAC_CTRLB_Type CTRLB</div><div class="ttdoc">Offset: 0x01 (R/W 8) Control B.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00525">dac.h:525</a></div></div>
<div class="ttc" id="aunionDAC__SYNCBUSY__Type_html_a4531266e90241f1261eaf670fb35a143"><div class="ttname"><a href="unionDAC__SYNCBUSY__Type.html#a4531266e90241f1261eaf670fb35a143">DAC_SYNCBUSY_Type::DATABUF0</a></div><div class="ttdeci">uint32_t DATABUF0</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00363">dac.h:363</a></div></div>
<div class="ttc" id="aunionDAC__EVCTRL__Type_html_a30c4b5c9af415bf84512565f2cb9d5ae"><div class="ttname"><a href="unionDAC__EVCTRL__Type.html#a30c4b5c9af415bf84512565f2cb9d5ae">DAC_EVCTRL_Type::EMPTYEO0</a></div><div class="ttdeci">uint8_t EMPTYEO0</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00099">dac.h:99</a></div></div>
<div class="ttc" id="aunionDAC__SYNCBUSY__Type_html_af0b0c9e75058125af29030bc68c6b139"><div class="ttname"><a href="unionDAC__SYNCBUSY__Type.html#af0b0c9e75058125af29030bc68c6b139">DAC_SYNCBUSY_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00373">dac.h:373</a></div></div>
<div class="ttc" id="aunionDAC__INTENCLR__Type_html_a5c5d812fa0ca6ed7c50b8be1188216c2"><div class="ttname"><a href="unionDAC__INTENCLR__Type.html#a5c5d812fa0ca6ed7c50b8be1188216c2">DAC_INTENCLR_Type::UNDERRUN1</a></div><div class="ttdeci">uint8_t UNDERRUN1</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00154">dac.h:154</a></div></div>
<div class="ttc" id="aunionDAC__INTFLAG__Type_html"><div class="ttname"><a href="unionDAC__INTFLAG__Type.html">DAC_INTFLAG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00263">dac.h:263</a></div></div>
<div class="ttc" id="aunionDAC__INTENSET__Type_html_af878b7486fdb30f6b8a29c004dd57053"><div class="ttname"><a href="unionDAC__INTENSET__Type.html#af878b7486fdb30f6b8a29c004dd57053">DAC_INTENSET_Type::EMPTY0</a></div><div class="ttdeci">uint8_t EMPTY0</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00211">dac.h:211</a></div></div>
<div class="ttc" id="aunionDAC__SYNCBUSY__Type_html_a71801dfb81eab01206ff3f4d63d01e43"><div class="ttname"><a href="unionDAC__SYNCBUSY__Type.html#a71801dfb81eab01206ff3f4d63d01e43">DAC_SYNCBUSY_Type::SWRST</a></div><div class="ttdeci">uint32_t SWRST</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00359">dac.h:359</a></div></div>
<div class="ttc" id="astructDac_html_a02bfbb17949d48af6df846837a977723"><div class="ttname"><a href="structDac.html#a02bfbb17949d48af6df846837a977723">Dac::INTENCLR</a></div><div class="ttdeci">__IO DAC_INTENCLR_Type INTENCLR</div><div class="ttdoc">Offset: 0x04 (R/W 8) Interrupt Enable Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00528">dac.h:528</a></div></div>
<div class="ttc" id="aunionDAC__DACCTRL__Type_html_a311d0562a16d3427b77ecac5725bcbe0"><div class="ttname"><a href="unionDAC__DACCTRL__Type.html#a311d0562a16d3427b77ecac5725bcbe0">DAC_DACCTRL_Type::REFRESH</a></div><div class="ttdeci">uint16_t REFRESH</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00411">dac.h:411</a></div></div>
<div class="ttc" id="aunionDAC__STATUS__Type_html"><div class="ttname"><a href="unionDAC__STATUS__Type.html">DAC_STATUS_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00319">dac.h:319</a></div></div>
<div class="ttc" id="aunionDAC__INTFLAG__Type_html_a15b6a21e7290cdc42956ddef0835955a"><div class="ttname"><a href="unionDAC__INTFLAG__Type.html#a15b6a21e7290cdc42956ddef0835955a">DAC_INTFLAG_Type::OVERRUN1</a></div><div class="ttdeci">__I uint8_t OVERRUN1</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00272">dac.h:272</a></div></div>
<div class="ttc" id="aunionDAC__INTFLAG__Type_html_a473fbd8f3187ef3405d606a9f0c861fa"><div class="ttname"><a href="unionDAC__INTFLAG__Type.html#a473fbd8f3187ef3405d606a9f0c861fa">DAC_INTFLAG_Type::RESRDY0</a></div><div class="ttdeci">__I uint8_t RESRDY0</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00269">dac.h:269</a></div></div>
<div class="ttc" id="aunionDAC__INTENCLR__Type_html"><div class="ttname"><a href="unionDAC__INTENCLR__Type.html">DAC_INTENCLR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00151">dac.h:151</a></div></div>
<div class="ttc" id="aunionDAC__SYNCBUSY__Type_html"><div class="ttname"><a href="unionDAC__SYNCBUSY__Type.html">DAC_SYNCBUSY_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00357">dac.h:357</a></div></div>
<div class="ttc" id="astructDac_html_ae64d3013c578889b3bc5bc9f0cfda66e"><div class="ttname"><a href="structDac.html#ae64d3013c578889b3bc5bc9f0cfda66e">Dac::CTRLA</a></div><div class="ttdeci">__IO DAC_CTRLA_Type CTRLA</div><div class="ttdoc">Offset: 0x00 (R/W 8) Control A.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00524">dac.h:524</a></div></div>
<div class="ttc" id="aunionDAC__DATA__Type_html_a614ba06bb004daa2f3cb44126943c8d4"><div class="ttname"><a href="unionDAC__DATA__Type.html#a614ba06bb004daa2f3cb44126943c8d4">DAC_DATA_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00455">dac.h:455</a></div></div>
<div class="ttc" id="aunionDAC__DACCTRL__Type_html_a674598dd467f9ca2cdc971a8f4eff7c4"><div class="ttname"><a href="unionDAC__DACCTRL__Type.html#a674598dd467f9ca2cdc971a8f4eff7c4">DAC_DACCTRL_Type::DITHER</a></div><div class="ttdeci">uint16_t DITHER</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00410">dac.h:410</a></div></div>
<div class="ttc" id="aunionDAC__DATABUF__Type_html_ab9a6cd5eb29792c27334c7a4f365313a"><div class="ttname"><a href="unionDAC__DATABUF__Type.html#ab9a6cd5eb29792c27334c7a4f365313a">DAC_DATABUF_Type::DATABUF</a></div><div class="ttdeci">uint16_t DATABUF</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00471">dac.h:471</a></div></div>
<div class="ttc" id="aunionDAC__STATUS__Type_html_a021333f764025eda9e1dcb6b261473a3"><div class="ttname"><a href="unionDAC__STATUS__Type.html#a021333f764025eda9e1dcb6b261473a3">DAC_STATUS_Type::EOC1</a></div><div class="ttdeci">uint8_t EOC1</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00324">dac.h:324</a></div></div>
<div class="ttc" id="astructDac_html_aeafbfa143f0c3c637251a76946396ea9"><div class="ttname"><a href="structDac.html#aeafbfa143f0c3c637251a76946396ea9">Dac::INTFLAG</a></div><div class="ttdeci">__IO DAC_INTFLAG_Type INTFLAG</div><div class="ttdoc">Offset: 0x06 (R/W 8) Interrupt Flag Status and Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00530">dac.h:530</a></div></div>
<div class="ttc" id="aunionDAC__EVCTRL__Type_html_ad9c66533734aa108a0801b830f06d536"><div class="ttname"><a href="unionDAC__EVCTRL__Type.html#ad9c66533734aa108a0801b830f06d536">DAC_EVCTRL_Type::STARTEI0</a></div><div class="ttdeci">uint8_t STARTEI0</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00097">dac.h:97</a></div></div>
<div class="ttc" id="aunionDAC__EVCTRL__Type_html"><div class="ttname"><a href="unionDAC__EVCTRL__Type.html">DAC_EVCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00095">dac.h:95</a></div></div>
<div class="ttc" id="aunionDAC__EVCTRL__Type_html_a6175c572864f3edd0b35c821eea6564c"><div class="ttname"><a href="unionDAC__EVCTRL__Type.html#a6175c572864f3edd0b35c821eea6564c">DAC_EVCTRL_Type::RESRDYEO1</a></div><div class="ttdeci">uint8_t RESRDYEO1</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00104">dac.h:104</a></div></div>
<div class="ttc" id="asame54n19a_8h_html_a0d957f1433aaf5d70e4dc2b68288442d"><div class="ttname"><a href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a></div><div class="ttdeci">volatile const uint8_t RoReg8</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00053">same54n19a.h:53</a></div></div>
<div class="ttc" id="aunionDAC__SYNCBUSY__Type_html_af61638d4b754e75dcbde34088a2d2fa2"><div class="ttname"><a href="unionDAC__SYNCBUSY__Type.html#af61638d4b754e75dcbde34088a2d2fa2">DAC_SYNCBUSY_Type::DATA1</a></div><div class="ttdeci">uint32_t DATA1</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00362">dac.h:362</a></div></div>
<div class="ttc" id="aunionDAC__CTRLB__Type_html_a41a1648ba57151884dab41420448386e"><div class="ttname"><a href="unionDAC__CTRLB__Type.html#a41a1648ba57151884dab41420448386e">DAC_CTRLB_Type::REFSEL</a></div><div class="ttdeci">uint8_t REFSEL</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00068">dac.h:68</a></div></div>
<div class="ttc" id="aunionDAC__RESULT__Type_html_a34b00bf83d59bcfbe34d4f4177d88ca3"><div class="ttname"><a href="unionDAC__RESULT__Type.html#a34b00bf83d59bcfbe34d4f4177d88ca3">DAC_RESULT_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00509">dac.h:509</a></div></div>
<div class="ttc" id="aunionDAC__CTRLA__Type_html_ad05d4e8a7a5715904fba69a1ba984a99"><div class="ttname"><a href="unionDAC__CTRLA__Type.html#ad05d4e8a7a5715904fba69a1ba984a99">DAC_CTRLA_Type::ENABLE</a></div><div class="ttdeci">uint8_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00047">dac.h:47</a></div></div>
<div class="ttc" id="aunionDAC__INTFLAG__Type_html_acf0eb6614c1b35e4d6be3db9687d376d"><div class="ttname"><a href="unionDAC__INTFLAG__Type.html#acf0eb6614c1b35e4d6be3db9687d376d">DAC_INTFLAG_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00280">dac.h:280</a></div></div>
<div class="ttc" id="aunionDAC__INTENSET__Type_html"><div class="ttname"><a href="unionDAC__INTENSET__Type.html">DAC_INTENSET_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00207">dac.h:207</a></div></div>
<div class="ttc" id="aunionDAC__EVCTRL__Type_html_ae3e5ab1ba691562fad0d0598c5837a7f"><div class="ttname"><a href="unionDAC__EVCTRL__Type.html#ae3e5ab1ba691562fad0d0598c5837a7f">DAC_EVCTRL_Type::STARTEI</a></div><div class="ttdeci">uint8_t STARTEI</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00107">dac.h:107</a></div></div>
<div class="ttc" id="aunionDAC__STATUS__Type_html_a25a9909aa3172c3a9e500901e72cb3f7"><div class="ttname"><a href="unionDAC__STATUS__Type.html#a25a9909aa3172c3a9e500901e72cb3f7">DAC_STATUS_Type::EOC</a></div><div class="ttdeci">uint8_t EOC</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00329">dac.h:329</a></div></div>
<div class="ttc" id="aunionDAC__DATA__Type_html_a93328b2ca1a5a44a8324a7be3bd1c054"><div class="ttname"><a href="unionDAC__DATA__Type.html#a93328b2ca1a5a44a8324a7be3bd1c054">DAC_DATA_Type::DATA</a></div><div class="ttdeci">uint16_t DATA</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00453">dac.h:453</a></div></div>
<div class="ttc" id="aunionDAC__SYNCBUSY__Type_html_a740f7133f6a1fbd190b79daa6629887b"><div class="ttname"><a href="unionDAC__SYNCBUSY__Type.html#a740f7133f6a1fbd190b79daa6629887b">DAC_SYNCBUSY_Type::DATABUF</a></div><div class="ttdeci">uint32_t DATABUF</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00370">dac.h:370</a></div></div>
<div class="ttc" id="aunionDAC__INTENCLR__Type_html_ad6bfb96fe82e70d190532e0a5b391fd9"><div class="ttname"><a href="unionDAC__INTENCLR__Type.html#ad6bfb96fe82e70d190532e0a5b391fd9">DAC_INTENCLR_Type::RESRDY</a></div><div class="ttdeci">uint8_t RESRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00165">dac.h:165</a></div></div>
<div class="ttc" id="aunionDAC__DACCTRL__Type_html_a09f51b06c0b7ad014bc0e710237bcb6e"><div class="ttname"><a href="unionDAC__DACCTRL__Type.html#a09f51b06c0b7ad014bc0e710237bcb6e">DAC_DACCTRL_Type::FEXT</a></div><div class="ttdeci">uint16_t FEXT</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00408">dac.h:408</a></div></div>
<div class="ttc" id="aunionDAC__INTFLAG__Type_html_a9fdf9dffaecb13056a031437169d1df1"><div class="ttname"><a href="unionDAC__INTFLAG__Type.html#a9fdf9dffaecb13056a031437169d1df1">DAC_INTFLAG_Type::EMPTY1</a></div><div class="ttdeci">__I uint8_t EMPTY1</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00268">dac.h:268</a></div></div>
<div class="ttc" id="aunionDAC__INTFLAG__Type_html_a41588479dc5baf24935a3f0c21abef81"><div class="ttname"><a href="unionDAC__INTFLAG__Type.html#a41588479dc5baf24935a3f0c21abef81">DAC_INTFLAG_Type::UNDERRUN1</a></div><div class="ttdeci">__I uint8_t UNDERRUN1</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00266">dac.h:266</a></div></div>
<div class="ttc" id="aunionDAC__INTENCLR__Type_html_a7a765df1f712cf0db56c0451767483cb"><div class="ttname"><a href="unionDAC__INTENCLR__Type.html#a7a765df1f712cf0db56c0451767483cb">DAC_INTENCLR_Type::EMPTY</a></div><div class="ttdeci">uint8_t EMPTY</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00164">dac.h:164</a></div></div>
<div class="ttc" id="aunionDAC__DACCTRL__Type_html_a7fcb49127690e2bfdc5aa622f4fe12a3"><div class="ttname"><a href="unionDAC__DACCTRL__Type.html#a7fcb49127690e2bfdc5aa622f4fe12a3">DAC_DACCTRL_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00415">dac.h:415</a></div></div>
<div class="ttc" id="astructDac_html_a6a92c98c095897a17be5869798d408f5"><div class="ttname"><a href="structDac.html#a6a92c98c095897a17be5869798d408f5">Dac::INTENSET</a></div><div class="ttdeci">__IO DAC_INTENSET_Type INTENSET</div><div class="ttdoc">Offset: 0x05 (R/W 8) Interrupt Enable Set.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00529">dac.h:529</a></div></div>
<div class="ttc" id="aunionDAC__STATUS__Type_html_ada6b3d84893475e85322f4c41a2c3386"><div class="ttname"><a href="unionDAC__STATUS__Type.html#ada6b3d84893475e85322f4c41a2c3386">DAC_STATUS_Type::READY</a></div><div class="ttdeci">uint8_t READY</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00328">dac.h:328</a></div></div>
<div class="ttc" id="aunionDAC__DATABUF__Type_html_afc4e0e261c760d07cd9343171083e0d4"><div class="ttname"><a href="unionDAC__DATABUF__Type.html#afc4e0e261c760d07cd9343171083e0d4">DAC_DATABUF_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00473">dac.h:473</a></div></div>
<div class="ttc" id="aunionDAC__EVCTRL__Type_html_a1d8c9af6bd653312ebed482e78b13eba"><div class="ttname"><a href="unionDAC__EVCTRL__Type.html#a1d8c9af6bd653312ebed482e78b13eba">DAC_EVCTRL_Type::INVEI</a></div><div class="ttdeci">uint8_t INVEI</div><div class="ttdef"><b>Definition:</b> <a href="component_2dac_8h_source.html#l00109">dac.h:109</a></div></div>
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<a href="#nested-classes">Data Structures</a> &#124;
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<p>Component description for DSU.
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Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionDSU__CTRL__Type.html">DSU_CTRL_Type</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionDSU__PID5__Type.html">DSU_PID5_Type</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionDSU__PID6__Type.html">DSU_PID6_Type</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionDSU__PID7__Type.html">DSU_PID7_Type</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionDSU__PID0__Type.html">DSU_PID0_Type</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionDSU__PID3__Type.html">DSU_PID3_Type</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionDSU__CID0__Type.html">DSU_CID0_Type</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionDSU__CID1__Type.html">DSU_CID1_Type</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionDSU__CID2__Type.html">DSU_CID2_Type</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionDSU__CID3__Type.html">DSU_CID3_Type</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structDsu.html">Dsu</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">DSU hardware registers. <a href="structDsu.html#details">More...</a><br /></td></tr>
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Macros</h2></td></tr>
<tr class="memitem:a5e59b005a1b4be773b6d4452d4892d19"><td class="memItemLeft" align="right" valign="top"><a id="a5e59b005a1b4be773b6d4452d4892d19"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_U2410</b></td></tr>
<tr class="separator:a5e59b005a1b4be773b6d4452d4892d19"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af465c179d3af87802176de84057eaf96"><td class="memItemLeft" align="right" valign="top"><a id="af465c179d3af87802176de84057eaf96"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>REV_DSU</b>&#160;&#160;&#160;0x100</td></tr>
<tr class="separator:af465c179d3af87802176de84057eaf96"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a16d35bf197958eb309724f1d0fd8e842"><td class="memItemLeft" align="right" valign="top"><a id="a16d35bf197958eb309724f1d0fd8e842"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a16d35bf197958eb309724f1d0fd8e842">DSU_CTRL_OFFSET</a>&#160;&#160;&#160;0x0000</td></tr>
<tr class="memdesc:a16d35bf197958eb309724f1d0fd8e842"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CTRL offset) Control <br /></td></tr>
<tr class="separator:a16d35bf197958eb309724f1d0fd8e842"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2d27ac9a8ec8798ed407281b387c2fd0"><td class="memItemLeft" align="right" valign="top"><a id="a2d27ac9a8ec8798ed407281b387c2fd0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a2d27ac9a8ec8798ed407281b387c2fd0">DSU_CTRL_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a2d27ac9a8ec8798ed407281b387c2fd0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CTRL reset_value) Control <br /></td></tr>
<tr class="separator:a2d27ac9a8ec8798ed407281b387c2fd0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2d08bbc3f34f53bc95415ac1c3d2ae72"><td class="memItemLeft" align="right" valign="top"><a id="a2d08bbc3f34f53bc95415ac1c3d2ae72"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a2d08bbc3f34f53bc95415ac1c3d2ae72">DSU_CTRL_SWRST_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a2d08bbc3f34f53bc95415ac1c3d2ae72"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CTRL) Software Reset <br /></td></tr>
<tr class="separator:a2d08bbc3f34f53bc95415ac1c3d2ae72"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a271a775cfa8f562f64ab3a6f0e328a51"><td class="memItemLeft" align="right" valign="top"><a id="a271a775cfa8f562f64ab3a6f0e328a51"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_CTRL_SWRST</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a2d08bbc3f34f53bc95415ac1c3d2ae72">DSU_CTRL_SWRST_Pos</a>)</td></tr>
<tr class="separator:a271a775cfa8f562f64ab3a6f0e328a51"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3f42a18f629eccf5698c46d591b827bc"><td class="memItemLeft" align="right" valign="top"><a id="a3f42a18f629eccf5698c46d591b827bc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a3f42a18f629eccf5698c46d591b827bc">DSU_CTRL_CRC_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:a3f42a18f629eccf5698c46d591b827bc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CTRL) 32-bit Cyclic Redundancy Code <br /></td></tr>
<tr class="separator:a3f42a18f629eccf5698c46d591b827bc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa949503f8848f8d688497ed13a2e29b1"><td class="memItemLeft" align="right" valign="top"><a id="aa949503f8848f8d688497ed13a2e29b1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_CTRL_CRC</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a3f42a18f629eccf5698c46d591b827bc">DSU_CTRL_CRC_Pos</a>)</td></tr>
<tr class="separator:aa949503f8848f8d688497ed13a2e29b1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae2f8bb8c8fde9739e8e15e76b5a052fc"><td class="memItemLeft" align="right" valign="top"><a id="ae2f8bb8c8fde9739e8e15e76b5a052fc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#ae2f8bb8c8fde9739e8e15e76b5a052fc">DSU_CTRL_MBIST_Pos</a>&#160;&#160;&#160;3</td></tr>
<tr class="memdesc:ae2f8bb8c8fde9739e8e15e76b5a052fc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CTRL) Memory built-in self-test <br /></td></tr>
<tr class="separator:ae2f8bb8c8fde9739e8e15e76b5a052fc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a29a4889c6f02e7f58d390da5cb809eab"><td class="memItemLeft" align="right" valign="top"><a id="a29a4889c6f02e7f58d390da5cb809eab"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_CTRL_MBIST</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dsu_8h.html#ae2f8bb8c8fde9739e8e15e76b5a052fc">DSU_CTRL_MBIST_Pos</a>)</td></tr>
<tr class="separator:a29a4889c6f02e7f58d390da5cb809eab"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aef5ca1fd2f78e579bae1661fb54ccae7"><td class="memItemLeft" align="right" valign="top"><a id="aef5ca1fd2f78e579bae1661fb54ccae7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#aef5ca1fd2f78e579bae1661fb54ccae7">DSU_CTRL_CE_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:aef5ca1fd2f78e579bae1661fb54ccae7"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CTRL) Chip-Erase <br /></td></tr>
<tr class="separator:aef5ca1fd2f78e579bae1661fb54ccae7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5e11b643b12c8d48be1e324bc42008b6"><td class="memItemLeft" align="right" valign="top"><a id="a5e11b643b12c8d48be1e324bc42008b6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_CTRL_CE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dsu_8h.html#aef5ca1fd2f78e579bae1661fb54ccae7">DSU_CTRL_CE_Pos</a>)</td></tr>
<tr class="separator:a5e11b643b12c8d48be1e324bc42008b6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a73ceacd04bd9669ed1853da944fa0c4a"><td class="memItemLeft" align="right" valign="top"><a id="a73ceacd04bd9669ed1853da944fa0c4a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a73ceacd04bd9669ed1853da944fa0c4a">DSU_CTRL_ARR_Pos</a>&#160;&#160;&#160;6</td></tr>
<tr class="memdesc:a73ceacd04bd9669ed1853da944fa0c4a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CTRL) Auxiliary Row Read <br /></td></tr>
<tr class="separator:a73ceacd04bd9669ed1853da944fa0c4a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5f2577836c76675ccc10c18819e11f39"><td class="memItemLeft" align="right" valign="top"><a id="a5f2577836c76675ccc10c18819e11f39"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_CTRL_ARR</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a73ceacd04bd9669ed1853da944fa0c4a">DSU_CTRL_ARR_Pos</a>)</td></tr>
<tr class="separator:a5f2577836c76675ccc10c18819e11f39"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae5bcaa4f2c2619c8cedb1672a23bb902"><td class="memItemLeft" align="right" valign="top"><a id="ae5bcaa4f2c2619c8cedb1672a23bb902"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#ae5bcaa4f2c2619c8cedb1672a23bb902">DSU_CTRL_SMSA_Pos</a>&#160;&#160;&#160;7</td></tr>
<tr class="memdesc:ae5bcaa4f2c2619c8cedb1672a23bb902"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CTRL) Start Memory Stream Access <br /></td></tr>
<tr class="separator:ae5bcaa4f2c2619c8cedb1672a23bb902"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a83eade410db4dba9e0ae9930b67e1d4c"><td class="memItemLeft" align="right" valign="top"><a id="a83eade410db4dba9e0ae9930b67e1d4c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_CTRL_SMSA</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dsu_8h.html#ae5bcaa4f2c2619c8cedb1672a23bb902">DSU_CTRL_SMSA_Pos</a>)</td></tr>
<tr class="separator:a83eade410db4dba9e0ae9930b67e1d4c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad7cc167d8a8791942e3149bd93278134"><td class="memItemLeft" align="right" valign="top"><a id="ad7cc167d8a8791942e3149bd93278134"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#ad7cc167d8a8791942e3149bd93278134">DSU_CTRL_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xDD)</td></tr>
<tr class="memdesc:ad7cc167d8a8791942e3149bd93278134"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CTRL) MASK Register <br /></td></tr>
<tr class="separator:ad7cc167d8a8791942e3149bd93278134"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5bbcb19f47173c3bdee8ce58b612eac0"><td class="memItemLeft" align="right" valign="top"><a id="a5bbcb19f47173c3bdee8ce58b612eac0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a5bbcb19f47173c3bdee8ce58b612eac0">DSU_STATUSA_OFFSET</a>&#160;&#160;&#160;0x0001</td></tr>
<tr class="memdesc:a5bbcb19f47173c3bdee8ce58b612eac0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_STATUSA offset) Status A <br /></td></tr>
<tr class="separator:a5bbcb19f47173c3bdee8ce58b612eac0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a39ce3f6cadacf2ea11a0e8ab5d6bcd4b"><td class="memItemLeft" align="right" valign="top"><a id="a39ce3f6cadacf2ea11a0e8ab5d6bcd4b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a39ce3f6cadacf2ea11a0e8ab5d6bcd4b">DSU_STATUSA_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a39ce3f6cadacf2ea11a0e8ab5d6bcd4b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_STATUSA reset_value) Status A <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a608007c6aa3ae0221483e370d9ca999b">DSU_STATUSA_DONE_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a608007c6aa3ae0221483e370d9ca999b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_STATUSA) Done <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_STATUSA_DONE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a608007c6aa3ae0221483e370d9ca999b">DSU_STATUSA_DONE_Pos</a>)</td></tr>
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<tr class="memitem:ab5c6d644e1ec7f67cf2a9ad97a5262a2"><td class="memItemLeft" align="right" valign="top"><a id="ab5c6d644e1ec7f67cf2a9ad97a5262a2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#ab5c6d644e1ec7f67cf2a9ad97a5262a2">DSU_STATUSA_CRSTEXT_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:ab5c6d644e1ec7f67cf2a9ad97a5262a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_STATUSA) CPU Reset Phase Extension <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_STATUSA_CRSTEXT</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dsu_8h.html#ab5c6d644e1ec7f67cf2a9ad97a5262a2">DSU_STATUSA_CRSTEXT_Pos</a>)</td></tr>
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<tr class="memitem:afa02b78e838184c6f5a895f0f16c213a"><td class="memItemLeft" align="right" valign="top"><a id="afa02b78e838184c6f5a895f0f16c213a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#afa02b78e838184c6f5a895f0f16c213a">DSU_STATUSA_BERR_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:afa02b78e838184c6f5a895f0f16c213a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_STATUSA) Bus Error <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_STATUSA_BERR</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dsu_8h.html#afa02b78e838184c6f5a895f0f16c213a">DSU_STATUSA_BERR_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a379cd81ca596d64fff4cdf4cd0642e9d">DSU_STATUSA_FAIL_Pos</a>&#160;&#160;&#160;3</td></tr>
<tr class="memdesc:a379cd81ca596d64fff4cdf4cd0642e9d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_STATUSA) Failure <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_STATUSA_FAIL</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a379cd81ca596d64fff4cdf4cd0642e9d">DSU_STATUSA_FAIL_Pos</a>)</td></tr>
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<tr class="memitem:a2d5f7f64db290d822709d358b9d8baf6"><td class="memItemLeft" align="right" valign="top"><a id="a2d5f7f64db290d822709d358b9d8baf6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a2d5f7f64db290d822709d358b9d8baf6">DSU_STATUSA_PERR_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:a2d5f7f64db290d822709d358b9d8baf6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_STATUSA) Protection Error <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_STATUSA_PERR</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a2d5f7f64db290d822709d358b9d8baf6">DSU_STATUSA_PERR_Pos</a>)</td></tr>
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<tr class="memitem:a054a84324fddaaecb1b58f35c2314bc7"><td class="memItemLeft" align="right" valign="top"><a id="a054a84324fddaaecb1b58f35c2314bc7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a054a84324fddaaecb1b58f35c2314bc7">DSU_STATUSA_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1F)</td></tr>
<tr class="memdesc:a054a84324fddaaecb1b58f35c2314bc7"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_STATUSA) MASK Register <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a6633a1098b38470e1cefd46795f0cf93">DSU_STATUSB_OFFSET</a>&#160;&#160;&#160;0x0002</td></tr>
<tr class="memdesc:a6633a1098b38470e1cefd46795f0cf93"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_STATUSB offset) Status B <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#aef2faaac59541260b63b58569da04dee">DSU_STATUSB_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:aef2faaac59541260b63b58569da04dee"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_STATUSB reset_value) Status B <br /></td></tr>
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<tr class="memitem:acd0a6b404b8ba52afe784b653e1b4ee7"><td class="memItemLeft" align="right" valign="top"><a id="acd0a6b404b8ba52afe784b653e1b4ee7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#acd0a6b404b8ba52afe784b653e1b4ee7">DSU_STATUSB_PROT_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:acd0a6b404b8ba52afe784b653e1b4ee7"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_STATUSB) Protected <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_STATUSB_PROT</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dsu_8h.html#acd0a6b404b8ba52afe784b653e1b4ee7">DSU_STATUSB_PROT_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a36bd47009661963b8c71c9dc4cb62ecb">DSU_STATUSB_DBGPRES_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:a36bd47009661963b8c71c9dc4cb62ecb"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_STATUSB) Debugger Present <br /></td></tr>
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<tr class="memitem:a9eae843ddddb99bef3d7358ccb5e8dc9"><td class="memItemLeft" align="right" valign="top"><a id="a9eae843ddddb99bef3d7358ccb5e8dc9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_STATUSB_DBGPRES</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a36bd47009661963b8c71c9dc4cb62ecb">DSU_STATUSB_DBGPRES_Pos</a>)</td></tr>
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<tr class="memitem:adc27fc361eacd9fdd30cad6459bdc7c4"><td class="memItemLeft" align="right" valign="top"><a id="adc27fc361eacd9fdd30cad6459bdc7c4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#adc27fc361eacd9fdd30cad6459bdc7c4">DSU_STATUSB_DCCD0_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:adc27fc361eacd9fdd30cad6459bdc7c4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_STATUSB) Debug Communication Channel 0 Dirty <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_STATUSB_DCCD0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dsu_8h.html#adc27fc361eacd9fdd30cad6459bdc7c4">DSU_STATUSB_DCCD0_Pos</a>)</td></tr>
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<tr class="memitem:a43c23fdfaa496f809db2e9b7d0bea8a9"><td class="memItemLeft" align="right" valign="top"><a id="a43c23fdfaa496f809db2e9b7d0bea8a9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a43c23fdfaa496f809db2e9b7d0bea8a9">DSU_STATUSB_DCCD1_Pos</a>&#160;&#160;&#160;3</td></tr>
<tr class="memdesc:a43c23fdfaa496f809db2e9b7d0bea8a9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_STATUSB) Debug Communication Channel 1 Dirty <br /></td></tr>
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<tr class="memitem:ad229e036a6ca3ec924ca37250b6ea81c"><td class="memItemLeft" align="right" valign="top"><a id="ad229e036a6ca3ec924ca37250b6ea81c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_STATUSB_DCCD1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a43c23fdfaa496f809db2e9b7d0bea8a9">DSU_STATUSB_DCCD1_Pos</a>)</td></tr>
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<tr class="memitem:a93a180646ddd3ecc99793ef1b5bde5aa"><td class="memItemLeft" align="right" valign="top"><a id="a93a180646ddd3ecc99793ef1b5bde5aa"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a93a180646ddd3ecc99793ef1b5bde5aa">DSU_STATUSB_DCCD_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:a93a180646ddd3ecc99793ef1b5bde5aa"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_STATUSB) Debug Communication Channel x Dirty <br /></td></tr>
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<tr class="memitem:a044e55aae67a53e47ac714df1cfda6da"><td class="memItemLeft" align="right" valign="top"><a id="a044e55aae67a53e47ac714df1cfda6da"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_STATUSB_DCCD_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a93a180646ddd3ecc99793ef1b5bde5aa">DSU_STATUSB_DCCD_Pos</a>)</td></tr>
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<tr class="memitem:aef2128822b4dc82be7e1c4971676c6ad"><td class="memItemLeft" align="right" valign="top"><a id="aef2128822b4dc82be7e1c4971676c6ad"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_STATUSB_DCCD</b>(value)&#160;&#160;&#160;(DSU_STATUSB_DCCD_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a93a180646ddd3ecc99793ef1b5bde5aa">DSU_STATUSB_DCCD_Pos</a>))</td></tr>
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<tr class="memitem:a99433528b614cd9294b33c828a1a5003"><td class="memItemLeft" align="right" valign="top"><a id="a99433528b614cd9294b33c828a1a5003"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a99433528b614cd9294b33c828a1a5003">DSU_STATUSB_HPE_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:a99433528b614cd9294b33c828a1a5003"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_STATUSB) Hot-Plugging Enable <br /></td></tr>
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<tr class="memitem:ab622c042fd6dd7d2d8b619ab875d2cda"><td class="memItemLeft" align="right" valign="top"><a id="ab622c042fd6dd7d2d8b619ab875d2cda"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_STATUSB_HPE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a99433528b614cd9294b33c828a1a5003">DSU_STATUSB_HPE_Pos</a>)</td></tr>
<tr class="separator:ab622c042fd6dd7d2d8b619ab875d2cda"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa99f386d6e5e61367d5e06aaab7ccb54"><td class="memItemLeft" align="right" valign="top"><a id="aa99f386d6e5e61367d5e06aaab7ccb54"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#aa99f386d6e5e61367d5e06aaab7ccb54">DSU_STATUSB_CELCK_Pos</a>&#160;&#160;&#160;5</td></tr>
<tr class="memdesc:aa99f386d6e5e61367d5e06aaab7ccb54"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_STATUSB) Chip Erase Locked <br /></td></tr>
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<tr class="memitem:a7fc255995d133cdb50088b885671f521"><td class="memItemLeft" align="right" valign="top"><a id="a7fc255995d133cdb50088b885671f521"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_STATUSB_CELCK</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dsu_8h.html#aa99f386d6e5e61367d5e06aaab7ccb54">DSU_STATUSB_CELCK_Pos</a>)</td></tr>
<tr class="separator:a7fc255995d133cdb50088b885671f521"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a81d42e65d6d856087a32f89cd8ebcc23"><td class="memItemLeft" align="right" valign="top"><a id="a81d42e65d6d856087a32f89cd8ebcc23"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a81d42e65d6d856087a32f89cd8ebcc23">DSU_STATUSB_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3F)</td></tr>
<tr class="memdesc:a81d42e65d6d856087a32f89cd8ebcc23"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_STATUSB) MASK Register <br /></td></tr>
<tr class="separator:a81d42e65d6d856087a32f89cd8ebcc23"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abf4bde31f974267a5be16e838fb4c385"><td class="memItemLeft" align="right" valign="top"><a id="abf4bde31f974267a5be16e838fb4c385"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#abf4bde31f974267a5be16e838fb4c385">DSU_ADDR_OFFSET</a>&#160;&#160;&#160;0x0004</td></tr>
<tr class="memdesc:abf4bde31f974267a5be16e838fb4c385"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_ADDR offset) Address <br /></td></tr>
<tr class="separator:abf4bde31f974267a5be16e838fb4c385"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a20348917b1dead19b4cf118c7470c2e4"><td class="memItemLeft" align="right" valign="top"><a id="a20348917b1dead19b4cf118c7470c2e4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a20348917b1dead19b4cf118c7470c2e4">DSU_ADDR_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a20348917b1dead19b4cf118c7470c2e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_ADDR reset_value) Address <br /></td></tr>
<tr class="separator:a20348917b1dead19b4cf118c7470c2e4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad4121595b48dfe29aaec9b674634bc57"><td class="memItemLeft" align="right" valign="top"><a id="ad4121595b48dfe29aaec9b674634bc57"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#ad4121595b48dfe29aaec9b674634bc57">DSU_ADDR_AMOD_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ad4121595b48dfe29aaec9b674634bc57"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_ADDR) Access Mode <br /></td></tr>
<tr class="separator:ad4121595b48dfe29aaec9b674634bc57"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a977bea859b9813e830d1993d5cd0ff86"><td class="memItemLeft" align="right" valign="top"><a id="a977bea859b9813e830d1993d5cd0ff86"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_ADDR_AMOD_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dsu_8h.html#ad4121595b48dfe29aaec9b674634bc57">DSU_ADDR_AMOD_Pos</a>)</td></tr>
<tr class="separator:a977bea859b9813e830d1993d5cd0ff86"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac53e3c3b1ad8d530a190d066ae1396e3"><td class="memItemLeft" align="right" valign="top"><a id="ac53e3c3b1ad8d530a190d066ae1396e3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_ADDR_AMOD</b>(value)&#160;&#160;&#160;(DSU_ADDR_AMOD_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#ad4121595b48dfe29aaec9b674634bc57">DSU_ADDR_AMOD_Pos</a>))</td></tr>
<tr class="separator:ac53e3c3b1ad8d530a190d066ae1396e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a028619d29a30f3abc4ff67ce0797952c"><td class="memItemLeft" align="right" valign="top"><a id="a028619d29a30f3abc4ff67ce0797952c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a028619d29a30f3abc4ff67ce0797952c">DSU_ADDR_ADDR_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:a028619d29a30f3abc4ff67ce0797952c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_ADDR) Address <br /></td></tr>
<tr class="separator:a028619d29a30f3abc4ff67ce0797952c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abd32d0522daddb84bbf02228c190fc49"><td class="memItemLeft" align="right" valign="top"><a id="abd32d0522daddb84bbf02228c190fc49"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_ADDR_ADDR_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3FFFFFFF) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a028619d29a30f3abc4ff67ce0797952c">DSU_ADDR_ADDR_Pos</a>)</td></tr>
<tr class="separator:abd32d0522daddb84bbf02228c190fc49"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a87f4d8a3d868be1f3d8cc880a0b67b65"><td class="memItemLeft" align="right" valign="top"><a id="a87f4d8a3d868be1f3d8cc880a0b67b65"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_ADDR_ADDR</b>(value)&#160;&#160;&#160;(DSU_ADDR_ADDR_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a028619d29a30f3abc4ff67ce0797952c">DSU_ADDR_ADDR_Pos</a>))</td></tr>
<tr class="separator:a87f4d8a3d868be1f3d8cc880a0b67b65"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:adfb5c4d624bfbe3736315ad712fc3238"><td class="memItemLeft" align="right" valign="top"><a id="adfb5c4d624bfbe3736315ad712fc3238"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#adfb5c4d624bfbe3736315ad712fc3238">DSU_ADDR_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:adfb5c4d624bfbe3736315ad712fc3238"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_ADDR) MASK Register <br /></td></tr>
<tr class="separator:adfb5c4d624bfbe3736315ad712fc3238"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa51326ede30d0596a90a8758846527b9"><td class="memItemLeft" align="right" valign="top"><a id="aa51326ede30d0596a90a8758846527b9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#aa51326ede30d0596a90a8758846527b9">DSU_LENGTH_OFFSET</a>&#160;&#160;&#160;0x0008</td></tr>
<tr class="memdesc:aa51326ede30d0596a90a8758846527b9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_LENGTH offset) Length <br /></td></tr>
<tr class="separator:aa51326ede30d0596a90a8758846527b9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a055ab4dd190617fd309ed8db03c185ac"><td class="memItemLeft" align="right" valign="top"><a id="a055ab4dd190617fd309ed8db03c185ac"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a055ab4dd190617fd309ed8db03c185ac">DSU_LENGTH_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a055ab4dd190617fd309ed8db03c185ac"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_LENGTH reset_value) Length <br /></td></tr>
<tr class="separator:a055ab4dd190617fd309ed8db03c185ac"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6aa7babac0719eb769c08ca1a945aa57"><td class="memItemLeft" align="right" valign="top"><a id="a6aa7babac0719eb769c08ca1a945aa57"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a6aa7babac0719eb769c08ca1a945aa57">DSU_LENGTH_LENGTH_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:a6aa7babac0719eb769c08ca1a945aa57"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_LENGTH) Length <br /></td></tr>
<tr class="separator:a6aa7babac0719eb769c08ca1a945aa57"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af8420428fca225dd9b92fb53c4498124"><td class="memItemLeft" align="right" valign="top"><a id="af8420428fca225dd9b92fb53c4498124"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_LENGTH_LENGTH_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3FFFFFFF) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a6aa7babac0719eb769c08ca1a945aa57">DSU_LENGTH_LENGTH_Pos</a>)</td></tr>
<tr class="separator:af8420428fca225dd9b92fb53c4498124"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a89bbb4abfbd477e9791957d57d5baf5f"><td class="memItemLeft" align="right" valign="top"><a id="a89bbb4abfbd477e9791957d57d5baf5f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_LENGTH_LENGTH</b>(value)&#160;&#160;&#160;(DSU_LENGTH_LENGTH_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a6aa7babac0719eb769c08ca1a945aa57">DSU_LENGTH_LENGTH_Pos</a>))</td></tr>
<tr class="separator:a89bbb4abfbd477e9791957d57d5baf5f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1bdb22215616287bf9f8ee6b97e7f803"><td class="memItemLeft" align="right" valign="top"><a id="a1bdb22215616287bf9f8ee6b97e7f803"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a1bdb22215616287bf9f8ee6b97e7f803">DSU_LENGTH_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFC)</td></tr>
<tr class="memdesc:a1bdb22215616287bf9f8ee6b97e7f803"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_LENGTH) MASK Register <br /></td></tr>
<tr class="separator:a1bdb22215616287bf9f8ee6b97e7f803"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a723e04c18648c402a75cce7e93de351a"><td class="memItemLeft" align="right" valign="top"><a id="a723e04c18648c402a75cce7e93de351a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a723e04c18648c402a75cce7e93de351a">DSU_DATA_OFFSET</a>&#160;&#160;&#160;0x000C</td></tr>
<tr class="memdesc:a723e04c18648c402a75cce7e93de351a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DATA offset) Data <br /></td></tr>
<tr class="separator:a723e04c18648c402a75cce7e93de351a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3a9b805b6870ba197f179b0c6cc366ab"><td class="memItemLeft" align="right" valign="top"><a id="a3a9b805b6870ba197f179b0c6cc366ab"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a3a9b805b6870ba197f179b0c6cc366ab">DSU_DATA_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a3a9b805b6870ba197f179b0c6cc366ab"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DATA reset_value) Data <br /></td></tr>
<tr class="separator:a3a9b805b6870ba197f179b0c6cc366ab"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a035409bf73a654618f87c65e2742bc35"><td class="memItemLeft" align="right" valign="top"><a id="a035409bf73a654618f87c65e2742bc35"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a035409bf73a654618f87c65e2742bc35">DSU_DATA_DATA_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a035409bf73a654618f87c65e2742bc35"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DATA) Data <br /></td></tr>
<tr class="separator:a035409bf73a654618f87c65e2742bc35"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a23b8e4cde6cb91cf05bb65a48c1250c2"><td class="memItemLeft" align="right" valign="top"><a id="a23b8e4cde6cb91cf05bb65a48c1250c2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DATA_DATA_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a035409bf73a654618f87c65e2742bc35">DSU_DATA_DATA_Pos</a>)</td></tr>
<tr class="separator:a23b8e4cde6cb91cf05bb65a48c1250c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aeb9ece8dc9d2857876bb710844551cda"><td class="memItemLeft" align="right" valign="top"><a id="aeb9ece8dc9d2857876bb710844551cda"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DATA_DATA</b>(value)&#160;&#160;&#160;(DSU_DATA_DATA_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a035409bf73a654618f87c65e2742bc35">DSU_DATA_DATA_Pos</a>))</td></tr>
<tr class="separator:aeb9ece8dc9d2857876bb710844551cda"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8ef0cc4d206f8b748482d8f40d4743e5"><td class="memItemLeft" align="right" valign="top"><a id="a8ef0cc4d206f8b748482d8f40d4743e5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a8ef0cc4d206f8b748482d8f40d4743e5">DSU_DATA_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:a8ef0cc4d206f8b748482d8f40d4743e5"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DATA) MASK Register <br /></td></tr>
<tr class="separator:a8ef0cc4d206f8b748482d8f40d4743e5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a79bf45c7c66b3d6ce28c7c9f9e6b3b89"><td class="memItemLeft" align="right" valign="top"><a id="a79bf45c7c66b3d6ce28c7c9f9e6b3b89"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a79bf45c7c66b3d6ce28c7c9f9e6b3b89">DSU_DCC_OFFSET</a>&#160;&#160;&#160;0x0010</td></tr>
<tr class="memdesc:a79bf45c7c66b3d6ce28c7c9f9e6b3b89"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DCC offset) Debug Communication Channel n <br /></td></tr>
<tr class="separator:a79bf45c7c66b3d6ce28c7c9f9e6b3b89"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af005efb1f6ed05574d398463365093b8"><td class="memItemLeft" align="right" valign="top"><a id="af005efb1f6ed05574d398463365093b8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#af005efb1f6ed05574d398463365093b8">DSU_DCC_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:af005efb1f6ed05574d398463365093b8"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DCC reset_value) Debug Communication Channel n <br /></td></tr>
<tr class="separator:af005efb1f6ed05574d398463365093b8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5d96d9ba36151557c8211afc631280c6"><td class="memItemLeft" align="right" valign="top"><a id="a5d96d9ba36151557c8211afc631280c6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a5d96d9ba36151557c8211afc631280c6">DSU_DCC_DATA_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a5d96d9ba36151557c8211afc631280c6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DCC) Data <br /></td></tr>
<tr class="separator:a5d96d9ba36151557c8211afc631280c6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a10a910bf866c48cce4bafb987cdbe360"><td class="memItemLeft" align="right" valign="top"><a id="a10a910bf866c48cce4bafb987cdbe360"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DCC_DATA_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a5d96d9ba36151557c8211afc631280c6">DSU_DCC_DATA_Pos</a>)</td></tr>
<tr class="separator:a10a910bf866c48cce4bafb987cdbe360"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a64c66dc7faaa799d1f4f852504d8e65c"><td class="memItemLeft" align="right" valign="top"><a id="a64c66dc7faaa799d1f4f852504d8e65c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DCC_DATA</b>(value)&#160;&#160;&#160;(DSU_DCC_DATA_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a5d96d9ba36151557c8211afc631280c6">DSU_DCC_DATA_Pos</a>))</td></tr>
<tr class="separator:a64c66dc7faaa799d1f4f852504d8e65c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a68f123ca6976eeb7b1320d0075b315d2"><td class="memItemLeft" align="right" valign="top"><a id="a68f123ca6976eeb7b1320d0075b315d2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a68f123ca6976eeb7b1320d0075b315d2">DSU_DCC_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:a68f123ca6976eeb7b1320d0075b315d2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DCC) MASK Register <br /></td></tr>
<tr class="separator:a68f123ca6976eeb7b1320d0075b315d2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1f8a682ec241602def0bb6f06481e4ed"><td class="memItemLeft" align="right" valign="top"><a id="a1f8a682ec241602def0bb6f06481e4ed"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a1f8a682ec241602def0bb6f06481e4ed">DSU_DID_OFFSET</a>&#160;&#160;&#160;0x0018</td></tr>
<tr class="memdesc:a1f8a682ec241602def0bb6f06481e4ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DID offset) Device Identification <br /></td></tr>
<tr class="separator:a1f8a682ec241602def0bb6f06481e4ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af7877874825444352e8c546a2e1a2595"><td class="memItemLeft" align="right" valign="top"><a id="af7877874825444352e8c546a2e1a2595"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#af7877874825444352e8c546a2e1a2595">DSU_DID_DEVSEL_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:af7877874825444352e8c546a2e1a2595"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DID) Device Select <br /></td></tr>
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<tr class="memitem:a00a89f3dabb49fc218fa169f510affb1"><td class="memItemLeft" align="right" valign="top"><a id="a00a89f3dabb49fc218fa169f510affb1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DID_DEVSEL_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF) &lt;&lt; <a class="el" href="component_2dsu_8h.html#af7877874825444352e8c546a2e1a2595">DSU_DID_DEVSEL_Pos</a>)</td></tr>
<tr class="separator:a00a89f3dabb49fc218fa169f510affb1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae7f77a8a06e459bf42b0bb130c1a1e58"><td class="memItemLeft" align="right" valign="top"><a id="ae7f77a8a06e459bf42b0bb130c1a1e58"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DID_DEVSEL</b>(value)&#160;&#160;&#160;(DSU_DID_DEVSEL_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#af7877874825444352e8c546a2e1a2595">DSU_DID_DEVSEL_Pos</a>))</td></tr>
<tr class="separator:ae7f77a8a06e459bf42b0bb130c1a1e58"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:adf8c7ee986cf2cceec0a4d82efb513a2"><td class="memItemLeft" align="right" valign="top"><a id="adf8c7ee986cf2cceec0a4d82efb513a2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#adf8c7ee986cf2cceec0a4d82efb513a2">DSU_DID_REVISION_Pos</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:adf8c7ee986cf2cceec0a4d82efb513a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DID) Revision Number <br /></td></tr>
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<tr class="memitem:ab5dba5b8a06073b6c8a2cdffe5b4fc20"><td class="memItemLeft" align="right" valign="top"><a id="ab5dba5b8a06073b6c8a2cdffe5b4fc20"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DID_REVISION_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2dsu_8h.html#adf8c7ee986cf2cceec0a4d82efb513a2">DSU_DID_REVISION_Pos</a>)</td></tr>
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<tr class="memitem:a1c662b22d53f1e09610c2c4df24e26d8"><td class="memItemLeft" align="right" valign="top"><a id="a1c662b22d53f1e09610c2c4df24e26d8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DID_REVISION</b>(value)&#160;&#160;&#160;(DSU_DID_REVISION_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#adf8c7ee986cf2cceec0a4d82efb513a2">DSU_DID_REVISION_Pos</a>))</td></tr>
<tr class="separator:a1c662b22d53f1e09610c2c4df24e26d8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:acd344f630eefc7e02ceb5f8210017b8b"><td class="memItemLeft" align="right" valign="top"><a id="acd344f630eefc7e02ceb5f8210017b8b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#acd344f630eefc7e02ceb5f8210017b8b">DSU_DID_DIE_Pos</a>&#160;&#160;&#160;12</td></tr>
<tr class="memdesc:acd344f630eefc7e02ceb5f8210017b8b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DID) Die Number <br /></td></tr>
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<tr class="memitem:a41443f7e74fd63e24f7990557d9ebb28"><td class="memItemLeft" align="right" valign="top"><a id="a41443f7e74fd63e24f7990557d9ebb28"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DID_DIE_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2dsu_8h.html#acd344f630eefc7e02ceb5f8210017b8b">DSU_DID_DIE_Pos</a>)</td></tr>
<tr class="separator:a41443f7e74fd63e24f7990557d9ebb28"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:adcbee73ae2aeed99b44050be79c41b6d"><td class="memItemLeft" align="right" valign="top"><a id="adcbee73ae2aeed99b44050be79c41b6d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DID_DIE</b>(value)&#160;&#160;&#160;(DSU_DID_DIE_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#acd344f630eefc7e02ceb5f8210017b8b">DSU_DID_DIE_Pos</a>))</td></tr>
<tr class="separator:adcbee73ae2aeed99b44050be79c41b6d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7f9f64f65c0ec3d507ba5bc03b1a9b68"><td class="memItemLeft" align="right" valign="top"><a id="a7f9f64f65c0ec3d507ba5bc03b1a9b68"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a7f9f64f65c0ec3d507ba5bc03b1a9b68">DSU_DID_SERIES_Pos</a>&#160;&#160;&#160;16</td></tr>
<tr class="memdesc:a7f9f64f65c0ec3d507ba5bc03b1a9b68"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DID) Series <br /></td></tr>
<tr class="separator:a7f9f64f65c0ec3d507ba5bc03b1a9b68"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af0a694364add4f49a3d7ad19af011e0b"><td class="memItemLeft" align="right" valign="top"><a id="af0a694364add4f49a3d7ad19af011e0b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DID_SERIES_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3F) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a7f9f64f65c0ec3d507ba5bc03b1a9b68">DSU_DID_SERIES_Pos</a>)</td></tr>
<tr class="separator:af0a694364add4f49a3d7ad19af011e0b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa8e2293c54c5435c7b90cc4ab8b0c91b"><td class="memItemLeft" align="right" valign="top"><a id="aa8e2293c54c5435c7b90cc4ab8b0c91b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DID_SERIES</b>(value)&#160;&#160;&#160;(DSU_DID_SERIES_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a7f9f64f65c0ec3d507ba5bc03b1a9b68">DSU_DID_SERIES_Pos</a>))</td></tr>
<tr class="separator:aa8e2293c54c5435c7b90cc4ab8b0c91b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa55d2175bbc40ac9d81bd297a4241916"><td class="memItemLeft" align="right" valign="top"><a id="aa55d2175bbc40ac9d81bd297a4241916"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#aa55d2175bbc40ac9d81bd297a4241916">DSU_DID_SERIES_0_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:aa55d2175bbc40ac9d81bd297a4241916"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DID) Cortex-M0+ processor, basic feature set <br /></td></tr>
<tr class="separator:aa55d2175bbc40ac9d81bd297a4241916"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5b1ab97381d29e6d852f6ef0aec8f479"><td class="memItemLeft" align="right" valign="top"><a id="a5b1ab97381d29e6d852f6ef0aec8f479"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a5b1ab97381d29e6d852f6ef0aec8f479">DSU_DID_SERIES_1_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:a5b1ab97381d29e6d852f6ef0aec8f479"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DID) Cortex-M0+ processor, USB <br /></td></tr>
<tr class="separator:a5b1ab97381d29e6d852f6ef0aec8f479"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad25a0fe0a4a9ee82609243db4147eaeb"><td class="memItemLeft" align="right" valign="top"><a id="ad25a0fe0a4a9ee82609243db4147eaeb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DID_SERIES_0</b>&#160;&#160;&#160;(<a class="el" href="component_2dsu_8h.html#aa55d2175bbc40ac9d81bd297a4241916">DSU_DID_SERIES_0_Val</a> &lt;&lt; <a class="el" href="component_2dsu_8h.html#a7f9f64f65c0ec3d507ba5bc03b1a9b68">DSU_DID_SERIES_Pos</a>)</td></tr>
<tr class="separator:ad25a0fe0a4a9ee82609243db4147eaeb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0393d52bdee9a481f611e749fad390ec"><td class="memItemLeft" align="right" valign="top"><a id="a0393d52bdee9a481f611e749fad390ec"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DID_SERIES_1</b>&#160;&#160;&#160;(<a class="el" href="component_2dsu_8h.html#a5b1ab97381d29e6d852f6ef0aec8f479">DSU_DID_SERIES_1_Val</a> &lt;&lt; <a class="el" href="component_2dsu_8h.html#a7f9f64f65c0ec3d507ba5bc03b1a9b68">DSU_DID_SERIES_Pos</a>)</td></tr>
<tr class="separator:a0393d52bdee9a481f611e749fad390ec"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a738ead915cfef1cb2261b900bc2125e7"><td class="memItemLeft" align="right" valign="top"><a id="a738ead915cfef1cb2261b900bc2125e7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a738ead915cfef1cb2261b900bc2125e7">DSU_DID_FAMILY_Pos</a>&#160;&#160;&#160;23</td></tr>
<tr class="memdesc:a738ead915cfef1cb2261b900bc2125e7"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DID) Family <br /></td></tr>
<tr class="separator:a738ead915cfef1cb2261b900bc2125e7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afadbeccaa25afb79e44bfa3e1585c116"><td class="memItemLeft" align="right" valign="top"><a id="afadbeccaa25afb79e44bfa3e1585c116"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DID_FAMILY_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1F) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a738ead915cfef1cb2261b900bc2125e7">DSU_DID_FAMILY_Pos</a>)</td></tr>
<tr class="separator:afadbeccaa25afb79e44bfa3e1585c116"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a60b98d79fd8846339905b75d8df68abb"><td class="memItemLeft" align="right" valign="top"><a id="a60b98d79fd8846339905b75d8df68abb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DID_FAMILY</b>(value)&#160;&#160;&#160;(DSU_DID_FAMILY_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a738ead915cfef1cb2261b900bc2125e7">DSU_DID_FAMILY_Pos</a>))</td></tr>
<tr class="separator:a60b98d79fd8846339905b75d8df68abb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa68390a3dd287f0f36e30d40994bcb1e"><td class="memItemLeft" align="right" valign="top"><a id="aa68390a3dd287f0f36e30d40994bcb1e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#aa68390a3dd287f0f36e30d40994bcb1e">DSU_DID_FAMILY_0_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:aa68390a3dd287f0f36e30d40994bcb1e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DID) General purpose microcontroller <br /></td></tr>
<tr class="separator:aa68390a3dd287f0f36e30d40994bcb1e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ade6548ba38e36d9bd1487d02b2825f1c"><td class="memItemLeft" align="right" valign="top"><a id="ade6548ba38e36d9bd1487d02b2825f1c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#ade6548ba38e36d9bd1487d02b2825f1c">DSU_DID_FAMILY_1_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:ade6548ba38e36d9bd1487d02b2825f1c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DID) PicoPower <br /></td></tr>
<tr class="separator:ade6548ba38e36d9bd1487d02b2825f1c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab7d711b0df12398741eb2ff32acb54f6"><td class="memItemLeft" align="right" valign="top"><a id="ab7d711b0df12398741eb2ff32acb54f6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DID_FAMILY_0</b>&#160;&#160;&#160;(<a class="el" href="component_2dsu_8h.html#aa68390a3dd287f0f36e30d40994bcb1e">DSU_DID_FAMILY_0_Val</a> &lt;&lt; <a class="el" href="component_2dsu_8h.html#a738ead915cfef1cb2261b900bc2125e7">DSU_DID_FAMILY_Pos</a>)</td></tr>
<tr class="separator:ab7d711b0df12398741eb2ff32acb54f6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a275b17cc8a72d0075cb1d867c8a253aa"><td class="memItemLeft" align="right" valign="top"><a id="a275b17cc8a72d0075cb1d867c8a253aa"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DID_FAMILY_1</b>&#160;&#160;&#160;(<a class="el" href="component_2dsu_8h.html#ade6548ba38e36d9bd1487d02b2825f1c">DSU_DID_FAMILY_1_Val</a> &lt;&lt; <a class="el" href="component_2dsu_8h.html#a738ead915cfef1cb2261b900bc2125e7">DSU_DID_FAMILY_Pos</a>)</td></tr>
<tr class="separator:a275b17cc8a72d0075cb1d867c8a253aa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af39e8c9b37c218a74228db9507493fa2"><td class="memItemLeft" align="right" valign="top"><a id="af39e8c9b37c218a74228db9507493fa2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#af39e8c9b37c218a74228db9507493fa2">DSU_DID_PROCESSOR_Pos</a>&#160;&#160;&#160;28</td></tr>
<tr class="memdesc:af39e8c9b37c218a74228db9507493fa2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DID) Processor <br /></td></tr>
<tr class="separator:af39e8c9b37c218a74228db9507493fa2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad4accb27c5fd296512c1ed43dd84c93d"><td class="memItemLeft" align="right" valign="top"><a id="ad4accb27c5fd296512c1ed43dd84c93d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DID_PROCESSOR_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2dsu_8h.html#af39e8c9b37c218a74228db9507493fa2">DSU_DID_PROCESSOR_Pos</a>)</td></tr>
<tr class="separator:ad4accb27c5fd296512c1ed43dd84c93d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7631b295029e2c4f2068fb1aeef05634"><td class="memItemLeft" align="right" valign="top"><a id="a7631b295029e2c4f2068fb1aeef05634"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DID_PROCESSOR</b>(value)&#160;&#160;&#160;(DSU_DID_PROCESSOR_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#af39e8c9b37c218a74228db9507493fa2">DSU_DID_PROCESSOR_Pos</a>))</td></tr>
<tr class="separator:a7631b295029e2c4f2068fb1aeef05634"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab0125f19b1c66669ea789521e33360c6"><td class="memItemLeft" align="right" valign="top"><a id="ab0125f19b1c66669ea789521e33360c6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#ab0125f19b1c66669ea789521e33360c6">DSU_DID_PROCESSOR_CM0P_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:ab0125f19b1c66669ea789521e33360c6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DID) Cortex-M0+ <br /></td></tr>
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<tr class="memitem:a0df4a2a0af94a6b4490a23d5c4b03bfd"><td class="memItemLeft" align="right" valign="top"><a id="a0df4a2a0af94a6b4490a23d5c4b03bfd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a0df4a2a0af94a6b4490a23d5c4b03bfd">DSU_DID_PROCESSOR_CM23_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a0df4a2a0af94a6b4490a23d5c4b03bfd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DID) Cortex-M23 <br /></td></tr>
<tr class="separator:a0df4a2a0af94a6b4490a23d5c4b03bfd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abfb5d107e61e5ec48206450c921b4a4b"><td class="memItemLeft" align="right" valign="top"><a id="abfb5d107e61e5ec48206450c921b4a4b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#abfb5d107e61e5ec48206450c921b4a4b">DSU_DID_PROCESSOR_CM3_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
<tr class="memdesc:abfb5d107e61e5ec48206450c921b4a4b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DID) Cortex-M3 <br /></td></tr>
<tr class="separator:abfb5d107e61e5ec48206450c921b4a4b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a534a13e2a895ca387b30d5a195e6b824"><td class="memItemLeft" align="right" valign="top"><a id="a534a13e2a895ca387b30d5a195e6b824"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a534a13e2a895ca387b30d5a195e6b824">DSU_DID_PROCESSOR_CM4_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
<tr class="memdesc:a534a13e2a895ca387b30d5a195e6b824"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DID) Cortex-M4 <br /></td></tr>
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<tr class="memitem:afa6c40dc54282a41cc1fc2aba638ba9c"><td class="memItemLeft" align="right" valign="top"><a id="afa6c40dc54282a41cc1fc2aba638ba9c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#afa6c40dc54282a41cc1fc2aba638ba9c">DSU_DID_PROCESSOR_CM4F_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x6)</td></tr>
<tr class="memdesc:afa6c40dc54282a41cc1fc2aba638ba9c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DID) Cortex-M4 with FPU <br /></td></tr>
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<tr class="memitem:a02cfd62c099a7754ee0b6339d6b8bc8c"><td class="memItemLeft" align="right" valign="top"><a id="a02cfd62c099a7754ee0b6339d6b8bc8c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a02cfd62c099a7754ee0b6339d6b8bc8c">DSU_DID_PROCESSOR_CM33_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7)</td></tr>
<tr class="memdesc:a02cfd62c099a7754ee0b6339d6b8bc8c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DID) Cortex-M33 <br /></td></tr>
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<tr class="memitem:a74f458934fcc3c777641b92064bb6700"><td class="memItemLeft" align="right" valign="top"><a id="a74f458934fcc3c777641b92064bb6700"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DID_PROCESSOR_CM0P</b>&#160;&#160;&#160;(<a class="el" href="component_2dsu_8h.html#ab0125f19b1c66669ea789521e33360c6">DSU_DID_PROCESSOR_CM0P_Val</a> &lt;&lt; <a class="el" href="component_2dsu_8h.html#af39e8c9b37c218a74228db9507493fa2">DSU_DID_PROCESSOR_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DID_PROCESSOR_CM23</b>&#160;&#160;&#160;(<a class="el" href="component_2dsu_8h.html#a0df4a2a0af94a6b4490a23d5c4b03bfd">DSU_DID_PROCESSOR_CM23_Val</a> &lt;&lt; <a class="el" href="component_2dsu_8h.html#af39e8c9b37c218a74228db9507493fa2">DSU_DID_PROCESSOR_Pos</a>)</td></tr>
<tr class="separator:a483520476495bbfe809ddcffdafc8669"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aff20fc234e9894d23c485c69da737f9f"><td class="memItemLeft" align="right" valign="top"><a id="aff20fc234e9894d23c485c69da737f9f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DID_PROCESSOR_CM3</b>&#160;&#160;&#160;(<a class="el" href="component_2dsu_8h.html#abfb5d107e61e5ec48206450c921b4a4b">DSU_DID_PROCESSOR_CM3_Val</a> &lt;&lt; <a class="el" href="component_2dsu_8h.html#af39e8c9b37c218a74228db9507493fa2">DSU_DID_PROCESSOR_Pos</a>)</td></tr>
<tr class="separator:aff20fc234e9894d23c485c69da737f9f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a29c82146d2cc3d42a255993e77092396"><td class="memItemLeft" align="right" valign="top"><a id="a29c82146d2cc3d42a255993e77092396"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DID_PROCESSOR_CM4</b>&#160;&#160;&#160;(<a class="el" href="component_2dsu_8h.html#a534a13e2a895ca387b30d5a195e6b824">DSU_DID_PROCESSOR_CM4_Val</a> &lt;&lt; <a class="el" href="component_2dsu_8h.html#af39e8c9b37c218a74228db9507493fa2">DSU_DID_PROCESSOR_Pos</a>)</td></tr>
<tr class="separator:a29c82146d2cc3d42a255993e77092396"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a84860ec98ee0f3636028fb7ff4d44c09"><td class="memItemLeft" align="right" valign="top"><a id="a84860ec98ee0f3636028fb7ff4d44c09"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DID_PROCESSOR_CM4F</b>&#160;&#160;&#160;(<a class="el" href="component_2dsu_8h.html#afa6c40dc54282a41cc1fc2aba638ba9c">DSU_DID_PROCESSOR_CM4F_Val</a> &lt;&lt; <a class="el" href="component_2dsu_8h.html#af39e8c9b37c218a74228db9507493fa2">DSU_DID_PROCESSOR_Pos</a>)</td></tr>
<tr class="separator:a84860ec98ee0f3636028fb7ff4d44c09"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac8d5fb96f5ae740ba7bdfe736c0a9860"><td class="memItemLeft" align="right" valign="top"><a id="ac8d5fb96f5ae740ba7bdfe736c0a9860"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_DID_PROCESSOR_CM33</b>&#160;&#160;&#160;(<a class="el" href="component_2dsu_8h.html#a02cfd62c099a7754ee0b6339d6b8bc8c">DSU_DID_PROCESSOR_CM33_Val</a> &lt;&lt; <a class="el" href="component_2dsu_8h.html#af39e8c9b37c218a74228db9507493fa2">DSU_DID_PROCESSOR_Pos</a>)</td></tr>
<tr class="separator:ac8d5fb96f5ae740ba7bdfe736c0a9860"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac1403dba443577379c24df9d1bff8cb1"><td class="memItemLeft" align="right" valign="top"><a id="ac1403dba443577379c24df9d1bff8cb1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#ac1403dba443577379c24df9d1bff8cb1">DSU_DID_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFBFFFFF)</td></tr>
<tr class="memdesc:ac1403dba443577379c24df9d1bff8cb1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_DID) MASK Register <br /></td></tr>
<tr class="separator:ac1403dba443577379c24df9d1bff8cb1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8c62f4d1e6354ed3d19a6f1d0106e246"><td class="memItemLeft" align="right" valign="top"><a id="a8c62f4d1e6354ed3d19a6f1d0106e246"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a8c62f4d1e6354ed3d19a6f1d0106e246">DSU_CFG_OFFSET</a>&#160;&#160;&#160;0x001C</td></tr>
<tr class="memdesc:a8c62f4d1e6354ed3d19a6f1d0106e246"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CFG offset) Configuration <br /></td></tr>
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<tr class="memitem:a8e3905dda579f2cd6b30b66ed021a0b5"><td class="memItemLeft" align="right" valign="top"><a id="a8e3905dda579f2cd6b30b66ed021a0b5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a8e3905dda579f2cd6b30b66ed021a0b5">DSU_CFG_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000002)</td></tr>
<tr class="memdesc:a8e3905dda579f2cd6b30b66ed021a0b5"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CFG reset_value) Configuration <br /></td></tr>
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<tr class="memitem:a6d98254c90559c6b73604015294b6b40"><td class="memItemLeft" align="right" valign="top"><a id="a6d98254c90559c6b73604015294b6b40"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a6d98254c90559c6b73604015294b6b40">DSU_CFG_LQOS_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a6d98254c90559c6b73604015294b6b40"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CFG) Latency Quality Of Service <br /></td></tr>
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<tr class="memitem:ae649628f1cd69edafe8ac59755e6042c"><td class="memItemLeft" align="right" valign="top"><a id="ae649628f1cd69edafe8ac59755e6042c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_CFG_LQOS_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a6d98254c90559c6b73604015294b6b40">DSU_CFG_LQOS_Pos</a>)</td></tr>
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<tr class="memitem:a322d4b1640b4afa78f2085ee2394d127"><td class="memItemLeft" align="right" valign="top"><a id="a322d4b1640b4afa78f2085ee2394d127"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_CFG_LQOS</b>(value)&#160;&#160;&#160;(DSU_CFG_LQOS_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a6d98254c90559c6b73604015294b6b40">DSU_CFG_LQOS_Pos</a>))</td></tr>
<tr class="separator:a322d4b1640b4afa78f2085ee2394d127"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a589df5c7af4d30c5109d1353eabd48a9"><td class="memItemLeft" align="right" valign="top"><a id="a589df5c7af4d30c5109d1353eabd48a9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a589df5c7af4d30c5109d1353eabd48a9">DSU_CFG_DCCDMALEVEL_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:a589df5c7af4d30c5109d1353eabd48a9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CFG) DMA Trigger Level <br /></td></tr>
<tr class="separator:a589df5c7af4d30c5109d1353eabd48a9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a276b9dce0509c5197514d4668ef8fd6a"><td class="memItemLeft" align="right" valign="top"><a id="a276b9dce0509c5197514d4668ef8fd6a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_CFG_DCCDMALEVEL_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a589df5c7af4d30c5109d1353eabd48a9">DSU_CFG_DCCDMALEVEL_Pos</a>)</td></tr>
<tr class="separator:a276b9dce0509c5197514d4668ef8fd6a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3d2e8fb8370375a8b89e0e2489d97a14"><td class="memItemLeft" align="right" valign="top"><a id="a3d2e8fb8370375a8b89e0e2489d97a14"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_CFG_DCCDMALEVEL</b>(value)&#160;&#160;&#160;(DSU_CFG_DCCDMALEVEL_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a589df5c7af4d30c5109d1353eabd48a9">DSU_CFG_DCCDMALEVEL_Pos</a>))</td></tr>
<tr class="separator:a3d2e8fb8370375a8b89e0e2489d97a14"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a08775cb0aac097f6c9208783fbda68ff"><td class="memItemLeft" align="right" valign="top"><a id="a08775cb0aac097f6c9208783fbda68ff"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a08775cb0aac097f6c9208783fbda68ff">DSU_CFG_DCCDMALEVEL_EMPTY_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a08775cb0aac097f6c9208783fbda68ff"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CFG) Trigger rises when DCC is empty <br /></td></tr>
<tr class="separator:a08775cb0aac097f6c9208783fbda68ff"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aad9ff896ba8016cc22e8aebe849ac0e0"><td class="memItemLeft" align="right" valign="top"><a id="aad9ff896ba8016cc22e8aebe849ac0e0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#aad9ff896ba8016cc22e8aebe849ac0e0">DSU_CFG_DCCDMALEVEL_FULL_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:aad9ff896ba8016cc22e8aebe849ac0e0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CFG) Trigger rises when DCC is full <br /></td></tr>
<tr class="separator:aad9ff896ba8016cc22e8aebe849ac0e0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afae6221f9a787068aa3683eed995c005"><td class="memItemLeft" align="right" valign="top"><a id="afae6221f9a787068aa3683eed995c005"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_CFG_DCCDMALEVEL_EMPTY</b>&#160;&#160;&#160;(<a class="el" href="component_2dsu_8h.html#a08775cb0aac097f6c9208783fbda68ff">DSU_CFG_DCCDMALEVEL_EMPTY_Val</a> &lt;&lt; <a class="el" href="component_2dsu_8h.html#a589df5c7af4d30c5109d1353eabd48a9">DSU_CFG_DCCDMALEVEL_Pos</a>)</td></tr>
<tr class="separator:afae6221f9a787068aa3683eed995c005"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8626da854d2974e7defcc9625f2e3485"><td class="memItemLeft" align="right" valign="top"><a id="a8626da854d2974e7defcc9625f2e3485"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_CFG_DCCDMALEVEL_FULL</b>&#160;&#160;&#160;(<a class="el" href="component_2dsu_8h.html#aad9ff896ba8016cc22e8aebe849ac0e0">DSU_CFG_DCCDMALEVEL_FULL_Val</a> &lt;&lt; <a class="el" href="component_2dsu_8h.html#a589df5c7af4d30c5109d1353eabd48a9">DSU_CFG_DCCDMALEVEL_Pos</a>)</td></tr>
<tr class="separator:a8626da854d2974e7defcc9625f2e3485"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1dd49a77ed00b0d8b29a092fed417845"><td class="memItemLeft" align="right" valign="top"><a id="a1dd49a77ed00b0d8b29a092fed417845"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a1dd49a77ed00b0d8b29a092fed417845">DSU_CFG_ETBRAMEN_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:a1dd49a77ed00b0d8b29a092fed417845"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CFG) Trace Control <br /></td></tr>
<tr class="separator:a1dd49a77ed00b0d8b29a092fed417845"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3f32626ab76953494c4cf0d4ca18b2c2"><td class="memItemLeft" align="right" valign="top"><a id="a3f32626ab76953494c4cf0d4ca18b2c2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_CFG_ETBRAMEN</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a1dd49a77ed00b0d8b29a092fed417845">DSU_CFG_ETBRAMEN_Pos</a>)</td></tr>
<tr class="separator:a3f32626ab76953494c4cf0d4ca18b2c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac4777e024751c158ef31e676ec63eac9"><td class="memItemLeft" align="right" valign="top"><a id="ac4777e024751c158ef31e676ec63eac9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#ac4777e024751c158ef31e676ec63eac9">DSU_CFG_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000001F)</td></tr>
<tr class="memdesc:ac4777e024751c158ef31e676ec63eac9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CFG) MASK Register <br /></td></tr>
<tr class="separator:ac4777e024751c158ef31e676ec63eac9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aab06d4df5675d46495c1506ff2f2bf2c"><td class="memItemLeft" align="right" valign="top"><a id="aab06d4df5675d46495c1506ff2f2bf2c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#aab06d4df5675d46495c1506ff2f2bf2c">DSU_ENTRY0_OFFSET</a>&#160;&#160;&#160;0x1000</td></tr>
<tr class="memdesc:aab06d4df5675d46495c1506ff2f2bf2c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_ENTRY0 offset) CoreSight ROM Table Entry 0 <br /></td></tr>
<tr class="separator:aab06d4df5675d46495c1506ff2f2bf2c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8017bdfde4195a88bccf08a7ad26f5ca"><td class="memItemLeft" align="right" valign="top"><a id="a8017bdfde4195a88bccf08a7ad26f5ca"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a8017bdfde4195a88bccf08a7ad26f5ca">DSU_ENTRY0_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x9F0FC002)</td></tr>
<tr class="memdesc:a8017bdfde4195a88bccf08a7ad26f5ca"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_ENTRY0 reset_value) CoreSight ROM Table Entry 0 <br /></td></tr>
<tr class="separator:a8017bdfde4195a88bccf08a7ad26f5ca"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab0c18ae2688f543939477aebbe76ee54"><td class="memItemLeft" align="right" valign="top"><a id="ab0c18ae2688f543939477aebbe76ee54"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#ab0c18ae2688f543939477aebbe76ee54">DSU_ENTRY0_EPRES_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ab0c18ae2688f543939477aebbe76ee54"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_ENTRY0) Entry Present <br /></td></tr>
<tr class="separator:ab0c18ae2688f543939477aebbe76ee54"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6c401381fced4d940cef9ed1cb0bf71a"><td class="memItemLeft" align="right" valign="top"><a id="a6c401381fced4d940cef9ed1cb0bf71a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_ENTRY0_EPRES</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dsu_8h.html#ab0c18ae2688f543939477aebbe76ee54">DSU_ENTRY0_EPRES_Pos</a>)</td></tr>
<tr class="separator:a6c401381fced4d940cef9ed1cb0bf71a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad27fea4487d4ce75afd0b580219487b6"><td class="memItemLeft" align="right" valign="top"><a id="ad27fea4487d4ce75afd0b580219487b6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#ad27fea4487d4ce75afd0b580219487b6">DSU_ENTRY0_FMT_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:ad27fea4487d4ce75afd0b580219487b6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_ENTRY0) Format <br /></td></tr>
<tr class="separator:ad27fea4487d4ce75afd0b580219487b6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af52ac00c014438b8c28c1e5cd3acc389"><td class="memItemLeft" align="right" valign="top"><a id="af52ac00c014438b8c28c1e5cd3acc389"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_ENTRY0_FMT</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dsu_8h.html#ad27fea4487d4ce75afd0b580219487b6">DSU_ENTRY0_FMT_Pos</a>)</td></tr>
<tr class="separator:af52ac00c014438b8c28c1e5cd3acc389"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a281853c30a01a33bb71d921008daf56c"><td class="memItemLeft" align="right" valign="top"><a id="a281853c30a01a33bb71d921008daf56c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a281853c30a01a33bb71d921008daf56c">DSU_ENTRY0_ADDOFF_Pos</a>&#160;&#160;&#160;12</td></tr>
<tr class="memdesc:a281853c30a01a33bb71d921008daf56c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_ENTRY0) Address Offset <br /></td></tr>
<tr class="separator:a281853c30a01a33bb71d921008daf56c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:acebdea9b5a2589153faa09bdfd152bd2"><td class="memItemLeft" align="right" valign="top"><a id="acebdea9b5a2589153faa09bdfd152bd2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_ENTRY0_ADDOFF_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFF) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a281853c30a01a33bb71d921008daf56c">DSU_ENTRY0_ADDOFF_Pos</a>)</td></tr>
<tr class="separator:acebdea9b5a2589153faa09bdfd152bd2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8069c18e95c0860b3a09774c20a6ec67"><td class="memItemLeft" align="right" valign="top"><a id="a8069c18e95c0860b3a09774c20a6ec67"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_ENTRY0_ADDOFF</b>(value)&#160;&#160;&#160;(DSU_ENTRY0_ADDOFF_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a281853c30a01a33bb71d921008daf56c">DSU_ENTRY0_ADDOFF_Pos</a>))</td></tr>
<tr class="separator:a8069c18e95c0860b3a09774c20a6ec67"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aefdc95e7fcd5bc171ef80131a547588e"><td class="memItemLeft" align="right" valign="top"><a id="aefdc95e7fcd5bc171ef80131a547588e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#aefdc95e7fcd5bc171ef80131a547588e">DSU_ENTRY0_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFF003)</td></tr>
<tr class="memdesc:aefdc95e7fcd5bc171ef80131a547588e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_ENTRY0) MASK Register <br /></td></tr>
<tr class="separator:aefdc95e7fcd5bc171ef80131a547588e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac5708bb2fe2ee100cdddae6442828217"><td class="memItemLeft" align="right" valign="top"><a id="ac5708bb2fe2ee100cdddae6442828217"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#ac5708bb2fe2ee100cdddae6442828217">DSU_ENTRY1_OFFSET</a>&#160;&#160;&#160;0x1004</td></tr>
<tr class="memdesc:ac5708bb2fe2ee100cdddae6442828217"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_ENTRY1 offset) CoreSight ROM Table Entry 1 <br /></td></tr>
<tr class="separator:ac5708bb2fe2ee100cdddae6442828217"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9f8fce8b585b23a09dd0abac9fadf06e"><td class="memItemLeft" align="right" valign="top"><a id="a9f8fce8b585b23a09dd0abac9fadf06e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a9f8fce8b585b23a09dd0abac9fadf06e">DSU_ENTRY1_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a9f8fce8b585b23a09dd0abac9fadf06e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_ENTRY1 reset_value) CoreSight ROM Table Entry 1 <br /></td></tr>
<tr class="separator:a9f8fce8b585b23a09dd0abac9fadf06e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afdfc580b0b4e1677b6ce0b4843199d76"><td class="memItemLeft" align="right" valign="top"><a id="afdfc580b0b4e1677b6ce0b4843199d76"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#afdfc580b0b4e1677b6ce0b4843199d76">DSU_ENTRY1_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:afdfc580b0b4e1677b6ce0b4843199d76"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_ENTRY1) MASK Register <br /></td></tr>
<tr class="separator:afdfc580b0b4e1677b6ce0b4843199d76"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae6ea9aca4f5434a9e01445fc08782f59"><td class="memItemLeft" align="right" valign="top"><a id="ae6ea9aca4f5434a9e01445fc08782f59"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#ae6ea9aca4f5434a9e01445fc08782f59">DSU_END_OFFSET</a>&#160;&#160;&#160;0x1008</td></tr>
<tr class="memdesc:ae6ea9aca4f5434a9e01445fc08782f59"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_END offset) CoreSight ROM Table End <br /></td></tr>
<tr class="separator:ae6ea9aca4f5434a9e01445fc08782f59"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa4380f101e160fd70e41789f57871f63"><td class="memItemLeft" align="right" valign="top"><a id="aa4380f101e160fd70e41789f57871f63"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#aa4380f101e160fd70e41789f57871f63">DSU_END_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:aa4380f101e160fd70e41789f57871f63"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_END reset_value) CoreSight ROM Table End <br /></td></tr>
<tr class="separator:aa4380f101e160fd70e41789f57871f63"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a490d2f02762f42681fc4dcaa0db570bb"><td class="memItemLeft" align="right" valign="top"><a id="a490d2f02762f42681fc4dcaa0db570bb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a490d2f02762f42681fc4dcaa0db570bb">DSU_END_END_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a490d2f02762f42681fc4dcaa0db570bb"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_END) End Marker <br /></td></tr>
<tr class="separator:a490d2f02762f42681fc4dcaa0db570bb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aaf87e985a2898109e146e505e1bc603e"><td class="memItemLeft" align="right" valign="top"><a id="aaf87e985a2898109e146e505e1bc603e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_END_END_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a490d2f02762f42681fc4dcaa0db570bb">DSU_END_END_Pos</a>)</td></tr>
<tr class="separator:aaf87e985a2898109e146e505e1bc603e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7f75f47734b0964eae647d11b91f7748"><td class="memItemLeft" align="right" valign="top"><a id="a7f75f47734b0964eae647d11b91f7748"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_END_END</b>(value)&#160;&#160;&#160;(DSU_END_END_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a490d2f02762f42681fc4dcaa0db570bb">DSU_END_END_Pos</a>))</td></tr>
<tr class="separator:a7f75f47734b0964eae647d11b91f7748"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac1fdb41335952f536cc506c75a0f2e5f"><td class="memItemLeft" align="right" valign="top"><a id="ac1fdb41335952f536cc506c75a0f2e5f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#ac1fdb41335952f536cc506c75a0f2e5f">DSU_END_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:ac1fdb41335952f536cc506c75a0f2e5f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_END) MASK Register <br /></td></tr>
<tr class="separator:ac1fdb41335952f536cc506c75a0f2e5f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9cfb1a386c96d79aa14d0556e89a9847"><td class="memItemLeft" align="right" valign="top"><a id="a9cfb1a386c96d79aa14d0556e89a9847"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a9cfb1a386c96d79aa14d0556e89a9847">DSU_MEMTYPE_OFFSET</a>&#160;&#160;&#160;0x1FCC</td></tr>
<tr class="memdesc:a9cfb1a386c96d79aa14d0556e89a9847"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_MEMTYPE offset) CoreSight ROM Table Memory Type <br /></td></tr>
<tr class="separator:a9cfb1a386c96d79aa14d0556e89a9847"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae696aac50623781af5c363bb4819a651"><td class="memItemLeft" align="right" valign="top"><a id="ae696aac50623781af5c363bb4819a651"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#ae696aac50623781af5c363bb4819a651">DSU_MEMTYPE_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:ae696aac50623781af5c363bb4819a651"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_MEMTYPE reset_value) CoreSight ROM Table Memory Type <br /></td></tr>
<tr class="separator:ae696aac50623781af5c363bb4819a651"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af9e3cd3a0a5383eb7790554b6b26b2d3"><td class="memItemLeft" align="right" valign="top"><a id="af9e3cd3a0a5383eb7790554b6b26b2d3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#af9e3cd3a0a5383eb7790554b6b26b2d3">DSU_MEMTYPE_SMEMP_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:af9e3cd3a0a5383eb7790554b6b26b2d3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_MEMTYPE) System Memory Present <br /></td></tr>
<tr class="separator:af9e3cd3a0a5383eb7790554b6b26b2d3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aab193425e2e460aea861c9c2ef10fd42"><td class="memItemLeft" align="right" valign="top"><a id="aab193425e2e460aea861c9c2ef10fd42"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_MEMTYPE_SMEMP</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dsu_8h.html#af9e3cd3a0a5383eb7790554b6b26b2d3">DSU_MEMTYPE_SMEMP_Pos</a>)</td></tr>
<tr class="separator:aab193425e2e460aea861c9c2ef10fd42"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1452bd6135db23612661a14aba71c287"><td class="memItemLeft" align="right" valign="top"><a id="a1452bd6135db23612661a14aba71c287"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a1452bd6135db23612661a14aba71c287">DSU_MEMTYPE_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000001)</td></tr>
<tr class="memdesc:a1452bd6135db23612661a14aba71c287"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_MEMTYPE) MASK Register <br /></td></tr>
<tr class="separator:a1452bd6135db23612661a14aba71c287"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9b2486d7ffbc473daa210a53c58ae205"><td class="memItemLeft" align="right" valign="top"><a id="a9b2486d7ffbc473daa210a53c58ae205"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a9b2486d7ffbc473daa210a53c58ae205">DSU_PID4_OFFSET</a>&#160;&#160;&#160;0x1FD0</td></tr>
<tr class="memdesc:a9b2486d7ffbc473daa210a53c58ae205"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID4 offset) Peripheral Identification 4 <br /></td></tr>
<tr class="separator:a9b2486d7ffbc473daa210a53c58ae205"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abff45dc09472f6ef982d193afd7841cc"><td class="memItemLeft" align="right" valign="top"><a id="abff45dc09472f6ef982d193afd7841cc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#abff45dc09472f6ef982d193afd7841cc">DSU_PID4_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:abff45dc09472f6ef982d193afd7841cc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID4 reset_value) Peripheral Identification 4 <br /></td></tr>
<tr class="separator:abff45dc09472f6ef982d193afd7841cc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a09592aca2e0907f95a7a1b7898f77734"><td class="memItemLeft" align="right" valign="top"><a id="a09592aca2e0907f95a7a1b7898f77734"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a09592aca2e0907f95a7a1b7898f77734">DSU_PID4_JEPCC_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a09592aca2e0907f95a7a1b7898f77734"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID4) JEP-106 Continuation Code <br /></td></tr>
<tr class="separator:a09592aca2e0907f95a7a1b7898f77734"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2a82152e8d4b608bac249b7a20648725"><td class="memItemLeft" align="right" valign="top"><a id="a2a82152e8d4b608bac249b7a20648725"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_PID4_JEPCC_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a09592aca2e0907f95a7a1b7898f77734">DSU_PID4_JEPCC_Pos</a>)</td></tr>
<tr class="separator:a2a82152e8d4b608bac249b7a20648725"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5fd67c05238d1180cab16bd3363d12e3"><td class="memItemLeft" align="right" valign="top"><a id="a5fd67c05238d1180cab16bd3363d12e3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_PID4_JEPCC</b>(value)&#160;&#160;&#160;(DSU_PID4_JEPCC_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a09592aca2e0907f95a7a1b7898f77734">DSU_PID4_JEPCC_Pos</a>))</td></tr>
<tr class="separator:a5fd67c05238d1180cab16bd3363d12e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa75dd4a5e3f39a78aacfe256a1db4df9"><td class="memItemLeft" align="right" valign="top"><a id="aa75dd4a5e3f39a78aacfe256a1db4df9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#aa75dd4a5e3f39a78aacfe256a1db4df9">DSU_PID4_FKBC_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:aa75dd4a5e3f39a78aacfe256a1db4df9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID4) 4KB count <br /></td></tr>
<tr class="separator:aa75dd4a5e3f39a78aacfe256a1db4df9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:acf7090567b13986ca1ee4903dfbc1157"><td class="memItemLeft" align="right" valign="top"><a id="acf7090567b13986ca1ee4903dfbc1157"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_PID4_FKBC_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2dsu_8h.html#aa75dd4a5e3f39a78aacfe256a1db4df9">DSU_PID4_FKBC_Pos</a>)</td></tr>
<tr class="separator:acf7090567b13986ca1ee4903dfbc1157"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac37ce079f68b9fd6e3fc8b02bc876590"><td class="memItemLeft" align="right" valign="top"><a id="ac37ce079f68b9fd6e3fc8b02bc876590"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_PID4_FKBC</b>(value)&#160;&#160;&#160;(DSU_PID4_FKBC_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#aa75dd4a5e3f39a78aacfe256a1db4df9">DSU_PID4_FKBC_Pos</a>))</td></tr>
<tr class="separator:ac37ce079f68b9fd6e3fc8b02bc876590"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4d757ce3a91f809a48fe7fbe9a72724e"><td class="memItemLeft" align="right" valign="top"><a id="a4d757ce3a91f809a48fe7fbe9a72724e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a4d757ce3a91f809a48fe7fbe9a72724e">DSU_PID4_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x000000FF)</td></tr>
<tr class="memdesc:a4d757ce3a91f809a48fe7fbe9a72724e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID4) MASK Register <br /></td></tr>
<tr class="separator:a4d757ce3a91f809a48fe7fbe9a72724e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a55456b82aa4473e1294da9cddff8dc7f"><td class="memItemLeft" align="right" valign="top"><a id="a55456b82aa4473e1294da9cddff8dc7f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a55456b82aa4473e1294da9cddff8dc7f">DSU_PID5_OFFSET</a>&#160;&#160;&#160;0x1FD4</td></tr>
<tr class="memdesc:a55456b82aa4473e1294da9cddff8dc7f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID5 offset) Peripheral Identification 5 <br /></td></tr>
<tr class="separator:a55456b82aa4473e1294da9cddff8dc7f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a660196a26277134b1faa0e3cb16a45df"><td class="memItemLeft" align="right" valign="top"><a id="a660196a26277134b1faa0e3cb16a45df"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a660196a26277134b1faa0e3cb16a45df">DSU_PID5_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a660196a26277134b1faa0e3cb16a45df"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID5 reset_value) Peripheral Identification 5 <br /></td></tr>
<tr class="separator:a660196a26277134b1faa0e3cb16a45df"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5859f5a5ab794ef6639607ee21c9bfb0"><td class="memItemLeft" align="right" valign="top"><a id="a5859f5a5ab794ef6639607ee21c9bfb0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a5859f5a5ab794ef6639607ee21c9bfb0">DSU_PID5_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a5859f5a5ab794ef6639607ee21c9bfb0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID5) MASK Register <br /></td></tr>
<tr class="separator:a5859f5a5ab794ef6639607ee21c9bfb0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aef7906d7c83735893dad365a6292f4c2"><td class="memItemLeft" align="right" valign="top"><a id="aef7906d7c83735893dad365a6292f4c2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#aef7906d7c83735893dad365a6292f4c2">DSU_PID6_OFFSET</a>&#160;&#160;&#160;0x1FD8</td></tr>
<tr class="memdesc:aef7906d7c83735893dad365a6292f4c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID6 offset) Peripheral Identification 6 <br /></td></tr>
<tr class="separator:aef7906d7c83735893dad365a6292f4c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0ec56c9b11834ea4e78e4bb56f8d504d"><td class="memItemLeft" align="right" valign="top"><a id="a0ec56c9b11834ea4e78e4bb56f8d504d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a0ec56c9b11834ea4e78e4bb56f8d504d">DSU_PID6_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a0ec56c9b11834ea4e78e4bb56f8d504d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID6 reset_value) Peripheral Identification 6 <br /></td></tr>
<tr class="separator:a0ec56c9b11834ea4e78e4bb56f8d504d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac1a214954faa7cfd1597c2f5dc50b61e"><td class="memItemLeft" align="right" valign="top"><a id="ac1a214954faa7cfd1597c2f5dc50b61e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#ac1a214954faa7cfd1597c2f5dc50b61e">DSU_PID6_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:ac1a214954faa7cfd1597c2f5dc50b61e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID6) MASK Register <br /></td></tr>
<tr class="separator:ac1a214954faa7cfd1597c2f5dc50b61e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a177551481d873cd49c5348a580bb583d"><td class="memItemLeft" align="right" valign="top"><a id="a177551481d873cd49c5348a580bb583d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a177551481d873cd49c5348a580bb583d">DSU_PID7_OFFSET</a>&#160;&#160;&#160;0x1FDC</td></tr>
<tr class="memdesc:a177551481d873cd49c5348a580bb583d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID7 offset) Peripheral Identification 7 <br /></td></tr>
<tr class="separator:a177551481d873cd49c5348a580bb583d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a425f24c2e936c926f005cec6d504049a"><td class="memItemLeft" align="right" valign="top"><a id="a425f24c2e936c926f005cec6d504049a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a425f24c2e936c926f005cec6d504049a">DSU_PID7_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a425f24c2e936c926f005cec6d504049a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID7 reset_value) Peripheral Identification 7 <br /></td></tr>
<tr class="separator:a425f24c2e936c926f005cec6d504049a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a16cbaf00d0e9956cdbf2f3f627576ecc"><td class="memItemLeft" align="right" valign="top"><a id="a16cbaf00d0e9956cdbf2f3f627576ecc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a16cbaf00d0e9956cdbf2f3f627576ecc">DSU_PID7_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a16cbaf00d0e9956cdbf2f3f627576ecc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID7) MASK Register <br /></td></tr>
<tr class="separator:a16cbaf00d0e9956cdbf2f3f627576ecc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aea9d171f0922c1d3459cd94571421b57"><td class="memItemLeft" align="right" valign="top"><a id="aea9d171f0922c1d3459cd94571421b57"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#aea9d171f0922c1d3459cd94571421b57">DSU_PID0_OFFSET</a>&#160;&#160;&#160;0x1FE0</td></tr>
<tr class="memdesc:aea9d171f0922c1d3459cd94571421b57"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID0 offset) Peripheral Identification 0 <br /></td></tr>
<tr class="separator:aea9d171f0922c1d3459cd94571421b57"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afbf547350eaa735fb153d3b6dcc09408"><td class="memItemLeft" align="right" valign="top"><a id="afbf547350eaa735fb153d3b6dcc09408"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#afbf547350eaa735fb153d3b6dcc09408">DSU_PID0_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x000000D0)</td></tr>
<tr class="memdesc:afbf547350eaa735fb153d3b6dcc09408"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID0 reset_value) Peripheral Identification 0 <br /></td></tr>
<tr class="separator:afbf547350eaa735fb153d3b6dcc09408"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af2273a145c71eec0de2c40ddd80e4283"><td class="memItemLeft" align="right" valign="top"><a id="af2273a145c71eec0de2c40ddd80e4283"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#af2273a145c71eec0de2c40ddd80e4283">DSU_PID0_PARTNBL_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:af2273a145c71eec0de2c40ddd80e4283"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID0) Part Number Low <br /></td></tr>
<tr class="separator:af2273a145c71eec0de2c40ddd80e4283"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a54a82c896045decd005d66a532015c5f"><td class="memItemLeft" align="right" valign="top"><a id="a54a82c896045decd005d66a532015c5f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_PID0_PARTNBL_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF) &lt;&lt; <a class="el" href="component_2dsu_8h.html#af2273a145c71eec0de2c40ddd80e4283">DSU_PID0_PARTNBL_Pos</a>)</td></tr>
<tr class="separator:a54a82c896045decd005d66a532015c5f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7ae8e82452e6c2e7bafadf3233ca549b"><td class="memItemLeft" align="right" valign="top"><a id="a7ae8e82452e6c2e7bafadf3233ca549b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_PID0_PARTNBL</b>(value)&#160;&#160;&#160;(DSU_PID0_PARTNBL_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#af2273a145c71eec0de2c40ddd80e4283">DSU_PID0_PARTNBL_Pos</a>))</td></tr>
<tr class="separator:a7ae8e82452e6c2e7bafadf3233ca549b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae813809af590e3ba3aa212704b194593"><td class="memItemLeft" align="right" valign="top"><a id="ae813809af590e3ba3aa212704b194593"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#ae813809af590e3ba3aa212704b194593">DSU_PID0_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x000000FF)</td></tr>
<tr class="memdesc:ae813809af590e3ba3aa212704b194593"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID0) MASK Register <br /></td></tr>
<tr class="separator:ae813809af590e3ba3aa212704b194593"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1114e2adaab2fe61ed027acf899418de"><td class="memItemLeft" align="right" valign="top"><a id="a1114e2adaab2fe61ed027acf899418de"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a1114e2adaab2fe61ed027acf899418de">DSU_PID1_OFFSET</a>&#160;&#160;&#160;0x1FE4</td></tr>
<tr class="memdesc:a1114e2adaab2fe61ed027acf899418de"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID1 offset) Peripheral Identification 1 <br /></td></tr>
<tr class="separator:a1114e2adaab2fe61ed027acf899418de"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a257a59dab5e1bef2c233b637968f2786"><td class="memItemLeft" align="right" valign="top"><a id="a257a59dab5e1bef2c233b637968f2786"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a257a59dab5e1bef2c233b637968f2786">DSU_PID1_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x000000FC)</td></tr>
<tr class="memdesc:a257a59dab5e1bef2c233b637968f2786"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID1 reset_value) Peripheral Identification 1 <br /></td></tr>
<tr class="separator:a257a59dab5e1bef2c233b637968f2786"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6dff7e586efe49ba2aa268119a27218d"><td class="memItemLeft" align="right" valign="top"><a id="a6dff7e586efe49ba2aa268119a27218d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a6dff7e586efe49ba2aa268119a27218d">DSU_PID1_PARTNBH_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a6dff7e586efe49ba2aa268119a27218d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID1) Part Number High <br /></td></tr>
<tr class="separator:a6dff7e586efe49ba2aa268119a27218d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a03bce9efd137e37e8c749cdb2bdfe890"><td class="memItemLeft" align="right" valign="top"><a id="a03bce9efd137e37e8c749cdb2bdfe890"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_PID1_PARTNBH_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a6dff7e586efe49ba2aa268119a27218d">DSU_PID1_PARTNBH_Pos</a>)</td></tr>
<tr class="separator:a03bce9efd137e37e8c749cdb2bdfe890"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a61b0efd1cd16141a3808d1bad644a5aa"><td class="memItemLeft" align="right" valign="top"><a id="a61b0efd1cd16141a3808d1bad644a5aa"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_PID1_PARTNBH</b>(value)&#160;&#160;&#160;(DSU_PID1_PARTNBH_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a6dff7e586efe49ba2aa268119a27218d">DSU_PID1_PARTNBH_Pos</a>))</td></tr>
<tr class="separator:a61b0efd1cd16141a3808d1bad644a5aa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a64528557ce517ad0117a1416e03e0be9"><td class="memItemLeft" align="right" valign="top"><a id="a64528557ce517ad0117a1416e03e0be9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a64528557ce517ad0117a1416e03e0be9">DSU_PID1_JEPIDCL_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:a64528557ce517ad0117a1416e03e0be9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID1) Low part of the JEP-106 Identity Code <br /></td></tr>
<tr class="separator:a64528557ce517ad0117a1416e03e0be9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af45a07f7bcaedb965d705f1575f1438f"><td class="memItemLeft" align="right" valign="top"><a id="af45a07f7bcaedb965d705f1575f1438f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_PID1_JEPIDCL_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a64528557ce517ad0117a1416e03e0be9">DSU_PID1_JEPIDCL_Pos</a>)</td></tr>
<tr class="separator:af45a07f7bcaedb965d705f1575f1438f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aea602fc378fd5fb10111e3d8e9022cf3"><td class="memItemLeft" align="right" valign="top"><a id="aea602fc378fd5fb10111e3d8e9022cf3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_PID1_JEPIDCL</b>(value)&#160;&#160;&#160;(DSU_PID1_JEPIDCL_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a64528557ce517ad0117a1416e03e0be9">DSU_PID1_JEPIDCL_Pos</a>))</td></tr>
<tr class="separator:aea602fc378fd5fb10111e3d8e9022cf3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2398899995a62f2a20b4390051c5d269"><td class="memItemLeft" align="right" valign="top"><a id="a2398899995a62f2a20b4390051c5d269"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a2398899995a62f2a20b4390051c5d269">DSU_PID1_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x000000FF)</td></tr>
<tr class="memdesc:a2398899995a62f2a20b4390051c5d269"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID1) MASK Register <br /></td></tr>
<tr class="separator:a2398899995a62f2a20b4390051c5d269"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae848d742529a04e4fc64065f2bfde2d7"><td class="memItemLeft" align="right" valign="top"><a id="ae848d742529a04e4fc64065f2bfde2d7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#ae848d742529a04e4fc64065f2bfde2d7">DSU_PID2_OFFSET</a>&#160;&#160;&#160;0x1FE8</td></tr>
<tr class="memdesc:ae848d742529a04e4fc64065f2bfde2d7"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID2 offset) Peripheral Identification 2 <br /></td></tr>
<tr class="separator:ae848d742529a04e4fc64065f2bfde2d7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a34f08ebf29928fc5c95f018abbc6d3a3"><td class="memItemLeft" align="right" valign="top"><a id="a34f08ebf29928fc5c95f018abbc6d3a3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a34f08ebf29928fc5c95f018abbc6d3a3">DSU_PID2_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000009)</td></tr>
<tr class="memdesc:a34f08ebf29928fc5c95f018abbc6d3a3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID2 reset_value) Peripheral Identification 2 <br /></td></tr>
<tr class="separator:a34f08ebf29928fc5c95f018abbc6d3a3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4b2aa922b81ecb07b672d813558306fc"><td class="memItemLeft" align="right" valign="top"><a id="a4b2aa922b81ecb07b672d813558306fc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a4b2aa922b81ecb07b672d813558306fc">DSU_PID2_JEPIDCH_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a4b2aa922b81ecb07b672d813558306fc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID2) JEP-106 Identity Code High <br /></td></tr>
<tr class="separator:a4b2aa922b81ecb07b672d813558306fc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9aa269300c59a1466dd1e04f8bfbd7a1"><td class="memItemLeft" align="right" valign="top"><a id="a9aa269300c59a1466dd1e04f8bfbd7a1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_PID2_JEPIDCH_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a4b2aa922b81ecb07b672d813558306fc">DSU_PID2_JEPIDCH_Pos</a>)</td></tr>
<tr class="separator:a9aa269300c59a1466dd1e04f8bfbd7a1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a37fa971dc278d5f39db2207b421c5dc3"><td class="memItemLeft" align="right" valign="top"><a id="a37fa971dc278d5f39db2207b421c5dc3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_PID2_JEPIDCH</b>(value)&#160;&#160;&#160;(DSU_PID2_JEPIDCH_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a4b2aa922b81ecb07b672d813558306fc">DSU_PID2_JEPIDCH_Pos</a>))</td></tr>
<tr class="separator:a37fa971dc278d5f39db2207b421c5dc3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a88346fef117d36aa2dba1ffabc5e908a"><td class="memItemLeft" align="right" valign="top"><a id="a88346fef117d36aa2dba1ffabc5e908a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a88346fef117d36aa2dba1ffabc5e908a">DSU_PID2_JEPU_Pos</a>&#160;&#160;&#160;3</td></tr>
<tr class="memdesc:a88346fef117d36aa2dba1ffabc5e908a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID2) JEP-106 Identity Code is used <br /></td></tr>
<tr class="separator:a88346fef117d36aa2dba1ffabc5e908a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a967771691bc8307f873ebe12770a9b46"><td class="memItemLeft" align="right" valign="top"><a id="a967771691bc8307f873ebe12770a9b46"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_PID2_JEPU</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a88346fef117d36aa2dba1ffabc5e908a">DSU_PID2_JEPU_Pos</a>)</td></tr>
<tr class="separator:a967771691bc8307f873ebe12770a9b46"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:acb24de7b25b93dd1c040ed75899fd545"><td class="memItemLeft" align="right" valign="top"><a id="acb24de7b25b93dd1c040ed75899fd545"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#acb24de7b25b93dd1c040ed75899fd545">DSU_PID2_REVISION_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:acb24de7b25b93dd1c040ed75899fd545"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID2) Revision Number <br /></td></tr>
<tr class="separator:acb24de7b25b93dd1c040ed75899fd545"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a82145131b9b62c23c97969def2900d5d"><td class="memItemLeft" align="right" valign="top"><a id="a82145131b9b62c23c97969def2900d5d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_PID2_REVISION_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2dsu_8h.html#acb24de7b25b93dd1c040ed75899fd545">DSU_PID2_REVISION_Pos</a>)</td></tr>
<tr class="separator:a82145131b9b62c23c97969def2900d5d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2aded9774af773c83f88843254b3921b"><td class="memItemLeft" align="right" valign="top"><a id="a2aded9774af773c83f88843254b3921b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_PID2_REVISION</b>(value)&#160;&#160;&#160;(DSU_PID2_REVISION_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#acb24de7b25b93dd1c040ed75899fd545">DSU_PID2_REVISION_Pos</a>))</td></tr>
<tr class="separator:a2aded9774af773c83f88843254b3921b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4166d965b2c546c98a12d698fd27aa37"><td class="memItemLeft" align="right" valign="top"><a id="a4166d965b2c546c98a12d698fd27aa37"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a4166d965b2c546c98a12d698fd27aa37">DSU_PID2_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x000000FF)</td></tr>
<tr class="memdesc:a4166d965b2c546c98a12d698fd27aa37"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID2) MASK Register <br /></td></tr>
<tr class="separator:a4166d965b2c546c98a12d698fd27aa37"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0dadf53ca912be72cc37e2eddedbacfa"><td class="memItemLeft" align="right" valign="top"><a id="a0dadf53ca912be72cc37e2eddedbacfa"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a0dadf53ca912be72cc37e2eddedbacfa">DSU_PID3_OFFSET</a>&#160;&#160;&#160;0x1FEC</td></tr>
<tr class="memdesc:a0dadf53ca912be72cc37e2eddedbacfa"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID3 offset) Peripheral Identification 3 <br /></td></tr>
<tr class="separator:a0dadf53ca912be72cc37e2eddedbacfa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aaf4259207024e68a7734aa815f281bb2"><td class="memItemLeft" align="right" valign="top"><a id="aaf4259207024e68a7734aa815f281bb2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#aaf4259207024e68a7734aa815f281bb2">DSU_PID3_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:aaf4259207024e68a7734aa815f281bb2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID3 reset_value) Peripheral Identification 3 <br /></td></tr>
<tr class="separator:aaf4259207024e68a7734aa815f281bb2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab4e2a84699bcb677236554a721bbe8f4"><td class="memItemLeft" align="right" valign="top"><a id="ab4e2a84699bcb677236554a721bbe8f4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#ab4e2a84699bcb677236554a721bbe8f4">DSU_PID3_CUSMOD_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ab4e2a84699bcb677236554a721bbe8f4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID3) ARM CUSMOD <br /></td></tr>
<tr class="separator:ab4e2a84699bcb677236554a721bbe8f4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a42edeb1d05942c2e02601a8e1abebdaa"><td class="memItemLeft" align="right" valign="top"><a id="a42edeb1d05942c2e02601a8e1abebdaa"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_PID3_CUSMOD_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2dsu_8h.html#ab4e2a84699bcb677236554a721bbe8f4">DSU_PID3_CUSMOD_Pos</a>)</td></tr>
<tr class="separator:a42edeb1d05942c2e02601a8e1abebdaa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:affea388f2f5da700b0e9143232f45d37"><td class="memItemLeft" align="right" valign="top"><a id="affea388f2f5da700b0e9143232f45d37"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_PID3_CUSMOD</b>(value)&#160;&#160;&#160;(DSU_PID3_CUSMOD_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#ab4e2a84699bcb677236554a721bbe8f4">DSU_PID3_CUSMOD_Pos</a>))</td></tr>
<tr class="separator:affea388f2f5da700b0e9143232f45d37"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a10e1892be1ad4ad3d2eb63267999efb9"><td class="memItemLeft" align="right" valign="top"><a id="a10e1892be1ad4ad3d2eb63267999efb9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a10e1892be1ad4ad3d2eb63267999efb9">DSU_PID3_REVAND_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:a10e1892be1ad4ad3d2eb63267999efb9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID3) Revision Number <br /></td></tr>
<tr class="separator:a10e1892be1ad4ad3d2eb63267999efb9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8aa490a6598622e9f161af9ec209d893"><td class="memItemLeft" align="right" valign="top"><a id="a8aa490a6598622e9f161af9ec209d893"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_PID3_REVAND_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a10e1892be1ad4ad3d2eb63267999efb9">DSU_PID3_REVAND_Pos</a>)</td></tr>
<tr class="separator:a8aa490a6598622e9f161af9ec209d893"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af2028d73f3440267982dc85909f7eecc"><td class="memItemLeft" align="right" valign="top"><a id="af2028d73f3440267982dc85909f7eecc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_PID3_REVAND</b>(value)&#160;&#160;&#160;(DSU_PID3_REVAND_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a10e1892be1ad4ad3d2eb63267999efb9">DSU_PID3_REVAND_Pos</a>))</td></tr>
<tr class="separator:af2028d73f3440267982dc85909f7eecc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aeaed416954ecb7d99c60af8c7b68b8bb"><td class="memItemLeft" align="right" valign="top"><a id="aeaed416954ecb7d99c60af8c7b68b8bb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#aeaed416954ecb7d99c60af8c7b68b8bb">DSU_PID3_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x000000FF)</td></tr>
<tr class="memdesc:aeaed416954ecb7d99c60af8c7b68b8bb"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_PID3) MASK Register <br /></td></tr>
<tr class="separator:aeaed416954ecb7d99c60af8c7b68b8bb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a04d4b050a6adad9da4caf0993e010d8f"><td class="memItemLeft" align="right" valign="top"><a id="a04d4b050a6adad9da4caf0993e010d8f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a04d4b050a6adad9da4caf0993e010d8f">DSU_CID0_OFFSET</a>&#160;&#160;&#160;0x1FF0</td></tr>
<tr class="memdesc:a04d4b050a6adad9da4caf0993e010d8f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CID0 offset) Component Identification 0 <br /></td></tr>
<tr class="separator:a04d4b050a6adad9da4caf0993e010d8f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a614c4aa7339cc2b804cd773e20ca7bf5"><td class="memItemLeft" align="right" valign="top"><a id="a614c4aa7339cc2b804cd773e20ca7bf5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a614c4aa7339cc2b804cd773e20ca7bf5">DSU_CID0_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000000D)</td></tr>
<tr class="memdesc:a614c4aa7339cc2b804cd773e20ca7bf5"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CID0 reset_value) Component Identification 0 <br /></td></tr>
<tr class="separator:a614c4aa7339cc2b804cd773e20ca7bf5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a684c02c36c7acb7066c55e248c85c44e"><td class="memItemLeft" align="right" valign="top"><a id="a684c02c36c7acb7066c55e248c85c44e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a684c02c36c7acb7066c55e248c85c44e">DSU_CID0_PREAMBLEB0_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a684c02c36c7acb7066c55e248c85c44e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CID0) Preamble Byte 0 <br /></td></tr>
<tr class="separator:a684c02c36c7acb7066c55e248c85c44e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:accaacf599c31ea471efbdf7838d26de6"><td class="memItemLeft" align="right" valign="top"><a id="accaacf599c31ea471efbdf7838d26de6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_CID0_PREAMBLEB0_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a684c02c36c7acb7066c55e248c85c44e">DSU_CID0_PREAMBLEB0_Pos</a>)</td></tr>
<tr class="separator:accaacf599c31ea471efbdf7838d26de6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a38870d39881d4e6cbacc18de7a44529c"><td class="memItemLeft" align="right" valign="top"><a id="a38870d39881d4e6cbacc18de7a44529c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_CID0_PREAMBLEB0</b>(value)&#160;&#160;&#160;(DSU_CID0_PREAMBLEB0_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a684c02c36c7acb7066c55e248c85c44e">DSU_CID0_PREAMBLEB0_Pos</a>))</td></tr>
<tr class="separator:a38870d39881d4e6cbacc18de7a44529c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7c41f1841c69429dc59c6466b4fc0742"><td class="memItemLeft" align="right" valign="top"><a id="a7c41f1841c69429dc59c6466b4fc0742"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a7c41f1841c69429dc59c6466b4fc0742">DSU_CID0_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x000000FF)</td></tr>
<tr class="memdesc:a7c41f1841c69429dc59c6466b4fc0742"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CID0) MASK Register <br /></td></tr>
<tr class="separator:a7c41f1841c69429dc59c6466b4fc0742"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1000fee5818fa48da89833ca079a3a5c"><td class="memItemLeft" align="right" valign="top"><a id="a1000fee5818fa48da89833ca079a3a5c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a1000fee5818fa48da89833ca079a3a5c">DSU_CID1_OFFSET</a>&#160;&#160;&#160;0x1FF4</td></tr>
<tr class="memdesc:a1000fee5818fa48da89833ca079a3a5c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CID1 offset) Component Identification 1 <br /></td></tr>
<tr class="separator:a1000fee5818fa48da89833ca079a3a5c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0ddd2062d17bc1957afe23b2f02a46bd"><td class="memItemLeft" align="right" valign="top"><a id="a0ddd2062d17bc1957afe23b2f02a46bd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a0ddd2062d17bc1957afe23b2f02a46bd">DSU_CID1_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000010)</td></tr>
<tr class="memdesc:a0ddd2062d17bc1957afe23b2f02a46bd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CID1 reset_value) Component Identification 1 <br /></td></tr>
<tr class="separator:a0ddd2062d17bc1957afe23b2f02a46bd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7496e12eabba3a78eaef45bd496a9c89"><td class="memItemLeft" align="right" valign="top"><a id="a7496e12eabba3a78eaef45bd496a9c89"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a7496e12eabba3a78eaef45bd496a9c89">DSU_CID1_PREAMBLE_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a7496e12eabba3a78eaef45bd496a9c89"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CID1) Preamble <br /></td></tr>
<tr class="separator:a7496e12eabba3a78eaef45bd496a9c89"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a10a983b3963ff405e03427c16369b0be"><td class="memItemLeft" align="right" valign="top"><a id="a10a983b3963ff405e03427c16369b0be"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_CID1_PREAMBLE_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a7496e12eabba3a78eaef45bd496a9c89">DSU_CID1_PREAMBLE_Pos</a>)</td></tr>
<tr class="separator:a10a983b3963ff405e03427c16369b0be"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac5f44f703f59fd2e482381626a483701"><td class="memItemLeft" align="right" valign="top"><a id="ac5f44f703f59fd2e482381626a483701"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_CID1_PREAMBLE</b>(value)&#160;&#160;&#160;(DSU_CID1_PREAMBLE_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a7496e12eabba3a78eaef45bd496a9c89">DSU_CID1_PREAMBLE_Pos</a>))</td></tr>
<tr class="separator:ac5f44f703f59fd2e482381626a483701"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa505d5dbcb38fd84adf608eaaa7948a6"><td class="memItemLeft" align="right" valign="top"><a id="aa505d5dbcb38fd84adf608eaaa7948a6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#aa505d5dbcb38fd84adf608eaaa7948a6">DSU_CID1_CCLASS_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:aa505d5dbcb38fd84adf608eaaa7948a6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CID1) Component Class <br /></td></tr>
<tr class="separator:aa505d5dbcb38fd84adf608eaaa7948a6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4266168966ac857f7f418fa53692dc42"><td class="memItemLeft" align="right" valign="top"><a id="a4266168966ac857f7f418fa53692dc42"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_CID1_CCLASS_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2dsu_8h.html#aa505d5dbcb38fd84adf608eaaa7948a6">DSU_CID1_CCLASS_Pos</a>)</td></tr>
<tr class="separator:a4266168966ac857f7f418fa53692dc42"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab1b3d33d5908526ca1032a0ac8d792a1"><td class="memItemLeft" align="right" valign="top"><a id="ab1b3d33d5908526ca1032a0ac8d792a1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_CID1_CCLASS</b>(value)&#160;&#160;&#160;(DSU_CID1_CCLASS_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#aa505d5dbcb38fd84adf608eaaa7948a6">DSU_CID1_CCLASS_Pos</a>))</td></tr>
<tr class="separator:ab1b3d33d5908526ca1032a0ac8d792a1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab3c48e6716c2288f0cbecf4a4991dcff"><td class="memItemLeft" align="right" valign="top"><a id="ab3c48e6716c2288f0cbecf4a4991dcff"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#ab3c48e6716c2288f0cbecf4a4991dcff">DSU_CID1_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x000000FF)</td></tr>
<tr class="memdesc:ab3c48e6716c2288f0cbecf4a4991dcff"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CID1) MASK Register <br /></td></tr>
<tr class="separator:ab3c48e6716c2288f0cbecf4a4991dcff"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab07b638d6710bb917955217815dcd84e"><td class="memItemLeft" align="right" valign="top"><a id="ab07b638d6710bb917955217815dcd84e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#ab07b638d6710bb917955217815dcd84e">DSU_CID2_OFFSET</a>&#160;&#160;&#160;0x1FF8</td></tr>
<tr class="memdesc:ab07b638d6710bb917955217815dcd84e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CID2 offset) Component Identification 2 <br /></td></tr>
<tr class="separator:ab07b638d6710bb917955217815dcd84e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0276c33d43081b5c8cd478b611723f36"><td class="memItemLeft" align="right" valign="top"><a id="a0276c33d43081b5c8cd478b611723f36"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a0276c33d43081b5c8cd478b611723f36">DSU_CID2_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000005)</td></tr>
<tr class="memdesc:a0276c33d43081b5c8cd478b611723f36"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CID2 reset_value) Component Identification 2 <br /></td></tr>
<tr class="separator:a0276c33d43081b5c8cd478b611723f36"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a755afb0dc289f0eeaaf805636836da72"><td class="memItemLeft" align="right" valign="top"><a id="a755afb0dc289f0eeaaf805636836da72"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a755afb0dc289f0eeaaf805636836da72">DSU_CID2_PREAMBLEB2_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a755afb0dc289f0eeaaf805636836da72"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CID2) Preamble Byte 2 <br /></td></tr>
<tr class="separator:a755afb0dc289f0eeaaf805636836da72"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac588c40c7349a7b9803a8e38bfe9118a"><td class="memItemLeft" align="right" valign="top"><a id="ac588c40c7349a7b9803a8e38bfe9118a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_CID2_PREAMBLEB2_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a755afb0dc289f0eeaaf805636836da72">DSU_CID2_PREAMBLEB2_Pos</a>)</td></tr>
<tr class="separator:ac588c40c7349a7b9803a8e38bfe9118a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a826f45b240e84f67a102fd541f6184f1"><td class="memItemLeft" align="right" valign="top"><a id="a826f45b240e84f67a102fd541f6184f1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_CID2_PREAMBLEB2</b>(value)&#160;&#160;&#160;(DSU_CID2_PREAMBLEB2_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#a755afb0dc289f0eeaaf805636836da72">DSU_CID2_PREAMBLEB2_Pos</a>))</td></tr>
<tr class="separator:a826f45b240e84f67a102fd541f6184f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aedee750a7bad4de75131402ddea84c91"><td class="memItemLeft" align="right" valign="top"><a id="aedee750a7bad4de75131402ddea84c91"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#aedee750a7bad4de75131402ddea84c91">DSU_CID2_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x000000FF)</td></tr>
<tr class="memdesc:aedee750a7bad4de75131402ddea84c91"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CID2) MASK Register <br /></td></tr>
<tr class="separator:aedee750a7bad4de75131402ddea84c91"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9863199733ba4498f102f28fc2c40021"><td class="memItemLeft" align="right" valign="top"><a id="a9863199733ba4498f102f28fc2c40021"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a9863199733ba4498f102f28fc2c40021">DSU_CID3_OFFSET</a>&#160;&#160;&#160;0x1FFC</td></tr>
<tr class="memdesc:a9863199733ba4498f102f28fc2c40021"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CID3 offset) Component Identification 3 <br /></td></tr>
<tr class="separator:a9863199733ba4498f102f28fc2c40021"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8cfe3b4da150c87da70eccd4c07280f4"><td class="memItemLeft" align="right" valign="top"><a id="a8cfe3b4da150c87da70eccd4c07280f4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a8cfe3b4da150c87da70eccd4c07280f4">DSU_CID3_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x000000B1)</td></tr>
<tr class="memdesc:a8cfe3b4da150c87da70eccd4c07280f4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CID3 reset_value) Component Identification 3 <br /></td></tr>
<tr class="separator:a8cfe3b4da150c87da70eccd4c07280f4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad11a14455b5f888c07616d9c56808b09"><td class="memItemLeft" align="right" valign="top"><a id="ad11a14455b5f888c07616d9c56808b09"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#ad11a14455b5f888c07616d9c56808b09">DSU_CID3_PREAMBLEB3_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ad11a14455b5f888c07616d9c56808b09"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CID3) Preamble Byte 3 <br /></td></tr>
<tr class="separator:ad11a14455b5f888c07616d9c56808b09"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a371986d5abba79b7e4389d750150cad1"><td class="memItemLeft" align="right" valign="top"><a id="a371986d5abba79b7e4389d750150cad1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_CID3_PREAMBLEB3_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF) &lt;&lt; <a class="el" href="component_2dsu_8h.html#ad11a14455b5f888c07616d9c56808b09">DSU_CID3_PREAMBLEB3_Pos</a>)</td></tr>
<tr class="separator:a371986d5abba79b7e4389d750150cad1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa750f726cef165ba74dd6469057fa7d9"><td class="memItemLeft" align="right" valign="top"><a id="aa750f726cef165ba74dd6469057fa7d9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>DSU_CID3_PREAMBLEB3</b>(value)&#160;&#160;&#160;(DSU_CID3_PREAMBLEB3_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2dsu_8h.html#ad11a14455b5f888c07616d9c56808b09">DSU_CID3_PREAMBLEB3_Pos</a>))</td></tr>
<tr class="separator:aa750f726cef165ba74dd6469057fa7d9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7b551efb4b690585f91a21e36b24215f"><td class="memItemLeft" align="right" valign="top"><a id="a7b551efb4b690585f91a21e36b24215f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dsu_8h.html#a7b551efb4b690585f91a21e36b24215f">DSU_CID3_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x000000FF)</td></tr>
<tr class="memdesc:a7b551efb4b690585f91a21e36b24215f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(DSU_CID3) MASK Register <br /></td></tr>
<tr class="separator:a7b551efb4b690585f91a21e36b24215f"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Component description for DSU. </p>
<p>Copyright (c) 2019 Microchip Technology Inc.</p>
<p>\asf_license_start </p>
<p class="definition">Definition in file <a class="el" href="component_2dsu_8h_source.html">dsu.h</a>.</p>
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<a href="component_2dsu_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_DSU_COMPONENT_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_DSU_COMPONENT_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160; </div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define DSU_U2410</span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define REV_DSU 0x100</span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160; </div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="comment">/* -------- DSU_CTRL : (DSU Offset: 0x0000) ( /W 8) Control -------- */</span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00044"></a><span class="lineno"><a class="line" href="unionDSU__CTRL__Type.html"> 44</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00046"></a><span class="lineno"><a class="line" href="unionDSU__CTRL__Type.html#a73a94d5d5c3dc5b218c6bc1e4bc6165d"> 46</a></span>&#160; uint8_t <a class="code" href="unionDSU__CTRL__Type.html#a73a94d5d5c3dc5b218c6bc1e4bc6165d">SWRST</a>:1; </div>
<div class="line"><a name="l00047"></a><span class="lineno"><a class="line" href="unionDSU__CTRL__Type.html#a97980a8d19e1c87006e54c0a0d30972e"> 47</a></span>&#160; uint8_t :1; </div>
<div class="line"><a name="l00048"></a><span class="lineno"><a class="line" href="unionDSU__CTRL__Type.html#a9a351c7d3ed4db72fe199f29441b24e4"> 48</a></span>&#160; uint8_t <a class="code" href="unionDSU__CTRL__Type.html#a9a351c7d3ed4db72fe199f29441b24e4">CRC</a>:1; </div>
<div class="line"><a name="l00049"></a><span class="lineno"><a class="line" href="unionDSU__CTRL__Type.html#a0b11d4226d2417422ef909e10ed17bc9"> 49</a></span>&#160; uint8_t <a class="code" href="unionDSU__CTRL__Type.html#a0b11d4226d2417422ef909e10ed17bc9">MBIST</a>:1; </div>
<div class="line"><a name="l00050"></a><span class="lineno"><a class="line" href="unionDSU__CTRL__Type.html#a197b7e23186112885542ca537e8083ba"> 50</a></span>&#160; uint8_t <a class="code" href="unionDSU__CTRL__Type.html#a197b7e23186112885542ca537e8083ba">CE</a>:1; </div>
<div class="line"><a name="l00051"></a><span class="lineno"><a class="line" href="unionDSU__CTRL__Type.html#aa9101a767b137142f96f342663dd7bab"> 51</a></span>&#160; uint8_t :1; </div>
<div class="line"><a name="l00052"></a><span class="lineno"><a class="line" href="unionDSU__CTRL__Type.html#a65fe38370088ef03ea4be1a7e98d91b6"> 52</a></span>&#160; uint8_t <a class="code" href="unionDSU__CTRL__Type.html#a65fe38370088ef03ea4be1a7e98d91b6">ARR</a>:1; </div>
<div class="line"><a name="l00053"></a><span class="lineno"><a class="line" href="unionDSU__CTRL__Type.html#a88845326ae957d9f9ce3c15a0cac4963"> 53</a></span>&#160; uint8_t <a class="code" href="unionDSU__CTRL__Type.html#a88845326ae957d9f9ce3c15a0cac4963">SMSA</a>:1; </div>
<div class="line"><a name="l00054"></a><span class="lineno"><a class="line" href="unionDSU__CTRL__Type.html#a4167e608f1d7690780cb6fd31b74bc00"> 54</a></span>&#160; } bit; </div>
<div class="line"><a name="l00055"></a><span class="lineno"><a class="line" href="unionDSU__CTRL__Type.html#aead0ceef9a72bc2e2e07d865be80b89c"> 55</a></span>&#160; uint8_t <a class="code" href="unionDSU__CTRL__Type.html#aead0ceef9a72bc2e2e07d865be80b89c">reg</a>; </div>
<div class="line"><a name="l00056"></a><span class="lineno"> 56</span>&#160;} <a class="code" href="unionDSU__CTRL__Type.html">DSU_CTRL_Type</a>;</div>
<div class="line"><a name="l00057"></a><span class="lineno"> 57</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00058"></a><span class="lineno"> 58</span>&#160; </div>
<div class="line"><a name="l00059"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a16d35bf197958eb309724f1d0fd8e842"> 59</a></span>&#160;<span class="preprocessor">#define DSU_CTRL_OFFSET 0x0000 </span></div>
<div class="line"><a name="l00060"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a2d27ac9a8ec8798ed407281b387c2fd0"> 60</a></span>&#160;<span class="preprocessor">#define DSU_CTRL_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00062"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a2d08bbc3f34f53bc95415ac1c3d2ae72"> 62</a></span>&#160;<span class="preprocessor">#define DSU_CTRL_SWRST_Pos 0 </span></div>
<div class="line"><a name="l00063"></a><span class="lineno"> 63</span>&#160;<span class="preprocessor">#define DSU_CTRL_SWRST (_U_(0x1) &lt;&lt; DSU_CTRL_SWRST_Pos)</span></div>
<div class="line"><a name="l00064"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a3f42a18f629eccf5698c46d591b827bc"> 64</a></span>&#160;<span class="preprocessor">#define DSU_CTRL_CRC_Pos 2 </span></div>
<div class="line"><a name="l00065"></a><span class="lineno"> 65</span>&#160;<span class="preprocessor">#define DSU_CTRL_CRC (_U_(0x1) &lt;&lt; DSU_CTRL_CRC_Pos)</span></div>
<div class="line"><a name="l00066"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ae2f8bb8c8fde9739e8e15e76b5a052fc"> 66</a></span>&#160;<span class="preprocessor">#define DSU_CTRL_MBIST_Pos 3 </span></div>
<div class="line"><a name="l00067"></a><span class="lineno"> 67</span>&#160;<span class="preprocessor">#define DSU_CTRL_MBIST (_U_(0x1) &lt;&lt; DSU_CTRL_MBIST_Pos)</span></div>
<div class="line"><a name="l00068"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aef5ca1fd2f78e579bae1661fb54ccae7"> 68</a></span>&#160;<span class="preprocessor">#define DSU_CTRL_CE_Pos 4 </span></div>
<div class="line"><a name="l00069"></a><span class="lineno"> 69</span>&#160;<span class="preprocessor">#define DSU_CTRL_CE (_U_(0x1) &lt;&lt; DSU_CTRL_CE_Pos)</span></div>
<div class="line"><a name="l00070"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a73ceacd04bd9669ed1853da944fa0c4a"> 70</a></span>&#160;<span class="preprocessor">#define DSU_CTRL_ARR_Pos 6 </span></div>
<div class="line"><a name="l00071"></a><span class="lineno"> 71</span>&#160;<span class="preprocessor">#define DSU_CTRL_ARR (_U_(0x1) &lt;&lt; DSU_CTRL_ARR_Pos)</span></div>
<div class="line"><a name="l00072"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ae5bcaa4f2c2619c8cedb1672a23bb902"> 72</a></span>&#160;<span class="preprocessor">#define DSU_CTRL_SMSA_Pos 7 </span></div>
<div class="line"><a name="l00073"></a><span class="lineno"> 73</span>&#160;<span class="preprocessor">#define DSU_CTRL_SMSA (_U_(0x1) &lt;&lt; DSU_CTRL_SMSA_Pos)</span></div>
<div class="line"><a name="l00074"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ad7cc167d8a8791942e3149bd93278134"> 74</a></span>&#160;<span class="preprocessor">#define DSU_CTRL_MASK _U_(0xDD) </span></div>
<div class="line"><a name="l00076"></a><span class="lineno"> 76</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DSU_STATUSA : (DSU Offset: 0x0001) (R/W 8) Status A -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00077"></a><span class="lineno"> 77</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00078"></a><span class="lineno"><a class="line" href="unionDSU__STATUSA__Type.html"> 78</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00079"></a><span class="lineno"> 79</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00080"></a><span class="lineno"><a class="line" href="unionDSU__STATUSA__Type.html#aff619e1a118784b3e8600a50128db18c"> 80</a></span>&#160; uint8_t <a class="code" href="unionDSU__STATUSA__Type.html#aff619e1a118784b3e8600a50128db18c">DONE</a>:1; </div>
<div class="line"><a name="l00081"></a><span class="lineno"><a class="line" href="unionDSU__STATUSA__Type.html#aa8f9dffc31935fc4537884bf167786df"> 81</a></span>&#160; uint8_t <a class="code" href="unionDSU__STATUSA__Type.html#aa8f9dffc31935fc4537884bf167786df">CRSTEXT</a>:1; </div>
<div class="line"><a name="l00082"></a><span class="lineno"><a class="line" href="unionDSU__STATUSA__Type.html#a23415dfa2ba81d7e98774bd358c40db8"> 82</a></span>&#160; uint8_t <a class="code" href="unionDSU__STATUSA__Type.html#a23415dfa2ba81d7e98774bd358c40db8">BERR</a>:1; </div>
<div class="line"><a name="l00083"></a><span class="lineno"><a class="line" href="unionDSU__STATUSA__Type.html#aba8f270d5cf8d7fee472b5888bea81b8"> 83</a></span>&#160; uint8_t <a class="code" href="unionDSU__STATUSA__Type.html#aba8f270d5cf8d7fee472b5888bea81b8">FAIL</a>:1; </div>
<div class="line"><a name="l00084"></a><span class="lineno"><a class="line" href="unionDSU__STATUSA__Type.html#a8fefe4470a39f6ef4547a501dbf028b0"> 84</a></span>&#160; uint8_t <a class="code" href="unionDSU__STATUSA__Type.html#a8fefe4470a39f6ef4547a501dbf028b0">PERR</a>:1; </div>
<div class="line"><a name="l00085"></a><span class="lineno"><a class="line" href="unionDSU__STATUSA__Type.html#ad940916414d8eba905957b05b8900090"> 85</a></span>&#160; uint8_t :3; </div>
<div class="line"><a name="l00086"></a><span class="lineno"><a class="line" href="unionDSU__STATUSA__Type.html#ae63ac3449df4f73e33d01958bb6e45da"> 86</a></span>&#160; } bit; </div>
<div class="line"><a name="l00087"></a><span class="lineno"><a class="line" href="unionDSU__STATUSA__Type.html#a6c012a1306fb8f409347e5a8a333998a"> 87</a></span>&#160; uint8_t <a class="code" href="unionDSU__STATUSA__Type.html#a6c012a1306fb8f409347e5a8a333998a">reg</a>; </div>
<div class="line"><a name="l00088"></a><span class="lineno"> 88</span>&#160;} <a class="code" href="unionDSU__STATUSA__Type.html">DSU_STATUSA_Type</a>;</div>
<div class="line"><a name="l00089"></a><span class="lineno"> 89</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00090"></a><span class="lineno"> 90</span>&#160; </div>
<div class="line"><a name="l00091"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a5bbcb19f47173c3bdee8ce58b612eac0"> 91</a></span>&#160;<span class="preprocessor">#define DSU_STATUSA_OFFSET 0x0001 </span></div>
<div class="line"><a name="l00092"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a39ce3f6cadacf2ea11a0e8ab5d6bcd4b"> 92</a></span>&#160;<span class="preprocessor">#define DSU_STATUSA_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00094"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a608007c6aa3ae0221483e370d9ca999b"> 94</a></span>&#160;<span class="preprocessor">#define DSU_STATUSA_DONE_Pos 0 </span></div>
<div class="line"><a name="l00095"></a><span class="lineno"> 95</span>&#160;<span class="preprocessor">#define DSU_STATUSA_DONE (_U_(0x1) &lt;&lt; DSU_STATUSA_DONE_Pos)</span></div>
<div class="line"><a name="l00096"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ab5c6d644e1ec7f67cf2a9ad97a5262a2"> 96</a></span>&#160;<span class="preprocessor">#define DSU_STATUSA_CRSTEXT_Pos 1 </span></div>
<div class="line"><a name="l00097"></a><span class="lineno"> 97</span>&#160;<span class="preprocessor">#define DSU_STATUSA_CRSTEXT (_U_(0x1) &lt;&lt; DSU_STATUSA_CRSTEXT_Pos)</span></div>
<div class="line"><a name="l00098"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#afa02b78e838184c6f5a895f0f16c213a"> 98</a></span>&#160;<span class="preprocessor">#define DSU_STATUSA_BERR_Pos 2 </span></div>
<div class="line"><a name="l00099"></a><span class="lineno"> 99</span>&#160;<span class="preprocessor">#define DSU_STATUSA_BERR (_U_(0x1) &lt;&lt; DSU_STATUSA_BERR_Pos)</span></div>
<div class="line"><a name="l00100"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a379cd81ca596d64fff4cdf4cd0642e9d"> 100</a></span>&#160;<span class="preprocessor">#define DSU_STATUSA_FAIL_Pos 3 </span></div>
<div class="line"><a name="l00101"></a><span class="lineno"> 101</span>&#160;<span class="preprocessor">#define DSU_STATUSA_FAIL (_U_(0x1) &lt;&lt; DSU_STATUSA_FAIL_Pos)</span></div>
<div class="line"><a name="l00102"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a2d5f7f64db290d822709d358b9d8baf6"> 102</a></span>&#160;<span class="preprocessor">#define DSU_STATUSA_PERR_Pos 4 </span></div>
<div class="line"><a name="l00103"></a><span class="lineno"> 103</span>&#160;<span class="preprocessor">#define DSU_STATUSA_PERR (_U_(0x1) &lt;&lt; DSU_STATUSA_PERR_Pos)</span></div>
<div class="line"><a name="l00104"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a054a84324fddaaecb1b58f35c2314bc7"> 104</a></span>&#160;<span class="preprocessor">#define DSU_STATUSA_MASK _U_(0x1F) </span></div>
<div class="line"><a name="l00106"></a><span class="lineno"> 106</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DSU_STATUSB : (DSU Offset: 0x0002) (R/ 8) Status B -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00107"></a><span class="lineno"> 107</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00108"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html"> 108</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00109"></a><span class="lineno"> 109</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00110"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html#a9db72198105203a1f2a2408e0cea70d9"> 110</a></span>&#160; uint8_t <a class="code" href="unionDSU__STATUSB__Type.html#a9db72198105203a1f2a2408e0cea70d9">PROT</a>:1; </div>
<div class="line"><a name="l00111"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html#aad7ae489397e242eeaa42e11e32654ec"> 111</a></span>&#160; uint8_t <a class="code" href="unionDSU__STATUSB__Type.html#aad7ae489397e242eeaa42e11e32654ec">DBGPRES</a>:1; </div>
<div class="line"><a name="l00112"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html#ad3344aa28fed34c08fe7c730282fb40d"> 112</a></span>&#160; uint8_t <a class="code" href="unionDSU__STATUSB__Type.html#ad3344aa28fed34c08fe7c730282fb40d">DCCD0</a>:1; </div>
<div class="line"><a name="l00113"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html#a3d465bfe936ba897bb74af320f5cc41a"> 113</a></span>&#160; uint8_t <a class="code" href="unionDSU__STATUSB__Type.html#a3d465bfe936ba897bb74af320f5cc41a">DCCD1</a>:1; </div>
<div class="line"><a name="l00114"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html#a8d1bbe448ed8ffb57221323c43f585c3"> 114</a></span>&#160; uint8_t <a class="code" href="unionDSU__STATUSB__Type.html#a8d1bbe448ed8ffb57221323c43f585c3">HPE</a>:1; </div>
<div class="line"><a name="l00115"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html#aeeaaab9cca0305cf41d31c2861a3190b"> 115</a></span>&#160; uint8_t <a class="code" href="unionDSU__STATUSB__Type.html#aeeaaab9cca0305cf41d31c2861a3190b">CELCK</a>:1; </div>
<div class="line"><a name="l00116"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html#a204d4c32c3f4708b2e7747717d1645f2"> 116</a></span>&#160; uint8_t :2; </div>
<div class="line"><a name="l00117"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html#a891988851b7eae496c16939a2df954ce"> 117</a></span>&#160; } bit; </div>
<div class="line"><a name="l00118"></a><span class="lineno"> 118</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00119"></a><span class="lineno"> 119</span>&#160; uint8_t :2; </div>
<div class="line"><a name="l00120"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html#a952de07a52a1d8d6e928126ebcbc6d7b"> 120</a></span>&#160; uint8_t <a class="code" href="unionDSU__STATUSB__Type.html#a952de07a52a1d8d6e928126ebcbc6d7b">DCCD</a>:2; </div>
<div class="line"><a name="l00121"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html#a7639bdd3ca46a925307b2b86e0066999"> 121</a></span>&#160; uint8_t :4; </div>
<div class="line"><a name="l00122"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html#a40e3bfafad34350ec761082269142cff"> 122</a></span>&#160; } vec; </div>
<div class="line"><a name="l00123"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html#aa96f9c8c3695cc1a4535a02983201946"> 123</a></span>&#160; uint8_t <a class="code" href="unionDSU__STATUSB__Type.html#aa96f9c8c3695cc1a4535a02983201946">reg</a>; </div>
<div class="line"><a name="l00124"></a><span class="lineno"> 124</span>&#160;} <a class="code" href="unionDSU__STATUSB__Type.html">DSU_STATUSB_Type</a>;</div>
<div class="line"><a name="l00125"></a><span class="lineno"> 125</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00126"></a><span class="lineno"> 126</span>&#160; </div>
<div class="line"><a name="l00127"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a6633a1098b38470e1cefd46795f0cf93"> 127</a></span>&#160;<span class="preprocessor">#define DSU_STATUSB_OFFSET 0x0002 </span></div>
<div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aef2faaac59541260b63b58569da04dee"> 128</a></span>&#160;<span class="preprocessor">#define DSU_STATUSB_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00130"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#acd0a6b404b8ba52afe784b653e1b4ee7"> 130</a></span>&#160;<span class="preprocessor">#define DSU_STATUSB_PROT_Pos 0 </span></div>
<div class="line"><a name="l00131"></a><span class="lineno"> 131</span>&#160;<span class="preprocessor">#define DSU_STATUSB_PROT (_U_(0x1) &lt;&lt; DSU_STATUSB_PROT_Pos)</span></div>
<div class="line"><a name="l00132"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a36bd47009661963b8c71c9dc4cb62ecb"> 132</a></span>&#160;<span class="preprocessor">#define DSU_STATUSB_DBGPRES_Pos 1 </span></div>
<div class="line"><a name="l00133"></a><span class="lineno"> 133</span>&#160;<span class="preprocessor">#define DSU_STATUSB_DBGPRES (_U_(0x1) &lt;&lt; DSU_STATUSB_DBGPRES_Pos)</span></div>
<div class="line"><a name="l00134"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#adc27fc361eacd9fdd30cad6459bdc7c4"> 134</a></span>&#160;<span class="preprocessor">#define DSU_STATUSB_DCCD0_Pos 2 </span></div>
<div class="line"><a name="l00135"></a><span class="lineno"> 135</span>&#160;<span class="preprocessor">#define DSU_STATUSB_DCCD0 (_U_(1) &lt;&lt; DSU_STATUSB_DCCD0_Pos)</span></div>
<div class="line"><a name="l00136"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a43c23fdfaa496f809db2e9b7d0bea8a9"> 136</a></span>&#160;<span class="preprocessor">#define DSU_STATUSB_DCCD1_Pos 3 </span></div>
<div class="line"><a name="l00137"></a><span class="lineno"> 137</span>&#160;<span class="preprocessor">#define DSU_STATUSB_DCCD1 (_U_(1) &lt;&lt; DSU_STATUSB_DCCD1_Pos)</span></div>
<div class="line"><a name="l00138"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a93a180646ddd3ecc99793ef1b5bde5aa"> 138</a></span>&#160;<span class="preprocessor">#define DSU_STATUSB_DCCD_Pos 2 </span></div>
<div class="line"><a name="l00139"></a><span class="lineno"> 139</span>&#160;<span class="preprocessor">#define DSU_STATUSB_DCCD_Msk (_U_(0x3) &lt;&lt; DSU_STATUSB_DCCD_Pos)</span></div>
<div class="line"><a name="l00140"></a><span class="lineno"> 140</span>&#160;<span class="preprocessor">#define DSU_STATUSB_DCCD(value) (DSU_STATUSB_DCCD_Msk &amp; ((value) &lt;&lt; DSU_STATUSB_DCCD_Pos))</span></div>
<div class="line"><a name="l00141"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a99433528b614cd9294b33c828a1a5003"> 141</a></span>&#160;<span class="preprocessor">#define DSU_STATUSB_HPE_Pos 4 </span></div>
<div class="line"><a name="l00142"></a><span class="lineno"> 142</span>&#160;<span class="preprocessor">#define DSU_STATUSB_HPE (_U_(0x1) &lt;&lt; DSU_STATUSB_HPE_Pos)</span></div>
<div class="line"><a name="l00143"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aa99f386d6e5e61367d5e06aaab7ccb54"> 143</a></span>&#160;<span class="preprocessor">#define DSU_STATUSB_CELCK_Pos 5 </span></div>
<div class="line"><a name="l00144"></a><span class="lineno"> 144</span>&#160;<span class="preprocessor">#define DSU_STATUSB_CELCK (_U_(0x1) &lt;&lt; DSU_STATUSB_CELCK_Pos)</span></div>
<div class="line"><a name="l00145"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a81d42e65d6d856087a32f89cd8ebcc23"> 145</a></span>&#160;<span class="preprocessor">#define DSU_STATUSB_MASK _U_(0x3F) </span></div>
<div class="line"><a name="l00147"></a><span class="lineno"> 147</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DSU_ADDR : (DSU Offset: 0x0004) (R/W 32) Address -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00148"></a><span class="lineno"> 148</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00149"></a><span class="lineno"><a class="line" href="unionDSU__ADDR__Type.html"> 149</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00150"></a><span class="lineno"> 150</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00151"></a><span class="lineno"><a class="line" href="unionDSU__ADDR__Type.html#a3504f788bdf784989bb670de25fd26a7"> 151</a></span>&#160; uint32_t <a class="code" href="unionDSU__ADDR__Type.html#a3504f788bdf784989bb670de25fd26a7">AMOD</a>:2; </div>
<div class="line"><a name="l00152"></a><span class="lineno"><a class="line" href="unionDSU__ADDR__Type.html#af80527c464042fc13266915c73e62ef4"> 152</a></span>&#160; uint32_t <a class="code" href="unionDSU__ADDR__Type.html#af80527c464042fc13266915c73e62ef4">ADDR</a>:30; </div>
<div class="line"><a name="l00153"></a><span class="lineno"><a class="line" href="unionDSU__ADDR__Type.html#a91f3dee4dbbdbb0e083aa37e5b6a7f14"> 153</a></span>&#160; } bit; </div>
<div class="line"><a name="l00154"></a><span class="lineno"><a class="line" href="unionDSU__ADDR__Type.html#a21c57af42627a2ac52a4e1599582c241"> 154</a></span>&#160; uint32_t <a class="code" href="unionDSU__ADDR__Type.html#a21c57af42627a2ac52a4e1599582c241">reg</a>; </div>
<div class="line"><a name="l00155"></a><span class="lineno"> 155</span>&#160;} <a class="code" href="unionDSU__ADDR__Type.html">DSU_ADDR_Type</a>;</div>
<div class="line"><a name="l00156"></a><span class="lineno"> 156</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00157"></a><span class="lineno"> 157</span>&#160; </div>
<div class="line"><a name="l00158"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#abf4bde31f974267a5be16e838fb4c385"> 158</a></span>&#160;<span class="preprocessor">#define DSU_ADDR_OFFSET 0x0004 </span></div>
<div class="line"><a name="l00159"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a20348917b1dead19b4cf118c7470c2e4"> 159</a></span>&#160;<span class="preprocessor">#define DSU_ADDR_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00161"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ad4121595b48dfe29aaec9b674634bc57"> 161</a></span>&#160;<span class="preprocessor">#define DSU_ADDR_AMOD_Pos 0 </span></div>
<div class="line"><a name="l00162"></a><span class="lineno"> 162</span>&#160;<span class="preprocessor">#define DSU_ADDR_AMOD_Msk (_U_(0x3) &lt;&lt; DSU_ADDR_AMOD_Pos)</span></div>
<div class="line"><a name="l00163"></a><span class="lineno"> 163</span>&#160;<span class="preprocessor">#define DSU_ADDR_AMOD(value) (DSU_ADDR_AMOD_Msk &amp; ((value) &lt;&lt; DSU_ADDR_AMOD_Pos))</span></div>
<div class="line"><a name="l00164"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a028619d29a30f3abc4ff67ce0797952c"> 164</a></span>&#160;<span class="preprocessor">#define DSU_ADDR_ADDR_Pos 2 </span></div>
<div class="line"><a name="l00165"></a><span class="lineno"> 165</span>&#160;<span class="preprocessor">#define DSU_ADDR_ADDR_Msk (_U_(0x3FFFFFFF) &lt;&lt; DSU_ADDR_ADDR_Pos)</span></div>
<div class="line"><a name="l00166"></a><span class="lineno"> 166</span>&#160;<span class="preprocessor">#define DSU_ADDR_ADDR(value) (DSU_ADDR_ADDR_Msk &amp; ((value) &lt;&lt; DSU_ADDR_ADDR_Pos))</span></div>
<div class="line"><a name="l00167"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#adfb5c4d624bfbe3736315ad712fc3238"> 167</a></span>&#160;<span class="preprocessor">#define DSU_ADDR_MASK _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00169"></a><span class="lineno"> 169</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DSU_LENGTH : (DSU Offset: 0x0008) (R/W 32) Length -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00170"></a><span class="lineno"> 170</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00171"></a><span class="lineno"><a class="line" href="unionDSU__LENGTH__Type.html"> 171</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00172"></a><span class="lineno"> 172</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00173"></a><span class="lineno"><a class="line" href="unionDSU__LENGTH__Type.html#a470b7f7a7c53103929dfeb355678b0a2"> 173</a></span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00174"></a><span class="lineno"><a class="line" href="unionDSU__LENGTH__Type.html#adadf43167c8c012916cd60e1916a93f3"> 174</a></span>&#160; uint32_t <a class="code" href="unionDSU__LENGTH__Type.html#adadf43167c8c012916cd60e1916a93f3">LENGTH</a>:30; </div>
<div class="line"><a name="l00175"></a><span class="lineno"><a class="line" href="unionDSU__LENGTH__Type.html#ae4348e05f57a8576985d572a31edfedb"> 175</a></span>&#160; } bit; </div>
<div class="line"><a name="l00176"></a><span class="lineno"><a class="line" href="unionDSU__LENGTH__Type.html#a6c1bdd63165dd29edf1dc8a4d775cffb"> 176</a></span>&#160; uint32_t <a class="code" href="unionDSU__LENGTH__Type.html#a6c1bdd63165dd29edf1dc8a4d775cffb">reg</a>; </div>
<div class="line"><a name="l00177"></a><span class="lineno"> 177</span>&#160;} <a class="code" href="unionDSU__LENGTH__Type.html">DSU_LENGTH_Type</a>;</div>
<div class="line"><a name="l00178"></a><span class="lineno"> 178</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00179"></a><span class="lineno"> 179</span>&#160; </div>
<div class="line"><a name="l00180"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aa51326ede30d0596a90a8758846527b9"> 180</a></span>&#160;<span class="preprocessor">#define DSU_LENGTH_OFFSET 0x0008 </span></div>
<div class="line"><a name="l00181"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a055ab4dd190617fd309ed8db03c185ac"> 181</a></span>&#160;<span class="preprocessor">#define DSU_LENGTH_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00183"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a6aa7babac0719eb769c08ca1a945aa57"> 183</a></span>&#160;<span class="preprocessor">#define DSU_LENGTH_LENGTH_Pos 2 </span></div>
<div class="line"><a name="l00184"></a><span class="lineno"> 184</span>&#160;<span class="preprocessor">#define DSU_LENGTH_LENGTH_Msk (_U_(0x3FFFFFFF) &lt;&lt; DSU_LENGTH_LENGTH_Pos)</span></div>
<div class="line"><a name="l00185"></a><span class="lineno"> 185</span>&#160;<span class="preprocessor">#define DSU_LENGTH_LENGTH(value) (DSU_LENGTH_LENGTH_Msk &amp; ((value) &lt;&lt; DSU_LENGTH_LENGTH_Pos))</span></div>
<div class="line"><a name="l00186"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a1bdb22215616287bf9f8ee6b97e7f803"> 186</a></span>&#160;<span class="preprocessor">#define DSU_LENGTH_MASK _U_(0xFFFFFFFC) </span></div>
<div class="line"><a name="l00188"></a><span class="lineno"> 188</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DSU_DATA : (DSU Offset: 0x000C) (R/W 32) Data -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00189"></a><span class="lineno"> 189</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00190"></a><span class="lineno"><a class="line" href="unionDSU__DATA__Type.html"> 190</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00191"></a><span class="lineno"> 191</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00192"></a><span class="lineno"><a class="line" href="unionDSU__DATA__Type.html#a0793b4370bb1175b9222fa2ec65667b7"> 192</a></span>&#160; uint32_t <a class="code" href="unionDSU__DATA__Type.html#a0793b4370bb1175b9222fa2ec65667b7">DATA</a>:32; </div>
<div class="line"><a name="l00193"></a><span class="lineno"><a class="line" href="unionDSU__DATA__Type.html#a3ba565a91ef2b1b9a8c77511f8f4b7a8"> 193</a></span>&#160; } bit; </div>
<div class="line"><a name="l00194"></a><span class="lineno"><a class="line" href="unionDSU__DATA__Type.html#a951faee0c32af5210e62a071cc0afe96"> 194</a></span>&#160; uint32_t <a class="code" href="unionDSU__DATA__Type.html#a951faee0c32af5210e62a071cc0afe96">reg</a>; </div>
<div class="line"><a name="l00195"></a><span class="lineno"> 195</span>&#160;} <a class="code" href="unionDSU__DATA__Type.html">DSU_DATA_Type</a>;</div>
<div class="line"><a name="l00196"></a><span class="lineno"> 196</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00197"></a><span class="lineno"> 197</span>&#160; </div>
<div class="line"><a name="l00198"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a723e04c18648c402a75cce7e93de351a"> 198</a></span>&#160;<span class="preprocessor">#define DSU_DATA_OFFSET 0x000C </span></div>
<div class="line"><a name="l00199"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a3a9b805b6870ba197f179b0c6cc366ab"> 199</a></span>&#160;<span class="preprocessor">#define DSU_DATA_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00201"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a035409bf73a654618f87c65e2742bc35"> 201</a></span>&#160;<span class="preprocessor">#define DSU_DATA_DATA_Pos 0 </span></div>
<div class="line"><a name="l00202"></a><span class="lineno"> 202</span>&#160;<span class="preprocessor">#define DSU_DATA_DATA_Msk (_U_(0xFFFFFFFF) &lt;&lt; DSU_DATA_DATA_Pos)</span></div>
<div class="line"><a name="l00203"></a><span class="lineno"> 203</span>&#160;<span class="preprocessor">#define DSU_DATA_DATA(value) (DSU_DATA_DATA_Msk &amp; ((value) &lt;&lt; DSU_DATA_DATA_Pos))</span></div>
<div class="line"><a name="l00204"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a8ef0cc4d206f8b748482d8f40d4743e5"> 204</a></span>&#160;<span class="preprocessor">#define DSU_DATA_MASK _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00206"></a><span class="lineno"> 206</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DSU_DCC : (DSU Offset: 0x0010) (R/W 32) Debug Communication Channel n -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00207"></a><span class="lineno"> 207</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00208"></a><span class="lineno"><a class="line" href="unionDSU__DCC__Type.html"> 208</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00209"></a><span class="lineno"> 209</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00210"></a><span class="lineno"><a class="line" href="unionDSU__DCC__Type.html#a7be3abb1e94c3dae4c10b6a4ce5253de"> 210</a></span>&#160; uint32_t <a class="code" href="unionDSU__DCC__Type.html#a7be3abb1e94c3dae4c10b6a4ce5253de">DATA</a>:32; </div>
<div class="line"><a name="l00211"></a><span class="lineno"><a class="line" href="unionDSU__DCC__Type.html#aed573b5a2ced2e2832db85533b0cf0f3"> 211</a></span>&#160; } bit; </div>
<div class="line"><a name="l00212"></a><span class="lineno"><a class="line" href="unionDSU__DCC__Type.html#ae3e5ccae0e39ab81ad4667dc5dab6f66"> 212</a></span>&#160; uint32_t <a class="code" href="unionDSU__DCC__Type.html#ae3e5ccae0e39ab81ad4667dc5dab6f66">reg</a>; </div>
<div class="line"><a name="l00213"></a><span class="lineno"> 213</span>&#160;} <a class="code" href="unionDSU__DCC__Type.html">DSU_DCC_Type</a>;</div>
<div class="line"><a name="l00214"></a><span class="lineno"> 214</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00215"></a><span class="lineno"> 215</span>&#160; </div>
<div class="line"><a name="l00216"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a79bf45c7c66b3d6ce28c7c9f9e6b3b89"> 216</a></span>&#160;<span class="preprocessor">#define DSU_DCC_OFFSET 0x0010 </span></div>
<div class="line"><a name="l00217"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#af005efb1f6ed05574d398463365093b8"> 217</a></span>&#160;<span class="preprocessor">#define DSU_DCC_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00219"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a5d96d9ba36151557c8211afc631280c6"> 219</a></span>&#160;<span class="preprocessor">#define DSU_DCC_DATA_Pos 0 </span></div>
<div class="line"><a name="l00220"></a><span class="lineno"> 220</span>&#160;<span class="preprocessor">#define DSU_DCC_DATA_Msk (_U_(0xFFFFFFFF) &lt;&lt; DSU_DCC_DATA_Pos)</span></div>
<div class="line"><a name="l00221"></a><span class="lineno"> 221</span>&#160;<span class="preprocessor">#define DSU_DCC_DATA(value) (DSU_DCC_DATA_Msk &amp; ((value) &lt;&lt; DSU_DCC_DATA_Pos))</span></div>
<div class="line"><a name="l00222"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a68f123ca6976eeb7b1320d0075b315d2"> 222</a></span>&#160;<span class="preprocessor">#define DSU_DCC_MASK _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00224"></a><span class="lineno"> 224</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DSU_DID : (DSU Offset: 0x0018) (R/ 32) Device Identification -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00225"></a><span class="lineno"> 225</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00226"></a><span class="lineno"><a class="line" href="unionDSU__DID__Type.html"> 226</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00227"></a><span class="lineno"> 227</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00228"></a><span class="lineno"><a class="line" href="unionDSU__DID__Type.html#a6b84fbd4364f870cc96a9da2fe7fe02b"> 228</a></span>&#160; uint32_t <a class="code" href="unionDSU__DID__Type.html#a6b84fbd4364f870cc96a9da2fe7fe02b">DEVSEL</a>:8; </div>
<div class="line"><a name="l00229"></a><span class="lineno"><a class="line" href="unionDSU__DID__Type.html#aa5a2580fa69f97b349dba6650dfec919"> 229</a></span>&#160; uint32_t <a class="code" href="unionDSU__DID__Type.html#aa5a2580fa69f97b349dba6650dfec919">REVISION</a>:4; </div>
<div class="line"><a name="l00230"></a><span class="lineno"><a class="line" href="unionDSU__DID__Type.html#aa98a458040daf79582a83e77c0a55a5d"> 230</a></span>&#160; uint32_t <a class="code" href="unionDSU__DID__Type.html#aa98a458040daf79582a83e77c0a55a5d">DIE</a>:4; </div>
<div class="line"><a name="l00231"></a><span class="lineno"><a class="line" href="unionDSU__DID__Type.html#a0705eab15d8481c0a60ae42e3443e260"> 231</a></span>&#160; uint32_t <a class="code" href="unionDSU__DID__Type.html#a0705eab15d8481c0a60ae42e3443e260">SERIES</a>:6; </div>
<div class="line"><a name="l00232"></a><span class="lineno"><a class="line" href="unionDSU__DID__Type.html#ae329ed8257c1c69521338457e471f8c9"> 232</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00233"></a><span class="lineno"><a class="line" href="unionDSU__DID__Type.html#a391b0d47c1bbd48442298eaabe71ca61"> 233</a></span>&#160; uint32_t <a class="code" href="unionDSU__DID__Type.html#a391b0d47c1bbd48442298eaabe71ca61">FAMILY</a>:5; </div>
<div class="line"><a name="l00234"></a><span class="lineno"><a class="line" href="unionDSU__DID__Type.html#a090fd5a629b80d2adfcb388b825b8dd8"> 234</a></span>&#160; uint32_t <a class="code" href="unionDSU__DID__Type.html#a090fd5a629b80d2adfcb388b825b8dd8">PROCESSOR</a>:4; </div>
<div class="line"><a name="l00235"></a><span class="lineno"><a class="line" href="unionDSU__DID__Type.html#ad78de9974f8cea24b8c78ada7095492e"> 235</a></span>&#160; } bit; </div>
<div class="line"><a name="l00236"></a><span class="lineno"><a class="line" href="unionDSU__DID__Type.html#a56e43c203792644e8b50621c3d1dd7d6"> 236</a></span>&#160; uint32_t <a class="code" href="unionDSU__DID__Type.html#a56e43c203792644e8b50621c3d1dd7d6">reg</a>; </div>
<div class="line"><a name="l00237"></a><span class="lineno"> 237</span>&#160;} <a class="code" href="unionDSU__DID__Type.html">DSU_DID_Type</a>;</div>
<div class="line"><a name="l00238"></a><span class="lineno"> 238</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00239"></a><span class="lineno"> 239</span>&#160; </div>
<div class="line"><a name="l00240"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a1f8a682ec241602def0bb6f06481e4ed"> 240</a></span>&#160;<span class="preprocessor">#define DSU_DID_OFFSET 0x0018 </span></div>
<div class="line"><a name="l00242"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#af7877874825444352e8c546a2e1a2595"> 242</a></span>&#160;<span class="preprocessor">#define DSU_DID_DEVSEL_Pos 0 </span></div>
<div class="line"><a name="l00243"></a><span class="lineno"> 243</span>&#160;<span class="preprocessor">#define DSU_DID_DEVSEL_Msk (_U_(0xFF) &lt;&lt; DSU_DID_DEVSEL_Pos)</span></div>
<div class="line"><a name="l00244"></a><span class="lineno"> 244</span>&#160;<span class="preprocessor">#define DSU_DID_DEVSEL(value) (DSU_DID_DEVSEL_Msk &amp; ((value) &lt;&lt; DSU_DID_DEVSEL_Pos))</span></div>
<div class="line"><a name="l00245"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#adf8c7ee986cf2cceec0a4d82efb513a2"> 245</a></span>&#160;<span class="preprocessor">#define DSU_DID_REVISION_Pos 8 </span></div>
<div class="line"><a name="l00246"></a><span class="lineno"> 246</span>&#160;<span class="preprocessor">#define DSU_DID_REVISION_Msk (_U_(0xF) &lt;&lt; DSU_DID_REVISION_Pos)</span></div>
<div class="line"><a name="l00247"></a><span class="lineno"> 247</span>&#160;<span class="preprocessor">#define DSU_DID_REVISION(value) (DSU_DID_REVISION_Msk &amp; ((value) &lt;&lt; DSU_DID_REVISION_Pos))</span></div>
<div class="line"><a name="l00248"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#acd344f630eefc7e02ceb5f8210017b8b"> 248</a></span>&#160;<span class="preprocessor">#define DSU_DID_DIE_Pos 12 </span></div>
<div class="line"><a name="l00249"></a><span class="lineno"> 249</span>&#160;<span class="preprocessor">#define DSU_DID_DIE_Msk (_U_(0xF) &lt;&lt; DSU_DID_DIE_Pos)</span></div>
<div class="line"><a name="l00250"></a><span class="lineno"> 250</span>&#160;<span class="preprocessor">#define DSU_DID_DIE(value) (DSU_DID_DIE_Msk &amp; ((value) &lt;&lt; DSU_DID_DIE_Pos))</span></div>
<div class="line"><a name="l00251"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a7f9f64f65c0ec3d507ba5bc03b1a9b68"> 251</a></span>&#160;<span class="preprocessor">#define DSU_DID_SERIES_Pos 16 </span></div>
<div class="line"><a name="l00252"></a><span class="lineno"> 252</span>&#160;<span class="preprocessor">#define DSU_DID_SERIES_Msk (_U_(0x3F) &lt;&lt; DSU_DID_SERIES_Pos)</span></div>
<div class="line"><a name="l00253"></a><span class="lineno"> 253</span>&#160;<span class="preprocessor">#define DSU_DID_SERIES(value) (DSU_DID_SERIES_Msk &amp; ((value) &lt;&lt; DSU_DID_SERIES_Pos))</span></div>
<div class="line"><a name="l00254"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aa55d2175bbc40ac9d81bd297a4241916"> 254</a></span>&#160;<span class="preprocessor">#define DSU_DID_SERIES_0_Val _U_(0x0) </span></div>
<div class="line"><a name="l00255"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a5b1ab97381d29e6d852f6ef0aec8f479"> 255</a></span>&#160;<span class="preprocessor">#define DSU_DID_SERIES_1_Val _U_(0x1) </span></div>
<div class="line"><a name="l00256"></a><span class="lineno"> 256</span>&#160;<span class="preprocessor">#define DSU_DID_SERIES_0 (DSU_DID_SERIES_0_Val &lt;&lt; DSU_DID_SERIES_Pos)</span></div>
<div class="line"><a name="l00257"></a><span class="lineno"> 257</span>&#160;<span class="preprocessor">#define DSU_DID_SERIES_1 (DSU_DID_SERIES_1_Val &lt;&lt; DSU_DID_SERIES_Pos)</span></div>
<div class="line"><a name="l00258"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a738ead915cfef1cb2261b900bc2125e7"> 258</a></span>&#160;<span class="preprocessor">#define DSU_DID_FAMILY_Pos 23 </span></div>
<div class="line"><a name="l00259"></a><span class="lineno"> 259</span>&#160;<span class="preprocessor">#define DSU_DID_FAMILY_Msk (_U_(0x1F) &lt;&lt; DSU_DID_FAMILY_Pos)</span></div>
<div class="line"><a name="l00260"></a><span class="lineno"> 260</span>&#160;<span class="preprocessor">#define DSU_DID_FAMILY(value) (DSU_DID_FAMILY_Msk &amp; ((value) &lt;&lt; DSU_DID_FAMILY_Pos))</span></div>
<div class="line"><a name="l00261"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aa68390a3dd287f0f36e30d40994bcb1e"> 261</a></span>&#160;<span class="preprocessor">#define DSU_DID_FAMILY_0_Val _U_(0x0) </span></div>
<div class="line"><a name="l00262"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ade6548ba38e36d9bd1487d02b2825f1c"> 262</a></span>&#160;<span class="preprocessor">#define DSU_DID_FAMILY_1_Val _U_(0x1) </span></div>
<div class="line"><a name="l00263"></a><span class="lineno"> 263</span>&#160;<span class="preprocessor">#define DSU_DID_FAMILY_0 (DSU_DID_FAMILY_0_Val &lt;&lt; DSU_DID_FAMILY_Pos)</span></div>
<div class="line"><a name="l00264"></a><span class="lineno"> 264</span>&#160;<span class="preprocessor">#define DSU_DID_FAMILY_1 (DSU_DID_FAMILY_1_Val &lt;&lt; DSU_DID_FAMILY_Pos)</span></div>
<div class="line"><a name="l00265"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#af39e8c9b37c218a74228db9507493fa2"> 265</a></span>&#160;<span class="preprocessor">#define DSU_DID_PROCESSOR_Pos 28 </span></div>
<div class="line"><a name="l00266"></a><span class="lineno"> 266</span>&#160;<span class="preprocessor">#define DSU_DID_PROCESSOR_Msk (_U_(0xF) &lt;&lt; DSU_DID_PROCESSOR_Pos)</span></div>
<div class="line"><a name="l00267"></a><span class="lineno"> 267</span>&#160;<span class="preprocessor">#define DSU_DID_PROCESSOR(value) (DSU_DID_PROCESSOR_Msk &amp; ((value) &lt;&lt; DSU_DID_PROCESSOR_Pos))</span></div>
<div class="line"><a name="l00268"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ab0125f19b1c66669ea789521e33360c6"> 268</a></span>&#160;<span class="preprocessor">#define DSU_DID_PROCESSOR_CM0P_Val _U_(0x1) </span></div>
<div class="line"><a name="l00269"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a0df4a2a0af94a6b4490a23d5c4b03bfd"> 269</a></span>&#160;<span class="preprocessor">#define DSU_DID_PROCESSOR_CM23_Val _U_(0x2) </span></div>
<div class="line"><a name="l00270"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#abfb5d107e61e5ec48206450c921b4a4b"> 270</a></span>&#160;<span class="preprocessor">#define DSU_DID_PROCESSOR_CM3_Val _U_(0x3) </span></div>
<div class="line"><a name="l00271"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a534a13e2a895ca387b30d5a195e6b824"> 271</a></span>&#160;<span class="preprocessor">#define DSU_DID_PROCESSOR_CM4_Val _U_(0x5) </span></div>
<div class="line"><a name="l00272"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#afa6c40dc54282a41cc1fc2aba638ba9c"> 272</a></span>&#160;<span class="preprocessor">#define DSU_DID_PROCESSOR_CM4F_Val _U_(0x6) </span></div>
<div class="line"><a name="l00273"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a02cfd62c099a7754ee0b6339d6b8bc8c"> 273</a></span>&#160;<span class="preprocessor">#define DSU_DID_PROCESSOR_CM33_Val _U_(0x7) </span></div>
<div class="line"><a name="l00274"></a><span class="lineno"> 274</span>&#160;<span class="preprocessor">#define DSU_DID_PROCESSOR_CM0P (DSU_DID_PROCESSOR_CM0P_Val &lt;&lt; DSU_DID_PROCESSOR_Pos)</span></div>
<div class="line"><a name="l00275"></a><span class="lineno"> 275</span>&#160;<span class="preprocessor">#define DSU_DID_PROCESSOR_CM23 (DSU_DID_PROCESSOR_CM23_Val &lt;&lt; DSU_DID_PROCESSOR_Pos)</span></div>
<div class="line"><a name="l00276"></a><span class="lineno"> 276</span>&#160;<span class="preprocessor">#define DSU_DID_PROCESSOR_CM3 (DSU_DID_PROCESSOR_CM3_Val &lt;&lt; DSU_DID_PROCESSOR_Pos)</span></div>
<div class="line"><a name="l00277"></a><span class="lineno"> 277</span>&#160;<span class="preprocessor">#define DSU_DID_PROCESSOR_CM4 (DSU_DID_PROCESSOR_CM4_Val &lt;&lt; DSU_DID_PROCESSOR_Pos)</span></div>
<div class="line"><a name="l00278"></a><span class="lineno"> 278</span>&#160;<span class="preprocessor">#define DSU_DID_PROCESSOR_CM4F (DSU_DID_PROCESSOR_CM4F_Val &lt;&lt; DSU_DID_PROCESSOR_Pos)</span></div>
<div class="line"><a name="l00279"></a><span class="lineno"> 279</span>&#160;<span class="preprocessor">#define DSU_DID_PROCESSOR_CM33 (DSU_DID_PROCESSOR_CM33_Val &lt;&lt; DSU_DID_PROCESSOR_Pos)</span></div>
<div class="line"><a name="l00280"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ac1403dba443577379c24df9d1bff8cb1"> 280</a></span>&#160;<span class="preprocessor">#define DSU_DID_MASK _U_(0xFFBFFFFF) </span></div>
<div class="line"><a name="l00282"></a><span class="lineno"> 282</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DSU_CFG : (DSU Offset: 0x001C) (R/W 32) Configuration -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00283"></a><span class="lineno"> 283</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00284"></a><span class="lineno"><a class="line" href="unionDSU__CFG__Type.html"> 284</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00285"></a><span class="lineno"> 285</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00286"></a><span class="lineno"><a class="line" href="unionDSU__CFG__Type.html#a1707b3b281a6dfc43f5b9413a63b3876"> 286</a></span>&#160; uint32_t <a class="code" href="unionDSU__CFG__Type.html#a1707b3b281a6dfc43f5b9413a63b3876">LQOS</a>:2; </div>
<div class="line"><a name="l00287"></a><span class="lineno"><a class="line" href="unionDSU__CFG__Type.html#a9fc453e5a388cd9ce3a67d9fb80aa3ff"> 287</a></span>&#160; uint32_t <a class="code" href="unionDSU__CFG__Type.html#a9fc453e5a388cd9ce3a67d9fb80aa3ff">DCCDMALEVEL</a>:2; </div>
<div class="line"><a name="l00288"></a><span class="lineno"><a class="line" href="unionDSU__CFG__Type.html#a00254ef2e9f3500e5c6b3e338eb2ad5c"> 288</a></span>&#160; uint32_t <a class="code" href="unionDSU__CFG__Type.html#a00254ef2e9f3500e5c6b3e338eb2ad5c">ETBRAMEN</a>:1; </div>
<div class="line"><a name="l00289"></a><span class="lineno"><a class="line" href="unionDSU__CFG__Type.html#a9389d1bb336ae87e45849f7ac16a47d3"> 289</a></span>&#160; uint32_t :27; </div>
<div class="line"><a name="l00290"></a><span class="lineno"><a class="line" href="unionDSU__CFG__Type.html#a37f41ae54f40a98e6eda33320a6e1a8f"> 290</a></span>&#160; } bit; </div>
<div class="line"><a name="l00291"></a><span class="lineno"><a class="line" href="unionDSU__CFG__Type.html#a18afece2cb799c73b84f7d33a2cadb73"> 291</a></span>&#160; uint32_t <a class="code" href="unionDSU__CFG__Type.html#a18afece2cb799c73b84f7d33a2cadb73">reg</a>; </div>
<div class="line"><a name="l00292"></a><span class="lineno"> 292</span>&#160;} <a class="code" href="unionDSU__CFG__Type.html">DSU_CFG_Type</a>;</div>
<div class="line"><a name="l00293"></a><span class="lineno"> 293</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00294"></a><span class="lineno"> 294</span>&#160; </div>
<div class="line"><a name="l00295"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a8c62f4d1e6354ed3d19a6f1d0106e246"> 295</a></span>&#160;<span class="preprocessor">#define DSU_CFG_OFFSET 0x001C </span></div>
<div class="line"><a name="l00296"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a8e3905dda579f2cd6b30b66ed021a0b5"> 296</a></span>&#160;<span class="preprocessor">#define DSU_CFG_RESETVALUE _U_(0x00000002) </span></div>
<div class="line"><a name="l00298"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a6d98254c90559c6b73604015294b6b40"> 298</a></span>&#160;<span class="preprocessor">#define DSU_CFG_LQOS_Pos 0 </span></div>
<div class="line"><a name="l00299"></a><span class="lineno"> 299</span>&#160;<span class="preprocessor">#define DSU_CFG_LQOS_Msk (_U_(0x3) &lt;&lt; DSU_CFG_LQOS_Pos)</span></div>
<div class="line"><a name="l00300"></a><span class="lineno"> 300</span>&#160;<span class="preprocessor">#define DSU_CFG_LQOS(value) (DSU_CFG_LQOS_Msk &amp; ((value) &lt;&lt; DSU_CFG_LQOS_Pos))</span></div>
<div class="line"><a name="l00301"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a589df5c7af4d30c5109d1353eabd48a9"> 301</a></span>&#160;<span class="preprocessor">#define DSU_CFG_DCCDMALEVEL_Pos 2 </span></div>
<div class="line"><a name="l00302"></a><span class="lineno"> 302</span>&#160;<span class="preprocessor">#define DSU_CFG_DCCDMALEVEL_Msk (_U_(0x3) &lt;&lt; DSU_CFG_DCCDMALEVEL_Pos)</span></div>
<div class="line"><a name="l00303"></a><span class="lineno"> 303</span>&#160;<span class="preprocessor">#define DSU_CFG_DCCDMALEVEL(value) (DSU_CFG_DCCDMALEVEL_Msk &amp; ((value) &lt;&lt; DSU_CFG_DCCDMALEVEL_Pos))</span></div>
<div class="line"><a name="l00304"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a08775cb0aac097f6c9208783fbda68ff"> 304</a></span>&#160;<span class="preprocessor">#define DSU_CFG_DCCDMALEVEL_EMPTY_Val _U_(0x0) </span></div>
<div class="line"><a name="l00305"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aad9ff896ba8016cc22e8aebe849ac0e0"> 305</a></span>&#160;<span class="preprocessor">#define DSU_CFG_DCCDMALEVEL_FULL_Val _U_(0x1) </span></div>
<div class="line"><a name="l00306"></a><span class="lineno"> 306</span>&#160;<span class="preprocessor">#define DSU_CFG_DCCDMALEVEL_EMPTY (DSU_CFG_DCCDMALEVEL_EMPTY_Val &lt;&lt; DSU_CFG_DCCDMALEVEL_Pos)</span></div>
<div class="line"><a name="l00307"></a><span class="lineno"> 307</span>&#160;<span class="preprocessor">#define DSU_CFG_DCCDMALEVEL_FULL (DSU_CFG_DCCDMALEVEL_FULL_Val &lt;&lt; DSU_CFG_DCCDMALEVEL_Pos)</span></div>
<div class="line"><a name="l00308"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a1dd49a77ed00b0d8b29a092fed417845"> 308</a></span>&#160;<span class="preprocessor">#define DSU_CFG_ETBRAMEN_Pos 4 </span></div>
<div class="line"><a name="l00309"></a><span class="lineno"> 309</span>&#160;<span class="preprocessor">#define DSU_CFG_ETBRAMEN (_U_(0x1) &lt;&lt; DSU_CFG_ETBRAMEN_Pos)</span></div>
<div class="line"><a name="l00310"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ac4777e024751c158ef31e676ec63eac9"> 310</a></span>&#160;<span class="preprocessor">#define DSU_CFG_MASK _U_(0x0000001F) </span></div>
<div class="line"><a name="l00312"></a><span class="lineno"> 312</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DSU_ENTRY0 : (DSU Offset: 0x1000) (R/ 32) CoreSight ROM Table Entry 0 -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00313"></a><span class="lineno"> 313</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00314"></a><span class="lineno"><a class="line" href="unionDSU__ENTRY0__Type.html"> 314</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00315"></a><span class="lineno"> 315</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00316"></a><span class="lineno"><a class="line" href="unionDSU__ENTRY0__Type.html#a3f265550e3d4a038a1e359d8ae807c48"> 316</a></span>&#160; uint32_t <a class="code" href="unionDSU__ENTRY0__Type.html#a3f265550e3d4a038a1e359d8ae807c48">EPRES</a>:1; </div>
<div class="line"><a name="l00317"></a><span class="lineno"><a class="line" href="unionDSU__ENTRY0__Type.html#aa3926f1f9527552a50337fd2b24716ff"> 317</a></span>&#160; uint32_t <a class="code" href="unionDSU__ENTRY0__Type.html#aa3926f1f9527552a50337fd2b24716ff">FMT</a>:1; </div>
<div class="line"><a name="l00318"></a><span class="lineno"><a class="line" href="unionDSU__ENTRY0__Type.html#a392291bbd8df83b18e7ea606b21c328d"> 318</a></span>&#160; uint32_t :10; </div>
<div class="line"><a name="l00319"></a><span class="lineno"><a class="line" href="unionDSU__ENTRY0__Type.html#ac8df1fef5c69a4e75d67608e8e100b47"> 319</a></span>&#160; uint32_t <a class="code" href="unionDSU__ENTRY0__Type.html#ac8df1fef5c69a4e75d67608e8e100b47">ADDOFF</a>:20; </div>
<div class="line"><a name="l00320"></a><span class="lineno"><a class="line" href="unionDSU__ENTRY0__Type.html#a4412c969c5d910efa9c65b47ba9147a1"> 320</a></span>&#160; } bit; </div>
<div class="line"><a name="l00321"></a><span class="lineno"><a class="line" href="unionDSU__ENTRY0__Type.html#ad57b888a19f61bf49aea7ab2058ea9f0"> 321</a></span>&#160; uint32_t <a class="code" href="unionDSU__ENTRY0__Type.html#ad57b888a19f61bf49aea7ab2058ea9f0">reg</a>; </div>
<div class="line"><a name="l00322"></a><span class="lineno"> 322</span>&#160;} <a class="code" href="unionDSU__ENTRY0__Type.html">DSU_ENTRY0_Type</a>;</div>
<div class="line"><a name="l00323"></a><span class="lineno"> 323</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00324"></a><span class="lineno"> 324</span>&#160; </div>
<div class="line"><a name="l00325"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aab06d4df5675d46495c1506ff2f2bf2c"> 325</a></span>&#160;<span class="preprocessor">#define DSU_ENTRY0_OFFSET 0x1000 </span></div>
<div class="line"><a name="l00326"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a8017bdfde4195a88bccf08a7ad26f5ca"> 326</a></span>&#160;<span class="preprocessor">#define DSU_ENTRY0_RESETVALUE _U_(0x9F0FC002) </span></div>
<div class="line"><a name="l00328"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ab0c18ae2688f543939477aebbe76ee54"> 328</a></span>&#160;<span class="preprocessor">#define DSU_ENTRY0_EPRES_Pos 0 </span></div>
<div class="line"><a name="l00329"></a><span class="lineno"> 329</span>&#160;<span class="preprocessor">#define DSU_ENTRY0_EPRES (_U_(0x1) &lt;&lt; DSU_ENTRY0_EPRES_Pos)</span></div>
<div class="line"><a name="l00330"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ad27fea4487d4ce75afd0b580219487b6"> 330</a></span>&#160;<span class="preprocessor">#define DSU_ENTRY0_FMT_Pos 1 </span></div>
<div class="line"><a name="l00331"></a><span class="lineno"> 331</span>&#160;<span class="preprocessor">#define DSU_ENTRY0_FMT (_U_(0x1) &lt;&lt; DSU_ENTRY0_FMT_Pos)</span></div>
<div class="line"><a name="l00332"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a281853c30a01a33bb71d921008daf56c"> 332</a></span>&#160;<span class="preprocessor">#define DSU_ENTRY0_ADDOFF_Pos 12 </span></div>
<div class="line"><a name="l00333"></a><span class="lineno"> 333</span>&#160;<span class="preprocessor">#define DSU_ENTRY0_ADDOFF_Msk (_U_(0xFFFFF) &lt;&lt; DSU_ENTRY0_ADDOFF_Pos)</span></div>
<div class="line"><a name="l00334"></a><span class="lineno"> 334</span>&#160;<span class="preprocessor">#define DSU_ENTRY0_ADDOFF(value) (DSU_ENTRY0_ADDOFF_Msk &amp; ((value) &lt;&lt; DSU_ENTRY0_ADDOFF_Pos))</span></div>
<div class="line"><a name="l00335"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aefdc95e7fcd5bc171ef80131a547588e"> 335</a></span>&#160;<span class="preprocessor">#define DSU_ENTRY0_MASK _U_(0xFFFFF003) </span></div>
<div class="line"><a name="l00337"></a><span class="lineno"> 337</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DSU_ENTRY1 : (DSU Offset: 0x1004) (R/ 32) CoreSight ROM Table Entry 1 -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00338"></a><span class="lineno"> 338</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00339"></a><span class="lineno"><a class="line" href="unionDSU__ENTRY1__Type.html"> 339</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00340"></a><span class="lineno"><a class="line" href="unionDSU__ENTRY1__Type.html#a524ab8d2471aafcf1a353ae5626de59c"> 340</a></span>&#160; uint32_t <a class="code" href="unionDSU__ENTRY1__Type.html#a524ab8d2471aafcf1a353ae5626de59c">reg</a>; </div>
<div class="line"><a name="l00341"></a><span class="lineno"> 341</span>&#160;} <a class="code" href="unionDSU__ENTRY1__Type.html">DSU_ENTRY1_Type</a>;</div>
<div class="line"><a name="l00342"></a><span class="lineno"> 342</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00343"></a><span class="lineno"> 343</span>&#160; </div>
<div class="line"><a name="l00344"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ac5708bb2fe2ee100cdddae6442828217"> 344</a></span>&#160;<span class="preprocessor">#define DSU_ENTRY1_OFFSET 0x1004 </span></div>
<div class="line"><a name="l00345"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a9f8fce8b585b23a09dd0abac9fadf06e"> 345</a></span>&#160;<span class="preprocessor">#define DSU_ENTRY1_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00346"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#afdfc580b0b4e1677b6ce0b4843199d76"> 346</a></span>&#160;<span class="preprocessor">#define DSU_ENTRY1_MASK _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00348"></a><span class="lineno"> 348</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DSU_END : (DSU Offset: 0x1008) (R/ 32) CoreSight ROM Table End -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00349"></a><span class="lineno"> 349</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00350"></a><span class="lineno"><a class="line" href="unionDSU__END__Type.html"> 350</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00351"></a><span class="lineno"> 351</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00352"></a><span class="lineno"><a class="line" href="unionDSU__END__Type.html#a24ad2e64ac7f159c62d9e1d30184432b"> 352</a></span>&#160; uint32_t <a class="code" href="unionDSU__END__Type.html#a24ad2e64ac7f159c62d9e1d30184432b">END</a>:32; </div>
<div class="line"><a name="l00353"></a><span class="lineno"><a class="line" href="unionDSU__END__Type.html#af7b15eaadd5439e900f0e79c00c35046"> 353</a></span>&#160; } bit; </div>
<div class="line"><a name="l00354"></a><span class="lineno"><a class="line" href="unionDSU__END__Type.html#a0d914056a7cd5c80c5b2204a15ae09ae"> 354</a></span>&#160; uint32_t <a class="code" href="unionDSU__END__Type.html#a0d914056a7cd5c80c5b2204a15ae09ae">reg</a>; </div>
<div class="line"><a name="l00355"></a><span class="lineno"> 355</span>&#160;} <a class="code" href="unionDSU__END__Type.html">DSU_END_Type</a>;</div>
<div class="line"><a name="l00356"></a><span class="lineno"> 356</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00357"></a><span class="lineno"> 357</span>&#160; </div>
<div class="line"><a name="l00358"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ae6ea9aca4f5434a9e01445fc08782f59"> 358</a></span>&#160;<span class="preprocessor">#define DSU_END_OFFSET 0x1008 </span></div>
<div class="line"><a name="l00359"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aa4380f101e160fd70e41789f57871f63"> 359</a></span>&#160;<span class="preprocessor">#define DSU_END_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00361"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a490d2f02762f42681fc4dcaa0db570bb"> 361</a></span>&#160;<span class="preprocessor">#define DSU_END_END_Pos 0 </span></div>
<div class="line"><a name="l00362"></a><span class="lineno"> 362</span>&#160;<span class="preprocessor">#define DSU_END_END_Msk (_U_(0xFFFFFFFF) &lt;&lt; DSU_END_END_Pos)</span></div>
<div class="line"><a name="l00363"></a><span class="lineno"> 363</span>&#160;<span class="preprocessor">#define DSU_END_END(value) (DSU_END_END_Msk &amp; ((value) &lt;&lt; DSU_END_END_Pos))</span></div>
<div class="line"><a name="l00364"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ac1fdb41335952f536cc506c75a0f2e5f"> 364</a></span>&#160;<span class="preprocessor">#define DSU_END_MASK _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00366"></a><span class="lineno"> 366</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DSU_MEMTYPE : (DSU Offset: 0x1FCC) (R/ 32) CoreSight ROM Table Memory Type -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00367"></a><span class="lineno"> 367</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00368"></a><span class="lineno"><a class="line" href="unionDSU__MEMTYPE__Type.html"> 368</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00369"></a><span class="lineno"> 369</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00370"></a><span class="lineno"><a class="line" href="unionDSU__MEMTYPE__Type.html#a3dca5becd5a8a8e28fe39180c824eaaf"> 370</a></span>&#160; uint32_t <a class="code" href="unionDSU__MEMTYPE__Type.html#a3dca5becd5a8a8e28fe39180c824eaaf">SMEMP</a>:1; </div>
<div class="line"><a name="l00371"></a><span class="lineno"><a class="line" href="unionDSU__MEMTYPE__Type.html#ae50d5b66b5ba6364b5117e8628c7579a"> 371</a></span>&#160; uint32_t :31; </div>
<div class="line"><a name="l00372"></a><span class="lineno"><a class="line" href="unionDSU__MEMTYPE__Type.html#a5b9b8581c13c55fd938526074e4859e3"> 372</a></span>&#160; } bit; </div>
<div class="line"><a name="l00373"></a><span class="lineno"><a class="line" href="unionDSU__MEMTYPE__Type.html#a9811ad777bc9653aaa34c9c298031513"> 373</a></span>&#160; uint32_t <a class="code" href="unionDSU__MEMTYPE__Type.html#a9811ad777bc9653aaa34c9c298031513">reg</a>; </div>
<div class="line"><a name="l00374"></a><span class="lineno"> 374</span>&#160;} <a class="code" href="unionDSU__MEMTYPE__Type.html">DSU_MEMTYPE_Type</a>;</div>
<div class="line"><a name="l00375"></a><span class="lineno"> 375</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00376"></a><span class="lineno"> 376</span>&#160; </div>
<div class="line"><a name="l00377"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a9cfb1a386c96d79aa14d0556e89a9847"> 377</a></span>&#160;<span class="preprocessor">#define DSU_MEMTYPE_OFFSET 0x1FCC </span></div>
<div class="line"><a name="l00378"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ae696aac50623781af5c363bb4819a651"> 378</a></span>&#160;<span class="preprocessor">#define DSU_MEMTYPE_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00380"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#af9e3cd3a0a5383eb7790554b6b26b2d3"> 380</a></span>&#160;<span class="preprocessor">#define DSU_MEMTYPE_SMEMP_Pos 0 </span></div>
<div class="line"><a name="l00381"></a><span class="lineno"> 381</span>&#160;<span class="preprocessor">#define DSU_MEMTYPE_SMEMP (_U_(0x1) &lt;&lt; DSU_MEMTYPE_SMEMP_Pos)</span></div>
<div class="line"><a name="l00382"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a1452bd6135db23612661a14aba71c287"> 382</a></span>&#160;<span class="preprocessor">#define DSU_MEMTYPE_MASK _U_(0x00000001) </span></div>
<div class="line"><a name="l00384"></a><span class="lineno"> 384</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DSU_PID4 : (DSU Offset: 0x1FD0) (R/ 32) Peripheral Identification 4 -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00385"></a><span class="lineno"> 385</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00386"></a><span class="lineno"><a class="line" href="unionDSU__PID4__Type.html"> 386</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00387"></a><span class="lineno"> 387</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00388"></a><span class="lineno"><a class="line" href="unionDSU__PID4__Type.html#a351cf48be2b0e2845a7a8987c3c869f8"> 388</a></span>&#160; uint32_t <a class="code" href="unionDSU__PID4__Type.html#a351cf48be2b0e2845a7a8987c3c869f8">JEPCC</a>:4; </div>
<div class="line"><a name="l00389"></a><span class="lineno"><a class="line" href="unionDSU__PID4__Type.html#a6fdd5fe268e92ffe333394c0eb34431a"> 389</a></span>&#160; uint32_t <a class="code" href="unionDSU__PID4__Type.html#a6fdd5fe268e92ffe333394c0eb34431a">FKBC</a>:4; </div>
<div class="line"><a name="l00390"></a><span class="lineno"><a class="line" href="unionDSU__PID4__Type.html#a58c77af3c128eee1075b6306a4b02aea"> 390</a></span>&#160; uint32_t :24; </div>
<div class="line"><a name="l00391"></a><span class="lineno"><a class="line" href="unionDSU__PID4__Type.html#aa16a5bc8036a59232db3f784a1bb2fdc"> 391</a></span>&#160; } bit; </div>
<div class="line"><a name="l00392"></a><span class="lineno"><a class="line" href="unionDSU__PID4__Type.html#aff254cb82f68cb64e7f09f0e49aff7f6"> 392</a></span>&#160; uint32_t <a class="code" href="unionDSU__PID4__Type.html#aff254cb82f68cb64e7f09f0e49aff7f6">reg</a>; </div>
<div class="line"><a name="l00393"></a><span class="lineno"> 393</span>&#160;} <a class="code" href="unionDSU__PID4__Type.html">DSU_PID4_Type</a>;</div>
<div class="line"><a name="l00394"></a><span class="lineno"> 394</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00395"></a><span class="lineno"> 395</span>&#160; </div>
<div class="line"><a name="l00396"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a9b2486d7ffbc473daa210a53c58ae205"> 396</a></span>&#160;<span class="preprocessor">#define DSU_PID4_OFFSET 0x1FD0 </span></div>
<div class="line"><a name="l00397"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#abff45dc09472f6ef982d193afd7841cc"> 397</a></span>&#160;<span class="preprocessor">#define DSU_PID4_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00399"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a09592aca2e0907f95a7a1b7898f77734"> 399</a></span>&#160;<span class="preprocessor">#define DSU_PID4_JEPCC_Pos 0 </span></div>
<div class="line"><a name="l00400"></a><span class="lineno"> 400</span>&#160;<span class="preprocessor">#define DSU_PID4_JEPCC_Msk (_U_(0xF) &lt;&lt; DSU_PID4_JEPCC_Pos)</span></div>
<div class="line"><a name="l00401"></a><span class="lineno"> 401</span>&#160;<span class="preprocessor">#define DSU_PID4_JEPCC(value) (DSU_PID4_JEPCC_Msk &amp; ((value) &lt;&lt; DSU_PID4_JEPCC_Pos))</span></div>
<div class="line"><a name="l00402"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aa75dd4a5e3f39a78aacfe256a1db4df9"> 402</a></span>&#160;<span class="preprocessor">#define DSU_PID4_FKBC_Pos 4 </span></div>
<div class="line"><a name="l00403"></a><span class="lineno"> 403</span>&#160;<span class="preprocessor">#define DSU_PID4_FKBC_Msk (_U_(0xF) &lt;&lt; DSU_PID4_FKBC_Pos)</span></div>
<div class="line"><a name="l00404"></a><span class="lineno"> 404</span>&#160;<span class="preprocessor">#define DSU_PID4_FKBC(value) (DSU_PID4_FKBC_Msk &amp; ((value) &lt;&lt; DSU_PID4_FKBC_Pos))</span></div>
<div class="line"><a name="l00405"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a4d757ce3a91f809a48fe7fbe9a72724e"> 405</a></span>&#160;<span class="preprocessor">#define DSU_PID4_MASK _U_(0x000000FF) </span></div>
<div class="line"><a name="l00407"></a><span class="lineno"> 407</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DSU_PID5 : (DSU Offset: 0x1FD4) (R/ 32) Peripheral Identification 5 -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00408"></a><span class="lineno"> 408</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00409"></a><span class="lineno"><a class="line" href="unionDSU__PID5__Type.html"> 409</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00410"></a><span class="lineno"><a class="line" href="unionDSU__PID5__Type.html#a381ed71ad8950e0059bf48ed20c78e9d"> 410</a></span>&#160; uint32_t <a class="code" href="unionDSU__PID5__Type.html#a381ed71ad8950e0059bf48ed20c78e9d">reg</a>; </div>
<div class="line"><a name="l00411"></a><span class="lineno"> 411</span>&#160;} <a class="code" href="unionDSU__PID5__Type.html">DSU_PID5_Type</a>;</div>
<div class="line"><a name="l00412"></a><span class="lineno"> 412</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00413"></a><span class="lineno"> 413</span>&#160; </div>
<div class="line"><a name="l00414"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a55456b82aa4473e1294da9cddff8dc7f"> 414</a></span>&#160;<span class="preprocessor">#define DSU_PID5_OFFSET 0x1FD4 </span></div>
<div class="line"><a name="l00415"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a660196a26277134b1faa0e3cb16a45df"> 415</a></span>&#160;<span class="preprocessor">#define DSU_PID5_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00416"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a5859f5a5ab794ef6639607ee21c9bfb0"> 416</a></span>&#160;<span class="preprocessor">#define DSU_PID5_MASK _U_(0x00000000) </span></div>
<div class="line"><a name="l00418"></a><span class="lineno"> 418</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DSU_PID6 : (DSU Offset: 0x1FD8) (R/ 32) Peripheral Identification 6 -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00419"></a><span class="lineno"> 419</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00420"></a><span class="lineno"><a class="line" href="unionDSU__PID6__Type.html"> 420</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00421"></a><span class="lineno"><a class="line" href="unionDSU__PID6__Type.html#a5c9f3720d55b56e6aef2b71ac0b50a13"> 421</a></span>&#160; uint32_t <a class="code" href="unionDSU__PID6__Type.html#a5c9f3720d55b56e6aef2b71ac0b50a13">reg</a>; </div>
<div class="line"><a name="l00422"></a><span class="lineno"> 422</span>&#160;} <a class="code" href="unionDSU__PID6__Type.html">DSU_PID6_Type</a>;</div>
<div class="line"><a name="l00423"></a><span class="lineno"> 423</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00424"></a><span class="lineno"> 424</span>&#160; </div>
<div class="line"><a name="l00425"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aef7906d7c83735893dad365a6292f4c2"> 425</a></span>&#160;<span class="preprocessor">#define DSU_PID6_OFFSET 0x1FD8 </span></div>
<div class="line"><a name="l00426"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a0ec56c9b11834ea4e78e4bb56f8d504d"> 426</a></span>&#160;<span class="preprocessor">#define DSU_PID6_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00427"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ac1a214954faa7cfd1597c2f5dc50b61e"> 427</a></span>&#160;<span class="preprocessor">#define DSU_PID6_MASK _U_(0x00000000) </span></div>
<div class="line"><a name="l00429"></a><span class="lineno"> 429</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DSU_PID7 : (DSU Offset: 0x1FDC) (R/ 32) Peripheral Identification 7 -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00430"></a><span class="lineno"> 430</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00431"></a><span class="lineno"><a class="line" href="unionDSU__PID7__Type.html"> 431</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00432"></a><span class="lineno"><a class="line" href="unionDSU__PID7__Type.html#a6a2b728de75e4bee6b44a6e2c50305bc"> 432</a></span>&#160; uint32_t <a class="code" href="unionDSU__PID7__Type.html#a6a2b728de75e4bee6b44a6e2c50305bc">reg</a>; </div>
<div class="line"><a name="l00433"></a><span class="lineno"> 433</span>&#160;} <a class="code" href="unionDSU__PID7__Type.html">DSU_PID7_Type</a>;</div>
<div class="line"><a name="l00434"></a><span class="lineno"> 434</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00435"></a><span class="lineno"> 435</span>&#160; </div>
<div class="line"><a name="l00436"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a177551481d873cd49c5348a580bb583d"> 436</a></span>&#160;<span class="preprocessor">#define DSU_PID7_OFFSET 0x1FDC </span></div>
<div class="line"><a name="l00437"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a425f24c2e936c926f005cec6d504049a"> 437</a></span>&#160;<span class="preprocessor">#define DSU_PID7_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00438"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a16cbaf00d0e9956cdbf2f3f627576ecc"> 438</a></span>&#160;<span class="preprocessor">#define DSU_PID7_MASK _U_(0x00000000) </span></div>
<div class="line"><a name="l00440"></a><span class="lineno"> 440</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DSU_PID0 : (DSU Offset: 0x1FE0) (R/ 32) Peripheral Identification 0 -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00441"></a><span class="lineno"> 441</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00442"></a><span class="lineno"><a class="line" href="unionDSU__PID0__Type.html"> 442</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00443"></a><span class="lineno"> 443</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00444"></a><span class="lineno"><a class="line" href="unionDSU__PID0__Type.html#a2411582de03ec05e573cff798437b9b2"> 444</a></span>&#160; uint32_t <a class="code" href="unionDSU__PID0__Type.html#a2411582de03ec05e573cff798437b9b2">PARTNBL</a>:8; </div>
<div class="line"><a name="l00445"></a><span class="lineno"><a class="line" href="unionDSU__PID0__Type.html#a254b243c9967098727101f115dde15ba"> 445</a></span>&#160; uint32_t :24; </div>
<div class="line"><a name="l00446"></a><span class="lineno"><a class="line" href="unionDSU__PID0__Type.html#ac2def1430c6dcdb7afe458983ed1a8ec"> 446</a></span>&#160; } bit; </div>
<div class="line"><a name="l00447"></a><span class="lineno"><a class="line" href="unionDSU__PID0__Type.html#a7db2231c24781271c48df2f5fb7805a6"> 447</a></span>&#160; uint32_t <a class="code" href="unionDSU__PID0__Type.html#a7db2231c24781271c48df2f5fb7805a6">reg</a>; </div>
<div class="line"><a name="l00448"></a><span class="lineno"> 448</span>&#160;} <a class="code" href="unionDSU__PID0__Type.html">DSU_PID0_Type</a>;</div>
<div class="line"><a name="l00449"></a><span class="lineno"> 449</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00450"></a><span class="lineno"> 450</span>&#160; </div>
<div class="line"><a name="l00451"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aea9d171f0922c1d3459cd94571421b57"> 451</a></span>&#160;<span class="preprocessor">#define DSU_PID0_OFFSET 0x1FE0 </span></div>
<div class="line"><a name="l00452"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#afbf547350eaa735fb153d3b6dcc09408"> 452</a></span>&#160;<span class="preprocessor">#define DSU_PID0_RESETVALUE _U_(0x000000D0) </span></div>
<div class="line"><a name="l00454"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#af2273a145c71eec0de2c40ddd80e4283"> 454</a></span>&#160;<span class="preprocessor">#define DSU_PID0_PARTNBL_Pos 0 </span></div>
<div class="line"><a name="l00455"></a><span class="lineno"> 455</span>&#160;<span class="preprocessor">#define DSU_PID0_PARTNBL_Msk (_U_(0xFF) &lt;&lt; DSU_PID0_PARTNBL_Pos)</span></div>
<div class="line"><a name="l00456"></a><span class="lineno"> 456</span>&#160;<span class="preprocessor">#define DSU_PID0_PARTNBL(value) (DSU_PID0_PARTNBL_Msk &amp; ((value) &lt;&lt; DSU_PID0_PARTNBL_Pos))</span></div>
<div class="line"><a name="l00457"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ae813809af590e3ba3aa212704b194593"> 457</a></span>&#160;<span class="preprocessor">#define DSU_PID0_MASK _U_(0x000000FF) </span></div>
<div class="line"><a name="l00459"></a><span class="lineno"> 459</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DSU_PID1 : (DSU Offset: 0x1FE4) (R/ 32) Peripheral Identification 1 -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00460"></a><span class="lineno"> 460</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00461"></a><span class="lineno"><a class="line" href="unionDSU__PID1__Type.html"> 461</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00462"></a><span class="lineno"> 462</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00463"></a><span class="lineno"><a class="line" href="unionDSU__PID1__Type.html#af789ec8a7e1fa2718283e9374643cd10"> 463</a></span>&#160; uint32_t <a class="code" href="unionDSU__PID1__Type.html#af789ec8a7e1fa2718283e9374643cd10">PARTNBH</a>:4; </div>
<div class="line"><a name="l00464"></a><span class="lineno"><a class="line" href="unionDSU__PID1__Type.html#a00638eca3237e0bfedae6c22418203e5"> 464</a></span>&#160; uint32_t <a class="code" href="unionDSU__PID1__Type.html#a00638eca3237e0bfedae6c22418203e5">JEPIDCL</a>:4; </div>
<div class="line"><a name="l00465"></a><span class="lineno"><a class="line" href="unionDSU__PID1__Type.html#ad188bd6691a25f5edc20e2364eff096b"> 465</a></span>&#160; uint32_t :24; </div>
<div class="line"><a name="l00466"></a><span class="lineno"><a class="line" href="unionDSU__PID1__Type.html#af8f488aaae756fa07b85b0d7b8182193"> 466</a></span>&#160; } bit; </div>
<div class="line"><a name="l00467"></a><span class="lineno"><a class="line" href="unionDSU__PID1__Type.html#aae19e346570eb31d8eec6d0a7b093954"> 467</a></span>&#160; uint32_t <a class="code" href="unionDSU__PID1__Type.html#aae19e346570eb31d8eec6d0a7b093954">reg</a>; </div>
<div class="line"><a name="l00468"></a><span class="lineno"> 468</span>&#160;} <a class="code" href="unionDSU__PID1__Type.html">DSU_PID1_Type</a>;</div>
<div class="line"><a name="l00469"></a><span class="lineno"> 469</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00470"></a><span class="lineno"> 470</span>&#160; </div>
<div class="line"><a name="l00471"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a1114e2adaab2fe61ed027acf899418de"> 471</a></span>&#160;<span class="preprocessor">#define DSU_PID1_OFFSET 0x1FE4 </span></div>
<div class="line"><a name="l00472"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a257a59dab5e1bef2c233b637968f2786"> 472</a></span>&#160;<span class="preprocessor">#define DSU_PID1_RESETVALUE _U_(0x000000FC) </span></div>
<div class="line"><a name="l00474"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a6dff7e586efe49ba2aa268119a27218d"> 474</a></span>&#160;<span class="preprocessor">#define DSU_PID1_PARTNBH_Pos 0 </span></div>
<div class="line"><a name="l00475"></a><span class="lineno"> 475</span>&#160;<span class="preprocessor">#define DSU_PID1_PARTNBH_Msk (_U_(0xF) &lt;&lt; DSU_PID1_PARTNBH_Pos)</span></div>
<div class="line"><a name="l00476"></a><span class="lineno"> 476</span>&#160;<span class="preprocessor">#define DSU_PID1_PARTNBH(value) (DSU_PID1_PARTNBH_Msk &amp; ((value) &lt;&lt; DSU_PID1_PARTNBH_Pos))</span></div>
<div class="line"><a name="l00477"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a64528557ce517ad0117a1416e03e0be9"> 477</a></span>&#160;<span class="preprocessor">#define DSU_PID1_JEPIDCL_Pos 4 </span></div>
<div class="line"><a name="l00478"></a><span class="lineno"> 478</span>&#160;<span class="preprocessor">#define DSU_PID1_JEPIDCL_Msk (_U_(0xF) &lt;&lt; DSU_PID1_JEPIDCL_Pos)</span></div>
<div class="line"><a name="l00479"></a><span class="lineno"> 479</span>&#160;<span class="preprocessor">#define DSU_PID1_JEPIDCL(value) (DSU_PID1_JEPIDCL_Msk &amp; ((value) &lt;&lt; DSU_PID1_JEPIDCL_Pos))</span></div>
<div class="line"><a name="l00480"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a2398899995a62f2a20b4390051c5d269"> 480</a></span>&#160;<span class="preprocessor">#define DSU_PID1_MASK _U_(0x000000FF) </span></div>
<div class="line"><a name="l00482"></a><span class="lineno"> 482</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DSU_PID2 : (DSU Offset: 0x1FE8) (R/ 32) Peripheral Identification 2 -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00483"></a><span class="lineno"> 483</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00484"></a><span class="lineno"><a class="line" href="unionDSU__PID2__Type.html"> 484</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00485"></a><span class="lineno"> 485</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00486"></a><span class="lineno"><a class="line" href="unionDSU__PID2__Type.html#a98d6ae81bae471444221dad368417fcb"> 486</a></span>&#160; uint32_t <a class="code" href="unionDSU__PID2__Type.html#a98d6ae81bae471444221dad368417fcb">JEPIDCH</a>:3; </div>
<div class="line"><a name="l00487"></a><span class="lineno"><a class="line" href="unionDSU__PID2__Type.html#ae1fa34e088136d567cd1769499c50ab3"> 487</a></span>&#160; uint32_t <a class="code" href="unionDSU__PID2__Type.html#ae1fa34e088136d567cd1769499c50ab3">JEPU</a>:1; </div>
<div class="line"><a name="l00488"></a><span class="lineno"><a class="line" href="unionDSU__PID2__Type.html#ad619ce9aa07fdb32c8d57feebaab130c"> 488</a></span>&#160; uint32_t <a class="code" href="unionDSU__PID2__Type.html#ad619ce9aa07fdb32c8d57feebaab130c">REVISION</a>:4; </div>
<div class="line"><a name="l00489"></a><span class="lineno"><a class="line" href="unionDSU__PID2__Type.html#a51e6f715b4cd6b477dab8f10a8135629"> 489</a></span>&#160; uint32_t :24; </div>
<div class="line"><a name="l00490"></a><span class="lineno"><a class="line" href="unionDSU__PID2__Type.html#a682be9a2e515cd0302de2a0e0eebb9f9"> 490</a></span>&#160; } bit; </div>
<div class="line"><a name="l00491"></a><span class="lineno"><a class="line" href="unionDSU__PID2__Type.html#aa77daad8160c0503bf4348a988c1580d"> 491</a></span>&#160; uint32_t <a class="code" href="unionDSU__PID2__Type.html#aa77daad8160c0503bf4348a988c1580d">reg</a>; </div>
<div class="line"><a name="l00492"></a><span class="lineno"> 492</span>&#160;} <a class="code" href="unionDSU__PID2__Type.html">DSU_PID2_Type</a>;</div>
<div class="line"><a name="l00493"></a><span class="lineno"> 493</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00494"></a><span class="lineno"> 494</span>&#160; </div>
<div class="line"><a name="l00495"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ae848d742529a04e4fc64065f2bfde2d7"> 495</a></span>&#160;<span class="preprocessor">#define DSU_PID2_OFFSET 0x1FE8 </span></div>
<div class="line"><a name="l00496"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a34f08ebf29928fc5c95f018abbc6d3a3"> 496</a></span>&#160;<span class="preprocessor">#define DSU_PID2_RESETVALUE _U_(0x00000009) </span></div>
<div class="line"><a name="l00498"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a4b2aa922b81ecb07b672d813558306fc"> 498</a></span>&#160;<span class="preprocessor">#define DSU_PID2_JEPIDCH_Pos 0 </span></div>
<div class="line"><a name="l00499"></a><span class="lineno"> 499</span>&#160;<span class="preprocessor">#define DSU_PID2_JEPIDCH_Msk (_U_(0x7) &lt;&lt; DSU_PID2_JEPIDCH_Pos)</span></div>
<div class="line"><a name="l00500"></a><span class="lineno"> 500</span>&#160;<span class="preprocessor">#define DSU_PID2_JEPIDCH(value) (DSU_PID2_JEPIDCH_Msk &amp; ((value) &lt;&lt; DSU_PID2_JEPIDCH_Pos))</span></div>
<div class="line"><a name="l00501"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a88346fef117d36aa2dba1ffabc5e908a"> 501</a></span>&#160;<span class="preprocessor">#define DSU_PID2_JEPU_Pos 3 </span></div>
<div class="line"><a name="l00502"></a><span class="lineno"> 502</span>&#160;<span class="preprocessor">#define DSU_PID2_JEPU (_U_(0x1) &lt;&lt; DSU_PID2_JEPU_Pos)</span></div>
<div class="line"><a name="l00503"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#acb24de7b25b93dd1c040ed75899fd545"> 503</a></span>&#160;<span class="preprocessor">#define DSU_PID2_REVISION_Pos 4 </span></div>
<div class="line"><a name="l00504"></a><span class="lineno"> 504</span>&#160;<span class="preprocessor">#define DSU_PID2_REVISION_Msk (_U_(0xF) &lt;&lt; DSU_PID2_REVISION_Pos)</span></div>
<div class="line"><a name="l00505"></a><span class="lineno"> 505</span>&#160;<span class="preprocessor">#define DSU_PID2_REVISION(value) (DSU_PID2_REVISION_Msk &amp; ((value) &lt;&lt; DSU_PID2_REVISION_Pos))</span></div>
<div class="line"><a name="l00506"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a4166d965b2c546c98a12d698fd27aa37"> 506</a></span>&#160;<span class="preprocessor">#define DSU_PID2_MASK _U_(0x000000FF) </span></div>
<div class="line"><a name="l00508"></a><span class="lineno"> 508</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DSU_PID3 : (DSU Offset: 0x1FEC) (R/ 32) Peripheral Identification 3 -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00509"></a><span class="lineno"> 509</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00510"></a><span class="lineno"><a class="line" href="unionDSU__PID3__Type.html"> 510</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00511"></a><span class="lineno"> 511</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00512"></a><span class="lineno"><a class="line" href="unionDSU__PID3__Type.html#a04d461de3bfc43fdf0d13ce6bd6568fb"> 512</a></span>&#160; uint32_t <a class="code" href="unionDSU__PID3__Type.html#a04d461de3bfc43fdf0d13ce6bd6568fb">CUSMOD</a>:4; </div>
<div class="line"><a name="l00513"></a><span class="lineno"><a class="line" href="unionDSU__PID3__Type.html#a598eacfd55f65545266573f0a4008e3b"> 513</a></span>&#160; uint32_t <a class="code" href="unionDSU__PID3__Type.html#a598eacfd55f65545266573f0a4008e3b">REVAND</a>:4; </div>
<div class="line"><a name="l00514"></a><span class="lineno"><a class="line" href="unionDSU__PID3__Type.html#aade787ffbd28dc9ff6af87a7bcd54e49"> 514</a></span>&#160; uint32_t :24; </div>
<div class="line"><a name="l00515"></a><span class="lineno"><a class="line" href="unionDSU__PID3__Type.html#a2aad88dc92a4be7b06436e6fb6f16a3a"> 515</a></span>&#160; } bit; </div>
<div class="line"><a name="l00516"></a><span class="lineno"><a class="line" href="unionDSU__PID3__Type.html#a9f46417b3c6f6f6625067322d6c53e3d"> 516</a></span>&#160; uint32_t <a class="code" href="unionDSU__PID3__Type.html#a9f46417b3c6f6f6625067322d6c53e3d">reg</a>; </div>
<div class="line"><a name="l00517"></a><span class="lineno"> 517</span>&#160;} <a class="code" href="unionDSU__PID3__Type.html">DSU_PID3_Type</a>;</div>
<div class="line"><a name="l00518"></a><span class="lineno"> 518</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00519"></a><span class="lineno"> 519</span>&#160; </div>
<div class="line"><a name="l00520"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a0dadf53ca912be72cc37e2eddedbacfa"> 520</a></span>&#160;<span class="preprocessor">#define DSU_PID3_OFFSET 0x1FEC </span></div>
<div class="line"><a name="l00521"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aaf4259207024e68a7734aa815f281bb2"> 521</a></span>&#160;<span class="preprocessor">#define DSU_PID3_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00523"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ab4e2a84699bcb677236554a721bbe8f4"> 523</a></span>&#160;<span class="preprocessor">#define DSU_PID3_CUSMOD_Pos 0 </span></div>
<div class="line"><a name="l00524"></a><span class="lineno"> 524</span>&#160;<span class="preprocessor">#define DSU_PID3_CUSMOD_Msk (_U_(0xF) &lt;&lt; DSU_PID3_CUSMOD_Pos)</span></div>
<div class="line"><a name="l00525"></a><span class="lineno"> 525</span>&#160;<span class="preprocessor">#define DSU_PID3_CUSMOD(value) (DSU_PID3_CUSMOD_Msk &amp; ((value) &lt;&lt; DSU_PID3_CUSMOD_Pos))</span></div>
<div class="line"><a name="l00526"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a10e1892be1ad4ad3d2eb63267999efb9"> 526</a></span>&#160;<span class="preprocessor">#define DSU_PID3_REVAND_Pos 4 </span></div>
<div class="line"><a name="l00527"></a><span class="lineno"> 527</span>&#160;<span class="preprocessor">#define DSU_PID3_REVAND_Msk (_U_(0xF) &lt;&lt; DSU_PID3_REVAND_Pos)</span></div>
<div class="line"><a name="l00528"></a><span class="lineno"> 528</span>&#160;<span class="preprocessor">#define DSU_PID3_REVAND(value) (DSU_PID3_REVAND_Msk &amp; ((value) &lt;&lt; DSU_PID3_REVAND_Pos))</span></div>
<div class="line"><a name="l00529"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aeaed416954ecb7d99c60af8c7b68b8bb"> 529</a></span>&#160;<span class="preprocessor">#define DSU_PID3_MASK _U_(0x000000FF) </span></div>
<div class="line"><a name="l00531"></a><span class="lineno"> 531</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DSU_CID0 : (DSU Offset: 0x1FF0) (R/ 32) Component Identification 0 -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00532"></a><span class="lineno"> 532</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00533"></a><span class="lineno"><a class="line" href="unionDSU__CID0__Type.html"> 533</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00534"></a><span class="lineno"> 534</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00535"></a><span class="lineno"><a class="line" href="unionDSU__CID0__Type.html#a4f67dbdccd818eacce9caee8184313b6"> 535</a></span>&#160; uint32_t <a class="code" href="unionDSU__CID0__Type.html#a4f67dbdccd818eacce9caee8184313b6">PREAMBLEB0</a>:8; </div>
<div class="line"><a name="l00536"></a><span class="lineno"><a class="line" href="unionDSU__CID0__Type.html#a9fc892dd85fbaabe6cf7ae05e436dc79"> 536</a></span>&#160; uint32_t :24; </div>
<div class="line"><a name="l00537"></a><span class="lineno"><a class="line" href="unionDSU__CID0__Type.html#a97d9e010bda96428c9b26640f8f373dc"> 537</a></span>&#160; } bit; </div>
<div class="line"><a name="l00538"></a><span class="lineno"><a class="line" href="unionDSU__CID0__Type.html#a8a4e4e66f3ac668edceaa595bea2b403"> 538</a></span>&#160; uint32_t <a class="code" href="unionDSU__CID0__Type.html#a8a4e4e66f3ac668edceaa595bea2b403">reg</a>; </div>
<div class="line"><a name="l00539"></a><span class="lineno"> 539</span>&#160;} <a class="code" href="unionDSU__CID0__Type.html">DSU_CID0_Type</a>;</div>
<div class="line"><a name="l00540"></a><span class="lineno"> 540</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00541"></a><span class="lineno"> 541</span>&#160; </div>
<div class="line"><a name="l00542"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a04d4b050a6adad9da4caf0993e010d8f"> 542</a></span>&#160;<span class="preprocessor">#define DSU_CID0_OFFSET 0x1FF0 </span></div>
<div class="line"><a name="l00543"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a614c4aa7339cc2b804cd773e20ca7bf5"> 543</a></span>&#160;<span class="preprocessor">#define DSU_CID0_RESETVALUE _U_(0x0000000D) </span></div>
<div class="line"><a name="l00545"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a684c02c36c7acb7066c55e248c85c44e"> 545</a></span>&#160;<span class="preprocessor">#define DSU_CID0_PREAMBLEB0_Pos 0 </span></div>
<div class="line"><a name="l00546"></a><span class="lineno"> 546</span>&#160;<span class="preprocessor">#define DSU_CID0_PREAMBLEB0_Msk (_U_(0xFF) &lt;&lt; DSU_CID0_PREAMBLEB0_Pos)</span></div>
<div class="line"><a name="l00547"></a><span class="lineno"> 547</span>&#160;<span class="preprocessor">#define DSU_CID0_PREAMBLEB0(value) (DSU_CID0_PREAMBLEB0_Msk &amp; ((value) &lt;&lt; DSU_CID0_PREAMBLEB0_Pos))</span></div>
<div class="line"><a name="l00548"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a7c41f1841c69429dc59c6466b4fc0742"> 548</a></span>&#160;<span class="preprocessor">#define DSU_CID0_MASK _U_(0x000000FF) </span></div>
<div class="line"><a name="l00550"></a><span class="lineno"> 550</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DSU_CID1 : (DSU Offset: 0x1FF4) (R/ 32) Component Identification 1 -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00551"></a><span class="lineno"> 551</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00552"></a><span class="lineno"><a class="line" href="unionDSU__CID1__Type.html"> 552</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00553"></a><span class="lineno"> 553</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00554"></a><span class="lineno"><a class="line" href="unionDSU__CID1__Type.html#a5cbc7c9fca7f9e5bb863a79ea9646a22"> 554</a></span>&#160; uint32_t <a class="code" href="unionDSU__CID1__Type.html#a5cbc7c9fca7f9e5bb863a79ea9646a22">PREAMBLE</a>:4; </div>
<div class="line"><a name="l00555"></a><span class="lineno"><a class="line" href="unionDSU__CID1__Type.html#a6a434f2ad6ac5cfa07c0b03ca983bf4a"> 555</a></span>&#160; uint32_t <a class="code" href="unionDSU__CID1__Type.html#a6a434f2ad6ac5cfa07c0b03ca983bf4a">CCLASS</a>:4; </div>
<div class="line"><a name="l00556"></a><span class="lineno"><a class="line" href="unionDSU__CID1__Type.html#a43f1b63bc6afc0b82ced1f70bd30a8d7"> 556</a></span>&#160; uint32_t :24; </div>
<div class="line"><a name="l00557"></a><span class="lineno"><a class="line" href="unionDSU__CID1__Type.html#aa1ce77ee27fa29484e09d18da2e7de43"> 557</a></span>&#160; } bit; </div>
<div class="line"><a name="l00558"></a><span class="lineno"><a class="line" href="unionDSU__CID1__Type.html#a16b80bf740c34d6627ab2ede385062bd"> 558</a></span>&#160; uint32_t <a class="code" href="unionDSU__CID1__Type.html#a16b80bf740c34d6627ab2ede385062bd">reg</a>; </div>
<div class="line"><a name="l00559"></a><span class="lineno"> 559</span>&#160;} <a class="code" href="unionDSU__CID1__Type.html">DSU_CID1_Type</a>;</div>
<div class="line"><a name="l00560"></a><span class="lineno"> 560</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00561"></a><span class="lineno"> 561</span>&#160; </div>
<div class="line"><a name="l00562"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a1000fee5818fa48da89833ca079a3a5c"> 562</a></span>&#160;<span class="preprocessor">#define DSU_CID1_OFFSET 0x1FF4 </span></div>
<div class="line"><a name="l00563"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a0ddd2062d17bc1957afe23b2f02a46bd"> 563</a></span>&#160;<span class="preprocessor">#define DSU_CID1_RESETVALUE _U_(0x00000010) </span></div>
<div class="line"><a name="l00565"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a7496e12eabba3a78eaef45bd496a9c89"> 565</a></span>&#160;<span class="preprocessor">#define DSU_CID1_PREAMBLE_Pos 0 </span></div>
<div class="line"><a name="l00566"></a><span class="lineno"> 566</span>&#160;<span class="preprocessor">#define DSU_CID1_PREAMBLE_Msk (_U_(0xF) &lt;&lt; DSU_CID1_PREAMBLE_Pos)</span></div>
<div class="line"><a name="l00567"></a><span class="lineno"> 567</span>&#160;<span class="preprocessor">#define DSU_CID1_PREAMBLE(value) (DSU_CID1_PREAMBLE_Msk &amp; ((value) &lt;&lt; DSU_CID1_PREAMBLE_Pos))</span></div>
<div class="line"><a name="l00568"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aa505d5dbcb38fd84adf608eaaa7948a6"> 568</a></span>&#160;<span class="preprocessor">#define DSU_CID1_CCLASS_Pos 4 </span></div>
<div class="line"><a name="l00569"></a><span class="lineno"> 569</span>&#160;<span class="preprocessor">#define DSU_CID1_CCLASS_Msk (_U_(0xF) &lt;&lt; DSU_CID1_CCLASS_Pos)</span></div>
<div class="line"><a name="l00570"></a><span class="lineno"> 570</span>&#160;<span class="preprocessor">#define DSU_CID1_CCLASS(value) (DSU_CID1_CCLASS_Msk &amp; ((value) &lt;&lt; DSU_CID1_CCLASS_Pos))</span></div>
<div class="line"><a name="l00571"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ab3c48e6716c2288f0cbecf4a4991dcff"> 571</a></span>&#160;<span class="preprocessor">#define DSU_CID1_MASK _U_(0x000000FF) </span></div>
<div class="line"><a name="l00573"></a><span class="lineno"> 573</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DSU_CID2 : (DSU Offset: 0x1FF8) (R/ 32) Component Identification 2 -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00574"></a><span class="lineno"> 574</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00575"></a><span class="lineno"><a class="line" href="unionDSU__CID2__Type.html"> 575</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00576"></a><span class="lineno"> 576</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00577"></a><span class="lineno"><a class="line" href="unionDSU__CID2__Type.html#a0d67e7e8f97e11bd49cc3027552f3982"> 577</a></span>&#160; uint32_t <a class="code" href="unionDSU__CID2__Type.html#a0d67e7e8f97e11bd49cc3027552f3982">PREAMBLEB2</a>:8; </div>
<div class="line"><a name="l00578"></a><span class="lineno"><a class="line" href="unionDSU__CID2__Type.html#ab25c90ecedbc4f5e4029b461e5bcc561"> 578</a></span>&#160; uint32_t :24; </div>
<div class="line"><a name="l00579"></a><span class="lineno"><a class="line" href="unionDSU__CID2__Type.html#aac605472191c04fd2842d985dec43322"> 579</a></span>&#160; } bit; </div>
<div class="line"><a name="l00580"></a><span class="lineno"><a class="line" href="unionDSU__CID2__Type.html#aa92726fca48db414a4835715945680a6"> 580</a></span>&#160; uint32_t <a class="code" href="unionDSU__CID2__Type.html#aa92726fca48db414a4835715945680a6">reg</a>; </div>
<div class="line"><a name="l00581"></a><span class="lineno"> 581</span>&#160;} <a class="code" href="unionDSU__CID2__Type.html">DSU_CID2_Type</a>;</div>
<div class="line"><a name="l00582"></a><span class="lineno"> 582</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00583"></a><span class="lineno"> 583</span>&#160; </div>
<div class="line"><a name="l00584"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ab07b638d6710bb917955217815dcd84e"> 584</a></span>&#160;<span class="preprocessor">#define DSU_CID2_OFFSET 0x1FF8 </span></div>
<div class="line"><a name="l00585"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a0276c33d43081b5c8cd478b611723f36"> 585</a></span>&#160;<span class="preprocessor">#define DSU_CID2_RESETVALUE _U_(0x00000005) </span></div>
<div class="line"><a name="l00587"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a755afb0dc289f0eeaaf805636836da72"> 587</a></span>&#160;<span class="preprocessor">#define DSU_CID2_PREAMBLEB2_Pos 0 </span></div>
<div class="line"><a name="l00588"></a><span class="lineno"> 588</span>&#160;<span class="preprocessor">#define DSU_CID2_PREAMBLEB2_Msk (_U_(0xFF) &lt;&lt; DSU_CID2_PREAMBLEB2_Pos)</span></div>
<div class="line"><a name="l00589"></a><span class="lineno"> 589</span>&#160;<span class="preprocessor">#define DSU_CID2_PREAMBLEB2(value) (DSU_CID2_PREAMBLEB2_Msk &amp; ((value) &lt;&lt; DSU_CID2_PREAMBLEB2_Pos))</span></div>
<div class="line"><a name="l00590"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aedee750a7bad4de75131402ddea84c91"> 590</a></span>&#160;<span class="preprocessor">#define DSU_CID2_MASK _U_(0x000000FF) </span></div>
<div class="line"><a name="l00592"></a><span class="lineno"> 592</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- DSU_CID3 : (DSU Offset: 0x1FFC) (R/ 32) Component Identification 3 -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00593"></a><span class="lineno"> 593</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00594"></a><span class="lineno"><a class="line" href="unionDSU__CID3__Type.html"> 594</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00595"></a><span class="lineno"> 595</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00596"></a><span class="lineno"><a class="line" href="unionDSU__CID3__Type.html#a60cd69bfe21330ce7858e113b8da44ae"> 596</a></span>&#160; uint32_t <a class="code" href="unionDSU__CID3__Type.html#a60cd69bfe21330ce7858e113b8da44ae">PREAMBLEB3</a>:8; </div>
<div class="line"><a name="l00597"></a><span class="lineno"><a class="line" href="unionDSU__CID3__Type.html#ab19860ea692b13ae19bf330d41833d94"> 597</a></span>&#160; uint32_t :24; </div>
<div class="line"><a name="l00598"></a><span class="lineno"><a class="line" href="unionDSU__CID3__Type.html#aae37a04e2a970cbe7c3cf59e4dc2f240"> 598</a></span>&#160; } bit; </div>
<div class="line"><a name="l00599"></a><span class="lineno"><a class="line" href="unionDSU__CID3__Type.html#afeb585a31166086d971e8b8fb779bb9d"> 599</a></span>&#160; uint32_t <a class="code" href="unionDSU__CID3__Type.html#afeb585a31166086d971e8b8fb779bb9d">reg</a>; </div>
<div class="line"><a name="l00600"></a><span class="lineno"> 600</span>&#160;} <a class="code" href="unionDSU__CID3__Type.html">DSU_CID3_Type</a>;</div>
<div class="line"><a name="l00601"></a><span class="lineno"> 601</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00602"></a><span class="lineno"> 602</span>&#160; </div>
<div class="line"><a name="l00603"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a9863199733ba4498f102f28fc2c40021"> 603</a></span>&#160;<span class="preprocessor">#define DSU_CID3_OFFSET 0x1FFC </span></div>
<div class="line"><a name="l00604"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a8cfe3b4da150c87da70eccd4c07280f4"> 604</a></span>&#160;<span class="preprocessor">#define DSU_CID3_RESETVALUE _U_(0x000000B1) </span></div>
<div class="line"><a name="l00606"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ad11a14455b5f888c07616d9c56808b09"> 606</a></span>&#160;<span class="preprocessor">#define DSU_CID3_PREAMBLEB3_Pos 0 </span></div>
<div class="line"><a name="l00607"></a><span class="lineno"> 607</span>&#160;<span class="preprocessor">#define DSU_CID3_PREAMBLEB3_Msk (_U_(0xFF) &lt;&lt; DSU_CID3_PREAMBLEB3_Pos)</span></div>
<div class="line"><a name="l00608"></a><span class="lineno"> 608</span>&#160;<span class="preprocessor">#define DSU_CID3_PREAMBLEB3(value) (DSU_CID3_PREAMBLEB3_Msk &amp; ((value) &lt;&lt; DSU_CID3_PREAMBLEB3_Pos))</span></div>
<div class="line"><a name="l00609"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a7b551efb4b690585f91a21e36b24215f"> 609</a></span>&#160;<span class="preprocessor">#define DSU_CID3_MASK _U_(0x000000FF) </span></div>
<div class="line"><a name="l00612"></a><span class="lineno"> 612</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00613"></a><span class="lineno"><a class="line" href="structDsu.html"> 613</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00614"></a><span class="lineno"><a class="line" href="structDsu.html#a37a45b5734e68c25515884abbc7354bc"> 614</a></span>&#160; __O <a class="code" href="unionDSU__CTRL__Type.html">DSU_CTRL_Type</a> <a class="code" href="structDsu.html#a37a45b5734e68c25515884abbc7354bc">CTRL</a>; </div>
<div class="line"><a name="l00615"></a><span class="lineno"><a class="line" href="structDsu.html#af251ab6944603f4ffcc03a04c3a591af"> 615</a></span>&#160; __IO <a class="code" href="unionDSU__STATUSA__Type.html">DSU_STATUSA_Type</a> <a class="code" href="structDsu.html#af251ab6944603f4ffcc03a04c3a591af">STATUSA</a>; </div>
<div class="line"><a name="l00616"></a><span class="lineno"><a class="line" href="structDsu.html#aff3083b68480ee6d95d4213577136659"> 616</a></span>&#160; __I <a class="code" href="unionDSU__STATUSB__Type.html">DSU_STATUSB_Type</a> <a class="code" href="structDsu.html#aff3083b68480ee6d95d4213577136659">STATUSB</a>; </div>
<div class="line"><a name="l00617"></a><span class="lineno"> 617</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved1[0x1];</div>
<div class="line"><a name="l00618"></a><span class="lineno"><a class="line" href="structDsu.html#a453e7beb133d9b05320a24aba312f7f0"> 618</a></span>&#160; __IO <a class="code" href="unionDSU__ADDR__Type.html">DSU_ADDR_Type</a> <a class="code" href="structDsu.html#a453e7beb133d9b05320a24aba312f7f0">ADDR</a>; </div>
<div class="line"><a name="l00619"></a><span class="lineno"><a class="line" href="structDsu.html#af13eeff822c0542965939b8a078bc496"> 619</a></span>&#160; __IO <a class="code" href="unionDSU__LENGTH__Type.html">DSU_LENGTH_Type</a> <a class="code" href="structDsu.html#af13eeff822c0542965939b8a078bc496">LENGTH</a>; </div>
<div class="line"><a name="l00620"></a><span class="lineno"><a class="line" href="structDsu.html#a0a0cae05796695f78b4e5536792c8953"> 620</a></span>&#160; __IO <a class="code" href="unionDSU__DATA__Type.html">DSU_DATA_Type</a> <a class="code" href="structDsu.html#a0a0cae05796695f78b4e5536792c8953">DATA</a>; </div>
<div class="line"><a name="l00621"></a><span class="lineno"><a class="line" href="structDsu.html#a8cd3250ce850a65d90af4f8b31c6293c"> 621</a></span>&#160; __IO <a class="code" href="unionDSU__DCC__Type.html">DSU_DCC_Type</a> DCC[2]; </div>
<div class="line"><a name="l00622"></a><span class="lineno"><a class="line" href="structDsu.html#ae8a2a4525dd77831e3bba601b5eaf924"> 622</a></span>&#160; __I <a class="code" href="unionDSU__DID__Type.html">DSU_DID_Type</a> <a class="code" href="structDsu.html#ae8a2a4525dd77831e3bba601b5eaf924">DID</a>; </div>
<div class="line"><a name="l00623"></a><span class="lineno"><a class="line" href="structDsu.html#a0a408f4b65eefa0933f2cce115230e3d"> 623</a></span>&#160; __IO <a class="code" href="unionDSU__CFG__Type.html">DSU_CFG_Type</a> <a class="code" href="structDsu.html#a0a408f4b65eefa0933f2cce115230e3d">CFG</a>; </div>
<div class="line"><a name="l00624"></a><span class="lineno"> 624</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved2[0xFE0];</div>
<div class="line"><a name="l00625"></a><span class="lineno"><a class="line" href="structDsu.html#a42805e1dcd37f9686cf024f3ab13e486"> 625</a></span>&#160; __I <a class="code" href="unionDSU__ENTRY0__Type.html">DSU_ENTRY0_Type</a> <a class="code" href="structDsu.html#a42805e1dcd37f9686cf024f3ab13e486">ENTRY0</a>; </div>
<div class="line"><a name="l00626"></a><span class="lineno"><a class="line" href="structDsu.html#a8d46a28676e73cd6c269d047ca71550e"> 626</a></span>&#160; __I <a class="code" href="unionDSU__ENTRY1__Type.html">DSU_ENTRY1_Type</a> <a class="code" href="structDsu.html#a8d46a28676e73cd6c269d047ca71550e">ENTRY1</a>; </div>
<div class="line"><a name="l00627"></a><span class="lineno"><a class="line" href="structDsu.html#ae320db89e4b834b02befb5aa2867ce09"> 627</a></span>&#160; __I <a class="code" href="unionDSU__END__Type.html">DSU_END_Type</a> <a class="code" href="structDsu.html#ae320db89e4b834b02befb5aa2867ce09">END</a>; </div>
<div class="line"><a name="l00628"></a><span class="lineno"> 628</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved3[0xFC0];</div>
<div class="line"><a name="l00629"></a><span class="lineno"><a class="line" href="structDsu.html#a408d8afc257ed78a3169ca958d24a5aa"> 629</a></span>&#160; __I <a class="code" href="unionDSU__MEMTYPE__Type.html">DSU_MEMTYPE_Type</a> <a class="code" href="structDsu.html#a408d8afc257ed78a3169ca958d24a5aa">MEMTYPE</a>; </div>
<div class="line"><a name="l00630"></a><span class="lineno"><a class="line" href="structDsu.html#af1aef1af23b9c04fa51bb38d3d49d980"> 630</a></span>&#160; __I <a class="code" href="unionDSU__PID4__Type.html">DSU_PID4_Type</a> <a class="code" href="structDsu.html#af1aef1af23b9c04fa51bb38d3d49d980">PID4</a>; </div>
<div class="line"><a name="l00631"></a><span class="lineno"><a class="line" href="structDsu.html#a96116374ab1f4811e73ce3b53b2a4908"> 631</a></span>&#160; __I <a class="code" href="unionDSU__PID5__Type.html">DSU_PID5_Type</a> <a class="code" href="structDsu.html#a96116374ab1f4811e73ce3b53b2a4908">PID5</a>; </div>
<div class="line"><a name="l00632"></a><span class="lineno"><a class="line" href="structDsu.html#affd7dad98096b621d482b72f42fce5e8"> 632</a></span>&#160; __I <a class="code" href="unionDSU__PID6__Type.html">DSU_PID6_Type</a> <a class="code" href="structDsu.html#affd7dad98096b621d482b72f42fce5e8">PID6</a>; </div>
<div class="line"><a name="l00633"></a><span class="lineno"><a class="line" href="structDsu.html#a8a733fbde9d20baf89a47df500770071"> 633</a></span>&#160; __I <a class="code" href="unionDSU__PID7__Type.html">DSU_PID7_Type</a> <a class="code" href="structDsu.html#a8a733fbde9d20baf89a47df500770071">PID7</a>; </div>
<div class="line"><a name="l00634"></a><span class="lineno"><a class="line" href="structDsu.html#a60c2a9199ffaae85c76de6c28fc15ec1"> 634</a></span>&#160; __I <a class="code" href="unionDSU__PID0__Type.html">DSU_PID0_Type</a> <a class="code" href="structDsu.html#a60c2a9199ffaae85c76de6c28fc15ec1">PID0</a>; </div>
<div class="line"><a name="l00635"></a><span class="lineno"><a class="line" href="structDsu.html#aeafe6f433e6983dedb1b78efe1508991"> 635</a></span>&#160; __I <a class="code" href="unionDSU__PID1__Type.html">DSU_PID1_Type</a> <a class="code" href="structDsu.html#aeafe6f433e6983dedb1b78efe1508991">PID1</a>; </div>
<div class="line"><a name="l00636"></a><span class="lineno"><a class="line" href="structDsu.html#ae7543be9132a30e1a0a3d2585fa74ad7"> 636</a></span>&#160; __I <a class="code" href="unionDSU__PID2__Type.html">DSU_PID2_Type</a> <a class="code" href="structDsu.html#ae7543be9132a30e1a0a3d2585fa74ad7">PID2</a>; </div>
<div class="line"><a name="l00637"></a><span class="lineno"><a class="line" href="structDsu.html#a12e3fc61b1f37f213768fded01011226"> 637</a></span>&#160; __I <a class="code" href="unionDSU__PID3__Type.html">DSU_PID3_Type</a> <a class="code" href="structDsu.html#a12e3fc61b1f37f213768fded01011226">PID3</a>; </div>
<div class="line"><a name="l00638"></a><span class="lineno"><a class="line" href="structDsu.html#acd4b45b637efcb62b9f67c877dcbb4ce"> 638</a></span>&#160; __I <a class="code" href="unionDSU__CID0__Type.html">DSU_CID0_Type</a> <a class="code" href="structDsu.html#acd4b45b637efcb62b9f67c877dcbb4ce">CID0</a>; </div>
<div class="line"><a name="l00639"></a><span class="lineno"><a class="line" href="structDsu.html#afeea7b5b5fee7f91ca2886b616f3d4c3"> 639</a></span>&#160; __I <a class="code" href="unionDSU__CID1__Type.html">DSU_CID1_Type</a> <a class="code" href="structDsu.html#afeea7b5b5fee7f91ca2886b616f3d4c3">CID1</a>; </div>
<div class="line"><a name="l00640"></a><span class="lineno"><a class="line" href="structDsu.html#afaa3b33371d8b21883936c53a879d61f"> 640</a></span>&#160; __I <a class="code" href="unionDSU__CID2__Type.html">DSU_CID2_Type</a> <a class="code" href="structDsu.html#afaa3b33371d8b21883936c53a879d61f">CID2</a>; </div>
<div class="line"><a name="l00641"></a><span class="lineno"><a class="line" href="structDsu.html#a8ce289f77dfa3331bc94ae699c6031d7"> 641</a></span>&#160; __I <a class="code" href="unionDSU__CID3__Type.html">DSU_CID3_Type</a> <a class="code" href="structDsu.html#a8ce289f77dfa3331bc94ae699c6031d7">CID3</a>; </div>
<div class="line"><a name="l00642"></a><span class="lineno"> 642</span>&#160;} <a class="code" href="structDsu.html">Dsu</a>;</div>
<div class="line"><a name="l00643"></a><span class="lineno"> 643</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00644"></a><span class="lineno"> 644</span>&#160; </div>
<div class="line"><a name="l00647"></a><span class="lineno"> 647</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_DSU_COMPONENT_ */</span><span class="preprocessor"></span></div>
</div><!-- fragment --></div><!-- contents -->
<div class="ttc" id="aunionDSU__DATA__Type_html_a0793b4370bb1175b9222fa2ec65667b7"><div class="ttname"><a href="unionDSU__DATA__Type.html#a0793b4370bb1175b9222fa2ec65667b7">DSU_DATA_Type::DATA</a></div><div class="ttdeci">uint32_t DATA</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00192">dsu.h:192</a></div></div>
<div class="ttc" id="aunionDSU__CID3__Type_html"><div class="ttname"><a href="unionDSU__CID3__Type.html">DSU_CID3_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00594">dsu.h:594</a></div></div>
<div class="ttc" id="aunionDSU__ADDR__Type_html_af80527c464042fc13266915c73e62ef4"><div class="ttname"><a href="unionDSU__ADDR__Type.html#af80527c464042fc13266915c73e62ef4">DSU_ADDR_Type::ADDR</a></div><div class="ttdeci">uint32_t ADDR</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00152">dsu.h:152</a></div></div>
<div class="ttc" id="aunionDSU__PID1__Type_html_a00638eca3237e0bfedae6c22418203e5"><div class="ttname"><a href="unionDSU__PID1__Type.html#a00638eca3237e0bfedae6c22418203e5">DSU_PID1_Type::JEPIDCL</a></div><div class="ttdeci">uint32_t JEPIDCL</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00464">dsu.h:464</a></div></div>
<div class="ttc" id="astructDsu_html_afaa3b33371d8b21883936c53a879d61f"><div class="ttname"><a href="structDsu.html#afaa3b33371d8b21883936c53a879d61f">Dsu::CID2</a></div><div class="ttdeci">__I DSU_CID2_Type CID2</div><div class="ttdoc">Offset: 0x1FF8 (R/ 32) Component Identification 2.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00640">dsu.h:640</a></div></div>
<div class="ttc" id="aunionDSU__STATUSA__Type_html_a23415dfa2ba81d7e98774bd358c40db8"><div class="ttname"><a href="unionDSU__STATUSA__Type.html#a23415dfa2ba81d7e98774bd358c40db8">DSU_STATUSA_Type::BERR</a></div><div class="ttdeci">uint8_t BERR</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00082">dsu.h:82</a></div></div>
<div class="ttc" id="aunionDSU__PID3__Type_html"><div class="ttname"><a href="unionDSU__PID3__Type.html">DSU_PID3_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00510">dsu.h:510</a></div></div>
<div class="ttc" id="astructDsu_html_ae7543be9132a30e1a0a3d2585fa74ad7"><div class="ttname"><a href="structDsu.html#ae7543be9132a30e1a0a3d2585fa74ad7">Dsu::PID2</a></div><div class="ttdeci">__I DSU_PID2_Type PID2</div><div class="ttdoc">Offset: 0x1FE8 (R/ 32) Peripheral Identification 2.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00636">dsu.h:636</a></div></div>
<div class="ttc" id="aunionDSU__CID1__Type_html_a6a434f2ad6ac5cfa07c0b03ca983bf4a"><div class="ttname"><a href="unionDSU__CID1__Type.html#a6a434f2ad6ac5cfa07c0b03ca983bf4a">DSU_CID1_Type::CCLASS</a></div><div class="ttdeci">uint32_t CCLASS</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00555">dsu.h:555</a></div></div>
<div class="ttc" id="aunionDSU__ENTRY0__Type_html"><div class="ttname"><a href="unionDSU__ENTRY0__Type.html">DSU_ENTRY0_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00314">dsu.h:314</a></div></div>
<div class="ttc" id="aunionDSU__PID3__Type_html_a598eacfd55f65545266573f0a4008e3b"><div class="ttname"><a href="unionDSU__PID3__Type.html#a598eacfd55f65545266573f0a4008e3b">DSU_PID3_Type::REVAND</a></div><div class="ttdeci">uint32_t REVAND</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00513">dsu.h:513</a></div></div>
<div class="ttc" id="aunionDSU__CID0__Type_html"><div class="ttname"><a href="unionDSU__CID0__Type.html">DSU_CID0_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00533">dsu.h:533</a></div></div>
<div class="ttc" id="aunionDSU__PID3__Type_html_a9f46417b3c6f6f6625067322d6c53e3d"><div class="ttname"><a href="unionDSU__PID3__Type.html#a9f46417b3c6f6f6625067322d6c53e3d">DSU_PID3_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00516">dsu.h:516</a></div></div>
<div class="ttc" id="aunionDSU__CTRL__Type_html_aead0ceef9a72bc2e2e07d865be80b89c"><div class="ttname"><a href="unionDSU__CTRL__Type.html#aead0ceef9a72bc2e2e07d865be80b89c">DSU_CTRL_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00055">dsu.h:55</a></div></div>
<div class="ttc" id="astructDsu_html_a12e3fc61b1f37f213768fded01011226"><div class="ttname"><a href="structDsu.html#a12e3fc61b1f37f213768fded01011226">Dsu::PID3</a></div><div class="ttdeci">__I DSU_PID3_Type PID3</div><div class="ttdoc">Offset: 0x1FEC (R/ 32) Peripheral Identification 3.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00637">dsu.h:637</a></div></div>
<div class="ttc" id="aunionDSU__DID__Type_html_aa98a458040daf79582a83e77c0a55a5d"><div class="ttname"><a href="unionDSU__DID__Type.html#aa98a458040daf79582a83e77c0a55a5d">DSU_DID_Type::DIE</a></div><div class="ttdeci">uint32_t DIE</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00230">dsu.h:230</a></div></div>
<div class="ttc" id="aunionDSU__PID0__Type_html"><div class="ttname"><a href="unionDSU__PID0__Type.html">DSU_PID0_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00442">dsu.h:442</a></div></div>
<div class="ttc" id="aunionDSU__ADDR__Type_html_a21c57af42627a2ac52a4e1599582c241"><div class="ttname"><a href="unionDSU__ADDR__Type.html#a21c57af42627a2ac52a4e1599582c241">DSU_ADDR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00154">dsu.h:154</a></div></div>
<div class="ttc" id="aunionDSU__CID2__Type_html_aa92726fca48db414a4835715945680a6"><div class="ttname"><a href="unionDSU__CID2__Type.html#aa92726fca48db414a4835715945680a6">DSU_CID2_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00580">dsu.h:580</a></div></div>
<div class="ttc" id="aunionDSU__MEMTYPE__Type_html_a9811ad777bc9653aaa34c9c298031513"><div class="ttname"><a href="unionDSU__MEMTYPE__Type.html#a9811ad777bc9653aaa34c9c298031513">DSU_MEMTYPE_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00373">dsu.h:373</a></div></div>
<div class="ttc" id="aunionDSU__CTRL__Type_html_a9a351c7d3ed4db72fe199f29441b24e4"><div class="ttname"><a href="unionDSU__CTRL__Type.html#a9a351c7d3ed4db72fe199f29441b24e4">DSU_CTRL_Type::CRC</a></div><div class="ttdeci">uint8_t CRC</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00048">dsu.h:48</a></div></div>
<div class="ttc" id="astructDsu_html_aff3083b68480ee6d95d4213577136659"><div class="ttname"><a href="structDsu.html#aff3083b68480ee6d95d4213577136659">Dsu::STATUSB</a></div><div class="ttdeci">__I DSU_STATUSB_Type STATUSB</div><div class="ttdoc">Offset: 0x0002 (R/ 8) Status B.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00616">dsu.h:616</a></div></div>
<div class="ttc" id="astructDsu_html_af13eeff822c0542965939b8a078bc496"><div class="ttname"><a href="structDsu.html#af13eeff822c0542965939b8a078bc496">Dsu::LENGTH</a></div><div class="ttdeci">__IO DSU_LENGTH_Type LENGTH</div><div class="ttdoc">Offset: 0x0008 (R/W 32) Length.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00619">dsu.h:619</a></div></div>
<div class="ttc" id="aunionDSU__END__Type_html_a24ad2e64ac7f159c62d9e1d30184432b"><div class="ttname"><a href="unionDSU__END__Type.html#a24ad2e64ac7f159c62d9e1d30184432b">DSU_END_Type::END</a></div><div class="ttdeci">uint32_t END</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00352">dsu.h:352</a></div></div>
<div class="ttc" id="astructDsu_html_a453e7beb133d9b05320a24aba312f7f0"><div class="ttname"><a href="structDsu.html#a453e7beb133d9b05320a24aba312f7f0">Dsu::ADDR</a></div><div class="ttdeci">__IO DSU_ADDR_Type ADDR</div><div class="ttdoc">Offset: 0x0004 (R/W 32) Address.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00618">dsu.h:618</a></div></div>
<div class="ttc" id="aunionDSU__CID3__Type_html_afeb585a31166086d971e8b8fb779bb9d"><div class="ttname"><a href="unionDSU__CID3__Type.html#afeb585a31166086d971e8b8fb779bb9d">DSU_CID3_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00599">dsu.h:599</a></div></div>
<div class="ttc" id="aunionDSU__DID__Type_html_a6b84fbd4364f870cc96a9da2fe7fe02b"><div class="ttname"><a href="unionDSU__DID__Type.html#a6b84fbd4364f870cc96a9da2fe7fe02b">DSU_DID_Type::DEVSEL</a></div><div class="ttdeci">uint32_t DEVSEL</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00228">dsu.h:228</a></div></div>
<div class="ttc" id="astructDsu_html_a96116374ab1f4811e73ce3b53b2a4908"><div class="ttname"><a href="structDsu.html#a96116374ab1f4811e73ce3b53b2a4908">Dsu::PID5</a></div><div class="ttdeci">__I DSU_PID5_Type PID5</div><div class="ttdoc">Offset: 0x1FD4 (R/ 32) Peripheral Identification 5.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00631">dsu.h:631</a></div></div>
<div class="ttc" id="aunionDSU__ENTRY0__Type_html_aa3926f1f9527552a50337fd2b24716ff"><div class="ttname"><a href="unionDSU__ENTRY0__Type.html#aa3926f1f9527552a50337fd2b24716ff">DSU_ENTRY0_Type::FMT</a></div><div class="ttdeci">uint32_t FMT</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00317">dsu.h:317</a></div></div>
<div class="ttc" id="aunionDSU__PID7__Type_html"><div class="ttname"><a href="unionDSU__PID7__Type.html">DSU_PID7_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00431">dsu.h:431</a></div></div>
<div class="ttc" id="astructDsu_html_a8a733fbde9d20baf89a47df500770071"><div class="ttname"><a href="structDsu.html#a8a733fbde9d20baf89a47df500770071">Dsu::PID7</a></div><div class="ttdeci">__I DSU_PID7_Type PID7</div><div class="ttdoc">Offset: 0x1FDC (R/ 32) Peripheral Identification 7.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00633">dsu.h:633</a></div></div>
<div class="ttc" id="aunionDSU__CID2__Type_html_a0d67e7e8f97e11bd49cc3027552f3982"><div class="ttname"><a href="unionDSU__CID2__Type.html#a0d67e7e8f97e11bd49cc3027552f3982">DSU_CID2_Type::PREAMBLEB2</a></div><div class="ttdeci">uint32_t PREAMBLEB2</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00577">dsu.h:577</a></div></div>
<div class="ttc" id="astructDsu_html_a37a45b5734e68c25515884abbc7354bc"><div class="ttname"><a href="structDsu.html#a37a45b5734e68c25515884abbc7354bc">Dsu::CTRL</a></div><div class="ttdeci">__O DSU_CTRL_Type CTRL</div><div class="ttdoc">Offset: 0x0000 ( /W 8) Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00614">dsu.h:614</a></div></div>
<div class="ttc" id="aunionDSU__PID6__Type_html_a5c9f3720d55b56e6aef2b71ac0b50a13"><div class="ttname"><a href="unionDSU__PID6__Type.html#a5c9f3720d55b56e6aef2b71ac0b50a13">DSU_PID6_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00421">dsu.h:421</a></div></div>
<div class="ttc" id="aunionDSU__PID5__Type_html_a381ed71ad8950e0059bf48ed20c78e9d"><div class="ttname"><a href="unionDSU__PID5__Type.html#a381ed71ad8950e0059bf48ed20c78e9d">DSU_PID5_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00410">dsu.h:410</a></div></div>
<div class="ttc" id="aunionDSU__PID4__Type_html_a6fdd5fe268e92ffe333394c0eb34431a"><div class="ttname"><a href="unionDSU__PID4__Type.html#a6fdd5fe268e92ffe333394c0eb34431a">DSU_PID4_Type::FKBC</a></div><div class="ttdeci">uint32_t FKBC</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00389">dsu.h:389</a></div></div>
<div class="ttc" id="astructDsu_html_a8d46a28676e73cd6c269d047ca71550e"><div class="ttname"><a href="structDsu.html#a8d46a28676e73cd6c269d047ca71550e">Dsu::ENTRY1</a></div><div class="ttdeci">__I DSU_ENTRY1_Type ENTRY1</div><div class="ttdoc">Offset: 0x1004 (R/ 32) CoreSight ROM Table Entry 1.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00626">dsu.h:626</a></div></div>
<div class="ttc" id="astructDsu_html_a60c2a9199ffaae85c76de6c28fc15ec1"><div class="ttname"><a href="structDsu.html#a60c2a9199ffaae85c76de6c28fc15ec1">Dsu::PID0</a></div><div class="ttdeci">__I DSU_PID0_Type PID0</div><div class="ttdoc">Offset: 0x1FE0 (R/ 32) Peripheral Identification 0.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00634">dsu.h:634</a></div></div>
<div class="ttc" id="aunionDSU__CID2__Type_html"><div class="ttname"><a href="unionDSU__CID2__Type.html">DSU_CID2_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00575">dsu.h:575</a></div></div>
<div class="ttc" id="aunionDSU__CTRL__Type_html_a65fe38370088ef03ea4be1a7e98d91b6"><div class="ttname"><a href="unionDSU__CTRL__Type.html#a65fe38370088ef03ea4be1a7e98d91b6">DSU_CTRL_Type::ARR</a></div><div class="ttdeci">uint8_t ARR</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00052">dsu.h:52</a></div></div>
<div class="ttc" id="astructDsu_html_afeea7b5b5fee7f91ca2886b616f3d4c3"><div class="ttname"><a href="structDsu.html#afeea7b5b5fee7f91ca2886b616f3d4c3">Dsu::CID1</a></div><div class="ttdeci">__I DSU_CID1_Type CID1</div><div class="ttdoc">Offset: 0x1FF4 (R/ 32) Component Identification 1.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00639">dsu.h:639</a></div></div>
<div class="ttc" id="aunionDSU__PID2__Type_html_ae1fa34e088136d567cd1769499c50ab3"><div class="ttname"><a href="unionDSU__PID2__Type.html#ae1fa34e088136d567cd1769499c50ab3">DSU_PID2_Type::JEPU</a></div><div class="ttdeci">uint32_t JEPU</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00487">dsu.h:487</a></div></div>
<div class="ttc" id="aunionDSU__PID2__Type_html"><div class="ttname"><a href="unionDSU__PID2__Type.html">DSU_PID2_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00484">dsu.h:484</a></div></div>
<div class="ttc" id="aunionDSU__DCC__Type_html_ae3e5ccae0e39ab81ad4667dc5dab6f66"><div class="ttname"><a href="unionDSU__DCC__Type.html#ae3e5ccae0e39ab81ad4667dc5dab6f66">DSU_DCC_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00212">dsu.h:212</a></div></div>
<div class="ttc" id="aunionDSU__PID1__Type_html_af789ec8a7e1fa2718283e9374643cd10"><div class="ttname"><a href="unionDSU__PID1__Type.html#af789ec8a7e1fa2718283e9374643cd10">DSU_PID1_Type::PARTNBH</a></div><div class="ttdeci">uint32_t PARTNBH</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00463">dsu.h:463</a></div></div>
<div class="ttc" id="astructDsu_html_a0a0cae05796695f78b4e5536792c8953"><div class="ttname"><a href="structDsu.html#a0a0cae05796695f78b4e5536792c8953">Dsu::DATA</a></div><div class="ttdeci">__IO DSU_DATA_Type DATA</div><div class="ttdoc">Offset: 0x000C (R/W 32) Data.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00620">dsu.h:620</a></div></div>
<div class="ttc" id="aunionDSU__ENTRY0__Type_html_a3f265550e3d4a038a1e359d8ae807c48"><div class="ttname"><a href="unionDSU__ENTRY0__Type.html#a3f265550e3d4a038a1e359d8ae807c48">DSU_ENTRY0_Type::EPRES</a></div><div class="ttdeci">uint32_t EPRES</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00316">dsu.h:316</a></div></div>
<div class="ttc" id="aunionDSU__STATUSB__Type_html_a9db72198105203a1f2a2408e0cea70d9"><div class="ttname"><a href="unionDSU__STATUSB__Type.html#a9db72198105203a1f2a2408e0cea70d9">DSU_STATUSB_Type::PROT</a></div><div class="ttdeci">uint8_t PROT</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00110">dsu.h:110</a></div></div>
<div class="ttc" id="astructDsu_html_af1aef1af23b9c04fa51bb38d3d49d980"><div class="ttname"><a href="structDsu.html#af1aef1af23b9c04fa51bb38d3d49d980">Dsu::PID4</a></div><div class="ttdeci">__I DSU_PID4_Type PID4</div><div class="ttdoc">Offset: 0x1FD0 (R/ 32) Peripheral Identification 4.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00630">dsu.h:630</a></div></div>
<div class="ttc" id="aunionDSU__STATUSA__Type_html_a6c012a1306fb8f409347e5a8a333998a"><div class="ttname"><a href="unionDSU__STATUSA__Type.html#a6c012a1306fb8f409347e5a8a333998a">DSU_STATUSA_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00087">dsu.h:87</a></div></div>
<div class="ttc" id="aunionDSU__PID6__Type_html"><div class="ttname"><a href="unionDSU__PID6__Type.html">DSU_PID6_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00420">dsu.h:420</a></div></div>
<div class="ttc" id="aunionDSU__PID4__Type_html_a351cf48be2b0e2845a7a8987c3c869f8"><div class="ttname"><a href="unionDSU__PID4__Type.html#a351cf48be2b0e2845a7a8987c3c869f8">DSU_PID4_Type::JEPCC</a></div><div class="ttdeci">uint32_t JEPCC</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00388">dsu.h:388</a></div></div>
<div class="ttc" id="aunionDSU__ENTRY1__Type_html"><div class="ttname"><a href="unionDSU__ENTRY1__Type.html">DSU_ENTRY1_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00339">dsu.h:339</a></div></div>
<div class="ttc" id="aunionDSU__CTRL__Type_html_a88845326ae957d9f9ce3c15a0cac4963"><div class="ttname"><a href="unionDSU__CTRL__Type.html#a88845326ae957d9f9ce3c15a0cac4963">DSU_CTRL_Type::SMSA</a></div><div class="ttdeci">uint8_t SMSA</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00053">dsu.h:53</a></div></div>
<div class="ttc" id="aunionDSU__PID0__Type_html_a7db2231c24781271c48df2f5fb7805a6"><div class="ttname"><a href="unionDSU__PID0__Type.html#a7db2231c24781271c48df2f5fb7805a6">DSU_PID0_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00447">dsu.h:447</a></div></div>
<div class="ttc" id="aunionDSU__CID3__Type_html_a60cd69bfe21330ce7858e113b8da44ae"><div class="ttname"><a href="unionDSU__CID3__Type.html#a60cd69bfe21330ce7858e113b8da44ae">DSU_CID3_Type::PREAMBLEB3</a></div><div class="ttdeci">uint32_t PREAMBLEB3</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00596">dsu.h:596</a></div></div>
<div class="ttc" id="aunionDSU__CFG__Type_html_a9fc453e5a388cd9ce3a67d9fb80aa3ff"><div class="ttname"><a href="unionDSU__CFG__Type.html#a9fc453e5a388cd9ce3a67d9fb80aa3ff">DSU_CFG_Type::DCCDMALEVEL</a></div><div class="ttdeci">uint32_t DCCDMALEVEL</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00287">dsu.h:287</a></div></div>
<div class="ttc" id="aunionDSU__PID2__Type_html_aa77daad8160c0503bf4348a988c1580d"><div class="ttname"><a href="unionDSU__PID2__Type.html#aa77daad8160c0503bf4348a988c1580d">DSU_PID2_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00491">dsu.h:491</a></div></div>
<div class="ttc" id="astructDsu_html_ae320db89e4b834b02befb5aa2867ce09"><div class="ttname"><a href="structDsu.html#ae320db89e4b834b02befb5aa2867ce09">Dsu::END</a></div><div class="ttdeci">__I DSU_END_Type END</div><div class="ttdoc">Offset: 0x1008 (R/ 32) CoreSight ROM Table End.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00627">dsu.h:627</a></div></div>
<div class="ttc" id="aunionDSU__ADDR__Type_html"><div class="ttname"><a href="unionDSU__ADDR__Type.html">DSU_ADDR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00149">dsu.h:149</a></div></div>
<div class="ttc" id="aunionDSU__LENGTH__Type_html_a6c1bdd63165dd29edf1dc8a4d775cffb"><div class="ttname"><a href="unionDSU__LENGTH__Type.html#a6c1bdd63165dd29edf1dc8a4d775cffb">DSU_LENGTH_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00176">dsu.h:176</a></div></div>
<div class="ttc" id="aunionDSU__ENTRY0__Type_html_ac8df1fef5c69a4e75d67608e8e100b47"><div class="ttname"><a href="unionDSU__ENTRY0__Type.html#ac8df1fef5c69a4e75d67608e8e100b47">DSU_ENTRY0_Type::ADDOFF</a></div><div class="ttdeci">uint32_t ADDOFF</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00319">dsu.h:319</a></div></div>
<div class="ttc" id="aunionDSU__STATUSB__Type_html_aeeaaab9cca0305cf41d31c2861a3190b"><div class="ttname"><a href="unionDSU__STATUSB__Type.html#aeeaaab9cca0305cf41d31c2861a3190b">DSU_STATUSB_Type::CELCK</a></div><div class="ttdeci">uint8_t CELCK</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00115">dsu.h:115</a></div></div>
<div class="ttc" id="aunionDSU__CFG__Type_html_a00254ef2e9f3500e5c6b3e338eb2ad5c"><div class="ttname"><a href="unionDSU__CFG__Type.html#a00254ef2e9f3500e5c6b3e338eb2ad5c">DSU_CFG_Type::ETBRAMEN</a></div><div class="ttdeci">uint32_t ETBRAMEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00288">dsu.h:288</a></div></div>
<div class="ttc" id="aunionDSU__PID5__Type_html"><div class="ttname"><a href="unionDSU__PID5__Type.html">DSU_PID5_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00409">dsu.h:409</a></div></div>
<div class="ttc" id="astructDsu_html_a42805e1dcd37f9686cf024f3ab13e486"><div class="ttname"><a href="structDsu.html#a42805e1dcd37f9686cf024f3ab13e486">Dsu::ENTRY0</a></div><div class="ttdeci">__I DSU_ENTRY0_Type ENTRY0</div><div class="ttdoc">Offset: 0x1000 (R/ 32) CoreSight ROM Table Entry 0.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00625">dsu.h:625</a></div></div>
<div class="ttc" id="aunionDSU__PID2__Type_html_a98d6ae81bae471444221dad368417fcb"><div class="ttname"><a href="unionDSU__PID2__Type.html#a98d6ae81bae471444221dad368417fcb">DSU_PID2_Type::JEPIDCH</a></div><div class="ttdeci">uint32_t JEPIDCH</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00486">dsu.h:486</a></div></div>
<div class="ttc" id="aunionDSU__CID0__Type_html_a4f67dbdccd818eacce9caee8184313b6"><div class="ttname"><a href="unionDSU__CID0__Type.html#a4f67dbdccd818eacce9caee8184313b6">DSU_CID0_Type::PREAMBLEB0</a></div><div class="ttdeci">uint32_t PREAMBLEB0</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00535">dsu.h:535</a></div></div>
<div class="ttc" id="aunionDSU__STATUSB__Type_html_aad7ae489397e242eeaa42e11e32654ec"><div class="ttname"><a href="unionDSU__STATUSB__Type.html#aad7ae489397e242eeaa42e11e32654ec">DSU_STATUSB_Type::DBGPRES</a></div><div class="ttdeci">uint8_t DBGPRES</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00111">dsu.h:111</a></div></div>
<div class="ttc" id="aunionDSU__STATUSA__Type_html_aba8f270d5cf8d7fee472b5888bea81b8"><div class="ttname"><a href="unionDSU__STATUSA__Type.html#aba8f270d5cf8d7fee472b5888bea81b8">DSU_STATUSA_Type::FAIL</a></div><div class="ttdeci">uint8_t FAIL</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00083">dsu.h:83</a></div></div>
<div class="ttc" id="aunionDSU__LENGTH__Type_html_adadf43167c8c012916cd60e1916a93f3"><div class="ttname"><a href="unionDSU__LENGTH__Type.html#adadf43167c8c012916cd60e1916a93f3">DSU_LENGTH_Type::LENGTH</a></div><div class="ttdeci">uint32_t LENGTH</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00174">dsu.h:174</a></div></div>
<div class="ttc" id="aunionDSU__ADDR__Type_html_a3504f788bdf784989bb670de25fd26a7"><div class="ttname"><a href="unionDSU__ADDR__Type.html#a3504f788bdf784989bb670de25fd26a7">DSU_ADDR_Type::AMOD</a></div><div class="ttdeci">uint32_t AMOD</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00151">dsu.h:151</a></div></div>
<div class="ttc" id="aunionDSU__DID__Type_html_a0705eab15d8481c0a60ae42e3443e260"><div class="ttname"><a href="unionDSU__DID__Type.html#a0705eab15d8481c0a60ae42e3443e260">DSU_DID_Type::SERIES</a></div><div class="ttdeci">uint32_t SERIES</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00231">dsu.h:231</a></div></div>
<div class="ttc" id="astructDsu_html_a408d8afc257ed78a3169ca958d24a5aa"><div class="ttname"><a href="structDsu.html#a408d8afc257ed78a3169ca958d24a5aa">Dsu::MEMTYPE</a></div><div class="ttdeci">__I DSU_MEMTYPE_Type MEMTYPE</div><div class="ttdoc">Offset: 0x1FCC (R/ 32) CoreSight ROM Table Memory Type.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00629">dsu.h:629</a></div></div>
<div class="ttc" id="aunionDSU__MEMTYPE__Type_html"><div class="ttname"><a href="unionDSU__MEMTYPE__Type.html">DSU_MEMTYPE_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00368">dsu.h:368</a></div></div>
<div class="ttc" id="aunionDSU__DCC__Type_html_a7be3abb1e94c3dae4c10b6a4ce5253de"><div class="ttname"><a href="unionDSU__DCC__Type.html#a7be3abb1e94c3dae4c10b6a4ce5253de">DSU_DCC_Type::DATA</a></div><div class="ttdeci">uint32_t DATA</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00210">dsu.h:210</a></div></div>
<div class="ttc" id="aunionDSU__ENTRY0__Type_html_ad57b888a19f61bf49aea7ab2058ea9f0"><div class="ttname"><a href="unionDSU__ENTRY0__Type.html#ad57b888a19f61bf49aea7ab2058ea9f0">DSU_ENTRY0_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00321">dsu.h:321</a></div></div>
<div class="ttc" id="aunionDSU__STATUSB__Type_html_a952de07a52a1d8d6e928126ebcbc6d7b"><div class="ttname"><a href="unionDSU__STATUSB__Type.html#a952de07a52a1d8d6e928126ebcbc6d7b">DSU_STATUSB_Type::DCCD</a></div><div class="ttdeci">uint8_t DCCD</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00120">dsu.h:120</a></div></div>
<div class="ttc" id="aunionDSU__DID__Type_html"><div class="ttname"><a href="unionDSU__DID__Type.html">DSU_DID_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00226">dsu.h:226</a></div></div>
<div class="ttc" id="aunionDSU__DATA__Type_html"><div class="ttname"><a href="unionDSU__DATA__Type.html">DSU_DATA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00190">dsu.h:190</a></div></div>
<div class="ttc" id="astructDsu_html_affd7dad98096b621d482b72f42fce5e8"><div class="ttname"><a href="structDsu.html#affd7dad98096b621d482b72f42fce5e8">Dsu::PID6</a></div><div class="ttdeci">__I DSU_PID6_Type PID6</div><div class="ttdoc">Offset: 0x1FD8 (R/ 32) Peripheral Identification 6.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00632">dsu.h:632</a></div></div>
<div class="ttc" id="aunionDSU__PID4__Type_html"><div class="ttname"><a href="unionDSU__PID4__Type.html">DSU_PID4_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00386">dsu.h:386</a></div></div>
<div class="ttc" id="aunionDSU__CID1__Type_html_a5cbc7c9fca7f9e5bb863a79ea9646a22"><div class="ttname"><a href="unionDSU__CID1__Type.html#a5cbc7c9fca7f9e5bb863a79ea9646a22">DSU_CID1_Type::PREAMBLE</a></div><div class="ttdeci">uint32_t PREAMBLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00554">dsu.h:554</a></div></div>
<div class="ttc" id="aunionDSU__PID0__Type_html_a2411582de03ec05e573cff798437b9b2"><div class="ttname"><a href="unionDSU__PID0__Type.html#a2411582de03ec05e573cff798437b9b2">DSU_PID0_Type::PARTNBL</a></div><div class="ttdeci">uint32_t PARTNBL</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00444">dsu.h:444</a></div></div>
<div class="ttc" id="aunionDSU__PID2__Type_html_ad619ce9aa07fdb32c8d57feebaab130c"><div class="ttname"><a href="unionDSU__PID2__Type.html#ad619ce9aa07fdb32c8d57feebaab130c">DSU_PID2_Type::REVISION</a></div><div class="ttdeci">uint32_t REVISION</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00488">dsu.h:488</a></div></div>
<div class="ttc" id="aunionDSU__STATUSB__Type_html"><div class="ttname"><a href="unionDSU__STATUSB__Type.html">DSU_STATUSB_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00108">dsu.h:108</a></div></div>
<div class="ttc" id="aunionDSU__CTRL__Type_html_a197b7e23186112885542ca537e8083ba"><div class="ttname"><a href="unionDSU__CTRL__Type.html#a197b7e23186112885542ca537e8083ba">DSU_CTRL_Type::CE</a></div><div class="ttdeci">uint8_t CE</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00050">dsu.h:50</a></div></div>
<div class="ttc" id="aunionDSU__PID3__Type_html_a04d461de3bfc43fdf0d13ce6bd6568fb"><div class="ttname"><a href="unionDSU__PID3__Type.html#a04d461de3bfc43fdf0d13ce6bd6568fb">DSU_PID3_Type::CUSMOD</a></div><div class="ttdeci">uint32_t CUSMOD</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00512">dsu.h:512</a></div></div>
<div class="ttc" id="aunionDSU__PID7__Type_html_a6a2b728de75e4bee6b44a6e2c50305bc"><div class="ttname"><a href="unionDSU__PID7__Type.html#a6a2b728de75e4bee6b44a6e2c50305bc">DSU_PID7_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00432">dsu.h:432</a></div></div>
<div class="ttc" id="aunionDSU__STATUSB__Type_html_aa96f9c8c3695cc1a4535a02983201946"><div class="ttname"><a href="unionDSU__STATUSB__Type.html#aa96f9c8c3695cc1a4535a02983201946">DSU_STATUSB_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00123">dsu.h:123</a></div></div>
<div class="ttc" id="aunionDSU__LENGTH__Type_html"><div class="ttname"><a href="unionDSU__LENGTH__Type.html">DSU_LENGTH_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00171">dsu.h:171</a></div></div>
<div class="ttc" id="aunionDSU__CFG__Type_html"><div class="ttname"><a href="unionDSU__CFG__Type.html">DSU_CFG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00284">dsu.h:284</a></div></div>
<div class="ttc" id="aunionDSU__DATA__Type_html_a951faee0c32af5210e62a071cc0afe96"><div class="ttname"><a href="unionDSU__DATA__Type.html#a951faee0c32af5210e62a071cc0afe96">DSU_DATA_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00194">dsu.h:194</a></div></div>
<div class="ttc" id="aunionDSU__DID__Type_html_aa5a2580fa69f97b349dba6650dfec919"><div class="ttname"><a href="unionDSU__DID__Type.html#aa5a2580fa69f97b349dba6650dfec919">DSU_DID_Type::REVISION</a></div><div class="ttdeci">uint32_t REVISION</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00229">dsu.h:229</a></div></div>
<div class="ttc" id="aunionDSU__STATUSA__Type_html"><div class="ttname"><a href="unionDSU__STATUSA__Type.html">DSU_STATUSA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00078">dsu.h:78</a></div></div>
<div class="ttc" id="aunionDSU__PID1__Type_html_aae19e346570eb31d8eec6d0a7b093954"><div class="ttname"><a href="unionDSU__PID1__Type.html#aae19e346570eb31d8eec6d0a7b093954">DSU_PID1_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00467">dsu.h:467</a></div></div>
<div class="ttc" id="aunionDSU__STATUSA__Type_html_a8fefe4470a39f6ef4547a501dbf028b0"><div class="ttname"><a href="unionDSU__STATUSA__Type.html#a8fefe4470a39f6ef4547a501dbf028b0">DSU_STATUSA_Type::PERR</a></div><div class="ttdeci">uint8_t PERR</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00084">dsu.h:84</a></div></div>
<div class="ttc" id="aunionDSU__CTRL__Type_html"><div class="ttname"><a href="unionDSU__CTRL__Type.html">DSU_CTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00044">dsu.h:44</a></div></div>
<div class="ttc" id="aunionDSU__CID0__Type_html_a8a4e4e66f3ac668edceaa595bea2b403"><div class="ttname"><a href="unionDSU__CID0__Type.html#a8a4e4e66f3ac668edceaa595bea2b403">DSU_CID0_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00538">dsu.h:538</a></div></div>
<div class="ttc" id="aunionDSU__DCC__Type_html"><div class="ttname"><a href="unionDSU__DCC__Type.html">DSU_DCC_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00208">dsu.h:208</a></div></div>
<div class="ttc" id="aunionDSU__CFG__Type_html_a18afece2cb799c73b84f7d33a2cadb73"><div class="ttname"><a href="unionDSU__CFG__Type.html#a18afece2cb799c73b84f7d33a2cadb73">DSU_CFG_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00291">dsu.h:291</a></div></div>
<div class="ttc" id="aunionDSU__STATUSB__Type_html_a8d1bbe448ed8ffb57221323c43f585c3"><div class="ttname"><a href="unionDSU__STATUSB__Type.html#a8d1bbe448ed8ffb57221323c43f585c3">DSU_STATUSB_Type::HPE</a></div><div class="ttdeci">uint8_t HPE</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00114">dsu.h:114</a></div></div>
<div class="ttc" id="asame54n19a_8h_html_a0d957f1433aaf5d70e4dc2b68288442d"><div class="ttname"><a href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a></div><div class="ttdeci">volatile const uint8_t RoReg8</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00053">same54n19a.h:53</a></div></div>
<div class="ttc" id="aunionDSU__ENTRY1__Type_html_a524ab8d2471aafcf1a353ae5626de59c"><div class="ttname"><a href="unionDSU__ENTRY1__Type.html#a524ab8d2471aafcf1a353ae5626de59c">DSU_ENTRY1_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00340">dsu.h:340</a></div></div>
<div class="ttc" id="aunionDSU__PID4__Type_html_aff254cb82f68cb64e7f09f0e49aff7f6"><div class="ttname"><a href="unionDSU__PID4__Type.html#aff254cb82f68cb64e7f09f0e49aff7f6">DSU_PID4_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00392">dsu.h:392</a></div></div>
<div class="ttc" id="aunionDSU__CFG__Type_html_a1707b3b281a6dfc43f5b9413a63b3876"><div class="ttname"><a href="unionDSU__CFG__Type.html#a1707b3b281a6dfc43f5b9413a63b3876">DSU_CFG_Type::LQOS</a></div><div class="ttdeci">uint32_t LQOS</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00286">dsu.h:286</a></div></div>
<div class="ttc" id="aunionDSU__DID__Type_html_a56e43c203792644e8b50621c3d1dd7d6"><div class="ttname"><a href="unionDSU__DID__Type.html#a56e43c203792644e8b50621c3d1dd7d6">DSU_DID_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00236">dsu.h:236</a></div></div>
<div class="ttc" id="aunionDSU__CID1__Type_html"><div class="ttname"><a href="unionDSU__CID1__Type.html">DSU_CID1_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00552">dsu.h:552</a></div></div>
<div class="ttc" id="astructDsu_html"><div class="ttname"><a href="structDsu.html">Dsu</a></div><div class="ttdoc">DSU hardware registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00613">dsu.h:613</a></div></div>
<div class="ttc" id="aunionDSU__CTRL__Type_html_a73a94d5d5c3dc5b218c6bc1e4bc6165d"><div class="ttname"><a href="unionDSU__CTRL__Type.html#a73a94d5d5c3dc5b218c6bc1e4bc6165d">DSU_CTRL_Type::SWRST</a></div><div class="ttdeci">uint8_t SWRST</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00046">dsu.h:46</a></div></div>
<div class="ttc" id="astructDsu_html_aeafe6f433e6983dedb1b78efe1508991"><div class="ttname"><a href="structDsu.html#aeafe6f433e6983dedb1b78efe1508991">Dsu::PID1</a></div><div class="ttdeci">__I DSU_PID1_Type PID1</div><div class="ttdoc">Offset: 0x1FE4 (R/ 32) Peripheral Identification 1.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00635">dsu.h:635</a></div></div>
<div class="ttc" id="astructDsu_html_a8ce289f77dfa3331bc94ae699c6031d7"><div class="ttname"><a href="structDsu.html#a8ce289f77dfa3331bc94ae699c6031d7">Dsu::CID3</a></div><div class="ttdeci">__I DSU_CID3_Type CID3</div><div class="ttdoc">Offset: 0x1FFC (R/ 32) Component Identification 3.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00641">dsu.h:641</a></div></div>
<div class="ttc" id="aunionDSU__PID1__Type_html"><div class="ttname"><a href="unionDSU__PID1__Type.html">DSU_PID1_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00461">dsu.h:461</a></div></div>
<div class="ttc" id="aunionDSU__STATUSB__Type_html_a3d465bfe936ba897bb74af320f5cc41a"><div class="ttname"><a href="unionDSU__STATUSB__Type.html#a3d465bfe936ba897bb74af320f5cc41a">DSU_STATUSB_Type::DCCD1</a></div><div class="ttdeci">uint8_t DCCD1</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00113">dsu.h:113</a></div></div>
<div class="ttc" id="aunionDSU__DID__Type_html_a391b0d47c1bbd48442298eaabe71ca61"><div class="ttname"><a href="unionDSU__DID__Type.html#a391b0d47c1bbd48442298eaabe71ca61">DSU_DID_Type::FAMILY</a></div><div class="ttdeci">uint32_t FAMILY</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00233">dsu.h:233</a></div></div>
<div class="ttc" id="aunionDSU__STATUSB__Type_html_ad3344aa28fed34c08fe7c730282fb40d"><div class="ttname"><a href="unionDSU__STATUSB__Type.html#ad3344aa28fed34c08fe7c730282fb40d">DSU_STATUSB_Type::DCCD0</a></div><div class="ttdeci">uint8_t DCCD0</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00112">dsu.h:112</a></div></div>
<div class="ttc" id="aunionDSU__CID1__Type_html_a16b80bf740c34d6627ab2ede385062bd"><div class="ttname"><a href="unionDSU__CID1__Type.html#a16b80bf740c34d6627ab2ede385062bd">DSU_CID1_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00558">dsu.h:558</a></div></div>
<div class="ttc" id="aunionDSU__END__Type_html"><div class="ttname"><a href="unionDSU__END__Type.html">DSU_END_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00350">dsu.h:350</a></div></div>
<div class="ttc" id="astructDsu_html_af251ab6944603f4ffcc03a04c3a591af"><div class="ttname"><a href="structDsu.html#af251ab6944603f4ffcc03a04c3a591af">Dsu::STATUSA</a></div><div class="ttdeci">__IO DSU_STATUSA_Type STATUSA</div><div class="ttdoc">Offset: 0x0001 (R/W 8) Status A.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00615">dsu.h:615</a></div></div>
<div class="ttc" id="aunionDSU__STATUSA__Type_html_aff619e1a118784b3e8600a50128db18c"><div class="ttname"><a href="unionDSU__STATUSA__Type.html#aff619e1a118784b3e8600a50128db18c">DSU_STATUSA_Type::DONE</a></div><div class="ttdeci">uint8_t DONE</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00080">dsu.h:80</a></div></div>
<div class="ttc" id="astructDsu_html_acd4b45b637efcb62b9f67c877dcbb4ce"><div class="ttname"><a href="structDsu.html#acd4b45b637efcb62b9f67c877dcbb4ce">Dsu::CID0</a></div><div class="ttdeci">__I DSU_CID0_Type CID0</div><div class="ttdoc">Offset: 0x1FF0 (R/ 32) Component Identification 0.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00638">dsu.h:638</a></div></div>
<div class="ttc" id="astructDsu_html_ae8a2a4525dd77831e3bba601b5eaf924"><div class="ttname"><a href="structDsu.html#ae8a2a4525dd77831e3bba601b5eaf924">Dsu::DID</a></div><div class="ttdeci">__I DSU_DID_Type DID</div><div class="ttdoc">Offset: 0x0018 (R/ 32) Device Identification.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00622">dsu.h:622</a></div></div>
<div class="ttc" id="aunionDSU__STATUSA__Type_html_aa8f9dffc31935fc4537884bf167786df"><div class="ttname"><a href="unionDSU__STATUSA__Type.html#aa8f9dffc31935fc4537884bf167786df">DSU_STATUSA_Type::CRSTEXT</a></div><div class="ttdeci">uint8_t CRSTEXT</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00081">dsu.h:81</a></div></div>
<div class="ttc" id="aunionDSU__MEMTYPE__Type_html_a3dca5becd5a8a8e28fe39180c824eaaf"><div class="ttname"><a href="unionDSU__MEMTYPE__Type.html#a3dca5becd5a8a8e28fe39180c824eaaf">DSU_MEMTYPE_Type::SMEMP</a></div><div class="ttdeci">uint32_t SMEMP</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00370">dsu.h:370</a></div></div>
<div class="ttc" id="aunionDSU__DID__Type_html_a090fd5a629b80d2adfcb388b825b8dd8"><div class="ttname"><a href="unionDSU__DID__Type.html#a090fd5a629b80d2adfcb388b825b8dd8">DSU_DID_Type::PROCESSOR</a></div><div class="ttdeci">uint32_t PROCESSOR</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00234">dsu.h:234</a></div></div>
<div class="ttc" id="aunionDSU__CTRL__Type_html_a0b11d4226d2417422ef909e10ed17bc9"><div class="ttname"><a href="unionDSU__CTRL__Type.html#a0b11d4226d2417422ef909e10ed17bc9">DSU_CTRL_Type::MBIST</a></div><div class="ttdeci">uint8_t MBIST</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00049">dsu.h:49</a></div></div>
<div class="ttc" id="aunionDSU__END__Type_html_a0d914056a7cd5c80c5b2204a15ae09ae"><div class="ttname"><a href="unionDSU__END__Type.html#a0d914056a7cd5c80c5b2204a15ae09ae">DSU_END_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00354">dsu.h:354</a></div></div>
<div class="ttc" id="astructDsu_html_a0a408f4b65eefa0933f2cce115230e3d"><div class="ttname"><a href="structDsu.html#a0a408f4b65eefa0933f2cce115230e3d">Dsu::CFG</a></div><div class="ttdeci">__IO DSU_CFG_Type CFG</div><div class="ttdoc">Offset: 0x001C (R/W 32) Configuration.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00623">dsu.h:623</a></div></div>
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<p>Component description for EIC.
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_U2254</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>REV_EIC</b>&#160;&#160;&#160;0x300</td></tr>
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<tr class="memitem:ab246344bc085e0c0c1f41f2c498d7a4e"><td class="memItemLeft" align="right" valign="top"><a id="ab246344bc085e0c0c1f41f2c498d7a4e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#ab246344bc085e0c0c1f41f2c498d7a4e">EIC_CTRLA_OFFSET</a>&#160;&#160;&#160;0x00</td></tr>
<tr class="memdesc:ab246344bc085e0c0c1f41f2c498d7a4e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CTRLA offset) Control A <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a4fa956016182ca3fbb195313688e49b2">EIC_CTRLA_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a4fa956016182ca3fbb195313688e49b2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CTRLA reset_value) Control A <br /></td></tr>
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<tr class="memitem:a1a82937bd8157d38e7acd41ccdbb6c2c"><td class="memItemLeft" align="right" valign="top"><a id="a1a82937bd8157d38e7acd41ccdbb6c2c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a1a82937bd8157d38e7acd41ccdbb6c2c">EIC_CTRLA_SWRST_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a1a82937bd8157d38e7acd41ccdbb6c2c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CTRLA) Software Reset <br /></td></tr>
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<tr class="memitem:aece93aa95c587a3870482e4f6a6125f1"><td class="memItemLeft" align="right" valign="top"><a id="aece93aa95c587a3870482e4f6a6125f1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CTRLA_SWRST</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2eic_8h.html#a1a82937bd8157d38e7acd41ccdbb6c2c">EIC_CTRLA_SWRST_Pos</a>)</td></tr>
<tr class="separator:aece93aa95c587a3870482e4f6a6125f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aeacc7e5f83ca757ca0130db5895e170a"><td class="memItemLeft" align="right" valign="top"><a id="aeacc7e5f83ca757ca0130db5895e170a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#aeacc7e5f83ca757ca0130db5895e170a">EIC_CTRLA_ENABLE_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:aeacc7e5f83ca757ca0130db5895e170a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CTRLA) Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CTRLA_ENABLE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2eic_8h.html#aeacc7e5f83ca757ca0130db5895e170a">EIC_CTRLA_ENABLE_Pos</a>)</td></tr>
<tr class="separator:ab810341b359545733a3d0caab65125d3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9c2e0f5f9272f9ca106bee3658bd67e6"><td class="memItemLeft" align="right" valign="top"><a id="a9c2e0f5f9272f9ca106bee3658bd67e6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a9c2e0f5f9272f9ca106bee3658bd67e6">EIC_CTRLA_CKSEL_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:a9c2e0f5f9272f9ca106bee3658bd67e6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CTRLA) Clock Selection <br /></td></tr>
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<tr class="memitem:a915a2ae36e8ddc2f74a15547c5a29f66"><td class="memItemLeft" align="right" valign="top"><a id="a915a2ae36e8ddc2f74a15547c5a29f66"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CTRLA_CKSEL</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2eic_8h.html#a9c2e0f5f9272f9ca106bee3658bd67e6">EIC_CTRLA_CKSEL_Pos</a>)</td></tr>
<tr class="separator:a915a2ae36e8ddc2f74a15547c5a29f66"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a935b501f29ee3b3ae95674baccfcc161"><td class="memItemLeft" align="right" valign="top"><a id="a935b501f29ee3b3ae95674baccfcc161"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a935b501f29ee3b3ae95674baccfcc161">EIC_CTRLA_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x13)</td></tr>
<tr class="memdesc:a935b501f29ee3b3ae95674baccfcc161"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CTRLA) MASK Register <br /></td></tr>
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<tr class="memitem:a955df6174347427aaaed840874fa273f"><td class="memItemLeft" align="right" valign="top"><a id="a955df6174347427aaaed840874fa273f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a955df6174347427aaaed840874fa273f">EIC_NMICTRL_OFFSET</a>&#160;&#160;&#160;0x01</td></tr>
<tr class="memdesc:a955df6174347427aaaed840874fa273f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_NMICTRL offset) Non-Maskable Interrupt Control <br /></td></tr>
<tr class="separator:a955df6174347427aaaed840874fa273f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a45890ac5e43ba08bf235b5ba44aa434c"><td class="memItemLeft" align="right" valign="top"><a id="a45890ac5e43ba08bf235b5ba44aa434c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a45890ac5e43ba08bf235b5ba44aa434c">EIC_NMICTRL_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a45890ac5e43ba08bf235b5ba44aa434c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_NMICTRL reset_value) Non-Maskable Interrupt Control <br /></td></tr>
<tr class="separator:a45890ac5e43ba08bf235b5ba44aa434c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a48859c121f51b57ddf343ba53ff169a1"><td class="memItemLeft" align="right" valign="top"><a id="a48859c121f51b57ddf343ba53ff169a1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a48859c121f51b57ddf343ba53ff169a1">EIC_NMICTRL_NMISENSE_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a48859c121f51b57ddf343ba53ff169a1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_NMICTRL) Non-Maskable Interrupt Sense Configuration <br /></td></tr>
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<tr class="memitem:ab9c1c6466c0a1f2d669d61904b4ad1c0"><td class="memItemLeft" align="right" valign="top"><a id="ab9c1c6466c0a1f2d669d61904b4ad1c0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_NMICTRL_NMISENSE_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) &lt;&lt; <a class="el" href="component_2eic_8h.html#a48859c121f51b57ddf343ba53ff169a1">EIC_NMICTRL_NMISENSE_Pos</a>)</td></tr>
<tr class="separator:ab9c1c6466c0a1f2d669d61904b4ad1c0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae96214c1f37b2db4a8fa349edb32996f"><td class="memItemLeft" align="right" valign="top"><a id="ae96214c1f37b2db4a8fa349edb32996f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_NMICTRL_NMISENSE</b>(value)&#160;&#160;&#160;(EIC_NMICTRL_NMISENSE_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2eic_8h.html#a48859c121f51b57ddf343ba53ff169a1">EIC_NMICTRL_NMISENSE_Pos</a>))</td></tr>
<tr class="separator:ae96214c1f37b2db4a8fa349edb32996f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0c36b33d81bd5571bc49345e2e83b9ff"><td class="memItemLeft" align="right" valign="top"><a id="a0c36b33d81bd5571bc49345e2e83b9ff"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a0c36b33d81bd5571bc49345e2e83b9ff">EIC_NMICTRL_NMISENSE_NONE_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a0c36b33d81bd5571bc49345e2e83b9ff"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_NMICTRL) No detection <br /></td></tr>
<tr class="separator:a0c36b33d81bd5571bc49345e2e83b9ff"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a40a369ae631516099e85c14096312797"><td class="memItemLeft" align="right" valign="top"><a id="a40a369ae631516099e85c14096312797"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a40a369ae631516099e85c14096312797">EIC_NMICTRL_NMISENSE_RISE_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:a40a369ae631516099e85c14096312797"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_NMICTRL) Rising-edge detection <br /></td></tr>
<tr class="separator:a40a369ae631516099e85c14096312797"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa0a05bae1746f2942044c926350f1ebe"><td class="memItemLeft" align="right" valign="top"><a id="aa0a05bae1746f2942044c926350f1ebe"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#aa0a05bae1746f2942044c926350f1ebe">EIC_NMICTRL_NMISENSE_FALL_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:aa0a05bae1746f2942044c926350f1ebe"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_NMICTRL) Falling-edge detection <br /></td></tr>
<tr class="separator:aa0a05bae1746f2942044c926350f1ebe"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7c987cbee9b60bfd4e68ddd11982a512"><td class="memItemLeft" align="right" valign="top"><a id="a7c987cbee9b60bfd4e68ddd11982a512"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a7c987cbee9b60bfd4e68ddd11982a512">EIC_NMICTRL_NMISENSE_BOTH_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
<tr class="memdesc:a7c987cbee9b60bfd4e68ddd11982a512"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_NMICTRL) Both-edges detection <br /></td></tr>
<tr class="separator:a7c987cbee9b60bfd4e68ddd11982a512"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a30c9d119b917f1bec88af90d0c7fa180"><td class="memItemLeft" align="right" valign="top"><a id="a30c9d119b917f1bec88af90d0c7fa180"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a30c9d119b917f1bec88af90d0c7fa180">EIC_NMICTRL_NMISENSE_HIGH_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
<tr class="memdesc:a30c9d119b917f1bec88af90d0c7fa180"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_NMICTRL) High-level detection <br /></td></tr>
<tr class="separator:a30c9d119b917f1bec88af90d0c7fa180"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa3b9af8d6d835716ec282a17a72f7052"><td class="memItemLeft" align="right" valign="top"><a id="aa3b9af8d6d835716ec282a17a72f7052"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#aa3b9af8d6d835716ec282a17a72f7052">EIC_NMICTRL_NMISENSE_LOW_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
<tr class="memdesc:aa3b9af8d6d835716ec282a17a72f7052"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_NMICTRL) Low-level detection <br /></td></tr>
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<tr class="memitem:ae353bd7582bca51ade21150774b0db04"><td class="memItemLeft" align="right" valign="top"><a id="ae353bd7582bca51ade21150774b0db04"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_NMICTRL_NMISENSE_NONE</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a0c36b33d81bd5571bc49345e2e83b9ff">EIC_NMICTRL_NMISENSE_NONE_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a48859c121f51b57ddf343ba53ff169a1">EIC_NMICTRL_NMISENSE_Pos</a>)</td></tr>
<tr class="separator:ae353bd7582bca51ade21150774b0db04"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_NMICTRL_NMISENSE_RISE</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a40a369ae631516099e85c14096312797">EIC_NMICTRL_NMISENSE_RISE_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a48859c121f51b57ddf343ba53ff169a1">EIC_NMICTRL_NMISENSE_Pos</a>)</td></tr>
<tr class="separator:aa8f021b20a26f0619fac57f6ef9547e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa9b32280bacb50689c86bd21de314ae7"><td class="memItemLeft" align="right" valign="top"><a id="aa9b32280bacb50689c86bd21de314ae7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_NMICTRL_NMISENSE_FALL</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#aa0a05bae1746f2942044c926350f1ebe">EIC_NMICTRL_NMISENSE_FALL_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a48859c121f51b57ddf343ba53ff169a1">EIC_NMICTRL_NMISENSE_Pos</a>)</td></tr>
<tr class="separator:aa9b32280bacb50689c86bd21de314ae7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad83b3c9ea023f0c8c0c56b5a027c7ae4"><td class="memItemLeft" align="right" valign="top"><a id="ad83b3c9ea023f0c8c0c56b5a027c7ae4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_NMICTRL_NMISENSE_BOTH</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a7c987cbee9b60bfd4e68ddd11982a512">EIC_NMICTRL_NMISENSE_BOTH_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a48859c121f51b57ddf343ba53ff169a1">EIC_NMICTRL_NMISENSE_Pos</a>)</td></tr>
<tr class="separator:ad83b3c9ea023f0c8c0c56b5a027c7ae4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7d49f4b3ad088c21e1e248b6ead40a4d"><td class="memItemLeft" align="right" valign="top"><a id="a7d49f4b3ad088c21e1e248b6ead40a4d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_NMICTRL_NMISENSE_HIGH</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a30c9d119b917f1bec88af90d0c7fa180">EIC_NMICTRL_NMISENSE_HIGH_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a48859c121f51b57ddf343ba53ff169a1">EIC_NMICTRL_NMISENSE_Pos</a>)</td></tr>
<tr class="separator:a7d49f4b3ad088c21e1e248b6ead40a4d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aee7719cf601b054085fc6d588052ed3c"><td class="memItemLeft" align="right" valign="top"><a id="aee7719cf601b054085fc6d588052ed3c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_NMICTRL_NMISENSE_LOW</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#aa3b9af8d6d835716ec282a17a72f7052">EIC_NMICTRL_NMISENSE_LOW_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a48859c121f51b57ddf343ba53ff169a1">EIC_NMICTRL_NMISENSE_Pos</a>)</td></tr>
<tr class="separator:aee7719cf601b054085fc6d588052ed3c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a38d9267b17841862f6a70ce455f52da0"><td class="memItemLeft" align="right" valign="top"><a id="a38d9267b17841862f6a70ce455f52da0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a38d9267b17841862f6a70ce455f52da0">EIC_NMICTRL_NMIFILTEN_Pos</a>&#160;&#160;&#160;3</td></tr>
<tr class="memdesc:a38d9267b17841862f6a70ce455f52da0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_NMICTRL) Non-Maskable Interrupt Filter Enable <br /></td></tr>
<tr class="separator:a38d9267b17841862f6a70ce455f52da0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac4f421180e2c30aabb16780b60d5d145"><td class="memItemLeft" align="right" valign="top"><a id="ac4f421180e2c30aabb16780b60d5d145"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_NMICTRL_NMIFILTEN</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2eic_8h.html#a38d9267b17841862f6a70ce455f52da0">EIC_NMICTRL_NMIFILTEN_Pos</a>)</td></tr>
<tr class="separator:ac4f421180e2c30aabb16780b60d5d145"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac9a80e6a5d8750e13950439aa992765e"><td class="memItemLeft" align="right" valign="top"><a id="ac9a80e6a5d8750e13950439aa992765e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#ac9a80e6a5d8750e13950439aa992765e">EIC_NMICTRL_NMIASYNCH_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:ac9a80e6a5d8750e13950439aa992765e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_NMICTRL) Asynchronous Edge Detection Mode <br /></td></tr>
<tr class="separator:ac9a80e6a5d8750e13950439aa992765e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4e7b26acdefc9f874a2fae0d4cddbc1f"><td class="memItemLeft" align="right" valign="top"><a id="a4e7b26acdefc9f874a2fae0d4cddbc1f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_NMICTRL_NMIASYNCH</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2eic_8h.html#ac9a80e6a5d8750e13950439aa992765e">EIC_NMICTRL_NMIASYNCH_Pos</a>)</td></tr>
<tr class="separator:a4e7b26acdefc9f874a2fae0d4cddbc1f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af52070ecba91c5d7d6ece825763d5ac3"><td class="memItemLeft" align="right" valign="top"><a id="af52070ecba91c5d7d6ece825763d5ac3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#af52070ecba91c5d7d6ece825763d5ac3">EIC_NMICTRL_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1F)</td></tr>
<tr class="memdesc:af52070ecba91c5d7d6ece825763d5ac3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_NMICTRL) MASK Register <br /></td></tr>
<tr class="separator:af52070ecba91c5d7d6ece825763d5ac3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aaf1e851a2bf7b57210d255b797305b5a"><td class="memItemLeft" align="right" valign="top"><a id="aaf1e851a2bf7b57210d255b797305b5a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#aaf1e851a2bf7b57210d255b797305b5a">EIC_NMIFLAG_OFFSET</a>&#160;&#160;&#160;0x02</td></tr>
<tr class="memdesc:aaf1e851a2bf7b57210d255b797305b5a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_NMIFLAG offset) Non-Maskable Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="memitem:abdc3ee824c8c2631f56077b9eb4af6c0"><td class="memItemLeft" align="right" valign="top"><a id="abdc3ee824c8c2631f56077b9eb4af6c0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#abdc3ee824c8c2631f56077b9eb4af6c0">EIC_NMIFLAG_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000)</td></tr>
<tr class="memdesc:abdc3ee824c8c2631f56077b9eb4af6c0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_NMIFLAG reset_value) Non-Maskable Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="memitem:ae75faeffe2957a80cbdacf5c0239e2af"><td class="memItemLeft" align="right" valign="top"><a id="ae75faeffe2957a80cbdacf5c0239e2af"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#ae75faeffe2957a80cbdacf5c0239e2af">EIC_NMIFLAG_NMI_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ae75faeffe2957a80cbdacf5c0239e2af"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_NMIFLAG) Non-Maskable Interrupt <br /></td></tr>
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<tr class="memitem:adeb5d88236a7732ba0c74a95460abf51"><td class="memItemLeft" align="right" valign="top"><a id="adeb5d88236a7732ba0c74a95460abf51"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_NMIFLAG_NMI</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2eic_8h.html#ae75faeffe2957a80cbdacf5c0239e2af">EIC_NMIFLAG_NMI_Pos</a>)</td></tr>
<tr class="separator:adeb5d88236a7732ba0c74a95460abf51"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a540d29cea93e30799215ac9a446bb8f9"><td class="memItemLeft" align="right" valign="top"><a id="a540d29cea93e30799215ac9a446bb8f9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a540d29cea93e30799215ac9a446bb8f9">EIC_NMIFLAG_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0001)</td></tr>
<tr class="memdesc:a540d29cea93e30799215ac9a446bb8f9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_NMIFLAG) MASK Register <br /></td></tr>
<tr class="separator:a540d29cea93e30799215ac9a446bb8f9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6afc82df170c16a0de7830c246f58283"><td class="memItemLeft" align="right" valign="top"><a id="a6afc82df170c16a0de7830c246f58283"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a6afc82df170c16a0de7830c246f58283">EIC_SYNCBUSY_OFFSET</a>&#160;&#160;&#160;0x04</td></tr>
<tr class="memdesc:a6afc82df170c16a0de7830c246f58283"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_SYNCBUSY offset) Synchronization Busy <br /></td></tr>
<tr class="separator:a6afc82df170c16a0de7830c246f58283"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae3efd05adc4143a8591f22ae441c5cc4"><td class="memItemLeft" align="right" valign="top"><a id="ae3efd05adc4143a8591f22ae441c5cc4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#ae3efd05adc4143a8591f22ae441c5cc4">EIC_SYNCBUSY_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:ae3efd05adc4143a8591f22ae441c5cc4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_SYNCBUSY reset_value) Synchronization Busy <br /></td></tr>
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<tr class="memitem:aac50cf18f144db471cdcd45ba2c5604d"><td class="memItemLeft" align="right" valign="top"><a id="aac50cf18f144db471cdcd45ba2c5604d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#aac50cf18f144db471cdcd45ba2c5604d">EIC_SYNCBUSY_SWRST_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:aac50cf18f144db471cdcd45ba2c5604d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_SYNCBUSY) Software Reset Synchronization Busy Status <br /></td></tr>
<tr class="separator:aac50cf18f144db471cdcd45ba2c5604d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a951969503d8b7f088d0bd764c3fc9e0b"><td class="memItemLeft" align="right" valign="top"><a id="a951969503d8b7f088d0bd764c3fc9e0b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_SYNCBUSY_SWRST</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2eic_8h.html#aac50cf18f144db471cdcd45ba2c5604d">EIC_SYNCBUSY_SWRST_Pos</a>)</td></tr>
<tr class="separator:a951969503d8b7f088d0bd764c3fc9e0b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a81e1ca9fe8b4a63049445f836a13f0c7"><td class="memItemLeft" align="right" valign="top"><a id="a81e1ca9fe8b4a63049445f836a13f0c7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a81e1ca9fe8b4a63049445f836a13f0c7">EIC_SYNCBUSY_ENABLE_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:a81e1ca9fe8b4a63049445f836a13f0c7"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_SYNCBUSY) Enable Synchronization Busy Status <br /></td></tr>
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<tr class="memitem:a160e0633c2a7f5f9588ff9b9516ab527"><td class="memItemLeft" align="right" valign="top"><a id="a160e0633c2a7f5f9588ff9b9516ab527"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_SYNCBUSY_ENABLE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2eic_8h.html#a81e1ca9fe8b4a63049445f836a13f0c7">EIC_SYNCBUSY_ENABLE_Pos</a>)</td></tr>
<tr class="separator:a160e0633c2a7f5f9588ff9b9516ab527"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a568a8dccaced2d98cf62355f017f193d"><td class="memItemLeft" align="right" valign="top"><a id="a568a8dccaced2d98cf62355f017f193d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a568a8dccaced2d98cf62355f017f193d">EIC_SYNCBUSY_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000003)</td></tr>
<tr class="memdesc:a568a8dccaced2d98cf62355f017f193d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_SYNCBUSY) MASK Register <br /></td></tr>
<tr class="separator:a568a8dccaced2d98cf62355f017f193d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1e9f53fbff309ef9b2ecfa6276b72f15"><td class="memItemLeft" align="right" valign="top"><a id="a1e9f53fbff309ef9b2ecfa6276b72f15"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a1e9f53fbff309ef9b2ecfa6276b72f15">EIC_EVCTRL_OFFSET</a>&#160;&#160;&#160;0x08</td></tr>
<tr class="memdesc:a1e9f53fbff309ef9b2ecfa6276b72f15"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_EVCTRL offset) Event Control <br /></td></tr>
<tr class="separator:a1e9f53fbff309ef9b2ecfa6276b72f15"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa55f28b19d883994bcd6ade4425eea0a"><td class="memItemLeft" align="right" valign="top"><a id="aa55f28b19d883994bcd6ade4425eea0a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#aa55f28b19d883994bcd6ade4425eea0a">EIC_EVCTRL_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:aa55f28b19d883994bcd6ade4425eea0a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_EVCTRL reset_value) Event Control <br /></td></tr>
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<tr class="memitem:aed4eb850843b4dea239dd997ae81008a"><td class="memItemLeft" align="right" valign="top"><a id="aed4eb850843b4dea239dd997ae81008a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#aed4eb850843b4dea239dd997ae81008a">EIC_EVCTRL_EXTINTEO_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:aed4eb850843b4dea239dd997ae81008a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_EVCTRL) External Interrupt Event Output Enable <br /></td></tr>
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<tr class="memitem:a941107dea5516bf17998a0012bee9e7d"><td class="memItemLeft" align="right" valign="top"><a id="a941107dea5516bf17998a0012bee9e7d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_EVCTRL_EXTINTEO_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF) &lt;&lt; <a class="el" href="component_2eic_8h.html#aed4eb850843b4dea239dd997ae81008a">EIC_EVCTRL_EXTINTEO_Pos</a>)</td></tr>
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<tr class="memitem:a6644ed2806b2b22764ccdb89aa74c945"><td class="memItemLeft" align="right" valign="top"><a id="a6644ed2806b2b22764ccdb89aa74c945"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_EVCTRL_EXTINTEO</b>(value)&#160;&#160;&#160;(EIC_EVCTRL_EXTINTEO_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2eic_8h.html#aed4eb850843b4dea239dd997ae81008a">EIC_EVCTRL_EXTINTEO_Pos</a>))</td></tr>
<tr class="separator:a6644ed2806b2b22764ccdb89aa74c945"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a613f01075fe9c2dd9dcc34c5dacfd6ed"><td class="memItemLeft" align="right" valign="top"><a id="a613f01075fe9c2dd9dcc34c5dacfd6ed"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a613f01075fe9c2dd9dcc34c5dacfd6ed">EIC_EVCTRL_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000FFFF)</td></tr>
<tr class="memdesc:a613f01075fe9c2dd9dcc34c5dacfd6ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_EVCTRL) MASK Register <br /></td></tr>
<tr class="separator:a613f01075fe9c2dd9dcc34c5dacfd6ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af64517ce260f6884f881223efcd4fe66"><td class="memItemLeft" align="right" valign="top"><a id="af64517ce260f6884f881223efcd4fe66"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#af64517ce260f6884f881223efcd4fe66">EIC_INTENCLR_OFFSET</a>&#160;&#160;&#160;0x0C</td></tr>
<tr class="memdesc:af64517ce260f6884f881223efcd4fe66"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_INTENCLR offset) Interrupt Enable Clear <br /></td></tr>
<tr class="separator:af64517ce260f6884f881223efcd4fe66"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa93fcdad643eb338a3f20268b85555f9"><td class="memItemLeft" align="right" valign="top"><a id="aa93fcdad643eb338a3f20268b85555f9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#aa93fcdad643eb338a3f20268b85555f9">EIC_INTENCLR_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:aa93fcdad643eb338a3f20268b85555f9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_INTENCLR reset_value) Interrupt Enable Clear <br /></td></tr>
<tr class="separator:aa93fcdad643eb338a3f20268b85555f9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a741348eb720fbcd5a997515060a08f79"><td class="memItemLeft" align="right" valign="top"><a id="a741348eb720fbcd5a997515060a08f79"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a741348eb720fbcd5a997515060a08f79">EIC_INTENCLR_EXTINT_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a741348eb720fbcd5a997515060a08f79"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_INTENCLR) External Interrupt Enable <br /></td></tr>
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<tr class="memitem:a5ff4b9c6c227cf5c2af5b9ab1ba1e358"><td class="memItemLeft" align="right" valign="top"><a id="a5ff4b9c6c227cf5c2af5b9ab1ba1e358"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_INTENCLR_EXTINT_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF) &lt;&lt; <a class="el" href="component_2eic_8h.html#a741348eb720fbcd5a997515060a08f79">EIC_INTENCLR_EXTINT_Pos</a>)</td></tr>
<tr class="separator:a5ff4b9c6c227cf5c2af5b9ab1ba1e358"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ace82ce29ec0f78de7cd95a1bfbcc4600"><td class="memItemLeft" align="right" valign="top"><a id="ace82ce29ec0f78de7cd95a1bfbcc4600"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_INTENCLR_EXTINT</b>(value)&#160;&#160;&#160;(EIC_INTENCLR_EXTINT_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2eic_8h.html#a741348eb720fbcd5a997515060a08f79">EIC_INTENCLR_EXTINT_Pos</a>))</td></tr>
<tr class="separator:ace82ce29ec0f78de7cd95a1bfbcc4600"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac121def07c8b3d84e3d58470fa7e0a2a"><td class="memItemLeft" align="right" valign="top"><a id="ac121def07c8b3d84e3d58470fa7e0a2a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#ac121def07c8b3d84e3d58470fa7e0a2a">EIC_INTENCLR_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000FFFF)</td></tr>
<tr class="memdesc:ac121def07c8b3d84e3d58470fa7e0a2a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_INTENCLR) MASK Register <br /></td></tr>
<tr class="separator:ac121def07c8b3d84e3d58470fa7e0a2a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7544cf9b337e414ddccd4d849d263bc9"><td class="memItemLeft" align="right" valign="top"><a id="a7544cf9b337e414ddccd4d849d263bc9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a7544cf9b337e414ddccd4d849d263bc9">EIC_INTENSET_OFFSET</a>&#160;&#160;&#160;0x10</td></tr>
<tr class="memdesc:a7544cf9b337e414ddccd4d849d263bc9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_INTENSET offset) Interrupt Enable Set <br /></td></tr>
<tr class="separator:a7544cf9b337e414ddccd4d849d263bc9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae72659b00ea4c8017352485df071fff8"><td class="memItemLeft" align="right" valign="top"><a id="ae72659b00ea4c8017352485df071fff8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#ae72659b00ea4c8017352485df071fff8">EIC_INTENSET_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:ae72659b00ea4c8017352485df071fff8"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_INTENSET reset_value) Interrupt Enable Set <br /></td></tr>
<tr class="separator:ae72659b00ea4c8017352485df071fff8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afd6be1eb2fc6554616eb65915a12c245"><td class="memItemLeft" align="right" valign="top"><a id="afd6be1eb2fc6554616eb65915a12c245"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#afd6be1eb2fc6554616eb65915a12c245">EIC_INTENSET_EXTINT_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:afd6be1eb2fc6554616eb65915a12c245"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_INTENSET) External Interrupt Enable <br /></td></tr>
<tr class="separator:afd6be1eb2fc6554616eb65915a12c245"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afb39751004f288b53ff8530265a67eaa"><td class="memItemLeft" align="right" valign="top"><a id="afb39751004f288b53ff8530265a67eaa"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_INTENSET_EXTINT_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF) &lt;&lt; <a class="el" href="component_2eic_8h.html#afd6be1eb2fc6554616eb65915a12c245">EIC_INTENSET_EXTINT_Pos</a>)</td></tr>
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<tr class="memitem:a22189f36f0881268c4c82ace424dff16"><td class="memItemLeft" align="right" valign="top"><a id="a22189f36f0881268c4c82ace424dff16"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_INTENSET_EXTINT</b>(value)&#160;&#160;&#160;(EIC_INTENSET_EXTINT_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2eic_8h.html#afd6be1eb2fc6554616eb65915a12c245">EIC_INTENSET_EXTINT_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a518b934f1f683eea112f810134e11386">EIC_INTENSET_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000FFFF)</td></tr>
<tr class="memdesc:a518b934f1f683eea112f810134e11386"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_INTENSET) MASK Register <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a4e51877a81710951770d2bd40145d6b7">EIC_INTFLAG_OFFSET</a>&#160;&#160;&#160;0x14</td></tr>
<tr class="memdesc:a4e51877a81710951770d2bd40145d6b7"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_INTFLAG offset) Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="memitem:a4672c235b09428fde9c98d6d844c09d9"><td class="memItemLeft" align="right" valign="top"><a id="a4672c235b09428fde9c98d6d844c09d9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a4672c235b09428fde9c98d6d844c09d9">EIC_INTFLAG_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a4672c235b09428fde9c98d6d844c09d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_INTFLAG reset_value) Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="memitem:adcbc791cf87b0cbd60e76f1958249501"><td class="memItemLeft" align="right" valign="top"><a id="adcbc791cf87b0cbd60e76f1958249501"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#adcbc791cf87b0cbd60e76f1958249501">EIC_INTFLAG_EXTINT_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:adcbc791cf87b0cbd60e76f1958249501"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_INTFLAG) External Interrupt <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_INTFLAG_EXTINT_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF) &lt;&lt; <a class="el" href="component_2eic_8h.html#adcbc791cf87b0cbd60e76f1958249501">EIC_INTFLAG_EXTINT_Pos</a>)</td></tr>
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<tr class="memitem:a9be0394a7b0f0deed1340527b6485f5c"><td class="memItemLeft" align="right" valign="top"><a id="a9be0394a7b0f0deed1340527b6485f5c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_INTFLAG_EXTINT</b>(value)&#160;&#160;&#160;(EIC_INTFLAG_EXTINT_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2eic_8h.html#adcbc791cf87b0cbd60e76f1958249501">EIC_INTFLAG_EXTINT_Pos</a>))</td></tr>
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<tr class="memitem:a81b4c53bcfec0717a26cde921d364062"><td class="memItemLeft" align="right" valign="top"><a id="a81b4c53bcfec0717a26cde921d364062"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a81b4c53bcfec0717a26cde921d364062">EIC_INTFLAG_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000FFFF)</td></tr>
<tr class="memdesc:a81b4c53bcfec0717a26cde921d364062"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_INTFLAG) MASK Register <br /></td></tr>
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<tr class="memitem:a685977df4671b3e2e96cfd96f49d9c4f"><td class="memItemLeft" align="right" valign="top"><a id="a685977df4671b3e2e96cfd96f49d9c4f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a685977df4671b3e2e96cfd96f49d9c4f">EIC_ASYNCH_OFFSET</a>&#160;&#160;&#160;0x18</td></tr>
<tr class="memdesc:a685977df4671b3e2e96cfd96f49d9c4f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_ASYNCH offset) External Interrupt Asynchronous Mode <br /></td></tr>
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<tr class="memitem:a9cff1f3057ba9b7fc6660128c1dff15d"><td class="memItemLeft" align="right" valign="top"><a id="a9cff1f3057ba9b7fc6660128c1dff15d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a9cff1f3057ba9b7fc6660128c1dff15d">EIC_ASYNCH_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a9cff1f3057ba9b7fc6660128c1dff15d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_ASYNCH reset_value) External Interrupt Asynchronous Mode <br /></td></tr>
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<tr class="memitem:a7f83768aa55abe8d2d64a4335d7129f0"><td class="memItemLeft" align="right" valign="top"><a id="a7f83768aa55abe8d2d64a4335d7129f0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a7f83768aa55abe8d2d64a4335d7129f0">EIC_ASYNCH_ASYNCH_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a7f83768aa55abe8d2d64a4335d7129f0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_ASYNCH) Asynchronous Edge Detection Mode <br /></td></tr>
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<tr class="memitem:a749de1abb0bce57176fe76d41f31a0c0"><td class="memItemLeft" align="right" valign="top"><a id="a749de1abb0bce57176fe76d41f31a0c0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_ASYNCH_ASYNCH_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF) &lt;&lt; <a class="el" href="component_2eic_8h.html#a7f83768aa55abe8d2d64a4335d7129f0">EIC_ASYNCH_ASYNCH_Pos</a>)</td></tr>
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<tr class="memitem:af8c1c42284b6b0f02a995a6bb04916b2"><td class="memItemLeft" align="right" valign="top"><a id="af8c1c42284b6b0f02a995a6bb04916b2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_ASYNCH_ASYNCH</b>(value)&#160;&#160;&#160;(EIC_ASYNCH_ASYNCH_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2eic_8h.html#a7f83768aa55abe8d2d64a4335d7129f0">EIC_ASYNCH_ASYNCH_Pos</a>))</td></tr>
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<tr class="memitem:ac0b909c2fc1df3e197bcddc996d39d78"><td class="memItemLeft" align="right" valign="top"><a id="ac0b909c2fc1df3e197bcddc996d39d78"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#ac0b909c2fc1df3e197bcddc996d39d78">EIC_ASYNCH_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000FFFF)</td></tr>
<tr class="memdesc:ac0b909c2fc1df3e197bcddc996d39d78"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_ASYNCH) MASK Register <br /></td></tr>
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<tr class="memitem:a35ff22e6265c54180a3967466b95361a"><td class="memItemLeft" align="right" valign="top"><a id="a35ff22e6265c54180a3967466b95361a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a35ff22e6265c54180a3967466b95361a">EIC_CONFIG_OFFSET</a>&#160;&#160;&#160;0x1C</td></tr>
<tr class="memdesc:a35ff22e6265c54180a3967466b95361a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG offset) External Interrupt Sense Configuration <br /></td></tr>
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<tr class="memitem:afa5a8efe9b088c3ef448f32bf86d537d"><td class="memItemLeft" align="right" valign="top"><a id="afa5a8efe9b088c3ef448f32bf86d537d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#afa5a8efe9b088c3ef448f32bf86d537d">EIC_CONFIG_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:afa5a8efe9b088c3ef448f32bf86d537d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG reset_value) External Interrupt Sense Configuration <br /></td></tr>
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<tr class="memitem:a9a191a13be42b2e0283c890d9302f461"><td class="memItemLeft" align="right" valign="top"><a id="a9a191a13be42b2e0283c890d9302f461"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a9a191a13be42b2e0283c890d9302f461">EIC_CONFIG_SENSE0_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a9a191a13be42b2e0283c890d9302f461"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Input Sense Configuration 0 <br /></td></tr>
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<tr class="memitem:add199a75cf7a674ddc1ffc8dc8246dc5"><td class="memItemLeft" align="right" valign="top"><a id="add199a75cf7a674ddc1ffc8dc8246dc5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE0_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) &lt;&lt; <a class="el" href="component_2eic_8h.html#a9a191a13be42b2e0283c890d9302f461">EIC_CONFIG_SENSE0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE0</b>(value)&#160;&#160;&#160;(EIC_CONFIG_SENSE0_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2eic_8h.html#a9a191a13be42b2e0283c890d9302f461">EIC_CONFIG_SENSE0_Pos</a>))</td></tr>
<tr class="separator:a5072e249ac60a58be9d31168eebf2aa6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a986d4e3fc22b167f6eb21a178ff4c45e"><td class="memItemLeft" align="right" valign="top"><a id="a986d4e3fc22b167f6eb21a178ff4c45e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a986d4e3fc22b167f6eb21a178ff4c45e">EIC_CONFIG_SENSE0_NONE_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a986d4e3fc22b167f6eb21a178ff4c45e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) No detection <br /></td></tr>
<tr class="separator:a986d4e3fc22b167f6eb21a178ff4c45e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:adf381990c5471ceec041a27a028a51be"><td class="memItemLeft" align="right" valign="top"><a id="adf381990c5471ceec041a27a028a51be"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#adf381990c5471ceec041a27a028a51be">EIC_CONFIG_SENSE0_RISE_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:adf381990c5471ceec041a27a028a51be"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Rising edge detection <br /></td></tr>
<tr class="separator:adf381990c5471ceec041a27a028a51be"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7fb62a57d10876d7cc1f6e22992c469d"><td class="memItemLeft" align="right" valign="top"><a id="a7fb62a57d10876d7cc1f6e22992c469d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a7fb62a57d10876d7cc1f6e22992c469d">EIC_CONFIG_SENSE0_FALL_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a7fb62a57d10876d7cc1f6e22992c469d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Falling edge detection <br /></td></tr>
<tr class="separator:a7fb62a57d10876d7cc1f6e22992c469d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac0808674223b5a4fe5e7d1e24c1499a3"><td class="memItemLeft" align="right" valign="top"><a id="ac0808674223b5a4fe5e7d1e24c1499a3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#ac0808674223b5a4fe5e7d1e24c1499a3">EIC_CONFIG_SENSE0_BOTH_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
<tr class="memdesc:ac0808674223b5a4fe5e7d1e24c1499a3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Both edges detection <br /></td></tr>
<tr class="separator:ac0808674223b5a4fe5e7d1e24c1499a3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:add8658a97c85968dea3f8bdcceabca94"><td class="memItemLeft" align="right" valign="top"><a id="add8658a97c85968dea3f8bdcceabca94"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#add8658a97c85968dea3f8bdcceabca94">EIC_CONFIG_SENSE0_HIGH_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
<tr class="memdesc:add8658a97c85968dea3f8bdcceabca94"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) High level detection <br /></td></tr>
<tr class="separator:add8658a97c85968dea3f8bdcceabca94"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad578c3896d5b3cdc4631cba1a6f3f8e2"><td class="memItemLeft" align="right" valign="top"><a id="ad578c3896d5b3cdc4631cba1a6f3f8e2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#ad578c3896d5b3cdc4631cba1a6f3f8e2">EIC_CONFIG_SENSE0_LOW_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
<tr class="memdesc:ad578c3896d5b3cdc4631cba1a6f3f8e2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Low level detection <br /></td></tr>
<tr class="separator:ad578c3896d5b3cdc4631cba1a6f3f8e2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a378c783f77963e228dac8f9a6a370e6f"><td class="memItemLeft" align="right" valign="top"><a id="a378c783f77963e228dac8f9a6a370e6f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE0_NONE</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a986d4e3fc22b167f6eb21a178ff4c45e">EIC_CONFIG_SENSE0_NONE_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a9a191a13be42b2e0283c890d9302f461">EIC_CONFIG_SENSE0_Pos</a>)</td></tr>
<tr class="separator:a378c783f77963e228dac8f9a6a370e6f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6d9aa621526bcaef219a3b4ba0acc592"><td class="memItemLeft" align="right" valign="top"><a id="a6d9aa621526bcaef219a3b4ba0acc592"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE0_RISE</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#adf381990c5471ceec041a27a028a51be">EIC_CONFIG_SENSE0_RISE_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a9a191a13be42b2e0283c890d9302f461">EIC_CONFIG_SENSE0_Pos</a>)</td></tr>
<tr class="separator:a6d9aa621526bcaef219a3b4ba0acc592"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a763b0b029d345528a83d415e4defb312"><td class="memItemLeft" align="right" valign="top"><a id="a763b0b029d345528a83d415e4defb312"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE0_FALL</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a7fb62a57d10876d7cc1f6e22992c469d">EIC_CONFIG_SENSE0_FALL_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a9a191a13be42b2e0283c890d9302f461">EIC_CONFIG_SENSE0_Pos</a>)</td></tr>
<tr class="separator:a763b0b029d345528a83d415e4defb312"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE0_BOTH</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#ac0808674223b5a4fe5e7d1e24c1499a3">EIC_CONFIG_SENSE0_BOTH_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a9a191a13be42b2e0283c890d9302f461">EIC_CONFIG_SENSE0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE0_HIGH</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#add8658a97c85968dea3f8bdcceabca94">EIC_CONFIG_SENSE0_HIGH_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a9a191a13be42b2e0283c890d9302f461">EIC_CONFIG_SENSE0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE0_LOW</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#ad578c3896d5b3cdc4631cba1a6f3f8e2">EIC_CONFIG_SENSE0_LOW_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a9a191a13be42b2e0283c890d9302f461">EIC_CONFIG_SENSE0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#aa17527a9aab80477ff20ed73d2d7177a">EIC_CONFIG_FILTEN0_Pos</a>&#160;&#160;&#160;3</td></tr>
<tr class="memdesc:aa17527a9aab80477ff20ed73d2d7177a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Filter Enable 0 <br /></td></tr>
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<tr class="memitem:af3dda3c75f2f02a4d4c532526cc29230"><td class="memItemLeft" align="right" valign="top"><a id="af3dda3c75f2f02a4d4c532526cc29230"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_FILTEN0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2eic_8h.html#aa17527a9aab80477ff20ed73d2d7177a">EIC_CONFIG_FILTEN0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#ab34794f88d0b20fa2792afe7fecd7fc1">EIC_CONFIG_SENSE1_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:ab34794f88d0b20fa2792afe7fecd7fc1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Input Sense Configuration 1 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE1_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) &lt;&lt; <a class="el" href="component_2eic_8h.html#ab34794f88d0b20fa2792afe7fecd7fc1">EIC_CONFIG_SENSE1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE1</b>(value)&#160;&#160;&#160;(EIC_CONFIG_SENSE1_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2eic_8h.html#ab34794f88d0b20fa2792afe7fecd7fc1">EIC_CONFIG_SENSE1_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a2dd12fe5d69cac11eb3b807a1ba2972a">EIC_CONFIG_SENSE1_NONE_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a2dd12fe5d69cac11eb3b807a1ba2972a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) No detection <br /></td></tr>
<tr class="separator:a2dd12fe5d69cac11eb3b807a1ba2972a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a390eb7bfde2edc0c8f7c2aecc55f2f11"><td class="memItemLeft" align="right" valign="top"><a id="a390eb7bfde2edc0c8f7c2aecc55f2f11"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a390eb7bfde2edc0c8f7c2aecc55f2f11">EIC_CONFIG_SENSE1_RISE_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:a390eb7bfde2edc0c8f7c2aecc55f2f11"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Rising edge detection <br /></td></tr>
<tr class="separator:a390eb7bfde2edc0c8f7c2aecc55f2f11"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0ca6a376817490cb3ef82906ffe21923"><td class="memItemLeft" align="right" valign="top"><a id="a0ca6a376817490cb3ef82906ffe21923"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a0ca6a376817490cb3ef82906ffe21923">EIC_CONFIG_SENSE1_FALL_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a0ca6a376817490cb3ef82906ffe21923"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Falling edge detection <br /></td></tr>
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<tr class="memitem:abb0c4499b66df5612c61697749c38f6f"><td class="memItemLeft" align="right" valign="top"><a id="abb0c4499b66df5612c61697749c38f6f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#abb0c4499b66df5612c61697749c38f6f">EIC_CONFIG_SENSE1_BOTH_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
<tr class="memdesc:abb0c4499b66df5612c61697749c38f6f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Both edges detection <br /></td></tr>
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<tr class="memitem:ad9d6fe0929c266f663d7fb7b05296098"><td class="memItemLeft" align="right" valign="top"><a id="ad9d6fe0929c266f663d7fb7b05296098"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#ad9d6fe0929c266f663d7fb7b05296098">EIC_CONFIG_SENSE1_HIGH_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
<tr class="memdesc:ad9d6fe0929c266f663d7fb7b05296098"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) High level detection <br /></td></tr>
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<tr class="memitem:aece415d353240e8ee175072f6a5224cd"><td class="memItemLeft" align="right" valign="top"><a id="aece415d353240e8ee175072f6a5224cd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#aece415d353240e8ee175072f6a5224cd">EIC_CONFIG_SENSE1_LOW_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
<tr class="memdesc:aece415d353240e8ee175072f6a5224cd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Low level detection <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE1_NONE</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a2dd12fe5d69cac11eb3b807a1ba2972a">EIC_CONFIG_SENSE1_NONE_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#ab34794f88d0b20fa2792afe7fecd7fc1">EIC_CONFIG_SENSE1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE1_RISE</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a390eb7bfde2edc0c8f7c2aecc55f2f11">EIC_CONFIG_SENSE1_RISE_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#ab34794f88d0b20fa2792afe7fecd7fc1">EIC_CONFIG_SENSE1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE1_FALL</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a0ca6a376817490cb3ef82906ffe21923">EIC_CONFIG_SENSE1_FALL_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#ab34794f88d0b20fa2792afe7fecd7fc1">EIC_CONFIG_SENSE1_Pos</a>)</td></tr>
<tr class="separator:af55ad673c13920e9d0c93a9427b9c4bb"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE1_BOTH</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#abb0c4499b66df5612c61697749c38f6f">EIC_CONFIG_SENSE1_BOTH_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#ab34794f88d0b20fa2792afe7fecd7fc1">EIC_CONFIG_SENSE1_Pos</a>)</td></tr>
<tr class="separator:ac3a09f66728d85d1ee060b14e71f14db"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE1_HIGH</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#ad9d6fe0929c266f663d7fb7b05296098">EIC_CONFIG_SENSE1_HIGH_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#ab34794f88d0b20fa2792afe7fecd7fc1">EIC_CONFIG_SENSE1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE1_LOW</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#aece415d353240e8ee175072f6a5224cd">EIC_CONFIG_SENSE1_LOW_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#ab34794f88d0b20fa2792afe7fecd7fc1">EIC_CONFIG_SENSE1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a930f7f68f458eb61711fcad9b7b0e33d">EIC_CONFIG_FILTEN1_Pos</a>&#160;&#160;&#160;7</td></tr>
<tr class="memdesc:a930f7f68f458eb61711fcad9b7b0e33d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Filter Enable 1 <br /></td></tr>
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<tr class="memitem:aed447b99e55e694beb50f9d65de606c3"><td class="memItemLeft" align="right" valign="top"><a id="aed447b99e55e694beb50f9d65de606c3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_FILTEN1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2eic_8h.html#a930f7f68f458eb61711fcad9b7b0e33d">EIC_CONFIG_FILTEN1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#af67e9a2938eae7c6f9f4d19c405e243f">EIC_CONFIG_SENSE2_Pos</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:af67e9a2938eae7c6f9f4d19c405e243f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Input Sense Configuration 2 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE2_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) &lt;&lt; <a class="el" href="component_2eic_8h.html#af67e9a2938eae7c6f9f4d19c405e243f">EIC_CONFIG_SENSE2_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE2</b>(value)&#160;&#160;&#160;(EIC_CONFIG_SENSE2_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2eic_8h.html#af67e9a2938eae7c6f9f4d19c405e243f">EIC_CONFIG_SENSE2_Pos</a>))</td></tr>
<tr class="separator:ac962ab50d64cad7bdffe1589d05ea8fe"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a89231a2e48fe64b47ec85f545280b7df"><td class="memItemLeft" align="right" valign="top"><a id="a89231a2e48fe64b47ec85f545280b7df"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a89231a2e48fe64b47ec85f545280b7df">EIC_CONFIG_SENSE2_NONE_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a89231a2e48fe64b47ec85f545280b7df"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) No detection <br /></td></tr>
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<tr class="memitem:a4c6f24459946c4c716e15f887cf91732"><td class="memItemLeft" align="right" valign="top"><a id="a4c6f24459946c4c716e15f887cf91732"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a4c6f24459946c4c716e15f887cf91732">EIC_CONFIG_SENSE2_RISE_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:a4c6f24459946c4c716e15f887cf91732"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Rising edge detection <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a2f603343d04d42dfa3c238016be954b5">EIC_CONFIG_SENSE2_FALL_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a2f603343d04d42dfa3c238016be954b5"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Falling edge detection <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a7809a27e221937b35d9e6b969a3771fb">EIC_CONFIG_SENSE2_BOTH_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
<tr class="memdesc:a7809a27e221937b35d9e6b969a3771fb"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Both edges detection <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a949642d01c96957d1e5f9279d3b48c2c">EIC_CONFIG_SENSE2_HIGH_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
<tr class="memdesc:a949642d01c96957d1e5f9279d3b48c2c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) High level detection <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a475f78069ac4ecbb6c2115497fa686f0">EIC_CONFIG_SENSE2_LOW_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
<tr class="memdesc:a475f78069ac4ecbb6c2115497fa686f0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Low level detection <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE2_NONE</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a89231a2e48fe64b47ec85f545280b7df">EIC_CONFIG_SENSE2_NONE_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#af67e9a2938eae7c6f9f4d19c405e243f">EIC_CONFIG_SENSE2_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE2_RISE</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a4c6f24459946c4c716e15f887cf91732">EIC_CONFIG_SENSE2_RISE_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#af67e9a2938eae7c6f9f4d19c405e243f">EIC_CONFIG_SENSE2_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE2_FALL</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a2f603343d04d42dfa3c238016be954b5">EIC_CONFIG_SENSE2_FALL_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#af67e9a2938eae7c6f9f4d19c405e243f">EIC_CONFIG_SENSE2_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE2_BOTH</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a7809a27e221937b35d9e6b969a3771fb">EIC_CONFIG_SENSE2_BOTH_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#af67e9a2938eae7c6f9f4d19c405e243f">EIC_CONFIG_SENSE2_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE2_HIGH</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a949642d01c96957d1e5f9279d3b48c2c">EIC_CONFIG_SENSE2_HIGH_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#af67e9a2938eae7c6f9f4d19c405e243f">EIC_CONFIG_SENSE2_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE2_LOW</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a475f78069ac4ecbb6c2115497fa686f0">EIC_CONFIG_SENSE2_LOW_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#af67e9a2938eae7c6f9f4d19c405e243f">EIC_CONFIG_SENSE2_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a54e72c526cf4c31edf453b7f50618043">EIC_CONFIG_FILTEN2_Pos</a>&#160;&#160;&#160;11</td></tr>
<tr class="memdesc:a54e72c526cf4c31edf453b7f50618043"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Filter Enable 2 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_FILTEN2</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2eic_8h.html#a54e72c526cf4c31edf453b7f50618043">EIC_CONFIG_FILTEN2_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a831aeaf54a89c732e999bddee6ad0cbf">EIC_CONFIG_SENSE3_Pos</a>&#160;&#160;&#160;12</td></tr>
<tr class="memdesc:a831aeaf54a89c732e999bddee6ad0cbf"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Input Sense Configuration 3 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE3_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) &lt;&lt; <a class="el" href="component_2eic_8h.html#a831aeaf54a89c732e999bddee6ad0cbf">EIC_CONFIG_SENSE3_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE3</b>(value)&#160;&#160;&#160;(EIC_CONFIG_SENSE3_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2eic_8h.html#a831aeaf54a89c732e999bddee6ad0cbf">EIC_CONFIG_SENSE3_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#ae6cb4f8bb0afd3fd2c89dad8d552ec1f">EIC_CONFIG_SENSE3_NONE_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:ae6cb4f8bb0afd3fd2c89dad8d552ec1f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) No detection <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#ae1f57c9ebb1706bb46bc77ef24f56a81">EIC_CONFIG_SENSE3_RISE_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:ae1f57c9ebb1706bb46bc77ef24f56a81"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Rising edge detection <br /></td></tr>
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<tr class="memitem:af4c91968458631be4fa57f3c0c15404c"><td class="memItemLeft" align="right" valign="top"><a id="af4c91968458631be4fa57f3c0c15404c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#af4c91968458631be4fa57f3c0c15404c">EIC_CONFIG_SENSE3_FALL_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:af4c91968458631be4fa57f3c0c15404c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Falling edge detection <br /></td></tr>
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<tr class="memitem:aa8713c71e12ac27aed9182636e488bc6"><td class="memItemLeft" align="right" valign="top"><a id="aa8713c71e12ac27aed9182636e488bc6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#aa8713c71e12ac27aed9182636e488bc6">EIC_CONFIG_SENSE3_BOTH_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
<tr class="memdesc:aa8713c71e12ac27aed9182636e488bc6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Both edges detection <br /></td></tr>
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<tr class="memitem:ac73c1ef1256ac37c4a05f3f3437ca87d"><td class="memItemLeft" align="right" valign="top"><a id="ac73c1ef1256ac37c4a05f3f3437ca87d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#ac73c1ef1256ac37c4a05f3f3437ca87d">EIC_CONFIG_SENSE3_HIGH_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
<tr class="memdesc:ac73c1ef1256ac37c4a05f3f3437ca87d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) High level detection <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#acd770ca16cc8b9bd76408b1ab7391ff5">EIC_CONFIG_SENSE3_LOW_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
<tr class="memdesc:acd770ca16cc8b9bd76408b1ab7391ff5"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Low level detection <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE3_NONE</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#ae6cb4f8bb0afd3fd2c89dad8d552ec1f">EIC_CONFIG_SENSE3_NONE_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a831aeaf54a89c732e999bddee6ad0cbf">EIC_CONFIG_SENSE3_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE3_RISE</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#ae1f57c9ebb1706bb46bc77ef24f56a81">EIC_CONFIG_SENSE3_RISE_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a831aeaf54a89c732e999bddee6ad0cbf">EIC_CONFIG_SENSE3_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE3_FALL</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#af4c91968458631be4fa57f3c0c15404c">EIC_CONFIG_SENSE3_FALL_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a831aeaf54a89c732e999bddee6ad0cbf">EIC_CONFIG_SENSE3_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE3_BOTH</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#aa8713c71e12ac27aed9182636e488bc6">EIC_CONFIG_SENSE3_BOTH_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a831aeaf54a89c732e999bddee6ad0cbf">EIC_CONFIG_SENSE3_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE3_HIGH</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#ac73c1ef1256ac37c4a05f3f3437ca87d">EIC_CONFIG_SENSE3_HIGH_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a831aeaf54a89c732e999bddee6ad0cbf">EIC_CONFIG_SENSE3_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE3_LOW</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#acd770ca16cc8b9bd76408b1ab7391ff5">EIC_CONFIG_SENSE3_LOW_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a831aeaf54a89c732e999bddee6ad0cbf">EIC_CONFIG_SENSE3_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#af8ffa2628676573b96658108f610e95e">EIC_CONFIG_FILTEN3_Pos</a>&#160;&#160;&#160;15</td></tr>
<tr class="memdesc:af8ffa2628676573b96658108f610e95e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Filter Enable 3 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_FILTEN3</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2eic_8h.html#af8ffa2628676573b96658108f610e95e">EIC_CONFIG_FILTEN3_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#ad23c76b1fbf7d30fa3aa738a38c453c3">EIC_CONFIG_SENSE4_Pos</a>&#160;&#160;&#160;16</td></tr>
<tr class="memdesc:ad23c76b1fbf7d30fa3aa738a38c453c3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Input Sense Configuration 4 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE4_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) &lt;&lt; <a class="el" href="component_2eic_8h.html#ad23c76b1fbf7d30fa3aa738a38c453c3">EIC_CONFIG_SENSE4_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE4</b>(value)&#160;&#160;&#160;(EIC_CONFIG_SENSE4_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2eic_8h.html#ad23c76b1fbf7d30fa3aa738a38c453c3">EIC_CONFIG_SENSE4_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a4317fae5e621e618c7e7bdf654a1b2b0">EIC_CONFIG_SENSE4_NONE_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a4317fae5e621e618c7e7bdf654a1b2b0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) No detection <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#aad52f78c0fc34ba713282c4f2cb52965">EIC_CONFIG_SENSE4_RISE_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:aad52f78c0fc34ba713282c4f2cb52965"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Rising edge detection <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a4fe8ad8e7d22ba42d070d9108213d907">EIC_CONFIG_SENSE4_FALL_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a4fe8ad8e7d22ba42d070d9108213d907"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Falling edge detection <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a90038bdcd72cf77acd74f46032eb292c">EIC_CONFIG_SENSE4_BOTH_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
<tr class="memdesc:a90038bdcd72cf77acd74f46032eb292c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Both edges detection <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#af61da74ee963e779f81a0fa2f81e9c75">EIC_CONFIG_SENSE4_HIGH_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
<tr class="memdesc:af61da74ee963e779f81a0fa2f81e9c75"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) High level detection <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a92370d05cd0d822893f57ecf0ff7a2a5">EIC_CONFIG_SENSE4_LOW_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
<tr class="memdesc:a92370d05cd0d822893f57ecf0ff7a2a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Low level detection <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE4_NONE</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a4317fae5e621e618c7e7bdf654a1b2b0">EIC_CONFIG_SENSE4_NONE_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#ad23c76b1fbf7d30fa3aa738a38c453c3">EIC_CONFIG_SENSE4_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE4_RISE</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#aad52f78c0fc34ba713282c4f2cb52965">EIC_CONFIG_SENSE4_RISE_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#ad23c76b1fbf7d30fa3aa738a38c453c3">EIC_CONFIG_SENSE4_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE4_FALL</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a4fe8ad8e7d22ba42d070d9108213d907">EIC_CONFIG_SENSE4_FALL_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#ad23c76b1fbf7d30fa3aa738a38c453c3">EIC_CONFIG_SENSE4_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE4_BOTH</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a90038bdcd72cf77acd74f46032eb292c">EIC_CONFIG_SENSE4_BOTH_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#ad23c76b1fbf7d30fa3aa738a38c453c3">EIC_CONFIG_SENSE4_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE4_HIGH</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#af61da74ee963e779f81a0fa2f81e9c75">EIC_CONFIG_SENSE4_HIGH_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#ad23c76b1fbf7d30fa3aa738a38c453c3">EIC_CONFIG_SENSE4_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE4_LOW</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a92370d05cd0d822893f57ecf0ff7a2a5">EIC_CONFIG_SENSE4_LOW_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#ad23c76b1fbf7d30fa3aa738a38c453c3">EIC_CONFIG_SENSE4_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a96cc4d08e7114ef41793a0323c1890fc">EIC_CONFIG_FILTEN4_Pos</a>&#160;&#160;&#160;19</td></tr>
<tr class="memdesc:a96cc4d08e7114ef41793a0323c1890fc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Filter Enable 4 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_FILTEN4</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2eic_8h.html#a96cc4d08e7114ef41793a0323c1890fc">EIC_CONFIG_FILTEN4_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#ace7caae074bf08e88805b591c626fb7f">EIC_CONFIG_SENSE5_Pos</a>&#160;&#160;&#160;20</td></tr>
<tr class="memdesc:ace7caae074bf08e88805b591c626fb7f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Input Sense Configuration 5 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE5_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) &lt;&lt; <a class="el" href="component_2eic_8h.html#ace7caae074bf08e88805b591c626fb7f">EIC_CONFIG_SENSE5_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE5</b>(value)&#160;&#160;&#160;(EIC_CONFIG_SENSE5_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2eic_8h.html#ace7caae074bf08e88805b591c626fb7f">EIC_CONFIG_SENSE5_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a1f73b11cdad345f444d6267c016e7d06">EIC_CONFIG_SENSE5_NONE_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a1f73b11cdad345f444d6267c016e7d06"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) No detection <br /></td></tr>
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<tr class="memitem:aa79135e0c433132db7b3df88472fda74"><td class="memItemLeft" align="right" valign="top"><a id="aa79135e0c433132db7b3df88472fda74"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#aa79135e0c433132db7b3df88472fda74">EIC_CONFIG_SENSE5_RISE_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:aa79135e0c433132db7b3df88472fda74"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Rising edge detection <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a2f575e054321eef78315a123006b62dc">EIC_CONFIG_SENSE5_FALL_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a2f575e054321eef78315a123006b62dc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Falling edge detection <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a020047d3418afa7b60b72bfc4872bfb0">EIC_CONFIG_SENSE5_BOTH_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
<tr class="memdesc:a020047d3418afa7b60b72bfc4872bfb0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Both edges detection <br /></td></tr>
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<tr class="memitem:afc521f838a152ea846c8ba29d2d7e578"><td class="memItemLeft" align="right" valign="top"><a id="afc521f838a152ea846c8ba29d2d7e578"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#afc521f838a152ea846c8ba29d2d7e578">EIC_CONFIG_SENSE5_HIGH_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
<tr class="memdesc:afc521f838a152ea846c8ba29d2d7e578"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) High level detection <br /></td></tr>
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<tr class="memitem:a4a2958b65315240e85c9bf06c9c92305"><td class="memItemLeft" align="right" valign="top"><a id="a4a2958b65315240e85c9bf06c9c92305"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a4a2958b65315240e85c9bf06c9c92305">EIC_CONFIG_SENSE5_LOW_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
<tr class="memdesc:a4a2958b65315240e85c9bf06c9c92305"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Low level detection <br /></td></tr>
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<tr class="memitem:a9de75fb4e0ca1290179613d6bcb55631"><td class="memItemLeft" align="right" valign="top"><a id="a9de75fb4e0ca1290179613d6bcb55631"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE5_NONE</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a1f73b11cdad345f444d6267c016e7d06">EIC_CONFIG_SENSE5_NONE_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#ace7caae074bf08e88805b591c626fb7f">EIC_CONFIG_SENSE5_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE5_RISE</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#aa79135e0c433132db7b3df88472fda74">EIC_CONFIG_SENSE5_RISE_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#ace7caae074bf08e88805b591c626fb7f">EIC_CONFIG_SENSE5_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE5_FALL</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a2f575e054321eef78315a123006b62dc">EIC_CONFIG_SENSE5_FALL_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#ace7caae074bf08e88805b591c626fb7f">EIC_CONFIG_SENSE5_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE5_BOTH</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a020047d3418afa7b60b72bfc4872bfb0">EIC_CONFIG_SENSE5_BOTH_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#ace7caae074bf08e88805b591c626fb7f">EIC_CONFIG_SENSE5_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE5_HIGH</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#afc521f838a152ea846c8ba29d2d7e578">EIC_CONFIG_SENSE5_HIGH_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#ace7caae074bf08e88805b591c626fb7f">EIC_CONFIG_SENSE5_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE5_LOW</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a4a2958b65315240e85c9bf06c9c92305">EIC_CONFIG_SENSE5_LOW_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#ace7caae074bf08e88805b591c626fb7f">EIC_CONFIG_SENSE5_Pos</a>)</td></tr>
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<tr class="memitem:ab3c6837a90614cf79a4d0feece41fdd6"><td class="memItemLeft" align="right" valign="top"><a id="ab3c6837a90614cf79a4d0feece41fdd6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#ab3c6837a90614cf79a4d0feece41fdd6">EIC_CONFIG_FILTEN5_Pos</a>&#160;&#160;&#160;23</td></tr>
<tr class="memdesc:ab3c6837a90614cf79a4d0feece41fdd6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Filter Enable 5 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_FILTEN5</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2eic_8h.html#ab3c6837a90614cf79a4d0feece41fdd6">EIC_CONFIG_FILTEN5_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a17d194da98be0777ff750650293d386d">EIC_CONFIG_SENSE6_Pos</a>&#160;&#160;&#160;24</td></tr>
<tr class="memdesc:a17d194da98be0777ff750650293d386d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Input Sense Configuration 6 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE6_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) &lt;&lt; <a class="el" href="component_2eic_8h.html#a17d194da98be0777ff750650293d386d">EIC_CONFIG_SENSE6_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE6</b>(value)&#160;&#160;&#160;(EIC_CONFIG_SENSE6_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2eic_8h.html#a17d194da98be0777ff750650293d386d">EIC_CONFIG_SENSE6_Pos</a>))</td></tr>
<tr class="separator:a8cd719665a49e3077bf14150693a94d7"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a9c966fa77b4176c92e747e52084cfbd8">EIC_CONFIG_SENSE6_NONE_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a9c966fa77b4176c92e747e52084cfbd8"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) No detection <br /></td></tr>
<tr class="separator:a9c966fa77b4176c92e747e52084cfbd8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6a5001e8379757251033150764c6dcba"><td class="memItemLeft" align="right" valign="top"><a id="a6a5001e8379757251033150764c6dcba"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a6a5001e8379757251033150764c6dcba">EIC_CONFIG_SENSE6_RISE_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:a6a5001e8379757251033150764c6dcba"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Rising edge detection <br /></td></tr>
<tr class="separator:a6a5001e8379757251033150764c6dcba"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa3b18a5b6647f583a1b276ad9b5aa4d6"><td class="memItemLeft" align="right" valign="top"><a id="aa3b18a5b6647f583a1b276ad9b5aa4d6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#aa3b18a5b6647f583a1b276ad9b5aa4d6">EIC_CONFIG_SENSE6_FALL_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:aa3b18a5b6647f583a1b276ad9b5aa4d6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Falling edge detection <br /></td></tr>
<tr class="separator:aa3b18a5b6647f583a1b276ad9b5aa4d6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a30183c55bdd242f2e73f8e9510c3208a"><td class="memItemLeft" align="right" valign="top"><a id="a30183c55bdd242f2e73f8e9510c3208a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a30183c55bdd242f2e73f8e9510c3208a">EIC_CONFIG_SENSE6_BOTH_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
<tr class="memdesc:a30183c55bdd242f2e73f8e9510c3208a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Both edges detection <br /></td></tr>
<tr class="separator:a30183c55bdd242f2e73f8e9510c3208a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a308809e49e6d8ddd024e96f22f1cf72c"><td class="memItemLeft" align="right" valign="top"><a id="a308809e49e6d8ddd024e96f22f1cf72c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a308809e49e6d8ddd024e96f22f1cf72c">EIC_CONFIG_SENSE6_HIGH_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
<tr class="memdesc:a308809e49e6d8ddd024e96f22f1cf72c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) High level detection <br /></td></tr>
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<tr class="memitem:a3df3d29ae144b0c1d5b95a4f898fb78d"><td class="memItemLeft" align="right" valign="top"><a id="a3df3d29ae144b0c1d5b95a4f898fb78d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a3df3d29ae144b0c1d5b95a4f898fb78d">EIC_CONFIG_SENSE6_LOW_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
<tr class="memdesc:a3df3d29ae144b0c1d5b95a4f898fb78d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Low level detection <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE6_NONE</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a9c966fa77b4176c92e747e52084cfbd8">EIC_CONFIG_SENSE6_NONE_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a17d194da98be0777ff750650293d386d">EIC_CONFIG_SENSE6_Pos</a>)</td></tr>
<tr class="separator:a7631d16699c592b20e9b8b0edadd0368"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE6_RISE</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a6a5001e8379757251033150764c6dcba">EIC_CONFIG_SENSE6_RISE_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a17d194da98be0777ff750650293d386d">EIC_CONFIG_SENSE6_Pos</a>)</td></tr>
<tr class="separator:a53c04777fd42c073f8f1bed777c89e26"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE6_FALL</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#aa3b18a5b6647f583a1b276ad9b5aa4d6">EIC_CONFIG_SENSE6_FALL_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a17d194da98be0777ff750650293d386d">EIC_CONFIG_SENSE6_Pos</a>)</td></tr>
<tr class="separator:ad0772048f10199d34db19472fc416e23"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE6_BOTH</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a30183c55bdd242f2e73f8e9510c3208a">EIC_CONFIG_SENSE6_BOTH_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a17d194da98be0777ff750650293d386d">EIC_CONFIG_SENSE6_Pos</a>)</td></tr>
<tr class="separator:a7b8a2ab45d8e40ff1cbedf8222a0d691"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE6_HIGH</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a308809e49e6d8ddd024e96f22f1cf72c">EIC_CONFIG_SENSE6_HIGH_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a17d194da98be0777ff750650293d386d">EIC_CONFIG_SENSE6_Pos</a>)</td></tr>
<tr class="separator:aa288bee325b96239efcae0546b82b7bf"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE6_LOW</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a3df3d29ae144b0c1d5b95a4f898fb78d">EIC_CONFIG_SENSE6_LOW_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a17d194da98be0777ff750650293d386d">EIC_CONFIG_SENSE6_Pos</a>)</td></tr>
<tr class="separator:aa7f53acd84244664504de0dcd73d1bf3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1138acbe8b4dedc40a413a58ec7b2c57"><td class="memItemLeft" align="right" valign="top"><a id="a1138acbe8b4dedc40a413a58ec7b2c57"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a1138acbe8b4dedc40a413a58ec7b2c57">EIC_CONFIG_FILTEN6_Pos</a>&#160;&#160;&#160;27</td></tr>
<tr class="memdesc:a1138acbe8b4dedc40a413a58ec7b2c57"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Filter Enable 6 <br /></td></tr>
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<tr class="memitem:aa478e221fcdc48e552b61567e53ad83f"><td class="memItemLeft" align="right" valign="top"><a id="aa478e221fcdc48e552b61567e53ad83f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_FILTEN6</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2eic_8h.html#a1138acbe8b4dedc40a413a58ec7b2c57">EIC_CONFIG_FILTEN6_Pos</a>)</td></tr>
<tr class="separator:aa478e221fcdc48e552b61567e53ad83f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a19583c715708b15f578f5cc2a8f394fc"><td class="memItemLeft" align="right" valign="top"><a id="a19583c715708b15f578f5cc2a8f394fc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a19583c715708b15f578f5cc2a8f394fc">EIC_CONFIG_SENSE7_Pos</a>&#160;&#160;&#160;28</td></tr>
<tr class="memdesc:a19583c715708b15f578f5cc2a8f394fc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Input Sense Configuration 7 <br /></td></tr>
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<tr class="memitem:a02110a1b2861cc0350c98fc35963c3a6"><td class="memItemLeft" align="right" valign="top"><a id="a02110a1b2861cc0350c98fc35963c3a6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE7_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) &lt;&lt; <a class="el" href="component_2eic_8h.html#a19583c715708b15f578f5cc2a8f394fc">EIC_CONFIG_SENSE7_Pos</a>)</td></tr>
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<tr class="memitem:a65967e0d923c427a2dbebafb0dd5238b"><td class="memItemLeft" align="right" valign="top"><a id="a65967e0d923c427a2dbebafb0dd5238b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE7</b>(value)&#160;&#160;&#160;(EIC_CONFIG_SENSE7_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2eic_8h.html#a19583c715708b15f578f5cc2a8f394fc">EIC_CONFIG_SENSE7_Pos</a>))</td></tr>
<tr class="separator:a65967e0d923c427a2dbebafb0dd5238b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad238f5412dacf421dc698fbb1e6be2f2"><td class="memItemLeft" align="right" valign="top"><a id="ad238f5412dacf421dc698fbb1e6be2f2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#ad238f5412dacf421dc698fbb1e6be2f2">EIC_CONFIG_SENSE7_NONE_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:ad238f5412dacf421dc698fbb1e6be2f2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) No detection <br /></td></tr>
<tr class="separator:ad238f5412dacf421dc698fbb1e6be2f2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a84e2898643261f390c3f329d59357cb6"><td class="memItemLeft" align="right" valign="top"><a id="a84e2898643261f390c3f329d59357cb6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a84e2898643261f390c3f329d59357cb6">EIC_CONFIG_SENSE7_RISE_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:a84e2898643261f390c3f329d59357cb6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Rising edge detection <br /></td></tr>
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<tr class="memitem:a456906de38943b836b26294cd9735251"><td class="memItemLeft" align="right" valign="top"><a id="a456906de38943b836b26294cd9735251"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a456906de38943b836b26294cd9735251">EIC_CONFIG_SENSE7_FALL_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a456906de38943b836b26294cd9735251"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Falling edge detection <br /></td></tr>
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<tr class="memitem:a461a0f4bd20a83b7c935ba3fb4e640ac"><td class="memItemLeft" align="right" valign="top"><a id="a461a0f4bd20a83b7c935ba3fb4e640ac"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a461a0f4bd20a83b7c935ba3fb4e640ac">EIC_CONFIG_SENSE7_BOTH_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
<tr class="memdesc:a461a0f4bd20a83b7c935ba3fb4e640ac"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Both edges detection <br /></td></tr>
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<tr class="memitem:a90352dd0ca9acbd823c87862d2046489"><td class="memItemLeft" align="right" valign="top"><a id="a90352dd0ca9acbd823c87862d2046489"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a90352dd0ca9acbd823c87862d2046489">EIC_CONFIG_SENSE7_HIGH_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
<tr class="memdesc:a90352dd0ca9acbd823c87862d2046489"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) High level detection <br /></td></tr>
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<tr class="memitem:a090c5aaf967e49c1634a02bae7799fa6"><td class="memItemLeft" align="right" valign="top"><a id="a090c5aaf967e49c1634a02bae7799fa6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a090c5aaf967e49c1634a02bae7799fa6">EIC_CONFIG_SENSE7_LOW_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
<tr class="memdesc:a090c5aaf967e49c1634a02bae7799fa6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Low level detection <br /></td></tr>
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<tr class="memitem:a10033675399a7e1ce96cd0adba7969a3"><td class="memItemLeft" align="right" valign="top"><a id="a10033675399a7e1ce96cd0adba7969a3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE7_NONE</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#ad238f5412dacf421dc698fbb1e6be2f2">EIC_CONFIG_SENSE7_NONE_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a19583c715708b15f578f5cc2a8f394fc">EIC_CONFIG_SENSE7_Pos</a>)</td></tr>
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<tr class="memitem:a4da7e1c88d72147081f3cde64c67733e"><td class="memItemLeft" align="right" valign="top"><a id="a4da7e1c88d72147081f3cde64c67733e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE7_RISE</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a84e2898643261f390c3f329d59357cb6">EIC_CONFIG_SENSE7_RISE_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a19583c715708b15f578f5cc2a8f394fc">EIC_CONFIG_SENSE7_Pos</a>)</td></tr>
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<tr class="memitem:a11e90ceb16705cc83dcf38b9e1cb29ab"><td class="memItemLeft" align="right" valign="top"><a id="a11e90ceb16705cc83dcf38b9e1cb29ab"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE7_FALL</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a456906de38943b836b26294cd9735251">EIC_CONFIG_SENSE7_FALL_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a19583c715708b15f578f5cc2a8f394fc">EIC_CONFIG_SENSE7_Pos</a>)</td></tr>
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<tr class="memitem:a12fccfbecfd7d16ca1fb13f84b089f17"><td class="memItemLeft" align="right" valign="top"><a id="a12fccfbecfd7d16ca1fb13f84b089f17"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE7_BOTH</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a461a0f4bd20a83b7c935ba3fb4e640ac">EIC_CONFIG_SENSE7_BOTH_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a19583c715708b15f578f5cc2a8f394fc">EIC_CONFIG_SENSE7_Pos</a>)</td></tr>
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<tr class="memitem:ab54aa3b8ebf878f33caa571b6dd6e261"><td class="memItemLeft" align="right" valign="top"><a id="ab54aa3b8ebf878f33caa571b6dd6e261"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE7_HIGH</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a90352dd0ca9acbd823c87862d2046489">EIC_CONFIG_SENSE7_HIGH_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a19583c715708b15f578f5cc2a8f394fc">EIC_CONFIG_SENSE7_Pos</a>)</td></tr>
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<tr class="memitem:a4e10aa00420a52db6cf0eb9610777771"><td class="memItemLeft" align="right" valign="top"><a id="a4e10aa00420a52db6cf0eb9610777771"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_SENSE7_LOW</b>&#160;&#160;&#160;(<a class="el" href="component_2eic_8h.html#a090c5aaf967e49c1634a02bae7799fa6">EIC_CONFIG_SENSE7_LOW_Val</a> &lt;&lt; <a class="el" href="component_2eic_8h.html#a19583c715708b15f578f5cc2a8f394fc">EIC_CONFIG_SENSE7_Pos</a>)</td></tr>
<tr class="separator:a4e10aa00420a52db6cf0eb9610777771"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a77bd3664d9f1c1d6b212eac416d40341"><td class="memItemLeft" align="right" valign="top"><a id="a77bd3664d9f1c1d6b212eac416d40341"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a77bd3664d9f1c1d6b212eac416d40341">EIC_CONFIG_FILTEN7_Pos</a>&#160;&#160;&#160;31</td></tr>
<tr class="memdesc:a77bd3664d9f1c1d6b212eac416d40341"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) Filter Enable 7 <br /></td></tr>
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<tr class="memitem:ac996c8f278ab9f4af7588a785eef8c04"><td class="memItemLeft" align="right" valign="top"><a id="ac996c8f278ab9f4af7588a785eef8c04"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_CONFIG_FILTEN7</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2eic_8h.html#a77bd3664d9f1c1d6b212eac416d40341">EIC_CONFIG_FILTEN7_Pos</a>)</td></tr>
<tr class="separator:ac996c8f278ab9f4af7588a785eef8c04"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a713278aaffe59a230cb4f7642ee4900e"><td class="memItemLeft" align="right" valign="top"><a id="a713278aaffe59a230cb4f7642ee4900e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a713278aaffe59a230cb4f7642ee4900e">EIC_CONFIG_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:a713278aaffe59a230cb4f7642ee4900e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_CONFIG) MASK Register <br /></td></tr>
<tr class="separator:a713278aaffe59a230cb4f7642ee4900e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0534b51e4c32b62d69c3d9d785f072e2"><td class="memItemLeft" align="right" valign="top"><a id="a0534b51e4c32b62d69c3d9d785f072e2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a0534b51e4c32b62d69c3d9d785f072e2">EIC_DEBOUNCEN_OFFSET</a>&#160;&#160;&#160;0x30</td></tr>
<tr class="memdesc:a0534b51e4c32b62d69c3d9d785f072e2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_DEBOUNCEN offset) Debouncer Enable <br /></td></tr>
<tr class="separator:a0534b51e4c32b62d69c3d9d785f072e2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a528d7e520af4bbd921c4683ecc785046"><td class="memItemLeft" align="right" valign="top"><a id="a528d7e520af4bbd921c4683ecc785046"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a528d7e520af4bbd921c4683ecc785046">EIC_DEBOUNCEN_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a528d7e520af4bbd921c4683ecc785046"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_DEBOUNCEN reset_value) Debouncer Enable <br /></td></tr>
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<tr class="memitem:abd8078c045daaa7bead796b6fea74427"><td class="memItemLeft" align="right" valign="top"><a id="abd8078c045daaa7bead796b6fea74427"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#abd8078c045daaa7bead796b6fea74427">EIC_DEBOUNCEN_DEBOUNCEN_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:abd8078c045daaa7bead796b6fea74427"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_DEBOUNCEN) Debouncer Enable <br /></td></tr>
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<tr class="memitem:a2a9735fd99d36393d5e703e21e5c5946"><td class="memItemLeft" align="right" valign="top"><a id="a2a9735fd99d36393d5e703e21e5c5946"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_DEBOUNCEN_DEBOUNCEN_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF) &lt;&lt; <a class="el" href="component_2eic_8h.html#abd8078c045daaa7bead796b6fea74427">EIC_DEBOUNCEN_DEBOUNCEN_Pos</a>)</td></tr>
<tr class="separator:a2a9735fd99d36393d5e703e21e5c5946"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8f1d9b1e8466ba5736bd33e80f901d77"><td class="memItemLeft" align="right" valign="top"><a id="a8f1d9b1e8466ba5736bd33e80f901d77"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_DEBOUNCEN_DEBOUNCEN</b>(value)&#160;&#160;&#160;(EIC_DEBOUNCEN_DEBOUNCEN_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2eic_8h.html#abd8078c045daaa7bead796b6fea74427">EIC_DEBOUNCEN_DEBOUNCEN_Pos</a>))</td></tr>
<tr class="separator:a8f1d9b1e8466ba5736bd33e80f901d77"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac8f965edcafad4374b0e5f9ea2b1f1f9"><td class="memItemLeft" align="right" valign="top"><a id="ac8f965edcafad4374b0e5f9ea2b1f1f9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#ac8f965edcafad4374b0e5f9ea2b1f1f9">EIC_DEBOUNCEN_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000FFFF)</td></tr>
<tr class="memdesc:ac8f965edcafad4374b0e5f9ea2b1f1f9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_DEBOUNCEN) MASK Register <br /></td></tr>
<tr class="separator:ac8f965edcafad4374b0e5f9ea2b1f1f9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a93cab13d4fc39d87cc7c9693daf9ae7c"><td class="memItemLeft" align="right" valign="top"><a id="a93cab13d4fc39d87cc7c9693daf9ae7c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a93cab13d4fc39d87cc7c9693daf9ae7c">EIC_DPRESCALER_OFFSET</a>&#160;&#160;&#160;0x34</td></tr>
<tr class="memdesc:a93cab13d4fc39d87cc7c9693daf9ae7c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_DPRESCALER offset) Debouncer Prescaler <br /></td></tr>
<tr class="separator:a93cab13d4fc39d87cc7c9693daf9ae7c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a78d782557c6c8956894abed2f7773993"><td class="memItemLeft" align="right" valign="top"><a id="a78d782557c6c8956894abed2f7773993"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a78d782557c6c8956894abed2f7773993">EIC_DPRESCALER_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a78d782557c6c8956894abed2f7773993"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_DPRESCALER reset_value) Debouncer Prescaler <br /></td></tr>
<tr class="separator:a78d782557c6c8956894abed2f7773993"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4e25d3c10d962c315c546f23222a5b2b"><td class="memItemLeft" align="right" valign="top"><a id="a4e25d3c10d962c315c546f23222a5b2b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a4e25d3c10d962c315c546f23222a5b2b">EIC_DPRESCALER_PRESCALER0_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a4e25d3c10d962c315c546f23222a5b2b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_DPRESCALER) Debouncer Prescaler <br /></td></tr>
<tr class="separator:a4e25d3c10d962c315c546f23222a5b2b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5c19c690bb2da08b7c474d151c0f0107"><td class="memItemLeft" align="right" valign="top"><a id="a5c19c690bb2da08b7c474d151c0f0107"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_DPRESCALER_PRESCALER0_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) &lt;&lt; <a class="el" href="component_2eic_8h.html#a4e25d3c10d962c315c546f23222a5b2b">EIC_DPRESCALER_PRESCALER0_Pos</a>)</td></tr>
<tr class="separator:a5c19c690bb2da08b7c474d151c0f0107"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a805593309ad54d2638256c86a0bed0da"><td class="memItemLeft" align="right" valign="top"><a id="a805593309ad54d2638256c86a0bed0da"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_DPRESCALER_PRESCALER0</b>(value)&#160;&#160;&#160;(EIC_DPRESCALER_PRESCALER0_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2eic_8h.html#a4e25d3c10d962c315c546f23222a5b2b">EIC_DPRESCALER_PRESCALER0_Pos</a>))</td></tr>
<tr class="separator:a805593309ad54d2638256c86a0bed0da"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afdc67c1fd8679f56c7d36f9bd9b1eb54"><td class="memItemLeft" align="right" valign="top"><a id="afdc67c1fd8679f56c7d36f9bd9b1eb54"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#afdc67c1fd8679f56c7d36f9bd9b1eb54">EIC_DPRESCALER_STATES0_Pos</a>&#160;&#160;&#160;3</td></tr>
<tr class="memdesc:afdc67c1fd8679f56c7d36f9bd9b1eb54"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_DPRESCALER) Debouncer number of states <br /></td></tr>
<tr class="separator:afdc67c1fd8679f56c7d36f9bd9b1eb54"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab92379314ef24e3eb6c6178bc2f923cf"><td class="memItemLeft" align="right" valign="top"><a id="ab92379314ef24e3eb6c6178bc2f923cf"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_DPRESCALER_STATES0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2eic_8h.html#afdc67c1fd8679f56c7d36f9bd9b1eb54">EIC_DPRESCALER_STATES0_Pos</a>)</td></tr>
<tr class="separator:ab92379314ef24e3eb6c6178bc2f923cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad8d50c45bde1e43e03f3a78cf4bc3f48"><td class="memItemLeft" align="right" valign="top"><a id="ad8d50c45bde1e43e03f3a78cf4bc3f48"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#ad8d50c45bde1e43e03f3a78cf4bc3f48">EIC_DPRESCALER_PRESCALER1_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:ad8d50c45bde1e43e03f3a78cf4bc3f48"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_DPRESCALER) Debouncer Prescaler <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_DPRESCALER_PRESCALER1_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) &lt;&lt; <a class="el" href="component_2eic_8h.html#ad8d50c45bde1e43e03f3a78cf4bc3f48">EIC_DPRESCALER_PRESCALER1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_DPRESCALER_PRESCALER1</b>(value)&#160;&#160;&#160;(EIC_DPRESCALER_PRESCALER1_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2eic_8h.html#ad8d50c45bde1e43e03f3a78cf4bc3f48">EIC_DPRESCALER_PRESCALER1_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a98a5ad3962cb3fc146f1f593a22cf096">EIC_DPRESCALER_STATES1_Pos</a>&#160;&#160;&#160;7</td></tr>
<tr class="memdesc:a98a5ad3962cb3fc146f1f593a22cf096"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_DPRESCALER) Debouncer number of states <br /></td></tr>
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<tr class="memitem:a5bb7d7feeaa59adafa37b409e40de48a"><td class="memItemLeft" align="right" valign="top"><a id="a5bb7d7feeaa59adafa37b409e40de48a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_DPRESCALER_STATES1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2eic_8h.html#a98a5ad3962cb3fc146f1f593a22cf096">EIC_DPRESCALER_STATES1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a0a3a405c2d276cfd603cef0419d2db7f">EIC_DPRESCALER_TICKON_Pos</a>&#160;&#160;&#160;16</td></tr>
<tr class="memdesc:a0a3a405c2d276cfd603cef0419d2db7f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_DPRESCALER) Pin Sampler frequency selection <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_DPRESCALER_TICKON</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2eic_8h.html#a0a3a405c2d276cfd603cef0419d2db7f">EIC_DPRESCALER_TICKON_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#ade672ef0a3e758ba23012b95bef4be1f">EIC_DPRESCALER_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x000100FF)</td></tr>
<tr class="memdesc:ade672ef0a3e758ba23012b95bef4be1f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_DPRESCALER) MASK Register <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a069013213156669a0c63b6bc8143ab7c">EIC_PINSTATE_OFFSET</a>&#160;&#160;&#160;0x38</td></tr>
<tr class="memdesc:a069013213156669a0c63b6bc8143ab7c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_PINSTATE offset) Pin State <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#ab57945864c780a58265e446cbe9a7acb">EIC_PINSTATE_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:ab57945864c780a58265e446cbe9a7acb"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_PINSTATE reset_value) Pin State <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a087ea6b5736c6045fd15a5764eb7a58d">EIC_PINSTATE_PINSTATE_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a087ea6b5736c6045fd15a5764eb7a58d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_PINSTATE) Pin State <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_PINSTATE_PINSTATE_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF) &lt;&lt; <a class="el" href="component_2eic_8h.html#a087ea6b5736c6045fd15a5764eb7a58d">EIC_PINSTATE_PINSTATE_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>EIC_PINSTATE_PINSTATE</b>(value)&#160;&#160;&#160;(EIC_PINSTATE_PINSTATE_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2eic_8h.html#a087ea6b5736c6045fd15a5764eb7a58d">EIC_PINSTATE_PINSTATE_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2eic_8h.html#a525e8d843a9592ef2002a75c763ad8c6">EIC_PINSTATE_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000FFFF)</td></tr>
<tr class="memdesc:a525e8d843a9592ef2002a75c763ad8c6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(EIC_PINSTATE) MASK Register <br /></td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Component description for EIC. </p>
<p>Copyright (c) 2019 Microchip Technology Inc.</p>
<p>\asf_license_start </p>
<p class="definition">Definition in file <a class="el" href="component_2eic_8h_source.html">eic.h</a>.</p>
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<a href="component_2eic_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_EIC_COMPONENT_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_EIC_COMPONENT_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160; </div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define EIC_U2254</span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define REV_EIC 0x300</span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160; </div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="comment">/* -------- EIC_CTRLA : (EIC Offset: 0x00) (R/W 8) Control A -------- */</span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00044"></a><span class="lineno"><a class="line" href="unionEIC__CTRLA__Type.html"> 44</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00046"></a><span class="lineno"><a class="line" href="unionEIC__CTRLA__Type.html#a31beb9a1e66a00d9e8ead9dba64777f9"> 46</a></span>&#160; uint8_t <a class="code" href="unionEIC__CTRLA__Type.html#a31beb9a1e66a00d9e8ead9dba64777f9">SWRST</a>:1; </div>
<div class="line"><a name="l00047"></a><span class="lineno"><a class="line" href="unionEIC__CTRLA__Type.html#a2d66754e7fd0a4e7d2526d22accb7b27"> 47</a></span>&#160; uint8_t <a class="code" href="unionEIC__CTRLA__Type.html#a2d66754e7fd0a4e7d2526d22accb7b27">ENABLE</a>:1; </div>
<div class="line"><a name="l00048"></a><span class="lineno"><a class="line" href="unionEIC__CTRLA__Type.html#af5a030154b9ae2d7064cd7048771a8be"> 48</a></span>&#160; uint8_t :2; </div>
<div class="line"><a name="l00049"></a><span class="lineno"><a class="line" href="unionEIC__CTRLA__Type.html#ab2af309753f3d3fc509d7ac6f5a052c4"> 49</a></span>&#160; uint8_t <a class="code" href="unionEIC__CTRLA__Type.html#ab2af309753f3d3fc509d7ac6f5a052c4">CKSEL</a>:1; </div>
<div class="line"><a name="l00050"></a><span class="lineno"><a class="line" href="unionEIC__CTRLA__Type.html#acf6665b4a9e8350774fb5b09922c3de0"> 50</a></span>&#160; uint8_t :3; </div>
<div class="line"><a name="l00051"></a><span class="lineno"><a class="line" href="unionEIC__CTRLA__Type.html#aea14a37f91cf8eb0a37e13cd4ed02b11"> 51</a></span>&#160; } bit; </div>
<div class="line"><a name="l00052"></a><span class="lineno"><a class="line" href="unionEIC__CTRLA__Type.html#a596619722e3e1170512c1467e896b9be"> 52</a></span>&#160; uint8_t <a class="code" href="unionEIC__CTRLA__Type.html#a596619722e3e1170512c1467e896b9be">reg</a>; </div>
<div class="line"><a name="l00053"></a><span class="lineno"> 53</span>&#160;} <a class="code" href="unionEIC__CTRLA__Type.html">EIC_CTRLA_Type</a>;</div>
<div class="line"><a name="l00054"></a><span class="lineno"> 54</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00055"></a><span class="lineno"> 55</span>&#160; </div>
<div class="line"><a name="l00056"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#ab246344bc085e0c0c1f41f2c498d7a4e"> 56</a></span>&#160;<span class="preprocessor">#define EIC_CTRLA_OFFSET 0x00 </span></div>
<div class="line"><a name="l00057"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a4fa956016182ca3fbb195313688e49b2"> 57</a></span>&#160;<span class="preprocessor">#define EIC_CTRLA_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00059"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a1a82937bd8157d38e7acd41ccdbb6c2c"> 59</a></span>&#160;<span class="preprocessor">#define EIC_CTRLA_SWRST_Pos 0 </span></div>
<div class="line"><a name="l00060"></a><span class="lineno"> 60</span>&#160;<span class="preprocessor">#define EIC_CTRLA_SWRST (_U_(0x1) &lt;&lt; EIC_CTRLA_SWRST_Pos)</span></div>
<div class="line"><a name="l00061"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#aeacc7e5f83ca757ca0130db5895e170a"> 61</a></span>&#160;<span class="preprocessor">#define EIC_CTRLA_ENABLE_Pos 1 </span></div>
<div class="line"><a name="l00062"></a><span class="lineno"> 62</span>&#160;<span class="preprocessor">#define EIC_CTRLA_ENABLE (_U_(0x1) &lt;&lt; EIC_CTRLA_ENABLE_Pos)</span></div>
<div class="line"><a name="l00063"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a9c2e0f5f9272f9ca106bee3658bd67e6"> 63</a></span>&#160;<span class="preprocessor">#define EIC_CTRLA_CKSEL_Pos 4 </span></div>
<div class="line"><a name="l00064"></a><span class="lineno"> 64</span>&#160;<span class="preprocessor">#define EIC_CTRLA_CKSEL (_U_(0x1) &lt;&lt; EIC_CTRLA_CKSEL_Pos)</span></div>
<div class="line"><a name="l00065"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a935b501f29ee3b3ae95674baccfcc161"> 65</a></span>&#160;<span class="preprocessor">#define EIC_CTRLA_MASK _U_(0x13) </span></div>
<div class="line"><a name="l00067"></a><span class="lineno"> 67</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- EIC_NMICTRL : (EIC Offset: 0x01) (R/W 8) Non-Maskable Interrupt Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00068"></a><span class="lineno"> 68</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00069"></a><span class="lineno"><a class="line" href="unionEIC__NMICTRL__Type.html"> 69</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00070"></a><span class="lineno"> 70</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00071"></a><span class="lineno"><a class="line" href="unionEIC__NMICTRL__Type.html#acf1ff36d19d1bf77eb5da09816f60a45"> 71</a></span>&#160; uint8_t <a class="code" href="unionEIC__NMICTRL__Type.html#acf1ff36d19d1bf77eb5da09816f60a45">NMISENSE</a>:3; </div>
<div class="line"><a name="l00072"></a><span class="lineno"><a class="line" href="unionEIC__NMICTRL__Type.html#ae8c7e49526fb6d130c2e551a8c6fc898"> 72</a></span>&#160; uint8_t <a class="code" href="unionEIC__NMICTRL__Type.html#ae8c7e49526fb6d130c2e551a8c6fc898">NMIFILTEN</a>:1; </div>
<div class="line"><a name="l00073"></a><span class="lineno"><a class="line" href="unionEIC__NMICTRL__Type.html#a495b651964123217420a71dfa17066b6"> 73</a></span>&#160; uint8_t <a class="code" href="unionEIC__NMICTRL__Type.html#a495b651964123217420a71dfa17066b6">NMIASYNCH</a>:1; </div>
<div class="line"><a name="l00074"></a><span class="lineno"><a class="line" href="unionEIC__NMICTRL__Type.html#a2ada9e7735501ad4ead22de9451f8181"> 74</a></span>&#160; uint8_t :3; </div>
<div class="line"><a name="l00075"></a><span class="lineno"><a class="line" href="unionEIC__NMICTRL__Type.html#a9ed196161e321e959f35f363b9f3d0c5"> 75</a></span>&#160; } bit; </div>
<div class="line"><a name="l00076"></a><span class="lineno"><a class="line" href="unionEIC__NMICTRL__Type.html#a0b91203d47755f15a84533ed9868116f"> 76</a></span>&#160; uint8_t <a class="code" href="unionEIC__NMICTRL__Type.html#a0b91203d47755f15a84533ed9868116f">reg</a>; </div>
<div class="line"><a name="l00077"></a><span class="lineno"> 77</span>&#160;} <a class="code" href="unionEIC__NMICTRL__Type.html">EIC_NMICTRL_Type</a>;</div>
<div class="line"><a name="l00078"></a><span class="lineno"> 78</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00079"></a><span class="lineno"> 79</span>&#160; </div>
<div class="line"><a name="l00080"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a955df6174347427aaaed840874fa273f"> 80</a></span>&#160;<span class="preprocessor">#define EIC_NMICTRL_OFFSET 0x01 </span></div>
<div class="line"><a name="l00081"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a45890ac5e43ba08bf235b5ba44aa434c"> 81</a></span>&#160;<span class="preprocessor">#define EIC_NMICTRL_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00083"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a48859c121f51b57ddf343ba53ff169a1"> 83</a></span>&#160;<span class="preprocessor">#define EIC_NMICTRL_NMISENSE_Pos 0 </span></div>
<div class="line"><a name="l00084"></a><span class="lineno"> 84</span>&#160;<span class="preprocessor">#define EIC_NMICTRL_NMISENSE_Msk (_U_(0x7) &lt;&lt; EIC_NMICTRL_NMISENSE_Pos)</span></div>
<div class="line"><a name="l00085"></a><span class="lineno"> 85</span>&#160;<span class="preprocessor">#define EIC_NMICTRL_NMISENSE(value) (EIC_NMICTRL_NMISENSE_Msk &amp; ((value) &lt;&lt; EIC_NMICTRL_NMISENSE_Pos))</span></div>
<div class="line"><a name="l00086"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a0c36b33d81bd5571bc49345e2e83b9ff"> 86</a></span>&#160;<span class="preprocessor">#define EIC_NMICTRL_NMISENSE_NONE_Val _U_(0x0) </span></div>
<div class="line"><a name="l00087"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a40a369ae631516099e85c14096312797"> 87</a></span>&#160;<span class="preprocessor">#define EIC_NMICTRL_NMISENSE_RISE_Val _U_(0x1) </span></div>
<div class="line"><a name="l00088"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#aa0a05bae1746f2942044c926350f1ebe"> 88</a></span>&#160;<span class="preprocessor">#define EIC_NMICTRL_NMISENSE_FALL_Val _U_(0x2) </span></div>
<div class="line"><a name="l00089"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a7c987cbee9b60bfd4e68ddd11982a512"> 89</a></span>&#160;<span class="preprocessor">#define EIC_NMICTRL_NMISENSE_BOTH_Val _U_(0x3) </span></div>
<div class="line"><a name="l00090"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a30c9d119b917f1bec88af90d0c7fa180"> 90</a></span>&#160;<span class="preprocessor">#define EIC_NMICTRL_NMISENSE_HIGH_Val _U_(0x4) </span></div>
<div class="line"><a name="l00091"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#aa3b9af8d6d835716ec282a17a72f7052"> 91</a></span>&#160;<span class="preprocessor">#define EIC_NMICTRL_NMISENSE_LOW_Val _U_(0x5) </span></div>
<div class="line"><a name="l00092"></a><span class="lineno"> 92</span>&#160;<span class="preprocessor">#define EIC_NMICTRL_NMISENSE_NONE (EIC_NMICTRL_NMISENSE_NONE_Val &lt;&lt; EIC_NMICTRL_NMISENSE_Pos)</span></div>
<div class="line"><a name="l00093"></a><span class="lineno"> 93</span>&#160;<span class="preprocessor">#define EIC_NMICTRL_NMISENSE_RISE (EIC_NMICTRL_NMISENSE_RISE_Val &lt;&lt; EIC_NMICTRL_NMISENSE_Pos)</span></div>
<div class="line"><a name="l00094"></a><span class="lineno"> 94</span>&#160;<span class="preprocessor">#define EIC_NMICTRL_NMISENSE_FALL (EIC_NMICTRL_NMISENSE_FALL_Val &lt;&lt; EIC_NMICTRL_NMISENSE_Pos)</span></div>
<div class="line"><a name="l00095"></a><span class="lineno"> 95</span>&#160;<span class="preprocessor">#define EIC_NMICTRL_NMISENSE_BOTH (EIC_NMICTRL_NMISENSE_BOTH_Val &lt;&lt; EIC_NMICTRL_NMISENSE_Pos)</span></div>
<div class="line"><a name="l00096"></a><span class="lineno"> 96</span>&#160;<span class="preprocessor">#define EIC_NMICTRL_NMISENSE_HIGH (EIC_NMICTRL_NMISENSE_HIGH_Val &lt;&lt; EIC_NMICTRL_NMISENSE_Pos)</span></div>
<div class="line"><a name="l00097"></a><span class="lineno"> 97</span>&#160;<span class="preprocessor">#define EIC_NMICTRL_NMISENSE_LOW (EIC_NMICTRL_NMISENSE_LOW_Val &lt;&lt; EIC_NMICTRL_NMISENSE_Pos)</span></div>
<div class="line"><a name="l00098"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a38d9267b17841862f6a70ce455f52da0"> 98</a></span>&#160;<span class="preprocessor">#define EIC_NMICTRL_NMIFILTEN_Pos 3 </span></div>
<div class="line"><a name="l00099"></a><span class="lineno"> 99</span>&#160;<span class="preprocessor">#define EIC_NMICTRL_NMIFILTEN (_U_(0x1) &lt;&lt; EIC_NMICTRL_NMIFILTEN_Pos)</span></div>
<div class="line"><a name="l00100"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#ac9a80e6a5d8750e13950439aa992765e"> 100</a></span>&#160;<span class="preprocessor">#define EIC_NMICTRL_NMIASYNCH_Pos 4 </span></div>
<div class="line"><a name="l00101"></a><span class="lineno"> 101</span>&#160;<span class="preprocessor">#define EIC_NMICTRL_NMIASYNCH (_U_(0x1) &lt;&lt; EIC_NMICTRL_NMIASYNCH_Pos)</span></div>
<div class="line"><a name="l00102"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#af52070ecba91c5d7d6ece825763d5ac3"> 102</a></span>&#160;<span class="preprocessor">#define EIC_NMICTRL_MASK _U_(0x1F) </span></div>
<div class="line"><a name="l00104"></a><span class="lineno"> 104</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- EIC_NMIFLAG : (EIC Offset: 0x02) (R/W 16) Non-Maskable Interrupt Flag Status and Clear -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00105"></a><span class="lineno"> 105</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00106"></a><span class="lineno"><a class="line" href="unionEIC__NMIFLAG__Type.html"> 106</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00107"></a><span class="lineno"> 107</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00108"></a><span class="lineno"><a class="line" href="unionEIC__NMIFLAG__Type.html#ab5a19753495575fdd07220282f494e9a"> 108</a></span>&#160; uint16_t <a class="code" href="unionEIC__NMIFLAG__Type.html#ab5a19753495575fdd07220282f494e9a">NMI</a>:1; </div>
<div class="line"><a name="l00109"></a><span class="lineno"><a class="line" href="unionEIC__NMIFLAG__Type.html#aa97ccefed59a139ff0c5d930e63ea977"> 109</a></span>&#160; uint16_t :15; </div>
<div class="line"><a name="l00110"></a><span class="lineno"><a class="line" href="unionEIC__NMIFLAG__Type.html#aef1519a42d55c72e48d53a159f3ae160"> 110</a></span>&#160; } bit; </div>
<div class="line"><a name="l00111"></a><span class="lineno"><a class="line" href="unionEIC__NMIFLAG__Type.html#ac4dcec9d36b017e16ae8d46a5b990f80"> 111</a></span>&#160; uint16_t <a class="code" href="unionEIC__NMIFLAG__Type.html#ac4dcec9d36b017e16ae8d46a5b990f80">reg</a>; </div>
<div class="line"><a name="l00112"></a><span class="lineno"> 112</span>&#160;} <a class="code" href="unionEIC__NMIFLAG__Type.html">EIC_NMIFLAG_Type</a>;</div>
<div class="line"><a name="l00113"></a><span class="lineno"> 113</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00114"></a><span class="lineno"> 114</span>&#160; </div>
<div class="line"><a name="l00115"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#aaf1e851a2bf7b57210d255b797305b5a"> 115</a></span>&#160;<span class="preprocessor">#define EIC_NMIFLAG_OFFSET 0x02 </span></div>
<div class="line"><a name="l00116"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#abdc3ee824c8c2631f56077b9eb4af6c0"> 116</a></span>&#160;<span class="preprocessor">#define EIC_NMIFLAG_RESETVALUE _U_(0x0000) </span></div>
<div class="line"><a name="l00118"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#ae75faeffe2957a80cbdacf5c0239e2af"> 118</a></span>&#160;<span class="preprocessor">#define EIC_NMIFLAG_NMI_Pos 0 </span></div>
<div class="line"><a name="l00119"></a><span class="lineno"> 119</span>&#160;<span class="preprocessor">#define EIC_NMIFLAG_NMI (_U_(0x1) &lt;&lt; EIC_NMIFLAG_NMI_Pos)</span></div>
<div class="line"><a name="l00120"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a540d29cea93e30799215ac9a446bb8f9"> 120</a></span>&#160;<span class="preprocessor">#define EIC_NMIFLAG_MASK _U_(0x0001) </span></div>
<div class="line"><a name="l00122"></a><span class="lineno"> 122</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- EIC_SYNCBUSY : (EIC Offset: 0x04) (R/ 32) Synchronization Busy -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00123"></a><span class="lineno"> 123</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00124"></a><span class="lineno"><a class="line" href="unionEIC__SYNCBUSY__Type.html"> 124</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00125"></a><span class="lineno"> 125</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00126"></a><span class="lineno"><a class="line" href="unionEIC__SYNCBUSY__Type.html#a46996bbf17b6da1022603efc457a594b"> 126</a></span>&#160; uint32_t <a class="code" href="unionEIC__SYNCBUSY__Type.html#a46996bbf17b6da1022603efc457a594b">SWRST</a>:1; </div>
<div class="line"><a name="l00127"></a><span class="lineno"><a class="line" href="unionEIC__SYNCBUSY__Type.html#a4994ee58fd972b7f6c9831648d1e7501"> 127</a></span>&#160; uint32_t <a class="code" href="unionEIC__SYNCBUSY__Type.html#a4994ee58fd972b7f6c9831648d1e7501">ENABLE</a>:1; </div>
<div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="unionEIC__SYNCBUSY__Type.html#a09d8d869a0a64a90e399695494d67f6c"> 128</a></span>&#160; uint32_t :30; </div>
<div class="line"><a name="l00129"></a><span class="lineno"><a class="line" href="unionEIC__SYNCBUSY__Type.html#ae5f32a342ed66ea32f1092ff95f90ce3"> 129</a></span>&#160; } bit; </div>
<div class="line"><a name="l00130"></a><span class="lineno"><a class="line" href="unionEIC__SYNCBUSY__Type.html#a6ab5a7528d3685d28e27190c989c00ee"> 130</a></span>&#160; uint32_t <a class="code" href="unionEIC__SYNCBUSY__Type.html#a6ab5a7528d3685d28e27190c989c00ee">reg</a>; </div>
<div class="line"><a name="l00131"></a><span class="lineno"> 131</span>&#160;} <a class="code" href="unionEIC__SYNCBUSY__Type.html">EIC_SYNCBUSY_Type</a>;</div>
<div class="line"><a name="l00132"></a><span class="lineno"> 132</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00133"></a><span class="lineno"> 133</span>&#160; </div>
<div class="line"><a name="l00134"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a6afc82df170c16a0de7830c246f58283"> 134</a></span>&#160;<span class="preprocessor">#define EIC_SYNCBUSY_OFFSET 0x04 </span></div>
<div class="line"><a name="l00135"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#ae3efd05adc4143a8591f22ae441c5cc4"> 135</a></span>&#160;<span class="preprocessor">#define EIC_SYNCBUSY_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00137"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#aac50cf18f144db471cdcd45ba2c5604d"> 137</a></span>&#160;<span class="preprocessor">#define EIC_SYNCBUSY_SWRST_Pos 0 </span></div>
<div class="line"><a name="l00138"></a><span class="lineno"> 138</span>&#160;<span class="preprocessor">#define EIC_SYNCBUSY_SWRST (_U_(0x1) &lt;&lt; EIC_SYNCBUSY_SWRST_Pos)</span></div>
<div class="line"><a name="l00139"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a81e1ca9fe8b4a63049445f836a13f0c7"> 139</a></span>&#160;<span class="preprocessor">#define EIC_SYNCBUSY_ENABLE_Pos 1 </span></div>
<div class="line"><a name="l00140"></a><span class="lineno"> 140</span>&#160;<span class="preprocessor">#define EIC_SYNCBUSY_ENABLE (_U_(0x1) &lt;&lt; EIC_SYNCBUSY_ENABLE_Pos)</span></div>
<div class="line"><a name="l00141"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a568a8dccaced2d98cf62355f017f193d"> 141</a></span>&#160;<span class="preprocessor">#define EIC_SYNCBUSY_MASK _U_(0x00000003) </span></div>
<div class="line"><a name="l00143"></a><span class="lineno"> 143</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- EIC_EVCTRL : (EIC Offset: 0x08) (R/W 32) Event Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00144"></a><span class="lineno"> 144</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00145"></a><span class="lineno"><a class="line" href="unionEIC__EVCTRL__Type.html"> 145</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00146"></a><span class="lineno"> 146</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00147"></a><span class="lineno"><a class="line" href="unionEIC__EVCTRL__Type.html#ab15db25f954b71827332745025d44638"> 147</a></span>&#160; uint32_t <a class="code" href="unionEIC__EVCTRL__Type.html#ab15db25f954b71827332745025d44638">EXTINTEO</a>:16; </div>
<div class="line"><a name="l00148"></a><span class="lineno"><a class="line" href="unionEIC__EVCTRL__Type.html#a577015cb4888f5ce292d59378aed1fd2"> 148</a></span>&#160; uint32_t :16; </div>
<div class="line"><a name="l00149"></a><span class="lineno"><a class="line" href="unionEIC__EVCTRL__Type.html#aaa4c0f4fdbacddd05c6747b7f7e1d30e"> 149</a></span>&#160; } bit; </div>
<div class="line"><a name="l00150"></a><span class="lineno"><a class="line" href="unionEIC__EVCTRL__Type.html#acfc4e3cf2609368b640cc3463f4d2270"> 150</a></span>&#160; uint32_t <a class="code" href="unionEIC__EVCTRL__Type.html#acfc4e3cf2609368b640cc3463f4d2270">reg</a>; </div>
<div class="line"><a name="l00151"></a><span class="lineno"> 151</span>&#160;} <a class="code" href="unionEIC__EVCTRL__Type.html">EIC_EVCTRL_Type</a>;</div>
<div class="line"><a name="l00152"></a><span class="lineno"> 152</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00153"></a><span class="lineno"> 153</span>&#160; </div>
<div class="line"><a name="l00154"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a1e9f53fbff309ef9b2ecfa6276b72f15"> 154</a></span>&#160;<span class="preprocessor">#define EIC_EVCTRL_OFFSET 0x08 </span></div>
<div class="line"><a name="l00155"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#aa55f28b19d883994bcd6ade4425eea0a"> 155</a></span>&#160;<span class="preprocessor">#define EIC_EVCTRL_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00157"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#aed4eb850843b4dea239dd997ae81008a"> 157</a></span>&#160;<span class="preprocessor">#define EIC_EVCTRL_EXTINTEO_Pos 0 </span></div>
<div class="line"><a name="l00158"></a><span class="lineno"> 158</span>&#160;<span class="preprocessor">#define EIC_EVCTRL_EXTINTEO_Msk (_U_(0xFFFF) &lt;&lt; EIC_EVCTRL_EXTINTEO_Pos)</span></div>
<div class="line"><a name="l00159"></a><span class="lineno"> 159</span>&#160;<span class="preprocessor">#define EIC_EVCTRL_EXTINTEO(value) (EIC_EVCTRL_EXTINTEO_Msk &amp; ((value) &lt;&lt; EIC_EVCTRL_EXTINTEO_Pos))</span></div>
<div class="line"><a name="l00160"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a613f01075fe9c2dd9dcc34c5dacfd6ed"> 160</a></span>&#160;<span class="preprocessor">#define EIC_EVCTRL_MASK _U_(0x0000FFFF) </span></div>
<div class="line"><a name="l00162"></a><span class="lineno"> 162</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- EIC_INTENCLR : (EIC Offset: 0x0C) (R/W 32) Interrupt Enable Clear -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00163"></a><span class="lineno"> 163</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00164"></a><span class="lineno"><a class="line" href="unionEIC__INTENCLR__Type.html"> 164</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00165"></a><span class="lineno"> 165</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00166"></a><span class="lineno"><a class="line" href="unionEIC__INTENCLR__Type.html#af6f08742ecc24c00428372ddf44f7271"> 166</a></span>&#160; uint32_t <a class="code" href="unionEIC__INTENCLR__Type.html#af6f08742ecc24c00428372ddf44f7271">EXTINT</a>:16; </div>
<div class="line"><a name="l00167"></a><span class="lineno"><a class="line" href="unionEIC__INTENCLR__Type.html#a5f6c5e13db90bf279670b89aaa6b9957"> 167</a></span>&#160; uint32_t :16; </div>
<div class="line"><a name="l00168"></a><span class="lineno"><a class="line" href="unionEIC__INTENCLR__Type.html#a96df25364b461cc1d08d4afdbf3475d0"> 168</a></span>&#160; } bit; </div>
<div class="line"><a name="l00169"></a><span class="lineno"><a class="line" href="unionEIC__INTENCLR__Type.html#a0e58903a7b1be711212a0cef600e271b"> 169</a></span>&#160; uint32_t <a class="code" href="unionEIC__INTENCLR__Type.html#a0e58903a7b1be711212a0cef600e271b">reg</a>; </div>
<div class="line"><a name="l00170"></a><span class="lineno"> 170</span>&#160;} <a class="code" href="unionEIC__INTENCLR__Type.html">EIC_INTENCLR_Type</a>;</div>
<div class="line"><a name="l00171"></a><span class="lineno"> 171</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00172"></a><span class="lineno"> 172</span>&#160; </div>
<div class="line"><a name="l00173"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#af64517ce260f6884f881223efcd4fe66"> 173</a></span>&#160;<span class="preprocessor">#define EIC_INTENCLR_OFFSET 0x0C </span></div>
<div class="line"><a name="l00174"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#aa93fcdad643eb338a3f20268b85555f9"> 174</a></span>&#160;<span class="preprocessor">#define EIC_INTENCLR_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00176"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a741348eb720fbcd5a997515060a08f79"> 176</a></span>&#160;<span class="preprocessor">#define EIC_INTENCLR_EXTINT_Pos 0 </span></div>
<div class="line"><a name="l00177"></a><span class="lineno"> 177</span>&#160;<span class="preprocessor">#define EIC_INTENCLR_EXTINT_Msk (_U_(0xFFFF) &lt;&lt; EIC_INTENCLR_EXTINT_Pos)</span></div>
<div class="line"><a name="l00178"></a><span class="lineno"> 178</span>&#160;<span class="preprocessor">#define EIC_INTENCLR_EXTINT(value) (EIC_INTENCLR_EXTINT_Msk &amp; ((value) &lt;&lt; EIC_INTENCLR_EXTINT_Pos))</span></div>
<div class="line"><a name="l00179"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#ac121def07c8b3d84e3d58470fa7e0a2a"> 179</a></span>&#160;<span class="preprocessor">#define EIC_INTENCLR_MASK _U_(0x0000FFFF) </span></div>
<div class="line"><a name="l00181"></a><span class="lineno"> 181</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- EIC_INTENSET : (EIC Offset: 0x10) (R/W 32) Interrupt Enable Set -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00182"></a><span class="lineno"> 182</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00183"></a><span class="lineno"><a class="line" href="unionEIC__INTENSET__Type.html"> 183</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00184"></a><span class="lineno"> 184</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00185"></a><span class="lineno"><a class="line" href="unionEIC__INTENSET__Type.html#a9b687b84a8227b91fb74474cf65b23e0"> 185</a></span>&#160; uint32_t <a class="code" href="unionEIC__INTENSET__Type.html#a9b687b84a8227b91fb74474cf65b23e0">EXTINT</a>:16; </div>
<div class="line"><a name="l00186"></a><span class="lineno"><a class="line" href="unionEIC__INTENSET__Type.html#a55d8d9a80bbdcbe6104e3fab01c946cb"> 186</a></span>&#160; uint32_t :16; </div>
<div class="line"><a name="l00187"></a><span class="lineno"><a class="line" href="unionEIC__INTENSET__Type.html#a405c6870881abe14b54537ea9d724783"> 187</a></span>&#160; } bit; </div>
<div class="line"><a name="l00188"></a><span class="lineno"><a class="line" href="unionEIC__INTENSET__Type.html#ae37fc1b9ed6acee3eba5484176ecebbf"> 188</a></span>&#160; uint32_t <a class="code" href="unionEIC__INTENSET__Type.html#ae37fc1b9ed6acee3eba5484176ecebbf">reg</a>; </div>
<div class="line"><a name="l00189"></a><span class="lineno"> 189</span>&#160;} <a class="code" href="unionEIC__INTENSET__Type.html">EIC_INTENSET_Type</a>;</div>
<div class="line"><a name="l00190"></a><span class="lineno"> 190</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00191"></a><span class="lineno"> 191</span>&#160; </div>
<div class="line"><a name="l00192"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a7544cf9b337e414ddccd4d849d263bc9"> 192</a></span>&#160;<span class="preprocessor">#define EIC_INTENSET_OFFSET 0x10 </span></div>
<div class="line"><a name="l00193"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#ae72659b00ea4c8017352485df071fff8"> 193</a></span>&#160;<span class="preprocessor">#define EIC_INTENSET_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00195"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#afd6be1eb2fc6554616eb65915a12c245"> 195</a></span>&#160;<span class="preprocessor">#define EIC_INTENSET_EXTINT_Pos 0 </span></div>
<div class="line"><a name="l00196"></a><span class="lineno"> 196</span>&#160;<span class="preprocessor">#define EIC_INTENSET_EXTINT_Msk (_U_(0xFFFF) &lt;&lt; EIC_INTENSET_EXTINT_Pos)</span></div>
<div class="line"><a name="l00197"></a><span class="lineno"> 197</span>&#160;<span class="preprocessor">#define EIC_INTENSET_EXTINT(value) (EIC_INTENSET_EXTINT_Msk &amp; ((value) &lt;&lt; EIC_INTENSET_EXTINT_Pos))</span></div>
<div class="line"><a name="l00198"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a518b934f1f683eea112f810134e11386"> 198</a></span>&#160;<span class="preprocessor">#define EIC_INTENSET_MASK _U_(0x0000FFFF) </span></div>
<div class="line"><a name="l00200"></a><span class="lineno"> 200</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- EIC_INTFLAG : (EIC Offset: 0x14) (R/W 32) Interrupt Flag Status and Clear -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00201"></a><span class="lineno"> 201</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00202"></a><span class="lineno"><a class="line" href="unionEIC__INTFLAG__Type.html"> 202</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{ <span class="comment">// __I to avoid read-modify-write on write-to-clear register</span></div>
<div class="line"><a name="l00203"></a><span class="lineno"> 203</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00204"></a><span class="lineno"><a class="line" href="unionEIC__INTFLAG__Type.html#a99a8ead36567d2fb8b18b546314e9382"> 204</a></span>&#160; __I uint32_t <a class="code" href="unionEIC__INTFLAG__Type.html#a99a8ead36567d2fb8b18b546314e9382">EXTINT</a>:16; </div>
<div class="line"><a name="l00205"></a><span class="lineno"><a class="line" href="unionEIC__INTFLAG__Type.html#a11afcf0c2051e6c52baaeb573b9d116a"> 205</a></span>&#160; __I <a class="code" href="unionEIC__INTFLAG__Type.html#a11afcf0c2051e6c52baaeb573b9d116a">uint32_t</a> :16; </div>
<div class="line"><a name="l00206"></a><span class="lineno"><a class="line" href="unionEIC__INTFLAG__Type.html#a4560388f10ec768c7d8be6ec5d61e42c"> 206</a></span>&#160; } bit; </div>
<div class="line"><a name="l00207"></a><span class="lineno"><a class="line" href="unionEIC__INTFLAG__Type.html#a85a80a7da36142adafb6e34e29029960"> 207</a></span>&#160; uint32_t <a class="code" href="unionEIC__INTFLAG__Type.html#a85a80a7da36142adafb6e34e29029960">reg</a>; </div>
<div class="line"><a name="l00208"></a><span class="lineno"> 208</span>&#160;} <a class="code" href="unionEIC__INTFLAG__Type.html">EIC_INTFLAG_Type</a>;</div>
<div class="line"><a name="l00209"></a><span class="lineno"> 209</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00210"></a><span class="lineno"> 210</span>&#160; </div>
<div class="line"><a name="l00211"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a4e51877a81710951770d2bd40145d6b7"> 211</a></span>&#160;<span class="preprocessor">#define EIC_INTFLAG_OFFSET 0x14 </span></div>
<div class="line"><a name="l00212"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a4672c235b09428fde9c98d6d844c09d9"> 212</a></span>&#160;<span class="preprocessor">#define EIC_INTFLAG_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00214"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#adcbc791cf87b0cbd60e76f1958249501"> 214</a></span>&#160;<span class="preprocessor">#define EIC_INTFLAG_EXTINT_Pos 0 </span></div>
<div class="line"><a name="l00215"></a><span class="lineno"> 215</span>&#160;<span class="preprocessor">#define EIC_INTFLAG_EXTINT_Msk (_U_(0xFFFF) &lt;&lt; EIC_INTFLAG_EXTINT_Pos)</span></div>
<div class="line"><a name="l00216"></a><span class="lineno"> 216</span>&#160;<span class="preprocessor">#define EIC_INTFLAG_EXTINT(value) (EIC_INTFLAG_EXTINT_Msk &amp; ((value) &lt;&lt; EIC_INTFLAG_EXTINT_Pos))</span></div>
<div class="line"><a name="l00217"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a81b4c53bcfec0717a26cde921d364062"> 217</a></span>&#160;<span class="preprocessor">#define EIC_INTFLAG_MASK _U_(0x0000FFFF) </span></div>
<div class="line"><a name="l00219"></a><span class="lineno"> 219</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- EIC_ASYNCH : (EIC Offset: 0x18) (R/W 32) External Interrupt Asynchronous Mode -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00220"></a><span class="lineno"> 220</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00221"></a><span class="lineno"><a class="line" href="unionEIC__ASYNCH__Type.html"> 221</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00222"></a><span class="lineno"> 222</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00223"></a><span class="lineno"><a class="line" href="unionEIC__ASYNCH__Type.html#a7e2b0b689d3b75331e59fa2e05eb2946"> 223</a></span>&#160; uint32_t <a class="code" href="unionEIC__ASYNCH__Type.html#a7e2b0b689d3b75331e59fa2e05eb2946">ASYNCH</a>:16; </div>
<div class="line"><a name="l00224"></a><span class="lineno"><a class="line" href="unionEIC__ASYNCH__Type.html#aa7521e2b9d5e8077ef4bb926b68efcbe"> 224</a></span>&#160; uint32_t :16; </div>
<div class="line"><a name="l00225"></a><span class="lineno"><a class="line" href="unionEIC__ASYNCH__Type.html#a21f6536e8c013248b1ac2ca5d5f7c1ee"> 225</a></span>&#160; } bit; </div>
<div class="line"><a name="l00226"></a><span class="lineno"><a class="line" href="unionEIC__ASYNCH__Type.html#afe97ecc51ace3e8f212ee9e1e62c3303"> 226</a></span>&#160; uint32_t <a class="code" href="unionEIC__ASYNCH__Type.html#afe97ecc51ace3e8f212ee9e1e62c3303">reg</a>; </div>
<div class="line"><a name="l00227"></a><span class="lineno"> 227</span>&#160;} <a class="code" href="unionEIC__ASYNCH__Type.html">EIC_ASYNCH_Type</a>;</div>
<div class="line"><a name="l00228"></a><span class="lineno"> 228</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00229"></a><span class="lineno"> 229</span>&#160; </div>
<div class="line"><a name="l00230"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a685977df4671b3e2e96cfd96f49d9c4f"> 230</a></span>&#160;<span class="preprocessor">#define EIC_ASYNCH_OFFSET 0x18 </span></div>
<div class="line"><a name="l00231"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a9cff1f3057ba9b7fc6660128c1dff15d"> 231</a></span>&#160;<span class="preprocessor">#define EIC_ASYNCH_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00233"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a7f83768aa55abe8d2d64a4335d7129f0"> 233</a></span>&#160;<span class="preprocessor">#define EIC_ASYNCH_ASYNCH_Pos 0 </span></div>
<div class="line"><a name="l00234"></a><span class="lineno"> 234</span>&#160;<span class="preprocessor">#define EIC_ASYNCH_ASYNCH_Msk (_U_(0xFFFF) &lt;&lt; EIC_ASYNCH_ASYNCH_Pos)</span></div>
<div class="line"><a name="l00235"></a><span class="lineno"> 235</span>&#160;<span class="preprocessor">#define EIC_ASYNCH_ASYNCH(value) (EIC_ASYNCH_ASYNCH_Msk &amp; ((value) &lt;&lt; EIC_ASYNCH_ASYNCH_Pos))</span></div>
<div class="line"><a name="l00236"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#ac0b909c2fc1df3e197bcddc996d39d78"> 236</a></span>&#160;<span class="preprocessor">#define EIC_ASYNCH_MASK _U_(0x0000FFFF) </span></div>
<div class="line"><a name="l00238"></a><span class="lineno"> 238</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- EIC_CONFIG : (EIC Offset: 0x1C) (R/W 32) External Interrupt Sense Configuration -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00239"></a><span class="lineno"> 239</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00240"></a><span class="lineno"><a class="line" href="unionEIC__CONFIG__Type.html"> 240</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00241"></a><span class="lineno"> 241</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00242"></a><span class="lineno"><a class="line" href="unionEIC__CONFIG__Type.html#acbc67865205a6f51d836bd1c960df40c"> 242</a></span>&#160; uint32_t <a class="code" href="unionEIC__CONFIG__Type.html#acbc67865205a6f51d836bd1c960df40c">SENSE0</a>:3; </div>
<div class="line"><a name="l00243"></a><span class="lineno"><a class="line" href="unionEIC__CONFIG__Type.html#a2b015cff268d4e52be4e188543c5d770"> 243</a></span>&#160; uint32_t <a class="code" href="unionEIC__CONFIG__Type.html#a2b015cff268d4e52be4e188543c5d770">FILTEN0</a>:1; </div>
<div class="line"><a name="l00244"></a><span class="lineno"><a class="line" href="unionEIC__CONFIG__Type.html#a3cfd504b9379af7e18843f39479ece0d"> 244</a></span>&#160; uint32_t <a class="code" href="unionEIC__CONFIG__Type.html#a3cfd504b9379af7e18843f39479ece0d">SENSE1</a>:3; </div>
<div class="line"><a name="l00245"></a><span class="lineno"><a class="line" href="unionEIC__CONFIG__Type.html#afa6acfc8ed18f9ef3672752e5046af16"> 245</a></span>&#160; uint32_t <a class="code" href="unionEIC__CONFIG__Type.html#afa6acfc8ed18f9ef3672752e5046af16">FILTEN1</a>:1; </div>
<div class="line"><a name="l00246"></a><span class="lineno"><a class="line" href="unionEIC__CONFIG__Type.html#a334f31fc227f0b432ce2fd92d083713f"> 246</a></span>&#160; uint32_t <a class="code" href="unionEIC__CONFIG__Type.html#a334f31fc227f0b432ce2fd92d083713f">SENSE2</a>:3; </div>
<div class="line"><a name="l00247"></a><span class="lineno"><a class="line" href="unionEIC__CONFIG__Type.html#ad5d18c5a022deec20e80760fb13482ca"> 247</a></span>&#160; uint32_t <a class="code" href="unionEIC__CONFIG__Type.html#ad5d18c5a022deec20e80760fb13482ca">FILTEN2</a>:1; </div>
<div class="line"><a name="l00248"></a><span class="lineno"><a class="line" href="unionEIC__CONFIG__Type.html#a5fdad03cc428ee8f4d24dc1a632640f3"> 248</a></span>&#160; uint32_t <a class="code" href="unionEIC__CONFIG__Type.html#a5fdad03cc428ee8f4d24dc1a632640f3">SENSE3</a>:3; </div>
<div class="line"><a name="l00249"></a><span class="lineno"><a class="line" href="unionEIC__CONFIG__Type.html#a1347bd86400d8ef70b06dfdb0a6436c8"> 249</a></span>&#160; uint32_t <a class="code" href="unionEIC__CONFIG__Type.html#a1347bd86400d8ef70b06dfdb0a6436c8">FILTEN3</a>:1; </div>
<div class="line"><a name="l00250"></a><span class="lineno"><a class="line" href="unionEIC__CONFIG__Type.html#a6522e13a247849d29dd7e37e1ef2e373"> 250</a></span>&#160; uint32_t <a class="code" href="unionEIC__CONFIG__Type.html#a6522e13a247849d29dd7e37e1ef2e373">SENSE4</a>:3; </div>
<div class="line"><a name="l00251"></a><span class="lineno"><a class="line" href="unionEIC__CONFIG__Type.html#a159a1e94e7994980bd2b663bfc8e4030"> 251</a></span>&#160; uint32_t <a class="code" href="unionEIC__CONFIG__Type.html#a159a1e94e7994980bd2b663bfc8e4030">FILTEN4</a>:1; </div>
<div class="line"><a name="l00252"></a><span class="lineno"><a class="line" href="unionEIC__CONFIG__Type.html#aba87301de4a9a7fb10adeb5c09c22289"> 252</a></span>&#160; uint32_t <a class="code" href="unionEIC__CONFIG__Type.html#aba87301de4a9a7fb10adeb5c09c22289">SENSE5</a>:3; </div>
<div class="line"><a name="l00253"></a><span class="lineno"><a class="line" href="unionEIC__CONFIG__Type.html#a6d3559efac112cf59cc5695483753485"> 253</a></span>&#160; uint32_t <a class="code" href="unionEIC__CONFIG__Type.html#a6d3559efac112cf59cc5695483753485">FILTEN5</a>:1; </div>
<div class="line"><a name="l00254"></a><span class="lineno"><a class="line" href="unionEIC__CONFIG__Type.html#a812c1a8803b48e6e3172a28713af0b25"> 254</a></span>&#160; uint32_t <a class="code" href="unionEIC__CONFIG__Type.html#a812c1a8803b48e6e3172a28713af0b25">SENSE6</a>:3; </div>
<div class="line"><a name="l00255"></a><span class="lineno"><a class="line" href="unionEIC__CONFIG__Type.html#acd78ffeb414c4774665845290f19aef1"> 255</a></span>&#160; uint32_t <a class="code" href="unionEIC__CONFIG__Type.html#acd78ffeb414c4774665845290f19aef1">FILTEN6</a>:1; </div>
<div class="line"><a name="l00256"></a><span class="lineno"><a class="line" href="unionEIC__CONFIG__Type.html#af02690b8633eb21f70ea3c5359cbb920"> 256</a></span>&#160; uint32_t <a class="code" href="unionEIC__CONFIG__Type.html#af02690b8633eb21f70ea3c5359cbb920">SENSE7</a>:3; </div>
<div class="line"><a name="l00257"></a><span class="lineno"><a class="line" href="unionEIC__CONFIG__Type.html#a7612b772fb96ced4f69c842b1d0591ce"> 257</a></span>&#160; uint32_t <a class="code" href="unionEIC__CONFIG__Type.html#a7612b772fb96ced4f69c842b1d0591ce">FILTEN7</a>:1; </div>
<div class="line"><a name="l00258"></a><span class="lineno"><a class="line" href="unionEIC__CONFIG__Type.html#a9f8a90598af2904298a8f8d3da1fb9e1"> 258</a></span>&#160; } bit; </div>
<div class="line"><a name="l00259"></a><span class="lineno"><a class="line" href="unionEIC__CONFIG__Type.html#ae85f78df9f8cf8a42952b7111254c5a7"> 259</a></span>&#160; uint32_t <a class="code" href="unionEIC__CONFIG__Type.html#ae85f78df9f8cf8a42952b7111254c5a7">reg</a>; </div>
<div class="line"><a name="l00260"></a><span class="lineno"> 260</span>&#160;} <a class="code" href="unionEIC__CONFIG__Type.html">EIC_CONFIG_Type</a>;</div>
<div class="line"><a name="l00261"></a><span class="lineno"> 261</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00262"></a><span class="lineno"> 262</span>&#160; </div>
<div class="line"><a name="l00263"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a35ff22e6265c54180a3967466b95361a"> 263</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_OFFSET 0x1C </span></div>
<div class="line"><a name="l00264"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#afa5a8efe9b088c3ef448f32bf86d537d"> 264</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00266"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a9a191a13be42b2e0283c890d9302f461"> 266</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE0_Pos 0 </span></div>
<div class="line"><a name="l00267"></a><span class="lineno"> 267</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE0_Msk (_U_(0x7) &lt;&lt; EIC_CONFIG_SENSE0_Pos)</span></div>
<div class="line"><a name="l00268"></a><span class="lineno"> 268</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE0(value) (EIC_CONFIG_SENSE0_Msk &amp; ((value) &lt;&lt; EIC_CONFIG_SENSE0_Pos))</span></div>
<div class="line"><a name="l00269"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a986d4e3fc22b167f6eb21a178ff4c45e"> 269</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE0_NONE_Val _U_(0x0) </span></div>
<div class="line"><a name="l00270"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#adf381990c5471ceec041a27a028a51be"> 270</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE0_RISE_Val _U_(0x1) </span></div>
<div class="line"><a name="l00271"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a7fb62a57d10876d7cc1f6e22992c469d"> 271</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE0_FALL_Val _U_(0x2) </span></div>
<div class="line"><a name="l00272"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#ac0808674223b5a4fe5e7d1e24c1499a3"> 272</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE0_BOTH_Val _U_(0x3) </span></div>
<div class="line"><a name="l00273"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#add8658a97c85968dea3f8bdcceabca94"> 273</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE0_HIGH_Val _U_(0x4) </span></div>
<div class="line"><a name="l00274"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#ad578c3896d5b3cdc4631cba1a6f3f8e2"> 274</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE0_LOW_Val _U_(0x5) </span></div>
<div class="line"><a name="l00275"></a><span class="lineno"> 275</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE0_NONE (EIC_CONFIG_SENSE0_NONE_Val &lt;&lt; EIC_CONFIG_SENSE0_Pos)</span></div>
<div class="line"><a name="l00276"></a><span class="lineno"> 276</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE0_RISE (EIC_CONFIG_SENSE0_RISE_Val &lt;&lt; EIC_CONFIG_SENSE0_Pos)</span></div>
<div class="line"><a name="l00277"></a><span class="lineno"> 277</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE0_FALL (EIC_CONFIG_SENSE0_FALL_Val &lt;&lt; EIC_CONFIG_SENSE0_Pos)</span></div>
<div class="line"><a name="l00278"></a><span class="lineno"> 278</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE0_BOTH (EIC_CONFIG_SENSE0_BOTH_Val &lt;&lt; EIC_CONFIG_SENSE0_Pos)</span></div>
<div class="line"><a name="l00279"></a><span class="lineno"> 279</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE0_HIGH (EIC_CONFIG_SENSE0_HIGH_Val &lt;&lt; EIC_CONFIG_SENSE0_Pos)</span></div>
<div class="line"><a name="l00280"></a><span class="lineno"> 280</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE0_LOW (EIC_CONFIG_SENSE0_LOW_Val &lt;&lt; EIC_CONFIG_SENSE0_Pos)</span></div>
<div class="line"><a name="l00281"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#aa17527a9aab80477ff20ed73d2d7177a"> 281</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_FILTEN0_Pos 3 </span></div>
<div class="line"><a name="l00282"></a><span class="lineno"> 282</span>&#160;<span class="preprocessor">#define EIC_CONFIG_FILTEN0 (_U_(0x1) &lt;&lt; EIC_CONFIG_FILTEN0_Pos)</span></div>
<div class="line"><a name="l00283"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#ab34794f88d0b20fa2792afe7fecd7fc1"> 283</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE1_Pos 4 </span></div>
<div class="line"><a name="l00284"></a><span class="lineno"> 284</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE1_Msk (_U_(0x7) &lt;&lt; EIC_CONFIG_SENSE1_Pos)</span></div>
<div class="line"><a name="l00285"></a><span class="lineno"> 285</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE1(value) (EIC_CONFIG_SENSE1_Msk &amp; ((value) &lt;&lt; EIC_CONFIG_SENSE1_Pos))</span></div>
<div class="line"><a name="l00286"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a2dd12fe5d69cac11eb3b807a1ba2972a"> 286</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE1_NONE_Val _U_(0x0) </span></div>
<div class="line"><a name="l00287"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a390eb7bfde2edc0c8f7c2aecc55f2f11"> 287</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE1_RISE_Val _U_(0x1) </span></div>
<div class="line"><a name="l00288"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a0ca6a376817490cb3ef82906ffe21923"> 288</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE1_FALL_Val _U_(0x2) </span></div>
<div class="line"><a name="l00289"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#abb0c4499b66df5612c61697749c38f6f"> 289</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE1_BOTH_Val _U_(0x3) </span></div>
<div class="line"><a name="l00290"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#ad9d6fe0929c266f663d7fb7b05296098"> 290</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE1_HIGH_Val _U_(0x4) </span></div>
<div class="line"><a name="l00291"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#aece415d353240e8ee175072f6a5224cd"> 291</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE1_LOW_Val _U_(0x5) </span></div>
<div class="line"><a name="l00292"></a><span class="lineno"> 292</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE1_NONE (EIC_CONFIG_SENSE1_NONE_Val &lt;&lt; EIC_CONFIG_SENSE1_Pos)</span></div>
<div class="line"><a name="l00293"></a><span class="lineno"> 293</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE1_RISE (EIC_CONFIG_SENSE1_RISE_Val &lt;&lt; EIC_CONFIG_SENSE1_Pos)</span></div>
<div class="line"><a name="l00294"></a><span class="lineno"> 294</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE1_FALL (EIC_CONFIG_SENSE1_FALL_Val &lt;&lt; EIC_CONFIG_SENSE1_Pos)</span></div>
<div class="line"><a name="l00295"></a><span class="lineno"> 295</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE1_BOTH (EIC_CONFIG_SENSE1_BOTH_Val &lt;&lt; EIC_CONFIG_SENSE1_Pos)</span></div>
<div class="line"><a name="l00296"></a><span class="lineno"> 296</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE1_HIGH (EIC_CONFIG_SENSE1_HIGH_Val &lt;&lt; EIC_CONFIG_SENSE1_Pos)</span></div>
<div class="line"><a name="l00297"></a><span class="lineno"> 297</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE1_LOW (EIC_CONFIG_SENSE1_LOW_Val &lt;&lt; EIC_CONFIG_SENSE1_Pos)</span></div>
<div class="line"><a name="l00298"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a930f7f68f458eb61711fcad9b7b0e33d"> 298</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_FILTEN1_Pos 7 </span></div>
<div class="line"><a name="l00299"></a><span class="lineno"> 299</span>&#160;<span class="preprocessor">#define EIC_CONFIG_FILTEN1 (_U_(0x1) &lt;&lt; EIC_CONFIG_FILTEN1_Pos)</span></div>
<div class="line"><a name="l00300"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#af67e9a2938eae7c6f9f4d19c405e243f"> 300</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE2_Pos 8 </span></div>
<div class="line"><a name="l00301"></a><span class="lineno"> 301</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE2_Msk (_U_(0x7) &lt;&lt; EIC_CONFIG_SENSE2_Pos)</span></div>
<div class="line"><a name="l00302"></a><span class="lineno"> 302</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE2(value) (EIC_CONFIG_SENSE2_Msk &amp; ((value) &lt;&lt; EIC_CONFIG_SENSE2_Pos))</span></div>
<div class="line"><a name="l00303"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a89231a2e48fe64b47ec85f545280b7df"> 303</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE2_NONE_Val _U_(0x0) </span></div>
<div class="line"><a name="l00304"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a4c6f24459946c4c716e15f887cf91732"> 304</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE2_RISE_Val _U_(0x1) </span></div>
<div class="line"><a name="l00305"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a2f603343d04d42dfa3c238016be954b5"> 305</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE2_FALL_Val _U_(0x2) </span></div>
<div class="line"><a name="l00306"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a7809a27e221937b35d9e6b969a3771fb"> 306</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE2_BOTH_Val _U_(0x3) </span></div>
<div class="line"><a name="l00307"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a949642d01c96957d1e5f9279d3b48c2c"> 307</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE2_HIGH_Val _U_(0x4) </span></div>
<div class="line"><a name="l00308"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a475f78069ac4ecbb6c2115497fa686f0"> 308</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE2_LOW_Val _U_(0x5) </span></div>
<div class="line"><a name="l00309"></a><span class="lineno"> 309</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE2_NONE (EIC_CONFIG_SENSE2_NONE_Val &lt;&lt; EIC_CONFIG_SENSE2_Pos)</span></div>
<div class="line"><a name="l00310"></a><span class="lineno"> 310</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE2_RISE (EIC_CONFIG_SENSE2_RISE_Val &lt;&lt; EIC_CONFIG_SENSE2_Pos)</span></div>
<div class="line"><a name="l00311"></a><span class="lineno"> 311</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE2_FALL (EIC_CONFIG_SENSE2_FALL_Val &lt;&lt; EIC_CONFIG_SENSE2_Pos)</span></div>
<div class="line"><a name="l00312"></a><span class="lineno"> 312</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE2_BOTH (EIC_CONFIG_SENSE2_BOTH_Val &lt;&lt; EIC_CONFIG_SENSE2_Pos)</span></div>
<div class="line"><a name="l00313"></a><span class="lineno"> 313</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE2_HIGH (EIC_CONFIG_SENSE2_HIGH_Val &lt;&lt; EIC_CONFIG_SENSE2_Pos)</span></div>
<div class="line"><a name="l00314"></a><span class="lineno"> 314</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE2_LOW (EIC_CONFIG_SENSE2_LOW_Val &lt;&lt; EIC_CONFIG_SENSE2_Pos)</span></div>
<div class="line"><a name="l00315"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a54e72c526cf4c31edf453b7f50618043"> 315</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_FILTEN2_Pos 11 </span></div>
<div class="line"><a name="l00316"></a><span class="lineno"> 316</span>&#160;<span class="preprocessor">#define EIC_CONFIG_FILTEN2 (_U_(0x1) &lt;&lt; EIC_CONFIG_FILTEN2_Pos)</span></div>
<div class="line"><a name="l00317"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a831aeaf54a89c732e999bddee6ad0cbf"> 317</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE3_Pos 12 </span></div>
<div class="line"><a name="l00318"></a><span class="lineno"> 318</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE3_Msk (_U_(0x7) &lt;&lt; EIC_CONFIG_SENSE3_Pos)</span></div>
<div class="line"><a name="l00319"></a><span class="lineno"> 319</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE3(value) (EIC_CONFIG_SENSE3_Msk &amp; ((value) &lt;&lt; EIC_CONFIG_SENSE3_Pos))</span></div>
<div class="line"><a name="l00320"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#ae6cb4f8bb0afd3fd2c89dad8d552ec1f"> 320</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE3_NONE_Val _U_(0x0) </span></div>
<div class="line"><a name="l00321"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#ae1f57c9ebb1706bb46bc77ef24f56a81"> 321</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE3_RISE_Val _U_(0x1) </span></div>
<div class="line"><a name="l00322"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#af4c91968458631be4fa57f3c0c15404c"> 322</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE3_FALL_Val _U_(0x2) </span></div>
<div class="line"><a name="l00323"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#aa8713c71e12ac27aed9182636e488bc6"> 323</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE3_BOTH_Val _U_(0x3) </span></div>
<div class="line"><a name="l00324"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#ac73c1ef1256ac37c4a05f3f3437ca87d"> 324</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE3_HIGH_Val _U_(0x4) </span></div>
<div class="line"><a name="l00325"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#acd770ca16cc8b9bd76408b1ab7391ff5"> 325</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE3_LOW_Val _U_(0x5) </span></div>
<div class="line"><a name="l00326"></a><span class="lineno"> 326</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE3_NONE (EIC_CONFIG_SENSE3_NONE_Val &lt;&lt; EIC_CONFIG_SENSE3_Pos)</span></div>
<div class="line"><a name="l00327"></a><span class="lineno"> 327</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE3_RISE (EIC_CONFIG_SENSE3_RISE_Val &lt;&lt; EIC_CONFIG_SENSE3_Pos)</span></div>
<div class="line"><a name="l00328"></a><span class="lineno"> 328</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE3_FALL (EIC_CONFIG_SENSE3_FALL_Val &lt;&lt; EIC_CONFIG_SENSE3_Pos)</span></div>
<div class="line"><a name="l00329"></a><span class="lineno"> 329</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE3_BOTH (EIC_CONFIG_SENSE3_BOTH_Val &lt;&lt; EIC_CONFIG_SENSE3_Pos)</span></div>
<div class="line"><a name="l00330"></a><span class="lineno"> 330</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE3_HIGH (EIC_CONFIG_SENSE3_HIGH_Val &lt;&lt; EIC_CONFIG_SENSE3_Pos)</span></div>
<div class="line"><a name="l00331"></a><span class="lineno"> 331</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE3_LOW (EIC_CONFIG_SENSE3_LOW_Val &lt;&lt; EIC_CONFIG_SENSE3_Pos)</span></div>
<div class="line"><a name="l00332"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#af8ffa2628676573b96658108f610e95e"> 332</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_FILTEN3_Pos 15 </span></div>
<div class="line"><a name="l00333"></a><span class="lineno"> 333</span>&#160;<span class="preprocessor">#define EIC_CONFIG_FILTEN3 (_U_(0x1) &lt;&lt; EIC_CONFIG_FILTEN3_Pos)</span></div>
<div class="line"><a name="l00334"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#ad23c76b1fbf7d30fa3aa738a38c453c3"> 334</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE4_Pos 16 </span></div>
<div class="line"><a name="l00335"></a><span class="lineno"> 335</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE4_Msk (_U_(0x7) &lt;&lt; EIC_CONFIG_SENSE4_Pos)</span></div>
<div class="line"><a name="l00336"></a><span class="lineno"> 336</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE4(value) (EIC_CONFIG_SENSE4_Msk &amp; ((value) &lt;&lt; EIC_CONFIG_SENSE4_Pos))</span></div>
<div class="line"><a name="l00337"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a4317fae5e621e618c7e7bdf654a1b2b0"> 337</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE4_NONE_Val _U_(0x0) </span></div>
<div class="line"><a name="l00338"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#aad52f78c0fc34ba713282c4f2cb52965"> 338</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE4_RISE_Val _U_(0x1) </span></div>
<div class="line"><a name="l00339"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a4fe8ad8e7d22ba42d070d9108213d907"> 339</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE4_FALL_Val _U_(0x2) </span></div>
<div class="line"><a name="l00340"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a90038bdcd72cf77acd74f46032eb292c"> 340</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE4_BOTH_Val _U_(0x3) </span></div>
<div class="line"><a name="l00341"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#af61da74ee963e779f81a0fa2f81e9c75"> 341</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE4_HIGH_Val _U_(0x4) </span></div>
<div class="line"><a name="l00342"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a92370d05cd0d822893f57ecf0ff7a2a5"> 342</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE4_LOW_Val _U_(0x5) </span></div>
<div class="line"><a name="l00343"></a><span class="lineno"> 343</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE4_NONE (EIC_CONFIG_SENSE4_NONE_Val &lt;&lt; EIC_CONFIG_SENSE4_Pos)</span></div>
<div class="line"><a name="l00344"></a><span class="lineno"> 344</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE4_RISE (EIC_CONFIG_SENSE4_RISE_Val &lt;&lt; EIC_CONFIG_SENSE4_Pos)</span></div>
<div class="line"><a name="l00345"></a><span class="lineno"> 345</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE4_FALL (EIC_CONFIG_SENSE4_FALL_Val &lt;&lt; EIC_CONFIG_SENSE4_Pos)</span></div>
<div class="line"><a name="l00346"></a><span class="lineno"> 346</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE4_BOTH (EIC_CONFIG_SENSE4_BOTH_Val &lt;&lt; EIC_CONFIG_SENSE4_Pos)</span></div>
<div class="line"><a name="l00347"></a><span class="lineno"> 347</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE4_HIGH (EIC_CONFIG_SENSE4_HIGH_Val &lt;&lt; EIC_CONFIG_SENSE4_Pos)</span></div>
<div class="line"><a name="l00348"></a><span class="lineno"> 348</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE4_LOW (EIC_CONFIG_SENSE4_LOW_Val &lt;&lt; EIC_CONFIG_SENSE4_Pos)</span></div>
<div class="line"><a name="l00349"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a96cc4d08e7114ef41793a0323c1890fc"> 349</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_FILTEN4_Pos 19 </span></div>
<div class="line"><a name="l00350"></a><span class="lineno"> 350</span>&#160;<span class="preprocessor">#define EIC_CONFIG_FILTEN4 (_U_(0x1) &lt;&lt; EIC_CONFIG_FILTEN4_Pos)</span></div>
<div class="line"><a name="l00351"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#ace7caae074bf08e88805b591c626fb7f"> 351</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE5_Pos 20 </span></div>
<div class="line"><a name="l00352"></a><span class="lineno"> 352</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE5_Msk (_U_(0x7) &lt;&lt; EIC_CONFIG_SENSE5_Pos)</span></div>
<div class="line"><a name="l00353"></a><span class="lineno"> 353</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE5(value) (EIC_CONFIG_SENSE5_Msk &amp; ((value) &lt;&lt; EIC_CONFIG_SENSE5_Pos))</span></div>
<div class="line"><a name="l00354"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a1f73b11cdad345f444d6267c016e7d06"> 354</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE5_NONE_Val _U_(0x0) </span></div>
<div class="line"><a name="l00355"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#aa79135e0c433132db7b3df88472fda74"> 355</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE5_RISE_Val _U_(0x1) </span></div>
<div class="line"><a name="l00356"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a2f575e054321eef78315a123006b62dc"> 356</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE5_FALL_Val _U_(0x2) </span></div>
<div class="line"><a name="l00357"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a020047d3418afa7b60b72bfc4872bfb0"> 357</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE5_BOTH_Val _U_(0x3) </span></div>
<div class="line"><a name="l00358"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#afc521f838a152ea846c8ba29d2d7e578"> 358</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE5_HIGH_Val _U_(0x4) </span></div>
<div class="line"><a name="l00359"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a4a2958b65315240e85c9bf06c9c92305"> 359</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE5_LOW_Val _U_(0x5) </span></div>
<div class="line"><a name="l00360"></a><span class="lineno"> 360</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE5_NONE (EIC_CONFIG_SENSE5_NONE_Val &lt;&lt; EIC_CONFIG_SENSE5_Pos)</span></div>
<div class="line"><a name="l00361"></a><span class="lineno"> 361</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE5_RISE (EIC_CONFIG_SENSE5_RISE_Val &lt;&lt; EIC_CONFIG_SENSE5_Pos)</span></div>
<div class="line"><a name="l00362"></a><span class="lineno"> 362</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE5_FALL (EIC_CONFIG_SENSE5_FALL_Val &lt;&lt; EIC_CONFIG_SENSE5_Pos)</span></div>
<div class="line"><a name="l00363"></a><span class="lineno"> 363</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE5_BOTH (EIC_CONFIG_SENSE5_BOTH_Val &lt;&lt; EIC_CONFIG_SENSE5_Pos)</span></div>
<div class="line"><a name="l00364"></a><span class="lineno"> 364</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE5_HIGH (EIC_CONFIG_SENSE5_HIGH_Val &lt;&lt; EIC_CONFIG_SENSE5_Pos)</span></div>
<div class="line"><a name="l00365"></a><span class="lineno"> 365</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE5_LOW (EIC_CONFIG_SENSE5_LOW_Val &lt;&lt; EIC_CONFIG_SENSE5_Pos)</span></div>
<div class="line"><a name="l00366"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#ab3c6837a90614cf79a4d0feece41fdd6"> 366</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_FILTEN5_Pos 23 </span></div>
<div class="line"><a name="l00367"></a><span class="lineno"> 367</span>&#160;<span class="preprocessor">#define EIC_CONFIG_FILTEN5 (_U_(0x1) &lt;&lt; EIC_CONFIG_FILTEN5_Pos)</span></div>
<div class="line"><a name="l00368"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a17d194da98be0777ff750650293d386d"> 368</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE6_Pos 24 </span></div>
<div class="line"><a name="l00369"></a><span class="lineno"> 369</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE6_Msk (_U_(0x7) &lt;&lt; EIC_CONFIG_SENSE6_Pos)</span></div>
<div class="line"><a name="l00370"></a><span class="lineno"> 370</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE6(value) (EIC_CONFIG_SENSE6_Msk &amp; ((value) &lt;&lt; EIC_CONFIG_SENSE6_Pos))</span></div>
<div class="line"><a name="l00371"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a9c966fa77b4176c92e747e52084cfbd8"> 371</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE6_NONE_Val _U_(0x0) </span></div>
<div class="line"><a name="l00372"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a6a5001e8379757251033150764c6dcba"> 372</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE6_RISE_Val _U_(0x1) </span></div>
<div class="line"><a name="l00373"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#aa3b18a5b6647f583a1b276ad9b5aa4d6"> 373</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE6_FALL_Val _U_(0x2) </span></div>
<div class="line"><a name="l00374"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a30183c55bdd242f2e73f8e9510c3208a"> 374</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE6_BOTH_Val _U_(0x3) </span></div>
<div class="line"><a name="l00375"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a308809e49e6d8ddd024e96f22f1cf72c"> 375</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE6_HIGH_Val _U_(0x4) </span></div>
<div class="line"><a name="l00376"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a3df3d29ae144b0c1d5b95a4f898fb78d"> 376</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE6_LOW_Val _U_(0x5) </span></div>
<div class="line"><a name="l00377"></a><span class="lineno"> 377</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE6_NONE (EIC_CONFIG_SENSE6_NONE_Val &lt;&lt; EIC_CONFIG_SENSE6_Pos)</span></div>
<div class="line"><a name="l00378"></a><span class="lineno"> 378</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE6_RISE (EIC_CONFIG_SENSE6_RISE_Val &lt;&lt; EIC_CONFIG_SENSE6_Pos)</span></div>
<div class="line"><a name="l00379"></a><span class="lineno"> 379</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE6_FALL (EIC_CONFIG_SENSE6_FALL_Val &lt;&lt; EIC_CONFIG_SENSE6_Pos)</span></div>
<div class="line"><a name="l00380"></a><span class="lineno"> 380</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE6_BOTH (EIC_CONFIG_SENSE6_BOTH_Val &lt;&lt; EIC_CONFIG_SENSE6_Pos)</span></div>
<div class="line"><a name="l00381"></a><span class="lineno"> 381</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE6_HIGH (EIC_CONFIG_SENSE6_HIGH_Val &lt;&lt; EIC_CONFIG_SENSE6_Pos)</span></div>
<div class="line"><a name="l00382"></a><span class="lineno"> 382</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE6_LOW (EIC_CONFIG_SENSE6_LOW_Val &lt;&lt; EIC_CONFIG_SENSE6_Pos)</span></div>
<div class="line"><a name="l00383"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a1138acbe8b4dedc40a413a58ec7b2c57"> 383</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_FILTEN6_Pos 27 </span></div>
<div class="line"><a name="l00384"></a><span class="lineno"> 384</span>&#160;<span class="preprocessor">#define EIC_CONFIG_FILTEN6 (_U_(0x1) &lt;&lt; EIC_CONFIG_FILTEN6_Pos)</span></div>
<div class="line"><a name="l00385"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a19583c715708b15f578f5cc2a8f394fc"> 385</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE7_Pos 28 </span></div>
<div class="line"><a name="l00386"></a><span class="lineno"> 386</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE7_Msk (_U_(0x7) &lt;&lt; EIC_CONFIG_SENSE7_Pos)</span></div>
<div class="line"><a name="l00387"></a><span class="lineno"> 387</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE7(value) (EIC_CONFIG_SENSE7_Msk &amp; ((value) &lt;&lt; EIC_CONFIG_SENSE7_Pos))</span></div>
<div class="line"><a name="l00388"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#ad238f5412dacf421dc698fbb1e6be2f2"> 388</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE7_NONE_Val _U_(0x0) </span></div>
<div class="line"><a name="l00389"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a84e2898643261f390c3f329d59357cb6"> 389</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE7_RISE_Val _U_(0x1) </span></div>
<div class="line"><a name="l00390"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a456906de38943b836b26294cd9735251"> 390</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE7_FALL_Val _U_(0x2) </span></div>
<div class="line"><a name="l00391"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a461a0f4bd20a83b7c935ba3fb4e640ac"> 391</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE7_BOTH_Val _U_(0x3) </span></div>
<div class="line"><a name="l00392"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a90352dd0ca9acbd823c87862d2046489"> 392</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE7_HIGH_Val _U_(0x4) </span></div>
<div class="line"><a name="l00393"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a090c5aaf967e49c1634a02bae7799fa6"> 393</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE7_LOW_Val _U_(0x5) </span></div>
<div class="line"><a name="l00394"></a><span class="lineno"> 394</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE7_NONE (EIC_CONFIG_SENSE7_NONE_Val &lt;&lt; EIC_CONFIG_SENSE7_Pos)</span></div>
<div class="line"><a name="l00395"></a><span class="lineno"> 395</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE7_RISE (EIC_CONFIG_SENSE7_RISE_Val &lt;&lt; EIC_CONFIG_SENSE7_Pos)</span></div>
<div class="line"><a name="l00396"></a><span class="lineno"> 396</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE7_FALL (EIC_CONFIG_SENSE7_FALL_Val &lt;&lt; EIC_CONFIG_SENSE7_Pos)</span></div>
<div class="line"><a name="l00397"></a><span class="lineno"> 397</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE7_BOTH (EIC_CONFIG_SENSE7_BOTH_Val &lt;&lt; EIC_CONFIG_SENSE7_Pos)</span></div>
<div class="line"><a name="l00398"></a><span class="lineno"> 398</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE7_HIGH (EIC_CONFIG_SENSE7_HIGH_Val &lt;&lt; EIC_CONFIG_SENSE7_Pos)</span></div>
<div class="line"><a name="l00399"></a><span class="lineno"> 399</span>&#160;<span class="preprocessor">#define EIC_CONFIG_SENSE7_LOW (EIC_CONFIG_SENSE7_LOW_Val &lt;&lt; EIC_CONFIG_SENSE7_Pos)</span></div>
<div class="line"><a name="l00400"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a77bd3664d9f1c1d6b212eac416d40341"> 400</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_FILTEN7_Pos 31 </span></div>
<div class="line"><a name="l00401"></a><span class="lineno"> 401</span>&#160;<span class="preprocessor">#define EIC_CONFIG_FILTEN7 (_U_(0x1) &lt;&lt; EIC_CONFIG_FILTEN7_Pos)</span></div>
<div class="line"><a name="l00402"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a713278aaffe59a230cb4f7642ee4900e"> 402</a></span>&#160;<span class="preprocessor">#define EIC_CONFIG_MASK _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00404"></a><span class="lineno"> 404</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- EIC_DEBOUNCEN : (EIC Offset: 0x30) (R/W 32) Debouncer Enable -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00405"></a><span class="lineno"> 405</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00406"></a><span class="lineno"><a class="line" href="unionEIC__DEBOUNCEN__Type.html"> 406</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00407"></a><span class="lineno"> 407</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00408"></a><span class="lineno"><a class="line" href="unionEIC__DEBOUNCEN__Type.html#a9b3cc6e51ae8fba9b6ddb5014e88d7ad"> 408</a></span>&#160; uint32_t <a class="code" href="unionEIC__DEBOUNCEN__Type.html#a9b3cc6e51ae8fba9b6ddb5014e88d7ad">DEBOUNCEN</a>:16; </div>
<div class="line"><a name="l00409"></a><span class="lineno"><a class="line" href="unionEIC__DEBOUNCEN__Type.html#a3237899ec845f76983ad277555a34a05"> 409</a></span>&#160; uint32_t :16; </div>
<div class="line"><a name="l00410"></a><span class="lineno"><a class="line" href="unionEIC__DEBOUNCEN__Type.html#a49fb5ddd73145e7b63cae64d6a004801"> 410</a></span>&#160; } bit; </div>
<div class="line"><a name="l00411"></a><span class="lineno"><a class="line" href="unionEIC__DEBOUNCEN__Type.html#a59d05ff8c085456522025c0da5db1582"> 411</a></span>&#160; uint32_t <a class="code" href="unionEIC__DEBOUNCEN__Type.html#a59d05ff8c085456522025c0da5db1582">reg</a>; </div>
<div class="line"><a name="l00412"></a><span class="lineno"> 412</span>&#160;} <a class="code" href="unionEIC__DEBOUNCEN__Type.html">EIC_DEBOUNCEN_Type</a>;</div>
<div class="line"><a name="l00413"></a><span class="lineno"> 413</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00414"></a><span class="lineno"> 414</span>&#160; </div>
<div class="line"><a name="l00415"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a0534b51e4c32b62d69c3d9d785f072e2"> 415</a></span>&#160;<span class="preprocessor">#define EIC_DEBOUNCEN_OFFSET 0x30 </span></div>
<div class="line"><a name="l00416"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a528d7e520af4bbd921c4683ecc785046"> 416</a></span>&#160;<span class="preprocessor">#define EIC_DEBOUNCEN_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00418"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#abd8078c045daaa7bead796b6fea74427"> 418</a></span>&#160;<span class="preprocessor">#define EIC_DEBOUNCEN_DEBOUNCEN_Pos 0 </span></div>
<div class="line"><a name="l00419"></a><span class="lineno"> 419</span>&#160;<span class="preprocessor">#define EIC_DEBOUNCEN_DEBOUNCEN_Msk (_U_(0xFFFF) &lt;&lt; EIC_DEBOUNCEN_DEBOUNCEN_Pos)</span></div>
<div class="line"><a name="l00420"></a><span class="lineno"> 420</span>&#160;<span class="preprocessor">#define EIC_DEBOUNCEN_DEBOUNCEN(value) (EIC_DEBOUNCEN_DEBOUNCEN_Msk &amp; ((value) &lt;&lt; EIC_DEBOUNCEN_DEBOUNCEN_Pos))</span></div>
<div class="line"><a name="l00421"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#ac8f965edcafad4374b0e5f9ea2b1f1f9"> 421</a></span>&#160;<span class="preprocessor">#define EIC_DEBOUNCEN_MASK _U_(0x0000FFFF) </span></div>
<div class="line"><a name="l00423"></a><span class="lineno"> 423</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- EIC_DPRESCALER : (EIC Offset: 0x34) (R/W 32) Debouncer Prescaler -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00424"></a><span class="lineno"> 424</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00425"></a><span class="lineno"><a class="line" href="unionEIC__DPRESCALER__Type.html"> 425</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00426"></a><span class="lineno"> 426</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00427"></a><span class="lineno"><a class="line" href="unionEIC__DPRESCALER__Type.html#ac50105a95c7f335096362040fd65fade"> 427</a></span>&#160; uint32_t <a class="code" href="unionEIC__DPRESCALER__Type.html#ac50105a95c7f335096362040fd65fade">PRESCALER0</a>:3; </div>
<div class="line"><a name="l00428"></a><span class="lineno"><a class="line" href="unionEIC__DPRESCALER__Type.html#a763d6f279df7cd8b61bd7ff92bc155fe"> 428</a></span>&#160; uint32_t <a class="code" href="unionEIC__DPRESCALER__Type.html#a763d6f279df7cd8b61bd7ff92bc155fe">STATES0</a>:1; </div>
<div class="line"><a name="l00429"></a><span class="lineno"><a class="line" href="unionEIC__DPRESCALER__Type.html#a3c815de48bfde55ed1a4aefd1bb6c7d9"> 429</a></span>&#160; uint32_t <a class="code" href="unionEIC__DPRESCALER__Type.html#a3c815de48bfde55ed1a4aefd1bb6c7d9">PRESCALER1</a>:3; </div>
<div class="line"><a name="l00430"></a><span class="lineno"><a class="line" href="unionEIC__DPRESCALER__Type.html#afa46afcb645e5c0f08a6f162da823c28"> 430</a></span>&#160; uint32_t <a class="code" href="unionEIC__DPRESCALER__Type.html#afa46afcb645e5c0f08a6f162da823c28">STATES1</a>:1; </div>
<div class="line"><a name="l00431"></a><span class="lineno"><a class="line" href="unionEIC__DPRESCALER__Type.html#a396eafa2c628d3c5bf2d59f7ca4ef0fa"> 431</a></span>&#160; uint32_t :8; </div>
<div class="line"><a name="l00432"></a><span class="lineno"><a class="line" href="unionEIC__DPRESCALER__Type.html#aace282ac178c5ef3233601add55454d3"> 432</a></span>&#160; uint32_t <a class="code" href="unionEIC__DPRESCALER__Type.html#aace282ac178c5ef3233601add55454d3">TICKON</a>:1; </div>
<div class="line"><a name="l00433"></a><span class="lineno"><a class="line" href="unionEIC__DPRESCALER__Type.html#a18ae43b5a7f90b990426333100a48327"> 433</a></span>&#160; uint32_t :15; </div>
<div class="line"><a name="l00434"></a><span class="lineno"><a class="line" href="unionEIC__DPRESCALER__Type.html#a8c5a8eab8159bbe6f88dfd45e1444199"> 434</a></span>&#160; } bit; </div>
<div class="line"><a name="l00435"></a><span class="lineno"><a class="line" href="unionEIC__DPRESCALER__Type.html#a7f54fa0349dd2454f9c87362dbc54065"> 435</a></span>&#160; uint32_t <a class="code" href="unionEIC__DPRESCALER__Type.html#a7f54fa0349dd2454f9c87362dbc54065">reg</a>; </div>
<div class="line"><a name="l00436"></a><span class="lineno"> 436</span>&#160;} <a class="code" href="unionEIC__DPRESCALER__Type.html">EIC_DPRESCALER_Type</a>;</div>
<div class="line"><a name="l00437"></a><span class="lineno"> 437</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00438"></a><span class="lineno"> 438</span>&#160; </div>
<div class="line"><a name="l00439"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a93cab13d4fc39d87cc7c9693daf9ae7c"> 439</a></span>&#160;<span class="preprocessor">#define EIC_DPRESCALER_OFFSET 0x34 </span></div>
<div class="line"><a name="l00440"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a78d782557c6c8956894abed2f7773993"> 440</a></span>&#160;<span class="preprocessor">#define EIC_DPRESCALER_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00442"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a4e25d3c10d962c315c546f23222a5b2b"> 442</a></span>&#160;<span class="preprocessor">#define EIC_DPRESCALER_PRESCALER0_Pos 0 </span></div>
<div class="line"><a name="l00443"></a><span class="lineno"> 443</span>&#160;<span class="preprocessor">#define EIC_DPRESCALER_PRESCALER0_Msk (_U_(0x7) &lt;&lt; EIC_DPRESCALER_PRESCALER0_Pos)</span></div>
<div class="line"><a name="l00444"></a><span class="lineno"> 444</span>&#160;<span class="preprocessor">#define EIC_DPRESCALER_PRESCALER0(value) (EIC_DPRESCALER_PRESCALER0_Msk &amp; ((value) &lt;&lt; EIC_DPRESCALER_PRESCALER0_Pos))</span></div>
<div class="line"><a name="l00445"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#afdc67c1fd8679f56c7d36f9bd9b1eb54"> 445</a></span>&#160;<span class="preprocessor">#define EIC_DPRESCALER_STATES0_Pos 3 </span></div>
<div class="line"><a name="l00446"></a><span class="lineno"> 446</span>&#160;<span class="preprocessor">#define EIC_DPRESCALER_STATES0 (_U_(0x1) &lt;&lt; EIC_DPRESCALER_STATES0_Pos)</span></div>
<div class="line"><a name="l00447"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#ad8d50c45bde1e43e03f3a78cf4bc3f48"> 447</a></span>&#160;<span class="preprocessor">#define EIC_DPRESCALER_PRESCALER1_Pos 4 </span></div>
<div class="line"><a name="l00448"></a><span class="lineno"> 448</span>&#160;<span class="preprocessor">#define EIC_DPRESCALER_PRESCALER1_Msk (_U_(0x7) &lt;&lt; EIC_DPRESCALER_PRESCALER1_Pos)</span></div>
<div class="line"><a name="l00449"></a><span class="lineno"> 449</span>&#160;<span class="preprocessor">#define EIC_DPRESCALER_PRESCALER1(value) (EIC_DPRESCALER_PRESCALER1_Msk &amp; ((value) &lt;&lt; EIC_DPRESCALER_PRESCALER1_Pos))</span></div>
<div class="line"><a name="l00450"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a98a5ad3962cb3fc146f1f593a22cf096"> 450</a></span>&#160;<span class="preprocessor">#define EIC_DPRESCALER_STATES1_Pos 7 </span></div>
<div class="line"><a name="l00451"></a><span class="lineno"> 451</span>&#160;<span class="preprocessor">#define EIC_DPRESCALER_STATES1 (_U_(0x1) &lt;&lt; EIC_DPRESCALER_STATES1_Pos)</span></div>
<div class="line"><a name="l00452"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a0a3a405c2d276cfd603cef0419d2db7f"> 452</a></span>&#160;<span class="preprocessor">#define EIC_DPRESCALER_TICKON_Pos 16 </span></div>
<div class="line"><a name="l00453"></a><span class="lineno"> 453</span>&#160;<span class="preprocessor">#define EIC_DPRESCALER_TICKON (_U_(0x1) &lt;&lt; EIC_DPRESCALER_TICKON_Pos)</span></div>
<div class="line"><a name="l00454"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#ade672ef0a3e758ba23012b95bef4be1f"> 454</a></span>&#160;<span class="preprocessor">#define EIC_DPRESCALER_MASK _U_(0x000100FF) </span></div>
<div class="line"><a name="l00456"></a><span class="lineno"> 456</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- EIC_PINSTATE : (EIC Offset: 0x38) (R/ 32) Pin State -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00457"></a><span class="lineno"> 457</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00458"></a><span class="lineno"><a class="line" href="unionEIC__PINSTATE__Type.html"> 458</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00459"></a><span class="lineno"> 459</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00460"></a><span class="lineno"><a class="line" href="unionEIC__PINSTATE__Type.html#ac828d1145a4b56b4ef3296fc6b7891f5"> 460</a></span>&#160; uint32_t <a class="code" href="unionEIC__PINSTATE__Type.html#ac828d1145a4b56b4ef3296fc6b7891f5">PINSTATE</a>:16; </div>
<div class="line"><a name="l00461"></a><span class="lineno"><a class="line" href="unionEIC__PINSTATE__Type.html#aadca3e89ca05e9874881b7b3d98eaffc"> 461</a></span>&#160; uint32_t :16; </div>
<div class="line"><a name="l00462"></a><span class="lineno"><a class="line" href="unionEIC__PINSTATE__Type.html#ae60600d13f9c7387339bfb0b77138fcc"> 462</a></span>&#160; } bit; </div>
<div class="line"><a name="l00463"></a><span class="lineno"><a class="line" href="unionEIC__PINSTATE__Type.html#a197299ee0a47004ca7f7f7375e53ac00"> 463</a></span>&#160; uint32_t <a class="code" href="unionEIC__PINSTATE__Type.html#a197299ee0a47004ca7f7f7375e53ac00">reg</a>; </div>
<div class="line"><a name="l00464"></a><span class="lineno"> 464</span>&#160;} <a class="code" href="unionEIC__PINSTATE__Type.html">EIC_PINSTATE_Type</a>;</div>
<div class="line"><a name="l00465"></a><span class="lineno"> 465</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00466"></a><span class="lineno"> 466</span>&#160; </div>
<div class="line"><a name="l00467"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a069013213156669a0c63b6bc8143ab7c"> 467</a></span>&#160;<span class="preprocessor">#define EIC_PINSTATE_OFFSET 0x38 </span></div>
<div class="line"><a name="l00468"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#ab57945864c780a58265e446cbe9a7acb"> 468</a></span>&#160;<span class="preprocessor">#define EIC_PINSTATE_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00470"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a087ea6b5736c6045fd15a5764eb7a58d"> 470</a></span>&#160;<span class="preprocessor">#define EIC_PINSTATE_PINSTATE_Pos 0 </span></div>
<div class="line"><a name="l00471"></a><span class="lineno"> 471</span>&#160;<span class="preprocessor">#define EIC_PINSTATE_PINSTATE_Msk (_U_(0xFFFF) &lt;&lt; EIC_PINSTATE_PINSTATE_Pos)</span></div>
<div class="line"><a name="l00472"></a><span class="lineno"> 472</span>&#160;<span class="preprocessor">#define EIC_PINSTATE_PINSTATE(value) (EIC_PINSTATE_PINSTATE_Msk &amp; ((value) &lt;&lt; EIC_PINSTATE_PINSTATE_Pos))</span></div>
<div class="line"><a name="l00473"></a><span class="lineno"><a class="line" href="component_2eic_8h.html#a525e8d843a9592ef2002a75c763ad8c6"> 473</a></span>&#160;<span class="preprocessor">#define EIC_PINSTATE_MASK _U_(0x0000FFFF) </span></div>
<div class="line"><a name="l00476"></a><span class="lineno"> 476</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00477"></a><span class="lineno"><a class="line" href="structEic.html"> 477</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00478"></a><span class="lineno"><a class="line" href="structEic.html#a3d945ae1fb5d005dae206bdcec01db95"> 478</a></span>&#160; __IO <a class="code" href="unionEIC__CTRLA__Type.html">EIC_CTRLA_Type</a> <a class="code" href="structEic.html#a3d945ae1fb5d005dae206bdcec01db95">CTRLA</a>; </div>
<div class="line"><a name="l00479"></a><span class="lineno"><a class="line" href="structEic.html#abe387c3f6c50f72e37e91adf3d9eac06"> 479</a></span>&#160; __IO <a class="code" href="unionEIC__NMICTRL__Type.html">EIC_NMICTRL_Type</a> <a class="code" href="structEic.html#abe387c3f6c50f72e37e91adf3d9eac06">NMICTRL</a>; </div>
<div class="line"><a name="l00480"></a><span class="lineno"><a class="line" href="structEic.html#a5e489fa962a835e2d06a4dceb6e2b7b8"> 480</a></span>&#160; __IO <a class="code" href="unionEIC__NMIFLAG__Type.html">EIC_NMIFLAG_Type</a> <a class="code" href="structEic.html#a5e489fa962a835e2d06a4dceb6e2b7b8">NMIFLAG</a>; </div>
<div class="line"><a name="l00481"></a><span class="lineno"><a class="line" href="structEic.html#a857746620cc45693036554a5441ade79"> 481</a></span>&#160; __I <a class="code" href="unionEIC__SYNCBUSY__Type.html">EIC_SYNCBUSY_Type</a> <a class="code" href="structEic.html#a857746620cc45693036554a5441ade79">SYNCBUSY</a>; </div>
<div class="line"><a name="l00482"></a><span class="lineno"><a class="line" href="structEic.html#a228fdf5b1f970d352ab14e03de8f4d35"> 482</a></span>&#160; __IO <a class="code" href="unionEIC__EVCTRL__Type.html">EIC_EVCTRL_Type</a> <a class="code" href="structEic.html#a228fdf5b1f970d352ab14e03de8f4d35">EVCTRL</a>; </div>
<div class="line"><a name="l00483"></a><span class="lineno"><a class="line" href="structEic.html#ac499ecb4ba54624fb0f534bfff917bcc"> 483</a></span>&#160; __IO <a class="code" href="unionEIC__INTENCLR__Type.html">EIC_INTENCLR_Type</a> <a class="code" href="structEic.html#ac499ecb4ba54624fb0f534bfff917bcc">INTENCLR</a>; </div>
<div class="line"><a name="l00484"></a><span class="lineno"><a class="line" href="structEic.html#ac9db1d0fed533fb55777efe3f1d98c69"> 484</a></span>&#160; __IO <a class="code" href="unionEIC__INTENSET__Type.html">EIC_INTENSET_Type</a> <a class="code" href="structEic.html#ac9db1d0fed533fb55777efe3f1d98c69">INTENSET</a>; </div>
<div class="line"><a name="l00485"></a><span class="lineno"><a class="line" href="structEic.html#a487a1c3a7123a446a051251d64aba60f"> 485</a></span>&#160; __IO <a class="code" href="unionEIC__INTFLAG__Type.html">EIC_INTFLAG_Type</a> <a class="code" href="structEic.html#a487a1c3a7123a446a051251d64aba60f">INTFLAG</a>; </div>
<div class="line"><a name="l00486"></a><span class="lineno"><a class="line" href="structEic.html#afeaef43f4273900190ad63f2b28484bf"> 486</a></span>&#160; __IO <a class="code" href="unionEIC__ASYNCH__Type.html">EIC_ASYNCH_Type</a> <a class="code" href="structEic.html#afeaef43f4273900190ad63f2b28484bf">ASYNCH</a>; </div>
<div class="line"><a name="l00487"></a><span class="lineno"><a class="line" href="structEic.html#a95e5655d7106c582cb9e93e65825309b"> 487</a></span>&#160; __IO <a class="code" href="unionEIC__CONFIG__Type.html">EIC_CONFIG_Type</a> CONFIG[2]; </div>
<div class="line"><a name="l00488"></a><span class="lineno"> 488</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved1[0xC];</div>
<div class="line"><a name="l00489"></a><span class="lineno"><a class="line" href="structEic.html#a519456f45a9143228c193e35df43837d"> 489</a></span>&#160; __IO <a class="code" href="unionEIC__DEBOUNCEN__Type.html">EIC_DEBOUNCEN_Type</a> <a class="code" href="structEic.html#a519456f45a9143228c193e35df43837d">DEBOUNCEN</a>; </div>
<div class="line"><a name="l00490"></a><span class="lineno"><a class="line" href="structEic.html#a60c2b51111dc88120f0748e946350ba4"> 490</a></span>&#160; __IO <a class="code" href="unionEIC__DPRESCALER__Type.html">EIC_DPRESCALER_Type</a> <a class="code" href="structEic.html#a60c2b51111dc88120f0748e946350ba4">DPRESCALER</a>; </div>
<div class="line"><a name="l00491"></a><span class="lineno"><a class="line" href="structEic.html#a28fd24a69edd14ae2c0889f2268f7273"> 491</a></span>&#160; __I <a class="code" href="unionEIC__PINSTATE__Type.html">EIC_PINSTATE_Type</a> <a class="code" href="structEic.html#a28fd24a69edd14ae2c0889f2268f7273">PINSTATE</a>; </div>
<div class="line"><a name="l00492"></a><span class="lineno"> 492</span>&#160;} <a class="code" href="structEic.html">Eic</a>;</div>
<div class="line"><a name="l00493"></a><span class="lineno"> 493</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00494"></a><span class="lineno"> 494</span>&#160; </div>
<div class="line"><a name="l00497"></a><span class="lineno"> 497</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_EIC_COMPONENT_ */</span><span class="preprocessor"></span></div>
</div><!-- fragment --></div><!-- contents -->
<div class="ttc" id="aunionEIC__DPRESCALER__Type_html_a3c815de48bfde55ed1a4aefd1bb6c7d9"><div class="ttname"><a href="unionEIC__DPRESCALER__Type.html#a3c815de48bfde55ed1a4aefd1bb6c7d9">EIC_DPRESCALER_Type::PRESCALER1</a></div><div class="ttdeci">uint32_t PRESCALER1</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00429">eic.h:429</a></div></div>
<div class="ttc" id="aunionEIC__CONFIG__Type_html"><div class="ttname"><a href="unionEIC__CONFIG__Type.html">EIC_CONFIG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00240">eic.h:240</a></div></div>
<div class="ttc" id="aunionEIC__CTRLA__Type_html_ab2af309753f3d3fc509d7ac6f5a052c4"><div class="ttname"><a href="unionEIC__CTRLA__Type.html#ab2af309753f3d3fc509d7ac6f5a052c4">EIC_CTRLA_Type::CKSEL</a></div><div class="ttdeci">uint8_t CKSEL</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00049">eic.h:49</a></div></div>
<div class="ttc" id="aunionEIC__NMICTRL__Type_html_ae8c7e49526fb6d130c2e551a8c6fc898"><div class="ttname"><a href="unionEIC__NMICTRL__Type.html#ae8c7e49526fb6d130c2e551a8c6fc898">EIC_NMICTRL_Type::NMIFILTEN</a></div><div class="ttdeci">uint8_t NMIFILTEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00072">eic.h:72</a></div></div>
<div class="ttc" id="aunionEIC__DPRESCALER__Type_html_a763d6f279df7cd8b61bd7ff92bc155fe"><div class="ttname"><a href="unionEIC__DPRESCALER__Type.html#a763d6f279df7cd8b61bd7ff92bc155fe">EIC_DPRESCALER_Type::STATES0</a></div><div class="ttdeci">uint32_t STATES0</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00428">eic.h:428</a></div></div>
<div class="ttc" id="aunionEIC__CTRLA__Type_html_a31beb9a1e66a00d9e8ead9dba64777f9"><div class="ttname"><a href="unionEIC__CTRLA__Type.html#a31beb9a1e66a00d9e8ead9dba64777f9">EIC_CTRLA_Type::SWRST</a></div><div class="ttdeci">uint8_t SWRST</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00046">eic.h:46</a></div></div>
<div class="ttc" id="aunionEIC__DPRESCALER__Type_html_ac50105a95c7f335096362040fd65fade"><div class="ttname"><a href="unionEIC__DPRESCALER__Type.html#ac50105a95c7f335096362040fd65fade">EIC_DPRESCALER_Type::PRESCALER0</a></div><div class="ttdeci">uint32_t PRESCALER0</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00427">eic.h:427</a></div></div>
<div class="ttc" id="aunionEIC__INTENSET__Type_html"><div class="ttname"><a href="unionEIC__INTENSET__Type.html">EIC_INTENSET_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00183">eic.h:183</a></div></div>
<div class="ttc" id="astructEic_html_a28fd24a69edd14ae2c0889f2268f7273"><div class="ttname"><a href="structEic.html#a28fd24a69edd14ae2c0889f2268f7273">Eic::PINSTATE</a></div><div class="ttdeci">__I EIC_PINSTATE_Type PINSTATE</div><div class="ttdoc">Offset: 0x38 (R/ 32) Pin State.</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00491">eic.h:491</a></div></div>
<div class="ttc" id="aunionEIC__CONFIG__Type_html_acd78ffeb414c4774665845290f19aef1"><div class="ttname"><a href="unionEIC__CONFIG__Type.html#acd78ffeb414c4774665845290f19aef1">EIC_CONFIG_Type::FILTEN6</a></div><div class="ttdeci">uint32_t FILTEN6</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00255">eic.h:255</a></div></div>
<div class="ttc" id="aunionEIC__ASYNCH__Type_html_a7e2b0b689d3b75331e59fa2e05eb2946"><div class="ttname"><a href="unionEIC__ASYNCH__Type.html#a7e2b0b689d3b75331e59fa2e05eb2946">EIC_ASYNCH_Type::ASYNCH</a></div><div class="ttdeci">uint32_t ASYNCH</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00223">eic.h:223</a></div></div>
<div class="ttc" id="aunionEIC__INTENSET__Type_html_a9b687b84a8227b91fb74474cf65b23e0"><div class="ttname"><a href="unionEIC__INTENSET__Type.html#a9b687b84a8227b91fb74474cf65b23e0">EIC_INTENSET_Type::EXTINT</a></div><div class="ttdeci">uint32_t EXTINT</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00185">eic.h:185</a></div></div>
<div class="ttc" id="aunionEIC__CTRLA__Type_html"><div class="ttname"><a href="unionEIC__CTRLA__Type.html">EIC_CTRLA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00044">eic.h:44</a></div></div>
<div class="ttc" id="aunionEIC__NMIFLAG__Type_html"><div class="ttname"><a href="unionEIC__NMIFLAG__Type.html">EIC_NMIFLAG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00106">eic.h:106</a></div></div>
<div class="ttc" id="aunionEIC__CONFIG__Type_html_a5fdad03cc428ee8f4d24dc1a632640f3"><div class="ttname"><a href="unionEIC__CONFIG__Type.html#a5fdad03cc428ee8f4d24dc1a632640f3">EIC_CONFIG_Type::SENSE3</a></div><div class="ttdeci">uint32_t SENSE3</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00248">eic.h:248</a></div></div>
<div class="ttc" id="aunionEIC__CONFIG__Type_html_a1347bd86400d8ef70b06dfdb0a6436c8"><div class="ttname"><a href="unionEIC__CONFIG__Type.html#a1347bd86400d8ef70b06dfdb0a6436c8">EIC_CONFIG_Type::FILTEN3</a></div><div class="ttdeci">uint32_t FILTEN3</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00249">eic.h:249</a></div></div>
<div class="ttc" id="aunionEIC__INTFLAG__Type_html_a99a8ead36567d2fb8b18b546314e9382"><div class="ttname"><a href="unionEIC__INTFLAG__Type.html#a99a8ead36567d2fb8b18b546314e9382">EIC_INTFLAG_Type::EXTINT</a></div><div class="ttdeci">__I uint32_t EXTINT</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00204">eic.h:204</a></div></div>
<div class="ttc" id="astructEic_html_abe387c3f6c50f72e37e91adf3d9eac06"><div class="ttname"><a href="structEic.html#abe387c3f6c50f72e37e91adf3d9eac06">Eic::NMICTRL</a></div><div class="ttdeci">__IO EIC_NMICTRL_Type NMICTRL</div><div class="ttdoc">Offset: 0x01 (R/W 8) Non-Maskable Interrupt Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00479">eic.h:479</a></div></div>
<div class="ttc" id="aunionEIC__CONFIG__Type_html_a159a1e94e7994980bd2b663bfc8e4030"><div class="ttname"><a href="unionEIC__CONFIG__Type.html#a159a1e94e7994980bd2b663bfc8e4030">EIC_CONFIG_Type::FILTEN4</a></div><div class="ttdeci">uint32_t FILTEN4</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00251">eic.h:251</a></div></div>
<div class="ttc" id="aunionEIC__INTFLAG__Type_html"><div class="ttname"><a href="unionEIC__INTFLAG__Type.html">EIC_INTFLAG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00202">eic.h:202</a></div></div>
<div class="ttc" id="aunionEIC__CONFIG__Type_html_a2b015cff268d4e52be4e188543c5d770"><div class="ttname"><a href="unionEIC__CONFIG__Type.html#a2b015cff268d4e52be4e188543c5d770">EIC_CONFIG_Type::FILTEN0</a></div><div class="ttdeci">uint32_t FILTEN0</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00243">eic.h:243</a></div></div>
<div class="ttc" id="astructEic_html_a5e489fa962a835e2d06a4dceb6e2b7b8"><div class="ttname"><a href="structEic.html#a5e489fa962a835e2d06a4dceb6e2b7b8">Eic::NMIFLAG</a></div><div class="ttdeci">__IO EIC_NMIFLAG_Type NMIFLAG</div><div class="ttdoc">Offset: 0x02 (R/W 16) Non-Maskable Interrupt Flag Status and Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00480">eic.h:480</a></div></div>
<div class="ttc" id="aunionEIC__INTENSET__Type_html_ae37fc1b9ed6acee3eba5484176ecebbf"><div class="ttname"><a href="unionEIC__INTENSET__Type.html#ae37fc1b9ed6acee3eba5484176ecebbf">EIC_INTENSET_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00188">eic.h:188</a></div></div>
<div class="ttc" id="aunionEIC__DPRESCALER__Type_html_aace282ac178c5ef3233601add55454d3"><div class="ttname"><a href="unionEIC__DPRESCALER__Type.html#aace282ac178c5ef3233601add55454d3">EIC_DPRESCALER_Type::TICKON</a></div><div class="ttdeci">uint32_t TICKON</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00432">eic.h:432</a></div></div>
<div class="ttc" id="astructEic_html_a60c2b51111dc88120f0748e946350ba4"><div class="ttname"><a href="structEic.html#a60c2b51111dc88120f0748e946350ba4">Eic::DPRESCALER</a></div><div class="ttdeci">__IO EIC_DPRESCALER_Type DPRESCALER</div><div class="ttdoc">Offset: 0x34 (R/W 32) Debouncer Prescaler.</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00490">eic.h:490</a></div></div>
<div class="ttc" id="astructEic_html_a487a1c3a7123a446a051251d64aba60f"><div class="ttname"><a href="structEic.html#a487a1c3a7123a446a051251d64aba60f">Eic::INTFLAG</a></div><div class="ttdeci">__IO EIC_INTFLAG_Type INTFLAG</div><div class="ttdoc">Offset: 0x14 (R/W 32) Interrupt Flag Status and Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00485">eic.h:485</a></div></div>
<div class="ttc" id="astructEic_html_afeaef43f4273900190ad63f2b28484bf"><div class="ttname"><a href="structEic.html#afeaef43f4273900190ad63f2b28484bf">Eic::ASYNCH</a></div><div class="ttdeci">__IO EIC_ASYNCH_Type ASYNCH</div><div class="ttdoc">Offset: 0x18 (R/W 32) External Interrupt Asynchronous Mode.</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00486">eic.h:486</a></div></div>
<div class="ttc" id="aunionEIC__CONFIG__Type_html_afa6acfc8ed18f9ef3672752e5046af16"><div class="ttname"><a href="unionEIC__CONFIG__Type.html#afa6acfc8ed18f9ef3672752e5046af16">EIC_CONFIG_Type::FILTEN1</a></div><div class="ttdeci">uint32_t FILTEN1</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00245">eic.h:245</a></div></div>
<div class="ttc" id="aunionEIC__NMICTRL__Type_html_a495b651964123217420a71dfa17066b6"><div class="ttname"><a href="unionEIC__NMICTRL__Type.html#a495b651964123217420a71dfa17066b6">EIC_NMICTRL_Type::NMIASYNCH</a></div><div class="ttdeci">uint8_t NMIASYNCH</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00073">eic.h:73</a></div></div>
<div class="ttc" id="astructEic_html_a3d945ae1fb5d005dae206bdcec01db95"><div class="ttname"><a href="structEic.html#a3d945ae1fb5d005dae206bdcec01db95">Eic::CTRLA</a></div><div class="ttdeci">__IO EIC_CTRLA_Type CTRLA</div><div class="ttdoc">Offset: 0x00 (R/W 8) Control A.</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00478">eic.h:478</a></div></div>
<div class="ttc" id="aunionEIC__DEBOUNCEN__Type_html_a9b3cc6e51ae8fba9b6ddb5014e88d7ad"><div class="ttname"><a href="unionEIC__DEBOUNCEN__Type.html#a9b3cc6e51ae8fba9b6ddb5014e88d7ad">EIC_DEBOUNCEN_Type::DEBOUNCEN</a></div><div class="ttdeci">uint32_t DEBOUNCEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00408">eic.h:408</a></div></div>
<div class="ttc" id="aunionEIC__ASYNCH__Type_html_afe97ecc51ace3e8f212ee9e1e62c3303"><div class="ttname"><a href="unionEIC__ASYNCH__Type.html#afe97ecc51ace3e8f212ee9e1e62c3303">EIC_ASYNCH_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00226">eic.h:226</a></div></div>
<div class="ttc" id="aunionEIC__NMICTRL__Type_html_acf1ff36d19d1bf77eb5da09816f60a45"><div class="ttname"><a href="unionEIC__NMICTRL__Type.html#acf1ff36d19d1bf77eb5da09816f60a45">EIC_NMICTRL_Type::NMISENSE</a></div><div class="ttdeci">uint8_t NMISENSE</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00071">eic.h:71</a></div></div>
<div class="ttc" id="aunionEIC__CONFIG__Type_html_af02690b8633eb21f70ea3c5359cbb920"><div class="ttname"><a href="unionEIC__CONFIG__Type.html#af02690b8633eb21f70ea3c5359cbb920">EIC_CONFIG_Type::SENSE7</a></div><div class="ttdeci">uint32_t SENSE7</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00256">eic.h:256</a></div></div>
<div class="ttc" id="aunionEIC__INTENCLR__Type_html_a0e58903a7b1be711212a0cef600e271b"><div class="ttname"><a href="unionEIC__INTENCLR__Type.html#a0e58903a7b1be711212a0cef600e271b">EIC_INTENCLR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00169">eic.h:169</a></div></div>
<div class="ttc" id="aunionEIC__CONFIG__Type_html_ad5d18c5a022deec20e80760fb13482ca"><div class="ttname"><a href="unionEIC__CONFIG__Type.html#ad5d18c5a022deec20e80760fb13482ca">EIC_CONFIG_Type::FILTEN2</a></div><div class="ttdeci">uint32_t FILTEN2</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00247">eic.h:247</a></div></div>
<div class="ttc" id="aunionEIC__CONFIG__Type_html_a3cfd504b9379af7e18843f39479ece0d"><div class="ttname"><a href="unionEIC__CONFIG__Type.html#a3cfd504b9379af7e18843f39479ece0d">EIC_CONFIG_Type::SENSE1</a></div><div class="ttdeci">uint32_t SENSE1</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00244">eic.h:244</a></div></div>
<div class="ttc" id="aunionEIC__EVCTRL__Type_html"><div class="ttname"><a href="unionEIC__EVCTRL__Type.html">EIC_EVCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00145">eic.h:145</a></div></div>
<div class="ttc" id="astructEic_html_ac499ecb4ba54624fb0f534bfff917bcc"><div class="ttname"><a href="structEic.html#ac499ecb4ba54624fb0f534bfff917bcc">Eic::INTENCLR</a></div><div class="ttdeci">__IO EIC_INTENCLR_Type INTENCLR</div><div class="ttdoc">Offset: 0x0C (R/W 32) Interrupt Enable Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00483">eic.h:483</a></div></div>
<div class="ttc" id="aunionEIC__SYNCBUSY__Type_html_a46996bbf17b6da1022603efc457a594b"><div class="ttname"><a href="unionEIC__SYNCBUSY__Type.html#a46996bbf17b6da1022603efc457a594b">EIC_SYNCBUSY_Type::SWRST</a></div><div class="ttdeci">uint32_t SWRST</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00126">eic.h:126</a></div></div>
<div class="ttc" id="aunionEIC__ASYNCH__Type_html"><div class="ttname"><a href="unionEIC__ASYNCH__Type.html">EIC_ASYNCH_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00221">eic.h:221</a></div></div>
<div class="ttc" id="aunionEIC__CTRLA__Type_html_a2d66754e7fd0a4e7d2526d22accb7b27"><div class="ttname"><a href="unionEIC__CTRLA__Type.html#a2d66754e7fd0a4e7d2526d22accb7b27">EIC_CTRLA_Type::ENABLE</a></div><div class="ttdeci">uint8_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00047">eic.h:47</a></div></div>
<div class="ttc" id="aunionEIC__CONFIG__Type_html_aba87301de4a9a7fb10adeb5c09c22289"><div class="ttname"><a href="unionEIC__CONFIG__Type.html#aba87301de4a9a7fb10adeb5c09c22289">EIC_CONFIG_Type::SENSE5</a></div><div class="ttdeci">uint32_t SENSE5</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00252">eic.h:252</a></div></div>
<div class="ttc" id="aunionEIC__INTFLAG__Type_html_a11afcf0c2051e6c52baaeb573b9d116a"><div class="ttname"><a href="unionEIC__INTFLAG__Type.html#a11afcf0c2051e6c52baaeb573b9d116a">EIC_INTFLAG_Type::uint32_t</a></div><div class="ttdeci">__I uint32_t</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00205">eic.h:205</a></div></div>
<div class="ttc" id="astructEic_html_a857746620cc45693036554a5441ade79"><div class="ttname"><a href="structEic.html#a857746620cc45693036554a5441ade79">Eic::SYNCBUSY</a></div><div class="ttdeci">__I EIC_SYNCBUSY_Type SYNCBUSY</div><div class="ttdoc">Offset: 0x04 (R/ 32) Synchronization Busy.</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00481">eic.h:481</a></div></div>
<div class="ttc" id="astructEic_html_ac9db1d0fed533fb55777efe3f1d98c69"><div class="ttname"><a href="structEic.html#ac9db1d0fed533fb55777efe3f1d98c69">Eic::INTENSET</a></div><div class="ttdeci">__IO EIC_INTENSET_Type INTENSET</div><div class="ttdoc">Offset: 0x10 (R/W 32) Interrupt Enable Set.</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00484">eic.h:484</a></div></div>
<div class="ttc" id="aunionEIC__NMIFLAG__Type_html_ab5a19753495575fdd07220282f494e9a"><div class="ttname"><a href="unionEIC__NMIFLAG__Type.html#ab5a19753495575fdd07220282f494e9a">EIC_NMIFLAG_Type::NMI</a></div><div class="ttdeci">uint16_t NMI</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00108">eic.h:108</a></div></div>
<div class="ttc" id="aunionEIC__SYNCBUSY__Type_html_a6ab5a7528d3685d28e27190c989c00ee"><div class="ttname"><a href="unionEIC__SYNCBUSY__Type.html#a6ab5a7528d3685d28e27190c989c00ee">EIC_SYNCBUSY_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00130">eic.h:130</a></div></div>
<div class="ttc" id="aunionEIC__CONFIG__Type_html_a6522e13a247849d29dd7e37e1ef2e373"><div class="ttname"><a href="unionEIC__CONFIG__Type.html#a6522e13a247849d29dd7e37e1ef2e373">EIC_CONFIG_Type::SENSE4</a></div><div class="ttdeci">uint32_t SENSE4</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00250">eic.h:250</a></div></div>
<div class="ttc" id="astructEic_html_a519456f45a9143228c193e35df43837d"><div class="ttname"><a href="structEic.html#a519456f45a9143228c193e35df43837d">Eic::DEBOUNCEN</a></div><div class="ttdeci">__IO EIC_DEBOUNCEN_Type DEBOUNCEN</div><div class="ttdoc">Offset: 0x30 (R/W 32) Debouncer Enable.</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00489">eic.h:489</a></div></div>
<div class="ttc" id="aunionEIC__EVCTRL__Type_html_ab15db25f954b71827332745025d44638"><div class="ttname"><a href="unionEIC__EVCTRL__Type.html#ab15db25f954b71827332745025d44638">EIC_EVCTRL_Type::EXTINTEO</a></div><div class="ttdeci">uint32_t EXTINTEO</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00147">eic.h:147</a></div></div>
<div class="ttc" id="aunionEIC__DEBOUNCEN__Type_html_a59d05ff8c085456522025c0da5db1582"><div class="ttname"><a href="unionEIC__DEBOUNCEN__Type.html#a59d05ff8c085456522025c0da5db1582">EIC_DEBOUNCEN_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00411">eic.h:411</a></div></div>
<div class="ttc" id="astructEic_html_a228fdf5b1f970d352ab14e03de8f4d35"><div class="ttname"><a href="structEic.html#a228fdf5b1f970d352ab14e03de8f4d35">Eic::EVCTRL</a></div><div class="ttdeci">__IO EIC_EVCTRL_Type EVCTRL</div><div class="ttdoc">Offset: 0x08 (R/W 32) Event Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00482">eic.h:482</a></div></div>
<div class="ttc" id="aunionEIC__CONFIG__Type_html_ae85f78df9f8cf8a42952b7111254c5a7"><div class="ttname"><a href="unionEIC__CONFIG__Type.html#ae85f78df9f8cf8a42952b7111254c5a7">EIC_CONFIG_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00259">eic.h:259</a></div></div>
<div class="ttc" id="aunionEIC__CONFIG__Type_html_a6d3559efac112cf59cc5695483753485"><div class="ttname"><a href="unionEIC__CONFIG__Type.html#a6d3559efac112cf59cc5695483753485">EIC_CONFIG_Type::FILTEN5</a></div><div class="ttdeci">uint32_t FILTEN5</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00253">eic.h:253</a></div></div>
<div class="ttc" id="aunionEIC__INTENCLR__Type_html"><div class="ttname"><a href="unionEIC__INTENCLR__Type.html">EIC_INTENCLR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00164">eic.h:164</a></div></div>
<div class="ttc" id="aunionEIC__DPRESCALER__Type_html_afa46afcb645e5c0f08a6f162da823c28"><div class="ttname"><a href="unionEIC__DPRESCALER__Type.html#afa46afcb645e5c0f08a6f162da823c28">EIC_DPRESCALER_Type::STATES1</a></div><div class="ttdeci">uint32_t STATES1</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00430">eic.h:430</a></div></div>
<div class="ttc" id="aunionEIC__PINSTATE__Type_html"><div class="ttname"><a href="unionEIC__PINSTATE__Type.html">EIC_PINSTATE_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00458">eic.h:458</a></div></div>
<div class="ttc" id="aunionEIC__NMICTRL__Type_html"><div class="ttname"><a href="unionEIC__NMICTRL__Type.html">EIC_NMICTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00069">eic.h:69</a></div></div>
<div class="ttc" id="asame54n19a_8h_html_a0d957f1433aaf5d70e4dc2b68288442d"><div class="ttname"><a href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a></div><div class="ttdeci">volatile const uint8_t RoReg8</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00053">same54n19a.h:53</a></div></div>
<div class="ttc" id="aunionEIC__DPRESCALER__Type_html"><div class="ttname"><a href="unionEIC__DPRESCALER__Type.html">EIC_DPRESCALER_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00425">eic.h:425</a></div></div>
<div class="ttc" id="aunionEIC__INTENCLR__Type_html_af6f08742ecc24c00428372ddf44f7271"><div class="ttname"><a href="unionEIC__INTENCLR__Type.html#af6f08742ecc24c00428372ddf44f7271">EIC_INTENCLR_Type::EXTINT</a></div><div class="ttdeci">uint32_t EXTINT</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00166">eic.h:166</a></div></div>
<div class="ttc" id="aunionEIC__DEBOUNCEN__Type_html"><div class="ttname"><a href="unionEIC__DEBOUNCEN__Type.html">EIC_DEBOUNCEN_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00406">eic.h:406</a></div></div>
<div class="ttc" id="aunionEIC__EVCTRL__Type_html_acfc4e3cf2609368b640cc3463f4d2270"><div class="ttname"><a href="unionEIC__EVCTRL__Type.html#acfc4e3cf2609368b640cc3463f4d2270">EIC_EVCTRL_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00150">eic.h:150</a></div></div>
<div class="ttc" id="aunionEIC__INTFLAG__Type_html_a85a80a7da36142adafb6e34e29029960"><div class="ttname"><a href="unionEIC__INTFLAG__Type.html#a85a80a7da36142adafb6e34e29029960">EIC_INTFLAG_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00207">eic.h:207</a></div></div>
<div class="ttc" id="aunionEIC__SYNCBUSY__Type_html"><div class="ttname"><a href="unionEIC__SYNCBUSY__Type.html">EIC_SYNCBUSY_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00124">eic.h:124</a></div></div>
<div class="ttc" id="aunionEIC__CONFIG__Type_html_acbc67865205a6f51d836bd1c960df40c"><div class="ttname"><a href="unionEIC__CONFIG__Type.html#acbc67865205a6f51d836bd1c960df40c">EIC_CONFIG_Type::SENSE0</a></div><div class="ttdeci">uint32_t SENSE0</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00242">eic.h:242</a></div></div>
<div class="ttc" id="aunionEIC__CONFIG__Type_html_a812c1a8803b48e6e3172a28713af0b25"><div class="ttname"><a href="unionEIC__CONFIG__Type.html#a812c1a8803b48e6e3172a28713af0b25">EIC_CONFIG_Type::SENSE6</a></div><div class="ttdeci">uint32_t SENSE6</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00254">eic.h:254</a></div></div>
<div class="ttc" id="aunionEIC__CTRLA__Type_html_a596619722e3e1170512c1467e896b9be"><div class="ttname"><a href="unionEIC__CTRLA__Type.html#a596619722e3e1170512c1467e896b9be">EIC_CTRLA_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00052">eic.h:52</a></div></div>
<div class="ttc" id="aunionEIC__CONFIG__Type_html_a334f31fc227f0b432ce2fd92d083713f"><div class="ttname"><a href="unionEIC__CONFIG__Type.html#a334f31fc227f0b432ce2fd92d083713f">EIC_CONFIG_Type::SENSE2</a></div><div class="ttdeci">uint32_t SENSE2</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00246">eic.h:246</a></div></div>
<div class="ttc" id="aunionEIC__PINSTATE__Type_html_a197299ee0a47004ca7f7f7375e53ac00"><div class="ttname"><a href="unionEIC__PINSTATE__Type.html#a197299ee0a47004ca7f7f7375e53ac00">EIC_PINSTATE_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00463">eic.h:463</a></div></div>
<div class="ttc" id="aunionEIC__CONFIG__Type_html_a7612b772fb96ced4f69c842b1d0591ce"><div class="ttname"><a href="unionEIC__CONFIG__Type.html#a7612b772fb96ced4f69c842b1d0591ce">EIC_CONFIG_Type::FILTEN7</a></div><div class="ttdeci">uint32_t FILTEN7</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00257">eic.h:257</a></div></div>
<div class="ttc" id="aunionEIC__DPRESCALER__Type_html_a7f54fa0349dd2454f9c87362dbc54065"><div class="ttname"><a href="unionEIC__DPRESCALER__Type.html#a7f54fa0349dd2454f9c87362dbc54065">EIC_DPRESCALER_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00435">eic.h:435</a></div></div>
<div class="ttc" id="aunionEIC__NMIFLAG__Type_html_ac4dcec9d36b017e16ae8d46a5b990f80"><div class="ttname"><a href="unionEIC__NMIFLAG__Type.html#ac4dcec9d36b017e16ae8d46a5b990f80">EIC_NMIFLAG_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00111">eic.h:111</a></div></div>
<div class="ttc" id="aunionEIC__SYNCBUSY__Type_html_a4994ee58fd972b7f6c9831648d1e7501"><div class="ttname"><a href="unionEIC__SYNCBUSY__Type.html#a4994ee58fd972b7f6c9831648d1e7501">EIC_SYNCBUSY_Type::ENABLE</a></div><div class="ttdeci">uint32_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00127">eic.h:127</a></div></div>
<div class="ttc" id="astructEic_html"><div class="ttname"><a href="structEic.html">Eic</a></div><div class="ttdoc">EIC hardware registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00477">eic.h:477</a></div></div>
<div class="ttc" id="aunionEIC__PINSTATE__Type_html_ac828d1145a4b56b4ef3296fc6b7891f5"><div class="ttname"><a href="unionEIC__PINSTATE__Type.html#ac828d1145a4b56b4ef3296fc6b7891f5">EIC_PINSTATE_Type::PINSTATE</a></div><div class="ttdeci">uint32_t PINSTATE</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00460">eic.h:460</a></div></div>
<div class="ttc" id="aunionEIC__NMICTRL__Type_html_a0b91203d47755f15a84533ed9868116f"><div class="ttname"><a href="unionEIC__NMICTRL__Type.html#a0b91203d47755f15a84533ed9868116f">EIC_NMICTRL_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2eic_8h_source.html#l00076">eic.h:76</a></div></div>
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<a href="component_2evsys_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_EVSYS_COMPONENT_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_EVSYS_COMPONENT_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160; </div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define EVSYS_U2504</span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define REV_EVSYS 0x100</span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160; </div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="comment">/* -------- EVSYS_CTRLA : (EVSYS Offset: 0x000) (R/W 8) Control -------- */</span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00044"></a><span class="lineno"><a class="line" href="unionEVSYS__CTRLA__Type.html"> 44</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00046"></a><span class="lineno"><a class="line" href="unionEVSYS__CTRLA__Type.html#a29e76ab447d1cf1b68002106bf15ac88"> 46</a></span>&#160; uint8_t <a class="code" href="unionEVSYS__CTRLA__Type.html#a29e76ab447d1cf1b68002106bf15ac88">SWRST</a>:1; </div>
<div class="line"><a name="l00047"></a><span class="lineno"><a class="line" href="unionEVSYS__CTRLA__Type.html#a3950f9963dac8a7115e0962302fe0783"> 47</a></span>&#160; uint8_t :7; </div>
<div class="line"><a name="l00048"></a><span class="lineno"><a class="line" href="unionEVSYS__CTRLA__Type.html#aa166b9c3fc31fbddabb2b665a3c2f080"> 48</a></span>&#160; } bit; </div>
<div class="line"><a name="l00049"></a><span class="lineno"><a class="line" href="unionEVSYS__CTRLA__Type.html#af4fc9fc41995ce37cf5e606752d85671"> 49</a></span>&#160; uint8_t <a class="code" href="unionEVSYS__CTRLA__Type.html#af4fc9fc41995ce37cf5e606752d85671">reg</a>; </div>
<div class="line"><a name="l00050"></a><span class="lineno"> 50</span>&#160;} <a class="code" href="unionEVSYS__CTRLA__Type.html">EVSYS_CTRLA_Type</a>;</div>
<div class="line"><a name="l00051"></a><span class="lineno"> 51</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00052"></a><span class="lineno"> 52</span>&#160; </div>
<div class="line"><a name="l00053"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a9c19dd4f0e5049313e765d9b91338912"> 53</a></span>&#160;<span class="preprocessor">#define EVSYS_CTRLA_OFFSET 0x000 </span></div>
<div class="line"><a name="l00054"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a62b57b85c568e42ba4488825a6297985"> 54</a></span>&#160;<span class="preprocessor">#define EVSYS_CTRLA_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00056"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a4d17eb23599371688a7499a86755f6fd"> 56</a></span>&#160;<span class="preprocessor">#define EVSYS_CTRLA_SWRST_Pos 0 </span></div>
<div class="line"><a name="l00057"></a><span class="lineno"> 57</span>&#160;<span class="preprocessor">#define EVSYS_CTRLA_SWRST (_U_(0x1) &lt;&lt; EVSYS_CTRLA_SWRST_Pos)</span></div>
<div class="line"><a name="l00058"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#ae851c5e39c0d41b3abee6745e40ec2db"> 58</a></span>&#160;<span class="preprocessor">#define EVSYS_CTRLA_MASK _U_(0x01) </span></div>
<div class="line"><a name="l00060"></a><span class="lineno"> 60</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- EVSYS_SWEVT : (EVSYS Offset: 0x004) ( /W 32) Software Event -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00061"></a><span class="lineno"> 61</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00062"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html"> 62</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00063"></a><span class="lineno"> 63</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00064"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#aa1f8bd195072ca85e4aeed205eae7a10"> 64</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#aa1f8bd195072ca85e4aeed205eae7a10">CHANNEL0</a>:1; </div>
<div class="line"><a name="l00065"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#aba0bb7800294ff6f12e7f63389d3dac1"> 65</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#aba0bb7800294ff6f12e7f63389d3dac1">CHANNEL1</a>:1; </div>
<div class="line"><a name="l00066"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#afb6ffb33522da1f5b73db40925265c33"> 66</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#afb6ffb33522da1f5b73db40925265c33">CHANNEL2</a>:1; </div>
<div class="line"><a name="l00067"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#a7c0a7cae38677a058b4025d06b5cf794"> 67</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#a7c0a7cae38677a058b4025d06b5cf794">CHANNEL3</a>:1; </div>
<div class="line"><a name="l00068"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#afb0004ecc3c0ee519685c871b26b9455"> 68</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#afb0004ecc3c0ee519685c871b26b9455">CHANNEL4</a>:1; </div>
<div class="line"><a name="l00069"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#a72a43e0628160359bb65edeb3d8cf9e7"> 69</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#a72a43e0628160359bb65edeb3d8cf9e7">CHANNEL5</a>:1; </div>
<div class="line"><a name="l00070"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#afb71fa643fe395320ada82dc55324a3a"> 70</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#afb71fa643fe395320ada82dc55324a3a">CHANNEL6</a>:1; </div>
<div class="line"><a name="l00071"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#ae921d78bca5f795c52030405b011fb1a"> 71</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#ae921d78bca5f795c52030405b011fb1a">CHANNEL7</a>:1; </div>
<div class="line"><a name="l00072"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#a63b91b96f8f04e56f26b4ad43b5f4199"> 72</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#a63b91b96f8f04e56f26b4ad43b5f4199">CHANNEL8</a>:1; </div>
<div class="line"><a name="l00073"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#a5fa7e92de17255f665eb3c6a97e5aebe"> 73</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#a5fa7e92de17255f665eb3c6a97e5aebe">CHANNEL9</a>:1; </div>
<div class="line"><a name="l00074"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#a337b59a2fab5c3db0ffe638af32bcbf2"> 74</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#a337b59a2fab5c3db0ffe638af32bcbf2">CHANNEL10</a>:1; </div>
<div class="line"><a name="l00075"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#a7079f0c02ed163fecb1f2bc097d43b73"> 75</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#a7079f0c02ed163fecb1f2bc097d43b73">CHANNEL11</a>:1; </div>
<div class="line"><a name="l00076"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#ab1c2d2e6d2fecfbc77dccffa4cd0260d"> 76</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#ab1c2d2e6d2fecfbc77dccffa4cd0260d">CHANNEL12</a>:1; </div>
<div class="line"><a name="l00077"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#a71d191cb003a1d0ab099f622a95fc900"> 77</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#a71d191cb003a1d0ab099f622a95fc900">CHANNEL13</a>:1; </div>
<div class="line"><a name="l00078"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#aeda4949451a0e070c046d553ad4c6b15"> 78</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#aeda4949451a0e070c046d553ad4c6b15">CHANNEL14</a>:1; </div>
<div class="line"><a name="l00079"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#a700c2ecb2609aa17a51cd398d4d9a08d"> 79</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#a700c2ecb2609aa17a51cd398d4d9a08d">CHANNEL15</a>:1; </div>
<div class="line"><a name="l00080"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#acf8cbc6c00c04a5aaaafcf265d20a9e1"> 80</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#acf8cbc6c00c04a5aaaafcf265d20a9e1">CHANNEL16</a>:1; </div>
<div class="line"><a name="l00081"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#a752023584014dd0b4f87888c419ff983"> 81</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#a752023584014dd0b4f87888c419ff983">CHANNEL17</a>:1; </div>
<div class="line"><a name="l00082"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#addd2f5f365e2a4b909e1d255ee6428b5"> 82</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#addd2f5f365e2a4b909e1d255ee6428b5">CHANNEL18</a>:1; </div>
<div class="line"><a name="l00083"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#a5d42f70cbb271a2830e2a21c4327f4b1"> 83</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#a5d42f70cbb271a2830e2a21c4327f4b1">CHANNEL19</a>:1; </div>
<div class="line"><a name="l00084"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#adf694ce07512d08c9f8be8494bdec305"> 84</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#adf694ce07512d08c9f8be8494bdec305">CHANNEL20</a>:1; </div>
<div class="line"><a name="l00085"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#acd8aa7e57eadf4d4c870dbe5a114f521"> 85</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#acd8aa7e57eadf4d4c870dbe5a114f521">CHANNEL21</a>:1; </div>
<div class="line"><a name="l00086"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#ac055ac3d315ee455b32124381d67b8c2"> 86</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#ac055ac3d315ee455b32124381d67b8c2">CHANNEL22</a>:1; </div>
<div class="line"><a name="l00087"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#ac4dcdade8be4581f6b748fa4e663dad3"> 87</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#ac4dcdade8be4581f6b748fa4e663dad3">CHANNEL23</a>:1; </div>
<div class="line"><a name="l00088"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#afc79f79749241819d797901b24d7ef4c"> 88</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#afc79f79749241819d797901b24d7ef4c">CHANNEL24</a>:1; </div>
<div class="line"><a name="l00089"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#a27bad8978eb8bbe71bc6f12e561440c2"> 89</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#a27bad8978eb8bbe71bc6f12e561440c2">CHANNEL25</a>:1; </div>
<div class="line"><a name="l00090"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#a0ae3ed907eb8ce1a77d709093e897eb2"> 90</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#a0ae3ed907eb8ce1a77d709093e897eb2">CHANNEL26</a>:1; </div>
<div class="line"><a name="l00091"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#a6592c8e6e930a496ef2467f6c9baedc1"> 91</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#a6592c8e6e930a496ef2467f6c9baedc1">CHANNEL27</a>:1; </div>
<div class="line"><a name="l00092"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#a1a0ef059f4c85e9fab2dce925499e271"> 92</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#a1a0ef059f4c85e9fab2dce925499e271">CHANNEL28</a>:1; </div>
<div class="line"><a name="l00093"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#accca60a99e0d7f04fc905ed532babcb9"> 93</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#accca60a99e0d7f04fc905ed532babcb9">CHANNEL29</a>:1; </div>
<div class="line"><a name="l00094"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#a7c62232ef0980ab0f180566ab8b78ad0"> 94</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#a7c62232ef0980ab0f180566ab8b78ad0">CHANNEL30</a>:1; </div>
<div class="line"><a name="l00095"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#aab54dffb185754de9504b761da56b3d3"> 95</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#aab54dffb185754de9504b761da56b3d3">CHANNEL31</a>:1; </div>
<div class="line"><a name="l00096"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#a2079ac903c1cdb3ee3c354155ab1a48b"> 96</a></span>&#160; } bit; </div>
<div class="line"><a name="l00097"></a><span class="lineno"> 97</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00098"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#ada8d6e9506344a8acfbef10b9ff6f1e5"> 98</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#ada8d6e9506344a8acfbef10b9ff6f1e5">CHANNEL</a>:32; </div>
<div class="line"><a name="l00099"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#a065e7da882e11784c180bc62de44775f"> 99</a></span>&#160; } vec; </div>
<div class="line"><a name="l00100"></a><span class="lineno"><a class="line" href="unionEVSYS__SWEVT__Type.html#a59f677bc98ae17112f6663afe7b03370"> 100</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__SWEVT__Type.html#a59f677bc98ae17112f6663afe7b03370">reg</a>; </div>
<div class="line"><a name="l00101"></a><span class="lineno"> 101</span>&#160;} <a class="code" href="unionEVSYS__SWEVT__Type.html">EVSYS_SWEVT_Type</a>;</div>
<div class="line"><a name="l00102"></a><span class="lineno"> 102</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00103"></a><span class="lineno"> 103</span>&#160; </div>
<div class="line"><a name="l00104"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a167034f50f9b8d02b01907de78ac5af3"> 104</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_OFFSET 0x004 </span></div>
<div class="line"><a name="l00105"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a80608cde26d5a1d22be06c196acfaaa2"> 105</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00107"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#af6d9abc112b697d25dcfde810b1ec6c7"> 107</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL0_Pos 0 </span></div>
<div class="line"><a name="l00108"></a><span class="lineno"> 108</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL0 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL0_Pos)</span></div>
<div class="line"><a name="l00109"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a99eae07b98fdc3b6ce69f85c66bd6c19"> 109</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL1_Pos 1 </span></div>
<div class="line"><a name="l00110"></a><span class="lineno"> 110</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL1 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL1_Pos)</span></div>
<div class="line"><a name="l00111"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a324b1a957add8ed5df1080df90e43c19"> 111</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL2_Pos 2 </span></div>
<div class="line"><a name="l00112"></a><span class="lineno"> 112</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL2 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL2_Pos)</span></div>
<div class="line"><a name="l00113"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a8e3359be2580cdae8c60963148ec2a81"> 113</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL3_Pos 3 </span></div>
<div class="line"><a name="l00114"></a><span class="lineno"> 114</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL3 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL3_Pos)</span></div>
<div class="line"><a name="l00115"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#ae5c6f56b2cf90a57d0e30566c81cb95e"> 115</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL4_Pos 4 </span></div>
<div class="line"><a name="l00116"></a><span class="lineno"> 116</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL4 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL4_Pos)</span></div>
<div class="line"><a name="l00117"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#af4c9fa0dccae3d5e0ebb2e5e2dd83b64"> 117</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL5_Pos 5 </span></div>
<div class="line"><a name="l00118"></a><span class="lineno"> 118</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL5 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL5_Pos)</span></div>
<div class="line"><a name="l00119"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a923930945122e66f2e3a5734f2a1a4b7"> 119</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL6_Pos 6 </span></div>
<div class="line"><a name="l00120"></a><span class="lineno"> 120</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL6 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL6_Pos)</span></div>
<div class="line"><a name="l00121"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a4618f702d0e3ee1f6b10198b9acbf9af"> 121</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL7_Pos 7 </span></div>
<div class="line"><a name="l00122"></a><span class="lineno"> 122</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL7 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL7_Pos)</span></div>
<div class="line"><a name="l00123"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a42bdadb5359ee8f5d6d534ad7f0bc431"> 123</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL8_Pos 8 </span></div>
<div class="line"><a name="l00124"></a><span class="lineno"> 124</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL8 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL8_Pos)</span></div>
<div class="line"><a name="l00125"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a83e99e73d2237f443c327cfece7d6de3"> 125</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL9_Pos 9 </span></div>
<div class="line"><a name="l00126"></a><span class="lineno"> 126</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL9 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL9_Pos)</span></div>
<div class="line"><a name="l00127"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a1eaa9ec8266a8d6c0ad351c8459dc993"> 127</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL10_Pos 10 </span></div>
<div class="line"><a name="l00128"></a><span class="lineno"> 128</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL10 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL10_Pos)</span></div>
<div class="line"><a name="l00129"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a8054acc441c110d0108ec677b4d1dd66"> 129</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL11_Pos 11 </span></div>
<div class="line"><a name="l00130"></a><span class="lineno"> 130</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL11 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL11_Pos)</span></div>
<div class="line"><a name="l00131"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a4b4e4f2f1e12126e0709b7d1ca56bccf"> 131</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL12_Pos 12 </span></div>
<div class="line"><a name="l00132"></a><span class="lineno"> 132</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL12 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL12_Pos)</span></div>
<div class="line"><a name="l00133"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a61ecc8da3e27780be7fef1ab63cc7188"> 133</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL13_Pos 13 </span></div>
<div class="line"><a name="l00134"></a><span class="lineno"> 134</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL13 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL13_Pos)</span></div>
<div class="line"><a name="l00135"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a4e9ddf508e791aa783117ac137bc8006"> 135</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL14_Pos 14 </span></div>
<div class="line"><a name="l00136"></a><span class="lineno"> 136</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL14 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL14_Pos)</span></div>
<div class="line"><a name="l00137"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a5ad60bff0df62d2eaba9d2ccad9bbd5c"> 137</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL15_Pos 15 </span></div>
<div class="line"><a name="l00138"></a><span class="lineno"> 138</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL15 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL15_Pos)</span></div>
<div class="line"><a name="l00139"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#ad29877d8a0999164981cc44ecde02e18"> 139</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL16_Pos 16 </span></div>
<div class="line"><a name="l00140"></a><span class="lineno"> 140</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL16 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL16_Pos)</span></div>
<div class="line"><a name="l00141"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a9e7a22a0c11556dfff983f84ab0b4ba8"> 141</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL17_Pos 17 </span></div>
<div class="line"><a name="l00142"></a><span class="lineno"> 142</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL17 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL17_Pos)</span></div>
<div class="line"><a name="l00143"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#af64fa01f8b275782b1ffebe2870ae6e2"> 143</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL18_Pos 18 </span></div>
<div class="line"><a name="l00144"></a><span class="lineno"> 144</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL18 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL18_Pos)</span></div>
<div class="line"><a name="l00145"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a868656cbfe23b510ddb72013c9061eae"> 145</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL19_Pos 19 </span></div>
<div class="line"><a name="l00146"></a><span class="lineno"> 146</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL19 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL19_Pos)</span></div>
<div class="line"><a name="l00147"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#aedf20e8f758890a1de81706308797eb7"> 147</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL20_Pos 20 </span></div>
<div class="line"><a name="l00148"></a><span class="lineno"> 148</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL20 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL20_Pos)</span></div>
<div class="line"><a name="l00149"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a5a5f81e40e2ccbd7ef320edc3aae2ee4"> 149</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL21_Pos 21 </span></div>
<div class="line"><a name="l00150"></a><span class="lineno"> 150</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL21 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL21_Pos)</span></div>
<div class="line"><a name="l00151"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a5fcf1d4cbab96f507881fd15752455da"> 151</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL22_Pos 22 </span></div>
<div class="line"><a name="l00152"></a><span class="lineno"> 152</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL22 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL22_Pos)</span></div>
<div class="line"><a name="l00153"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a6899060504074799b83d6c4af7013545"> 153</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL23_Pos 23 </span></div>
<div class="line"><a name="l00154"></a><span class="lineno"> 154</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL23 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL23_Pos)</span></div>
<div class="line"><a name="l00155"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#adea640a65a999b4803a5206c5d70c1b6"> 155</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL24_Pos 24 </span></div>
<div class="line"><a name="l00156"></a><span class="lineno"> 156</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL24 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL24_Pos)</span></div>
<div class="line"><a name="l00157"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a2bd2e0cebae20042450a23f9208e5ad8"> 157</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL25_Pos 25 </span></div>
<div class="line"><a name="l00158"></a><span class="lineno"> 158</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL25 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL25_Pos)</span></div>
<div class="line"><a name="l00159"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a78327add9d851964004c8cbfa73c1e9d"> 159</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL26_Pos 26 </span></div>
<div class="line"><a name="l00160"></a><span class="lineno"> 160</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL26 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL26_Pos)</span></div>
<div class="line"><a name="l00161"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a80b56524a05b9258ac87dea440d2d3fb"> 161</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL27_Pos 27 </span></div>
<div class="line"><a name="l00162"></a><span class="lineno"> 162</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL27 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL27_Pos)</span></div>
<div class="line"><a name="l00163"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a4f89d81f9f939909a4112fb9dcd24703"> 163</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL28_Pos 28 </span></div>
<div class="line"><a name="l00164"></a><span class="lineno"> 164</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL28 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL28_Pos)</span></div>
<div class="line"><a name="l00165"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a8b91dadba77a192d56fee9d9cbb0c86d"> 165</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL29_Pos 29 </span></div>
<div class="line"><a name="l00166"></a><span class="lineno"> 166</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL29 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL29_Pos)</span></div>
<div class="line"><a name="l00167"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a407e67075afc274b88bb93704720605f"> 167</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL30_Pos 30 </span></div>
<div class="line"><a name="l00168"></a><span class="lineno"> 168</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL30 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL30_Pos)</span></div>
<div class="line"><a name="l00169"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a55090b8d02a0fb9b78d7dabe327fc837"> 169</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL31_Pos 31 </span></div>
<div class="line"><a name="l00170"></a><span class="lineno"> 170</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL31 (_U_(1) &lt;&lt; EVSYS_SWEVT_CHANNEL31_Pos)</span></div>
<div class="line"><a name="l00171"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#ade0f8631c02c7cd2c5ea987d87f97a53"> 171</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL_Pos 0 </span></div>
<div class="line"><a name="l00172"></a><span class="lineno"> 172</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL_Msk (_U_(0xFFFFFFFF) &lt;&lt; EVSYS_SWEVT_CHANNEL_Pos)</span></div>
<div class="line"><a name="l00173"></a><span class="lineno"> 173</span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_CHANNEL(value) (EVSYS_SWEVT_CHANNEL_Msk &amp; ((value) &lt;&lt; EVSYS_SWEVT_CHANNEL_Pos))</span></div>
<div class="line"><a name="l00174"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a6d1354f5762fb3cbc2a99f5ca0cb29bf"> 174</a></span>&#160;<span class="preprocessor">#define EVSYS_SWEVT_MASK _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00176"></a><span class="lineno"> 176</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- EVSYS_PRICTRL : (EVSYS Offset: 0x008) (R/W 8) Priority Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00177"></a><span class="lineno"> 177</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00178"></a><span class="lineno"><a class="line" href="unionEVSYS__PRICTRL__Type.html"> 178</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00179"></a><span class="lineno"> 179</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00180"></a><span class="lineno"><a class="line" href="unionEVSYS__PRICTRL__Type.html#a52b6cd2e5f60c5bb7dcc7de71ea46718"> 180</a></span>&#160; uint8_t <a class="code" href="unionEVSYS__PRICTRL__Type.html#a52b6cd2e5f60c5bb7dcc7de71ea46718">PRI</a>:4; </div>
<div class="line"><a name="l00181"></a><span class="lineno"><a class="line" href="unionEVSYS__PRICTRL__Type.html#af4c2308753d6f88acaf0616c071ee9ca"> 181</a></span>&#160; uint8_t :3; </div>
<div class="line"><a name="l00182"></a><span class="lineno"><a class="line" href="unionEVSYS__PRICTRL__Type.html#a305aaf6b4cfa7a36c385644a0414aa87"> 182</a></span>&#160; uint8_t <a class="code" href="unionEVSYS__PRICTRL__Type.html#a305aaf6b4cfa7a36c385644a0414aa87">RREN</a>:1; </div>
<div class="line"><a name="l00183"></a><span class="lineno"><a class="line" href="unionEVSYS__PRICTRL__Type.html#a14e8f88aa3626ec48c284c4da278845a"> 183</a></span>&#160; } bit; </div>
<div class="line"><a name="l00184"></a><span class="lineno"><a class="line" href="unionEVSYS__PRICTRL__Type.html#a84f0499eb46834e200c8aa7e6cb570c0"> 184</a></span>&#160; uint8_t <a class="code" href="unionEVSYS__PRICTRL__Type.html#a84f0499eb46834e200c8aa7e6cb570c0">reg</a>; </div>
<div class="line"><a name="l00185"></a><span class="lineno"> 185</span>&#160;} <a class="code" href="unionEVSYS__PRICTRL__Type.html">EVSYS_PRICTRL_Type</a>;</div>
<div class="line"><a name="l00186"></a><span class="lineno"> 186</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00187"></a><span class="lineno"> 187</span>&#160; </div>
<div class="line"><a name="l00188"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a22541e6a8b5a70137cefc0929ac2b1f1"> 188</a></span>&#160;<span class="preprocessor">#define EVSYS_PRICTRL_OFFSET 0x008 </span></div>
<div class="line"><a name="l00189"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a5771468afcdaa8ef28dbe36f7c15da7f"> 189</a></span>&#160;<span class="preprocessor">#define EVSYS_PRICTRL_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00191"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a6d7d2d447189cd149c146f253c021e4c"> 191</a></span>&#160;<span class="preprocessor">#define EVSYS_PRICTRL_PRI_Pos 0 </span></div>
<div class="line"><a name="l00192"></a><span class="lineno"> 192</span>&#160;<span class="preprocessor">#define EVSYS_PRICTRL_PRI_Msk (_U_(0xF) &lt;&lt; EVSYS_PRICTRL_PRI_Pos)</span></div>
<div class="line"><a name="l00193"></a><span class="lineno"> 193</span>&#160;<span class="preprocessor">#define EVSYS_PRICTRL_PRI(value) (EVSYS_PRICTRL_PRI_Msk &amp; ((value) &lt;&lt; EVSYS_PRICTRL_PRI_Pos))</span></div>
<div class="line"><a name="l00194"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#ae47f5ef7da6e116b7b8bd65179160ee3"> 194</a></span>&#160;<span class="preprocessor">#define EVSYS_PRICTRL_RREN_Pos 7 </span></div>
<div class="line"><a name="l00195"></a><span class="lineno"> 195</span>&#160;<span class="preprocessor">#define EVSYS_PRICTRL_RREN (_U_(0x1) &lt;&lt; EVSYS_PRICTRL_RREN_Pos)</span></div>
<div class="line"><a name="l00196"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a1f301484062107c876cdbd6fef764796"> 196</a></span>&#160;<span class="preprocessor">#define EVSYS_PRICTRL_MASK _U_(0x8F) </span></div>
<div class="line"><a name="l00198"></a><span class="lineno"> 198</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- EVSYS_INTPEND : (EVSYS Offset: 0x010) (R/W 16) Channel Pending Interrupt -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00199"></a><span class="lineno"> 199</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00200"></a><span class="lineno"><a class="line" href="unionEVSYS__INTPEND__Type.html"> 200</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00201"></a><span class="lineno"> 201</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00202"></a><span class="lineno"><a class="line" href="unionEVSYS__INTPEND__Type.html#a6dfd5b0e8a698a390e9d47ef4a471a2c"> 202</a></span>&#160; uint16_t <a class="code" href="unionEVSYS__INTPEND__Type.html#a6dfd5b0e8a698a390e9d47ef4a471a2c">ID</a>:4; </div>
<div class="line"><a name="l00203"></a><span class="lineno"><a class="line" href="unionEVSYS__INTPEND__Type.html#a65763251aa79d94fb08d57d9858bf67b"> 203</a></span>&#160; uint16_t :4; </div>
<div class="line"><a name="l00204"></a><span class="lineno"><a class="line" href="unionEVSYS__INTPEND__Type.html#ae49c1ba576b9c627f4ce347a2a192477"> 204</a></span>&#160; uint16_t <a class="code" href="unionEVSYS__INTPEND__Type.html#ae49c1ba576b9c627f4ce347a2a192477">OVR</a>:1; </div>
<div class="line"><a name="l00205"></a><span class="lineno"><a class="line" href="unionEVSYS__INTPEND__Type.html#a883056199f084a41e9984166de830b48"> 205</a></span>&#160; uint16_t <a class="code" href="unionEVSYS__INTPEND__Type.html#a883056199f084a41e9984166de830b48">EVD</a>:1; </div>
<div class="line"><a name="l00206"></a><span class="lineno"><a class="line" href="unionEVSYS__INTPEND__Type.html#adcab37784df2fbc2a026644cf7fa035a"> 206</a></span>&#160; uint16_t :4; </div>
<div class="line"><a name="l00207"></a><span class="lineno"><a class="line" href="unionEVSYS__INTPEND__Type.html#a881869e731c87c6da3809b22a4916ae1"> 207</a></span>&#160; uint16_t <a class="code" href="unionEVSYS__INTPEND__Type.html#a881869e731c87c6da3809b22a4916ae1">READY</a>:1; </div>
<div class="line"><a name="l00208"></a><span class="lineno"><a class="line" href="unionEVSYS__INTPEND__Type.html#ae7b48094040aa65329e8c43b136acb94"> 208</a></span>&#160; uint16_t <a class="code" href="unionEVSYS__INTPEND__Type.html#ae7b48094040aa65329e8c43b136acb94">BUSY</a>:1; </div>
<div class="line"><a name="l00209"></a><span class="lineno"><a class="line" href="unionEVSYS__INTPEND__Type.html#aa785c9c3802496a82934202c2769e7b0"> 209</a></span>&#160; } bit; </div>
<div class="line"><a name="l00210"></a><span class="lineno"><a class="line" href="unionEVSYS__INTPEND__Type.html#a8a75ef5e3ab4bfb15660511c6be6c176"> 210</a></span>&#160; uint16_t <a class="code" href="unionEVSYS__INTPEND__Type.html#a8a75ef5e3ab4bfb15660511c6be6c176">reg</a>; </div>
<div class="line"><a name="l00211"></a><span class="lineno"> 211</span>&#160;} <a class="code" href="unionEVSYS__INTPEND__Type.html">EVSYS_INTPEND_Type</a>;</div>
<div class="line"><a name="l00212"></a><span class="lineno"> 212</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00213"></a><span class="lineno"> 213</span>&#160; </div>
<div class="line"><a name="l00214"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a4113632d96e631e9a8930e453be93dfa"> 214</a></span>&#160;<span class="preprocessor">#define EVSYS_INTPEND_OFFSET 0x010 </span></div>
<div class="line"><a name="l00215"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a3cda3bfe716b30be1a80585bc51e6130"> 215</a></span>&#160;<span class="preprocessor">#define EVSYS_INTPEND_RESETVALUE _U_(0x4000) </span></div>
<div class="line"><a name="l00217"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#af9cdd37532b09107d584f41124fa3ad4"> 217</a></span>&#160;<span class="preprocessor">#define EVSYS_INTPEND_ID_Pos 0 </span></div>
<div class="line"><a name="l00218"></a><span class="lineno"> 218</span>&#160;<span class="preprocessor">#define EVSYS_INTPEND_ID_Msk (_U_(0xF) &lt;&lt; EVSYS_INTPEND_ID_Pos)</span></div>
<div class="line"><a name="l00219"></a><span class="lineno"> 219</span>&#160;<span class="preprocessor">#define EVSYS_INTPEND_ID(value) (EVSYS_INTPEND_ID_Msk &amp; ((value) &lt;&lt; EVSYS_INTPEND_ID_Pos))</span></div>
<div class="line"><a name="l00220"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a8c1104a142c6a25674be8f2d45dcae65"> 220</a></span>&#160;<span class="preprocessor">#define EVSYS_INTPEND_OVR_Pos 8 </span></div>
<div class="line"><a name="l00221"></a><span class="lineno"> 221</span>&#160;<span class="preprocessor">#define EVSYS_INTPEND_OVR (_U_(0x1) &lt;&lt; EVSYS_INTPEND_OVR_Pos)</span></div>
<div class="line"><a name="l00222"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a1b2b1e781a35406341bc89903afdf9dc"> 222</a></span>&#160;<span class="preprocessor">#define EVSYS_INTPEND_EVD_Pos 9 </span></div>
<div class="line"><a name="l00223"></a><span class="lineno"> 223</span>&#160;<span class="preprocessor">#define EVSYS_INTPEND_EVD (_U_(0x1) &lt;&lt; EVSYS_INTPEND_EVD_Pos)</span></div>
<div class="line"><a name="l00224"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a98226e8785369fd70b510afdf72cbae1"> 224</a></span>&#160;<span class="preprocessor">#define EVSYS_INTPEND_READY_Pos 14 </span></div>
<div class="line"><a name="l00225"></a><span class="lineno"> 225</span>&#160;<span class="preprocessor">#define EVSYS_INTPEND_READY (_U_(0x1) &lt;&lt; EVSYS_INTPEND_READY_Pos)</span></div>
<div class="line"><a name="l00226"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a16ecf00a467bf2cdae4a704e0e203190"> 226</a></span>&#160;<span class="preprocessor">#define EVSYS_INTPEND_BUSY_Pos 15 </span></div>
<div class="line"><a name="l00227"></a><span class="lineno"> 227</span>&#160;<span class="preprocessor">#define EVSYS_INTPEND_BUSY (_U_(0x1) &lt;&lt; EVSYS_INTPEND_BUSY_Pos)</span></div>
<div class="line"><a name="l00228"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#aa4da0e6e9fe9d2848c3886d3a4151c29"> 228</a></span>&#160;<span class="preprocessor">#define EVSYS_INTPEND_MASK _U_(0xC30F) </span></div>
<div class="line"><a name="l00230"></a><span class="lineno"> 230</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- EVSYS_INTSTATUS : (EVSYS Offset: 0x014) (R/ 32) Interrupt Status -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00231"></a><span class="lineno"> 231</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00232"></a><span class="lineno"><a class="line" href="unionEVSYS__INTSTATUS__Type.html"> 232</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00233"></a><span class="lineno"> 233</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00234"></a><span class="lineno"><a class="line" href="unionEVSYS__INTSTATUS__Type.html#ae744818d60a29a341b93aa9ff55856fe"> 234</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__INTSTATUS__Type.html#ae744818d60a29a341b93aa9ff55856fe">CHINT0</a>:1; </div>
<div class="line"><a name="l00235"></a><span class="lineno"><a class="line" href="unionEVSYS__INTSTATUS__Type.html#abe8e2c652f26d4a33346f8f68b530a65"> 235</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__INTSTATUS__Type.html#abe8e2c652f26d4a33346f8f68b530a65">CHINT1</a>:1; </div>
<div class="line"><a name="l00236"></a><span class="lineno"><a class="line" href="unionEVSYS__INTSTATUS__Type.html#a1388229c2abe85acd870ea58775388ae"> 236</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__INTSTATUS__Type.html#a1388229c2abe85acd870ea58775388ae">CHINT2</a>:1; </div>
<div class="line"><a name="l00237"></a><span class="lineno"><a class="line" href="unionEVSYS__INTSTATUS__Type.html#a54fbf4cd24f7099cd498ed7c39dadc9c"> 237</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__INTSTATUS__Type.html#a54fbf4cd24f7099cd498ed7c39dadc9c">CHINT3</a>:1; </div>
<div class="line"><a name="l00238"></a><span class="lineno"><a class="line" href="unionEVSYS__INTSTATUS__Type.html#a4303b634a1ed948b9f129a6f634296e1"> 238</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__INTSTATUS__Type.html#a4303b634a1ed948b9f129a6f634296e1">CHINT4</a>:1; </div>
<div class="line"><a name="l00239"></a><span class="lineno"><a class="line" href="unionEVSYS__INTSTATUS__Type.html#aa43528dc62dd1ff790c2c4ffbf6b4eca"> 239</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__INTSTATUS__Type.html#aa43528dc62dd1ff790c2c4ffbf6b4eca">CHINT5</a>:1; </div>
<div class="line"><a name="l00240"></a><span class="lineno"><a class="line" href="unionEVSYS__INTSTATUS__Type.html#a217c238e2d667ef547bddf4d006b0597"> 240</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__INTSTATUS__Type.html#a217c238e2d667ef547bddf4d006b0597">CHINT6</a>:1; </div>
<div class="line"><a name="l00241"></a><span class="lineno"><a class="line" href="unionEVSYS__INTSTATUS__Type.html#a2d4f3bd0c621b3a62e972fa8e4ea1fcf"> 241</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__INTSTATUS__Type.html#a2d4f3bd0c621b3a62e972fa8e4ea1fcf">CHINT7</a>:1; </div>
<div class="line"><a name="l00242"></a><span class="lineno"><a class="line" href="unionEVSYS__INTSTATUS__Type.html#a1d9b4c74e30f3fc0e7d2794d4e61c666"> 242</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__INTSTATUS__Type.html#a1d9b4c74e30f3fc0e7d2794d4e61c666">CHINT8</a>:1; </div>
<div class="line"><a name="l00243"></a><span class="lineno"><a class="line" href="unionEVSYS__INTSTATUS__Type.html#a9efc80e345b030cf5cc3825fa673eccb"> 243</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__INTSTATUS__Type.html#a9efc80e345b030cf5cc3825fa673eccb">CHINT9</a>:1; </div>
<div class="line"><a name="l00244"></a><span class="lineno"><a class="line" href="unionEVSYS__INTSTATUS__Type.html#a3ea86875e5af7a10c4a1b110b3eb495d"> 244</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__INTSTATUS__Type.html#a3ea86875e5af7a10c4a1b110b3eb495d">CHINT10</a>:1; </div>
<div class="line"><a name="l00245"></a><span class="lineno"><a class="line" href="unionEVSYS__INTSTATUS__Type.html#a80e5d870449689602efce44bcabf2491"> 245</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__INTSTATUS__Type.html#a80e5d870449689602efce44bcabf2491">CHINT11</a>:1; </div>
<div class="line"><a name="l00246"></a><span class="lineno"><a class="line" href="unionEVSYS__INTSTATUS__Type.html#a7ae9f70c8fa597d6cdfa4ff9622b818b"> 246</a></span>&#160; uint32_t :20; </div>
<div class="line"><a name="l00247"></a><span class="lineno"><a class="line" href="unionEVSYS__INTSTATUS__Type.html#a15aabefe1aa123eb9377e371091f6f11"> 247</a></span>&#160; } bit; </div>
<div class="line"><a name="l00248"></a><span class="lineno"> 248</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00249"></a><span class="lineno"><a class="line" href="unionEVSYS__INTSTATUS__Type.html#a9b331abf116ee19a98a3bbc46a026af5"> 249</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__INTSTATUS__Type.html#a9b331abf116ee19a98a3bbc46a026af5">CHINT</a>:12; </div>
<div class="line"><a name="l00250"></a><span class="lineno"> 250</span>&#160; uint32_t :20; </div>
<div class="line"><a name="l00251"></a><span class="lineno"><a class="line" href="unionEVSYS__INTSTATUS__Type.html#afbae033ca6d519e9f5027239e63c925d"> 251</a></span>&#160; } vec; </div>
<div class="line"><a name="l00252"></a><span class="lineno"><a class="line" href="unionEVSYS__INTSTATUS__Type.html#a2acccc2b6a656b8d1592a8aa57e3561e"> 252</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__INTSTATUS__Type.html#a2acccc2b6a656b8d1592a8aa57e3561e">reg</a>; </div>
<div class="line"><a name="l00253"></a><span class="lineno"> 253</span>&#160;} <a class="code" href="unionEVSYS__INTSTATUS__Type.html">EVSYS_INTSTATUS_Type</a>;</div>
<div class="line"><a name="l00254"></a><span class="lineno"> 254</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00255"></a><span class="lineno"> 255</span>&#160; </div>
<div class="line"><a name="l00256"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a887c293978f2612cc4c43696d9555ab7"> 256</a></span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_OFFSET 0x014 </span></div>
<div class="line"><a name="l00257"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a7348ea31c54f3312ff0dd8b5e3d6658a"> 257</a></span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00259"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a97062c5d5ab65176401343401b29b24a"> 259</a></span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT0_Pos 0 </span></div>
<div class="line"><a name="l00260"></a><span class="lineno"> 260</span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT0 (_U_(1) &lt;&lt; EVSYS_INTSTATUS_CHINT0_Pos)</span></div>
<div class="line"><a name="l00261"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#ad4059d207e23e631337f526b70361899"> 261</a></span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT1_Pos 1 </span></div>
<div class="line"><a name="l00262"></a><span class="lineno"> 262</span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT1 (_U_(1) &lt;&lt; EVSYS_INTSTATUS_CHINT1_Pos)</span></div>
<div class="line"><a name="l00263"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a0524377938c821b77964b2abce1079ec"> 263</a></span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT2_Pos 2 </span></div>
<div class="line"><a name="l00264"></a><span class="lineno"> 264</span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT2 (_U_(1) &lt;&lt; EVSYS_INTSTATUS_CHINT2_Pos)</span></div>
<div class="line"><a name="l00265"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a6551037c5d3cbb294b797cd46cab4e5b"> 265</a></span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT3_Pos 3 </span></div>
<div class="line"><a name="l00266"></a><span class="lineno"> 266</span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT3 (_U_(1) &lt;&lt; EVSYS_INTSTATUS_CHINT3_Pos)</span></div>
<div class="line"><a name="l00267"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a93f624f10633a14d6e6ce2342b1e6ede"> 267</a></span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT4_Pos 4 </span></div>
<div class="line"><a name="l00268"></a><span class="lineno"> 268</span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT4 (_U_(1) &lt;&lt; EVSYS_INTSTATUS_CHINT4_Pos)</span></div>
<div class="line"><a name="l00269"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#ad6242e40f057626ce0bd2a8511d9b327"> 269</a></span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT5_Pos 5 </span></div>
<div class="line"><a name="l00270"></a><span class="lineno"> 270</span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT5 (_U_(1) &lt;&lt; EVSYS_INTSTATUS_CHINT5_Pos)</span></div>
<div class="line"><a name="l00271"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a04fa2d3a77eebb0d8a5070c2ec963fec"> 271</a></span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT6_Pos 6 </span></div>
<div class="line"><a name="l00272"></a><span class="lineno"> 272</span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT6 (_U_(1) &lt;&lt; EVSYS_INTSTATUS_CHINT6_Pos)</span></div>
<div class="line"><a name="l00273"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#adfd7ca8c1241b8ba45bd20923218ff5a"> 273</a></span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT7_Pos 7 </span></div>
<div class="line"><a name="l00274"></a><span class="lineno"> 274</span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT7 (_U_(1) &lt;&lt; EVSYS_INTSTATUS_CHINT7_Pos)</span></div>
<div class="line"><a name="l00275"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#abfefcbbaff8fdd2882a3e0f02e8db9e9"> 275</a></span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT8_Pos 8 </span></div>
<div class="line"><a name="l00276"></a><span class="lineno"> 276</span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT8 (_U_(1) &lt;&lt; EVSYS_INTSTATUS_CHINT8_Pos)</span></div>
<div class="line"><a name="l00277"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#ab2dc2470f575a323b9946c75998deba4"> 277</a></span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT9_Pos 9 </span></div>
<div class="line"><a name="l00278"></a><span class="lineno"> 278</span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT9 (_U_(1) &lt;&lt; EVSYS_INTSTATUS_CHINT9_Pos)</span></div>
<div class="line"><a name="l00279"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#ad0ce19dee65616fd8ed4e960feb0abcd"> 279</a></span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT10_Pos 10 </span></div>
<div class="line"><a name="l00280"></a><span class="lineno"> 280</span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT10 (_U_(1) &lt;&lt; EVSYS_INTSTATUS_CHINT10_Pos)</span></div>
<div class="line"><a name="l00281"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#ad8c12352bc05b7fa429633bb41187834"> 281</a></span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT11_Pos 11 </span></div>
<div class="line"><a name="l00282"></a><span class="lineno"> 282</span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT11 (_U_(1) &lt;&lt; EVSYS_INTSTATUS_CHINT11_Pos)</span></div>
<div class="line"><a name="l00283"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#adc9042266d45a3b79992034d0c05ae0e"> 283</a></span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT_Pos 0 </span></div>
<div class="line"><a name="l00284"></a><span class="lineno"> 284</span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT_Msk (_U_(0xFFF) &lt;&lt; EVSYS_INTSTATUS_CHINT_Pos)</span></div>
<div class="line"><a name="l00285"></a><span class="lineno"> 285</span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_CHINT(value) (EVSYS_INTSTATUS_CHINT_Msk &amp; ((value) &lt;&lt; EVSYS_INTSTATUS_CHINT_Pos))</span></div>
<div class="line"><a name="l00286"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a7575ca1fa09c931a05762f10a8127cef"> 286</a></span>&#160;<span class="preprocessor">#define EVSYS_INTSTATUS_MASK _U_(0x00000FFF) </span></div>
<div class="line"><a name="l00288"></a><span class="lineno"> 288</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- EVSYS_BUSYCH : (EVSYS Offset: 0x018) (R/ 32) Busy Channels -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00289"></a><span class="lineno"> 289</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00290"></a><span class="lineno"><a class="line" href="unionEVSYS__BUSYCH__Type.html"> 290</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00291"></a><span class="lineno"> 291</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00292"></a><span class="lineno"><a class="line" href="unionEVSYS__BUSYCH__Type.html#af85166fbdea242cc8cd3280148fce510"> 292</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__BUSYCH__Type.html#af85166fbdea242cc8cd3280148fce510">BUSYCH0</a>:1; </div>
<div class="line"><a name="l00293"></a><span class="lineno"><a class="line" href="unionEVSYS__BUSYCH__Type.html#ae66b7089cbc8cbebfaf6fd762ffeb841"> 293</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__BUSYCH__Type.html#ae66b7089cbc8cbebfaf6fd762ffeb841">BUSYCH1</a>:1; </div>
<div class="line"><a name="l00294"></a><span class="lineno"><a class="line" href="unionEVSYS__BUSYCH__Type.html#aa47796a8869a9cd4257ec4b70d4f48b6"> 294</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__BUSYCH__Type.html#aa47796a8869a9cd4257ec4b70d4f48b6">BUSYCH2</a>:1; </div>
<div class="line"><a name="l00295"></a><span class="lineno"><a class="line" href="unionEVSYS__BUSYCH__Type.html#a195579a4b7acd66c898b0344101276d4"> 295</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__BUSYCH__Type.html#a195579a4b7acd66c898b0344101276d4">BUSYCH3</a>:1; </div>
<div class="line"><a name="l00296"></a><span class="lineno"><a class="line" href="unionEVSYS__BUSYCH__Type.html#a003799a1d83aed1c7ce06661ea410e2e"> 296</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__BUSYCH__Type.html#a003799a1d83aed1c7ce06661ea410e2e">BUSYCH4</a>:1; </div>
<div class="line"><a name="l00297"></a><span class="lineno"><a class="line" href="unionEVSYS__BUSYCH__Type.html#a4eec5298f1e49f411114c8ba3afcf649"> 297</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__BUSYCH__Type.html#a4eec5298f1e49f411114c8ba3afcf649">BUSYCH5</a>:1; </div>
<div class="line"><a name="l00298"></a><span class="lineno"><a class="line" href="unionEVSYS__BUSYCH__Type.html#aae241933c725aa6ad3e2f6514c6fe5fb"> 298</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__BUSYCH__Type.html#aae241933c725aa6ad3e2f6514c6fe5fb">BUSYCH6</a>:1; </div>
<div class="line"><a name="l00299"></a><span class="lineno"><a class="line" href="unionEVSYS__BUSYCH__Type.html#af5ee390a7ebd0df7e8a4c58fa1fe190c"> 299</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__BUSYCH__Type.html#af5ee390a7ebd0df7e8a4c58fa1fe190c">BUSYCH7</a>:1; </div>
<div class="line"><a name="l00300"></a><span class="lineno"><a class="line" href="unionEVSYS__BUSYCH__Type.html#a208234c8b3959e3d57517ccbbf6f531e"> 300</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__BUSYCH__Type.html#a208234c8b3959e3d57517ccbbf6f531e">BUSYCH8</a>:1; </div>
<div class="line"><a name="l00301"></a><span class="lineno"><a class="line" href="unionEVSYS__BUSYCH__Type.html#acb41644cdba9854ba05dfbd9257644f7"> 301</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__BUSYCH__Type.html#acb41644cdba9854ba05dfbd9257644f7">BUSYCH9</a>:1; </div>
<div class="line"><a name="l00302"></a><span class="lineno"><a class="line" href="unionEVSYS__BUSYCH__Type.html#af97137b101bfd121da36fb3db81b43d0"> 302</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__BUSYCH__Type.html#af97137b101bfd121da36fb3db81b43d0">BUSYCH10</a>:1; </div>
<div class="line"><a name="l00303"></a><span class="lineno"><a class="line" href="unionEVSYS__BUSYCH__Type.html#a3068aff4e231f798151ad761b4d2e077"> 303</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__BUSYCH__Type.html#a3068aff4e231f798151ad761b4d2e077">BUSYCH11</a>:1; </div>
<div class="line"><a name="l00304"></a><span class="lineno"><a class="line" href="unionEVSYS__BUSYCH__Type.html#ae1503a3c02625ce0c0d56b122d8d9316"> 304</a></span>&#160; uint32_t :20; </div>
<div class="line"><a name="l00305"></a><span class="lineno"><a class="line" href="unionEVSYS__BUSYCH__Type.html#ae88c7d0dfcc391d521b06623d682c9fe"> 305</a></span>&#160; } bit; </div>
<div class="line"><a name="l00306"></a><span class="lineno"> 306</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00307"></a><span class="lineno"><a class="line" href="unionEVSYS__BUSYCH__Type.html#a6287db53bda54ae2381743346c23cee7"> 307</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__BUSYCH__Type.html#a6287db53bda54ae2381743346c23cee7">BUSYCH</a>:12; </div>
<div class="line"><a name="l00308"></a><span class="lineno"> 308</span>&#160; uint32_t :20; </div>
<div class="line"><a name="l00309"></a><span class="lineno"><a class="line" href="unionEVSYS__BUSYCH__Type.html#a4f08e10c94f41fb1e5d96dd98efe8bea"> 309</a></span>&#160; } vec; </div>
<div class="line"><a name="l00310"></a><span class="lineno"><a class="line" href="unionEVSYS__BUSYCH__Type.html#afd800a8ff5b1f2c3a4caec31ee2d3bd1"> 310</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__BUSYCH__Type.html#afd800a8ff5b1f2c3a4caec31ee2d3bd1">reg</a>; </div>
<div class="line"><a name="l00311"></a><span class="lineno"> 311</span>&#160;} <a class="code" href="unionEVSYS__BUSYCH__Type.html">EVSYS_BUSYCH_Type</a>;</div>
<div class="line"><a name="l00312"></a><span class="lineno"> 312</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00313"></a><span class="lineno"> 313</span>&#160; </div>
<div class="line"><a name="l00314"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a40bd649f5ae971447938d631f895a6e5"> 314</a></span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_OFFSET 0x018 </span></div>
<div class="line"><a name="l00315"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#aa30e3348e7fff4d109c80a727b0905c5"> 315</a></span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00317"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#aea7a7c237dd60f7ab9636fa22ac7ae67"> 317</a></span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH0_Pos 0 </span></div>
<div class="line"><a name="l00318"></a><span class="lineno"> 318</span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH0 (_U_(1) &lt;&lt; EVSYS_BUSYCH_BUSYCH0_Pos)</span></div>
<div class="line"><a name="l00319"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#aa583382023d2f433ad5fa7215733968e"> 319</a></span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH1_Pos 1 </span></div>
<div class="line"><a name="l00320"></a><span class="lineno"> 320</span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH1 (_U_(1) &lt;&lt; EVSYS_BUSYCH_BUSYCH1_Pos)</span></div>
<div class="line"><a name="l00321"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a2bd90ef918e1777a8a5152a155859823"> 321</a></span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH2_Pos 2 </span></div>
<div class="line"><a name="l00322"></a><span class="lineno"> 322</span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH2 (_U_(1) &lt;&lt; EVSYS_BUSYCH_BUSYCH2_Pos)</span></div>
<div class="line"><a name="l00323"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a9e239e4344b1f329e023d35a35a3c947"> 323</a></span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH3_Pos 3 </span></div>
<div class="line"><a name="l00324"></a><span class="lineno"> 324</span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH3 (_U_(1) &lt;&lt; EVSYS_BUSYCH_BUSYCH3_Pos)</span></div>
<div class="line"><a name="l00325"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a2263a8ef1fa84dd6dcf6b2b8642a8624"> 325</a></span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH4_Pos 4 </span></div>
<div class="line"><a name="l00326"></a><span class="lineno"> 326</span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH4 (_U_(1) &lt;&lt; EVSYS_BUSYCH_BUSYCH4_Pos)</span></div>
<div class="line"><a name="l00327"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a17ce95bc9a42d9424018266b735ac970"> 327</a></span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH5_Pos 5 </span></div>
<div class="line"><a name="l00328"></a><span class="lineno"> 328</span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH5 (_U_(1) &lt;&lt; EVSYS_BUSYCH_BUSYCH5_Pos)</span></div>
<div class="line"><a name="l00329"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#af44ddfc414d6ae8bb042bc3a34f59cb7"> 329</a></span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH6_Pos 6 </span></div>
<div class="line"><a name="l00330"></a><span class="lineno"> 330</span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH6 (_U_(1) &lt;&lt; EVSYS_BUSYCH_BUSYCH6_Pos)</span></div>
<div class="line"><a name="l00331"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#aa879af03ee70a21a534dcd9ef7d16df8"> 331</a></span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH7_Pos 7 </span></div>
<div class="line"><a name="l00332"></a><span class="lineno"> 332</span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH7 (_U_(1) &lt;&lt; EVSYS_BUSYCH_BUSYCH7_Pos)</span></div>
<div class="line"><a name="l00333"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a00f958ac44d756d6b9ce9c87a850b943"> 333</a></span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH8_Pos 8 </span></div>
<div class="line"><a name="l00334"></a><span class="lineno"> 334</span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH8 (_U_(1) &lt;&lt; EVSYS_BUSYCH_BUSYCH8_Pos)</span></div>
<div class="line"><a name="l00335"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#ababf222bab683309ee349da6383f2ea8"> 335</a></span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH9_Pos 9 </span></div>
<div class="line"><a name="l00336"></a><span class="lineno"> 336</span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH9 (_U_(1) &lt;&lt; EVSYS_BUSYCH_BUSYCH9_Pos)</span></div>
<div class="line"><a name="l00337"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#af0cb4cb2733209e071332c720a3bd00f"> 337</a></span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH10_Pos 10 </span></div>
<div class="line"><a name="l00338"></a><span class="lineno"> 338</span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH10 (_U_(1) &lt;&lt; EVSYS_BUSYCH_BUSYCH10_Pos)</span></div>
<div class="line"><a name="l00339"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#ad24bcebbaa85d1b2badda55fc4ef30c9"> 339</a></span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH11_Pos 11 </span></div>
<div class="line"><a name="l00340"></a><span class="lineno"> 340</span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH11 (_U_(1) &lt;&lt; EVSYS_BUSYCH_BUSYCH11_Pos)</span></div>
<div class="line"><a name="l00341"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a61683678a21d67121554b4a91668388d"> 341</a></span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH_Pos 0 </span></div>
<div class="line"><a name="l00342"></a><span class="lineno"> 342</span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH_Msk (_U_(0xFFF) &lt;&lt; EVSYS_BUSYCH_BUSYCH_Pos)</span></div>
<div class="line"><a name="l00343"></a><span class="lineno"> 343</span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_BUSYCH(value) (EVSYS_BUSYCH_BUSYCH_Msk &amp; ((value) &lt;&lt; EVSYS_BUSYCH_BUSYCH_Pos))</span></div>
<div class="line"><a name="l00344"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a28cb2495bf2577963af2e91f494e0a9c"> 344</a></span>&#160;<span class="preprocessor">#define EVSYS_BUSYCH_MASK _U_(0x00000FFF) </span></div>
<div class="line"><a name="l00346"></a><span class="lineno"> 346</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- EVSYS_READYUSR : (EVSYS Offset: 0x01C) (R/ 32) Ready Users -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00347"></a><span class="lineno"> 347</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00348"></a><span class="lineno"><a class="line" href="unionEVSYS__READYUSR__Type.html"> 348</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00349"></a><span class="lineno"> 349</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00350"></a><span class="lineno"><a class="line" href="unionEVSYS__READYUSR__Type.html#a26a2e2766077884c18b6b373cf96dbb4"> 350</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__READYUSR__Type.html#a26a2e2766077884c18b6b373cf96dbb4">READYUSR0</a>:1; </div>
<div class="line"><a name="l00351"></a><span class="lineno"><a class="line" href="unionEVSYS__READYUSR__Type.html#a3d1b6c2bc261acee6933d1dc3c85729b"> 351</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__READYUSR__Type.html#a3d1b6c2bc261acee6933d1dc3c85729b">READYUSR1</a>:1; </div>
<div class="line"><a name="l00352"></a><span class="lineno"><a class="line" href="unionEVSYS__READYUSR__Type.html#accab51ff94c695455a1aee0281627c74"> 352</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__READYUSR__Type.html#accab51ff94c695455a1aee0281627c74">READYUSR2</a>:1; </div>
<div class="line"><a name="l00353"></a><span class="lineno"><a class="line" href="unionEVSYS__READYUSR__Type.html#ab43ee2a0d0490231d7ea9effcbbfe594"> 353</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__READYUSR__Type.html#ab43ee2a0d0490231d7ea9effcbbfe594">READYUSR3</a>:1; </div>
<div class="line"><a name="l00354"></a><span class="lineno"><a class="line" href="unionEVSYS__READYUSR__Type.html#a5c2074f3248bd698de21b3935aa7f52c"> 354</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__READYUSR__Type.html#a5c2074f3248bd698de21b3935aa7f52c">READYUSR4</a>:1; </div>
<div class="line"><a name="l00355"></a><span class="lineno"><a class="line" href="unionEVSYS__READYUSR__Type.html#aa875aa9b2d31ee586ec7c552f3268ebb"> 355</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__READYUSR__Type.html#aa875aa9b2d31ee586ec7c552f3268ebb">READYUSR5</a>:1; </div>
<div class="line"><a name="l00356"></a><span class="lineno"><a class="line" href="unionEVSYS__READYUSR__Type.html#afee39ac2378b33e745ff84373e9cf25f"> 356</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__READYUSR__Type.html#afee39ac2378b33e745ff84373e9cf25f">READYUSR6</a>:1; </div>
<div class="line"><a name="l00357"></a><span class="lineno"><a class="line" href="unionEVSYS__READYUSR__Type.html#a065947513d41a8a672986891a3863ef8"> 357</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__READYUSR__Type.html#a065947513d41a8a672986891a3863ef8">READYUSR7</a>:1; </div>
<div class="line"><a name="l00358"></a><span class="lineno"><a class="line" href="unionEVSYS__READYUSR__Type.html#ace82355578ca90b4f15feaf629aa96eb"> 358</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__READYUSR__Type.html#ace82355578ca90b4f15feaf629aa96eb">READYUSR8</a>:1; </div>
<div class="line"><a name="l00359"></a><span class="lineno"><a class="line" href="unionEVSYS__READYUSR__Type.html#a895b4e4e87ab9b546b631795f26beef2"> 359</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__READYUSR__Type.html#a895b4e4e87ab9b546b631795f26beef2">READYUSR9</a>:1; </div>
<div class="line"><a name="l00360"></a><span class="lineno"><a class="line" href="unionEVSYS__READYUSR__Type.html#aeec88f66b77de2cd4eaea17714ac3bea"> 360</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__READYUSR__Type.html#aeec88f66b77de2cd4eaea17714ac3bea">READYUSR10</a>:1; </div>
<div class="line"><a name="l00361"></a><span class="lineno"><a class="line" href="unionEVSYS__READYUSR__Type.html#a40f190152d3cb358c73d78b4126db9f9"> 361</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__READYUSR__Type.html#a40f190152d3cb358c73d78b4126db9f9">READYUSR11</a>:1; </div>
<div class="line"><a name="l00362"></a><span class="lineno"><a class="line" href="unionEVSYS__READYUSR__Type.html#a7e2bd47f446248953ca2b66d8ce97340"> 362</a></span>&#160; uint32_t :20; </div>
<div class="line"><a name="l00363"></a><span class="lineno"><a class="line" href="unionEVSYS__READYUSR__Type.html#a95b931149929ee0602695605db7235ae"> 363</a></span>&#160; } bit; </div>
<div class="line"><a name="l00364"></a><span class="lineno"> 364</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00365"></a><span class="lineno"><a class="line" href="unionEVSYS__READYUSR__Type.html#a2e4211902250f83efdaa996fe3623779"> 365</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__READYUSR__Type.html#a2e4211902250f83efdaa996fe3623779">READYUSR</a>:12; </div>
<div class="line"><a name="l00366"></a><span class="lineno"> 366</span>&#160; uint32_t :20; </div>
<div class="line"><a name="l00367"></a><span class="lineno"><a class="line" href="unionEVSYS__READYUSR__Type.html#a9bb80e09b63bec92f941a5d7123eb247"> 367</a></span>&#160; } vec; </div>
<div class="line"><a name="l00368"></a><span class="lineno"><a class="line" href="unionEVSYS__READYUSR__Type.html#a85c716b5641cda08529420da6a023a4d"> 368</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__READYUSR__Type.html#a85c716b5641cda08529420da6a023a4d">reg</a>; </div>
<div class="line"><a name="l00369"></a><span class="lineno"> 369</span>&#160;} <a class="code" href="unionEVSYS__READYUSR__Type.html">EVSYS_READYUSR_Type</a>;</div>
<div class="line"><a name="l00370"></a><span class="lineno"> 370</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00371"></a><span class="lineno"> 371</span>&#160; </div>
<div class="line"><a name="l00372"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#ad5c816ad5a5fe7304367bd6a68c62ca8"> 372</a></span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_OFFSET 0x01C </span></div>
<div class="line"><a name="l00373"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a9f4f8a9e758eb78dc2fb69e67a951da5"> 373</a></span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_RESETVALUE _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00375"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a66d6e0339c306de22765611c46d1aaba"> 375</a></span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR0_Pos 0 </span></div>
<div class="line"><a name="l00376"></a><span class="lineno"> 376</span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR0 (_U_(1) &lt;&lt; EVSYS_READYUSR_READYUSR0_Pos)</span></div>
<div class="line"><a name="l00377"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#aa51cb3896b6fa5216ff61078aaf07c85"> 377</a></span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR1_Pos 1 </span></div>
<div class="line"><a name="l00378"></a><span class="lineno"> 378</span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR1 (_U_(1) &lt;&lt; EVSYS_READYUSR_READYUSR1_Pos)</span></div>
<div class="line"><a name="l00379"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#ab44f83aead2c93ff21d3ec5f2b2acd2a"> 379</a></span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR2_Pos 2 </span></div>
<div class="line"><a name="l00380"></a><span class="lineno"> 380</span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR2 (_U_(1) &lt;&lt; EVSYS_READYUSR_READYUSR2_Pos)</span></div>
<div class="line"><a name="l00381"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a8ab422175017b88560a3604dc1b7924b"> 381</a></span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR3_Pos 3 </span></div>
<div class="line"><a name="l00382"></a><span class="lineno"> 382</span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR3 (_U_(1) &lt;&lt; EVSYS_READYUSR_READYUSR3_Pos)</span></div>
<div class="line"><a name="l00383"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#af7e929036426ba0dc7ba39d64ff4cb9d"> 383</a></span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR4_Pos 4 </span></div>
<div class="line"><a name="l00384"></a><span class="lineno"> 384</span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR4 (_U_(1) &lt;&lt; EVSYS_READYUSR_READYUSR4_Pos)</span></div>
<div class="line"><a name="l00385"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a02998b416b85512425e6e65384c0672a"> 385</a></span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR5_Pos 5 </span></div>
<div class="line"><a name="l00386"></a><span class="lineno"> 386</span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR5 (_U_(1) &lt;&lt; EVSYS_READYUSR_READYUSR5_Pos)</span></div>
<div class="line"><a name="l00387"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a0ee4b1199eda7995e01047e6f3dc4b2f"> 387</a></span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR6_Pos 6 </span></div>
<div class="line"><a name="l00388"></a><span class="lineno"> 388</span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR6 (_U_(1) &lt;&lt; EVSYS_READYUSR_READYUSR6_Pos)</span></div>
<div class="line"><a name="l00389"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a30d180998696358eff3b09e58f081014"> 389</a></span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR7_Pos 7 </span></div>
<div class="line"><a name="l00390"></a><span class="lineno"> 390</span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR7 (_U_(1) &lt;&lt; EVSYS_READYUSR_READYUSR7_Pos)</span></div>
<div class="line"><a name="l00391"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a92644c1234fe78f1c2137e0b96ef7db3"> 391</a></span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR8_Pos 8 </span></div>
<div class="line"><a name="l00392"></a><span class="lineno"> 392</span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR8 (_U_(1) &lt;&lt; EVSYS_READYUSR_READYUSR8_Pos)</span></div>
<div class="line"><a name="l00393"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a0639b34b9b188b910443c517bbcbc735"> 393</a></span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR9_Pos 9 </span></div>
<div class="line"><a name="l00394"></a><span class="lineno"> 394</span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR9 (_U_(1) &lt;&lt; EVSYS_READYUSR_READYUSR9_Pos)</span></div>
<div class="line"><a name="l00395"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a0b04fc9d287be7ee56309fff5a7e5426"> 395</a></span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR10_Pos 10 </span></div>
<div class="line"><a name="l00396"></a><span class="lineno"> 396</span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR10 (_U_(1) &lt;&lt; EVSYS_READYUSR_READYUSR10_Pos)</span></div>
<div class="line"><a name="l00397"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#aafab78921ac5f3c9d55f04597ab54e7c"> 397</a></span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR11_Pos 11 </span></div>
<div class="line"><a name="l00398"></a><span class="lineno"> 398</span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR11 (_U_(1) &lt;&lt; EVSYS_READYUSR_READYUSR11_Pos)</span></div>
<div class="line"><a name="l00399"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a368c68ce29813958f461ceaee83ddf51"> 399</a></span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR_Pos 0 </span></div>
<div class="line"><a name="l00400"></a><span class="lineno"> 400</span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR_Msk (_U_(0xFFF) &lt;&lt; EVSYS_READYUSR_READYUSR_Pos)</span></div>
<div class="line"><a name="l00401"></a><span class="lineno"> 401</span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_READYUSR(value) (EVSYS_READYUSR_READYUSR_Msk &amp; ((value) &lt;&lt; EVSYS_READYUSR_READYUSR_Pos))</span></div>
<div class="line"><a name="l00402"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a763be5cee260e2ce7c14cf0e03110c2f"> 402</a></span>&#160;<span class="preprocessor">#define EVSYS_READYUSR_MASK _U_(0x00000FFF) </span></div>
<div class="line"><a name="l00404"></a><span class="lineno"> 404</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- EVSYS_CHANNEL : (EVSYS Offset: 0x020) (R/W 32) CHANNEL Channel n Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00405"></a><span class="lineno"> 405</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00406"></a><span class="lineno"><a class="line" href="unionEVSYS__CHANNEL__Type.html"> 406</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00407"></a><span class="lineno"> 407</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00408"></a><span class="lineno"><a class="line" href="unionEVSYS__CHANNEL__Type.html#a0957aff322bb3ee83788e1abd7eb6e75"> 408</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__CHANNEL__Type.html#a0957aff322bb3ee83788e1abd7eb6e75">EVGEN</a>:7; </div>
<div class="line"><a name="l00409"></a><span class="lineno"><a class="line" href="unionEVSYS__CHANNEL__Type.html#af696a80e990e1f040004a329f997fc70"> 409</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00410"></a><span class="lineno"><a class="line" href="unionEVSYS__CHANNEL__Type.html#ad728121f372e812fa7402884e8d22781"> 410</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__CHANNEL__Type.html#ad728121f372e812fa7402884e8d22781">PATH</a>:2; </div>
<div class="line"><a name="l00411"></a><span class="lineno"><a class="line" href="unionEVSYS__CHANNEL__Type.html#adc808d5b320a64575d6bb66885730661"> 411</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__CHANNEL__Type.html#adc808d5b320a64575d6bb66885730661">EDGSEL</a>:2; </div>
<div class="line"><a name="l00412"></a><span class="lineno"><a class="line" href="unionEVSYS__CHANNEL__Type.html#afb7932431f248ab57790766367f5f031"> 412</a></span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00413"></a><span class="lineno"><a class="line" href="unionEVSYS__CHANNEL__Type.html#a3588ca86407d2d644a0245f89ebec049"> 413</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__CHANNEL__Type.html#a3588ca86407d2d644a0245f89ebec049">RUNSTDBY</a>:1; </div>
<div class="line"><a name="l00414"></a><span class="lineno"><a class="line" href="unionEVSYS__CHANNEL__Type.html#a5c137c1a5e6b8e02df3eda0ef5167fb3"> 414</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__CHANNEL__Type.html#a5c137c1a5e6b8e02df3eda0ef5167fb3">ONDEMAND</a>:1; </div>
<div class="line"><a name="l00415"></a><span class="lineno"><a class="line" href="unionEVSYS__CHANNEL__Type.html#abdc81f1e053d75b4df295e6d2660ae64"> 415</a></span>&#160; uint32_t :16; </div>
<div class="line"><a name="l00416"></a><span class="lineno"><a class="line" href="unionEVSYS__CHANNEL__Type.html#aa86bb4bd89d1d828df18bc1e8ba8c575"> 416</a></span>&#160; } bit; </div>
<div class="line"><a name="l00417"></a><span class="lineno"><a class="line" href="unionEVSYS__CHANNEL__Type.html#a65fa25c1930ca41265f2e5f002139c62"> 417</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__CHANNEL__Type.html#a65fa25c1930ca41265f2e5f002139c62">reg</a>; </div>
<div class="line"><a name="l00418"></a><span class="lineno"> 418</span>&#160;} <a class="code" href="unionEVSYS__CHANNEL__Type.html">EVSYS_CHANNEL_Type</a>;</div>
<div class="line"><a name="l00419"></a><span class="lineno"> 419</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00420"></a><span class="lineno"> 420</span>&#160; </div>
<div class="line"><a name="l00421"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a1c32a9bc329d630176a5c3ee341041d9"> 421</a></span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_OFFSET 0x020 </span></div>
<div class="line"><a name="l00422"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#aae954ef91a3c4d06efe030fec2c37dda"> 422</a></span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_RESETVALUE _U_(0x00008000) </span></div>
<div class="line"><a name="l00424"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a49da646ddac2acf9b067c8299b5f6335"> 424</a></span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_EVGEN_Pos 0 </span></div>
<div class="line"><a name="l00425"></a><span class="lineno"> 425</span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_EVGEN_Msk (_U_(0x7F) &lt;&lt; EVSYS_CHANNEL_EVGEN_Pos)</span></div>
<div class="line"><a name="l00426"></a><span class="lineno"> 426</span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_EVGEN(value) (EVSYS_CHANNEL_EVGEN_Msk &amp; ((value) &lt;&lt; EVSYS_CHANNEL_EVGEN_Pos))</span></div>
<div class="line"><a name="l00427"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a1c99b6755155dc2b405c63587973570b"> 427</a></span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_PATH_Pos 8 </span></div>
<div class="line"><a name="l00428"></a><span class="lineno"> 428</span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_PATH_Msk (_U_(0x3) &lt;&lt; EVSYS_CHANNEL_PATH_Pos)</span></div>
<div class="line"><a name="l00429"></a><span class="lineno"> 429</span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_PATH(value) (EVSYS_CHANNEL_PATH_Msk &amp; ((value) &lt;&lt; EVSYS_CHANNEL_PATH_Pos))</span></div>
<div class="line"><a name="l00430"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#af113bdb42f1664532afb160e78b39fdb"> 430</a></span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_PATH_SYNCHRONOUS_Val _U_(0x0) </span></div>
<div class="line"><a name="l00431"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#aeb385f0d13f51660c582fb7e8d5a753a"> 431</a></span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_PATH_RESYNCHRONIZED_Val _U_(0x1) </span></div>
<div class="line"><a name="l00432"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#ae66529525c793ce0b4621730bd6d5944"> 432</a></span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_PATH_ASYNCHRONOUS_Val _U_(0x2) </span></div>
<div class="line"><a name="l00433"></a><span class="lineno"> 433</span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_PATH_SYNCHRONOUS (EVSYS_CHANNEL_PATH_SYNCHRONOUS_Val &lt;&lt; EVSYS_CHANNEL_PATH_Pos)</span></div>
<div class="line"><a name="l00434"></a><span class="lineno"> 434</span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_PATH_RESYNCHRONIZED (EVSYS_CHANNEL_PATH_RESYNCHRONIZED_Val &lt;&lt; EVSYS_CHANNEL_PATH_Pos)</span></div>
<div class="line"><a name="l00435"></a><span class="lineno"> 435</span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_PATH_ASYNCHRONOUS (EVSYS_CHANNEL_PATH_ASYNCHRONOUS_Val &lt;&lt; EVSYS_CHANNEL_PATH_Pos)</span></div>
<div class="line"><a name="l00436"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a940ccedfddf915a4532da9b752cab3a0"> 436</a></span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_EDGSEL_Pos 10 </span></div>
<div class="line"><a name="l00437"></a><span class="lineno"> 437</span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_EDGSEL_Msk (_U_(0x3) &lt;&lt; EVSYS_CHANNEL_EDGSEL_Pos)</span></div>
<div class="line"><a name="l00438"></a><span class="lineno"> 438</span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_EDGSEL(value) (EVSYS_CHANNEL_EDGSEL_Msk &amp; ((value) &lt;&lt; EVSYS_CHANNEL_EDGSEL_Pos))</span></div>
<div class="line"><a name="l00439"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a80b0403aa00907e545ba1ce27a55b03a"> 439</a></span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_EDGSEL_NO_EVT_OUTPUT_Val _U_(0x0) </span></div>
<div class="line"><a name="l00440"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a74f200244816d34ebcda294dfa39d163"> 440</a></span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_EDGSEL_RISING_EDGE_Val _U_(0x1) </span></div>
<div class="line"><a name="l00441"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#aea62b90832a5f319570b4fd0cdb884d5"> 441</a></span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_EDGSEL_FALLING_EDGE_Val _U_(0x2) </span></div>
<div class="line"><a name="l00442"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a30ceae6c03e9e5fb6302f5f4d234599d"> 442</a></span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_EDGSEL_BOTH_EDGES_Val _U_(0x3) </span></div>
<div class="line"><a name="l00443"></a><span class="lineno"> 443</span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_EDGSEL_NO_EVT_OUTPUT (EVSYS_CHANNEL_EDGSEL_NO_EVT_OUTPUT_Val &lt;&lt; EVSYS_CHANNEL_EDGSEL_Pos)</span></div>
<div class="line"><a name="l00444"></a><span class="lineno"> 444</span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_EDGSEL_RISING_EDGE (EVSYS_CHANNEL_EDGSEL_RISING_EDGE_Val &lt;&lt; EVSYS_CHANNEL_EDGSEL_Pos)</span></div>
<div class="line"><a name="l00445"></a><span class="lineno"> 445</span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_EDGSEL_FALLING_EDGE (EVSYS_CHANNEL_EDGSEL_FALLING_EDGE_Val &lt;&lt; EVSYS_CHANNEL_EDGSEL_Pos)</span></div>
<div class="line"><a name="l00446"></a><span class="lineno"> 446</span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_EDGSEL_BOTH_EDGES (EVSYS_CHANNEL_EDGSEL_BOTH_EDGES_Val &lt;&lt; EVSYS_CHANNEL_EDGSEL_Pos)</span></div>
<div class="line"><a name="l00447"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a60fc44a6feb69694fa578820a9c13a77"> 447</a></span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_RUNSTDBY_Pos 14 </span></div>
<div class="line"><a name="l00448"></a><span class="lineno"> 448</span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_RUNSTDBY (_U_(0x1) &lt;&lt; EVSYS_CHANNEL_RUNSTDBY_Pos)</span></div>
<div class="line"><a name="l00449"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a401e9fcb176a21073cd02359cb8ed305"> 449</a></span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_ONDEMAND_Pos 15 </span></div>
<div class="line"><a name="l00450"></a><span class="lineno"> 450</span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_ONDEMAND (_U_(0x1) &lt;&lt; EVSYS_CHANNEL_ONDEMAND_Pos)</span></div>
<div class="line"><a name="l00451"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#ab9faaae565f0d68b4a213473176588bf"> 451</a></span>&#160;<span class="preprocessor">#define EVSYS_CHANNEL_MASK _U_(0x0000CF7F) </span></div>
<div class="line"><a name="l00453"></a><span class="lineno"> 453</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- EVSYS_CHINTENCLR : (EVSYS Offset: 0x024) (R/W 8) CHANNEL Channel n Interrupt Enable Clear -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00454"></a><span class="lineno"> 454</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00455"></a><span class="lineno"><a class="line" href="unionEVSYS__CHINTENCLR__Type.html"> 455</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00456"></a><span class="lineno"> 456</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00457"></a><span class="lineno"><a class="line" href="unionEVSYS__CHINTENCLR__Type.html#a8cb8552b76e461c2349479f6bcc20c39"> 457</a></span>&#160; uint8_t <a class="code" href="unionEVSYS__CHINTENCLR__Type.html#a8cb8552b76e461c2349479f6bcc20c39">OVR</a>:1; </div>
<div class="line"><a name="l00458"></a><span class="lineno"><a class="line" href="unionEVSYS__CHINTENCLR__Type.html#ab75ee2f63bd0f215a0fcff585fc18ee7"> 458</a></span>&#160; uint8_t <a class="code" href="unionEVSYS__CHINTENCLR__Type.html#ab75ee2f63bd0f215a0fcff585fc18ee7">EVD</a>:1; </div>
<div class="line"><a name="l00459"></a><span class="lineno"><a class="line" href="unionEVSYS__CHINTENCLR__Type.html#af33f145fc655bccc12dcad76bab85359"> 459</a></span>&#160; uint8_t :6; </div>
<div class="line"><a name="l00460"></a><span class="lineno"><a class="line" href="unionEVSYS__CHINTENCLR__Type.html#a11d0adfb3d795378432bfd6666629710"> 460</a></span>&#160; } bit; </div>
<div class="line"><a name="l00461"></a><span class="lineno"><a class="line" href="unionEVSYS__CHINTENCLR__Type.html#a9c5ba35cdfa02830237a5968c9c15ee2"> 461</a></span>&#160; uint8_t <a class="code" href="unionEVSYS__CHINTENCLR__Type.html#a9c5ba35cdfa02830237a5968c9c15ee2">reg</a>; </div>
<div class="line"><a name="l00462"></a><span class="lineno"> 462</span>&#160;} <a class="code" href="unionEVSYS__CHINTENCLR__Type.html">EVSYS_CHINTENCLR_Type</a>;</div>
<div class="line"><a name="l00463"></a><span class="lineno"> 463</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00464"></a><span class="lineno"> 464</span>&#160; </div>
<div class="line"><a name="l00465"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a99d09965060b174b77163c83f36f27e5"> 465</a></span>&#160;<span class="preprocessor">#define EVSYS_CHINTENCLR_OFFSET 0x024 </span></div>
<div class="line"><a name="l00466"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a621cc4f8c5fe15085dc395c6bd65da94"> 466</a></span>&#160;<span class="preprocessor">#define EVSYS_CHINTENCLR_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00468"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a61e649ee61ec30612e6f2669b05382c7"> 468</a></span>&#160;<span class="preprocessor">#define EVSYS_CHINTENCLR_OVR_Pos 0 </span></div>
<div class="line"><a name="l00469"></a><span class="lineno"> 469</span>&#160;<span class="preprocessor">#define EVSYS_CHINTENCLR_OVR (_U_(0x1) &lt;&lt; EVSYS_CHINTENCLR_OVR_Pos)</span></div>
<div class="line"><a name="l00470"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#ae4d48774baf4809b4b4ae5b57b4faff4"> 470</a></span>&#160;<span class="preprocessor">#define EVSYS_CHINTENCLR_EVD_Pos 1 </span></div>
<div class="line"><a name="l00471"></a><span class="lineno"> 471</span>&#160;<span class="preprocessor">#define EVSYS_CHINTENCLR_EVD (_U_(0x1) &lt;&lt; EVSYS_CHINTENCLR_EVD_Pos)</span></div>
<div class="line"><a name="l00472"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a66455819f3a00e116d6b9b82a2faff0c"> 472</a></span>&#160;<span class="preprocessor">#define EVSYS_CHINTENCLR_MASK _U_(0x03) </span></div>
<div class="line"><a name="l00474"></a><span class="lineno"> 474</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- EVSYS_CHINTENSET : (EVSYS Offset: 0x025) (R/W 8) CHANNEL Channel n Interrupt Enable Set -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00475"></a><span class="lineno"> 475</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00476"></a><span class="lineno"><a class="line" href="unionEVSYS__CHINTENSET__Type.html"> 476</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00477"></a><span class="lineno"> 477</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00478"></a><span class="lineno"><a class="line" href="unionEVSYS__CHINTENSET__Type.html#a5048ab80320ecaff0e397a7422957d0a"> 478</a></span>&#160; uint8_t <a class="code" href="unionEVSYS__CHINTENSET__Type.html#a5048ab80320ecaff0e397a7422957d0a">OVR</a>:1; </div>
<div class="line"><a name="l00479"></a><span class="lineno"><a class="line" href="unionEVSYS__CHINTENSET__Type.html#aeda4595098d05da44c29e34bdac54cf2"> 479</a></span>&#160; uint8_t <a class="code" href="unionEVSYS__CHINTENSET__Type.html#aeda4595098d05da44c29e34bdac54cf2">EVD</a>:1; </div>
<div class="line"><a name="l00480"></a><span class="lineno"><a class="line" href="unionEVSYS__CHINTENSET__Type.html#a65c37db77dcbae8d70684a7036398eb1"> 480</a></span>&#160; uint8_t :6; </div>
<div class="line"><a name="l00481"></a><span class="lineno"><a class="line" href="unionEVSYS__CHINTENSET__Type.html#a9599a66fd972a0b391d428e1ac544253"> 481</a></span>&#160; } bit; </div>
<div class="line"><a name="l00482"></a><span class="lineno"><a class="line" href="unionEVSYS__CHINTENSET__Type.html#a01a9784fe9da38fc99d103555b571d81"> 482</a></span>&#160; uint8_t <a class="code" href="unionEVSYS__CHINTENSET__Type.html#a01a9784fe9da38fc99d103555b571d81">reg</a>; </div>
<div class="line"><a name="l00483"></a><span class="lineno"> 483</span>&#160;} <a class="code" href="unionEVSYS__CHINTENSET__Type.html">EVSYS_CHINTENSET_Type</a>;</div>
<div class="line"><a name="l00484"></a><span class="lineno"> 484</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00485"></a><span class="lineno"> 485</span>&#160; </div>
<div class="line"><a name="l00486"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#afe0ed22b5298a7241f2a45d9be32830e"> 486</a></span>&#160;<span class="preprocessor">#define EVSYS_CHINTENSET_OFFSET 0x025 </span></div>
<div class="line"><a name="l00487"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a8ad8b6bab60c189b30f22ac418ac8e8f"> 487</a></span>&#160;<span class="preprocessor">#define EVSYS_CHINTENSET_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00489"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a67923f48d90f27e95eb814387f10d246"> 489</a></span>&#160;<span class="preprocessor">#define EVSYS_CHINTENSET_OVR_Pos 0 </span></div>
<div class="line"><a name="l00490"></a><span class="lineno"> 490</span>&#160;<span class="preprocessor">#define EVSYS_CHINTENSET_OVR (_U_(0x1) &lt;&lt; EVSYS_CHINTENSET_OVR_Pos)</span></div>
<div class="line"><a name="l00491"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a3a65ddd9311e1b095da29b3983296ad6"> 491</a></span>&#160;<span class="preprocessor">#define EVSYS_CHINTENSET_EVD_Pos 1 </span></div>
<div class="line"><a name="l00492"></a><span class="lineno"> 492</span>&#160;<span class="preprocessor">#define EVSYS_CHINTENSET_EVD (_U_(0x1) &lt;&lt; EVSYS_CHINTENSET_EVD_Pos)</span></div>
<div class="line"><a name="l00493"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a4bb33641b488807f5ea0ebb43020a30b"> 493</a></span>&#160;<span class="preprocessor">#define EVSYS_CHINTENSET_MASK _U_(0x03) </span></div>
<div class="line"><a name="l00495"></a><span class="lineno"> 495</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- EVSYS_CHINTFLAG : (EVSYS Offset: 0x026) (R/W 8) CHANNEL Channel n Interrupt Flag Status and Clear -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00496"></a><span class="lineno"> 496</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00497"></a><span class="lineno"><a class="line" href="unionEVSYS__CHINTFLAG__Type.html"> 497</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{ <span class="comment">// __I to avoid read-modify-write on write-to-clear register</span></div>
<div class="line"><a name="l00498"></a><span class="lineno"> 498</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00499"></a><span class="lineno"><a class="line" href="unionEVSYS__CHINTFLAG__Type.html#a43ae1b8f54d3dc8eee12a19d63f11102"> 499</a></span>&#160; __I uint8_t <a class="code" href="unionEVSYS__CHINTFLAG__Type.html#a43ae1b8f54d3dc8eee12a19d63f11102">OVR</a>:1; </div>
<div class="line"><a name="l00500"></a><span class="lineno"><a class="line" href="unionEVSYS__CHINTFLAG__Type.html#a7d904b642550ebb36ce540bebd750004"> 500</a></span>&#160; __I uint8_t <a class="code" href="unionEVSYS__CHINTFLAG__Type.html#a7d904b642550ebb36ce540bebd750004">EVD</a>:1; </div>
<div class="line"><a name="l00501"></a><span class="lineno"><a class="line" href="unionEVSYS__CHINTFLAG__Type.html#a2e176e0e06cfcc514c97a30bef6e3a24"> 501</a></span>&#160; __I <a class="code" href="unionEVSYS__CHINTFLAG__Type.html#a2e176e0e06cfcc514c97a30bef6e3a24">uint8_t</a> :6; </div>
<div class="line"><a name="l00502"></a><span class="lineno"><a class="line" href="unionEVSYS__CHINTFLAG__Type.html#a81129bb0f9520b633daa8fd01fe060dc"> 502</a></span>&#160; } bit; </div>
<div class="line"><a name="l00503"></a><span class="lineno"><a class="line" href="unionEVSYS__CHINTFLAG__Type.html#a71855bc2afc17205ea69ebf4e43ebba4"> 503</a></span>&#160; uint8_t <a class="code" href="unionEVSYS__CHINTFLAG__Type.html#a71855bc2afc17205ea69ebf4e43ebba4">reg</a>; </div>
<div class="line"><a name="l00504"></a><span class="lineno"> 504</span>&#160;} <a class="code" href="unionEVSYS__CHINTFLAG__Type.html">EVSYS_CHINTFLAG_Type</a>;</div>
<div class="line"><a name="l00505"></a><span class="lineno"> 505</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00506"></a><span class="lineno"> 506</span>&#160; </div>
<div class="line"><a name="l00507"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a6161ef0982ec328c5a5052de0698a657"> 507</a></span>&#160;<span class="preprocessor">#define EVSYS_CHINTFLAG_OFFSET 0x026 </span></div>
<div class="line"><a name="l00508"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a1c2ef2c79d3adc8d3ad3ff52a17ece91"> 508</a></span>&#160;<span class="preprocessor">#define EVSYS_CHINTFLAG_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00510"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a41cdce62325dd483d8e1db074f623261"> 510</a></span>&#160;<span class="preprocessor">#define EVSYS_CHINTFLAG_OVR_Pos 0 </span></div>
<div class="line"><a name="l00511"></a><span class="lineno"> 511</span>&#160;<span class="preprocessor">#define EVSYS_CHINTFLAG_OVR (_U_(0x1) &lt;&lt; EVSYS_CHINTFLAG_OVR_Pos)</span></div>
<div class="line"><a name="l00512"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#ae64fd914c57449cc7aa468ba8edf9f25"> 512</a></span>&#160;<span class="preprocessor">#define EVSYS_CHINTFLAG_EVD_Pos 1 </span></div>
<div class="line"><a name="l00513"></a><span class="lineno"> 513</span>&#160;<span class="preprocessor">#define EVSYS_CHINTFLAG_EVD (_U_(0x1) &lt;&lt; EVSYS_CHINTFLAG_EVD_Pos)</span></div>
<div class="line"><a name="l00514"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#ae5b03e2da9c291336acafb1a4fa9d235"> 514</a></span>&#160;<span class="preprocessor">#define EVSYS_CHINTFLAG_MASK _U_(0x03) </span></div>
<div class="line"><a name="l00516"></a><span class="lineno"> 516</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- EVSYS_CHSTATUS : (EVSYS Offset: 0x027) (R/ 8) CHANNEL Channel n Status -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00517"></a><span class="lineno"> 517</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00518"></a><span class="lineno"><a class="line" href="unionEVSYS__CHSTATUS__Type.html"> 518</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00519"></a><span class="lineno"> 519</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00520"></a><span class="lineno"><a class="line" href="unionEVSYS__CHSTATUS__Type.html#a5f76c8a723f426aa80adffb5cd500726"> 520</a></span>&#160; uint8_t <a class="code" href="unionEVSYS__CHSTATUS__Type.html#a5f76c8a723f426aa80adffb5cd500726">RDYUSR</a>:1; </div>
<div class="line"><a name="l00521"></a><span class="lineno"><a class="line" href="unionEVSYS__CHSTATUS__Type.html#adff83153db19048836e9c148eac73266"> 521</a></span>&#160; uint8_t <a class="code" href="unionEVSYS__CHSTATUS__Type.html#adff83153db19048836e9c148eac73266">BUSYCH</a>:1; </div>
<div class="line"><a name="l00522"></a><span class="lineno"><a class="line" href="unionEVSYS__CHSTATUS__Type.html#acbb22766cc406d427b4ae62df0358475"> 522</a></span>&#160; uint8_t :6; </div>
<div class="line"><a name="l00523"></a><span class="lineno"><a class="line" href="unionEVSYS__CHSTATUS__Type.html#aba40127263fa67b57ba0318a654d7e37"> 523</a></span>&#160; } bit; </div>
<div class="line"><a name="l00524"></a><span class="lineno"><a class="line" href="unionEVSYS__CHSTATUS__Type.html#ab956c47454d986c5d523e72e3def7434"> 524</a></span>&#160; uint8_t <a class="code" href="unionEVSYS__CHSTATUS__Type.html#ab956c47454d986c5d523e72e3def7434">reg</a>; </div>
<div class="line"><a name="l00525"></a><span class="lineno"> 525</span>&#160;} <a class="code" href="unionEVSYS__CHSTATUS__Type.html">EVSYS_CHSTATUS_Type</a>;</div>
<div class="line"><a name="l00526"></a><span class="lineno"> 526</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00527"></a><span class="lineno"> 527</span>&#160; </div>
<div class="line"><a name="l00528"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a1feb1c1fba23446f2caa0e152ce7eb6c"> 528</a></span>&#160;<span class="preprocessor">#define EVSYS_CHSTATUS_OFFSET 0x027 </span></div>
<div class="line"><a name="l00529"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a3d2d7543ed2981a7d35fbee301599189"> 529</a></span>&#160;<span class="preprocessor">#define EVSYS_CHSTATUS_RESETVALUE _U_(0x01) </span></div>
<div class="line"><a name="l00531"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a3e437be2124dfcc6cce85beb30315515"> 531</a></span>&#160;<span class="preprocessor">#define EVSYS_CHSTATUS_RDYUSR_Pos 0 </span></div>
<div class="line"><a name="l00532"></a><span class="lineno"> 532</span>&#160;<span class="preprocessor">#define EVSYS_CHSTATUS_RDYUSR (_U_(0x1) &lt;&lt; EVSYS_CHSTATUS_RDYUSR_Pos)</span></div>
<div class="line"><a name="l00533"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a362f571edb31b5cb8e2fccc24385ba81"> 533</a></span>&#160;<span class="preprocessor">#define EVSYS_CHSTATUS_BUSYCH_Pos 1 </span></div>
<div class="line"><a name="l00534"></a><span class="lineno"> 534</span>&#160;<span class="preprocessor">#define EVSYS_CHSTATUS_BUSYCH (_U_(0x1) &lt;&lt; EVSYS_CHSTATUS_BUSYCH_Pos)</span></div>
<div class="line"><a name="l00535"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a969f2d9810912d2f07fe47602660dd7f"> 535</a></span>&#160;<span class="preprocessor">#define EVSYS_CHSTATUS_MASK _U_(0x03) </span></div>
<div class="line"><a name="l00537"></a><span class="lineno"> 537</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- EVSYS_USER : (EVSYS Offset: 0x120) (R/W 32) User Multiplexer n -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00538"></a><span class="lineno"> 538</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00539"></a><span class="lineno"><a class="line" href="unionEVSYS__USER__Type.html"> 539</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00540"></a><span class="lineno"> 540</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00541"></a><span class="lineno"><a class="line" href="unionEVSYS__USER__Type.html#aa5d01565eec1c1ae850f727fe186a1d3"> 541</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__USER__Type.html#aa5d01565eec1c1ae850f727fe186a1d3">CHANNEL</a>:6; </div>
<div class="line"><a name="l00542"></a><span class="lineno"><a class="line" href="unionEVSYS__USER__Type.html#afaf32b7e35829c8686515840de8e1298"> 542</a></span>&#160; uint32_t :26; </div>
<div class="line"><a name="l00543"></a><span class="lineno"><a class="line" href="unionEVSYS__USER__Type.html#abd04953ae75b658149f6b41bea511a97"> 543</a></span>&#160; } bit; </div>
<div class="line"><a name="l00544"></a><span class="lineno"><a class="line" href="unionEVSYS__USER__Type.html#aa88ac67bd24e5c36a2da60338a338e41"> 544</a></span>&#160; uint32_t <a class="code" href="unionEVSYS__USER__Type.html#aa88ac67bd24e5c36a2da60338a338e41">reg</a>; </div>
<div class="line"><a name="l00545"></a><span class="lineno"> 545</span>&#160;} <a class="code" href="unionEVSYS__USER__Type.html">EVSYS_USER_Type</a>;</div>
<div class="line"><a name="l00546"></a><span class="lineno"> 546</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00547"></a><span class="lineno"> 547</span>&#160; </div>
<div class="line"><a name="l00548"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a43110f222057e1543486fc474450131c"> 548</a></span>&#160;<span class="preprocessor">#define EVSYS_USER_OFFSET 0x120 </span></div>
<div class="line"><a name="l00549"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#af4ba09be942a94f1cb7a9ed23ac108ab"> 549</a></span>&#160;<span class="preprocessor">#define EVSYS_USER_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00551"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#a4ce28148cd49044148eed72085814831"> 551</a></span>&#160;<span class="preprocessor">#define EVSYS_USER_CHANNEL_Pos 0 </span></div>
<div class="line"><a name="l00552"></a><span class="lineno"> 552</span>&#160;<span class="preprocessor">#define EVSYS_USER_CHANNEL_Msk (_U_(0x3F) &lt;&lt; EVSYS_USER_CHANNEL_Pos)</span></div>
<div class="line"><a name="l00553"></a><span class="lineno"> 553</span>&#160;<span class="preprocessor">#define EVSYS_USER_CHANNEL(value) (EVSYS_USER_CHANNEL_Msk &amp; ((value) &lt;&lt; EVSYS_USER_CHANNEL_Pos))</span></div>
<div class="line"><a name="l00554"></a><span class="lineno"><a class="line" href="component_2evsys_8h.html#ae051bcee71e9b6fca121b9c03ff961d8"> 554</a></span>&#160;<span class="preprocessor">#define EVSYS_USER_MASK _U_(0x0000003F) </span></div>
<div class="line"><a name="l00557"></a><span class="lineno"> 557</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00558"></a><span class="lineno"><a class="line" href="structEvsysChannel.html"> 558</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00559"></a><span class="lineno"><a class="line" href="structEvsysChannel.html#afb25adcb6e2abdc140d1858dd9a527cb"> 559</a></span>&#160; __IO <a class="code" href="unionEVSYS__CHANNEL__Type.html">EVSYS_CHANNEL_Type</a> <a class="code" href="structEvsysChannel.html#afb25adcb6e2abdc140d1858dd9a527cb">CHANNEL</a>; </div>
<div class="line"><a name="l00560"></a><span class="lineno"><a class="line" href="structEvsysChannel.html#afbbf6978445b278b6e4422e6451e7b0d"> 560</a></span>&#160; __IO <a class="code" href="unionEVSYS__CHINTENCLR__Type.html">EVSYS_CHINTENCLR_Type</a> <a class="code" href="structEvsysChannel.html#afbbf6978445b278b6e4422e6451e7b0d">CHINTENCLR</a>; </div>
<div class="line"><a name="l00561"></a><span class="lineno"><a class="line" href="structEvsysChannel.html#a71396b33c343ec4dccfdad0e5dc86f34"> 561</a></span>&#160; __IO <a class="code" href="unionEVSYS__CHINTENSET__Type.html">EVSYS_CHINTENSET_Type</a> <a class="code" href="structEvsysChannel.html#a71396b33c343ec4dccfdad0e5dc86f34">CHINTENSET</a>; </div>
<div class="line"><a name="l00562"></a><span class="lineno"><a class="line" href="structEvsysChannel.html#adcedeed97c238c9db198e4b3653d1f61"> 562</a></span>&#160; __IO <a class="code" href="unionEVSYS__CHINTFLAG__Type.html">EVSYS_CHINTFLAG_Type</a> <a class="code" href="structEvsysChannel.html#adcedeed97c238c9db198e4b3653d1f61">CHINTFLAG</a>; </div>
<div class="line"><a name="l00563"></a><span class="lineno"><a class="line" href="structEvsysChannel.html#a080a563cd10d1497732871b8eff970d6"> 563</a></span>&#160; __I <a class="code" href="unionEVSYS__CHSTATUS__Type.html">EVSYS_CHSTATUS_Type</a> <a class="code" href="structEvsysChannel.html#a080a563cd10d1497732871b8eff970d6">CHSTATUS</a>; </div>
<div class="line"><a name="l00564"></a><span class="lineno"> 564</span>&#160;} <a class="code" href="structEvsysChannel.html">EvsysChannel</a>;</div>
<div class="line"><a name="l00565"></a><span class="lineno"> 565</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00566"></a><span class="lineno"> 566</span>&#160; </div>
<div class="line"><a name="l00568"></a><span class="lineno"> 568</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00569"></a><span class="lineno"><a class="line" href="structEvsys.html"> 569</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00570"></a><span class="lineno"><a class="line" href="structEvsys.html#a4a33bf48d2dc3b91ae2200208f02e0fb"> 570</a></span>&#160; __IO <a class="code" href="unionEVSYS__CTRLA__Type.html">EVSYS_CTRLA_Type</a> <a class="code" href="structEvsys.html#a4a33bf48d2dc3b91ae2200208f02e0fb">CTRLA</a>; </div>
<div class="line"><a name="l00571"></a><span class="lineno"> 571</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved1[0x3];</div>
<div class="line"><a name="l00572"></a><span class="lineno"><a class="line" href="structEvsys.html#a3f28dcf81daf78c0f14a08e7407b2c06"> 572</a></span>&#160; __O <a class="code" href="unionEVSYS__SWEVT__Type.html">EVSYS_SWEVT_Type</a> <a class="code" href="structEvsys.html#a3f28dcf81daf78c0f14a08e7407b2c06">SWEVT</a>; </div>
<div class="line"><a name="l00573"></a><span class="lineno"><a class="line" href="structEvsys.html#abe4513a0e5da32e400629a69ab90123e"> 573</a></span>&#160; __IO <a class="code" href="unionEVSYS__PRICTRL__Type.html">EVSYS_PRICTRL_Type</a> <a class="code" href="structEvsys.html#abe4513a0e5da32e400629a69ab90123e">PRICTRL</a>; </div>
<div class="line"><a name="l00574"></a><span class="lineno"> 574</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved2[0x7];</div>
<div class="line"><a name="l00575"></a><span class="lineno"><a class="line" href="structEvsys.html#a403953597f8540fe1970b4b808bae012"> 575</a></span>&#160; __IO <a class="code" href="unionEVSYS__INTPEND__Type.html">EVSYS_INTPEND_Type</a> <a class="code" href="structEvsys.html#a403953597f8540fe1970b4b808bae012">INTPEND</a>; </div>
<div class="line"><a name="l00576"></a><span class="lineno"> 576</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved3[0x2];</div>
<div class="line"><a name="l00577"></a><span class="lineno"><a class="line" href="structEvsys.html#a383b68728e361cd44f932df377fa9d03"> 577</a></span>&#160; __I <a class="code" href="unionEVSYS__INTSTATUS__Type.html">EVSYS_INTSTATUS_Type</a> <a class="code" href="structEvsys.html#a383b68728e361cd44f932df377fa9d03">INTSTATUS</a>; </div>
<div class="line"><a name="l00578"></a><span class="lineno"><a class="line" href="structEvsys.html#a1c5ad1c5bf0c57e2b28fff693105a7f3"> 578</a></span>&#160; __I <a class="code" href="unionEVSYS__BUSYCH__Type.html">EVSYS_BUSYCH_Type</a> <a class="code" href="structEvsys.html#a1c5ad1c5bf0c57e2b28fff693105a7f3">BUSYCH</a>; </div>
<div class="line"><a name="l00579"></a><span class="lineno"><a class="line" href="structEvsys.html#ad81d5455630a0f226c9c664c14b8bf2d"> 579</a></span>&#160; __I <a class="code" href="unionEVSYS__READYUSR__Type.html">EVSYS_READYUSR_Type</a> <a class="code" href="structEvsys.html#ad81d5455630a0f226c9c664c14b8bf2d">READYUSR</a>; </div>
<div class="line"><a name="l00580"></a><span class="lineno"><a class="line" href="structEvsys.html#a68d7d35bdc92ffeaf503bf30865abce2"> 580</a></span>&#160; <a class="code" href="structEvsysChannel.html">EvsysChannel</a> Channel[32]; </div>
<div class="line"><a name="l00581"></a><span class="lineno"><a class="line" href="structEvsys.html#a4fa9ea07f7e7b464e548c60f45dd9440"> 581</a></span>&#160; __IO <a class="code" href="unionEVSYS__USER__Type.html">EVSYS_USER_Type</a> USER[67]; </div>
<div class="line"><a name="l00582"></a><span class="lineno"> 582</span>&#160;} <a class="code" href="structEvsys.html">Evsys</a>;</div>
<div class="line"><a name="l00583"></a><span class="lineno"> 583</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00584"></a><span class="lineno"> 584</span>&#160; </div>
<div class="line"><a name="l00587"></a><span class="lineno"> 587</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_EVSYS_COMPONENT_ */</span><span class="preprocessor"></span></div>
</div><!-- fragment --></div><!-- contents -->
<div class="ttc" id="aunionEVSYS__READYUSR__Type_html_aa875aa9b2d31ee586ec7c552f3268ebb"><div class="ttname"><a href="unionEVSYS__READYUSR__Type.html#aa875aa9b2d31ee586ec7c552f3268ebb">EVSYS_READYUSR_Type::READYUSR5</a></div><div class="ttdeci">uint32_t READYUSR5</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00355">evsys.h:355</a></div></div>
<div class="ttc" id="astructEvsysChannel_html_afbbf6978445b278b6e4422e6451e7b0d"><div class="ttname"><a href="structEvsysChannel.html#afbbf6978445b278b6e4422e6451e7b0d">EvsysChannel::CHINTENCLR</a></div><div class="ttdeci">__IO EVSYS_CHINTENCLR_Type CHINTENCLR</div><div class="ttdoc">Offset: 0x004 (R/W 8) Channel n Interrupt Enable Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00560">evsys.h:560</a></div></div>
<div class="ttc" id="aunionEVSYS__READYUSR__Type_html_afee39ac2378b33e745ff84373e9cf25f"><div class="ttname"><a href="unionEVSYS__READYUSR__Type.html#afee39ac2378b33e745ff84373e9cf25f">EVSYS_READYUSR_Type::READYUSR6</a></div><div class="ttdeci">uint32_t READYUSR6</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00356">evsys.h:356</a></div></div>
<div class="ttc" id="aunionEVSYS__CHSTATUS__Type_html_ab956c47454d986c5d523e72e3def7434"><div class="ttname"><a href="unionEVSYS__CHSTATUS__Type.html#ab956c47454d986c5d523e72e3def7434">EVSYS_CHSTATUS_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00524">evsys.h:524</a></div></div>
<div class="ttc" id="aunionEVSYS__INTSTATUS__Type_html_a1d9b4c74e30f3fc0e7d2794d4e61c666"><div class="ttname"><a href="unionEVSYS__INTSTATUS__Type.html#a1d9b4c74e30f3fc0e7d2794d4e61c666">EVSYS_INTSTATUS_Type::CHINT8</a></div><div class="ttdeci">uint32_t CHINT8</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00242">evsys.h:242</a></div></div>
<div class="ttc" id="aunionEVSYS__CHINTENCLR__Type_html"><div class="ttname"><a href="unionEVSYS__CHINTENCLR__Type.html">EVSYS_CHINTENCLR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00455">evsys.h:455</a></div></div>
<div class="ttc" id="aunionEVSYS__BUSYCH__Type_html_afd800a8ff5b1f2c3a4caec31ee2d3bd1"><div class="ttname"><a href="unionEVSYS__BUSYCH__Type.html#afd800a8ff5b1f2c3a4caec31ee2d3bd1">EVSYS_BUSYCH_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00310">evsys.h:310</a></div></div>
<div class="ttc" id="aunionEVSYS__READYUSR__Type_html_a5c2074f3248bd698de21b3935aa7f52c"><div class="ttname"><a href="unionEVSYS__READYUSR__Type.html#a5c2074f3248bd698de21b3935aa7f52c">EVSYS_READYUSR_Type::READYUSR4</a></div><div class="ttdeci">uint32_t READYUSR4</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00354">evsys.h:354</a></div></div>
<div class="ttc" id="aunionEVSYS__READYUSR__Type_html_aeec88f66b77de2cd4eaea17714ac3bea"><div class="ttname"><a href="unionEVSYS__READYUSR__Type.html#aeec88f66b77de2cd4eaea17714ac3bea">EVSYS_READYUSR_Type::READYUSR10</a></div><div class="ttdeci">uint32_t READYUSR10</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00360">evsys.h:360</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_afb0004ecc3c0ee519685c871b26b9455"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#afb0004ecc3c0ee519685c871b26b9455">EVSYS_SWEVT_Type::CHANNEL4</a></div><div class="ttdeci">uint32_t CHANNEL4</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00068">evsys.h:68</a></div></div>
<div class="ttc" id="aunionEVSYS__CHSTATUS__Type_html_a5f76c8a723f426aa80adffb5cd500726"><div class="ttname"><a href="unionEVSYS__CHSTATUS__Type.html#a5f76c8a723f426aa80adffb5cd500726">EVSYS_CHSTATUS_Type::RDYUSR</a></div><div class="ttdeci">uint8_t RDYUSR</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00520">evsys.h:520</a></div></div>
<div class="ttc" id="aunionEVSYS__CHINTENSET__Type_html_a5048ab80320ecaff0e397a7422957d0a"><div class="ttname"><a href="unionEVSYS__CHINTENSET__Type.html#a5048ab80320ecaff0e397a7422957d0a">EVSYS_CHINTENSET_Type::OVR</a></div><div class="ttdeci">uint8_t OVR</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00478">evsys.h:478</a></div></div>
<div class="ttc" id="aunionEVSYS__CHINTFLAG__Type_html_a71855bc2afc17205ea69ebf4e43ebba4"><div class="ttname"><a href="unionEVSYS__CHINTFLAG__Type.html#a71855bc2afc17205ea69ebf4e43ebba4">EVSYS_CHINTFLAG_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00503">evsys.h:503</a></div></div>
<div class="ttc" id="aunionEVSYS__BUSYCH__Type_html_a4eec5298f1e49f411114c8ba3afcf649"><div class="ttname"><a href="unionEVSYS__BUSYCH__Type.html#a4eec5298f1e49f411114c8ba3afcf649">EVSYS_BUSYCH_Type::BUSYCH5</a></div><div class="ttdeci">uint32_t BUSYCH5</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00297">evsys.h:297</a></div></div>
<div class="ttc" id="aunionEVSYS__READYUSR__Type_html_ace82355578ca90b4f15feaf629aa96eb"><div class="ttname"><a href="unionEVSYS__READYUSR__Type.html#ace82355578ca90b4f15feaf629aa96eb">EVSYS_READYUSR_Type::READYUSR8</a></div><div class="ttdeci">uint32_t READYUSR8</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00358">evsys.h:358</a></div></div>
<div class="ttc" id="aunionEVSYS__INTSTATUS__Type_html_a9b331abf116ee19a98a3bbc46a026af5"><div class="ttname"><a href="unionEVSYS__INTSTATUS__Type.html#a9b331abf116ee19a98a3bbc46a026af5">EVSYS_INTSTATUS_Type::CHINT</a></div><div class="ttdeci">uint32_t CHINT</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00249">evsys.h:249</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_acd8aa7e57eadf4d4c870dbe5a114f521"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#acd8aa7e57eadf4d4c870dbe5a114f521">EVSYS_SWEVT_Type::CHANNEL21</a></div><div class="ttdeci">uint32_t CHANNEL21</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00085">evsys.h:85</a></div></div>
<div class="ttc" id="aunionEVSYS__CHINTENCLR__Type_html_a8cb8552b76e461c2349479f6bcc20c39"><div class="ttname"><a href="unionEVSYS__CHINTENCLR__Type.html#a8cb8552b76e461c2349479f6bcc20c39">EVSYS_CHINTENCLR_Type::OVR</a></div><div class="ttdeci">uint8_t OVR</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00457">evsys.h:457</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_ac4dcdade8be4581f6b748fa4e663dad3"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#ac4dcdade8be4581f6b748fa4e663dad3">EVSYS_SWEVT_Type::CHANNEL23</a></div><div class="ttdeci">uint32_t CHANNEL23</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00087">evsys.h:87</a></div></div>
<div class="ttc" id="aunionEVSYS__CHANNEL__Type_html"><div class="ttname"><a href="unionEVSYS__CHANNEL__Type.html">EVSYS_CHANNEL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00406">evsys.h:406</a></div></div>
<div class="ttc" id="aunionEVSYS__INTPEND__Type_html_a8a75ef5e3ab4bfb15660511c6be6c176"><div class="ttname"><a href="unionEVSYS__INTPEND__Type.html#a8a75ef5e3ab4bfb15660511c6be6c176">EVSYS_INTPEND_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00210">evsys.h:210</a></div></div>
<div class="ttc" id="astructEvsysChannel_html_a080a563cd10d1497732871b8eff970d6"><div class="ttname"><a href="structEvsysChannel.html#a080a563cd10d1497732871b8eff970d6">EvsysChannel::CHSTATUS</a></div><div class="ttdeci">__I EVSYS_CHSTATUS_Type CHSTATUS</div><div class="ttdoc">Offset: 0x007 (R/ 8) Channel n Status.</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00563">evsys.h:563</a></div></div>
<div class="ttc" id="aunionEVSYS__CHSTATUS__Type_html"><div class="ttname"><a href="unionEVSYS__CHSTATUS__Type.html">EVSYS_CHSTATUS_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00518">evsys.h:518</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_a5fa7e92de17255f665eb3c6a97e5aebe"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#a5fa7e92de17255f665eb3c6a97e5aebe">EVSYS_SWEVT_Type::CHANNEL9</a></div><div class="ttdeci">uint32_t CHANNEL9</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00073">evsys.h:73</a></div></div>
<div class="ttc" id="aunionEVSYS__BUSYCH__Type_html_a003799a1d83aed1c7ce06661ea410e2e"><div class="ttname"><a href="unionEVSYS__BUSYCH__Type.html#a003799a1d83aed1c7ce06661ea410e2e">EVSYS_BUSYCH_Type::BUSYCH4</a></div><div class="ttdeci">uint32_t BUSYCH4</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00296">evsys.h:296</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_a6592c8e6e930a496ef2467f6c9baedc1"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#a6592c8e6e930a496ef2467f6c9baedc1">EVSYS_SWEVT_Type::CHANNEL27</a></div><div class="ttdeci">uint32_t CHANNEL27</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00091">evsys.h:91</a></div></div>
<div class="ttc" id="aunionEVSYS__CTRLA__Type_html_af4fc9fc41995ce37cf5e606752d85671"><div class="ttname"><a href="unionEVSYS__CTRLA__Type.html#af4fc9fc41995ce37cf5e606752d85671">EVSYS_CTRLA_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00049">evsys.h:49</a></div></div>
<div class="ttc" id="astructEvsys_html_a1c5ad1c5bf0c57e2b28fff693105a7f3"><div class="ttname"><a href="structEvsys.html#a1c5ad1c5bf0c57e2b28fff693105a7f3">Evsys::BUSYCH</a></div><div class="ttdeci">__I EVSYS_BUSYCH_Type BUSYCH</div><div class="ttdoc">Offset: 0x018 (R/ 32) Busy Channels.</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00578">evsys.h:578</a></div></div>
<div class="ttc" id="aunionEVSYS__INTPEND__Type_html_ae7b48094040aa65329e8c43b136acb94"><div class="ttname"><a href="unionEVSYS__INTPEND__Type.html#ae7b48094040aa65329e8c43b136acb94">EVSYS_INTPEND_Type::BUSY</a></div><div class="ttdeci">uint16_t BUSY</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00208">evsys.h:208</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_ada8d6e9506344a8acfbef10b9ff6f1e5"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#ada8d6e9506344a8acfbef10b9ff6f1e5">EVSYS_SWEVT_Type::CHANNEL</a></div><div class="ttdeci">uint32_t CHANNEL</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00098">evsys.h:98</a></div></div>
<div class="ttc" id="aunionEVSYS__CHANNEL__Type_html_a0957aff322bb3ee83788e1abd7eb6e75"><div class="ttname"><a href="unionEVSYS__CHANNEL__Type.html#a0957aff322bb3ee83788e1abd7eb6e75">EVSYS_CHANNEL_Type::EVGEN</a></div><div class="ttdeci">uint32_t EVGEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00408">evsys.h:408</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_aab54dffb185754de9504b761da56b3d3"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#aab54dffb185754de9504b761da56b3d3">EVSYS_SWEVT_Type::CHANNEL31</a></div><div class="ttdeci">uint32_t CHANNEL31</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00095">evsys.h:95</a></div></div>
<div class="ttc" id="aunionEVSYS__READYUSR__Type_html_accab51ff94c695455a1aee0281627c74"><div class="ttname"><a href="unionEVSYS__READYUSR__Type.html#accab51ff94c695455a1aee0281627c74">EVSYS_READYUSR_Type::READYUSR2</a></div><div class="ttdeci">uint32_t READYUSR2</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00352">evsys.h:352</a></div></div>
<div class="ttc" id="aunionEVSYS__INTSTATUS__Type_html_a9efc80e345b030cf5cc3825fa673eccb"><div class="ttname"><a href="unionEVSYS__INTSTATUS__Type.html#a9efc80e345b030cf5cc3825fa673eccb">EVSYS_INTSTATUS_Type::CHINT9</a></div><div class="ttdeci">uint32_t CHINT9</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00243">evsys.h:243</a></div></div>
<div class="ttc" id="aunionEVSYS__READYUSR__Type_html_a40f190152d3cb358c73d78b4126db9f9"><div class="ttname"><a href="unionEVSYS__READYUSR__Type.html#a40f190152d3cb358c73d78b4126db9f9">EVSYS_READYUSR_Type::READYUSR11</a></div><div class="ttdeci">uint32_t READYUSR11</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00361">evsys.h:361</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_a0ae3ed907eb8ce1a77d709093e897eb2"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#a0ae3ed907eb8ce1a77d709093e897eb2">EVSYS_SWEVT_Type::CHANNEL26</a></div><div class="ttdeci">uint32_t CHANNEL26</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00090">evsys.h:90</a></div></div>
<div class="ttc" id="aunionEVSYS__CHANNEL__Type_html_adc808d5b320a64575d6bb66885730661"><div class="ttname"><a href="unionEVSYS__CHANNEL__Type.html#adc808d5b320a64575d6bb66885730661">EVSYS_CHANNEL_Type::EDGSEL</a></div><div class="ttdeci">uint32_t EDGSEL</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00411">evsys.h:411</a></div></div>
<div class="ttc" id="astructEvsys_html_a4a33bf48d2dc3b91ae2200208f02e0fb"><div class="ttname"><a href="structEvsys.html#a4a33bf48d2dc3b91ae2200208f02e0fb">Evsys::CTRLA</a></div><div class="ttdeci">__IO EVSYS_CTRLA_Type CTRLA</div><div class="ttdoc">Offset: 0x000 (R/W 8) Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00570">evsys.h:570</a></div></div>
<div class="ttc" id="aunionEVSYS__READYUSR__Type_html_a065947513d41a8a672986891a3863ef8"><div class="ttname"><a href="unionEVSYS__READYUSR__Type.html#a065947513d41a8a672986891a3863ef8">EVSYS_READYUSR_Type::READYUSR7</a></div><div class="ttdeci">uint32_t READYUSR7</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00357">evsys.h:357</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_accca60a99e0d7f04fc905ed532babcb9"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#accca60a99e0d7f04fc905ed532babcb9">EVSYS_SWEVT_Type::CHANNEL29</a></div><div class="ttdeci">uint32_t CHANNEL29</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00093">evsys.h:93</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_a63b91b96f8f04e56f26b4ad43b5f4199"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#a63b91b96f8f04e56f26b4ad43b5f4199">EVSYS_SWEVT_Type::CHANNEL8</a></div><div class="ttdeci">uint32_t CHANNEL8</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00072">evsys.h:72</a></div></div>
<div class="ttc" id="aunionEVSYS__CHINTENSET__Type_html_aeda4595098d05da44c29e34bdac54cf2"><div class="ttname"><a href="unionEVSYS__CHINTENSET__Type.html#aeda4595098d05da44c29e34bdac54cf2">EVSYS_CHINTENSET_Type::EVD</a></div><div class="ttdeci">uint8_t EVD</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00479">evsys.h:479</a></div></div>
<div class="ttc" id="aunionEVSYS__READYUSR__Type_html_a85c716b5641cda08529420da6a023a4d"><div class="ttname"><a href="unionEVSYS__READYUSR__Type.html#a85c716b5641cda08529420da6a023a4d">EVSYS_READYUSR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00368">evsys.h:368</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html">EVSYS_SWEVT_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00062">evsys.h:62</a></div></div>
<div class="ttc" id="aunionEVSYS__BUSYCH__Type_html"><div class="ttname"><a href="unionEVSYS__BUSYCH__Type.html">EVSYS_BUSYCH_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00290">evsys.h:290</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_a59f677bc98ae17112f6663afe7b03370"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#a59f677bc98ae17112f6663afe7b03370">EVSYS_SWEVT_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00100">evsys.h:100</a></div></div>
<div class="ttc" id="aunionEVSYS__INTSTATUS__Type_html_aa43528dc62dd1ff790c2c4ffbf6b4eca"><div class="ttname"><a href="unionEVSYS__INTSTATUS__Type.html#aa43528dc62dd1ff790c2c4ffbf6b4eca">EVSYS_INTSTATUS_Type::CHINT5</a></div><div class="ttdeci">uint32_t CHINT5</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00239">evsys.h:239</a></div></div>
<div class="ttc" id="aunionEVSYS__BUSYCH__Type_html_a208234c8b3959e3d57517ccbbf6f531e"><div class="ttname"><a href="unionEVSYS__BUSYCH__Type.html#a208234c8b3959e3d57517ccbbf6f531e">EVSYS_BUSYCH_Type::BUSYCH8</a></div><div class="ttdeci">uint32_t BUSYCH8</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00300">evsys.h:300</a></div></div>
<div class="ttc" id="aunionEVSYS__INTSTATUS__Type_html_a80e5d870449689602efce44bcabf2491"><div class="ttname"><a href="unionEVSYS__INTSTATUS__Type.html#a80e5d870449689602efce44bcabf2491">EVSYS_INTSTATUS_Type::CHINT11</a></div><div class="ttdeci">uint32_t CHINT11</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00245">evsys.h:245</a></div></div>
<div class="ttc" id="aunionEVSYS__CHINTENSET__Type_html_a01a9784fe9da38fc99d103555b571d81"><div class="ttname"><a href="unionEVSYS__CHINTENSET__Type.html#a01a9784fe9da38fc99d103555b571d81">EVSYS_CHINTENSET_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00482">evsys.h:482</a></div></div>
<div class="ttc" id="aunionEVSYS__INTSTATUS__Type_html_a1388229c2abe85acd870ea58775388ae"><div class="ttname"><a href="unionEVSYS__INTSTATUS__Type.html#a1388229c2abe85acd870ea58775388ae">EVSYS_INTSTATUS_Type::CHINT2</a></div><div class="ttdeci">uint32_t CHINT2</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00236">evsys.h:236</a></div></div>
<div class="ttc" id="aunionEVSYS__INTSTATUS__Type_html_a2acccc2b6a656b8d1592a8aa57e3561e"><div class="ttname"><a href="unionEVSYS__INTSTATUS__Type.html#a2acccc2b6a656b8d1592a8aa57e3561e">EVSYS_INTSTATUS_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00252">evsys.h:252</a></div></div>
<div class="ttc" id="aunionEVSYS__BUSYCH__Type_html_aa47796a8869a9cd4257ec4b70d4f48b6"><div class="ttname"><a href="unionEVSYS__BUSYCH__Type.html#aa47796a8869a9cd4257ec4b70d4f48b6">EVSYS_BUSYCH_Type::BUSYCH2</a></div><div class="ttdeci">uint32_t BUSYCH2</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00294">evsys.h:294</a></div></div>
<div class="ttc" id="aunionEVSYS__PRICTRL__Type_html_a84f0499eb46834e200c8aa7e6cb570c0"><div class="ttname"><a href="unionEVSYS__PRICTRL__Type.html#a84f0499eb46834e200c8aa7e6cb570c0">EVSYS_PRICTRL_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00184">evsys.h:184</a></div></div>
<div class="ttc" id="astructEvsysChannel_html"><div class="ttname"><a href="structEvsysChannel.html">EvsysChannel</a></div><div class="ttdoc">EvsysChannel hardware registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00558">evsys.h:558</a></div></div>
<div class="ttc" id="astructEvsys_html_ad81d5455630a0f226c9c664c14b8bf2d"><div class="ttname"><a href="structEvsys.html#ad81d5455630a0f226c9c664c14b8bf2d">Evsys::READYUSR</a></div><div class="ttdeci">__I EVSYS_READYUSR_Type READYUSR</div><div class="ttdoc">Offset: 0x01C (R/ 32) Ready Users.</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00579">evsys.h:579</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_a7079f0c02ed163fecb1f2bc097d43b73"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#a7079f0c02ed163fecb1f2bc097d43b73">EVSYS_SWEVT_Type::CHANNEL11</a></div><div class="ttdeci">uint32_t CHANNEL11</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00075">evsys.h:75</a></div></div>
<div class="ttc" id="aunionEVSYS__INTPEND__Type_html_ae49c1ba576b9c627f4ce347a2a192477"><div class="ttname"><a href="unionEVSYS__INTPEND__Type.html#ae49c1ba576b9c627f4ce347a2a192477">EVSYS_INTPEND_Type::OVR</a></div><div class="ttdeci">uint16_t OVR</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00204">evsys.h:204</a></div></div>
<div class="ttc" id="aunionEVSYS__BUSYCH__Type_html_a195579a4b7acd66c898b0344101276d4"><div class="ttname"><a href="unionEVSYS__BUSYCH__Type.html#a195579a4b7acd66c898b0344101276d4">EVSYS_BUSYCH_Type::BUSYCH3</a></div><div class="ttdeci">uint32_t BUSYCH3</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00295">evsys.h:295</a></div></div>
<div class="ttc" id="aunionEVSYS__READYUSR__Type_html_a2e4211902250f83efdaa996fe3623779"><div class="ttname"><a href="unionEVSYS__READYUSR__Type.html#a2e4211902250f83efdaa996fe3623779">EVSYS_READYUSR_Type::READYUSR</a></div><div class="ttdeci">uint32_t READYUSR</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00365">evsys.h:365</a></div></div>
<div class="ttc" id="aunionEVSYS__CHINTFLAG__Type_html_a43ae1b8f54d3dc8eee12a19d63f11102"><div class="ttname"><a href="unionEVSYS__CHINTFLAG__Type.html#a43ae1b8f54d3dc8eee12a19d63f11102">EVSYS_CHINTFLAG_Type::OVR</a></div><div class="ttdeci">__I uint8_t OVR</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00499">evsys.h:499</a></div></div>
<div class="ttc" id="aunionEVSYS__BUSYCH__Type_html_a6287db53bda54ae2381743346c23cee7"><div class="ttname"><a href="unionEVSYS__BUSYCH__Type.html#a6287db53bda54ae2381743346c23cee7">EVSYS_BUSYCH_Type::BUSYCH</a></div><div class="ttdeci">uint32_t BUSYCH</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00307">evsys.h:307</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_a71d191cb003a1d0ab099f622a95fc900"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#a71d191cb003a1d0ab099f622a95fc900">EVSYS_SWEVT_Type::CHANNEL13</a></div><div class="ttdeci">uint32_t CHANNEL13</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00077">evsys.h:77</a></div></div>
<div class="ttc" id="aunionEVSYS__CTRLA__Type_html"><div class="ttname"><a href="unionEVSYS__CTRLA__Type.html">EVSYS_CTRLA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00044">evsys.h:44</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_a752023584014dd0b4f87888c419ff983"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#a752023584014dd0b4f87888c419ff983">EVSYS_SWEVT_Type::CHANNEL17</a></div><div class="ttdeci">uint32_t CHANNEL17</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00081">evsys.h:81</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_a7c62232ef0980ab0f180566ab8b78ad0"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#a7c62232ef0980ab0f180566ab8b78ad0">EVSYS_SWEVT_Type::CHANNEL30</a></div><div class="ttdeci">uint32_t CHANNEL30</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00094">evsys.h:94</a></div></div>
<div class="ttc" id="aunionEVSYS__INTSTATUS__Type_html_a54fbf4cd24f7099cd498ed7c39dadc9c"><div class="ttname"><a href="unionEVSYS__INTSTATUS__Type.html#a54fbf4cd24f7099cd498ed7c39dadc9c">EVSYS_INTSTATUS_Type::CHINT3</a></div><div class="ttdeci">uint32_t CHINT3</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00237">evsys.h:237</a></div></div>
<div class="ttc" id="aunionEVSYS__CHANNEL__Type_html_a65fa25c1930ca41265f2e5f002139c62"><div class="ttname"><a href="unionEVSYS__CHANNEL__Type.html#a65fa25c1930ca41265f2e5f002139c62">EVSYS_CHANNEL_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00417">evsys.h:417</a></div></div>
<div class="ttc" id="aunionEVSYS__READYUSR__Type_html"><div class="ttname"><a href="unionEVSYS__READYUSR__Type.html">EVSYS_READYUSR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00348">evsys.h:348</a></div></div>
<div class="ttc" id="aunionEVSYS__INTPEND__Type_html"><div class="ttname"><a href="unionEVSYS__INTPEND__Type.html">EVSYS_INTPEND_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00200">evsys.h:200</a></div></div>
<div class="ttc" id="aunionEVSYS__PRICTRL__Type_html_a305aaf6b4cfa7a36c385644a0414aa87"><div class="ttname"><a href="unionEVSYS__PRICTRL__Type.html#a305aaf6b4cfa7a36c385644a0414aa87">EVSYS_PRICTRL_Type::RREN</a></div><div class="ttdeci">uint8_t RREN</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00182">evsys.h:182</a></div></div>
<div class="ttc" id="aunionEVSYS__INTPEND__Type_html_a881869e731c87c6da3809b22a4916ae1"><div class="ttname"><a href="unionEVSYS__INTPEND__Type.html#a881869e731c87c6da3809b22a4916ae1">EVSYS_INTPEND_Type::READY</a></div><div class="ttdeci">uint16_t READY</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00207">evsys.h:207</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_ae921d78bca5f795c52030405b011fb1a"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#ae921d78bca5f795c52030405b011fb1a">EVSYS_SWEVT_Type::CHANNEL7</a></div><div class="ttdeci">uint32_t CHANNEL7</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00071">evsys.h:71</a></div></div>
<div class="ttc" id="aunionEVSYS__CHINTENSET__Type_html"><div class="ttname"><a href="unionEVSYS__CHINTENSET__Type.html">EVSYS_CHINTENSET_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00476">evsys.h:476</a></div></div>
<div class="ttc" id="aunionEVSYS__BUSYCH__Type_html_a3068aff4e231f798151ad761b4d2e077"><div class="ttname"><a href="unionEVSYS__BUSYCH__Type.html#a3068aff4e231f798151ad761b4d2e077">EVSYS_BUSYCH_Type::BUSYCH11</a></div><div class="ttdeci">uint32_t BUSYCH11</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00303">evsys.h:303</a></div></div>
<div class="ttc" id="aunionEVSYS__READYUSR__Type_html_a895b4e4e87ab9b546b631795f26beef2"><div class="ttname"><a href="unionEVSYS__READYUSR__Type.html#a895b4e4e87ab9b546b631795f26beef2">EVSYS_READYUSR_Type::READYUSR9</a></div><div class="ttdeci">uint32_t READYUSR9</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00359">evsys.h:359</a></div></div>
<div class="ttc" id="aunionEVSYS__BUSYCH__Type_html_af85166fbdea242cc8cd3280148fce510"><div class="ttname"><a href="unionEVSYS__BUSYCH__Type.html#af85166fbdea242cc8cd3280148fce510">EVSYS_BUSYCH_Type::BUSYCH0</a></div><div class="ttdeci">uint32_t BUSYCH0</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00292">evsys.h:292</a></div></div>
<div class="ttc" id="aunionEVSYS__USER__Type_html"><div class="ttname"><a href="unionEVSYS__USER__Type.html">EVSYS_USER_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00539">evsys.h:539</a></div></div>
<div class="ttc" id="astructEvsys_html_a403953597f8540fe1970b4b808bae012"><div class="ttname"><a href="structEvsys.html#a403953597f8540fe1970b4b808bae012">Evsys::INTPEND</a></div><div class="ttdeci">__IO EVSYS_INTPEND_Type INTPEND</div><div class="ttdoc">Offset: 0x010 (R/W 16) Channel Pending Interrupt.</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00575">evsys.h:575</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_afb6ffb33522da1f5b73db40925265c33"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#afb6ffb33522da1f5b73db40925265c33">EVSYS_SWEVT_Type::CHANNEL2</a></div><div class="ttdeci">uint32_t CHANNEL2</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00066">evsys.h:66</a></div></div>
<div class="ttc" id="aunionEVSYS__USER__Type_html_aa88ac67bd24e5c36a2da60338a338e41"><div class="ttname"><a href="unionEVSYS__USER__Type.html#aa88ac67bd24e5c36a2da60338a338e41">EVSYS_USER_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00544">evsys.h:544</a></div></div>
<div class="ttc" id="aunionEVSYS__PRICTRL__Type_html"><div class="ttname"><a href="unionEVSYS__PRICTRL__Type.html">EVSYS_PRICTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00178">evsys.h:178</a></div></div>
<div class="ttc" id="aunionEVSYS__INTSTATUS__Type_html_a4303b634a1ed948b9f129a6f634296e1"><div class="ttname"><a href="unionEVSYS__INTSTATUS__Type.html#a4303b634a1ed948b9f129a6f634296e1">EVSYS_INTSTATUS_Type::CHINT4</a></div><div class="ttdeci">uint32_t CHINT4</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00238">evsys.h:238</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_a1a0ef059f4c85e9fab2dce925499e271"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#a1a0ef059f4c85e9fab2dce925499e271">EVSYS_SWEVT_Type::CHANNEL28</a></div><div class="ttdeci">uint32_t CHANNEL28</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00092">evsys.h:92</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_a5d42f70cbb271a2830e2a21c4327f4b1"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#a5d42f70cbb271a2830e2a21c4327f4b1">EVSYS_SWEVT_Type::CHANNEL19</a></div><div class="ttdeci">uint32_t CHANNEL19</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00083">evsys.h:83</a></div></div>
<div class="ttc" id="aunionEVSYS__CHANNEL__Type_html_a3588ca86407d2d644a0245f89ebec049"><div class="ttname"><a href="unionEVSYS__CHANNEL__Type.html#a3588ca86407d2d644a0245f89ebec049">EVSYS_CHANNEL_Type::RUNSTDBY</a></div><div class="ttdeci">uint32_t RUNSTDBY</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00413">evsys.h:413</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_addd2f5f365e2a4b909e1d255ee6428b5"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#addd2f5f365e2a4b909e1d255ee6428b5">EVSYS_SWEVT_Type::CHANNEL18</a></div><div class="ttdeci">uint32_t CHANNEL18</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00082">evsys.h:82</a></div></div>
<div class="ttc" id="aunionEVSYS__INTSTATUS__Type_html_a3ea86875e5af7a10c4a1b110b3eb495d"><div class="ttname"><a href="unionEVSYS__INTSTATUS__Type.html#a3ea86875e5af7a10c4a1b110b3eb495d">EVSYS_INTSTATUS_Type::CHINT10</a></div><div class="ttdeci">uint32_t CHINT10</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00244">evsys.h:244</a></div></div>
<div class="ttc" id="astructEvsysChannel_html_a71396b33c343ec4dccfdad0e5dc86f34"><div class="ttname"><a href="structEvsysChannel.html#a71396b33c343ec4dccfdad0e5dc86f34">EvsysChannel::CHINTENSET</a></div><div class="ttdeci">__IO EVSYS_CHINTENSET_Type CHINTENSET</div><div class="ttdoc">Offset: 0x005 (R/W 8) Channel n Interrupt Enable Set.</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00561">evsys.h:561</a></div></div>
<div class="ttc" id="aunionEVSYS__BUSYCH__Type_html_af5ee390a7ebd0df7e8a4c58fa1fe190c"><div class="ttname"><a href="unionEVSYS__BUSYCH__Type.html#af5ee390a7ebd0df7e8a4c58fa1fe190c">EVSYS_BUSYCH_Type::BUSYCH7</a></div><div class="ttdeci">uint32_t BUSYCH7</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00299">evsys.h:299</a></div></div>
<div class="ttc" id="aunionEVSYS__INTSTATUS__Type_html_abe8e2c652f26d4a33346f8f68b530a65"><div class="ttname"><a href="unionEVSYS__INTSTATUS__Type.html#abe8e2c652f26d4a33346f8f68b530a65">EVSYS_INTSTATUS_Type::CHINT1</a></div><div class="ttdeci">uint32_t CHINT1</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00235">evsys.h:235</a></div></div>
<div class="ttc" id="aunionEVSYS__BUSYCH__Type_html_ae66b7089cbc8cbebfaf6fd762ffeb841"><div class="ttname"><a href="unionEVSYS__BUSYCH__Type.html#ae66b7089cbc8cbebfaf6fd762ffeb841">EVSYS_BUSYCH_Type::BUSYCH1</a></div><div class="ttdeci">uint32_t BUSYCH1</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00293">evsys.h:293</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_ac055ac3d315ee455b32124381d67b8c2"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#ac055ac3d315ee455b32124381d67b8c2">EVSYS_SWEVT_Type::CHANNEL22</a></div><div class="ttdeci">uint32_t CHANNEL22</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00086">evsys.h:86</a></div></div>
<div class="ttc" id="aunionEVSYS__INTPEND__Type_html_a883056199f084a41e9984166de830b48"><div class="ttname"><a href="unionEVSYS__INTPEND__Type.html#a883056199f084a41e9984166de830b48">EVSYS_INTPEND_Type::EVD</a></div><div class="ttdeci">uint16_t EVD</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00205">evsys.h:205</a></div></div>
<div class="ttc" id="astructEvsysChannel_html_adcedeed97c238c9db198e4b3653d1f61"><div class="ttname"><a href="structEvsysChannel.html#adcedeed97c238c9db198e4b3653d1f61">EvsysChannel::CHINTFLAG</a></div><div class="ttdeci">__IO EVSYS_CHINTFLAG_Type CHINTFLAG</div><div class="ttdoc">Offset: 0x006 (R/W 8) Channel n Interrupt Flag Status and Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00562">evsys.h:562</a></div></div>
<div class="ttc" id="aunionEVSYS__CHINTENCLR__Type_html_ab75ee2f63bd0f215a0fcff585fc18ee7"><div class="ttname"><a href="unionEVSYS__CHINTENCLR__Type.html#ab75ee2f63bd0f215a0fcff585fc18ee7">EVSYS_CHINTENCLR_Type::EVD</a></div><div class="ttdeci">uint8_t EVD</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00458">evsys.h:458</a></div></div>
<div class="ttc" id="aunionEVSYS__BUSYCH__Type_html_acb41644cdba9854ba05dfbd9257644f7"><div class="ttname"><a href="unionEVSYS__BUSYCH__Type.html#acb41644cdba9854ba05dfbd9257644f7">EVSYS_BUSYCH_Type::BUSYCH9</a></div><div class="ttdeci">uint32_t BUSYCH9</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00301">evsys.h:301</a></div></div>
<div class="ttc" id="astructEvsys_html_a383b68728e361cd44f932df377fa9d03"><div class="ttname"><a href="structEvsys.html#a383b68728e361cd44f932df377fa9d03">Evsys::INTSTATUS</a></div><div class="ttdeci">__I EVSYS_INTSTATUS_Type INTSTATUS</div><div class="ttdoc">Offset: 0x014 (R/ 32) Interrupt Status.</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00577">evsys.h:577</a></div></div>
<div class="ttc" id="aunionEVSYS__CHINTFLAG__Type_html"><div class="ttname"><a href="unionEVSYS__CHINTFLAG__Type.html">EVSYS_CHINTFLAG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00497">evsys.h:497</a></div></div>
<div class="ttc" id="astructEvsys_html"><div class="ttname"><a href="structEvsys.html">Evsys</a></div><div class="ttdoc">EVSYS hardware registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00569">evsys.h:569</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_ab1c2d2e6d2fecfbc77dccffa4cd0260d"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#ab1c2d2e6d2fecfbc77dccffa4cd0260d">EVSYS_SWEVT_Type::CHANNEL12</a></div><div class="ttdeci">uint32_t CHANNEL12</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00076">evsys.h:76</a></div></div>
<div class="ttc" id="aunionEVSYS__BUSYCH__Type_html_aae241933c725aa6ad3e2f6514c6fe5fb"><div class="ttname"><a href="unionEVSYS__BUSYCH__Type.html#aae241933c725aa6ad3e2f6514c6fe5fb">EVSYS_BUSYCH_Type::BUSYCH6</a></div><div class="ttdeci">uint32_t BUSYCH6</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00298">evsys.h:298</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_a700c2ecb2609aa17a51cd398d4d9a08d"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#a700c2ecb2609aa17a51cd398d4d9a08d">EVSYS_SWEVT_Type::CHANNEL15</a></div><div class="ttdeci">uint32_t CHANNEL15</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00079">evsys.h:79</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_a337b59a2fab5c3db0ffe638af32bcbf2"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#a337b59a2fab5c3db0ffe638af32bcbf2">EVSYS_SWEVT_Type::CHANNEL10</a></div><div class="ttdeci">uint32_t CHANNEL10</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00074">evsys.h:74</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_a72a43e0628160359bb65edeb3d8cf9e7"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#a72a43e0628160359bb65edeb3d8cf9e7">EVSYS_SWEVT_Type::CHANNEL5</a></div><div class="ttdeci">uint32_t CHANNEL5</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00069">evsys.h:69</a></div></div>
<div class="ttc" id="aunionEVSYS__BUSYCH__Type_html_af97137b101bfd121da36fb3db81b43d0"><div class="ttname"><a href="unionEVSYS__BUSYCH__Type.html#af97137b101bfd121da36fb3db81b43d0">EVSYS_BUSYCH_Type::BUSYCH10</a></div><div class="ttdeci">uint32_t BUSYCH10</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00302">evsys.h:302</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_a7c0a7cae38677a058b4025d06b5cf794"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#a7c0a7cae38677a058b4025d06b5cf794">EVSYS_SWEVT_Type::CHANNEL3</a></div><div class="ttdeci">uint32_t CHANNEL3</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00067">evsys.h:67</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_acf8cbc6c00c04a5aaaafcf265d20a9e1"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#acf8cbc6c00c04a5aaaafcf265d20a9e1">EVSYS_SWEVT_Type::CHANNEL16</a></div><div class="ttdeci">uint32_t CHANNEL16</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00080">evsys.h:80</a></div></div>
<div class="ttc" id="aunionEVSYS__PRICTRL__Type_html_a52b6cd2e5f60c5bb7dcc7de71ea46718"><div class="ttname"><a href="unionEVSYS__PRICTRL__Type.html#a52b6cd2e5f60c5bb7dcc7de71ea46718">EVSYS_PRICTRL_Type::PRI</a></div><div class="ttdeci">uint8_t PRI</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00180">evsys.h:180</a></div></div>
<div class="ttc" id="aunionEVSYS__READYUSR__Type_html_a3d1b6c2bc261acee6933d1dc3c85729b"><div class="ttname"><a href="unionEVSYS__READYUSR__Type.html#a3d1b6c2bc261acee6933d1dc3c85729b">EVSYS_READYUSR_Type::READYUSR1</a></div><div class="ttdeci">uint32_t READYUSR1</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00351">evsys.h:351</a></div></div>
<div class="ttc" id="aunionEVSYS__READYUSR__Type_html_a26a2e2766077884c18b6b373cf96dbb4"><div class="ttname"><a href="unionEVSYS__READYUSR__Type.html#a26a2e2766077884c18b6b373cf96dbb4">EVSYS_READYUSR_Type::READYUSR0</a></div><div class="ttdeci">uint32_t READYUSR0</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00350">evsys.h:350</a></div></div>
<div class="ttc" id="asame54n19a_8h_html_a0d957f1433aaf5d70e4dc2b68288442d"><div class="ttname"><a href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a></div><div class="ttdeci">volatile const uint8_t RoReg8</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00053">same54n19a.h:53</a></div></div>
<div class="ttc" id="astructEvsys_html_a3f28dcf81daf78c0f14a08e7407b2c06"><div class="ttname"><a href="structEvsys.html#a3f28dcf81daf78c0f14a08e7407b2c06">Evsys::SWEVT</a></div><div class="ttdeci">__O EVSYS_SWEVT_Type SWEVT</div><div class="ttdoc">Offset: 0x004 ( /W 32) Software Event.</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00572">evsys.h:572</a></div></div>
<div class="ttc" id="aunionEVSYS__INTSTATUS__Type_html"><div class="ttname"><a href="unionEVSYS__INTSTATUS__Type.html">EVSYS_INTSTATUS_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00232">evsys.h:232</a></div></div>
<div class="ttc" id="aunionEVSYS__INTSTATUS__Type_html_a2d4f3bd0c621b3a62e972fa8e4ea1fcf"><div class="ttname"><a href="unionEVSYS__INTSTATUS__Type.html#a2d4f3bd0c621b3a62e972fa8e4ea1fcf">EVSYS_INTSTATUS_Type::CHINT7</a></div><div class="ttdeci">uint32_t CHINT7</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00241">evsys.h:241</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_aeda4949451a0e070c046d553ad4c6b15"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#aeda4949451a0e070c046d553ad4c6b15">EVSYS_SWEVT_Type::CHANNEL14</a></div><div class="ttdeci">uint32_t CHANNEL14</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00078">evsys.h:78</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_adf694ce07512d08c9f8be8494bdec305"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#adf694ce07512d08c9f8be8494bdec305">EVSYS_SWEVT_Type::CHANNEL20</a></div><div class="ttdeci">uint32_t CHANNEL20</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00084">evsys.h:84</a></div></div>
<div class="ttc" id="aunionEVSYS__INTPEND__Type_html_a6dfd5b0e8a698a390e9d47ef4a471a2c"><div class="ttname"><a href="unionEVSYS__INTPEND__Type.html#a6dfd5b0e8a698a390e9d47ef4a471a2c">EVSYS_INTPEND_Type::ID</a></div><div class="ttdeci">uint16_t ID</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00202">evsys.h:202</a></div></div>
<div class="ttc" id="aunionEVSYS__CHINTFLAG__Type_html_a2e176e0e06cfcc514c97a30bef6e3a24"><div class="ttname"><a href="unionEVSYS__CHINTFLAG__Type.html#a2e176e0e06cfcc514c97a30bef6e3a24">EVSYS_CHINTFLAG_Type::uint8_t</a></div><div class="ttdeci">__I uint8_t</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00501">evsys.h:501</a></div></div>
<div class="ttc" id="aunionEVSYS__CHINTFLAG__Type_html_a7d904b642550ebb36ce540bebd750004"><div class="ttname"><a href="unionEVSYS__CHINTFLAG__Type.html#a7d904b642550ebb36ce540bebd750004">EVSYS_CHINTFLAG_Type::EVD</a></div><div class="ttdeci">__I uint8_t EVD</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00500">evsys.h:500</a></div></div>
<div class="ttc" id="aunionEVSYS__INTSTATUS__Type_html_ae744818d60a29a341b93aa9ff55856fe"><div class="ttname"><a href="unionEVSYS__INTSTATUS__Type.html#ae744818d60a29a341b93aa9ff55856fe">EVSYS_INTSTATUS_Type::CHINT0</a></div><div class="ttdeci">uint32_t CHINT0</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00234">evsys.h:234</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_afb71fa643fe395320ada82dc55324a3a"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#afb71fa643fe395320ada82dc55324a3a">EVSYS_SWEVT_Type::CHANNEL6</a></div><div class="ttdeci">uint32_t CHANNEL6</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00070">evsys.h:70</a></div></div>
<div class="ttc" id="aunionEVSYS__CHANNEL__Type_html_ad728121f372e812fa7402884e8d22781"><div class="ttname"><a href="unionEVSYS__CHANNEL__Type.html#ad728121f372e812fa7402884e8d22781">EVSYS_CHANNEL_Type::PATH</a></div><div class="ttdeci">uint32_t PATH</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00410">evsys.h:410</a></div></div>
<div class="ttc" id="aunionEVSYS__CHANNEL__Type_html_a5c137c1a5e6b8e02df3eda0ef5167fb3"><div class="ttname"><a href="unionEVSYS__CHANNEL__Type.html#a5c137c1a5e6b8e02df3eda0ef5167fb3">EVSYS_CHANNEL_Type::ONDEMAND</a></div><div class="ttdeci">uint32_t ONDEMAND</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00414">evsys.h:414</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_aa1f8bd195072ca85e4aeed205eae7a10"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#aa1f8bd195072ca85e4aeed205eae7a10">EVSYS_SWEVT_Type::CHANNEL0</a></div><div class="ttdeci">uint32_t CHANNEL0</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00064">evsys.h:64</a></div></div>
<div class="ttc" id="astructEvsysChannel_html_afb25adcb6e2abdc140d1858dd9a527cb"><div class="ttname"><a href="structEvsysChannel.html#afb25adcb6e2abdc140d1858dd9a527cb">EvsysChannel::CHANNEL</a></div><div class="ttdeci">__IO EVSYS_CHANNEL_Type CHANNEL</div><div class="ttdoc">Offset: 0x000 (R/W 32) Channel n Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00559">evsys.h:559</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_aba0bb7800294ff6f12e7f63389d3dac1"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#aba0bb7800294ff6f12e7f63389d3dac1">EVSYS_SWEVT_Type::CHANNEL1</a></div><div class="ttdeci">uint32_t CHANNEL1</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00065">evsys.h:65</a></div></div>
<div class="ttc" id="aunionEVSYS__CTRLA__Type_html_a29e76ab447d1cf1b68002106bf15ac88"><div class="ttname"><a href="unionEVSYS__CTRLA__Type.html#a29e76ab447d1cf1b68002106bf15ac88">EVSYS_CTRLA_Type::SWRST</a></div><div class="ttdeci">uint8_t SWRST</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00046">evsys.h:46</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_a27bad8978eb8bbe71bc6f12e561440c2"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#a27bad8978eb8bbe71bc6f12e561440c2">EVSYS_SWEVT_Type::CHANNEL25</a></div><div class="ttdeci">uint32_t CHANNEL25</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00089">evsys.h:89</a></div></div>
<div class="ttc" id="aunionEVSYS__READYUSR__Type_html_ab43ee2a0d0490231d7ea9effcbbfe594"><div class="ttname"><a href="unionEVSYS__READYUSR__Type.html#ab43ee2a0d0490231d7ea9effcbbfe594">EVSYS_READYUSR_Type::READYUSR3</a></div><div class="ttdeci">uint32_t READYUSR3</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00353">evsys.h:353</a></div></div>
<div class="ttc" id="aunionEVSYS__CHINTENCLR__Type_html_a9c5ba35cdfa02830237a5968c9c15ee2"><div class="ttname"><a href="unionEVSYS__CHINTENCLR__Type.html#a9c5ba35cdfa02830237a5968c9c15ee2">EVSYS_CHINTENCLR_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00461">evsys.h:461</a></div></div>
<div class="ttc" id="aunionEVSYS__SWEVT__Type_html_afc79f79749241819d797901b24d7ef4c"><div class="ttname"><a href="unionEVSYS__SWEVT__Type.html#afc79f79749241819d797901b24d7ef4c">EVSYS_SWEVT_Type::CHANNEL24</a></div><div class="ttdeci">uint32_t CHANNEL24</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00088">evsys.h:88</a></div></div>
<div class="ttc" id="aunionEVSYS__USER__Type_html_aa5d01565eec1c1ae850f727fe186a1d3"><div class="ttname"><a href="unionEVSYS__USER__Type.html#aa5d01565eec1c1ae850f727fe186a1d3">EVSYS_USER_Type::CHANNEL</a></div><div class="ttdeci">uint32_t CHANNEL</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00541">evsys.h:541</a></div></div>
<div class="ttc" id="aunionEVSYS__INTSTATUS__Type_html_a217c238e2d667ef547bddf4d006b0597"><div class="ttname"><a href="unionEVSYS__INTSTATUS__Type.html#a217c238e2d667ef547bddf4d006b0597">EVSYS_INTSTATUS_Type::CHINT6</a></div><div class="ttdeci">uint32_t CHINT6</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00240">evsys.h:240</a></div></div>
<div class="ttc" id="aunionEVSYS__CHSTATUS__Type_html_adff83153db19048836e9c148eac73266"><div class="ttname"><a href="unionEVSYS__CHSTATUS__Type.html#adff83153db19048836e9c148eac73266">EVSYS_CHSTATUS_Type::BUSYCH</a></div><div class="ttdeci">uint8_t BUSYCH</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00521">evsys.h:521</a></div></div>
<div class="ttc" id="astructEvsys_html_abe4513a0e5da32e400629a69ab90123e"><div class="ttname"><a href="structEvsys.html#abe4513a0e5da32e400629a69ab90123e">Evsys::PRICTRL</a></div><div class="ttdeci">__IO EVSYS_PRICTRL_Type PRICTRL</div><div class="ttdoc">Offset: 0x008 (R/W 8) Priority Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2evsys_8h_source.html#l00573">evsys.h:573</a></div></div>
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<p>Component description for FREQM.
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Data Structures</h2></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structFreqm.html">Freqm</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">FREQM hardware registers. <a href="structFreqm.html#details">More...</a><br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>FREQM_U2257</b></td></tr>
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<tr class="memitem:ae943dfb78d362311f23c06ae9aeae26f"><td class="memItemLeft" align="right" valign="top"><a id="ae943dfb78d362311f23c06ae9aeae26f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>REV_FREQM</b>&#160;&#160;&#160;0x110</td></tr>
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<tr class="memitem:a623254aadaef4942d2fe0e4f72deb9b3"><td class="memItemLeft" align="right" valign="top"><a id="a623254aadaef4942d2fe0e4f72deb9b3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a623254aadaef4942d2fe0e4f72deb9b3">FREQM_CTRLA_OFFSET</a>&#160;&#160;&#160;0x00</td></tr>
<tr class="memdesc:a623254aadaef4942d2fe0e4f72deb9b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_CTRLA offset) Control A Register <br /></td></tr>
<tr class="separator:a623254aadaef4942d2fe0e4f72deb9b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8656c15db87048e0eeadc09522615e12"><td class="memItemLeft" align="right" valign="top"><a id="a8656c15db87048e0eeadc09522615e12"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a8656c15db87048e0eeadc09522615e12">FREQM_CTRLA_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a8656c15db87048e0eeadc09522615e12"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_CTRLA reset_value) Control A Register <br /></td></tr>
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<tr class="memitem:a4487b5f3d94c3c8cfbb649230f5fd7e4"><td class="memItemLeft" align="right" valign="top"><a id="a4487b5f3d94c3c8cfbb649230f5fd7e4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a4487b5f3d94c3c8cfbb649230f5fd7e4">FREQM_CTRLA_SWRST_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a4487b5f3d94c3c8cfbb649230f5fd7e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_CTRLA) Software Reset <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>FREQM_CTRLA_SWRST</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2freqm_8h.html#a4487b5f3d94c3c8cfbb649230f5fd7e4">FREQM_CTRLA_SWRST_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#ab3660ed3c6f680738687786dc974b0fc">FREQM_CTRLA_ENABLE_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:ab3660ed3c6f680738687786dc974b0fc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_CTRLA) Enable <br /></td></tr>
<tr class="separator:ab3660ed3c6f680738687786dc974b0fc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2be8cc16237b54fd8cde71f0ccc37355"><td class="memItemLeft" align="right" valign="top"><a id="a2be8cc16237b54fd8cde71f0ccc37355"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>FREQM_CTRLA_ENABLE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2freqm_8h.html#ab3660ed3c6f680738687786dc974b0fc">FREQM_CTRLA_ENABLE_Pos</a>)</td></tr>
<tr class="separator:a2be8cc16237b54fd8cde71f0ccc37355"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a451d4d6e44dbf4f144d3e834468e4be2"><td class="memItemLeft" align="right" valign="top"><a id="a451d4d6e44dbf4f144d3e834468e4be2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a451d4d6e44dbf4f144d3e834468e4be2">FREQM_CTRLA_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x03)</td></tr>
<tr class="memdesc:a451d4d6e44dbf4f144d3e834468e4be2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_CTRLA) MASK Register <br /></td></tr>
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<tr class="memitem:a71beaeca8787b49fac6e47b3f98ed178"><td class="memItemLeft" align="right" valign="top"><a id="a71beaeca8787b49fac6e47b3f98ed178"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a71beaeca8787b49fac6e47b3f98ed178">FREQM_CTRLB_OFFSET</a>&#160;&#160;&#160;0x01</td></tr>
<tr class="memdesc:a71beaeca8787b49fac6e47b3f98ed178"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_CTRLB offset) Control B Register <br /></td></tr>
<tr class="separator:a71beaeca8787b49fac6e47b3f98ed178"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a437850109ccd64c5e708704920993da7"><td class="memItemLeft" align="right" valign="top"><a id="a437850109ccd64c5e708704920993da7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a437850109ccd64c5e708704920993da7">FREQM_CTRLB_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a437850109ccd64c5e708704920993da7"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_CTRLB reset_value) Control B Register <br /></td></tr>
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<tr class="memitem:ac575d2e8b327956f7a9271a14dff4745"><td class="memItemLeft" align="right" valign="top"><a id="ac575d2e8b327956f7a9271a14dff4745"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#ac575d2e8b327956f7a9271a14dff4745">FREQM_CTRLB_START_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ac575d2e8b327956f7a9271a14dff4745"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_CTRLB) Start Measurement <br /></td></tr>
<tr class="separator:ac575d2e8b327956f7a9271a14dff4745"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6d6d9ad1eeef5b5ef7111ffe04b9e269"><td class="memItemLeft" align="right" valign="top"><a id="a6d6d9ad1eeef5b5ef7111ffe04b9e269"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>FREQM_CTRLB_START</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2freqm_8h.html#ac575d2e8b327956f7a9271a14dff4745">FREQM_CTRLB_START_Pos</a>)</td></tr>
<tr class="separator:a6d6d9ad1eeef5b5ef7111ffe04b9e269"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abab11724db32ac2d0bcf9d9a9003e545"><td class="memItemLeft" align="right" valign="top"><a id="abab11724db32ac2d0bcf9d9a9003e545"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#abab11724db32ac2d0bcf9d9a9003e545">FREQM_CTRLB_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x01)</td></tr>
<tr class="memdesc:abab11724db32ac2d0bcf9d9a9003e545"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_CTRLB) MASK Register <br /></td></tr>
<tr class="separator:abab11724db32ac2d0bcf9d9a9003e545"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5835c5f151d4b6bd35bd6fc7061ea6a4"><td class="memItemLeft" align="right" valign="top"><a id="a5835c5f151d4b6bd35bd6fc7061ea6a4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a5835c5f151d4b6bd35bd6fc7061ea6a4">FREQM_CFGA_OFFSET</a>&#160;&#160;&#160;0x02</td></tr>
<tr class="memdesc:a5835c5f151d4b6bd35bd6fc7061ea6a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_CFGA offset) Config A register <br /></td></tr>
<tr class="separator:a5835c5f151d4b6bd35bd6fc7061ea6a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afcf71438184c4b9afc75af14277496a0"><td class="memItemLeft" align="right" valign="top"><a id="afcf71438184c4b9afc75af14277496a0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#afcf71438184c4b9afc75af14277496a0">FREQM_CFGA_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000)</td></tr>
<tr class="memdesc:afcf71438184c4b9afc75af14277496a0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_CFGA reset_value) Config A register <br /></td></tr>
<tr class="separator:afcf71438184c4b9afc75af14277496a0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac3930b6975b7736bb6a5ee670a28a6e4"><td class="memItemLeft" align="right" valign="top"><a id="ac3930b6975b7736bb6a5ee670a28a6e4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#ac3930b6975b7736bb6a5ee670a28a6e4">FREQM_CFGA_REFNUM_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ac3930b6975b7736bb6a5ee670a28a6e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_CFGA) Number of Reference Clock Cycles <br /></td></tr>
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<tr class="memitem:abe672502a10fe6e42beb3b89d5943ed7"><td class="memItemLeft" align="right" valign="top"><a id="abe672502a10fe6e42beb3b89d5943ed7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>FREQM_CFGA_REFNUM_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF) &lt;&lt; <a class="el" href="component_2freqm_8h.html#ac3930b6975b7736bb6a5ee670a28a6e4">FREQM_CFGA_REFNUM_Pos</a>)</td></tr>
<tr class="separator:abe672502a10fe6e42beb3b89d5943ed7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:acc80e7cfa1aa1014c8d86ed41ca601ea"><td class="memItemLeft" align="right" valign="top"><a id="acc80e7cfa1aa1014c8d86ed41ca601ea"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>FREQM_CFGA_REFNUM</b>(value)&#160;&#160;&#160;(FREQM_CFGA_REFNUM_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2freqm_8h.html#ac3930b6975b7736bb6a5ee670a28a6e4">FREQM_CFGA_REFNUM_Pos</a>))</td></tr>
<tr class="separator:acc80e7cfa1aa1014c8d86ed41ca601ea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a33de8b24f88bedb7bbd286af13e23a87"><td class="memItemLeft" align="right" valign="top"><a id="a33de8b24f88bedb7bbd286af13e23a87"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a33de8b24f88bedb7bbd286af13e23a87">FREQM_CFGA_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00FF)</td></tr>
<tr class="memdesc:a33de8b24f88bedb7bbd286af13e23a87"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_CFGA) MASK Register <br /></td></tr>
<tr class="separator:a33de8b24f88bedb7bbd286af13e23a87"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a31da73dd35a463ca4eea941ee1f55e1c"><td class="memItemLeft" align="right" valign="top"><a id="a31da73dd35a463ca4eea941ee1f55e1c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a31da73dd35a463ca4eea941ee1f55e1c">FREQM_INTENCLR_OFFSET</a>&#160;&#160;&#160;0x08</td></tr>
<tr class="memdesc:a31da73dd35a463ca4eea941ee1f55e1c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_INTENCLR offset) Interrupt Enable Clear Register <br /></td></tr>
<tr class="separator:a31da73dd35a463ca4eea941ee1f55e1c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4cfbcaf309592f477f8aca52d4da0b00"><td class="memItemLeft" align="right" valign="top"><a id="a4cfbcaf309592f477f8aca52d4da0b00"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a4cfbcaf309592f477f8aca52d4da0b00">FREQM_INTENCLR_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a4cfbcaf309592f477f8aca52d4da0b00"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_INTENCLR reset_value) Interrupt Enable Clear Register <br /></td></tr>
<tr class="separator:a4cfbcaf309592f477f8aca52d4da0b00"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3d742bee7a8d19b4734a4a29d30622f7"><td class="memItemLeft" align="right" valign="top"><a id="a3d742bee7a8d19b4734a4a29d30622f7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a3d742bee7a8d19b4734a4a29d30622f7">FREQM_INTENCLR_DONE_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a3d742bee7a8d19b4734a4a29d30622f7"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_INTENCLR) Measurement Done Interrupt Enable <br /></td></tr>
<tr class="separator:a3d742bee7a8d19b4734a4a29d30622f7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1f420ea21c6642b46b608fee031f8b4e"><td class="memItemLeft" align="right" valign="top"><a id="a1f420ea21c6642b46b608fee031f8b4e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>FREQM_INTENCLR_DONE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2freqm_8h.html#a3d742bee7a8d19b4734a4a29d30622f7">FREQM_INTENCLR_DONE_Pos</a>)</td></tr>
<tr class="separator:a1f420ea21c6642b46b608fee031f8b4e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1956ca13e973b88eea66618c51ef48b3"><td class="memItemLeft" align="right" valign="top"><a id="a1956ca13e973b88eea66618c51ef48b3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a1956ca13e973b88eea66618c51ef48b3">FREQM_INTENCLR_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x01)</td></tr>
<tr class="memdesc:a1956ca13e973b88eea66618c51ef48b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_INTENCLR) MASK Register <br /></td></tr>
<tr class="separator:a1956ca13e973b88eea66618c51ef48b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a322e0b560edc5ac084d4f9a338850b55"><td class="memItemLeft" align="right" valign="top"><a id="a322e0b560edc5ac084d4f9a338850b55"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a322e0b560edc5ac084d4f9a338850b55">FREQM_INTENSET_OFFSET</a>&#160;&#160;&#160;0x09</td></tr>
<tr class="memdesc:a322e0b560edc5ac084d4f9a338850b55"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_INTENSET offset) Interrupt Enable Set Register <br /></td></tr>
<tr class="separator:a322e0b560edc5ac084d4f9a338850b55"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aad4904b7b0bd47ea2312c0b14a12ca48"><td class="memItemLeft" align="right" valign="top"><a id="aad4904b7b0bd47ea2312c0b14a12ca48"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#aad4904b7b0bd47ea2312c0b14a12ca48">FREQM_INTENSET_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:aad4904b7b0bd47ea2312c0b14a12ca48"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_INTENSET reset_value) Interrupt Enable Set Register <br /></td></tr>
<tr class="separator:aad4904b7b0bd47ea2312c0b14a12ca48"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9343bb0070741ae8863e061d501d7815"><td class="memItemLeft" align="right" valign="top"><a id="a9343bb0070741ae8863e061d501d7815"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a9343bb0070741ae8863e061d501d7815">FREQM_INTENSET_DONE_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a9343bb0070741ae8863e061d501d7815"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_INTENSET) Measurement Done Interrupt Enable <br /></td></tr>
<tr class="separator:a9343bb0070741ae8863e061d501d7815"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4d45cf65fbc3a4dfb327409f02a8e8f0"><td class="memItemLeft" align="right" valign="top"><a id="a4d45cf65fbc3a4dfb327409f02a8e8f0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>FREQM_INTENSET_DONE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2freqm_8h.html#a9343bb0070741ae8863e061d501d7815">FREQM_INTENSET_DONE_Pos</a>)</td></tr>
<tr class="separator:a4d45cf65fbc3a4dfb327409f02a8e8f0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa7c2b1805de385754efffce342e99817"><td class="memItemLeft" align="right" valign="top"><a id="aa7c2b1805de385754efffce342e99817"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#aa7c2b1805de385754efffce342e99817">FREQM_INTENSET_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x01)</td></tr>
<tr class="memdesc:aa7c2b1805de385754efffce342e99817"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_INTENSET) MASK Register <br /></td></tr>
<tr class="separator:aa7c2b1805de385754efffce342e99817"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aea43e28481d2a027a76f4474a6ed8532"><td class="memItemLeft" align="right" valign="top"><a id="aea43e28481d2a027a76f4474a6ed8532"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#aea43e28481d2a027a76f4474a6ed8532">FREQM_INTFLAG_OFFSET</a>&#160;&#160;&#160;0x0A</td></tr>
<tr class="memdesc:aea43e28481d2a027a76f4474a6ed8532"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_INTFLAG offset) Interrupt Flag Register <br /></td></tr>
<tr class="separator:aea43e28481d2a027a76f4474a6ed8532"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a302d92b17313ed5b9b94446827b559b6"><td class="memItemLeft" align="right" valign="top"><a id="a302d92b17313ed5b9b94446827b559b6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a302d92b17313ed5b9b94446827b559b6">FREQM_INTFLAG_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a302d92b17313ed5b9b94446827b559b6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_INTFLAG reset_value) Interrupt Flag Register <br /></td></tr>
<tr class="separator:a302d92b17313ed5b9b94446827b559b6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a297418104703e236fdfb9ec6f8d82f6e"><td class="memItemLeft" align="right" valign="top"><a id="a297418104703e236fdfb9ec6f8d82f6e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a297418104703e236fdfb9ec6f8d82f6e">FREQM_INTFLAG_DONE_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a297418104703e236fdfb9ec6f8d82f6e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_INTFLAG) Measurement Done <br /></td></tr>
<tr class="separator:a297418104703e236fdfb9ec6f8d82f6e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa6ec94b5a639fe0cd1e92374822369b1"><td class="memItemLeft" align="right" valign="top"><a id="aa6ec94b5a639fe0cd1e92374822369b1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>FREQM_INTFLAG_DONE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2freqm_8h.html#a297418104703e236fdfb9ec6f8d82f6e">FREQM_INTFLAG_DONE_Pos</a>)</td></tr>
<tr class="separator:aa6ec94b5a639fe0cd1e92374822369b1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1975f795a95041fb4f0ab01e25cceeea"><td class="memItemLeft" align="right" valign="top"><a id="a1975f795a95041fb4f0ab01e25cceeea"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a1975f795a95041fb4f0ab01e25cceeea">FREQM_INTFLAG_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x01)</td></tr>
<tr class="memdesc:a1975f795a95041fb4f0ab01e25cceeea"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_INTFLAG) MASK Register <br /></td></tr>
<tr class="separator:a1975f795a95041fb4f0ab01e25cceeea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9bc1627588f595c84efac70a1897b435"><td class="memItemLeft" align="right" valign="top"><a id="a9bc1627588f595c84efac70a1897b435"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a9bc1627588f595c84efac70a1897b435">FREQM_STATUS_OFFSET</a>&#160;&#160;&#160;0x0B</td></tr>
<tr class="memdesc:a9bc1627588f595c84efac70a1897b435"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_STATUS offset) Status Register <br /></td></tr>
<tr class="separator:a9bc1627588f595c84efac70a1897b435"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2246bd9800c0c53833e7d0f205ad80bd"><td class="memItemLeft" align="right" valign="top"><a id="a2246bd9800c0c53833e7d0f205ad80bd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a2246bd9800c0c53833e7d0f205ad80bd">FREQM_STATUS_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a2246bd9800c0c53833e7d0f205ad80bd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_STATUS reset_value) Status Register <br /></td></tr>
<tr class="separator:a2246bd9800c0c53833e7d0f205ad80bd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a39ad257ccdcb50dae4632c592e8a0faa"><td class="memItemLeft" align="right" valign="top"><a id="a39ad257ccdcb50dae4632c592e8a0faa"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a39ad257ccdcb50dae4632c592e8a0faa">FREQM_STATUS_BUSY_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a39ad257ccdcb50dae4632c592e8a0faa"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_STATUS) FREQM Status <br /></td></tr>
<tr class="separator:a39ad257ccdcb50dae4632c592e8a0faa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad7f4c044f4ed8751447aa242dea63fce"><td class="memItemLeft" align="right" valign="top"><a id="ad7f4c044f4ed8751447aa242dea63fce"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>FREQM_STATUS_BUSY</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2freqm_8h.html#a39ad257ccdcb50dae4632c592e8a0faa">FREQM_STATUS_BUSY_Pos</a>)</td></tr>
<tr class="separator:ad7f4c044f4ed8751447aa242dea63fce"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abf3e33ca9df370bbf1df2fdad0206755"><td class="memItemLeft" align="right" valign="top"><a id="abf3e33ca9df370bbf1df2fdad0206755"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#abf3e33ca9df370bbf1df2fdad0206755">FREQM_STATUS_OVF_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:abf3e33ca9df370bbf1df2fdad0206755"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_STATUS) Sticky Count Value Overflow <br /></td></tr>
<tr class="separator:abf3e33ca9df370bbf1df2fdad0206755"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa3e8edaf57c24fa0404e4535b2103be0"><td class="memItemLeft" align="right" valign="top"><a id="aa3e8edaf57c24fa0404e4535b2103be0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>FREQM_STATUS_OVF</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2freqm_8h.html#abf3e33ca9df370bbf1df2fdad0206755">FREQM_STATUS_OVF_Pos</a>)</td></tr>
<tr class="separator:aa3e8edaf57c24fa0404e4535b2103be0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a38c7441e04c013ceb30abc6a68828221"><td class="memItemLeft" align="right" valign="top"><a id="a38c7441e04c013ceb30abc6a68828221"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a38c7441e04c013ceb30abc6a68828221">FREQM_STATUS_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x03)</td></tr>
<tr class="memdesc:a38c7441e04c013ceb30abc6a68828221"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_STATUS) MASK Register <br /></td></tr>
<tr class="separator:a38c7441e04c013ceb30abc6a68828221"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5cb7477e6e83f8b6a50d38efc516030b"><td class="memItemLeft" align="right" valign="top"><a id="a5cb7477e6e83f8b6a50d38efc516030b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a5cb7477e6e83f8b6a50d38efc516030b">FREQM_SYNCBUSY_OFFSET</a>&#160;&#160;&#160;0x0C</td></tr>
<tr class="memdesc:a5cb7477e6e83f8b6a50d38efc516030b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_SYNCBUSY offset) Synchronization Busy Register <br /></td></tr>
<tr class="separator:a5cb7477e6e83f8b6a50d38efc516030b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af1bb6a6e94796c96bb6e082d30786b2d"><td class="memItemLeft" align="right" valign="top"><a id="af1bb6a6e94796c96bb6e082d30786b2d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#af1bb6a6e94796c96bb6e082d30786b2d">FREQM_SYNCBUSY_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:af1bb6a6e94796c96bb6e082d30786b2d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_SYNCBUSY reset_value) Synchronization Busy Register <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#afa5d4860d253f6e57ec3854826e506de">FREQM_SYNCBUSY_SWRST_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:afa5d4860d253f6e57ec3854826e506de"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_SYNCBUSY) Software Reset <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>FREQM_SYNCBUSY_SWRST</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2freqm_8h.html#afa5d4860d253f6e57ec3854826e506de">FREQM_SYNCBUSY_SWRST_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a470279b12e764e5d1bf66fae613e87bb">FREQM_SYNCBUSY_ENABLE_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:a470279b12e764e5d1bf66fae613e87bb"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_SYNCBUSY) Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>FREQM_SYNCBUSY_ENABLE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2freqm_8h.html#a470279b12e764e5d1bf66fae613e87bb">FREQM_SYNCBUSY_ENABLE_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a82a1747c20d325fa4cd125e7130e99cd">FREQM_SYNCBUSY_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000003)</td></tr>
<tr class="memdesc:a82a1747c20d325fa4cd125e7130e99cd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_SYNCBUSY) MASK Register <br /></td></tr>
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<tr class="memitem:a667b866874d1a6766ecff28635ba6616"><td class="memItemLeft" align="right" valign="top"><a id="a667b866874d1a6766ecff28635ba6616"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a667b866874d1a6766ecff28635ba6616">FREQM_VALUE_OFFSET</a>&#160;&#160;&#160;0x10</td></tr>
<tr class="memdesc:a667b866874d1a6766ecff28635ba6616"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_VALUE offset) Count Value Register <br /></td></tr>
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<tr class="memitem:a7e701385f3015d5c8ed4e54b2641f33d"><td class="memItemLeft" align="right" valign="top"><a id="a7e701385f3015d5c8ed4e54b2641f33d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a7e701385f3015d5c8ed4e54b2641f33d">FREQM_VALUE_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a7e701385f3015d5c8ed4e54b2641f33d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_VALUE reset_value) Count Value Register <br /></td></tr>
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<tr class="memitem:ad6aa2e8dfd43141479ecae0eb156d610"><td class="memItemLeft" align="right" valign="top"><a id="ad6aa2e8dfd43141479ecae0eb156d610"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#ad6aa2e8dfd43141479ecae0eb156d610">FREQM_VALUE_VALUE_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ad6aa2e8dfd43141479ecae0eb156d610"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_VALUE) Measurement Value <br /></td></tr>
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<tr class="memitem:ad0a575e0348958b43aa0b58a76304aac"><td class="memItemLeft" align="right" valign="top"><a id="ad0a575e0348958b43aa0b58a76304aac"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>FREQM_VALUE_VALUE_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFF) &lt;&lt; <a class="el" href="component_2freqm_8h.html#ad6aa2e8dfd43141479ecae0eb156d610">FREQM_VALUE_VALUE_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>FREQM_VALUE_VALUE</b>(value)&#160;&#160;&#160;(FREQM_VALUE_VALUE_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2freqm_8h.html#ad6aa2e8dfd43141479ecae0eb156d610">FREQM_VALUE_VALUE_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2freqm_8h.html#a129fbc326338dee08cf86f78259703de">FREQM_VALUE_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00FFFFFF)</td></tr>
<tr class="memdesc:a129fbc326338dee08cf86f78259703de"><td class="mdescLeft">&#160;</td><td class="mdescRight">(FREQM_VALUE) MASK Register <br /></td></tr>
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</table>
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Component description for FREQM. </p>
<p>Copyright (c) 2019 Microchip Technology Inc.</p>
<p>\asf_license_start </p>
<p class="definition">Definition in file <a class="el" href="component_2freqm_8h_source.html">freqm.h</a>.</p>
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<a href="component_2freqm_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_FREQM_COMPONENT_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_FREQM_COMPONENT_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160; </div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define FREQM_U2257</span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define REV_FREQM 0x110</span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160; </div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="comment">/* -------- FREQM_CTRLA : (FREQM Offset: 0x00) (R/W 8) Control A Register -------- */</span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00044"></a><span class="lineno"><a class="line" href="unionFREQM__CTRLA__Type.html"> 44</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00046"></a><span class="lineno"><a class="line" href="unionFREQM__CTRLA__Type.html#a29a04d8effb82a7b7ecf9e93c6068063"> 46</a></span>&#160; uint8_t <a class="code" href="unionFREQM__CTRLA__Type.html#a29a04d8effb82a7b7ecf9e93c6068063">SWRST</a>:1; </div>
<div class="line"><a name="l00047"></a><span class="lineno"><a class="line" href="unionFREQM__CTRLA__Type.html#a493fa12cd83df28db295c2f44b115b53"> 47</a></span>&#160; uint8_t <a class="code" href="unionFREQM__CTRLA__Type.html#a493fa12cd83df28db295c2f44b115b53">ENABLE</a>:1; </div>
<div class="line"><a name="l00048"></a><span class="lineno"><a class="line" href="unionFREQM__CTRLA__Type.html#a10983d8d95029225cb683a59a41fefcd"> 48</a></span>&#160; uint8_t :6; </div>
<div class="line"><a name="l00049"></a><span class="lineno"><a class="line" href="unionFREQM__CTRLA__Type.html#a7df60dc044979654c58fa52f62f49e4d"> 49</a></span>&#160; } bit; </div>
<div class="line"><a name="l00050"></a><span class="lineno"><a class="line" href="unionFREQM__CTRLA__Type.html#ae51a6dbe0092c37183c6414e916fa241"> 50</a></span>&#160; uint8_t <a class="code" href="unionFREQM__CTRLA__Type.html#ae51a6dbe0092c37183c6414e916fa241">reg</a>; </div>
<div class="line"><a name="l00051"></a><span class="lineno"> 51</span>&#160;} <a class="code" href="unionFREQM__CTRLA__Type.html">FREQM_CTRLA_Type</a>;</div>
<div class="line"><a name="l00052"></a><span class="lineno"> 52</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00053"></a><span class="lineno"> 53</span>&#160; </div>
<div class="line"><a name="l00054"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a623254aadaef4942d2fe0e4f72deb9b3"> 54</a></span>&#160;<span class="preprocessor">#define FREQM_CTRLA_OFFSET 0x00 </span></div>
<div class="line"><a name="l00055"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a8656c15db87048e0eeadc09522615e12"> 55</a></span>&#160;<span class="preprocessor">#define FREQM_CTRLA_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00057"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a4487b5f3d94c3c8cfbb649230f5fd7e4"> 57</a></span>&#160;<span class="preprocessor">#define FREQM_CTRLA_SWRST_Pos 0 </span></div>
<div class="line"><a name="l00058"></a><span class="lineno"> 58</span>&#160;<span class="preprocessor">#define FREQM_CTRLA_SWRST (_U_(0x1) &lt;&lt; FREQM_CTRLA_SWRST_Pos)</span></div>
<div class="line"><a name="l00059"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#ab3660ed3c6f680738687786dc974b0fc"> 59</a></span>&#160;<span class="preprocessor">#define FREQM_CTRLA_ENABLE_Pos 1 </span></div>
<div class="line"><a name="l00060"></a><span class="lineno"> 60</span>&#160;<span class="preprocessor">#define FREQM_CTRLA_ENABLE (_U_(0x1) &lt;&lt; FREQM_CTRLA_ENABLE_Pos)</span></div>
<div class="line"><a name="l00061"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a451d4d6e44dbf4f144d3e834468e4be2"> 61</a></span>&#160;<span class="preprocessor">#define FREQM_CTRLA_MASK _U_(0x03) </span></div>
<div class="line"><a name="l00063"></a><span class="lineno"> 63</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- FREQM_CTRLB : (FREQM Offset: 0x01) ( /W 8) Control B Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00064"></a><span class="lineno"> 64</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00065"></a><span class="lineno"><a class="line" href="unionFREQM__CTRLB__Type.html"> 65</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00066"></a><span class="lineno"> 66</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00067"></a><span class="lineno"><a class="line" href="unionFREQM__CTRLB__Type.html#a06c0e080f2ac670f6e9240cc4209ba81"> 67</a></span>&#160; uint8_t <a class="code" href="unionFREQM__CTRLB__Type.html#a06c0e080f2ac670f6e9240cc4209ba81">START</a>:1; </div>
<div class="line"><a name="l00068"></a><span class="lineno"><a class="line" href="unionFREQM__CTRLB__Type.html#a6ea613dfc5d57c3658827ca2c5fc7554"> 68</a></span>&#160; uint8_t :7; </div>
<div class="line"><a name="l00069"></a><span class="lineno"><a class="line" href="unionFREQM__CTRLB__Type.html#ad64346173ee7196e34fa47bb72712bbd"> 69</a></span>&#160; } bit; </div>
<div class="line"><a name="l00070"></a><span class="lineno"><a class="line" href="unionFREQM__CTRLB__Type.html#a27bfa9c4cdec9b17ea9c7a2cdbdbd671"> 70</a></span>&#160; uint8_t <a class="code" href="unionFREQM__CTRLB__Type.html#a27bfa9c4cdec9b17ea9c7a2cdbdbd671">reg</a>; </div>
<div class="line"><a name="l00071"></a><span class="lineno"> 71</span>&#160;} <a class="code" href="unionFREQM__CTRLB__Type.html">FREQM_CTRLB_Type</a>;</div>
<div class="line"><a name="l00072"></a><span class="lineno"> 72</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00073"></a><span class="lineno"> 73</span>&#160; </div>
<div class="line"><a name="l00074"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a71beaeca8787b49fac6e47b3f98ed178"> 74</a></span>&#160;<span class="preprocessor">#define FREQM_CTRLB_OFFSET 0x01 </span></div>
<div class="line"><a name="l00075"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a437850109ccd64c5e708704920993da7"> 75</a></span>&#160;<span class="preprocessor">#define FREQM_CTRLB_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00077"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#ac575d2e8b327956f7a9271a14dff4745"> 77</a></span>&#160;<span class="preprocessor">#define FREQM_CTRLB_START_Pos 0 </span></div>
<div class="line"><a name="l00078"></a><span class="lineno"> 78</span>&#160;<span class="preprocessor">#define FREQM_CTRLB_START (_U_(0x1) &lt;&lt; FREQM_CTRLB_START_Pos)</span></div>
<div class="line"><a name="l00079"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#abab11724db32ac2d0bcf9d9a9003e545"> 79</a></span>&#160;<span class="preprocessor">#define FREQM_CTRLB_MASK _U_(0x01) </span></div>
<div class="line"><a name="l00081"></a><span class="lineno"> 81</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- FREQM_CFGA : (FREQM Offset: 0x02) (R/W 16) Config A register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00082"></a><span class="lineno"> 82</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00083"></a><span class="lineno"><a class="line" href="unionFREQM__CFGA__Type.html"> 83</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00084"></a><span class="lineno"> 84</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00085"></a><span class="lineno"><a class="line" href="unionFREQM__CFGA__Type.html#a50d45ff71a9897592fa14d0b8d199c38"> 85</a></span>&#160; uint16_t <a class="code" href="unionFREQM__CFGA__Type.html#a50d45ff71a9897592fa14d0b8d199c38">REFNUM</a>:8; </div>
<div class="line"><a name="l00086"></a><span class="lineno"><a class="line" href="unionFREQM__CFGA__Type.html#a8f064417a14198547f2f3969caf1aadb"> 86</a></span>&#160; uint16_t :8; </div>
<div class="line"><a name="l00087"></a><span class="lineno"><a class="line" href="unionFREQM__CFGA__Type.html#a973c451bf618ce9a2f670376d2a76566"> 87</a></span>&#160; } bit; </div>
<div class="line"><a name="l00088"></a><span class="lineno"><a class="line" href="unionFREQM__CFGA__Type.html#a78996fb67874d33a78c80ed1c617658e"> 88</a></span>&#160; uint16_t <a class="code" href="unionFREQM__CFGA__Type.html#a78996fb67874d33a78c80ed1c617658e">reg</a>; </div>
<div class="line"><a name="l00089"></a><span class="lineno"> 89</span>&#160;} <a class="code" href="unionFREQM__CFGA__Type.html">FREQM_CFGA_Type</a>;</div>
<div class="line"><a name="l00090"></a><span class="lineno"> 90</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00091"></a><span class="lineno"> 91</span>&#160; </div>
<div class="line"><a name="l00092"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a5835c5f151d4b6bd35bd6fc7061ea6a4"> 92</a></span>&#160;<span class="preprocessor">#define FREQM_CFGA_OFFSET 0x02 </span></div>
<div class="line"><a name="l00093"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#afcf71438184c4b9afc75af14277496a0"> 93</a></span>&#160;<span class="preprocessor">#define FREQM_CFGA_RESETVALUE _U_(0x0000) </span></div>
<div class="line"><a name="l00095"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#ac3930b6975b7736bb6a5ee670a28a6e4"> 95</a></span>&#160;<span class="preprocessor">#define FREQM_CFGA_REFNUM_Pos 0 </span></div>
<div class="line"><a name="l00096"></a><span class="lineno"> 96</span>&#160;<span class="preprocessor">#define FREQM_CFGA_REFNUM_Msk (_U_(0xFF) &lt;&lt; FREQM_CFGA_REFNUM_Pos)</span></div>
<div class="line"><a name="l00097"></a><span class="lineno"> 97</span>&#160;<span class="preprocessor">#define FREQM_CFGA_REFNUM(value) (FREQM_CFGA_REFNUM_Msk &amp; ((value) &lt;&lt; FREQM_CFGA_REFNUM_Pos))</span></div>
<div class="line"><a name="l00098"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a33de8b24f88bedb7bbd286af13e23a87"> 98</a></span>&#160;<span class="preprocessor">#define FREQM_CFGA_MASK _U_(0x00FF) </span></div>
<div class="line"><a name="l00100"></a><span class="lineno"> 100</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- FREQM_INTENCLR : (FREQM Offset: 0x08) (R/W 8) Interrupt Enable Clear Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00101"></a><span class="lineno"> 101</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00102"></a><span class="lineno"><a class="line" href="unionFREQM__INTENCLR__Type.html"> 102</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00103"></a><span class="lineno"> 103</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00104"></a><span class="lineno"><a class="line" href="unionFREQM__INTENCLR__Type.html#aee027e3e656ac21454c63f41767e9083"> 104</a></span>&#160; uint8_t <a class="code" href="unionFREQM__INTENCLR__Type.html#aee027e3e656ac21454c63f41767e9083">DONE</a>:1; </div>
<div class="line"><a name="l00105"></a><span class="lineno"><a class="line" href="unionFREQM__INTENCLR__Type.html#ae649c5459809c3924235fd21526b271f"> 105</a></span>&#160; uint8_t :7; </div>
<div class="line"><a name="l00106"></a><span class="lineno"><a class="line" href="unionFREQM__INTENCLR__Type.html#a9e2467e624af7cea636e0ce221988782"> 106</a></span>&#160; } bit; </div>
<div class="line"><a name="l00107"></a><span class="lineno"><a class="line" href="unionFREQM__INTENCLR__Type.html#aecf8eaab7aa3b520bd72bc0ec4cf9bf3"> 107</a></span>&#160; uint8_t <a class="code" href="unionFREQM__INTENCLR__Type.html#aecf8eaab7aa3b520bd72bc0ec4cf9bf3">reg</a>; </div>
<div class="line"><a name="l00108"></a><span class="lineno"> 108</span>&#160;} <a class="code" href="unionFREQM__INTENCLR__Type.html">FREQM_INTENCLR_Type</a>;</div>
<div class="line"><a name="l00109"></a><span class="lineno"> 109</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00110"></a><span class="lineno"> 110</span>&#160; </div>
<div class="line"><a name="l00111"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a31da73dd35a463ca4eea941ee1f55e1c"> 111</a></span>&#160;<span class="preprocessor">#define FREQM_INTENCLR_OFFSET 0x08 </span></div>
<div class="line"><a name="l00112"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a4cfbcaf309592f477f8aca52d4da0b00"> 112</a></span>&#160;<span class="preprocessor">#define FREQM_INTENCLR_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00114"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a3d742bee7a8d19b4734a4a29d30622f7"> 114</a></span>&#160;<span class="preprocessor">#define FREQM_INTENCLR_DONE_Pos 0 </span></div>
<div class="line"><a name="l00115"></a><span class="lineno"> 115</span>&#160;<span class="preprocessor">#define FREQM_INTENCLR_DONE (_U_(0x1) &lt;&lt; FREQM_INTENCLR_DONE_Pos)</span></div>
<div class="line"><a name="l00116"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a1956ca13e973b88eea66618c51ef48b3"> 116</a></span>&#160;<span class="preprocessor">#define FREQM_INTENCLR_MASK _U_(0x01) </span></div>
<div class="line"><a name="l00118"></a><span class="lineno"> 118</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- FREQM_INTENSET : (FREQM Offset: 0x09) (R/W 8) Interrupt Enable Set Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00119"></a><span class="lineno"> 119</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00120"></a><span class="lineno"><a class="line" href="unionFREQM__INTENSET__Type.html"> 120</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00121"></a><span class="lineno"> 121</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00122"></a><span class="lineno"><a class="line" href="unionFREQM__INTENSET__Type.html#a268a4e7fe0a0af9e07924731a3a47519"> 122</a></span>&#160; uint8_t <a class="code" href="unionFREQM__INTENSET__Type.html#a268a4e7fe0a0af9e07924731a3a47519">DONE</a>:1; </div>
<div class="line"><a name="l00123"></a><span class="lineno"><a class="line" href="unionFREQM__INTENSET__Type.html#a44c8d60c94de4d533f700ea62055b5e7"> 123</a></span>&#160; uint8_t :7; </div>
<div class="line"><a name="l00124"></a><span class="lineno"><a class="line" href="unionFREQM__INTENSET__Type.html#aa21999ade53ffda5e615d46d7fd1d681"> 124</a></span>&#160; } bit; </div>
<div class="line"><a name="l00125"></a><span class="lineno"><a class="line" href="unionFREQM__INTENSET__Type.html#a68442e57ea8ae84c252fd437497bd82b"> 125</a></span>&#160; uint8_t <a class="code" href="unionFREQM__INTENSET__Type.html#a68442e57ea8ae84c252fd437497bd82b">reg</a>; </div>
<div class="line"><a name="l00126"></a><span class="lineno"> 126</span>&#160;} <a class="code" href="unionFREQM__INTENSET__Type.html">FREQM_INTENSET_Type</a>;</div>
<div class="line"><a name="l00127"></a><span class="lineno"> 127</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00128"></a><span class="lineno"> 128</span>&#160; </div>
<div class="line"><a name="l00129"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a322e0b560edc5ac084d4f9a338850b55"> 129</a></span>&#160;<span class="preprocessor">#define FREQM_INTENSET_OFFSET 0x09 </span></div>
<div class="line"><a name="l00130"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#aad4904b7b0bd47ea2312c0b14a12ca48"> 130</a></span>&#160;<span class="preprocessor">#define FREQM_INTENSET_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00132"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a9343bb0070741ae8863e061d501d7815"> 132</a></span>&#160;<span class="preprocessor">#define FREQM_INTENSET_DONE_Pos 0 </span></div>
<div class="line"><a name="l00133"></a><span class="lineno"> 133</span>&#160;<span class="preprocessor">#define FREQM_INTENSET_DONE (_U_(0x1) &lt;&lt; FREQM_INTENSET_DONE_Pos)</span></div>
<div class="line"><a name="l00134"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#aa7c2b1805de385754efffce342e99817"> 134</a></span>&#160;<span class="preprocessor">#define FREQM_INTENSET_MASK _U_(0x01) </span></div>
<div class="line"><a name="l00136"></a><span class="lineno"> 136</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- FREQM_INTFLAG : (FREQM Offset: 0x0A) (R/W 8) Interrupt Flag Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00137"></a><span class="lineno"> 137</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00138"></a><span class="lineno"><a class="line" href="unionFREQM__INTFLAG__Type.html"> 138</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{ <span class="comment">// __I to avoid read-modify-write on write-to-clear register</span></div>
<div class="line"><a name="l00139"></a><span class="lineno"> 139</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00140"></a><span class="lineno"><a class="line" href="unionFREQM__INTFLAG__Type.html#a6f96105de3356aa76ad77cfcb42b83f0"> 140</a></span>&#160; __I uint8_t <a class="code" href="unionFREQM__INTFLAG__Type.html#a6f96105de3356aa76ad77cfcb42b83f0">DONE</a>:1; </div>
<div class="line"><a name="l00141"></a><span class="lineno"><a class="line" href="unionFREQM__INTFLAG__Type.html#ab2feaadab125012d6203eabf567ec256"> 141</a></span>&#160; __I <a class="code" href="unionFREQM__INTFLAG__Type.html#ab2feaadab125012d6203eabf567ec256">uint8_t</a> :7; </div>
<div class="line"><a name="l00142"></a><span class="lineno"><a class="line" href="unionFREQM__INTFLAG__Type.html#a63632ff05359358ee3e286f52dd78246"> 142</a></span>&#160; } bit; </div>
<div class="line"><a name="l00143"></a><span class="lineno"><a class="line" href="unionFREQM__INTFLAG__Type.html#a17b9fbcbe032c6d01308dbe66059e250"> 143</a></span>&#160; uint8_t <a class="code" href="unionFREQM__INTFLAG__Type.html#a17b9fbcbe032c6d01308dbe66059e250">reg</a>; </div>
<div class="line"><a name="l00144"></a><span class="lineno"> 144</span>&#160;} <a class="code" href="unionFREQM__INTFLAG__Type.html">FREQM_INTFLAG_Type</a>;</div>
<div class="line"><a name="l00145"></a><span class="lineno"> 145</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00146"></a><span class="lineno"> 146</span>&#160; </div>
<div class="line"><a name="l00147"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#aea43e28481d2a027a76f4474a6ed8532"> 147</a></span>&#160;<span class="preprocessor">#define FREQM_INTFLAG_OFFSET 0x0A </span></div>
<div class="line"><a name="l00148"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a302d92b17313ed5b9b94446827b559b6"> 148</a></span>&#160;<span class="preprocessor">#define FREQM_INTFLAG_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00150"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a297418104703e236fdfb9ec6f8d82f6e"> 150</a></span>&#160;<span class="preprocessor">#define FREQM_INTFLAG_DONE_Pos 0 </span></div>
<div class="line"><a name="l00151"></a><span class="lineno"> 151</span>&#160;<span class="preprocessor">#define FREQM_INTFLAG_DONE (_U_(0x1) &lt;&lt; FREQM_INTFLAG_DONE_Pos)</span></div>
<div class="line"><a name="l00152"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a1975f795a95041fb4f0ab01e25cceeea"> 152</a></span>&#160;<span class="preprocessor">#define FREQM_INTFLAG_MASK _U_(0x01) </span></div>
<div class="line"><a name="l00154"></a><span class="lineno"> 154</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- FREQM_STATUS : (FREQM Offset: 0x0B) (R/W 8) Status Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00155"></a><span class="lineno"> 155</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00156"></a><span class="lineno"><a class="line" href="unionFREQM__STATUS__Type.html"> 156</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00157"></a><span class="lineno"> 157</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00158"></a><span class="lineno"><a class="line" href="unionFREQM__STATUS__Type.html#a6573aba4caabc5647335b4551045c4cd"> 158</a></span>&#160; uint8_t <a class="code" href="unionFREQM__STATUS__Type.html#a6573aba4caabc5647335b4551045c4cd">BUSY</a>:1; </div>
<div class="line"><a name="l00159"></a><span class="lineno"><a class="line" href="unionFREQM__STATUS__Type.html#ae63258f290328e0bae6355357c33eb59"> 159</a></span>&#160; uint8_t <a class="code" href="unionFREQM__STATUS__Type.html#ae63258f290328e0bae6355357c33eb59">OVF</a>:1; </div>
<div class="line"><a name="l00160"></a><span class="lineno"><a class="line" href="unionFREQM__STATUS__Type.html#afd84cb8f80dfc61077f6df193f0fb233"> 160</a></span>&#160; uint8_t :6; </div>
<div class="line"><a name="l00161"></a><span class="lineno"><a class="line" href="unionFREQM__STATUS__Type.html#a76eb000236a3520c390bb17fcdc3e9f5"> 161</a></span>&#160; } bit; </div>
<div class="line"><a name="l00162"></a><span class="lineno"><a class="line" href="unionFREQM__STATUS__Type.html#a427d2ea6a43a91648529bd391ae23769"> 162</a></span>&#160; uint8_t <a class="code" href="unionFREQM__STATUS__Type.html#a427d2ea6a43a91648529bd391ae23769">reg</a>; </div>
<div class="line"><a name="l00163"></a><span class="lineno"> 163</span>&#160;} <a class="code" href="unionFREQM__STATUS__Type.html">FREQM_STATUS_Type</a>;</div>
<div class="line"><a name="l00164"></a><span class="lineno"> 164</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00165"></a><span class="lineno"> 165</span>&#160; </div>
<div class="line"><a name="l00166"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a9bc1627588f595c84efac70a1897b435"> 166</a></span>&#160;<span class="preprocessor">#define FREQM_STATUS_OFFSET 0x0B </span></div>
<div class="line"><a name="l00167"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a2246bd9800c0c53833e7d0f205ad80bd"> 167</a></span>&#160;<span class="preprocessor">#define FREQM_STATUS_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00169"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a39ad257ccdcb50dae4632c592e8a0faa"> 169</a></span>&#160;<span class="preprocessor">#define FREQM_STATUS_BUSY_Pos 0 </span></div>
<div class="line"><a name="l00170"></a><span class="lineno"> 170</span>&#160;<span class="preprocessor">#define FREQM_STATUS_BUSY (_U_(0x1) &lt;&lt; FREQM_STATUS_BUSY_Pos)</span></div>
<div class="line"><a name="l00171"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#abf3e33ca9df370bbf1df2fdad0206755"> 171</a></span>&#160;<span class="preprocessor">#define FREQM_STATUS_OVF_Pos 1 </span></div>
<div class="line"><a name="l00172"></a><span class="lineno"> 172</span>&#160;<span class="preprocessor">#define FREQM_STATUS_OVF (_U_(0x1) &lt;&lt; FREQM_STATUS_OVF_Pos)</span></div>
<div class="line"><a name="l00173"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a38c7441e04c013ceb30abc6a68828221"> 173</a></span>&#160;<span class="preprocessor">#define FREQM_STATUS_MASK _U_(0x03) </span></div>
<div class="line"><a name="l00175"></a><span class="lineno"> 175</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- FREQM_SYNCBUSY : (FREQM Offset: 0x0C) (R/ 32) Synchronization Busy Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00176"></a><span class="lineno"> 176</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00177"></a><span class="lineno"><a class="line" href="unionFREQM__SYNCBUSY__Type.html"> 177</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00178"></a><span class="lineno"> 178</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00179"></a><span class="lineno"><a class="line" href="unionFREQM__SYNCBUSY__Type.html#a3d221fdc85c7e5db2311599caf7a8eb8"> 179</a></span>&#160; uint32_t <a class="code" href="unionFREQM__SYNCBUSY__Type.html#a3d221fdc85c7e5db2311599caf7a8eb8">SWRST</a>:1; </div>
<div class="line"><a name="l00180"></a><span class="lineno"><a class="line" href="unionFREQM__SYNCBUSY__Type.html#a23f3acdb6c99da0a4d39174928573aa9"> 180</a></span>&#160; uint32_t <a class="code" href="unionFREQM__SYNCBUSY__Type.html#a23f3acdb6c99da0a4d39174928573aa9">ENABLE</a>:1; </div>
<div class="line"><a name="l00181"></a><span class="lineno"><a class="line" href="unionFREQM__SYNCBUSY__Type.html#aeaf2866d192a58f0cf0f7fa20e37b05a"> 181</a></span>&#160; uint32_t :30; </div>
<div class="line"><a name="l00182"></a><span class="lineno"><a class="line" href="unionFREQM__SYNCBUSY__Type.html#a367b196de969d837079f31fc5d548df5"> 182</a></span>&#160; } bit; </div>
<div class="line"><a name="l00183"></a><span class="lineno"><a class="line" href="unionFREQM__SYNCBUSY__Type.html#a256fa69cc339573d004222d78629a8fb"> 183</a></span>&#160; uint32_t <a class="code" href="unionFREQM__SYNCBUSY__Type.html#a256fa69cc339573d004222d78629a8fb">reg</a>; </div>
<div class="line"><a name="l00184"></a><span class="lineno"> 184</span>&#160;} <a class="code" href="unionFREQM__SYNCBUSY__Type.html">FREQM_SYNCBUSY_Type</a>;</div>
<div class="line"><a name="l00185"></a><span class="lineno"> 185</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00186"></a><span class="lineno"> 186</span>&#160; </div>
<div class="line"><a name="l00187"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a5cb7477e6e83f8b6a50d38efc516030b"> 187</a></span>&#160;<span class="preprocessor">#define FREQM_SYNCBUSY_OFFSET 0x0C </span></div>
<div class="line"><a name="l00188"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#af1bb6a6e94796c96bb6e082d30786b2d"> 188</a></span>&#160;<span class="preprocessor">#define FREQM_SYNCBUSY_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00190"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#afa5d4860d253f6e57ec3854826e506de"> 190</a></span>&#160;<span class="preprocessor">#define FREQM_SYNCBUSY_SWRST_Pos 0 </span></div>
<div class="line"><a name="l00191"></a><span class="lineno"> 191</span>&#160;<span class="preprocessor">#define FREQM_SYNCBUSY_SWRST (_U_(0x1) &lt;&lt; FREQM_SYNCBUSY_SWRST_Pos)</span></div>
<div class="line"><a name="l00192"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a470279b12e764e5d1bf66fae613e87bb"> 192</a></span>&#160;<span class="preprocessor">#define FREQM_SYNCBUSY_ENABLE_Pos 1 </span></div>
<div class="line"><a name="l00193"></a><span class="lineno"> 193</span>&#160;<span class="preprocessor">#define FREQM_SYNCBUSY_ENABLE (_U_(0x1) &lt;&lt; FREQM_SYNCBUSY_ENABLE_Pos)</span></div>
<div class="line"><a name="l00194"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a82a1747c20d325fa4cd125e7130e99cd"> 194</a></span>&#160;<span class="preprocessor">#define FREQM_SYNCBUSY_MASK _U_(0x00000003) </span></div>
<div class="line"><a name="l00196"></a><span class="lineno"> 196</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- FREQM_VALUE : (FREQM Offset: 0x10) (R/ 32) Count Value Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00197"></a><span class="lineno"> 197</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00198"></a><span class="lineno"><a class="line" href="unionFREQM__VALUE__Type.html"> 198</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00199"></a><span class="lineno"> 199</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00200"></a><span class="lineno"><a class="line" href="unionFREQM__VALUE__Type.html#a4efb3fb4b1185ca069306d4f1a7fc6c8"> 200</a></span>&#160; uint32_t <a class="code" href="unionFREQM__VALUE__Type.html#a4efb3fb4b1185ca069306d4f1a7fc6c8">VALUE</a>:24; </div>
<div class="line"><a name="l00201"></a><span class="lineno"><a class="line" href="unionFREQM__VALUE__Type.html#ad5baf54a2b00e8b9d5989b8a90bce897"> 201</a></span>&#160; uint32_t :8; </div>
<div class="line"><a name="l00202"></a><span class="lineno"><a class="line" href="unionFREQM__VALUE__Type.html#a965c551ace47f3b918de333cfcf0b032"> 202</a></span>&#160; } bit; </div>
<div class="line"><a name="l00203"></a><span class="lineno"><a class="line" href="unionFREQM__VALUE__Type.html#ab4be8fa4165fe4e9f345e86c58a54f4e"> 203</a></span>&#160; uint32_t <a class="code" href="unionFREQM__VALUE__Type.html#ab4be8fa4165fe4e9f345e86c58a54f4e">reg</a>; </div>
<div class="line"><a name="l00204"></a><span class="lineno"> 204</span>&#160;} <a class="code" href="unionFREQM__VALUE__Type.html">FREQM_VALUE_Type</a>;</div>
<div class="line"><a name="l00205"></a><span class="lineno"> 205</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00206"></a><span class="lineno"> 206</span>&#160; </div>
<div class="line"><a name="l00207"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a667b866874d1a6766ecff28635ba6616"> 207</a></span>&#160;<span class="preprocessor">#define FREQM_VALUE_OFFSET 0x10 </span></div>
<div class="line"><a name="l00208"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a7e701385f3015d5c8ed4e54b2641f33d"> 208</a></span>&#160;<span class="preprocessor">#define FREQM_VALUE_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00210"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#ad6aa2e8dfd43141479ecae0eb156d610"> 210</a></span>&#160;<span class="preprocessor">#define FREQM_VALUE_VALUE_Pos 0 </span></div>
<div class="line"><a name="l00211"></a><span class="lineno"> 211</span>&#160;<span class="preprocessor">#define FREQM_VALUE_VALUE_Msk (_U_(0xFFFFFF) &lt;&lt; FREQM_VALUE_VALUE_Pos)</span></div>
<div class="line"><a name="l00212"></a><span class="lineno"> 212</span>&#160;<span class="preprocessor">#define FREQM_VALUE_VALUE(value) (FREQM_VALUE_VALUE_Msk &amp; ((value) &lt;&lt; FREQM_VALUE_VALUE_Pos))</span></div>
<div class="line"><a name="l00213"></a><span class="lineno"><a class="line" href="component_2freqm_8h.html#a129fbc326338dee08cf86f78259703de"> 213</a></span>&#160;<span class="preprocessor">#define FREQM_VALUE_MASK _U_(0x00FFFFFF) </span></div>
<div class="line"><a name="l00216"></a><span class="lineno"> 216</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00217"></a><span class="lineno"><a class="line" href="structFreqm.html"> 217</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00218"></a><span class="lineno"><a class="line" href="structFreqm.html#aa4f58c1c25812f29b58cf44f427ccafe"> 218</a></span>&#160; __IO <a class="code" href="unionFREQM__CTRLA__Type.html">FREQM_CTRLA_Type</a> <a class="code" href="structFreqm.html#aa4f58c1c25812f29b58cf44f427ccafe">CTRLA</a>; </div>
<div class="line"><a name="l00219"></a><span class="lineno"><a class="line" href="structFreqm.html#a792aea49e629c0ed49ffc0a450e7276e"> 219</a></span>&#160; __O <a class="code" href="unionFREQM__CTRLB__Type.html">FREQM_CTRLB_Type</a> <a class="code" href="structFreqm.html#a792aea49e629c0ed49ffc0a450e7276e">CTRLB</a>; </div>
<div class="line"><a name="l00220"></a><span class="lineno"><a class="line" href="structFreqm.html#a86acf9141590973a744d9bf722b27cd9"> 220</a></span>&#160; __IO <a class="code" href="unionFREQM__CFGA__Type.html">FREQM_CFGA_Type</a> <a class="code" href="structFreqm.html#a86acf9141590973a744d9bf722b27cd9">CFGA</a>; </div>
<div class="line"><a name="l00221"></a><span class="lineno"> 221</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved1[0x4];</div>
<div class="line"><a name="l00222"></a><span class="lineno"><a class="line" href="structFreqm.html#a01cf84b4191bb7afb80794793d442084"> 222</a></span>&#160; __IO <a class="code" href="unionFREQM__INTENCLR__Type.html">FREQM_INTENCLR_Type</a> <a class="code" href="structFreqm.html#a01cf84b4191bb7afb80794793d442084">INTENCLR</a>; </div>
<div class="line"><a name="l00223"></a><span class="lineno"><a class="line" href="structFreqm.html#a8f361e5f18a099f2087cdaaef0954676"> 223</a></span>&#160; __IO <a class="code" href="unionFREQM__INTENSET__Type.html">FREQM_INTENSET_Type</a> <a class="code" href="structFreqm.html#a8f361e5f18a099f2087cdaaef0954676">INTENSET</a>; </div>
<div class="line"><a name="l00224"></a><span class="lineno"><a class="line" href="structFreqm.html#a7e6535e0c1ebd90f0f1f501c8553fa1c"> 224</a></span>&#160; __IO <a class="code" href="unionFREQM__INTFLAG__Type.html">FREQM_INTFLAG_Type</a> <a class="code" href="structFreqm.html#a7e6535e0c1ebd90f0f1f501c8553fa1c">INTFLAG</a>; </div>
<div class="line"><a name="l00225"></a><span class="lineno"><a class="line" href="structFreqm.html#a86f3d2bd313cb43e4da910ee8ffde25d"> 225</a></span>&#160; __IO <a class="code" href="unionFREQM__STATUS__Type.html">FREQM_STATUS_Type</a> <a class="code" href="structFreqm.html#a86f3d2bd313cb43e4da910ee8ffde25d">STATUS</a>; </div>
<div class="line"><a name="l00226"></a><span class="lineno"><a class="line" href="structFreqm.html#a93b2df6b6e009cb72796957addd0cc03"> 226</a></span>&#160; __I <a class="code" href="unionFREQM__SYNCBUSY__Type.html">FREQM_SYNCBUSY_Type</a> <a class="code" href="structFreqm.html#a93b2df6b6e009cb72796957addd0cc03">SYNCBUSY</a>; </div>
<div class="line"><a name="l00227"></a><span class="lineno"><a class="line" href="structFreqm.html#afc0d7ea9d3603865a764e82f2a448781"> 227</a></span>&#160; __I <a class="code" href="unionFREQM__VALUE__Type.html">FREQM_VALUE_Type</a> <a class="code" href="structFreqm.html#afc0d7ea9d3603865a764e82f2a448781">VALUE</a>; </div>
<div class="line"><a name="l00228"></a><span class="lineno"> 228</span>&#160;} <a class="code" href="structFreqm.html">Freqm</a>;</div>
<div class="line"><a name="l00229"></a><span class="lineno"> 229</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00230"></a><span class="lineno"> 230</span>&#160; </div>
<div class="line"><a name="l00233"></a><span class="lineno"> 233</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_FREQM_COMPONENT_ */</span><span class="preprocessor"></span></div>
</div><!-- fragment --></div><!-- contents -->
<div class="ttc" id="aunionFREQM__CTRLA__Type_html_ae51a6dbe0092c37183c6414e916fa241"><div class="ttname"><a href="unionFREQM__CTRLA__Type.html#ae51a6dbe0092c37183c6414e916fa241">FREQM_CTRLA_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00050">freqm.h:50</a></div></div>
<div class="ttc" id="astructFreqm_html_a86f3d2bd313cb43e4da910ee8ffde25d"><div class="ttname"><a href="structFreqm.html#a86f3d2bd313cb43e4da910ee8ffde25d">Freqm::STATUS</a></div><div class="ttdeci">__IO FREQM_STATUS_Type STATUS</div><div class="ttdoc">Offset: 0x0B (R/W 8) Status Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00225">freqm.h:225</a></div></div>
<div class="ttc" id="aunionFREQM__VALUE__Type_html_ab4be8fa4165fe4e9f345e86c58a54f4e"><div class="ttname"><a href="unionFREQM__VALUE__Type.html#ab4be8fa4165fe4e9f345e86c58a54f4e">FREQM_VALUE_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00203">freqm.h:203</a></div></div>
<div class="ttc" id="astructFreqm_html_a86acf9141590973a744d9bf722b27cd9"><div class="ttname"><a href="structFreqm.html#a86acf9141590973a744d9bf722b27cd9">Freqm::CFGA</a></div><div class="ttdeci">__IO FREQM_CFGA_Type CFGA</div><div class="ttdoc">Offset: 0x02 (R/W 16) Config A register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00220">freqm.h:220</a></div></div>
<div class="ttc" id="astructFreqm_html_afc0d7ea9d3603865a764e82f2a448781"><div class="ttname"><a href="structFreqm.html#afc0d7ea9d3603865a764e82f2a448781">Freqm::VALUE</a></div><div class="ttdeci">__I FREQM_VALUE_Type VALUE</div><div class="ttdoc">Offset: 0x10 (R/ 32) Count Value Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00227">freqm.h:227</a></div></div>
<div class="ttc" id="aunionFREQM__CTRLA__Type_html_a493fa12cd83df28db295c2f44b115b53"><div class="ttname"><a href="unionFREQM__CTRLA__Type.html#a493fa12cd83df28db295c2f44b115b53">FREQM_CTRLA_Type::ENABLE</a></div><div class="ttdeci">uint8_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00047">freqm.h:47</a></div></div>
<div class="ttc" id="aunionFREQM__CTRLB__Type_html_a27bfa9c4cdec9b17ea9c7a2cdbdbd671"><div class="ttname"><a href="unionFREQM__CTRLB__Type.html#a27bfa9c4cdec9b17ea9c7a2cdbdbd671">FREQM_CTRLB_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00070">freqm.h:70</a></div></div>
<div class="ttc" id="aunionFREQM__INTFLAG__Type_html_ab2feaadab125012d6203eabf567ec256"><div class="ttname"><a href="unionFREQM__INTFLAG__Type.html#ab2feaadab125012d6203eabf567ec256">FREQM_INTFLAG_Type::uint8_t</a></div><div class="ttdeci">__I uint8_t</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00141">freqm.h:141</a></div></div>
<div class="ttc" id="astructFreqm_html"><div class="ttname"><a href="structFreqm.html">Freqm</a></div><div class="ttdoc">FREQM hardware registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00217">freqm.h:217</a></div></div>
<div class="ttc" id="aunionFREQM__STATUS__Type_html_ae63258f290328e0bae6355357c33eb59"><div class="ttname"><a href="unionFREQM__STATUS__Type.html#ae63258f290328e0bae6355357c33eb59">FREQM_STATUS_Type::OVF</a></div><div class="ttdeci">uint8_t OVF</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00159">freqm.h:159</a></div></div>
<div class="ttc" id="astructFreqm_html_a8f361e5f18a099f2087cdaaef0954676"><div class="ttname"><a href="structFreqm.html#a8f361e5f18a099f2087cdaaef0954676">Freqm::INTENSET</a></div><div class="ttdeci">__IO FREQM_INTENSET_Type INTENSET</div><div class="ttdoc">Offset: 0x09 (R/W 8) Interrupt Enable Set Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00223">freqm.h:223</a></div></div>
<div class="ttc" id="aunionFREQM__CFGA__Type_html"><div class="ttname"><a href="unionFREQM__CFGA__Type.html">FREQM_CFGA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00083">freqm.h:83</a></div></div>
<div class="ttc" id="aunionFREQM__STATUS__Type_html"><div class="ttname"><a href="unionFREQM__STATUS__Type.html">FREQM_STATUS_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00156">freqm.h:156</a></div></div>
<div class="ttc" id="aunionFREQM__VALUE__Type_html"><div class="ttname"><a href="unionFREQM__VALUE__Type.html">FREQM_VALUE_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00198">freqm.h:198</a></div></div>
<div class="ttc" id="astructFreqm_html_a93b2df6b6e009cb72796957addd0cc03"><div class="ttname"><a href="structFreqm.html#a93b2df6b6e009cb72796957addd0cc03">Freqm::SYNCBUSY</a></div><div class="ttdeci">__I FREQM_SYNCBUSY_Type SYNCBUSY</div><div class="ttdoc">Offset: 0x0C (R/ 32) Synchronization Busy Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00226">freqm.h:226</a></div></div>
<div class="ttc" id="aunionFREQM__CFGA__Type_html_a50d45ff71a9897592fa14d0b8d199c38"><div class="ttname"><a href="unionFREQM__CFGA__Type.html#a50d45ff71a9897592fa14d0b8d199c38">FREQM_CFGA_Type::REFNUM</a></div><div class="ttdeci">uint16_t REFNUM</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00085">freqm.h:85</a></div></div>
<div class="ttc" id="aunionFREQM__SYNCBUSY__Type_html_a3d221fdc85c7e5db2311599caf7a8eb8"><div class="ttname"><a href="unionFREQM__SYNCBUSY__Type.html#a3d221fdc85c7e5db2311599caf7a8eb8">FREQM_SYNCBUSY_Type::SWRST</a></div><div class="ttdeci">uint32_t SWRST</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00179">freqm.h:179</a></div></div>
<div class="ttc" id="aunionFREQM__CTRLB__Type_html"><div class="ttname"><a href="unionFREQM__CTRLB__Type.html">FREQM_CTRLB_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00065">freqm.h:65</a></div></div>
<div class="ttc" id="aunionFREQM__CTRLA__Type_html_a29a04d8effb82a7b7ecf9e93c6068063"><div class="ttname"><a href="unionFREQM__CTRLA__Type.html#a29a04d8effb82a7b7ecf9e93c6068063">FREQM_CTRLA_Type::SWRST</a></div><div class="ttdeci">uint8_t SWRST</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00046">freqm.h:46</a></div></div>
<div class="ttc" id="aunionFREQM__CFGA__Type_html_a78996fb67874d33a78c80ed1c617658e"><div class="ttname"><a href="unionFREQM__CFGA__Type.html#a78996fb67874d33a78c80ed1c617658e">FREQM_CFGA_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00088">freqm.h:88</a></div></div>
<div class="ttc" id="astructFreqm_html_a01cf84b4191bb7afb80794793d442084"><div class="ttname"><a href="structFreqm.html#a01cf84b4191bb7afb80794793d442084">Freqm::INTENCLR</a></div><div class="ttdeci">__IO FREQM_INTENCLR_Type INTENCLR</div><div class="ttdoc">Offset: 0x08 (R/W 8) Interrupt Enable Clear Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00222">freqm.h:222</a></div></div>
<div class="ttc" id="aunionFREQM__SYNCBUSY__Type_html"><div class="ttname"><a href="unionFREQM__SYNCBUSY__Type.html">FREQM_SYNCBUSY_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00177">freqm.h:177</a></div></div>
<div class="ttc" id="aunionFREQM__INTFLAG__Type_html_a17b9fbcbe032c6d01308dbe66059e250"><div class="ttname"><a href="unionFREQM__INTFLAG__Type.html#a17b9fbcbe032c6d01308dbe66059e250">FREQM_INTFLAG_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00143">freqm.h:143</a></div></div>
<div class="ttc" id="aunionFREQM__INTENSET__Type_html"><div class="ttname"><a href="unionFREQM__INTENSET__Type.html">FREQM_INTENSET_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00120">freqm.h:120</a></div></div>
<div class="ttc" id="aunionFREQM__INTENSET__Type_html_a268a4e7fe0a0af9e07924731a3a47519"><div class="ttname"><a href="unionFREQM__INTENSET__Type.html#a268a4e7fe0a0af9e07924731a3a47519">FREQM_INTENSET_Type::DONE</a></div><div class="ttdeci">uint8_t DONE</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00122">freqm.h:122</a></div></div>
<div class="ttc" id="aunionFREQM__SYNCBUSY__Type_html_a256fa69cc339573d004222d78629a8fb"><div class="ttname"><a href="unionFREQM__SYNCBUSY__Type.html#a256fa69cc339573d004222d78629a8fb">FREQM_SYNCBUSY_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00183">freqm.h:183</a></div></div>
<div class="ttc" id="aunionFREQM__INTFLAG__Type_html"><div class="ttname"><a href="unionFREQM__INTFLAG__Type.html">FREQM_INTFLAG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00138">freqm.h:138</a></div></div>
<div class="ttc" id="aunionFREQM__INTFLAG__Type_html_a6f96105de3356aa76ad77cfcb42b83f0"><div class="ttname"><a href="unionFREQM__INTFLAG__Type.html#a6f96105de3356aa76ad77cfcb42b83f0">FREQM_INTFLAG_Type::DONE</a></div><div class="ttdeci">__I uint8_t DONE</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00140">freqm.h:140</a></div></div>
<div class="ttc" id="aunionFREQM__INTENSET__Type_html_a68442e57ea8ae84c252fd437497bd82b"><div class="ttname"><a href="unionFREQM__INTENSET__Type.html#a68442e57ea8ae84c252fd437497bd82b">FREQM_INTENSET_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00125">freqm.h:125</a></div></div>
<div class="ttc" id="aunionFREQM__SYNCBUSY__Type_html_a23f3acdb6c99da0a4d39174928573aa9"><div class="ttname"><a href="unionFREQM__SYNCBUSY__Type.html#a23f3acdb6c99da0a4d39174928573aa9">FREQM_SYNCBUSY_Type::ENABLE</a></div><div class="ttdeci">uint32_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00180">freqm.h:180</a></div></div>
<div class="ttc" id="aunionFREQM__INTENCLR__Type_html_aee027e3e656ac21454c63f41767e9083"><div class="ttname"><a href="unionFREQM__INTENCLR__Type.html#aee027e3e656ac21454c63f41767e9083">FREQM_INTENCLR_Type::DONE</a></div><div class="ttdeci">uint8_t DONE</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00104">freqm.h:104</a></div></div>
<div class="ttc" id="astructFreqm_html_a792aea49e629c0ed49ffc0a450e7276e"><div class="ttname"><a href="structFreqm.html#a792aea49e629c0ed49ffc0a450e7276e">Freqm::CTRLB</a></div><div class="ttdeci">__O FREQM_CTRLB_Type CTRLB</div><div class="ttdoc">Offset: 0x01 ( /W 8) Control B Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00219">freqm.h:219</a></div></div>
<div class="ttc" id="aunionFREQM__INTENCLR__Type_html_aecf8eaab7aa3b520bd72bc0ec4cf9bf3"><div class="ttname"><a href="unionFREQM__INTENCLR__Type.html#aecf8eaab7aa3b520bd72bc0ec4cf9bf3">FREQM_INTENCLR_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00107">freqm.h:107</a></div></div>
<div class="ttc" id="astructFreqm_html_a7e6535e0c1ebd90f0f1f501c8553fa1c"><div class="ttname"><a href="structFreqm.html#a7e6535e0c1ebd90f0f1f501c8553fa1c">Freqm::INTFLAG</a></div><div class="ttdeci">__IO FREQM_INTFLAG_Type INTFLAG</div><div class="ttdoc">Offset: 0x0A (R/W 8) Interrupt Flag Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00224">freqm.h:224</a></div></div>
<div class="ttc" id="aunionFREQM__CTRLA__Type_html"><div class="ttname"><a href="unionFREQM__CTRLA__Type.html">FREQM_CTRLA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00044">freqm.h:44</a></div></div>
<div class="ttc" id="aunionFREQM__CTRLB__Type_html_a06c0e080f2ac670f6e9240cc4209ba81"><div class="ttname"><a href="unionFREQM__CTRLB__Type.html#a06c0e080f2ac670f6e9240cc4209ba81">FREQM_CTRLB_Type::START</a></div><div class="ttdeci">uint8_t START</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00067">freqm.h:67</a></div></div>
<div class="ttc" id="aunionFREQM__VALUE__Type_html_a4efb3fb4b1185ca069306d4f1a7fc6c8"><div class="ttname"><a href="unionFREQM__VALUE__Type.html#a4efb3fb4b1185ca069306d4f1a7fc6c8">FREQM_VALUE_Type::VALUE</a></div><div class="ttdeci">uint32_t VALUE</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00200">freqm.h:200</a></div></div>
<div class="ttc" id="asame54n19a_8h_html_a0d957f1433aaf5d70e4dc2b68288442d"><div class="ttname"><a href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a></div><div class="ttdeci">volatile const uint8_t RoReg8</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00053">same54n19a.h:53</a></div></div>
<div class="ttc" id="aunionFREQM__STATUS__Type_html_a6573aba4caabc5647335b4551045c4cd"><div class="ttname"><a href="unionFREQM__STATUS__Type.html#a6573aba4caabc5647335b4551045c4cd">FREQM_STATUS_Type::BUSY</a></div><div class="ttdeci">uint8_t BUSY</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00158">freqm.h:158</a></div></div>
<div class="ttc" id="aunionFREQM__STATUS__Type_html_a427d2ea6a43a91648529bd391ae23769"><div class="ttname"><a href="unionFREQM__STATUS__Type.html#a427d2ea6a43a91648529bd391ae23769">FREQM_STATUS_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00162">freqm.h:162</a></div></div>
<div class="ttc" id="astructFreqm_html_aa4f58c1c25812f29b58cf44f427ccafe"><div class="ttname"><a href="structFreqm.html#aa4f58c1c25812f29b58cf44f427ccafe">Freqm::CTRLA</a></div><div class="ttdeci">__IO FREQM_CTRLA_Type CTRLA</div><div class="ttdoc">Offset: 0x00 (R/W 8) Control A Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00218">freqm.h:218</a></div></div>
<div class="ttc" id="aunionFREQM__INTENCLR__Type_html"><div class="ttname"><a href="unionFREQM__INTENCLR__Type.html">FREQM_INTENCLR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2freqm_8h_source.html#l00102">freqm.h:102</a></div></div>
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<p>Component description for GCLK.
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_U2122</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>REV_GCLK</b>&#160;&#160;&#160;0x120</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a13c8b1dd25535746180d2279df28be74">GCLK_CTRLA_OFFSET</a>&#160;&#160;&#160;0x00</td></tr>
<tr class="memdesc:a13c8b1dd25535746180d2279df28be74"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_CTRLA offset) Control <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#ae79c690f810e3f548fef59a384f37ea0">GCLK_CTRLA_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:ae79c690f810e3f548fef59a384f37ea0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_CTRLA reset_value) Control <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a80fd8a124a472da27e7b69103d559884">GCLK_CTRLA_SWRST_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a80fd8a124a472da27e7b69103d559884"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_CTRLA) Software Reset <br /></td></tr>
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<tr class="memdesc:a977e15e98fc8181e3c84060711cdaba2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_CTRLA) MASK Register <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a1fcf109f21393e43cf19b3880c3ccc67">GCLK_SYNCBUSY_OFFSET</a>&#160;&#160;&#160;0x04</td></tr>
<tr class="memdesc:a1fcf109f21393e43cf19b3880c3ccc67"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY offset) Synchronization Busy <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#adeda6ee021e815b1082be10e6d230a3a">GCLK_SYNCBUSY_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:adeda6ee021e815b1082be10e6d230a3a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY reset_value) Synchronization Busy <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a32d54c0380b80778c20ea5224206bc40">GCLK_SYNCBUSY_SWRST_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a32d54c0380b80778c20ea5224206bc40"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Software Reset Synchroniation Busy bit <br /></td></tr>
<tr class="separator:a32d54c0380b80778c20ea5224206bc40"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_SWRST</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2gclk_8h.html#a32d54c0380b80778c20ea5224206bc40">GCLK_SYNCBUSY_SWRST_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#accd408c973e5db200ed8a8dcaa1c57dd">GCLK_SYNCBUSY_GENCTRL0_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:accd408c973e5db200ed8a8dcaa1c57dd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic Clock Generator Control 0 Synchronization Busy bits <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2gclk_8h.html#accd408c973e5db200ed8a8dcaa1c57dd">GCLK_SYNCBUSY_GENCTRL0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a42f71035ebf8832a02b5956ce4c0b4c7">GCLK_SYNCBUSY_GENCTRL1_Pos</a>&#160;&#160;&#160;3</td></tr>
<tr class="memdesc:a42f71035ebf8832a02b5956ce4c0b4c7"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic Clock Generator Control 1 Synchronization Busy bits <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2gclk_8h.html#a42f71035ebf8832a02b5956ce4c0b4c7">GCLK_SYNCBUSY_GENCTRL1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#abaf32e366c83f6fde3f4c208b2834d5d">GCLK_SYNCBUSY_GENCTRL2_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:abaf32e366c83f6fde3f4c208b2834d5d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic Clock Generator Control 2 Synchronization Busy bits <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL2</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2gclk_8h.html#abaf32e366c83f6fde3f4c208b2834d5d">GCLK_SYNCBUSY_GENCTRL2_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a1fd25ca09a66951e2f848f9f5b143d1a">GCLK_SYNCBUSY_GENCTRL3_Pos</a>&#160;&#160;&#160;5</td></tr>
<tr class="memdesc:a1fd25ca09a66951e2f848f9f5b143d1a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic Clock Generator Control 3 Synchronization Busy bits <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL3</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2gclk_8h.html#a1fd25ca09a66951e2f848f9f5b143d1a">GCLK_SYNCBUSY_GENCTRL3_Pos</a>)</td></tr>
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<tr class="memitem:a835dd895f76b04c073d7e9fa221bb30c"><td class="memItemLeft" align="right" valign="top"><a id="a835dd895f76b04c073d7e9fa221bb30c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a835dd895f76b04c073d7e9fa221bb30c">GCLK_SYNCBUSY_GENCTRL4_Pos</a>&#160;&#160;&#160;6</td></tr>
<tr class="memdesc:a835dd895f76b04c073d7e9fa221bb30c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic Clock Generator Control 4 Synchronization Busy bits <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL4</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2gclk_8h.html#a835dd895f76b04c073d7e9fa221bb30c">GCLK_SYNCBUSY_GENCTRL4_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a9047680cad9f7b682867ae845d81097b">GCLK_SYNCBUSY_GENCTRL5_Pos</a>&#160;&#160;&#160;7</td></tr>
<tr class="memdesc:a9047680cad9f7b682867ae845d81097b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic Clock Generator Control 5 Synchronization Busy bits <br /></td></tr>
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<tr class="memitem:abcec8905bca10c605cf85b93f36e0629"><td class="memItemLeft" align="right" valign="top"><a id="abcec8905bca10c605cf85b93f36e0629"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL5</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2gclk_8h.html#a9047680cad9f7b682867ae845d81097b">GCLK_SYNCBUSY_GENCTRL5_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#ac53fed16204bde4e3944d37b61244d1d">GCLK_SYNCBUSY_GENCTRL6_Pos</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:ac53fed16204bde4e3944d37b61244d1d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic Clock Generator Control 6 Synchronization Busy bits <br /></td></tr>
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<tr class="memitem:abfe706d059053aeb20b8a89846ed59b5"><td class="memItemLeft" align="right" valign="top"><a id="abfe706d059053aeb20b8a89846ed59b5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL6</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2gclk_8h.html#ac53fed16204bde4e3944d37b61244d1d">GCLK_SYNCBUSY_GENCTRL6_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a1668b91d76b537fde32a142d22c7a63f">GCLK_SYNCBUSY_GENCTRL7_Pos</a>&#160;&#160;&#160;9</td></tr>
<tr class="memdesc:a1668b91d76b537fde32a142d22c7a63f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic Clock Generator Control 7 Synchronization Busy bits <br /></td></tr>
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<tr class="memitem:a08ac28ef5003b40729b5b3851aedb775"><td class="memItemLeft" align="right" valign="top"><a id="a08ac28ef5003b40729b5b3851aedb775"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL7</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2gclk_8h.html#a1668b91d76b537fde32a142d22c7a63f">GCLK_SYNCBUSY_GENCTRL7_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a1eea17da06fb0d52826d0d6f051c7ef1">GCLK_SYNCBUSY_GENCTRL8_Pos</a>&#160;&#160;&#160;10</td></tr>
<tr class="memdesc:a1eea17da06fb0d52826d0d6f051c7ef1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic Clock Generator Control 8 Synchronization Busy bits <br /></td></tr>
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<tr class="memitem:acee6b2f9e51da8ee486b11254f7b4a18"><td class="memItemLeft" align="right" valign="top"><a id="acee6b2f9e51da8ee486b11254f7b4a18"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL8</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2gclk_8h.html#a1eea17da06fb0d52826d0d6f051c7ef1">GCLK_SYNCBUSY_GENCTRL8_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a14f41aca12329312875740b261aa2f47">GCLK_SYNCBUSY_GENCTRL9_Pos</a>&#160;&#160;&#160;11</td></tr>
<tr class="memdesc:a14f41aca12329312875740b261aa2f47"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic Clock Generator Control 9 Synchronization Busy bits <br /></td></tr>
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<tr class="memitem:aba8d41da972cda2b4e7cb898ad2f6389"><td class="memItemLeft" align="right" valign="top"><a id="aba8d41da972cda2b4e7cb898ad2f6389"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL9</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2gclk_8h.html#a14f41aca12329312875740b261aa2f47">GCLK_SYNCBUSY_GENCTRL9_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#aa5198206518007c9a47baf65a8d359cd">GCLK_SYNCBUSY_GENCTRL10_Pos</a>&#160;&#160;&#160;12</td></tr>
<tr class="memdesc:aa5198206518007c9a47baf65a8d359cd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic Clock Generator Control 10 Synchronization Busy bits <br /></td></tr>
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<tr class="memitem:a7c075c511417154a7b62bcc58e01dac1"><td class="memItemLeft" align="right" valign="top"><a id="a7c075c511417154a7b62bcc58e01dac1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL10</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2gclk_8h.html#aa5198206518007c9a47baf65a8d359cd">GCLK_SYNCBUSY_GENCTRL10_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a848356e7e1a8140fb63441fdc5f7420a">GCLK_SYNCBUSY_GENCTRL11_Pos</a>&#160;&#160;&#160;13</td></tr>
<tr class="memdesc:a848356e7e1a8140fb63441fdc5f7420a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic Clock Generator Control 11 Synchronization Busy bits <br /></td></tr>
<tr class="separator:a848356e7e1a8140fb63441fdc5f7420a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aee8de16f1c18325f66fb297f8149bba6"><td class="memItemLeft" align="right" valign="top"><a id="aee8de16f1c18325f66fb297f8149bba6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL11</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) &lt;&lt; <a class="el" href="component_2gclk_8h.html#a848356e7e1a8140fb63441fdc5f7420a">GCLK_SYNCBUSY_GENCTRL11_Pos</a>)</td></tr>
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<tr class="memitem:accbba8857cd7d67c4c0b526841298790"><td class="memItemLeft" align="right" valign="top"><a id="accbba8857cd7d67c4c0b526841298790"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#accbba8857cd7d67c4c0b526841298790">GCLK_SYNCBUSY_GENCTRL_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:accbba8857cd7d67c4c0b526841298790"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic Clock Generator Control x Synchronization Busy bits <br /></td></tr>
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<tr class="memitem:a3edcc08ad3307ebaebc71c1b793f3b9e"><td class="memItemLeft" align="right" valign="top"><a id="a3edcc08ad3307ebaebc71c1b793f3b9e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFF) &lt;&lt; <a class="el" href="component_2gclk_8h.html#accbba8857cd7d67c4c0b526841298790">GCLK_SYNCBUSY_GENCTRL_Pos</a>)</td></tr>
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<tr class="memitem:a95e77068058bd263d98538b3caf33721"><td class="memItemLeft" align="right" valign="top"><a id="a95e77068058bd263d98538b3caf33721"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL</b>(value)&#160;&#160;&#160;(GCLK_SYNCBUSY_GENCTRL_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2gclk_8h.html#accbba8857cd7d67c4c0b526841298790">GCLK_SYNCBUSY_GENCTRL_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a062df74b14636eb428b8f0472abb27cb">GCLK_SYNCBUSY_GENCTRL_GCLK0_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:a062df74b14636eb428b8f0472abb27cb"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic clock generator 0 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a9207e5b7583059fa7b62937d320c87a4">GCLK_SYNCBUSY_GENCTRL_GCLK1_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a9207e5b7583059fa7b62937d320c87a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic clock generator 1 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a54f2ec66d24d75af90f5f69e57eda372">GCLK_SYNCBUSY_GENCTRL_GCLK2_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
<tr class="memdesc:a54f2ec66d24d75af90f5f69e57eda372"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic clock generator 2 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#aa08b2a951ab29d44a151e2d11ecfc628">GCLK_SYNCBUSY_GENCTRL_GCLK3_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x8)</td></tr>
<tr class="memdesc:aa08b2a951ab29d44a151e2d11ecfc628"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic clock generator 3 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a3485377e599f7a35e8fcffe0904bde88">GCLK_SYNCBUSY_GENCTRL_GCLK4_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x10)</td></tr>
<tr class="memdesc:a3485377e599f7a35e8fcffe0904bde88"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic clock generator 4 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#ad0c64bada7d3d22a4fdf4141293014d2">GCLK_SYNCBUSY_GENCTRL_GCLK5_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x20)</td></tr>
<tr class="memdesc:ad0c64bada7d3d22a4fdf4141293014d2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic clock generator 5 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a10a3a53a51e119577b8bc8b7b525eb7d">GCLK_SYNCBUSY_GENCTRL_GCLK6_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x40)</td></tr>
<tr class="memdesc:a10a3a53a51e119577b8bc8b7b525eb7d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic clock generator 6 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#ae905cf7ca8bc7ebd6a6537af7fb3ddfa">GCLK_SYNCBUSY_GENCTRL_GCLK7_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x80)</td></tr>
<tr class="memdesc:ae905cf7ca8bc7ebd6a6537af7fb3ddfa"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic clock generator 7 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a4bc9fec20abf5638ab612ec6202e5681">GCLK_SYNCBUSY_GENCTRL_GCLK8_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x100)</td></tr>
<tr class="memdesc:a4bc9fec20abf5638ab612ec6202e5681"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic clock generator 8 <br /></td></tr>
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<tr class="memitem:a708b15f315c6df0eb106c3d5f83174c2"><td class="memItemLeft" align="right" valign="top"><a id="a708b15f315c6df0eb106c3d5f83174c2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a708b15f315c6df0eb106c3d5f83174c2">GCLK_SYNCBUSY_GENCTRL_GCLK9_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x200)</td></tr>
<tr class="memdesc:a708b15f315c6df0eb106c3d5f83174c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic clock generator 9 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#af004fad28fee052115f10553659b5fa4">GCLK_SYNCBUSY_GENCTRL_GCLK10_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x400)</td></tr>
<tr class="memdesc:af004fad28fee052115f10553659b5fa4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic clock generator 10 <br /></td></tr>
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<tr class="memitem:a73c4b764053d756c58a8f665ff6a867f"><td class="memItemLeft" align="right" valign="top"><a id="a73c4b764053d756c58a8f665ff6a867f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a73c4b764053d756c58a8f665ff6a867f">GCLK_SYNCBUSY_GENCTRL_GCLK11_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x800)</td></tr>
<tr class="memdesc:a73c4b764053d756c58a8f665ff6a867f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) Generic clock generator 11 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL_GCLK0</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#a062df74b14636eb428b8f0472abb27cb">GCLK_SYNCBUSY_GENCTRL_GCLK0_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#accbba8857cd7d67c4c0b526841298790">GCLK_SYNCBUSY_GENCTRL_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL_GCLK1</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#a9207e5b7583059fa7b62937d320c87a4">GCLK_SYNCBUSY_GENCTRL_GCLK1_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#accbba8857cd7d67c4c0b526841298790">GCLK_SYNCBUSY_GENCTRL_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL_GCLK2</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#a54f2ec66d24d75af90f5f69e57eda372">GCLK_SYNCBUSY_GENCTRL_GCLK2_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#accbba8857cd7d67c4c0b526841298790">GCLK_SYNCBUSY_GENCTRL_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL_GCLK3</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#aa08b2a951ab29d44a151e2d11ecfc628">GCLK_SYNCBUSY_GENCTRL_GCLK3_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#accbba8857cd7d67c4c0b526841298790">GCLK_SYNCBUSY_GENCTRL_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL_GCLK4</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#a3485377e599f7a35e8fcffe0904bde88">GCLK_SYNCBUSY_GENCTRL_GCLK4_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#accbba8857cd7d67c4c0b526841298790">GCLK_SYNCBUSY_GENCTRL_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL_GCLK5</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#ad0c64bada7d3d22a4fdf4141293014d2">GCLK_SYNCBUSY_GENCTRL_GCLK5_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#accbba8857cd7d67c4c0b526841298790">GCLK_SYNCBUSY_GENCTRL_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL_GCLK6</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#a10a3a53a51e119577b8bc8b7b525eb7d">GCLK_SYNCBUSY_GENCTRL_GCLK6_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#accbba8857cd7d67c4c0b526841298790">GCLK_SYNCBUSY_GENCTRL_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL_GCLK7</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#ae905cf7ca8bc7ebd6a6537af7fb3ddfa">GCLK_SYNCBUSY_GENCTRL_GCLK7_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#accbba8857cd7d67c4c0b526841298790">GCLK_SYNCBUSY_GENCTRL_Pos</a>)</td></tr>
<tr class="separator:a753965b4b48252ae129bd68444dc36fb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aac2bb3e81e5e4e4ab9b53a630887db67"><td class="memItemLeft" align="right" valign="top"><a id="aac2bb3e81e5e4e4ab9b53a630887db67"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL_GCLK8</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#a4bc9fec20abf5638ab612ec6202e5681">GCLK_SYNCBUSY_GENCTRL_GCLK8_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#accbba8857cd7d67c4c0b526841298790">GCLK_SYNCBUSY_GENCTRL_Pos</a>)</td></tr>
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<tr class="memitem:a7a6262a0c907dbb293f08f75928be822"><td class="memItemLeft" align="right" valign="top"><a id="a7a6262a0c907dbb293f08f75928be822"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL_GCLK9</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#a708b15f315c6df0eb106c3d5f83174c2">GCLK_SYNCBUSY_GENCTRL_GCLK9_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#accbba8857cd7d67c4c0b526841298790">GCLK_SYNCBUSY_GENCTRL_Pos</a>)</td></tr>
<tr class="separator:a7a6262a0c907dbb293f08f75928be822"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa27b318a9eef673dccbc65b6e152c49a"><td class="memItemLeft" align="right" valign="top"><a id="aa27b318a9eef673dccbc65b6e152c49a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL_GCLK10</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#af004fad28fee052115f10553659b5fa4">GCLK_SYNCBUSY_GENCTRL_GCLK10_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#accbba8857cd7d67c4c0b526841298790">GCLK_SYNCBUSY_GENCTRL_Pos</a>)</td></tr>
<tr class="separator:aa27b318a9eef673dccbc65b6e152c49a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac67f6450032ef48dd1048c2d2eaa2b0e"><td class="memItemLeft" align="right" valign="top"><a id="ac67f6450032ef48dd1048c2d2eaa2b0e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_SYNCBUSY_GENCTRL_GCLK11</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#a73c4b764053d756c58a8f665ff6a867f">GCLK_SYNCBUSY_GENCTRL_GCLK11_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#accbba8857cd7d67c4c0b526841298790">GCLK_SYNCBUSY_GENCTRL_Pos</a>)</td></tr>
<tr class="separator:ac67f6450032ef48dd1048c2d2eaa2b0e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a67a06d90861a5d2ec78146d390160dcd"><td class="memItemLeft" align="right" valign="top"><a id="a67a06d90861a5d2ec78146d390160dcd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a67a06d90861a5d2ec78146d390160dcd">GCLK_SYNCBUSY_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00003FFD)</td></tr>
<tr class="memdesc:a67a06d90861a5d2ec78146d390160dcd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_SYNCBUSY) MASK Register <br /></td></tr>
<tr class="separator:a67a06d90861a5d2ec78146d390160dcd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a93d991084be98b48eb3bd242d2114042"><td class="memItemLeft" align="right" valign="top"><a id="a93d991084be98b48eb3bd242d2114042"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a93d991084be98b48eb3bd242d2114042">GCLK_GENCTRL_OFFSET</a>&#160;&#160;&#160;0x20</td></tr>
<tr class="memdesc:a93d991084be98b48eb3bd242d2114042"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_GENCTRL offset) Generic Clock Generator Control <br /></td></tr>
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<tr class="memitem:a6fe333c528ab24313886414224566cfc"><td class="memItemLeft" align="right" valign="top"><a id="a6fe333c528ab24313886414224566cfc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a6fe333c528ab24313886414224566cfc">GCLK_GENCTRL_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a6fe333c528ab24313886414224566cfc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_GENCTRL reset_value) Generic Clock Generator Control <br /></td></tr>
<tr class="separator:a6fe333c528ab24313886414224566cfc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3ca6fb0d36a0f1194282d2517b22965f"><td class="memItemLeft" align="right" valign="top"><a id="a3ca6fb0d36a0f1194282d2517b22965f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a3ca6fb0d36a0f1194282d2517b22965f">GCLK_GENCTRL_SRC_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a3ca6fb0d36a0f1194282d2517b22965f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_GENCTRL) Source Select <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_GENCTRL_SRC_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2gclk_8h.html#a3ca6fb0d36a0f1194282d2517b22965f">GCLK_GENCTRL_SRC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_GENCTRL_SRC</b>(value)&#160;&#160;&#160;(GCLK_GENCTRL_SRC_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2gclk_8h.html#a3ca6fb0d36a0f1194282d2517b22965f">GCLK_GENCTRL_SRC_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a76fd93e165f7ca657115788e4f208ef7">GCLK_GENCTRL_SRC_XOSC0_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a76fd93e165f7ca657115788e4f208ef7"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_GENCTRL) XOSC0 oscillator output <br /></td></tr>
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<tr class="memitem:ac6e6c970cd1a9500a6579419b4becfdc"><td class="memItemLeft" align="right" valign="top"><a id="ac6e6c970cd1a9500a6579419b4becfdc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#ac6e6c970cd1a9500a6579419b4becfdc">GCLK_GENCTRL_SRC_XOSC1_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:ac6e6c970cd1a9500a6579419b4becfdc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_GENCTRL) XOSC1 oscillator output <br /></td></tr>
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<tr class="memitem:a4c279c59a26c988991b63eb2682e8acc"><td class="memItemLeft" align="right" valign="top"><a id="a4c279c59a26c988991b63eb2682e8acc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a4c279c59a26c988991b63eb2682e8acc">GCLK_GENCTRL_SRC_GCLKIN_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a4c279c59a26c988991b63eb2682e8acc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_GENCTRL) Generator input pad <br /></td></tr>
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<tr class="memitem:a2774be4de7707cea940a2b7ec37f30e3"><td class="memItemLeft" align="right" valign="top"><a id="a2774be4de7707cea940a2b7ec37f30e3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a2774be4de7707cea940a2b7ec37f30e3">GCLK_GENCTRL_SRC_GCLKGEN1_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
<tr class="memdesc:a2774be4de7707cea940a2b7ec37f30e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_GENCTRL) Generic clock generator 1 output <br /></td></tr>
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<tr class="memitem:a42e2c1ea6d7f04f75657e31791336ec6"><td class="memItemLeft" align="right" valign="top"><a id="a42e2c1ea6d7f04f75657e31791336ec6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a42e2c1ea6d7f04f75657e31791336ec6">GCLK_GENCTRL_SRC_OSCULP32K_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
<tr class="memdesc:a42e2c1ea6d7f04f75657e31791336ec6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_GENCTRL) OSCULP32K oscillator output <br /></td></tr>
<tr class="separator:a42e2c1ea6d7f04f75657e31791336ec6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a087326ba1d0ac766f2835e5460c72ef0"><td class="memItemLeft" align="right" valign="top"><a id="a087326ba1d0ac766f2835e5460c72ef0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a087326ba1d0ac766f2835e5460c72ef0">GCLK_GENCTRL_SRC_XOSC32K_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
<tr class="memdesc:a087326ba1d0ac766f2835e5460c72ef0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_GENCTRL) XOSC32K oscillator output <br /></td></tr>
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<tr class="memitem:a6cf7424ff64ad42031a46dbfec459c89"><td class="memItemLeft" align="right" valign="top"><a id="a6cf7424ff64ad42031a46dbfec459c89"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a6cf7424ff64ad42031a46dbfec459c89">GCLK_GENCTRL_SRC_DFLL_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x6)</td></tr>
<tr class="memdesc:a6cf7424ff64ad42031a46dbfec459c89"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_GENCTRL) DFLL output <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a57496e494e2456f7a2cf096bc910f150">GCLK_GENCTRL_SRC_DPLL0_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7)</td></tr>
<tr class="memdesc:a57496e494e2456f7a2cf096bc910f150"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_GENCTRL) DPLL0 output <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a58b634c244fe8576cfed9bfc140a2f0d">GCLK_GENCTRL_SRC_DPLL1_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x8)</td></tr>
<tr class="memdesc:a58b634c244fe8576cfed9bfc140a2f0d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_GENCTRL) DPLL1 output <br /></td></tr>
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<tr class="memitem:a2d57efb173b58dfe8208f9ed2e45a25e"><td class="memItemLeft" align="right" valign="top"><a id="a2d57efb173b58dfe8208f9ed2e45a25e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_GENCTRL_SRC_XOSC0</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#a76fd93e165f7ca657115788e4f208ef7">GCLK_GENCTRL_SRC_XOSC0_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#a3ca6fb0d36a0f1194282d2517b22965f">GCLK_GENCTRL_SRC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_GENCTRL_SRC_XOSC1</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#ac6e6c970cd1a9500a6579419b4becfdc">GCLK_GENCTRL_SRC_XOSC1_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#a3ca6fb0d36a0f1194282d2517b22965f">GCLK_GENCTRL_SRC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_GENCTRL_SRC_GCLKIN</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#a4c279c59a26c988991b63eb2682e8acc">GCLK_GENCTRL_SRC_GCLKIN_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#a3ca6fb0d36a0f1194282d2517b22965f">GCLK_GENCTRL_SRC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_GENCTRL_SRC_GCLKGEN1</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#a2774be4de7707cea940a2b7ec37f30e3">GCLK_GENCTRL_SRC_GCLKGEN1_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#a3ca6fb0d36a0f1194282d2517b22965f">GCLK_GENCTRL_SRC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_GENCTRL_SRC_OSCULP32K</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#a42e2c1ea6d7f04f75657e31791336ec6">GCLK_GENCTRL_SRC_OSCULP32K_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#a3ca6fb0d36a0f1194282d2517b22965f">GCLK_GENCTRL_SRC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_GENCTRL_SRC_XOSC32K</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#a087326ba1d0ac766f2835e5460c72ef0">GCLK_GENCTRL_SRC_XOSC32K_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#a3ca6fb0d36a0f1194282d2517b22965f">GCLK_GENCTRL_SRC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_GENCTRL_SRC_DFLL</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#a6cf7424ff64ad42031a46dbfec459c89">GCLK_GENCTRL_SRC_DFLL_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#a3ca6fb0d36a0f1194282d2517b22965f">GCLK_GENCTRL_SRC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_GENCTRL_SRC_DPLL0</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#a57496e494e2456f7a2cf096bc910f150">GCLK_GENCTRL_SRC_DPLL0_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#a3ca6fb0d36a0f1194282d2517b22965f">GCLK_GENCTRL_SRC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_GENCTRL_SRC_DPLL1</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#a58b634c244fe8576cfed9bfc140a2f0d">GCLK_GENCTRL_SRC_DPLL1_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#a3ca6fb0d36a0f1194282d2517b22965f">GCLK_GENCTRL_SRC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#acf206c291132d560c6f857c74d042b09">GCLK_GENCTRL_GENEN_Pos</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:acf206c291132d560c6f857c74d042b09"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_GENCTRL) Generic Clock Generator Enable <br /></td></tr>
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<tr class="memitem:aaff89a081b47174a1ebf7893d638d911"><td class="memItemLeft" align="right" valign="top"><a id="aaff89a081b47174a1ebf7893d638d911"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_GENCTRL_GENEN</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2gclk_8h.html#acf206c291132d560c6f857c74d042b09">GCLK_GENCTRL_GENEN_Pos</a>)</td></tr>
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<tr class="memitem:add1c684492c64ddc0b937c7571028381"><td class="memItemLeft" align="right" valign="top"><a id="add1c684492c64ddc0b937c7571028381"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#add1c684492c64ddc0b937c7571028381">GCLK_GENCTRL_IDC_Pos</a>&#160;&#160;&#160;9</td></tr>
<tr class="memdesc:add1c684492c64ddc0b937c7571028381"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_GENCTRL) Improve Duty Cycle <br /></td></tr>
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<tr class="memitem:a20defe310838ae549c7f9820de38e1bb"><td class="memItemLeft" align="right" valign="top"><a id="a20defe310838ae549c7f9820de38e1bb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_GENCTRL_IDC</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2gclk_8h.html#add1c684492c64ddc0b937c7571028381">GCLK_GENCTRL_IDC_Pos</a>)</td></tr>
<tr class="separator:a20defe310838ae549c7f9820de38e1bb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a511f960dfd2a4afa6dc073dc909389ac"><td class="memItemLeft" align="right" valign="top"><a id="a511f960dfd2a4afa6dc073dc909389ac"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a511f960dfd2a4afa6dc073dc909389ac">GCLK_GENCTRL_OOV_Pos</a>&#160;&#160;&#160;10</td></tr>
<tr class="memdesc:a511f960dfd2a4afa6dc073dc909389ac"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_GENCTRL) Output Off Value <br /></td></tr>
<tr class="separator:a511f960dfd2a4afa6dc073dc909389ac"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a80c2684d81c5b9433098ae98bd7cc989"><td class="memItemLeft" align="right" valign="top"><a id="a80c2684d81c5b9433098ae98bd7cc989"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_GENCTRL_OOV</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2gclk_8h.html#a511f960dfd2a4afa6dc073dc909389ac">GCLK_GENCTRL_OOV_Pos</a>)</td></tr>
<tr class="separator:a80c2684d81c5b9433098ae98bd7cc989"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a463727f09be9f9cf1f26c55e954eaf0e"><td class="memItemLeft" align="right" valign="top"><a id="a463727f09be9f9cf1f26c55e954eaf0e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a463727f09be9f9cf1f26c55e954eaf0e">GCLK_GENCTRL_OE_Pos</a>&#160;&#160;&#160;11</td></tr>
<tr class="memdesc:a463727f09be9f9cf1f26c55e954eaf0e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_GENCTRL) Output Enable <br /></td></tr>
<tr class="separator:a463727f09be9f9cf1f26c55e954eaf0e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2d6d57ade8be094e5b3076e347eaabd7"><td class="memItemLeft" align="right" valign="top"><a id="a2d6d57ade8be094e5b3076e347eaabd7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_GENCTRL_OE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2gclk_8h.html#a463727f09be9f9cf1f26c55e954eaf0e">GCLK_GENCTRL_OE_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#ae17e18184623ee038ce57b64c63e4f9a">GCLK_GENCTRL_DIVSEL_Pos</a>&#160;&#160;&#160;12</td></tr>
<tr class="memdesc:ae17e18184623ee038ce57b64c63e4f9a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_GENCTRL) Divide Selection <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_GENCTRL_DIVSEL</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2gclk_8h.html#ae17e18184623ee038ce57b64c63e4f9a">GCLK_GENCTRL_DIVSEL_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a74904f6bd2b8ead6cfffae549a41b869">GCLK_GENCTRL_RUNSTDBY_Pos</a>&#160;&#160;&#160;13</td></tr>
<tr class="memdesc:a74904f6bd2b8ead6cfffae549a41b869"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_GENCTRL) Run in Standby <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_GENCTRL_RUNSTDBY</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2gclk_8h.html#a74904f6bd2b8ead6cfffae549a41b869">GCLK_GENCTRL_RUNSTDBY_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#addce74042a3293ef5f793a440fe49a17">GCLK_GENCTRL_DIV_Pos</a>&#160;&#160;&#160;16</td></tr>
<tr class="memdesc:addce74042a3293ef5f793a440fe49a17"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_GENCTRL) Division Factor <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_GENCTRL_DIV_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF) &lt;&lt; <a class="el" href="component_2gclk_8h.html#addce74042a3293ef5f793a440fe49a17">GCLK_GENCTRL_DIV_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_GENCTRL_DIV</b>(value)&#160;&#160;&#160;(GCLK_GENCTRL_DIV_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2gclk_8h.html#addce74042a3293ef5f793a440fe49a17">GCLK_GENCTRL_DIV_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#ab6d617a227f5a570e43959099ae10b1d">GCLK_GENCTRL_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF3F0F)</td></tr>
<tr class="memdesc:ab6d617a227f5a570e43959099ae10b1d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_GENCTRL) MASK Register <br /></td></tr>
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<tr class="memitem:ac4c23a9218c923b657e8f8a5e09f91bc"><td class="memItemLeft" align="right" valign="top"><a id="ac4c23a9218c923b657e8f8a5e09f91bc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#ac4c23a9218c923b657e8f8a5e09f91bc">GCLK_PCHCTRL_OFFSET</a>&#160;&#160;&#160;0x80</td></tr>
<tr class="memdesc:ac4c23a9218c923b657e8f8a5e09f91bc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_PCHCTRL offset) Peripheral Clock Control <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a9893c3c56f020bbf7f91f4042565cfcc">GCLK_PCHCTRL_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a9893c3c56f020bbf7f91f4042565cfcc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_PCHCTRL reset_value) Peripheral Clock Control <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a43f3e8ba61616cbd7885f4c9ebfb5942">GCLK_PCHCTRL_GEN_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a43f3e8ba61616cbd7885f4c9ebfb5942"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_PCHCTRL) Generic Clock Generator <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_PCHCTRL_GEN_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2gclk_8h.html#a43f3e8ba61616cbd7885f4c9ebfb5942">GCLK_PCHCTRL_GEN_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_PCHCTRL_GEN</b>(value)&#160;&#160;&#160;(GCLK_PCHCTRL_GEN_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2gclk_8h.html#a43f3e8ba61616cbd7885f4c9ebfb5942">GCLK_PCHCTRL_GEN_Pos</a>))</td></tr>
<tr class="separator:a31d53125a2607d277a7a5900944b572f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0cdef65a9bb3f8c6df6b6d1496234af3"><td class="memItemLeft" align="right" valign="top"><a id="a0cdef65a9bb3f8c6df6b6d1496234af3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a0cdef65a9bb3f8c6df6b6d1496234af3">GCLK_PCHCTRL_GEN_GCLK0_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a0cdef65a9bb3f8c6df6b6d1496234af3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_PCHCTRL) Generic clock generator 0 <br /></td></tr>
<tr class="separator:a0cdef65a9bb3f8c6df6b6d1496234af3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa7676f67f8a1f0b2bb0cfbc31fde5863"><td class="memItemLeft" align="right" valign="top"><a id="aa7676f67f8a1f0b2bb0cfbc31fde5863"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#aa7676f67f8a1f0b2bb0cfbc31fde5863">GCLK_PCHCTRL_GEN_GCLK1_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:aa7676f67f8a1f0b2bb0cfbc31fde5863"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_PCHCTRL) Generic clock generator 1 <br /></td></tr>
<tr class="separator:aa7676f67f8a1f0b2bb0cfbc31fde5863"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8cf0d7436042a4cfe4776fdbc8942f57"><td class="memItemLeft" align="right" valign="top"><a id="a8cf0d7436042a4cfe4776fdbc8942f57"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a8cf0d7436042a4cfe4776fdbc8942f57">GCLK_PCHCTRL_GEN_GCLK2_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a8cf0d7436042a4cfe4776fdbc8942f57"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_PCHCTRL) Generic clock generator 2 <br /></td></tr>
<tr class="separator:a8cf0d7436042a4cfe4776fdbc8942f57"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af24b4356f07e8ba81882e8eace7007c8"><td class="memItemLeft" align="right" valign="top"><a id="af24b4356f07e8ba81882e8eace7007c8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#af24b4356f07e8ba81882e8eace7007c8">GCLK_PCHCTRL_GEN_GCLK3_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
<tr class="memdesc:af24b4356f07e8ba81882e8eace7007c8"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_PCHCTRL) Generic clock generator 3 <br /></td></tr>
<tr class="separator:af24b4356f07e8ba81882e8eace7007c8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aced1a57c09e580b2f53d95b87fda8da1"><td class="memItemLeft" align="right" valign="top"><a id="aced1a57c09e580b2f53d95b87fda8da1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#aced1a57c09e580b2f53d95b87fda8da1">GCLK_PCHCTRL_GEN_GCLK4_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
<tr class="memdesc:aced1a57c09e580b2f53d95b87fda8da1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_PCHCTRL) Generic clock generator 4 <br /></td></tr>
<tr class="separator:aced1a57c09e580b2f53d95b87fda8da1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a24712f106984f02229f430f6937212c0"><td class="memItemLeft" align="right" valign="top"><a id="a24712f106984f02229f430f6937212c0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a24712f106984f02229f430f6937212c0">GCLK_PCHCTRL_GEN_GCLK5_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
<tr class="memdesc:a24712f106984f02229f430f6937212c0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_PCHCTRL) Generic clock generator 5 <br /></td></tr>
<tr class="separator:a24712f106984f02229f430f6937212c0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae698cff036e8050049f6cb94ef9a0ad0"><td class="memItemLeft" align="right" valign="top"><a id="ae698cff036e8050049f6cb94ef9a0ad0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#ae698cff036e8050049f6cb94ef9a0ad0">GCLK_PCHCTRL_GEN_GCLK6_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x6)</td></tr>
<tr class="memdesc:ae698cff036e8050049f6cb94ef9a0ad0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_PCHCTRL) Generic clock generator 6 <br /></td></tr>
<tr class="separator:ae698cff036e8050049f6cb94ef9a0ad0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae2a70517fe25b2bc24f79e84c2c160b0"><td class="memItemLeft" align="right" valign="top"><a id="ae2a70517fe25b2bc24f79e84c2c160b0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#ae2a70517fe25b2bc24f79e84c2c160b0">GCLK_PCHCTRL_GEN_GCLK7_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7)</td></tr>
<tr class="memdesc:ae2a70517fe25b2bc24f79e84c2c160b0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_PCHCTRL) Generic clock generator 7 <br /></td></tr>
<tr class="separator:ae2a70517fe25b2bc24f79e84c2c160b0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:add326978c2f318e15788f678a2f9c98a"><td class="memItemLeft" align="right" valign="top"><a id="add326978c2f318e15788f678a2f9c98a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#add326978c2f318e15788f678a2f9c98a">GCLK_PCHCTRL_GEN_GCLK8_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x8)</td></tr>
<tr class="memdesc:add326978c2f318e15788f678a2f9c98a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_PCHCTRL) Generic clock generator 8 <br /></td></tr>
<tr class="separator:add326978c2f318e15788f678a2f9c98a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3f321825a59a2794516685ec6ad6a76d"><td class="memItemLeft" align="right" valign="top"><a id="a3f321825a59a2794516685ec6ad6a76d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a3f321825a59a2794516685ec6ad6a76d">GCLK_PCHCTRL_GEN_GCLK9_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x9)</td></tr>
<tr class="memdesc:a3f321825a59a2794516685ec6ad6a76d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_PCHCTRL) Generic clock generator 9 <br /></td></tr>
<tr class="separator:a3f321825a59a2794516685ec6ad6a76d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8c8877d20cb6db913ca71c2327c18edd"><td class="memItemLeft" align="right" valign="top"><a id="a8c8877d20cb6db913ca71c2327c18edd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a8c8877d20cb6db913ca71c2327c18edd">GCLK_PCHCTRL_GEN_GCLK10_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xA)</td></tr>
<tr class="memdesc:a8c8877d20cb6db913ca71c2327c18edd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_PCHCTRL) Generic clock generator 10 <br /></td></tr>
<tr class="separator:a8c8877d20cb6db913ca71c2327c18edd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aac51ecfbcd57c27e095abd85a531fe16"><td class="memItemLeft" align="right" valign="top"><a id="aac51ecfbcd57c27e095abd85a531fe16"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#aac51ecfbcd57c27e095abd85a531fe16">GCLK_PCHCTRL_GEN_GCLK11_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xB)</td></tr>
<tr class="memdesc:aac51ecfbcd57c27e095abd85a531fe16"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_PCHCTRL) Generic clock generator 11 <br /></td></tr>
<tr class="separator:aac51ecfbcd57c27e095abd85a531fe16"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3798845398aaaad6fb21adee21a18a5e"><td class="memItemLeft" align="right" valign="top"><a id="a3798845398aaaad6fb21adee21a18a5e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_PCHCTRL_GEN_GCLK0</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#a0cdef65a9bb3f8c6df6b6d1496234af3">GCLK_PCHCTRL_GEN_GCLK0_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#a43f3e8ba61616cbd7885f4c9ebfb5942">GCLK_PCHCTRL_GEN_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_PCHCTRL_GEN_GCLK1</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#aa7676f67f8a1f0b2bb0cfbc31fde5863">GCLK_PCHCTRL_GEN_GCLK1_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#a43f3e8ba61616cbd7885f4c9ebfb5942">GCLK_PCHCTRL_GEN_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_PCHCTRL_GEN_GCLK2</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#a8cf0d7436042a4cfe4776fdbc8942f57">GCLK_PCHCTRL_GEN_GCLK2_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#a43f3e8ba61616cbd7885f4c9ebfb5942">GCLK_PCHCTRL_GEN_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_PCHCTRL_GEN_GCLK3</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#af24b4356f07e8ba81882e8eace7007c8">GCLK_PCHCTRL_GEN_GCLK3_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#a43f3e8ba61616cbd7885f4c9ebfb5942">GCLK_PCHCTRL_GEN_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_PCHCTRL_GEN_GCLK4</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#aced1a57c09e580b2f53d95b87fda8da1">GCLK_PCHCTRL_GEN_GCLK4_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#a43f3e8ba61616cbd7885f4c9ebfb5942">GCLK_PCHCTRL_GEN_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_PCHCTRL_GEN_GCLK5</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#a24712f106984f02229f430f6937212c0">GCLK_PCHCTRL_GEN_GCLK5_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#a43f3e8ba61616cbd7885f4c9ebfb5942">GCLK_PCHCTRL_GEN_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_PCHCTRL_GEN_GCLK6</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#ae698cff036e8050049f6cb94ef9a0ad0">GCLK_PCHCTRL_GEN_GCLK6_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#a43f3e8ba61616cbd7885f4c9ebfb5942">GCLK_PCHCTRL_GEN_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_PCHCTRL_GEN_GCLK7</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#ae2a70517fe25b2bc24f79e84c2c160b0">GCLK_PCHCTRL_GEN_GCLK7_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#a43f3e8ba61616cbd7885f4c9ebfb5942">GCLK_PCHCTRL_GEN_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_PCHCTRL_GEN_GCLK8</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#add326978c2f318e15788f678a2f9c98a">GCLK_PCHCTRL_GEN_GCLK8_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#a43f3e8ba61616cbd7885f4c9ebfb5942">GCLK_PCHCTRL_GEN_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_PCHCTRL_GEN_GCLK9</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#a3f321825a59a2794516685ec6ad6a76d">GCLK_PCHCTRL_GEN_GCLK9_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#a43f3e8ba61616cbd7885f4c9ebfb5942">GCLK_PCHCTRL_GEN_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_PCHCTRL_GEN_GCLK10</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#a8c8877d20cb6db913ca71c2327c18edd">GCLK_PCHCTRL_GEN_GCLK10_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#a43f3e8ba61616cbd7885f4c9ebfb5942">GCLK_PCHCTRL_GEN_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_PCHCTRL_GEN_GCLK11</b>&#160;&#160;&#160;(<a class="el" href="component_2gclk_8h.html#aac51ecfbcd57c27e095abd85a531fe16">GCLK_PCHCTRL_GEN_GCLK11_Val</a> &lt;&lt; <a class="el" href="component_2gclk_8h.html#a43f3e8ba61616cbd7885f4c9ebfb5942">GCLK_PCHCTRL_GEN_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a1d6fc43d161c655dc5a7d49ef81e006a">GCLK_PCHCTRL_CHEN_Pos</a>&#160;&#160;&#160;6</td></tr>
<tr class="memdesc:a1d6fc43d161c655dc5a7d49ef81e006a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_PCHCTRL) Channel Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_PCHCTRL_CHEN</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2gclk_8h.html#a1d6fc43d161c655dc5a7d49ef81e006a">GCLK_PCHCTRL_CHEN_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a78453855f35c246cb0b5fc7b300d087b">GCLK_PCHCTRL_WRTLOCK_Pos</a>&#160;&#160;&#160;7</td></tr>
<tr class="memdesc:a78453855f35c246cb0b5fc7b300d087b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_PCHCTRL) Write Lock <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GCLK_PCHCTRL_WRTLOCK</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2gclk_8h.html#a78453855f35c246cb0b5fc7b300d087b">GCLK_PCHCTRL_WRTLOCK_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2gclk_8h.html#a5cf0a3adfe1546fea5a9cf4018b2ec84">GCLK_PCHCTRL_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x000000CF)</td></tr>
<tr class="memdesc:a5cf0a3adfe1546fea5a9cf4018b2ec84"><td class="mdescLeft">&#160;</td><td class="mdescRight">(GCLK_PCHCTRL) MASK Register <br /></td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Component description for GCLK. </p>
<p>Copyright (c) 2019 Microchip Technology Inc.</p>
<p>\asf_license_start </p>
<p class="definition">Definition in file <a class="el" href="component_2gclk_8h_source.html">gclk.h</a>.</p>
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<a href="component_2gclk_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_GCLK_COMPONENT_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_GCLK_COMPONENT_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160; </div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define GCLK_U2122</span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define REV_GCLK 0x120</span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160; </div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="comment">/* -------- GCLK_CTRLA : (GCLK Offset: 0x00) (R/W 8) Control -------- */</span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00044"></a><span class="lineno"><a class="line" href="unionGCLK__CTRLA__Type.html"> 44</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00046"></a><span class="lineno"><a class="line" href="unionGCLK__CTRLA__Type.html#aba2c89dc21eeaceda72f5a34d53ea855"> 46</a></span>&#160; uint8_t <a class="code" href="unionGCLK__CTRLA__Type.html#aba2c89dc21eeaceda72f5a34d53ea855">SWRST</a>:1; </div>
<div class="line"><a name="l00047"></a><span class="lineno"><a class="line" href="unionGCLK__CTRLA__Type.html#a7f28553c7a27cc057171c33b9d7e4889"> 47</a></span>&#160; uint8_t :7; </div>
<div class="line"><a name="l00048"></a><span class="lineno"><a class="line" href="unionGCLK__CTRLA__Type.html#a6103df21904aa0acad746c9cd63d7cce"> 48</a></span>&#160; } bit; </div>
<div class="line"><a name="l00049"></a><span class="lineno"><a class="line" href="unionGCLK__CTRLA__Type.html#ad71bd3dd0c76e96af110af4c482566b9"> 49</a></span>&#160; uint8_t <a class="code" href="unionGCLK__CTRLA__Type.html#ad71bd3dd0c76e96af110af4c482566b9">reg</a>; </div>
<div class="line"><a name="l00050"></a><span class="lineno"> 50</span>&#160;} <a class="code" href="unionGCLK__CTRLA__Type.html">GCLK_CTRLA_Type</a>;</div>
<div class="line"><a name="l00051"></a><span class="lineno"> 51</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00052"></a><span class="lineno"> 52</span>&#160; </div>
<div class="line"><a name="l00053"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a13c8b1dd25535746180d2279df28be74"> 53</a></span>&#160;<span class="preprocessor">#define GCLK_CTRLA_OFFSET 0x00 </span></div>
<div class="line"><a name="l00054"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#ae79c690f810e3f548fef59a384f37ea0"> 54</a></span>&#160;<span class="preprocessor">#define GCLK_CTRLA_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00056"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a80fd8a124a472da27e7b69103d559884"> 56</a></span>&#160;<span class="preprocessor">#define GCLK_CTRLA_SWRST_Pos 0 </span></div>
<div class="line"><a name="l00057"></a><span class="lineno"> 57</span>&#160;<span class="preprocessor">#define GCLK_CTRLA_SWRST (_U_(0x1) &lt;&lt; GCLK_CTRLA_SWRST_Pos)</span></div>
<div class="line"><a name="l00058"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a977e15e98fc8181e3c84060711cdaba2"> 58</a></span>&#160;<span class="preprocessor">#define GCLK_CTRLA_MASK _U_(0x01) </span></div>
<div class="line"><a name="l00060"></a><span class="lineno"> 60</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- GCLK_SYNCBUSY : (GCLK Offset: 0x04) (R/ 32) Synchronization Busy -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00061"></a><span class="lineno"> 61</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00062"></a><span class="lineno"><a class="line" href="unionGCLK__SYNCBUSY__Type.html"> 62</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00063"></a><span class="lineno"> 63</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00064"></a><span class="lineno"><a class="line" href="unionGCLK__SYNCBUSY__Type.html#a04d2e89105cffed19cf038507202f75a"> 64</a></span>&#160; uint32_t <a class="code" href="unionGCLK__SYNCBUSY__Type.html#a04d2e89105cffed19cf038507202f75a">SWRST</a>:1; </div>
<div class="line"><a name="l00065"></a><span class="lineno"><a class="line" href="unionGCLK__SYNCBUSY__Type.html#a6b4bad5acaf6f39c42e3ee20ea600ea0"> 65</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00066"></a><span class="lineno"><a class="line" href="unionGCLK__SYNCBUSY__Type.html#a754cb08a768f7deccaeba2a67bfe07cd"> 66</a></span>&#160; uint32_t <a class="code" href="unionGCLK__SYNCBUSY__Type.html#a754cb08a768f7deccaeba2a67bfe07cd">GENCTRL0</a>:1; </div>
<div class="line"><a name="l00067"></a><span class="lineno"><a class="line" href="unionGCLK__SYNCBUSY__Type.html#a9c21536f04989cf68246eb5c7d35a1b4"> 67</a></span>&#160; uint32_t <a class="code" href="unionGCLK__SYNCBUSY__Type.html#a9c21536f04989cf68246eb5c7d35a1b4">GENCTRL1</a>:1; </div>
<div class="line"><a name="l00068"></a><span class="lineno"><a class="line" href="unionGCLK__SYNCBUSY__Type.html#aba5cc13acafbdc03f412a4c0e50db17f"> 68</a></span>&#160; uint32_t <a class="code" href="unionGCLK__SYNCBUSY__Type.html#aba5cc13acafbdc03f412a4c0e50db17f">GENCTRL2</a>:1; </div>
<div class="line"><a name="l00069"></a><span class="lineno"><a class="line" href="unionGCLK__SYNCBUSY__Type.html#a5cbe1d70575ee20618758b31b3dd0b64"> 69</a></span>&#160; uint32_t <a class="code" href="unionGCLK__SYNCBUSY__Type.html#a5cbe1d70575ee20618758b31b3dd0b64">GENCTRL3</a>:1; </div>
<div class="line"><a name="l00070"></a><span class="lineno"><a class="line" href="unionGCLK__SYNCBUSY__Type.html#a5efdd9343ea8347138b65b5654f7a960"> 70</a></span>&#160; uint32_t <a class="code" href="unionGCLK__SYNCBUSY__Type.html#a5efdd9343ea8347138b65b5654f7a960">GENCTRL4</a>:1; </div>
<div class="line"><a name="l00071"></a><span class="lineno"><a class="line" href="unionGCLK__SYNCBUSY__Type.html#a6f8cbf01eca5b20eea9fe55ba83db3cf"> 71</a></span>&#160; uint32_t <a class="code" href="unionGCLK__SYNCBUSY__Type.html#a6f8cbf01eca5b20eea9fe55ba83db3cf">GENCTRL5</a>:1; </div>
<div class="line"><a name="l00072"></a><span class="lineno"><a class="line" href="unionGCLK__SYNCBUSY__Type.html#a3990e61fd4cd55e6d24987a559535937"> 72</a></span>&#160; uint32_t <a class="code" href="unionGCLK__SYNCBUSY__Type.html#a3990e61fd4cd55e6d24987a559535937">GENCTRL6</a>:1; </div>
<div class="line"><a name="l00073"></a><span class="lineno"><a class="line" href="unionGCLK__SYNCBUSY__Type.html#a674950d9dcd05e56a4dbbd68b66e8a96"> 73</a></span>&#160; uint32_t <a class="code" href="unionGCLK__SYNCBUSY__Type.html#a674950d9dcd05e56a4dbbd68b66e8a96">GENCTRL7</a>:1; </div>
<div class="line"><a name="l00074"></a><span class="lineno"><a class="line" href="unionGCLK__SYNCBUSY__Type.html#a0e74c9fc3ed67672b28818f667d33491"> 74</a></span>&#160; uint32_t <a class="code" href="unionGCLK__SYNCBUSY__Type.html#a0e74c9fc3ed67672b28818f667d33491">GENCTRL8</a>:1; </div>
<div class="line"><a name="l00075"></a><span class="lineno"><a class="line" href="unionGCLK__SYNCBUSY__Type.html#ad8715df05d4f9e29e999bea034f92274"> 75</a></span>&#160; uint32_t <a class="code" href="unionGCLK__SYNCBUSY__Type.html#ad8715df05d4f9e29e999bea034f92274">GENCTRL9</a>:1; </div>
<div class="line"><a name="l00076"></a><span class="lineno"><a class="line" href="unionGCLK__SYNCBUSY__Type.html#a21e6af32e2fb9bd117fea760bb9b4bf0"> 76</a></span>&#160; uint32_t <a class="code" href="unionGCLK__SYNCBUSY__Type.html#a21e6af32e2fb9bd117fea760bb9b4bf0">GENCTRL10</a>:1; </div>
<div class="line"><a name="l00077"></a><span class="lineno"><a class="line" href="unionGCLK__SYNCBUSY__Type.html#a7b394d2a9dd2426cab1c030d95d31fff"> 77</a></span>&#160; uint32_t <a class="code" href="unionGCLK__SYNCBUSY__Type.html#a7b394d2a9dd2426cab1c030d95d31fff">GENCTRL11</a>:1; </div>
<div class="line"><a name="l00078"></a><span class="lineno"><a class="line" href="unionGCLK__SYNCBUSY__Type.html#a6729905f70f558283f516b696bc07ea9"> 78</a></span>&#160; uint32_t :18; </div>
<div class="line"><a name="l00079"></a><span class="lineno"><a class="line" href="unionGCLK__SYNCBUSY__Type.html#acdc87de473bafcfca955b656d65be233"> 79</a></span>&#160; } bit; </div>
<div class="line"><a name="l00080"></a><span class="lineno"> 80</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00081"></a><span class="lineno"> 81</span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00082"></a><span class="lineno"><a class="line" href="unionGCLK__SYNCBUSY__Type.html#a3e39602d949b20e6b25867a586941f55"> 82</a></span>&#160; uint32_t <a class="code" href="unionGCLK__SYNCBUSY__Type.html#a3e39602d949b20e6b25867a586941f55">GENCTRL</a>:12; </div>
<div class="line"><a name="l00083"></a><span class="lineno"> 83</span>&#160; uint32_t :18; </div>
<div class="line"><a name="l00084"></a><span class="lineno"><a class="line" href="unionGCLK__SYNCBUSY__Type.html#aaee5e8e74330e096f070b9809ef7a3ec"> 84</a></span>&#160; } vec; </div>
<div class="line"><a name="l00085"></a><span class="lineno"><a class="line" href="unionGCLK__SYNCBUSY__Type.html#abe21599a55adad60be586efdd1cc3118"> 85</a></span>&#160; uint32_t <a class="code" href="unionGCLK__SYNCBUSY__Type.html#abe21599a55adad60be586efdd1cc3118">reg</a>; </div>
<div class="line"><a name="l00086"></a><span class="lineno"> 86</span>&#160;} <a class="code" href="unionGCLK__SYNCBUSY__Type.html">GCLK_SYNCBUSY_Type</a>;</div>
<div class="line"><a name="l00087"></a><span class="lineno"> 87</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00088"></a><span class="lineno"> 88</span>&#160; </div>
<div class="line"><a name="l00089"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a1fcf109f21393e43cf19b3880c3ccc67"> 89</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_OFFSET 0x04 </span></div>
<div class="line"><a name="l00090"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#adeda6ee021e815b1082be10e6d230a3a"> 90</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00092"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a32d54c0380b80778c20ea5224206bc40"> 92</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_SWRST_Pos 0 </span></div>
<div class="line"><a name="l00093"></a><span class="lineno"> 93</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_SWRST (_U_(0x1) &lt;&lt; GCLK_SYNCBUSY_SWRST_Pos)</span></div>
<div class="line"><a name="l00094"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#accd408c973e5db200ed8a8dcaa1c57dd"> 94</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL0_Pos 2 </span></div>
<div class="line"><a name="l00095"></a><span class="lineno"> 95</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL0 (_U_(1) &lt;&lt; GCLK_SYNCBUSY_GENCTRL0_Pos)</span></div>
<div class="line"><a name="l00096"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a42f71035ebf8832a02b5956ce4c0b4c7"> 96</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL1_Pos 3 </span></div>
<div class="line"><a name="l00097"></a><span class="lineno"> 97</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL1 (_U_(1) &lt;&lt; GCLK_SYNCBUSY_GENCTRL1_Pos)</span></div>
<div class="line"><a name="l00098"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#abaf32e366c83f6fde3f4c208b2834d5d"> 98</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL2_Pos 4 </span></div>
<div class="line"><a name="l00099"></a><span class="lineno"> 99</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL2 (_U_(1) &lt;&lt; GCLK_SYNCBUSY_GENCTRL2_Pos)</span></div>
<div class="line"><a name="l00100"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a1fd25ca09a66951e2f848f9f5b143d1a"> 100</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL3_Pos 5 </span></div>
<div class="line"><a name="l00101"></a><span class="lineno"> 101</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL3 (_U_(1) &lt;&lt; GCLK_SYNCBUSY_GENCTRL3_Pos)</span></div>
<div class="line"><a name="l00102"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a835dd895f76b04c073d7e9fa221bb30c"> 102</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL4_Pos 6 </span></div>
<div class="line"><a name="l00103"></a><span class="lineno"> 103</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL4 (_U_(1) &lt;&lt; GCLK_SYNCBUSY_GENCTRL4_Pos)</span></div>
<div class="line"><a name="l00104"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a9047680cad9f7b682867ae845d81097b"> 104</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL5_Pos 7 </span></div>
<div class="line"><a name="l00105"></a><span class="lineno"> 105</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL5 (_U_(1) &lt;&lt; GCLK_SYNCBUSY_GENCTRL5_Pos)</span></div>
<div class="line"><a name="l00106"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#ac53fed16204bde4e3944d37b61244d1d"> 106</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL6_Pos 8 </span></div>
<div class="line"><a name="l00107"></a><span class="lineno"> 107</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL6 (_U_(1) &lt;&lt; GCLK_SYNCBUSY_GENCTRL6_Pos)</span></div>
<div class="line"><a name="l00108"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a1668b91d76b537fde32a142d22c7a63f"> 108</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL7_Pos 9 </span></div>
<div class="line"><a name="l00109"></a><span class="lineno"> 109</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL7 (_U_(1) &lt;&lt; GCLK_SYNCBUSY_GENCTRL7_Pos)</span></div>
<div class="line"><a name="l00110"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a1eea17da06fb0d52826d0d6f051c7ef1"> 110</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL8_Pos 10 </span></div>
<div class="line"><a name="l00111"></a><span class="lineno"> 111</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL8 (_U_(1) &lt;&lt; GCLK_SYNCBUSY_GENCTRL8_Pos)</span></div>
<div class="line"><a name="l00112"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a14f41aca12329312875740b261aa2f47"> 112</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL9_Pos 11 </span></div>
<div class="line"><a name="l00113"></a><span class="lineno"> 113</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL9 (_U_(1) &lt;&lt; GCLK_SYNCBUSY_GENCTRL9_Pos)</span></div>
<div class="line"><a name="l00114"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#aa5198206518007c9a47baf65a8d359cd"> 114</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL10_Pos 12 </span></div>
<div class="line"><a name="l00115"></a><span class="lineno"> 115</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL10 (_U_(1) &lt;&lt; GCLK_SYNCBUSY_GENCTRL10_Pos)</span></div>
<div class="line"><a name="l00116"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a848356e7e1a8140fb63441fdc5f7420a"> 116</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL11_Pos 13 </span></div>
<div class="line"><a name="l00117"></a><span class="lineno"> 117</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL11 (_U_(1) &lt;&lt; GCLK_SYNCBUSY_GENCTRL11_Pos)</span></div>
<div class="line"><a name="l00118"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#accbba8857cd7d67c4c0b526841298790"> 118</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_Pos 2 </span></div>
<div class="line"><a name="l00119"></a><span class="lineno"> 119</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_Msk (_U_(0xFFF) &lt;&lt; GCLK_SYNCBUSY_GENCTRL_Pos)</span></div>
<div class="line"><a name="l00120"></a><span class="lineno"> 120</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL(value) (GCLK_SYNCBUSY_GENCTRL_Msk &amp; ((value) &lt;&lt; GCLK_SYNCBUSY_GENCTRL_Pos))</span></div>
<div class="line"><a name="l00121"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a062df74b14636eb428b8f0472abb27cb"> 121</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_GCLK0_Val _U_(0x1) </span></div>
<div class="line"><a name="l00122"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a9207e5b7583059fa7b62937d320c87a4"> 122</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_GCLK1_Val _U_(0x2) </span></div>
<div class="line"><a name="l00123"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a54f2ec66d24d75af90f5f69e57eda372"> 123</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_GCLK2_Val _U_(0x4) </span></div>
<div class="line"><a name="l00124"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#aa08b2a951ab29d44a151e2d11ecfc628"> 124</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_GCLK3_Val _U_(0x8) </span></div>
<div class="line"><a name="l00125"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a3485377e599f7a35e8fcffe0904bde88"> 125</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_GCLK4_Val _U_(0x10) </span></div>
<div class="line"><a name="l00126"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#ad0c64bada7d3d22a4fdf4141293014d2"> 126</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_GCLK5_Val _U_(0x20) </span></div>
<div class="line"><a name="l00127"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a10a3a53a51e119577b8bc8b7b525eb7d"> 127</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_GCLK6_Val _U_(0x40) </span></div>
<div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#ae905cf7ca8bc7ebd6a6537af7fb3ddfa"> 128</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_GCLK7_Val _U_(0x80) </span></div>
<div class="line"><a name="l00129"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a4bc9fec20abf5638ab612ec6202e5681"> 129</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_GCLK8_Val _U_(0x100) </span></div>
<div class="line"><a name="l00130"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a708b15f315c6df0eb106c3d5f83174c2"> 130</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_GCLK9_Val _U_(0x200) </span></div>
<div class="line"><a name="l00131"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#af004fad28fee052115f10553659b5fa4"> 131</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_GCLK10_Val _U_(0x400) </span></div>
<div class="line"><a name="l00132"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a73c4b764053d756c58a8f665ff6a867f"> 132</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_GCLK11_Val _U_(0x800) </span></div>
<div class="line"><a name="l00133"></a><span class="lineno"> 133</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_GCLK0 (GCLK_SYNCBUSY_GENCTRL_GCLK0_Val &lt;&lt; GCLK_SYNCBUSY_GENCTRL_Pos)</span></div>
<div class="line"><a name="l00134"></a><span class="lineno"> 134</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_GCLK1 (GCLK_SYNCBUSY_GENCTRL_GCLK1_Val &lt;&lt; GCLK_SYNCBUSY_GENCTRL_Pos)</span></div>
<div class="line"><a name="l00135"></a><span class="lineno"> 135</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_GCLK2 (GCLK_SYNCBUSY_GENCTRL_GCLK2_Val &lt;&lt; GCLK_SYNCBUSY_GENCTRL_Pos)</span></div>
<div class="line"><a name="l00136"></a><span class="lineno"> 136</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_GCLK3 (GCLK_SYNCBUSY_GENCTRL_GCLK3_Val &lt;&lt; GCLK_SYNCBUSY_GENCTRL_Pos)</span></div>
<div class="line"><a name="l00137"></a><span class="lineno"> 137</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_GCLK4 (GCLK_SYNCBUSY_GENCTRL_GCLK4_Val &lt;&lt; GCLK_SYNCBUSY_GENCTRL_Pos)</span></div>
<div class="line"><a name="l00138"></a><span class="lineno"> 138</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_GCLK5 (GCLK_SYNCBUSY_GENCTRL_GCLK5_Val &lt;&lt; GCLK_SYNCBUSY_GENCTRL_Pos)</span></div>
<div class="line"><a name="l00139"></a><span class="lineno"> 139</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_GCLK6 (GCLK_SYNCBUSY_GENCTRL_GCLK6_Val &lt;&lt; GCLK_SYNCBUSY_GENCTRL_Pos)</span></div>
<div class="line"><a name="l00140"></a><span class="lineno"> 140</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_GCLK7 (GCLK_SYNCBUSY_GENCTRL_GCLK7_Val &lt;&lt; GCLK_SYNCBUSY_GENCTRL_Pos)</span></div>
<div class="line"><a name="l00141"></a><span class="lineno"> 141</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_GCLK8 (GCLK_SYNCBUSY_GENCTRL_GCLK8_Val &lt;&lt; GCLK_SYNCBUSY_GENCTRL_Pos)</span></div>
<div class="line"><a name="l00142"></a><span class="lineno"> 142</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_GCLK9 (GCLK_SYNCBUSY_GENCTRL_GCLK9_Val &lt;&lt; GCLK_SYNCBUSY_GENCTRL_Pos)</span></div>
<div class="line"><a name="l00143"></a><span class="lineno"> 143</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_GCLK10 (GCLK_SYNCBUSY_GENCTRL_GCLK10_Val &lt;&lt; GCLK_SYNCBUSY_GENCTRL_Pos)</span></div>
<div class="line"><a name="l00144"></a><span class="lineno"> 144</span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_GENCTRL_GCLK11 (GCLK_SYNCBUSY_GENCTRL_GCLK11_Val &lt;&lt; GCLK_SYNCBUSY_GENCTRL_Pos)</span></div>
<div class="line"><a name="l00145"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a67a06d90861a5d2ec78146d390160dcd"> 145</a></span>&#160;<span class="preprocessor">#define GCLK_SYNCBUSY_MASK _U_(0x00003FFD) </span></div>
<div class="line"><a name="l00147"></a><span class="lineno"> 147</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- GCLK_GENCTRL : (GCLK Offset: 0x20) (R/W 32) Generic Clock Generator Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00148"></a><span class="lineno"> 148</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00149"></a><span class="lineno"><a class="line" href="unionGCLK__GENCTRL__Type.html"> 149</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00150"></a><span class="lineno"> 150</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00151"></a><span class="lineno"><a class="line" href="unionGCLK__GENCTRL__Type.html#abea54c6dbd65d743abd94cb96e811ecd"> 151</a></span>&#160; uint32_t <a class="code" href="unionGCLK__GENCTRL__Type.html#abea54c6dbd65d743abd94cb96e811ecd">SRC</a>:4; </div>
<div class="line"><a name="l00152"></a><span class="lineno"><a class="line" href="unionGCLK__GENCTRL__Type.html#aee105de6b15fc76ec3bfb86e807b0ec6"> 152</a></span>&#160; uint32_t :4; </div>
<div class="line"><a name="l00153"></a><span class="lineno"><a class="line" href="unionGCLK__GENCTRL__Type.html#a78a083801d5776bdd03e8161f75b7901"> 153</a></span>&#160; uint32_t <a class="code" href="unionGCLK__GENCTRL__Type.html#a78a083801d5776bdd03e8161f75b7901">GENEN</a>:1; </div>
<div class="line"><a name="l00154"></a><span class="lineno"><a class="line" href="unionGCLK__GENCTRL__Type.html#a4cc3e1807e181d5708882ef2f1d95377"> 154</a></span>&#160; uint32_t <a class="code" href="unionGCLK__GENCTRL__Type.html#a4cc3e1807e181d5708882ef2f1d95377">IDC</a>:1; </div>
<div class="line"><a name="l00155"></a><span class="lineno"><a class="line" href="unionGCLK__GENCTRL__Type.html#a5abb899024db2aeb89d5b61b68e9f925"> 155</a></span>&#160; uint32_t <a class="code" href="unionGCLK__GENCTRL__Type.html#a5abb899024db2aeb89d5b61b68e9f925">OOV</a>:1; </div>
<div class="line"><a name="l00156"></a><span class="lineno"><a class="line" href="unionGCLK__GENCTRL__Type.html#a6fd55e0d3633d0f587579b80c3a64931"> 156</a></span>&#160; uint32_t <a class="code" href="unionGCLK__GENCTRL__Type.html#a6fd55e0d3633d0f587579b80c3a64931">OE</a>:1; </div>
<div class="line"><a name="l00157"></a><span class="lineno"><a class="line" href="unionGCLK__GENCTRL__Type.html#ae9aa8d19be60496d708be9eba805d08e"> 157</a></span>&#160; uint32_t <a class="code" href="unionGCLK__GENCTRL__Type.html#ae9aa8d19be60496d708be9eba805d08e">DIVSEL</a>:1; </div>
<div class="line"><a name="l00158"></a><span class="lineno"><a class="line" href="unionGCLK__GENCTRL__Type.html#a12451b6b3f8bd0ef8b95fe867b2289d6"> 158</a></span>&#160; uint32_t <a class="code" href="unionGCLK__GENCTRL__Type.html#a12451b6b3f8bd0ef8b95fe867b2289d6">RUNSTDBY</a>:1; </div>
<div class="line"><a name="l00159"></a><span class="lineno"><a class="line" href="unionGCLK__GENCTRL__Type.html#aacacaf7d1830c224950f4ad7ca5324b0"> 159</a></span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00160"></a><span class="lineno"><a class="line" href="unionGCLK__GENCTRL__Type.html#a662983c9fe205f4b50d9016667f5ce8b"> 160</a></span>&#160; uint32_t <a class="code" href="unionGCLK__GENCTRL__Type.html#a662983c9fe205f4b50d9016667f5ce8b">DIV</a>:16; </div>
<div class="line"><a name="l00161"></a><span class="lineno"><a class="line" href="unionGCLK__GENCTRL__Type.html#a901f40ac211ddc3aab221bdfb3949dfe"> 161</a></span>&#160; } bit; </div>
<div class="line"><a name="l00162"></a><span class="lineno"><a class="line" href="unionGCLK__GENCTRL__Type.html#a95549d54d3c09791b9a106d45e9062c7"> 162</a></span>&#160; uint32_t <a class="code" href="unionGCLK__GENCTRL__Type.html#a95549d54d3c09791b9a106d45e9062c7">reg</a>; </div>
<div class="line"><a name="l00163"></a><span class="lineno"> 163</span>&#160;} <a class="code" href="unionGCLK__GENCTRL__Type.html">GCLK_GENCTRL_Type</a>;</div>
<div class="line"><a name="l00164"></a><span class="lineno"> 164</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00165"></a><span class="lineno"> 165</span>&#160; </div>
<div class="line"><a name="l00166"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a93d991084be98b48eb3bd242d2114042"> 166</a></span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_OFFSET 0x20 </span></div>
<div class="line"><a name="l00167"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a6fe333c528ab24313886414224566cfc"> 167</a></span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00169"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a3ca6fb0d36a0f1194282d2517b22965f"> 169</a></span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_SRC_Pos 0 </span></div>
<div class="line"><a name="l00170"></a><span class="lineno"> 170</span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_SRC_Msk (_U_(0xF) &lt;&lt; GCLK_GENCTRL_SRC_Pos)</span></div>
<div class="line"><a name="l00171"></a><span class="lineno"> 171</span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_SRC(value) (GCLK_GENCTRL_SRC_Msk &amp; ((value) &lt;&lt; GCLK_GENCTRL_SRC_Pos))</span></div>
<div class="line"><a name="l00172"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a76fd93e165f7ca657115788e4f208ef7"> 172</a></span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_SRC_XOSC0_Val _U_(0x0) </span></div>
<div class="line"><a name="l00173"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#ac6e6c970cd1a9500a6579419b4becfdc"> 173</a></span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_SRC_XOSC1_Val _U_(0x1) </span></div>
<div class="line"><a name="l00174"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a4c279c59a26c988991b63eb2682e8acc"> 174</a></span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_SRC_GCLKIN_Val _U_(0x2) </span></div>
<div class="line"><a name="l00175"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a2774be4de7707cea940a2b7ec37f30e3"> 175</a></span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_SRC_GCLKGEN1_Val _U_(0x3) </span></div>
<div class="line"><a name="l00176"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a42e2c1ea6d7f04f75657e31791336ec6"> 176</a></span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_SRC_OSCULP32K_Val _U_(0x4) </span></div>
<div class="line"><a name="l00177"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a087326ba1d0ac766f2835e5460c72ef0"> 177</a></span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_SRC_XOSC32K_Val _U_(0x5) </span></div>
<div class="line"><a name="l00178"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a6cf7424ff64ad42031a46dbfec459c89"> 178</a></span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_SRC_DFLL_Val _U_(0x6) </span></div>
<div class="line"><a name="l00179"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a57496e494e2456f7a2cf096bc910f150"> 179</a></span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_SRC_DPLL0_Val _U_(0x7) </span></div>
<div class="line"><a name="l00180"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a58b634c244fe8576cfed9bfc140a2f0d"> 180</a></span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_SRC_DPLL1_Val _U_(0x8) </span></div>
<div class="line"><a name="l00181"></a><span class="lineno"> 181</span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_SRC_XOSC0 (GCLK_GENCTRL_SRC_XOSC0_Val &lt;&lt; GCLK_GENCTRL_SRC_Pos)</span></div>
<div class="line"><a name="l00182"></a><span class="lineno"> 182</span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_SRC_XOSC1 (GCLK_GENCTRL_SRC_XOSC1_Val &lt;&lt; GCLK_GENCTRL_SRC_Pos)</span></div>
<div class="line"><a name="l00183"></a><span class="lineno"> 183</span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_SRC_GCLKIN (GCLK_GENCTRL_SRC_GCLKIN_Val &lt;&lt; GCLK_GENCTRL_SRC_Pos)</span></div>
<div class="line"><a name="l00184"></a><span class="lineno"> 184</span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_SRC_GCLKGEN1 (GCLK_GENCTRL_SRC_GCLKGEN1_Val &lt;&lt; GCLK_GENCTRL_SRC_Pos)</span></div>
<div class="line"><a name="l00185"></a><span class="lineno"> 185</span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_SRC_OSCULP32K (GCLK_GENCTRL_SRC_OSCULP32K_Val &lt;&lt; GCLK_GENCTRL_SRC_Pos)</span></div>
<div class="line"><a name="l00186"></a><span class="lineno"> 186</span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_SRC_XOSC32K (GCLK_GENCTRL_SRC_XOSC32K_Val &lt;&lt; GCLK_GENCTRL_SRC_Pos)</span></div>
<div class="line"><a name="l00187"></a><span class="lineno"> 187</span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_SRC_DFLL (GCLK_GENCTRL_SRC_DFLL_Val &lt;&lt; GCLK_GENCTRL_SRC_Pos)</span></div>
<div class="line"><a name="l00188"></a><span class="lineno"> 188</span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_SRC_DPLL0 (GCLK_GENCTRL_SRC_DPLL0_Val &lt;&lt; GCLK_GENCTRL_SRC_Pos)</span></div>
<div class="line"><a name="l00189"></a><span class="lineno"> 189</span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_SRC_DPLL1 (GCLK_GENCTRL_SRC_DPLL1_Val &lt;&lt; GCLK_GENCTRL_SRC_Pos)</span></div>
<div class="line"><a name="l00190"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#acf206c291132d560c6f857c74d042b09"> 190</a></span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_GENEN_Pos 8 </span></div>
<div class="line"><a name="l00191"></a><span class="lineno"> 191</span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_GENEN (_U_(0x1) &lt;&lt; GCLK_GENCTRL_GENEN_Pos)</span></div>
<div class="line"><a name="l00192"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#add1c684492c64ddc0b937c7571028381"> 192</a></span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_IDC_Pos 9 </span></div>
<div class="line"><a name="l00193"></a><span class="lineno"> 193</span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_IDC (_U_(0x1) &lt;&lt; GCLK_GENCTRL_IDC_Pos)</span></div>
<div class="line"><a name="l00194"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a511f960dfd2a4afa6dc073dc909389ac"> 194</a></span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_OOV_Pos 10 </span></div>
<div class="line"><a name="l00195"></a><span class="lineno"> 195</span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_OOV (_U_(0x1) &lt;&lt; GCLK_GENCTRL_OOV_Pos)</span></div>
<div class="line"><a name="l00196"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a463727f09be9f9cf1f26c55e954eaf0e"> 196</a></span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_OE_Pos 11 </span></div>
<div class="line"><a name="l00197"></a><span class="lineno"> 197</span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_OE (_U_(0x1) &lt;&lt; GCLK_GENCTRL_OE_Pos)</span></div>
<div class="line"><a name="l00198"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#ae17e18184623ee038ce57b64c63e4f9a"> 198</a></span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_DIVSEL_Pos 12 </span></div>
<div class="line"><a name="l00199"></a><span class="lineno"> 199</span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_DIVSEL (_U_(0x1) &lt;&lt; GCLK_GENCTRL_DIVSEL_Pos)</span></div>
<div class="line"><a name="l00200"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a74904f6bd2b8ead6cfffae549a41b869"> 200</a></span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_RUNSTDBY_Pos 13 </span></div>
<div class="line"><a name="l00201"></a><span class="lineno"> 201</span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_RUNSTDBY (_U_(0x1) &lt;&lt; GCLK_GENCTRL_RUNSTDBY_Pos)</span></div>
<div class="line"><a name="l00202"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#addce74042a3293ef5f793a440fe49a17"> 202</a></span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_DIV_Pos 16 </span></div>
<div class="line"><a name="l00203"></a><span class="lineno"> 203</span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_DIV_Msk (_U_(0xFFFF) &lt;&lt; GCLK_GENCTRL_DIV_Pos)</span></div>
<div class="line"><a name="l00204"></a><span class="lineno"> 204</span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_DIV(value) (GCLK_GENCTRL_DIV_Msk &amp; ((value) &lt;&lt; GCLK_GENCTRL_DIV_Pos))</span></div>
<div class="line"><a name="l00205"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#ab6d617a227f5a570e43959099ae10b1d"> 205</a></span>&#160;<span class="preprocessor">#define GCLK_GENCTRL_MASK _U_(0xFFFF3F0F) </span></div>
<div class="line"><a name="l00207"></a><span class="lineno"> 207</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- GCLK_PCHCTRL : (GCLK Offset: 0x80) (R/W 32) Peripheral Clock Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00208"></a><span class="lineno"> 208</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00209"></a><span class="lineno"><a class="line" href="unionGCLK__PCHCTRL__Type.html"> 209</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00210"></a><span class="lineno"> 210</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00211"></a><span class="lineno"><a class="line" href="unionGCLK__PCHCTRL__Type.html#a12a3d24ea0927e94e27b50c2c25e56e3"> 211</a></span>&#160; uint32_t <a class="code" href="unionGCLK__PCHCTRL__Type.html#a12a3d24ea0927e94e27b50c2c25e56e3">GEN</a>:4; </div>
<div class="line"><a name="l00212"></a><span class="lineno"><a class="line" href="unionGCLK__PCHCTRL__Type.html#ae416e771ed2dfe22fb8756067eb1c8dc"> 212</a></span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00213"></a><span class="lineno"><a class="line" href="unionGCLK__PCHCTRL__Type.html#a6fac8b64b38f31f6add10b97fc9a17f8"> 213</a></span>&#160; uint32_t <a class="code" href="unionGCLK__PCHCTRL__Type.html#a6fac8b64b38f31f6add10b97fc9a17f8">CHEN</a>:1; </div>
<div class="line"><a name="l00214"></a><span class="lineno"><a class="line" href="unionGCLK__PCHCTRL__Type.html#a46f57bec63c52672a774ea486ffb2c41"> 214</a></span>&#160; uint32_t <a class="code" href="unionGCLK__PCHCTRL__Type.html#a46f57bec63c52672a774ea486ffb2c41">WRTLOCK</a>:1; </div>
<div class="line"><a name="l00215"></a><span class="lineno"><a class="line" href="unionGCLK__PCHCTRL__Type.html#aa0ee3abc3ff133e94cabd0cc96e44fa2"> 215</a></span>&#160; uint32_t :24; </div>
<div class="line"><a name="l00216"></a><span class="lineno"><a class="line" href="unionGCLK__PCHCTRL__Type.html#af1ccc5875ce7dba2f24f420f01cda98a"> 216</a></span>&#160; } bit; </div>
<div class="line"><a name="l00217"></a><span class="lineno"><a class="line" href="unionGCLK__PCHCTRL__Type.html#acd72f46c6e390a28828b16730a06704a"> 217</a></span>&#160; uint32_t <a class="code" href="unionGCLK__PCHCTRL__Type.html#acd72f46c6e390a28828b16730a06704a">reg</a>; </div>
<div class="line"><a name="l00218"></a><span class="lineno"> 218</span>&#160;} <a class="code" href="unionGCLK__PCHCTRL__Type.html">GCLK_PCHCTRL_Type</a>;</div>
<div class="line"><a name="l00219"></a><span class="lineno"> 219</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00220"></a><span class="lineno"> 220</span>&#160; </div>
<div class="line"><a name="l00221"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#ac4c23a9218c923b657e8f8a5e09f91bc"> 221</a></span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_OFFSET 0x80 </span></div>
<div class="line"><a name="l00222"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a9893c3c56f020bbf7f91f4042565cfcc"> 222</a></span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00224"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a43f3e8ba61616cbd7885f4c9ebfb5942"> 224</a></span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_Pos 0 </span></div>
<div class="line"><a name="l00225"></a><span class="lineno"> 225</span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_Msk (_U_(0xF) &lt;&lt; GCLK_PCHCTRL_GEN_Pos)</span></div>
<div class="line"><a name="l00226"></a><span class="lineno"> 226</span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN(value) (GCLK_PCHCTRL_GEN_Msk &amp; ((value) &lt;&lt; GCLK_PCHCTRL_GEN_Pos))</span></div>
<div class="line"><a name="l00227"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a0cdef65a9bb3f8c6df6b6d1496234af3"> 227</a></span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_GCLK0_Val _U_(0x0) </span></div>
<div class="line"><a name="l00228"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#aa7676f67f8a1f0b2bb0cfbc31fde5863"> 228</a></span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_GCLK1_Val _U_(0x1) </span></div>
<div class="line"><a name="l00229"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a8cf0d7436042a4cfe4776fdbc8942f57"> 229</a></span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_GCLK2_Val _U_(0x2) </span></div>
<div class="line"><a name="l00230"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#af24b4356f07e8ba81882e8eace7007c8"> 230</a></span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_GCLK3_Val _U_(0x3) </span></div>
<div class="line"><a name="l00231"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#aced1a57c09e580b2f53d95b87fda8da1"> 231</a></span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_GCLK4_Val _U_(0x4) </span></div>
<div class="line"><a name="l00232"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a24712f106984f02229f430f6937212c0"> 232</a></span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_GCLK5_Val _U_(0x5) </span></div>
<div class="line"><a name="l00233"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#ae698cff036e8050049f6cb94ef9a0ad0"> 233</a></span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_GCLK6_Val _U_(0x6) </span></div>
<div class="line"><a name="l00234"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#ae2a70517fe25b2bc24f79e84c2c160b0"> 234</a></span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_GCLK7_Val _U_(0x7) </span></div>
<div class="line"><a name="l00235"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#add326978c2f318e15788f678a2f9c98a"> 235</a></span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_GCLK8_Val _U_(0x8) </span></div>
<div class="line"><a name="l00236"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a3f321825a59a2794516685ec6ad6a76d"> 236</a></span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_GCLK9_Val _U_(0x9) </span></div>
<div class="line"><a name="l00237"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a8c8877d20cb6db913ca71c2327c18edd"> 237</a></span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_GCLK10_Val _U_(0xA) </span></div>
<div class="line"><a name="l00238"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#aac51ecfbcd57c27e095abd85a531fe16"> 238</a></span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_GCLK11_Val _U_(0xB) </span></div>
<div class="line"><a name="l00239"></a><span class="lineno"> 239</span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_GCLK0 (GCLK_PCHCTRL_GEN_GCLK0_Val &lt;&lt; GCLK_PCHCTRL_GEN_Pos)</span></div>
<div class="line"><a name="l00240"></a><span class="lineno"> 240</span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_GCLK1 (GCLK_PCHCTRL_GEN_GCLK1_Val &lt;&lt; GCLK_PCHCTRL_GEN_Pos)</span></div>
<div class="line"><a name="l00241"></a><span class="lineno"> 241</span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_GCLK2 (GCLK_PCHCTRL_GEN_GCLK2_Val &lt;&lt; GCLK_PCHCTRL_GEN_Pos)</span></div>
<div class="line"><a name="l00242"></a><span class="lineno"> 242</span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_GCLK3 (GCLK_PCHCTRL_GEN_GCLK3_Val &lt;&lt; GCLK_PCHCTRL_GEN_Pos)</span></div>
<div class="line"><a name="l00243"></a><span class="lineno"> 243</span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_GCLK4 (GCLK_PCHCTRL_GEN_GCLK4_Val &lt;&lt; GCLK_PCHCTRL_GEN_Pos)</span></div>
<div class="line"><a name="l00244"></a><span class="lineno"> 244</span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_GCLK5 (GCLK_PCHCTRL_GEN_GCLK5_Val &lt;&lt; GCLK_PCHCTRL_GEN_Pos)</span></div>
<div class="line"><a name="l00245"></a><span class="lineno"> 245</span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_GCLK6 (GCLK_PCHCTRL_GEN_GCLK6_Val &lt;&lt; GCLK_PCHCTRL_GEN_Pos)</span></div>
<div class="line"><a name="l00246"></a><span class="lineno"> 246</span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_GCLK7 (GCLK_PCHCTRL_GEN_GCLK7_Val &lt;&lt; GCLK_PCHCTRL_GEN_Pos)</span></div>
<div class="line"><a name="l00247"></a><span class="lineno"> 247</span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_GCLK8 (GCLK_PCHCTRL_GEN_GCLK8_Val &lt;&lt; GCLK_PCHCTRL_GEN_Pos)</span></div>
<div class="line"><a name="l00248"></a><span class="lineno"> 248</span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_GCLK9 (GCLK_PCHCTRL_GEN_GCLK9_Val &lt;&lt; GCLK_PCHCTRL_GEN_Pos)</span></div>
<div class="line"><a name="l00249"></a><span class="lineno"> 249</span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_GCLK10 (GCLK_PCHCTRL_GEN_GCLK10_Val &lt;&lt; GCLK_PCHCTRL_GEN_Pos)</span></div>
<div class="line"><a name="l00250"></a><span class="lineno"> 250</span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_GEN_GCLK11 (GCLK_PCHCTRL_GEN_GCLK11_Val &lt;&lt; GCLK_PCHCTRL_GEN_Pos)</span></div>
<div class="line"><a name="l00251"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a1d6fc43d161c655dc5a7d49ef81e006a"> 251</a></span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_CHEN_Pos 6 </span></div>
<div class="line"><a name="l00252"></a><span class="lineno"> 252</span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_CHEN (_U_(0x1) &lt;&lt; GCLK_PCHCTRL_CHEN_Pos)</span></div>
<div class="line"><a name="l00253"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a78453855f35c246cb0b5fc7b300d087b"> 253</a></span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_WRTLOCK_Pos 7 </span></div>
<div class="line"><a name="l00254"></a><span class="lineno"> 254</span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_WRTLOCK (_U_(0x1) &lt;&lt; GCLK_PCHCTRL_WRTLOCK_Pos)</span></div>
<div class="line"><a name="l00255"></a><span class="lineno"><a class="line" href="component_2gclk_8h.html#a5cf0a3adfe1546fea5a9cf4018b2ec84"> 255</a></span>&#160;<span class="preprocessor">#define GCLK_PCHCTRL_MASK _U_(0x000000CF) </span></div>
<div class="line"><a name="l00258"></a><span class="lineno"> 258</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00259"></a><span class="lineno"><a class="line" href="structGclk.html"> 259</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00260"></a><span class="lineno"><a class="line" href="structGclk.html#a7ff698dc8e032c78b1715da0e70770f9"> 260</a></span>&#160; __IO <a class="code" href="unionGCLK__CTRLA__Type.html">GCLK_CTRLA_Type</a> <a class="code" href="structGclk.html#a7ff698dc8e032c78b1715da0e70770f9">CTRLA</a>; </div>
<div class="line"><a name="l00261"></a><span class="lineno"> 261</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved1[0x3];</div>
<div class="line"><a name="l00262"></a><span class="lineno"><a class="line" href="structGclk.html#a53f2ddbc3dabe66f85716b7a63f7dc8e"> 262</a></span>&#160; __I <a class="code" href="unionGCLK__SYNCBUSY__Type.html">GCLK_SYNCBUSY_Type</a> <a class="code" href="structGclk.html#a53f2ddbc3dabe66f85716b7a63f7dc8e">SYNCBUSY</a>; </div>
<div class="line"><a name="l00263"></a><span class="lineno"> 263</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved2[0x18];</div>
<div class="line"><a name="l00264"></a><span class="lineno"><a class="line" href="structGclk.html#a8d033a029cd917715c560c53303f6bf3"> 264</a></span>&#160; __IO <a class="code" href="unionGCLK__GENCTRL__Type.html">GCLK_GENCTRL_Type</a> GENCTRL[12]; </div>
<div class="line"><a name="l00265"></a><span class="lineno"> 265</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved3[0x30];</div>
<div class="line"><a name="l00266"></a><span class="lineno"><a class="line" href="structGclk.html#af63fb00e388a990fb19bb255c06dfd02"> 266</a></span>&#160; __IO <a class="code" href="unionGCLK__PCHCTRL__Type.html">GCLK_PCHCTRL_Type</a> PCHCTRL[48]; </div>
<div class="line"><a name="l00267"></a><span class="lineno"> 267</span>&#160;} <a class="code" href="structGclk.html">Gclk</a>;</div>
<div class="line"><a name="l00268"></a><span class="lineno"> 268</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00269"></a><span class="lineno"> 269</span>&#160; </div>
<div class="line"><a name="l00272"></a><span class="lineno"> 272</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_GCLK_COMPONENT_ */</span><span class="preprocessor"></span></div>
</div><!-- fragment --></div><!-- contents -->
<div class="ttc" id="aunionGCLK__GENCTRL__Type_html_a95549d54d3c09791b9a106d45e9062c7"><div class="ttname"><a href="unionGCLK__GENCTRL__Type.html#a95549d54d3c09791b9a106d45e9062c7">GCLK_GENCTRL_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00162">gclk.h:162</a></div></div>
<div class="ttc" id="aunionGCLK__GENCTRL__Type_html_a78a083801d5776bdd03e8161f75b7901"><div class="ttname"><a href="unionGCLK__GENCTRL__Type.html#a78a083801d5776bdd03e8161f75b7901">GCLK_GENCTRL_Type::GENEN</a></div><div class="ttdeci">uint32_t GENEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00153">gclk.h:153</a></div></div>
<div class="ttc" id="aunionGCLK__SYNCBUSY__Type_html_a21e6af32e2fb9bd117fea760bb9b4bf0"><div class="ttname"><a href="unionGCLK__SYNCBUSY__Type.html#a21e6af32e2fb9bd117fea760bb9b4bf0">GCLK_SYNCBUSY_Type::GENCTRL10</a></div><div class="ttdeci">uint32_t GENCTRL10</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00076">gclk.h:76</a></div></div>
<div class="ttc" id="aunionGCLK__GENCTRL__Type_html_a662983c9fe205f4b50d9016667f5ce8b"><div class="ttname"><a href="unionGCLK__GENCTRL__Type.html#a662983c9fe205f4b50d9016667f5ce8b">GCLK_GENCTRL_Type::DIV</a></div><div class="ttdeci">uint32_t DIV</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00160">gclk.h:160</a></div></div>
<div class="ttc" id="aunionGCLK__PCHCTRL__Type_html_acd72f46c6e390a28828b16730a06704a"><div class="ttname"><a href="unionGCLK__PCHCTRL__Type.html#acd72f46c6e390a28828b16730a06704a">GCLK_PCHCTRL_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00217">gclk.h:217</a></div></div>
<div class="ttc" id="aunionGCLK__GENCTRL__Type_html_a5abb899024db2aeb89d5b61b68e9f925"><div class="ttname"><a href="unionGCLK__GENCTRL__Type.html#a5abb899024db2aeb89d5b61b68e9f925">GCLK_GENCTRL_Type::OOV</a></div><div class="ttdeci">uint32_t OOV</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00155">gclk.h:155</a></div></div>
<div class="ttc" id="aunionGCLK__PCHCTRL__Type_html_a12a3d24ea0927e94e27b50c2c25e56e3"><div class="ttname"><a href="unionGCLK__PCHCTRL__Type.html#a12a3d24ea0927e94e27b50c2c25e56e3">GCLK_PCHCTRL_Type::GEN</a></div><div class="ttdeci">uint32_t GEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00211">gclk.h:211</a></div></div>
<div class="ttc" id="aunionGCLK__PCHCTRL__Type_html_a46f57bec63c52672a774ea486ffb2c41"><div class="ttname"><a href="unionGCLK__PCHCTRL__Type.html#a46f57bec63c52672a774ea486ffb2c41">GCLK_PCHCTRL_Type::WRTLOCK</a></div><div class="ttdeci">uint32_t WRTLOCK</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00214">gclk.h:214</a></div></div>
<div class="ttc" id="aunionGCLK__SYNCBUSY__Type_html_a754cb08a768f7deccaeba2a67bfe07cd"><div class="ttname"><a href="unionGCLK__SYNCBUSY__Type.html#a754cb08a768f7deccaeba2a67bfe07cd">GCLK_SYNCBUSY_Type::GENCTRL0</a></div><div class="ttdeci">uint32_t GENCTRL0</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00066">gclk.h:66</a></div></div>
<div class="ttc" id="aunionGCLK__PCHCTRL__Type_html"><div class="ttname"><a href="unionGCLK__PCHCTRL__Type.html">GCLK_PCHCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00209">gclk.h:209</a></div></div>
<div class="ttc" id="aunionGCLK__SYNCBUSY__Type_html_a04d2e89105cffed19cf038507202f75a"><div class="ttname"><a href="unionGCLK__SYNCBUSY__Type.html#a04d2e89105cffed19cf038507202f75a">GCLK_SYNCBUSY_Type::SWRST</a></div><div class="ttdeci">uint32_t SWRST</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00064">gclk.h:64</a></div></div>
<div class="ttc" id="aunionGCLK__SYNCBUSY__Type_html_aba5cc13acafbdc03f412a4c0e50db17f"><div class="ttname"><a href="unionGCLK__SYNCBUSY__Type.html#aba5cc13acafbdc03f412a4c0e50db17f">GCLK_SYNCBUSY_Type::GENCTRL2</a></div><div class="ttdeci">uint32_t GENCTRL2</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00068">gclk.h:68</a></div></div>
<div class="ttc" id="aunionGCLK__SYNCBUSY__Type_html"><div class="ttname"><a href="unionGCLK__SYNCBUSY__Type.html">GCLK_SYNCBUSY_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00062">gclk.h:62</a></div></div>
<div class="ttc" id="astructGclk_html"><div class="ttname"><a href="structGclk.html">Gclk</a></div><div class="ttdoc">GCLK hardware registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00259">gclk.h:259</a></div></div>
<div class="ttc" id="aunionGCLK__SYNCBUSY__Type_html_ad8715df05d4f9e29e999bea034f92274"><div class="ttname"><a href="unionGCLK__SYNCBUSY__Type.html#ad8715df05d4f9e29e999bea034f92274">GCLK_SYNCBUSY_Type::GENCTRL9</a></div><div class="ttdeci">uint32_t GENCTRL9</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00075">gclk.h:75</a></div></div>
<div class="ttc" id="aunionGCLK__SYNCBUSY__Type_html_a0e74c9fc3ed67672b28818f667d33491"><div class="ttname"><a href="unionGCLK__SYNCBUSY__Type.html#a0e74c9fc3ed67672b28818f667d33491">GCLK_SYNCBUSY_Type::GENCTRL8</a></div><div class="ttdeci">uint32_t GENCTRL8</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00074">gclk.h:74</a></div></div>
<div class="ttc" id="aunionGCLK__SYNCBUSY__Type_html_a5efdd9343ea8347138b65b5654f7a960"><div class="ttname"><a href="unionGCLK__SYNCBUSY__Type.html#a5efdd9343ea8347138b65b5654f7a960">GCLK_SYNCBUSY_Type::GENCTRL4</a></div><div class="ttdeci">uint32_t GENCTRL4</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00070">gclk.h:70</a></div></div>
<div class="ttc" id="aunionGCLK__SYNCBUSY__Type_html_a6f8cbf01eca5b20eea9fe55ba83db3cf"><div class="ttname"><a href="unionGCLK__SYNCBUSY__Type.html#a6f8cbf01eca5b20eea9fe55ba83db3cf">GCLK_SYNCBUSY_Type::GENCTRL5</a></div><div class="ttdeci">uint32_t GENCTRL5</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00071">gclk.h:71</a></div></div>
<div class="ttc" id="aunionGCLK__GENCTRL__Type_html_a4cc3e1807e181d5708882ef2f1d95377"><div class="ttname"><a href="unionGCLK__GENCTRL__Type.html#a4cc3e1807e181d5708882ef2f1d95377">GCLK_GENCTRL_Type::IDC</a></div><div class="ttdeci">uint32_t IDC</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00154">gclk.h:154</a></div></div>
<div class="ttc" id="astructGclk_html_a53f2ddbc3dabe66f85716b7a63f7dc8e"><div class="ttname"><a href="structGclk.html#a53f2ddbc3dabe66f85716b7a63f7dc8e">Gclk::SYNCBUSY</a></div><div class="ttdeci">__I GCLK_SYNCBUSY_Type SYNCBUSY</div><div class="ttdoc">Offset: 0x04 (R/ 32) Synchronization Busy.</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00262">gclk.h:262</a></div></div>
<div class="ttc" id="aunionGCLK__CTRLA__Type_html_ad71bd3dd0c76e96af110af4c482566b9"><div class="ttname"><a href="unionGCLK__CTRLA__Type.html#ad71bd3dd0c76e96af110af4c482566b9">GCLK_CTRLA_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00049">gclk.h:49</a></div></div>
<div class="ttc" id="astructGclk_html_a7ff698dc8e032c78b1715da0e70770f9"><div class="ttname"><a href="structGclk.html#a7ff698dc8e032c78b1715da0e70770f9">Gclk::CTRLA</a></div><div class="ttdeci">__IO GCLK_CTRLA_Type CTRLA</div><div class="ttdoc">Offset: 0x00 (R/W 8) Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00260">gclk.h:260</a></div></div>
<div class="ttc" id="aunionGCLK__GENCTRL__Type_html_ae9aa8d19be60496d708be9eba805d08e"><div class="ttname"><a href="unionGCLK__GENCTRL__Type.html#ae9aa8d19be60496d708be9eba805d08e">GCLK_GENCTRL_Type::DIVSEL</a></div><div class="ttdeci">uint32_t DIVSEL</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00157">gclk.h:157</a></div></div>
<div class="ttc" id="aunionGCLK__PCHCTRL__Type_html_a6fac8b64b38f31f6add10b97fc9a17f8"><div class="ttname"><a href="unionGCLK__PCHCTRL__Type.html#a6fac8b64b38f31f6add10b97fc9a17f8">GCLK_PCHCTRL_Type::CHEN</a></div><div class="ttdeci">uint32_t CHEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00213">gclk.h:213</a></div></div>
<div class="ttc" id="aunionGCLK__SYNCBUSY__Type_html_a674950d9dcd05e56a4dbbd68b66e8a96"><div class="ttname"><a href="unionGCLK__SYNCBUSY__Type.html#a674950d9dcd05e56a4dbbd68b66e8a96">GCLK_SYNCBUSY_Type::GENCTRL7</a></div><div class="ttdeci">uint32_t GENCTRL7</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00073">gclk.h:73</a></div></div>
<div class="ttc" id="aunionGCLK__CTRLA__Type_html_aba2c89dc21eeaceda72f5a34d53ea855"><div class="ttname"><a href="unionGCLK__CTRLA__Type.html#aba2c89dc21eeaceda72f5a34d53ea855">GCLK_CTRLA_Type::SWRST</a></div><div class="ttdeci">uint8_t SWRST</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00046">gclk.h:46</a></div></div>
<div class="ttc" id="aunionGCLK__GENCTRL__Type_html"><div class="ttname"><a href="unionGCLK__GENCTRL__Type.html">GCLK_GENCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00149">gclk.h:149</a></div></div>
<div class="ttc" id="aunionGCLK__SYNCBUSY__Type_html_a9c21536f04989cf68246eb5c7d35a1b4"><div class="ttname"><a href="unionGCLK__SYNCBUSY__Type.html#a9c21536f04989cf68246eb5c7d35a1b4">GCLK_SYNCBUSY_Type::GENCTRL1</a></div><div class="ttdeci">uint32_t GENCTRL1</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00067">gclk.h:67</a></div></div>
<div class="ttc" id="aunionGCLK__SYNCBUSY__Type_html_a5cbe1d70575ee20618758b31b3dd0b64"><div class="ttname"><a href="unionGCLK__SYNCBUSY__Type.html#a5cbe1d70575ee20618758b31b3dd0b64">GCLK_SYNCBUSY_Type::GENCTRL3</a></div><div class="ttdeci">uint32_t GENCTRL3</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00069">gclk.h:69</a></div></div>
<div class="ttc" id="aunionGCLK__GENCTRL__Type_html_a6fd55e0d3633d0f587579b80c3a64931"><div class="ttname"><a href="unionGCLK__GENCTRL__Type.html#a6fd55e0d3633d0f587579b80c3a64931">GCLK_GENCTRL_Type::OE</a></div><div class="ttdeci">uint32_t OE</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00156">gclk.h:156</a></div></div>
<div class="ttc" id="aunionGCLK__CTRLA__Type_html"><div class="ttname"><a href="unionGCLK__CTRLA__Type.html">GCLK_CTRLA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00044">gclk.h:44</a></div></div>
<div class="ttc" id="aunionGCLK__GENCTRL__Type_html_abea54c6dbd65d743abd94cb96e811ecd"><div class="ttname"><a href="unionGCLK__GENCTRL__Type.html#abea54c6dbd65d743abd94cb96e811ecd">GCLK_GENCTRL_Type::SRC</a></div><div class="ttdeci">uint32_t SRC</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00151">gclk.h:151</a></div></div>
<div class="ttc" id="aunionGCLK__SYNCBUSY__Type_html_a3990e61fd4cd55e6d24987a559535937"><div class="ttname"><a href="unionGCLK__SYNCBUSY__Type.html#a3990e61fd4cd55e6d24987a559535937">GCLK_SYNCBUSY_Type::GENCTRL6</a></div><div class="ttdeci">uint32_t GENCTRL6</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00072">gclk.h:72</a></div></div>
<div class="ttc" id="asame54n19a_8h_html_a0d957f1433aaf5d70e4dc2b68288442d"><div class="ttname"><a href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a></div><div class="ttdeci">volatile const uint8_t RoReg8</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00053">same54n19a.h:53</a></div></div>
<div class="ttc" id="aunionGCLK__SYNCBUSY__Type_html_abe21599a55adad60be586efdd1cc3118"><div class="ttname"><a href="unionGCLK__SYNCBUSY__Type.html#abe21599a55adad60be586efdd1cc3118">GCLK_SYNCBUSY_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00085">gclk.h:85</a></div></div>
<div class="ttc" id="aunionGCLK__SYNCBUSY__Type_html_a3e39602d949b20e6b25867a586941f55"><div class="ttname"><a href="unionGCLK__SYNCBUSY__Type.html#a3e39602d949b20e6b25867a586941f55">GCLK_SYNCBUSY_Type::GENCTRL</a></div><div class="ttdeci">uint32_t GENCTRL</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00082">gclk.h:82</a></div></div>
<div class="ttc" id="aunionGCLK__SYNCBUSY__Type_html_a7b394d2a9dd2426cab1c030d95d31fff"><div class="ttname"><a href="unionGCLK__SYNCBUSY__Type.html#a7b394d2a9dd2426cab1c030d95d31fff">GCLK_SYNCBUSY_Type::GENCTRL11</a></div><div class="ttdeci">uint32_t GENCTRL11</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00077">gclk.h:77</a></div></div>
<div class="ttc" id="aunionGCLK__GENCTRL__Type_html_a12451b6b3f8bd0ef8b95fe867b2289d6"><div class="ttname"><a href="unionGCLK__GENCTRL__Type.html#a12451b6b3f8bd0ef8b95fe867b2289d6">GCLK_GENCTRL_Type::RUNSTDBY</a></div><div class="ttdeci">uint32_t RUNSTDBY</div><div class="ttdef"><b>Definition:</b> <a href="component_2gclk_8h_source.html#l00158">gclk.h:158</a></div></div>
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<a href="component_2i2s_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_I2S_COMPONENT_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_I2S_COMPONENT_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160; </div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define I2S_U2224</span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define REV_I2S 0x200</span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160; </div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="comment">/* -------- I2S_CTRLA : (I2S Offset: 0x00) (R/W 8) Control A -------- */</span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00044"></a><span class="lineno"><a class="line" href="unionI2S__CTRLA__Type.html"> 44</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00046"></a><span class="lineno"><a class="line" href="unionI2S__CTRLA__Type.html#ac081cc89cca4299372fc54ee0eeaea64"> 46</a></span>&#160; uint8_t <a class="code" href="unionI2S__CTRLA__Type.html#ac081cc89cca4299372fc54ee0eeaea64">SWRST</a>:1; </div>
<div class="line"><a name="l00047"></a><span class="lineno"><a class="line" href="unionI2S__CTRLA__Type.html#ab2eaa9eee907547a9e08b9737617db3f"> 47</a></span>&#160; uint8_t <a class="code" href="unionI2S__CTRLA__Type.html#ab2eaa9eee907547a9e08b9737617db3f">ENABLE</a>:1; </div>
<div class="line"><a name="l00048"></a><span class="lineno"><a class="line" href="unionI2S__CTRLA__Type.html#af1ebea5a94d9e2841905ce3a304ffe6d"> 48</a></span>&#160; uint8_t <a class="code" href="unionI2S__CTRLA__Type.html#af1ebea5a94d9e2841905ce3a304ffe6d">CKEN0</a>:1; </div>
<div class="line"><a name="l00049"></a><span class="lineno"><a class="line" href="unionI2S__CTRLA__Type.html#a87da7f05bba65eefbbf0d81af73dd580"> 49</a></span>&#160; uint8_t <a class="code" href="unionI2S__CTRLA__Type.html#a87da7f05bba65eefbbf0d81af73dd580">CKEN1</a>:1; </div>
<div class="line"><a name="l00050"></a><span class="lineno"><a class="line" href="unionI2S__CTRLA__Type.html#a20ac56dbe8e37a4047f04046160ba61e"> 50</a></span>&#160; uint8_t <a class="code" href="unionI2S__CTRLA__Type.html#a20ac56dbe8e37a4047f04046160ba61e">TXEN</a>:1; </div>
<div class="line"><a name="l00051"></a><span class="lineno"><a class="line" href="unionI2S__CTRLA__Type.html#a01893f79e0a151a84b9168f4119eb99b"> 51</a></span>&#160; uint8_t <a class="code" href="unionI2S__CTRLA__Type.html#a01893f79e0a151a84b9168f4119eb99b">RXEN</a>:1; </div>
<div class="line"><a name="l00052"></a><span class="lineno"><a class="line" href="unionI2S__CTRLA__Type.html#aafc0a9d50efd6c68ba907294be446a38"> 52</a></span>&#160; uint8_t :2; </div>
<div class="line"><a name="l00053"></a><span class="lineno"><a class="line" href="unionI2S__CTRLA__Type.html#a6e8db9434c3120d8208e0be38b448944"> 53</a></span>&#160; } bit; </div>
<div class="line"><a name="l00054"></a><span class="lineno"> 54</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00055"></a><span class="lineno"> 55</span>&#160; uint8_t :2; </div>
<div class="line"><a name="l00056"></a><span class="lineno"><a class="line" href="unionI2S__CTRLA__Type.html#a5943cd66954758cb7e6af9e60021c19d"> 56</a></span>&#160; uint8_t <a class="code" href="unionI2S__CTRLA__Type.html#a5943cd66954758cb7e6af9e60021c19d">CKEN</a>:2; </div>
<div class="line"><a name="l00057"></a><span class="lineno"><a class="line" href="unionI2S__CTRLA__Type.html#a2ff634f2ff906d65742da73fd55951ff"> 57</a></span>&#160; uint8_t :4; </div>
<div class="line"><a name="l00058"></a><span class="lineno"><a class="line" href="unionI2S__CTRLA__Type.html#aebec36ed30d4f668111bb1125a6dbfaf"> 58</a></span>&#160; } vec; </div>
<div class="line"><a name="l00059"></a><span class="lineno"><a class="line" href="unionI2S__CTRLA__Type.html#a5bf3db80d886c48735bfe1a37f1b3e0b"> 59</a></span>&#160; uint8_t <a class="code" href="unionI2S__CTRLA__Type.html#a5bf3db80d886c48735bfe1a37f1b3e0b">reg</a>; </div>
<div class="line"><a name="l00060"></a><span class="lineno"> 60</span>&#160;} <a class="code" href="unionI2S__CTRLA__Type.html">I2S_CTRLA_Type</a>;</div>
<div class="line"><a name="l00061"></a><span class="lineno"> 61</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00062"></a><span class="lineno"> 62</span>&#160; </div>
<div class="line"><a name="l00063"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a6d620cfa3bc2af7bdbbbae9252f5b567"> 63</a></span>&#160;<span class="preprocessor">#define I2S_CTRLA_OFFSET 0x00 </span></div>
<div class="line"><a name="l00064"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#ac55724eab173039ae6acf553ed92c693"> 64</a></span>&#160;<span class="preprocessor">#define I2S_CTRLA_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00066"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a397b6ac745baf60099bd267adf4143a8"> 66</a></span>&#160;<span class="preprocessor">#define I2S_CTRLA_SWRST_Pos 0 </span></div>
<div class="line"><a name="l00067"></a><span class="lineno"> 67</span>&#160;<span class="preprocessor">#define I2S_CTRLA_SWRST (_U_(0x1) &lt;&lt; I2S_CTRLA_SWRST_Pos)</span></div>
<div class="line"><a name="l00068"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a3eca624a3bbc9c500de9624a3c816399"> 68</a></span>&#160;<span class="preprocessor">#define I2S_CTRLA_ENABLE_Pos 1 </span></div>
<div class="line"><a name="l00069"></a><span class="lineno"> 69</span>&#160;<span class="preprocessor">#define I2S_CTRLA_ENABLE (_U_(0x1) &lt;&lt; I2S_CTRLA_ENABLE_Pos)</span></div>
<div class="line"><a name="l00070"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a7d77c4b6486ab5045b81fc091b9e338d"> 70</a></span>&#160;<span class="preprocessor">#define I2S_CTRLA_CKEN0_Pos 2 </span></div>
<div class="line"><a name="l00071"></a><span class="lineno"> 71</span>&#160;<span class="preprocessor">#define I2S_CTRLA_CKEN0 (_U_(1) &lt;&lt; I2S_CTRLA_CKEN0_Pos)</span></div>
<div class="line"><a name="l00072"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a8e21e63a40f88a9e5ec0542ff8df23c0"> 72</a></span>&#160;<span class="preprocessor">#define I2S_CTRLA_CKEN1_Pos 3 </span></div>
<div class="line"><a name="l00073"></a><span class="lineno"> 73</span>&#160;<span class="preprocessor">#define I2S_CTRLA_CKEN1 (_U_(1) &lt;&lt; I2S_CTRLA_CKEN1_Pos)</span></div>
<div class="line"><a name="l00074"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a8c61333786563ab2ed03bfb976fc4e74"> 74</a></span>&#160;<span class="preprocessor">#define I2S_CTRLA_CKEN_Pos 2 </span></div>
<div class="line"><a name="l00075"></a><span class="lineno"> 75</span>&#160;<span class="preprocessor">#define I2S_CTRLA_CKEN_Msk (_U_(0x3) &lt;&lt; I2S_CTRLA_CKEN_Pos)</span></div>
<div class="line"><a name="l00076"></a><span class="lineno"> 76</span>&#160;<span class="preprocessor">#define I2S_CTRLA_CKEN(value) (I2S_CTRLA_CKEN_Msk &amp; ((value) &lt;&lt; I2S_CTRLA_CKEN_Pos))</span></div>
<div class="line"><a name="l00077"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a501e61ab1ba7bb3b2bac7373ff80bd5e"> 77</a></span>&#160;<span class="preprocessor">#define I2S_CTRLA_TXEN_Pos 4 </span></div>
<div class="line"><a name="l00078"></a><span class="lineno"> 78</span>&#160;<span class="preprocessor">#define I2S_CTRLA_TXEN (_U_(0x1) &lt;&lt; I2S_CTRLA_TXEN_Pos)</span></div>
<div class="line"><a name="l00079"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a06fcfeab9e39e7492298e3a4a3e58950"> 79</a></span>&#160;<span class="preprocessor">#define I2S_CTRLA_RXEN_Pos 5 </span></div>
<div class="line"><a name="l00080"></a><span class="lineno"> 80</span>&#160;<span class="preprocessor">#define I2S_CTRLA_RXEN (_U_(0x1) &lt;&lt; I2S_CTRLA_RXEN_Pos)</span></div>
<div class="line"><a name="l00081"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a89739cb190180a69697f3ece0470b780"> 81</a></span>&#160;<span class="preprocessor">#define I2S_CTRLA_MASK _U_(0x3F) </span></div>
<div class="line"><a name="l00083"></a><span class="lineno"> 83</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- I2S_CLKCTRL : (I2S Offset: 0x04) (R/W 32) Clock Unit n Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00084"></a><span class="lineno"> 84</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00085"></a><span class="lineno"><a class="line" href="unionI2S__CLKCTRL__Type.html"> 85</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00086"></a><span class="lineno"> 86</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00087"></a><span class="lineno"><a class="line" href="unionI2S__CLKCTRL__Type.html#aff647fe406d5d3f646521078cb1ca0c8"> 87</a></span>&#160; uint32_t <a class="code" href="unionI2S__CLKCTRL__Type.html#aff647fe406d5d3f646521078cb1ca0c8">SLOTSIZE</a>:2; </div>
<div class="line"><a name="l00088"></a><span class="lineno"><a class="line" href="unionI2S__CLKCTRL__Type.html#ae0115c3a7792d5cdf7892a74faef5a5c"> 88</a></span>&#160; uint32_t <a class="code" href="unionI2S__CLKCTRL__Type.html#ae0115c3a7792d5cdf7892a74faef5a5c">NBSLOTS</a>:3; </div>
<div class="line"><a name="l00089"></a><span class="lineno"><a class="line" href="unionI2S__CLKCTRL__Type.html#a96299dcf9cdc5a33532e5b563efa7fee"> 89</a></span>&#160; uint32_t <a class="code" href="unionI2S__CLKCTRL__Type.html#a96299dcf9cdc5a33532e5b563efa7fee">FSWIDTH</a>:2; </div>
<div class="line"><a name="l00090"></a><span class="lineno"><a class="line" href="unionI2S__CLKCTRL__Type.html#ac80f2360b7e43db320efc422beb2055c"> 90</a></span>&#160; uint32_t <a class="code" href="unionI2S__CLKCTRL__Type.html#ac80f2360b7e43db320efc422beb2055c">BITDELAY</a>:1; </div>
<div class="line"><a name="l00091"></a><span class="lineno"><a class="line" href="unionI2S__CLKCTRL__Type.html#a6626d69f2946b570a1bd9a4f1f0a323a"> 91</a></span>&#160; uint32_t <a class="code" href="unionI2S__CLKCTRL__Type.html#a6626d69f2946b570a1bd9a4f1f0a323a">FSSEL</a>:1; </div>
<div class="line"><a name="l00092"></a><span class="lineno"><a class="line" href="unionI2S__CLKCTRL__Type.html#ad41b7dc3a089283f15238eed06bc09df"> 92</a></span>&#160; uint32_t <a class="code" href="unionI2S__CLKCTRL__Type.html#ad41b7dc3a089283f15238eed06bc09df">FSINV</a>:1; </div>
<div class="line"><a name="l00093"></a><span class="lineno"><a class="line" href="unionI2S__CLKCTRL__Type.html#af8c30cbb790c3c8b4ffcb7d089083ca6"> 93</a></span>&#160; uint32_t <a class="code" href="unionI2S__CLKCTRL__Type.html#af8c30cbb790c3c8b4ffcb7d089083ca6">FSOUTINV</a>:1; </div>
<div class="line"><a name="l00094"></a><span class="lineno"><a class="line" href="unionI2S__CLKCTRL__Type.html#a9bafb4f315f303d252b54cc3ad2be8cf"> 94</a></span>&#160; uint32_t <a class="code" href="unionI2S__CLKCTRL__Type.html#a9bafb4f315f303d252b54cc3ad2be8cf">SCKSEL</a>:1; </div>
<div class="line"><a name="l00095"></a><span class="lineno"><a class="line" href="unionI2S__CLKCTRL__Type.html#a596aa4c1f1b5ea883d18f21c2730613e"> 95</a></span>&#160; uint32_t <a class="code" href="unionI2S__CLKCTRL__Type.html#a596aa4c1f1b5ea883d18f21c2730613e">SCKOUTINV</a>:1; </div>
<div class="line"><a name="l00096"></a><span class="lineno"><a class="line" href="unionI2S__CLKCTRL__Type.html#a9bad3367378b1be0a091b020a97cdb90"> 96</a></span>&#160; uint32_t <a class="code" href="unionI2S__CLKCTRL__Type.html#a9bad3367378b1be0a091b020a97cdb90">MCKSEL</a>:1; </div>
<div class="line"><a name="l00097"></a><span class="lineno"><a class="line" href="unionI2S__CLKCTRL__Type.html#a1d649efc7bf50df4a086a3f50f6f9622"> 97</a></span>&#160; uint32_t <a class="code" href="unionI2S__CLKCTRL__Type.html#a1d649efc7bf50df4a086a3f50f6f9622">MCKEN</a>:1; </div>
<div class="line"><a name="l00098"></a><span class="lineno"><a class="line" href="unionI2S__CLKCTRL__Type.html#a36287a0c836b016a982812315d96efb1"> 98</a></span>&#160; uint32_t <a class="code" href="unionI2S__CLKCTRL__Type.html#a36287a0c836b016a982812315d96efb1">MCKOUTINV</a>:1; </div>
<div class="line"><a name="l00099"></a><span class="lineno"><a class="line" href="unionI2S__CLKCTRL__Type.html#a8554d0ed509ed66ffd0805b4e6fef8ec"> 99</a></span>&#160; uint32_t <a class="code" href="unionI2S__CLKCTRL__Type.html#a8554d0ed509ed66ffd0805b4e6fef8ec">MCKDIV</a>:6; </div>
<div class="line"><a name="l00100"></a><span class="lineno"><a class="line" href="unionI2S__CLKCTRL__Type.html#a84cbe78646c851df1c7b36cd95d33625"> 100</a></span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00101"></a><span class="lineno"><a class="line" href="unionI2S__CLKCTRL__Type.html#a39a27f504a2d3fccb6c99256ed503bad"> 101</a></span>&#160; uint32_t <a class="code" href="unionI2S__CLKCTRL__Type.html#a39a27f504a2d3fccb6c99256ed503bad">MCKOUTDIV</a>:6; </div>
<div class="line"><a name="l00102"></a><span class="lineno"><a class="line" href="unionI2S__CLKCTRL__Type.html#a3053c325604a176a0c15f6d5b3323cac"> 102</a></span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00103"></a><span class="lineno"><a class="line" href="unionI2S__CLKCTRL__Type.html#a97dca9e614b941dda891b9a9c3013cac"> 103</a></span>&#160; } bit; </div>
<div class="line"><a name="l00104"></a><span class="lineno"><a class="line" href="unionI2S__CLKCTRL__Type.html#ae3fe810b6e2a2c65df59d1f8ca519f0d"> 104</a></span>&#160; uint32_t <a class="code" href="unionI2S__CLKCTRL__Type.html#ae3fe810b6e2a2c65df59d1f8ca519f0d">reg</a>; </div>
<div class="line"><a name="l00105"></a><span class="lineno"> 105</span>&#160;} <a class="code" href="unionI2S__CLKCTRL__Type.html">I2S_CLKCTRL_Type</a>;</div>
<div class="line"><a name="l00106"></a><span class="lineno"> 106</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00107"></a><span class="lineno"> 107</span>&#160; </div>
<div class="line"><a name="l00108"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#ac9120317bb8722d15b6abd2964cc6b66"> 108</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_OFFSET 0x04 </span></div>
<div class="line"><a name="l00109"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a34cc8d707a5387d2ff9232ba0b30f95e"> 109</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00111"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a3790543c148a2adda023e411fd6595ad"> 111</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_SLOTSIZE_Pos 0 </span></div>
<div class="line"><a name="l00112"></a><span class="lineno"> 112</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_SLOTSIZE_Msk (_U_(0x3) &lt;&lt; I2S_CLKCTRL_SLOTSIZE_Pos)</span></div>
<div class="line"><a name="l00113"></a><span class="lineno"> 113</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_SLOTSIZE(value) (I2S_CLKCTRL_SLOTSIZE_Msk &amp; ((value) &lt;&lt; I2S_CLKCTRL_SLOTSIZE_Pos))</span></div>
<div class="line"><a name="l00114"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a8bdf35936a6d3d62de0c94cde31b1c94"> 114</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_SLOTSIZE_8_Val _U_(0x0) </span></div>
<div class="line"><a name="l00115"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a4caa59c4008c74b3ee0a8be8dd02183b"> 115</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_SLOTSIZE_16_Val _U_(0x1) </span></div>
<div class="line"><a name="l00116"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#abbc9d2ad05bbc8e24cdc97dcc5ffdd04"> 116</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_SLOTSIZE_24_Val _U_(0x2) </span></div>
<div class="line"><a name="l00117"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#aaee0ee592d4468e2abf681def2ad82b7"> 117</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_SLOTSIZE_32_Val _U_(0x3) </span></div>
<div class="line"><a name="l00118"></a><span class="lineno"> 118</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_SLOTSIZE_8 (I2S_CLKCTRL_SLOTSIZE_8_Val &lt;&lt; I2S_CLKCTRL_SLOTSIZE_Pos)</span></div>
<div class="line"><a name="l00119"></a><span class="lineno"> 119</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_SLOTSIZE_16 (I2S_CLKCTRL_SLOTSIZE_16_Val &lt;&lt; I2S_CLKCTRL_SLOTSIZE_Pos)</span></div>
<div class="line"><a name="l00120"></a><span class="lineno"> 120</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_SLOTSIZE_24 (I2S_CLKCTRL_SLOTSIZE_24_Val &lt;&lt; I2S_CLKCTRL_SLOTSIZE_Pos)</span></div>
<div class="line"><a name="l00121"></a><span class="lineno"> 121</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_SLOTSIZE_32 (I2S_CLKCTRL_SLOTSIZE_32_Val &lt;&lt; I2S_CLKCTRL_SLOTSIZE_Pos)</span></div>
<div class="line"><a name="l00122"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#ae01bc499f135be63219ee2c6444c05b3"> 122</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_NBSLOTS_Pos 2 </span></div>
<div class="line"><a name="l00123"></a><span class="lineno"> 123</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_NBSLOTS_Msk (_U_(0x7) &lt;&lt; I2S_CLKCTRL_NBSLOTS_Pos)</span></div>
<div class="line"><a name="l00124"></a><span class="lineno"> 124</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_NBSLOTS(value) (I2S_CLKCTRL_NBSLOTS_Msk &amp; ((value) &lt;&lt; I2S_CLKCTRL_NBSLOTS_Pos))</span></div>
<div class="line"><a name="l00125"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a68fd7a78e998d738a74bf6a56a47a082"> 125</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_FSWIDTH_Pos 5 </span></div>
<div class="line"><a name="l00126"></a><span class="lineno"> 126</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_FSWIDTH_Msk (_U_(0x3) &lt;&lt; I2S_CLKCTRL_FSWIDTH_Pos)</span></div>
<div class="line"><a name="l00127"></a><span class="lineno"> 127</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_FSWIDTH(value) (I2S_CLKCTRL_FSWIDTH_Msk &amp; ((value) &lt;&lt; I2S_CLKCTRL_FSWIDTH_Pos))</span></div>
<div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a95aeb939939817f4a06c2b7fad0baf11"> 128</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_FSWIDTH_SLOT_Val _U_(0x0) </span></div>
<div class="line"><a name="l00129"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a74f044f2df267ca85a29fea55b94cd7b"> 129</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_FSWIDTH_HALF_Val _U_(0x1) </span></div>
<div class="line"><a name="l00130"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a8e586922105865e834930dfc922c1671"> 130</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_FSWIDTH_BIT_Val _U_(0x2) </span></div>
<div class="line"><a name="l00131"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#ad8a9cb5d05e25833a45f099860ac162e"> 131</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_FSWIDTH_BURST_Val _U_(0x3) </span></div>
<div class="line"><a name="l00132"></a><span class="lineno"> 132</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_FSWIDTH_SLOT (I2S_CLKCTRL_FSWIDTH_SLOT_Val &lt;&lt; I2S_CLKCTRL_FSWIDTH_Pos)</span></div>
<div class="line"><a name="l00133"></a><span class="lineno"> 133</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_FSWIDTH_HALF (I2S_CLKCTRL_FSWIDTH_HALF_Val &lt;&lt; I2S_CLKCTRL_FSWIDTH_Pos)</span></div>
<div class="line"><a name="l00134"></a><span class="lineno"> 134</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_FSWIDTH_BIT (I2S_CLKCTRL_FSWIDTH_BIT_Val &lt;&lt; I2S_CLKCTRL_FSWIDTH_Pos)</span></div>
<div class="line"><a name="l00135"></a><span class="lineno"> 135</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_FSWIDTH_BURST (I2S_CLKCTRL_FSWIDTH_BURST_Val &lt;&lt; I2S_CLKCTRL_FSWIDTH_Pos)</span></div>
<div class="line"><a name="l00136"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a49490bb9926136b0a51f72cf1cb06d0b"> 136</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_BITDELAY_Pos 7 </span></div>
<div class="line"><a name="l00137"></a><span class="lineno"> 137</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_BITDELAY (_U_(0x1) &lt;&lt; I2S_CLKCTRL_BITDELAY_Pos)</span></div>
<div class="line"><a name="l00138"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a8f7fa76cbdfa92a9d34cb21798f42e05"> 138</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_BITDELAY_LJ_Val _U_(0x0) </span></div>
<div class="line"><a name="l00139"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#afcd06500145915a75264200ecd94b82c"> 139</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_BITDELAY_I2S_Val _U_(0x1) </span></div>
<div class="line"><a name="l00140"></a><span class="lineno"> 140</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_BITDELAY_LJ (I2S_CLKCTRL_BITDELAY_LJ_Val &lt;&lt; I2S_CLKCTRL_BITDELAY_Pos)</span></div>
<div class="line"><a name="l00141"></a><span class="lineno"> 141</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_BITDELAY_I2S (I2S_CLKCTRL_BITDELAY_I2S_Val &lt;&lt; I2S_CLKCTRL_BITDELAY_Pos)</span></div>
<div class="line"><a name="l00142"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#aa51b72506368a9cf76123c0309c2058f"> 142</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_FSSEL_Pos 8 </span></div>
<div class="line"><a name="l00143"></a><span class="lineno"> 143</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_FSSEL (_U_(0x1) &lt;&lt; I2S_CLKCTRL_FSSEL_Pos)</span></div>
<div class="line"><a name="l00144"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a39d58817b2ebcbad9625f2b5aeadc335"> 144</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_FSSEL_SCKDIV_Val _U_(0x0) </span></div>
<div class="line"><a name="l00145"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a705fcc1a6a527511c4840dddc95a2008"> 145</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_FSSEL_FSPIN_Val _U_(0x1) </span></div>
<div class="line"><a name="l00146"></a><span class="lineno"> 146</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_FSSEL_SCKDIV (I2S_CLKCTRL_FSSEL_SCKDIV_Val &lt;&lt; I2S_CLKCTRL_FSSEL_Pos)</span></div>
<div class="line"><a name="l00147"></a><span class="lineno"> 147</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_FSSEL_FSPIN (I2S_CLKCTRL_FSSEL_FSPIN_Val &lt;&lt; I2S_CLKCTRL_FSSEL_Pos)</span></div>
<div class="line"><a name="l00148"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a29373d39bfacc2e611c7529033904695"> 148</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_FSINV_Pos 9 </span></div>
<div class="line"><a name="l00149"></a><span class="lineno"> 149</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_FSINV (_U_(0x1) &lt;&lt; I2S_CLKCTRL_FSINV_Pos)</span></div>
<div class="line"><a name="l00150"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#acaf6b659b41ebeb68a953853623fe32f"> 150</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_FSOUTINV_Pos 10 </span></div>
<div class="line"><a name="l00151"></a><span class="lineno"> 151</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_FSOUTINV (_U_(0x1) &lt;&lt; I2S_CLKCTRL_FSOUTINV_Pos)</span></div>
<div class="line"><a name="l00152"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a51d7bf9feb1a438c178c07077a84d6ec"> 152</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_SCKSEL_Pos 11 </span></div>
<div class="line"><a name="l00153"></a><span class="lineno"> 153</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_SCKSEL (_U_(0x1) &lt;&lt; I2S_CLKCTRL_SCKSEL_Pos)</span></div>
<div class="line"><a name="l00154"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a4fcee5b58df1d5d62935da463555752d"> 154</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_SCKSEL_MCKDIV_Val _U_(0x0) </span></div>
<div class="line"><a name="l00155"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#af4b508014f15cb047bddbb681228668f"> 155</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_SCKSEL_SCKPIN_Val _U_(0x1) </span></div>
<div class="line"><a name="l00156"></a><span class="lineno"> 156</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_SCKSEL_MCKDIV (I2S_CLKCTRL_SCKSEL_MCKDIV_Val &lt;&lt; I2S_CLKCTRL_SCKSEL_Pos)</span></div>
<div class="line"><a name="l00157"></a><span class="lineno"> 157</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_SCKSEL_SCKPIN (I2S_CLKCTRL_SCKSEL_SCKPIN_Val &lt;&lt; I2S_CLKCTRL_SCKSEL_Pos)</span></div>
<div class="line"><a name="l00158"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a74c1d5849cebe8fb0e16e16251e8f60d"> 158</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_SCKOUTINV_Pos 12 </span></div>
<div class="line"><a name="l00159"></a><span class="lineno"> 159</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_SCKOUTINV (_U_(0x1) &lt;&lt; I2S_CLKCTRL_SCKOUTINV_Pos)</span></div>
<div class="line"><a name="l00160"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a4767c420ba0c4a22f2cfd89f1bd64533"> 160</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_MCKSEL_Pos 13 </span></div>
<div class="line"><a name="l00161"></a><span class="lineno"> 161</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_MCKSEL (_U_(0x1) &lt;&lt; I2S_CLKCTRL_MCKSEL_Pos)</span></div>
<div class="line"><a name="l00162"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#ad99be42bcb1d8ee04c4f99b4e64612cd"> 162</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_MCKSEL_GCLK_Val _U_(0x0) </span></div>
<div class="line"><a name="l00163"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a628c7be58d58c99048e2c6fe700924ff"> 163</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_MCKSEL_MCKPIN_Val _U_(0x1) </span></div>
<div class="line"><a name="l00164"></a><span class="lineno"> 164</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_MCKSEL_GCLK (I2S_CLKCTRL_MCKSEL_GCLK_Val &lt;&lt; I2S_CLKCTRL_MCKSEL_Pos)</span></div>
<div class="line"><a name="l00165"></a><span class="lineno"> 165</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_MCKSEL_MCKPIN (I2S_CLKCTRL_MCKSEL_MCKPIN_Val &lt;&lt; I2S_CLKCTRL_MCKSEL_Pos)</span></div>
<div class="line"><a name="l00166"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#aacb10d0c0efa62757e4ad2835e34b7ea"> 166</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_MCKEN_Pos 14 </span></div>
<div class="line"><a name="l00167"></a><span class="lineno"> 167</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_MCKEN (_U_(0x1) &lt;&lt; I2S_CLKCTRL_MCKEN_Pos)</span></div>
<div class="line"><a name="l00168"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a4fc0a23600a4d7c260a70a0e72aefb3e"> 168</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_MCKOUTINV_Pos 15 </span></div>
<div class="line"><a name="l00169"></a><span class="lineno"> 169</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_MCKOUTINV (_U_(0x1) &lt;&lt; I2S_CLKCTRL_MCKOUTINV_Pos)</span></div>
<div class="line"><a name="l00170"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#ad3726a482440530335068151b6dc027d"> 170</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_MCKDIV_Pos 16 </span></div>
<div class="line"><a name="l00171"></a><span class="lineno"> 171</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_MCKDIV_Msk (_U_(0x3F) &lt;&lt; I2S_CLKCTRL_MCKDIV_Pos)</span></div>
<div class="line"><a name="l00172"></a><span class="lineno"> 172</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_MCKDIV(value) (I2S_CLKCTRL_MCKDIV_Msk &amp; ((value) &lt;&lt; I2S_CLKCTRL_MCKDIV_Pos))</span></div>
<div class="line"><a name="l00173"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#afebe81d51492d496f010c589066b6480"> 173</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_MCKOUTDIV_Pos 24 </span></div>
<div class="line"><a name="l00174"></a><span class="lineno"> 174</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_MCKOUTDIV_Msk (_U_(0x3F) &lt;&lt; I2S_CLKCTRL_MCKOUTDIV_Pos)</span></div>
<div class="line"><a name="l00175"></a><span class="lineno"> 175</span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_MCKOUTDIV(value) (I2S_CLKCTRL_MCKOUTDIV_Msk &amp; ((value) &lt;&lt; I2S_CLKCTRL_MCKOUTDIV_Pos))</span></div>
<div class="line"><a name="l00176"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a8226b438dcf86a1ccb34b1a34ee20851"> 176</a></span>&#160;<span class="preprocessor">#define I2S_CLKCTRL_MASK _U_(0x3F3FFFFF) </span></div>
<div class="line"><a name="l00178"></a><span class="lineno"> 178</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- I2S_INTENCLR : (I2S Offset: 0x0C) (R/W 16) Interrupt Enable Clear -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00179"></a><span class="lineno"> 179</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00180"></a><span class="lineno"><a class="line" href="unionI2S__INTENCLR__Type.html"> 180</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00181"></a><span class="lineno"> 181</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00182"></a><span class="lineno"><a class="line" href="unionI2S__INTENCLR__Type.html#aa64fddb266193461221190638b89c234"> 182</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENCLR__Type.html#aa64fddb266193461221190638b89c234">RXRDY0</a>:1; </div>
<div class="line"><a name="l00183"></a><span class="lineno"><a class="line" href="unionI2S__INTENCLR__Type.html#af852c622758e48f1733b67f5cfb1850f"> 183</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENCLR__Type.html#af852c622758e48f1733b67f5cfb1850f">RXRDY1</a>:1; </div>
<div class="line"><a name="l00184"></a><span class="lineno"><a class="line" href="unionI2S__INTENCLR__Type.html#afd54994bc78267de0da0411498b46ef8"> 184</a></span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00185"></a><span class="lineno"><a class="line" href="unionI2S__INTENCLR__Type.html#a7b06d563082fed59e5efdb17bff1b476"> 185</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENCLR__Type.html#a7b06d563082fed59e5efdb17bff1b476">RXOR0</a>:1; </div>
<div class="line"><a name="l00186"></a><span class="lineno"><a class="line" href="unionI2S__INTENCLR__Type.html#af58efb6da3728f0d30d96f6191ac9454"> 186</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENCLR__Type.html#af58efb6da3728f0d30d96f6191ac9454">RXOR1</a>:1; </div>
<div class="line"><a name="l00187"></a><span class="lineno"><a class="line" href="unionI2S__INTENCLR__Type.html#a9775369ae11af7bd84a7da32f40b8ba3"> 187</a></span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00188"></a><span class="lineno"><a class="line" href="unionI2S__INTENCLR__Type.html#ac6cb5ed68c0994fa8cda9d3cb9f05d72"> 188</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENCLR__Type.html#ac6cb5ed68c0994fa8cda9d3cb9f05d72">TXRDY0</a>:1; </div>
<div class="line"><a name="l00189"></a><span class="lineno"><a class="line" href="unionI2S__INTENCLR__Type.html#a408dfa5692e4d1e5c59b55a9c3e29ca2"> 189</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENCLR__Type.html#a408dfa5692e4d1e5c59b55a9c3e29ca2">TXRDY1</a>:1; </div>
<div class="line"><a name="l00190"></a><span class="lineno"><a class="line" href="unionI2S__INTENCLR__Type.html#a059db5f96403e8fdc33dc6808734a1c2"> 190</a></span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00191"></a><span class="lineno"><a class="line" href="unionI2S__INTENCLR__Type.html#ab96fb961046949b997b1f5e303843d83"> 191</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENCLR__Type.html#ab96fb961046949b997b1f5e303843d83">TXUR0</a>:1; </div>
<div class="line"><a name="l00192"></a><span class="lineno"><a class="line" href="unionI2S__INTENCLR__Type.html#af5e8b9b8f6e255f0819efddd9610e6a6"> 192</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENCLR__Type.html#af5e8b9b8f6e255f0819efddd9610e6a6">TXUR1</a>:1; </div>
<div class="line"><a name="l00193"></a><span class="lineno"><a class="line" href="unionI2S__INTENCLR__Type.html#a514c4bd3d4b6b0483e3e972346e1b99b"> 193</a></span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00194"></a><span class="lineno"><a class="line" href="unionI2S__INTENCLR__Type.html#aca1ed35d5eae71a929a830c0cc6fdabc"> 194</a></span>&#160; } bit; </div>
<div class="line"><a name="l00195"></a><span class="lineno"> 195</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00196"></a><span class="lineno"><a class="line" href="unionI2S__INTENCLR__Type.html#a940b74af0b6dd49314b6e4992c7e1af1"> 196</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENCLR__Type.html#a940b74af0b6dd49314b6e4992c7e1af1">RXRDY</a>:2; </div>
<div class="line"><a name="l00197"></a><span class="lineno"> 197</span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00198"></a><span class="lineno"><a class="line" href="unionI2S__INTENCLR__Type.html#a2a6a249c994d220c1cc30c11a3db0b74"> 198</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENCLR__Type.html#a2a6a249c994d220c1cc30c11a3db0b74">RXOR</a>:2; </div>
<div class="line"><a name="l00199"></a><span class="lineno"> 199</span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00200"></a><span class="lineno"><a class="line" href="unionI2S__INTENCLR__Type.html#ab4f76dd230de7cf1b1dce203b6e745b3"> 200</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENCLR__Type.html#ab4f76dd230de7cf1b1dce203b6e745b3">TXRDY</a>:2; </div>
<div class="line"><a name="l00201"></a><span class="lineno"> 201</span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00202"></a><span class="lineno"><a class="line" href="unionI2S__INTENCLR__Type.html#ac4830b4f350afea80da7cb21c0af201a"> 202</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENCLR__Type.html#ac4830b4f350afea80da7cb21c0af201a">TXUR</a>:2; </div>
<div class="line"><a name="l00203"></a><span class="lineno"> 203</span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00204"></a><span class="lineno"><a class="line" href="unionI2S__INTENCLR__Type.html#aa95ba10006da5ebcd2591da72474b4a1"> 204</a></span>&#160; } vec; </div>
<div class="line"><a name="l00205"></a><span class="lineno"><a class="line" href="unionI2S__INTENCLR__Type.html#a57ca45ffe9f97645332976d3a6a42fab"> 205</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENCLR__Type.html#a57ca45ffe9f97645332976d3a6a42fab">reg</a>; </div>
<div class="line"><a name="l00206"></a><span class="lineno"> 206</span>&#160;} <a class="code" href="unionI2S__INTENCLR__Type.html">I2S_INTENCLR_Type</a>;</div>
<div class="line"><a name="l00207"></a><span class="lineno"> 207</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00208"></a><span class="lineno"> 208</span>&#160; </div>
<div class="line"><a name="l00209"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#abd070bc8ffee600ddb258303c5ff7e6c"> 209</a></span>&#160;<span class="preprocessor">#define I2S_INTENCLR_OFFSET 0x0C </span></div>
<div class="line"><a name="l00210"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a2bc24ab6ab10ee3fcad4fb0678e122f4"> 210</a></span>&#160;<span class="preprocessor">#define I2S_INTENCLR_RESETVALUE _U_(0x0000) </span></div>
<div class="line"><a name="l00212"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a15e508b4c8f7428f2ff99616060bc6ee"> 212</a></span>&#160;<span class="preprocessor">#define I2S_INTENCLR_RXRDY0_Pos 0 </span></div>
<div class="line"><a name="l00213"></a><span class="lineno"> 213</span>&#160;<span class="preprocessor">#define I2S_INTENCLR_RXRDY0 (_U_(1) &lt;&lt; I2S_INTENCLR_RXRDY0_Pos)</span></div>
<div class="line"><a name="l00214"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#ab9fb50d874f6597bfa69abb73fbf2862"> 214</a></span>&#160;<span class="preprocessor">#define I2S_INTENCLR_RXRDY1_Pos 1 </span></div>
<div class="line"><a name="l00215"></a><span class="lineno"> 215</span>&#160;<span class="preprocessor">#define I2S_INTENCLR_RXRDY1 (_U_(1) &lt;&lt; I2S_INTENCLR_RXRDY1_Pos)</span></div>
<div class="line"><a name="l00216"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a04eb812f8b42d1d690ba5420fc6b242b"> 216</a></span>&#160;<span class="preprocessor">#define I2S_INTENCLR_RXRDY_Pos 0 </span></div>
<div class="line"><a name="l00217"></a><span class="lineno"> 217</span>&#160;<span class="preprocessor">#define I2S_INTENCLR_RXRDY_Msk (_U_(0x3) &lt;&lt; I2S_INTENCLR_RXRDY_Pos)</span></div>
<div class="line"><a name="l00218"></a><span class="lineno"> 218</span>&#160;<span class="preprocessor">#define I2S_INTENCLR_RXRDY(value) (I2S_INTENCLR_RXRDY_Msk &amp; ((value) &lt;&lt; I2S_INTENCLR_RXRDY_Pos))</span></div>
<div class="line"><a name="l00219"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#ae7b60215ac9e256b4660e710f2a20a15"> 219</a></span>&#160;<span class="preprocessor">#define I2S_INTENCLR_RXOR0_Pos 4 </span></div>
<div class="line"><a name="l00220"></a><span class="lineno"> 220</span>&#160;<span class="preprocessor">#define I2S_INTENCLR_RXOR0 (_U_(1) &lt;&lt; I2S_INTENCLR_RXOR0_Pos)</span></div>
<div class="line"><a name="l00221"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a3ac2f9b1f31d415d4e071d8af0074b06"> 221</a></span>&#160;<span class="preprocessor">#define I2S_INTENCLR_RXOR1_Pos 5 </span></div>
<div class="line"><a name="l00222"></a><span class="lineno"> 222</span>&#160;<span class="preprocessor">#define I2S_INTENCLR_RXOR1 (_U_(1) &lt;&lt; I2S_INTENCLR_RXOR1_Pos)</span></div>
<div class="line"><a name="l00223"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#afed2283ebdd42b5c187abf28e6029f0c"> 223</a></span>&#160;<span class="preprocessor">#define I2S_INTENCLR_RXOR_Pos 4 </span></div>
<div class="line"><a name="l00224"></a><span class="lineno"> 224</span>&#160;<span class="preprocessor">#define I2S_INTENCLR_RXOR_Msk (_U_(0x3) &lt;&lt; I2S_INTENCLR_RXOR_Pos)</span></div>
<div class="line"><a name="l00225"></a><span class="lineno"> 225</span>&#160;<span class="preprocessor">#define I2S_INTENCLR_RXOR(value) (I2S_INTENCLR_RXOR_Msk &amp; ((value) &lt;&lt; I2S_INTENCLR_RXOR_Pos))</span></div>
<div class="line"><a name="l00226"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a2ec1727e262443ba522900c51416e3c6"> 226</a></span>&#160;<span class="preprocessor">#define I2S_INTENCLR_TXRDY0_Pos 8 </span></div>
<div class="line"><a name="l00227"></a><span class="lineno"> 227</span>&#160;<span class="preprocessor">#define I2S_INTENCLR_TXRDY0 (_U_(1) &lt;&lt; I2S_INTENCLR_TXRDY0_Pos)</span></div>
<div class="line"><a name="l00228"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#ad9aeb6db3a8f09c6c6d586b64a98e4c3"> 228</a></span>&#160;<span class="preprocessor">#define I2S_INTENCLR_TXRDY1_Pos 9 </span></div>
<div class="line"><a name="l00229"></a><span class="lineno"> 229</span>&#160;<span class="preprocessor">#define I2S_INTENCLR_TXRDY1 (_U_(1) &lt;&lt; I2S_INTENCLR_TXRDY1_Pos)</span></div>
<div class="line"><a name="l00230"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#afc89b68c83bd2907f5c7a91cd36a667f"> 230</a></span>&#160;<span class="preprocessor">#define I2S_INTENCLR_TXRDY_Pos 8 </span></div>
<div class="line"><a name="l00231"></a><span class="lineno"> 231</span>&#160;<span class="preprocessor">#define I2S_INTENCLR_TXRDY_Msk (_U_(0x3) &lt;&lt; I2S_INTENCLR_TXRDY_Pos)</span></div>
<div class="line"><a name="l00232"></a><span class="lineno"> 232</span>&#160;<span class="preprocessor">#define I2S_INTENCLR_TXRDY(value) (I2S_INTENCLR_TXRDY_Msk &amp; ((value) &lt;&lt; I2S_INTENCLR_TXRDY_Pos))</span></div>
<div class="line"><a name="l00233"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a40a52fbc12775b89db0e5e917beaba8d"> 233</a></span>&#160;<span class="preprocessor">#define I2S_INTENCLR_TXUR0_Pos 12 </span></div>
<div class="line"><a name="l00234"></a><span class="lineno"> 234</span>&#160;<span class="preprocessor">#define I2S_INTENCLR_TXUR0 (_U_(1) &lt;&lt; I2S_INTENCLR_TXUR0_Pos)</span></div>
<div class="line"><a name="l00235"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a8e6e57c754c211623784759da161c01d"> 235</a></span>&#160;<span class="preprocessor">#define I2S_INTENCLR_TXUR1_Pos 13 </span></div>
<div class="line"><a name="l00236"></a><span class="lineno"> 236</span>&#160;<span class="preprocessor">#define I2S_INTENCLR_TXUR1 (_U_(1) &lt;&lt; I2S_INTENCLR_TXUR1_Pos)</span></div>
<div class="line"><a name="l00237"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a3532309a5035b5752b503639978a9e62"> 237</a></span>&#160;<span class="preprocessor">#define I2S_INTENCLR_TXUR_Pos 12 </span></div>
<div class="line"><a name="l00238"></a><span class="lineno"> 238</span>&#160;<span class="preprocessor">#define I2S_INTENCLR_TXUR_Msk (_U_(0x3) &lt;&lt; I2S_INTENCLR_TXUR_Pos)</span></div>
<div class="line"><a name="l00239"></a><span class="lineno"> 239</span>&#160;<span class="preprocessor">#define I2S_INTENCLR_TXUR(value) (I2S_INTENCLR_TXUR_Msk &amp; ((value) &lt;&lt; I2S_INTENCLR_TXUR_Pos))</span></div>
<div class="line"><a name="l00240"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a7511aeab3570168deef863a0945ff013"> 240</a></span>&#160;<span class="preprocessor">#define I2S_INTENCLR_MASK _U_(0x3333) </span></div>
<div class="line"><a name="l00242"></a><span class="lineno"> 242</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- I2S_INTENSET : (I2S Offset: 0x10) (R/W 16) Interrupt Enable Set -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00243"></a><span class="lineno"> 243</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00244"></a><span class="lineno"><a class="line" href="unionI2S__INTENSET__Type.html"> 244</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00245"></a><span class="lineno"> 245</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00246"></a><span class="lineno"><a class="line" href="unionI2S__INTENSET__Type.html#a42329bb512e77e1952332da97b1443c2"> 246</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENSET__Type.html#a42329bb512e77e1952332da97b1443c2">RXRDY0</a>:1; </div>
<div class="line"><a name="l00247"></a><span class="lineno"><a class="line" href="unionI2S__INTENSET__Type.html#aa69436115d307a1cb7a669f95fbdae14"> 247</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENSET__Type.html#aa69436115d307a1cb7a669f95fbdae14">RXRDY1</a>:1; </div>
<div class="line"><a name="l00248"></a><span class="lineno"><a class="line" href="unionI2S__INTENSET__Type.html#ac1c8375faad73381055a33ba60807d15"> 248</a></span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00249"></a><span class="lineno"><a class="line" href="unionI2S__INTENSET__Type.html#a9e05021ea7cf05fdef6839bb2273079f"> 249</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENSET__Type.html#a9e05021ea7cf05fdef6839bb2273079f">RXOR0</a>:1; </div>
<div class="line"><a name="l00250"></a><span class="lineno"><a class="line" href="unionI2S__INTENSET__Type.html#a4f6c361e5e982433ea910ec2e27a965c"> 250</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENSET__Type.html#a4f6c361e5e982433ea910ec2e27a965c">RXOR1</a>:1; </div>
<div class="line"><a name="l00251"></a><span class="lineno"><a class="line" href="unionI2S__INTENSET__Type.html#aae23ba57f79ff17003e1f462b207cf59"> 251</a></span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00252"></a><span class="lineno"><a class="line" href="unionI2S__INTENSET__Type.html#a71ccb2e01d3d3cf08cb6d6f2685771b7"> 252</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENSET__Type.html#a71ccb2e01d3d3cf08cb6d6f2685771b7">TXRDY0</a>:1; </div>
<div class="line"><a name="l00253"></a><span class="lineno"><a class="line" href="unionI2S__INTENSET__Type.html#aed374e3b55b9ad86b30dda81d129304f"> 253</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENSET__Type.html#aed374e3b55b9ad86b30dda81d129304f">TXRDY1</a>:1; </div>
<div class="line"><a name="l00254"></a><span class="lineno"><a class="line" href="unionI2S__INTENSET__Type.html#aa18188f213fe642075510af85b4e7ea7"> 254</a></span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00255"></a><span class="lineno"><a class="line" href="unionI2S__INTENSET__Type.html#a2713d4e8f97960a60dc01b00d5ac5159"> 255</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENSET__Type.html#a2713d4e8f97960a60dc01b00d5ac5159">TXUR0</a>:1; </div>
<div class="line"><a name="l00256"></a><span class="lineno"><a class="line" href="unionI2S__INTENSET__Type.html#a749fa771b6fc7c4e0decd83e3a7b60af"> 256</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENSET__Type.html#a749fa771b6fc7c4e0decd83e3a7b60af">TXUR1</a>:1; </div>
<div class="line"><a name="l00257"></a><span class="lineno"><a class="line" href="unionI2S__INTENSET__Type.html#aa96f89dac8d193b5d752c0e3d85a044a"> 257</a></span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00258"></a><span class="lineno"><a class="line" href="unionI2S__INTENSET__Type.html#a1729de3558fcd6008dd0008fab408661"> 258</a></span>&#160; } bit; </div>
<div class="line"><a name="l00259"></a><span class="lineno"> 259</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00260"></a><span class="lineno"><a class="line" href="unionI2S__INTENSET__Type.html#a76d7e9a84590131c8750ee00ee39a302"> 260</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENSET__Type.html#a76d7e9a84590131c8750ee00ee39a302">RXRDY</a>:2; </div>
<div class="line"><a name="l00261"></a><span class="lineno"> 261</span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00262"></a><span class="lineno"><a class="line" href="unionI2S__INTENSET__Type.html#af0f84bd0ea14d27b711d5841790803b5"> 262</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENSET__Type.html#af0f84bd0ea14d27b711d5841790803b5">RXOR</a>:2; </div>
<div class="line"><a name="l00263"></a><span class="lineno"> 263</span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00264"></a><span class="lineno"><a class="line" href="unionI2S__INTENSET__Type.html#a783ffe75f9e7662c931d02ead056a4d3"> 264</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENSET__Type.html#a783ffe75f9e7662c931d02ead056a4d3">TXRDY</a>:2; </div>
<div class="line"><a name="l00265"></a><span class="lineno"> 265</span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00266"></a><span class="lineno"><a class="line" href="unionI2S__INTENSET__Type.html#ac9d6271732d2a227b60759e603b99608"> 266</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENSET__Type.html#ac9d6271732d2a227b60759e603b99608">TXUR</a>:2; </div>
<div class="line"><a name="l00267"></a><span class="lineno"> 267</span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00268"></a><span class="lineno"><a class="line" href="unionI2S__INTENSET__Type.html#adf393ccb023cf37214259c2fc9ab8296"> 268</a></span>&#160; } vec; </div>
<div class="line"><a name="l00269"></a><span class="lineno"><a class="line" href="unionI2S__INTENSET__Type.html#a3ad5a810a99a76ff987bc91e0339f531"> 269</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTENSET__Type.html#a3ad5a810a99a76ff987bc91e0339f531">reg</a>; </div>
<div class="line"><a name="l00270"></a><span class="lineno"> 270</span>&#160;} <a class="code" href="unionI2S__INTENSET__Type.html">I2S_INTENSET_Type</a>;</div>
<div class="line"><a name="l00271"></a><span class="lineno"> 271</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00272"></a><span class="lineno"> 272</span>&#160; </div>
<div class="line"><a name="l00273"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a4f7799200879d836b56557cc501fc86c"> 273</a></span>&#160;<span class="preprocessor">#define I2S_INTENSET_OFFSET 0x10 </span></div>
<div class="line"><a name="l00274"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#af0d24a1632b21dc544a62f9ba89478e3"> 274</a></span>&#160;<span class="preprocessor">#define I2S_INTENSET_RESETVALUE _U_(0x0000) </span></div>
<div class="line"><a name="l00276"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a20017e8afeaed03d067cdab28118f120"> 276</a></span>&#160;<span class="preprocessor">#define I2S_INTENSET_RXRDY0_Pos 0 </span></div>
<div class="line"><a name="l00277"></a><span class="lineno"> 277</span>&#160;<span class="preprocessor">#define I2S_INTENSET_RXRDY0 (_U_(1) &lt;&lt; I2S_INTENSET_RXRDY0_Pos)</span></div>
<div class="line"><a name="l00278"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a9f5ba1356e9c6c4cc5a89174ea9c9544"> 278</a></span>&#160;<span class="preprocessor">#define I2S_INTENSET_RXRDY1_Pos 1 </span></div>
<div class="line"><a name="l00279"></a><span class="lineno"> 279</span>&#160;<span class="preprocessor">#define I2S_INTENSET_RXRDY1 (_U_(1) &lt;&lt; I2S_INTENSET_RXRDY1_Pos)</span></div>
<div class="line"><a name="l00280"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a6a83119896f3ef19f62b84b85047291b"> 280</a></span>&#160;<span class="preprocessor">#define I2S_INTENSET_RXRDY_Pos 0 </span></div>
<div class="line"><a name="l00281"></a><span class="lineno"> 281</span>&#160;<span class="preprocessor">#define I2S_INTENSET_RXRDY_Msk (_U_(0x3) &lt;&lt; I2S_INTENSET_RXRDY_Pos)</span></div>
<div class="line"><a name="l00282"></a><span class="lineno"> 282</span>&#160;<span class="preprocessor">#define I2S_INTENSET_RXRDY(value) (I2S_INTENSET_RXRDY_Msk &amp; ((value) &lt;&lt; I2S_INTENSET_RXRDY_Pos))</span></div>
<div class="line"><a name="l00283"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a329b94c3981eea317584e01a84bbc23b"> 283</a></span>&#160;<span class="preprocessor">#define I2S_INTENSET_RXOR0_Pos 4 </span></div>
<div class="line"><a name="l00284"></a><span class="lineno"> 284</span>&#160;<span class="preprocessor">#define I2S_INTENSET_RXOR0 (_U_(1) &lt;&lt; I2S_INTENSET_RXOR0_Pos)</span></div>
<div class="line"><a name="l00285"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#aa80578c073e672c92eb123cda1edd527"> 285</a></span>&#160;<span class="preprocessor">#define I2S_INTENSET_RXOR1_Pos 5 </span></div>
<div class="line"><a name="l00286"></a><span class="lineno"> 286</span>&#160;<span class="preprocessor">#define I2S_INTENSET_RXOR1 (_U_(1) &lt;&lt; I2S_INTENSET_RXOR1_Pos)</span></div>
<div class="line"><a name="l00287"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a85f713671974c54bdf903cbc6767f5d0"> 287</a></span>&#160;<span class="preprocessor">#define I2S_INTENSET_RXOR_Pos 4 </span></div>
<div class="line"><a name="l00288"></a><span class="lineno"> 288</span>&#160;<span class="preprocessor">#define I2S_INTENSET_RXOR_Msk (_U_(0x3) &lt;&lt; I2S_INTENSET_RXOR_Pos)</span></div>
<div class="line"><a name="l00289"></a><span class="lineno"> 289</span>&#160;<span class="preprocessor">#define I2S_INTENSET_RXOR(value) (I2S_INTENSET_RXOR_Msk &amp; ((value) &lt;&lt; I2S_INTENSET_RXOR_Pos))</span></div>
<div class="line"><a name="l00290"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a6e9a7c3dba406e01057e4923c0df405f"> 290</a></span>&#160;<span class="preprocessor">#define I2S_INTENSET_TXRDY0_Pos 8 </span></div>
<div class="line"><a name="l00291"></a><span class="lineno"> 291</span>&#160;<span class="preprocessor">#define I2S_INTENSET_TXRDY0 (_U_(1) &lt;&lt; I2S_INTENSET_TXRDY0_Pos)</span></div>
<div class="line"><a name="l00292"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a825c2ed15a9153b24d8a83533b9cca35"> 292</a></span>&#160;<span class="preprocessor">#define I2S_INTENSET_TXRDY1_Pos 9 </span></div>
<div class="line"><a name="l00293"></a><span class="lineno"> 293</span>&#160;<span class="preprocessor">#define I2S_INTENSET_TXRDY1 (_U_(1) &lt;&lt; I2S_INTENSET_TXRDY1_Pos)</span></div>
<div class="line"><a name="l00294"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a4f5152f72ea4c8ccf037b78380108771"> 294</a></span>&#160;<span class="preprocessor">#define I2S_INTENSET_TXRDY_Pos 8 </span></div>
<div class="line"><a name="l00295"></a><span class="lineno"> 295</span>&#160;<span class="preprocessor">#define I2S_INTENSET_TXRDY_Msk (_U_(0x3) &lt;&lt; I2S_INTENSET_TXRDY_Pos)</span></div>
<div class="line"><a name="l00296"></a><span class="lineno"> 296</span>&#160;<span class="preprocessor">#define I2S_INTENSET_TXRDY(value) (I2S_INTENSET_TXRDY_Msk &amp; ((value) &lt;&lt; I2S_INTENSET_TXRDY_Pos))</span></div>
<div class="line"><a name="l00297"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#ae7a70a245f4559dc2e882e5b5e40c24e"> 297</a></span>&#160;<span class="preprocessor">#define I2S_INTENSET_TXUR0_Pos 12 </span></div>
<div class="line"><a name="l00298"></a><span class="lineno"> 298</span>&#160;<span class="preprocessor">#define I2S_INTENSET_TXUR0 (_U_(1) &lt;&lt; I2S_INTENSET_TXUR0_Pos)</span></div>
<div class="line"><a name="l00299"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a97d5fc3092599da0d0950d4cbdf8ec66"> 299</a></span>&#160;<span class="preprocessor">#define I2S_INTENSET_TXUR1_Pos 13 </span></div>
<div class="line"><a name="l00300"></a><span class="lineno"> 300</span>&#160;<span class="preprocessor">#define I2S_INTENSET_TXUR1 (_U_(1) &lt;&lt; I2S_INTENSET_TXUR1_Pos)</span></div>
<div class="line"><a name="l00301"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a0b01a5e36ed19ab2e98e0685a96d1e04"> 301</a></span>&#160;<span class="preprocessor">#define I2S_INTENSET_TXUR_Pos 12 </span></div>
<div class="line"><a name="l00302"></a><span class="lineno"> 302</span>&#160;<span class="preprocessor">#define I2S_INTENSET_TXUR_Msk (_U_(0x3) &lt;&lt; I2S_INTENSET_TXUR_Pos)</span></div>
<div class="line"><a name="l00303"></a><span class="lineno"> 303</span>&#160;<span class="preprocessor">#define I2S_INTENSET_TXUR(value) (I2S_INTENSET_TXUR_Msk &amp; ((value) &lt;&lt; I2S_INTENSET_TXUR_Pos))</span></div>
<div class="line"><a name="l00304"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a69068c25175bd3bb6b3cd8dd5b48a933"> 304</a></span>&#160;<span class="preprocessor">#define I2S_INTENSET_MASK _U_(0x3333) </span></div>
<div class="line"><a name="l00306"></a><span class="lineno"> 306</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- I2S_INTFLAG : (I2S Offset: 0x14) (R/W 16) Interrupt Flag Status and Clear -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00307"></a><span class="lineno"> 307</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00308"></a><span class="lineno"><a class="line" href="unionI2S__INTFLAG__Type.html"> 308</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{ <span class="comment">// __I to avoid read-modify-write on write-to-clear register</span></div>
<div class="line"><a name="l00309"></a><span class="lineno"> 309</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00310"></a><span class="lineno"><a class="line" href="unionI2S__INTFLAG__Type.html#a16722ce456e3d0b5efa407a66ce53c18"> 310</a></span>&#160; __I uint16_t <a class="code" href="unionI2S__INTFLAG__Type.html#a16722ce456e3d0b5efa407a66ce53c18">RXRDY0</a>:1; </div>
<div class="line"><a name="l00311"></a><span class="lineno"><a class="line" href="unionI2S__INTFLAG__Type.html#a1fea4a632439a1266f5271765b976eb6"> 311</a></span>&#160; __I uint16_t <a class="code" href="unionI2S__INTFLAG__Type.html#a1fea4a632439a1266f5271765b976eb6">RXRDY1</a>:1; </div>
<div class="line"><a name="l00312"></a><span class="lineno"><a class="line" href="unionI2S__INTFLAG__Type.html#a8d6a0b5e2d17d6f0ba8823564cc8fb6e"> 312</a></span>&#160; __I <a class="code" href="unionI2S__INTFLAG__Type.html#a8d6a0b5e2d17d6f0ba8823564cc8fb6e">uint16_t</a> :2; </div>
<div class="line"><a name="l00313"></a><span class="lineno"><a class="line" href="unionI2S__INTFLAG__Type.html#a15e716a7672f524f8aca331332b17d4d"> 313</a></span>&#160; __I uint16_t <a class="code" href="unionI2S__INTFLAG__Type.html#a15e716a7672f524f8aca331332b17d4d">RXOR0</a>:1; </div>
<div class="line"><a name="l00314"></a><span class="lineno"><a class="line" href="unionI2S__INTFLAG__Type.html#ab5ecd387f3de89c96324ae32b0b2753c"> 314</a></span>&#160; __I uint16_t <a class="code" href="unionI2S__INTFLAG__Type.html#ab5ecd387f3de89c96324ae32b0b2753c">RXOR1</a>:1; </div>
<div class="line"><a name="l00315"></a><span class="lineno"> 315</span>&#160; __I uint16_t :2; </div>
<div class="line"><a name="l00316"></a><span class="lineno"><a class="line" href="unionI2S__INTFLAG__Type.html#a3e8ca570951b893405cf93737825fcfc"> 316</a></span>&#160; __I uint16_t <a class="code" href="unionI2S__INTFLAG__Type.html#a3e8ca570951b893405cf93737825fcfc">TXRDY0</a>:1; </div>
<div class="line"><a name="l00317"></a><span class="lineno"><a class="line" href="unionI2S__INTFLAG__Type.html#af6a08c72b5abfe93b6f9d85cd552a129"> 317</a></span>&#160; __I uint16_t <a class="code" href="unionI2S__INTFLAG__Type.html#af6a08c72b5abfe93b6f9d85cd552a129">TXRDY1</a>:1; </div>
<div class="line"><a name="l00318"></a><span class="lineno"> 318</span>&#160; __I uint16_t :2; </div>
<div class="line"><a name="l00319"></a><span class="lineno"><a class="line" href="unionI2S__INTFLAG__Type.html#a4e942c6ea5b23eecb1838ea8b81eec98"> 319</a></span>&#160; __I uint16_t <a class="code" href="unionI2S__INTFLAG__Type.html#a4e942c6ea5b23eecb1838ea8b81eec98">TXUR0</a>:1; </div>
<div class="line"><a name="l00320"></a><span class="lineno"><a class="line" href="unionI2S__INTFLAG__Type.html#a87543200fa145be24aa4b0ee3b67e045"> 320</a></span>&#160; __I uint16_t <a class="code" href="unionI2S__INTFLAG__Type.html#a87543200fa145be24aa4b0ee3b67e045">TXUR1</a>:1; </div>
<div class="line"><a name="l00321"></a><span class="lineno"> 321</span>&#160; __I uint16_t :2; </div>
<div class="line"><a name="l00322"></a><span class="lineno"><a class="line" href="unionI2S__INTFLAG__Type.html#a19729d0ad77896266e49effec41fe2ab"> 322</a></span>&#160; } bit; </div>
<div class="line"><a name="l00323"></a><span class="lineno"> 323</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00324"></a><span class="lineno"><a class="line" href="unionI2S__INTFLAG__Type.html#a87a153f7afa91d938db6fc92029ca87e"> 324</a></span>&#160; __I uint16_t <a class="code" href="unionI2S__INTFLAG__Type.html#a87a153f7afa91d938db6fc92029ca87e">RXRDY</a>:2; </div>
<div class="line"><a name="l00325"></a><span class="lineno"> 325</span>&#160; __I uint16_t :2; </div>
<div class="line"><a name="l00326"></a><span class="lineno"><a class="line" href="unionI2S__INTFLAG__Type.html#ad3b22512e042470b1115f44690d52f63"> 326</a></span>&#160; __I uint16_t <a class="code" href="unionI2S__INTFLAG__Type.html#ad3b22512e042470b1115f44690d52f63">RXOR</a>:2; </div>
<div class="line"><a name="l00327"></a><span class="lineno"> 327</span>&#160; __I uint16_t :2; </div>
<div class="line"><a name="l00328"></a><span class="lineno"><a class="line" href="unionI2S__INTFLAG__Type.html#a05f1b59e5afac697c843163f2ca9d48e"> 328</a></span>&#160; __I uint16_t <a class="code" href="unionI2S__INTFLAG__Type.html#a05f1b59e5afac697c843163f2ca9d48e">TXRDY</a>:2; </div>
<div class="line"><a name="l00329"></a><span class="lineno"> 329</span>&#160; __I uint16_t :2; </div>
<div class="line"><a name="l00330"></a><span class="lineno"><a class="line" href="unionI2S__INTFLAG__Type.html#a80f602fed67029cda7c4761ca1ee6eef"> 330</a></span>&#160; __I uint16_t <a class="code" href="unionI2S__INTFLAG__Type.html#a80f602fed67029cda7c4761ca1ee6eef">TXUR</a>:2; </div>
<div class="line"><a name="l00331"></a><span class="lineno"> 331</span>&#160; __I uint16_t :2; </div>
<div class="line"><a name="l00332"></a><span class="lineno"><a class="line" href="unionI2S__INTFLAG__Type.html#a3e2e01dc302849965de90f3ca0ee3ace"> 332</a></span>&#160; } vec; </div>
<div class="line"><a name="l00333"></a><span class="lineno"><a class="line" href="unionI2S__INTFLAG__Type.html#abdb3eaa03d30b2608f67916702dafb0d"> 333</a></span>&#160; uint16_t <a class="code" href="unionI2S__INTFLAG__Type.html#abdb3eaa03d30b2608f67916702dafb0d">reg</a>; </div>
<div class="line"><a name="l00334"></a><span class="lineno"> 334</span>&#160;} <a class="code" href="unionI2S__INTFLAG__Type.html">I2S_INTFLAG_Type</a>;</div>
<div class="line"><a name="l00335"></a><span class="lineno"> 335</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00336"></a><span class="lineno"> 336</span>&#160; </div>
<div class="line"><a name="l00337"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#ac8ef4f6d3231d368efdb2135b13146d8"> 337</a></span>&#160;<span class="preprocessor">#define I2S_INTFLAG_OFFSET 0x14 </span></div>
<div class="line"><a name="l00338"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a683106ff6b1673adc53e28a118d2c6b5"> 338</a></span>&#160;<span class="preprocessor">#define I2S_INTFLAG_RESETVALUE _U_(0x0000) </span></div>
<div class="line"><a name="l00340"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a1eaa330e64ae98b22bd94d4820ef25bd"> 340</a></span>&#160;<span class="preprocessor">#define I2S_INTFLAG_RXRDY0_Pos 0 </span></div>
<div class="line"><a name="l00341"></a><span class="lineno"> 341</span>&#160;<span class="preprocessor">#define I2S_INTFLAG_RXRDY0 (_U_(1) &lt;&lt; I2S_INTFLAG_RXRDY0_Pos)</span></div>
<div class="line"><a name="l00342"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a3872451a6ff3dac098d309ac91a07224"> 342</a></span>&#160;<span class="preprocessor">#define I2S_INTFLAG_RXRDY1_Pos 1 </span></div>
<div class="line"><a name="l00343"></a><span class="lineno"> 343</span>&#160;<span class="preprocessor">#define I2S_INTFLAG_RXRDY1 (_U_(1) &lt;&lt; I2S_INTFLAG_RXRDY1_Pos)</span></div>
<div class="line"><a name="l00344"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#af35339d81893f2eb7074bda7576ed732"> 344</a></span>&#160;<span class="preprocessor">#define I2S_INTFLAG_RXRDY_Pos 0 </span></div>
<div class="line"><a name="l00345"></a><span class="lineno"> 345</span>&#160;<span class="preprocessor">#define I2S_INTFLAG_RXRDY_Msk (_U_(0x3) &lt;&lt; I2S_INTFLAG_RXRDY_Pos)</span></div>
<div class="line"><a name="l00346"></a><span class="lineno"> 346</span>&#160;<span class="preprocessor">#define I2S_INTFLAG_RXRDY(value) (I2S_INTFLAG_RXRDY_Msk &amp; ((value) &lt;&lt; I2S_INTFLAG_RXRDY_Pos))</span></div>
<div class="line"><a name="l00347"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#aea01a5af5d62e72433ff5a4576fb2a5a"> 347</a></span>&#160;<span class="preprocessor">#define I2S_INTFLAG_RXOR0_Pos 4 </span></div>
<div class="line"><a name="l00348"></a><span class="lineno"> 348</span>&#160;<span class="preprocessor">#define I2S_INTFLAG_RXOR0 (_U_(1) &lt;&lt; I2S_INTFLAG_RXOR0_Pos)</span></div>
<div class="line"><a name="l00349"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a187192cb3469dd749d34479792551617"> 349</a></span>&#160;<span class="preprocessor">#define I2S_INTFLAG_RXOR1_Pos 5 </span></div>
<div class="line"><a name="l00350"></a><span class="lineno"> 350</span>&#160;<span class="preprocessor">#define I2S_INTFLAG_RXOR1 (_U_(1) &lt;&lt; I2S_INTFLAG_RXOR1_Pos)</span></div>
<div class="line"><a name="l00351"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a72a2ee346cab69a89d41a362304e67a8"> 351</a></span>&#160;<span class="preprocessor">#define I2S_INTFLAG_RXOR_Pos 4 </span></div>
<div class="line"><a name="l00352"></a><span class="lineno"> 352</span>&#160;<span class="preprocessor">#define I2S_INTFLAG_RXOR_Msk (_U_(0x3) &lt;&lt; I2S_INTFLAG_RXOR_Pos)</span></div>
<div class="line"><a name="l00353"></a><span class="lineno"> 353</span>&#160;<span class="preprocessor">#define I2S_INTFLAG_RXOR(value) (I2S_INTFLAG_RXOR_Msk &amp; ((value) &lt;&lt; I2S_INTFLAG_RXOR_Pos))</span></div>
<div class="line"><a name="l00354"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#ab8cb5231618dcbf1dc0755bef513fcbb"> 354</a></span>&#160;<span class="preprocessor">#define I2S_INTFLAG_TXRDY0_Pos 8 </span></div>
<div class="line"><a name="l00355"></a><span class="lineno"> 355</span>&#160;<span class="preprocessor">#define I2S_INTFLAG_TXRDY0 (_U_(1) &lt;&lt; I2S_INTFLAG_TXRDY0_Pos)</span></div>
<div class="line"><a name="l00356"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#aa6d976afb12a4186f3801d42d7f3eaf2"> 356</a></span>&#160;<span class="preprocessor">#define I2S_INTFLAG_TXRDY1_Pos 9 </span></div>
<div class="line"><a name="l00357"></a><span class="lineno"> 357</span>&#160;<span class="preprocessor">#define I2S_INTFLAG_TXRDY1 (_U_(1) &lt;&lt; I2S_INTFLAG_TXRDY1_Pos)</span></div>
<div class="line"><a name="l00358"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a4401102e0bff61291957c9418e23a1b8"> 358</a></span>&#160;<span class="preprocessor">#define I2S_INTFLAG_TXRDY_Pos 8 </span></div>
<div class="line"><a name="l00359"></a><span class="lineno"> 359</span>&#160;<span class="preprocessor">#define I2S_INTFLAG_TXRDY_Msk (_U_(0x3) &lt;&lt; I2S_INTFLAG_TXRDY_Pos)</span></div>
<div class="line"><a name="l00360"></a><span class="lineno"> 360</span>&#160;<span class="preprocessor">#define I2S_INTFLAG_TXRDY(value) (I2S_INTFLAG_TXRDY_Msk &amp; ((value) &lt;&lt; I2S_INTFLAG_TXRDY_Pos))</span></div>
<div class="line"><a name="l00361"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a5f0b5fd326750e4e70210add0dd2dce7"> 361</a></span>&#160;<span class="preprocessor">#define I2S_INTFLAG_TXUR0_Pos 12 </span></div>
<div class="line"><a name="l00362"></a><span class="lineno"> 362</span>&#160;<span class="preprocessor">#define I2S_INTFLAG_TXUR0 (_U_(1) &lt;&lt; I2S_INTFLAG_TXUR0_Pos)</span></div>
<div class="line"><a name="l00363"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a5b34bc919a96b16a6b6cf8fcd7d1c657"> 363</a></span>&#160;<span class="preprocessor">#define I2S_INTFLAG_TXUR1_Pos 13 </span></div>
<div class="line"><a name="l00364"></a><span class="lineno"> 364</span>&#160;<span class="preprocessor">#define I2S_INTFLAG_TXUR1 (_U_(1) &lt;&lt; I2S_INTFLAG_TXUR1_Pos)</span></div>
<div class="line"><a name="l00365"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a8f19374ab8dd41bf7c35c129c1389fa7"> 365</a></span>&#160;<span class="preprocessor">#define I2S_INTFLAG_TXUR_Pos 12 </span></div>
<div class="line"><a name="l00366"></a><span class="lineno"> 366</span>&#160;<span class="preprocessor">#define I2S_INTFLAG_TXUR_Msk (_U_(0x3) &lt;&lt; I2S_INTFLAG_TXUR_Pos)</span></div>
<div class="line"><a name="l00367"></a><span class="lineno"> 367</span>&#160;<span class="preprocessor">#define I2S_INTFLAG_TXUR(value) (I2S_INTFLAG_TXUR_Msk &amp; ((value) &lt;&lt; I2S_INTFLAG_TXUR_Pos))</span></div>
<div class="line"><a name="l00368"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#aa253de8b7b161df5481550f7ff9d2039"> 368</a></span>&#160;<span class="preprocessor">#define I2S_INTFLAG_MASK _U_(0x3333) </span></div>
<div class="line"><a name="l00370"></a><span class="lineno"> 370</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- I2S_SYNCBUSY : (I2S Offset: 0x18) (R/ 16) Synchronization Status -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00371"></a><span class="lineno"> 371</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00372"></a><span class="lineno"><a class="line" href="unionI2S__SYNCBUSY__Type.html"> 372</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00373"></a><span class="lineno"> 373</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00374"></a><span class="lineno"><a class="line" href="unionI2S__SYNCBUSY__Type.html#af8fb2356f4c2849aedf9168b7cc4895d"> 374</a></span>&#160; uint16_t <a class="code" href="unionI2S__SYNCBUSY__Type.html#af8fb2356f4c2849aedf9168b7cc4895d">SWRST</a>:1; </div>
<div class="line"><a name="l00375"></a><span class="lineno"><a class="line" href="unionI2S__SYNCBUSY__Type.html#aef9fbfa35d2fe3268c9d7ba8bff15ac8"> 375</a></span>&#160; uint16_t <a class="code" href="unionI2S__SYNCBUSY__Type.html#aef9fbfa35d2fe3268c9d7ba8bff15ac8">ENABLE</a>:1; </div>
<div class="line"><a name="l00376"></a><span class="lineno"><a class="line" href="unionI2S__SYNCBUSY__Type.html#aec7c5bf04ecc1470da635bd9490b26d1"> 376</a></span>&#160; uint16_t <a class="code" href="unionI2S__SYNCBUSY__Type.html#aec7c5bf04ecc1470da635bd9490b26d1">CKEN0</a>:1; </div>
<div class="line"><a name="l00377"></a><span class="lineno"><a class="line" href="unionI2S__SYNCBUSY__Type.html#a1ed6486509ac781949a3f2e6c22aedcf"> 377</a></span>&#160; uint16_t <a class="code" href="unionI2S__SYNCBUSY__Type.html#a1ed6486509ac781949a3f2e6c22aedcf">CKEN1</a>:1; </div>
<div class="line"><a name="l00378"></a><span class="lineno"><a class="line" href="unionI2S__SYNCBUSY__Type.html#ae1fa524d3baf9e3b278c2226010919d7"> 378</a></span>&#160; uint16_t <a class="code" href="unionI2S__SYNCBUSY__Type.html#ae1fa524d3baf9e3b278c2226010919d7">TXEN</a>:1; </div>
<div class="line"><a name="l00379"></a><span class="lineno"><a class="line" href="unionI2S__SYNCBUSY__Type.html#afa966d171ca269f0c1d7237667f3a8a6"> 379</a></span>&#160; uint16_t <a class="code" href="unionI2S__SYNCBUSY__Type.html#afa966d171ca269f0c1d7237667f3a8a6">RXEN</a>:1; </div>
<div class="line"><a name="l00380"></a><span class="lineno"><a class="line" href="unionI2S__SYNCBUSY__Type.html#a48a8da0a186639911c1bbfc519949df2"> 380</a></span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00381"></a><span class="lineno"><a class="line" href="unionI2S__SYNCBUSY__Type.html#a103c0466a61a89e7e9fb6f3f660c4e12"> 381</a></span>&#160; uint16_t <a class="code" href="unionI2S__SYNCBUSY__Type.html#a103c0466a61a89e7e9fb6f3f660c4e12">TXDATA</a>:1; </div>
<div class="line"><a name="l00382"></a><span class="lineno"><a class="line" href="unionI2S__SYNCBUSY__Type.html#a74d8bc811475a84fff6dc455f0395bd7"> 382</a></span>&#160; uint16_t <a class="code" href="unionI2S__SYNCBUSY__Type.html#a74d8bc811475a84fff6dc455f0395bd7">RXDATA</a>:1; </div>
<div class="line"><a name="l00383"></a><span class="lineno"><a class="line" href="unionI2S__SYNCBUSY__Type.html#a24f2b2d121cf6233b24004667a5bd1e2"> 383</a></span>&#160; uint16_t :6; </div>
<div class="line"><a name="l00384"></a><span class="lineno"><a class="line" href="unionI2S__SYNCBUSY__Type.html#abe31c1fc3805a8bdb4fc0b97931942ac"> 384</a></span>&#160; } bit; </div>
<div class="line"><a name="l00385"></a><span class="lineno"> 385</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00386"></a><span class="lineno"> 386</span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00387"></a><span class="lineno"><a class="line" href="unionI2S__SYNCBUSY__Type.html#a8ea9f51072df46f31df9511c51c31c35"> 387</a></span>&#160; uint16_t <a class="code" href="unionI2S__SYNCBUSY__Type.html#a8ea9f51072df46f31df9511c51c31c35">CKEN</a>:2; </div>
<div class="line"><a name="l00388"></a><span class="lineno"> 388</span>&#160; uint16_t :12; </div>
<div class="line"><a name="l00389"></a><span class="lineno"><a class="line" href="unionI2S__SYNCBUSY__Type.html#ad14f168e33bfd8053f6d987fda0528ca"> 389</a></span>&#160; } vec; </div>
<div class="line"><a name="l00390"></a><span class="lineno"><a class="line" href="unionI2S__SYNCBUSY__Type.html#a927c7a9da51bd4d63734d27d5e3af968"> 390</a></span>&#160; uint16_t <a class="code" href="unionI2S__SYNCBUSY__Type.html#a927c7a9da51bd4d63734d27d5e3af968">reg</a>; </div>
<div class="line"><a name="l00391"></a><span class="lineno"> 391</span>&#160;} <a class="code" href="unionI2S__SYNCBUSY__Type.html">I2S_SYNCBUSY_Type</a>;</div>
<div class="line"><a name="l00392"></a><span class="lineno"> 392</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00393"></a><span class="lineno"> 393</span>&#160; </div>
<div class="line"><a name="l00394"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a0cd04094390fbef4453649aee09aa9d4"> 394</a></span>&#160;<span class="preprocessor">#define I2S_SYNCBUSY_OFFSET 0x18 </span></div>
<div class="line"><a name="l00395"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a6056c0d1259c0880975992ee251302eb"> 395</a></span>&#160;<span class="preprocessor">#define I2S_SYNCBUSY_RESETVALUE _U_(0x0000) </span></div>
<div class="line"><a name="l00397"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a0735d318b474ea6b9e13243f244300d7"> 397</a></span>&#160;<span class="preprocessor">#define I2S_SYNCBUSY_SWRST_Pos 0 </span></div>
<div class="line"><a name="l00398"></a><span class="lineno"> 398</span>&#160;<span class="preprocessor">#define I2S_SYNCBUSY_SWRST (_U_(0x1) &lt;&lt; I2S_SYNCBUSY_SWRST_Pos)</span></div>
<div class="line"><a name="l00399"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a783d665b2de37a5eab0a52f8c7ff3d2d"> 399</a></span>&#160;<span class="preprocessor">#define I2S_SYNCBUSY_ENABLE_Pos 1 </span></div>
<div class="line"><a name="l00400"></a><span class="lineno"> 400</span>&#160;<span class="preprocessor">#define I2S_SYNCBUSY_ENABLE (_U_(0x1) &lt;&lt; I2S_SYNCBUSY_ENABLE_Pos)</span></div>
<div class="line"><a name="l00401"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#aad9165400f5446588625f6c8f431ea03"> 401</a></span>&#160;<span class="preprocessor">#define I2S_SYNCBUSY_CKEN0_Pos 2 </span></div>
<div class="line"><a name="l00402"></a><span class="lineno"> 402</span>&#160;<span class="preprocessor">#define I2S_SYNCBUSY_CKEN0 (_U_(1) &lt;&lt; I2S_SYNCBUSY_CKEN0_Pos)</span></div>
<div class="line"><a name="l00403"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#ade7d604973323633d18920cbc18ad843"> 403</a></span>&#160;<span class="preprocessor">#define I2S_SYNCBUSY_CKEN1_Pos 3 </span></div>
<div class="line"><a name="l00404"></a><span class="lineno"> 404</span>&#160;<span class="preprocessor">#define I2S_SYNCBUSY_CKEN1 (_U_(1) &lt;&lt; I2S_SYNCBUSY_CKEN1_Pos)</span></div>
<div class="line"><a name="l00405"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a923903cb1b27cc2aef70f3cb8417f5fb"> 405</a></span>&#160;<span class="preprocessor">#define I2S_SYNCBUSY_CKEN_Pos 2 </span></div>
<div class="line"><a name="l00406"></a><span class="lineno"> 406</span>&#160;<span class="preprocessor">#define I2S_SYNCBUSY_CKEN_Msk (_U_(0x3) &lt;&lt; I2S_SYNCBUSY_CKEN_Pos)</span></div>
<div class="line"><a name="l00407"></a><span class="lineno"> 407</span>&#160;<span class="preprocessor">#define I2S_SYNCBUSY_CKEN(value) (I2S_SYNCBUSY_CKEN_Msk &amp; ((value) &lt;&lt; I2S_SYNCBUSY_CKEN_Pos))</span></div>
<div class="line"><a name="l00408"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a5c5a708036d8cdf1223e5094eef9fe65"> 408</a></span>&#160;<span class="preprocessor">#define I2S_SYNCBUSY_TXEN_Pos 4 </span></div>
<div class="line"><a name="l00409"></a><span class="lineno"> 409</span>&#160;<span class="preprocessor">#define I2S_SYNCBUSY_TXEN (_U_(0x1) &lt;&lt; I2S_SYNCBUSY_TXEN_Pos)</span></div>
<div class="line"><a name="l00410"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a1b6cc3cec4808e223738c1fede7d8c89"> 410</a></span>&#160;<span class="preprocessor">#define I2S_SYNCBUSY_RXEN_Pos 5 </span></div>
<div class="line"><a name="l00411"></a><span class="lineno"> 411</span>&#160;<span class="preprocessor">#define I2S_SYNCBUSY_RXEN (_U_(0x1) &lt;&lt; I2S_SYNCBUSY_RXEN_Pos)</span></div>
<div class="line"><a name="l00412"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a684051dd31b98aba39a2b19f2bb434ac"> 412</a></span>&#160;<span class="preprocessor">#define I2S_SYNCBUSY_TXDATA_Pos 8 </span></div>
<div class="line"><a name="l00413"></a><span class="lineno"> 413</span>&#160;<span class="preprocessor">#define I2S_SYNCBUSY_TXDATA (_U_(0x1) &lt;&lt; I2S_SYNCBUSY_TXDATA_Pos)</span></div>
<div class="line"><a name="l00414"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#ab8d696fef77572b1fec4333606cbd456"> 414</a></span>&#160;<span class="preprocessor">#define I2S_SYNCBUSY_RXDATA_Pos 9 </span></div>
<div class="line"><a name="l00415"></a><span class="lineno"> 415</span>&#160;<span class="preprocessor">#define I2S_SYNCBUSY_RXDATA (_U_(0x1) &lt;&lt; I2S_SYNCBUSY_RXDATA_Pos)</span></div>
<div class="line"><a name="l00416"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a662c1a0e01af60d4d9bcd3974cbea0c8"> 416</a></span>&#160;<span class="preprocessor">#define I2S_SYNCBUSY_MASK _U_(0x033F) </span></div>
<div class="line"><a name="l00418"></a><span class="lineno"> 418</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- I2S_TXCTRL : (I2S Offset: 0x20) (R/W 32) Tx Serializer Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00419"></a><span class="lineno"> 419</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00420"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html"> 420</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00421"></a><span class="lineno"> 421</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00422"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#af838f46df440ebc1d5e621a42b976349"> 422</a></span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00423"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#a98814e258fdceaba07b11e464cc73fb9"> 423</a></span>&#160; uint32_t <a class="code" href="unionI2S__TXCTRL__Type.html#a98814e258fdceaba07b11e464cc73fb9">TXDEFAULT</a>:2; </div>
<div class="line"><a name="l00424"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#a22da1294200674e368863182d8611ebc"> 424</a></span>&#160; uint32_t <a class="code" href="unionI2S__TXCTRL__Type.html#a22da1294200674e368863182d8611ebc">TXSAME</a>:1; </div>
<div class="line"><a name="l00425"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#af65b36eee5bb2c317f85fde6ecadbc69"> 425</a></span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00426"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#a559b8bdb868aa8786d898a233967d7b5"> 426</a></span>&#160; uint32_t <a class="code" href="unionI2S__TXCTRL__Type.html#a559b8bdb868aa8786d898a233967d7b5">SLOTADJ</a>:1; </div>
<div class="line"><a name="l00427"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#a3e05ceb63c3141b53a1032e68441e62c"> 427</a></span>&#160; uint32_t <a class="code" href="unionI2S__TXCTRL__Type.html#a3e05ceb63c3141b53a1032e68441e62c">DATASIZE</a>:3; </div>
<div class="line"><a name="l00428"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#a580efbdca8a45aaaf06e6b484894c281"> 428</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00429"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#af478084a4ad29de47ca3420f18d941b3"> 429</a></span>&#160; uint32_t <a class="code" href="unionI2S__TXCTRL__Type.html#af478084a4ad29de47ca3420f18d941b3">WORDADJ</a>:1; </div>
<div class="line"><a name="l00430"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#af6b251c4c6fd187d6fdf9a8546375356"> 430</a></span>&#160; uint32_t <a class="code" href="unionI2S__TXCTRL__Type.html#af6b251c4c6fd187d6fdf9a8546375356">EXTEND</a>:2; </div>
<div class="line"><a name="l00431"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#ae0b5c19b010ff11eadbc3dfb798fc562"> 431</a></span>&#160; uint32_t <a class="code" href="unionI2S__TXCTRL__Type.html#ae0b5c19b010ff11eadbc3dfb798fc562">BITREV</a>:1; </div>
<div class="line"><a name="l00432"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#a3f76f45c6d5daea2290e7273b466c1ab"> 432</a></span>&#160; uint32_t <a class="code" href="unionI2S__TXCTRL__Type.html#a3f76f45c6d5daea2290e7273b466c1ab">SLOTDIS0</a>:1; </div>
<div class="line"><a name="l00433"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#aedc15524c7bc831adead3e7b64bd8927"> 433</a></span>&#160; uint32_t <a class="code" href="unionI2S__TXCTRL__Type.html#aedc15524c7bc831adead3e7b64bd8927">SLOTDIS1</a>:1; </div>
<div class="line"><a name="l00434"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#ac6c190d595c9325028984aeb8e8f3ddf"> 434</a></span>&#160; uint32_t <a class="code" href="unionI2S__TXCTRL__Type.html#ac6c190d595c9325028984aeb8e8f3ddf">SLOTDIS2</a>:1; </div>
<div class="line"><a name="l00435"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#ad52586cdd33e643219d872aed0c383fa"> 435</a></span>&#160; uint32_t <a class="code" href="unionI2S__TXCTRL__Type.html#ad52586cdd33e643219d872aed0c383fa">SLOTDIS3</a>:1; </div>
<div class="line"><a name="l00436"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#acef1a8cca60a66a79145d5c06509e271"> 436</a></span>&#160; uint32_t <a class="code" href="unionI2S__TXCTRL__Type.html#acef1a8cca60a66a79145d5c06509e271">SLOTDIS4</a>:1; </div>
<div class="line"><a name="l00437"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#ac9e68a1d184ecc19c6e209ad02355907"> 437</a></span>&#160; uint32_t <a class="code" href="unionI2S__TXCTRL__Type.html#ac9e68a1d184ecc19c6e209ad02355907">SLOTDIS5</a>:1; </div>
<div class="line"><a name="l00438"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#a42c5d9f833ec4dc033252b278cfb844a"> 438</a></span>&#160; uint32_t <a class="code" href="unionI2S__TXCTRL__Type.html#a42c5d9f833ec4dc033252b278cfb844a">SLOTDIS6</a>:1; </div>
<div class="line"><a name="l00439"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#a258404b585daa336912a9fad19a6cfe0"> 439</a></span>&#160; uint32_t <a class="code" href="unionI2S__TXCTRL__Type.html#a258404b585daa336912a9fad19a6cfe0">SLOTDIS7</a>:1; </div>
<div class="line"><a name="l00440"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#a6b8a09a6581f03229a9dfeace12ff458"> 440</a></span>&#160; uint32_t <a class="code" href="unionI2S__TXCTRL__Type.html#a6b8a09a6581f03229a9dfeace12ff458">MONO</a>:1; </div>
<div class="line"><a name="l00441"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#ac69a754a4d98383dd8db2ac2a062d768"> 441</a></span>&#160; uint32_t <a class="code" href="unionI2S__TXCTRL__Type.html#ac69a754a4d98383dd8db2ac2a062d768">DMA</a>:1; </div>
<div class="line"><a name="l00442"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#afdcde9f165c1363fe8bd7200bad45f8e"> 442</a></span>&#160; uint32_t :6; </div>
<div class="line"><a name="l00443"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#af3b3c4c9ce7b2709330d7015facecf1a"> 443</a></span>&#160; } bit; </div>
<div class="line"><a name="l00444"></a><span class="lineno"> 444</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00445"></a><span class="lineno"> 445</span>&#160; uint32_t :16; </div>
<div class="line"><a name="l00446"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#aa831766bd941658dc9283eeeec75a456"> 446</a></span>&#160; uint32_t <a class="code" href="unionI2S__TXCTRL__Type.html#aa831766bd941658dc9283eeeec75a456">SLOTDIS</a>:8; </div>
<div class="line"><a name="l00447"></a><span class="lineno"> 447</span>&#160; uint32_t :8; </div>
<div class="line"><a name="l00448"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#a1c889d2f80144d896529aae605fdeb78"> 448</a></span>&#160; } vec; </div>
<div class="line"><a name="l00449"></a><span class="lineno"><a class="line" href="unionI2S__TXCTRL__Type.html#aee0121a7dcc2a9c163f54fa58cb70d5e"> 449</a></span>&#160; uint32_t <a class="code" href="unionI2S__TXCTRL__Type.html#aee0121a7dcc2a9c163f54fa58cb70d5e">reg</a>; </div>
<div class="line"><a name="l00450"></a><span class="lineno"> 450</span>&#160;} <a class="code" href="unionI2S__TXCTRL__Type.html">I2S_TXCTRL_Type</a>;</div>
<div class="line"><a name="l00451"></a><span class="lineno"> 451</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00452"></a><span class="lineno"> 452</span>&#160; </div>
<div class="line"><a name="l00453"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a2e34bcec02ecf6a95b16d232d03f82f1"> 453</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_OFFSET 0x20 </span></div>
<div class="line"><a name="l00454"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a569f1702a598fdee2c10aabfa7ef510b"> 454</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00456"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a4ee81fab5c877046d73633a914329bec"> 456</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_TXDEFAULT_Pos 2 </span></div>
<div class="line"><a name="l00457"></a><span class="lineno"> 457</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_TXDEFAULT_Msk (_U_(0x3) &lt;&lt; I2S_TXCTRL_TXDEFAULT_Pos)</span></div>
<div class="line"><a name="l00458"></a><span class="lineno"> 458</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_TXDEFAULT(value) (I2S_TXCTRL_TXDEFAULT_Msk &amp; ((value) &lt;&lt; I2S_TXCTRL_TXDEFAULT_Pos))</span></div>
<div class="line"><a name="l00459"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#abf5713a735b7914ddc5f2ed65255e99a"> 459</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_TXDEFAULT_ZERO_Val _U_(0x0) </span></div>
<div class="line"><a name="l00460"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a6b44b19936325c1879d3bd75cbbc29d4"> 460</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_TXDEFAULT_ONE_Val _U_(0x1) </span></div>
<div class="line"><a name="l00461"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#aa8f2f87914dcc6dd6b74ff20d9a39b28"> 461</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_TXDEFAULT_HIZ_Val _U_(0x3) </span></div>
<div class="line"><a name="l00462"></a><span class="lineno"> 462</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_TXDEFAULT_ZERO (I2S_TXCTRL_TXDEFAULT_ZERO_Val &lt;&lt; I2S_TXCTRL_TXDEFAULT_Pos)</span></div>
<div class="line"><a name="l00463"></a><span class="lineno"> 463</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_TXDEFAULT_ONE (I2S_TXCTRL_TXDEFAULT_ONE_Val &lt;&lt; I2S_TXCTRL_TXDEFAULT_Pos)</span></div>
<div class="line"><a name="l00464"></a><span class="lineno"> 464</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_TXDEFAULT_HIZ (I2S_TXCTRL_TXDEFAULT_HIZ_Val &lt;&lt; I2S_TXCTRL_TXDEFAULT_Pos)</span></div>
<div class="line"><a name="l00465"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#ae7ee47675fb5e76abf6dbe14f7699155"> 465</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_TXSAME_Pos 4 </span></div>
<div class="line"><a name="l00466"></a><span class="lineno"> 466</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_TXSAME (_U_(0x1) &lt;&lt; I2S_TXCTRL_TXSAME_Pos)</span></div>
<div class="line"><a name="l00467"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a8c9daea34ac95e8251a0c0d9c6f4fd3b"> 467</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_TXSAME_ZERO_Val _U_(0x0) </span></div>
<div class="line"><a name="l00468"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a56aa36e07182679fe675b2ccb45ef744"> 468</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_TXSAME_SAME_Val _U_(0x1) </span></div>
<div class="line"><a name="l00469"></a><span class="lineno"> 469</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_TXSAME_ZERO (I2S_TXCTRL_TXSAME_ZERO_Val &lt;&lt; I2S_TXCTRL_TXSAME_Pos)</span></div>
<div class="line"><a name="l00470"></a><span class="lineno"> 470</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_TXSAME_SAME (I2S_TXCTRL_TXSAME_SAME_Val &lt;&lt; I2S_TXCTRL_TXSAME_Pos)</span></div>
<div class="line"><a name="l00471"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a2dcef89c94502331d72c7be7d49a0715"> 471</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTADJ_Pos 7 </span></div>
<div class="line"><a name="l00472"></a><span class="lineno"> 472</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTADJ (_U_(0x1) &lt;&lt; I2S_TXCTRL_SLOTADJ_Pos)</span></div>
<div class="line"><a name="l00473"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#af6c8aad73c238dacb355279b61a5a865"> 473</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTADJ_RIGHT_Val _U_(0x0) </span></div>
<div class="line"><a name="l00474"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a3b6b42c52ca38d5dbccb44477f774191"> 474</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTADJ_LEFT_Val _U_(0x1) </span></div>
<div class="line"><a name="l00475"></a><span class="lineno"> 475</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTADJ_RIGHT (I2S_TXCTRL_SLOTADJ_RIGHT_Val &lt;&lt; I2S_TXCTRL_SLOTADJ_Pos)</span></div>
<div class="line"><a name="l00476"></a><span class="lineno"> 476</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTADJ_LEFT (I2S_TXCTRL_SLOTADJ_LEFT_Val &lt;&lt; I2S_TXCTRL_SLOTADJ_Pos)</span></div>
<div class="line"><a name="l00477"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a28c993de802c402e5792c940a7a1d467"> 477</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DATASIZE_Pos 8 </span></div>
<div class="line"><a name="l00478"></a><span class="lineno"> 478</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DATASIZE_Msk (_U_(0x7) &lt;&lt; I2S_TXCTRL_DATASIZE_Pos)</span></div>
<div class="line"><a name="l00479"></a><span class="lineno"> 479</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DATASIZE(value) (I2S_TXCTRL_DATASIZE_Msk &amp; ((value) &lt;&lt; I2S_TXCTRL_DATASIZE_Pos))</span></div>
<div class="line"><a name="l00480"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a7b82c3e309628130ac1ff7b1090a11c6"> 480</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DATASIZE_32_Val _U_(0x0) </span></div>
<div class="line"><a name="l00481"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a21e35459fb472fc624e08cf933b72409"> 481</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DATASIZE_24_Val _U_(0x1) </span></div>
<div class="line"><a name="l00482"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a2198ddb85fd954f54de0b36e05e1fb86"> 482</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DATASIZE_20_Val _U_(0x2) </span></div>
<div class="line"><a name="l00483"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a91f0b3e7f8dff05a5489498a6e718029"> 483</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DATASIZE_18_Val _U_(0x3) </span></div>
<div class="line"><a name="l00484"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a1f8d8000e3d65bc9b0013ba93063ba04"> 484</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DATASIZE_16_Val _U_(0x4) </span></div>
<div class="line"><a name="l00485"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a18f6eada090015088f017e5d71b80445"> 485</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DATASIZE_16C_Val _U_(0x5) </span></div>
<div class="line"><a name="l00486"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a85a355f001735cad1c8ea4cd34df1484"> 486</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DATASIZE_8_Val _U_(0x6) </span></div>
<div class="line"><a name="l00487"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a855a9dc60589498c0ad6e12524b39997"> 487</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DATASIZE_8C_Val _U_(0x7) </span></div>
<div class="line"><a name="l00488"></a><span class="lineno"> 488</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DATASIZE_32 (I2S_TXCTRL_DATASIZE_32_Val &lt;&lt; I2S_TXCTRL_DATASIZE_Pos)</span></div>
<div class="line"><a name="l00489"></a><span class="lineno"> 489</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DATASIZE_24 (I2S_TXCTRL_DATASIZE_24_Val &lt;&lt; I2S_TXCTRL_DATASIZE_Pos)</span></div>
<div class="line"><a name="l00490"></a><span class="lineno"> 490</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DATASIZE_20 (I2S_TXCTRL_DATASIZE_20_Val &lt;&lt; I2S_TXCTRL_DATASIZE_Pos)</span></div>
<div class="line"><a name="l00491"></a><span class="lineno"> 491</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DATASIZE_18 (I2S_TXCTRL_DATASIZE_18_Val &lt;&lt; I2S_TXCTRL_DATASIZE_Pos)</span></div>
<div class="line"><a name="l00492"></a><span class="lineno"> 492</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DATASIZE_16 (I2S_TXCTRL_DATASIZE_16_Val &lt;&lt; I2S_TXCTRL_DATASIZE_Pos)</span></div>
<div class="line"><a name="l00493"></a><span class="lineno"> 493</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DATASIZE_16C (I2S_TXCTRL_DATASIZE_16C_Val &lt;&lt; I2S_TXCTRL_DATASIZE_Pos)</span></div>
<div class="line"><a name="l00494"></a><span class="lineno"> 494</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DATASIZE_8 (I2S_TXCTRL_DATASIZE_8_Val &lt;&lt; I2S_TXCTRL_DATASIZE_Pos)</span></div>
<div class="line"><a name="l00495"></a><span class="lineno"> 495</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DATASIZE_8C (I2S_TXCTRL_DATASIZE_8C_Val &lt;&lt; I2S_TXCTRL_DATASIZE_Pos)</span></div>
<div class="line"><a name="l00496"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#acf308742ff7a9389d9f995323f248991"> 496</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_WORDADJ_Pos 12 </span></div>
<div class="line"><a name="l00497"></a><span class="lineno"> 497</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_WORDADJ (_U_(0x1) &lt;&lt; I2S_TXCTRL_WORDADJ_Pos)</span></div>
<div class="line"><a name="l00498"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#aeda58124b748aa45852fa476b80e9154"> 498</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_WORDADJ_RIGHT_Val _U_(0x0) </span></div>
<div class="line"><a name="l00499"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#aa50789c82a9bf9c026deb554b92cb193"> 499</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_WORDADJ_LEFT_Val _U_(0x1) </span></div>
<div class="line"><a name="l00500"></a><span class="lineno"> 500</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_WORDADJ_RIGHT (I2S_TXCTRL_WORDADJ_RIGHT_Val &lt;&lt; I2S_TXCTRL_WORDADJ_Pos)</span></div>
<div class="line"><a name="l00501"></a><span class="lineno"> 501</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_WORDADJ_LEFT (I2S_TXCTRL_WORDADJ_LEFT_Val &lt;&lt; I2S_TXCTRL_WORDADJ_Pos)</span></div>
<div class="line"><a name="l00502"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a37b2fd7565e71d4177be7fb170dbd7cb"> 502</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_EXTEND_Pos 13 </span></div>
<div class="line"><a name="l00503"></a><span class="lineno"> 503</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_EXTEND_Msk (_U_(0x3) &lt;&lt; I2S_TXCTRL_EXTEND_Pos)</span></div>
<div class="line"><a name="l00504"></a><span class="lineno"> 504</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_EXTEND(value) (I2S_TXCTRL_EXTEND_Msk &amp; ((value) &lt;&lt; I2S_TXCTRL_EXTEND_Pos))</span></div>
<div class="line"><a name="l00505"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a89b72a65da6a321eb0fbcac9fc8cbdb7"> 505</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_EXTEND_ZERO_Val _U_(0x0) </span></div>
<div class="line"><a name="l00506"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a1f21ff99cc1e6fd0a764600b1471362c"> 506</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_EXTEND_ONE_Val _U_(0x1) </span></div>
<div class="line"><a name="l00507"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a43d0477c416edaf7c8facf7b61d62f74"> 507</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_EXTEND_MSBIT_Val _U_(0x2) </span></div>
<div class="line"><a name="l00508"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a459c8299453f5ac1166fc16ba024b6ef"> 508</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_EXTEND_LSBIT_Val _U_(0x3) </span></div>
<div class="line"><a name="l00509"></a><span class="lineno"> 509</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_EXTEND_ZERO (I2S_TXCTRL_EXTEND_ZERO_Val &lt;&lt; I2S_TXCTRL_EXTEND_Pos)</span></div>
<div class="line"><a name="l00510"></a><span class="lineno"> 510</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_EXTEND_ONE (I2S_TXCTRL_EXTEND_ONE_Val &lt;&lt; I2S_TXCTRL_EXTEND_Pos)</span></div>
<div class="line"><a name="l00511"></a><span class="lineno"> 511</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_EXTEND_MSBIT (I2S_TXCTRL_EXTEND_MSBIT_Val &lt;&lt; I2S_TXCTRL_EXTEND_Pos)</span></div>
<div class="line"><a name="l00512"></a><span class="lineno"> 512</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_EXTEND_LSBIT (I2S_TXCTRL_EXTEND_LSBIT_Val &lt;&lt; I2S_TXCTRL_EXTEND_Pos)</span></div>
<div class="line"><a name="l00513"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#ae1b975bebe4775f0477e68de4bd61c59"> 513</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_BITREV_Pos 15 </span></div>
<div class="line"><a name="l00514"></a><span class="lineno"> 514</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_BITREV (_U_(0x1) &lt;&lt; I2S_TXCTRL_BITREV_Pos)</span></div>
<div class="line"><a name="l00515"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#af740bf2aac1cb1d02e41ff8c45f505d8"> 515</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_BITREV_MSBIT_Val _U_(0x0) </span></div>
<div class="line"><a name="l00516"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a349219787fd6652c900c28fc6c91431b"> 516</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_BITREV_LSBIT_Val _U_(0x1) </span></div>
<div class="line"><a name="l00517"></a><span class="lineno"> 517</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_BITREV_MSBIT (I2S_TXCTRL_BITREV_MSBIT_Val &lt;&lt; I2S_TXCTRL_BITREV_Pos)</span></div>
<div class="line"><a name="l00518"></a><span class="lineno"> 518</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_BITREV_LSBIT (I2S_TXCTRL_BITREV_LSBIT_Val &lt;&lt; I2S_TXCTRL_BITREV_Pos)</span></div>
<div class="line"><a name="l00519"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a5b37220966a55f4c97e447b5b5a4d5f5"> 519</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTDIS0_Pos 16 </span></div>
<div class="line"><a name="l00520"></a><span class="lineno"> 520</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTDIS0 (_U_(1) &lt;&lt; I2S_TXCTRL_SLOTDIS0_Pos)</span></div>
<div class="line"><a name="l00521"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#aebb22b299317c3b746d176b6b3c37a10"> 521</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTDIS1_Pos 17 </span></div>
<div class="line"><a name="l00522"></a><span class="lineno"> 522</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTDIS1 (_U_(1) &lt;&lt; I2S_TXCTRL_SLOTDIS1_Pos)</span></div>
<div class="line"><a name="l00523"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a926aa8edd873ca289a6266bdb3a6948d"> 523</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTDIS2_Pos 18 </span></div>
<div class="line"><a name="l00524"></a><span class="lineno"> 524</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTDIS2 (_U_(1) &lt;&lt; I2S_TXCTRL_SLOTDIS2_Pos)</span></div>
<div class="line"><a name="l00525"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#aa6b570d5fe4470934981ba98cdcf7131"> 525</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTDIS3_Pos 19 </span></div>
<div class="line"><a name="l00526"></a><span class="lineno"> 526</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTDIS3 (_U_(1) &lt;&lt; I2S_TXCTRL_SLOTDIS3_Pos)</span></div>
<div class="line"><a name="l00527"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#aad4cd0b91555f9e7fee10efcabf1b789"> 527</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTDIS4_Pos 20 </span></div>
<div class="line"><a name="l00528"></a><span class="lineno"> 528</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTDIS4 (_U_(1) &lt;&lt; I2S_TXCTRL_SLOTDIS4_Pos)</span></div>
<div class="line"><a name="l00529"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a7fa7b3f8c3a8b5f73a21e8e23ec10bac"> 529</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTDIS5_Pos 21 </span></div>
<div class="line"><a name="l00530"></a><span class="lineno"> 530</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTDIS5 (_U_(1) &lt;&lt; I2S_TXCTRL_SLOTDIS5_Pos)</span></div>
<div class="line"><a name="l00531"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a33c62bb9e584f109e68e5d3f3c31bb5f"> 531</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTDIS6_Pos 22 </span></div>
<div class="line"><a name="l00532"></a><span class="lineno"> 532</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTDIS6 (_U_(1) &lt;&lt; I2S_TXCTRL_SLOTDIS6_Pos)</span></div>
<div class="line"><a name="l00533"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a1ebbc3f080e98c930bc2c135d1790eeb"> 533</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTDIS7_Pos 23 </span></div>
<div class="line"><a name="l00534"></a><span class="lineno"> 534</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTDIS7 (_U_(1) &lt;&lt; I2S_TXCTRL_SLOTDIS7_Pos)</span></div>
<div class="line"><a name="l00535"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a2bb7b4f5c569e1af3c107e942ee93f47"> 535</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTDIS_Pos 16 </span></div>
<div class="line"><a name="l00536"></a><span class="lineno"> 536</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTDIS_Msk (_U_(0xFF) &lt;&lt; I2S_TXCTRL_SLOTDIS_Pos)</span></div>
<div class="line"><a name="l00537"></a><span class="lineno"> 537</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_SLOTDIS(value) (I2S_TXCTRL_SLOTDIS_Msk &amp; ((value) &lt;&lt; I2S_TXCTRL_SLOTDIS_Pos))</span></div>
<div class="line"><a name="l00538"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#ac6cb93d5503a1e116a386f6f6ef55c49"> 538</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_MONO_Pos 24 </span></div>
<div class="line"><a name="l00539"></a><span class="lineno"> 539</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_MONO (_U_(0x1) &lt;&lt; I2S_TXCTRL_MONO_Pos)</span></div>
<div class="line"><a name="l00540"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a71cdc71680ce9ff486d264e3d2ed8ded"> 540</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_MONO_STEREO_Val _U_(0x0) </span></div>
<div class="line"><a name="l00541"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#abcc79cb421297fcc9d0129dd4558c0d6"> 541</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_MONO_MONO_Val _U_(0x1) </span></div>
<div class="line"><a name="l00542"></a><span class="lineno"> 542</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_MONO_STEREO (I2S_TXCTRL_MONO_STEREO_Val &lt;&lt; I2S_TXCTRL_MONO_Pos)</span></div>
<div class="line"><a name="l00543"></a><span class="lineno"> 543</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_MONO_MONO (I2S_TXCTRL_MONO_MONO_Val &lt;&lt; I2S_TXCTRL_MONO_Pos)</span></div>
<div class="line"><a name="l00544"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a4244640d48bf5c939ac301c968669526"> 544</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DMA_Pos 25 </span></div>
<div class="line"><a name="l00545"></a><span class="lineno"> 545</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DMA (_U_(0x1) &lt;&lt; I2S_TXCTRL_DMA_Pos)</span></div>
<div class="line"><a name="l00546"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a46dda93f82c55912a66658f122b43bcf"> 546</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DMA_SINGLE_Val _U_(0x0) </span></div>
<div class="line"><a name="l00547"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a2be75d9e42c8f9c11c685455bb1c7420"> 547</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DMA_MULTIPLE_Val _U_(0x1) </span></div>
<div class="line"><a name="l00548"></a><span class="lineno"> 548</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DMA_SINGLE (I2S_TXCTRL_DMA_SINGLE_Val &lt;&lt; I2S_TXCTRL_DMA_Pos)</span></div>
<div class="line"><a name="l00549"></a><span class="lineno"> 549</span>&#160;<span class="preprocessor">#define I2S_TXCTRL_DMA_MULTIPLE (I2S_TXCTRL_DMA_MULTIPLE_Val &lt;&lt; I2S_TXCTRL_DMA_Pos)</span></div>
<div class="line"><a name="l00550"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#aec1e6da19a9a67218389ab7091287328"> 550</a></span>&#160;<span class="preprocessor">#define I2S_TXCTRL_MASK _U_(0x03FFF79C) </span></div>
<div class="line"><a name="l00552"></a><span class="lineno"> 552</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- I2S_RXCTRL : (I2S Offset: 0x24) (R/W 32) Rx Serializer Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00553"></a><span class="lineno"> 553</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00554"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html"> 554</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00555"></a><span class="lineno"> 555</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00556"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#aba9ddd5de046f738fe712ab59281c5d5"> 556</a></span>&#160; uint32_t <a class="code" href="unionI2S__RXCTRL__Type.html#aba9ddd5de046f738fe712ab59281c5d5">SERMODE</a>:2; </div>
<div class="line"><a name="l00557"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#aedbfda0dbfb9dcbace06740b64018fac"> 557</a></span>&#160; uint32_t :3; </div>
<div class="line"><a name="l00558"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#ae90688ada9e7395163564d05894282aa"> 558</a></span>&#160; uint32_t <a class="code" href="unionI2S__RXCTRL__Type.html#ae90688ada9e7395163564d05894282aa">CLKSEL</a>:1; </div>
<div class="line"><a name="l00559"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#a669660fa87c2931e0385403749ab1a4c"> 559</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00560"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#a0d9a1231c448fbd342cfa3e44e718699"> 560</a></span>&#160; uint32_t <a class="code" href="unionI2S__RXCTRL__Type.html#a0d9a1231c448fbd342cfa3e44e718699">SLOTADJ</a>:1; </div>
<div class="line"><a name="l00561"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#ac7a4c3935c08c20e6a000fbc97abdec7"> 561</a></span>&#160; uint32_t <a class="code" href="unionI2S__RXCTRL__Type.html#ac7a4c3935c08c20e6a000fbc97abdec7">DATASIZE</a>:3; </div>
<div class="line"><a name="l00562"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#a726e2072b978da0c9bdf7d8e260f8b27"> 562</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00563"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#abeebc9aeaf04d8880477b48497ee7a7a"> 563</a></span>&#160; uint32_t <a class="code" href="unionI2S__RXCTRL__Type.html#abeebc9aeaf04d8880477b48497ee7a7a">WORDADJ</a>:1; </div>
<div class="line"><a name="l00564"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#ada95eff3f5553b5c4a1e7ba2252012c6"> 564</a></span>&#160; uint32_t <a class="code" href="unionI2S__RXCTRL__Type.html#ada95eff3f5553b5c4a1e7ba2252012c6">EXTEND</a>:2; </div>
<div class="line"><a name="l00565"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#a4de67d5d7c32717ed4b1b6d292a8f96f"> 565</a></span>&#160; uint32_t <a class="code" href="unionI2S__RXCTRL__Type.html#a4de67d5d7c32717ed4b1b6d292a8f96f">BITREV</a>:1; </div>
<div class="line"><a name="l00566"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#adf981442341f4668504177e992d0c31f"> 566</a></span>&#160; uint32_t <a class="code" href="unionI2S__RXCTRL__Type.html#adf981442341f4668504177e992d0c31f">SLOTDIS0</a>:1; </div>
<div class="line"><a name="l00567"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#a5a8d66d42738e22adee449b8f3af485e"> 567</a></span>&#160; uint32_t <a class="code" href="unionI2S__RXCTRL__Type.html#a5a8d66d42738e22adee449b8f3af485e">SLOTDIS1</a>:1; </div>
<div class="line"><a name="l00568"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#a23ebb2a78ffc06a104310c7c9285525e"> 568</a></span>&#160; uint32_t <a class="code" href="unionI2S__RXCTRL__Type.html#a23ebb2a78ffc06a104310c7c9285525e">SLOTDIS2</a>:1; </div>
<div class="line"><a name="l00569"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#ac138a12fd05522a549655bf2963f2a41"> 569</a></span>&#160; uint32_t <a class="code" href="unionI2S__RXCTRL__Type.html#ac138a12fd05522a549655bf2963f2a41">SLOTDIS3</a>:1; </div>
<div class="line"><a name="l00570"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#afefa7f5770421e1c4dabe5d8adfb1f88"> 570</a></span>&#160; uint32_t <a class="code" href="unionI2S__RXCTRL__Type.html#afefa7f5770421e1c4dabe5d8adfb1f88">SLOTDIS4</a>:1; </div>
<div class="line"><a name="l00571"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#a082b3486e69497ea9b7aa4df2dfa8970"> 571</a></span>&#160; uint32_t <a class="code" href="unionI2S__RXCTRL__Type.html#a082b3486e69497ea9b7aa4df2dfa8970">SLOTDIS5</a>:1; </div>
<div class="line"><a name="l00572"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#a1e7e09e7b7227099d1512035d6a174e5"> 572</a></span>&#160; uint32_t <a class="code" href="unionI2S__RXCTRL__Type.html#a1e7e09e7b7227099d1512035d6a174e5">SLOTDIS6</a>:1; </div>
<div class="line"><a name="l00573"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#a757cf8716729db37e19fd34be08cd312"> 573</a></span>&#160; uint32_t <a class="code" href="unionI2S__RXCTRL__Type.html#a757cf8716729db37e19fd34be08cd312">SLOTDIS7</a>:1; </div>
<div class="line"><a name="l00574"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#a919dc55b450ace43bbf9aa7a2fa74de4"> 574</a></span>&#160; uint32_t <a class="code" href="unionI2S__RXCTRL__Type.html#a919dc55b450ace43bbf9aa7a2fa74de4">MONO</a>:1; </div>
<div class="line"><a name="l00575"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#a2d3bae28ed77e03c7ab7d34bd22e5d92"> 575</a></span>&#160; uint32_t <a class="code" href="unionI2S__RXCTRL__Type.html#a2d3bae28ed77e03c7ab7d34bd22e5d92">DMA</a>:1; </div>
<div class="line"><a name="l00576"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#a576513356a4cf1550b381c7a30214516"> 576</a></span>&#160; uint32_t <a class="code" href="unionI2S__RXCTRL__Type.html#a576513356a4cf1550b381c7a30214516">RXLOOP</a>:1; </div>
<div class="line"><a name="l00577"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#a8b438a2b50e5fc4c54cf69b6b33d8402"> 577</a></span>&#160; uint32_t :5; </div>
<div class="line"><a name="l00578"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#aaf79a171eed95ae6a1353aa7dc05f2ac"> 578</a></span>&#160; } bit; </div>
<div class="line"><a name="l00579"></a><span class="lineno"> 579</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00580"></a><span class="lineno"> 580</span>&#160; uint32_t :16; </div>
<div class="line"><a name="l00581"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#a01486646c58e79e1fa584e5edd996dee"> 581</a></span>&#160; uint32_t <a class="code" href="unionI2S__RXCTRL__Type.html#a01486646c58e79e1fa584e5edd996dee">SLOTDIS</a>:8; </div>
<div class="line"><a name="l00582"></a><span class="lineno"> 582</span>&#160; uint32_t :8; </div>
<div class="line"><a name="l00583"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#afe15d53b8c19211a306914e5ed46926f"> 583</a></span>&#160; } vec; </div>
<div class="line"><a name="l00584"></a><span class="lineno"><a class="line" href="unionI2S__RXCTRL__Type.html#afa06d5166038e65e4544191c92237f85"> 584</a></span>&#160; uint32_t <a class="code" href="unionI2S__RXCTRL__Type.html#afa06d5166038e65e4544191c92237f85">reg</a>; </div>
<div class="line"><a name="l00585"></a><span class="lineno"> 585</span>&#160;} <a class="code" href="unionI2S__RXCTRL__Type.html">I2S_RXCTRL_Type</a>;</div>
<div class="line"><a name="l00586"></a><span class="lineno"> 586</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00587"></a><span class="lineno"> 587</span>&#160; </div>
<div class="line"><a name="l00588"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a20ef159c381b0d3f9bdcb88e22dac048"> 588</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_OFFSET 0x24 </span></div>
<div class="line"><a name="l00589"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a1d4fd8bc89985b67f1c3e567d8e235f0"> 589</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00591"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a0e3aefa2716526f84eedd3de813c7470"> 591</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SERMODE_Pos 0 </span></div>
<div class="line"><a name="l00592"></a><span class="lineno"> 592</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SERMODE_Msk (_U_(0x3) &lt;&lt; I2S_RXCTRL_SERMODE_Pos)</span></div>
<div class="line"><a name="l00593"></a><span class="lineno"> 593</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SERMODE(value) (I2S_RXCTRL_SERMODE_Msk &amp; ((value) &lt;&lt; I2S_RXCTRL_SERMODE_Pos))</span></div>
<div class="line"><a name="l00594"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a8b3f26e178ed08e633d945067b4a7249"> 594</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SERMODE_RX_Val _U_(0x0) </span></div>
<div class="line"><a name="l00595"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a6f10754a9b32ad10f3cb4d7483e2ca49"> 595</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SERMODE_PDM2_Val _U_(0x2) </span></div>
<div class="line"><a name="l00596"></a><span class="lineno"> 596</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SERMODE_RX (I2S_RXCTRL_SERMODE_RX_Val &lt;&lt; I2S_RXCTRL_SERMODE_Pos)</span></div>
<div class="line"><a name="l00597"></a><span class="lineno"> 597</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SERMODE_PDM2 (I2S_RXCTRL_SERMODE_PDM2_Val &lt;&lt; I2S_RXCTRL_SERMODE_Pos)</span></div>
<div class="line"><a name="l00598"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a651115fd712c9d92b2afa088a6ea9ba4"> 598</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_CLKSEL_Pos 5 </span></div>
<div class="line"><a name="l00599"></a><span class="lineno"> 599</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_CLKSEL (_U_(0x1) &lt;&lt; I2S_RXCTRL_CLKSEL_Pos)</span></div>
<div class="line"><a name="l00600"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a1bf5e6a62ea3c9152ccded8930946871"> 600</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_CLKSEL_CLK0_Val _U_(0x0) </span></div>
<div class="line"><a name="l00601"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#ab5566340ff2baa8b4144fad7ef03d699"> 601</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_CLKSEL_CLK1_Val _U_(0x1) </span></div>
<div class="line"><a name="l00602"></a><span class="lineno"> 602</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_CLKSEL_CLK0 (I2S_RXCTRL_CLKSEL_CLK0_Val &lt;&lt; I2S_RXCTRL_CLKSEL_Pos)</span></div>
<div class="line"><a name="l00603"></a><span class="lineno"> 603</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_CLKSEL_CLK1 (I2S_RXCTRL_CLKSEL_CLK1_Val &lt;&lt; I2S_RXCTRL_CLKSEL_Pos)</span></div>
<div class="line"><a name="l00604"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#abb4d28db80499ecd44a89f9719b78a65"> 604</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTADJ_Pos 7 </span></div>
<div class="line"><a name="l00605"></a><span class="lineno"> 605</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTADJ (_U_(0x1) &lt;&lt; I2S_RXCTRL_SLOTADJ_Pos)</span></div>
<div class="line"><a name="l00606"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a9062e73bee32d548de7e9f5d5d45a917"> 606</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTADJ_RIGHT_Val _U_(0x0) </span></div>
<div class="line"><a name="l00607"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#adb489860994fc1b15e98af9b5d043ab0"> 607</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTADJ_LEFT_Val _U_(0x1) </span></div>
<div class="line"><a name="l00608"></a><span class="lineno"> 608</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTADJ_RIGHT (I2S_RXCTRL_SLOTADJ_RIGHT_Val &lt;&lt; I2S_RXCTRL_SLOTADJ_Pos)</span></div>
<div class="line"><a name="l00609"></a><span class="lineno"> 609</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTADJ_LEFT (I2S_RXCTRL_SLOTADJ_LEFT_Val &lt;&lt; I2S_RXCTRL_SLOTADJ_Pos)</span></div>
<div class="line"><a name="l00610"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#ab02b820857f008f6dce1a3b2aca8abdf"> 610</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DATASIZE_Pos 8 </span></div>
<div class="line"><a name="l00611"></a><span class="lineno"> 611</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DATASIZE_Msk (_U_(0x7) &lt;&lt; I2S_RXCTRL_DATASIZE_Pos)</span></div>
<div class="line"><a name="l00612"></a><span class="lineno"> 612</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DATASIZE(value) (I2S_RXCTRL_DATASIZE_Msk &amp; ((value) &lt;&lt; I2S_RXCTRL_DATASIZE_Pos))</span></div>
<div class="line"><a name="l00613"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a382da5627a63d7a6c98674de4a5ba03d"> 613</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DATASIZE_32_Val _U_(0x0) </span></div>
<div class="line"><a name="l00614"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a10c8a4e2f20063d37fa2d24027718829"> 614</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DATASIZE_24_Val _U_(0x1) </span></div>
<div class="line"><a name="l00615"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#afdb0227564c5d171483a812ba25a9b5a"> 615</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DATASIZE_20_Val _U_(0x2) </span></div>
<div class="line"><a name="l00616"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a9aa9c80f04de2464087be188b988481d"> 616</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DATASIZE_18_Val _U_(0x3) </span></div>
<div class="line"><a name="l00617"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a47e69a45e045535406ad55e11ad5d71c"> 617</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DATASIZE_16_Val _U_(0x4) </span></div>
<div class="line"><a name="l00618"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a4e55a2002f9093bb01be018bbd7459ac"> 618</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DATASIZE_16C_Val _U_(0x5) </span></div>
<div class="line"><a name="l00619"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a6ab4f649f427ba70829ead258480e3f2"> 619</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DATASIZE_8_Val _U_(0x6) </span></div>
<div class="line"><a name="l00620"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a64ebb00aef17da0a3250559554e51fd2"> 620</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DATASIZE_8C_Val _U_(0x7) </span></div>
<div class="line"><a name="l00621"></a><span class="lineno"> 621</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DATASIZE_32 (I2S_RXCTRL_DATASIZE_32_Val &lt;&lt; I2S_RXCTRL_DATASIZE_Pos)</span></div>
<div class="line"><a name="l00622"></a><span class="lineno"> 622</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DATASIZE_24 (I2S_RXCTRL_DATASIZE_24_Val &lt;&lt; I2S_RXCTRL_DATASIZE_Pos)</span></div>
<div class="line"><a name="l00623"></a><span class="lineno"> 623</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DATASIZE_20 (I2S_RXCTRL_DATASIZE_20_Val &lt;&lt; I2S_RXCTRL_DATASIZE_Pos)</span></div>
<div class="line"><a name="l00624"></a><span class="lineno"> 624</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DATASIZE_18 (I2S_RXCTRL_DATASIZE_18_Val &lt;&lt; I2S_RXCTRL_DATASIZE_Pos)</span></div>
<div class="line"><a name="l00625"></a><span class="lineno"> 625</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DATASIZE_16 (I2S_RXCTRL_DATASIZE_16_Val &lt;&lt; I2S_RXCTRL_DATASIZE_Pos)</span></div>
<div class="line"><a name="l00626"></a><span class="lineno"> 626</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DATASIZE_16C (I2S_RXCTRL_DATASIZE_16C_Val &lt;&lt; I2S_RXCTRL_DATASIZE_Pos)</span></div>
<div class="line"><a name="l00627"></a><span class="lineno"> 627</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DATASIZE_8 (I2S_RXCTRL_DATASIZE_8_Val &lt;&lt; I2S_RXCTRL_DATASIZE_Pos)</span></div>
<div class="line"><a name="l00628"></a><span class="lineno"> 628</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DATASIZE_8C (I2S_RXCTRL_DATASIZE_8C_Val &lt;&lt; I2S_RXCTRL_DATASIZE_Pos)</span></div>
<div class="line"><a name="l00629"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a40c17f1a66744acba8807f3655deca3f"> 629</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_WORDADJ_Pos 12 </span></div>
<div class="line"><a name="l00630"></a><span class="lineno"> 630</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_WORDADJ (_U_(0x1) &lt;&lt; I2S_RXCTRL_WORDADJ_Pos)</span></div>
<div class="line"><a name="l00631"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a0ef32bad8115a443570b008e0a89a77a"> 631</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_WORDADJ_RIGHT_Val _U_(0x0) </span></div>
<div class="line"><a name="l00632"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a59746517d26d97df6ad8e3b6317bd2ad"> 632</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_WORDADJ_LEFT_Val _U_(0x1) </span></div>
<div class="line"><a name="l00633"></a><span class="lineno"> 633</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_WORDADJ_RIGHT (I2S_RXCTRL_WORDADJ_RIGHT_Val &lt;&lt; I2S_RXCTRL_WORDADJ_Pos)</span></div>
<div class="line"><a name="l00634"></a><span class="lineno"> 634</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_WORDADJ_LEFT (I2S_RXCTRL_WORDADJ_LEFT_Val &lt;&lt; I2S_RXCTRL_WORDADJ_Pos)</span></div>
<div class="line"><a name="l00635"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a57b4866cd968ac5f4c10d28a70b2fef6"> 635</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_EXTEND_Pos 13 </span></div>
<div class="line"><a name="l00636"></a><span class="lineno"> 636</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_EXTEND_Msk (_U_(0x3) &lt;&lt; I2S_RXCTRL_EXTEND_Pos)</span></div>
<div class="line"><a name="l00637"></a><span class="lineno"> 637</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_EXTEND(value) (I2S_RXCTRL_EXTEND_Msk &amp; ((value) &lt;&lt; I2S_RXCTRL_EXTEND_Pos))</span></div>
<div class="line"><a name="l00638"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a8d87ac641c726722fa04c7dbe206968d"> 638</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_EXTEND_ZERO_Val _U_(0x0) </span></div>
<div class="line"><a name="l00639"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#abfafaba50aaa222fd4e4e0e917bf1f4e"> 639</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_EXTEND_ONE_Val _U_(0x1) </span></div>
<div class="line"><a name="l00640"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a9609b632d91bb077c22d232fa15e7e9e"> 640</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_EXTEND_MSBIT_Val _U_(0x2) </span></div>
<div class="line"><a name="l00641"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#acca345974d2174e3c4545622ea6d76da"> 641</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_EXTEND_LSBIT_Val _U_(0x3) </span></div>
<div class="line"><a name="l00642"></a><span class="lineno"> 642</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_EXTEND_ZERO (I2S_RXCTRL_EXTEND_ZERO_Val &lt;&lt; I2S_RXCTRL_EXTEND_Pos)</span></div>
<div class="line"><a name="l00643"></a><span class="lineno"> 643</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_EXTEND_ONE (I2S_RXCTRL_EXTEND_ONE_Val &lt;&lt; I2S_RXCTRL_EXTEND_Pos)</span></div>
<div class="line"><a name="l00644"></a><span class="lineno"> 644</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_EXTEND_MSBIT (I2S_RXCTRL_EXTEND_MSBIT_Val &lt;&lt; I2S_RXCTRL_EXTEND_Pos)</span></div>
<div class="line"><a name="l00645"></a><span class="lineno"> 645</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_EXTEND_LSBIT (I2S_RXCTRL_EXTEND_LSBIT_Val &lt;&lt; I2S_RXCTRL_EXTEND_Pos)</span></div>
<div class="line"><a name="l00646"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a483344f9eb7d762425531749ca656065"> 646</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_BITREV_Pos 15 </span></div>
<div class="line"><a name="l00647"></a><span class="lineno"> 647</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_BITREV (_U_(0x1) &lt;&lt; I2S_RXCTRL_BITREV_Pos)</span></div>
<div class="line"><a name="l00648"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a328d2ab97927812391d0c5d42fdf47bd"> 648</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_BITREV_MSBIT_Val _U_(0x0) </span></div>
<div class="line"><a name="l00649"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a4189215c57c5f54690a43a016562e256"> 649</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_BITREV_LSBIT_Val _U_(0x1) </span></div>
<div class="line"><a name="l00650"></a><span class="lineno"> 650</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_BITREV_MSBIT (I2S_RXCTRL_BITREV_MSBIT_Val &lt;&lt; I2S_RXCTRL_BITREV_Pos)</span></div>
<div class="line"><a name="l00651"></a><span class="lineno"> 651</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_BITREV_LSBIT (I2S_RXCTRL_BITREV_LSBIT_Val &lt;&lt; I2S_RXCTRL_BITREV_Pos)</span></div>
<div class="line"><a name="l00652"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a1bea8cedd534e39f72a7856fcd4df913"> 652</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTDIS0_Pos 16 </span></div>
<div class="line"><a name="l00653"></a><span class="lineno"> 653</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTDIS0 (_U_(1) &lt;&lt; I2S_RXCTRL_SLOTDIS0_Pos)</span></div>
<div class="line"><a name="l00654"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a33eb8ff4391f73c9c0a29c3999d8bc0c"> 654</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTDIS1_Pos 17 </span></div>
<div class="line"><a name="l00655"></a><span class="lineno"> 655</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTDIS1 (_U_(1) &lt;&lt; I2S_RXCTRL_SLOTDIS1_Pos)</span></div>
<div class="line"><a name="l00656"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a96d36b7da56a1dc773afbe44b17ee4d5"> 656</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTDIS2_Pos 18 </span></div>
<div class="line"><a name="l00657"></a><span class="lineno"> 657</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTDIS2 (_U_(1) &lt;&lt; I2S_RXCTRL_SLOTDIS2_Pos)</span></div>
<div class="line"><a name="l00658"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a4bf54a466964d32665c1e561a62b682c"> 658</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTDIS3_Pos 19 </span></div>
<div class="line"><a name="l00659"></a><span class="lineno"> 659</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTDIS3 (_U_(1) &lt;&lt; I2S_RXCTRL_SLOTDIS3_Pos)</span></div>
<div class="line"><a name="l00660"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a3b7cfb3be624e94a4a9fbbeb4cf6ae6c"> 660</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTDIS4_Pos 20 </span></div>
<div class="line"><a name="l00661"></a><span class="lineno"> 661</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTDIS4 (_U_(1) &lt;&lt; I2S_RXCTRL_SLOTDIS4_Pos)</span></div>
<div class="line"><a name="l00662"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a0cc263101bbc164ee3073843c512b799"> 662</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTDIS5_Pos 21 </span></div>
<div class="line"><a name="l00663"></a><span class="lineno"> 663</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTDIS5 (_U_(1) &lt;&lt; I2S_RXCTRL_SLOTDIS5_Pos)</span></div>
<div class="line"><a name="l00664"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#ad8c4ff976e4aef052e9c504ba2fe9eb6"> 664</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTDIS6_Pos 22 </span></div>
<div class="line"><a name="l00665"></a><span class="lineno"> 665</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTDIS6 (_U_(1) &lt;&lt; I2S_RXCTRL_SLOTDIS6_Pos)</span></div>
<div class="line"><a name="l00666"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#ae2ed8f19af21a758099dc050e97099b6"> 666</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTDIS7_Pos 23 </span></div>
<div class="line"><a name="l00667"></a><span class="lineno"> 667</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTDIS7 (_U_(1) &lt;&lt; I2S_RXCTRL_SLOTDIS7_Pos)</span></div>
<div class="line"><a name="l00668"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a8ea445e37a78507cae01076d7583ec8b"> 668</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTDIS_Pos 16 </span></div>
<div class="line"><a name="l00669"></a><span class="lineno"> 669</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTDIS_Msk (_U_(0xFF) &lt;&lt; I2S_RXCTRL_SLOTDIS_Pos)</span></div>
<div class="line"><a name="l00670"></a><span class="lineno"> 670</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_SLOTDIS(value) (I2S_RXCTRL_SLOTDIS_Msk &amp; ((value) &lt;&lt; I2S_RXCTRL_SLOTDIS_Pos))</span></div>
<div class="line"><a name="l00671"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#ac84304637c46e1c504eab48099e2a5d5"> 671</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_MONO_Pos 24 </span></div>
<div class="line"><a name="l00672"></a><span class="lineno"> 672</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_MONO (_U_(0x1) &lt;&lt; I2S_RXCTRL_MONO_Pos)</span></div>
<div class="line"><a name="l00673"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a57b383a9544d35949f9c541d14f9f0cd"> 673</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_MONO_STEREO_Val _U_(0x0) </span></div>
<div class="line"><a name="l00674"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#adeb03f3d85e233df41c7bf9dc1815efd"> 674</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_MONO_MONO_Val _U_(0x1) </span></div>
<div class="line"><a name="l00675"></a><span class="lineno"> 675</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_MONO_STEREO (I2S_RXCTRL_MONO_STEREO_Val &lt;&lt; I2S_RXCTRL_MONO_Pos)</span></div>
<div class="line"><a name="l00676"></a><span class="lineno"> 676</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_MONO_MONO (I2S_RXCTRL_MONO_MONO_Val &lt;&lt; I2S_RXCTRL_MONO_Pos)</span></div>
<div class="line"><a name="l00677"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a5a300a1a8820ef8c25efb483c5e55bd6"> 677</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DMA_Pos 25 </span></div>
<div class="line"><a name="l00678"></a><span class="lineno"> 678</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DMA (_U_(0x1) &lt;&lt; I2S_RXCTRL_DMA_Pos)</span></div>
<div class="line"><a name="l00679"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a120be82e1fceec25d7a921abd34f61bc"> 679</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DMA_SINGLE_Val _U_(0x0) </span></div>
<div class="line"><a name="l00680"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a5822f4572a509a97827ed13a7033201b"> 680</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DMA_MULTIPLE_Val _U_(0x1) </span></div>
<div class="line"><a name="l00681"></a><span class="lineno"> 681</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DMA_SINGLE (I2S_RXCTRL_DMA_SINGLE_Val &lt;&lt; I2S_RXCTRL_DMA_Pos)</span></div>
<div class="line"><a name="l00682"></a><span class="lineno"> 682</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_DMA_MULTIPLE (I2S_RXCTRL_DMA_MULTIPLE_Val &lt;&lt; I2S_RXCTRL_DMA_Pos)</span></div>
<div class="line"><a name="l00683"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a7efe036f26ad1909176af6ebc151a430"> 683</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_RXLOOP_Pos 26 </span></div>
<div class="line"><a name="l00684"></a><span class="lineno"> 684</span>&#160;<span class="preprocessor">#define I2S_RXCTRL_RXLOOP (_U_(0x1) &lt;&lt; I2S_RXCTRL_RXLOOP_Pos)</span></div>
<div class="line"><a name="l00685"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a6d8503b0dc93eb0901b6dc1618ffc716"> 685</a></span>&#160;<span class="preprocessor">#define I2S_RXCTRL_MASK _U_(0x07FFF7A3) </span></div>
<div class="line"><a name="l00687"></a><span class="lineno"> 687</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- I2S_TXDATA : (I2S Offset: 0x30) ( /W 32) Tx Data -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00688"></a><span class="lineno"> 688</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00689"></a><span class="lineno"><a class="line" href="unionI2S__TXDATA__Type.html"> 689</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00690"></a><span class="lineno"> 690</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00691"></a><span class="lineno"><a class="line" href="unionI2S__TXDATA__Type.html#a9eed35ab037d97a6b16a3074df1a8281"> 691</a></span>&#160; uint32_t <a class="code" href="unionI2S__TXDATA__Type.html#a9eed35ab037d97a6b16a3074df1a8281">DATA</a>:32; </div>
<div class="line"><a name="l00692"></a><span class="lineno"><a class="line" href="unionI2S__TXDATA__Type.html#a5760513b247e2fae0cf39c0331b606aa"> 692</a></span>&#160; } bit; </div>
<div class="line"><a name="l00693"></a><span class="lineno"><a class="line" href="unionI2S__TXDATA__Type.html#a58b46027f6566c55a4f66bd0cf967c33"> 693</a></span>&#160; uint32_t <a class="code" href="unionI2S__TXDATA__Type.html#a58b46027f6566c55a4f66bd0cf967c33">reg</a>; </div>
<div class="line"><a name="l00694"></a><span class="lineno"> 694</span>&#160;} <a class="code" href="unionI2S__TXDATA__Type.html">I2S_TXDATA_Type</a>;</div>
<div class="line"><a name="l00695"></a><span class="lineno"> 695</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00696"></a><span class="lineno"> 696</span>&#160; </div>
<div class="line"><a name="l00697"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#ada12d7efed336775d229dfe14c65a307"> 697</a></span>&#160;<span class="preprocessor">#define I2S_TXDATA_OFFSET 0x30 </span></div>
<div class="line"><a name="l00698"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#ada26aa0aeee2b7e61667114cd23d9dff"> 698</a></span>&#160;<span class="preprocessor">#define I2S_TXDATA_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00700"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#afbc4a3c6619ccc1fc90e94e9ef78bb55"> 700</a></span>&#160;<span class="preprocessor">#define I2S_TXDATA_DATA_Pos 0 </span></div>
<div class="line"><a name="l00701"></a><span class="lineno"> 701</span>&#160;<span class="preprocessor">#define I2S_TXDATA_DATA_Msk (_U_(0xFFFFFFFF) &lt;&lt; I2S_TXDATA_DATA_Pos)</span></div>
<div class="line"><a name="l00702"></a><span class="lineno"> 702</span>&#160;<span class="preprocessor">#define I2S_TXDATA_DATA(value) (I2S_TXDATA_DATA_Msk &amp; ((value) &lt;&lt; I2S_TXDATA_DATA_Pos))</span></div>
<div class="line"><a name="l00703"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a6f307db1494c5c7e1d21bb43ad8c756c"> 703</a></span>&#160;<span class="preprocessor">#define I2S_TXDATA_MASK _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00705"></a><span class="lineno"> 705</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- I2S_RXDATA : (I2S Offset: 0x34) (R/ 32) Rx Data -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00706"></a><span class="lineno"> 706</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00707"></a><span class="lineno"><a class="line" href="unionI2S__RXDATA__Type.html"> 707</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00708"></a><span class="lineno"> 708</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00709"></a><span class="lineno"><a class="line" href="unionI2S__RXDATA__Type.html#a63aab98de0cbc0ef0224ae2ac6bc5ee0"> 709</a></span>&#160; uint32_t <a class="code" href="unionI2S__RXDATA__Type.html#a63aab98de0cbc0ef0224ae2ac6bc5ee0">DATA</a>:32; </div>
<div class="line"><a name="l00710"></a><span class="lineno"><a class="line" href="unionI2S__RXDATA__Type.html#ad176df08d4851b6aae4d087cdefa0f18"> 710</a></span>&#160; } bit; </div>
<div class="line"><a name="l00711"></a><span class="lineno"><a class="line" href="unionI2S__RXDATA__Type.html#a905c04aaefc6dd65659afa9a23815180"> 711</a></span>&#160; uint32_t <a class="code" href="unionI2S__RXDATA__Type.html#a905c04aaefc6dd65659afa9a23815180">reg</a>; </div>
<div class="line"><a name="l00712"></a><span class="lineno"> 712</span>&#160;} <a class="code" href="unionI2S__RXDATA__Type.html">I2S_RXDATA_Type</a>;</div>
<div class="line"><a name="l00713"></a><span class="lineno"> 713</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00714"></a><span class="lineno"> 714</span>&#160; </div>
<div class="line"><a name="l00715"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a86a01925f507e5d8cfaf8d2dbd95aca5"> 715</a></span>&#160;<span class="preprocessor">#define I2S_RXDATA_OFFSET 0x34 </span></div>
<div class="line"><a name="l00716"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#abed90c12d2497812fff0fba07c6d2823"> 716</a></span>&#160;<span class="preprocessor">#define I2S_RXDATA_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00718"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a24e58dacf0ef2e194c53418b1d3949cc"> 718</a></span>&#160;<span class="preprocessor">#define I2S_RXDATA_DATA_Pos 0 </span></div>
<div class="line"><a name="l00719"></a><span class="lineno"> 719</span>&#160;<span class="preprocessor">#define I2S_RXDATA_DATA_Msk (_U_(0xFFFFFFFF) &lt;&lt; I2S_RXDATA_DATA_Pos)</span></div>
<div class="line"><a name="l00720"></a><span class="lineno"> 720</span>&#160;<span class="preprocessor">#define I2S_RXDATA_DATA(value) (I2S_RXDATA_DATA_Msk &amp; ((value) &lt;&lt; I2S_RXDATA_DATA_Pos))</span></div>
<div class="line"><a name="l00721"></a><span class="lineno"><a class="line" href="component_2i2s_8h.html#a0cbe951f14e6321ea6adfe5cbf1c3a18"> 721</a></span>&#160;<span class="preprocessor">#define I2S_RXDATA_MASK _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00724"></a><span class="lineno"> 724</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00725"></a><span class="lineno"><a class="line" href="structI2s.html"> 725</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00726"></a><span class="lineno"><a class="line" href="structI2s.html#a789ed154702ba87dba0ff007ea7180e6"> 726</a></span>&#160; __IO <a class="code" href="unionI2S__CTRLA__Type.html">I2S_CTRLA_Type</a> <a class="code" href="structI2s.html#a789ed154702ba87dba0ff007ea7180e6">CTRLA</a>; </div>
<div class="line"><a name="l00727"></a><span class="lineno"> 727</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved1[0x3];</div>
<div class="line"><a name="l00728"></a><span class="lineno"><a class="line" href="structI2s.html#ab5a3279daceafd9030bd4772351709a5"> 728</a></span>&#160; __IO <a class="code" href="unionI2S__CLKCTRL__Type.html">I2S_CLKCTRL_Type</a> CLKCTRL[2]; </div>
<div class="line"><a name="l00729"></a><span class="lineno"><a class="line" href="structI2s.html#a288e75f19ac339c92dd44b059501cd66"> 729</a></span>&#160; __IO <a class="code" href="unionI2S__INTENCLR__Type.html">I2S_INTENCLR_Type</a> <a class="code" href="structI2s.html#a288e75f19ac339c92dd44b059501cd66">INTENCLR</a>; </div>
<div class="line"><a name="l00730"></a><span class="lineno"> 730</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved2[0x2];</div>
<div class="line"><a name="l00731"></a><span class="lineno"><a class="line" href="structI2s.html#a8509c18ae990d1a0fdf87162db444d66"> 731</a></span>&#160; __IO <a class="code" href="unionI2S__INTENSET__Type.html">I2S_INTENSET_Type</a> <a class="code" href="structI2s.html#a8509c18ae990d1a0fdf87162db444d66">INTENSET</a>; </div>
<div class="line"><a name="l00732"></a><span class="lineno"> 732</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved3[0x2];</div>
<div class="line"><a name="l00733"></a><span class="lineno"><a class="line" href="structI2s.html#ac631fa19eb0927d9cc99c1743945274c"> 733</a></span>&#160; __IO <a class="code" href="unionI2S__INTFLAG__Type.html">I2S_INTFLAG_Type</a> <a class="code" href="structI2s.html#ac631fa19eb0927d9cc99c1743945274c">INTFLAG</a>; </div>
<div class="line"><a name="l00734"></a><span class="lineno"> 734</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved4[0x2];</div>
<div class="line"><a name="l00735"></a><span class="lineno"><a class="line" href="structI2s.html#aed448d6e471dea1704798838e2517ddf"> 735</a></span>&#160; __I <a class="code" href="unionI2S__SYNCBUSY__Type.html">I2S_SYNCBUSY_Type</a> <a class="code" href="structI2s.html#aed448d6e471dea1704798838e2517ddf">SYNCBUSY</a>; </div>
<div class="line"><a name="l00736"></a><span class="lineno"> 736</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved5[0x6];</div>
<div class="line"><a name="l00737"></a><span class="lineno"><a class="line" href="structI2s.html#abca7c659461def682cd1e2a1212a8e85"> 737</a></span>&#160; __IO <a class="code" href="unionI2S__TXCTRL__Type.html">I2S_TXCTRL_Type</a> <a class="code" href="structI2s.html#abca7c659461def682cd1e2a1212a8e85">TXCTRL</a>; </div>
<div class="line"><a name="l00738"></a><span class="lineno"><a class="line" href="structI2s.html#ad119b071db73fdeb1c9351e9df9e113c"> 738</a></span>&#160; __IO <a class="code" href="unionI2S__RXCTRL__Type.html">I2S_RXCTRL_Type</a> <a class="code" href="structI2s.html#ad119b071db73fdeb1c9351e9df9e113c">RXCTRL</a>; </div>
<div class="line"><a name="l00739"></a><span class="lineno"> 739</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved6[0x8];</div>
<div class="line"><a name="l00740"></a><span class="lineno"><a class="line" href="structI2s.html#ac22ccf3ad15a78e92b0de1321aff2656"> 740</a></span>&#160; __O <a class="code" href="unionI2S__TXDATA__Type.html">I2S_TXDATA_Type</a> <a class="code" href="structI2s.html#ac22ccf3ad15a78e92b0de1321aff2656">TXDATA</a>; </div>
<div class="line"><a name="l00741"></a><span class="lineno"><a class="line" href="structI2s.html#a23288f6adcad3c1c90d16067f7011839"> 741</a></span>&#160; __I <a class="code" href="unionI2S__RXDATA__Type.html">I2S_RXDATA_Type</a> <a class="code" href="structI2s.html#a23288f6adcad3c1c90d16067f7011839">RXDATA</a>; </div>
<div class="line"><a name="l00742"></a><span class="lineno"> 742</span>&#160;} <a class="code" href="structI2s.html">I2s</a>;</div>
<div class="line"><a name="l00743"></a><span class="lineno"> 743</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00744"></a><span class="lineno"> 744</span>&#160; </div>
<div class="line"><a name="l00747"></a><span class="lineno"> 747</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_I2S_COMPONENT_ */</span><span class="preprocessor"></span></div>
</div><!-- fragment --></div><!-- contents -->
<div class="ttc" id="aunionI2S__INTENSET__Type_html_a4f6c361e5e982433ea910ec2e27a965c"><div class="ttname"><a href="unionI2S__INTENSET__Type.html#a4f6c361e5e982433ea910ec2e27a965c">I2S_INTENSET_Type::RXOR1</a></div><div class="ttdeci">uint16_t RXOR1</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00250">i2s.h:250</a></div></div>
<div class="ttc" id="aunionI2S__CTRLA__Type_html_a5943cd66954758cb7e6af9e60021c19d"><div class="ttname"><a href="unionI2S__CTRLA__Type.html#a5943cd66954758cb7e6af9e60021c19d">I2S_CTRLA_Type::CKEN</a></div><div class="ttdeci">uint8_t CKEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00056">i2s.h:56</a></div></div>
<div class="ttc" id="aunionI2S__SYNCBUSY__Type_html_af8fb2356f4c2849aedf9168b7cc4895d"><div class="ttname"><a href="unionI2S__SYNCBUSY__Type.html#af8fb2356f4c2849aedf9168b7cc4895d">I2S_SYNCBUSY_Type::SWRST</a></div><div class="ttdeci">uint16_t SWRST</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00374">i2s.h:374</a></div></div>
<div class="ttc" id="aunionI2S__INTENSET__Type_html_a9e05021ea7cf05fdef6839bb2273079f"><div class="ttname"><a href="unionI2S__INTENSET__Type.html#a9e05021ea7cf05fdef6839bb2273079f">I2S_INTENSET_Type::RXOR0</a></div><div class="ttdeci">uint16_t RXOR0</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00249">i2s.h:249</a></div></div>
<div class="ttc" id="aunionI2S__TXCTRL__Type_html_aee0121a7dcc2a9c163f54fa58cb70d5e"><div class="ttname"><a href="unionI2S__TXCTRL__Type.html#aee0121a7dcc2a9c163f54fa58cb70d5e">I2S_TXCTRL_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00449">i2s.h:449</a></div></div>
<div class="ttc" id="aunionI2S__CLKCTRL__Type_html_a1d649efc7bf50df4a086a3f50f6f9622"><div class="ttname"><a href="unionI2S__CLKCTRL__Type.html#a1d649efc7bf50df4a086a3f50f6f9622">I2S_CLKCTRL_Type::MCKEN</a></div><div class="ttdeci">uint32_t MCKEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00097">i2s.h:97</a></div></div>
<div class="ttc" id="aunionI2S__RXCTRL__Type_html_a01486646c58e79e1fa584e5edd996dee"><div class="ttname"><a href="unionI2S__RXCTRL__Type.html#a01486646c58e79e1fa584e5edd996dee">I2S_RXCTRL_Type::SLOTDIS</a></div><div class="ttdeci">uint32_t SLOTDIS</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00581">i2s.h:581</a></div></div>
<div class="ttc" id="aunionI2S__INTFLAG__Type_html_af6a08c72b5abfe93b6f9d85cd552a129"><div class="ttname"><a href="unionI2S__INTFLAG__Type.html#af6a08c72b5abfe93b6f9d85cd552a129">I2S_INTFLAG_Type::TXRDY1</a></div><div class="ttdeci">__I uint16_t TXRDY1</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00317">i2s.h:317</a></div></div>
<div class="ttc" id="aunionI2S__RXDATA__Type_html"><div class="ttname"><a href="unionI2S__RXDATA__Type.html">I2S_RXDATA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00707">i2s.h:707</a></div></div>
<div class="ttc" id="astructI2s_html_ad119b071db73fdeb1c9351e9df9e113c"><div class="ttname"><a href="structI2s.html#ad119b071db73fdeb1c9351e9df9e113c">I2s::RXCTRL</a></div><div class="ttdeci">__IO I2S_RXCTRL_Type RXCTRL</div><div class="ttdoc">Offset: 0x24 (R/W 32) Rx Serializer Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00738">i2s.h:738</a></div></div>
<div class="ttc" id="aunionI2S__RXCTRL__Type_html_a576513356a4cf1550b381c7a30214516"><div class="ttname"><a href="unionI2S__RXCTRL__Type.html#a576513356a4cf1550b381c7a30214516">I2S_RXCTRL_Type::RXLOOP</a></div><div class="ttdeci">uint32_t RXLOOP</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00576">i2s.h:576</a></div></div>
<div class="ttc" id="aunionI2S__INTENSET__Type_html_af0f84bd0ea14d27b711d5841790803b5"><div class="ttname"><a href="unionI2S__INTENSET__Type.html#af0f84bd0ea14d27b711d5841790803b5">I2S_INTENSET_Type::RXOR</a></div><div class="ttdeci">uint16_t RXOR</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00262">i2s.h:262</a></div></div>
<div class="ttc" id="aunionI2S__TXCTRL__Type_html_af478084a4ad29de47ca3420f18d941b3"><div class="ttname"><a href="unionI2S__TXCTRL__Type.html#af478084a4ad29de47ca3420f18d941b3">I2S_TXCTRL_Type::WORDADJ</a></div><div class="ttdeci">uint32_t WORDADJ</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00429">i2s.h:429</a></div></div>
<div class="ttc" id="aunionI2S__INTENCLR__Type_html_aa64fddb266193461221190638b89c234"><div class="ttname"><a href="unionI2S__INTENCLR__Type.html#aa64fddb266193461221190638b89c234">I2S_INTENCLR_Type::RXRDY0</a></div><div class="ttdeci">uint16_t RXRDY0</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00182">i2s.h:182</a></div></div>
<div class="ttc" id="aunionI2S__RXCTRL__Type_html_a4de67d5d7c32717ed4b1b6d292a8f96f"><div class="ttname"><a href="unionI2S__RXCTRL__Type.html#a4de67d5d7c32717ed4b1b6d292a8f96f">I2S_RXCTRL_Type::BITREV</a></div><div class="ttdeci">uint32_t BITREV</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00565">i2s.h:565</a></div></div>
<div class="ttc" id="aunionI2S__INTENCLR__Type_html"><div class="ttname"><a href="unionI2S__INTENCLR__Type.html">I2S_INTENCLR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00180">i2s.h:180</a></div></div>
<div class="ttc" id="aunionI2S__CLKCTRL__Type_html_a8554d0ed509ed66ffd0805b4e6fef8ec"><div class="ttname"><a href="unionI2S__CLKCTRL__Type.html#a8554d0ed509ed66ffd0805b4e6fef8ec">I2S_CLKCTRL_Type::MCKDIV</a></div><div class="ttdeci">uint32_t MCKDIV</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00099">i2s.h:99</a></div></div>
<div class="ttc" id="aunionI2S__SYNCBUSY__Type_html_a8ea9f51072df46f31df9511c51c31c35"><div class="ttname"><a href="unionI2S__SYNCBUSY__Type.html#a8ea9f51072df46f31df9511c51c31c35">I2S_SYNCBUSY_Type::CKEN</a></div><div class="ttdeci">uint16_t CKEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00387">i2s.h:387</a></div></div>
<div class="ttc" id="aunionI2S__CLKCTRL__Type_html_a9bafb4f315f303d252b54cc3ad2be8cf"><div class="ttname"><a href="unionI2S__CLKCTRL__Type.html#a9bafb4f315f303d252b54cc3ad2be8cf">I2S_CLKCTRL_Type::SCKSEL</a></div><div class="ttdeci">uint32_t SCKSEL</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00094">i2s.h:94</a></div></div>
<div class="ttc" id="aunionI2S__INTENSET__Type_html_a2713d4e8f97960a60dc01b00d5ac5159"><div class="ttname"><a href="unionI2S__INTENSET__Type.html#a2713d4e8f97960a60dc01b00d5ac5159">I2S_INTENSET_Type::TXUR0</a></div><div class="ttdeci">uint16_t TXUR0</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00255">i2s.h:255</a></div></div>
<div class="ttc" id="aunionI2S__CLKCTRL__Type_html_af8c30cbb790c3c8b4ffcb7d089083ca6"><div class="ttname"><a href="unionI2S__CLKCTRL__Type.html#af8c30cbb790c3c8b4ffcb7d089083ca6">I2S_CLKCTRL_Type::FSOUTINV</a></div><div class="ttdeci">uint32_t FSOUTINV</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00093">i2s.h:93</a></div></div>
<div class="ttc" id="aunionI2S__INTENSET__Type_html_aed374e3b55b9ad86b30dda81d129304f"><div class="ttname"><a href="unionI2S__INTENSET__Type.html#aed374e3b55b9ad86b30dda81d129304f">I2S_INTENSET_Type::TXRDY1</a></div><div class="ttdeci">uint16_t TXRDY1</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00253">i2s.h:253</a></div></div>
<div class="ttc" id="aunionI2S__RXCTRL__Type_html_a5a8d66d42738e22adee449b8f3af485e"><div class="ttname"><a href="unionI2S__RXCTRL__Type.html#a5a8d66d42738e22adee449b8f3af485e">I2S_RXCTRL_Type::SLOTDIS1</a></div><div class="ttdeci">uint32_t SLOTDIS1</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00567">i2s.h:567</a></div></div>
<div class="ttc" id="aunionI2S__RXCTRL__Type_html_a23ebb2a78ffc06a104310c7c9285525e"><div class="ttname"><a href="unionI2S__RXCTRL__Type.html#a23ebb2a78ffc06a104310c7c9285525e">I2S_RXCTRL_Type::SLOTDIS2</a></div><div class="ttdeci">uint32_t SLOTDIS2</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00568">i2s.h:568</a></div></div>
<div class="ttc" id="aunionI2S__INTFLAG__Type_html_a4e942c6ea5b23eecb1838ea8b81eec98"><div class="ttname"><a href="unionI2S__INTFLAG__Type.html#a4e942c6ea5b23eecb1838ea8b81eec98">I2S_INTFLAG_Type::TXUR0</a></div><div class="ttdeci">__I uint16_t TXUR0</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00319">i2s.h:319</a></div></div>
<div class="ttc" id="aunionI2S__TXDATA__Type_html"><div class="ttname"><a href="unionI2S__TXDATA__Type.html">I2S_TXDATA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00689">i2s.h:689</a></div></div>
<div class="ttc" id="aunionI2S__INTFLAG__Type_html_abdb3eaa03d30b2608f67916702dafb0d"><div class="ttname"><a href="unionI2S__INTFLAG__Type.html#abdb3eaa03d30b2608f67916702dafb0d">I2S_INTFLAG_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00333">i2s.h:333</a></div></div>
<div class="ttc" id="aunionI2S__RXCTRL__Type_html_a1e7e09e7b7227099d1512035d6a174e5"><div class="ttname"><a href="unionI2S__RXCTRL__Type.html#a1e7e09e7b7227099d1512035d6a174e5">I2S_RXCTRL_Type::SLOTDIS6</a></div><div class="ttdeci">uint32_t SLOTDIS6</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00572">i2s.h:572</a></div></div>
<div class="ttc" id="aunionI2S__RXCTRL__Type_html_ae90688ada9e7395163564d05894282aa"><div class="ttname"><a href="unionI2S__RXCTRL__Type.html#ae90688ada9e7395163564d05894282aa">I2S_RXCTRL_Type::CLKSEL</a></div><div class="ttdeci">uint32_t CLKSEL</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00558">i2s.h:558</a></div></div>
<div class="ttc" id="aunionI2S__RXCTRL__Type_html_aba9ddd5de046f738fe712ab59281c5d5"><div class="ttname"><a href="unionI2S__RXCTRL__Type.html#aba9ddd5de046f738fe712ab59281c5d5">I2S_RXCTRL_Type::SERMODE</a></div><div class="ttdeci">uint32_t SERMODE</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00556">i2s.h:556</a></div></div>
<div class="ttc" id="aunionI2S__CTRLA__Type_html"><div class="ttname"><a href="unionI2S__CTRLA__Type.html">I2S_CTRLA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00044">i2s.h:44</a></div></div>
<div class="ttc" id="aunionI2S__INTENSET__Type_html_a76d7e9a84590131c8750ee00ee39a302"><div class="ttname"><a href="unionI2S__INTENSET__Type.html#a76d7e9a84590131c8750ee00ee39a302">I2S_INTENSET_Type::RXRDY</a></div><div class="ttdeci">uint16_t RXRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00260">i2s.h:260</a></div></div>
<div class="ttc" id="aunionI2S__RXCTRL__Type_html_a757cf8716729db37e19fd34be08cd312"><div class="ttname"><a href="unionI2S__RXCTRL__Type.html#a757cf8716729db37e19fd34be08cd312">I2S_RXCTRL_Type::SLOTDIS7</a></div><div class="ttdeci">uint32_t SLOTDIS7</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00573">i2s.h:573</a></div></div>
<div class="ttc" id="aunionI2S__INTFLAG__Type_html_a15e716a7672f524f8aca331332b17d4d"><div class="ttname"><a href="unionI2S__INTFLAG__Type.html#a15e716a7672f524f8aca331332b17d4d">I2S_INTFLAG_Type::RXOR0</a></div><div class="ttdeci">__I uint16_t RXOR0</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00313">i2s.h:313</a></div></div>
<div class="ttc" id="aunionI2S__TXCTRL__Type_html_a22da1294200674e368863182d8611ebc"><div class="ttname"><a href="unionI2S__TXCTRL__Type.html#a22da1294200674e368863182d8611ebc">I2S_TXCTRL_Type::TXSAME</a></div><div class="ttdeci">uint32_t TXSAME</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00424">i2s.h:424</a></div></div>
<div class="ttc" id="aunionI2S__INTFLAG__Type_html"><div class="ttname"><a href="unionI2S__INTFLAG__Type.html">I2S_INTFLAG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00308">i2s.h:308</a></div></div>
<div class="ttc" id="aunionI2S__INTENCLR__Type_html_ac6cb5ed68c0994fa8cda9d3cb9f05d72"><div class="ttname"><a href="unionI2S__INTENCLR__Type.html#ac6cb5ed68c0994fa8cda9d3cb9f05d72">I2S_INTENCLR_Type::TXRDY0</a></div><div class="ttdeci">uint16_t TXRDY0</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00188">i2s.h:188</a></div></div>
<div class="ttc" id="aunionI2S__INTFLAG__Type_html_a1fea4a632439a1266f5271765b976eb6"><div class="ttname"><a href="unionI2S__INTFLAG__Type.html#a1fea4a632439a1266f5271765b976eb6">I2S_INTFLAG_Type::RXRDY1</a></div><div class="ttdeci">__I uint16_t RXRDY1</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00311">i2s.h:311</a></div></div>
<div class="ttc" id="aunionI2S__CTRLA__Type_html_ab2eaa9eee907547a9e08b9737617db3f"><div class="ttname"><a href="unionI2S__CTRLA__Type.html#ab2eaa9eee907547a9e08b9737617db3f">I2S_CTRLA_Type::ENABLE</a></div><div class="ttdeci">uint8_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00047">i2s.h:47</a></div></div>
<div class="ttc" id="aunionI2S__RXCTRL__Type_html_ac7a4c3935c08c20e6a000fbc97abdec7"><div class="ttname"><a href="unionI2S__RXCTRL__Type.html#ac7a4c3935c08c20e6a000fbc97abdec7">I2S_RXCTRL_Type::DATASIZE</a></div><div class="ttdeci">uint32_t DATASIZE</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00561">i2s.h:561</a></div></div>
<div class="ttc" id="aunionI2S__INTENCLR__Type_html_a408dfa5692e4d1e5c59b55a9c3e29ca2"><div class="ttname"><a href="unionI2S__INTENCLR__Type.html#a408dfa5692e4d1e5c59b55a9c3e29ca2">I2S_INTENCLR_Type::TXRDY1</a></div><div class="ttdeci">uint16_t TXRDY1</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00189">i2s.h:189</a></div></div>
<div class="ttc" id="aunionI2S__TXCTRL__Type_html_ac9e68a1d184ecc19c6e209ad02355907"><div class="ttname"><a href="unionI2S__TXCTRL__Type.html#ac9e68a1d184ecc19c6e209ad02355907">I2S_TXCTRL_Type::SLOTDIS5</a></div><div class="ttdeci">uint32_t SLOTDIS5</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00437">i2s.h:437</a></div></div>
<div class="ttc" id="aunionI2S__TXCTRL__Type_html_aa831766bd941658dc9283eeeec75a456"><div class="ttname"><a href="unionI2S__TXCTRL__Type.html#aa831766bd941658dc9283eeeec75a456">I2S_TXCTRL_Type::SLOTDIS</a></div><div class="ttdeci">uint32_t SLOTDIS</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00446">i2s.h:446</a></div></div>
<div class="ttc" id="aunionI2S__SYNCBUSY__Type_html_afa966d171ca269f0c1d7237667f3a8a6"><div class="ttname"><a href="unionI2S__SYNCBUSY__Type.html#afa966d171ca269f0c1d7237667f3a8a6">I2S_SYNCBUSY_Type::RXEN</a></div><div class="ttdeci">uint16_t RXEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00379">i2s.h:379</a></div></div>
<div class="ttc" id="aunionI2S__SYNCBUSY__Type_html_a103c0466a61a89e7e9fb6f3f660c4e12"><div class="ttname"><a href="unionI2S__SYNCBUSY__Type.html#a103c0466a61a89e7e9fb6f3f660c4e12">I2S_SYNCBUSY_Type::TXDATA</a></div><div class="ttdeci">uint16_t TXDATA</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00381">i2s.h:381</a></div></div>
<div class="ttc" id="aunionI2S__RXCTRL__Type_html_a0d9a1231c448fbd342cfa3e44e718699"><div class="ttname"><a href="unionI2S__RXCTRL__Type.html#a0d9a1231c448fbd342cfa3e44e718699">I2S_RXCTRL_Type::SLOTADJ</a></div><div class="ttdeci">uint32_t SLOTADJ</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00560">i2s.h:560</a></div></div>
<div class="ttc" id="aunionI2S__INTENCLR__Type_html_af852c622758e48f1733b67f5cfb1850f"><div class="ttname"><a href="unionI2S__INTENCLR__Type.html#af852c622758e48f1733b67f5cfb1850f">I2S_INTENCLR_Type::RXRDY1</a></div><div class="ttdeci">uint16_t RXRDY1</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00183">i2s.h:183</a></div></div>
<div class="ttc" id="aunionI2S__RXCTRL__Type_html_a919dc55b450ace43bbf9aa7a2fa74de4"><div class="ttname"><a href="unionI2S__RXCTRL__Type.html#a919dc55b450ace43bbf9aa7a2fa74de4">I2S_RXCTRL_Type::MONO</a></div><div class="ttdeci">uint32_t MONO</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00574">i2s.h:574</a></div></div>
<div class="ttc" id="aunionI2S__RXCTRL__Type_html"><div class="ttname"><a href="unionI2S__RXCTRL__Type.html">I2S_RXCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00554">i2s.h:554</a></div></div>
<div class="ttc" id="astructI2s_html_a23288f6adcad3c1c90d16067f7011839"><div class="ttname"><a href="structI2s.html#a23288f6adcad3c1c90d16067f7011839">I2s::RXDATA</a></div><div class="ttdeci">__I I2S_RXDATA_Type RXDATA</div><div class="ttdoc">Offset: 0x34 (R/ 32) Rx Data.</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00741">i2s.h:741</a></div></div>
<div class="ttc" id="aunionI2S__RXCTRL__Type_html_a2d3bae28ed77e03c7ab7d34bd22e5d92"><div class="ttname"><a href="unionI2S__RXCTRL__Type.html#a2d3bae28ed77e03c7ab7d34bd22e5d92">I2S_RXCTRL_Type::DMA</a></div><div class="ttdeci">uint32_t DMA</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00575">i2s.h:575</a></div></div>
<div class="ttc" id="aunionI2S__CLKCTRL__Type_html_ae3fe810b6e2a2c65df59d1f8ca519f0d"><div class="ttname"><a href="unionI2S__CLKCTRL__Type.html#ae3fe810b6e2a2c65df59d1f8ca519f0d">I2S_CLKCTRL_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00104">i2s.h:104</a></div></div>
<div class="ttc" id="aunionI2S__TXCTRL__Type_html_ad52586cdd33e643219d872aed0c383fa"><div class="ttname"><a href="unionI2S__TXCTRL__Type.html#ad52586cdd33e643219d872aed0c383fa">I2S_TXCTRL_Type::SLOTDIS3</a></div><div class="ttdeci">uint32_t SLOTDIS3</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00435">i2s.h:435</a></div></div>
<div class="ttc" id="aunionI2S__RXDATA__Type_html_a905c04aaefc6dd65659afa9a23815180"><div class="ttname"><a href="unionI2S__RXDATA__Type.html#a905c04aaefc6dd65659afa9a23815180">I2S_RXDATA_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00711">i2s.h:711</a></div></div>
<div class="ttc" id="aunionI2S__INTFLAG__Type_html_a16722ce456e3d0b5efa407a66ce53c18"><div class="ttname"><a href="unionI2S__INTFLAG__Type.html#a16722ce456e3d0b5efa407a66ce53c18">I2S_INTFLAG_Type::RXRDY0</a></div><div class="ttdeci">__I uint16_t RXRDY0</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00310">i2s.h:310</a></div></div>
<div class="ttc" id="aunionI2S__SYNCBUSY__Type_html_a927c7a9da51bd4d63734d27d5e3af968"><div class="ttname"><a href="unionI2S__SYNCBUSY__Type.html#a927c7a9da51bd4d63734d27d5e3af968">I2S_SYNCBUSY_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00390">i2s.h:390</a></div></div>
<div class="ttc" id="aunionI2S__TXCTRL__Type_html_af6b251c4c6fd187d6fdf9a8546375356"><div class="ttname"><a href="unionI2S__TXCTRL__Type.html#af6b251c4c6fd187d6fdf9a8546375356">I2S_TXCTRL_Type::EXTEND</a></div><div class="ttdeci">uint32_t EXTEND</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00430">i2s.h:430</a></div></div>
<div class="ttc" id="aunionI2S__TXCTRL__Type_html_a258404b585daa336912a9fad19a6cfe0"><div class="ttname"><a href="unionI2S__TXCTRL__Type.html#a258404b585daa336912a9fad19a6cfe0">I2S_TXCTRL_Type::SLOTDIS7</a></div><div class="ttdeci">uint32_t SLOTDIS7</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00439">i2s.h:439</a></div></div>
<div class="ttc" id="aunionI2S__SYNCBUSY__Type_html_aec7c5bf04ecc1470da635bd9490b26d1"><div class="ttname"><a href="unionI2S__SYNCBUSY__Type.html#aec7c5bf04ecc1470da635bd9490b26d1">I2S_SYNCBUSY_Type::CKEN0</a></div><div class="ttdeci">uint16_t CKEN0</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00376">i2s.h:376</a></div></div>
<div class="ttc" id="aunionI2S__RXCTRL__Type_html_a082b3486e69497ea9b7aa4df2dfa8970"><div class="ttname"><a href="unionI2S__RXCTRL__Type.html#a082b3486e69497ea9b7aa4df2dfa8970">I2S_RXCTRL_Type::SLOTDIS5</a></div><div class="ttdeci">uint32_t SLOTDIS5</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00571">i2s.h:571</a></div></div>
<div class="ttc" id="aunionI2S__SYNCBUSY__Type_html_ae1fa524d3baf9e3b278c2226010919d7"><div class="ttname"><a href="unionI2S__SYNCBUSY__Type.html#ae1fa524d3baf9e3b278c2226010919d7">I2S_SYNCBUSY_Type::TXEN</a></div><div class="ttdeci">uint16_t TXEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00378">i2s.h:378</a></div></div>
<div class="ttc" id="aunionI2S__TXCTRL__Type_html"><div class="ttname"><a href="unionI2S__TXCTRL__Type.html">I2S_TXCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00420">i2s.h:420</a></div></div>
<div class="ttc" id="astructI2s_html_a789ed154702ba87dba0ff007ea7180e6"><div class="ttname"><a href="structI2s.html#a789ed154702ba87dba0ff007ea7180e6">I2s::CTRLA</a></div><div class="ttdeci">__IO I2S_CTRLA_Type CTRLA</div><div class="ttdoc">Offset: 0x00 (R/W 8) Control A.</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00726">i2s.h:726</a></div></div>
<div class="ttc" id="aunionI2S__INTENCLR__Type_html_ab96fb961046949b997b1f5e303843d83"><div class="ttname"><a href="unionI2S__INTENCLR__Type.html#ab96fb961046949b997b1f5e303843d83">I2S_INTENCLR_Type::TXUR0</a></div><div class="ttdeci">uint16_t TXUR0</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00191">i2s.h:191</a></div></div>
<div class="ttc" id="astructI2s_html_abca7c659461def682cd1e2a1212a8e85"><div class="ttname"><a href="structI2s.html#abca7c659461def682cd1e2a1212a8e85">I2s::TXCTRL</a></div><div class="ttdeci">__IO I2S_TXCTRL_Type TXCTRL</div><div class="ttdoc">Offset: 0x20 (R/W 32) Tx Serializer Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00737">i2s.h:737</a></div></div>
<div class="ttc" id="aunionI2S__INTFLAG__Type_html_a87a153f7afa91d938db6fc92029ca87e"><div class="ttname"><a href="unionI2S__INTFLAG__Type.html#a87a153f7afa91d938db6fc92029ca87e">I2S_INTFLAG_Type::RXRDY</a></div><div class="ttdeci">__I uint16_t RXRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00324">i2s.h:324</a></div></div>
<div class="ttc" id="aunionI2S__INTENSET__Type_html"><div class="ttname"><a href="unionI2S__INTENSET__Type.html">I2S_INTENSET_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00244">i2s.h:244</a></div></div>
<div class="ttc" id="aunionI2S__INTENCLR__Type_html_ac4830b4f350afea80da7cb21c0af201a"><div class="ttname"><a href="unionI2S__INTENCLR__Type.html#ac4830b4f350afea80da7cb21c0af201a">I2S_INTENCLR_Type::TXUR</a></div><div class="ttdeci">uint16_t TXUR</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00202">i2s.h:202</a></div></div>
<div class="ttc" id="aunionI2S__CTRLA__Type_html_a20ac56dbe8e37a4047f04046160ba61e"><div class="ttname"><a href="unionI2S__CTRLA__Type.html#a20ac56dbe8e37a4047f04046160ba61e">I2S_CTRLA_Type::TXEN</a></div><div class="ttdeci">uint8_t TXEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00050">i2s.h:50</a></div></div>
<div class="ttc" id="aunionI2S__TXCTRL__Type_html_acef1a8cca60a66a79145d5c06509e271"><div class="ttname"><a href="unionI2S__TXCTRL__Type.html#acef1a8cca60a66a79145d5c06509e271">I2S_TXCTRL_Type::SLOTDIS4</a></div><div class="ttdeci">uint32_t SLOTDIS4</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00436">i2s.h:436</a></div></div>
<div class="ttc" id="aunionI2S__RXDATA__Type_html_a63aab98de0cbc0ef0224ae2ac6bc5ee0"><div class="ttname"><a href="unionI2S__RXDATA__Type.html#a63aab98de0cbc0ef0224ae2ac6bc5ee0">I2S_RXDATA_Type::DATA</a></div><div class="ttdeci">uint32_t DATA</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00709">i2s.h:709</a></div></div>
<div class="ttc" id="aunionI2S__TXCTRL__Type_html_a3f76f45c6d5daea2290e7273b466c1ab"><div class="ttname"><a href="unionI2S__TXCTRL__Type.html#a3f76f45c6d5daea2290e7273b466c1ab">I2S_TXCTRL_Type::SLOTDIS0</a></div><div class="ttdeci">uint32_t SLOTDIS0</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00432">i2s.h:432</a></div></div>
<div class="ttc" id="astructI2s_html_a8509c18ae990d1a0fdf87162db444d66"><div class="ttname"><a href="structI2s.html#a8509c18ae990d1a0fdf87162db444d66">I2s::INTENSET</a></div><div class="ttdeci">__IO I2S_INTENSET_Type INTENSET</div><div class="ttdoc">Offset: 0x10 (R/W 16) Interrupt Enable Set.</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00731">i2s.h:731</a></div></div>
<div class="ttc" id="aunionI2S__INTENCLR__Type_html_ab4f76dd230de7cf1b1dce203b6e745b3"><div class="ttname"><a href="unionI2S__INTENCLR__Type.html#ab4f76dd230de7cf1b1dce203b6e745b3">I2S_INTENCLR_Type::TXRDY</a></div><div class="ttdeci">uint16_t TXRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00200">i2s.h:200</a></div></div>
<div class="ttc" id="aunionI2S__INTENSET__Type_html_a42329bb512e77e1952332da97b1443c2"><div class="ttname"><a href="unionI2S__INTENSET__Type.html#a42329bb512e77e1952332da97b1443c2">I2S_INTENSET_Type::RXRDY0</a></div><div class="ttdeci">uint16_t RXRDY0</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00246">i2s.h:246</a></div></div>
<div class="ttc" id="aunionI2S__TXCTRL__Type_html_a3e05ceb63c3141b53a1032e68441e62c"><div class="ttname"><a href="unionI2S__TXCTRL__Type.html#a3e05ceb63c3141b53a1032e68441e62c">I2S_TXCTRL_Type::DATASIZE</a></div><div class="ttdeci">uint32_t DATASIZE</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00427">i2s.h:427</a></div></div>
<div class="ttc" id="aunionI2S__SYNCBUSY__Type_html"><div class="ttname"><a href="unionI2S__SYNCBUSY__Type.html">I2S_SYNCBUSY_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00372">i2s.h:372</a></div></div>
<div class="ttc" id="aunionI2S__RXCTRL__Type_html_abeebc9aeaf04d8880477b48497ee7a7a"><div class="ttname"><a href="unionI2S__RXCTRL__Type.html#abeebc9aeaf04d8880477b48497ee7a7a">I2S_RXCTRL_Type::WORDADJ</a></div><div class="ttdeci">uint32_t WORDADJ</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00563">i2s.h:563</a></div></div>
<div class="ttc" id="aunionI2S__SYNCBUSY__Type_html_aef9fbfa35d2fe3268c9d7ba8bff15ac8"><div class="ttname"><a href="unionI2S__SYNCBUSY__Type.html#aef9fbfa35d2fe3268c9d7ba8bff15ac8">I2S_SYNCBUSY_Type::ENABLE</a></div><div class="ttdeci">uint16_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00375">i2s.h:375</a></div></div>
<div class="ttc" id="astructI2s_html_ac631fa19eb0927d9cc99c1743945274c"><div class="ttname"><a href="structI2s.html#ac631fa19eb0927d9cc99c1743945274c">I2s::INTFLAG</a></div><div class="ttdeci">__IO I2S_INTFLAG_Type INTFLAG</div><div class="ttdoc">Offset: 0x14 (R/W 16) Interrupt Flag Status and Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00733">i2s.h:733</a></div></div>
<div class="ttc" id="aunionI2S__CLKCTRL__Type_html_ad41b7dc3a089283f15238eed06bc09df"><div class="ttname"><a href="unionI2S__CLKCTRL__Type.html#ad41b7dc3a089283f15238eed06bc09df">I2S_CLKCTRL_Type::FSINV</a></div><div class="ttdeci">uint32_t FSINV</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00092">i2s.h:92</a></div></div>
<div class="ttc" id="aunionI2S__RXCTRL__Type_html_ac138a12fd05522a549655bf2963f2a41"><div class="ttname"><a href="unionI2S__RXCTRL__Type.html#ac138a12fd05522a549655bf2963f2a41">I2S_RXCTRL_Type::SLOTDIS3</a></div><div class="ttdeci">uint32_t SLOTDIS3</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00569">i2s.h:569</a></div></div>
<div class="ttc" id="aunionI2S__TXCTRL__Type_html_a98814e258fdceaba07b11e464cc73fb9"><div class="ttname"><a href="unionI2S__TXCTRL__Type.html#a98814e258fdceaba07b11e464cc73fb9">I2S_TXCTRL_Type::TXDEFAULT</a></div><div class="ttdeci">uint32_t TXDEFAULT</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00423">i2s.h:423</a></div></div>
<div class="ttc" id="aunionI2S__CTRLA__Type_html_a5bf3db80d886c48735bfe1a37f1b3e0b"><div class="ttname"><a href="unionI2S__CTRLA__Type.html#a5bf3db80d886c48735bfe1a37f1b3e0b">I2S_CTRLA_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00059">i2s.h:59</a></div></div>
<div class="ttc" id="aunionI2S__RXCTRL__Type_html_adf981442341f4668504177e992d0c31f"><div class="ttname"><a href="unionI2S__RXCTRL__Type.html#adf981442341f4668504177e992d0c31f">I2S_RXCTRL_Type::SLOTDIS0</a></div><div class="ttdeci">uint32_t SLOTDIS0</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00566">i2s.h:566</a></div></div>
<div class="ttc" id="aunionI2S__TXCTRL__Type_html_ae0b5c19b010ff11eadbc3dfb798fc562"><div class="ttname"><a href="unionI2S__TXCTRL__Type.html#ae0b5c19b010ff11eadbc3dfb798fc562">I2S_TXCTRL_Type::BITREV</a></div><div class="ttdeci">uint32_t BITREV</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00431">i2s.h:431</a></div></div>
<div class="ttc" id="aunionI2S__INTFLAG__Type_html_a87543200fa145be24aa4b0ee3b67e045"><div class="ttname"><a href="unionI2S__INTFLAG__Type.html#a87543200fa145be24aa4b0ee3b67e045">I2S_INTFLAG_Type::TXUR1</a></div><div class="ttdeci">__I uint16_t TXUR1</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00320">i2s.h:320</a></div></div>
<div class="ttc" id="aunionI2S__RXCTRL__Type_html_afefa7f5770421e1c4dabe5d8adfb1f88"><div class="ttname"><a href="unionI2S__RXCTRL__Type.html#afefa7f5770421e1c4dabe5d8adfb1f88">I2S_RXCTRL_Type::SLOTDIS4</a></div><div class="ttdeci">uint32_t SLOTDIS4</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00570">i2s.h:570</a></div></div>
<div class="ttc" id="aunionI2S__SYNCBUSY__Type_html_a74d8bc811475a84fff6dc455f0395bd7"><div class="ttname"><a href="unionI2S__SYNCBUSY__Type.html#a74d8bc811475a84fff6dc455f0395bd7">I2S_SYNCBUSY_Type::RXDATA</a></div><div class="ttdeci">uint16_t RXDATA</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00382">i2s.h:382</a></div></div>
<div class="ttc" id="aunionI2S__INTENSET__Type_html_a3ad5a810a99a76ff987bc91e0339f531"><div class="ttname"><a href="unionI2S__INTENSET__Type.html#a3ad5a810a99a76ff987bc91e0339f531">I2S_INTENSET_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00269">i2s.h:269</a></div></div>
<div class="ttc" id="aunionI2S__INTENCLR__Type_html_af5e8b9b8f6e255f0819efddd9610e6a6"><div class="ttname"><a href="unionI2S__INTENCLR__Type.html#af5e8b9b8f6e255f0819efddd9610e6a6">I2S_INTENCLR_Type::TXUR1</a></div><div class="ttdeci">uint16_t TXUR1</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00192">i2s.h:192</a></div></div>
<div class="ttc" id="aunionI2S__CLKCTRL__Type_html_a596aa4c1f1b5ea883d18f21c2730613e"><div class="ttname"><a href="unionI2S__CLKCTRL__Type.html#a596aa4c1f1b5ea883d18f21c2730613e">I2S_CLKCTRL_Type::SCKOUTINV</a></div><div class="ttdeci">uint32_t SCKOUTINV</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00095">i2s.h:95</a></div></div>
<div class="ttc" id="aunionI2S__TXDATA__Type_html_a58b46027f6566c55a4f66bd0cf967c33"><div class="ttname"><a href="unionI2S__TXDATA__Type.html#a58b46027f6566c55a4f66bd0cf967c33">I2S_TXDATA_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00693">i2s.h:693</a></div></div>
<div class="ttc" id="aunionI2S__CTRLA__Type_html_ac081cc89cca4299372fc54ee0eeaea64"><div class="ttname"><a href="unionI2S__CTRLA__Type.html#ac081cc89cca4299372fc54ee0eeaea64">I2S_CTRLA_Type::SWRST</a></div><div class="ttdeci">uint8_t SWRST</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00046">i2s.h:46</a></div></div>
<div class="ttc" id="aunionI2S__RXCTRL__Type_html_afa06d5166038e65e4544191c92237f85"><div class="ttname"><a href="unionI2S__RXCTRL__Type.html#afa06d5166038e65e4544191c92237f85">I2S_RXCTRL_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00584">i2s.h:584</a></div></div>
<div class="ttc" id="aunionI2S__INTENCLR__Type_html_a7b06d563082fed59e5efdb17bff1b476"><div class="ttname"><a href="unionI2S__INTENCLR__Type.html#a7b06d563082fed59e5efdb17bff1b476">I2S_INTENCLR_Type::RXOR0</a></div><div class="ttdeci">uint16_t RXOR0</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00185">i2s.h:185</a></div></div>
<div class="ttc" id="aunionI2S__INTENCLR__Type_html_a940b74af0b6dd49314b6e4992c7e1af1"><div class="ttname"><a href="unionI2S__INTENCLR__Type.html#a940b74af0b6dd49314b6e4992c7e1af1">I2S_INTENCLR_Type::RXRDY</a></div><div class="ttdeci">uint16_t RXRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00196">i2s.h:196</a></div></div>
<div class="ttc" id="aunionI2S__INTENSET__Type_html_a783ffe75f9e7662c931d02ead056a4d3"><div class="ttname"><a href="unionI2S__INTENSET__Type.html#a783ffe75f9e7662c931d02ead056a4d3">I2S_INTENSET_Type::TXRDY</a></div><div class="ttdeci">uint16_t TXRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00264">i2s.h:264</a></div></div>
<div class="ttc" id="aunionI2S__CLKCTRL__Type_html"><div class="ttname"><a href="unionI2S__CLKCTRL__Type.html">I2S_CLKCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00085">i2s.h:85</a></div></div>
<div class="ttc" id="aunionI2S__TXCTRL__Type_html_a42c5d9f833ec4dc033252b278cfb844a"><div class="ttname"><a href="unionI2S__TXCTRL__Type.html#a42c5d9f833ec4dc033252b278cfb844a">I2S_TXCTRL_Type::SLOTDIS6</a></div><div class="ttdeci">uint32_t SLOTDIS6</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00438">i2s.h:438</a></div></div>
<div class="ttc" id="aunionI2S__CLKCTRL__Type_html_aff647fe406d5d3f646521078cb1ca0c8"><div class="ttname"><a href="unionI2S__CLKCTRL__Type.html#aff647fe406d5d3f646521078cb1ca0c8">I2S_CLKCTRL_Type::SLOTSIZE</a></div><div class="ttdeci">uint32_t SLOTSIZE</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00087">i2s.h:87</a></div></div>
<div class="ttc" id="aunionI2S__INTFLAG__Type_html_a3e8ca570951b893405cf93737825fcfc"><div class="ttname"><a href="unionI2S__INTFLAG__Type.html#a3e8ca570951b893405cf93737825fcfc">I2S_INTFLAG_Type::TXRDY0</a></div><div class="ttdeci">__I uint16_t TXRDY0</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00316">i2s.h:316</a></div></div>
<div class="ttc" id="aunionI2S__INTENSET__Type_html_ac9d6271732d2a227b60759e603b99608"><div class="ttname"><a href="unionI2S__INTENSET__Type.html#ac9d6271732d2a227b60759e603b99608">I2S_INTENSET_Type::TXUR</a></div><div class="ttdeci">uint16_t TXUR</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00266">i2s.h:266</a></div></div>
<div class="ttc" id="aunionI2S__INTENCLR__Type_html_af58efb6da3728f0d30d96f6191ac9454"><div class="ttname"><a href="unionI2S__INTENCLR__Type.html#af58efb6da3728f0d30d96f6191ac9454">I2S_INTENCLR_Type::RXOR1</a></div><div class="ttdeci">uint16_t RXOR1</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00186">i2s.h:186</a></div></div>
<div class="ttc" id="aunionI2S__CLKCTRL__Type_html_a39a27f504a2d3fccb6c99256ed503bad"><div class="ttname"><a href="unionI2S__CLKCTRL__Type.html#a39a27f504a2d3fccb6c99256ed503bad">I2S_CLKCTRL_Type::MCKOUTDIV</a></div><div class="ttdeci">uint32_t MCKOUTDIV</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00101">i2s.h:101</a></div></div>
<div class="ttc" id="aunionI2S__CLKCTRL__Type_html_a6626d69f2946b570a1bd9a4f1f0a323a"><div class="ttname"><a href="unionI2S__CLKCTRL__Type.html#a6626d69f2946b570a1bd9a4f1f0a323a">I2S_CLKCTRL_Type::FSSEL</a></div><div class="ttdeci">uint32_t FSSEL</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00091">i2s.h:91</a></div></div>
<div class="ttc" id="aunionI2S__INTFLAG__Type_html_a8d6a0b5e2d17d6f0ba8823564cc8fb6e"><div class="ttname"><a href="unionI2S__INTFLAG__Type.html#a8d6a0b5e2d17d6f0ba8823564cc8fb6e">I2S_INTFLAG_Type::uint16_t</a></div><div class="ttdeci">__I uint16_t</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00312">i2s.h:312</a></div></div>
<div class="ttc" id="aunionI2S__INTFLAG__Type_html_a05f1b59e5afac697c843163f2ca9d48e"><div class="ttname"><a href="unionI2S__INTFLAG__Type.html#a05f1b59e5afac697c843163f2ca9d48e">I2S_INTFLAG_Type::TXRDY</a></div><div class="ttdeci">__I uint16_t TXRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00328">i2s.h:328</a></div></div>
<div class="ttc" id="asame54n19a_8h_html_a0d957f1433aaf5d70e4dc2b68288442d"><div class="ttname"><a href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a></div><div class="ttdeci">volatile const uint8_t RoReg8</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00053">same54n19a.h:53</a></div></div>
<div class="ttc" id="aunionI2S__TXCTRL__Type_html_a6b8a09a6581f03229a9dfeace12ff458"><div class="ttname"><a href="unionI2S__TXCTRL__Type.html#a6b8a09a6581f03229a9dfeace12ff458">I2S_TXCTRL_Type::MONO</a></div><div class="ttdeci">uint32_t MONO</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00440">i2s.h:440</a></div></div>
<div class="ttc" id="aunionI2S__RXCTRL__Type_html_ada95eff3f5553b5c4a1e7ba2252012c6"><div class="ttname"><a href="unionI2S__RXCTRL__Type.html#ada95eff3f5553b5c4a1e7ba2252012c6">I2S_RXCTRL_Type::EXTEND</a></div><div class="ttdeci">uint32_t EXTEND</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00564">i2s.h:564</a></div></div>
<div class="ttc" id="aunionI2S__TXCTRL__Type_html_ac69a754a4d98383dd8db2ac2a062d768"><div class="ttname"><a href="unionI2S__TXCTRL__Type.html#ac69a754a4d98383dd8db2ac2a062d768">I2S_TXCTRL_Type::DMA</a></div><div class="ttdeci">uint32_t DMA</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00441">i2s.h:441</a></div></div>
<div class="ttc" id="aunionI2S__TXCTRL__Type_html_a559b8bdb868aa8786d898a233967d7b5"><div class="ttname"><a href="unionI2S__TXCTRL__Type.html#a559b8bdb868aa8786d898a233967d7b5">I2S_TXCTRL_Type::SLOTADJ</a></div><div class="ttdeci">uint32_t SLOTADJ</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00426">i2s.h:426</a></div></div>
<div class="ttc" id="aunionI2S__INTENSET__Type_html_a71ccb2e01d3d3cf08cb6d6f2685771b7"><div class="ttname"><a href="unionI2S__INTENSET__Type.html#a71ccb2e01d3d3cf08cb6d6f2685771b7">I2S_INTENSET_Type::TXRDY0</a></div><div class="ttdeci">uint16_t TXRDY0</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00252">i2s.h:252</a></div></div>
<div class="ttc" id="astructI2s_html"><div class="ttname"><a href="structI2s.html">I2s</a></div><div class="ttdoc">I2S hardware registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00725">i2s.h:725</a></div></div>
<div class="ttc" id="aunionI2S__CLKCTRL__Type_html_a96299dcf9cdc5a33532e5b563efa7fee"><div class="ttname"><a href="unionI2S__CLKCTRL__Type.html#a96299dcf9cdc5a33532e5b563efa7fee">I2S_CLKCTRL_Type::FSWIDTH</a></div><div class="ttdeci">uint32_t FSWIDTH</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00089">i2s.h:89</a></div></div>
<div class="ttc" id="aunionI2S__TXDATA__Type_html_a9eed35ab037d97a6b16a3074df1a8281"><div class="ttname"><a href="unionI2S__TXDATA__Type.html#a9eed35ab037d97a6b16a3074df1a8281">I2S_TXDATA_Type::DATA</a></div><div class="ttdeci">uint32_t DATA</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00691">i2s.h:691</a></div></div>
<div class="ttc" id="astructI2s_html_ac22ccf3ad15a78e92b0de1321aff2656"><div class="ttname"><a href="structI2s.html#ac22ccf3ad15a78e92b0de1321aff2656">I2s::TXDATA</a></div><div class="ttdeci">__O I2S_TXDATA_Type TXDATA</div><div class="ttdoc">Offset: 0x30 ( /W 32) Tx Data.</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00740">i2s.h:740</a></div></div>
<div class="ttc" id="aunionI2S__INTENCLR__Type_html_a57ca45ffe9f97645332976d3a6a42fab"><div class="ttname"><a href="unionI2S__INTENCLR__Type.html#a57ca45ffe9f97645332976d3a6a42fab">I2S_INTENCLR_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00205">i2s.h:205</a></div></div>
<div class="ttc" id="aunionI2S__TXCTRL__Type_html_aedc15524c7bc831adead3e7b64bd8927"><div class="ttname"><a href="unionI2S__TXCTRL__Type.html#aedc15524c7bc831adead3e7b64bd8927">I2S_TXCTRL_Type::SLOTDIS1</a></div><div class="ttdeci">uint32_t SLOTDIS1</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00433">i2s.h:433</a></div></div>
<div class="ttc" id="aunionI2S__INTENCLR__Type_html_a2a6a249c994d220c1cc30c11a3db0b74"><div class="ttname"><a href="unionI2S__INTENCLR__Type.html#a2a6a249c994d220c1cc30c11a3db0b74">I2S_INTENCLR_Type::RXOR</a></div><div class="ttdeci">uint16_t RXOR</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00198">i2s.h:198</a></div></div>
<div class="ttc" id="aunionI2S__CLKCTRL__Type_html_a36287a0c836b016a982812315d96efb1"><div class="ttname"><a href="unionI2S__CLKCTRL__Type.html#a36287a0c836b016a982812315d96efb1">I2S_CLKCTRL_Type::MCKOUTINV</a></div><div class="ttdeci">uint32_t MCKOUTINV</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00098">i2s.h:98</a></div></div>
<div class="ttc" id="aunionI2S__CLKCTRL__Type_html_ae0115c3a7792d5cdf7892a74faef5a5c"><div class="ttname"><a href="unionI2S__CLKCTRL__Type.html#ae0115c3a7792d5cdf7892a74faef5a5c">I2S_CLKCTRL_Type::NBSLOTS</a></div><div class="ttdeci">uint32_t NBSLOTS</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00088">i2s.h:88</a></div></div>
<div class="ttc" id="aunionI2S__SYNCBUSY__Type_html_a1ed6486509ac781949a3f2e6c22aedcf"><div class="ttname"><a href="unionI2S__SYNCBUSY__Type.html#a1ed6486509ac781949a3f2e6c22aedcf">I2S_SYNCBUSY_Type::CKEN1</a></div><div class="ttdeci">uint16_t CKEN1</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00377">i2s.h:377</a></div></div>
<div class="ttc" id="aunionI2S__CTRLA__Type_html_a87da7f05bba65eefbbf0d81af73dd580"><div class="ttname"><a href="unionI2S__CTRLA__Type.html#a87da7f05bba65eefbbf0d81af73dd580">I2S_CTRLA_Type::CKEN1</a></div><div class="ttdeci">uint8_t CKEN1</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00049">i2s.h:49</a></div></div>
<div class="ttc" id="astructI2s_html_aed448d6e471dea1704798838e2517ddf"><div class="ttname"><a href="structI2s.html#aed448d6e471dea1704798838e2517ddf">I2s::SYNCBUSY</a></div><div class="ttdeci">__I I2S_SYNCBUSY_Type SYNCBUSY</div><div class="ttdoc">Offset: 0x18 (R/ 16) Synchronization Status.</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00735">i2s.h:735</a></div></div>
<div class="ttc" id="aunionI2S__CTRLA__Type_html_a01893f79e0a151a84b9168f4119eb99b"><div class="ttname"><a href="unionI2S__CTRLA__Type.html#a01893f79e0a151a84b9168f4119eb99b">I2S_CTRLA_Type::RXEN</a></div><div class="ttdeci">uint8_t RXEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00051">i2s.h:51</a></div></div>
<div class="ttc" id="aunionI2S__CLKCTRL__Type_html_a9bad3367378b1be0a091b020a97cdb90"><div class="ttname"><a href="unionI2S__CLKCTRL__Type.html#a9bad3367378b1be0a091b020a97cdb90">I2S_CLKCTRL_Type::MCKSEL</a></div><div class="ttdeci">uint32_t MCKSEL</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00096">i2s.h:96</a></div></div>
<div class="ttc" id="aunionI2S__INTFLAG__Type_html_ab5ecd387f3de89c96324ae32b0b2753c"><div class="ttname"><a href="unionI2S__INTFLAG__Type.html#ab5ecd387f3de89c96324ae32b0b2753c">I2S_INTFLAG_Type::RXOR1</a></div><div class="ttdeci">__I uint16_t RXOR1</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00314">i2s.h:314</a></div></div>
<div class="ttc" id="astructI2s_html_a288e75f19ac339c92dd44b059501cd66"><div class="ttname"><a href="structI2s.html#a288e75f19ac339c92dd44b059501cd66">I2s::INTENCLR</a></div><div class="ttdeci">__IO I2S_INTENCLR_Type INTENCLR</div><div class="ttdoc">Offset: 0x0C (R/W 16) Interrupt Enable Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00729">i2s.h:729</a></div></div>
<div class="ttc" id="aunionI2S__CLKCTRL__Type_html_ac80f2360b7e43db320efc422beb2055c"><div class="ttname"><a href="unionI2S__CLKCTRL__Type.html#ac80f2360b7e43db320efc422beb2055c">I2S_CLKCTRL_Type::BITDELAY</a></div><div class="ttdeci">uint32_t BITDELAY</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00090">i2s.h:90</a></div></div>
<div class="ttc" id="aunionI2S__TXCTRL__Type_html_ac6c190d595c9325028984aeb8e8f3ddf"><div class="ttname"><a href="unionI2S__TXCTRL__Type.html#ac6c190d595c9325028984aeb8e8f3ddf">I2S_TXCTRL_Type::SLOTDIS2</a></div><div class="ttdeci">uint32_t SLOTDIS2</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00434">i2s.h:434</a></div></div>
<div class="ttc" id="aunionI2S__INTFLAG__Type_html_a80f602fed67029cda7c4761ca1ee6eef"><div class="ttname"><a href="unionI2S__INTFLAG__Type.html#a80f602fed67029cda7c4761ca1ee6eef">I2S_INTFLAG_Type::TXUR</a></div><div class="ttdeci">__I uint16_t TXUR</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00330">i2s.h:330</a></div></div>
<div class="ttc" id="aunionI2S__CTRLA__Type_html_af1ebea5a94d9e2841905ce3a304ffe6d"><div class="ttname"><a href="unionI2S__CTRLA__Type.html#af1ebea5a94d9e2841905ce3a304ffe6d">I2S_CTRLA_Type::CKEN0</a></div><div class="ttdeci">uint8_t CKEN0</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00048">i2s.h:48</a></div></div>
<div class="ttc" id="aunionI2S__INTFLAG__Type_html_ad3b22512e042470b1115f44690d52f63"><div class="ttname"><a href="unionI2S__INTFLAG__Type.html#ad3b22512e042470b1115f44690d52f63">I2S_INTFLAG_Type::RXOR</a></div><div class="ttdeci">__I uint16_t RXOR</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00326">i2s.h:326</a></div></div>
<div class="ttc" id="aunionI2S__INTENSET__Type_html_aa69436115d307a1cb7a669f95fbdae14"><div class="ttname"><a href="unionI2S__INTENSET__Type.html#aa69436115d307a1cb7a669f95fbdae14">I2S_INTENSET_Type::RXRDY1</a></div><div class="ttdeci">uint16_t RXRDY1</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00247">i2s.h:247</a></div></div>
<div class="ttc" id="aunionI2S__INTENSET__Type_html_a749fa771b6fc7c4e0decd83e3a7b60af"><div class="ttname"><a href="unionI2S__INTENSET__Type.html#a749fa771b6fc7c4e0decd83e3a7b60af">I2S_INTENSET_Type::TXUR1</a></div><div class="ttdeci">uint16_t TXUR1</div><div class="ttdef"><b>Definition:</b> <a href="component_2i2s_8h_source.html#l00256">i2s.h:256</a></div></div>
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<a href="component_2icm_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_ICM_COMPONENT_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_ICM_COMPONENT_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160; </div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define ICM_U2010</span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define REV_ICM 0x120</span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160; </div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="comment">/* -------- ICM_CFG : (ICM Offset: 0x00) (R/W 32) Configuration -------- */</span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00044"></a><span class="lineno"><a class="line" href="unionICM__CFG__Type.html"> 44</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00046"></a><span class="lineno"><a class="line" href="unionICM__CFG__Type.html#ad0ec11e82af3d990e8abe6e27c3c3264"> 46</a></span>&#160; uint32_t <a class="code" href="unionICM__CFG__Type.html#ad0ec11e82af3d990e8abe6e27c3c3264">WBDIS</a>:1; </div>
<div class="line"><a name="l00047"></a><span class="lineno"><a class="line" href="unionICM__CFG__Type.html#a376cb6022607e8e56666e325c55f98f4"> 47</a></span>&#160; uint32_t <a class="code" href="unionICM__CFG__Type.html#a376cb6022607e8e56666e325c55f98f4">EOMDIS</a>:1; </div>
<div class="line"><a name="l00048"></a><span class="lineno"><a class="line" href="unionICM__CFG__Type.html#a8a7824ed9be7132a13975a6fef984afa"> 48</a></span>&#160; uint32_t <a class="code" href="unionICM__CFG__Type.html#a8a7824ed9be7132a13975a6fef984afa">SLBDIS</a>:1; </div>
<div class="line"><a name="l00049"></a><span class="lineno"><a class="line" href="unionICM__CFG__Type.html#a449788e21728c794e0d891567af48c72"> 49</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00050"></a><span class="lineno"><a class="line" href="unionICM__CFG__Type.html#ac797507aa3cb0acbb941f3de7de17169"> 50</a></span>&#160; uint32_t <a class="code" href="unionICM__CFG__Type.html#ac797507aa3cb0acbb941f3de7de17169">BBC</a>:4; </div>
<div class="line"><a name="l00051"></a><span class="lineno"><a class="line" href="unionICM__CFG__Type.html#aa5edadcf1bdca950837862ea44a30d30"> 51</a></span>&#160; uint32_t <a class="code" href="unionICM__CFG__Type.html#aa5edadcf1bdca950837862ea44a30d30">ASCD</a>:1; </div>
<div class="line"><a name="l00052"></a><span class="lineno"><a class="line" href="unionICM__CFG__Type.html#a4cc0029a9e55a3e165c0d9e4316aeb8b"> 52</a></span>&#160; uint32_t <a class="code" href="unionICM__CFG__Type.html#a4cc0029a9e55a3e165c0d9e4316aeb8b">DUALBUFF</a>:1; </div>
<div class="line"><a name="l00053"></a><span class="lineno"><a class="line" href="unionICM__CFG__Type.html#af61cd88ec0766e5570c5bc3e2166c42f"> 53</a></span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00054"></a><span class="lineno"><a class="line" href="unionICM__CFG__Type.html#ab700dfb7968d992d2753299bebfe7ebd"> 54</a></span>&#160; uint32_t <a class="code" href="unionICM__CFG__Type.html#ab700dfb7968d992d2753299bebfe7ebd">UIHASH</a>:1; </div>
<div class="line"><a name="l00055"></a><span class="lineno"><a class="line" href="unionICM__CFG__Type.html#ad8db7d113a4dcb7701ae99f1d2f27c38"> 55</a></span>&#160; uint32_t <a class="code" href="unionICM__CFG__Type.html#ad8db7d113a4dcb7701ae99f1d2f27c38">UALGO</a>:3; </div>
<div class="line"><a name="l00056"></a><span class="lineno"><a class="line" href="unionICM__CFG__Type.html#af4c899048afea95540fecd980f3d0868"> 56</a></span>&#160; uint32_t <a class="code" href="unionICM__CFG__Type.html#af4c899048afea95540fecd980f3d0868">HAPROT</a>:6; </div>
<div class="line"><a name="l00057"></a><span class="lineno"><a class="line" href="unionICM__CFG__Type.html#aa35d7935a49270fccaef5bb875442640"> 57</a></span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00058"></a><span class="lineno"><a class="line" href="unionICM__CFG__Type.html#aa1048e44f02bb5894fc96e1abb14f090"> 58</a></span>&#160; uint32_t <a class="code" href="unionICM__CFG__Type.html#aa1048e44f02bb5894fc96e1abb14f090">DAPROT</a>:6; </div>
<div class="line"><a name="l00059"></a><span class="lineno"><a class="line" href="unionICM__CFG__Type.html#a8bdf2804561193401a70a0ab7560fc8f"> 59</a></span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00060"></a><span class="lineno"><a class="line" href="unionICM__CFG__Type.html#ab40e408b47f6c161d30648254bb09a8e"> 60</a></span>&#160; } bit; </div>
<div class="line"><a name="l00061"></a><span class="lineno"><a class="line" href="unionICM__CFG__Type.html#a19006cc5f31cb5bd868b18bffb4d8f18"> 61</a></span>&#160; uint32_t <a class="code" href="unionICM__CFG__Type.html#a19006cc5f31cb5bd868b18bffb4d8f18">reg</a>; </div>
<div class="line"><a name="l00062"></a><span class="lineno"> 62</span>&#160;} <a class="code" href="unionICM__CFG__Type.html">ICM_CFG_Type</a>;</div>
<div class="line"><a name="l00063"></a><span class="lineno"> 63</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00064"></a><span class="lineno"> 64</span>&#160; </div>
<div class="line"><a name="l00065"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ac6866ddc4fb95c6777054e2680cceafa"> 65</a></span>&#160;<span class="preprocessor">#define ICM_CFG_OFFSET 0x00 </span></div>
<div class="line"><a name="l00066"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a6c0be59e386996dd14bf1d7170bdc1f0"> 66</a></span>&#160;<span class="preprocessor">#define ICM_CFG_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00068"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a8fd396cef38fa3bbf24aa3cedba0b64e"> 68</a></span>&#160;<span class="preprocessor">#define ICM_CFG_WBDIS_Pos 0 </span></div>
<div class="line"><a name="l00069"></a><span class="lineno"> 69</span>&#160;<span class="preprocessor">#define ICM_CFG_WBDIS (_U_(0x1) &lt;&lt; ICM_CFG_WBDIS_Pos)</span></div>
<div class="line"><a name="l00070"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a3abe16e9d1c06ff65f39451f750e12a0"> 70</a></span>&#160;<span class="preprocessor">#define ICM_CFG_EOMDIS_Pos 1 </span></div>
<div class="line"><a name="l00071"></a><span class="lineno"> 71</span>&#160;<span class="preprocessor">#define ICM_CFG_EOMDIS (_U_(0x1) &lt;&lt; ICM_CFG_EOMDIS_Pos)</span></div>
<div class="line"><a name="l00072"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ad16d77291ad1907e6c174b2cce9ee20b"> 72</a></span>&#160;<span class="preprocessor">#define ICM_CFG_SLBDIS_Pos 2 </span></div>
<div class="line"><a name="l00073"></a><span class="lineno"> 73</span>&#160;<span class="preprocessor">#define ICM_CFG_SLBDIS (_U_(0x1) &lt;&lt; ICM_CFG_SLBDIS_Pos)</span></div>
<div class="line"><a name="l00074"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a3cae93384d33560349acf73d4b22bf0e"> 74</a></span>&#160;<span class="preprocessor">#define ICM_CFG_BBC_Pos 4 </span></div>
<div class="line"><a name="l00075"></a><span class="lineno"> 75</span>&#160;<span class="preprocessor">#define ICM_CFG_BBC_Msk (_U_(0xF) &lt;&lt; ICM_CFG_BBC_Pos)</span></div>
<div class="line"><a name="l00076"></a><span class="lineno"> 76</span>&#160;<span class="preprocessor">#define ICM_CFG_BBC(value) (ICM_CFG_BBC_Msk &amp; ((value) &lt;&lt; ICM_CFG_BBC_Pos))</span></div>
<div class="line"><a name="l00077"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ad29b54b75150e57bf7d1a111fac647ae"> 77</a></span>&#160;<span class="preprocessor">#define ICM_CFG_ASCD_Pos 8 </span></div>
<div class="line"><a name="l00078"></a><span class="lineno"> 78</span>&#160;<span class="preprocessor">#define ICM_CFG_ASCD (_U_(0x1) &lt;&lt; ICM_CFG_ASCD_Pos)</span></div>
<div class="line"><a name="l00079"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ac52bba2dade55791c7f3f9e0d7798f11"> 79</a></span>&#160;<span class="preprocessor">#define ICM_CFG_DUALBUFF_Pos 9 </span></div>
<div class="line"><a name="l00080"></a><span class="lineno"> 80</span>&#160;<span class="preprocessor">#define ICM_CFG_DUALBUFF (_U_(0x1) &lt;&lt; ICM_CFG_DUALBUFF_Pos)</span></div>
<div class="line"><a name="l00081"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a6309ed3bb29f9216ea38f50f285b9fd6"> 81</a></span>&#160;<span class="preprocessor">#define ICM_CFG_UIHASH_Pos 12 </span></div>
<div class="line"><a name="l00082"></a><span class="lineno"> 82</span>&#160;<span class="preprocessor">#define ICM_CFG_UIHASH (_U_(0x1) &lt;&lt; ICM_CFG_UIHASH_Pos)</span></div>
<div class="line"><a name="l00083"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a871c0a962e1002722d833ddc094ee8ba"> 83</a></span>&#160;<span class="preprocessor">#define ICM_CFG_UALGO_Pos 13 </span></div>
<div class="line"><a name="l00084"></a><span class="lineno"> 84</span>&#160;<span class="preprocessor">#define ICM_CFG_UALGO_Msk (_U_(0x7) &lt;&lt; ICM_CFG_UALGO_Pos)</span></div>
<div class="line"><a name="l00085"></a><span class="lineno"> 85</span>&#160;<span class="preprocessor">#define ICM_CFG_UALGO(value) (ICM_CFG_UALGO_Msk &amp; ((value) &lt;&lt; ICM_CFG_UALGO_Pos))</span></div>
<div class="line"><a name="l00086"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a4a55349d832a22cf10ef7086bcd5433a"> 86</a></span>&#160;<span class="preprocessor">#define ICM_CFG_UALGO_SHA1_Val _U_(0x0) </span></div>
<div class="line"><a name="l00087"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#aa54e8f927cddf27b744d34b8fa0e8a55"> 87</a></span>&#160;<span class="preprocessor">#define ICM_CFG_UALGO_SHA256_Val _U_(0x1) </span></div>
<div class="line"><a name="l00088"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#aba949cdba674ffaabd49f6a0e82704b5"> 88</a></span>&#160;<span class="preprocessor">#define ICM_CFG_UALGO_SHA224_Val _U_(0x4) </span></div>
<div class="line"><a name="l00089"></a><span class="lineno"> 89</span>&#160;<span class="preprocessor">#define ICM_CFG_UALGO_SHA1 (ICM_CFG_UALGO_SHA1_Val &lt;&lt; ICM_CFG_UALGO_Pos)</span></div>
<div class="line"><a name="l00090"></a><span class="lineno"> 90</span>&#160;<span class="preprocessor">#define ICM_CFG_UALGO_SHA256 (ICM_CFG_UALGO_SHA256_Val &lt;&lt; ICM_CFG_UALGO_Pos)</span></div>
<div class="line"><a name="l00091"></a><span class="lineno"> 91</span>&#160;<span class="preprocessor">#define ICM_CFG_UALGO_SHA224 (ICM_CFG_UALGO_SHA224_Val &lt;&lt; ICM_CFG_UALGO_Pos)</span></div>
<div class="line"><a name="l00092"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a1ae2704bd4144e343bb74b38ac78b3ac"> 92</a></span>&#160;<span class="preprocessor">#define ICM_CFG_HAPROT_Pos 16 </span></div>
<div class="line"><a name="l00093"></a><span class="lineno"> 93</span>&#160;<span class="preprocessor">#define ICM_CFG_HAPROT_Msk (_U_(0x3F) &lt;&lt; ICM_CFG_HAPROT_Pos)</span></div>
<div class="line"><a name="l00094"></a><span class="lineno"> 94</span>&#160;<span class="preprocessor">#define ICM_CFG_HAPROT(value) (ICM_CFG_HAPROT_Msk &amp; ((value) &lt;&lt; ICM_CFG_HAPROT_Pos))</span></div>
<div class="line"><a name="l00095"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a7ecb53908baace833e344d41f093a019"> 95</a></span>&#160;<span class="preprocessor">#define ICM_CFG_DAPROT_Pos 24 </span></div>
<div class="line"><a name="l00096"></a><span class="lineno"> 96</span>&#160;<span class="preprocessor">#define ICM_CFG_DAPROT_Msk (_U_(0x3F) &lt;&lt; ICM_CFG_DAPROT_Pos)</span></div>
<div class="line"><a name="l00097"></a><span class="lineno"> 97</span>&#160;<span class="preprocessor">#define ICM_CFG_DAPROT(value) (ICM_CFG_DAPROT_Msk &amp; ((value) &lt;&lt; ICM_CFG_DAPROT_Pos))</span></div>
<div class="line"><a name="l00098"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#aa7c7aef94098d37933d3b4749d85c273"> 98</a></span>&#160;<span class="preprocessor">#define ICM_CFG_MASK _U_(0x3F3FF3F7) </span></div>
<div class="line"><a name="l00100"></a><span class="lineno"> 100</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- ICM_CTRL : (ICM Offset: 0x04) ( /W 32) Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00101"></a><span class="lineno"> 101</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00102"></a><span class="lineno"><a class="line" href="unionICM__CTRL__Type.html"> 102</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00103"></a><span class="lineno"> 103</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00104"></a><span class="lineno"><a class="line" href="unionICM__CTRL__Type.html#a535147cc8e22e9cb4b0ceb532983c279"> 104</a></span>&#160; uint32_t <a class="code" href="unionICM__CTRL__Type.html#a535147cc8e22e9cb4b0ceb532983c279">ENABLE</a>:1; </div>
<div class="line"><a name="l00105"></a><span class="lineno"><a class="line" href="unionICM__CTRL__Type.html#a0d7fc66f495b7f20f3b869133b28d5cb"> 105</a></span>&#160; uint32_t <a class="code" href="unionICM__CTRL__Type.html#a0d7fc66f495b7f20f3b869133b28d5cb">DISABLE</a>:1; </div>
<div class="line"><a name="l00106"></a><span class="lineno"><a class="line" href="unionICM__CTRL__Type.html#afb549ef64f71fd3871c68116b4594136"> 106</a></span>&#160; uint32_t <a class="code" href="unionICM__CTRL__Type.html#afb549ef64f71fd3871c68116b4594136">SWRST</a>:1; </div>
<div class="line"><a name="l00107"></a><span class="lineno"><a class="line" href="unionICM__CTRL__Type.html#a1d23a99ae2983bfd7635115a2f20fe16"> 107</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00108"></a><span class="lineno"><a class="line" href="unionICM__CTRL__Type.html#abe97e58f4be83784dd65b491e9c47092"> 108</a></span>&#160; uint32_t <a class="code" href="unionICM__CTRL__Type.html#abe97e58f4be83784dd65b491e9c47092">REHASH</a>:4; </div>
<div class="line"><a name="l00109"></a><span class="lineno"><a class="line" href="unionICM__CTRL__Type.html#ab0e370cfc8b9076e14c19ef111d02453"> 109</a></span>&#160; uint32_t <a class="code" href="unionICM__CTRL__Type.html#ab0e370cfc8b9076e14c19ef111d02453">RMDIS</a>:4; </div>
<div class="line"><a name="l00110"></a><span class="lineno"><a class="line" href="unionICM__CTRL__Type.html#a14bc9bc39f6b06bfabff94a7f404553b"> 110</a></span>&#160; uint32_t <a class="code" href="unionICM__CTRL__Type.html#a14bc9bc39f6b06bfabff94a7f404553b">RMEN</a>:4; </div>
<div class="line"><a name="l00111"></a><span class="lineno"><a class="line" href="unionICM__CTRL__Type.html#ace48487ab47acd0e29599e505e97ec25"> 111</a></span>&#160; uint32_t :16; </div>
<div class="line"><a name="l00112"></a><span class="lineno"><a class="line" href="unionICM__CTRL__Type.html#a9ff21d11313a223931a8d87b4e479cbd"> 112</a></span>&#160; } bit; </div>
<div class="line"><a name="l00113"></a><span class="lineno"><a class="line" href="unionICM__CTRL__Type.html#aa6614af3cd2d970375ea58ea25bb5ea8"> 113</a></span>&#160; uint32_t <a class="code" href="unionICM__CTRL__Type.html#aa6614af3cd2d970375ea58ea25bb5ea8">reg</a>; </div>
<div class="line"><a name="l00114"></a><span class="lineno"> 114</span>&#160;} <a class="code" href="unionICM__CTRL__Type.html">ICM_CTRL_Type</a>;</div>
<div class="line"><a name="l00115"></a><span class="lineno"> 115</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00116"></a><span class="lineno"> 116</span>&#160; </div>
<div class="line"><a name="l00117"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a8b8caff6f133f4bd477f687e387528c8"> 117</a></span>&#160;<span class="preprocessor">#define ICM_CTRL_OFFSET 0x04 </span></div>
<div class="line"><a name="l00119"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a1bde4faecd154cb546720b6728f8a6a6"> 119</a></span>&#160;<span class="preprocessor">#define ICM_CTRL_ENABLE_Pos 0 </span></div>
<div class="line"><a name="l00120"></a><span class="lineno"> 120</span>&#160;<span class="preprocessor">#define ICM_CTRL_ENABLE (_U_(0x1) &lt;&lt; ICM_CTRL_ENABLE_Pos)</span></div>
<div class="line"><a name="l00121"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a87556afcda260041c14059aff9ed6400"> 121</a></span>&#160;<span class="preprocessor">#define ICM_CTRL_DISABLE_Pos 1 </span></div>
<div class="line"><a name="l00122"></a><span class="lineno"> 122</span>&#160;<span class="preprocessor">#define ICM_CTRL_DISABLE (_U_(0x1) &lt;&lt; ICM_CTRL_DISABLE_Pos)</span></div>
<div class="line"><a name="l00123"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a660b9f23b03a1bfe1b86910b7688f5f6"> 123</a></span>&#160;<span class="preprocessor">#define ICM_CTRL_SWRST_Pos 2 </span></div>
<div class="line"><a name="l00124"></a><span class="lineno"> 124</span>&#160;<span class="preprocessor">#define ICM_CTRL_SWRST (_U_(0x1) &lt;&lt; ICM_CTRL_SWRST_Pos)</span></div>
<div class="line"><a name="l00125"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a06f438c49292df7b6e9895461b4aa9bf"> 125</a></span>&#160;<span class="preprocessor">#define ICM_CTRL_REHASH_Pos 4 </span></div>
<div class="line"><a name="l00126"></a><span class="lineno"> 126</span>&#160;<span class="preprocessor">#define ICM_CTRL_REHASH_Msk (_U_(0xF) &lt;&lt; ICM_CTRL_REHASH_Pos)</span></div>
<div class="line"><a name="l00127"></a><span class="lineno"> 127</span>&#160;<span class="preprocessor">#define ICM_CTRL_REHASH(value) (ICM_CTRL_REHASH_Msk &amp; ((value) &lt;&lt; ICM_CTRL_REHASH_Pos))</span></div>
<div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a5ab7756bdf89b979b96533438a7acdc1"> 128</a></span>&#160;<span class="preprocessor">#define ICM_CTRL_RMDIS_Pos 8 </span></div>
<div class="line"><a name="l00129"></a><span class="lineno"> 129</span>&#160;<span class="preprocessor">#define ICM_CTRL_RMDIS_Msk (_U_(0xF) &lt;&lt; ICM_CTRL_RMDIS_Pos)</span></div>
<div class="line"><a name="l00130"></a><span class="lineno"> 130</span>&#160;<span class="preprocessor">#define ICM_CTRL_RMDIS(value) (ICM_CTRL_RMDIS_Msk &amp; ((value) &lt;&lt; ICM_CTRL_RMDIS_Pos))</span></div>
<div class="line"><a name="l00131"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a8f148e5a6865c61070b8579ddaae007c"> 131</a></span>&#160;<span class="preprocessor">#define ICM_CTRL_RMEN_Pos 12 </span></div>
<div class="line"><a name="l00132"></a><span class="lineno"> 132</span>&#160;<span class="preprocessor">#define ICM_CTRL_RMEN_Msk (_U_(0xF) &lt;&lt; ICM_CTRL_RMEN_Pos)</span></div>
<div class="line"><a name="l00133"></a><span class="lineno"> 133</span>&#160;<span class="preprocessor">#define ICM_CTRL_RMEN(value) (ICM_CTRL_RMEN_Msk &amp; ((value) &lt;&lt; ICM_CTRL_RMEN_Pos))</span></div>
<div class="line"><a name="l00134"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#adbfb9318f932c01f8bd4a82a8223dc2f"> 134</a></span>&#160;<span class="preprocessor">#define ICM_CTRL_MASK _U_(0x0000FFF7) </span></div>
<div class="line"><a name="l00136"></a><span class="lineno"> 136</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- ICM_SR : (ICM Offset: 0x08) (R/ 32) Status -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00137"></a><span class="lineno"> 137</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00138"></a><span class="lineno"><a class="line" href="unionICM__SR__Type.html"> 138</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00139"></a><span class="lineno"> 139</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00140"></a><span class="lineno"><a class="line" href="unionICM__SR__Type.html#a95f1e285288056e72e79d2011a9d76d0"> 140</a></span>&#160; uint32_t <a class="code" href="unionICM__SR__Type.html#a95f1e285288056e72e79d2011a9d76d0">ENABLE</a>:1; </div>
<div class="line"><a name="l00141"></a><span class="lineno"><a class="line" href="unionICM__SR__Type.html#ae59b88af1f8a22e0ee4519cff1962d3a"> 141</a></span>&#160; uint32_t :7; </div>
<div class="line"><a name="l00142"></a><span class="lineno"><a class="line" href="unionICM__SR__Type.html#a79916fd0ab4bb4f71a0f9166db844a09"> 142</a></span>&#160; uint32_t <a class="code" href="unionICM__SR__Type.html#a79916fd0ab4bb4f71a0f9166db844a09">RAWRMDIS</a>:4; </div>
<div class="line"><a name="l00143"></a><span class="lineno"><a class="line" href="unionICM__SR__Type.html#a604223ac33df866166d832cb93a8d078"> 143</a></span>&#160; uint32_t <a class="code" href="unionICM__SR__Type.html#a604223ac33df866166d832cb93a8d078">RMDIS</a>:4; </div>
<div class="line"><a name="l00144"></a><span class="lineno"><a class="line" href="unionICM__SR__Type.html#a058193844c6374559637bfe2b8b73ffa"> 144</a></span>&#160; uint32_t :16; </div>
<div class="line"><a name="l00145"></a><span class="lineno"><a class="line" href="unionICM__SR__Type.html#ad2635d2fca3abcaf4fff7680510b7c74"> 145</a></span>&#160; } bit; </div>
<div class="line"><a name="l00146"></a><span class="lineno"><a class="line" href="unionICM__SR__Type.html#a2861fb249cba6a1874e3c03fa7e95259"> 146</a></span>&#160; uint32_t <a class="code" href="unionICM__SR__Type.html#a2861fb249cba6a1874e3c03fa7e95259">reg</a>; </div>
<div class="line"><a name="l00147"></a><span class="lineno"> 147</span>&#160;} <a class="code" href="unionICM__SR__Type.html">ICM_SR_Type</a>;</div>
<div class="line"><a name="l00148"></a><span class="lineno"> 148</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00149"></a><span class="lineno"> 149</span>&#160; </div>
<div class="line"><a name="l00150"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a9eff34ae7607ecc48a2b05753b9e8529"> 150</a></span>&#160;<span class="preprocessor">#define ICM_SR_OFFSET 0x08 </span></div>
<div class="line"><a name="l00151"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a93904219d9a2e2c3af67a47ed1d7cef0"> 151</a></span>&#160;<span class="preprocessor">#define ICM_SR_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00153"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#acb5bbf14d430310febaa603c60618243"> 153</a></span>&#160;<span class="preprocessor">#define ICM_SR_ENABLE_Pos 0 </span></div>
<div class="line"><a name="l00154"></a><span class="lineno"> 154</span>&#160;<span class="preprocessor">#define ICM_SR_ENABLE (_U_(0x1) &lt;&lt; ICM_SR_ENABLE_Pos)</span></div>
<div class="line"><a name="l00155"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a637bbb6a8cdf15f02e72cef1066a843a"> 155</a></span>&#160;<span class="preprocessor">#define ICM_SR_RAWRMDIS_Pos 8 </span></div>
<div class="line"><a name="l00156"></a><span class="lineno"> 156</span>&#160;<span class="preprocessor">#define ICM_SR_RAWRMDIS_Msk (_U_(0xF) &lt;&lt; ICM_SR_RAWRMDIS_Pos)</span></div>
<div class="line"><a name="l00157"></a><span class="lineno"> 157</span>&#160;<span class="preprocessor">#define ICM_SR_RAWRMDIS(value) (ICM_SR_RAWRMDIS_Msk &amp; ((value) &lt;&lt; ICM_SR_RAWRMDIS_Pos))</span></div>
<div class="line"><a name="l00158"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a9ce3b97c60b7cd013e711c2f6df03e01"> 158</a></span>&#160;<span class="preprocessor">#define ICM_SR_RMDIS_Pos 12 </span></div>
<div class="line"><a name="l00159"></a><span class="lineno"> 159</span>&#160;<span class="preprocessor">#define ICM_SR_RMDIS_Msk (_U_(0xF) &lt;&lt; ICM_SR_RMDIS_Pos)</span></div>
<div class="line"><a name="l00160"></a><span class="lineno"> 160</span>&#160;<span class="preprocessor">#define ICM_SR_RMDIS(value) (ICM_SR_RMDIS_Msk &amp; ((value) &lt;&lt; ICM_SR_RMDIS_Pos))</span></div>
<div class="line"><a name="l00161"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a02420fe2fe0fbf37ed7a8b0b1396bc07"> 161</a></span>&#160;<span class="preprocessor">#define ICM_SR_MASK _U_(0x0000FF01) </span></div>
<div class="line"><a name="l00163"></a><span class="lineno"> 163</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- ICM_IER : (ICM Offset: 0x10) ( /W 32) Interrupt Enable -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00164"></a><span class="lineno"> 164</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00165"></a><span class="lineno"><a class="line" href="unionICM__IER__Type.html"> 165</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00166"></a><span class="lineno"> 166</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00167"></a><span class="lineno"><a class="line" href="unionICM__IER__Type.html#a5e02127594ce8e623c587b254581bfdc"> 167</a></span>&#160; uint32_t <a class="code" href="unionICM__IER__Type.html#a5e02127594ce8e623c587b254581bfdc">RHC</a>:4; </div>
<div class="line"><a name="l00168"></a><span class="lineno"><a class="line" href="unionICM__IER__Type.html#a5387d425973302e1c261022564eb7f71"> 168</a></span>&#160; uint32_t <a class="code" href="unionICM__IER__Type.html#a5387d425973302e1c261022564eb7f71">RDM</a>:4; </div>
<div class="line"><a name="l00169"></a><span class="lineno"><a class="line" href="unionICM__IER__Type.html#a6471026d8f77bf933c92a27169dbf65a"> 169</a></span>&#160; uint32_t <a class="code" href="unionICM__IER__Type.html#a6471026d8f77bf933c92a27169dbf65a">RBE</a>:4; </div>
<div class="line"><a name="l00170"></a><span class="lineno"><a class="line" href="unionICM__IER__Type.html#a08d788a849b5cb633fc99aa944072bc3"> 170</a></span>&#160; uint32_t <a class="code" href="unionICM__IER__Type.html#a08d788a849b5cb633fc99aa944072bc3">RWC</a>:4; </div>
<div class="line"><a name="l00171"></a><span class="lineno"><a class="line" href="unionICM__IER__Type.html#aaa77113c91dd9cbc325a44dd45cc9e0e"> 171</a></span>&#160; uint32_t <a class="code" href="unionICM__IER__Type.html#aaa77113c91dd9cbc325a44dd45cc9e0e">REC</a>:4; </div>
<div class="line"><a name="l00172"></a><span class="lineno"><a class="line" href="unionICM__IER__Type.html#a879ee642c03d8fe8fe63e9ea72829680"> 172</a></span>&#160; uint32_t <a class="code" href="unionICM__IER__Type.html#a879ee642c03d8fe8fe63e9ea72829680">RSU</a>:4; </div>
<div class="line"><a name="l00173"></a><span class="lineno"><a class="line" href="unionICM__IER__Type.html#a1cf05e47773ae891e75b5acbc0b7f3c5"> 173</a></span>&#160; uint32_t <a class="code" href="unionICM__IER__Type.html#a1cf05e47773ae891e75b5acbc0b7f3c5">URAD</a>:1; </div>
<div class="line"><a name="l00174"></a><span class="lineno"><a class="line" href="unionICM__IER__Type.html#abaccf99adeb1c1380bbf97e8ac2ee2d7"> 174</a></span>&#160; uint32_t :7; </div>
<div class="line"><a name="l00175"></a><span class="lineno"><a class="line" href="unionICM__IER__Type.html#a7db4b71d41a5bf7818d0e493b9e9e372"> 175</a></span>&#160; } bit; </div>
<div class="line"><a name="l00176"></a><span class="lineno"><a class="line" href="unionICM__IER__Type.html#a466341124eed99b951bafa4c83d9c9b3"> 176</a></span>&#160; uint32_t <a class="code" href="unionICM__IER__Type.html#a466341124eed99b951bafa4c83d9c9b3">reg</a>; </div>
<div class="line"><a name="l00177"></a><span class="lineno"> 177</span>&#160;} <a class="code" href="unionICM__IER__Type.html">ICM_IER_Type</a>;</div>
<div class="line"><a name="l00178"></a><span class="lineno"> 178</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00179"></a><span class="lineno"> 179</span>&#160; </div>
<div class="line"><a name="l00180"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a91bc75f2722c14e384e97b354d959bd9"> 180</a></span>&#160;<span class="preprocessor">#define ICM_IER_OFFSET 0x10 </span></div>
<div class="line"><a name="l00182"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a374b2adba5e70a052345ffd8d0791ab8"> 182</a></span>&#160;<span class="preprocessor">#define ICM_IER_RHC_Pos 0 </span></div>
<div class="line"><a name="l00183"></a><span class="lineno"> 183</span>&#160;<span class="preprocessor">#define ICM_IER_RHC_Msk (_U_(0xF) &lt;&lt; ICM_IER_RHC_Pos)</span></div>
<div class="line"><a name="l00184"></a><span class="lineno"> 184</span>&#160;<span class="preprocessor">#define ICM_IER_RHC(value) (ICM_IER_RHC_Msk &amp; ((value) &lt;&lt; ICM_IER_RHC_Pos))</span></div>
<div class="line"><a name="l00185"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a3ed262b27af0532b7380f6b1aca1cdeb"> 185</a></span>&#160;<span class="preprocessor">#define ICM_IER_RDM_Pos 4 </span></div>
<div class="line"><a name="l00186"></a><span class="lineno"> 186</span>&#160;<span class="preprocessor">#define ICM_IER_RDM_Msk (_U_(0xF) &lt;&lt; ICM_IER_RDM_Pos)</span></div>
<div class="line"><a name="l00187"></a><span class="lineno"> 187</span>&#160;<span class="preprocessor">#define ICM_IER_RDM(value) (ICM_IER_RDM_Msk &amp; ((value) &lt;&lt; ICM_IER_RDM_Pos))</span></div>
<div class="line"><a name="l00188"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ac930ff35c8fef14b84526778ca6af303"> 188</a></span>&#160;<span class="preprocessor">#define ICM_IER_RBE_Pos 8 </span></div>
<div class="line"><a name="l00189"></a><span class="lineno"> 189</span>&#160;<span class="preprocessor">#define ICM_IER_RBE_Msk (_U_(0xF) &lt;&lt; ICM_IER_RBE_Pos)</span></div>
<div class="line"><a name="l00190"></a><span class="lineno"> 190</span>&#160;<span class="preprocessor">#define ICM_IER_RBE(value) (ICM_IER_RBE_Msk &amp; ((value) &lt;&lt; ICM_IER_RBE_Pos))</span></div>
<div class="line"><a name="l00191"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ae4de540f1bb6664b9d48a55a7ce9540a"> 191</a></span>&#160;<span class="preprocessor">#define ICM_IER_RWC_Pos 12 </span></div>
<div class="line"><a name="l00192"></a><span class="lineno"> 192</span>&#160;<span class="preprocessor">#define ICM_IER_RWC_Msk (_U_(0xF) &lt;&lt; ICM_IER_RWC_Pos)</span></div>
<div class="line"><a name="l00193"></a><span class="lineno"> 193</span>&#160;<span class="preprocessor">#define ICM_IER_RWC(value) (ICM_IER_RWC_Msk &amp; ((value) &lt;&lt; ICM_IER_RWC_Pos))</span></div>
<div class="line"><a name="l00194"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a64133746185ba94d7173aec5184be79e"> 194</a></span>&#160;<span class="preprocessor">#define ICM_IER_REC_Pos 16 </span></div>
<div class="line"><a name="l00195"></a><span class="lineno"> 195</span>&#160;<span class="preprocessor">#define ICM_IER_REC_Msk (_U_(0xF) &lt;&lt; ICM_IER_REC_Pos)</span></div>
<div class="line"><a name="l00196"></a><span class="lineno"> 196</span>&#160;<span class="preprocessor">#define ICM_IER_REC(value) (ICM_IER_REC_Msk &amp; ((value) &lt;&lt; ICM_IER_REC_Pos))</span></div>
<div class="line"><a name="l00197"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a86c0a0188fa534ab0346ad2fe182d9e7"> 197</a></span>&#160;<span class="preprocessor">#define ICM_IER_RSU_Pos 20 </span></div>
<div class="line"><a name="l00198"></a><span class="lineno"> 198</span>&#160;<span class="preprocessor">#define ICM_IER_RSU_Msk (_U_(0xF) &lt;&lt; ICM_IER_RSU_Pos)</span></div>
<div class="line"><a name="l00199"></a><span class="lineno"> 199</span>&#160;<span class="preprocessor">#define ICM_IER_RSU(value) (ICM_IER_RSU_Msk &amp; ((value) &lt;&lt; ICM_IER_RSU_Pos))</span></div>
<div class="line"><a name="l00200"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#adffee19b11b0bf0270b929ae06d92665"> 200</a></span>&#160;<span class="preprocessor">#define ICM_IER_URAD_Pos 24 </span></div>
<div class="line"><a name="l00201"></a><span class="lineno"> 201</span>&#160;<span class="preprocessor">#define ICM_IER_URAD (_U_(0x1) &lt;&lt; ICM_IER_URAD_Pos)</span></div>
<div class="line"><a name="l00202"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a0b5e59e65e296c6645808db627cf291c"> 202</a></span>&#160;<span class="preprocessor">#define ICM_IER_MASK _U_(0x01FFFFFF) </span></div>
<div class="line"><a name="l00204"></a><span class="lineno"> 204</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- ICM_IDR : (ICM Offset: 0x14) ( /W 32) Interrupt Disable -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00205"></a><span class="lineno"> 205</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00206"></a><span class="lineno"><a class="line" href="unionICM__IDR__Type.html"> 206</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00207"></a><span class="lineno"> 207</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00208"></a><span class="lineno"><a class="line" href="unionICM__IDR__Type.html#a36524be4f4a2aff11d0836374cd45078"> 208</a></span>&#160; uint32_t <a class="code" href="unionICM__IDR__Type.html#a36524be4f4a2aff11d0836374cd45078">RHC</a>:4; </div>
<div class="line"><a name="l00209"></a><span class="lineno"><a class="line" href="unionICM__IDR__Type.html#a919932a92ca832de4276f204d51ac54f"> 209</a></span>&#160; uint32_t <a class="code" href="unionICM__IDR__Type.html#a919932a92ca832de4276f204d51ac54f">RDM</a>:4; </div>
<div class="line"><a name="l00210"></a><span class="lineno"><a class="line" href="unionICM__IDR__Type.html#aaec3b9403ce100dc39c7fc3ab30850a4"> 210</a></span>&#160; uint32_t <a class="code" href="unionICM__IDR__Type.html#aaec3b9403ce100dc39c7fc3ab30850a4">RBE</a>:4; </div>
<div class="line"><a name="l00211"></a><span class="lineno"><a class="line" href="unionICM__IDR__Type.html#acf24c98deccf45e85ee47ff65b4ecd9e"> 211</a></span>&#160; uint32_t <a class="code" href="unionICM__IDR__Type.html#acf24c98deccf45e85ee47ff65b4ecd9e">RWC</a>:4; </div>
<div class="line"><a name="l00212"></a><span class="lineno"><a class="line" href="unionICM__IDR__Type.html#a764d3c82cdd452998c40ebf9c50051c7"> 212</a></span>&#160; uint32_t <a class="code" href="unionICM__IDR__Type.html#a764d3c82cdd452998c40ebf9c50051c7">REC</a>:4; </div>
<div class="line"><a name="l00213"></a><span class="lineno"><a class="line" href="unionICM__IDR__Type.html#aff21797762fa17158a254d35f0a55f85"> 213</a></span>&#160; uint32_t <a class="code" href="unionICM__IDR__Type.html#aff21797762fa17158a254d35f0a55f85">RSU</a>:4; </div>
<div class="line"><a name="l00214"></a><span class="lineno"><a class="line" href="unionICM__IDR__Type.html#aca5ec7521b6f69502719e2d845d35049"> 214</a></span>&#160; uint32_t <a class="code" href="unionICM__IDR__Type.html#aca5ec7521b6f69502719e2d845d35049">URAD</a>:1; </div>
<div class="line"><a name="l00215"></a><span class="lineno"><a class="line" href="unionICM__IDR__Type.html#acc479ab134187ac56f4945ff5edb8e72"> 215</a></span>&#160; uint32_t :7; </div>
<div class="line"><a name="l00216"></a><span class="lineno"><a class="line" href="unionICM__IDR__Type.html#a16566bc4f2ed5eedd96d511706c53470"> 216</a></span>&#160; } bit; </div>
<div class="line"><a name="l00217"></a><span class="lineno"><a class="line" href="unionICM__IDR__Type.html#a3b189052af6bbfd3eecb6dc606c07647"> 217</a></span>&#160; uint32_t <a class="code" href="unionICM__IDR__Type.html#a3b189052af6bbfd3eecb6dc606c07647">reg</a>; </div>
<div class="line"><a name="l00218"></a><span class="lineno"> 218</span>&#160;} <a class="code" href="unionICM__IDR__Type.html">ICM_IDR_Type</a>;</div>
<div class="line"><a name="l00219"></a><span class="lineno"> 219</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00220"></a><span class="lineno"> 220</span>&#160; </div>
<div class="line"><a name="l00221"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#aee1fe1d5f91f39d79f20ca5c85c6ee42"> 221</a></span>&#160;<span class="preprocessor">#define ICM_IDR_OFFSET 0x14 </span></div>
<div class="line"><a name="l00222"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a107e55771afc5d9461f68db340cbcdb2"> 222</a></span>&#160;<span class="preprocessor">#define ICM_IDR_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00224"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a88d0785074f9666841e88af3767bb43a"> 224</a></span>&#160;<span class="preprocessor">#define ICM_IDR_RHC_Pos 0 </span></div>
<div class="line"><a name="l00225"></a><span class="lineno"> 225</span>&#160;<span class="preprocessor">#define ICM_IDR_RHC_Msk (_U_(0xF) &lt;&lt; ICM_IDR_RHC_Pos)</span></div>
<div class="line"><a name="l00226"></a><span class="lineno"> 226</span>&#160;<span class="preprocessor">#define ICM_IDR_RHC(value) (ICM_IDR_RHC_Msk &amp; ((value) &lt;&lt; ICM_IDR_RHC_Pos))</span></div>
<div class="line"><a name="l00227"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a82d539f4b6b69760806364b1e66ac299"> 227</a></span>&#160;<span class="preprocessor">#define ICM_IDR_RDM_Pos 4 </span></div>
<div class="line"><a name="l00228"></a><span class="lineno"> 228</span>&#160;<span class="preprocessor">#define ICM_IDR_RDM_Msk (_U_(0xF) &lt;&lt; ICM_IDR_RDM_Pos)</span></div>
<div class="line"><a name="l00229"></a><span class="lineno"> 229</span>&#160;<span class="preprocessor">#define ICM_IDR_RDM(value) (ICM_IDR_RDM_Msk &amp; ((value) &lt;&lt; ICM_IDR_RDM_Pos))</span></div>
<div class="line"><a name="l00230"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ab955680edc02a5e22e255418df4c9255"> 230</a></span>&#160;<span class="preprocessor">#define ICM_IDR_RBE_Pos 8 </span></div>
<div class="line"><a name="l00231"></a><span class="lineno"> 231</span>&#160;<span class="preprocessor">#define ICM_IDR_RBE_Msk (_U_(0xF) &lt;&lt; ICM_IDR_RBE_Pos)</span></div>
<div class="line"><a name="l00232"></a><span class="lineno"> 232</span>&#160;<span class="preprocessor">#define ICM_IDR_RBE(value) (ICM_IDR_RBE_Msk &amp; ((value) &lt;&lt; ICM_IDR_RBE_Pos))</span></div>
<div class="line"><a name="l00233"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a6acd2c6a5fc257c89374ed306704e247"> 233</a></span>&#160;<span class="preprocessor">#define ICM_IDR_RWC_Pos 12 </span></div>
<div class="line"><a name="l00234"></a><span class="lineno"> 234</span>&#160;<span class="preprocessor">#define ICM_IDR_RWC_Msk (_U_(0xF) &lt;&lt; ICM_IDR_RWC_Pos)</span></div>
<div class="line"><a name="l00235"></a><span class="lineno"> 235</span>&#160;<span class="preprocessor">#define ICM_IDR_RWC(value) (ICM_IDR_RWC_Msk &amp; ((value) &lt;&lt; ICM_IDR_RWC_Pos))</span></div>
<div class="line"><a name="l00236"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a002c6c31230b5a572c7688474cc6ddf8"> 236</a></span>&#160;<span class="preprocessor">#define ICM_IDR_REC_Pos 16 </span></div>
<div class="line"><a name="l00237"></a><span class="lineno"> 237</span>&#160;<span class="preprocessor">#define ICM_IDR_REC_Msk (_U_(0xF) &lt;&lt; ICM_IDR_REC_Pos)</span></div>
<div class="line"><a name="l00238"></a><span class="lineno"> 238</span>&#160;<span class="preprocessor">#define ICM_IDR_REC(value) (ICM_IDR_REC_Msk &amp; ((value) &lt;&lt; ICM_IDR_REC_Pos))</span></div>
<div class="line"><a name="l00239"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a6b3681ffa45121a4b9178108df8fb9c0"> 239</a></span>&#160;<span class="preprocessor">#define ICM_IDR_RSU_Pos 20 </span></div>
<div class="line"><a name="l00240"></a><span class="lineno"> 240</span>&#160;<span class="preprocessor">#define ICM_IDR_RSU_Msk (_U_(0xF) &lt;&lt; ICM_IDR_RSU_Pos)</span></div>
<div class="line"><a name="l00241"></a><span class="lineno"> 241</span>&#160;<span class="preprocessor">#define ICM_IDR_RSU(value) (ICM_IDR_RSU_Msk &amp; ((value) &lt;&lt; ICM_IDR_RSU_Pos))</span></div>
<div class="line"><a name="l00242"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a19ea7b9b6e2156759deebd8b2d08fa29"> 242</a></span>&#160;<span class="preprocessor">#define ICM_IDR_URAD_Pos 24 </span></div>
<div class="line"><a name="l00243"></a><span class="lineno"> 243</span>&#160;<span class="preprocessor">#define ICM_IDR_URAD (_U_(0x1) &lt;&lt; ICM_IDR_URAD_Pos)</span></div>
<div class="line"><a name="l00244"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a043cc9e91b9a8b8e9f6dce045ec279d9"> 244</a></span>&#160;<span class="preprocessor">#define ICM_IDR_MASK _U_(0x01FFFFFF) </span></div>
<div class="line"><a name="l00246"></a><span class="lineno"> 246</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- ICM_IMR : (ICM Offset: 0x18) (R/ 32) Interrupt Mask -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00247"></a><span class="lineno"> 247</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00248"></a><span class="lineno"><a class="line" href="unionICM__IMR__Type.html"> 248</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00249"></a><span class="lineno"> 249</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00250"></a><span class="lineno"><a class="line" href="unionICM__IMR__Type.html#abfaaace3f03f8c8ef87831de2f22ea24"> 250</a></span>&#160; uint32_t <a class="code" href="unionICM__IMR__Type.html#abfaaace3f03f8c8ef87831de2f22ea24">RHC</a>:4; </div>
<div class="line"><a name="l00251"></a><span class="lineno"><a class="line" href="unionICM__IMR__Type.html#ae093d52b848138c8abbe45c11e5177f0"> 251</a></span>&#160; uint32_t <a class="code" href="unionICM__IMR__Type.html#ae093d52b848138c8abbe45c11e5177f0">RDM</a>:4; </div>
<div class="line"><a name="l00252"></a><span class="lineno"><a class="line" href="unionICM__IMR__Type.html#a444244b29e0f6972436718046e8d94f2"> 252</a></span>&#160; uint32_t <a class="code" href="unionICM__IMR__Type.html#a444244b29e0f6972436718046e8d94f2">RBE</a>:4; </div>
<div class="line"><a name="l00253"></a><span class="lineno"><a class="line" href="unionICM__IMR__Type.html#a5394ba5b6ac21d21277f6bf00502862c"> 253</a></span>&#160; uint32_t <a class="code" href="unionICM__IMR__Type.html#a5394ba5b6ac21d21277f6bf00502862c">RWC</a>:4; </div>
<div class="line"><a name="l00254"></a><span class="lineno"><a class="line" href="unionICM__IMR__Type.html#aad505dca1277568a62caf741522cd4e4"> 254</a></span>&#160; uint32_t <a class="code" href="unionICM__IMR__Type.html#aad505dca1277568a62caf741522cd4e4">REC</a>:4; </div>
<div class="line"><a name="l00255"></a><span class="lineno"><a class="line" href="unionICM__IMR__Type.html#a455b46a4edeb118caf8bba3200e11e6d"> 255</a></span>&#160; uint32_t <a class="code" href="unionICM__IMR__Type.html#a455b46a4edeb118caf8bba3200e11e6d">RSU</a>:4; </div>
<div class="line"><a name="l00256"></a><span class="lineno"><a class="line" href="unionICM__IMR__Type.html#a98b698bbc8f58f933d34dd812d54b52f"> 256</a></span>&#160; uint32_t <a class="code" href="unionICM__IMR__Type.html#a98b698bbc8f58f933d34dd812d54b52f">URAD</a>:1; </div>
<div class="line"><a name="l00257"></a><span class="lineno"><a class="line" href="unionICM__IMR__Type.html#ad450a77624d93e0e696136220c8a7d95"> 257</a></span>&#160; uint32_t :7; </div>
<div class="line"><a name="l00258"></a><span class="lineno"><a class="line" href="unionICM__IMR__Type.html#ad8b98f73b3439319de507718e2d4c306"> 258</a></span>&#160; } bit; </div>
<div class="line"><a name="l00259"></a><span class="lineno"><a class="line" href="unionICM__IMR__Type.html#ab852bca663af076e40816e258fe5657e"> 259</a></span>&#160; uint32_t <a class="code" href="unionICM__IMR__Type.html#ab852bca663af076e40816e258fe5657e">reg</a>; </div>
<div class="line"><a name="l00260"></a><span class="lineno"> 260</span>&#160;} <a class="code" href="unionICM__IMR__Type.html">ICM_IMR_Type</a>;</div>
<div class="line"><a name="l00261"></a><span class="lineno"> 261</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00262"></a><span class="lineno"> 262</span>&#160; </div>
<div class="line"><a name="l00263"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#afae17a93f3662fb5a0836ef14dfd2c2c"> 263</a></span>&#160;<span class="preprocessor">#define ICM_IMR_OFFSET 0x18 </span></div>
<div class="line"><a name="l00264"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a2837dd779d05d40aab13415472fd372c"> 264</a></span>&#160;<span class="preprocessor">#define ICM_IMR_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00266"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a95c48bcbce839847a3eb4c9ceebd2e2f"> 266</a></span>&#160;<span class="preprocessor">#define ICM_IMR_RHC_Pos 0 </span></div>
<div class="line"><a name="l00267"></a><span class="lineno"> 267</span>&#160;<span class="preprocessor">#define ICM_IMR_RHC_Msk (_U_(0xF) &lt;&lt; ICM_IMR_RHC_Pos)</span></div>
<div class="line"><a name="l00268"></a><span class="lineno"> 268</span>&#160;<span class="preprocessor">#define ICM_IMR_RHC(value) (ICM_IMR_RHC_Msk &amp; ((value) &lt;&lt; ICM_IMR_RHC_Pos))</span></div>
<div class="line"><a name="l00269"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a3921601739425742942544922713f4ab"> 269</a></span>&#160;<span class="preprocessor">#define ICM_IMR_RDM_Pos 4 </span></div>
<div class="line"><a name="l00270"></a><span class="lineno"> 270</span>&#160;<span class="preprocessor">#define ICM_IMR_RDM_Msk (_U_(0xF) &lt;&lt; ICM_IMR_RDM_Pos)</span></div>
<div class="line"><a name="l00271"></a><span class="lineno"> 271</span>&#160;<span class="preprocessor">#define ICM_IMR_RDM(value) (ICM_IMR_RDM_Msk &amp; ((value) &lt;&lt; ICM_IMR_RDM_Pos))</span></div>
<div class="line"><a name="l00272"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#aaaf8635401239917ebdfbc31ca13200e"> 272</a></span>&#160;<span class="preprocessor">#define ICM_IMR_RBE_Pos 8 </span></div>
<div class="line"><a name="l00273"></a><span class="lineno"> 273</span>&#160;<span class="preprocessor">#define ICM_IMR_RBE_Msk (_U_(0xF) &lt;&lt; ICM_IMR_RBE_Pos)</span></div>
<div class="line"><a name="l00274"></a><span class="lineno"> 274</span>&#160;<span class="preprocessor">#define ICM_IMR_RBE(value) (ICM_IMR_RBE_Msk &amp; ((value) &lt;&lt; ICM_IMR_RBE_Pos))</span></div>
<div class="line"><a name="l00275"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a36e24dd455f0ed97d38ecfa12427244b"> 275</a></span>&#160;<span class="preprocessor">#define ICM_IMR_RWC_Pos 12 </span></div>
<div class="line"><a name="l00276"></a><span class="lineno"> 276</span>&#160;<span class="preprocessor">#define ICM_IMR_RWC_Msk (_U_(0xF) &lt;&lt; ICM_IMR_RWC_Pos)</span></div>
<div class="line"><a name="l00277"></a><span class="lineno"> 277</span>&#160;<span class="preprocessor">#define ICM_IMR_RWC(value) (ICM_IMR_RWC_Msk &amp; ((value) &lt;&lt; ICM_IMR_RWC_Pos))</span></div>
<div class="line"><a name="l00278"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#aa34e17abd6b2fb112f014dc6ab39a5da"> 278</a></span>&#160;<span class="preprocessor">#define ICM_IMR_REC_Pos 16 </span></div>
<div class="line"><a name="l00279"></a><span class="lineno"> 279</span>&#160;<span class="preprocessor">#define ICM_IMR_REC_Msk (_U_(0xF) &lt;&lt; ICM_IMR_REC_Pos)</span></div>
<div class="line"><a name="l00280"></a><span class="lineno"> 280</span>&#160;<span class="preprocessor">#define ICM_IMR_REC(value) (ICM_IMR_REC_Msk &amp; ((value) &lt;&lt; ICM_IMR_REC_Pos))</span></div>
<div class="line"><a name="l00281"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a5e965edfba33ccaa8724d5d768343a91"> 281</a></span>&#160;<span class="preprocessor">#define ICM_IMR_RSU_Pos 20 </span></div>
<div class="line"><a name="l00282"></a><span class="lineno"> 282</span>&#160;<span class="preprocessor">#define ICM_IMR_RSU_Msk (_U_(0xF) &lt;&lt; ICM_IMR_RSU_Pos)</span></div>
<div class="line"><a name="l00283"></a><span class="lineno"> 283</span>&#160;<span class="preprocessor">#define ICM_IMR_RSU(value) (ICM_IMR_RSU_Msk &amp; ((value) &lt;&lt; ICM_IMR_RSU_Pos))</span></div>
<div class="line"><a name="l00284"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a2167976906f6bef62a45720757245c54"> 284</a></span>&#160;<span class="preprocessor">#define ICM_IMR_URAD_Pos 24 </span></div>
<div class="line"><a name="l00285"></a><span class="lineno"> 285</span>&#160;<span class="preprocessor">#define ICM_IMR_URAD (_U_(0x1) &lt;&lt; ICM_IMR_URAD_Pos)</span></div>
<div class="line"><a name="l00286"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a4754d4b07a25873def8dcd5026f9fa0d"> 286</a></span>&#160;<span class="preprocessor">#define ICM_IMR_MASK _U_(0x01FFFFFF) </span></div>
<div class="line"><a name="l00288"></a><span class="lineno"> 288</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- ICM_ISR : (ICM Offset: 0x1C) (R/ 32) Interrupt Status -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00289"></a><span class="lineno"> 289</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00290"></a><span class="lineno"><a class="line" href="unionICM__ISR__Type.html"> 290</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00291"></a><span class="lineno"> 291</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00292"></a><span class="lineno"><a class="line" href="unionICM__ISR__Type.html#a2c4c4b55b03beae071639e608b0f8a87"> 292</a></span>&#160; uint32_t <a class="code" href="unionICM__ISR__Type.html#a2c4c4b55b03beae071639e608b0f8a87">RHC</a>:4; </div>
<div class="line"><a name="l00293"></a><span class="lineno"><a class="line" href="unionICM__ISR__Type.html#a95ae197af1cacfaf3653946e769b5711"> 293</a></span>&#160; uint32_t <a class="code" href="unionICM__ISR__Type.html#a95ae197af1cacfaf3653946e769b5711">RDM</a>:4; </div>
<div class="line"><a name="l00294"></a><span class="lineno"><a class="line" href="unionICM__ISR__Type.html#a26f7b92d04284e17094a954889e34c00"> 294</a></span>&#160; uint32_t <a class="code" href="unionICM__ISR__Type.html#a26f7b92d04284e17094a954889e34c00">RBE</a>:4; </div>
<div class="line"><a name="l00295"></a><span class="lineno"><a class="line" href="unionICM__ISR__Type.html#aec96af9771c9ac6de81bc1f553858f0e"> 295</a></span>&#160; uint32_t <a class="code" href="unionICM__ISR__Type.html#aec96af9771c9ac6de81bc1f553858f0e">RWC</a>:4; </div>
<div class="line"><a name="l00296"></a><span class="lineno"><a class="line" href="unionICM__ISR__Type.html#ae86a575c7539db4e89b6a8c76eab2313"> 296</a></span>&#160; uint32_t <a class="code" href="unionICM__ISR__Type.html#ae86a575c7539db4e89b6a8c76eab2313">REC</a>:4; </div>
<div class="line"><a name="l00297"></a><span class="lineno"><a class="line" href="unionICM__ISR__Type.html#ae1798754aaf26eb10a69049706b06cb7"> 297</a></span>&#160; uint32_t <a class="code" href="unionICM__ISR__Type.html#ae1798754aaf26eb10a69049706b06cb7">RSU</a>:4; </div>
<div class="line"><a name="l00298"></a><span class="lineno"><a class="line" href="unionICM__ISR__Type.html#af26e059e0e2cf1cc77da298a4acd2511"> 298</a></span>&#160; uint32_t <a class="code" href="unionICM__ISR__Type.html#af26e059e0e2cf1cc77da298a4acd2511">URAD</a>:1; </div>
<div class="line"><a name="l00299"></a><span class="lineno"><a class="line" href="unionICM__ISR__Type.html#a4949e6f2eb2279677399bac074dc964b"> 299</a></span>&#160; uint32_t :7; </div>
<div class="line"><a name="l00300"></a><span class="lineno"><a class="line" href="unionICM__ISR__Type.html#ab5fe29c83e1b6d4c05d2d0fb563ab87f"> 300</a></span>&#160; } bit; </div>
<div class="line"><a name="l00301"></a><span class="lineno"><a class="line" href="unionICM__ISR__Type.html#a443c26098907e4ded64a9568b414ffc6"> 301</a></span>&#160; uint32_t <a class="code" href="unionICM__ISR__Type.html#a443c26098907e4ded64a9568b414ffc6">reg</a>; </div>
<div class="line"><a name="l00302"></a><span class="lineno"> 302</span>&#160;} <a class="code" href="unionICM__ISR__Type.html">ICM_ISR_Type</a>;</div>
<div class="line"><a name="l00303"></a><span class="lineno"> 303</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00304"></a><span class="lineno"> 304</span>&#160; </div>
<div class="line"><a name="l00305"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a9f5925c508c4935ef60134e432b649bd"> 305</a></span>&#160;<span class="preprocessor">#define ICM_ISR_OFFSET 0x1C </span></div>
<div class="line"><a name="l00306"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a3b608434e49fcc38b1bdfe2d676f7fee"> 306</a></span>&#160;<span class="preprocessor">#define ICM_ISR_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00308"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ae0a365714ae6fafa290e70d9ba1d76a8"> 308</a></span>&#160;<span class="preprocessor">#define ICM_ISR_RHC_Pos 0 </span></div>
<div class="line"><a name="l00309"></a><span class="lineno"> 309</span>&#160;<span class="preprocessor">#define ICM_ISR_RHC_Msk (_U_(0xF) &lt;&lt; ICM_ISR_RHC_Pos)</span></div>
<div class="line"><a name="l00310"></a><span class="lineno"> 310</span>&#160;<span class="preprocessor">#define ICM_ISR_RHC(value) (ICM_ISR_RHC_Msk &amp; ((value) &lt;&lt; ICM_ISR_RHC_Pos))</span></div>
<div class="line"><a name="l00311"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a0c309772de04b613b38fa7267ef27352"> 311</a></span>&#160;<span class="preprocessor">#define ICM_ISR_RDM_Pos 4 </span></div>
<div class="line"><a name="l00312"></a><span class="lineno"> 312</span>&#160;<span class="preprocessor">#define ICM_ISR_RDM_Msk (_U_(0xF) &lt;&lt; ICM_ISR_RDM_Pos)</span></div>
<div class="line"><a name="l00313"></a><span class="lineno"> 313</span>&#160;<span class="preprocessor">#define ICM_ISR_RDM(value) (ICM_ISR_RDM_Msk &amp; ((value) &lt;&lt; ICM_ISR_RDM_Pos))</span></div>
<div class="line"><a name="l00314"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a4a92d77ddb0c05b189351d3f7743e153"> 314</a></span>&#160;<span class="preprocessor">#define ICM_ISR_RBE_Pos 8 </span></div>
<div class="line"><a name="l00315"></a><span class="lineno"> 315</span>&#160;<span class="preprocessor">#define ICM_ISR_RBE_Msk (_U_(0xF) &lt;&lt; ICM_ISR_RBE_Pos)</span></div>
<div class="line"><a name="l00316"></a><span class="lineno"> 316</span>&#160;<span class="preprocessor">#define ICM_ISR_RBE(value) (ICM_ISR_RBE_Msk &amp; ((value) &lt;&lt; ICM_ISR_RBE_Pos))</span></div>
<div class="line"><a name="l00317"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a3efdcea1c1ca9429fe1539c6e35b92be"> 317</a></span>&#160;<span class="preprocessor">#define ICM_ISR_RWC_Pos 12 </span></div>
<div class="line"><a name="l00318"></a><span class="lineno"> 318</span>&#160;<span class="preprocessor">#define ICM_ISR_RWC_Msk (_U_(0xF) &lt;&lt; ICM_ISR_RWC_Pos)</span></div>
<div class="line"><a name="l00319"></a><span class="lineno"> 319</span>&#160;<span class="preprocessor">#define ICM_ISR_RWC(value) (ICM_ISR_RWC_Msk &amp; ((value) &lt;&lt; ICM_ISR_RWC_Pos))</span></div>
<div class="line"><a name="l00320"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a8ba468532d5265969bc7c28c2a090aba"> 320</a></span>&#160;<span class="preprocessor">#define ICM_ISR_REC_Pos 16 </span></div>
<div class="line"><a name="l00321"></a><span class="lineno"> 321</span>&#160;<span class="preprocessor">#define ICM_ISR_REC_Msk (_U_(0xF) &lt;&lt; ICM_ISR_REC_Pos)</span></div>
<div class="line"><a name="l00322"></a><span class="lineno"> 322</span>&#160;<span class="preprocessor">#define ICM_ISR_REC(value) (ICM_ISR_REC_Msk &amp; ((value) &lt;&lt; ICM_ISR_REC_Pos))</span></div>
<div class="line"><a name="l00323"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a03062bb456a06371bb138896cf02abb4"> 323</a></span>&#160;<span class="preprocessor">#define ICM_ISR_RSU_Pos 20 </span></div>
<div class="line"><a name="l00324"></a><span class="lineno"> 324</span>&#160;<span class="preprocessor">#define ICM_ISR_RSU_Msk (_U_(0xF) &lt;&lt; ICM_ISR_RSU_Pos)</span></div>
<div class="line"><a name="l00325"></a><span class="lineno"> 325</span>&#160;<span class="preprocessor">#define ICM_ISR_RSU(value) (ICM_ISR_RSU_Msk &amp; ((value) &lt;&lt; ICM_ISR_RSU_Pos))</span></div>
<div class="line"><a name="l00326"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a723a502c86a366f7b7c4a76220b0d5ad"> 326</a></span>&#160;<span class="preprocessor">#define ICM_ISR_URAD_Pos 24 </span></div>
<div class="line"><a name="l00327"></a><span class="lineno"> 327</span>&#160;<span class="preprocessor">#define ICM_ISR_URAD (_U_(0x1) &lt;&lt; ICM_ISR_URAD_Pos)</span></div>
<div class="line"><a name="l00328"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ae13faba87f9349246a833f23bf312ab3"> 328</a></span>&#160;<span class="preprocessor">#define ICM_ISR_MASK _U_(0x01FFFFFF) </span></div>
<div class="line"><a name="l00330"></a><span class="lineno"> 330</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- ICM_UASR : (ICM Offset: 0x20) (R/ 32) Undefined Access Status -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00331"></a><span class="lineno"> 331</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00332"></a><span class="lineno"><a class="line" href="unionICM__UASR__Type.html"> 332</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00333"></a><span class="lineno"> 333</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00334"></a><span class="lineno"><a class="line" href="unionICM__UASR__Type.html#aeaa7f8dc90f760081e7613f30f6330bd"> 334</a></span>&#160; uint32_t <a class="code" href="unionICM__UASR__Type.html#aeaa7f8dc90f760081e7613f30f6330bd">URAT</a>:3; </div>
<div class="line"><a name="l00335"></a><span class="lineno"><a class="line" href="unionICM__UASR__Type.html#a5452bd7f9584d1ba26e73de34c035acb"> 335</a></span>&#160; uint32_t :29; </div>
<div class="line"><a name="l00336"></a><span class="lineno"><a class="line" href="unionICM__UASR__Type.html#a79ab16339732c1b6b855cce2a57993cd"> 336</a></span>&#160; } bit; </div>
<div class="line"><a name="l00337"></a><span class="lineno"><a class="line" href="unionICM__UASR__Type.html#a12b9e6e00aadf6d881a35e49a734e2f3"> 337</a></span>&#160; uint32_t <a class="code" href="unionICM__UASR__Type.html#a12b9e6e00aadf6d881a35e49a734e2f3">reg</a>; </div>
<div class="line"><a name="l00338"></a><span class="lineno"> 338</span>&#160;} <a class="code" href="unionICM__UASR__Type.html">ICM_UASR_Type</a>;</div>
<div class="line"><a name="l00339"></a><span class="lineno"> 339</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00340"></a><span class="lineno"> 340</span>&#160; </div>
<div class="line"><a name="l00341"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a8924c31a7717ccb12cd67942441b5166"> 341</a></span>&#160;<span class="preprocessor">#define ICM_UASR_OFFSET 0x20 </span></div>
<div class="line"><a name="l00342"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#abd5b522a7cfd485b9e25a17b17546c39"> 342</a></span>&#160;<span class="preprocessor">#define ICM_UASR_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00344"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a74e95221cafc6ba8165d2d60019581f4"> 344</a></span>&#160;<span class="preprocessor">#define ICM_UASR_URAT_Pos 0 </span></div>
<div class="line"><a name="l00345"></a><span class="lineno"> 345</span>&#160;<span class="preprocessor">#define ICM_UASR_URAT_Msk (_U_(0x7) &lt;&lt; ICM_UASR_URAT_Pos)</span></div>
<div class="line"><a name="l00346"></a><span class="lineno"> 346</span>&#160;<span class="preprocessor">#define ICM_UASR_URAT(value) (ICM_UASR_URAT_Msk &amp; ((value) &lt;&lt; ICM_UASR_URAT_Pos))</span></div>
<div class="line"><a name="l00347"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a0754f85597b05ee2fe3fcab99b8d4f63"> 347</a></span>&#160;<span class="preprocessor">#define ICM_UASR_URAT_UNSPEC_STRUCT_MEMBER_Val _U_(0x0) </span></div>
<div class="line"><a name="l00348"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a0c98cdb9cd6e868aa31ebd3bdb44cc85"> 348</a></span>&#160;<span class="preprocessor">#define ICM_UASR_URAT_CFG_MODIFIED_Val _U_(0x1) </span></div>
<div class="line"><a name="l00349"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#aa9bda1fde7de8ee902ff6b17373ae771"> 349</a></span>&#160;<span class="preprocessor">#define ICM_UASR_URAT_DSCR_MODIFIED_Val _U_(0x2) </span></div>
<div class="line"><a name="l00350"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a770c08190dc88cc58e1bce72b19bf316"> 350</a></span>&#160;<span class="preprocessor">#define ICM_UASR_URAT_HASH_MODIFIED_Val _U_(0x3) </span></div>
<div class="line"><a name="l00351"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#adf561d7956433dcd6002cbfb7235ad74"> 351</a></span>&#160;<span class="preprocessor">#define ICM_UASR_URAT_READ_ACCESS_Val _U_(0x4) </span></div>
<div class="line"><a name="l00352"></a><span class="lineno"> 352</span>&#160;<span class="preprocessor">#define ICM_UASR_URAT_UNSPEC_STRUCT_MEMBER (ICM_UASR_URAT_UNSPEC_STRUCT_MEMBER_Val &lt;&lt; ICM_UASR_URAT_Pos)</span></div>
<div class="line"><a name="l00353"></a><span class="lineno"> 353</span>&#160;<span class="preprocessor">#define ICM_UASR_URAT_CFG_MODIFIED (ICM_UASR_URAT_CFG_MODIFIED_Val &lt;&lt; ICM_UASR_URAT_Pos)</span></div>
<div class="line"><a name="l00354"></a><span class="lineno"> 354</span>&#160;<span class="preprocessor">#define ICM_UASR_URAT_DSCR_MODIFIED (ICM_UASR_URAT_DSCR_MODIFIED_Val &lt;&lt; ICM_UASR_URAT_Pos)</span></div>
<div class="line"><a name="l00355"></a><span class="lineno"> 355</span>&#160;<span class="preprocessor">#define ICM_UASR_URAT_HASH_MODIFIED (ICM_UASR_URAT_HASH_MODIFIED_Val &lt;&lt; ICM_UASR_URAT_Pos)</span></div>
<div class="line"><a name="l00356"></a><span class="lineno"> 356</span>&#160;<span class="preprocessor">#define ICM_UASR_URAT_READ_ACCESS (ICM_UASR_URAT_READ_ACCESS_Val &lt;&lt; ICM_UASR_URAT_Pos)</span></div>
<div class="line"><a name="l00357"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#addbb92795a033d99b4bd2464bd7bdf83"> 357</a></span>&#160;<span class="preprocessor">#define ICM_UASR_MASK _U_(0x00000007) </span></div>
<div class="line"><a name="l00359"></a><span class="lineno"> 359</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- ICM_DSCR : (ICM Offset: 0x30) (R/W 32) Region Descriptor Area Start Address -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00360"></a><span class="lineno"> 360</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00361"></a><span class="lineno"><a class="line" href="unionICM__DSCR__Type.html"> 361</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00362"></a><span class="lineno"> 362</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00363"></a><span class="lineno"><a class="line" href="unionICM__DSCR__Type.html#a85986ff85b25cad1c7592ea350388fed"> 363</a></span>&#160; uint32_t :6; </div>
<div class="line"><a name="l00364"></a><span class="lineno"><a class="line" href="unionICM__DSCR__Type.html#aaaaef0b83e1943217986d85c49309c67"> 364</a></span>&#160; uint32_t <a class="code" href="unionICM__DSCR__Type.html#aaaaef0b83e1943217986d85c49309c67">DASA</a>:26; </div>
<div class="line"><a name="l00365"></a><span class="lineno"><a class="line" href="unionICM__DSCR__Type.html#a7528db5b56c449db2c3d15df3af3e026"> 365</a></span>&#160; } bit; </div>
<div class="line"><a name="l00366"></a><span class="lineno"><a class="line" href="unionICM__DSCR__Type.html#ab14d1a4a1844a375bfd24f69c5f217ff"> 366</a></span>&#160; uint32_t <a class="code" href="unionICM__DSCR__Type.html#ab14d1a4a1844a375bfd24f69c5f217ff">reg</a>; </div>
<div class="line"><a name="l00367"></a><span class="lineno"> 367</span>&#160;} <a class="code" href="unionICM__DSCR__Type.html">ICM_DSCR_Type</a>;</div>
<div class="line"><a name="l00368"></a><span class="lineno"> 368</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00369"></a><span class="lineno"> 369</span>&#160; </div>
<div class="line"><a name="l00370"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a3550fcc8833e477aa50edf2706dbb132"> 370</a></span>&#160;<span class="preprocessor">#define ICM_DSCR_OFFSET 0x30 </span></div>
<div class="line"><a name="l00371"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#aaded598f48356cbb28029720b62c8ffa"> 371</a></span>&#160;<span class="preprocessor">#define ICM_DSCR_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00373"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a383d719038483930302846b1ed1df420"> 373</a></span>&#160;<span class="preprocessor">#define ICM_DSCR_DASA_Pos 6 </span></div>
<div class="line"><a name="l00374"></a><span class="lineno"> 374</span>&#160;<span class="preprocessor">#define ICM_DSCR_DASA_Msk (_U_(0x3FFFFFF) &lt;&lt; ICM_DSCR_DASA_Pos)</span></div>
<div class="line"><a name="l00375"></a><span class="lineno"> 375</span>&#160;<span class="preprocessor">#define ICM_DSCR_DASA(value) (ICM_DSCR_DASA_Msk &amp; ((value) &lt;&lt; ICM_DSCR_DASA_Pos))</span></div>
<div class="line"><a name="l00376"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ae705a66d854dc37c052eb1d184dd6bad"> 376</a></span>&#160;<span class="preprocessor">#define ICM_DSCR_MASK _U_(0xFFFFFFC0) </span></div>
<div class="line"><a name="l00378"></a><span class="lineno"> 378</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- ICM_HASH : (ICM Offset: 0x34) (R/W 32) Region Hash Area Start Address -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00379"></a><span class="lineno"> 379</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00380"></a><span class="lineno"><a class="line" href="unionICM__HASH__Type.html"> 380</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00381"></a><span class="lineno"> 381</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00382"></a><span class="lineno"><a class="line" href="unionICM__HASH__Type.html#a7dc8a87bf4ce6bb43edb43550a0fa19e"> 382</a></span>&#160; uint32_t :7; </div>
<div class="line"><a name="l00383"></a><span class="lineno"><a class="line" href="unionICM__HASH__Type.html#a146dc6f4fcd9cc11aa3fc5daac4a9000"> 383</a></span>&#160; uint32_t <a class="code" href="unionICM__HASH__Type.html#a146dc6f4fcd9cc11aa3fc5daac4a9000">HASA</a>:25; </div>
<div class="line"><a name="l00384"></a><span class="lineno"><a class="line" href="unionICM__HASH__Type.html#a8c23d36f6bc910a00c2ee7f85ae25e92"> 384</a></span>&#160; } bit; </div>
<div class="line"><a name="l00385"></a><span class="lineno"><a class="line" href="unionICM__HASH__Type.html#a11b3160afe29e160a94e9c579f1e983b"> 385</a></span>&#160; uint32_t <a class="code" href="unionICM__HASH__Type.html#a11b3160afe29e160a94e9c579f1e983b">reg</a>; </div>
<div class="line"><a name="l00386"></a><span class="lineno"> 386</span>&#160;} <a class="code" href="unionICM__HASH__Type.html">ICM_HASH_Type</a>;</div>
<div class="line"><a name="l00387"></a><span class="lineno"> 387</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00388"></a><span class="lineno"> 388</span>&#160; </div>
<div class="line"><a name="l00389"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#aca2c3512ee6410914bc8a3c40fb25a6d"> 389</a></span>&#160;<span class="preprocessor">#define ICM_HASH_OFFSET 0x34 </span></div>
<div class="line"><a name="l00390"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a371bf6f011243ff620af2351c0b99a2a"> 390</a></span>&#160;<span class="preprocessor">#define ICM_HASH_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00392"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ade058a8352ff18ae5b813f5f66de3bb4"> 392</a></span>&#160;<span class="preprocessor">#define ICM_HASH_HASA_Pos 7 </span></div>
<div class="line"><a name="l00393"></a><span class="lineno"> 393</span>&#160;<span class="preprocessor">#define ICM_HASH_HASA_Msk (_U_(0x1FFFFFF) &lt;&lt; ICM_HASH_HASA_Pos)</span></div>
<div class="line"><a name="l00394"></a><span class="lineno"> 394</span>&#160;<span class="preprocessor">#define ICM_HASH_HASA(value) (ICM_HASH_HASA_Msk &amp; ((value) &lt;&lt; ICM_HASH_HASA_Pos))</span></div>
<div class="line"><a name="l00395"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ac30dc1ad19378c908a800e224080c7d1"> 395</a></span>&#160;<span class="preprocessor">#define ICM_HASH_MASK _U_(0xFFFFFF80) </span></div>
<div class="line"><a name="l00397"></a><span class="lineno"> 397</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- ICM_UIHVAL : (ICM Offset: 0x38) ( /W 32) User Initial Hash Value n -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00398"></a><span class="lineno"> 398</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00399"></a><span class="lineno"><a class="line" href="unionICM__UIHVAL__Type.html"> 399</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00400"></a><span class="lineno"> 400</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00401"></a><span class="lineno"><a class="line" href="unionICM__UIHVAL__Type.html#a11b1c19395139eb104c0331a0800ccb3"> 401</a></span>&#160; uint32_t <a class="code" href="unionICM__UIHVAL__Type.html#a11b1c19395139eb104c0331a0800ccb3">VAL</a>:32; </div>
<div class="line"><a name="l00402"></a><span class="lineno"><a class="line" href="unionICM__UIHVAL__Type.html#a349ccc079f476391ec3a5b75f2e17c6c"> 402</a></span>&#160; } bit; </div>
<div class="line"><a name="l00403"></a><span class="lineno"><a class="line" href="unionICM__UIHVAL__Type.html#aec638dffd5b3974d6cb5407d56df007f"> 403</a></span>&#160; uint32_t <a class="code" href="unionICM__UIHVAL__Type.html#aec638dffd5b3974d6cb5407d56df007f">reg</a>; </div>
<div class="line"><a name="l00404"></a><span class="lineno"> 404</span>&#160;} <a class="code" href="unionICM__UIHVAL__Type.html">ICM_UIHVAL_Type</a>;</div>
<div class="line"><a name="l00405"></a><span class="lineno"> 405</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00406"></a><span class="lineno"> 406</span>&#160; </div>
<div class="line"><a name="l00407"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a18e9d8698391c20741c7696eca4677b5"> 407</a></span>&#160;<span class="preprocessor">#define ICM_UIHVAL_OFFSET 0x38 </span></div>
<div class="line"><a name="l00408"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a3f8811fc8ed65a98f9ad4b37c4194aa1"> 408</a></span>&#160;<span class="preprocessor">#define ICM_UIHVAL_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00410"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ad34d4dbc9035f963a3180993accd34a6"> 410</a></span>&#160;<span class="preprocessor">#define ICM_UIHVAL_VAL_Pos 0 </span></div>
<div class="line"><a name="l00411"></a><span class="lineno"> 411</span>&#160;<span class="preprocessor">#define ICM_UIHVAL_VAL_Msk (_U_(0xFFFFFFFF) &lt;&lt; ICM_UIHVAL_VAL_Pos)</span></div>
<div class="line"><a name="l00412"></a><span class="lineno"> 412</span>&#160;<span class="preprocessor">#define ICM_UIHVAL_VAL(value) (ICM_UIHVAL_VAL_Msk &amp; ((value) &lt;&lt; ICM_UIHVAL_VAL_Pos))</span></div>
<div class="line"><a name="l00413"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a0242ef965585ba62297da1e30aa83be0"> 413</a></span>&#160;<span class="preprocessor">#define ICM_UIHVAL_MASK _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00415"></a><span class="lineno"> 415</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- ICM_RADDR : (ICM Offset: 0x00) (R/W 32) Region Start Address -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00416"></a><span class="lineno"> 416</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00417"></a><span class="lineno"><a class="line" href="unionICM__RADDR__Type.html"> 417</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00418"></a><span class="lineno"><a class="line" href="unionICM__RADDR__Type.html#a4e90ed7f3caa11a30972bade37a0bc69"> 418</a></span>&#160; uint32_t <a class="code" href="unionICM__RADDR__Type.html#a4e90ed7f3caa11a30972bade37a0bc69">reg</a>; </div>
<div class="line"><a name="l00419"></a><span class="lineno"> 419</span>&#160;} <a class="code" href="unionICM__RADDR__Type.html">ICM_RADDR_Type</a>;</div>
<div class="line"><a name="l00420"></a><span class="lineno"> 420</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00421"></a><span class="lineno"> 421</span>&#160; </div>
<div class="line"><a name="l00422"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ac18ac78a1dd5e4f44ac00befd46768df"> 422</a></span>&#160;<span class="preprocessor">#define ICM_RADDR_OFFSET 0x00 </span></div>
<div class="line"><a name="l00423"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a2559ac7ae6f814b9d3ebb21456906296"> 423</a></span>&#160;<span class="preprocessor">#define ICM_RADDR_MASK _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00425"></a><span class="lineno"> 425</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- ICM_RCFG : (ICM Offset: 0x04) (R/W 32) Region Configuration -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00426"></a><span class="lineno"> 426</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00427"></a><span class="lineno"><a class="line" href="unionICM__RCFG__Type.html"> 427</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00428"></a><span class="lineno"> 428</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00429"></a><span class="lineno"><a class="line" href="unionICM__RCFG__Type.html#aabf8ed373ef4bfb505c3ec1b9b969ba0"> 429</a></span>&#160; uint32_t <a class="code" href="unionICM__RCFG__Type.html#aabf8ed373ef4bfb505c3ec1b9b969ba0">CDWBN</a>:1; </div>
<div class="line"><a name="l00430"></a><span class="lineno"><a class="line" href="unionICM__RCFG__Type.html#a3ca2d4233f98c9ca1a4839b012f736d2"> 430</a></span>&#160; uint32_t <a class="code" href="unionICM__RCFG__Type.html#a3ca2d4233f98c9ca1a4839b012f736d2">WRAP</a>:1; </div>
<div class="line"><a name="l00431"></a><span class="lineno"><a class="line" href="unionICM__RCFG__Type.html#a1a76a13263b836b3d2cacf7427d6bd77"> 431</a></span>&#160; uint32_t <a class="code" href="unionICM__RCFG__Type.html#a1a76a13263b836b3d2cacf7427d6bd77">EOM</a>:1; </div>
<div class="line"><a name="l00432"></a><span class="lineno"><a class="line" href="unionICM__RCFG__Type.html#ae41342ede75337012a093b08d1455430"> 432</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00433"></a><span class="lineno"><a class="line" href="unionICM__RCFG__Type.html#aee186ae77ad5a595c94433e9504c3e03"> 433</a></span>&#160; uint32_t <a class="code" href="unionICM__RCFG__Type.html#aee186ae77ad5a595c94433e9504c3e03">RHIEN</a>:1; </div>
<div class="line"><a name="l00434"></a><span class="lineno"><a class="line" href="unionICM__RCFG__Type.html#af82b057a0a7e02121dcbf5f627cde331"> 434</a></span>&#160; uint32_t <a class="code" href="unionICM__RCFG__Type.html#af82b057a0a7e02121dcbf5f627cde331">DMIEN</a>:1; </div>
<div class="line"><a name="l00435"></a><span class="lineno"><a class="line" href="unionICM__RCFG__Type.html#aae5e52b4efb07cabc81eb33f104813f0"> 435</a></span>&#160; uint32_t <a class="code" href="unionICM__RCFG__Type.html#aae5e52b4efb07cabc81eb33f104813f0">BEIEN</a>:1; </div>
<div class="line"><a name="l00436"></a><span class="lineno"><a class="line" href="unionICM__RCFG__Type.html#a00b3f052dc992327c75466464ef1f6d3"> 436</a></span>&#160; uint32_t <a class="code" href="unionICM__RCFG__Type.html#a00b3f052dc992327c75466464ef1f6d3">WCIEN</a>:1; </div>
<div class="line"><a name="l00437"></a><span class="lineno"><a class="line" href="unionICM__RCFG__Type.html#aee1a539dda8fff1c6905f5ef9d54d945"> 437</a></span>&#160; uint32_t <a class="code" href="unionICM__RCFG__Type.html#aee1a539dda8fff1c6905f5ef9d54d945">ECIEN</a>:1; </div>
<div class="line"><a name="l00438"></a><span class="lineno"><a class="line" href="unionICM__RCFG__Type.html#adf8b84db511cc8c317e509428809ca11"> 438</a></span>&#160; uint32_t <a class="code" href="unionICM__RCFG__Type.html#adf8b84db511cc8c317e509428809ca11">SUIEN</a>:1; </div>
<div class="line"><a name="l00439"></a><span class="lineno"><a class="line" href="unionICM__RCFG__Type.html#aab11dba37f7bb0f4697dfbb447eba6a3"> 439</a></span>&#160; uint32_t <a class="code" href="unionICM__RCFG__Type.html#aab11dba37f7bb0f4697dfbb447eba6a3">PROCDLY</a>:1; </div>
<div class="line"><a name="l00440"></a><span class="lineno"><a class="line" href="unionICM__RCFG__Type.html#a35c4f4fd79ed31d1f162a9f5ee2de8d9"> 440</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00441"></a><span class="lineno"><a class="line" href="unionICM__RCFG__Type.html#ab6080c1cff3f78d2dc506d9d37bce4b1"> 441</a></span>&#160; uint32_t <a class="code" href="unionICM__RCFG__Type.html#ab6080c1cff3f78d2dc506d9d37bce4b1">ALGO</a>:3; </div>
<div class="line"><a name="l00442"></a><span class="lineno"><a class="line" href="unionICM__RCFG__Type.html#a02664b285cd6430eadadc8e72699d49b"> 442</a></span>&#160; uint32_t :9; </div>
<div class="line"><a name="l00443"></a><span class="lineno"><a class="line" href="unionICM__RCFG__Type.html#af91f6b6068d77e08fe214ca1646c6c9f"> 443</a></span>&#160; uint32_t <a class="code" href="unionICM__RCFG__Type.html#af91f6b6068d77e08fe214ca1646c6c9f">MRPROT</a>:6; </div>
<div class="line"><a name="l00444"></a><span class="lineno"><a class="line" href="unionICM__RCFG__Type.html#ad992f0bdab8867982fbeb64abeaf21bb"> 444</a></span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00445"></a><span class="lineno"><a class="line" href="unionICM__RCFG__Type.html#a5cc451b2fd2d3943948a54da68a75055"> 445</a></span>&#160; } bit; </div>
<div class="line"><a name="l00446"></a><span class="lineno"><a class="line" href="unionICM__RCFG__Type.html#ab2c75c97d4e1027e042ef108fb483155"> 446</a></span>&#160; uint32_t <a class="code" href="unionICM__RCFG__Type.html#ab2c75c97d4e1027e042ef108fb483155">reg</a>; </div>
<div class="line"><a name="l00447"></a><span class="lineno"> 447</span>&#160;} <a class="code" href="unionICM__RCFG__Type.html">ICM_RCFG_Type</a>;</div>
<div class="line"><a name="l00448"></a><span class="lineno"> 448</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00449"></a><span class="lineno"> 449</span>&#160; </div>
<div class="line"><a name="l00450"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a67f79de608d5b8e84d411de33e935240"> 450</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_OFFSET 0x04 </span></div>
<div class="line"><a name="l00451"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ab3d05fadc1d7391c5928d61d01f452ab"> 451</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00453"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a71f6c0af57a8ac42d9058ba483944b78"> 453</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_CDWBN_Pos 0 </span></div>
<div class="line"><a name="l00454"></a><span class="lineno"> 454</span>&#160;<span class="preprocessor">#define ICM_RCFG_CDWBN (_U_(0x1) &lt;&lt; ICM_RCFG_CDWBN_Pos)</span></div>
<div class="line"><a name="l00455"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a0e22685e4f19a78d16b93b85efc2bc27"> 455</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_CDWBN_WRBA_Val _U_(0x0) </span></div>
<div class="line"><a name="l00456"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#aa5d68d09c87e8d2bd5653f85d64e3bf8"> 456</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_CDWBN_COMP_Val _U_(0x1) </span></div>
<div class="line"><a name="l00457"></a><span class="lineno"> 457</span>&#160;<span class="preprocessor">#define ICM_RCFG_CDWBN_WRBA (ICM_RCFG_CDWBN_WRBA_Val &lt;&lt; ICM_RCFG_CDWBN_Pos)</span></div>
<div class="line"><a name="l00458"></a><span class="lineno"> 458</span>&#160;<span class="preprocessor">#define ICM_RCFG_CDWBN_COMP (ICM_RCFG_CDWBN_COMP_Val &lt;&lt; ICM_RCFG_CDWBN_Pos)</span></div>
<div class="line"><a name="l00459"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a3bcbf779a24e72844bc22ed8ba3497df"> 459</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_WRAP_Pos 1 </span></div>
<div class="line"><a name="l00460"></a><span class="lineno"> 460</span>&#160;<span class="preprocessor">#define ICM_RCFG_WRAP (_U_(0x1) &lt;&lt; ICM_RCFG_WRAP_Pos)</span></div>
<div class="line"><a name="l00461"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a4771e1b6ae80d212f7cd527552a7b22f"> 461</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_WRAP_NO_Val _U_(0x0) </span></div>
<div class="line"><a name="l00462"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a2cf4983c97fcbaa179a1a33daa80130d"> 462</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_WRAP_YES_Val _U_(0x1) </span></div>
<div class="line"><a name="l00463"></a><span class="lineno"> 463</span>&#160;<span class="preprocessor">#define ICM_RCFG_WRAP_NO (ICM_RCFG_WRAP_NO_Val &lt;&lt; ICM_RCFG_WRAP_Pos)</span></div>
<div class="line"><a name="l00464"></a><span class="lineno"> 464</span>&#160;<span class="preprocessor">#define ICM_RCFG_WRAP_YES (ICM_RCFG_WRAP_YES_Val &lt;&lt; ICM_RCFG_WRAP_Pos)</span></div>
<div class="line"><a name="l00465"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a378a70850bed5e07aaac0167f9df3d46"> 465</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_EOM_Pos 2 </span></div>
<div class="line"><a name="l00466"></a><span class="lineno"> 466</span>&#160;<span class="preprocessor">#define ICM_RCFG_EOM (_U_(0x1) &lt;&lt; ICM_RCFG_EOM_Pos)</span></div>
<div class="line"><a name="l00467"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a5f3c11bb3541487235c3187e0c38fb61"> 467</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_EOM_NO_Val _U_(0x0) </span></div>
<div class="line"><a name="l00468"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a1a1088b38aae8888c106d13555d34af3"> 468</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_EOM_YES_Val _U_(0x1) </span></div>
<div class="line"><a name="l00469"></a><span class="lineno"> 469</span>&#160;<span class="preprocessor">#define ICM_RCFG_EOM_NO (ICM_RCFG_EOM_NO_Val &lt;&lt; ICM_RCFG_EOM_Pos)</span></div>
<div class="line"><a name="l00470"></a><span class="lineno"> 470</span>&#160;<span class="preprocessor">#define ICM_RCFG_EOM_YES (ICM_RCFG_EOM_YES_Val &lt;&lt; ICM_RCFG_EOM_Pos)</span></div>
<div class="line"><a name="l00471"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#aeda75bcbe5bb53ce6eb7dac7cf7d6e36"> 471</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_RHIEN_Pos 4 </span></div>
<div class="line"><a name="l00472"></a><span class="lineno"> 472</span>&#160;<span class="preprocessor">#define ICM_RCFG_RHIEN (_U_(0x1) &lt;&lt; ICM_RCFG_RHIEN_Pos)</span></div>
<div class="line"><a name="l00473"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#aa994909dd58ad3ec597214bc7380df51"> 473</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_RHIEN_EN_Val _U_(0x0) </span></div>
<div class="line"><a name="l00474"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ad894d7c173638dc69f098e012466d3a5"> 474</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_RHIEN_DIS_Val _U_(0x1) </span></div>
<div class="line"><a name="l00475"></a><span class="lineno"> 475</span>&#160;<span class="preprocessor">#define ICM_RCFG_RHIEN_EN (ICM_RCFG_RHIEN_EN_Val &lt;&lt; ICM_RCFG_RHIEN_Pos)</span></div>
<div class="line"><a name="l00476"></a><span class="lineno"> 476</span>&#160;<span class="preprocessor">#define ICM_RCFG_RHIEN_DIS (ICM_RCFG_RHIEN_DIS_Val &lt;&lt; ICM_RCFG_RHIEN_Pos)</span></div>
<div class="line"><a name="l00477"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#aae886f572331cbc1168a2bc84132c0a1"> 477</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_DMIEN_Pos 5 </span></div>
<div class="line"><a name="l00478"></a><span class="lineno"> 478</span>&#160;<span class="preprocessor">#define ICM_RCFG_DMIEN (_U_(0x1) &lt;&lt; ICM_RCFG_DMIEN_Pos)</span></div>
<div class="line"><a name="l00479"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ab4589e46754e30de0f092d3412b25249"> 479</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_DMIEN_EN_Val _U_(0x0) </span></div>
<div class="line"><a name="l00480"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a6d9cbf08b1cd163af0df89b10b338805"> 480</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_DMIEN_DIS_Val _U_(0x1) </span></div>
<div class="line"><a name="l00481"></a><span class="lineno"> 481</span>&#160;<span class="preprocessor">#define ICM_RCFG_DMIEN_EN (ICM_RCFG_DMIEN_EN_Val &lt;&lt; ICM_RCFG_DMIEN_Pos)</span></div>
<div class="line"><a name="l00482"></a><span class="lineno"> 482</span>&#160;<span class="preprocessor">#define ICM_RCFG_DMIEN_DIS (ICM_RCFG_DMIEN_DIS_Val &lt;&lt; ICM_RCFG_DMIEN_Pos)</span></div>
<div class="line"><a name="l00483"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a0381e695ad906593d43e4d287db4e60a"> 483</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_BEIEN_Pos 6 </span></div>
<div class="line"><a name="l00484"></a><span class="lineno"> 484</span>&#160;<span class="preprocessor">#define ICM_RCFG_BEIEN (_U_(0x1) &lt;&lt; ICM_RCFG_BEIEN_Pos)</span></div>
<div class="line"><a name="l00485"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a42e8415587115d089fcbcdafe6533f38"> 485</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_BEIEN_EN_Val _U_(0x0) </span></div>
<div class="line"><a name="l00486"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a416b05ee3064a06e6714c39c84a3743c"> 486</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_BEIEN_DIS_Val _U_(0x1) </span></div>
<div class="line"><a name="l00487"></a><span class="lineno"> 487</span>&#160;<span class="preprocessor">#define ICM_RCFG_BEIEN_EN (ICM_RCFG_BEIEN_EN_Val &lt;&lt; ICM_RCFG_BEIEN_Pos)</span></div>
<div class="line"><a name="l00488"></a><span class="lineno"> 488</span>&#160;<span class="preprocessor">#define ICM_RCFG_BEIEN_DIS (ICM_RCFG_BEIEN_DIS_Val &lt;&lt; ICM_RCFG_BEIEN_Pos)</span></div>
<div class="line"><a name="l00489"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ae8a63272e72e6d77349025db92da5c37"> 489</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_WCIEN_Pos 7 </span></div>
<div class="line"><a name="l00490"></a><span class="lineno"> 490</span>&#160;<span class="preprocessor">#define ICM_RCFG_WCIEN (_U_(0x1) &lt;&lt; ICM_RCFG_WCIEN_Pos)</span></div>
<div class="line"><a name="l00491"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a723dd9d27e9236455abc4e20723156ce"> 491</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_WCIEN_EN_Val _U_(0x0) </span></div>
<div class="line"><a name="l00492"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a2b9e12413cf8c0cd6a95ba8f9d37b989"> 492</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_WCIEN_DIS_Val _U_(0x1) </span></div>
<div class="line"><a name="l00493"></a><span class="lineno"> 493</span>&#160;<span class="preprocessor">#define ICM_RCFG_WCIEN_EN (ICM_RCFG_WCIEN_EN_Val &lt;&lt; ICM_RCFG_WCIEN_Pos)</span></div>
<div class="line"><a name="l00494"></a><span class="lineno"> 494</span>&#160;<span class="preprocessor">#define ICM_RCFG_WCIEN_DIS (ICM_RCFG_WCIEN_DIS_Val &lt;&lt; ICM_RCFG_WCIEN_Pos)</span></div>
<div class="line"><a name="l00495"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a8ac4db6725d4c8de0e9307e3e2f2db8d"> 495</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_ECIEN_Pos 8 </span></div>
<div class="line"><a name="l00496"></a><span class="lineno"> 496</span>&#160;<span class="preprocessor">#define ICM_RCFG_ECIEN (_U_(0x1) &lt;&lt; ICM_RCFG_ECIEN_Pos)</span></div>
<div class="line"><a name="l00497"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a13d7651e4d5409389761bcfa2316373b"> 497</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_ECIEN_EN_Val _U_(0x0) </span></div>
<div class="line"><a name="l00498"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ab65de4c284b1231a536c17d564762395"> 498</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_ECIEN_DIS_Val _U_(0x1) </span></div>
<div class="line"><a name="l00499"></a><span class="lineno"> 499</span>&#160;<span class="preprocessor">#define ICM_RCFG_ECIEN_EN (ICM_RCFG_ECIEN_EN_Val &lt;&lt; ICM_RCFG_ECIEN_Pos)</span></div>
<div class="line"><a name="l00500"></a><span class="lineno"> 500</span>&#160;<span class="preprocessor">#define ICM_RCFG_ECIEN_DIS (ICM_RCFG_ECIEN_DIS_Val &lt;&lt; ICM_RCFG_ECIEN_Pos)</span></div>
<div class="line"><a name="l00501"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a969cfc7968ad883f793d387c349c7c7f"> 501</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_SUIEN_Pos 9 </span></div>
<div class="line"><a name="l00502"></a><span class="lineno"> 502</span>&#160;<span class="preprocessor">#define ICM_RCFG_SUIEN (_U_(0x1) &lt;&lt; ICM_RCFG_SUIEN_Pos)</span></div>
<div class="line"><a name="l00503"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a0268ed9693d95c647210b8020ea96843"> 503</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_SUIEN_EN_Val _U_(0x0) </span></div>
<div class="line"><a name="l00504"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ab8edc7ee8db3ba7f4932400a0409b74d"> 504</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_SUIEN_DIS_Val _U_(0x1) </span></div>
<div class="line"><a name="l00505"></a><span class="lineno"> 505</span>&#160;<span class="preprocessor">#define ICM_RCFG_SUIEN_EN (ICM_RCFG_SUIEN_EN_Val &lt;&lt; ICM_RCFG_SUIEN_Pos)</span></div>
<div class="line"><a name="l00506"></a><span class="lineno"> 506</span>&#160;<span class="preprocessor">#define ICM_RCFG_SUIEN_DIS (ICM_RCFG_SUIEN_DIS_Val &lt;&lt; ICM_RCFG_SUIEN_Pos)</span></div>
<div class="line"><a name="l00507"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a3e13a388bccb22544ce657252f3b2e2d"> 507</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_PROCDLY_Pos 10 </span></div>
<div class="line"><a name="l00508"></a><span class="lineno"> 508</span>&#160;<span class="preprocessor">#define ICM_RCFG_PROCDLY (_U_(0x1) &lt;&lt; ICM_RCFG_PROCDLY_Pos)</span></div>
<div class="line"><a name="l00509"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#aa1f4324ca2234ac19d164b1e5abe2467"> 509</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_PROCDLY_SHORT_Val _U_(0x0) </span></div>
<div class="line"><a name="l00510"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ab0b9df5fc73c9a8c2bcab64439fa254a"> 510</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_PROCDLY_LONG_Val _U_(0x1) </span></div>
<div class="line"><a name="l00511"></a><span class="lineno"> 511</span>&#160;<span class="preprocessor">#define ICM_RCFG_PROCDLY_SHORT (ICM_RCFG_PROCDLY_SHORT_Val &lt;&lt; ICM_RCFG_PROCDLY_Pos)</span></div>
<div class="line"><a name="l00512"></a><span class="lineno"> 512</span>&#160;<span class="preprocessor">#define ICM_RCFG_PROCDLY_LONG (ICM_RCFG_PROCDLY_LONG_Val &lt;&lt; ICM_RCFG_PROCDLY_Pos)</span></div>
<div class="line"><a name="l00513"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a40410946a20c73b4ff812f218e00c4a9"> 513</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_ALGO_Pos 12 </span></div>
<div class="line"><a name="l00514"></a><span class="lineno"> 514</span>&#160;<span class="preprocessor">#define ICM_RCFG_ALGO_Msk (_U_(0x7) &lt;&lt; ICM_RCFG_ALGO_Pos)</span></div>
<div class="line"><a name="l00515"></a><span class="lineno"> 515</span>&#160;<span class="preprocessor">#define ICM_RCFG_ALGO(value) (ICM_RCFG_ALGO_Msk &amp; ((value) &lt;&lt; ICM_RCFG_ALGO_Pos))</span></div>
<div class="line"><a name="l00516"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ae4de1a47aaf8c019c7632209c54c9c59"> 516</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_MRPROT_Pos 24 </span></div>
<div class="line"><a name="l00517"></a><span class="lineno"> 517</span>&#160;<span class="preprocessor">#define ICM_RCFG_MRPROT_Msk (_U_(0x3F) &lt;&lt; ICM_RCFG_MRPROT_Pos)</span></div>
<div class="line"><a name="l00518"></a><span class="lineno"> 518</span>&#160;<span class="preprocessor">#define ICM_RCFG_MRPROT(value) (ICM_RCFG_MRPROT_Msk &amp; ((value) &lt;&lt; ICM_RCFG_MRPROT_Pos))</span></div>
<div class="line"><a name="l00519"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ad77dbc12d95eb7f4e0e5b7fc1f0b046f"> 519</a></span>&#160;<span class="preprocessor">#define ICM_RCFG_MASK _U_(0x3F0077F7) </span></div>
<div class="line"><a name="l00521"></a><span class="lineno"> 521</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- ICM_RCTRL : (ICM Offset: 0x08) (R/W 32) Region Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00522"></a><span class="lineno"> 522</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00523"></a><span class="lineno"><a class="line" href="unionICM__RCTRL__Type.html"> 523</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00524"></a><span class="lineno"> 524</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00525"></a><span class="lineno"><a class="line" href="unionICM__RCTRL__Type.html#abf38cc24f704b2a3239878bc67625f7d"> 525</a></span>&#160; uint32_t <a class="code" href="unionICM__RCTRL__Type.html#abf38cc24f704b2a3239878bc67625f7d">TRSIZE</a>:16; </div>
<div class="line"><a name="l00526"></a><span class="lineno"><a class="line" href="unionICM__RCTRL__Type.html#af5dc4ebdaa60a1dfee6cfa6f3123fe9f"> 526</a></span>&#160; uint32_t :16; </div>
<div class="line"><a name="l00527"></a><span class="lineno"><a class="line" href="unionICM__RCTRL__Type.html#a69034435039495fc17e1cc48378132eb"> 527</a></span>&#160; } bit; </div>
<div class="line"><a name="l00528"></a><span class="lineno"><a class="line" href="unionICM__RCTRL__Type.html#a535a80efb7c670f1c07fd83b29ac9899"> 528</a></span>&#160; uint32_t <a class="code" href="unionICM__RCTRL__Type.html#a535a80efb7c670f1c07fd83b29ac9899">reg</a>; </div>
<div class="line"><a name="l00529"></a><span class="lineno"> 529</span>&#160;} <a class="code" href="unionICM__RCTRL__Type.html">ICM_RCTRL_Type</a>;</div>
<div class="line"><a name="l00530"></a><span class="lineno"> 530</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00531"></a><span class="lineno"> 531</span>&#160; </div>
<div class="line"><a name="l00532"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ac36cfcca3a33d950254519d142426644"> 532</a></span>&#160;<span class="preprocessor">#define ICM_RCTRL_OFFSET 0x08 </span></div>
<div class="line"><a name="l00534"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#ab85029ba95d49e5ccab09dfd2b6766d3"> 534</a></span>&#160;<span class="preprocessor">#define ICM_RCTRL_TRSIZE_Pos 0 </span></div>
<div class="line"><a name="l00535"></a><span class="lineno"> 535</span>&#160;<span class="preprocessor">#define ICM_RCTRL_TRSIZE_Msk (_U_(0xFFFF) &lt;&lt; ICM_RCTRL_TRSIZE_Pos)</span></div>
<div class="line"><a name="l00536"></a><span class="lineno"> 536</span>&#160;<span class="preprocessor">#define ICM_RCTRL_TRSIZE(value) (ICM_RCTRL_TRSIZE_Msk &amp; ((value) &lt;&lt; ICM_RCTRL_TRSIZE_Pos))</span></div>
<div class="line"><a name="l00537"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a71832030d6483370bd61ef1dc0da2485"> 537</a></span>&#160;<span class="preprocessor">#define ICM_RCTRL_MASK _U_(0x0000FFFF) </span></div>
<div class="line"><a name="l00539"></a><span class="lineno"> 539</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- ICM_RNEXT : (ICM Offset: 0x0C) (R/W 32) Region Next Address -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00540"></a><span class="lineno"> 540</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00541"></a><span class="lineno"><a class="line" href="unionICM__RNEXT__Type.html"> 541</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00542"></a><span class="lineno"><a class="line" href="unionICM__RNEXT__Type.html#a1577f502bcd04964de7b6149633e45ec"> 542</a></span>&#160; uint32_t <a class="code" href="unionICM__RNEXT__Type.html#a1577f502bcd04964de7b6149633e45ec">reg</a>; </div>
<div class="line"><a name="l00543"></a><span class="lineno"> 543</span>&#160;} <a class="code" href="unionICM__RNEXT__Type.html">ICM_RNEXT_Type</a>;</div>
<div class="line"><a name="l00544"></a><span class="lineno"> 544</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00545"></a><span class="lineno"> 545</span>&#160; </div>
<div class="line"><a name="l00546"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a4a03da3d8bbb8d80b133b85db1d501aa"> 546</a></span>&#160;<span class="preprocessor">#define ICM_RNEXT_OFFSET 0x0C </span></div>
<div class="line"><a name="l00547"></a><span class="lineno"><a class="line" href="component_2icm_8h.html#a20f4d7f0ba882b86ecf3a9445832eb1a"> 547</a></span>&#160;<span class="preprocessor">#define ICM_RNEXT_MASK _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00550"></a><span class="lineno"> 550</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00551"></a><span class="lineno"><a class="line" href="structIcm.html"> 551</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00552"></a><span class="lineno"><a class="line" href="structIcm.html#a20c20e5b8ec4d5aaf8888e3feee92057"> 552</a></span>&#160; __IO <a class="code" href="unionICM__CFG__Type.html">ICM_CFG_Type</a> <a class="code" href="structIcm.html#a20c20e5b8ec4d5aaf8888e3feee92057">CFG</a>; </div>
<div class="line"><a name="l00553"></a><span class="lineno"><a class="line" href="structIcm.html#a40d3beb0754307ba1eded5f30893cee8"> 553</a></span>&#160; __O <a class="code" href="unionICM__CTRL__Type.html">ICM_CTRL_Type</a> <a class="code" href="structIcm.html#a40d3beb0754307ba1eded5f30893cee8">CTRL</a>; </div>
<div class="line"><a name="l00554"></a><span class="lineno"><a class="line" href="structIcm.html#a909fc9f64528563127f3a59bcf5a863d"> 554</a></span>&#160; __I <a class="code" href="unionICM__SR__Type.html">ICM_SR_Type</a> <a class="code" href="structIcm.html#a909fc9f64528563127f3a59bcf5a863d">SR</a>; </div>
<div class="line"><a name="l00555"></a><span class="lineno"> 555</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved1[0x4];</div>
<div class="line"><a name="l00556"></a><span class="lineno"><a class="line" href="structIcm.html#a326ec88a1050b8f86b61bad521f09b90"> 556</a></span>&#160; __O <a class="code" href="unionICM__IER__Type.html">ICM_IER_Type</a> <a class="code" href="structIcm.html#a326ec88a1050b8f86b61bad521f09b90">IER</a>; </div>
<div class="line"><a name="l00557"></a><span class="lineno"><a class="line" href="structIcm.html#aa230b47e86f270ee5d92be78cba5971a"> 557</a></span>&#160; __O <a class="code" href="unionICM__IDR__Type.html">ICM_IDR_Type</a> <a class="code" href="structIcm.html#aa230b47e86f270ee5d92be78cba5971a">IDR</a>; </div>
<div class="line"><a name="l00558"></a><span class="lineno"><a class="line" href="structIcm.html#a8dfccd30988381bd8cb870e1e2d368a4"> 558</a></span>&#160; __I <a class="code" href="unionICM__IMR__Type.html">ICM_IMR_Type</a> <a class="code" href="structIcm.html#a8dfccd30988381bd8cb870e1e2d368a4">IMR</a>; </div>
<div class="line"><a name="l00559"></a><span class="lineno"><a class="line" href="structIcm.html#a28aa1223e5618b78c71eb31c7e55891c"> 559</a></span>&#160; __I <a class="code" href="unionICM__ISR__Type.html">ICM_ISR_Type</a> <a class="code" href="structIcm.html#a28aa1223e5618b78c71eb31c7e55891c">ISR</a>; </div>
<div class="line"><a name="l00560"></a><span class="lineno"><a class="line" href="structIcm.html#ab29ae4602acadd5b2868ad6d636dcfa3"> 560</a></span>&#160; __I <a class="code" href="unionICM__UASR__Type.html">ICM_UASR_Type</a> <a class="code" href="structIcm.html#ab29ae4602acadd5b2868ad6d636dcfa3">UASR</a>; </div>
<div class="line"><a name="l00561"></a><span class="lineno"> 561</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved2[0xC];</div>
<div class="line"><a name="l00562"></a><span class="lineno"><a class="line" href="structIcm.html#a4eda2eedc549694e76820ce7cf7a047a"> 562</a></span>&#160; __IO <a class="code" href="unionICM__DSCR__Type.html">ICM_DSCR_Type</a> <a class="code" href="structIcm.html#a4eda2eedc549694e76820ce7cf7a047a">DSCR</a>; </div>
<div class="line"><a name="l00563"></a><span class="lineno"><a class="line" href="structIcm.html#ade104b78652eb14c1131971755342531"> 563</a></span>&#160; __IO <a class="code" href="unionICM__HASH__Type.html">ICM_HASH_Type</a> <a class="code" href="structIcm.html#ade104b78652eb14c1131971755342531">HASH</a>; </div>
<div class="line"><a name="l00564"></a><span class="lineno"><a class="line" href="structIcm.html#aec36a7b6ad2310803c45f8f0b7756a9d"> 564</a></span>&#160; __O <a class="code" href="unionICM__UIHVAL__Type.html">ICM_UIHVAL_Type</a> UIHVAL[8]; </div>
<div class="line"><a name="l00565"></a><span class="lineno"> 565</span>&#160;} <a class="code" href="structIcm.html">Icm</a>;</div>
<div class="line"><a name="l00566"></a><span class="lineno"> 566</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00567"></a><span class="lineno"> 567</span>&#160; </div>
<div class="line"><a name="l00569"></a><span class="lineno"> 569</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00570"></a><span class="lineno"><a class="line" href="structIcmDescriptor.html"> 570</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00571"></a><span class="lineno"><a class="line" href="structIcmDescriptor.html#aeb1eadaeea121c57bd17ddee6f56ffdd"> 571</a></span>&#160; __IO <a class="code" href="unionICM__RADDR__Type.html">ICM_RADDR_Type</a> <a class="code" href="structIcmDescriptor.html#aeb1eadaeea121c57bd17ddee6f56ffdd">RADDR</a>; </div>
<div class="line"><a name="l00572"></a><span class="lineno"><a class="line" href="structIcmDescriptor.html#a2a202c92fc97439a40de8d761e8ef3bd"> 572</a></span>&#160; __IO <a class="code" href="unionICM__RCFG__Type.html">ICM_RCFG_Type</a> <a class="code" href="structIcmDescriptor.html#a2a202c92fc97439a40de8d761e8ef3bd">RCFG</a>; </div>
<div class="line"><a name="l00573"></a><span class="lineno"><a class="line" href="structIcmDescriptor.html#af32c4ef633f488e8b91b6212d7531ba6"> 573</a></span>&#160; __IO <a class="code" href="unionICM__RCTRL__Type.html">ICM_RCTRL_Type</a> <a class="code" href="structIcmDescriptor.html#af32c4ef633f488e8b91b6212d7531ba6">RCTRL</a>; </div>
<div class="line"><a name="l00574"></a><span class="lineno"><a class="line" href="structIcmDescriptor.html#a34737436b8df5c94dcac8f66292d554e"> 574</a></span>&#160; __IO <a class="code" href="unionICM__RNEXT__Type.html">ICM_RNEXT_Type</a> <a class="code" href="structIcmDescriptor.html#a34737436b8df5c94dcac8f66292d554e">RNEXT</a>; </div>
<div class="line"><a name="l00575"></a><span class="lineno"> 575</span>&#160;} <a class="code" href="structIcmDescriptor.html">IcmDescriptor</a>;</div>
<div class="line"><a name="l00576"></a><span class="lineno"> 576</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00577"></a><span class="lineno"> 577</span>&#160; </div>
<div class="line"><a name="l00578"></a><span class="lineno"> 578</span>&#160;<span class="preprocessor">#define SECTION_ICM_DESCRIPTOR</span></div>
<div class="line"><a name="l00579"></a><span class="lineno"> 579</span>&#160; </div>
<div class="line"><a name="l00582"></a><span class="lineno"> 582</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_ICM_COMPONENT_ */</span><span class="preprocessor"></span></div>
</div><!-- fragment --></div><!-- contents -->
<div class="ttc" id="aunionICM__SR__Type_html_a2861fb249cba6a1874e3c03fa7e95259"><div class="ttname"><a href="unionICM__SR__Type.html#a2861fb249cba6a1874e3c03fa7e95259">ICM_SR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00146">icm.h:146</a></div></div>
<div class="ttc" id="aunionICM__ISR__Type_html_aec96af9771c9ac6de81bc1f553858f0e"><div class="ttname"><a href="unionICM__ISR__Type.html#aec96af9771c9ac6de81bc1f553858f0e">ICM_ISR_Type::RWC</a></div><div class="ttdeci">uint32_t RWC</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00295">icm.h:295</a></div></div>
<div class="ttc" id="astructIcm_html_a4eda2eedc549694e76820ce7cf7a047a"><div class="ttname"><a href="structIcm.html#a4eda2eedc549694e76820ce7cf7a047a">Icm::DSCR</a></div><div class="ttdeci">__IO ICM_DSCR_Type DSCR</div><div class="ttdoc">Offset: 0x30 (R/W 32) Region Descriptor Area Start Address.</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00562">icm.h:562</a></div></div>
<div class="ttc" id="aunionICM__RCFG__Type_html_a1a76a13263b836b3d2cacf7427d6bd77"><div class="ttname"><a href="unionICM__RCFG__Type.html#a1a76a13263b836b3d2cacf7427d6bd77">ICM_RCFG_Type::EOM</a></div><div class="ttdeci">uint32_t EOM</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00431">icm.h:431</a></div></div>
<div class="ttc" id="aunionICM__IMR__Type_html_aad505dca1277568a62caf741522cd4e4"><div class="ttname"><a href="unionICM__IMR__Type.html#aad505dca1277568a62caf741522cd4e4">ICM_IMR_Type::REC</a></div><div class="ttdeci">uint32_t REC</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00254">icm.h:254</a></div></div>
<div class="ttc" id="astructIcm_html_a8dfccd30988381bd8cb870e1e2d368a4"><div class="ttname"><a href="structIcm.html#a8dfccd30988381bd8cb870e1e2d368a4">Icm::IMR</a></div><div class="ttdeci">__I ICM_IMR_Type IMR</div><div class="ttdoc">Offset: 0x18 (R/ 32) Interrupt Mask.</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00558">icm.h:558</a></div></div>
<div class="ttc" id="aunionICM__ISR__Type_html_af26e059e0e2cf1cc77da298a4acd2511"><div class="ttname"><a href="unionICM__ISR__Type.html#af26e059e0e2cf1cc77da298a4acd2511">ICM_ISR_Type::URAD</a></div><div class="ttdeci">uint32_t URAD</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00298">icm.h:298</a></div></div>
<div class="ttc" id="aunionICM__CFG__Type_html_ad0ec11e82af3d990e8abe6e27c3c3264"><div class="ttname"><a href="unionICM__CFG__Type.html#ad0ec11e82af3d990e8abe6e27c3c3264">ICM_CFG_Type::WBDIS</a></div><div class="ttdeci">uint32_t WBDIS</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00046">icm.h:46</a></div></div>
<div class="ttc" id="aunionICM__RCFG__Type_html"><div class="ttname"><a href="unionICM__RCFG__Type.html">ICM_RCFG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00427">icm.h:427</a></div></div>
<div class="ttc" id="aunionICM__UIHVAL__Type_html"><div class="ttname"><a href="unionICM__UIHVAL__Type.html">ICM_UIHVAL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00399">icm.h:399</a></div></div>
<div class="ttc" id="aunionICM__DSCR__Type_html_ab14d1a4a1844a375bfd24f69c5f217ff"><div class="ttname"><a href="unionICM__DSCR__Type.html#ab14d1a4a1844a375bfd24f69c5f217ff">ICM_DSCR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00366">icm.h:366</a></div></div>
<div class="ttc" id="aunionICM__CFG__Type_html_ac797507aa3cb0acbb941f3de7de17169"><div class="ttname"><a href="unionICM__CFG__Type.html#ac797507aa3cb0acbb941f3de7de17169">ICM_CFG_Type::BBC</a></div><div class="ttdeci">uint32_t BBC</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00050">icm.h:50</a></div></div>
<div class="ttc" id="aunionICM__CTRL__Type_html_a14bc9bc39f6b06bfabff94a7f404553b"><div class="ttname"><a href="unionICM__CTRL__Type.html#a14bc9bc39f6b06bfabff94a7f404553b">ICM_CTRL_Type::RMEN</a></div><div class="ttdeci">uint32_t RMEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00110">icm.h:110</a></div></div>
<div class="ttc" id="aunionICM__CFG__Type_html_ab700dfb7968d992d2753299bebfe7ebd"><div class="ttname"><a href="unionICM__CFG__Type.html#ab700dfb7968d992d2753299bebfe7ebd">ICM_CFG_Type::UIHASH</a></div><div class="ttdeci">uint32_t UIHASH</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00054">icm.h:54</a></div></div>
<div class="ttc" id="aunionICM__SR__Type_html_a95f1e285288056e72e79d2011a9d76d0"><div class="ttname"><a href="unionICM__SR__Type.html#a95f1e285288056e72e79d2011a9d76d0">ICM_SR_Type::ENABLE</a></div><div class="ttdeci">uint32_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00140">icm.h:140</a></div></div>
<div class="ttc" id="aunionICM__UASR__Type_html"><div class="ttname"><a href="unionICM__UASR__Type.html">ICM_UASR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00332">icm.h:332</a></div></div>
<div class="ttc" id="aunionICM__RCFG__Type_html_aee1a539dda8fff1c6905f5ef9d54d945"><div class="ttname"><a href="unionICM__RCFG__Type.html#aee1a539dda8fff1c6905f5ef9d54d945">ICM_RCFG_Type::ECIEN</a></div><div class="ttdeci">uint32_t ECIEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00437">icm.h:437</a></div></div>
<div class="ttc" id="aunionICM__DSCR__Type_html"><div class="ttname"><a href="unionICM__DSCR__Type.html">ICM_DSCR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00361">icm.h:361</a></div></div>
<div class="ttc" id="astructIcm_html_aa230b47e86f270ee5d92be78cba5971a"><div class="ttname"><a href="structIcm.html#aa230b47e86f270ee5d92be78cba5971a">Icm::IDR</a></div><div class="ttdeci">__O ICM_IDR_Type IDR</div><div class="ttdoc">Offset: 0x14 ( /W 32) Interrupt Disable.</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00557">icm.h:557</a></div></div>
<div class="ttc" id="aunionICM__UIHVAL__Type_html_aec638dffd5b3974d6cb5407d56df007f"><div class="ttname"><a href="unionICM__UIHVAL__Type.html#aec638dffd5b3974d6cb5407d56df007f">ICM_UIHVAL_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00403">icm.h:403</a></div></div>
<div class="ttc" id="aunionICM__RCFG__Type_html_aab11dba37f7bb0f4697dfbb447eba6a3"><div class="ttname"><a href="unionICM__RCFG__Type.html#aab11dba37f7bb0f4697dfbb447eba6a3">ICM_RCFG_Type::PROCDLY</a></div><div class="ttdeci">uint32_t PROCDLY</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00439">icm.h:439</a></div></div>
<div class="ttc" id="aunionICM__IMR__Type_html_a5394ba5b6ac21d21277f6bf00502862c"><div class="ttname"><a href="unionICM__IMR__Type.html#a5394ba5b6ac21d21277f6bf00502862c">ICM_IMR_Type::RWC</a></div><div class="ttdeci">uint32_t RWC</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00253">icm.h:253</a></div></div>
<div class="ttc" id="aunionICM__RCFG__Type_html_ab6080c1cff3f78d2dc506d9d37bce4b1"><div class="ttname"><a href="unionICM__RCFG__Type.html#ab6080c1cff3f78d2dc506d9d37bce4b1">ICM_RCFG_Type::ALGO</a></div><div class="ttdeci">uint32_t ALGO</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00441">icm.h:441</a></div></div>
<div class="ttc" id="astructIcm_html"><div class="ttname"><a href="structIcm.html">Icm</a></div><div class="ttdoc">ICM APB hardware registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00551">icm.h:551</a></div></div>
<div class="ttc" id="aunionICM__IDR__Type_html"><div class="ttname"><a href="unionICM__IDR__Type.html">ICM_IDR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00206">icm.h:206</a></div></div>
<div class="ttc" id="astructIcm_html_ade104b78652eb14c1131971755342531"><div class="ttname"><a href="structIcm.html#ade104b78652eb14c1131971755342531">Icm::HASH</a></div><div class="ttdeci">__IO ICM_HASH_Type HASH</div><div class="ttdoc">Offset: 0x34 (R/W 32) Region Hash Area Start Address.</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00563">icm.h:563</a></div></div>
<div class="ttc" id="aunionICM__HASH__Type_html"><div class="ttname"><a href="unionICM__HASH__Type.html">ICM_HASH_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00380">icm.h:380</a></div></div>
<div class="ttc" id="aunionICM__UASR__Type_html_a12b9e6e00aadf6d881a35e49a734e2f3"><div class="ttname"><a href="unionICM__UASR__Type.html#a12b9e6e00aadf6d881a35e49a734e2f3">ICM_UASR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00337">icm.h:337</a></div></div>
<div class="ttc" id="aunionICM__SR__Type_html"><div class="ttname"><a href="unionICM__SR__Type.html">ICM_SR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00138">icm.h:138</a></div></div>
<div class="ttc" id="aunionICM__IMR__Type_html_abfaaace3f03f8c8ef87831de2f22ea24"><div class="ttname"><a href="unionICM__IMR__Type.html#abfaaace3f03f8c8ef87831de2f22ea24">ICM_IMR_Type::RHC</a></div><div class="ttdeci">uint32_t RHC</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00250">icm.h:250</a></div></div>
<div class="ttc" id="aunionICM__CFG__Type_html_ad8db7d113a4dcb7701ae99f1d2f27c38"><div class="ttname"><a href="unionICM__CFG__Type.html#ad8db7d113a4dcb7701ae99f1d2f27c38">ICM_CFG_Type::UALGO</a></div><div class="ttdeci">uint32_t UALGO</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00055">icm.h:55</a></div></div>
<div class="ttc" id="aunionICM__HASH__Type_html_a146dc6f4fcd9cc11aa3fc5daac4a9000"><div class="ttname"><a href="unionICM__HASH__Type.html#a146dc6f4fcd9cc11aa3fc5daac4a9000">ICM_HASH_Type::HASA</a></div><div class="ttdeci">uint32_t HASA</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00383">icm.h:383</a></div></div>
<div class="ttc" id="aunionICM__RNEXT__Type_html_a1577f502bcd04964de7b6149633e45ec"><div class="ttname"><a href="unionICM__RNEXT__Type.html#a1577f502bcd04964de7b6149633e45ec">ICM_RNEXT_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00542">icm.h:542</a></div></div>
<div class="ttc" id="aunionICM__IMR__Type_html"><div class="ttname"><a href="unionICM__IMR__Type.html">ICM_IMR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00248">icm.h:248</a></div></div>
<div class="ttc" id="astructIcm_html_a40d3beb0754307ba1eded5f30893cee8"><div class="ttname"><a href="structIcm.html#a40d3beb0754307ba1eded5f30893cee8">Icm::CTRL</a></div><div class="ttdeci">__O ICM_CTRL_Type CTRL</div><div class="ttdoc">Offset: 0x04 ( /W 32) Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00553">icm.h:553</a></div></div>
<div class="ttc" id="aunionICM__RADDR__Type_html_a4e90ed7f3caa11a30972bade37a0bc69"><div class="ttname"><a href="unionICM__RADDR__Type.html#a4e90ed7f3caa11a30972bade37a0bc69">ICM_RADDR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00418">icm.h:418</a></div></div>
<div class="ttc" id="aunionICM__CTRL__Type_html_abe97e58f4be83784dd65b491e9c47092"><div class="ttname"><a href="unionICM__CTRL__Type.html#abe97e58f4be83784dd65b491e9c47092">ICM_CTRL_Type::REHASH</a></div><div class="ttdeci">uint32_t REHASH</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00108">icm.h:108</a></div></div>
<div class="ttc" id="aunionICM__CTRL__Type_html_afb549ef64f71fd3871c68116b4594136"><div class="ttname"><a href="unionICM__CTRL__Type.html#afb549ef64f71fd3871c68116b4594136">ICM_CTRL_Type::SWRST</a></div><div class="ttdeci">uint32_t SWRST</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00106">icm.h:106</a></div></div>
<div class="ttc" id="aunionICM__RCTRL__Type_html_a535a80efb7c670f1c07fd83b29ac9899"><div class="ttname"><a href="unionICM__RCTRL__Type.html#a535a80efb7c670f1c07fd83b29ac9899">ICM_RCTRL_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00528">icm.h:528</a></div></div>
<div class="ttc" id="aunionICM__RCTRL__Type_html_abf38cc24f704b2a3239878bc67625f7d"><div class="ttname"><a href="unionICM__RCTRL__Type.html#abf38cc24f704b2a3239878bc67625f7d">ICM_RCTRL_Type::TRSIZE</a></div><div class="ttdeci">uint32_t TRSIZE</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00525">icm.h:525</a></div></div>
<div class="ttc" id="aunionICM__IDR__Type_html_a919932a92ca832de4276f204d51ac54f"><div class="ttname"><a href="unionICM__IDR__Type.html#a919932a92ca832de4276f204d51ac54f">ICM_IDR_Type::RDM</a></div><div class="ttdeci">uint32_t RDM</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00209">icm.h:209</a></div></div>
<div class="ttc" id="aunionICM__IMR__Type_html_a444244b29e0f6972436718046e8d94f2"><div class="ttname"><a href="unionICM__IMR__Type.html#a444244b29e0f6972436718046e8d94f2">ICM_IMR_Type::RBE</a></div><div class="ttdeci">uint32_t RBE</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00252">icm.h:252</a></div></div>
<div class="ttc" id="astructIcmDescriptor_html_aeb1eadaeea121c57bd17ddee6f56ffdd"><div class="ttname"><a href="structIcmDescriptor.html#aeb1eadaeea121c57bd17ddee6f56ffdd">IcmDescriptor::RADDR</a></div><div class="ttdeci">__IO ICM_RADDR_Type RADDR</div><div class="ttdoc">Offset: 0x00 (R/W 32) Region Start Address.</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00571">icm.h:571</a></div></div>
<div class="ttc" id="aunionICM__UASR__Type_html_aeaa7f8dc90f760081e7613f30f6330bd"><div class="ttname"><a href="unionICM__UASR__Type.html#aeaa7f8dc90f760081e7613f30f6330bd">ICM_UASR_Type::URAT</a></div><div class="ttdeci">uint32_t URAT</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00334">icm.h:334</a></div></div>
<div class="ttc" id="astructIcmDescriptor_html"><div class="ttname"><a href="structIcmDescriptor.html">IcmDescriptor</a></div><div class="ttdoc">ICM Descriptor SRAM registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00570">icm.h:570</a></div></div>
<div class="ttc" id="aunionICM__CFG__Type_html_af4c899048afea95540fecd980f3d0868"><div class="ttname"><a href="unionICM__CFG__Type.html#af4c899048afea95540fecd980f3d0868">ICM_CFG_Type::HAPROT</a></div><div class="ttdeci">uint32_t HAPROT</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00056">icm.h:56</a></div></div>
<div class="ttc" id="aunionICM__ISR__Type_html_ae1798754aaf26eb10a69049706b06cb7"><div class="ttname"><a href="unionICM__ISR__Type.html#ae1798754aaf26eb10a69049706b06cb7">ICM_ISR_Type::RSU</a></div><div class="ttdeci">uint32_t RSU</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00297">icm.h:297</a></div></div>
<div class="ttc" id="aunionICM__IER__Type_html_a879ee642c03d8fe8fe63e9ea72829680"><div class="ttname"><a href="unionICM__IER__Type.html#a879ee642c03d8fe8fe63e9ea72829680">ICM_IER_Type::RSU</a></div><div class="ttdeci">uint32_t RSU</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00172">icm.h:172</a></div></div>
<div class="ttc" id="aunionICM__HASH__Type_html_a11b3160afe29e160a94e9c579f1e983b"><div class="ttname"><a href="unionICM__HASH__Type.html#a11b3160afe29e160a94e9c579f1e983b">ICM_HASH_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00385">icm.h:385</a></div></div>
<div class="ttc" id="astructIcm_html_a28aa1223e5618b78c71eb31c7e55891c"><div class="ttname"><a href="structIcm.html#a28aa1223e5618b78c71eb31c7e55891c">Icm::ISR</a></div><div class="ttdeci">__I ICM_ISR_Type ISR</div><div class="ttdoc">Offset: 0x1C (R/ 32) Interrupt Status.</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00559">icm.h:559</a></div></div>
<div class="ttc" id="aunionICM__SR__Type_html_a79916fd0ab4bb4f71a0f9166db844a09"><div class="ttname"><a href="unionICM__SR__Type.html#a79916fd0ab4bb4f71a0f9166db844a09">ICM_SR_Type::RAWRMDIS</a></div><div class="ttdeci">uint32_t RAWRMDIS</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00142">icm.h:142</a></div></div>
<div class="ttc" id="aunionICM__IDR__Type_html_aff21797762fa17158a254d35f0a55f85"><div class="ttname"><a href="unionICM__IDR__Type.html#aff21797762fa17158a254d35f0a55f85">ICM_IDR_Type::RSU</a></div><div class="ttdeci">uint32_t RSU</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00213">icm.h:213</a></div></div>
<div class="ttc" id="aunionICM__RNEXT__Type_html"><div class="ttname"><a href="unionICM__RNEXT__Type.html">ICM_RNEXT_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00541">icm.h:541</a></div></div>
<div class="ttc" id="aunionICM__RCFG__Type_html_aabf8ed373ef4bfb505c3ec1b9b969ba0"><div class="ttname"><a href="unionICM__RCFG__Type.html#aabf8ed373ef4bfb505c3ec1b9b969ba0">ICM_RCFG_Type::CDWBN</a></div><div class="ttdeci">uint32_t CDWBN</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00429">icm.h:429</a></div></div>
<div class="ttc" id="aunionICM__RCFG__Type_html_a00b3f052dc992327c75466464ef1f6d3"><div class="ttname"><a href="unionICM__RCFG__Type.html#a00b3f052dc992327c75466464ef1f6d3">ICM_RCFG_Type::WCIEN</a></div><div class="ttdeci">uint32_t WCIEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00436">icm.h:436</a></div></div>
<div class="ttc" id="aunionICM__IER__Type_html_a466341124eed99b951bafa4c83d9c9b3"><div class="ttname"><a href="unionICM__IER__Type.html#a466341124eed99b951bafa4c83d9c9b3">ICM_IER_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00176">icm.h:176</a></div></div>
<div class="ttc" id="astructIcm_html_a326ec88a1050b8f86b61bad521f09b90"><div class="ttname"><a href="structIcm.html#a326ec88a1050b8f86b61bad521f09b90">Icm::IER</a></div><div class="ttdeci">__O ICM_IER_Type IER</div><div class="ttdoc">Offset: 0x10 ( /W 32) Interrupt Enable.</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00556">icm.h:556</a></div></div>
<div class="ttc" id="astructIcm_html_a20c20e5b8ec4d5aaf8888e3feee92057"><div class="ttname"><a href="structIcm.html#a20c20e5b8ec4d5aaf8888e3feee92057">Icm::CFG</a></div><div class="ttdeci">__IO ICM_CFG_Type CFG</div><div class="ttdoc">Offset: 0x00 (R/W 32) Configuration.</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00552">icm.h:552</a></div></div>
<div class="ttc" id="aunionICM__CFG__Type_html_aa1048e44f02bb5894fc96e1abb14f090"><div class="ttname"><a href="unionICM__CFG__Type.html#aa1048e44f02bb5894fc96e1abb14f090">ICM_CFG_Type::DAPROT</a></div><div class="ttdeci">uint32_t DAPROT</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00058">icm.h:58</a></div></div>
<div class="ttc" id="aunionICM__DSCR__Type_html_aaaaef0b83e1943217986d85c49309c67"><div class="ttname"><a href="unionICM__DSCR__Type.html#aaaaef0b83e1943217986d85c49309c67">ICM_DSCR_Type::DASA</a></div><div class="ttdeci">uint32_t DASA</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00364">icm.h:364</a></div></div>
<div class="ttc" id="aunionICM__CFG__Type_html_aa5edadcf1bdca950837862ea44a30d30"><div class="ttname"><a href="unionICM__CFG__Type.html#aa5edadcf1bdca950837862ea44a30d30">ICM_CFG_Type::ASCD</a></div><div class="ttdeci">uint32_t ASCD</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00051">icm.h:51</a></div></div>
<div class="ttc" id="aunionICM__CTRL__Type_html_aa6614af3cd2d970375ea58ea25bb5ea8"><div class="ttname"><a href="unionICM__CTRL__Type.html#aa6614af3cd2d970375ea58ea25bb5ea8">ICM_CTRL_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00113">icm.h:113</a></div></div>
<div class="ttc" id="aunionICM__RCFG__Type_html_aee186ae77ad5a595c94433e9504c3e03"><div class="ttname"><a href="unionICM__RCFG__Type.html#aee186ae77ad5a595c94433e9504c3e03">ICM_RCFG_Type::RHIEN</a></div><div class="ttdeci">uint32_t RHIEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00433">icm.h:433</a></div></div>
<div class="ttc" id="aunionICM__CTRL__Type_html"><div class="ttname"><a href="unionICM__CTRL__Type.html">ICM_CTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00102">icm.h:102</a></div></div>
<div class="ttc" id="aunionICM__IDR__Type_html_a764d3c82cdd452998c40ebf9c50051c7"><div class="ttname"><a href="unionICM__IDR__Type.html#a764d3c82cdd452998c40ebf9c50051c7">ICM_IDR_Type::REC</a></div><div class="ttdeci">uint32_t REC</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00212">icm.h:212</a></div></div>
<div class="ttc" id="aunionICM__IER__Type_html_a5387d425973302e1c261022564eb7f71"><div class="ttname"><a href="unionICM__IER__Type.html#a5387d425973302e1c261022564eb7f71">ICM_IER_Type::RDM</a></div><div class="ttdeci">uint32_t RDM</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00168">icm.h:168</a></div></div>
<div class="ttc" id="aunionICM__RCFG__Type_html_af82b057a0a7e02121dcbf5f627cde331"><div class="ttname"><a href="unionICM__RCFG__Type.html#af82b057a0a7e02121dcbf5f627cde331">ICM_RCFG_Type::DMIEN</a></div><div class="ttdeci">uint32_t DMIEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00434">icm.h:434</a></div></div>
<div class="ttc" id="aunionICM__ISR__Type_html_a26f7b92d04284e17094a954889e34c00"><div class="ttname"><a href="unionICM__ISR__Type.html#a26f7b92d04284e17094a954889e34c00">ICM_ISR_Type::RBE</a></div><div class="ttdeci">uint32_t RBE</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00294">icm.h:294</a></div></div>
<div class="ttc" id="aunionICM__IER__Type_html_a1cf05e47773ae891e75b5acbc0b7f3c5"><div class="ttname"><a href="unionICM__IER__Type.html#a1cf05e47773ae891e75b5acbc0b7f3c5">ICM_IER_Type::URAD</a></div><div class="ttdeci">uint32_t URAD</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00173">icm.h:173</a></div></div>
<div class="ttc" id="aunionICM__IMR__Type_html_ae093d52b848138c8abbe45c11e5177f0"><div class="ttname"><a href="unionICM__IMR__Type.html#ae093d52b848138c8abbe45c11e5177f0">ICM_IMR_Type::RDM</a></div><div class="ttdeci">uint32_t RDM</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00251">icm.h:251</a></div></div>
<div class="ttc" id="aunionICM__CFG__Type_html"><div class="ttname"><a href="unionICM__CFG__Type.html">ICM_CFG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00044">icm.h:44</a></div></div>
<div class="ttc" id="aunionICM__UIHVAL__Type_html_a11b1c19395139eb104c0331a0800ccb3"><div class="ttname"><a href="unionICM__UIHVAL__Type.html#a11b1c19395139eb104c0331a0800ccb3">ICM_UIHVAL_Type::VAL</a></div><div class="ttdeci">uint32_t VAL</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00401">icm.h:401</a></div></div>
<div class="ttc" id="aunionICM__IER__Type_html_a6471026d8f77bf933c92a27169dbf65a"><div class="ttname"><a href="unionICM__IER__Type.html#a6471026d8f77bf933c92a27169dbf65a">ICM_IER_Type::RBE</a></div><div class="ttdeci">uint32_t RBE</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00169">icm.h:169</a></div></div>
<div class="ttc" id="aunionICM__RCTRL__Type_html"><div class="ttname"><a href="unionICM__RCTRL__Type.html">ICM_RCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00523">icm.h:523</a></div></div>
<div class="ttc" id="aunionICM__IDR__Type_html_aca5ec7521b6f69502719e2d845d35049"><div class="ttname"><a href="unionICM__IDR__Type.html#aca5ec7521b6f69502719e2d845d35049">ICM_IDR_Type::URAD</a></div><div class="ttdeci">uint32_t URAD</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00214">icm.h:214</a></div></div>
<div class="ttc" id="astructIcm_html_ab29ae4602acadd5b2868ad6d636dcfa3"><div class="ttname"><a href="structIcm.html#ab29ae4602acadd5b2868ad6d636dcfa3">Icm::UASR</a></div><div class="ttdeci">__I ICM_UASR_Type UASR</div><div class="ttdoc">Offset: 0x20 (R/ 32) Undefined Access Status.</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00560">icm.h:560</a></div></div>
<div class="ttc" id="aunionICM__IDR__Type_html_a36524be4f4a2aff11d0836374cd45078"><div class="ttname"><a href="unionICM__IDR__Type.html#a36524be4f4a2aff11d0836374cd45078">ICM_IDR_Type::RHC</a></div><div class="ttdeci">uint32_t RHC</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00208">icm.h:208</a></div></div>
<div class="ttc" id="aunionICM__IDR__Type_html_a3b189052af6bbfd3eecb6dc606c07647"><div class="ttname"><a href="unionICM__IDR__Type.html#a3b189052af6bbfd3eecb6dc606c07647">ICM_IDR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00217">icm.h:217</a></div></div>
<div class="ttc" id="aunionICM__RADDR__Type_html"><div class="ttname"><a href="unionICM__RADDR__Type.html">ICM_RADDR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00417">icm.h:417</a></div></div>
<div class="ttc" id="aunionICM__CFG__Type_html_a8a7824ed9be7132a13975a6fef984afa"><div class="ttname"><a href="unionICM__CFG__Type.html#a8a7824ed9be7132a13975a6fef984afa">ICM_CFG_Type::SLBDIS</a></div><div class="ttdeci">uint32_t SLBDIS</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00048">icm.h:48</a></div></div>
<div class="ttc" id="aunionICM__IER__Type_html_a08d788a849b5cb633fc99aa944072bc3"><div class="ttname"><a href="unionICM__IER__Type.html#a08d788a849b5cb633fc99aa944072bc3">ICM_IER_Type::RWC</a></div><div class="ttdeci">uint32_t RWC</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00170">icm.h:170</a></div></div>
<div class="ttc" id="aunionICM__CTRL__Type_html_a535147cc8e22e9cb4b0ceb532983c279"><div class="ttname"><a href="unionICM__CTRL__Type.html#a535147cc8e22e9cb4b0ceb532983c279">ICM_CTRL_Type::ENABLE</a></div><div class="ttdeci">uint32_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00104">icm.h:104</a></div></div>
<div class="ttc" id="aunionICM__SR__Type_html_a604223ac33df866166d832cb93a8d078"><div class="ttname"><a href="unionICM__SR__Type.html#a604223ac33df866166d832cb93a8d078">ICM_SR_Type::RMDIS</a></div><div class="ttdeci">uint32_t RMDIS</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00143">icm.h:143</a></div></div>
<div class="ttc" id="astructIcmDescriptor_html_a34737436b8df5c94dcac8f66292d554e"><div class="ttname"><a href="structIcmDescriptor.html#a34737436b8df5c94dcac8f66292d554e">IcmDescriptor::RNEXT</a></div><div class="ttdeci">__IO ICM_RNEXT_Type RNEXT</div><div class="ttdoc">Offset: 0x0C (R/W 32) Region Next Address.</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00574">icm.h:574</a></div></div>
<div class="ttc" id="aunionICM__IER__Type_html_aaa77113c91dd9cbc325a44dd45cc9e0e"><div class="ttname"><a href="unionICM__IER__Type.html#aaa77113c91dd9cbc325a44dd45cc9e0e">ICM_IER_Type::REC</a></div><div class="ttdeci">uint32_t REC</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00171">icm.h:171</a></div></div>
<div class="ttc" id="aunionICM__IER__Type_html"><div class="ttname"><a href="unionICM__IER__Type.html">ICM_IER_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00165">icm.h:165</a></div></div>
<div class="ttc" id="aunionICM__CTRL__Type_html_ab0e370cfc8b9076e14c19ef111d02453"><div class="ttname"><a href="unionICM__CTRL__Type.html#ab0e370cfc8b9076e14c19ef111d02453">ICM_CTRL_Type::RMDIS</a></div><div class="ttdeci">uint32_t RMDIS</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00109">icm.h:109</a></div></div>
<div class="ttc" id="astructIcmDescriptor_html_a2a202c92fc97439a40de8d761e8ef3bd"><div class="ttname"><a href="structIcmDescriptor.html#a2a202c92fc97439a40de8d761e8ef3bd">IcmDescriptor::RCFG</a></div><div class="ttdeci">__IO ICM_RCFG_Type RCFG</div><div class="ttdoc">Offset: 0x04 (R/W 32) Region Configuration.</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00572">icm.h:572</a></div></div>
<div class="ttc" id="aunionICM__IDR__Type_html_aaec3b9403ce100dc39c7fc3ab30850a4"><div class="ttname"><a href="unionICM__IDR__Type.html#aaec3b9403ce100dc39c7fc3ab30850a4">ICM_IDR_Type::RBE</a></div><div class="ttdeci">uint32_t RBE</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00210">icm.h:210</a></div></div>
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<div class="ttc" id="aunionICM__IMR__Type_html_ab852bca663af076e40816e258fe5657e"><div class="ttname"><a href="unionICM__IMR__Type.html#ab852bca663af076e40816e258fe5657e">ICM_IMR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00259">icm.h:259</a></div></div>
<div class="ttc" id="aunionICM__ISR__Type_html"><div class="ttname"><a href="unionICM__ISR__Type.html">ICM_ISR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00290">icm.h:290</a></div></div>
<div class="ttc" id="astructIcmDescriptor_html_af32c4ef633f488e8b91b6212d7531ba6"><div class="ttname"><a href="structIcmDescriptor.html#af32c4ef633f488e8b91b6212d7531ba6">IcmDescriptor::RCTRL</a></div><div class="ttdeci">__IO ICM_RCTRL_Type RCTRL</div><div class="ttdoc">Offset: 0x08 (R/W 32) Region Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00573">icm.h:573</a></div></div>
<div class="ttc" id="aunionICM__RCFG__Type_html_aae5e52b4efb07cabc81eb33f104813f0"><div class="ttname"><a href="unionICM__RCFG__Type.html#aae5e52b4efb07cabc81eb33f104813f0">ICM_RCFG_Type::BEIEN</a></div><div class="ttdeci">uint32_t BEIEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00435">icm.h:435</a></div></div>
<div class="ttc" id="aunionICM__RCFG__Type_html_a3ca2d4233f98c9ca1a4839b012f736d2"><div class="ttname"><a href="unionICM__RCFG__Type.html#a3ca2d4233f98c9ca1a4839b012f736d2">ICM_RCFG_Type::WRAP</a></div><div class="ttdeci">uint32_t WRAP</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00430">icm.h:430</a></div></div>
<div class="ttc" id="asame54n19a_8h_html_a0d957f1433aaf5d70e4dc2b68288442d"><div class="ttname"><a href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a></div><div class="ttdeci">volatile const uint8_t RoReg8</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00053">same54n19a.h:53</a></div></div>
<div class="ttc" id="aunionICM__IMR__Type_html_a98b698bbc8f58f933d34dd812d54b52f"><div class="ttname"><a href="unionICM__IMR__Type.html#a98b698bbc8f58f933d34dd812d54b52f">ICM_IMR_Type::URAD</a></div><div class="ttdeci">uint32_t URAD</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00256">icm.h:256</a></div></div>
<div class="ttc" id="aunionICM__CFG__Type_html_a4cc0029a9e55a3e165c0d9e4316aeb8b"><div class="ttname"><a href="unionICM__CFG__Type.html#a4cc0029a9e55a3e165c0d9e4316aeb8b">ICM_CFG_Type::DUALBUFF</a></div><div class="ttdeci">uint32_t DUALBUFF</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00052">icm.h:52</a></div></div>
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<div class="ttc" id="astructIcm_html_a909fc9f64528563127f3a59bcf5a863d"><div class="ttname"><a href="structIcm.html#a909fc9f64528563127f3a59bcf5a863d">Icm::SR</a></div><div class="ttdeci">__I ICM_SR_Type SR</div><div class="ttdoc">Offset: 0x08 (R/ 32) Status.</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00554">icm.h:554</a></div></div>
<div class="ttc" id="aunionICM__IDR__Type_html_acf24c98deccf45e85ee47ff65b4ecd9e"><div class="ttname"><a href="unionICM__IDR__Type.html#acf24c98deccf45e85ee47ff65b4ecd9e">ICM_IDR_Type::RWC</a></div><div class="ttdeci">uint32_t RWC</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00211">icm.h:211</a></div></div>
<div class="ttc" id="aunionICM__RCFG__Type_html_ab2c75c97d4e1027e042ef108fb483155"><div class="ttname"><a href="unionICM__RCFG__Type.html#ab2c75c97d4e1027e042ef108fb483155">ICM_RCFG_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00446">icm.h:446</a></div></div>
<div class="ttc" id="aunionICM__ISR__Type_html_a2c4c4b55b03beae071639e608b0f8a87"><div class="ttname"><a href="unionICM__ISR__Type.html#a2c4c4b55b03beae071639e608b0f8a87">ICM_ISR_Type::RHC</a></div><div class="ttdeci">uint32_t RHC</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00292">icm.h:292</a></div></div>
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<div class="ttc" id="aunionICM__CFG__Type_html_a376cb6022607e8e56666e325c55f98f4"><div class="ttname"><a href="unionICM__CFG__Type.html#a376cb6022607e8e56666e325c55f98f4">ICM_CFG_Type::EOMDIS</a></div><div class="ttdeci">uint32_t EOMDIS</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00047">icm.h:47</a></div></div>
<div class="ttc" id="aunionICM__CFG__Type_html_a19006cc5f31cb5bd868b18bffb4d8f18"><div class="ttname"><a href="unionICM__CFG__Type.html#a19006cc5f31cb5bd868b18bffb4d8f18">ICM_CFG_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00061">icm.h:61</a></div></div>
<div class="ttc" id="aunionICM__RCFG__Type_html_adf8b84db511cc8c317e509428809ca11"><div class="ttname"><a href="unionICM__RCFG__Type.html#adf8b84db511cc8c317e509428809ca11">ICM_RCFG_Type::SUIEN</a></div><div class="ttdeci">uint32_t SUIEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00438">icm.h:438</a></div></div>
<div class="ttc" id="aunionICM__CTRL__Type_html_a0d7fc66f495b7f20f3b869133b28d5cb"><div class="ttname"><a href="unionICM__CTRL__Type.html#a0d7fc66f495b7f20f3b869133b28d5cb">ICM_CTRL_Type::DISABLE</a></div><div class="ttdeci">uint32_t DISABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00105">icm.h:105</a></div></div>
<div class="ttc" id="aunionICM__IMR__Type_html_a455b46a4edeb118caf8bba3200e11e6d"><div class="ttname"><a href="unionICM__IMR__Type.html#a455b46a4edeb118caf8bba3200e11e6d">ICM_IMR_Type::RSU</a></div><div class="ttdeci">uint32_t RSU</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00255">icm.h:255</a></div></div>
<div class="ttc" id="aunionICM__ISR__Type_html_a443c26098907e4ded64a9568b414ffc6"><div class="ttname"><a href="unionICM__ISR__Type.html#a443c26098907e4ded64a9568b414ffc6">ICM_ISR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2icm_8h_source.html#l00301">icm.h:301</a></div></div>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_U2408</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>REV_MCLK</b>&#160;&#160;&#160;0x100</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a68637b3f1fed0ccd3ae371c53992e406">MCLK_INTENCLR_OFFSET</a>&#160;&#160;&#160;0x01</td></tr>
<tr class="memdesc:a68637b3f1fed0ccd3ae371c53992e406"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_INTENCLR offset) Interrupt Enable Clear <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ad173bb9dba9e1522a644dbde879829d4">MCLK_INTENCLR_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#aebdcc599e953e54697b2e40b5397496b">MCLK_INTENCLR_CKRDY_Pos</a>&#160;&#160;&#160;0</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_INTENCLR_CKRDY</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#aebdcc599e953e54697b2e40b5397496b">MCLK_INTENCLR_CKRDY_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a6389053110a48b3e28a1856e9379af38">MCLK_INTENCLR_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x01)</td></tr>
<tr class="memdesc:a6389053110a48b3e28a1856e9379af38"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_INTENCLR) MASK Register <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ab0258927c23f68d0f403a91f68fdc1a8">MCLK_INTENSET_OFFSET</a>&#160;&#160;&#160;0x02</td></tr>
<tr class="memdesc:ab0258927c23f68d0f403a91f68fdc1a8"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_INTENSET offset) Interrupt Enable Set <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a1a1d204e6b63e6fb14793fad6be480b3">MCLK_INTENSET_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a1a1d204e6b63e6fb14793fad6be480b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_INTENSET reset_value) Interrupt Enable Set <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ab9fefb6acd254d502c9ea81d010831ff">MCLK_INTENSET_CKRDY_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ab9fefb6acd254d502c9ea81d010831ff"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_INTENSET) Clock Ready Interrupt Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_INTENSET_CKRDY</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#ab9fefb6acd254d502c9ea81d010831ff">MCLK_INTENSET_CKRDY_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#aa5b62ad35b9bc2c164fea2457115e2b8">MCLK_INTENSET_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x01)</td></tr>
<tr class="memdesc:aa5b62ad35b9bc2c164fea2457115e2b8"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_INTENSET) MASK Register <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#af56eeb6ada43fe94d261d6d04336635b">MCLK_INTFLAG_OFFSET</a>&#160;&#160;&#160;0x03</td></tr>
<tr class="memdesc:af56eeb6ada43fe94d261d6d04336635b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_INTFLAG offset) Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="memitem:a8e5308a9ba8280b0e4f121e9d65a36a4"><td class="memItemLeft" align="right" valign="top"><a id="a8e5308a9ba8280b0e4f121e9d65a36a4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a8e5308a9ba8280b0e4f121e9d65a36a4">MCLK_INTFLAG_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x01)</td></tr>
<tr class="memdesc:a8e5308a9ba8280b0e4f121e9d65a36a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_INTFLAG reset_value) Interrupt Flag Status and Clear <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#abef328de34a9da476fa9a626643999e5">MCLK_INTFLAG_CKRDY_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:abef328de34a9da476fa9a626643999e5"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_INTFLAG) Clock Ready <br /></td></tr>
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<tr class="memitem:a4d627a8eb324eb7142abf6c035aef208"><td class="memItemLeft" align="right" valign="top"><a id="a4d627a8eb324eb7142abf6c035aef208"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_INTFLAG_CKRDY</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#abef328de34a9da476fa9a626643999e5">MCLK_INTFLAG_CKRDY_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a4d2f239e68ff5fba4b25397d91bed74a">MCLK_INTFLAG_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x01)</td></tr>
<tr class="memdesc:a4d2f239e68ff5fba4b25397d91bed74a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_INTFLAG) MASK Register <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ae0971c09918d1056399fd86900aa4890">MCLK_HSDIV_OFFSET</a>&#160;&#160;&#160;0x04</td></tr>
<tr class="memdesc:ae0971c09918d1056399fd86900aa4890"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_HSDIV offset) HS Clock Division <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ae6d3e536fec3cc26aaa6cd78c17d497b">MCLK_HSDIV_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x01)</td></tr>
<tr class="memdesc:ae6d3e536fec3cc26aaa6cd78c17d497b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_HSDIV reset_value) HS Clock Division <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a95894d35a451f22d21907122d7459c7c">MCLK_HSDIV_DIV_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a95894d35a451f22d21907122d7459c7c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_HSDIV) CPU Clock Division Factor <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_HSDIV_DIV_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a95894d35a451f22d21907122d7459c7c">MCLK_HSDIV_DIV_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_HSDIV_DIV</b>(value)&#160;&#160;&#160;(MCLK_HSDIV_DIV_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a95894d35a451f22d21907122d7459c7c">MCLK_HSDIV_DIV_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a119ab5a20e98782d805cdf5c4501e712">MCLK_HSDIV_DIV_DIV1_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:a119ab5a20e98782d805cdf5c4501e712"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_HSDIV) Divide by 1 <br /></td></tr>
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<tr class="memitem:a453a98753a74f894d7a1a638617af0ba"><td class="memItemLeft" align="right" valign="top"><a id="a453a98753a74f894d7a1a638617af0ba"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_HSDIV_DIV_DIV1</b>&#160;&#160;&#160;(<a class="el" href="component_2mclk_8h.html#a119ab5a20e98782d805cdf5c4501e712">MCLK_HSDIV_DIV_DIV1_Val</a> &lt;&lt; <a class="el" href="component_2mclk_8h.html#a95894d35a451f22d21907122d7459c7c">MCLK_HSDIV_DIV_Pos</a>)</td></tr>
<tr class="separator:a453a98753a74f894d7a1a638617af0ba"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aaacdcc773f6047747e0c5be7e2f8e617"><td class="memItemLeft" align="right" valign="top"><a id="aaacdcc773f6047747e0c5be7e2f8e617"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#aaacdcc773f6047747e0c5be7e2f8e617">MCLK_HSDIV_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF)</td></tr>
<tr class="memdesc:aaacdcc773f6047747e0c5be7e2f8e617"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_HSDIV) MASK Register <br /></td></tr>
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<tr class="memitem:a6b856556e549869e608b1c9d9ca335ff"><td class="memItemLeft" align="right" valign="top"><a id="a6b856556e549869e608b1c9d9ca335ff"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a6b856556e549869e608b1c9d9ca335ff">MCLK_CPUDIV_OFFSET</a>&#160;&#160;&#160;0x05</td></tr>
<tr class="memdesc:a6b856556e549869e608b1c9d9ca335ff"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_CPUDIV offset) CPU Clock Division <br /></td></tr>
<tr class="separator:a6b856556e549869e608b1c9d9ca335ff"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad5b446415ed860f94d2368945fa4b698"><td class="memItemLeft" align="right" valign="top"><a id="ad5b446415ed860f94d2368945fa4b698"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ad5b446415ed860f94d2368945fa4b698">MCLK_CPUDIV_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x01)</td></tr>
<tr class="memdesc:ad5b446415ed860f94d2368945fa4b698"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_CPUDIV reset_value) CPU Clock Division <br /></td></tr>
<tr class="separator:ad5b446415ed860f94d2368945fa4b698"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4e0248a576cb2763bf8271787d56e3d6"><td class="memItemLeft" align="right" valign="top"><a id="a4e0248a576cb2763bf8271787d56e3d6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a4e0248a576cb2763bf8271787d56e3d6">MCLK_CPUDIV_DIV_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a4e0248a576cb2763bf8271787d56e3d6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_CPUDIV) Low-Power Clock Division Factor <br /></td></tr>
<tr class="separator:a4e0248a576cb2763bf8271787d56e3d6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aea67764bcda25acdb042517857e67510"><td class="memItemLeft" align="right" valign="top"><a id="aea67764bcda25acdb042517857e67510"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_CPUDIV_DIV_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a4e0248a576cb2763bf8271787d56e3d6">MCLK_CPUDIV_DIV_Pos</a>)</td></tr>
<tr class="separator:aea67764bcda25acdb042517857e67510"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3498105c08ae92ce6c8239770f4df96d"><td class="memItemLeft" align="right" valign="top"><a id="a3498105c08ae92ce6c8239770f4df96d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_CPUDIV_DIV</b>(value)&#160;&#160;&#160;(MCLK_CPUDIV_DIV_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a4e0248a576cb2763bf8271787d56e3d6">MCLK_CPUDIV_DIV_Pos</a>))</td></tr>
<tr class="separator:a3498105c08ae92ce6c8239770f4df96d"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ae007ace127ccf52e63918793f78229b6">MCLK_CPUDIV_DIV_DIV1_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:ae007ace127ccf52e63918793f78229b6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_CPUDIV) Divide by 1 <br /></td></tr>
<tr class="separator:ae007ace127ccf52e63918793f78229b6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a86452934ee34c2237b4cb0a296bc0734"><td class="memItemLeft" align="right" valign="top"><a id="a86452934ee34c2237b4cb0a296bc0734"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a86452934ee34c2237b4cb0a296bc0734">MCLK_CPUDIV_DIV_DIV2_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a86452934ee34c2237b4cb0a296bc0734"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_CPUDIV) Divide by 2 <br /></td></tr>
<tr class="separator:a86452934ee34c2237b4cb0a296bc0734"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0d458738f455dcb54c5aa2d0ffcfa616"><td class="memItemLeft" align="right" valign="top"><a id="a0d458738f455dcb54c5aa2d0ffcfa616"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a0d458738f455dcb54c5aa2d0ffcfa616">MCLK_CPUDIV_DIV_DIV4_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
<tr class="memdesc:a0d458738f455dcb54c5aa2d0ffcfa616"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_CPUDIV) Divide by 4 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a67de4295c7d075c089f0c0280f95002b">MCLK_CPUDIV_DIV_DIV8_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x8)</td></tr>
<tr class="memdesc:a67de4295c7d075c089f0c0280f95002b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_CPUDIV) Divide by 8 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ae681abf45271d52e20032f75fde3e7a4">MCLK_CPUDIV_DIV_DIV16_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x10)</td></tr>
<tr class="memdesc:ae681abf45271d52e20032f75fde3e7a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_CPUDIV) Divide by 16 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a19e3476ae76abd38b0eac2f62dd7be46">MCLK_CPUDIV_DIV_DIV32_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x20)</td></tr>
<tr class="memdesc:a19e3476ae76abd38b0eac2f62dd7be46"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_CPUDIV) Divide by 32 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#aa91c616d0c486e08497d547619896a98">MCLK_CPUDIV_DIV_DIV64_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x40)</td></tr>
<tr class="memdesc:aa91c616d0c486e08497d547619896a98"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_CPUDIV) Divide by 64 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a4cfc1f32942c736f236075c22f1a4f81">MCLK_CPUDIV_DIV_DIV128_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x80)</td></tr>
<tr class="memdesc:a4cfc1f32942c736f236075c22f1a4f81"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_CPUDIV) Divide by 128 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_CPUDIV_DIV_DIV1</b>&#160;&#160;&#160;(<a class="el" href="component_2mclk_8h.html#ae007ace127ccf52e63918793f78229b6">MCLK_CPUDIV_DIV_DIV1_Val</a> &lt;&lt; <a class="el" href="component_2mclk_8h.html#a4e0248a576cb2763bf8271787d56e3d6">MCLK_CPUDIV_DIV_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_CPUDIV_DIV_DIV2</b>&#160;&#160;&#160;(<a class="el" href="component_2mclk_8h.html#a86452934ee34c2237b4cb0a296bc0734">MCLK_CPUDIV_DIV_DIV2_Val</a> &lt;&lt; <a class="el" href="component_2mclk_8h.html#a4e0248a576cb2763bf8271787d56e3d6">MCLK_CPUDIV_DIV_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_CPUDIV_DIV_DIV4</b>&#160;&#160;&#160;(<a class="el" href="component_2mclk_8h.html#a0d458738f455dcb54c5aa2d0ffcfa616">MCLK_CPUDIV_DIV_DIV4_Val</a> &lt;&lt; <a class="el" href="component_2mclk_8h.html#a4e0248a576cb2763bf8271787d56e3d6">MCLK_CPUDIV_DIV_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_CPUDIV_DIV_DIV8</b>&#160;&#160;&#160;(<a class="el" href="component_2mclk_8h.html#a67de4295c7d075c089f0c0280f95002b">MCLK_CPUDIV_DIV_DIV8_Val</a> &lt;&lt; <a class="el" href="component_2mclk_8h.html#a4e0248a576cb2763bf8271787d56e3d6">MCLK_CPUDIV_DIV_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_CPUDIV_DIV_DIV16</b>&#160;&#160;&#160;(<a class="el" href="component_2mclk_8h.html#ae681abf45271d52e20032f75fde3e7a4">MCLK_CPUDIV_DIV_DIV16_Val</a> &lt;&lt; <a class="el" href="component_2mclk_8h.html#a4e0248a576cb2763bf8271787d56e3d6">MCLK_CPUDIV_DIV_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_CPUDIV_DIV_DIV32</b>&#160;&#160;&#160;(<a class="el" href="component_2mclk_8h.html#a19e3476ae76abd38b0eac2f62dd7be46">MCLK_CPUDIV_DIV_DIV32_Val</a> &lt;&lt; <a class="el" href="component_2mclk_8h.html#a4e0248a576cb2763bf8271787d56e3d6">MCLK_CPUDIV_DIV_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_CPUDIV_DIV_DIV64</b>&#160;&#160;&#160;(<a class="el" href="component_2mclk_8h.html#aa91c616d0c486e08497d547619896a98">MCLK_CPUDIV_DIV_DIV64_Val</a> &lt;&lt; <a class="el" href="component_2mclk_8h.html#a4e0248a576cb2763bf8271787d56e3d6">MCLK_CPUDIV_DIV_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_CPUDIV_DIV_DIV128</b>&#160;&#160;&#160;(<a class="el" href="component_2mclk_8h.html#a4cfc1f32942c736f236075c22f1a4f81">MCLK_CPUDIV_DIV_DIV128_Val</a> &lt;&lt; <a class="el" href="component_2mclk_8h.html#a4e0248a576cb2763bf8271787d56e3d6">MCLK_CPUDIV_DIV_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ab671f30e14e4976663447bcdf727ea01">MCLK_CPUDIV_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF)</td></tr>
<tr class="memdesc:ab671f30e14e4976663447bcdf727ea01"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_CPUDIV) MASK Register <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#af60da772fd92f5ac2d24529a4edd5bcf">MCLK_AHBMASK_OFFSET</a>&#160;&#160;&#160;0x10</td></tr>
<tr class="memdesc:af60da772fd92f5ac2d24529a4edd5bcf"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK offset) AHB Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a7416e817fc3532e446cfae94a314c2c1">MCLK_AHBMASK_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00FFFFFF)</td></tr>
<tr class="memdesc:a7416e817fc3532e446cfae94a314c2c1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK reset_value) AHB Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#aab73df1970914c738e069aa3f44343f7">MCLK_AHBMASK_HPB0_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:aab73df1970914c738e069aa3f44343f7"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) HPB0 AHB Clock Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_HPB0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#aab73df1970914c738e069aa3f44343f7">MCLK_AHBMASK_HPB0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ad500245362fc27f25dbd1cd872403db5">MCLK_AHBMASK_HPB1_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:ad500245362fc27f25dbd1cd872403db5"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) HPB1 AHB Clock Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_HPB1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#ad500245362fc27f25dbd1cd872403db5">MCLK_AHBMASK_HPB1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ad85e221b80ccea1b2fb40ccd57361831">MCLK_AHBMASK_HPB2_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:ad85e221b80ccea1b2fb40ccd57361831"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) HPB2 AHB Clock Mask <br /></td></tr>
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<tr class="memitem:a4195e6c352a7882bd03c3a0e41a711be"><td class="memItemLeft" align="right" valign="top"><a id="a4195e6c352a7882bd03c3a0e41a711be"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_HPB2</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#ad85e221b80ccea1b2fb40ccd57361831">MCLK_AHBMASK_HPB2_Pos</a>)</td></tr>
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<tr class="memitem:a0fde493e6b6f196f2f5097f561c77fa3"><td class="memItemLeft" align="right" valign="top"><a id="a0fde493e6b6f196f2f5097f561c77fa3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a0fde493e6b6f196f2f5097f561c77fa3">MCLK_AHBMASK_HPB3_Pos</a>&#160;&#160;&#160;3</td></tr>
<tr class="memdesc:a0fde493e6b6f196f2f5097f561c77fa3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) HPB3 AHB Clock Mask <br /></td></tr>
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<tr class="memitem:a98288687816bc464a0a8372ad889dd3e"><td class="memItemLeft" align="right" valign="top"><a id="a98288687816bc464a0a8372ad889dd3e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_HPB3</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a0fde493e6b6f196f2f5097f561c77fa3">MCLK_AHBMASK_HPB3_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#af25c239a7914145d262614e4cea537b3">MCLK_AHBMASK_DSU_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:af25c239a7914145d262614e4cea537b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) DSU AHB Clock Mask <br /></td></tr>
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<tr class="memitem:a65924af4e0fa2107ba83b9a2e6f58049"><td class="memItemLeft" align="right" valign="top"><a id="a65924af4e0fa2107ba83b9a2e6f58049"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_DSU</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#af25c239a7914145d262614e4cea537b3">MCLK_AHBMASK_DSU_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a0c382b9b2b318a564cf9769941fa7373">MCLK_AHBMASK_HMATRIX_Pos</a>&#160;&#160;&#160;5</td></tr>
<tr class="memdesc:a0c382b9b2b318a564cf9769941fa7373"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) HMATRIX AHB Clock Mask <br /></td></tr>
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<tr class="memitem:a0b8a35a62cfb5d36452dfb42865eb142"><td class="memItemLeft" align="right" valign="top"><a id="a0b8a35a62cfb5d36452dfb42865eb142"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_HMATRIX</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a0c382b9b2b318a564cf9769941fa7373">MCLK_AHBMASK_HMATRIX_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a81becb828c915d5aac7686148213cb7a">MCLK_AHBMASK_NVMCTRL_Pos</a>&#160;&#160;&#160;6</td></tr>
<tr class="memdesc:a81becb828c915d5aac7686148213cb7a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) NVMCTRL AHB Clock Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_NVMCTRL</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a81becb828c915d5aac7686148213cb7a">MCLK_AHBMASK_NVMCTRL_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a3a610cdaf2a0676797625dee122829f3">MCLK_AHBMASK_HSRAM_Pos</a>&#160;&#160;&#160;7</td></tr>
<tr class="memdesc:a3a610cdaf2a0676797625dee122829f3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) HSRAM AHB Clock Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_HSRAM</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a3a610cdaf2a0676797625dee122829f3">MCLK_AHBMASK_HSRAM_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a5114ee4fb624a1109ca8a35533050c91">MCLK_AHBMASK_CMCC_Pos</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:a5114ee4fb624a1109ca8a35533050c91"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) CMCC AHB Clock Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_CMCC</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a5114ee4fb624a1109ca8a35533050c91">MCLK_AHBMASK_CMCC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a9777b9f4e5c6f15597d5d0f3c284a638">MCLK_AHBMASK_DMAC_Pos</a>&#160;&#160;&#160;9</td></tr>
<tr class="memdesc:a9777b9f4e5c6f15597d5d0f3c284a638"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) DMAC AHB Clock Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_DMAC</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a9777b9f4e5c6f15597d5d0f3c284a638">MCLK_AHBMASK_DMAC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a58c4b1c4ee77bdcf758d0e74ec5b5abc">MCLK_AHBMASK_USB_Pos</a>&#160;&#160;&#160;10</td></tr>
<tr class="memdesc:a58c4b1c4ee77bdcf758d0e74ec5b5abc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) USB AHB Clock Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_USB</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a58c4b1c4ee77bdcf758d0e74ec5b5abc">MCLK_AHBMASK_USB_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a51f341be2cd16552a79406a3df9fad31">MCLK_AHBMASK_BKUPRAM_Pos</a>&#160;&#160;&#160;11</td></tr>
<tr class="memdesc:a51f341be2cd16552a79406a3df9fad31"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) BKUPRAM AHB Clock Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_BKUPRAM</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a51f341be2cd16552a79406a3df9fad31">MCLK_AHBMASK_BKUPRAM_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a25f30a1fcd43fb869b5594496df8d1f1">MCLK_AHBMASK_PAC_Pos</a>&#160;&#160;&#160;12</td></tr>
<tr class="memdesc:a25f30a1fcd43fb869b5594496df8d1f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) PAC AHB Clock Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_PAC</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a25f30a1fcd43fb869b5594496df8d1f1">MCLK_AHBMASK_PAC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#aadc7e0a4d4a8f204ff028e09185a6dbc">MCLK_AHBMASK_QSPI_Pos</a>&#160;&#160;&#160;13</td></tr>
<tr class="memdesc:aadc7e0a4d4a8f204ff028e09185a6dbc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) QSPI AHB Clock Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_QSPI</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#aadc7e0a4d4a8f204ff028e09185a6dbc">MCLK_AHBMASK_QSPI_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a90a6e6c304da25718d5535909d7765f9">MCLK_AHBMASK_GMAC_Pos</a>&#160;&#160;&#160;14</td></tr>
<tr class="memdesc:a90a6e6c304da25718d5535909d7765f9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) GMAC AHB Clock Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_GMAC</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a90a6e6c304da25718d5535909d7765f9">MCLK_AHBMASK_GMAC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a075eb14056d8b7fedd243795408bf542">MCLK_AHBMASK_SDHC0_Pos</a>&#160;&#160;&#160;15</td></tr>
<tr class="memdesc:a075eb14056d8b7fedd243795408bf542"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) SDHC0 AHB Clock Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_SDHC0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a075eb14056d8b7fedd243795408bf542">MCLK_AHBMASK_SDHC0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a33f14b34d3d4622e115b84d46bb9207a">MCLK_AHBMASK_SDHC1_Pos</a>&#160;&#160;&#160;16</td></tr>
<tr class="memdesc:a33f14b34d3d4622e115b84d46bb9207a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) SDHC1 AHB Clock Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_SDHC1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a33f14b34d3d4622e115b84d46bb9207a">MCLK_AHBMASK_SDHC1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ad5d5cfafc70ebe598b651e3496fcd4a4">MCLK_AHBMASK_CAN0_Pos</a>&#160;&#160;&#160;17</td></tr>
<tr class="memdesc:ad5d5cfafc70ebe598b651e3496fcd4a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) CAN0 AHB Clock Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_CAN0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#ad5d5cfafc70ebe598b651e3496fcd4a4">MCLK_AHBMASK_CAN0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a361fe28b52db9c858de0926bc72b5985">MCLK_AHBMASK_CAN1_Pos</a>&#160;&#160;&#160;18</td></tr>
<tr class="memdesc:a361fe28b52db9c858de0926bc72b5985"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) CAN1 AHB Clock Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_CAN1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a361fe28b52db9c858de0926bc72b5985">MCLK_AHBMASK_CAN1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a96dc631a8955ba6a803b4a7e0f45456e">MCLK_AHBMASK_ICM_Pos</a>&#160;&#160;&#160;19</td></tr>
<tr class="memdesc:a96dc631a8955ba6a803b4a7e0f45456e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) ICM AHB Clock Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_ICM</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a96dc631a8955ba6a803b4a7e0f45456e">MCLK_AHBMASK_ICM_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#aced4a82f31a9b059bc0ce0372302cfc9">MCLK_AHBMASK_PUKCC_Pos</a>&#160;&#160;&#160;20</td></tr>
<tr class="memdesc:aced4a82f31a9b059bc0ce0372302cfc9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) PUKCC AHB Clock Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_PUKCC</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#aced4a82f31a9b059bc0ce0372302cfc9">MCLK_AHBMASK_PUKCC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#addc4877eff69e76ab70162f511744c0b">MCLK_AHBMASK_QSPI_2X_Pos</a>&#160;&#160;&#160;21</td></tr>
<tr class="memdesc:addc4877eff69e76ab70162f511744c0b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) QSPI_2X AHB Clock Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_QSPI_2X</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#addc4877eff69e76ab70162f511744c0b">MCLK_AHBMASK_QSPI_2X_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a893beae0d8a30df0cac8ac289280926a">MCLK_AHBMASK_NVMCTRL_SMEEPROM_Pos</a>&#160;&#160;&#160;22</td></tr>
<tr class="memdesc:a893beae0d8a30df0cac8ac289280926a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) NVMCTRL_SMEEPROM AHB Clock Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_NVMCTRL_SMEEPROM</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a893beae0d8a30df0cac8ac289280926a">MCLK_AHBMASK_NVMCTRL_SMEEPROM_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a433eb3bd2eac386d68dadbeb476c412b">MCLK_AHBMASK_NVMCTRL_CACHE_Pos</a>&#160;&#160;&#160;23</td></tr>
<tr class="memdesc:a433eb3bd2eac386d68dadbeb476c412b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) NVMCTRL_CACHE AHB Clock Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_NVMCTRL_CACHE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a433eb3bd2eac386d68dadbeb476c412b">MCLK_AHBMASK_NVMCTRL_CACHE_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a4ff9567101bdb1ceefebec27f64d817f">MCLK_AHBMASK_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00FFFFFF)</td></tr>
<tr class="memdesc:a4ff9567101bdb1ceefebec27f64d817f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_AHBMASK) MASK Register <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a0c6c90fc226352932e5d81fb51efebc0">MCLK_APBAMASK_OFFSET</a>&#160;&#160;&#160;0x14</td></tr>
<tr class="memdesc:a0c6c90fc226352932e5d81fb51efebc0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBAMASK offset) APBA Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a3d96d2b490df3f3164791e72baeabe60">MCLK_APBAMASK_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x000007FF)</td></tr>
<tr class="memdesc:a3d96d2b490df3f3164791e72baeabe60"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBAMASK reset_value) APBA Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a961dc42788c4447477d905b3fa27c039">MCLK_APBAMASK_PAC_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a961dc42788c4447477d905b3fa27c039"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBAMASK) PAC APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_PAC</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a961dc42788c4447477d905b3fa27c039">MCLK_APBAMASK_PAC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a04293b17854c4a2862117cb1e92e90d9">MCLK_APBAMASK_PM_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:a04293b17854c4a2862117cb1e92e90d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBAMASK) PM APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_PM</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a04293b17854c4a2862117cb1e92e90d9">MCLK_APBAMASK_PM_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a0db8d768734ebf5b9b0c4b32fff4ad02">MCLK_APBAMASK_MCLK_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:a0db8d768734ebf5b9b0c4b32fff4ad02"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBAMASK) MCLK APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_MCLK</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a0db8d768734ebf5b9b0c4b32fff4ad02">MCLK_APBAMASK_MCLK_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a23015f90db0192052e8d0a971684fa6e">MCLK_APBAMASK_RSTC_Pos</a>&#160;&#160;&#160;3</td></tr>
<tr class="memdesc:a23015f90db0192052e8d0a971684fa6e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBAMASK) RSTC APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_RSTC</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a23015f90db0192052e8d0a971684fa6e">MCLK_APBAMASK_RSTC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ac3c888b7b8de3be9e61afcf2aff6dff2">MCLK_APBAMASK_OSCCTRL_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:ac3c888b7b8de3be9e61afcf2aff6dff2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBAMASK) OSCCTRL APB Clock Enable <br /></td></tr>
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<tr class="memitem:a14f0797fb3f869e7dae0d1f669c1baef"><td class="memItemLeft" align="right" valign="top"><a id="a14f0797fb3f869e7dae0d1f669c1baef"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_OSCCTRL</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#ac3c888b7b8de3be9e61afcf2aff6dff2">MCLK_APBAMASK_OSCCTRL_Pos</a>)</td></tr>
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<tr class="memitem:ac13c0587fd456465accd0efc6e769413"><td class="memItemLeft" align="right" valign="top"><a id="ac13c0587fd456465accd0efc6e769413"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ac13c0587fd456465accd0efc6e769413">MCLK_APBAMASK_OSC32KCTRL_Pos</a>&#160;&#160;&#160;5</td></tr>
<tr class="memdesc:ac13c0587fd456465accd0efc6e769413"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBAMASK) OSC32KCTRL APB Clock Enable <br /></td></tr>
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<tr class="memitem:ab35f8bfe9dfac960c39e117b13c0c775"><td class="memItemLeft" align="right" valign="top"><a id="ab35f8bfe9dfac960c39e117b13c0c775"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_OSC32KCTRL</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#ac13c0587fd456465accd0efc6e769413">MCLK_APBAMASK_OSC32KCTRL_Pos</a>)</td></tr>
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<tr class="memitem:a9482e51359fc581f7c605977eb3685c5"><td class="memItemLeft" align="right" valign="top"><a id="a9482e51359fc581f7c605977eb3685c5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a9482e51359fc581f7c605977eb3685c5">MCLK_APBAMASK_SUPC_Pos</a>&#160;&#160;&#160;6</td></tr>
<tr class="memdesc:a9482e51359fc581f7c605977eb3685c5"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBAMASK) SUPC APB Clock Enable <br /></td></tr>
<tr class="separator:a9482e51359fc581f7c605977eb3685c5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa034a3017bc25f04ecd48ed91b75c101"><td class="memItemLeft" align="right" valign="top"><a id="aa034a3017bc25f04ecd48ed91b75c101"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_SUPC</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a9482e51359fc581f7c605977eb3685c5">MCLK_APBAMASK_SUPC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a5fb09fb3c0885c6bf234d8021344b40b">MCLK_APBAMASK_GCLK_Pos</a>&#160;&#160;&#160;7</td></tr>
<tr class="memdesc:a5fb09fb3c0885c6bf234d8021344b40b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBAMASK) GCLK APB Clock Enable <br /></td></tr>
<tr class="separator:a5fb09fb3c0885c6bf234d8021344b40b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a71a56d5e1f337ebd9fdc1c2e7dd9c033"><td class="memItemLeft" align="right" valign="top"><a id="a71a56d5e1f337ebd9fdc1c2e7dd9c033"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_GCLK</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a5fb09fb3c0885c6bf234d8021344b40b">MCLK_APBAMASK_GCLK_Pos</a>)</td></tr>
<tr class="separator:a71a56d5e1f337ebd9fdc1c2e7dd9c033"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a65b51937fbcdf1a5d7418bbfd0cb3a4e"><td class="memItemLeft" align="right" valign="top"><a id="a65b51937fbcdf1a5d7418bbfd0cb3a4e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a65b51937fbcdf1a5d7418bbfd0cb3a4e">MCLK_APBAMASK_WDT_Pos</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:a65b51937fbcdf1a5d7418bbfd0cb3a4e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBAMASK) WDT APB Clock Enable <br /></td></tr>
<tr class="separator:a65b51937fbcdf1a5d7418bbfd0cb3a4e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7840b89731ff3eb4be62d16784fa2bc2"><td class="memItemLeft" align="right" valign="top"><a id="a7840b89731ff3eb4be62d16784fa2bc2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_WDT</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a65b51937fbcdf1a5d7418bbfd0cb3a4e">MCLK_APBAMASK_WDT_Pos</a>)</td></tr>
<tr class="separator:a7840b89731ff3eb4be62d16784fa2bc2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a29bcfd311e7858237139c52fa164728d"><td class="memItemLeft" align="right" valign="top"><a id="a29bcfd311e7858237139c52fa164728d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a29bcfd311e7858237139c52fa164728d">MCLK_APBAMASK_RTC_Pos</a>&#160;&#160;&#160;9</td></tr>
<tr class="memdesc:a29bcfd311e7858237139c52fa164728d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBAMASK) RTC APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_RTC</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a29bcfd311e7858237139c52fa164728d">MCLK_APBAMASK_RTC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a5071841327f5691fad5aaa64928723b4">MCLK_APBAMASK_EIC_Pos</a>&#160;&#160;&#160;10</td></tr>
<tr class="memdesc:a5071841327f5691fad5aaa64928723b4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBAMASK) EIC APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_EIC</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a5071841327f5691fad5aaa64928723b4">MCLK_APBAMASK_EIC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#acf54f7ce88550526bfc9800583a180ae">MCLK_APBAMASK_FREQM_Pos</a>&#160;&#160;&#160;11</td></tr>
<tr class="memdesc:acf54f7ce88550526bfc9800583a180ae"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBAMASK) FREQM APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_FREQM</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#acf54f7ce88550526bfc9800583a180ae">MCLK_APBAMASK_FREQM_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a51a1701f5148614ae7068e73e4fa46df">MCLK_APBAMASK_SERCOM0_Pos</a>&#160;&#160;&#160;12</td></tr>
<tr class="memdesc:a51a1701f5148614ae7068e73e4fa46df"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBAMASK) SERCOM0 APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_SERCOM0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a51a1701f5148614ae7068e73e4fa46df">MCLK_APBAMASK_SERCOM0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ad7c8b0f983278890160b98943182947b">MCLK_APBAMASK_SERCOM1_Pos</a>&#160;&#160;&#160;13</td></tr>
<tr class="memdesc:ad7c8b0f983278890160b98943182947b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBAMASK) SERCOM1 APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_SERCOM1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#ad7c8b0f983278890160b98943182947b">MCLK_APBAMASK_SERCOM1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#adafd8598fbe6998d741a4db76ae10819">MCLK_APBAMASK_TC0_Pos</a>&#160;&#160;&#160;14</td></tr>
<tr class="memdesc:adafd8598fbe6998d741a4db76ae10819"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBAMASK) TC0 APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_TC0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#adafd8598fbe6998d741a4db76ae10819">MCLK_APBAMASK_TC0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#aadeb489d48264708c10f7d267b8a5365">MCLK_APBAMASK_TC1_Pos</a>&#160;&#160;&#160;15</td></tr>
<tr class="memdesc:aadeb489d48264708c10f7d267b8a5365"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBAMASK) TC1 APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_TC1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#aadeb489d48264708c10f7d267b8a5365">MCLK_APBAMASK_TC1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a85274982e658543846410257d8741368">MCLK_APBAMASK_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000FFFF)</td></tr>
<tr class="memdesc:a85274982e658543846410257d8741368"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBAMASK) MASK Register <br /></td></tr>
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<tr class="memitem:a8c35b6e1cf5ad6b7de3361646bc0510f"><td class="memItemLeft" align="right" valign="top"><a id="a8c35b6e1cf5ad6b7de3361646bc0510f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a8c35b6e1cf5ad6b7de3361646bc0510f">MCLK_APBBMASK_OFFSET</a>&#160;&#160;&#160;0x18</td></tr>
<tr class="memdesc:a8c35b6e1cf5ad6b7de3361646bc0510f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBBMASK offset) APBB Mask <br /></td></tr>
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<tr class="memitem:a7784f1cdd1314b91b3004070e1fc4b8b"><td class="memItemLeft" align="right" valign="top"><a id="a7784f1cdd1314b91b3004070e1fc4b8b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a7784f1cdd1314b91b3004070e1fc4b8b">MCLK_APBBMASK_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00018056)</td></tr>
<tr class="memdesc:a7784f1cdd1314b91b3004070e1fc4b8b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBBMASK reset_value) APBB Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#af21d2c3cd0e5edba8c2ad9db99d97a37">MCLK_APBBMASK_USB_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:af21d2c3cd0e5edba8c2ad9db99d97a37"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBBMASK) USB APB Clock Enable <br /></td></tr>
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<tr class="memitem:aaf842d3fb3e5253ed4f5aa5022143020"><td class="memItemLeft" align="right" valign="top"><a id="aaf842d3fb3e5253ed4f5aa5022143020"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_USB</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#af21d2c3cd0e5edba8c2ad9db99d97a37">MCLK_APBBMASK_USB_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a04d6d13ad8ea21c5493c88e22b64900b">MCLK_APBBMASK_DSU_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:a04d6d13ad8ea21c5493c88e22b64900b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBBMASK) DSU APB Clock Enable <br /></td></tr>
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<tr class="memitem:ab5389d85bf558511dcf954f5e2eb47a2"><td class="memItemLeft" align="right" valign="top"><a id="ab5389d85bf558511dcf954f5e2eb47a2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_DSU</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a04d6d13ad8ea21c5493c88e22b64900b">MCLK_APBBMASK_DSU_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a00e3c7c7c317a8a1a2e828ed35e38993">MCLK_APBBMASK_NVMCTRL_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:a00e3c7c7c317a8a1a2e828ed35e38993"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBBMASK) NVMCTRL APB Clock Enable <br /></td></tr>
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<tr class="memitem:a859d088ecae69a31dab834572749a8c3"><td class="memItemLeft" align="right" valign="top"><a id="a859d088ecae69a31dab834572749a8c3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_NVMCTRL</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a00e3c7c7c317a8a1a2e828ed35e38993">MCLK_APBBMASK_NVMCTRL_Pos</a>)</td></tr>
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<tr class="memitem:ae3ed73b717df511384b9192f5ff8a411"><td class="memItemLeft" align="right" valign="top"><a id="ae3ed73b717df511384b9192f5ff8a411"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ae3ed73b717df511384b9192f5ff8a411">MCLK_APBBMASK_PORT_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:ae3ed73b717df511384b9192f5ff8a411"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBBMASK) PORT APB Clock Enable <br /></td></tr>
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<tr class="memitem:ac48516538ef3eebd17549615ee24c9b6"><td class="memItemLeft" align="right" valign="top"><a id="ac48516538ef3eebd17549615ee24c9b6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_PORT</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#ae3ed73b717df511384b9192f5ff8a411">MCLK_APBBMASK_PORT_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ac9b7b578f7a12e80c52cb5f536ffbfc6">MCLK_APBBMASK_HMATRIX_Pos</a>&#160;&#160;&#160;6</td></tr>
<tr class="memdesc:ac9b7b578f7a12e80c52cb5f536ffbfc6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBBMASK) HMATRIX APB Clock Enable <br /></td></tr>
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<tr class="memitem:a2999fe05e94e0a386aa5588882fab286"><td class="memItemLeft" align="right" valign="top"><a id="a2999fe05e94e0a386aa5588882fab286"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_HMATRIX</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#ac9b7b578f7a12e80c52cb5f536ffbfc6">MCLK_APBBMASK_HMATRIX_Pos</a>)</td></tr>
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<tr class="memitem:acfef8c4d439e6c9c2474a3dba130a9ee"><td class="memItemLeft" align="right" valign="top"><a id="acfef8c4d439e6c9c2474a3dba130a9ee"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#acfef8c4d439e6c9c2474a3dba130a9ee">MCLK_APBBMASK_EVSYS_Pos</a>&#160;&#160;&#160;7</td></tr>
<tr class="memdesc:acfef8c4d439e6c9c2474a3dba130a9ee"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBBMASK) EVSYS APB Clock Enable <br /></td></tr>
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<tr class="memitem:a45fb1a7f85617996e24488257aca4528"><td class="memItemLeft" align="right" valign="top"><a id="a45fb1a7f85617996e24488257aca4528"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_EVSYS</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#acfef8c4d439e6c9c2474a3dba130a9ee">MCLK_APBBMASK_EVSYS_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ae601a75e252448b9b3ac8b7976bc06b4">MCLK_APBBMASK_SERCOM2_Pos</a>&#160;&#160;&#160;9</td></tr>
<tr class="memdesc:ae601a75e252448b9b3ac8b7976bc06b4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBBMASK) SERCOM2 APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_SERCOM2</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#ae601a75e252448b9b3ac8b7976bc06b4">MCLK_APBBMASK_SERCOM2_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a79d8ab6fd56bcdd7e7b512b076b86846">MCLK_APBBMASK_SERCOM3_Pos</a>&#160;&#160;&#160;10</td></tr>
<tr class="memdesc:a79d8ab6fd56bcdd7e7b512b076b86846"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBBMASK) SERCOM3 APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_SERCOM3</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a79d8ab6fd56bcdd7e7b512b076b86846">MCLK_APBBMASK_SERCOM3_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a49d92e93709a54e3d7d92f7c14a9cec1">MCLK_APBBMASK_TCC0_Pos</a>&#160;&#160;&#160;11</td></tr>
<tr class="memdesc:a49d92e93709a54e3d7d92f7c14a9cec1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBBMASK) TCC0 APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_TCC0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a49d92e93709a54e3d7d92f7c14a9cec1">MCLK_APBBMASK_TCC0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a481a03f2e4cace02a94025c9e0790da5">MCLK_APBBMASK_TCC1_Pos</a>&#160;&#160;&#160;12</td></tr>
<tr class="memdesc:a481a03f2e4cace02a94025c9e0790da5"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBBMASK) TCC1 APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_TCC1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a481a03f2e4cace02a94025c9e0790da5">MCLK_APBBMASK_TCC1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#acf6f153dbd6855a2250546f855a8c781">MCLK_APBBMASK_TC2_Pos</a>&#160;&#160;&#160;13</td></tr>
<tr class="memdesc:acf6f153dbd6855a2250546f855a8c781"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBBMASK) TC2 APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_TC2</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#acf6f153dbd6855a2250546f855a8c781">MCLK_APBBMASK_TC2_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a7365f0e61af5bf7f97d074e8f3987d54">MCLK_APBBMASK_TC3_Pos</a>&#160;&#160;&#160;14</td></tr>
<tr class="memdesc:a7365f0e61af5bf7f97d074e8f3987d54"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBBMASK) TC3 APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_TC3</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a7365f0e61af5bf7f97d074e8f3987d54">MCLK_APBBMASK_TC3_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a7a77772f140e3aeb2d58634ec4b1b206">MCLK_APBBMASK_RAMECC_Pos</a>&#160;&#160;&#160;16</td></tr>
<tr class="memdesc:a7a77772f140e3aeb2d58634ec4b1b206"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBBMASK) RAMECC APB Clock Enable <br /></td></tr>
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<tr class="memitem:ae27baf5c2b4c0640a11854d00b43db94"><td class="memItemLeft" align="right" valign="top"><a id="ae27baf5c2b4c0640a11854d00b43db94"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_RAMECC</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a7a77772f140e3aeb2d58634ec4b1b206">MCLK_APBBMASK_RAMECC_Pos</a>)</td></tr>
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<tr class="memitem:a17175a488d06a4b52abab2d654660456"><td class="memItemLeft" align="right" valign="top"><a id="a17175a488d06a4b52abab2d654660456"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a17175a488d06a4b52abab2d654660456">MCLK_APBBMASK_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00017ED7)</td></tr>
<tr class="memdesc:a17175a488d06a4b52abab2d654660456"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBBMASK) MASK Register <br /></td></tr>
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<tr class="memitem:a9adc77e1bade5beba117c02998b80574"><td class="memItemLeft" align="right" valign="top"><a id="a9adc77e1bade5beba117c02998b80574"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a9adc77e1bade5beba117c02998b80574">MCLK_APBCMASK_OFFSET</a>&#160;&#160;&#160;0x1C</td></tr>
<tr class="memdesc:a9adc77e1bade5beba117c02998b80574"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBCMASK offset) APBC Mask <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ad844382addaec4552ab75518ff2d7e74">MCLK_APBCMASK_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00002000)</td></tr>
<tr class="memdesc:ad844382addaec4552ab75518ff2d7e74"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBCMASK reset_value) APBC Mask <br /></td></tr>
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<tr class="memitem:aef22e33ee071b1ab1e044ebfec61ecc3"><td class="memItemLeft" align="right" valign="top"><a id="aef22e33ee071b1ab1e044ebfec61ecc3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#aef22e33ee071b1ab1e044ebfec61ecc3">MCLK_APBCMASK_GMAC_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:aef22e33ee071b1ab1e044ebfec61ecc3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBCMASK) GMAC APB Clock Enable <br /></td></tr>
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<tr class="memitem:a8a250097503b003b4a03734466e845f6"><td class="memItemLeft" align="right" valign="top"><a id="a8a250097503b003b4a03734466e845f6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBCMASK_GMAC</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#aef22e33ee071b1ab1e044ebfec61ecc3">MCLK_APBCMASK_GMAC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a4f871f80238ad9bbb73e2f8656a9e59d">MCLK_APBCMASK_TCC2_Pos</a>&#160;&#160;&#160;3</td></tr>
<tr class="memdesc:a4f871f80238ad9bbb73e2f8656a9e59d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBCMASK) TCC2 APB Clock Enable <br /></td></tr>
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<tr class="memitem:a19eb46ff025f9b876d0bb25038a441c9"><td class="memItemLeft" align="right" valign="top"><a id="a19eb46ff025f9b876d0bb25038a441c9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBCMASK_TCC2</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a4f871f80238ad9bbb73e2f8656a9e59d">MCLK_APBCMASK_TCC2_Pos</a>)</td></tr>
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<tr class="memitem:a6be7119f990531600e4f658bd3df0c0a"><td class="memItemLeft" align="right" valign="top"><a id="a6be7119f990531600e4f658bd3df0c0a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a6be7119f990531600e4f658bd3df0c0a">MCLK_APBCMASK_TCC3_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:a6be7119f990531600e4f658bd3df0c0a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBCMASK) TCC3 APB Clock Enable <br /></td></tr>
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<tr class="memitem:a9758b431d93e3894c3fe720deda7fd31"><td class="memItemLeft" align="right" valign="top"><a id="a9758b431d93e3894c3fe720deda7fd31"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBCMASK_TCC3</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a6be7119f990531600e4f658bd3df0c0a">MCLK_APBCMASK_TCC3_Pos</a>)</td></tr>
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<tr class="memitem:a7c886e1ff64370722c150d44200b66df"><td class="memItemLeft" align="right" valign="top"><a id="a7c886e1ff64370722c150d44200b66df"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a7c886e1ff64370722c150d44200b66df">MCLK_APBCMASK_TC4_Pos</a>&#160;&#160;&#160;5</td></tr>
<tr class="memdesc:a7c886e1ff64370722c150d44200b66df"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBCMASK) TC4 APB Clock Enable <br /></td></tr>
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<tr class="memitem:a3a1778059083d7beccce4de916cde4d1"><td class="memItemLeft" align="right" valign="top"><a id="a3a1778059083d7beccce4de916cde4d1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBCMASK_TC4</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a7c886e1ff64370722c150d44200b66df">MCLK_APBCMASK_TC4_Pos</a>)</td></tr>
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<tr class="memitem:a0da39e4b06b949c2cbb3e9b54637fb53"><td class="memItemLeft" align="right" valign="top"><a id="a0da39e4b06b949c2cbb3e9b54637fb53"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a0da39e4b06b949c2cbb3e9b54637fb53">MCLK_APBCMASK_TC5_Pos</a>&#160;&#160;&#160;6</td></tr>
<tr class="memdesc:a0da39e4b06b949c2cbb3e9b54637fb53"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBCMASK) TC5 APB Clock Enable <br /></td></tr>
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<tr class="memitem:a3dcb40f25867848c6b756923c0fda5e7"><td class="memItemLeft" align="right" valign="top"><a id="a3dcb40f25867848c6b756923c0fda5e7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBCMASK_TC5</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a0da39e4b06b949c2cbb3e9b54637fb53">MCLK_APBCMASK_TC5_Pos</a>)</td></tr>
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<tr class="memitem:a18d7a4cb62e3d42e28bb3d1824cf8898"><td class="memItemLeft" align="right" valign="top"><a id="a18d7a4cb62e3d42e28bb3d1824cf8898"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a18d7a4cb62e3d42e28bb3d1824cf8898">MCLK_APBCMASK_PDEC_Pos</a>&#160;&#160;&#160;7</td></tr>
<tr class="memdesc:a18d7a4cb62e3d42e28bb3d1824cf8898"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBCMASK) PDEC APB Clock Enable <br /></td></tr>
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<tr class="memitem:a9257cf0e4446f1cb108b8476dcef2316"><td class="memItemLeft" align="right" valign="top"><a id="a9257cf0e4446f1cb108b8476dcef2316"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBCMASK_PDEC</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a18d7a4cb62e3d42e28bb3d1824cf8898">MCLK_APBCMASK_PDEC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ae827c5e608f07904b393f4d5fcff1e48">MCLK_APBCMASK_AC_Pos</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:ae827c5e608f07904b393f4d5fcff1e48"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBCMASK) AC APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBCMASK_AC</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#ae827c5e608f07904b393f4d5fcff1e48">MCLK_APBCMASK_AC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#afe03bc583599946038f7e2de91be340c">MCLK_APBCMASK_AES_Pos</a>&#160;&#160;&#160;9</td></tr>
<tr class="memdesc:afe03bc583599946038f7e2de91be340c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBCMASK) AES APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBCMASK_AES</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#afe03bc583599946038f7e2de91be340c">MCLK_APBCMASK_AES_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a398240eb1bf125624011e74222087b4f">MCLK_APBCMASK_TRNG_Pos</a>&#160;&#160;&#160;10</td></tr>
<tr class="memdesc:a398240eb1bf125624011e74222087b4f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBCMASK) TRNG APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBCMASK_TRNG</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a398240eb1bf125624011e74222087b4f">MCLK_APBCMASK_TRNG_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ac1c36e384d318f08af381e7cf4e0b0f4">MCLK_APBCMASK_ICM_Pos</a>&#160;&#160;&#160;11</td></tr>
<tr class="memdesc:ac1c36e384d318f08af381e7cf4e0b0f4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBCMASK) ICM APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBCMASK_ICM</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#ac1c36e384d318f08af381e7cf4e0b0f4">MCLK_APBCMASK_ICM_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ab7812fa73c364fea3539d9ac04cf0bf7">MCLK_APBCMASK_QSPI_Pos</a>&#160;&#160;&#160;13</td></tr>
<tr class="memdesc:ab7812fa73c364fea3539d9ac04cf0bf7"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBCMASK) QSPI APB Clock Enable <br /></td></tr>
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<tr class="memitem:a4408eafa58b6c74a709abac439af2eba"><td class="memItemLeft" align="right" valign="top"><a id="a4408eafa58b6c74a709abac439af2eba"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBCMASK_QSPI</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#ab7812fa73c364fea3539d9ac04cf0bf7">MCLK_APBCMASK_QSPI_Pos</a>)</td></tr>
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<tr class="memitem:a4759ecc97b02d665427b2cb1a198e827"><td class="memItemLeft" align="right" valign="top"><a id="a4759ecc97b02d665427b2cb1a198e827"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a4759ecc97b02d665427b2cb1a198e827">MCLK_APBCMASK_CCL_Pos</a>&#160;&#160;&#160;14</td></tr>
<tr class="memdesc:a4759ecc97b02d665427b2cb1a198e827"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBCMASK) CCL APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBCMASK_CCL</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a4759ecc97b02d665427b2cb1a198e827">MCLK_APBCMASK_CCL_Pos</a>)</td></tr>
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<tr class="memitem:aecd8f6d7a986889c2f43a65a506bd42e"><td class="memItemLeft" align="right" valign="top"><a id="aecd8f6d7a986889c2f43a65a506bd42e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#aecd8f6d7a986889c2f43a65a506bd42e">MCLK_APBCMASK_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00006FFC)</td></tr>
<tr class="memdesc:aecd8f6d7a986889c2f43a65a506bd42e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBCMASK) MASK Register <br /></td></tr>
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<tr class="memitem:a7a00f8f628fc059b0ffcc36d2343c212"><td class="memItemLeft" align="right" valign="top"><a id="a7a00f8f628fc059b0ffcc36d2343c212"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a7a00f8f628fc059b0ffcc36d2343c212">MCLK_APBDMASK_OFFSET</a>&#160;&#160;&#160;0x20</td></tr>
<tr class="memdesc:a7a00f8f628fc059b0ffcc36d2343c212"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBDMASK offset) APBD Mask <br /></td></tr>
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<tr class="memitem:affe228d4015871770d9c2ac2d3e23349"><td class="memItemLeft" align="right" valign="top"><a id="affe228d4015871770d9c2ac2d3e23349"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#affe228d4015871770d9c2ac2d3e23349">MCLK_APBDMASK_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:affe228d4015871770d9c2ac2d3e23349"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBDMASK reset_value) APBD Mask <br /></td></tr>
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<tr class="memitem:ae97f2a7876a603ea76ee86f5e099c269"><td class="memItemLeft" align="right" valign="top"><a id="ae97f2a7876a603ea76ee86f5e099c269"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ae97f2a7876a603ea76ee86f5e099c269">MCLK_APBDMASK_SERCOM4_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ae97f2a7876a603ea76ee86f5e099c269"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBDMASK) SERCOM4 APB Clock Enable <br /></td></tr>
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<tr class="memitem:a677b71b3e76ec21d07249736a2346d63"><td class="memItemLeft" align="right" valign="top"><a id="a677b71b3e76ec21d07249736a2346d63"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBDMASK_SERCOM4</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#ae97f2a7876a603ea76ee86f5e099c269">MCLK_APBDMASK_SERCOM4_Pos</a>)</td></tr>
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<tr class="memitem:a0860f3d77409f156d996a776493af3a9"><td class="memItemLeft" align="right" valign="top"><a id="a0860f3d77409f156d996a776493af3a9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a0860f3d77409f156d996a776493af3a9">MCLK_APBDMASK_SERCOM5_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:a0860f3d77409f156d996a776493af3a9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBDMASK) SERCOM5 APB Clock Enable <br /></td></tr>
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<tr class="memitem:a1fe54d279cd69d48baff8dfd429f3169"><td class="memItemLeft" align="right" valign="top"><a id="a1fe54d279cd69d48baff8dfd429f3169"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBDMASK_SERCOM5</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a0860f3d77409f156d996a776493af3a9">MCLK_APBDMASK_SERCOM5_Pos</a>)</td></tr>
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<tr class="memitem:a1d520be70a0ed4fca667c58341d99620"><td class="memItemLeft" align="right" valign="top"><a id="a1d520be70a0ed4fca667c58341d99620"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a1d520be70a0ed4fca667c58341d99620">MCLK_APBDMASK_SERCOM6_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:a1d520be70a0ed4fca667c58341d99620"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBDMASK) SERCOM6 APB Clock Enable <br /></td></tr>
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<tr class="memitem:af8dac8466a60198c95110d9d6c492c96"><td class="memItemLeft" align="right" valign="top"><a id="af8dac8466a60198c95110d9d6c492c96"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBDMASK_SERCOM6</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a1d520be70a0ed4fca667c58341d99620">MCLK_APBDMASK_SERCOM6_Pos</a>)</td></tr>
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<tr class="memitem:a7d21e2207d86f11b75eb201011fee80e"><td class="memItemLeft" align="right" valign="top"><a id="a7d21e2207d86f11b75eb201011fee80e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a7d21e2207d86f11b75eb201011fee80e">MCLK_APBDMASK_SERCOM7_Pos</a>&#160;&#160;&#160;3</td></tr>
<tr class="memdesc:a7d21e2207d86f11b75eb201011fee80e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBDMASK) SERCOM7 APB Clock Enable <br /></td></tr>
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<tr class="memitem:a5e3aed5a0a3947b7484dddc871d991cf"><td class="memItemLeft" align="right" valign="top"><a id="a5e3aed5a0a3947b7484dddc871d991cf"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBDMASK_SERCOM7</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a7d21e2207d86f11b75eb201011fee80e">MCLK_APBDMASK_SERCOM7_Pos</a>)</td></tr>
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<tr class="memitem:a11586f55c55a915e5d5ed0f8986abf5d"><td class="memItemLeft" align="right" valign="top"><a id="a11586f55c55a915e5d5ed0f8986abf5d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a11586f55c55a915e5d5ed0f8986abf5d">MCLK_APBDMASK_TCC4_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:a11586f55c55a915e5d5ed0f8986abf5d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBDMASK) TCC4 APB Clock Enable <br /></td></tr>
<tr class="separator:a11586f55c55a915e5d5ed0f8986abf5d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a725ccd085cf438b2782342f9879ca49e"><td class="memItemLeft" align="right" valign="top"><a id="a725ccd085cf438b2782342f9879ca49e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBDMASK_TCC4</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a11586f55c55a915e5d5ed0f8986abf5d">MCLK_APBDMASK_TCC4_Pos</a>)</td></tr>
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<tr class="memitem:a5e5067b0ea3b8d950adeee60c7e201ef"><td class="memItemLeft" align="right" valign="top"><a id="a5e5067b0ea3b8d950adeee60c7e201ef"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a5e5067b0ea3b8d950adeee60c7e201ef">MCLK_APBDMASK_TC6_Pos</a>&#160;&#160;&#160;5</td></tr>
<tr class="memdesc:a5e5067b0ea3b8d950adeee60c7e201ef"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBDMASK) TC6 APB Clock Enable <br /></td></tr>
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<tr class="memitem:ab5415956c94b9ed6c3c7a1d492d39f68"><td class="memItemLeft" align="right" valign="top"><a id="ab5415956c94b9ed6c3c7a1d492d39f68"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBDMASK_TC6</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a5e5067b0ea3b8d950adeee60c7e201ef">MCLK_APBDMASK_TC6_Pos</a>)</td></tr>
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<tr class="memitem:a6ea8876f7f253392f0aa16da779c4d8b"><td class="memItemLeft" align="right" valign="top"><a id="a6ea8876f7f253392f0aa16da779c4d8b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a6ea8876f7f253392f0aa16da779c4d8b">MCLK_APBDMASK_TC7_Pos</a>&#160;&#160;&#160;6</td></tr>
<tr class="memdesc:a6ea8876f7f253392f0aa16da779c4d8b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBDMASK) TC7 APB Clock Enable <br /></td></tr>
<tr class="separator:a6ea8876f7f253392f0aa16da779c4d8b"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBDMASK_TC7</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a6ea8876f7f253392f0aa16da779c4d8b">MCLK_APBDMASK_TC7_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#aaa0f2c5eb74e0b65cc4338f29f2d69c4">MCLK_APBDMASK_ADC0_Pos</a>&#160;&#160;&#160;7</td></tr>
<tr class="memdesc:aaa0f2c5eb74e0b65cc4338f29f2d69c4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBDMASK) ADC0 APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBDMASK_ADC0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#aaa0f2c5eb74e0b65cc4338f29f2d69c4">MCLK_APBDMASK_ADC0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#aebfa8b7e9a270d649771d8f420fbc2e2">MCLK_APBDMASK_ADC1_Pos</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:aebfa8b7e9a270d649771d8f420fbc2e2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBDMASK) ADC1 APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBDMASK_ADC1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#aebfa8b7e9a270d649771d8f420fbc2e2">MCLK_APBDMASK_ADC1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a2d480786af05fb2fd66e9c85a987f855">MCLK_APBDMASK_DAC_Pos</a>&#160;&#160;&#160;9</td></tr>
<tr class="memdesc:a2d480786af05fb2fd66e9c85a987f855"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBDMASK) DAC APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBDMASK_DAC</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a2d480786af05fb2fd66e9c85a987f855">MCLK_APBDMASK_DAC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a7675f312a66e9078d114360abaca0d69">MCLK_APBDMASK_I2S_Pos</a>&#160;&#160;&#160;10</td></tr>
<tr class="memdesc:a7675f312a66e9078d114360abaca0d69"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBDMASK) I2S APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBDMASK_I2S</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#a7675f312a66e9078d114360abaca0d69">MCLK_APBDMASK_I2S_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ad4290756f92692a42c7bb1cfaf487d0f">MCLK_APBDMASK_PCC_Pos</a>&#160;&#160;&#160;11</td></tr>
<tr class="memdesc:ad4290756f92692a42c7bb1cfaf487d0f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBDMASK) PCC APB Clock Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MCLK_APBDMASK_PCC</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2mclk_8h.html#ad4290756f92692a42c7bb1cfaf487d0f">MCLK_APBDMASK_PCC_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ad7749cd8272a2d7fdb3faaeaa99e5268">MCLK_APBDMASK_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000FFF)</td></tr>
<tr class="memdesc:ad7749cd8272a2d7fdb3faaeaa99e5268"><td class="mdescLeft">&#160;</td><td class="mdescRight">(MCLK_APBDMASK) MASK Register <br /></td></tr>
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</table>
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Component description for MCLK. </p>
<p>Copyright (c) 2019 Microchip Technology Inc.</p>
<p>\asf_license_start </p>
<p class="definition">Definition in file <a class="el" href="component_2mclk_8h_source.html">mclk.h</a>.</p>
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<a href="component_2mclk_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_MCLK_COMPONENT_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_MCLK_COMPONENT_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160; </div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define MCLK_U2408</span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define REV_MCLK 0x100</span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160; </div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="comment">/* -------- MCLK_INTENCLR : (MCLK Offset: 0x01) (R/W 8) Interrupt Enable Clear -------- */</span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00044"></a><span class="lineno"><a class="line" href="unionMCLK__INTENCLR__Type.html"> 44</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00046"></a><span class="lineno"><a class="line" href="unionMCLK__INTENCLR__Type.html#abddaab7b9f92b5b1cb04b67cfe88fea0"> 46</a></span>&#160; uint8_t <a class="code" href="unionMCLK__INTENCLR__Type.html#abddaab7b9f92b5b1cb04b67cfe88fea0">CKRDY</a>:1; </div>
<div class="line"><a name="l00047"></a><span class="lineno"><a class="line" href="unionMCLK__INTENCLR__Type.html#aa5227c5ed05b23c335942f741366e301"> 47</a></span>&#160; uint8_t :7; </div>
<div class="line"><a name="l00048"></a><span class="lineno"><a class="line" href="unionMCLK__INTENCLR__Type.html#aab595b6e3a0df223143345c6e93f5201"> 48</a></span>&#160; } bit; </div>
<div class="line"><a name="l00049"></a><span class="lineno"><a class="line" href="unionMCLK__INTENCLR__Type.html#a5939ed3bab4d09f57b6f038ccb1f5135"> 49</a></span>&#160; uint8_t <a class="code" href="unionMCLK__INTENCLR__Type.html#a5939ed3bab4d09f57b6f038ccb1f5135">reg</a>; </div>
<div class="line"><a name="l00050"></a><span class="lineno"> 50</span>&#160;} <a class="code" href="unionMCLK__INTENCLR__Type.html">MCLK_INTENCLR_Type</a>;</div>
<div class="line"><a name="l00051"></a><span class="lineno"> 51</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00052"></a><span class="lineno"> 52</span>&#160; </div>
<div class="line"><a name="l00053"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a68637b3f1fed0ccd3ae371c53992e406"> 53</a></span>&#160;<span class="preprocessor">#define MCLK_INTENCLR_OFFSET 0x01 </span></div>
<div class="line"><a name="l00054"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ad173bb9dba9e1522a644dbde879829d4"> 54</a></span>&#160;<span class="preprocessor">#define MCLK_INTENCLR_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00056"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#aebdcc599e953e54697b2e40b5397496b"> 56</a></span>&#160;<span class="preprocessor">#define MCLK_INTENCLR_CKRDY_Pos 0 </span></div>
<div class="line"><a name="l00057"></a><span class="lineno"> 57</span>&#160;<span class="preprocessor">#define MCLK_INTENCLR_CKRDY (_U_(0x1) &lt;&lt; MCLK_INTENCLR_CKRDY_Pos)</span></div>
<div class="line"><a name="l00058"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a6389053110a48b3e28a1856e9379af38"> 58</a></span>&#160;<span class="preprocessor">#define MCLK_INTENCLR_MASK _U_(0x01) </span></div>
<div class="line"><a name="l00060"></a><span class="lineno"> 60</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- MCLK_INTENSET : (MCLK Offset: 0x02) (R/W 8) Interrupt Enable Set -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00061"></a><span class="lineno"> 61</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00062"></a><span class="lineno"><a class="line" href="unionMCLK__INTENSET__Type.html"> 62</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00063"></a><span class="lineno"> 63</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00064"></a><span class="lineno"><a class="line" href="unionMCLK__INTENSET__Type.html#ae1113ea8aedf9cde553498987efdfee2"> 64</a></span>&#160; uint8_t <a class="code" href="unionMCLK__INTENSET__Type.html#ae1113ea8aedf9cde553498987efdfee2">CKRDY</a>:1; </div>
<div class="line"><a name="l00065"></a><span class="lineno"><a class="line" href="unionMCLK__INTENSET__Type.html#a8f3429fd55d0112ebe8187ec804f11c9"> 65</a></span>&#160; uint8_t :7; </div>
<div class="line"><a name="l00066"></a><span class="lineno"><a class="line" href="unionMCLK__INTENSET__Type.html#a2d6812c5897bfe187c302aefd7892d04"> 66</a></span>&#160; } bit; </div>
<div class="line"><a name="l00067"></a><span class="lineno"><a class="line" href="unionMCLK__INTENSET__Type.html#ab61e3e21f4430faca14be73648d9dd5c"> 67</a></span>&#160; uint8_t <a class="code" href="unionMCLK__INTENSET__Type.html#ab61e3e21f4430faca14be73648d9dd5c">reg</a>; </div>
<div class="line"><a name="l00068"></a><span class="lineno"> 68</span>&#160;} <a class="code" href="unionMCLK__INTENSET__Type.html">MCLK_INTENSET_Type</a>;</div>
<div class="line"><a name="l00069"></a><span class="lineno"> 69</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00070"></a><span class="lineno"> 70</span>&#160; </div>
<div class="line"><a name="l00071"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ab0258927c23f68d0f403a91f68fdc1a8"> 71</a></span>&#160;<span class="preprocessor">#define MCLK_INTENSET_OFFSET 0x02 </span></div>
<div class="line"><a name="l00072"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a1a1d204e6b63e6fb14793fad6be480b3"> 72</a></span>&#160;<span class="preprocessor">#define MCLK_INTENSET_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00074"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ab9fefb6acd254d502c9ea81d010831ff"> 74</a></span>&#160;<span class="preprocessor">#define MCLK_INTENSET_CKRDY_Pos 0 </span></div>
<div class="line"><a name="l00075"></a><span class="lineno"> 75</span>&#160;<span class="preprocessor">#define MCLK_INTENSET_CKRDY (_U_(0x1) &lt;&lt; MCLK_INTENSET_CKRDY_Pos)</span></div>
<div class="line"><a name="l00076"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#aa5b62ad35b9bc2c164fea2457115e2b8"> 76</a></span>&#160;<span class="preprocessor">#define MCLK_INTENSET_MASK _U_(0x01) </span></div>
<div class="line"><a name="l00078"></a><span class="lineno"> 78</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- MCLK_INTFLAG : (MCLK Offset: 0x03) (R/W 8) Interrupt Flag Status and Clear -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00079"></a><span class="lineno"> 79</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00080"></a><span class="lineno"><a class="line" href="unionMCLK__INTFLAG__Type.html"> 80</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{ <span class="comment">// __I to avoid read-modify-write on write-to-clear register</span></div>
<div class="line"><a name="l00081"></a><span class="lineno"> 81</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00082"></a><span class="lineno"><a class="line" href="unionMCLK__INTFLAG__Type.html#a4f5c186d4989141c180e44f736a9ecaa"> 82</a></span>&#160; __I uint8_t <a class="code" href="unionMCLK__INTFLAG__Type.html#a4f5c186d4989141c180e44f736a9ecaa">CKRDY</a>:1; </div>
<div class="line"><a name="l00083"></a><span class="lineno"><a class="line" href="unionMCLK__INTFLAG__Type.html#ac6a137413e02c3d01180d58f0ad909c6"> 83</a></span>&#160; __I <a class="code" href="unionMCLK__INTFLAG__Type.html#ac6a137413e02c3d01180d58f0ad909c6">uint8_t</a> :7; </div>
<div class="line"><a name="l00084"></a><span class="lineno"><a class="line" href="unionMCLK__INTFLAG__Type.html#a420b4de84c22642c1349c28b3128c7a7"> 84</a></span>&#160; } bit; </div>
<div class="line"><a name="l00085"></a><span class="lineno"><a class="line" href="unionMCLK__INTFLAG__Type.html#abe84f1da089ed59eabaccdc5b2605b32"> 85</a></span>&#160; uint8_t <a class="code" href="unionMCLK__INTFLAG__Type.html#abe84f1da089ed59eabaccdc5b2605b32">reg</a>; </div>
<div class="line"><a name="l00086"></a><span class="lineno"> 86</span>&#160;} <a class="code" href="unionMCLK__INTFLAG__Type.html">MCLK_INTFLAG_Type</a>;</div>
<div class="line"><a name="l00087"></a><span class="lineno"> 87</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00088"></a><span class="lineno"> 88</span>&#160; </div>
<div class="line"><a name="l00089"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#af56eeb6ada43fe94d261d6d04336635b"> 89</a></span>&#160;<span class="preprocessor">#define MCLK_INTFLAG_OFFSET 0x03 </span></div>
<div class="line"><a name="l00090"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a8e5308a9ba8280b0e4f121e9d65a36a4"> 90</a></span>&#160;<span class="preprocessor">#define MCLK_INTFLAG_RESETVALUE _U_(0x01) </span></div>
<div class="line"><a name="l00092"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#abef328de34a9da476fa9a626643999e5"> 92</a></span>&#160;<span class="preprocessor">#define MCLK_INTFLAG_CKRDY_Pos 0 </span></div>
<div class="line"><a name="l00093"></a><span class="lineno"> 93</span>&#160;<span class="preprocessor">#define MCLK_INTFLAG_CKRDY (_U_(0x1) &lt;&lt; MCLK_INTFLAG_CKRDY_Pos)</span></div>
<div class="line"><a name="l00094"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a4d2f239e68ff5fba4b25397d91bed74a"> 94</a></span>&#160;<span class="preprocessor">#define MCLK_INTFLAG_MASK _U_(0x01) </span></div>
<div class="line"><a name="l00096"></a><span class="lineno"> 96</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- MCLK_HSDIV : (MCLK Offset: 0x04) (R/ 8) HS Clock Division -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00097"></a><span class="lineno"> 97</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00098"></a><span class="lineno"><a class="line" href="unionMCLK__HSDIV__Type.html"> 98</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00099"></a><span class="lineno"> 99</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00100"></a><span class="lineno"><a class="line" href="unionMCLK__HSDIV__Type.html#aab2b23dd14e64b598716fd7cf7f59c20"> 100</a></span>&#160; uint8_t <a class="code" href="unionMCLK__HSDIV__Type.html#aab2b23dd14e64b598716fd7cf7f59c20">DIV</a>:8; </div>
<div class="line"><a name="l00101"></a><span class="lineno"><a class="line" href="unionMCLK__HSDIV__Type.html#a8fe1d8291c72991ae60936c30492f5e8"> 101</a></span>&#160; } bit; </div>
<div class="line"><a name="l00102"></a><span class="lineno"><a class="line" href="unionMCLK__HSDIV__Type.html#a53e0548fea18eab9caede9be0e531c6e"> 102</a></span>&#160; uint8_t <a class="code" href="unionMCLK__HSDIV__Type.html#a53e0548fea18eab9caede9be0e531c6e">reg</a>; </div>
<div class="line"><a name="l00103"></a><span class="lineno"> 103</span>&#160;} <a class="code" href="unionMCLK__HSDIV__Type.html">MCLK_HSDIV_Type</a>;</div>
<div class="line"><a name="l00104"></a><span class="lineno"> 104</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00105"></a><span class="lineno"> 105</span>&#160; </div>
<div class="line"><a name="l00106"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ae0971c09918d1056399fd86900aa4890"> 106</a></span>&#160;<span class="preprocessor">#define MCLK_HSDIV_OFFSET 0x04 </span></div>
<div class="line"><a name="l00107"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ae6d3e536fec3cc26aaa6cd78c17d497b"> 107</a></span>&#160;<span class="preprocessor">#define MCLK_HSDIV_RESETVALUE _U_(0x01) </span></div>
<div class="line"><a name="l00109"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a95894d35a451f22d21907122d7459c7c"> 109</a></span>&#160;<span class="preprocessor">#define MCLK_HSDIV_DIV_Pos 0 </span></div>
<div class="line"><a name="l00110"></a><span class="lineno"> 110</span>&#160;<span class="preprocessor">#define MCLK_HSDIV_DIV_Msk (_U_(0xFF) &lt;&lt; MCLK_HSDIV_DIV_Pos)</span></div>
<div class="line"><a name="l00111"></a><span class="lineno"> 111</span>&#160;<span class="preprocessor">#define MCLK_HSDIV_DIV(value) (MCLK_HSDIV_DIV_Msk &amp; ((value) &lt;&lt; MCLK_HSDIV_DIV_Pos))</span></div>
<div class="line"><a name="l00112"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a119ab5a20e98782d805cdf5c4501e712"> 112</a></span>&#160;<span class="preprocessor">#define MCLK_HSDIV_DIV_DIV1_Val _U_(0x1) </span></div>
<div class="line"><a name="l00113"></a><span class="lineno"> 113</span>&#160;<span class="preprocessor">#define MCLK_HSDIV_DIV_DIV1 (MCLK_HSDIV_DIV_DIV1_Val &lt;&lt; MCLK_HSDIV_DIV_Pos)</span></div>
<div class="line"><a name="l00114"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#aaacdcc773f6047747e0c5be7e2f8e617"> 114</a></span>&#160;<span class="preprocessor">#define MCLK_HSDIV_MASK _U_(0xFF) </span></div>
<div class="line"><a name="l00116"></a><span class="lineno"> 116</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- MCLK_CPUDIV : (MCLK Offset: 0x05) (R/W 8) CPU Clock Division -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00117"></a><span class="lineno"> 117</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00118"></a><span class="lineno"><a class="line" href="unionMCLK__CPUDIV__Type.html"> 118</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00119"></a><span class="lineno"> 119</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00120"></a><span class="lineno"><a class="line" href="unionMCLK__CPUDIV__Type.html#a8dbfb27cee1d9e75f17a15cb2ae67dc5"> 120</a></span>&#160; uint8_t <a class="code" href="unionMCLK__CPUDIV__Type.html#a8dbfb27cee1d9e75f17a15cb2ae67dc5">DIV</a>:8; </div>
<div class="line"><a name="l00121"></a><span class="lineno"><a class="line" href="unionMCLK__CPUDIV__Type.html#a2da81d3fd46e59527fa9b36bd39fef4c"> 121</a></span>&#160; } bit; </div>
<div class="line"><a name="l00122"></a><span class="lineno"><a class="line" href="unionMCLK__CPUDIV__Type.html#a5cb57c381a27ef87725e4b0047be78c5"> 122</a></span>&#160; uint8_t <a class="code" href="unionMCLK__CPUDIV__Type.html#a5cb57c381a27ef87725e4b0047be78c5">reg</a>; </div>
<div class="line"><a name="l00123"></a><span class="lineno"> 123</span>&#160;} <a class="code" href="unionMCLK__CPUDIV__Type.html">MCLK_CPUDIV_Type</a>;</div>
<div class="line"><a name="l00124"></a><span class="lineno"> 124</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00125"></a><span class="lineno"> 125</span>&#160; </div>
<div class="line"><a name="l00126"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a6b856556e549869e608b1c9d9ca335ff"> 126</a></span>&#160;<span class="preprocessor">#define MCLK_CPUDIV_OFFSET 0x05 </span></div>
<div class="line"><a name="l00127"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ad5b446415ed860f94d2368945fa4b698"> 127</a></span>&#160;<span class="preprocessor">#define MCLK_CPUDIV_RESETVALUE _U_(0x01) </span></div>
<div class="line"><a name="l00129"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a4e0248a576cb2763bf8271787d56e3d6"> 129</a></span>&#160;<span class="preprocessor">#define MCLK_CPUDIV_DIV_Pos 0 </span></div>
<div class="line"><a name="l00130"></a><span class="lineno"> 130</span>&#160;<span class="preprocessor">#define MCLK_CPUDIV_DIV_Msk (_U_(0xFF) &lt;&lt; MCLK_CPUDIV_DIV_Pos)</span></div>
<div class="line"><a name="l00131"></a><span class="lineno"> 131</span>&#160;<span class="preprocessor">#define MCLK_CPUDIV_DIV(value) (MCLK_CPUDIV_DIV_Msk &amp; ((value) &lt;&lt; MCLK_CPUDIV_DIV_Pos))</span></div>
<div class="line"><a name="l00132"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ae007ace127ccf52e63918793f78229b6"> 132</a></span>&#160;<span class="preprocessor">#define MCLK_CPUDIV_DIV_DIV1_Val _U_(0x1) </span></div>
<div class="line"><a name="l00133"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a86452934ee34c2237b4cb0a296bc0734"> 133</a></span>&#160;<span class="preprocessor">#define MCLK_CPUDIV_DIV_DIV2_Val _U_(0x2) </span></div>
<div class="line"><a name="l00134"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a0d458738f455dcb54c5aa2d0ffcfa616"> 134</a></span>&#160;<span class="preprocessor">#define MCLK_CPUDIV_DIV_DIV4_Val _U_(0x4) </span></div>
<div class="line"><a name="l00135"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a67de4295c7d075c089f0c0280f95002b"> 135</a></span>&#160;<span class="preprocessor">#define MCLK_CPUDIV_DIV_DIV8_Val _U_(0x8) </span></div>
<div class="line"><a name="l00136"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ae681abf45271d52e20032f75fde3e7a4"> 136</a></span>&#160;<span class="preprocessor">#define MCLK_CPUDIV_DIV_DIV16_Val _U_(0x10) </span></div>
<div class="line"><a name="l00137"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a19e3476ae76abd38b0eac2f62dd7be46"> 137</a></span>&#160;<span class="preprocessor">#define MCLK_CPUDIV_DIV_DIV32_Val _U_(0x20) </span></div>
<div class="line"><a name="l00138"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#aa91c616d0c486e08497d547619896a98"> 138</a></span>&#160;<span class="preprocessor">#define MCLK_CPUDIV_DIV_DIV64_Val _U_(0x40) </span></div>
<div class="line"><a name="l00139"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a4cfc1f32942c736f236075c22f1a4f81"> 139</a></span>&#160;<span class="preprocessor">#define MCLK_CPUDIV_DIV_DIV128_Val _U_(0x80) </span></div>
<div class="line"><a name="l00140"></a><span class="lineno"> 140</span>&#160;<span class="preprocessor">#define MCLK_CPUDIV_DIV_DIV1 (MCLK_CPUDIV_DIV_DIV1_Val &lt;&lt; MCLK_CPUDIV_DIV_Pos)</span></div>
<div class="line"><a name="l00141"></a><span class="lineno"> 141</span>&#160;<span class="preprocessor">#define MCLK_CPUDIV_DIV_DIV2 (MCLK_CPUDIV_DIV_DIV2_Val &lt;&lt; MCLK_CPUDIV_DIV_Pos)</span></div>
<div class="line"><a name="l00142"></a><span class="lineno"> 142</span>&#160;<span class="preprocessor">#define MCLK_CPUDIV_DIV_DIV4 (MCLK_CPUDIV_DIV_DIV4_Val &lt;&lt; MCLK_CPUDIV_DIV_Pos)</span></div>
<div class="line"><a name="l00143"></a><span class="lineno"> 143</span>&#160;<span class="preprocessor">#define MCLK_CPUDIV_DIV_DIV8 (MCLK_CPUDIV_DIV_DIV8_Val &lt;&lt; MCLK_CPUDIV_DIV_Pos)</span></div>
<div class="line"><a name="l00144"></a><span class="lineno"> 144</span>&#160;<span class="preprocessor">#define MCLK_CPUDIV_DIV_DIV16 (MCLK_CPUDIV_DIV_DIV16_Val &lt;&lt; MCLK_CPUDIV_DIV_Pos)</span></div>
<div class="line"><a name="l00145"></a><span class="lineno"> 145</span>&#160;<span class="preprocessor">#define MCLK_CPUDIV_DIV_DIV32 (MCLK_CPUDIV_DIV_DIV32_Val &lt;&lt; MCLK_CPUDIV_DIV_Pos)</span></div>
<div class="line"><a name="l00146"></a><span class="lineno"> 146</span>&#160;<span class="preprocessor">#define MCLK_CPUDIV_DIV_DIV64 (MCLK_CPUDIV_DIV_DIV64_Val &lt;&lt; MCLK_CPUDIV_DIV_Pos)</span></div>
<div class="line"><a name="l00147"></a><span class="lineno"> 147</span>&#160;<span class="preprocessor">#define MCLK_CPUDIV_DIV_DIV128 (MCLK_CPUDIV_DIV_DIV128_Val &lt;&lt; MCLK_CPUDIV_DIV_Pos)</span></div>
<div class="line"><a name="l00148"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ab671f30e14e4976663447bcdf727ea01"> 148</a></span>&#160;<span class="preprocessor">#define MCLK_CPUDIV_MASK _U_(0xFF) </span></div>
<div class="line"><a name="l00150"></a><span class="lineno"> 150</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- MCLK_AHBMASK : (MCLK Offset: 0x10) (R/W 32) AHB Mask -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00151"></a><span class="lineno"> 151</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00152"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html"> 152</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00153"></a><span class="lineno"> 153</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00154"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#a87cc1023b4402c952c344faadaaa2ee0"> 154</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#a87cc1023b4402c952c344faadaaa2ee0">HPB0_</a>:1; </div>
<div class="line"><a name="l00155"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#a8ddd504fd2451971545bb3838c02e9b4"> 155</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#a8ddd504fd2451971545bb3838c02e9b4">HPB1_</a>:1; </div>
<div class="line"><a name="l00156"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#a6ba501218dba4d741bf7c74331231a4d"> 156</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#a6ba501218dba4d741bf7c74331231a4d">HPB2_</a>:1; </div>
<div class="line"><a name="l00157"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#aebab50a1fbc422411ef5481650532a4d"> 157</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#aebab50a1fbc422411ef5481650532a4d">HPB3_</a>:1; </div>
<div class="line"><a name="l00158"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#aabff4279a7844513c82cb20d79103733"> 158</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#aabff4279a7844513c82cb20d79103733">DSU_</a>:1; </div>
<div class="line"><a name="l00159"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#a9c6223daa319f557015aa138d58d1e7b"> 159</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#a9c6223daa319f557015aa138d58d1e7b">HMATRIX_</a>:1; </div>
<div class="line"><a name="l00160"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#a704c3ce3dd3205d0bb00c6c2884d7b21"> 160</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#a704c3ce3dd3205d0bb00c6c2884d7b21">NVMCTRL_</a>:1; </div>
<div class="line"><a name="l00161"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#a8f9758f1796cb4f7d549ccfe05a5feed"> 161</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#a8f9758f1796cb4f7d549ccfe05a5feed">HSRAM_</a>:1; </div>
<div class="line"><a name="l00162"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#a2ad0cb00d8d7da0e818772f43ceb8b2b"> 162</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#a2ad0cb00d8d7da0e818772f43ceb8b2b">CMCC_</a>:1; </div>
<div class="line"><a name="l00163"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#a8036cc13b7b2ed340e022fbb66c87055"> 163</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#a8036cc13b7b2ed340e022fbb66c87055">DMAC_</a>:1; </div>
<div class="line"><a name="l00164"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#a75fcdff02d0ae11b95acf2b5b64c65d3"> 164</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#a75fcdff02d0ae11b95acf2b5b64c65d3">USB_</a>:1; </div>
<div class="line"><a name="l00165"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#acc9217f9fcfecbca339dc1989e3b7f6c"> 165</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#acc9217f9fcfecbca339dc1989e3b7f6c">BKUPRAM_</a>:1; </div>
<div class="line"><a name="l00166"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#a758fc8a43015918366797a8be3e7d36d"> 166</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#a758fc8a43015918366797a8be3e7d36d">PAC_</a>:1; </div>
<div class="line"><a name="l00167"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#ac6a6b46eb3ac9aa05df86b656b9ed838"> 167</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#ac6a6b46eb3ac9aa05df86b656b9ed838">QSPI_</a>:1; </div>
<div class="line"><a name="l00168"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#a39b8f22370cc53f9ed7b32bbc8660681"> 168</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#a39b8f22370cc53f9ed7b32bbc8660681">GMAC_</a>:1; </div>
<div class="line"><a name="l00169"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#a2fed3a54166a0535e294263243ce076d"> 169</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#a2fed3a54166a0535e294263243ce076d">SDHC0_</a>:1; </div>
<div class="line"><a name="l00170"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#a4f745e7bf36d4af239ecbbe44e9cac8e"> 170</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#a4f745e7bf36d4af239ecbbe44e9cac8e">SDHC1_</a>:1; </div>
<div class="line"><a name="l00171"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#aa9661a9a60bd91a616c5367502bb4dee"> 171</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#aa9661a9a60bd91a616c5367502bb4dee">CAN0_</a>:1; </div>
<div class="line"><a name="l00172"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#a536c97e72d5448573a3d2289ca5d09d7"> 172</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#a536c97e72d5448573a3d2289ca5d09d7">CAN1_</a>:1; </div>
<div class="line"><a name="l00173"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#ac0e6385fd889b2c8a3ca8aee32e8e40f"> 173</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#ac0e6385fd889b2c8a3ca8aee32e8e40f">ICM_</a>:1; </div>
<div class="line"><a name="l00174"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#a527131ba77ed7958dad0837f7d9e662e"> 174</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#a527131ba77ed7958dad0837f7d9e662e">PUKCC_</a>:1; </div>
<div class="line"><a name="l00175"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#a54630d796a43eb434e78bc1d5580aa67"> 175</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#a54630d796a43eb434e78bc1d5580aa67">QSPI_2X_</a>:1; </div>
<div class="line"><a name="l00176"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#a1d45d805e1429b2852111c044d8e7853"> 176</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#a1d45d805e1429b2852111c044d8e7853">NVMCTRL_SMEEPROM_</a>:1; </div>
<div class="line"><a name="l00177"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#a5bd04ab7f81e23a37e7a32ace41bca67"> 177</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#a5bd04ab7f81e23a37e7a32ace41bca67">NVMCTRL_CACHE_</a>:1; </div>
<div class="line"><a name="l00178"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#ae1c9f67ceb1408d31351be5d741ab2df"> 178</a></span>&#160; uint32_t :8; </div>
<div class="line"><a name="l00179"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#ac8c472caeae88578b088afccc375cb2d"> 179</a></span>&#160; } bit; </div>
<div class="line"><a name="l00180"></a><span class="lineno"><a class="line" href="unionMCLK__AHBMASK__Type.html#a39c4342be6e7152be6f1d04582e39e17"> 180</a></span>&#160; uint32_t <a class="code" href="unionMCLK__AHBMASK__Type.html#a39c4342be6e7152be6f1d04582e39e17">reg</a>; </div>
<div class="line"><a name="l00181"></a><span class="lineno"> 181</span>&#160;} <a class="code" href="unionMCLK__AHBMASK__Type.html">MCLK_AHBMASK_Type</a>;</div>
<div class="line"><a name="l00182"></a><span class="lineno"> 182</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00183"></a><span class="lineno"> 183</span>&#160; </div>
<div class="line"><a name="l00184"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#af60da772fd92f5ac2d24529a4edd5bcf"> 184</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_OFFSET 0x10 </span></div>
<div class="line"><a name="l00185"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a7416e817fc3532e446cfae94a314c2c1"> 185</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_RESETVALUE _U_(0x00FFFFFF) </span></div>
<div class="line"><a name="l00187"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#aab73df1970914c738e069aa3f44343f7"> 187</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_HPB0_Pos 0 </span></div>
<div class="line"><a name="l00188"></a><span class="lineno"> 188</span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_HPB0 (_U_(0x1) &lt;&lt; MCLK_AHBMASK_HPB0_Pos)</span></div>
<div class="line"><a name="l00189"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ad500245362fc27f25dbd1cd872403db5"> 189</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_HPB1_Pos 1 </span></div>
<div class="line"><a name="l00190"></a><span class="lineno"> 190</span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_HPB1 (_U_(0x1) &lt;&lt; MCLK_AHBMASK_HPB1_Pos)</span></div>
<div class="line"><a name="l00191"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ad85e221b80ccea1b2fb40ccd57361831"> 191</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_HPB2_Pos 2 </span></div>
<div class="line"><a name="l00192"></a><span class="lineno"> 192</span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_HPB2 (_U_(0x1) &lt;&lt; MCLK_AHBMASK_HPB2_Pos)</span></div>
<div class="line"><a name="l00193"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a0fde493e6b6f196f2f5097f561c77fa3"> 193</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_HPB3_Pos 3 </span></div>
<div class="line"><a name="l00194"></a><span class="lineno"> 194</span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_HPB3 (_U_(0x1) &lt;&lt; MCLK_AHBMASK_HPB3_Pos)</span></div>
<div class="line"><a name="l00195"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#af25c239a7914145d262614e4cea537b3"> 195</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_DSU_Pos 4 </span></div>
<div class="line"><a name="l00196"></a><span class="lineno"> 196</span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_DSU (_U_(0x1) &lt;&lt; MCLK_AHBMASK_DSU_Pos)</span></div>
<div class="line"><a name="l00197"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a0c382b9b2b318a564cf9769941fa7373"> 197</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_HMATRIX_Pos 5 </span></div>
<div class="line"><a name="l00198"></a><span class="lineno"> 198</span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_HMATRIX (_U_(0x1) &lt;&lt; MCLK_AHBMASK_HMATRIX_Pos)</span></div>
<div class="line"><a name="l00199"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a81becb828c915d5aac7686148213cb7a"> 199</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_NVMCTRL_Pos 6 </span></div>
<div class="line"><a name="l00200"></a><span class="lineno"> 200</span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_NVMCTRL (_U_(0x1) &lt;&lt; MCLK_AHBMASK_NVMCTRL_Pos)</span></div>
<div class="line"><a name="l00201"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a3a610cdaf2a0676797625dee122829f3"> 201</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_HSRAM_Pos 7 </span></div>
<div class="line"><a name="l00202"></a><span class="lineno"> 202</span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_HSRAM (_U_(0x1) &lt;&lt; MCLK_AHBMASK_HSRAM_Pos)</span></div>
<div class="line"><a name="l00203"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a5114ee4fb624a1109ca8a35533050c91"> 203</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_CMCC_Pos 8 </span></div>
<div class="line"><a name="l00204"></a><span class="lineno"> 204</span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_CMCC (_U_(0x1) &lt;&lt; MCLK_AHBMASK_CMCC_Pos)</span></div>
<div class="line"><a name="l00205"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a9777b9f4e5c6f15597d5d0f3c284a638"> 205</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_DMAC_Pos 9 </span></div>
<div class="line"><a name="l00206"></a><span class="lineno"> 206</span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_DMAC (_U_(0x1) &lt;&lt; MCLK_AHBMASK_DMAC_Pos)</span></div>
<div class="line"><a name="l00207"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a58c4b1c4ee77bdcf758d0e74ec5b5abc"> 207</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_USB_Pos 10 </span></div>
<div class="line"><a name="l00208"></a><span class="lineno"> 208</span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_USB (_U_(0x1) &lt;&lt; MCLK_AHBMASK_USB_Pos)</span></div>
<div class="line"><a name="l00209"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a51f341be2cd16552a79406a3df9fad31"> 209</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_BKUPRAM_Pos 11 </span></div>
<div class="line"><a name="l00210"></a><span class="lineno"> 210</span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_BKUPRAM (_U_(0x1) &lt;&lt; MCLK_AHBMASK_BKUPRAM_Pos)</span></div>
<div class="line"><a name="l00211"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a25f30a1fcd43fb869b5594496df8d1f1"> 211</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_PAC_Pos 12 </span></div>
<div class="line"><a name="l00212"></a><span class="lineno"> 212</span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_PAC (_U_(0x1) &lt;&lt; MCLK_AHBMASK_PAC_Pos)</span></div>
<div class="line"><a name="l00213"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#aadc7e0a4d4a8f204ff028e09185a6dbc"> 213</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_QSPI_Pos 13 </span></div>
<div class="line"><a name="l00214"></a><span class="lineno"> 214</span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_QSPI (_U_(0x1) &lt;&lt; MCLK_AHBMASK_QSPI_Pos)</span></div>
<div class="line"><a name="l00215"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a90a6e6c304da25718d5535909d7765f9"> 215</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_GMAC_Pos 14 </span></div>
<div class="line"><a name="l00216"></a><span class="lineno"> 216</span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_GMAC (_U_(0x1) &lt;&lt; MCLK_AHBMASK_GMAC_Pos)</span></div>
<div class="line"><a name="l00217"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a075eb14056d8b7fedd243795408bf542"> 217</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_SDHC0_Pos 15 </span></div>
<div class="line"><a name="l00218"></a><span class="lineno"> 218</span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_SDHC0 (_U_(0x1) &lt;&lt; MCLK_AHBMASK_SDHC0_Pos)</span></div>
<div class="line"><a name="l00219"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a33f14b34d3d4622e115b84d46bb9207a"> 219</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_SDHC1_Pos 16 </span></div>
<div class="line"><a name="l00220"></a><span class="lineno"> 220</span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_SDHC1 (_U_(0x1) &lt;&lt; MCLK_AHBMASK_SDHC1_Pos)</span></div>
<div class="line"><a name="l00221"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ad5d5cfafc70ebe598b651e3496fcd4a4"> 221</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_CAN0_Pos 17 </span></div>
<div class="line"><a name="l00222"></a><span class="lineno"> 222</span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_CAN0 (_U_(0x1) &lt;&lt; MCLK_AHBMASK_CAN0_Pos)</span></div>
<div class="line"><a name="l00223"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a361fe28b52db9c858de0926bc72b5985"> 223</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_CAN1_Pos 18 </span></div>
<div class="line"><a name="l00224"></a><span class="lineno"> 224</span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_CAN1 (_U_(0x1) &lt;&lt; MCLK_AHBMASK_CAN1_Pos)</span></div>
<div class="line"><a name="l00225"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a96dc631a8955ba6a803b4a7e0f45456e"> 225</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_ICM_Pos 19 </span></div>
<div class="line"><a name="l00226"></a><span class="lineno"> 226</span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_ICM (_U_(0x1) &lt;&lt; MCLK_AHBMASK_ICM_Pos)</span></div>
<div class="line"><a name="l00227"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#aced4a82f31a9b059bc0ce0372302cfc9"> 227</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_PUKCC_Pos 20 </span></div>
<div class="line"><a name="l00228"></a><span class="lineno"> 228</span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_PUKCC (_U_(0x1) &lt;&lt; MCLK_AHBMASK_PUKCC_Pos)</span></div>
<div class="line"><a name="l00229"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#addc4877eff69e76ab70162f511744c0b"> 229</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_QSPI_2X_Pos 21 </span></div>
<div class="line"><a name="l00230"></a><span class="lineno"> 230</span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_QSPI_2X (_U_(0x1) &lt;&lt; MCLK_AHBMASK_QSPI_2X_Pos)</span></div>
<div class="line"><a name="l00231"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a893beae0d8a30df0cac8ac289280926a"> 231</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_NVMCTRL_SMEEPROM_Pos 22 </span></div>
<div class="line"><a name="l00232"></a><span class="lineno"> 232</span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_NVMCTRL_SMEEPROM (_U_(0x1) &lt;&lt; MCLK_AHBMASK_NVMCTRL_SMEEPROM_Pos)</span></div>
<div class="line"><a name="l00233"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a433eb3bd2eac386d68dadbeb476c412b"> 233</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_NVMCTRL_CACHE_Pos 23 </span></div>
<div class="line"><a name="l00234"></a><span class="lineno"> 234</span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_NVMCTRL_CACHE (_U_(0x1) &lt;&lt; MCLK_AHBMASK_NVMCTRL_CACHE_Pos)</span></div>
<div class="line"><a name="l00235"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a4ff9567101bdb1ceefebec27f64d817f"> 235</a></span>&#160;<span class="preprocessor">#define MCLK_AHBMASK_MASK _U_(0x00FFFFFF) </span></div>
<div class="line"><a name="l00237"></a><span class="lineno"> 237</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- MCLK_APBAMASK : (MCLK Offset: 0x14) (R/W 32) APBA Mask -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00238"></a><span class="lineno"> 238</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00239"></a><span class="lineno"><a class="line" href="unionMCLK__APBAMASK__Type.html"> 239</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00240"></a><span class="lineno"> 240</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00241"></a><span class="lineno"><a class="line" href="unionMCLK__APBAMASK__Type.html#ab5fee2f33d14c0976b3602ec8021adda"> 241</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBAMASK__Type.html#ab5fee2f33d14c0976b3602ec8021adda">PAC_</a>:1; </div>
<div class="line"><a name="l00242"></a><span class="lineno"><a class="line" href="unionMCLK__APBAMASK__Type.html#a1d56a3bc0bbd729249146a61d9a94be4"> 242</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBAMASK__Type.html#a1d56a3bc0bbd729249146a61d9a94be4">PM_</a>:1; </div>
<div class="line"><a name="l00243"></a><span class="lineno"><a class="line" href="unionMCLK__APBAMASK__Type.html#ab1f2baed5b9ebd2303153ebcbe697d66"> 243</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBAMASK__Type.html#ab1f2baed5b9ebd2303153ebcbe697d66">MCLK_</a>:1; </div>
<div class="line"><a name="l00244"></a><span class="lineno"><a class="line" href="unionMCLK__APBAMASK__Type.html#a685f946a60648f2d7bb697ed87d4015e"> 244</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBAMASK__Type.html#a685f946a60648f2d7bb697ed87d4015e">RSTC_</a>:1; </div>
<div class="line"><a name="l00245"></a><span class="lineno"><a class="line" href="unionMCLK__APBAMASK__Type.html#a1ea98bb1063611d628335d460de03389"> 245</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBAMASK__Type.html#a1ea98bb1063611d628335d460de03389">OSCCTRL_</a>:1; </div>
<div class="line"><a name="l00246"></a><span class="lineno"><a class="line" href="unionMCLK__APBAMASK__Type.html#acf8299f01ce6484506ad9b8da1c8766a"> 246</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBAMASK__Type.html#acf8299f01ce6484506ad9b8da1c8766a">OSC32KCTRL_</a>:1; </div>
<div class="line"><a name="l00247"></a><span class="lineno"><a class="line" href="unionMCLK__APBAMASK__Type.html#a43fec58267a30eba4e10607ccd81a4e5"> 247</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBAMASK__Type.html#a43fec58267a30eba4e10607ccd81a4e5">SUPC_</a>:1; </div>
<div class="line"><a name="l00248"></a><span class="lineno"><a class="line" href="unionMCLK__APBAMASK__Type.html#a7f548b39016b325d747201182b25e092"> 248</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBAMASK__Type.html#a7f548b39016b325d747201182b25e092">GCLK_</a>:1; </div>
<div class="line"><a name="l00249"></a><span class="lineno"><a class="line" href="unionMCLK__APBAMASK__Type.html#a5e5c131efd3f523957200a120d22169e"> 249</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBAMASK__Type.html#a5e5c131efd3f523957200a120d22169e">WDT_</a>:1; </div>
<div class="line"><a name="l00250"></a><span class="lineno"><a class="line" href="unionMCLK__APBAMASK__Type.html#a792b4cfa06ce0d249329e7e367b73fd7"> 250</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBAMASK__Type.html#a792b4cfa06ce0d249329e7e367b73fd7">RTC_</a>:1; </div>
<div class="line"><a name="l00251"></a><span class="lineno"><a class="line" href="unionMCLK__APBAMASK__Type.html#aad44e3cddd50f944d023faf148ea13fb"> 251</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBAMASK__Type.html#aad44e3cddd50f944d023faf148ea13fb">EIC_</a>:1; </div>
<div class="line"><a name="l00252"></a><span class="lineno"><a class="line" href="unionMCLK__APBAMASK__Type.html#afc2fdf74f23d7546f7c7001e8ef02e0e"> 252</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBAMASK__Type.html#afc2fdf74f23d7546f7c7001e8ef02e0e">FREQM_</a>:1; </div>
<div class="line"><a name="l00253"></a><span class="lineno"><a class="line" href="unionMCLK__APBAMASK__Type.html#adfb207174d5176e76596e02d9a3ce2e7"> 253</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBAMASK__Type.html#adfb207174d5176e76596e02d9a3ce2e7">SERCOM0_</a>:1; </div>
<div class="line"><a name="l00254"></a><span class="lineno"><a class="line" href="unionMCLK__APBAMASK__Type.html#af1d343fb9da07c36bb5158338ec7afa5"> 254</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBAMASK__Type.html#af1d343fb9da07c36bb5158338ec7afa5">SERCOM1_</a>:1; </div>
<div class="line"><a name="l00255"></a><span class="lineno"><a class="line" href="unionMCLK__APBAMASK__Type.html#a794b0d179d846b74f07af2c74d41297e"> 255</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBAMASK__Type.html#a794b0d179d846b74f07af2c74d41297e">TC0_</a>:1; </div>
<div class="line"><a name="l00256"></a><span class="lineno"><a class="line" href="unionMCLK__APBAMASK__Type.html#a956a0cfda2b3326913bb20fcc2a569cb"> 256</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBAMASK__Type.html#a956a0cfda2b3326913bb20fcc2a569cb">TC1_</a>:1; </div>
<div class="line"><a name="l00257"></a><span class="lineno"><a class="line" href="unionMCLK__APBAMASK__Type.html#a4c83e8e51a4ef4a5f70070d6927acce9"> 257</a></span>&#160; uint32_t :16; </div>
<div class="line"><a name="l00258"></a><span class="lineno"><a class="line" href="unionMCLK__APBAMASK__Type.html#a62d79e1b5cf5fcce80ff12e57ce95b70"> 258</a></span>&#160; } bit; </div>
<div class="line"><a name="l00259"></a><span class="lineno"><a class="line" href="unionMCLK__APBAMASK__Type.html#ae53745b3c32791cde22bc2c7a2d2abbd"> 259</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBAMASK__Type.html#ae53745b3c32791cde22bc2c7a2d2abbd">reg</a>; </div>
<div class="line"><a name="l00260"></a><span class="lineno"> 260</span>&#160;} <a class="code" href="unionMCLK__APBAMASK__Type.html">MCLK_APBAMASK_Type</a>;</div>
<div class="line"><a name="l00261"></a><span class="lineno"> 261</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00262"></a><span class="lineno"> 262</span>&#160; </div>
<div class="line"><a name="l00263"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a0c6c90fc226352932e5d81fb51efebc0"> 263</a></span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_OFFSET 0x14 </span></div>
<div class="line"><a name="l00264"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a3d96d2b490df3f3164791e72baeabe60"> 264</a></span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_RESETVALUE _U_(0x000007FF) </span></div>
<div class="line"><a name="l00266"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a961dc42788c4447477d905b3fa27c039"> 266</a></span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_PAC_Pos 0 </span></div>
<div class="line"><a name="l00267"></a><span class="lineno"> 267</span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_PAC (_U_(0x1) &lt;&lt; MCLK_APBAMASK_PAC_Pos)</span></div>
<div class="line"><a name="l00268"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a04293b17854c4a2862117cb1e92e90d9"> 268</a></span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_PM_Pos 1 </span></div>
<div class="line"><a name="l00269"></a><span class="lineno"> 269</span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_PM (_U_(0x1) &lt;&lt; MCLK_APBAMASK_PM_Pos)</span></div>
<div class="line"><a name="l00270"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a0db8d768734ebf5b9b0c4b32fff4ad02"> 270</a></span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_MCLK_Pos 2 </span></div>
<div class="line"><a name="l00271"></a><span class="lineno"> 271</span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_MCLK (_U_(0x1) &lt;&lt; MCLK_APBAMASK_MCLK_Pos)</span></div>
<div class="line"><a name="l00272"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a23015f90db0192052e8d0a971684fa6e"> 272</a></span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_RSTC_Pos 3 </span></div>
<div class="line"><a name="l00273"></a><span class="lineno"> 273</span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_RSTC (_U_(0x1) &lt;&lt; MCLK_APBAMASK_RSTC_Pos)</span></div>
<div class="line"><a name="l00274"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ac3c888b7b8de3be9e61afcf2aff6dff2"> 274</a></span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_OSCCTRL_Pos 4 </span></div>
<div class="line"><a name="l00275"></a><span class="lineno"> 275</span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_OSCCTRL (_U_(0x1) &lt;&lt; MCLK_APBAMASK_OSCCTRL_Pos)</span></div>
<div class="line"><a name="l00276"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ac13c0587fd456465accd0efc6e769413"> 276</a></span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_OSC32KCTRL_Pos 5 </span></div>
<div class="line"><a name="l00277"></a><span class="lineno"> 277</span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_OSC32KCTRL (_U_(0x1) &lt;&lt; MCLK_APBAMASK_OSC32KCTRL_Pos)</span></div>
<div class="line"><a name="l00278"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a9482e51359fc581f7c605977eb3685c5"> 278</a></span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_SUPC_Pos 6 </span></div>
<div class="line"><a name="l00279"></a><span class="lineno"> 279</span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_SUPC (_U_(0x1) &lt;&lt; MCLK_APBAMASK_SUPC_Pos)</span></div>
<div class="line"><a name="l00280"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a5fb09fb3c0885c6bf234d8021344b40b"> 280</a></span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_GCLK_Pos 7 </span></div>
<div class="line"><a name="l00281"></a><span class="lineno"> 281</span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_GCLK (_U_(0x1) &lt;&lt; MCLK_APBAMASK_GCLK_Pos)</span></div>
<div class="line"><a name="l00282"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a65b51937fbcdf1a5d7418bbfd0cb3a4e"> 282</a></span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_WDT_Pos 8 </span></div>
<div class="line"><a name="l00283"></a><span class="lineno"> 283</span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_WDT (_U_(0x1) &lt;&lt; MCLK_APBAMASK_WDT_Pos)</span></div>
<div class="line"><a name="l00284"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a29bcfd311e7858237139c52fa164728d"> 284</a></span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_RTC_Pos 9 </span></div>
<div class="line"><a name="l00285"></a><span class="lineno"> 285</span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_RTC (_U_(0x1) &lt;&lt; MCLK_APBAMASK_RTC_Pos)</span></div>
<div class="line"><a name="l00286"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a5071841327f5691fad5aaa64928723b4"> 286</a></span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_EIC_Pos 10 </span></div>
<div class="line"><a name="l00287"></a><span class="lineno"> 287</span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_EIC (_U_(0x1) &lt;&lt; MCLK_APBAMASK_EIC_Pos)</span></div>
<div class="line"><a name="l00288"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#acf54f7ce88550526bfc9800583a180ae"> 288</a></span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_FREQM_Pos 11 </span></div>
<div class="line"><a name="l00289"></a><span class="lineno"> 289</span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_FREQM (_U_(0x1) &lt;&lt; MCLK_APBAMASK_FREQM_Pos)</span></div>
<div class="line"><a name="l00290"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a51a1701f5148614ae7068e73e4fa46df"> 290</a></span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_SERCOM0_Pos 12 </span></div>
<div class="line"><a name="l00291"></a><span class="lineno"> 291</span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_SERCOM0 (_U_(0x1) &lt;&lt; MCLK_APBAMASK_SERCOM0_Pos)</span></div>
<div class="line"><a name="l00292"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ad7c8b0f983278890160b98943182947b"> 292</a></span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_SERCOM1_Pos 13 </span></div>
<div class="line"><a name="l00293"></a><span class="lineno"> 293</span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_SERCOM1 (_U_(0x1) &lt;&lt; MCLK_APBAMASK_SERCOM1_Pos)</span></div>
<div class="line"><a name="l00294"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#adafd8598fbe6998d741a4db76ae10819"> 294</a></span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_TC0_Pos 14 </span></div>
<div class="line"><a name="l00295"></a><span class="lineno"> 295</span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_TC0 (_U_(0x1) &lt;&lt; MCLK_APBAMASK_TC0_Pos)</span></div>
<div class="line"><a name="l00296"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#aadeb489d48264708c10f7d267b8a5365"> 296</a></span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_TC1_Pos 15 </span></div>
<div class="line"><a name="l00297"></a><span class="lineno"> 297</span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_TC1 (_U_(0x1) &lt;&lt; MCLK_APBAMASK_TC1_Pos)</span></div>
<div class="line"><a name="l00298"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a85274982e658543846410257d8741368"> 298</a></span>&#160;<span class="preprocessor">#define MCLK_APBAMASK_MASK _U_(0x0000FFFF) </span></div>
<div class="line"><a name="l00300"></a><span class="lineno"> 300</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- MCLK_APBBMASK : (MCLK Offset: 0x18) (R/W 32) APBB Mask -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00301"></a><span class="lineno"> 301</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00302"></a><span class="lineno"><a class="line" href="unionMCLK__APBBMASK__Type.html"> 302</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00303"></a><span class="lineno"> 303</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00304"></a><span class="lineno"><a class="line" href="unionMCLK__APBBMASK__Type.html#a83aa57c4c1e2e37082ab31ccecabd3c2"> 304</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBBMASK__Type.html#a83aa57c4c1e2e37082ab31ccecabd3c2">USB_</a>:1; </div>
<div class="line"><a name="l00305"></a><span class="lineno"><a class="line" href="unionMCLK__APBBMASK__Type.html#af20279614f6b5e51d3de5b7f1e9e7687"> 305</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBBMASK__Type.html#af20279614f6b5e51d3de5b7f1e9e7687">DSU_</a>:1; </div>
<div class="line"><a name="l00306"></a><span class="lineno"><a class="line" href="unionMCLK__APBBMASK__Type.html#adc7b386d0d0aa95498c70630a8eab6e9"> 306</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBBMASK__Type.html#adc7b386d0d0aa95498c70630a8eab6e9">NVMCTRL_</a>:1; </div>
<div class="line"><a name="l00307"></a><span class="lineno"><a class="line" href="unionMCLK__APBBMASK__Type.html#a2f58aad94f7ec93ad0c29f60d8b11fab"> 307</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00308"></a><span class="lineno"><a class="line" href="unionMCLK__APBBMASK__Type.html#a4f120aae88e921e10dbb8a48140413f6"> 308</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBBMASK__Type.html#a4f120aae88e921e10dbb8a48140413f6">PORT_</a>:1; </div>
<div class="line"><a name="l00309"></a><span class="lineno"><a class="line" href="unionMCLK__APBBMASK__Type.html#abd0341718b7451375b988ee36905e63d"> 309</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00310"></a><span class="lineno"><a class="line" href="unionMCLK__APBBMASK__Type.html#a4c6952cb131c60d2497141747bdcf841"> 310</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBBMASK__Type.html#a4c6952cb131c60d2497141747bdcf841">HMATRIX_</a>:1; </div>
<div class="line"><a name="l00311"></a><span class="lineno"><a class="line" href="unionMCLK__APBBMASK__Type.html#ac199136fbb46ece9cb165550a52d48d3"> 311</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBBMASK__Type.html#ac199136fbb46ece9cb165550a52d48d3">EVSYS_</a>:1; </div>
<div class="line"><a name="l00312"></a><span class="lineno"><a class="line" href="unionMCLK__APBBMASK__Type.html#a590ec882555b3667a4ef4018725f8066"> 312</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00313"></a><span class="lineno"><a class="line" href="unionMCLK__APBBMASK__Type.html#a25cab3e37f85299c717f7c1313cd55b2"> 313</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBBMASK__Type.html#a25cab3e37f85299c717f7c1313cd55b2">SERCOM2_</a>:1; </div>
<div class="line"><a name="l00314"></a><span class="lineno"><a class="line" href="unionMCLK__APBBMASK__Type.html#a1f430f1dfa2800830dc9a14249384175"> 314</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBBMASK__Type.html#a1f430f1dfa2800830dc9a14249384175">SERCOM3_</a>:1; </div>
<div class="line"><a name="l00315"></a><span class="lineno"><a class="line" href="unionMCLK__APBBMASK__Type.html#af4ff4393f39a5e4a6eadc328c743f282"> 315</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBBMASK__Type.html#af4ff4393f39a5e4a6eadc328c743f282">TCC0_</a>:1; </div>
<div class="line"><a name="l00316"></a><span class="lineno"><a class="line" href="unionMCLK__APBBMASK__Type.html#a2a95a82706980c46dbbd09307c723531"> 316</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBBMASK__Type.html#a2a95a82706980c46dbbd09307c723531">TCC1_</a>:1; </div>
<div class="line"><a name="l00317"></a><span class="lineno"><a class="line" href="unionMCLK__APBBMASK__Type.html#a97af14f0c5106994bdaaae2836702640"> 317</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBBMASK__Type.html#a97af14f0c5106994bdaaae2836702640">TC2_</a>:1; </div>
<div class="line"><a name="l00318"></a><span class="lineno"><a class="line" href="unionMCLK__APBBMASK__Type.html#a407996b7fe033e664c36d1ddbe3d984a"> 318</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBBMASK__Type.html#a407996b7fe033e664c36d1ddbe3d984a">TC3_</a>:1; </div>
<div class="line"><a name="l00319"></a><span class="lineno"><a class="line" href="unionMCLK__APBBMASK__Type.html#a5934624065f3fcc13d971aa7fbad15e7"> 319</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00320"></a><span class="lineno"><a class="line" href="unionMCLK__APBBMASK__Type.html#a440cddeea64abac388c786c634b1b4e7"> 320</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBBMASK__Type.html#a440cddeea64abac388c786c634b1b4e7">RAMECC_</a>:1; </div>
<div class="line"><a name="l00321"></a><span class="lineno"><a class="line" href="unionMCLK__APBBMASK__Type.html#a528d1fccfa746c30e35301b3bbeef7cb"> 321</a></span>&#160; uint32_t :15; </div>
<div class="line"><a name="l00322"></a><span class="lineno"><a class="line" href="unionMCLK__APBBMASK__Type.html#aca41bb03a0c374f77d9f5e6b206cd6f6"> 322</a></span>&#160; } bit; </div>
<div class="line"><a name="l00323"></a><span class="lineno"><a class="line" href="unionMCLK__APBBMASK__Type.html#a7474d1ba1f17c6659ec3c0c431bda460"> 323</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBBMASK__Type.html#a7474d1ba1f17c6659ec3c0c431bda460">reg</a>; </div>
<div class="line"><a name="l00324"></a><span class="lineno"> 324</span>&#160;} <a class="code" href="unionMCLK__APBBMASK__Type.html">MCLK_APBBMASK_Type</a>;</div>
<div class="line"><a name="l00325"></a><span class="lineno"> 325</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00326"></a><span class="lineno"> 326</span>&#160; </div>
<div class="line"><a name="l00327"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a8c35b6e1cf5ad6b7de3361646bc0510f"> 327</a></span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_OFFSET 0x18 </span></div>
<div class="line"><a name="l00328"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a7784f1cdd1314b91b3004070e1fc4b8b"> 328</a></span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_RESETVALUE _U_(0x00018056) </span></div>
<div class="line"><a name="l00330"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#af21d2c3cd0e5edba8c2ad9db99d97a37"> 330</a></span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_USB_Pos 0 </span></div>
<div class="line"><a name="l00331"></a><span class="lineno"> 331</span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_USB (_U_(0x1) &lt;&lt; MCLK_APBBMASK_USB_Pos)</span></div>
<div class="line"><a name="l00332"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a04d6d13ad8ea21c5493c88e22b64900b"> 332</a></span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_DSU_Pos 1 </span></div>
<div class="line"><a name="l00333"></a><span class="lineno"> 333</span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_DSU (_U_(0x1) &lt;&lt; MCLK_APBBMASK_DSU_Pos)</span></div>
<div class="line"><a name="l00334"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a00e3c7c7c317a8a1a2e828ed35e38993"> 334</a></span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_NVMCTRL_Pos 2 </span></div>
<div class="line"><a name="l00335"></a><span class="lineno"> 335</span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_NVMCTRL (_U_(0x1) &lt;&lt; MCLK_APBBMASK_NVMCTRL_Pos)</span></div>
<div class="line"><a name="l00336"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ae3ed73b717df511384b9192f5ff8a411"> 336</a></span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_PORT_Pos 4 </span></div>
<div class="line"><a name="l00337"></a><span class="lineno"> 337</span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_PORT (_U_(0x1) &lt;&lt; MCLK_APBBMASK_PORT_Pos)</span></div>
<div class="line"><a name="l00338"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ac9b7b578f7a12e80c52cb5f536ffbfc6"> 338</a></span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_HMATRIX_Pos 6 </span></div>
<div class="line"><a name="l00339"></a><span class="lineno"> 339</span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_HMATRIX (_U_(0x1) &lt;&lt; MCLK_APBBMASK_HMATRIX_Pos)</span></div>
<div class="line"><a name="l00340"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#acfef8c4d439e6c9c2474a3dba130a9ee"> 340</a></span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_EVSYS_Pos 7 </span></div>
<div class="line"><a name="l00341"></a><span class="lineno"> 341</span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_EVSYS (_U_(0x1) &lt;&lt; MCLK_APBBMASK_EVSYS_Pos)</span></div>
<div class="line"><a name="l00342"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ae601a75e252448b9b3ac8b7976bc06b4"> 342</a></span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_SERCOM2_Pos 9 </span></div>
<div class="line"><a name="l00343"></a><span class="lineno"> 343</span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_SERCOM2 (_U_(0x1) &lt;&lt; MCLK_APBBMASK_SERCOM2_Pos)</span></div>
<div class="line"><a name="l00344"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a79d8ab6fd56bcdd7e7b512b076b86846"> 344</a></span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_SERCOM3_Pos 10 </span></div>
<div class="line"><a name="l00345"></a><span class="lineno"> 345</span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_SERCOM3 (_U_(0x1) &lt;&lt; MCLK_APBBMASK_SERCOM3_Pos)</span></div>
<div class="line"><a name="l00346"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a49d92e93709a54e3d7d92f7c14a9cec1"> 346</a></span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_TCC0_Pos 11 </span></div>
<div class="line"><a name="l00347"></a><span class="lineno"> 347</span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_TCC0 (_U_(0x1) &lt;&lt; MCLK_APBBMASK_TCC0_Pos)</span></div>
<div class="line"><a name="l00348"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a481a03f2e4cace02a94025c9e0790da5"> 348</a></span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_TCC1_Pos 12 </span></div>
<div class="line"><a name="l00349"></a><span class="lineno"> 349</span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_TCC1 (_U_(0x1) &lt;&lt; MCLK_APBBMASK_TCC1_Pos)</span></div>
<div class="line"><a name="l00350"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#acf6f153dbd6855a2250546f855a8c781"> 350</a></span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_TC2_Pos 13 </span></div>
<div class="line"><a name="l00351"></a><span class="lineno"> 351</span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_TC2 (_U_(0x1) &lt;&lt; MCLK_APBBMASK_TC2_Pos)</span></div>
<div class="line"><a name="l00352"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a7365f0e61af5bf7f97d074e8f3987d54"> 352</a></span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_TC3_Pos 14 </span></div>
<div class="line"><a name="l00353"></a><span class="lineno"> 353</span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_TC3 (_U_(0x1) &lt;&lt; MCLK_APBBMASK_TC3_Pos)</span></div>
<div class="line"><a name="l00354"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a7a77772f140e3aeb2d58634ec4b1b206"> 354</a></span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_RAMECC_Pos 16 </span></div>
<div class="line"><a name="l00355"></a><span class="lineno"> 355</span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_RAMECC (_U_(0x1) &lt;&lt; MCLK_APBBMASK_RAMECC_Pos)</span></div>
<div class="line"><a name="l00356"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a17175a488d06a4b52abab2d654660456"> 356</a></span>&#160;<span class="preprocessor">#define MCLK_APBBMASK_MASK _U_(0x00017ED7) </span></div>
<div class="line"><a name="l00358"></a><span class="lineno"> 358</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- MCLK_APBCMASK : (MCLK Offset: 0x1C) (R/W 32) APBC Mask -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00359"></a><span class="lineno"> 359</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00360"></a><span class="lineno"><a class="line" href="unionMCLK__APBCMASK__Type.html"> 360</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00361"></a><span class="lineno"> 361</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00362"></a><span class="lineno"><a class="line" href="unionMCLK__APBCMASK__Type.html#a5009fb9110507b2565c02cbd119d6c1f"> 362</a></span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00363"></a><span class="lineno"><a class="line" href="unionMCLK__APBCMASK__Type.html#a956617346bc3e88219c8ea75b05df371"> 363</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBCMASK__Type.html#a956617346bc3e88219c8ea75b05df371">GMAC_</a>:1; </div>
<div class="line"><a name="l00364"></a><span class="lineno"><a class="line" href="unionMCLK__APBCMASK__Type.html#a9e995c2a63bb196c9a4e83ef2a95e295"> 364</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBCMASK__Type.html#a9e995c2a63bb196c9a4e83ef2a95e295">TCC2_</a>:1; </div>
<div class="line"><a name="l00365"></a><span class="lineno"><a class="line" href="unionMCLK__APBCMASK__Type.html#aa42b0246e49395906f9a17270c94d853"> 365</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBCMASK__Type.html#aa42b0246e49395906f9a17270c94d853">TCC3_</a>:1; </div>
<div class="line"><a name="l00366"></a><span class="lineno"><a class="line" href="unionMCLK__APBCMASK__Type.html#a144c1f082fba4894ec954ad936976ee4"> 366</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBCMASK__Type.html#a144c1f082fba4894ec954ad936976ee4">TC4_</a>:1; </div>
<div class="line"><a name="l00367"></a><span class="lineno"><a class="line" href="unionMCLK__APBCMASK__Type.html#a131255f3c140e0b1f3d2a32a61d68900"> 367</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBCMASK__Type.html#a131255f3c140e0b1f3d2a32a61d68900">TC5_</a>:1; </div>
<div class="line"><a name="l00368"></a><span class="lineno"><a class="line" href="unionMCLK__APBCMASK__Type.html#ae6c1f2f813f0be390aa0f3df06b78f04"> 368</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBCMASK__Type.html#ae6c1f2f813f0be390aa0f3df06b78f04">PDEC_</a>:1; </div>
<div class="line"><a name="l00369"></a><span class="lineno"><a class="line" href="unionMCLK__APBCMASK__Type.html#a48dbadbef4c560f1fa51f663578a6fa5"> 369</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBCMASK__Type.html#a48dbadbef4c560f1fa51f663578a6fa5">AC_</a>:1; </div>
<div class="line"><a name="l00370"></a><span class="lineno"><a class="line" href="unionMCLK__APBCMASK__Type.html#a2d443c26b3b185f5019a7931426a1873"> 370</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBCMASK__Type.html#a2d443c26b3b185f5019a7931426a1873">AES_</a>:1; </div>
<div class="line"><a name="l00371"></a><span class="lineno"><a class="line" href="unionMCLK__APBCMASK__Type.html#aa4a6ca6524bbc8d93834519c249b67a8"> 371</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBCMASK__Type.html#aa4a6ca6524bbc8d93834519c249b67a8">TRNG_</a>:1; </div>
<div class="line"><a name="l00372"></a><span class="lineno"><a class="line" href="unionMCLK__APBCMASK__Type.html#a33091b2a25cc2491f2d1e0e6ed7e226c"> 372</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBCMASK__Type.html#a33091b2a25cc2491f2d1e0e6ed7e226c">ICM_</a>:1; </div>
<div class="line"><a name="l00373"></a><span class="lineno"><a class="line" href="unionMCLK__APBCMASK__Type.html#a6eb540529df53444dca1a5d52cbde872"> 373</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00374"></a><span class="lineno"><a class="line" href="unionMCLK__APBCMASK__Type.html#ad0579e7b477b2ea30f060bd6f1f8950b"> 374</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBCMASK__Type.html#ad0579e7b477b2ea30f060bd6f1f8950b">QSPI_</a>:1; </div>
<div class="line"><a name="l00375"></a><span class="lineno"><a class="line" href="unionMCLK__APBCMASK__Type.html#a725be183a2a30512a955ef59acc401bd"> 375</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBCMASK__Type.html#a725be183a2a30512a955ef59acc401bd">CCL_</a>:1; </div>
<div class="line"><a name="l00376"></a><span class="lineno"><a class="line" href="unionMCLK__APBCMASK__Type.html#a20aff633e25bee998794454d1a3dc336"> 376</a></span>&#160; uint32_t :17; </div>
<div class="line"><a name="l00377"></a><span class="lineno"><a class="line" href="unionMCLK__APBCMASK__Type.html#a2a762390e8c3e4b2111335a2c1422e0c"> 377</a></span>&#160; } bit; </div>
<div class="line"><a name="l00378"></a><span class="lineno"><a class="line" href="unionMCLK__APBCMASK__Type.html#a20de7cb4fa57054779ce79a1fa720da8"> 378</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBCMASK__Type.html#a20de7cb4fa57054779ce79a1fa720da8">reg</a>; </div>
<div class="line"><a name="l00379"></a><span class="lineno"> 379</span>&#160;} <a class="code" href="unionMCLK__APBCMASK__Type.html">MCLK_APBCMASK_Type</a>;</div>
<div class="line"><a name="l00380"></a><span class="lineno"> 380</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00381"></a><span class="lineno"> 381</span>&#160; </div>
<div class="line"><a name="l00382"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a9adc77e1bade5beba117c02998b80574"> 382</a></span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_OFFSET 0x1C </span></div>
<div class="line"><a name="l00383"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ad844382addaec4552ab75518ff2d7e74"> 383</a></span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_RESETVALUE _U_(0x00002000) </span></div>
<div class="line"><a name="l00385"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#aef22e33ee071b1ab1e044ebfec61ecc3"> 385</a></span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_GMAC_Pos 2 </span></div>
<div class="line"><a name="l00386"></a><span class="lineno"> 386</span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_GMAC (_U_(0x1) &lt;&lt; MCLK_APBCMASK_GMAC_Pos)</span></div>
<div class="line"><a name="l00387"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a4f871f80238ad9bbb73e2f8656a9e59d"> 387</a></span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_TCC2_Pos 3 </span></div>
<div class="line"><a name="l00388"></a><span class="lineno"> 388</span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_TCC2 (_U_(0x1) &lt;&lt; MCLK_APBCMASK_TCC2_Pos)</span></div>
<div class="line"><a name="l00389"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a6be7119f990531600e4f658bd3df0c0a"> 389</a></span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_TCC3_Pos 4 </span></div>
<div class="line"><a name="l00390"></a><span class="lineno"> 390</span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_TCC3 (_U_(0x1) &lt;&lt; MCLK_APBCMASK_TCC3_Pos)</span></div>
<div class="line"><a name="l00391"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a7c886e1ff64370722c150d44200b66df"> 391</a></span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_TC4_Pos 5 </span></div>
<div class="line"><a name="l00392"></a><span class="lineno"> 392</span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_TC4 (_U_(0x1) &lt;&lt; MCLK_APBCMASK_TC4_Pos)</span></div>
<div class="line"><a name="l00393"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a0da39e4b06b949c2cbb3e9b54637fb53"> 393</a></span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_TC5_Pos 6 </span></div>
<div class="line"><a name="l00394"></a><span class="lineno"> 394</span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_TC5 (_U_(0x1) &lt;&lt; MCLK_APBCMASK_TC5_Pos)</span></div>
<div class="line"><a name="l00395"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a18d7a4cb62e3d42e28bb3d1824cf8898"> 395</a></span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_PDEC_Pos 7 </span></div>
<div class="line"><a name="l00396"></a><span class="lineno"> 396</span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_PDEC (_U_(0x1) &lt;&lt; MCLK_APBCMASK_PDEC_Pos)</span></div>
<div class="line"><a name="l00397"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ae827c5e608f07904b393f4d5fcff1e48"> 397</a></span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_AC_Pos 8 </span></div>
<div class="line"><a name="l00398"></a><span class="lineno"> 398</span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_AC (_U_(0x1) &lt;&lt; MCLK_APBCMASK_AC_Pos)</span></div>
<div class="line"><a name="l00399"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#afe03bc583599946038f7e2de91be340c"> 399</a></span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_AES_Pos 9 </span></div>
<div class="line"><a name="l00400"></a><span class="lineno"> 400</span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_AES (_U_(0x1) &lt;&lt; MCLK_APBCMASK_AES_Pos)</span></div>
<div class="line"><a name="l00401"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a398240eb1bf125624011e74222087b4f"> 401</a></span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_TRNG_Pos 10 </span></div>
<div class="line"><a name="l00402"></a><span class="lineno"> 402</span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_TRNG (_U_(0x1) &lt;&lt; MCLK_APBCMASK_TRNG_Pos)</span></div>
<div class="line"><a name="l00403"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ac1c36e384d318f08af381e7cf4e0b0f4"> 403</a></span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_ICM_Pos 11 </span></div>
<div class="line"><a name="l00404"></a><span class="lineno"> 404</span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_ICM (_U_(0x1) &lt;&lt; MCLK_APBCMASK_ICM_Pos)</span></div>
<div class="line"><a name="l00405"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ab7812fa73c364fea3539d9ac04cf0bf7"> 405</a></span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_QSPI_Pos 13 </span></div>
<div class="line"><a name="l00406"></a><span class="lineno"> 406</span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_QSPI (_U_(0x1) &lt;&lt; MCLK_APBCMASK_QSPI_Pos)</span></div>
<div class="line"><a name="l00407"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a4759ecc97b02d665427b2cb1a198e827"> 407</a></span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_CCL_Pos 14 </span></div>
<div class="line"><a name="l00408"></a><span class="lineno"> 408</span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_CCL (_U_(0x1) &lt;&lt; MCLK_APBCMASK_CCL_Pos)</span></div>
<div class="line"><a name="l00409"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#aecd8f6d7a986889c2f43a65a506bd42e"> 409</a></span>&#160;<span class="preprocessor">#define MCLK_APBCMASK_MASK _U_(0x00006FFC) </span></div>
<div class="line"><a name="l00411"></a><span class="lineno"> 411</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- MCLK_APBDMASK : (MCLK Offset: 0x20) (R/W 32) APBD Mask -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00412"></a><span class="lineno"> 412</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00413"></a><span class="lineno"><a class="line" href="unionMCLK__APBDMASK__Type.html"> 413</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00414"></a><span class="lineno"> 414</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00415"></a><span class="lineno"><a class="line" href="unionMCLK__APBDMASK__Type.html#aff123948ad72fdb0f09de59796d257b8"> 415</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBDMASK__Type.html#aff123948ad72fdb0f09de59796d257b8">SERCOM4_</a>:1; </div>
<div class="line"><a name="l00416"></a><span class="lineno"><a class="line" href="unionMCLK__APBDMASK__Type.html#afa71768da07df0867a5e1528588ddf58"> 416</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBDMASK__Type.html#afa71768da07df0867a5e1528588ddf58">SERCOM5_</a>:1; </div>
<div class="line"><a name="l00417"></a><span class="lineno"><a class="line" href="unionMCLK__APBDMASK__Type.html#a0d39a2af9ae488112bd3184112f1ba76"> 417</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBDMASK__Type.html#a0d39a2af9ae488112bd3184112f1ba76">SERCOM6_</a>:1; </div>
<div class="line"><a name="l00418"></a><span class="lineno"><a class="line" href="unionMCLK__APBDMASK__Type.html#a3cceca614eaadc2d58f5a75de19c7ce8"> 418</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBDMASK__Type.html#a3cceca614eaadc2d58f5a75de19c7ce8">SERCOM7_</a>:1; </div>
<div class="line"><a name="l00419"></a><span class="lineno"><a class="line" href="unionMCLK__APBDMASK__Type.html#af7d1d4d16357afd5ace9732a036c0eb4"> 419</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBDMASK__Type.html#af7d1d4d16357afd5ace9732a036c0eb4">TCC4_</a>:1; </div>
<div class="line"><a name="l00420"></a><span class="lineno"><a class="line" href="unionMCLK__APBDMASK__Type.html#a25babee12c7260387374cc2167002e89"> 420</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBDMASK__Type.html#a25babee12c7260387374cc2167002e89">TC6_</a>:1; </div>
<div class="line"><a name="l00421"></a><span class="lineno"><a class="line" href="unionMCLK__APBDMASK__Type.html#a3481fd3281cd9ef42f42056366236f1b"> 421</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBDMASK__Type.html#a3481fd3281cd9ef42f42056366236f1b">TC7_</a>:1; </div>
<div class="line"><a name="l00422"></a><span class="lineno"><a class="line" href="unionMCLK__APBDMASK__Type.html#ae9d35575171183f80289c422db82d10e"> 422</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBDMASK__Type.html#ae9d35575171183f80289c422db82d10e">ADC0_</a>:1; </div>
<div class="line"><a name="l00423"></a><span class="lineno"><a class="line" href="unionMCLK__APBDMASK__Type.html#a15935a848de92acb206337c0f8a2e836"> 423</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBDMASK__Type.html#a15935a848de92acb206337c0f8a2e836">ADC1_</a>:1; </div>
<div class="line"><a name="l00424"></a><span class="lineno"><a class="line" href="unionMCLK__APBDMASK__Type.html#ab090bc5d743ecfd0d6b02e88631ad554"> 424</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBDMASK__Type.html#ab090bc5d743ecfd0d6b02e88631ad554">DAC_</a>:1; </div>
<div class="line"><a name="l00425"></a><span class="lineno"><a class="line" href="unionMCLK__APBDMASK__Type.html#a5bb5b8d0679fb9f2defcee5c1a3ec5f3"> 425</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBDMASK__Type.html#a5bb5b8d0679fb9f2defcee5c1a3ec5f3">I2S_</a>:1; </div>
<div class="line"><a name="l00426"></a><span class="lineno"><a class="line" href="unionMCLK__APBDMASK__Type.html#aeec7994ca6d1c37b090ca60afeb2a523"> 426</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBDMASK__Type.html#aeec7994ca6d1c37b090ca60afeb2a523">PCC_</a>:1; </div>
<div class="line"><a name="l00427"></a><span class="lineno"><a class="line" href="unionMCLK__APBDMASK__Type.html#a1d4deb80a7cc8966d77d43fac93a3769"> 427</a></span>&#160; uint32_t :20; </div>
<div class="line"><a name="l00428"></a><span class="lineno"><a class="line" href="unionMCLK__APBDMASK__Type.html#a4953f8d7bb56c65b58240564858f0d5b"> 428</a></span>&#160; } bit; </div>
<div class="line"><a name="l00429"></a><span class="lineno"><a class="line" href="unionMCLK__APBDMASK__Type.html#ac40de06dce7dcc3ba927e44ec57e27fb"> 429</a></span>&#160; uint32_t <a class="code" href="unionMCLK__APBDMASK__Type.html#ac40de06dce7dcc3ba927e44ec57e27fb">reg</a>; </div>
<div class="line"><a name="l00430"></a><span class="lineno"> 430</span>&#160;} <a class="code" href="unionMCLK__APBDMASK__Type.html">MCLK_APBDMASK_Type</a>;</div>
<div class="line"><a name="l00431"></a><span class="lineno"> 431</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00432"></a><span class="lineno"> 432</span>&#160; </div>
<div class="line"><a name="l00433"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a7a00f8f628fc059b0ffcc36d2343c212"> 433</a></span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_OFFSET 0x20 </span></div>
<div class="line"><a name="l00434"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#affe228d4015871770d9c2ac2d3e23349"> 434</a></span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00436"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ae97f2a7876a603ea76ee86f5e099c269"> 436</a></span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_SERCOM4_Pos 0 </span></div>
<div class="line"><a name="l00437"></a><span class="lineno"> 437</span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_SERCOM4 (_U_(0x1) &lt;&lt; MCLK_APBDMASK_SERCOM4_Pos)</span></div>
<div class="line"><a name="l00438"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a0860f3d77409f156d996a776493af3a9"> 438</a></span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_SERCOM5_Pos 1 </span></div>
<div class="line"><a name="l00439"></a><span class="lineno"> 439</span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_SERCOM5 (_U_(0x1) &lt;&lt; MCLK_APBDMASK_SERCOM5_Pos)</span></div>
<div class="line"><a name="l00440"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a1d520be70a0ed4fca667c58341d99620"> 440</a></span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_SERCOM6_Pos 2 </span></div>
<div class="line"><a name="l00441"></a><span class="lineno"> 441</span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_SERCOM6 (_U_(0x1) &lt;&lt; MCLK_APBDMASK_SERCOM6_Pos)</span></div>
<div class="line"><a name="l00442"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a7d21e2207d86f11b75eb201011fee80e"> 442</a></span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_SERCOM7_Pos 3 </span></div>
<div class="line"><a name="l00443"></a><span class="lineno"> 443</span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_SERCOM7 (_U_(0x1) &lt;&lt; MCLK_APBDMASK_SERCOM7_Pos)</span></div>
<div class="line"><a name="l00444"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a11586f55c55a915e5d5ed0f8986abf5d"> 444</a></span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_TCC4_Pos 4 </span></div>
<div class="line"><a name="l00445"></a><span class="lineno"> 445</span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_TCC4 (_U_(0x1) &lt;&lt; MCLK_APBDMASK_TCC4_Pos)</span></div>
<div class="line"><a name="l00446"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a5e5067b0ea3b8d950adeee60c7e201ef"> 446</a></span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_TC6_Pos 5 </span></div>
<div class="line"><a name="l00447"></a><span class="lineno"> 447</span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_TC6 (_U_(0x1) &lt;&lt; MCLK_APBDMASK_TC6_Pos)</span></div>
<div class="line"><a name="l00448"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a6ea8876f7f253392f0aa16da779c4d8b"> 448</a></span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_TC7_Pos 6 </span></div>
<div class="line"><a name="l00449"></a><span class="lineno"> 449</span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_TC7 (_U_(0x1) &lt;&lt; MCLK_APBDMASK_TC7_Pos)</span></div>
<div class="line"><a name="l00450"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#aaa0f2c5eb74e0b65cc4338f29f2d69c4"> 450</a></span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_ADC0_Pos 7 </span></div>
<div class="line"><a name="l00451"></a><span class="lineno"> 451</span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_ADC0 (_U_(0x1) &lt;&lt; MCLK_APBDMASK_ADC0_Pos)</span></div>
<div class="line"><a name="l00452"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#aebfa8b7e9a270d649771d8f420fbc2e2"> 452</a></span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_ADC1_Pos 8 </span></div>
<div class="line"><a name="l00453"></a><span class="lineno"> 453</span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_ADC1 (_U_(0x1) &lt;&lt; MCLK_APBDMASK_ADC1_Pos)</span></div>
<div class="line"><a name="l00454"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a2d480786af05fb2fd66e9c85a987f855"> 454</a></span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_DAC_Pos 9 </span></div>
<div class="line"><a name="l00455"></a><span class="lineno"> 455</span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_DAC (_U_(0x1) &lt;&lt; MCLK_APBDMASK_DAC_Pos)</span></div>
<div class="line"><a name="l00456"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#a7675f312a66e9078d114360abaca0d69"> 456</a></span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_I2S_Pos 10 </span></div>
<div class="line"><a name="l00457"></a><span class="lineno"> 457</span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_I2S (_U_(0x1) &lt;&lt; MCLK_APBDMASK_I2S_Pos)</span></div>
<div class="line"><a name="l00458"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ad4290756f92692a42c7bb1cfaf487d0f"> 458</a></span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_PCC_Pos 11 </span></div>
<div class="line"><a name="l00459"></a><span class="lineno"> 459</span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_PCC (_U_(0x1) &lt;&lt; MCLK_APBDMASK_PCC_Pos)</span></div>
<div class="line"><a name="l00460"></a><span class="lineno"><a class="line" href="component_2mclk_8h.html#ad7749cd8272a2d7fdb3faaeaa99e5268"> 460</a></span>&#160;<span class="preprocessor">#define MCLK_APBDMASK_MASK _U_(0x00000FFF) </span></div>
<div class="line"><a name="l00463"></a><span class="lineno"> 463</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00464"></a><span class="lineno"><a class="line" href="structMclk.html"> 464</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00465"></a><span class="lineno"> 465</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved1[0x1];</div>
<div class="line"><a name="l00466"></a><span class="lineno"><a class="line" href="structMclk.html#a1e40a8efebeb4c0f3369640d85f1c3b0"> 466</a></span>&#160; __IO <a class="code" href="unionMCLK__INTENCLR__Type.html">MCLK_INTENCLR_Type</a> <a class="code" href="structMclk.html#a1e40a8efebeb4c0f3369640d85f1c3b0">INTENCLR</a>; </div>
<div class="line"><a name="l00467"></a><span class="lineno"><a class="line" href="structMclk.html#ad82c6c646b216ebc79ed5e6963d3dd47"> 467</a></span>&#160; __IO <a class="code" href="unionMCLK__INTENSET__Type.html">MCLK_INTENSET_Type</a> <a class="code" href="structMclk.html#ad82c6c646b216ebc79ed5e6963d3dd47">INTENSET</a>; </div>
<div class="line"><a name="l00468"></a><span class="lineno"><a class="line" href="structMclk.html#a0f0cf763c2481c68676860e3a3d25eef"> 468</a></span>&#160; __IO <a class="code" href="unionMCLK__INTFLAG__Type.html">MCLK_INTFLAG_Type</a> <a class="code" href="structMclk.html#a0f0cf763c2481c68676860e3a3d25eef">INTFLAG</a>; </div>
<div class="line"><a name="l00469"></a><span class="lineno"><a class="line" href="structMclk.html#ad4666527690ddf4e762c74371d897192"> 469</a></span>&#160; __I <a class="code" href="unionMCLK__HSDIV__Type.html">MCLK_HSDIV_Type</a> <a class="code" href="structMclk.html#ad4666527690ddf4e762c74371d897192">HSDIV</a>; </div>
<div class="line"><a name="l00470"></a><span class="lineno"><a class="line" href="structMclk.html#a4a4de422fd7e853df9d7b167f0b1779e"> 470</a></span>&#160; __IO <a class="code" href="unionMCLK__CPUDIV__Type.html">MCLK_CPUDIV_Type</a> <a class="code" href="structMclk.html#a4a4de422fd7e853df9d7b167f0b1779e">CPUDIV</a>; </div>
<div class="line"><a name="l00471"></a><span class="lineno"> 471</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved2[0xA];</div>
<div class="line"><a name="l00472"></a><span class="lineno"><a class="line" href="structMclk.html#a19047323742152d4d61d3c2c80ff7e4d"> 472</a></span>&#160; __IO <a class="code" href="unionMCLK__AHBMASK__Type.html">MCLK_AHBMASK_Type</a> <a class="code" href="structMclk.html#a19047323742152d4d61d3c2c80ff7e4d">AHBMASK</a>; </div>
<div class="line"><a name="l00473"></a><span class="lineno"><a class="line" href="structMclk.html#ad8232a5e70531ff311723357b78d717a"> 473</a></span>&#160; __IO <a class="code" href="unionMCLK__APBAMASK__Type.html">MCLK_APBAMASK_Type</a> <a class="code" href="structMclk.html#ad8232a5e70531ff311723357b78d717a">APBAMASK</a>; </div>
<div class="line"><a name="l00474"></a><span class="lineno"><a class="line" href="structMclk.html#aefa9f88794d425d01ad77fb0b6d77d7a"> 474</a></span>&#160; __IO <a class="code" href="unionMCLK__APBBMASK__Type.html">MCLK_APBBMASK_Type</a> <a class="code" href="structMclk.html#aefa9f88794d425d01ad77fb0b6d77d7a">APBBMASK</a>; </div>
<div class="line"><a name="l00475"></a><span class="lineno"><a class="line" href="structMclk.html#a80a2bc0146a01cde098f8748564c0296"> 475</a></span>&#160; __IO <a class="code" href="unionMCLK__APBCMASK__Type.html">MCLK_APBCMASK_Type</a> <a class="code" href="structMclk.html#a80a2bc0146a01cde098f8748564c0296">APBCMASK</a>; </div>
<div class="line"><a name="l00476"></a><span class="lineno"><a class="line" href="structMclk.html#a0098200cac621e1c03b4bb6e0cf91895"> 476</a></span>&#160; __IO <a class="code" href="unionMCLK__APBDMASK__Type.html">MCLK_APBDMASK_Type</a> <a class="code" href="structMclk.html#a0098200cac621e1c03b4bb6e0cf91895">APBDMASK</a>; </div>
<div class="line"><a name="l00477"></a><span class="lineno"> 477</span>&#160;} <a class="code" href="structMclk.html">Mclk</a>;</div>
<div class="line"><a name="l00478"></a><span class="lineno"> 478</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00479"></a><span class="lineno"> 479</span>&#160; </div>
<div class="line"><a name="l00482"></a><span class="lineno"> 482</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_MCLK_COMPONENT_ */</span><span class="preprocessor"></span></div>
</div><!-- fragment --></div><!-- contents -->
<div class="ttc" id="aunionMCLK__INTENCLR__Type_html_abddaab7b9f92b5b1cb04b67cfe88fea0"><div class="ttname"><a href="unionMCLK__INTENCLR__Type.html#abddaab7b9f92b5b1cb04b67cfe88fea0">MCLK_INTENCLR_Type::CKRDY</a></div><div class="ttdeci">uint8_t CKRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00046">mclk.h:46</a></div></div>
<div class="ttc" id="aunionMCLK__APBDMASK__Type_html_a0d39a2af9ae488112bd3184112f1ba76"><div class="ttname"><a href="unionMCLK__APBDMASK__Type.html#a0d39a2af9ae488112bd3184112f1ba76">MCLK_APBDMASK_Type::SERCOM6_</a></div><div class="ttdeci">uint32_t SERCOM6_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00417">mclk.h:417</a></div></div>
<div class="ttc" id="aunionMCLK__APBCMASK__Type_html_a48dbadbef4c560f1fa51f663578a6fa5"><div class="ttname"><a href="unionMCLK__APBCMASK__Type.html#a48dbadbef4c560f1fa51f663578a6fa5">MCLK_APBCMASK_Type::AC_</a></div><div class="ttdeci">uint32_t AC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00369">mclk.h:369</a></div></div>
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<div class="ttc" id="aunionMCLK__APBDMASK__Type_html_a25babee12c7260387374cc2167002e89"><div class="ttname"><a href="unionMCLK__APBDMASK__Type.html#a25babee12c7260387374cc2167002e89">MCLK_APBDMASK_Type::TC6_</a></div><div class="ttdeci">uint32_t TC6_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00420">mclk.h:420</a></div></div>
<div class="ttc" id="astructMclk_html_a80a2bc0146a01cde098f8748564c0296"><div class="ttname"><a href="structMclk.html#a80a2bc0146a01cde098f8748564c0296">Mclk::APBCMASK</a></div><div class="ttdeci">__IO MCLK_APBCMASK_Type APBCMASK</div><div class="ttdoc">Offset: 0x1C (R/W 32) APBC Mask.</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00475">mclk.h:475</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_a8036cc13b7b2ed340e022fbb66c87055"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#a8036cc13b7b2ed340e022fbb66c87055">MCLK_AHBMASK_Type::DMAC_</a></div><div class="ttdeci">uint32_t DMAC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00163">mclk.h:163</a></div></div>
<div class="ttc" id="aunionMCLK__APBAMASK__Type_html_a956a0cfda2b3326913bb20fcc2a569cb"><div class="ttname"><a href="unionMCLK__APBAMASK__Type.html#a956a0cfda2b3326913bb20fcc2a569cb">MCLK_APBAMASK_Type::TC1_</a></div><div class="ttdeci">uint32_t TC1_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00256">mclk.h:256</a></div></div>
<div class="ttc" id="astructMclk_html_ad4666527690ddf4e762c74371d897192"><div class="ttname"><a href="structMclk.html#ad4666527690ddf4e762c74371d897192">Mclk::HSDIV</a></div><div class="ttdeci">__I MCLK_HSDIV_Type HSDIV</div><div class="ttdoc">Offset: 0x04 (R/ 8) HS Clock Division.</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00469">mclk.h:469</a></div></div>
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<div class="ttc" id="aunionMCLK__APBAMASK__Type_html_af1d343fb9da07c36bb5158338ec7afa5"><div class="ttname"><a href="unionMCLK__APBAMASK__Type.html#af1d343fb9da07c36bb5158338ec7afa5">MCLK_APBAMASK_Type::SERCOM1_</a></div><div class="ttdeci">uint32_t SERCOM1_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00254">mclk.h:254</a></div></div>
<div class="ttc" id="aunionMCLK__APBAMASK__Type_html"><div class="ttname"><a href="unionMCLK__APBAMASK__Type.html">MCLK_APBAMASK_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00239">mclk.h:239</a></div></div>
<div class="ttc" id="aunionMCLK__APBBMASK__Type_html_a2a95a82706980c46dbbd09307c723531"><div class="ttname"><a href="unionMCLK__APBBMASK__Type.html#a2a95a82706980c46dbbd09307c723531">MCLK_APBBMASK_Type::TCC1_</a></div><div class="ttdeci">uint32_t TCC1_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00316">mclk.h:316</a></div></div>
<div class="ttc" id="aunionMCLK__APBDMASK__Type_html_a15935a848de92acb206337c0f8a2e836"><div class="ttname"><a href="unionMCLK__APBDMASK__Type.html#a15935a848de92acb206337c0f8a2e836">MCLK_APBDMASK_Type::ADC1_</a></div><div class="ttdeci">uint32_t ADC1_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00423">mclk.h:423</a></div></div>
<div class="ttc" id="aunionMCLK__HSDIV__Type_html_aab2b23dd14e64b598716fd7cf7f59c20"><div class="ttname"><a href="unionMCLK__HSDIV__Type.html#aab2b23dd14e64b598716fd7cf7f59c20">MCLK_HSDIV_Type::DIV</a></div><div class="ttdeci">uint8_t DIV</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00100">mclk.h:100</a></div></div>
<div class="ttc" id="aunionMCLK__APBDMASK__Type_html_aff123948ad72fdb0f09de59796d257b8"><div class="ttname"><a href="unionMCLK__APBDMASK__Type.html#aff123948ad72fdb0f09de59796d257b8">MCLK_APBDMASK_Type::SERCOM4_</a></div><div class="ttdeci">uint32_t SERCOM4_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00415">mclk.h:415</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_a9c6223daa319f557015aa138d58d1e7b"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#a9c6223daa319f557015aa138d58d1e7b">MCLK_AHBMASK_Type::HMATRIX_</a></div><div class="ttdeci">uint32_t HMATRIX_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00159">mclk.h:159</a></div></div>
<div class="ttc" id="aunionMCLK__CPUDIV__Type_html_a8dbfb27cee1d9e75f17a15cb2ae67dc5"><div class="ttname"><a href="unionMCLK__CPUDIV__Type.html#a8dbfb27cee1d9e75f17a15cb2ae67dc5">MCLK_CPUDIV_Type::DIV</a></div><div class="ttdeci">uint8_t DIV</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00120">mclk.h:120</a></div></div>
<div class="ttc" id="aunionMCLK__APBBMASK__Type_html_af20279614f6b5e51d3de5b7f1e9e7687"><div class="ttname"><a href="unionMCLK__APBBMASK__Type.html#af20279614f6b5e51d3de5b7f1e9e7687">MCLK_APBBMASK_Type::DSU_</a></div><div class="ttdeci">uint32_t DSU_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00305">mclk.h:305</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_a39c4342be6e7152be6f1d04582e39e17"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#a39c4342be6e7152be6f1d04582e39e17">MCLK_AHBMASK_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00180">mclk.h:180</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_acc9217f9fcfecbca339dc1989e3b7f6c"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#acc9217f9fcfecbca339dc1989e3b7f6c">MCLK_AHBMASK_Type::BKUPRAM_</a></div><div class="ttdeci">uint32_t BKUPRAM_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00165">mclk.h:165</a></div></div>
<div class="ttc" id="aunionMCLK__APBDMASK__Type_html_afa71768da07df0867a5e1528588ddf58"><div class="ttname"><a href="unionMCLK__APBDMASK__Type.html#afa71768da07df0867a5e1528588ddf58">MCLK_APBDMASK_Type::SERCOM5_</a></div><div class="ttdeci">uint32_t SERCOM5_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00416">mclk.h:416</a></div></div>
<div class="ttc" id="aunionMCLK__APBBMASK__Type_html_af4ff4393f39a5e4a6eadc328c743f282"><div class="ttname"><a href="unionMCLK__APBBMASK__Type.html#af4ff4393f39a5e4a6eadc328c743f282">MCLK_APBBMASK_Type::TCC0_</a></div><div class="ttdeci">uint32_t TCC0_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00315">mclk.h:315</a></div></div>
<div class="ttc" id="aunionMCLK__INTENCLR__Type_html_a5939ed3bab4d09f57b6f038ccb1f5135"><div class="ttname"><a href="unionMCLK__INTENCLR__Type.html#a5939ed3bab4d09f57b6f038ccb1f5135">MCLK_INTENCLR_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00049">mclk.h:49</a></div></div>
<div class="ttc" id="aunionMCLK__APBCMASK__Type_html_a725be183a2a30512a955ef59acc401bd"><div class="ttname"><a href="unionMCLK__APBCMASK__Type.html#a725be183a2a30512a955ef59acc401bd">MCLK_APBCMASK_Type::CCL_</a></div><div class="ttdeci">uint32_t CCL_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00375">mclk.h:375</a></div></div>
<div class="ttc" id="aunionMCLK__APBBMASK__Type_html_a4c6952cb131c60d2497141747bdcf841"><div class="ttname"><a href="unionMCLK__APBBMASK__Type.html#a4c6952cb131c60d2497141747bdcf841">MCLK_APBBMASK_Type::HMATRIX_</a></div><div class="ttdeci">uint32_t HMATRIX_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00310">mclk.h:310</a></div></div>
<div class="ttc" id="aunionMCLK__APBBMASK__Type_html_a83aa57c4c1e2e37082ab31ccecabd3c2"><div class="ttname"><a href="unionMCLK__APBBMASK__Type.html#a83aa57c4c1e2e37082ab31ccecabd3c2">MCLK_APBBMASK_Type::USB_</a></div><div class="ttdeci">uint32_t USB_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00304">mclk.h:304</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_a39b8f22370cc53f9ed7b32bbc8660681"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#a39b8f22370cc53f9ed7b32bbc8660681">MCLK_AHBMASK_Type::GMAC_</a></div><div class="ttdeci">uint32_t GMAC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00168">mclk.h:168</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_a758fc8a43015918366797a8be3e7d36d"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#a758fc8a43015918366797a8be3e7d36d">MCLK_AHBMASK_Type::PAC_</a></div><div class="ttdeci">uint32_t PAC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00166">mclk.h:166</a></div></div>
<div class="ttc" id="aunionMCLK__APBAMASK__Type_html_ab5fee2f33d14c0976b3602ec8021adda"><div class="ttname"><a href="unionMCLK__APBAMASK__Type.html#ab5fee2f33d14c0976b3602ec8021adda">MCLK_APBAMASK_Type::PAC_</a></div><div class="ttdeci">uint32_t PAC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00241">mclk.h:241</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_a8f9758f1796cb4f7d549ccfe05a5feed"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#a8f9758f1796cb4f7d549ccfe05a5feed">MCLK_AHBMASK_Type::HSRAM_</a></div><div class="ttdeci">uint32_t HSRAM_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00161">mclk.h:161</a></div></div>
<div class="ttc" id="aunionMCLK__APBCMASK__Type_html"><div class="ttname"><a href="unionMCLK__APBCMASK__Type.html">MCLK_APBCMASK_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00360">mclk.h:360</a></div></div>
<div class="ttc" id="aunionMCLK__CPUDIV__Type_html_a5cb57c381a27ef87725e4b0047be78c5"><div class="ttname"><a href="unionMCLK__CPUDIV__Type.html#a5cb57c381a27ef87725e4b0047be78c5">MCLK_CPUDIV_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00122">mclk.h:122</a></div></div>
<div class="ttc" id="astructMclk_html_ad82c6c646b216ebc79ed5e6963d3dd47"><div class="ttname"><a href="structMclk.html#ad82c6c646b216ebc79ed5e6963d3dd47">Mclk::INTENSET</a></div><div class="ttdeci">__IO MCLK_INTENSET_Type INTENSET</div><div class="ttdoc">Offset: 0x02 (R/W 8) Interrupt Enable Set.</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00467">mclk.h:467</a></div></div>
<div class="ttc" id="aunionMCLK__APBCMASK__Type_html_a144c1f082fba4894ec954ad936976ee4"><div class="ttname"><a href="unionMCLK__APBCMASK__Type.html#a144c1f082fba4894ec954ad936976ee4">MCLK_APBCMASK_Type::TC4_</a></div><div class="ttdeci">uint32_t TC4_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00366">mclk.h:366</a></div></div>
<div class="ttc" id="aunionMCLK__APBAMASK__Type_html_a1d56a3bc0bbd729249146a61d9a94be4"><div class="ttname"><a href="unionMCLK__APBAMASK__Type.html#a1d56a3bc0bbd729249146a61d9a94be4">MCLK_APBAMASK_Type::PM_</a></div><div class="ttdeci">uint32_t PM_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00242">mclk.h:242</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_a527131ba77ed7958dad0837f7d9e662e"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#a527131ba77ed7958dad0837f7d9e662e">MCLK_AHBMASK_Type::PUKCC_</a></div><div class="ttdeci">uint32_t PUKCC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00174">mclk.h:174</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_a536c97e72d5448573a3d2289ca5d09d7"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#a536c97e72d5448573a3d2289ca5d09d7">MCLK_AHBMASK_Type::CAN1_</a></div><div class="ttdeci">uint32_t CAN1_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00172">mclk.h:172</a></div></div>
<div class="ttc" id="aunionMCLK__APBBMASK__Type_html_a440cddeea64abac388c786c634b1b4e7"><div class="ttname"><a href="unionMCLK__APBBMASK__Type.html#a440cddeea64abac388c786c634b1b4e7">MCLK_APBBMASK_Type::RAMECC_</a></div><div class="ttdeci">uint32_t RAMECC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00320">mclk.h:320</a></div></div>
<div class="ttc" id="aunionMCLK__APBAMASK__Type_html_ab1f2baed5b9ebd2303153ebcbe697d66"><div class="ttname"><a href="unionMCLK__APBAMASK__Type.html#ab1f2baed5b9ebd2303153ebcbe697d66">MCLK_APBAMASK_Type::MCLK_</a></div><div class="ttdeci">uint32_t MCLK_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00243">mclk.h:243</a></div></div>
<div class="ttc" id="aunionMCLK__APBBMASK__Type_html_a7474d1ba1f17c6659ec3c0c431bda460"><div class="ttname"><a href="unionMCLK__APBBMASK__Type.html#a7474d1ba1f17c6659ec3c0c431bda460">MCLK_APBBMASK_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00323">mclk.h:323</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_aabff4279a7844513c82cb20d79103733"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#aabff4279a7844513c82cb20d79103733">MCLK_AHBMASK_Type::DSU_</a></div><div class="ttdeci">uint32_t DSU_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00158">mclk.h:158</a></div></div>
<div class="ttc" id="aunionMCLK__APBDMASK__Type_html_a5bb5b8d0679fb9f2defcee5c1a3ec5f3"><div class="ttname"><a href="unionMCLK__APBDMASK__Type.html#a5bb5b8d0679fb9f2defcee5c1a3ec5f3">MCLK_APBDMASK_Type::I2S_</a></div><div class="ttdeci">uint32_t I2S_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00425">mclk.h:425</a></div></div>
<div class="ttc" id="aunionMCLK__INTFLAG__Type_html_abe84f1da089ed59eabaccdc5b2605b32"><div class="ttname"><a href="unionMCLK__INTFLAG__Type.html#abe84f1da089ed59eabaccdc5b2605b32">MCLK_INTFLAG_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00085">mclk.h:85</a></div></div>
<div class="ttc" id="aunionMCLK__APBAMASK__Type_html_a1ea98bb1063611d628335d460de03389"><div class="ttname"><a href="unionMCLK__APBAMASK__Type.html#a1ea98bb1063611d628335d460de03389">MCLK_APBAMASK_Type::OSCCTRL_</a></div><div class="ttdeci">uint32_t OSCCTRL_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00245">mclk.h:245</a></div></div>
<div class="ttc" id="astructMclk_html_aefa9f88794d425d01ad77fb0b6d77d7a"><div class="ttname"><a href="structMclk.html#aefa9f88794d425d01ad77fb0b6d77d7a">Mclk::APBBMASK</a></div><div class="ttdeci">__IO MCLK_APBBMASK_Type APBBMASK</div><div class="ttdoc">Offset: 0x18 (R/W 32) APBB Mask.</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00474">mclk.h:474</a></div></div>
<div class="ttc" id="aunionMCLK__APBAMASK__Type_html_ae53745b3c32791cde22bc2c7a2d2abbd"><div class="ttname"><a href="unionMCLK__APBAMASK__Type.html#ae53745b3c32791cde22bc2c7a2d2abbd">MCLK_APBAMASK_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00259">mclk.h:259</a></div></div>
<div class="ttc" id="aunionMCLK__APBDMASK__Type_html_ac40de06dce7dcc3ba927e44ec57e27fb"><div class="ttname"><a href="unionMCLK__APBDMASK__Type.html#ac40de06dce7dcc3ba927e44ec57e27fb">MCLK_APBDMASK_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00429">mclk.h:429</a></div></div>
<div class="ttc" id="aunionMCLK__APBBMASK__Type_html_adc7b386d0d0aa95498c70630a8eab6e9"><div class="ttname"><a href="unionMCLK__APBBMASK__Type.html#adc7b386d0d0aa95498c70630a8eab6e9">MCLK_APBBMASK_Type::NVMCTRL_</a></div><div class="ttdeci">uint32_t NVMCTRL_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00306">mclk.h:306</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_a87cc1023b4402c952c344faadaaa2ee0"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#a87cc1023b4402c952c344faadaaa2ee0">MCLK_AHBMASK_Type::HPB0_</a></div><div class="ttdeci">uint32_t HPB0_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00154">mclk.h:154</a></div></div>
<div class="ttc" id="astructMclk_html_a1e40a8efebeb4c0f3369640d85f1c3b0"><div class="ttname"><a href="structMclk.html#a1e40a8efebeb4c0f3369640d85f1c3b0">Mclk::INTENCLR</a></div><div class="ttdeci">__IO MCLK_INTENCLR_Type INTENCLR</div><div class="ttdoc">Offset: 0x01 (R/W 8) Interrupt Enable Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00466">mclk.h:466</a></div></div>
<div class="ttc" id="aunionMCLK__APBCMASK__Type_html_ad0579e7b477b2ea30f060bd6f1f8950b"><div class="ttname"><a href="unionMCLK__APBCMASK__Type.html#ad0579e7b477b2ea30f060bd6f1f8950b">MCLK_APBCMASK_Type::QSPI_</a></div><div class="ttdeci">uint32_t QSPI_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00374">mclk.h:374</a></div></div>
<div class="ttc" id="astructMclk_html_a0098200cac621e1c03b4bb6e0cf91895"><div class="ttname"><a href="structMclk.html#a0098200cac621e1c03b4bb6e0cf91895">Mclk::APBDMASK</a></div><div class="ttdeci">__IO MCLK_APBDMASK_Type APBDMASK</div><div class="ttdoc">Offset: 0x20 (R/W 32) APBD Mask.</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00476">mclk.h:476</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_a54630d796a43eb434e78bc1d5580aa67"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#a54630d796a43eb434e78bc1d5580aa67">MCLK_AHBMASK_Type::QSPI_2X_</a></div><div class="ttdeci">uint32_t QSPI_2X_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00175">mclk.h:175</a></div></div>
<div class="ttc" id="aunionMCLK__APBCMASK__Type_html_aa4a6ca6524bbc8d93834519c249b67a8"><div class="ttname"><a href="unionMCLK__APBCMASK__Type.html#aa4a6ca6524bbc8d93834519c249b67a8">MCLK_APBCMASK_Type::TRNG_</a></div><div class="ttdeci">uint32_t TRNG_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00371">mclk.h:371</a></div></div>
<div class="ttc" id="aunionMCLK__INTENSET__Type_html_ae1113ea8aedf9cde553498987efdfee2"><div class="ttname"><a href="unionMCLK__INTENSET__Type.html#ae1113ea8aedf9cde553498987efdfee2">MCLK_INTENSET_Type::CKRDY</a></div><div class="ttdeci">uint8_t CKRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00064">mclk.h:64</a></div></div>
<div class="ttc" id="aunionMCLK__APBAMASK__Type_html_a794b0d179d846b74f07af2c74d41297e"><div class="ttname"><a href="unionMCLK__APBAMASK__Type.html#a794b0d179d846b74f07af2c74d41297e">MCLK_APBAMASK_Type::TC0_</a></div><div class="ttdeci">uint32_t TC0_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00255">mclk.h:255</a></div></div>
<div class="ttc" id="astructMclk_html_a19047323742152d4d61d3c2c80ff7e4d"><div class="ttname"><a href="structMclk.html#a19047323742152d4d61d3c2c80ff7e4d">Mclk::AHBMASK</a></div><div class="ttdeci">__IO MCLK_AHBMASK_Type AHBMASK</div><div class="ttdoc">Offset: 0x10 (R/W 32) AHB Mask.</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00472">mclk.h:472</a></div></div>
<div class="ttc" id="aunionMCLK__APBCMASK__Type_html_a20de7cb4fa57054779ce79a1fa720da8"><div class="ttname"><a href="unionMCLK__APBCMASK__Type.html#a20de7cb4fa57054779ce79a1fa720da8">MCLK_APBCMASK_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00378">mclk.h:378</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_a2fed3a54166a0535e294263243ce076d"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#a2fed3a54166a0535e294263243ce076d">MCLK_AHBMASK_Type::SDHC0_</a></div><div class="ttdeci">uint32_t SDHC0_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00169">mclk.h:169</a></div></div>
<div class="ttc" id="aunionMCLK__APBBMASK__Type_html_a97af14f0c5106994bdaaae2836702640"><div class="ttname"><a href="unionMCLK__APBBMASK__Type.html#a97af14f0c5106994bdaaae2836702640">MCLK_APBBMASK_Type::TC2_</a></div><div class="ttdeci">uint32_t TC2_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00317">mclk.h:317</a></div></div>
<div class="ttc" id="aunionMCLK__INTFLAG__Type_html"><div class="ttname"><a href="unionMCLK__INTFLAG__Type.html">MCLK_INTFLAG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00080">mclk.h:80</a></div></div>
<div class="ttc" id="aunionMCLK__INTENSET__Type_html"><div class="ttname"><a href="unionMCLK__INTENSET__Type.html">MCLK_INTENSET_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00062">mclk.h:62</a></div></div>
<div class="ttc" id="aunionMCLK__APBAMASK__Type_html_aad44e3cddd50f944d023faf148ea13fb"><div class="ttname"><a href="unionMCLK__APBAMASK__Type.html#aad44e3cddd50f944d023faf148ea13fb">MCLK_APBAMASK_Type::EIC_</a></div><div class="ttdeci">uint32_t EIC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00251">mclk.h:251</a></div></div>
<div class="ttc" id="aunionMCLK__INTFLAG__Type_html_ac6a137413e02c3d01180d58f0ad909c6"><div class="ttname"><a href="unionMCLK__INTFLAG__Type.html#ac6a137413e02c3d01180d58f0ad909c6">MCLK_INTFLAG_Type::uint8_t</a></div><div class="ttdeci">__I uint8_t</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00083">mclk.h:83</a></div></div>
<div class="ttc" id="aunionMCLK__APBBMASK__Type_html"><div class="ttname"><a href="unionMCLK__APBBMASK__Type.html">MCLK_APBBMASK_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00302">mclk.h:302</a></div></div>
<div class="ttc" id="astructMclk_html_a0f0cf763c2481c68676860e3a3d25eef"><div class="ttname"><a href="structMclk.html#a0f0cf763c2481c68676860e3a3d25eef">Mclk::INTFLAG</a></div><div class="ttdeci">__IO MCLK_INTFLAG_Type INTFLAG</div><div class="ttdoc">Offset: 0x03 (R/W 8) Interrupt Flag Status and Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00468">mclk.h:468</a></div></div>
<div class="ttc" id="aunionMCLK__APBAMASK__Type_html_acf8299f01ce6484506ad9b8da1c8766a"><div class="ttname"><a href="unionMCLK__APBAMASK__Type.html#acf8299f01ce6484506ad9b8da1c8766a">MCLK_APBAMASK_Type::OSC32KCTRL_</a></div><div class="ttdeci">uint32_t OSC32KCTRL_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00246">mclk.h:246</a></div></div>
<div class="ttc" id="aunionMCLK__APBAMASK__Type_html_a7f548b39016b325d747201182b25e092"><div class="ttname"><a href="unionMCLK__APBAMASK__Type.html#a7f548b39016b325d747201182b25e092">MCLK_APBAMASK_Type::GCLK_</a></div><div class="ttdeci">uint32_t GCLK_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00248">mclk.h:248</a></div></div>
<div class="ttc" id="aunionMCLK__APBBMASK__Type_html_a4f120aae88e921e10dbb8a48140413f6"><div class="ttname"><a href="unionMCLK__APBBMASK__Type.html#a4f120aae88e921e10dbb8a48140413f6">MCLK_APBBMASK_Type::PORT_</a></div><div class="ttdeci">uint32_t PORT_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00308">mclk.h:308</a></div></div>
<div class="ttc" id="astructMclk_html_a4a4de422fd7e853df9d7b167f0b1779e"><div class="ttname"><a href="structMclk.html#a4a4de422fd7e853df9d7b167f0b1779e">Mclk::CPUDIV</a></div><div class="ttdeci">__IO MCLK_CPUDIV_Type CPUDIV</div><div class="ttdoc">Offset: 0x05 (R/W 8) CPU Clock Division.</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00470">mclk.h:470</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_a704c3ce3dd3205d0bb00c6c2884d7b21"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#a704c3ce3dd3205d0bb00c6c2884d7b21">MCLK_AHBMASK_Type::NVMCTRL_</a></div><div class="ttdeci">uint32_t NVMCTRL_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00160">mclk.h:160</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_a75fcdff02d0ae11b95acf2b5b64c65d3"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#a75fcdff02d0ae11b95acf2b5b64c65d3">MCLK_AHBMASK_Type::USB_</a></div><div class="ttdeci">uint32_t USB_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00164">mclk.h:164</a></div></div>
<div class="ttc" id="aunionMCLK__INTFLAG__Type_html_a4f5c186d4989141c180e44f736a9ecaa"><div class="ttname"><a href="unionMCLK__INTFLAG__Type.html#a4f5c186d4989141c180e44f736a9ecaa">MCLK_INTFLAG_Type::CKRDY</a></div><div class="ttdeci">__I uint8_t CKRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00082">mclk.h:82</a></div></div>
<div class="ttc" id="aunionMCLK__APBAMASK__Type_html_a43fec58267a30eba4e10607ccd81a4e5"><div class="ttname"><a href="unionMCLK__APBAMASK__Type.html#a43fec58267a30eba4e10607ccd81a4e5">MCLK_APBAMASK_Type::SUPC_</a></div><div class="ttdeci">uint32_t SUPC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00247">mclk.h:247</a></div></div>
<div class="ttc" id="aunionMCLK__INTENSET__Type_html_ab61e3e21f4430faca14be73648d9dd5c"><div class="ttname"><a href="unionMCLK__INTENSET__Type.html#ab61e3e21f4430faca14be73648d9dd5c">MCLK_INTENSET_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00067">mclk.h:67</a></div></div>
<div class="ttc" id="aunionMCLK__APBAMASK__Type_html_afc2fdf74f23d7546f7c7001e8ef02e0e"><div class="ttname"><a href="unionMCLK__APBAMASK__Type.html#afc2fdf74f23d7546f7c7001e8ef02e0e">MCLK_APBAMASK_Type::FREQM_</a></div><div class="ttdeci">uint32_t FREQM_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00252">mclk.h:252</a></div></div>
<div class="ttc" id="aunionMCLK__APBDMASK__Type_html_aeec7994ca6d1c37b090ca60afeb2a523"><div class="ttname"><a href="unionMCLK__APBDMASK__Type.html#aeec7994ca6d1c37b090ca60afeb2a523">MCLK_APBDMASK_Type::PCC_</a></div><div class="ttdeci">uint32_t PCC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00426">mclk.h:426</a></div></div>
<div class="ttc" id="astructMclk_html_ad8232a5e70531ff311723357b78d717a"><div class="ttname"><a href="structMclk.html#ad8232a5e70531ff311723357b78d717a">Mclk::APBAMASK</a></div><div class="ttdeci">__IO MCLK_APBAMASK_Type APBAMASK</div><div class="ttdoc">Offset: 0x14 (R/W 32) APBA Mask.</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00473">mclk.h:473</a></div></div>
<div class="ttc" id="aunionMCLK__APBBMASK__Type_html_a407996b7fe033e664c36d1ddbe3d984a"><div class="ttname"><a href="unionMCLK__APBBMASK__Type.html#a407996b7fe033e664c36d1ddbe3d984a">MCLK_APBBMASK_Type::TC3_</a></div><div class="ttdeci">uint32_t TC3_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00318">mclk.h:318</a></div></div>
<div class="ttc" id="aunionMCLK__APBAMASK__Type_html_a792b4cfa06ce0d249329e7e367b73fd7"><div class="ttname"><a href="unionMCLK__APBAMASK__Type.html#a792b4cfa06ce0d249329e7e367b73fd7">MCLK_APBAMASK_Type::RTC_</a></div><div class="ttdeci">uint32_t RTC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00250">mclk.h:250</a></div></div>
<div class="ttc" id="aunionMCLK__APBDMASK__Type_html_a3cceca614eaadc2d58f5a75de19c7ce8"><div class="ttname"><a href="unionMCLK__APBDMASK__Type.html#a3cceca614eaadc2d58f5a75de19c7ce8">MCLK_APBDMASK_Type::SERCOM7_</a></div><div class="ttdeci">uint32_t SERCOM7_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00418">mclk.h:418</a></div></div>
<div class="ttc" id="aunionMCLK__APBCMASK__Type_html_a956617346bc3e88219c8ea75b05df371"><div class="ttname"><a href="unionMCLK__APBCMASK__Type.html#a956617346bc3e88219c8ea75b05df371">MCLK_APBCMASK_Type::GMAC_</a></div><div class="ttdeci">uint32_t GMAC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00363">mclk.h:363</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html">MCLK_AHBMASK_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00152">mclk.h:152</a></div></div>
<div class="ttc" id="aunionMCLK__APBAMASK__Type_html_a685f946a60648f2d7bb697ed87d4015e"><div class="ttname"><a href="unionMCLK__APBAMASK__Type.html#a685f946a60648f2d7bb697ed87d4015e">MCLK_APBAMASK_Type::RSTC_</a></div><div class="ttdeci">uint32_t RSTC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00244">mclk.h:244</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_a8ddd504fd2451971545bb3838c02e9b4"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#a8ddd504fd2451971545bb3838c02e9b4">MCLK_AHBMASK_Type::HPB1_</a></div><div class="ttdeci">uint32_t HPB1_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00155">mclk.h:155</a></div></div>
<div class="ttc" id="aunionMCLK__APBBMASK__Type_html_ac199136fbb46ece9cb165550a52d48d3"><div class="ttname"><a href="unionMCLK__APBBMASK__Type.html#ac199136fbb46ece9cb165550a52d48d3">MCLK_APBBMASK_Type::EVSYS_</a></div><div class="ttdeci">uint32_t EVSYS_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00311">mclk.h:311</a></div></div>
<div class="ttc" id="astructMclk_html"><div class="ttname"><a href="structMclk.html">Mclk</a></div><div class="ttdoc">MCLK hardware registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00464">mclk.h:464</a></div></div>
<div class="ttc" id="aunionMCLK__APBCMASK__Type_html_a9e995c2a63bb196c9a4e83ef2a95e295"><div class="ttname"><a href="unionMCLK__APBCMASK__Type.html#a9e995c2a63bb196c9a4e83ef2a95e295">MCLK_APBCMASK_Type::TCC2_</a></div><div class="ttdeci">uint32_t TCC2_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00364">mclk.h:364</a></div></div>
<div class="ttc" id="aunionMCLK__INTENCLR__Type_html"><div class="ttname"><a href="unionMCLK__INTENCLR__Type.html">MCLK_INTENCLR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00044">mclk.h:44</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_a5bd04ab7f81e23a37e7a32ace41bca67"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#a5bd04ab7f81e23a37e7a32ace41bca67">MCLK_AHBMASK_Type::NVMCTRL_CACHE_</a></div><div class="ttdeci">uint32_t NVMCTRL_CACHE_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00177">mclk.h:177</a></div></div>
<div class="ttc" id="aunionMCLK__APBDMASK__Type_html"><div class="ttname"><a href="unionMCLK__APBDMASK__Type.html">MCLK_APBDMASK_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00413">mclk.h:413</a></div></div>
<div class="ttc" id="aunionMCLK__HSDIV__Type_html_a53e0548fea18eab9caede9be0e531c6e"><div class="ttname"><a href="unionMCLK__HSDIV__Type.html#a53e0548fea18eab9caede9be0e531c6e">MCLK_HSDIV_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00102">mclk.h:102</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_aebab50a1fbc422411ef5481650532a4d"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#aebab50a1fbc422411ef5481650532a4d">MCLK_AHBMASK_Type::HPB3_</a></div><div class="ttdeci">uint32_t HPB3_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00157">mclk.h:157</a></div></div>
<div class="ttc" id="aunionMCLK__HSDIV__Type_html"><div class="ttname"><a href="unionMCLK__HSDIV__Type.html">MCLK_HSDIV_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00098">mclk.h:98</a></div></div>
<div class="ttc" id="asame54n19a_8h_html_a0d957f1433aaf5d70e4dc2b68288442d"><div class="ttname"><a href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a></div><div class="ttdeci">volatile const uint8_t RoReg8</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00053">same54n19a.h:53</a></div></div>
<div class="ttc" id="aunionMCLK__CPUDIV__Type_html"><div class="ttname"><a href="unionMCLK__CPUDIV__Type.html">MCLK_CPUDIV_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00118">mclk.h:118</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_a1d45d805e1429b2852111c044d8e7853"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#a1d45d805e1429b2852111c044d8e7853">MCLK_AHBMASK_Type::NVMCTRL_SMEEPROM_</a></div><div class="ttdeci">uint32_t NVMCTRL_SMEEPROM_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00176">mclk.h:176</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_a4f745e7bf36d4af239ecbbe44e9cac8e"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#a4f745e7bf36d4af239ecbbe44e9cac8e">MCLK_AHBMASK_Type::SDHC1_</a></div><div class="ttdeci">uint32_t SDHC1_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00170">mclk.h:170</a></div></div>
<div class="ttc" id="aunionMCLK__APBDMASK__Type_html_a3481fd3281cd9ef42f42056366236f1b"><div class="ttname"><a href="unionMCLK__APBDMASK__Type.html#a3481fd3281cd9ef42f42056366236f1b">MCLK_APBDMASK_Type::TC7_</a></div><div class="ttdeci">uint32_t TC7_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00421">mclk.h:421</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_ac0e6385fd889b2c8a3ca8aee32e8e40f"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#ac0e6385fd889b2c8a3ca8aee32e8e40f">MCLK_AHBMASK_Type::ICM_</a></div><div class="ttdeci">uint32_t ICM_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00173">mclk.h:173</a></div></div>
<div class="ttc" id="aunionMCLK__APBCMASK__Type_html_a2d443c26b3b185f5019a7931426a1873"><div class="ttname"><a href="unionMCLK__APBCMASK__Type.html#a2d443c26b3b185f5019a7931426a1873">MCLK_APBCMASK_Type::AES_</a></div><div class="ttdeci">uint32_t AES_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00370">mclk.h:370</a></div></div>
<div class="ttc" id="aunionMCLK__APBCMASK__Type_html_ae6c1f2f813f0be390aa0f3df06b78f04"><div class="ttname"><a href="unionMCLK__APBCMASK__Type.html#ae6c1f2f813f0be390aa0f3df06b78f04">MCLK_APBCMASK_Type::PDEC_</a></div><div class="ttdeci">uint32_t PDEC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00368">mclk.h:368</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_aa9661a9a60bd91a616c5367502bb4dee"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#aa9661a9a60bd91a616c5367502bb4dee">MCLK_AHBMASK_Type::CAN0_</a></div><div class="ttdeci">uint32_t CAN0_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00171">mclk.h:171</a></div></div>
<div class="ttc" id="aunionMCLK__APBDMASK__Type_html_ab090bc5d743ecfd0d6b02e88631ad554"><div class="ttname"><a href="unionMCLK__APBDMASK__Type.html#ab090bc5d743ecfd0d6b02e88631ad554">MCLK_APBDMASK_Type::DAC_</a></div><div class="ttdeci">uint32_t DAC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00424">mclk.h:424</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_a6ba501218dba4d741bf7c74331231a4d"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#a6ba501218dba4d741bf7c74331231a4d">MCLK_AHBMASK_Type::HPB2_</a></div><div class="ttdeci">uint32_t HPB2_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00156">mclk.h:156</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_ac6a6b46eb3ac9aa05df86b656b9ed838"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#ac6a6b46eb3ac9aa05df86b656b9ed838">MCLK_AHBMASK_Type::QSPI_</a></div><div class="ttdeci">uint32_t QSPI_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00167">mclk.h:167</a></div></div>
<div class="ttc" id="aunionMCLK__APBBMASK__Type_html_a25cab3e37f85299c717f7c1313cd55b2"><div class="ttname"><a href="unionMCLK__APBBMASK__Type.html#a25cab3e37f85299c717f7c1313cd55b2">MCLK_APBBMASK_Type::SERCOM2_</a></div><div class="ttdeci">uint32_t SERCOM2_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00313">mclk.h:313</a></div></div>
<div class="ttc" id="aunionMCLK__APBDMASK__Type_html_ae9d35575171183f80289c422db82d10e"><div class="ttname"><a href="unionMCLK__APBDMASK__Type.html#ae9d35575171183f80289c422db82d10e">MCLK_APBDMASK_Type::ADC0_</a></div><div class="ttdeci">uint32_t ADC0_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00422">mclk.h:422</a></div></div>
<div class="ttc" id="aunionMCLK__APBAMASK__Type_html_adfb207174d5176e76596e02d9a3ce2e7"><div class="ttname"><a href="unionMCLK__APBAMASK__Type.html#adfb207174d5176e76596e02d9a3ce2e7">MCLK_APBAMASK_Type::SERCOM0_</a></div><div class="ttdeci">uint32_t SERCOM0_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00253">mclk.h:253</a></div></div>
<div class="ttc" id="aunionMCLK__APBAMASK__Type_html_a5e5c131efd3f523957200a120d22169e"><div class="ttname"><a href="unionMCLK__APBAMASK__Type.html#a5e5c131efd3f523957200a120d22169e">MCLK_APBAMASK_Type::WDT_</a></div><div class="ttdeci">uint32_t WDT_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00249">mclk.h:249</a></div></div>
<div class="ttc" id="aunionMCLK__APBCMASK__Type_html_a131255f3c140e0b1f3d2a32a61d68900"><div class="ttname"><a href="unionMCLK__APBCMASK__Type.html#a131255f3c140e0b1f3d2a32a61d68900">MCLK_APBCMASK_Type::TC5_</a></div><div class="ttdeci">uint32_t TC5_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00367">mclk.h:367</a></div></div>
<div class="ttc" id="aunionMCLK__AHBMASK__Type_html_a2ad0cb00d8d7da0e818772f43ceb8b2b"><div class="ttname"><a href="unionMCLK__AHBMASK__Type.html#a2ad0cb00d8d7da0e818772f43ceb8b2b">MCLK_AHBMASK_Type::CMCC_</a></div><div class="ttdeci">uint32_t CMCC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00162">mclk.h:162</a></div></div>
<div class="ttc" id="aunionMCLK__APBBMASK__Type_html_a1f430f1dfa2800830dc9a14249384175"><div class="ttname"><a href="unionMCLK__APBBMASK__Type.html#a1f430f1dfa2800830dc9a14249384175">MCLK_APBBMASK_Type::SERCOM3_</a></div><div class="ttdeci">uint32_t SERCOM3_</div><div class="ttdef"><b>Definition:</b> <a href="component_2mclk_8h_source.html#l00314">mclk.h:314</a></div></div>
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<a href="component_2nvmctrl_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_NVMCTRL_COMPONENT_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_NVMCTRL_COMPONENT_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160; </div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define NVMCTRL_U2409</span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define REV_NVMCTRL 0x100</span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160; </div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="comment">/* -------- NVMCTRL_CTRLA : (NVMCTRL Offset: 0x00) (R/W 16) Control A -------- */</span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00044"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html"> 44</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00046"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html#ad1dcc5ff570a3c710aa29340a0f82445"> 46</a></span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00047"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html#a681489c8c6abf9104a2fab49f0b7f6fe"> 47</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__CTRLA__Type.html#a681489c8c6abf9104a2fab49f0b7f6fe">AUTOWS</a>:1; </div>
<div class="line"><a name="l00048"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html#a3bbab66b83056fd662612f08a715ae30"> 48</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__CTRLA__Type.html#a3bbab66b83056fd662612f08a715ae30">SUSPEN</a>:1; </div>
<div class="line"><a name="l00049"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html#adbd3afd8e391e8c2f43182d8e68f78a4"> 49</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__CTRLA__Type.html#adbd3afd8e391e8c2f43182d8e68f78a4">WMODE</a>:2; </div>
<div class="line"><a name="l00050"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html#a07cb354a8474052820dddae6fb60b601"> 50</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__CTRLA__Type.html#a07cb354a8474052820dddae6fb60b601">PRM</a>:2; </div>
<div class="line"><a name="l00051"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html#ac25be3eb6ef2954bb84c10da7659e4fd"> 51</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__CTRLA__Type.html#ac25be3eb6ef2954bb84c10da7659e4fd">RWS</a>:4; </div>
<div class="line"><a name="l00052"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html#a3437a1c23022e60b41149d46aefbb8a6"> 52</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__CTRLA__Type.html#a3437a1c23022e60b41149d46aefbb8a6">AHBNS0</a>:1; </div>
<div class="line"><a name="l00053"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html#a514f4360f729f5cd90e5421293f620ee"> 53</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__CTRLA__Type.html#a514f4360f729f5cd90e5421293f620ee">AHBNS1</a>:1; </div>
<div class="line"><a name="l00054"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html#a326ec917cd719be68c60f3dba461e529"> 54</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__CTRLA__Type.html#a326ec917cd719be68c60f3dba461e529">CACHEDIS0</a>:1; </div>
<div class="line"><a name="l00055"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html#ae906ccf75cdbcbe61cb732d71b205aaa"> 55</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__CTRLA__Type.html#ae906ccf75cdbcbe61cb732d71b205aaa">CACHEDIS1</a>:1; </div>
<div class="line"><a name="l00056"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html#a08ae6bbf8650bda375060d39f4122221"> 56</a></span>&#160; } bit; </div>
<div class="line"><a name="l00057"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html#a675bd7dd11996723b783028b20c0c280"> 57</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__CTRLA__Type.html#a675bd7dd11996723b783028b20c0c280">reg</a>; </div>
<div class="line"><a name="l00058"></a><span class="lineno"> 58</span>&#160;} <a class="code" href="unionNVMCTRL__CTRLA__Type.html">NVMCTRL_CTRLA_Type</a>;</div>
<div class="line"><a name="l00059"></a><span class="lineno"> 59</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00060"></a><span class="lineno"> 60</span>&#160; </div>
<div class="line"><a name="l00061"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a4853195148a26c13e84af06b27099a5a"> 61</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_OFFSET 0x00 </span></div>
<div class="line"><a name="l00062"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#afda7d874f8e5f91f9590105c7bc984b5"> 62</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_RESETVALUE _U_(0x0004) </span></div>
<div class="line"><a name="l00064"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a257e603f4a7174e1d635448e228bfc07"> 64</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_AUTOWS_Pos 2 </span></div>
<div class="line"><a name="l00065"></a><span class="lineno"> 65</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_AUTOWS (_U_(0x1) &lt;&lt; NVMCTRL_CTRLA_AUTOWS_Pos)</span></div>
<div class="line"><a name="l00066"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a6aab60ee7f62c471607703ddd3b7b6e4"> 66</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_SUSPEN_Pos 3 </span></div>
<div class="line"><a name="l00067"></a><span class="lineno"> 67</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_SUSPEN (_U_(0x1) &lt;&lt; NVMCTRL_CTRLA_SUSPEN_Pos)</span></div>
<div class="line"><a name="l00068"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a42f77205ee1d60ab6bde5ce2f96d81a4"> 68</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_WMODE_Pos 4 </span></div>
<div class="line"><a name="l00069"></a><span class="lineno"> 69</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_WMODE_Msk (_U_(0x3) &lt;&lt; NVMCTRL_CTRLA_WMODE_Pos)</span></div>
<div class="line"><a name="l00070"></a><span class="lineno"> 70</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_WMODE(value) (NVMCTRL_CTRLA_WMODE_Msk &amp; ((value) &lt;&lt; NVMCTRL_CTRLA_WMODE_Pos))</span></div>
<div class="line"><a name="l00071"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a45ac920f783317e834656f1918eaebbd"> 71</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_WMODE_MAN_Val _U_(0x0) </span></div>
<div class="line"><a name="l00072"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a339f6e3dd7fd6de30c66c844b0387e8d"> 72</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_WMODE_ADW_Val _U_(0x1) </span></div>
<div class="line"><a name="l00073"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a13be0616ab7d1862c3ec88ba15e65588"> 73</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_WMODE_AQW_Val _U_(0x2) </span></div>
<div class="line"><a name="l00074"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a01fc2f0de453700c5253ca7aefe693c5"> 74</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_WMODE_AP_Val _U_(0x3) </span></div>
<div class="line"><a name="l00075"></a><span class="lineno"> 75</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_WMODE_MAN (NVMCTRL_CTRLA_WMODE_MAN_Val &lt;&lt; NVMCTRL_CTRLA_WMODE_Pos)</span></div>
<div class="line"><a name="l00076"></a><span class="lineno"> 76</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_WMODE_ADW (NVMCTRL_CTRLA_WMODE_ADW_Val &lt;&lt; NVMCTRL_CTRLA_WMODE_Pos)</span></div>
<div class="line"><a name="l00077"></a><span class="lineno"> 77</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_WMODE_AQW (NVMCTRL_CTRLA_WMODE_AQW_Val &lt;&lt; NVMCTRL_CTRLA_WMODE_Pos)</span></div>
<div class="line"><a name="l00078"></a><span class="lineno"> 78</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_WMODE_AP (NVMCTRL_CTRLA_WMODE_AP_Val &lt;&lt; NVMCTRL_CTRLA_WMODE_Pos)</span></div>
<div class="line"><a name="l00079"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a0f41c800b0d4a71442b2386ed1cbf40e"> 79</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_PRM_Pos 6 </span></div>
<div class="line"><a name="l00080"></a><span class="lineno"> 80</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_PRM_Msk (_U_(0x3) &lt;&lt; NVMCTRL_CTRLA_PRM_Pos)</span></div>
<div class="line"><a name="l00081"></a><span class="lineno"> 81</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_PRM(value) (NVMCTRL_CTRLA_PRM_Msk &amp; ((value) &lt;&lt; NVMCTRL_CTRLA_PRM_Pos))</span></div>
<div class="line"><a name="l00082"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aac7012aec3df3a960aa7429f44d351e5"> 82</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_PRM_SEMIAUTO_Val _U_(0x0) </span></div>
<div class="line"><a name="l00083"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#adb5e8d0001604c78e97b4df1d79c8bd2"> 83</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_PRM_FULLAUTO_Val _U_(0x1) </span></div>
<div class="line"><a name="l00084"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a2eb1d721aa675d6e611dd76a807ca656"> 84</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_PRM_MANUAL_Val _U_(0x3) </span></div>
<div class="line"><a name="l00085"></a><span class="lineno"> 85</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_PRM_SEMIAUTO (NVMCTRL_CTRLA_PRM_SEMIAUTO_Val &lt;&lt; NVMCTRL_CTRLA_PRM_Pos)</span></div>
<div class="line"><a name="l00086"></a><span class="lineno"> 86</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_PRM_FULLAUTO (NVMCTRL_CTRLA_PRM_FULLAUTO_Val &lt;&lt; NVMCTRL_CTRLA_PRM_Pos)</span></div>
<div class="line"><a name="l00087"></a><span class="lineno"> 87</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_PRM_MANUAL (NVMCTRL_CTRLA_PRM_MANUAL_Val &lt;&lt; NVMCTRL_CTRLA_PRM_Pos)</span></div>
<div class="line"><a name="l00088"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a79492707dae78f3e00d769fc45a33fd3"> 88</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_RWS_Pos 8 </span></div>
<div class="line"><a name="l00089"></a><span class="lineno"> 89</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_RWS_Msk (_U_(0xF) &lt;&lt; NVMCTRL_CTRLA_RWS_Pos)</span></div>
<div class="line"><a name="l00090"></a><span class="lineno"> 90</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_RWS(value) (NVMCTRL_CTRLA_RWS_Msk &amp; ((value) &lt;&lt; NVMCTRL_CTRLA_RWS_Pos))</span></div>
<div class="line"><a name="l00091"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aaf7319d1b7b994e5238f58155453a3bd"> 91</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_AHBNS0_Pos 12 </span></div>
<div class="line"><a name="l00092"></a><span class="lineno"> 92</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_AHBNS0 (_U_(0x1) &lt;&lt; NVMCTRL_CTRLA_AHBNS0_Pos)</span></div>
<div class="line"><a name="l00093"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a657739dc21d96ce606df063bbcabb531"> 93</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_AHBNS1_Pos 13 </span></div>
<div class="line"><a name="l00094"></a><span class="lineno"> 94</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_AHBNS1 (_U_(0x1) &lt;&lt; NVMCTRL_CTRLA_AHBNS1_Pos)</span></div>
<div class="line"><a name="l00095"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a4ecb1a6ccfe7b8164364078aac486806"> 95</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_CACHEDIS0_Pos 14 </span></div>
<div class="line"><a name="l00096"></a><span class="lineno"> 96</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_CACHEDIS0 (_U_(0x1) &lt;&lt; NVMCTRL_CTRLA_CACHEDIS0_Pos)</span></div>
<div class="line"><a name="l00097"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a80271bf72ecf3941808bbbd26df4f55c"> 97</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_CACHEDIS1_Pos 15 </span></div>
<div class="line"><a name="l00098"></a><span class="lineno"> 98</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_CACHEDIS1 (_U_(0x1) &lt;&lt; NVMCTRL_CTRLA_CACHEDIS1_Pos)</span></div>
<div class="line"><a name="l00099"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a59f02a3ccafaec97563b7369c88d548c"> 99</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLA_MASK _U_(0xFFFC) </span></div>
<div class="line"><a name="l00101"></a><span class="lineno"> 101</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_CTRLB : (NVMCTRL Offset: 0x04) ( /W 16) Control B -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00102"></a><span class="lineno"> 102</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00103"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLB__Type.html"> 103</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00104"></a><span class="lineno"> 104</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00105"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLB__Type.html#aaecd1479721fa1867507ce56625f5fcd"> 105</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__CTRLB__Type.html#aaecd1479721fa1867507ce56625f5fcd">CMD</a>:7; </div>
<div class="line"><a name="l00106"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLB__Type.html#a541bdd8987472abfd42692c388b1aec7"> 106</a></span>&#160; uint16_t :1; </div>
<div class="line"><a name="l00107"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLB__Type.html#ab8c908cb79b7f76453eeb8d8274c1e78"> 107</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__CTRLB__Type.html#ab8c908cb79b7f76453eeb8d8274c1e78">CMDEX</a>:8; </div>
<div class="line"><a name="l00108"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLB__Type.html#acfb4580d9bb7f23453318dbb5cecdd52"> 108</a></span>&#160; } bit; </div>
<div class="line"><a name="l00109"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLB__Type.html#a1632d370d1a889790f59cd1e1167f07b"> 109</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__CTRLB__Type.html#a1632d370d1a889790f59cd1e1167f07b">reg</a>; </div>
<div class="line"><a name="l00110"></a><span class="lineno"> 110</span>&#160;} <a class="code" href="unionNVMCTRL__CTRLB__Type.html">NVMCTRL_CTRLB_Type</a>;</div>
<div class="line"><a name="l00111"></a><span class="lineno"> 111</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00112"></a><span class="lineno"> 112</span>&#160; </div>
<div class="line"><a name="l00113"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a96b31df212035cedc4f6a370222e5b67"> 113</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_OFFSET 0x04 </span></div>
<div class="line"><a name="l00114"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ac0a835cf0ee617133dc445147d2af448"> 114</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_RESETVALUE _U_(0x0000) </span></div>
<div class="line"><a name="l00116"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ab5ece0aea3c767970b7e9a36d8ff5b09"> 116</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_Pos 0 </span></div>
<div class="line"><a name="l00117"></a><span class="lineno"> 117</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_Msk (_U_(0x7F) &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00118"></a><span class="lineno"> 118</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD(value) (NVMCTRL_CTRLB_CMD_Msk &amp; ((value) &lt;&lt; NVMCTRL_CTRLB_CMD_Pos))</span></div>
<div class="line"><a name="l00119"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#adf1f5d8474585fee271f0962685af28d"> 119</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_EP_Val _U_(0x0) </span></div>
<div class="line"><a name="l00120"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a0ed209557388aeb8be92cf517c864dcb"> 120</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_EB_Val _U_(0x1) </span></div>
<div class="line"><a name="l00121"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a5d327d2e6f86cb3fbd2b6b4fd7cdd68e"> 121</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_WP_Val _U_(0x3) </span></div>
<div class="line"><a name="l00122"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#af34525bef09fb504163897eef0150037"> 122</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_WQW_Val _U_(0x4) </span></div>
<div class="line"><a name="l00123"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a6c2019650a4cd908d3ea5a338beb6ff4"> 123</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_SWRST_Val _U_(0x10) </span></div>
<div class="line"><a name="l00124"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aac904813b0b4baaf6bc705eba9492484"> 124</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_LR_Val _U_(0x11) </span></div>
<div class="line"><a name="l00125"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a6ace8977becb3c48a551ab660ce60304"> 125</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_UR_Val _U_(0x12) </span></div>
<div class="line"><a name="l00126"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ab6548cf96c5a7fd1b260f9be53ed6ced"> 126</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_SPRM_Val _U_(0x13) </span></div>
<div class="line"><a name="l00127"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ac190c581f785840caad085267458456e"> 127</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_CPRM_Val _U_(0x14) </span></div>
<div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ab61f899ee1eb9d625ec3f4d2a17c9474"> 128</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_PBC_Val _U_(0x15) </span></div>
<div class="line"><a name="l00129"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aadf20f72205d9c9fd72880936f9ee01f"> 129</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_SSB_Val _U_(0x16) </span></div>
<div class="line"><a name="l00130"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a6f03386bf7b354fda9387d2c52db86d1"> 130</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_BKSWRST_Val _U_(0x17) </span></div>
<div class="line"><a name="l00131"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a09c93870736f457ba8987109ae500640"> 131</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_CELCK_Val _U_(0x18) </span></div>
<div class="line"><a name="l00132"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ab97117cbba584df4bf0620b6a40ef844"> 132</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_CEULCK_Val _U_(0x19) </span></div>
<div class="line"><a name="l00133"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a0b282c1f3bd4b7133f583caf095bd557"> 133</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_SBPDIS_Val _U_(0x1A) </span></div>
<div class="line"><a name="l00134"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a5a999f4f70c43b441a20c76c5ca8cc5c"> 134</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_CBPDIS_Val _U_(0x1B) </span></div>
<div class="line"><a name="l00135"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a026140326eacb0754ddca2c6cb722081"> 135</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_ASEES0_Val _U_(0x30) </span></div>
<div class="line"><a name="l00136"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a4f80ee71f9e77eec26ae1185aefaada2"> 136</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_ASEES1_Val _U_(0x31) </span></div>
<div class="line"><a name="l00137"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#af7e06bd5d2cfb32c1840887fd46748c1"> 137</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_SEERALOC_Val _U_(0x32) </span></div>
<div class="line"><a name="l00138"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ae3721546ed0ce85d258030640db36cdf"> 138</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_SEEFLUSH_Val _U_(0x33) </span></div>
<div class="line"><a name="l00139"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a8b5bfcf07c93cafca14275059bae1063"> 139</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_LSEE_Val _U_(0x34) </span></div>
<div class="line"><a name="l00140"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#af2c5cda4f74dd820709364d368d94d2e"> 140</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_USEE_Val _U_(0x35) </span></div>
<div class="line"><a name="l00141"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a424082dbd173d10a016ce39edf650ac4"> 141</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_LSEER_Val _U_(0x36) </span></div>
<div class="line"><a name="l00142"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ac63d1fd2efbde3aebed27b21eb0c16e8"> 142</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_USEER_Val _U_(0x37) </span></div>
<div class="line"><a name="l00143"></a><span class="lineno"> 143</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_EP (NVMCTRL_CTRLB_CMD_EP_Val &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00144"></a><span class="lineno"> 144</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_EB (NVMCTRL_CTRLB_CMD_EB_Val &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00145"></a><span class="lineno"> 145</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_WP (NVMCTRL_CTRLB_CMD_WP_Val &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00146"></a><span class="lineno"> 146</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_WQW (NVMCTRL_CTRLB_CMD_WQW_Val &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00147"></a><span class="lineno"> 147</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_SWRST (NVMCTRL_CTRLB_CMD_SWRST_Val &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00148"></a><span class="lineno"> 148</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_LR (NVMCTRL_CTRLB_CMD_LR_Val &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00149"></a><span class="lineno"> 149</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_UR (NVMCTRL_CTRLB_CMD_UR_Val &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00150"></a><span class="lineno"> 150</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_SPRM (NVMCTRL_CTRLB_CMD_SPRM_Val &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00151"></a><span class="lineno"> 151</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_CPRM (NVMCTRL_CTRLB_CMD_CPRM_Val &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00152"></a><span class="lineno"> 152</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_PBC (NVMCTRL_CTRLB_CMD_PBC_Val &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00153"></a><span class="lineno"> 153</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_SSB (NVMCTRL_CTRLB_CMD_SSB_Val &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00154"></a><span class="lineno"> 154</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_BKSWRST (NVMCTRL_CTRLB_CMD_BKSWRST_Val &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00155"></a><span class="lineno"> 155</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_CELCK (NVMCTRL_CTRLB_CMD_CELCK_Val &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00156"></a><span class="lineno"> 156</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_CEULCK (NVMCTRL_CTRLB_CMD_CEULCK_Val &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00157"></a><span class="lineno"> 157</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_SBPDIS (NVMCTRL_CTRLB_CMD_SBPDIS_Val &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00158"></a><span class="lineno"> 158</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_CBPDIS (NVMCTRL_CTRLB_CMD_CBPDIS_Val &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00159"></a><span class="lineno"> 159</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_ASEES0 (NVMCTRL_CTRLB_CMD_ASEES0_Val &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00160"></a><span class="lineno"> 160</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_ASEES1 (NVMCTRL_CTRLB_CMD_ASEES1_Val &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00161"></a><span class="lineno"> 161</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_SEERALOC (NVMCTRL_CTRLB_CMD_SEERALOC_Val &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00162"></a><span class="lineno"> 162</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_SEEFLUSH (NVMCTRL_CTRLB_CMD_SEEFLUSH_Val &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00163"></a><span class="lineno"> 163</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_LSEE (NVMCTRL_CTRLB_CMD_LSEE_Val &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00164"></a><span class="lineno"> 164</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_USEE (NVMCTRL_CTRLB_CMD_USEE_Val &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00165"></a><span class="lineno"> 165</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_LSEER (NVMCTRL_CTRLB_CMD_LSEER_Val &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00166"></a><span class="lineno"> 166</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMD_USEER (NVMCTRL_CTRLB_CMD_USEER_Val &lt;&lt; NVMCTRL_CTRLB_CMD_Pos)</span></div>
<div class="line"><a name="l00167"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aeea03491d70dfffbc8667e69e5aabca6"> 167</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMDEX_Pos 8 </span></div>
<div class="line"><a name="l00168"></a><span class="lineno"> 168</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMDEX_Msk (_U_(0xFF) &lt;&lt; NVMCTRL_CTRLB_CMDEX_Pos)</span></div>
<div class="line"><a name="l00169"></a><span class="lineno"> 169</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMDEX(value) (NVMCTRL_CTRLB_CMDEX_Msk &amp; ((value) &lt;&lt; NVMCTRL_CTRLB_CMDEX_Pos))</span></div>
<div class="line"><a name="l00170"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ab22f4e79b9b7373890149b2fe0966192"> 170</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMDEX_KEY_Val _U_(0xA5) </span></div>
<div class="line"><a name="l00171"></a><span class="lineno"> 171</span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_CMDEX_KEY (NVMCTRL_CTRLB_CMDEX_KEY_Val &lt;&lt; NVMCTRL_CTRLB_CMDEX_Pos)</span></div>
<div class="line"><a name="l00172"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aaf2272ac3ee696dfe0d222a87bc7cbe1"> 172</a></span>&#160;<span class="preprocessor">#define NVMCTRL_CTRLB_MASK _U_(0xFF7F) </span></div>
<div class="line"><a name="l00174"></a><span class="lineno"> 174</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_PARAM : (NVMCTRL Offset: 0x08) (R/ 32) NVM Parameter -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00175"></a><span class="lineno"> 175</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00176"></a><span class="lineno"><a class="line" href="unionNVMCTRL__PARAM__Type.html"> 176</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00177"></a><span class="lineno"> 177</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00178"></a><span class="lineno"><a class="line" href="unionNVMCTRL__PARAM__Type.html#ab027731ea54fbc5dc42c1f1eb988a498"> 178</a></span>&#160; uint32_t <a class="code" href="unionNVMCTRL__PARAM__Type.html#ab027731ea54fbc5dc42c1f1eb988a498">NVMP</a>:16; </div>
<div class="line"><a name="l00179"></a><span class="lineno"><a class="line" href="unionNVMCTRL__PARAM__Type.html#a1614279db2de41ec8c6b19e2b60c873c"> 179</a></span>&#160; uint32_t <a class="code" href="unionNVMCTRL__PARAM__Type.html#a1614279db2de41ec8c6b19e2b60c873c">PSZ</a>:3; </div>
<div class="line"><a name="l00180"></a><span class="lineno"><a class="line" href="unionNVMCTRL__PARAM__Type.html#ae35882817f7518d6e3581b5bf6ce12d0"> 180</a></span>&#160; uint32_t :12; </div>
<div class="line"><a name="l00181"></a><span class="lineno"><a class="line" href="unionNVMCTRL__PARAM__Type.html#ac83f36a3d86a5e6dd9514bd4568a3a92"> 181</a></span>&#160; uint32_t <a class="code" href="unionNVMCTRL__PARAM__Type.html#ac83f36a3d86a5e6dd9514bd4568a3a92">SEE</a>:1; </div>
<div class="line"><a name="l00182"></a><span class="lineno"><a class="line" href="unionNVMCTRL__PARAM__Type.html#aa007e1ecf23c1be2bf9845f1380b491d"> 182</a></span>&#160; } bit; </div>
<div class="line"><a name="l00183"></a><span class="lineno"><a class="line" href="unionNVMCTRL__PARAM__Type.html#a06e3104745c4aa4dc7c65a7b876b3cfd"> 183</a></span>&#160; uint32_t <a class="code" href="unionNVMCTRL__PARAM__Type.html#a06e3104745c4aa4dc7c65a7b876b3cfd">reg</a>; </div>
<div class="line"><a name="l00184"></a><span class="lineno"> 184</span>&#160;} <a class="code" href="unionNVMCTRL__PARAM__Type.html">NVMCTRL_PARAM_Type</a>;</div>
<div class="line"><a name="l00185"></a><span class="lineno"> 185</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00186"></a><span class="lineno"> 186</span>&#160; </div>
<div class="line"><a name="l00187"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a6624597605fc956079a9818778a34abe"> 187</a></span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_OFFSET 0x08 </span></div>
<div class="line"><a name="l00188"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a70c3c90bcb2318bb472cc9565751ff04"> 188</a></span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_RESETVALUE _U_(0x00060000) </span></div>
<div class="line"><a name="l00190"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a08f9f5de86a6c44ce2d6ecdb9f995443"> 190</a></span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_NVMP_Pos 0 </span></div>
<div class="line"><a name="l00191"></a><span class="lineno"> 191</span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_NVMP_Msk (_U_(0xFFFF) &lt;&lt; NVMCTRL_PARAM_NVMP_Pos)</span></div>
<div class="line"><a name="l00192"></a><span class="lineno"> 192</span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_NVMP(value) (NVMCTRL_PARAM_NVMP_Msk &amp; ((value) &lt;&lt; NVMCTRL_PARAM_NVMP_Pos))</span></div>
<div class="line"><a name="l00193"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#abec5624158a60a0f0d0b8a62afe18af8"> 193</a></span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_PSZ_Pos 16 </span></div>
<div class="line"><a name="l00194"></a><span class="lineno"> 194</span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_PSZ_Msk (_U_(0x7) &lt;&lt; NVMCTRL_PARAM_PSZ_Pos)</span></div>
<div class="line"><a name="l00195"></a><span class="lineno"> 195</span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_PSZ(value) (NVMCTRL_PARAM_PSZ_Msk &amp; ((value) &lt;&lt; NVMCTRL_PARAM_PSZ_Pos))</span></div>
<div class="line"><a name="l00196"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a9a83c6574dc48ac1c69701673922d2f3"> 196</a></span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_PSZ_8_Val _U_(0x0) </span></div>
<div class="line"><a name="l00197"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a10b4a62c2bab14a45967ee663cfbdd10"> 197</a></span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_PSZ_16_Val _U_(0x1) </span></div>
<div class="line"><a name="l00198"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ae80b28e70177db78d7d5a0d748809192"> 198</a></span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_PSZ_32_Val _U_(0x2) </span></div>
<div class="line"><a name="l00199"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a464e20508682489f9283f535148c27b1"> 199</a></span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_PSZ_64_Val _U_(0x3) </span></div>
<div class="line"><a name="l00200"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ac8f620598445b047b44dfc8081439744"> 200</a></span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_PSZ_128_Val _U_(0x4) </span></div>
<div class="line"><a name="l00201"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a7f53d9c6161bf83ef35275e90438e9e2"> 201</a></span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_PSZ_256_Val _U_(0x5) </span></div>
<div class="line"><a name="l00202"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ac19388a03c011b81e82b35dfd7da69b1"> 202</a></span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_PSZ_512_Val _U_(0x6) </span></div>
<div class="line"><a name="l00203"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a7bffb82ccc9a71552882baabdfa97b13"> 203</a></span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_PSZ_1024_Val _U_(0x7) </span></div>
<div class="line"><a name="l00204"></a><span class="lineno"> 204</span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_PSZ_8 (NVMCTRL_PARAM_PSZ_8_Val &lt;&lt; NVMCTRL_PARAM_PSZ_Pos)</span></div>
<div class="line"><a name="l00205"></a><span class="lineno"> 205</span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_PSZ_16 (NVMCTRL_PARAM_PSZ_16_Val &lt;&lt; NVMCTRL_PARAM_PSZ_Pos)</span></div>
<div class="line"><a name="l00206"></a><span class="lineno"> 206</span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_PSZ_32 (NVMCTRL_PARAM_PSZ_32_Val &lt;&lt; NVMCTRL_PARAM_PSZ_Pos)</span></div>
<div class="line"><a name="l00207"></a><span class="lineno"> 207</span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_PSZ_64 (NVMCTRL_PARAM_PSZ_64_Val &lt;&lt; NVMCTRL_PARAM_PSZ_Pos)</span></div>
<div class="line"><a name="l00208"></a><span class="lineno"> 208</span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_PSZ_128 (NVMCTRL_PARAM_PSZ_128_Val &lt;&lt; NVMCTRL_PARAM_PSZ_Pos)</span></div>
<div class="line"><a name="l00209"></a><span class="lineno"> 209</span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_PSZ_256 (NVMCTRL_PARAM_PSZ_256_Val &lt;&lt; NVMCTRL_PARAM_PSZ_Pos)</span></div>
<div class="line"><a name="l00210"></a><span class="lineno"> 210</span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_PSZ_512 (NVMCTRL_PARAM_PSZ_512_Val &lt;&lt; NVMCTRL_PARAM_PSZ_Pos)</span></div>
<div class="line"><a name="l00211"></a><span class="lineno"> 211</span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_PSZ_1024 (NVMCTRL_PARAM_PSZ_1024_Val &lt;&lt; NVMCTRL_PARAM_PSZ_Pos)</span></div>
<div class="line"><a name="l00212"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ae0b8f7fc4e55aa43cca20f4c373aa876"> 212</a></span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_SEE_Pos 31 </span></div>
<div class="line"><a name="l00213"></a><span class="lineno"> 213</span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_SEE (_U_(0x1) &lt;&lt; NVMCTRL_PARAM_SEE_Pos)</span></div>
<div class="line"><a name="l00214"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aadfbc70cd6cbb088b215b8e6322c4295"> 214</a></span>&#160;<span class="preprocessor">#define NVMCTRL_PARAM_MASK _U_(0x8007FFFF) </span></div>
<div class="line"><a name="l00216"></a><span class="lineno"> 216</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_INTENCLR : (NVMCTRL Offset: 0x0C) (R/W 16) Interrupt Enable Clear -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00217"></a><span class="lineno"> 217</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00218"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html"> 218</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00219"></a><span class="lineno"> 219</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00220"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#a8b41fdb24d215b802cd106422eb57615"> 220</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTENCLR__Type.html#a8b41fdb24d215b802cd106422eb57615">DONE</a>:1; </div>
<div class="line"><a name="l00221"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#a2cfa4ba94c13f8960beaf5459555d1d5"> 221</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTENCLR__Type.html#a2cfa4ba94c13f8960beaf5459555d1d5">ADDRE</a>:1; </div>
<div class="line"><a name="l00222"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#aed69c41dc59031c87a1df89d327ea2be"> 222</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTENCLR__Type.html#aed69c41dc59031c87a1df89d327ea2be">PROGE</a>:1; </div>
<div class="line"><a name="l00223"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#ad93e68e0100ba0b239128b23b3eab541"> 223</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTENCLR__Type.html#ad93e68e0100ba0b239128b23b3eab541">LOCKE</a>:1; </div>
<div class="line"><a name="l00224"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#a7310a69bb013cea08fac7c568d16bc53"> 224</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTENCLR__Type.html#a7310a69bb013cea08fac7c568d16bc53">ECCSE</a>:1; </div>
<div class="line"><a name="l00225"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#a8a2e5f922dcdf2760d124075e33c71b7"> 225</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTENCLR__Type.html#a8a2e5f922dcdf2760d124075e33c71b7">ECCDE</a>:1; </div>
<div class="line"><a name="l00226"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#ad8f42a0e30a1faa286a7ca808a63a7c0"> 226</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTENCLR__Type.html#ad8f42a0e30a1faa286a7ca808a63a7c0">NVME</a>:1; </div>
<div class="line"><a name="l00227"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#af25cfd3180fc6f4f819cbd4fa257e771"> 227</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTENCLR__Type.html#af25cfd3180fc6f4f819cbd4fa257e771">SUSP</a>:1; </div>
<div class="line"><a name="l00228"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#a575d7ed5e8b871be73fc81559a5fb9da"> 228</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTENCLR__Type.html#a575d7ed5e8b871be73fc81559a5fb9da">SEESFULL</a>:1; </div>
<div class="line"><a name="l00229"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#a1329af6b22aba94dbf2995040f43f081"> 229</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTENCLR__Type.html#a1329af6b22aba94dbf2995040f43f081">SEESOVF</a>:1; </div>
<div class="line"><a name="l00230"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#a9dab229444ed5f2d906a99473b04b9ae"> 230</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTENCLR__Type.html#a9dab229444ed5f2d906a99473b04b9ae">SEEWRC</a>:1; </div>
<div class="line"><a name="l00231"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#a28266ba0962ea2300d50b611c6e88c8b"> 231</a></span>&#160; uint16_t :5; </div>
<div class="line"><a name="l00232"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#a52d8f93238f099846734e29aa9847594"> 232</a></span>&#160; } bit; </div>
<div class="line"><a name="l00233"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#aba1d27ddfc21e516560e8a2dc3d88161"> 233</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTENCLR__Type.html#aba1d27ddfc21e516560e8a2dc3d88161">reg</a>; </div>
<div class="line"><a name="l00234"></a><span class="lineno"> 234</span>&#160;} <a class="code" href="unionNVMCTRL__INTENCLR__Type.html">NVMCTRL_INTENCLR_Type</a>;</div>
<div class="line"><a name="l00235"></a><span class="lineno"> 235</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00236"></a><span class="lineno"> 236</span>&#160; </div>
<div class="line"><a name="l00237"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#af69e18ecea21ffbf47dc28f66161a768"> 237</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_OFFSET 0x0C </span></div>
<div class="line"><a name="l00238"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#acc5d7dab614b1d4e05402a8c97de3954"> 238</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_RESETVALUE _U_(0x0000) </span></div>
<div class="line"><a name="l00240"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ab303d4dd896628711c798a2d81c243e9"> 240</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_DONE_Pos 0 </span></div>
<div class="line"><a name="l00241"></a><span class="lineno"> 241</span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_DONE (_U_(0x1) &lt;&lt; NVMCTRL_INTENCLR_DONE_Pos)</span></div>
<div class="line"><a name="l00242"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a008fce13f42375fa0ec8dfa8ee6e25ad"> 242</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_ADDRE_Pos 1 </span></div>
<div class="line"><a name="l00243"></a><span class="lineno"> 243</span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_ADDRE (_U_(0x1) &lt;&lt; NVMCTRL_INTENCLR_ADDRE_Pos)</span></div>
<div class="line"><a name="l00244"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a52b68cb512c19b5711f09698f6b93493"> 244</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_PROGE_Pos 2 </span></div>
<div class="line"><a name="l00245"></a><span class="lineno"> 245</span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_PROGE (_U_(0x1) &lt;&lt; NVMCTRL_INTENCLR_PROGE_Pos)</span></div>
<div class="line"><a name="l00246"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ac1fa728d12605ea718efcc90936647d0"> 246</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_LOCKE_Pos 3 </span></div>
<div class="line"><a name="l00247"></a><span class="lineno"> 247</span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_LOCKE (_U_(0x1) &lt;&lt; NVMCTRL_INTENCLR_LOCKE_Pos)</span></div>
<div class="line"><a name="l00248"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a86ceb9ac83904784c8ad062991023a48"> 248</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_ECCSE_Pos 4 </span></div>
<div class="line"><a name="l00249"></a><span class="lineno"> 249</span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_ECCSE (_U_(0x1) &lt;&lt; NVMCTRL_INTENCLR_ECCSE_Pos)</span></div>
<div class="line"><a name="l00250"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a014cf0f8bd9d879896f26f9aa95b1d5f"> 250</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_ECCDE_Pos 5 </span></div>
<div class="line"><a name="l00251"></a><span class="lineno"> 251</span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_ECCDE (_U_(0x1) &lt;&lt; NVMCTRL_INTENCLR_ECCDE_Pos)</span></div>
<div class="line"><a name="l00252"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#af50b2e19d9eafcb99eb73dc8e63236d9"> 252</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_NVME_Pos 6 </span></div>
<div class="line"><a name="l00253"></a><span class="lineno"> 253</span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_NVME (_U_(0x1) &lt;&lt; NVMCTRL_INTENCLR_NVME_Pos)</span></div>
<div class="line"><a name="l00254"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a8c0417f3d672b2fd21a2864eb416d1f8"> 254</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_SUSP_Pos 7 </span></div>
<div class="line"><a name="l00255"></a><span class="lineno"> 255</span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_SUSP (_U_(0x1) &lt;&lt; NVMCTRL_INTENCLR_SUSP_Pos)</span></div>
<div class="line"><a name="l00256"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a1790fb571650fdddf88e6901335be515"> 256</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_SEESFULL_Pos 8 </span></div>
<div class="line"><a name="l00257"></a><span class="lineno"> 257</span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_SEESFULL (_U_(0x1) &lt;&lt; NVMCTRL_INTENCLR_SEESFULL_Pos)</span></div>
<div class="line"><a name="l00258"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a743129233f8516c29b12e381951077dd"> 258</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_SEESOVF_Pos 9 </span></div>
<div class="line"><a name="l00259"></a><span class="lineno"> 259</span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_SEESOVF (_U_(0x1) &lt;&lt; NVMCTRL_INTENCLR_SEESOVF_Pos)</span></div>
<div class="line"><a name="l00260"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#af2ac2b08e506101132051821be8847c2"> 260</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_SEEWRC_Pos 10 </span></div>
<div class="line"><a name="l00261"></a><span class="lineno"> 261</span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_SEEWRC (_U_(0x1) &lt;&lt; NVMCTRL_INTENCLR_SEEWRC_Pos)</span></div>
<div class="line"><a name="l00262"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a399cac515ae8b6bfd864314732defbe9"> 262</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENCLR_MASK _U_(0x07FF) </span></div>
<div class="line"><a name="l00264"></a><span class="lineno"> 264</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_INTENSET : (NVMCTRL Offset: 0x0E) (R/W 16) Interrupt Enable Set -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00265"></a><span class="lineno"> 265</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00266"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html"> 266</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00267"></a><span class="lineno"> 267</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00268"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#a7e11e9831f0d712a0570fc5b8e157a80"> 268</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTENSET__Type.html#a7e11e9831f0d712a0570fc5b8e157a80">DONE</a>:1; </div>
<div class="line"><a name="l00269"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#aad10b082b6189e41f108d5c40141f90f"> 269</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTENSET__Type.html#aad10b082b6189e41f108d5c40141f90f">ADDRE</a>:1; </div>
<div class="line"><a name="l00270"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#a9b285721f768f3be959b53ecfc8e29e3"> 270</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTENSET__Type.html#a9b285721f768f3be959b53ecfc8e29e3">PROGE</a>:1; </div>
<div class="line"><a name="l00271"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#a7a3225bbceed8f691b9d2815e3cead70"> 271</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTENSET__Type.html#a7a3225bbceed8f691b9d2815e3cead70">LOCKE</a>:1; </div>
<div class="line"><a name="l00272"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#a2f4b33b3e2534635fc995f490084b8f2"> 272</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTENSET__Type.html#a2f4b33b3e2534635fc995f490084b8f2">ECCSE</a>:1; </div>
<div class="line"><a name="l00273"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#a677dfd10acf0011a22ee327a89a9363b"> 273</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTENSET__Type.html#a677dfd10acf0011a22ee327a89a9363b">ECCDE</a>:1; </div>
<div class="line"><a name="l00274"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#a3453ea9b60b5aab08ac77b077050d18c"> 274</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTENSET__Type.html#a3453ea9b60b5aab08ac77b077050d18c">NVME</a>:1; </div>
<div class="line"><a name="l00275"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#a367a53f996895c84cc7772398c60d03b"> 275</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTENSET__Type.html#a367a53f996895c84cc7772398c60d03b">SUSP</a>:1; </div>
<div class="line"><a name="l00276"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#a0d4f7db8fe0470fd5642e4d0b284f8b4"> 276</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTENSET__Type.html#a0d4f7db8fe0470fd5642e4d0b284f8b4">SEESFULL</a>:1; </div>
<div class="line"><a name="l00277"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#abf97f6c7c80d31d7a6d1b2f513166dad"> 277</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTENSET__Type.html#abf97f6c7c80d31d7a6d1b2f513166dad">SEESOVF</a>:1; </div>
<div class="line"><a name="l00278"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#a9ac58004be432a1220e42351e8e081aa"> 278</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTENSET__Type.html#a9ac58004be432a1220e42351e8e081aa">SEEWRC</a>:1; </div>
<div class="line"><a name="l00279"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#ae0c7109506ed899029818ba4515b26c9"> 279</a></span>&#160; uint16_t :5; </div>
<div class="line"><a name="l00280"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#a8d477a4d482e43ce20935ea549558da8"> 280</a></span>&#160; } bit; </div>
<div class="line"><a name="l00281"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#afd3d225c78e3421a2006e6b9ff886d46"> 281</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTENSET__Type.html#afd3d225c78e3421a2006e6b9ff886d46">reg</a>; </div>
<div class="line"><a name="l00282"></a><span class="lineno"> 282</span>&#160;} <a class="code" href="unionNVMCTRL__INTENSET__Type.html">NVMCTRL_INTENSET_Type</a>;</div>
<div class="line"><a name="l00283"></a><span class="lineno"> 283</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00284"></a><span class="lineno"> 284</span>&#160; </div>
<div class="line"><a name="l00285"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#acbc15881a076ca6d111540304e571a20"> 285</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_OFFSET 0x0E </span></div>
<div class="line"><a name="l00286"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ad48eea420ef04c6f0c75a074991ad6d6"> 286</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_RESETVALUE _U_(0x0000) </span></div>
<div class="line"><a name="l00288"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a0a8101c9e2b9d16bc4a8a1edbb3ff97a"> 288</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_DONE_Pos 0 </span></div>
<div class="line"><a name="l00289"></a><span class="lineno"> 289</span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_DONE (_U_(0x1) &lt;&lt; NVMCTRL_INTENSET_DONE_Pos)</span></div>
<div class="line"><a name="l00290"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a7ce68e10f261102ba48b958d85fa3e97"> 290</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_ADDRE_Pos 1 </span></div>
<div class="line"><a name="l00291"></a><span class="lineno"> 291</span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_ADDRE (_U_(0x1) &lt;&lt; NVMCTRL_INTENSET_ADDRE_Pos)</span></div>
<div class="line"><a name="l00292"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ab0e7649e23ebb619b9f3cba68aa1650e"> 292</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_PROGE_Pos 2 </span></div>
<div class="line"><a name="l00293"></a><span class="lineno"> 293</span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_PROGE (_U_(0x1) &lt;&lt; NVMCTRL_INTENSET_PROGE_Pos)</span></div>
<div class="line"><a name="l00294"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a83f6cb52007a64ba21de6b059c78a530"> 294</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_LOCKE_Pos 3 </span></div>
<div class="line"><a name="l00295"></a><span class="lineno"> 295</span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_LOCKE (_U_(0x1) &lt;&lt; NVMCTRL_INTENSET_LOCKE_Pos)</span></div>
<div class="line"><a name="l00296"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ae004bc06eb8e11c5a364b0de5edf369f"> 296</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_ECCSE_Pos 4 </span></div>
<div class="line"><a name="l00297"></a><span class="lineno"> 297</span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_ECCSE (_U_(0x1) &lt;&lt; NVMCTRL_INTENSET_ECCSE_Pos)</span></div>
<div class="line"><a name="l00298"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aaf23d6f9f57daf3723ba6c3bf85a1ffd"> 298</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_ECCDE_Pos 5 </span></div>
<div class="line"><a name="l00299"></a><span class="lineno"> 299</span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_ECCDE (_U_(0x1) &lt;&lt; NVMCTRL_INTENSET_ECCDE_Pos)</span></div>
<div class="line"><a name="l00300"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a05655c435fcc534d5b7aee5f88809a70"> 300</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_NVME_Pos 6 </span></div>
<div class="line"><a name="l00301"></a><span class="lineno"> 301</span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_NVME (_U_(0x1) &lt;&lt; NVMCTRL_INTENSET_NVME_Pos)</span></div>
<div class="line"><a name="l00302"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a59b343b6ae84f68d8b6e2230f88fbd0d"> 302</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_SUSP_Pos 7 </span></div>
<div class="line"><a name="l00303"></a><span class="lineno"> 303</span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_SUSP (_U_(0x1) &lt;&lt; NVMCTRL_INTENSET_SUSP_Pos)</span></div>
<div class="line"><a name="l00304"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a7114d359880d3c94e97b543c6e6ea9cf"> 304</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_SEESFULL_Pos 8 </span></div>
<div class="line"><a name="l00305"></a><span class="lineno"> 305</span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_SEESFULL (_U_(0x1) &lt;&lt; NVMCTRL_INTENSET_SEESFULL_Pos)</span></div>
<div class="line"><a name="l00306"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a98a8f6fcee8a62386dbc640ad5e1979e"> 306</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_SEESOVF_Pos 9 </span></div>
<div class="line"><a name="l00307"></a><span class="lineno"> 307</span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_SEESOVF (_U_(0x1) &lt;&lt; NVMCTRL_INTENSET_SEESOVF_Pos)</span></div>
<div class="line"><a name="l00308"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#af1c59aa0745e03430697b51742b6c2ba"> 308</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_SEEWRC_Pos 10 </span></div>
<div class="line"><a name="l00309"></a><span class="lineno"> 309</span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_SEEWRC (_U_(0x1) &lt;&lt; NVMCTRL_INTENSET_SEEWRC_Pos)</span></div>
<div class="line"><a name="l00310"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ac49294b6f689477f53cabe7aba8a4975"> 310</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTENSET_MASK _U_(0x07FF) </span></div>
<div class="line"><a name="l00312"></a><span class="lineno"> 312</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_INTFLAG : (NVMCTRL Offset: 0x10) (R/W 16) Interrupt Flag Status and Clear -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00313"></a><span class="lineno"> 313</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00314"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html"> 314</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{ <span class="comment">// __I to avoid read-modify-write on write-to-clear register</span></div>
<div class="line"><a name="l00315"></a><span class="lineno"> 315</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00316"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#a48c18d7fcb2b36e3f944962d2c26d17f"> 316</a></span>&#160; __I uint16_t <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#a48c18d7fcb2b36e3f944962d2c26d17f">DONE</a>:1; </div>
<div class="line"><a name="l00317"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#a188f8921aa82b38489c488cfb99d23f0"> 317</a></span>&#160; __I uint16_t <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#a188f8921aa82b38489c488cfb99d23f0">ADDRE</a>:1; </div>
<div class="line"><a name="l00318"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#ae67c4f1da3c4d05980e4bfa83b9e93a6"> 318</a></span>&#160; __I uint16_t <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#ae67c4f1da3c4d05980e4bfa83b9e93a6">PROGE</a>:1; </div>
<div class="line"><a name="l00319"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#a5a443103568d0046dc08455295d84a97"> 319</a></span>&#160; __I uint16_t <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#a5a443103568d0046dc08455295d84a97">LOCKE</a>:1; </div>
<div class="line"><a name="l00320"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#a0d371834ecd67b4fb96be92170e7f224"> 320</a></span>&#160; __I uint16_t <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#a0d371834ecd67b4fb96be92170e7f224">ECCSE</a>:1; </div>
<div class="line"><a name="l00321"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#a92db228f6b2718ed73777e16b3d3cd77"> 321</a></span>&#160; __I uint16_t <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#a92db228f6b2718ed73777e16b3d3cd77">ECCDE</a>:1; </div>
<div class="line"><a name="l00322"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#a3c01595f7b8459a0a7abd00360e82415"> 322</a></span>&#160; __I uint16_t <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#a3c01595f7b8459a0a7abd00360e82415">NVME</a>:1; </div>
<div class="line"><a name="l00323"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#a76ef563bd656f0edc99b3957cb49161f"> 323</a></span>&#160; __I uint16_t <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#a76ef563bd656f0edc99b3957cb49161f">SUSP</a>:1; </div>
<div class="line"><a name="l00324"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#a32367491ed93c4ae3e6d3ceea8a42dc1"> 324</a></span>&#160; __I uint16_t <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#a32367491ed93c4ae3e6d3ceea8a42dc1">SEESFULL</a>:1; </div>
<div class="line"><a name="l00325"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#ad003775067789cc5ad149fc566d26f20"> 325</a></span>&#160; __I uint16_t <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#ad003775067789cc5ad149fc566d26f20">SEESOVF</a>:1; </div>
<div class="line"><a name="l00326"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#a27460c6fb274bc39d76ed2b04bef2c71"> 326</a></span>&#160; __I uint16_t <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#a27460c6fb274bc39d76ed2b04bef2c71">SEEWRC</a>:1; </div>
<div class="line"><a name="l00327"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#a2068f7322f5e7cd6a878a080cbb3a821"> 327</a></span>&#160; __I <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#a2068f7322f5e7cd6a878a080cbb3a821">uint16_t</a> :5; </div>
<div class="line"><a name="l00328"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#a71d001e05a3746ced49c3ff426717c79"> 328</a></span>&#160; } bit; </div>
<div class="line"><a name="l00329"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#a38a533c4983dfddb4d193687550e384f"> 329</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#a38a533c4983dfddb4d193687550e384f">reg</a>; </div>
<div class="line"><a name="l00330"></a><span class="lineno"> 330</span>&#160;} <a class="code" href="unionNVMCTRL__INTFLAG__Type.html">NVMCTRL_INTFLAG_Type</a>;</div>
<div class="line"><a name="l00331"></a><span class="lineno"> 331</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00332"></a><span class="lineno"> 332</span>&#160; </div>
<div class="line"><a name="l00333"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a28bff79f1cf058fa8a6c7072f5913862"> 333</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_OFFSET 0x10 </span></div>
<div class="line"><a name="l00334"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a2d7e54384a5f6445cc9b9769ddf32ac2"> 334</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_RESETVALUE _U_(0x0000) </span></div>
<div class="line"><a name="l00336"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a22999317a65e0e9d3222617351fc58d1"> 336</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_DONE_Pos 0 </span></div>
<div class="line"><a name="l00337"></a><span class="lineno"> 337</span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_DONE (_U_(0x1) &lt;&lt; NVMCTRL_INTFLAG_DONE_Pos)</span></div>
<div class="line"><a name="l00338"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a108e21dc370bd9b52bd26614cdf00631"> 338</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_ADDRE_Pos 1 </span></div>
<div class="line"><a name="l00339"></a><span class="lineno"> 339</span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_ADDRE (_U_(0x1) &lt;&lt; NVMCTRL_INTFLAG_ADDRE_Pos)</span></div>
<div class="line"><a name="l00340"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a07cf1320b7671fcff3ed627f6ebb852f"> 340</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_PROGE_Pos 2 </span></div>
<div class="line"><a name="l00341"></a><span class="lineno"> 341</span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_PROGE (_U_(0x1) &lt;&lt; NVMCTRL_INTFLAG_PROGE_Pos)</span></div>
<div class="line"><a name="l00342"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a46d0a99797eecef352c91b78662af79b"> 342</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_LOCKE_Pos 3 </span></div>
<div class="line"><a name="l00343"></a><span class="lineno"> 343</span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_LOCKE (_U_(0x1) &lt;&lt; NVMCTRL_INTFLAG_LOCKE_Pos)</span></div>
<div class="line"><a name="l00344"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aff9c4e86b71922736f8e53c1cd89eb9f"> 344</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_ECCSE_Pos 4 </span></div>
<div class="line"><a name="l00345"></a><span class="lineno"> 345</span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_ECCSE (_U_(0x1) &lt;&lt; NVMCTRL_INTFLAG_ECCSE_Pos)</span></div>
<div class="line"><a name="l00346"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a9080bb2d763386195ec46a250d7a2089"> 346</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_ECCDE_Pos 5 </span></div>
<div class="line"><a name="l00347"></a><span class="lineno"> 347</span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_ECCDE (_U_(0x1) &lt;&lt; NVMCTRL_INTFLAG_ECCDE_Pos)</span></div>
<div class="line"><a name="l00348"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aa646db9f5e0c170cbd083c99061dab17"> 348</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_NVME_Pos 6 </span></div>
<div class="line"><a name="l00349"></a><span class="lineno"> 349</span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_NVME (_U_(0x1) &lt;&lt; NVMCTRL_INTFLAG_NVME_Pos)</span></div>
<div class="line"><a name="l00350"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a17ec7a0341ec9fb5fee40c713c541340"> 350</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_SUSP_Pos 7 </span></div>
<div class="line"><a name="l00351"></a><span class="lineno"> 351</span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_SUSP (_U_(0x1) &lt;&lt; NVMCTRL_INTFLAG_SUSP_Pos)</span></div>
<div class="line"><a name="l00352"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a760882172efec65a277f3e50784f37ca"> 352</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_SEESFULL_Pos 8 </span></div>
<div class="line"><a name="l00353"></a><span class="lineno"> 353</span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_SEESFULL (_U_(0x1) &lt;&lt; NVMCTRL_INTFLAG_SEESFULL_Pos)</span></div>
<div class="line"><a name="l00354"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a1afdc393e53f834691319e75098b3fef"> 354</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_SEESOVF_Pos 9 </span></div>
<div class="line"><a name="l00355"></a><span class="lineno"> 355</span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_SEESOVF (_U_(0x1) &lt;&lt; NVMCTRL_INTFLAG_SEESOVF_Pos)</span></div>
<div class="line"><a name="l00356"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ad9fa2489bdc30ba3b9d5eef8c50551a6"> 356</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_SEEWRC_Pos 10 </span></div>
<div class="line"><a name="l00357"></a><span class="lineno"> 357</span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_SEEWRC (_U_(0x1) &lt;&lt; NVMCTRL_INTFLAG_SEEWRC_Pos)</span></div>
<div class="line"><a name="l00358"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a77cb82e875b1988ba35455d842df74c5"> 358</a></span>&#160;<span class="preprocessor">#define NVMCTRL_INTFLAG_MASK _U_(0x07FF) </span></div>
<div class="line"><a name="l00360"></a><span class="lineno"> 360</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_STATUS : (NVMCTRL Offset: 0x12) (R/ 16) Status -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00361"></a><span class="lineno"> 361</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00362"></a><span class="lineno"><a class="line" href="unionNVMCTRL__STATUS__Type.html"> 362</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00363"></a><span class="lineno"> 363</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00364"></a><span class="lineno"><a class="line" href="unionNVMCTRL__STATUS__Type.html#a66acfd78762a55db4016c1e9fbf0202a"> 364</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__STATUS__Type.html#a66acfd78762a55db4016c1e9fbf0202a">READY</a>:1; </div>
<div class="line"><a name="l00365"></a><span class="lineno"><a class="line" href="unionNVMCTRL__STATUS__Type.html#ad39e4a3b2f9024bf91b70d5eafe0e89e"> 365</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__STATUS__Type.html#ad39e4a3b2f9024bf91b70d5eafe0e89e">PRM</a>:1; </div>
<div class="line"><a name="l00366"></a><span class="lineno"><a class="line" href="unionNVMCTRL__STATUS__Type.html#adafdfedd11c1fb246fa0642d6c125578"> 366</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__STATUS__Type.html#adafdfedd11c1fb246fa0642d6c125578">LOAD</a>:1; </div>
<div class="line"><a name="l00367"></a><span class="lineno"><a class="line" href="unionNVMCTRL__STATUS__Type.html#a11050531ff42aa856c76f8d3b13085f5"> 367</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__STATUS__Type.html#a11050531ff42aa856c76f8d3b13085f5">SUSP</a>:1; </div>
<div class="line"><a name="l00368"></a><span class="lineno"><a class="line" href="unionNVMCTRL__STATUS__Type.html#a0009e30c81ab96efe592d8ef9162d222"> 368</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__STATUS__Type.html#a0009e30c81ab96efe592d8ef9162d222">AFIRST</a>:1; </div>
<div class="line"><a name="l00369"></a><span class="lineno"><a class="line" href="unionNVMCTRL__STATUS__Type.html#a2547800604ca06aaca17fb314cc49617"> 369</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__STATUS__Type.html#a2547800604ca06aaca17fb314cc49617">BPDIS</a>:1; </div>
<div class="line"><a name="l00370"></a><span class="lineno"><a class="line" href="unionNVMCTRL__STATUS__Type.html#af5c1d28d38e931800eec41e645064480"> 370</a></span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00371"></a><span class="lineno"><a class="line" href="unionNVMCTRL__STATUS__Type.html#ac07c84bc4802900526d4433e00e8f472"> 371</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__STATUS__Type.html#ac07c84bc4802900526d4433e00e8f472">BOOTPROT</a>:4; </div>
<div class="line"><a name="l00372"></a><span class="lineno"><a class="line" href="unionNVMCTRL__STATUS__Type.html#aafbdd9b58eeed6a60c17b2b6a8f664a3"> 372</a></span>&#160; uint16_t :4; </div>
<div class="line"><a name="l00373"></a><span class="lineno"><a class="line" href="unionNVMCTRL__STATUS__Type.html#a2d4c494756cf7d62cd9703967394eb7f"> 373</a></span>&#160; } bit; </div>
<div class="line"><a name="l00374"></a><span class="lineno"><a class="line" href="unionNVMCTRL__STATUS__Type.html#a2468e44fa0ad23c3c9f3105774e3c77d"> 374</a></span>&#160; uint16_t <a class="code" href="unionNVMCTRL__STATUS__Type.html#a2468e44fa0ad23c3c9f3105774e3c77d">reg</a>; </div>
<div class="line"><a name="l00375"></a><span class="lineno"> 375</span>&#160;} <a class="code" href="unionNVMCTRL__STATUS__Type.html">NVMCTRL_STATUS_Type</a>;</div>
<div class="line"><a name="l00376"></a><span class="lineno"> 376</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00377"></a><span class="lineno"> 377</span>&#160; </div>
<div class="line"><a name="l00378"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aa210cb991451778d9df1a804b189799a"> 378</a></span>&#160;<span class="preprocessor">#define NVMCTRL_STATUS_OFFSET 0x12 </span></div>
<div class="line"><a name="l00379"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ac30e36e00c486c218383a4d318fe59c8"> 379</a></span>&#160;<span class="preprocessor">#define NVMCTRL_STATUS_RESETVALUE _U_(0x0000) </span></div>
<div class="line"><a name="l00381"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a6a3182ad9c4d093efbe119b510b43c39"> 381</a></span>&#160;<span class="preprocessor">#define NVMCTRL_STATUS_READY_Pos 0 </span></div>
<div class="line"><a name="l00382"></a><span class="lineno"> 382</span>&#160;<span class="preprocessor">#define NVMCTRL_STATUS_READY (_U_(0x1) &lt;&lt; NVMCTRL_STATUS_READY_Pos)</span></div>
<div class="line"><a name="l00383"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ab7f1c04b15d3c4fc8c9ab4bfbfd0731c"> 383</a></span>&#160;<span class="preprocessor">#define NVMCTRL_STATUS_PRM_Pos 1 </span></div>
<div class="line"><a name="l00384"></a><span class="lineno"> 384</span>&#160;<span class="preprocessor">#define NVMCTRL_STATUS_PRM (_U_(0x1) &lt;&lt; NVMCTRL_STATUS_PRM_Pos)</span></div>
<div class="line"><a name="l00385"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#af65957fca966956aebcb205a480376cf"> 385</a></span>&#160;<span class="preprocessor">#define NVMCTRL_STATUS_LOAD_Pos 2 </span></div>
<div class="line"><a name="l00386"></a><span class="lineno"> 386</span>&#160;<span class="preprocessor">#define NVMCTRL_STATUS_LOAD (_U_(0x1) &lt;&lt; NVMCTRL_STATUS_LOAD_Pos)</span></div>
<div class="line"><a name="l00387"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a204d7eb1505d3f46301eb0f829b977bd"> 387</a></span>&#160;<span class="preprocessor">#define NVMCTRL_STATUS_SUSP_Pos 3 </span></div>
<div class="line"><a name="l00388"></a><span class="lineno"> 388</span>&#160;<span class="preprocessor">#define NVMCTRL_STATUS_SUSP (_U_(0x1) &lt;&lt; NVMCTRL_STATUS_SUSP_Pos)</span></div>
<div class="line"><a name="l00389"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a8f50070babdcab2c53fdc877caad306f"> 389</a></span>&#160;<span class="preprocessor">#define NVMCTRL_STATUS_AFIRST_Pos 4 </span></div>
<div class="line"><a name="l00390"></a><span class="lineno"> 390</span>&#160;<span class="preprocessor">#define NVMCTRL_STATUS_AFIRST (_U_(0x1) &lt;&lt; NVMCTRL_STATUS_AFIRST_Pos)</span></div>
<div class="line"><a name="l00391"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a3e0feac79940a9612ff3509d5b30e8c6"> 391</a></span>&#160;<span class="preprocessor">#define NVMCTRL_STATUS_BPDIS_Pos 5 </span></div>
<div class="line"><a name="l00392"></a><span class="lineno"> 392</span>&#160;<span class="preprocessor">#define NVMCTRL_STATUS_BPDIS (_U_(0x1) &lt;&lt; NVMCTRL_STATUS_BPDIS_Pos)</span></div>
<div class="line"><a name="l00393"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a67bf7afdc8e516723f0115349cf1c9ed"> 393</a></span>&#160;<span class="preprocessor">#define NVMCTRL_STATUS_BOOTPROT_Pos 8 </span></div>
<div class="line"><a name="l00394"></a><span class="lineno"> 394</span>&#160;<span class="preprocessor">#define NVMCTRL_STATUS_BOOTPROT_Msk (_U_(0xF) &lt;&lt; NVMCTRL_STATUS_BOOTPROT_Pos)</span></div>
<div class="line"><a name="l00395"></a><span class="lineno"> 395</span>&#160;<span class="preprocessor">#define NVMCTRL_STATUS_BOOTPROT(value) (NVMCTRL_STATUS_BOOTPROT_Msk &amp; ((value) &lt;&lt; NVMCTRL_STATUS_BOOTPROT_Pos))</span></div>
<div class="line"><a name="l00396"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#acb0fa540b3def00184ee02da753f171e"> 396</a></span>&#160;<span class="preprocessor">#define NVMCTRL_STATUS_MASK _U_(0x0F3F) </span></div>
<div class="line"><a name="l00398"></a><span class="lineno"> 398</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_ADDR : (NVMCTRL Offset: 0x14) (R/W 32) Address -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00399"></a><span class="lineno"> 399</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00400"></a><span class="lineno"><a class="line" href="unionNVMCTRL__ADDR__Type.html"> 400</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00401"></a><span class="lineno"> 401</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00402"></a><span class="lineno"><a class="line" href="unionNVMCTRL__ADDR__Type.html#a3662864e181ff1d20570379bcf0a25da"> 402</a></span>&#160; uint32_t <a class="code" href="unionNVMCTRL__ADDR__Type.html#a3662864e181ff1d20570379bcf0a25da">ADDR</a>:24; </div>
<div class="line"><a name="l00403"></a><span class="lineno"><a class="line" href="unionNVMCTRL__ADDR__Type.html#a105683ed86fb7517c52cd181f164be45"> 403</a></span>&#160; uint32_t :8; </div>
<div class="line"><a name="l00404"></a><span class="lineno"><a class="line" href="unionNVMCTRL__ADDR__Type.html#aa52cc7952015756214b6a9a8bd13a04a"> 404</a></span>&#160; } bit; </div>
<div class="line"><a name="l00405"></a><span class="lineno"><a class="line" href="unionNVMCTRL__ADDR__Type.html#a483be20a4f5e7bc08fd4439dfd5e5b1f"> 405</a></span>&#160; uint32_t <a class="code" href="unionNVMCTRL__ADDR__Type.html#a483be20a4f5e7bc08fd4439dfd5e5b1f">reg</a>; </div>
<div class="line"><a name="l00406"></a><span class="lineno"> 406</span>&#160;} <a class="code" href="unionNVMCTRL__ADDR__Type.html">NVMCTRL_ADDR_Type</a>;</div>
<div class="line"><a name="l00407"></a><span class="lineno"> 407</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00408"></a><span class="lineno"> 408</span>&#160; </div>
<div class="line"><a name="l00409"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a2540268cdeb3644aa722cb8cce5546c8"> 409</a></span>&#160;<span class="preprocessor">#define NVMCTRL_ADDR_OFFSET 0x14 </span></div>
<div class="line"><a name="l00410"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a150652b364483d20d947140a67e2fe25"> 410</a></span>&#160;<span class="preprocessor">#define NVMCTRL_ADDR_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00412"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a7af974b171527d13bf216b3d5ef5650b"> 412</a></span>&#160;<span class="preprocessor">#define NVMCTRL_ADDR_ADDR_Pos 0 </span></div>
<div class="line"><a name="l00413"></a><span class="lineno"> 413</span>&#160;<span class="preprocessor">#define NVMCTRL_ADDR_ADDR_Msk (_U_(0xFFFFFF) &lt;&lt; NVMCTRL_ADDR_ADDR_Pos)</span></div>
<div class="line"><a name="l00414"></a><span class="lineno"> 414</span>&#160;<span class="preprocessor">#define NVMCTRL_ADDR_ADDR(value) (NVMCTRL_ADDR_ADDR_Msk &amp; ((value) &lt;&lt; NVMCTRL_ADDR_ADDR_Pos))</span></div>
<div class="line"><a name="l00415"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ab7e62000f793147227a50fa0217a0efd"> 415</a></span>&#160;<span class="preprocessor">#define NVMCTRL_ADDR_MASK _U_(0x00FFFFFF) </span></div>
<div class="line"><a name="l00417"></a><span class="lineno"> 417</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_RUNLOCK : (NVMCTRL Offset: 0x18) (R/ 32) Lock Section -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00418"></a><span class="lineno"> 418</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00419"></a><span class="lineno"><a class="line" href="unionNVMCTRL__RUNLOCK__Type.html"> 419</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00420"></a><span class="lineno"> 420</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00421"></a><span class="lineno"><a class="line" href="unionNVMCTRL__RUNLOCK__Type.html#a5ae1b23fc98934b9d720c4cb77892613"> 421</a></span>&#160; uint32_t <a class="code" href="unionNVMCTRL__RUNLOCK__Type.html#a5ae1b23fc98934b9d720c4cb77892613">RUNLOCK</a>:32; </div>
<div class="line"><a name="l00422"></a><span class="lineno"><a class="line" href="unionNVMCTRL__RUNLOCK__Type.html#aa29fcf24ab622479548f320780982c3e"> 422</a></span>&#160; } bit; </div>
<div class="line"><a name="l00423"></a><span class="lineno"><a class="line" href="unionNVMCTRL__RUNLOCK__Type.html#a4cfe6faa11b6c850ceffcf765863394f"> 423</a></span>&#160; uint32_t <a class="code" href="unionNVMCTRL__RUNLOCK__Type.html#a4cfe6faa11b6c850ceffcf765863394f">reg</a>; </div>
<div class="line"><a name="l00424"></a><span class="lineno"> 424</span>&#160;} <a class="code" href="unionNVMCTRL__RUNLOCK__Type.html">NVMCTRL_RUNLOCK_Type</a>;</div>
<div class="line"><a name="l00425"></a><span class="lineno"> 425</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00426"></a><span class="lineno"> 426</span>&#160; </div>
<div class="line"><a name="l00427"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a346dcd28aad5d36105d096721dfd91e1"> 427</a></span>&#160;<span class="preprocessor">#define NVMCTRL_RUNLOCK_OFFSET 0x18 </span></div>
<div class="line"><a name="l00428"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a8e6268896b6157a54f2d2d3436803364"> 428</a></span>&#160;<span class="preprocessor">#define NVMCTRL_RUNLOCK_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00430"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a4780bf981f03993af92e7eb985332369"> 430</a></span>&#160;<span class="preprocessor">#define NVMCTRL_RUNLOCK_RUNLOCK_Pos 0 </span></div>
<div class="line"><a name="l00431"></a><span class="lineno"> 431</span>&#160;<span class="preprocessor">#define NVMCTRL_RUNLOCK_RUNLOCK_Msk (_U_(0xFFFFFFFF) &lt;&lt; NVMCTRL_RUNLOCK_RUNLOCK_Pos)</span></div>
<div class="line"><a name="l00432"></a><span class="lineno"> 432</span>&#160;<span class="preprocessor">#define NVMCTRL_RUNLOCK_RUNLOCK(value) (NVMCTRL_RUNLOCK_RUNLOCK_Msk &amp; ((value) &lt;&lt; NVMCTRL_RUNLOCK_RUNLOCK_Pos))</span></div>
<div class="line"><a name="l00433"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a765a44b584c77fcc4955ba5945d40f79"> 433</a></span>&#160;<span class="preprocessor">#define NVMCTRL_RUNLOCK_MASK _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00435"></a><span class="lineno"> 435</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_PBLDATA : (NVMCTRL Offset: 0x1C) (R/ 32) Page Buffer Load Data x -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00436"></a><span class="lineno"> 436</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00437"></a><span class="lineno"><a class="line" href="unionNVMCTRL__PBLDATA__Type.html"> 437</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00438"></a><span class="lineno"> 438</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00439"></a><span class="lineno"><a class="line" href="unionNVMCTRL__PBLDATA__Type.html#a14c7b23bc6263884f3451ff9930343aa"> 439</a></span>&#160; uint32_t <a class="code" href="unionNVMCTRL__PBLDATA__Type.html#a14c7b23bc6263884f3451ff9930343aa">DATA</a>:32; </div>
<div class="line"><a name="l00440"></a><span class="lineno"><a class="line" href="unionNVMCTRL__PBLDATA__Type.html#a13e795ce0d76601a149ace199af67057"> 440</a></span>&#160; } bit; </div>
<div class="line"><a name="l00441"></a><span class="lineno"><a class="line" href="unionNVMCTRL__PBLDATA__Type.html#a5d2ff39bbfcd35809ac1ee48daff5685"> 441</a></span>&#160; uint32_t <a class="code" href="unionNVMCTRL__PBLDATA__Type.html#a5d2ff39bbfcd35809ac1ee48daff5685">reg</a>; </div>
<div class="line"><a name="l00442"></a><span class="lineno"> 442</span>&#160;} <a class="code" href="unionNVMCTRL__PBLDATA__Type.html">NVMCTRL_PBLDATA_Type</a>;</div>
<div class="line"><a name="l00443"></a><span class="lineno"> 443</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00444"></a><span class="lineno"> 444</span>&#160; </div>
<div class="line"><a name="l00445"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a20335c5e4f98ea6f04cbfea8e216f424"> 445</a></span>&#160;<span class="preprocessor">#define NVMCTRL_PBLDATA_OFFSET 0x1C </span></div>
<div class="line"><a name="l00446"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a9453ad641763f2a598293f34c408f72e"> 446</a></span>&#160;<span class="preprocessor">#define NVMCTRL_PBLDATA_RESETVALUE _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00448"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#adb49fcf33ccbd90ef286c0840bb0b4ae"> 448</a></span>&#160;<span class="preprocessor">#define NVMCTRL_PBLDATA_DATA_Pos 0 </span></div>
<div class="line"><a name="l00449"></a><span class="lineno"> 449</span>&#160;<span class="preprocessor">#define NVMCTRL_PBLDATA_DATA_Msk (_U_(0xFFFFFFFF) &lt;&lt; NVMCTRL_PBLDATA_DATA_Pos)</span></div>
<div class="line"><a name="l00450"></a><span class="lineno"> 450</span>&#160;<span class="preprocessor">#define NVMCTRL_PBLDATA_DATA(value) (NVMCTRL_PBLDATA_DATA_Msk &amp; ((value) &lt;&lt; NVMCTRL_PBLDATA_DATA_Pos))</span></div>
<div class="line"><a name="l00451"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ad9d596008c4ae456d6aa37524ba3c4b9"> 451</a></span>&#160;<span class="preprocessor">#define NVMCTRL_PBLDATA_MASK _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00453"></a><span class="lineno"> 453</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_ECCERR : (NVMCTRL Offset: 0x24) (R/ 32) ECC Error Status Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00454"></a><span class="lineno"> 454</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00455"></a><span class="lineno"><a class="line" href="unionNVMCTRL__ECCERR__Type.html"> 455</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00456"></a><span class="lineno"> 456</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00457"></a><span class="lineno"><a class="line" href="unionNVMCTRL__ECCERR__Type.html#a5f72176f3db39db4e6a3fc06caa698d4"> 457</a></span>&#160; uint32_t <a class="code" href="unionNVMCTRL__ECCERR__Type.html#a5f72176f3db39db4e6a3fc06caa698d4">ADDR</a>:24; </div>
<div class="line"><a name="l00458"></a><span class="lineno"><a class="line" href="unionNVMCTRL__ECCERR__Type.html#a4742d3f13514c5fc5909444b6d737b59"> 458</a></span>&#160; uint32_t :4; </div>
<div class="line"><a name="l00459"></a><span class="lineno"><a class="line" href="unionNVMCTRL__ECCERR__Type.html#a3780a783ed8ee823f0a90daef5450019"> 459</a></span>&#160; uint32_t <a class="code" href="unionNVMCTRL__ECCERR__Type.html#a3780a783ed8ee823f0a90daef5450019">TYPEL</a>:2; </div>
<div class="line"><a name="l00460"></a><span class="lineno"><a class="line" href="unionNVMCTRL__ECCERR__Type.html#a5bfd3ea917171beaf77840f8cb16e7e4"> 460</a></span>&#160; uint32_t <a class="code" href="unionNVMCTRL__ECCERR__Type.html#a5bfd3ea917171beaf77840f8cb16e7e4">TYPEH</a>:2; </div>
<div class="line"><a name="l00461"></a><span class="lineno"><a class="line" href="unionNVMCTRL__ECCERR__Type.html#a6f1eb7b99b53d1b9746c8dafeda4283a"> 461</a></span>&#160; } bit; </div>
<div class="line"><a name="l00462"></a><span class="lineno"><a class="line" href="unionNVMCTRL__ECCERR__Type.html#a05802aadae129edae3b07df3c31d5389"> 462</a></span>&#160; uint32_t <a class="code" href="unionNVMCTRL__ECCERR__Type.html#a05802aadae129edae3b07df3c31d5389">reg</a>; </div>
<div class="line"><a name="l00463"></a><span class="lineno"> 463</span>&#160;} <a class="code" href="unionNVMCTRL__ECCERR__Type.html">NVMCTRL_ECCERR_Type</a>;</div>
<div class="line"><a name="l00464"></a><span class="lineno"> 464</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00465"></a><span class="lineno"> 465</span>&#160; </div>
<div class="line"><a name="l00466"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#abd3a5dd0cfe3b66f6386e4f74b8fa85b"> 466</a></span>&#160;<span class="preprocessor">#define NVMCTRL_ECCERR_OFFSET 0x24 </span></div>
<div class="line"><a name="l00467"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ab797fb0ea4d59d05e33853bfdf7c1107"> 467</a></span>&#160;<span class="preprocessor">#define NVMCTRL_ECCERR_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00469"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a01bfc438608a32f2a18d81190a42b6b9"> 469</a></span>&#160;<span class="preprocessor">#define NVMCTRL_ECCERR_ADDR_Pos 0 </span></div>
<div class="line"><a name="l00470"></a><span class="lineno"> 470</span>&#160;<span class="preprocessor">#define NVMCTRL_ECCERR_ADDR_Msk (_U_(0xFFFFFF) &lt;&lt; NVMCTRL_ECCERR_ADDR_Pos)</span></div>
<div class="line"><a name="l00471"></a><span class="lineno"> 471</span>&#160;<span class="preprocessor">#define NVMCTRL_ECCERR_ADDR(value) (NVMCTRL_ECCERR_ADDR_Msk &amp; ((value) &lt;&lt; NVMCTRL_ECCERR_ADDR_Pos))</span></div>
<div class="line"><a name="l00472"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a773b71ff442b075e909c294c8b32df20"> 472</a></span>&#160;<span class="preprocessor">#define NVMCTRL_ECCERR_TYPEL_Pos 28 </span></div>
<div class="line"><a name="l00473"></a><span class="lineno"> 473</span>&#160;<span class="preprocessor">#define NVMCTRL_ECCERR_TYPEL_Msk (_U_(0x3) &lt;&lt; NVMCTRL_ECCERR_TYPEL_Pos)</span></div>
<div class="line"><a name="l00474"></a><span class="lineno"> 474</span>&#160;<span class="preprocessor">#define NVMCTRL_ECCERR_TYPEL(value) (NVMCTRL_ECCERR_TYPEL_Msk &amp; ((value) &lt;&lt; NVMCTRL_ECCERR_TYPEL_Pos))</span></div>
<div class="line"><a name="l00475"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ad6c760c325868b652ea8549160dbfdea"> 475</a></span>&#160;<span class="preprocessor">#define NVMCTRL_ECCERR_TYPEL_NONE_Val _U_(0x0) </span></div>
<div class="line"><a name="l00476"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a7181020ba94941e46f81935a64ca66ad"> 476</a></span>&#160;<span class="preprocessor">#define NVMCTRL_ECCERR_TYPEL_SINGLE_Val _U_(0x1) </span></div>
<div class="line"><a name="l00477"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a4db2a69ae48460249c3e8581e0fa2f27"> 477</a></span>&#160;<span class="preprocessor">#define NVMCTRL_ECCERR_TYPEL_DUAL_Val _U_(0x2) </span></div>
<div class="line"><a name="l00478"></a><span class="lineno"> 478</span>&#160;<span class="preprocessor">#define NVMCTRL_ECCERR_TYPEL_NONE (NVMCTRL_ECCERR_TYPEL_NONE_Val &lt;&lt; NVMCTRL_ECCERR_TYPEL_Pos)</span></div>
<div class="line"><a name="l00479"></a><span class="lineno"> 479</span>&#160;<span class="preprocessor">#define NVMCTRL_ECCERR_TYPEL_SINGLE (NVMCTRL_ECCERR_TYPEL_SINGLE_Val &lt;&lt; NVMCTRL_ECCERR_TYPEL_Pos)</span></div>
<div class="line"><a name="l00480"></a><span class="lineno"> 480</span>&#160;<span class="preprocessor">#define NVMCTRL_ECCERR_TYPEL_DUAL (NVMCTRL_ECCERR_TYPEL_DUAL_Val &lt;&lt; NVMCTRL_ECCERR_TYPEL_Pos)</span></div>
<div class="line"><a name="l00481"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a0e34b7e5cff130c34ded4efec79fd9a1"> 481</a></span>&#160;<span class="preprocessor">#define NVMCTRL_ECCERR_TYPEH_Pos 30 </span></div>
<div class="line"><a name="l00482"></a><span class="lineno"> 482</span>&#160;<span class="preprocessor">#define NVMCTRL_ECCERR_TYPEH_Msk (_U_(0x3) &lt;&lt; NVMCTRL_ECCERR_TYPEH_Pos)</span></div>
<div class="line"><a name="l00483"></a><span class="lineno"> 483</span>&#160;<span class="preprocessor">#define NVMCTRL_ECCERR_TYPEH(value) (NVMCTRL_ECCERR_TYPEH_Msk &amp; ((value) &lt;&lt; NVMCTRL_ECCERR_TYPEH_Pos))</span></div>
<div class="line"><a name="l00484"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aca1b74f0878dd8da1e328b08cff5e814"> 484</a></span>&#160;<span class="preprocessor">#define NVMCTRL_ECCERR_TYPEH_NONE_Val _U_(0x0) </span></div>
<div class="line"><a name="l00485"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a4f3f4387989bdb1fec66d5c8d38feb4e"> 485</a></span>&#160;<span class="preprocessor">#define NVMCTRL_ECCERR_TYPEH_SINGLE_Val _U_(0x1) </span></div>
<div class="line"><a name="l00486"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a458bd93782ff9661b5f6642cae0d50df"> 486</a></span>&#160;<span class="preprocessor">#define NVMCTRL_ECCERR_TYPEH_DUAL_Val _U_(0x2) </span></div>
<div class="line"><a name="l00487"></a><span class="lineno"> 487</span>&#160;<span class="preprocessor">#define NVMCTRL_ECCERR_TYPEH_NONE (NVMCTRL_ECCERR_TYPEH_NONE_Val &lt;&lt; NVMCTRL_ECCERR_TYPEH_Pos)</span></div>
<div class="line"><a name="l00488"></a><span class="lineno"> 488</span>&#160;<span class="preprocessor">#define NVMCTRL_ECCERR_TYPEH_SINGLE (NVMCTRL_ECCERR_TYPEH_SINGLE_Val &lt;&lt; NVMCTRL_ECCERR_TYPEH_Pos)</span></div>
<div class="line"><a name="l00489"></a><span class="lineno"> 489</span>&#160;<span class="preprocessor">#define NVMCTRL_ECCERR_TYPEH_DUAL (NVMCTRL_ECCERR_TYPEH_DUAL_Val &lt;&lt; NVMCTRL_ECCERR_TYPEH_Pos)</span></div>
<div class="line"><a name="l00490"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a2e98f8b8bdb2b318dcf8174add395063"> 490</a></span>&#160;<span class="preprocessor">#define NVMCTRL_ECCERR_MASK _U_(0xF0FFFFFF) </span></div>
<div class="line"><a name="l00492"></a><span class="lineno"> 492</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_DBGCTRL : (NVMCTRL Offset: 0x28) (R/W 8) Debug Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00493"></a><span class="lineno"> 493</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00494"></a><span class="lineno"><a class="line" href="unionNVMCTRL__DBGCTRL__Type.html"> 494</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00495"></a><span class="lineno"> 495</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00496"></a><span class="lineno"><a class="line" href="unionNVMCTRL__DBGCTRL__Type.html#a58028d83730f1bc2004e646391aaff37"> 496</a></span>&#160; uint8_t <a class="code" href="unionNVMCTRL__DBGCTRL__Type.html#a58028d83730f1bc2004e646391aaff37">ECCDIS</a>:1; </div>
<div class="line"><a name="l00497"></a><span class="lineno"><a class="line" href="unionNVMCTRL__DBGCTRL__Type.html#a3d2d0e61e554ede5b97e8c7f55519a7d"> 497</a></span>&#160; uint8_t <a class="code" href="unionNVMCTRL__DBGCTRL__Type.html#a3d2d0e61e554ede5b97e8c7f55519a7d">ECCELOG</a>:1; </div>
<div class="line"><a name="l00498"></a><span class="lineno"><a class="line" href="unionNVMCTRL__DBGCTRL__Type.html#a9207a4f46fec35e71ec1d2dd62ee5b4a"> 498</a></span>&#160; uint8_t :6; </div>
<div class="line"><a name="l00499"></a><span class="lineno"><a class="line" href="unionNVMCTRL__DBGCTRL__Type.html#ae7bd87a5534d22f97e9862b40f577425"> 499</a></span>&#160; } bit; </div>
<div class="line"><a name="l00500"></a><span class="lineno"><a class="line" href="unionNVMCTRL__DBGCTRL__Type.html#a7a4abdf1ceb78b4146fa34eb40167510"> 500</a></span>&#160; uint8_t <a class="code" href="unionNVMCTRL__DBGCTRL__Type.html#a7a4abdf1ceb78b4146fa34eb40167510">reg</a>; </div>
<div class="line"><a name="l00501"></a><span class="lineno"> 501</span>&#160;} <a class="code" href="unionNVMCTRL__DBGCTRL__Type.html">NVMCTRL_DBGCTRL_Type</a>;</div>
<div class="line"><a name="l00502"></a><span class="lineno"> 502</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00503"></a><span class="lineno"> 503</span>&#160; </div>
<div class="line"><a name="l00504"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#abfc10a800250b88bc1aa6893d7f7807a"> 504</a></span>&#160;<span class="preprocessor">#define NVMCTRL_DBGCTRL_OFFSET 0x28 </span></div>
<div class="line"><a name="l00505"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a3caa773b6cf8933d60f4e96611415cdc"> 505</a></span>&#160;<span class="preprocessor">#define NVMCTRL_DBGCTRL_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00507"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a4b0945afc4044065bbc12602111b7203"> 507</a></span>&#160;<span class="preprocessor">#define NVMCTRL_DBGCTRL_ECCDIS_Pos 0 </span></div>
<div class="line"><a name="l00508"></a><span class="lineno"> 508</span>&#160;<span class="preprocessor">#define NVMCTRL_DBGCTRL_ECCDIS (_U_(0x1) &lt;&lt; NVMCTRL_DBGCTRL_ECCDIS_Pos)</span></div>
<div class="line"><a name="l00509"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aa58da7471715cdc607e846adaf1ec734"> 509</a></span>&#160;<span class="preprocessor">#define NVMCTRL_DBGCTRL_ECCELOG_Pos 1 </span></div>
<div class="line"><a name="l00510"></a><span class="lineno"> 510</span>&#160;<span class="preprocessor">#define NVMCTRL_DBGCTRL_ECCELOG (_U_(0x1) &lt;&lt; NVMCTRL_DBGCTRL_ECCELOG_Pos)</span></div>
<div class="line"><a name="l00511"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a206ada9fc0b8e925dc51272da5dff233"> 511</a></span>&#160;<span class="preprocessor">#define NVMCTRL_DBGCTRL_MASK _U_(0x03) </span></div>
<div class="line"><a name="l00513"></a><span class="lineno"> 513</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_SEECFG : (NVMCTRL Offset: 0x2A) (R/W 8) SmartEEPROM Configuration Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00514"></a><span class="lineno"> 514</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00515"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEECFG__Type.html"> 515</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00516"></a><span class="lineno"> 516</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00517"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEECFG__Type.html#a2bdfd7f8f93cec37052eeecbd82092a6"> 517</a></span>&#160; uint8_t <a class="code" href="unionNVMCTRL__SEECFG__Type.html#a2bdfd7f8f93cec37052eeecbd82092a6">WMODE</a>:1; </div>
<div class="line"><a name="l00518"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEECFG__Type.html#a342c8b2e3693e6196d58e1d50f0bf48d"> 518</a></span>&#160; uint8_t <a class="code" href="unionNVMCTRL__SEECFG__Type.html#a342c8b2e3693e6196d58e1d50f0bf48d">APRDIS</a>:1; </div>
<div class="line"><a name="l00519"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEECFG__Type.html#a9a2b2fd97b104b46922f47b220897b29"> 519</a></span>&#160; uint8_t :6; </div>
<div class="line"><a name="l00520"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEECFG__Type.html#a14b679a2fd3135fffa0826e731b278e0"> 520</a></span>&#160; } bit; </div>
<div class="line"><a name="l00521"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEECFG__Type.html#a63f098bba99c740aa78c8bbea22b3af6"> 521</a></span>&#160; uint8_t <a class="code" href="unionNVMCTRL__SEECFG__Type.html#a63f098bba99c740aa78c8bbea22b3af6">reg</a>; </div>
<div class="line"><a name="l00522"></a><span class="lineno"> 522</span>&#160;} <a class="code" href="unionNVMCTRL__SEECFG__Type.html">NVMCTRL_SEECFG_Type</a>;</div>
<div class="line"><a name="l00523"></a><span class="lineno"> 523</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00524"></a><span class="lineno"> 524</span>&#160; </div>
<div class="line"><a name="l00525"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a411992b91d9f9833e5ffbb39750859eb"> 525</a></span>&#160;<span class="preprocessor">#define NVMCTRL_SEECFG_OFFSET 0x2A </span></div>
<div class="line"><a name="l00526"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ad064de9c2ca707bb0c511872eea0974c"> 526</a></span>&#160;<span class="preprocessor">#define NVMCTRL_SEECFG_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00528"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ad1519e6fd3d749d2bd87d33fa75dc09a"> 528</a></span>&#160;<span class="preprocessor">#define NVMCTRL_SEECFG_WMODE_Pos 0 </span></div>
<div class="line"><a name="l00529"></a><span class="lineno"> 529</span>&#160;<span class="preprocessor">#define NVMCTRL_SEECFG_WMODE (_U_(0x1) &lt;&lt; NVMCTRL_SEECFG_WMODE_Pos)</span></div>
<div class="line"><a name="l00530"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#adfe1789e19f27c333770c1aa553ffe2e"> 530</a></span>&#160;<span class="preprocessor">#define NVMCTRL_SEECFG_WMODE_UNBUFFERED_Val _U_(0x0) </span></div>
<div class="line"><a name="l00531"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aeaea90b7ce256254fce4312fefd06eae"> 531</a></span>&#160;<span class="preprocessor">#define NVMCTRL_SEECFG_WMODE_BUFFERED_Val _U_(0x1) </span></div>
<div class="line"><a name="l00532"></a><span class="lineno"> 532</span>&#160;<span class="preprocessor">#define NVMCTRL_SEECFG_WMODE_UNBUFFERED (NVMCTRL_SEECFG_WMODE_UNBUFFERED_Val &lt;&lt; NVMCTRL_SEECFG_WMODE_Pos)</span></div>
<div class="line"><a name="l00533"></a><span class="lineno"> 533</span>&#160;<span class="preprocessor">#define NVMCTRL_SEECFG_WMODE_BUFFERED (NVMCTRL_SEECFG_WMODE_BUFFERED_Val &lt;&lt; NVMCTRL_SEECFG_WMODE_Pos)</span></div>
<div class="line"><a name="l00534"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a8495c34e37f84a9dd28292ba8138cfba"> 534</a></span>&#160;<span class="preprocessor">#define NVMCTRL_SEECFG_APRDIS_Pos 1 </span></div>
<div class="line"><a name="l00535"></a><span class="lineno"> 535</span>&#160;<span class="preprocessor">#define NVMCTRL_SEECFG_APRDIS (_U_(0x1) &lt;&lt; NVMCTRL_SEECFG_APRDIS_Pos)</span></div>
<div class="line"><a name="l00536"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a32261b1b6bdab06eafe91ddc8ae9e7c1"> 536</a></span>&#160;<span class="preprocessor">#define NVMCTRL_SEECFG_MASK _U_(0x03) </span></div>
<div class="line"><a name="l00538"></a><span class="lineno"> 538</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_SEESTAT : (NVMCTRL Offset: 0x2C) (R/ 32) SmartEEPROM Status Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00539"></a><span class="lineno"> 539</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00540"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html"> 540</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00541"></a><span class="lineno"> 541</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00542"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html#ac66c07b5e28103c80bc458fa5fb2ded6"> 542</a></span>&#160; uint32_t <a class="code" href="unionNVMCTRL__SEESTAT__Type.html#ac66c07b5e28103c80bc458fa5fb2ded6">ASEES</a>:1; </div>
<div class="line"><a name="l00543"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html#a77b7c3a60a7e5826a52ced534b7c00eb"> 543</a></span>&#160; uint32_t <a class="code" href="unionNVMCTRL__SEESTAT__Type.html#a77b7c3a60a7e5826a52ced534b7c00eb">LOAD</a>:1; </div>
<div class="line"><a name="l00544"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html#a903ea2c27b647efbd3e18c970fed944f"> 544</a></span>&#160; uint32_t <a class="code" href="unionNVMCTRL__SEESTAT__Type.html#a903ea2c27b647efbd3e18c970fed944f">BUSY</a>:1; </div>
<div class="line"><a name="l00545"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html#a791378bb2119e491f523677789f61ae8"> 545</a></span>&#160; uint32_t <a class="code" href="unionNVMCTRL__SEESTAT__Type.html#a791378bb2119e491f523677789f61ae8">LOCK</a>:1; </div>
<div class="line"><a name="l00546"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html#a74afbec5d238b02b7e76075695ca0f11"> 546</a></span>&#160; uint32_t <a class="code" href="unionNVMCTRL__SEESTAT__Type.html#a74afbec5d238b02b7e76075695ca0f11">RLOCK</a>:1; </div>
<div class="line"><a name="l00547"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html#a83c4667ef90cac9881575d0f8d874d51"> 547</a></span>&#160; uint32_t :3; </div>
<div class="line"><a name="l00548"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html#a6124fd33b572b188fcc4daf30f9f3b06"> 548</a></span>&#160; uint32_t <a class="code" href="unionNVMCTRL__SEESTAT__Type.html#a6124fd33b572b188fcc4daf30f9f3b06">SBLK</a>:4; </div>
<div class="line"><a name="l00549"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html#ac30aff4ddecdaebc65d6783df0e58032"> 549</a></span>&#160; uint32_t :4; </div>
<div class="line"><a name="l00550"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html#a93222de39a417e536cb0ac9b99f569f8"> 550</a></span>&#160; uint32_t <a class="code" href="unionNVMCTRL__SEESTAT__Type.html#a93222de39a417e536cb0ac9b99f569f8">PSZ</a>:3; </div>
<div class="line"><a name="l00551"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html#a6d5ff14632d9c2bacd0c7f1f74a2daa3"> 551</a></span>&#160; uint32_t :13; </div>
<div class="line"><a name="l00552"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html#aa4fdcc87d9011cf25387eb060425ba03"> 552</a></span>&#160; } bit; </div>
<div class="line"><a name="l00553"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html#a2e1a67c20fea1e403a4ddee4e7d12716"> 553</a></span>&#160; uint32_t <a class="code" href="unionNVMCTRL__SEESTAT__Type.html#a2e1a67c20fea1e403a4ddee4e7d12716">reg</a>; </div>
<div class="line"><a name="l00554"></a><span class="lineno"> 554</span>&#160;} <a class="code" href="unionNVMCTRL__SEESTAT__Type.html">NVMCTRL_SEESTAT_Type</a>;</div>
<div class="line"><a name="l00555"></a><span class="lineno"> 555</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00556"></a><span class="lineno"> 556</span>&#160; </div>
<div class="line"><a name="l00557"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a9ef3bbd25a21be90dcbd24473b80d80b"> 557</a></span>&#160;<span class="preprocessor">#define NVMCTRL_SEESTAT_OFFSET 0x2C </span></div>
<div class="line"><a name="l00558"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#acaa208a2a6ae678e37dc65e11aacca55"> 558</a></span>&#160;<span class="preprocessor">#define NVMCTRL_SEESTAT_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00560"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a192d45485cf0699ee172d46e7c4e008a"> 560</a></span>&#160;<span class="preprocessor">#define NVMCTRL_SEESTAT_ASEES_Pos 0 </span></div>
<div class="line"><a name="l00561"></a><span class="lineno"> 561</span>&#160;<span class="preprocessor">#define NVMCTRL_SEESTAT_ASEES (_U_(0x1) &lt;&lt; NVMCTRL_SEESTAT_ASEES_Pos)</span></div>
<div class="line"><a name="l00562"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a5be1417f0473f1231f71d7577dca2424"> 562</a></span>&#160;<span class="preprocessor">#define NVMCTRL_SEESTAT_LOAD_Pos 1 </span></div>
<div class="line"><a name="l00563"></a><span class="lineno"> 563</span>&#160;<span class="preprocessor">#define NVMCTRL_SEESTAT_LOAD (_U_(0x1) &lt;&lt; NVMCTRL_SEESTAT_LOAD_Pos)</span></div>
<div class="line"><a name="l00564"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a27b49bd5f280d800ea54a20a23f990de"> 564</a></span>&#160;<span class="preprocessor">#define NVMCTRL_SEESTAT_BUSY_Pos 2 </span></div>
<div class="line"><a name="l00565"></a><span class="lineno"> 565</span>&#160;<span class="preprocessor">#define NVMCTRL_SEESTAT_BUSY (_U_(0x1) &lt;&lt; NVMCTRL_SEESTAT_BUSY_Pos)</span></div>
<div class="line"><a name="l00566"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a365448dd65e94a559ad712d01f25ff5a"> 566</a></span>&#160;<span class="preprocessor">#define NVMCTRL_SEESTAT_LOCK_Pos 3 </span></div>
<div class="line"><a name="l00567"></a><span class="lineno"> 567</span>&#160;<span class="preprocessor">#define NVMCTRL_SEESTAT_LOCK (_U_(0x1) &lt;&lt; NVMCTRL_SEESTAT_LOCK_Pos)</span></div>
<div class="line"><a name="l00568"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a65208ac7825e71e3cfb915ef80ba3ed4"> 568</a></span>&#160;<span class="preprocessor">#define NVMCTRL_SEESTAT_RLOCK_Pos 4 </span></div>
<div class="line"><a name="l00569"></a><span class="lineno"> 569</span>&#160;<span class="preprocessor">#define NVMCTRL_SEESTAT_RLOCK (_U_(0x1) &lt;&lt; NVMCTRL_SEESTAT_RLOCK_Pos)</span></div>
<div class="line"><a name="l00570"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a750e309549c3cd9c713c29f8a2a0d914"> 570</a></span>&#160;<span class="preprocessor">#define NVMCTRL_SEESTAT_SBLK_Pos 8 </span></div>
<div class="line"><a name="l00571"></a><span class="lineno"> 571</span>&#160;<span class="preprocessor">#define NVMCTRL_SEESTAT_SBLK_Msk (_U_(0xF) &lt;&lt; NVMCTRL_SEESTAT_SBLK_Pos)</span></div>
<div class="line"><a name="l00572"></a><span class="lineno"> 572</span>&#160;<span class="preprocessor">#define NVMCTRL_SEESTAT_SBLK(value) (NVMCTRL_SEESTAT_SBLK_Msk &amp; ((value) &lt;&lt; NVMCTRL_SEESTAT_SBLK_Pos))</span></div>
<div class="line"><a name="l00573"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a133e065f2ffafe19d26bb83bc68b321c"> 573</a></span>&#160;<span class="preprocessor">#define NVMCTRL_SEESTAT_PSZ_Pos 16 </span></div>
<div class="line"><a name="l00574"></a><span class="lineno"> 574</span>&#160;<span class="preprocessor">#define NVMCTRL_SEESTAT_PSZ_Msk (_U_(0x7) &lt;&lt; NVMCTRL_SEESTAT_PSZ_Pos)</span></div>
<div class="line"><a name="l00575"></a><span class="lineno"> 575</span>&#160;<span class="preprocessor">#define NVMCTRL_SEESTAT_PSZ(value) (NVMCTRL_SEESTAT_PSZ_Msk &amp; ((value) &lt;&lt; NVMCTRL_SEESTAT_PSZ_Pos))</span></div>
<div class="line"><a name="l00576"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a6a42524260ced78dff10eb90993694c9"> 576</a></span>&#160;<span class="preprocessor">#define NVMCTRL_SEESTAT_MASK _U_(0x00070F1F) </span></div>
<div class="line"><a name="l00579"></a><span class="lineno"> 579</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00580"></a><span class="lineno"><a class="line" href="structNvmctrl.html"> 580</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00581"></a><span class="lineno"><a class="line" href="structNvmctrl.html#a7e8613746f6e54c152a3eb2405ab30ef"> 581</a></span>&#160; __IO <a class="code" href="unionNVMCTRL__CTRLA__Type.html">NVMCTRL_CTRLA_Type</a> <a class="code" href="structNvmctrl.html#a7e8613746f6e54c152a3eb2405ab30ef">CTRLA</a>; </div>
<div class="line"><a name="l00582"></a><span class="lineno"> 582</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved1[0x2];</div>
<div class="line"><a name="l00583"></a><span class="lineno"><a class="line" href="structNvmctrl.html#aa229892d3c632b4304cbd8050d1cc439"> 583</a></span>&#160; __O <a class="code" href="unionNVMCTRL__CTRLB__Type.html">NVMCTRL_CTRLB_Type</a> <a class="code" href="structNvmctrl.html#aa229892d3c632b4304cbd8050d1cc439">CTRLB</a>; </div>
<div class="line"><a name="l00584"></a><span class="lineno"> 584</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved2[0x2];</div>
<div class="line"><a name="l00585"></a><span class="lineno"><a class="line" href="structNvmctrl.html#a5ab09d2bf2f4d18b43b46cadf7d17657"> 585</a></span>&#160; __I <a class="code" href="unionNVMCTRL__PARAM__Type.html">NVMCTRL_PARAM_Type</a> <a class="code" href="structNvmctrl.html#a5ab09d2bf2f4d18b43b46cadf7d17657">PARAM</a>; </div>
<div class="line"><a name="l00586"></a><span class="lineno"><a class="line" href="structNvmctrl.html#a7c7db1c3ef2a8a290f214ae45db87a83"> 586</a></span>&#160; __IO <a class="code" href="unionNVMCTRL__INTENCLR__Type.html">NVMCTRL_INTENCLR_Type</a> <a class="code" href="structNvmctrl.html#a7c7db1c3ef2a8a290f214ae45db87a83">INTENCLR</a>; </div>
<div class="line"><a name="l00587"></a><span class="lineno"><a class="line" href="structNvmctrl.html#a47dd09a378257903197d6d6e47f8ff2e"> 587</a></span>&#160; __IO <a class="code" href="unionNVMCTRL__INTENSET__Type.html">NVMCTRL_INTENSET_Type</a> <a class="code" href="structNvmctrl.html#a47dd09a378257903197d6d6e47f8ff2e">INTENSET</a>; </div>
<div class="line"><a name="l00588"></a><span class="lineno"><a class="line" href="structNvmctrl.html#aa275ec3e71b3fd5455175d593b317548"> 588</a></span>&#160; __IO <a class="code" href="unionNVMCTRL__INTFLAG__Type.html">NVMCTRL_INTFLAG_Type</a> <a class="code" href="structNvmctrl.html#aa275ec3e71b3fd5455175d593b317548">INTFLAG</a>; </div>
<div class="line"><a name="l00589"></a><span class="lineno"><a class="line" href="structNvmctrl.html#a03025c297f9b114679d6f596715a7b78"> 589</a></span>&#160; __I <a class="code" href="unionNVMCTRL__STATUS__Type.html">NVMCTRL_STATUS_Type</a> <a class="code" href="structNvmctrl.html#a03025c297f9b114679d6f596715a7b78">STATUS</a>; </div>
<div class="line"><a name="l00590"></a><span class="lineno"><a class="line" href="structNvmctrl.html#a839fdde23536d0554617f373c57e702f"> 590</a></span>&#160; __IO <a class="code" href="unionNVMCTRL__ADDR__Type.html">NVMCTRL_ADDR_Type</a> <a class="code" href="structNvmctrl.html#a839fdde23536d0554617f373c57e702f">ADDR</a>; </div>
<div class="line"><a name="l00591"></a><span class="lineno"><a class="line" href="structNvmctrl.html#a4b833eeaf5a4707c0f6cbacada4c8138"> 591</a></span>&#160; __I <a class="code" href="unionNVMCTRL__RUNLOCK__Type.html">NVMCTRL_RUNLOCK_Type</a> <a class="code" href="structNvmctrl.html#a4b833eeaf5a4707c0f6cbacada4c8138">RUNLOCK</a>; </div>
<div class="line"><a name="l00592"></a><span class="lineno"><a class="line" href="structNvmctrl.html#acb849d52e34bcfee0ea43c39e06c7a64"> 592</a></span>&#160; __I <a class="code" href="unionNVMCTRL__PBLDATA__Type.html">NVMCTRL_PBLDATA_Type</a> PBLDATA[2]; </div>
<div class="line"><a name="l00593"></a><span class="lineno"><a class="line" href="structNvmctrl.html#a9012a764338f074e9a4a340fdc310614"> 593</a></span>&#160; __I <a class="code" href="unionNVMCTRL__ECCERR__Type.html">NVMCTRL_ECCERR_Type</a> <a class="code" href="structNvmctrl.html#a9012a764338f074e9a4a340fdc310614">ECCERR</a>; </div>
<div class="line"><a name="l00594"></a><span class="lineno"><a class="line" href="structNvmctrl.html#a0d34c72c814368719cb2266f4a4e4059"> 594</a></span>&#160; __IO <a class="code" href="unionNVMCTRL__DBGCTRL__Type.html">NVMCTRL_DBGCTRL_Type</a> <a class="code" href="structNvmctrl.html#a0d34c72c814368719cb2266f4a4e4059">DBGCTRL</a>; </div>
<div class="line"><a name="l00595"></a><span class="lineno"> 595</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved3[0x1];</div>
<div class="line"><a name="l00596"></a><span class="lineno"><a class="line" href="structNvmctrl.html#a83918188239d1598f5abbcc3bc804110"> 596</a></span>&#160; __IO <a class="code" href="unionNVMCTRL__SEECFG__Type.html">NVMCTRL_SEECFG_Type</a> <a class="code" href="structNvmctrl.html#a83918188239d1598f5abbcc3bc804110">SEECFG</a>; </div>
<div class="line"><a name="l00597"></a><span class="lineno"> 597</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved4[0x1];</div>
<div class="line"><a name="l00598"></a><span class="lineno"><a class="line" href="structNvmctrl.html#ac7ffb9869923d722cdbb8d5cf66778e2"> 598</a></span>&#160; __I <a class="code" href="unionNVMCTRL__SEESTAT__Type.html">NVMCTRL_SEESTAT_Type</a> <a class="code" href="structNvmctrl.html#ac7ffb9869923d722cdbb8d5cf66778e2">SEESTAT</a>; </div>
<div class="line"><a name="l00599"></a><span class="lineno"> 599</span>&#160;} <a class="code" href="structNvmctrl.html">Nvmctrl</a>;</div>
<div class="line"><a name="l00600"></a><span class="lineno"> 600</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00601"></a><span class="lineno"> 601</span>&#160; </div>
<div class="line"><a name="l00602"></a><span class="lineno"> 602</span>&#160;<span class="preprocessor">#define SECTION_NVMCTRL_SW0</span></div>
<div class="line"><a name="l00603"></a><span class="lineno"> 603</span>&#160;<span class="preprocessor">#define SECTION_NVMCTRL_TEMP_LOG</span></div>
<div class="line"><a name="l00604"></a><span class="lineno"> 604</span>&#160;<span class="preprocessor">#define SECTION_NVMCTRL_USER</span></div>
<div class="line"><a name="l00605"></a><span class="lineno"> 605</span>&#160; </div>
<div class="line"><a name="l00608"></a><span class="lineno"> 608</span>&#160;<span class="comment">/* ************************************************************************** */</span></div>
<div class="line"><a name="l00610"></a><span class="lineno"> 610</span>&#160;<span class="comment">/* ************************************************************************** */</span></div>
<div class="line"><a name="l00613"></a><span class="lineno"> 613</span>&#160; </div>
<div class="line"><a name="l00614"></a><span class="lineno"> 614</span>&#160; </div>
<div class="line"><a name="l00615"></a><span class="lineno"> 615</span>&#160;<span class="preprocessor">#define AC_FUSES_BIAS0_ADDR NVMCTRL_SW0</span></div>
<div class="line"><a name="l00616"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a5966886514f72bc963ac96aa44f700ec"> 616</a></span>&#160;<span class="preprocessor">#define AC_FUSES_BIAS0_Pos 0 </span></div>
<div class="line"><a name="l00617"></a><span class="lineno"> 617</span>&#160;<span class="preprocessor">#define AC_FUSES_BIAS0_Msk (_U_(0x3) &lt;&lt; AC_FUSES_BIAS0_Pos)</span></div>
<div class="line"><a name="l00618"></a><span class="lineno"> 618</span>&#160;<span class="preprocessor">#define AC_FUSES_BIAS0(value) (AC_FUSES_BIAS0_Msk &amp; ((value) &lt;&lt; AC_FUSES_BIAS0_Pos))</span></div>
<div class="line"><a name="l00619"></a><span class="lineno"> 619</span>&#160; </div>
<div class="line"><a name="l00620"></a><span class="lineno"> 620</span>&#160;<span class="preprocessor">#define ADC0_FUSES_BIASCOMP_ADDR NVMCTRL_SW0</span></div>
<div class="line"><a name="l00621"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a23f06473d98a6f1044ab03c3b205182f"> 621</a></span>&#160;<span class="preprocessor">#define ADC0_FUSES_BIASCOMP_Pos 2 </span></div>
<div class="line"><a name="l00622"></a><span class="lineno"> 622</span>&#160;<span class="preprocessor">#define ADC0_FUSES_BIASCOMP_Msk (_U_(0x7) &lt;&lt; ADC0_FUSES_BIASCOMP_Pos)</span></div>
<div class="line"><a name="l00623"></a><span class="lineno"> 623</span>&#160;<span class="preprocessor">#define ADC0_FUSES_BIASCOMP(value) (ADC0_FUSES_BIASCOMP_Msk &amp; ((value) &lt;&lt; ADC0_FUSES_BIASCOMP_Pos))</span></div>
<div class="line"><a name="l00624"></a><span class="lineno"> 624</span>&#160; </div>
<div class="line"><a name="l00625"></a><span class="lineno"> 625</span>&#160;<span class="preprocessor">#define ADC0_FUSES_BIASR2R_ADDR NVMCTRL_SW0</span></div>
<div class="line"><a name="l00626"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a2d64b2e863cabe1d67537a6533a341d3"> 626</a></span>&#160;<span class="preprocessor">#define ADC0_FUSES_BIASR2R_Pos 8 </span></div>
<div class="line"><a name="l00627"></a><span class="lineno"> 627</span>&#160;<span class="preprocessor">#define ADC0_FUSES_BIASR2R_Msk (_U_(0x7) &lt;&lt; ADC0_FUSES_BIASR2R_Pos)</span></div>
<div class="line"><a name="l00628"></a><span class="lineno"> 628</span>&#160;<span class="preprocessor">#define ADC0_FUSES_BIASR2R(value) (ADC0_FUSES_BIASR2R_Msk &amp; ((value) &lt;&lt; ADC0_FUSES_BIASR2R_Pos))</span></div>
<div class="line"><a name="l00629"></a><span class="lineno"> 629</span>&#160; </div>
<div class="line"><a name="l00630"></a><span class="lineno"> 630</span>&#160;<span class="preprocessor">#define ADC0_FUSES_BIASREFBUF_ADDR NVMCTRL_SW0</span></div>
<div class="line"><a name="l00631"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a632bce9230a48abd3a005a676c2eda03"> 631</a></span>&#160;<span class="preprocessor">#define ADC0_FUSES_BIASREFBUF_Pos 5 </span></div>
<div class="line"><a name="l00632"></a><span class="lineno"> 632</span>&#160;<span class="preprocessor">#define ADC0_FUSES_BIASREFBUF_Msk (_U_(0x7) &lt;&lt; ADC0_FUSES_BIASREFBUF_Pos)</span></div>
<div class="line"><a name="l00633"></a><span class="lineno"> 633</span>&#160;<span class="preprocessor">#define ADC0_FUSES_BIASREFBUF(value) (ADC0_FUSES_BIASREFBUF_Msk &amp; ((value) &lt;&lt; ADC0_FUSES_BIASREFBUF_Pos))</span></div>
<div class="line"><a name="l00634"></a><span class="lineno"> 634</span>&#160; </div>
<div class="line"><a name="l00635"></a><span class="lineno"> 635</span>&#160;<span class="preprocessor">#define ADC1_FUSES_BIASCOMP_ADDR NVMCTRL_SW0</span></div>
<div class="line"><a name="l00636"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aa64e21a2c31684e928325e62c257ee9c"> 636</a></span>&#160;<span class="preprocessor">#define ADC1_FUSES_BIASCOMP_Pos 16 </span></div>
<div class="line"><a name="l00637"></a><span class="lineno"> 637</span>&#160;<span class="preprocessor">#define ADC1_FUSES_BIASCOMP_Msk (_U_(0x7) &lt;&lt; ADC1_FUSES_BIASCOMP_Pos)</span></div>
<div class="line"><a name="l00638"></a><span class="lineno"> 638</span>&#160;<span class="preprocessor">#define ADC1_FUSES_BIASCOMP(value) (ADC1_FUSES_BIASCOMP_Msk &amp; ((value) &lt;&lt; ADC1_FUSES_BIASCOMP_Pos))</span></div>
<div class="line"><a name="l00639"></a><span class="lineno"> 639</span>&#160; </div>
<div class="line"><a name="l00640"></a><span class="lineno"> 640</span>&#160;<span class="preprocessor">#define ADC1_FUSES_BIASR2R_ADDR NVMCTRL_SW0</span></div>
<div class="line"><a name="l00641"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ab3bb39abdafff084802ff74a381f48cb"> 641</a></span>&#160;<span class="preprocessor">#define ADC1_FUSES_BIASR2R_Pos 22 </span></div>
<div class="line"><a name="l00642"></a><span class="lineno"> 642</span>&#160;<span class="preprocessor">#define ADC1_FUSES_BIASR2R_Msk (_U_(0x7) &lt;&lt; ADC1_FUSES_BIASR2R_Pos)</span></div>
<div class="line"><a name="l00643"></a><span class="lineno"> 643</span>&#160;<span class="preprocessor">#define ADC1_FUSES_BIASR2R(value) (ADC1_FUSES_BIASR2R_Msk &amp; ((value) &lt;&lt; ADC1_FUSES_BIASR2R_Pos))</span></div>
<div class="line"><a name="l00644"></a><span class="lineno"> 644</span>&#160; </div>
<div class="line"><a name="l00645"></a><span class="lineno"> 645</span>&#160;<span class="preprocessor">#define ADC1_FUSES_BIASREFBUF_ADDR NVMCTRL_SW0</span></div>
<div class="line"><a name="l00646"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a78e01af139e070f4415e1827575a3c45"> 646</a></span>&#160;<span class="preprocessor">#define ADC1_FUSES_BIASREFBUF_Pos 19 </span></div>
<div class="line"><a name="l00647"></a><span class="lineno"> 647</span>&#160;<span class="preprocessor">#define ADC1_FUSES_BIASREFBUF_Msk (_U_(0x7) &lt;&lt; ADC1_FUSES_BIASREFBUF_Pos)</span></div>
<div class="line"><a name="l00648"></a><span class="lineno"> 648</span>&#160;<span class="preprocessor">#define ADC1_FUSES_BIASREFBUF(value) (ADC1_FUSES_BIASREFBUF_Msk &amp; ((value) &lt;&lt; ADC1_FUSES_BIASREFBUF_Pos))</span></div>
<div class="line"><a name="l00649"></a><span class="lineno"> 649</span>&#160; </div>
<div class="line"><a name="l00650"></a><span class="lineno"> 650</span>&#160;<span class="preprocessor">#define FUSES_BOD33USERLEVEL_ADDR NVMCTRL_USER</span></div>
<div class="line"><a name="l00651"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a9e8109cd0996312419933645a2f2a089"> 651</a></span>&#160;<span class="preprocessor">#define FUSES_BOD33USERLEVEL_Pos 1 </span></div>
<div class="line"><a name="l00652"></a><span class="lineno"> 652</span>&#160;<span class="preprocessor">#define FUSES_BOD33USERLEVEL_Msk (_U_(0xFF) &lt;&lt; FUSES_BOD33USERLEVEL_Pos)</span></div>
<div class="line"><a name="l00653"></a><span class="lineno"> 653</span>&#160;<span class="preprocessor">#define FUSES_BOD33USERLEVEL(value) (FUSES_BOD33USERLEVEL_Msk &amp; ((value) &lt;&lt; FUSES_BOD33USERLEVEL_Pos))</span></div>
<div class="line"><a name="l00654"></a><span class="lineno"> 654</span>&#160; </div>
<div class="line"><a name="l00655"></a><span class="lineno"> 655</span>&#160;<span class="preprocessor">#define FUSES_BOD33_ACTION_ADDR NVMCTRL_USER</span></div>
<div class="line"><a name="l00656"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aac742323e1fa3072afa8ce20817c58f3"> 656</a></span>&#160;<span class="preprocessor">#define FUSES_BOD33_ACTION_Pos 9 </span></div>
<div class="line"><a name="l00657"></a><span class="lineno"> 657</span>&#160;<span class="preprocessor">#define FUSES_BOD33_ACTION_Msk (_U_(0x3) &lt;&lt; FUSES_BOD33_ACTION_Pos)</span></div>
<div class="line"><a name="l00658"></a><span class="lineno"> 658</span>&#160;<span class="preprocessor">#define FUSES_BOD33_ACTION(value) (FUSES_BOD33_ACTION_Msk &amp; ((value) &lt;&lt; FUSES_BOD33_ACTION_Pos))</span></div>
<div class="line"><a name="l00659"></a><span class="lineno"> 659</span>&#160; </div>
<div class="line"><a name="l00660"></a><span class="lineno"> 660</span>&#160;<span class="preprocessor">#define FUSES_BOD33_DIS_ADDR NVMCTRL_USER</span></div>
<div class="line"><a name="l00661"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a72a0920038e8fd5892ae9e4d91ae0ac3"> 661</a></span>&#160;<span class="preprocessor">#define FUSES_BOD33_DIS_Pos 0 </span></div>
<div class="line"><a name="l00662"></a><span class="lineno"> 662</span>&#160;<span class="preprocessor">#define FUSES_BOD33_DIS_Msk (_U_(0x1) &lt;&lt; FUSES_BOD33_DIS_Pos)</span></div>
<div class="line"><a name="l00663"></a><span class="lineno"> 663</span>&#160; </div>
<div class="line"><a name="l00664"></a><span class="lineno"> 664</span>&#160;<span class="preprocessor">#define FUSES_BOD33_HYST_ADDR NVMCTRL_USER</span></div>
<div class="line"><a name="l00665"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a5ab9b1d814cf783918e8b12a908295ef"> 665</a></span>&#160;<span class="preprocessor">#define FUSES_BOD33_HYST_Pos 11 </span></div>
<div class="line"><a name="l00666"></a><span class="lineno"> 666</span>&#160;<span class="preprocessor">#define FUSES_BOD33_HYST_Msk (_U_(0xF) &lt;&lt; FUSES_BOD33_HYST_Pos)</span></div>
<div class="line"><a name="l00667"></a><span class="lineno"> 667</span>&#160;<span class="preprocessor">#define FUSES_BOD33_HYST(value) (FUSES_BOD33_HYST_Msk &amp; ((value) &lt;&lt; FUSES_BOD33_HYST_Pos))</span></div>
<div class="line"><a name="l00668"></a><span class="lineno"> 668</span>&#160; </div>
<div class="line"><a name="l00669"></a><span class="lineno"> 669</span>&#160;<span class="preprocessor">#define FUSES_HOT_ADC_VAL_CTAT_ADDR (NVMCTRL_TEMP_LOG + 8)</span></div>
<div class="line"><a name="l00670"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#abb81d457f6232e78ff61d0e80f925706"> 670</a></span>&#160;<span class="preprocessor">#define FUSES_HOT_ADC_VAL_CTAT_Pos 12 </span></div>
<div class="line"><a name="l00671"></a><span class="lineno"> 671</span>&#160;<span class="preprocessor">#define FUSES_HOT_ADC_VAL_CTAT_Msk (_U_(0xFFF) &lt;&lt; FUSES_HOT_ADC_VAL_CTAT_Pos)</span></div>
<div class="line"><a name="l00672"></a><span class="lineno"> 672</span>&#160;<span class="preprocessor">#define FUSES_HOT_ADC_VAL_CTAT(value) (FUSES_HOT_ADC_VAL_CTAT_Msk &amp; ((value) &lt;&lt; FUSES_HOT_ADC_VAL_CTAT_Pos))</span></div>
<div class="line"><a name="l00673"></a><span class="lineno"> 673</span>&#160; </div>
<div class="line"><a name="l00674"></a><span class="lineno"> 674</span>&#160;<span class="preprocessor">#define FUSES_HOT_ADC_VAL_PTAT_ADDR (NVMCTRL_TEMP_LOG + 4)</span></div>
<div class="line"><a name="l00675"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a1101fa251c80578d13dd58fb49ba1a47"> 675</a></span>&#160;<span class="preprocessor">#define FUSES_HOT_ADC_VAL_PTAT_Pos 20 </span></div>
<div class="line"><a name="l00676"></a><span class="lineno"> 676</span>&#160;<span class="preprocessor">#define FUSES_HOT_ADC_VAL_PTAT_Msk (_U_(0xFFF) &lt;&lt; FUSES_HOT_ADC_VAL_PTAT_Pos)</span></div>
<div class="line"><a name="l00677"></a><span class="lineno"> 677</span>&#160;<span class="preprocessor">#define FUSES_HOT_ADC_VAL_PTAT(value) (FUSES_HOT_ADC_VAL_PTAT_Msk &amp; ((value) &lt;&lt; FUSES_HOT_ADC_VAL_PTAT_Pos))</span></div>
<div class="line"><a name="l00678"></a><span class="lineno"> 678</span>&#160; </div>
<div class="line"><a name="l00679"></a><span class="lineno"> 679</span>&#160;<span class="preprocessor">#define FUSES_HOT_INT1V_VAL_ADDR (NVMCTRL_TEMP_LOG + 4)</span></div>
<div class="line"><a name="l00680"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a8b14f5897dd4c958cde93e08ee14ae2a"> 680</a></span>&#160;<span class="preprocessor">#define FUSES_HOT_INT1V_VAL_Pos 0 </span></div>
<div class="line"><a name="l00681"></a><span class="lineno"> 681</span>&#160;<span class="preprocessor">#define FUSES_HOT_INT1V_VAL_Msk (_U_(0xFF) &lt;&lt; FUSES_HOT_INT1V_VAL_Pos)</span></div>
<div class="line"><a name="l00682"></a><span class="lineno"> 682</span>&#160;<span class="preprocessor">#define FUSES_HOT_INT1V_VAL(value) (FUSES_HOT_INT1V_VAL_Msk &amp; ((value) &lt;&lt; FUSES_HOT_INT1V_VAL_Pos))</span></div>
<div class="line"><a name="l00683"></a><span class="lineno"> 683</span>&#160; </div>
<div class="line"><a name="l00684"></a><span class="lineno"> 684</span>&#160;<span class="preprocessor">#define FUSES_HOT_TEMP_VAL_DEC_ADDR NVMCTRL_TEMP_LOG</span></div>
<div class="line"><a name="l00685"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#afc1b6bd9fd9cdb5f0a1e89d14bb6f100"> 685</a></span>&#160;<span class="preprocessor">#define FUSES_HOT_TEMP_VAL_DEC_Pos 20 </span></div>
<div class="line"><a name="l00686"></a><span class="lineno"> 686</span>&#160;<span class="preprocessor">#define FUSES_HOT_TEMP_VAL_DEC_Msk (_U_(0xF) &lt;&lt; FUSES_HOT_TEMP_VAL_DEC_Pos)</span></div>
<div class="line"><a name="l00687"></a><span class="lineno"> 687</span>&#160;<span class="preprocessor">#define FUSES_HOT_TEMP_VAL_DEC(value) (FUSES_HOT_TEMP_VAL_DEC_Msk &amp; ((value) &lt;&lt; FUSES_HOT_TEMP_VAL_DEC_Pos))</span></div>
<div class="line"><a name="l00688"></a><span class="lineno"> 688</span>&#160; </div>
<div class="line"><a name="l00689"></a><span class="lineno"> 689</span>&#160;<span class="preprocessor">#define FUSES_HOT_TEMP_VAL_INT_ADDR NVMCTRL_TEMP_LOG</span></div>
<div class="line"><a name="l00690"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a3c7e8d3e46d03e0b6424b34762295643"> 690</a></span>&#160;<span class="preprocessor">#define FUSES_HOT_TEMP_VAL_INT_Pos 12 </span></div>
<div class="line"><a name="l00691"></a><span class="lineno"> 691</span>&#160;<span class="preprocessor">#define FUSES_HOT_TEMP_VAL_INT_Msk (_U_(0xFF) &lt;&lt; FUSES_HOT_TEMP_VAL_INT_Pos)</span></div>
<div class="line"><a name="l00692"></a><span class="lineno"> 692</span>&#160;<span class="preprocessor">#define FUSES_HOT_TEMP_VAL_INT(value) (FUSES_HOT_TEMP_VAL_INT_Msk &amp; ((value) &lt;&lt; FUSES_HOT_TEMP_VAL_INT_Pos))</span></div>
<div class="line"><a name="l00693"></a><span class="lineno"> 693</span>&#160; </div>
<div class="line"><a name="l00694"></a><span class="lineno"> 694</span>&#160;<span class="preprocessor">#define FUSES_ROOM_ADC_VAL_CTAT_ADDR (NVMCTRL_TEMP_LOG + 8)</span></div>
<div class="line"><a name="l00695"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a27ddb7402e2867d17c8892a802136fd7"> 695</a></span>&#160;<span class="preprocessor">#define FUSES_ROOM_ADC_VAL_CTAT_Pos 0 </span></div>
<div class="line"><a name="l00696"></a><span class="lineno"> 696</span>&#160;<span class="preprocessor">#define FUSES_ROOM_ADC_VAL_CTAT_Msk (_U_(0xFFF) &lt;&lt; FUSES_ROOM_ADC_VAL_CTAT_Pos)</span></div>
<div class="line"><a name="l00697"></a><span class="lineno"> 697</span>&#160;<span class="preprocessor">#define FUSES_ROOM_ADC_VAL_CTAT(value) (FUSES_ROOM_ADC_VAL_CTAT_Msk &amp; ((value) &lt;&lt; FUSES_ROOM_ADC_VAL_CTAT_Pos))</span></div>
<div class="line"><a name="l00698"></a><span class="lineno"> 698</span>&#160; </div>
<div class="line"><a name="l00699"></a><span class="lineno"> 699</span>&#160;<span class="preprocessor">#define FUSES_ROOM_ADC_VAL_PTAT_ADDR (NVMCTRL_TEMP_LOG + 4)</span></div>
<div class="line"><a name="l00700"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aefb2f458ba54047a124fdbe10212791e"> 700</a></span>&#160;<span class="preprocessor">#define FUSES_ROOM_ADC_VAL_PTAT_Pos 8 </span></div>
<div class="line"><a name="l00701"></a><span class="lineno"> 701</span>&#160;<span class="preprocessor">#define FUSES_ROOM_ADC_VAL_PTAT_Msk (_U_(0xFFF) &lt;&lt; FUSES_ROOM_ADC_VAL_PTAT_Pos)</span></div>
<div class="line"><a name="l00702"></a><span class="lineno"> 702</span>&#160;<span class="preprocessor">#define FUSES_ROOM_ADC_VAL_PTAT(value) (FUSES_ROOM_ADC_VAL_PTAT_Msk &amp; ((value) &lt;&lt; FUSES_ROOM_ADC_VAL_PTAT_Pos))</span></div>
<div class="line"><a name="l00703"></a><span class="lineno"> 703</span>&#160; </div>
<div class="line"><a name="l00704"></a><span class="lineno"> 704</span>&#160;<span class="preprocessor">#define FUSES_ROOM_INT1V_VAL_ADDR NVMCTRL_TEMP_LOG</span></div>
<div class="line"><a name="l00705"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aac3dee19f6ada7e3e76edabd527b521d"> 705</a></span>&#160;<span class="preprocessor">#define FUSES_ROOM_INT1V_VAL_Pos 24 </span></div>
<div class="line"><a name="l00706"></a><span class="lineno"> 706</span>&#160;<span class="preprocessor">#define FUSES_ROOM_INT1V_VAL_Msk (_U_(0xFF) &lt;&lt; FUSES_ROOM_INT1V_VAL_Pos)</span></div>
<div class="line"><a name="l00707"></a><span class="lineno"> 707</span>&#160;<span class="preprocessor">#define FUSES_ROOM_INT1V_VAL(value) (FUSES_ROOM_INT1V_VAL_Msk &amp; ((value) &lt;&lt; FUSES_ROOM_INT1V_VAL_Pos))</span></div>
<div class="line"><a name="l00708"></a><span class="lineno"> 708</span>&#160; </div>
<div class="line"><a name="l00709"></a><span class="lineno"> 709</span>&#160;<span class="preprocessor">#define FUSES_ROOM_TEMP_VAL_DEC_ADDR NVMCTRL_TEMP_LOG</span></div>
<div class="line"><a name="l00710"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aac2a02c5ab8d7fd6e6be94f6657558a6"> 710</a></span>&#160;<span class="preprocessor">#define FUSES_ROOM_TEMP_VAL_DEC_Pos 8 </span></div>
<div class="line"><a name="l00711"></a><span class="lineno"> 711</span>&#160;<span class="preprocessor">#define FUSES_ROOM_TEMP_VAL_DEC_Msk (_U_(0xF) &lt;&lt; FUSES_ROOM_TEMP_VAL_DEC_Pos)</span></div>
<div class="line"><a name="l00712"></a><span class="lineno"> 712</span>&#160;<span class="preprocessor">#define FUSES_ROOM_TEMP_VAL_DEC(value) (FUSES_ROOM_TEMP_VAL_DEC_Msk &amp; ((value) &lt;&lt; FUSES_ROOM_TEMP_VAL_DEC_Pos))</span></div>
<div class="line"><a name="l00713"></a><span class="lineno"> 713</span>&#160; </div>
<div class="line"><a name="l00714"></a><span class="lineno"> 714</span>&#160;<span class="preprocessor">#define FUSES_ROOM_TEMP_VAL_INT_ADDR NVMCTRL_TEMP_LOG</span></div>
<div class="line"><a name="l00715"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a614f00b6390a26716abbcbbd6e7d7b7d"> 715</a></span>&#160;<span class="preprocessor">#define FUSES_ROOM_TEMP_VAL_INT_Pos 0 </span></div>
<div class="line"><a name="l00716"></a><span class="lineno"> 716</span>&#160;<span class="preprocessor">#define FUSES_ROOM_TEMP_VAL_INT_Msk (_U_(0xFF) &lt;&lt; FUSES_ROOM_TEMP_VAL_INT_Pos)</span></div>
<div class="line"><a name="l00717"></a><span class="lineno"> 717</span>&#160;<span class="preprocessor">#define FUSES_ROOM_TEMP_VAL_INT(value) (FUSES_ROOM_TEMP_VAL_INT_Msk &amp; ((value) &lt;&lt; FUSES_ROOM_TEMP_VAL_INT_Pos))</span></div>
<div class="line"><a name="l00718"></a><span class="lineno"> 718</span>&#160; </div>
<div class="line"><a name="l00719"></a><span class="lineno"> 719</span>&#160;<span class="preprocessor">#define NVMCTRL_FUSES_BOOTPROT_ADDR NVMCTRL_USER</span></div>
<div class="line"><a name="l00720"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ac2867e0c1d1fc1b327991134a24983ca"> 720</a></span>&#160;<span class="preprocessor">#define NVMCTRL_FUSES_BOOTPROT_Pos 26 </span></div>
<div class="line"><a name="l00721"></a><span class="lineno"> 721</span>&#160;<span class="preprocessor">#define NVMCTRL_FUSES_BOOTPROT_Msk (_U_(0xF) &lt;&lt; NVMCTRL_FUSES_BOOTPROT_Pos)</span></div>
<div class="line"><a name="l00722"></a><span class="lineno"> 722</span>&#160;<span class="preprocessor">#define NVMCTRL_FUSES_BOOTPROT(value) (NVMCTRL_FUSES_BOOTPROT_Msk &amp; ((value) &lt;&lt; NVMCTRL_FUSES_BOOTPROT_Pos))</span></div>
<div class="line"><a name="l00723"></a><span class="lineno"> 723</span>&#160; </div>
<div class="line"><a name="l00724"></a><span class="lineno"> 724</span>&#160;<span class="preprocessor">#define NVMCTRL_FUSES_REGION_LOCKS_ADDR (NVMCTRL_USER + 8)</span></div>
<div class="line"><a name="l00725"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a553b4d761e65080381c6af440abee0f0"> 725</a></span>&#160;<span class="preprocessor">#define NVMCTRL_FUSES_REGION_LOCKS_Pos 0 </span></div>
<div class="line"><a name="l00726"></a><span class="lineno"> 726</span>&#160;<span class="preprocessor">#define NVMCTRL_FUSES_REGION_LOCKS_Msk (_U_(0xFFFFFFFF) &lt;&lt; NVMCTRL_FUSES_REGION_LOCKS_Pos)</span></div>
<div class="line"><a name="l00727"></a><span class="lineno"> 727</span>&#160;<span class="preprocessor">#define NVMCTRL_FUSES_REGION_LOCKS(value) (NVMCTRL_FUSES_REGION_LOCKS_Msk &amp; ((value) &lt;&lt; NVMCTRL_FUSES_REGION_LOCKS_Pos))</span></div>
<div class="line"><a name="l00728"></a><span class="lineno"> 728</span>&#160; </div>
<div class="line"><a name="l00729"></a><span class="lineno"> 729</span>&#160;<span class="preprocessor">#define NVMCTRL_FUSES_SEEPSZ_ADDR (NVMCTRL_USER + 4)</span></div>
<div class="line"><a name="l00730"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ad8edf28ff4e7b8bb4fe9ffacbd1050a0"> 730</a></span>&#160;<span class="preprocessor">#define NVMCTRL_FUSES_SEEPSZ_Pos 4 </span></div>
<div class="line"><a name="l00731"></a><span class="lineno"> 731</span>&#160;<span class="preprocessor">#define NVMCTRL_FUSES_SEEPSZ_Msk (_U_(0x7) &lt;&lt; NVMCTRL_FUSES_SEEPSZ_Pos)</span></div>
<div class="line"><a name="l00732"></a><span class="lineno"> 732</span>&#160;<span class="preprocessor">#define NVMCTRL_FUSES_SEEPSZ(value) (NVMCTRL_FUSES_SEEPSZ_Msk &amp; ((value) &lt;&lt; NVMCTRL_FUSES_SEEPSZ_Pos))</span></div>
<div class="line"><a name="l00733"></a><span class="lineno"> 733</span>&#160; </div>
<div class="line"><a name="l00734"></a><span class="lineno"> 734</span>&#160;<span class="preprocessor">#define NVMCTRL_FUSES_SEESBLK_ADDR (NVMCTRL_USER + 4)</span></div>
<div class="line"><a name="l00735"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a57166c3b4b4ee40c95300889a7c0ebd8"> 735</a></span>&#160;<span class="preprocessor">#define NVMCTRL_FUSES_SEESBLK_Pos 0 </span></div>
<div class="line"><a name="l00736"></a><span class="lineno"> 736</span>&#160;<span class="preprocessor">#define NVMCTRL_FUSES_SEESBLK_Msk (_U_(0xF) &lt;&lt; NVMCTRL_FUSES_SEESBLK_Pos)</span></div>
<div class="line"><a name="l00737"></a><span class="lineno"> 737</span>&#160;<span class="preprocessor">#define NVMCTRL_FUSES_SEESBLK(value) (NVMCTRL_FUSES_SEESBLK_Msk &amp; ((value) &lt;&lt; NVMCTRL_FUSES_SEESBLK_Pos))</span></div>
<div class="line"><a name="l00738"></a><span class="lineno"> 738</span>&#160; </div>
<div class="line"><a name="l00739"></a><span class="lineno"> 739</span>&#160;<span class="preprocessor">#define RAMECC_FUSES_ECCDIS_ADDR (NVMCTRL_USER + 4)</span></div>
<div class="line"><a name="l00740"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a3511cbfd7973757c32444feacbf43b51"> 740</a></span>&#160;<span class="preprocessor">#define RAMECC_FUSES_ECCDIS_Pos 7 </span></div>
<div class="line"><a name="l00741"></a><span class="lineno"> 741</span>&#160;<span class="preprocessor">#define RAMECC_FUSES_ECCDIS_Msk (_U_(0x1) &lt;&lt; RAMECC_FUSES_ECCDIS_Pos)</span></div>
<div class="line"><a name="l00742"></a><span class="lineno"> 742</span>&#160; </div>
<div class="line"><a name="l00743"></a><span class="lineno"> 743</span>&#160;<span class="preprocessor">#define USB_FUSES_TRANSN_ADDR (NVMCTRL_SW0 + 4)</span></div>
<div class="line"><a name="l00744"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ab0e7f93b7c247b3159128648a749719f"> 744</a></span>&#160;<span class="preprocessor">#define USB_FUSES_TRANSN_Pos 0 </span></div>
<div class="line"><a name="l00745"></a><span class="lineno"> 745</span>&#160;<span class="preprocessor">#define USB_FUSES_TRANSN_Msk (_U_(0x1F) &lt;&lt; USB_FUSES_TRANSN_Pos)</span></div>
<div class="line"><a name="l00746"></a><span class="lineno"> 746</span>&#160;<span class="preprocessor">#define USB_FUSES_TRANSN(value) (USB_FUSES_TRANSN_Msk &amp; ((value) &lt;&lt; USB_FUSES_TRANSN_Pos))</span></div>
<div class="line"><a name="l00747"></a><span class="lineno"> 747</span>&#160; </div>
<div class="line"><a name="l00748"></a><span class="lineno"> 748</span>&#160;<span class="preprocessor">#define USB_FUSES_TRANSP_ADDR (NVMCTRL_SW0 + 4)</span></div>
<div class="line"><a name="l00749"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aa2619428e9443f013405e7411b2f36ec"> 749</a></span>&#160;<span class="preprocessor">#define USB_FUSES_TRANSP_Pos 5 </span></div>
<div class="line"><a name="l00750"></a><span class="lineno"> 750</span>&#160;<span class="preprocessor">#define USB_FUSES_TRANSP_Msk (_U_(0x1F) &lt;&lt; USB_FUSES_TRANSP_Pos)</span></div>
<div class="line"><a name="l00751"></a><span class="lineno"> 751</span>&#160;<span class="preprocessor">#define USB_FUSES_TRANSP(value) (USB_FUSES_TRANSP_Msk &amp; ((value) &lt;&lt; USB_FUSES_TRANSP_Pos))</span></div>
<div class="line"><a name="l00752"></a><span class="lineno"> 752</span>&#160; </div>
<div class="line"><a name="l00753"></a><span class="lineno"> 753</span>&#160;<span class="preprocessor">#define USB_FUSES_TRIM_ADDR (NVMCTRL_SW0 + 4)</span></div>
<div class="line"><a name="l00754"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a699a137d838370a9163b858b8eecccaf"> 754</a></span>&#160;<span class="preprocessor">#define USB_FUSES_TRIM_Pos 10 </span></div>
<div class="line"><a name="l00755"></a><span class="lineno"> 755</span>&#160;<span class="preprocessor">#define USB_FUSES_TRIM_Msk (_U_(0x7) &lt;&lt; USB_FUSES_TRIM_Pos)</span></div>
<div class="line"><a name="l00756"></a><span class="lineno"> 756</span>&#160;<span class="preprocessor">#define USB_FUSES_TRIM(value) (USB_FUSES_TRIM_Msk &amp; ((value) &lt;&lt; USB_FUSES_TRIM_Pos))</span></div>
<div class="line"><a name="l00757"></a><span class="lineno"> 757</span>&#160; </div>
<div class="line"><a name="l00758"></a><span class="lineno"> 758</span>&#160;<span class="preprocessor">#define WDT_FUSES_ALWAYSON_ADDR (NVMCTRL_USER + 4)</span></div>
<div class="line"><a name="l00759"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aad4f4fec9a3339faea07db386174b75e"> 759</a></span>&#160;<span class="preprocessor">#define WDT_FUSES_ALWAYSON_Pos 17 </span></div>
<div class="line"><a name="l00760"></a><span class="lineno"> 760</span>&#160;<span class="preprocessor">#define WDT_FUSES_ALWAYSON_Msk (_U_(0x1) &lt;&lt; WDT_FUSES_ALWAYSON_Pos)</span></div>
<div class="line"><a name="l00761"></a><span class="lineno"> 761</span>&#160; </div>
<div class="line"><a name="l00762"></a><span class="lineno"> 762</span>&#160;<span class="preprocessor">#define WDT_FUSES_ENABLE_ADDR (NVMCTRL_USER + 4)</span></div>
<div class="line"><a name="l00763"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a3e49258fa52a7aededcc7b3e54533ef5"> 763</a></span>&#160;<span class="preprocessor">#define WDT_FUSES_ENABLE_Pos 16 </span></div>
<div class="line"><a name="l00764"></a><span class="lineno"> 764</span>&#160;<span class="preprocessor">#define WDT_FUSES_ENABLE_Msk (_U_(0x1) &lt;&lt; WDT_FUSES_ENABLE_Pos)</span></div>
<div class="line"><a name="l00765"></a><span class="lineno"> 765</span>&#160; </div>
<div class="line"><a name="l00766"></a><span class="lineno"> 766</span>&#160;<span class="preprocessor">#define WDT_FUSES_EWOFFSET_ADDR (NVMCTRL_USER + 4)</span></div>
<div class="line"><a name="l00767"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ae2f89f15eabc293811402651af74d059"> 767</a></span>&#160;<span class="preprocessor">#define WDT_FUSES_EWOFFSET_Pos 26 </span></div>
<div class="line"><a name="l00768"></a><span class="lineno"> 768</span>&#160;<span class="preprocessor">#define WDT_FUSES_EWOFFSET_Msk (_U_(0xF) &lt;&lt; WDT_FUSES_EWOFFSET_Pos)</span></div>
<div class="line"><a name="l00769"></a><span class="lineno"> 769</span>&#160;<span class="preprocessor">#define WDT_FUSES_EWOFFSET(value) (WDT_FUSES_EWOFFSET_Msk &amp; ((value) &lt;&lt; WDT_FUSES_EWOFFSET_Pos))</span></div>
<div class="line"><a name="l00770"></a><span class="lineno"> 770</span>&#160; </div>
<div class="line"><a name="l00771"></a><span class="lineno"> 771</span>&#160;<span class="preprocessor">#define WDT_FUSES_PER_ADDR (NVMCTRL_USER + 4)</span></div>
<div class="line"><a name="l00772"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a87db8b2566c9dd04e5c0cb3838175952"> 772</a></span>&#160;<span class="preprocessor">#define WDT_FUSES_PER_Pos 18 </span></div>
<div class="line"><a name="l00773"></a><span class="lineno"> 773</span>&#160;<span class="preprocessor">#define WDT_FUSES_PER_Msk (_U_(0xF) &lt;&lt; WDT_FUSES_PER_Pos)</span></div>
<div class="line"><a name="l00774"></a><span class="lineno"> 774</span>&#160;<span class="preprocessor">#define WDT_FUSES_PER(value) (WDT_FUSES_PER_Msk &amp; ((value) &lt;&lt; WDT_FUSES_PER_Pos))</span></div>
<div class="line"><a name="l00775"></a><span class="lineno"> 775</span>&#160; </div>
<div class="line"><a name="l00776"></a><span class="lineno"> 776</span>&#160;<span class="preprocessor">#define WDT_FUSES_WEN_ADDR (NVMCTRL_USER + 4)</span></div>
<div class="line"><a name="l00777"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a87c9e50a26f5095b90217f854536d90f"> 777</a></span>&#160;<span class="preprocessor">#define WDT_FUSES_WEN_Pos 30 </span></div>
<div class="line"><a name="l00778"></a><span class="lineno"> 778</span>&#160;<span class="preprocessor">#define WDT_FUSES_WEN_Msk (_U_(0x1) &lt;&lt; WDT_FUSES_WEN_Pos)</span></div>
<div class="line"><a name="l00779"></a><span class="lineno"> 779</span>&#160; </div>
<div class="line"><a name="l00780"></a><span class="lineno"> 780</span>&#160;<span class="preprocessor">#define WDT_FUSES_WINDOW_ADDR (NVMCTRL_USER + 4)</span></div>
<div class="line"><a name="l00781"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a79ba176ad4ff912b404632c0d0f7541e"> 781</a></span>&#160;<span class="preprocessor">#define WDT_FUSES_WINDOW_Pos 22 </span></div>
<div class="line"><a name="l00782"></a><span class="lineno"> 782</span>&#160;<span class="preprocessor">#define WDT_FUSES_WINDOW_Msk (_U_(0xF) &lt;&lt; WDT_FUSES_WINDOW_Pos)</span></div>
<div class="line"><a name="l00783"></a><span class="lineno"> 783</span>&#160;<span class="preprocessor">#define WDT_FUSES_WINDOW(value) (WDT_FUSES_WINDOW_Msk &amp; ((value) &lt;&lt; WDT_FUSES_WINDOW_Pos))</span></div>
<div class="line"><a name="l00784"></a><span class="lineno"> 784</span>&#160; </div>
<div class="line"><a name="l00787"></a><span class="lineno"> 787</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_NVMCTRL_COMPONENT_ */</span><span class="preprocessor"></span></div>
</div><!-- fragment --></div><!-- contents -->
<div class="ttc" id="aunionNVMCTRL__PARAM__Type_html_ab027731ea54fbc5dc42c1f1eb988a498"><div class="ttname"><a href="unionNVMCTRL__PARAM__Type.html#ab027731ea54fbc5dc42c1f1eb988a498">NVMCTRL_PARAM_Type::NVMP</a></div><div class="ttdeci">uint32_t NVMP</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00178">nvmctrl.h:178</a></div></div>
<div class="ttc" id="aunionNVMCTRL__SEESTAT__Type_html_a77b7c3a60a7e5826a52ced534b7c00eb"><div class="ttname"><a href="unionNVMCTRL__SEESTAT__Type.html#a77b7c3a60a7e5826a52ced534b7c00eb">NVMCTRL_SEESTAT_Type::LOAD</a></div><div class="ttdeci">uint32_t LOAD</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00543">nvmctrl.h:543</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html_a8b41fdb24d215b802cd106422eb57615"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html#a8b41fdb24d215b802cd106422eb57615">NVMCTRL_INTENCLR_Type::DONE</a></div><div class="ttdeci">uint16_t DONE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00220">nvmctrl.h:220</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html">NVMCTRL_INTENCLR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00218">nvmctrl.h:218</a></div></div>
<div class="ttc" id="aunionNVMCTRL__PARAM__Type_html"><div class="ttname"><a href="unionNVMCTRL__PARAM__Type.html">NVMCTRL_PARAM_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00176">nvmctrl.h:176</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html_a3453ea9b60b5aab08ac77b077050d18c"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html#a3453ea9b60b5aab08ac77b077050d18c">NVMCTRL_INTENSET_Type::NVME</a></div><div class="ttdeci">uint16_t NVME</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00274">nvmctrl.h:274</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_a5a443103568d0046dc08455295d84a97"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#a5a443103568d0046dc08455295d84a97">NVMCTRL_INTFLAG_Type::LOCKE</a></div><div class="ttdeci">__I uint16_t LOCKE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00319">nvmctrl.h:319</a></div></div>
<div class="ttc" id="aunionNVMCTRL__CTRLA__Type_html_a514f4360f729f5cd90e5421293f620ee"><div class="ttname"><a href="unionNVMCTRL__CTRLA__Type.html#a514f4360f729f5cd90e5421293f620ee">NVMCTRL_CTRLA_Type::AHBNS1</a></div><div class="ttdeci">uint16_t AHBNS1</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00053">nvmctrl.h:53</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html_a677dfd10acf0011a22ee327a89a9363b"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html#a677dfd10acf0011a22ee327a89a9363b">NVMCTRL_INTENSET_Type::ECCDE</a></div><div class="ttdeci">uint16_t ECCDE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00273">nvmctrl.h:273</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html_a1329af6b22aba94dbf2995040f43f081"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html#a1329af6b22aba94dbf2995040f43f081">NVMCTRL_INTENCLR_Type::SEESOVF</a></div><div class="ttdeci">uint16_t SEESOVF</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00229">nvmctrl.h:229</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_a2068f7322f5e7cd6a878a080cbb3a821"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#a2068f7322f5e7cd6a878a080cbb3a821">NVMCTRL_INTFLAG_Type::uint16_t</a></div><div class="ttdeci">__I uint16_t</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00327">nvmctrl.h:327</a></div></div>
<div class="ttc" id="aunionNVMCTRL__DBGCTRL__Type_html"><div class="ttname"><a href="unionNVMCTRL__DBGCTRL__Type.html">NVMCTRL_DBGCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00494">nvmctrl.h:494</a></div></div>
<div class="ttc" id="aunionNVMCTRL__SEESTAT__Type_html_a791378bb2119e491f523677789f61ae8"><div class="ttname"><a href="unionNVMCTRL__SEESTAT__Type.html#a791378bb2119e491f523677789f61ae8">NVMCTRL_SEESTAT_Type::LOCK</a></div><div class="ttdeci">uint32_t LOCK</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00545">nvmctrl.h:545</a></div></div>
<div class="ttc" id="aunionNVMCTRL__CTRLB__Type_html"><div class="ttname"><a href="unionNVMCTRL__CTRLB__Type.html">NVMCTRL_CTRLB_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00103">nvmctrl.h:103</a></div></div>
<div class="ttc" id="aunionNVMCTRL__ECCERR__Type_html_a3780a783ed8ee823f0a90daef5450019"><div class="ttname"><a href="unionNVMCTRL__ECCERR__Type.html#a3780a783ed8ee823f0a90daef5450019">NVMCTRL_ECCERR_Type::TYPEL</a></div><div class="ttdeci">uint32_t TYPEL</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00459">nvmctrl.h:459</a></div></div>
<div class="ttc" id="aunionNVMCTRL__RUNLOCK__Type_html_a4cfe6faa11b6c850ceffcf765863394f"><div class="ttname"><a href="unionNVMCTRL__RUNLOCK__Type.html#a4cfe6faa11b6c850ceffcf765863394f">NVMCTRL_RUNLOCK_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00423">nvmctrl.h:423</a></div></div>
<div class="ttc" id="aunionNVMCTRL__PARAM__Type_html_a06e3104745c4aa4dc7c65a7b876b3cfd"><div class="ttname"><a href="unionNVMCTRL__PARAM__Type.html#a06e3104745c4aa4dc7c65a7b876b3cfd">NVMCTRL_PARAM_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00183">nvmctrl.h:183</a></div></div>
<div class="ttc" id="astructNvmctrl_html_aa275ec3e71b3fd5455175d593b317548"><div class="ttname"><a href="structNvmctrl.html#aa275ec3e71b3fd5455175d593b317548">Nvmctrl::INTFLAG</a></div><div class="ttdeci">__IO NVMCTRL_INTFLAG_Type INTFLAG</div><div class="ttdoc">Offset: 0x10 (R/W 16) Interrupt Flag Status and Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00588">nvmctrl.h:588</a></div></div>
<div class="ttc" id="aunionNVMCTRL__ECCERR__Type_html"><div class="ttname"><a href="unionNVMCTRL__ECCERR__Type.html">NVMCTRL_ECCERR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00455">nvmctrl.h:455</a></div></div>
<div class="ttc" id="astructNvmctrl_html_aa229892d3c632b4304cbd8050d1cc439"><div class="ttname"><a href="structNvmctrl.html#aa229892d3c632b4304cbd8050d1cc439">Nvmctrl::CTRLB</a></div><div class="ttdeci">__O NVMCTRL_CTRLB_Type CTRLB</div><div class="ttdoc">Offset: 0x04 ( /W 16) Control B.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00583">nvmctrl.h:583</a></div></div>
<div class="ttc" id="aunionNVMCTRL__STATUS__Type_html_ad39e4a3b2f9024bf91b70d5eafe0e89e"><div class="ttname"><a href="unionNVMCTRL__STATUS__Type.html#ad39e4a3b2f9024bf91b70d5eafe0e89e">NVMCTRL_STATUS_Type::PRM</a></div><div class="ttdeci">uint16_t PRM</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00365">nvmctrl.h:365</a></div></div>
<div class="ttc" id="aunionNVMCTRL__CTRLB__Type_html_aaecd1479721fa1867507ce56625f5fcd"><div class="ttname"><a href="unionNVMCTRL__CTRLB__Type.html#aaecd1479721fa1867507ce56625f5fcd">NVMCTRL_CTRLB_Type::CMD</a></div><div class="ttdeci">uint16_t CMD</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00105">nvmctrl.h:105</a></div></div>
<div class="ttc" id="aunionNVMCTRL__CTRLA__Type_html"><div class="ttname"><a href="unionNVMCTRL__CTRLA__Type.html">NVMCTRL_CTRLA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00044">nvmctrl.h:44</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_a92db228f6b2718ed73777e16b3d3cd77"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#a92db228f6b2718ed73777e16b3d3cd77">NVMCTRL_INTFLAG_Type::ECCDE</a></div><div class="ttdeci">__I uint16_t ECCDE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00321">nvmctrl.h:321</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html_ad8f42a0e30a1faa286a7ca808a63a7c0"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html#ad8f42a0e30a1faa286a7ca808a63a7c0">NVMCTRL_INTENCLR_Type::NVME</a></div><div class="ttdeci">uint16_t NVME</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00226">nvmctrl.h:226</a></div></div>
<div class="ttc" id="aunionNVMCTRL__DBGCTRL__Type_html_a7a4abdf1ceb78b4146fa34eb40167510"><div class="ttname"><a href="unionNVMCTRL__DBGCTRL__Type.html#a7a4abdf1ceb78b4146fa34eb40167510">NVMCTRL_DBGCTRL_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00500">nvmctrl.h:500</a></div></div>
<div class="ttc" id="aunionNVMCTRL__CTRLA__Type_html_a675bd7dd11996723b783028b20c0c280"><div class="ttname"><a href="unionNVMCTRL__CTRLA__Type.html#a675bd7dd11996723b783028b20c0c280">NVMCTRL_CTRLA_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00057">nvmctrl.h:57</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html_aba1d27ddfc21e516560e8a2dc3d88161"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html#aba1d27ddfc21e516560e8a2dc3d88161">NVMCTRL_INTENCLR_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00233">nvmctrl.h:233</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html_aad10b082b6189e41f108d5c40141f90f"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html#aad10b082b6189e41f108d5c40141f90f">NVMCTRL_INTENSET_Type::ADDRE</a></div><div class="ttdeci">uint16_t ADDRE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00269">nvmctrl.h:269</a></div></div>
<div class="ttc" id="aunionNVMCTRL__STATUS__Type_html_a66acfd78762a55db4016c1e9fbf0202a"><div class="ttname"><a href="unionNVMCTRL__STATUS__Type.html#a66acfd78762a55db4016c1e9fbf0202a">NVMCTRL_STATUS_Type::READY</a></div><div class="ttdeci">uint16_t READY</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00364">nvmctrl.h:364</a></div></div>
<div class="ttc" id="aunionNVMCTRL__SEESTAT__Type_html_a74afbec5d238b02b7e76075695ca0f11"><div class="ttname"><a href="unionNVMCTRL__SEESTAT__Type.html#a74afbec5d238b02b7e76075695ca0f11">NVMCTRL_SEESTAT_Type::RLOCK</a></div><div class="ttdeci">uint32_t RLOCK</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00546">nvmctrl.h:546</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_a38a533c4983dfddb4d193687550e384f"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#a38a533c4983dfddb4d193687550e384f">NVMCTRL_INTFLAG_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00329">nvmctrl.h:329</a></div></div>
<div class="ttc" id="astructNvmctrl_html_a0d34c72c814368719cb2266f4a4e4059"><div class="ttname"><a href="structNvmctrl.html#a0d34c72c814368719cb2266f4a4e4059">Nvmctrl::DBGCTRL</a></div><div class="ttdeci">__IO NVMCTRL_DBGCTRL_Type DBGCTRL</div><div class="ttdoc">Offset: 0x28 (R/W 8) Debug Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00594">nvmctrl.h:594</a></div></div>
<div class="ttc" id="aunionNVMCTRL__ADDR__Type_html_a3662864e181ff1d20570379bcf0a25da"><div class="ttname"><a href="unionNVMCTRL__ADDR__Type.html#a3662864e181ff1d20570379bcf0a25da">NVMCTRL_ADDR_Type::ADDR</a></div><div class="ttdeci">uint32_t ADDR</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00402">nvmctrl.h:402</a></div></div>
<div class="ttc" id="aunionNVMCTRL__ADDR__Type_html_a483be20a4f5e7bc08fd4439dfd5e5b1f"><div class="ttname"><a href="unionNVMCTRL__ADDR__Type.html#a483be20a4f5e7bc08fd4439dfd5e5b1f">NVMCTRL_ADDR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00405">nvmctrl.h:405</a></div></div>
<div class="ttc" id="aunionNVMCTRL__CTRLA__Type_html_ae906ccf75cdbcbe61cb732d71b205aaa"><div class="ttname"><a href="unionNVMCTRL__CTRLA__Type.html#ae906ccf75cdbcbe61cb732d71b205aaa">NVMCTRL_CTRLA_Type::CACHEDIS1</a></div><div class="ttdeci">uint16_t CACHEDIS1</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00055">nvmctrl.h:55</a></div></div>
<div class="ttc" id="astructNvmctrl_html_a4b833eeaf5a4707c0f6cbacada4c8138"><div class="ttname"><a href="structNvmctrl.html#a4b833eeaf5a4707c0f6cbacada4c8138">Nvmctrl::RUNLOCK</a></div><div class="ttdeci">__I NVMCTRL_RUNLOCK_Type RUNLOCK</div><div class="ttdoc">Offset: 0x18 (R/ 32) Lock Section.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00591">nvmctrl.h:591</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_a3c01595f7b8459a0a7abd00360e82415"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#a3c01595f7b8459a0a7abd00360e82415">NVMCTRL_INTFLAG_Type::NVME</a></div><div class="ttdeci">__I uint16_t NVME</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00322">nvmctrl.h:322</a></div></div>
<div class="ttc" id="aunionNVMCTRL__CTRLA__Type_html_a3bbab66b83056fd662612f08a715ae30"><div class="ttname"><a href="unionNVMCTRL__CTRLA__Type.html#a3bbab66b83056fd662612f08a715ae30">NVMCTRL_CTRLA_Type::SUSPEN</a></div><div class="ttdeci">uint16_t SUSPEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00048">nvmctrl.h:48</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html_a2f4b33b3e2534635fc995f490084b8f2"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html#a2f4b33b3e2534635fc995f490084b8f2">NVMCTRL_INTENSET_Type::ECCSE</a></div><div class="ttdeci">uint16_t ECCSE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00272">nvmctrl.h:272</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html">NVMCTRL_INTFLAG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00314">nvmctrl.h:314</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html_a0d4f7db8fe0470fd5642e4d0b284f8b4"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html#a0d4f7db8fe0470fd5642e4d0b284f8b4">NVMCTRL_INTENSET_Type::SEESFULL</a></div><div class="ttdeci">uint16_t SEESFULL</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00276">nvmctrl.h:276</a></div></div>
<div class="ttc" id="aunionNVMCTRL__STATUS__Type_html_adafdfedd11c1fb246fa0642d6c125578"><div class="ttname"><a href="unionNVMCTRL__STATUS__Type.html#adafdfedd11c1fb246fa0642d6c125578">NVMCTRL_STATUS_Type::LOAD</a></div><div class="ttdeci">uint16_t LOAD</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00366">nvmctrl.h:366</a></div></div>
<div class="ttc" id="aunionNVMCTRL__PBLDATA__Type_html_a14c7b23bc6263884f3451ff9930343aa"><div class="ttname"><a href="unionNVMCTRL__PBLDATA__Type.html#a14c7b23bc6263884f3451ff9930343aa">NVMCTRL_PBLDATA_Type::DATA</a></div><div class="ttdeci">uint32_t DATA</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00439">nvmctrl.h:439</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html_a8a2e5f922dcdf2760d124075e33c71b7"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html#a8a2e5f922dcdf2760d124075e33c71b7">NVMCTRL_INTENCLR_Type::ECCDE</a></div><div class="ttdeci">uint16_t ECCDE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00225">nvmctrl.h:225</a></div></div>
<div class="ttc" id="aunionNVMCTRL__SEECFG__Type_html"><div class="ttname"><a href="unionNVMCTRL__SEECFG__Type.html">NVMCTRL_SEECFG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00515">nvmctrl.h:515</a></div></div>
<div class="ttc" id="aunionNVMCTRL__SEECFG__Type_html_a2bdfd7f8f93cec37052eeecbd82092a6"><div class="ttname"><a href="unionNVMCTRL__SEECFG__Type.html#a2bdfd7f8f93cec37052eeecbd82092a6">NVMCTRL_SEECFG_Type::WMODE</a></div><div class="ttdeci">uint8_t WMODE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00517">nvmctrl.h:517</a></div></div>
<div class="ttc" id="aunionNVMCTRL__ECCERR__Type_html_a05802aadae129edae3b07df3c31d5389"><div class="ttname"><a href="unionNVMCTRL__ECCERR__Type.html#a05802aadae129edae3b07df3c31d5389">NVMCTRL_ECCERR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00462">nvmctrl.h:462</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html_afd3d225c78e3421a2006e6b9ff886d46"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html#afd3d225c78e3421a2006e6b9ff886d46">NVMCTRL_INTENSET_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00281">nvmctrl.h:281</a></div></div>
<div class="ttc" id="aunionNVMCTRL__CTRLA__Type_html_a681489c8c6abf9104a2fab49f0b7f6fe"><div class="ttname"><a href="unionNVMCTRL__CTRLA__Type.html#a681489c8c6abf9104a2fab49f0b7f6fe">NVMCTRL_CTRLA_Type::AUTOWS</a></div><div class="ttdeci">uint16_t AUTOWS</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00047">nvmctrl.h:47</a></div></div>
<div class="ttc" id="aunionNVMCTRL__CTRLA__Type_html_a326ec917cd719be68c60f3dba461e529"><div class="ttname"><a href="unionNVMCTRL__CTRLA__Type.html#a326ec917cd719be68c60f3dba461e529">NVMCTRL_CTRLA_Type::CACHEDIS0</a></div><div class="ttdeci">uint16_t CACHEDIS0</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00054">nvmctrl.h:54</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_a32367491ed93c4ae3e6d3ceea8a42dc1"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#a32367491ed93c4ae3e6d3ceea8a42dc1">NVMCTRL_INTFLAG_Type::SEESFULL</a></div><div class="ttdeci">__I uint16_t SEESFULL</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00324">nvmctrl.h:324</a></div></div>
<div class="ttc" id="astructNvmctrl_html_a839fdde23536d0554617f373c57e702f"><div class="ttname"><a href="structNvmctrl.html#a839fdde23536d0554617f373c57e702f">Nvmctrl::ADDR</a></div><div class="ttdeci">__IO NVMCTRL_ADDR_Type ADDR</div><div class="ttdoc">Offset: 0x14 (R/W 32) Address.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00590">nvmctrl.h:590</a></div></div>
<div class="ttc" id="aunionNVMCTRL__RUNLOCK__Type_html"><div class="ttname"><a href="unionNVMCTRL__RUNLOCK__Type.html">NVMCTRL_RUNLOCK_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00419">nvmctrl.h:419</a></div></div>
<div class="ttc" id="aunionNVMCTRL__CTRLA__Type_html_ac25be3eb6ef2954bb84c10da7659e4fd"><div class="ttname"><a href="unionNVMCTRL__CTRLA__Type.html#ac25be3eb6ef2954bb84c10da7659e4fd">NVMCTRL_CTRLA_Type::RWS</a></div><div class="ttdeci">uint16_t RWS</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00051">nvmctrl.h:51</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_a48c18d7fcb2b36e3f944962d2c26d17f"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#a48c18d7fcb2b36e3f944962d2c26d17f">NVMCTRL_INTFLAG_Type::DONE</a></div><div class="ttdeci">__I uint16_t DONE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00316">nvmctrl.h:316</a></div></div>
<div class="ttc" id="aunionNVMCTRL__CTRLA__Type_html_a07cb354a8474052820dddae6fb60b601"><div class="ttname"><a href="unionNVMCTRL__CTRLA__Type.html#a07cb354a8474052820dddae6fb60b601">NVMCTRL_CTRLA_Type::PRM</a></div><div class="ttdeci">uint16_t PRM</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00050">nvmctrl.h:50</a></div></div>
<div class="ttc" id="aunionNVMCTRL__STATUS__Type_html_a2468e44fa0ad23c3c9f3105774e3c77d"><div class="ttname"><a href="unionNVMCTRL__STATUS__Type.html#a2468e44fa0ad23c3c9f3105774e3c77d">NVMCTRL_STATUS_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00374">nvmctrl.h:374</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html_a9ac58004be432a1220e42351e8e081aa"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html#a9ac58004be432a1220e42351e8e081aa">NVMCTRL_INTENSET_Type::SEEWRC</a></div><div class="ttdeci">uint16_t SEEWRC</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00278">nvmctrl.h:278</a></div></div>
<div class="ttc" id="aunionNVMCTRL__SEESTAT__Type_html"><div class="ttname"><a href="unionNVMCTRL__SEESTAT__Type.html">NVMCTRL_SEESTAT_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00540">nvmctrl.h:540</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html_a9b285721f768f3be959b53ecfc8e29e3"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html#a9b285721f768f3be959b53ecfc8e29e3">NVMCTRL_INTENSET_Type::PROGE</a></div><div class="ttdeci">uint16_t PROGE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00270">nvmctrl.h:270</a></div></div>
<div class="ttc" id="astructNvmctrl_html_a83918188239d1598f5abbcc3bc804110"><div class="ttname"><a href="structNvmctrl.html#a83918188239d1598f5abbcc3bc804110">Nvmctrl::SEECFG</a></div><div class="ttdeci">__IO NVMCTRL_SEECFG_Type SEECFG</div><div class="ttdoc">Offset: 0x2A (R/W 8) SmartEEPROM Configuration Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00596">nvmctrl.h:596</a></div></div>
<div class="ttc" id="aunionNVMCTRL__STATUS__Type_html"><div class="ttname"><a href="unionNVMCTRL__STATUS__Type.html">NVMCTRL_STATUS_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00362">nvmctrl.h:362</a></div></div>
<div class="ttc" id="aunionNVMCTRL__STATUS__Type_html_ac07c84bc4802900526d4433e00e8f472"><div class="ttname"><a href="unionNVMCTRL__STATUS__Type.html#ac07c84bc4802900526d4433e00e8f472">NVMCTRL_STATUS_Type::BOOTPROT</a></div><div class="ttdeci">uint16_t BOOTPROT</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00371">nvmctrl.h:371</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html_af25cfd3180fc6f4f819cbd4fa257e771"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html#af25cfd3180fc6f4f819cbd4fa257e771">NVMCTRL_INTENCLR_Type::SUSP</a></div><div class="ttdeci">uint16_t SUSP</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00227">nvmctrl.h:227</a></div></div>
<div class="ttc" id="aunionNVMCTRL__SEESTAT__Type_html_a2e1a67c20fea1e403a4ddee4e7d12716"><div class="ttname"><a href="unionNVMCTRL__SEESTAT__Type.html#a2e1a67c20fea1e403a4ddee4e7d12716">NVMCTRL_SEESTAT_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00553">nvmctrl.h:553</a></div></div>
<div class="ttc" id="astructNvmctrl_html_a03025c297f9b114679d6f596715a7b78"><div class="ttname"><a href="structNvmctrl.html#a03025c297f9b114679d6f596715a7b78">Nvmctrl::STATUS</a></div><div class="ttdeci">__I NVMCTRL_STATUS_Type STATUS</div><div class="ttdoc">Offset: 0x12 (R/ 16) Status.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00589">nvmctrl.h:589</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html_a7a3225bbceed8f691b9d2815e3cead70"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html#a7a3225bbceed8f691b9d2815e3cead70">NVMCTRL_INTENSET_Type::LOCKE</a></div><div class="ttdeci">uint16_t LOCKE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00271">nvmctrl.h:271</a></div></div>
<div class="ttc" id="aunionNVMCTRL__STATUS__Type_html_a11050531ff42aa856c76f8d3b13085f5"><div class="ttname"><a href="unionNVMCTRL__STATUS__Type.html#a11050531ff42aa856c76f8d3b13085f5">NVMCTRL_STATUS_Type::SUSP</a></div><div class="ttdeci">uint16_t SUSP</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00367">nvmctrl.h:367</a></div></div>
<div class="ttc" id="aunionNVMCTRL__CTRLA__Type_html_adbd3afd8e391e8c2f43182d8e68f78a4"><div class="ttname"><a href="unionNVMCTRL__CTRLA__Type.html#adbd3afd8e391e8c2f43182d8e68f78a4">NVMCTRL_CTRLA_Type::WMODE</a></div><div class="ttdeci">uint16_t WMODE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00049">nvmctrl.h:49</a></div></div>
<div class="ttc" id="aunionNVMCTRL__SEECFG__Type_html_a63f098bba99c740aa78c8bbea22b3af6"><div class="ttname"><a href="unionNVMCTRL__SEECFG__Type.html#a63f098bba99c740aa78c8bbea22b3af6">NVMCTRL_SEECFG_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00521">nvmctrl.h:521</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html_a9dab229444ed5f2d906a99473b04b9ae"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html#a9dab229444ed5f2d906a99473b04b9ae">NVMCTRL_INTENCLR_Type::SEEWRC</a></div><div class="ttdeci">uint16_t SEEWRC</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00230">nvmctrl.h:230</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_a0d371834ecd67b4fb96be92170e7f224"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#a0d371834ecd67b4fb96be92170e7f224">NVMCTRL_INTFLAG_Type::ECCSE</a></div><div class="ttdeci">__I uint16_t ECCSE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00320">nvmctrl.h:320</a></div></div>
<div class="ttc" id="aunionNVMCTRL__STATUS__Type_html_a2547800604ca06aaca17fb314cc49617"><div class="ttname"><a href="unionNVMCTRL__STATUS__Type.html#a2547800604ca06aaca17fb314cc49617">NVMCTRL_STATUS_Type::BPDIS</a></div><div class="ttdeci">uint16_t BPDIS</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00369">nvmctrl.h:369</a></div></div>
<div class="ttc" id="astructNvmctrl_html_a47dd09a378257903197d6d6e47f8ff2e"><div class="ttname"><a href="structNvmctrl.html#a47dd09a378257903197d6d6e47f8ff2e">Nvmctrl::INTENSET</a></div><div class="ttdeci">__IO NVMCTRL_INTENSET_Type INTENSET</div><div class="ttdoc">Offset: 0x0E (R/W 16) Interrupt Enable Set.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00587">nvmctrl.h:587</a></div></div>
<div class="ttc" id="aunionNVMCTRL__STATUS__Type_html_a0009e30c81ab96efe592d8ef9162d222"><div class="ttname"><a href="unionNVMCTRL__STATUS__Type.html#a0009e30c81ab96efe592d8ef9162d222">NVMCTRL_STATUS_Type::AFIRST</a></div><div class="ttdeci">uint16_t AFIRST</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00368">nvmctrl.h:368</a></div></div>
<div class="ttc" id="astructNvmctrl_html_a9012a764338f074e9a4a340fdc310614"><div class="ttname"><a href="structNvmctrl.html#a9012a764338f074e9a4a340fdc310614">Nvmctrl::ECCERR</a></div><div class="ttdeci">__I NVMCTRL_ECCERR_Type ECCERR</div><div class="ttdoc">Offset: 0x24 (R/ 32) ECC Error Status Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00593">nvmctrl.h:593</a></div></div>
<div class="ttc" id="aunionNVMCTRL__SEESTAT__Type_html_a903ea2c27b647efbd3e18c970fed944f"><div class="ttname"><a href="unionNVMCTRL__SEESTAT__Type.html#a903ea2c27b647efbd3e18c970fed944f">NVMCTRL_SEESTAT_Type::BUSY</a></div><div class="ttdeci">uint32_t BUSY</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00544">nvmctrl.h:544</a></div></div>
<div class="ttc" id="astructNvmctrl_html_a5ab09d2bf2f4d18b43b46cadf7d17657"><div class="ttname"><a href="structNvmctrl.html#a5ab09d2bf2f4d18b43b46cadf7d17657">Nvmctrl::PARAM</a></div><div class="ttdeci">__I NVMCTRL_PARAM_Type PARAM</div><div class="ttdoc">Offset: 0x08 (R/ 32) NVM Parameter.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00585">nvmctrl.h:585</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html_ad93e68e0100ba0b239128b23b3eab541"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html#ad93e68e0100ba0b239128b23b3eab541">NVMCTRL_INTENCLR_Type::LOCKE</a></div><div class="ttdeci">uint16_t LOCKE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00223">nvmctrl.h:223</a></div></div>
<div class="ttc" id="aunionNVMCTRL__PARAM__Type_html_a1614279db2de41ec8c6b19e2b60c873c"><div class="ttname"><a href="unionNVMCTRL__PARAM__Type.html#a1614279db2de41ec8c6b19e2b60c873c">NVMCTRL_PARAM_Type::PSZ</a></div><div class="ttdeci">uint32_t PSZ</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00179">nvmctrl.h:179</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html_a7310a69bb013cea08fac7c568d16bc53"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html#a7310a69bb013cea08fac7c568d16bc53">NVMCTRL_INTENCLR_Type::ECCSE</a></div><div class="ttdeci">uint16_t ECCSE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00224">nvmctrl.h:224</a></div></div>
<div class="ttc" id="aunionNVMCTRL__SEECFG__Type_html_a342c8b2e3693e6196d58e1d50f0bf48d"><div class="ttname"><a href="unionNVMCTRL__SEECFG__Type.html#a342c8b2e3693e6196d58e1d50f0bf48d">NVMCTRL_SEECFG_Type::APRDIS</a></div><div class="ttdeci">uint8_t APRDIS</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00518">nvmctrl.h:518</a></div></div>
<div class="ttc" id="aunionNVMCTRL__PARAM__Type_html_ac83f36a3d86a5e6dd9514bd4568a3a92"><div class="ttname"><a href="unionNVMCTRL__PARAM__Type.html#ac83f36a3d86a5e6dd9514bd4568a3a92">NVMCTRL_PARAM_Type::SEE</a></div><div class="ttdeci">uint32_t SEE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00181">nvmctrl.h:181</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_a76ef563bd656f0edc99b3957cb49161f"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#a76ef563bd656f0edc99b3957cb49161f">NVMCTRL_INTFLAG_Type::SUSP</a></div><div class="ttdeci">__I uint16_t SUSP</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00323">nvmctrl.h:323</a></div></div>
<div class="ttc" id="aunionNVMCTRL__ECCERR__Type_html_a5bfd3ea917171beaf77840f8cb16e7e4"><div class="ttname"><a href="unionNVMCTRL__ECCERR__Type.html#a5bfd3ea917171beaf77840f8cb16e7e4">NVMCTRL_ECCERR_Type::TYPEH</a></div><div class="ttdeci">uint32_t TYPEH</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00460">nvmctrl.h:460</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html_a575d7ed5e8b871be73fc81559a5fb9da"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html#a575d7ed5e8b871be73fc81559a5fb9da">NVMCTRL_INTENCLR_Type::SEESFULL</a></div><div class="ttdeci">uint16_t SEESFULL</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00228">nvmctrl.h:228</a></div></div>
<div class="ttc" id="aunionNVMCTRL__ECCERR__Type_html_a5f72176f3db39db4e6a3fc06caa698d4"><div class="ttname"><a href="unionNVMCTRL__ECCERR__Type.html#a5f72176f3db39db4e6a3fc06caa698d4">NVMCTRL_ECCERR_Type::ADDR</a></div><div class="ttdeci">uint32_t ADDR</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00457">nvmctrl.h:457</a></div></div>
<div class="ttc" id="aunionNVMCTRL__SEESTAT__Type_html_ac66c07b5e28103c80bc458fa5fb2ded6"><div class="ttname"><a href="unionNVMCTRL__SEESTAT__Type.html#ac66c07b5e28103c80bc458fa5fb2ded6">NVMCTRL_SEESTAT_Type::ASEES</a></div><div class="ttdeci">uint32_t ASEES</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00542">nvmctrl.h:542</a></div></div>
<div class="ttc" id="astructNvmctrl_html"><div class="ttname"><a href="structNvmctrl.html">Nvmctrl</a></div><div class="ttdoc">NVMCTRL APB hardware registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00580">nvmctrl.h:580</a></div></div>
<div class="ttc" id="astructNvmctrl_html_a7e8613746f6e54c152a3eb2405ab30ef"><div class="ttname"><a href="structNvmctrl.html#a7e8613746f6e54c152a3eb2405ab30ef">Nvmctrl::CTRLA</a></div><div class="ttdeci">__IO NVMCTRL_CTRLA_Type CTRLA</div><div class="ttdoc">Offset: 0x00 (R/W 16) Control A.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00581">nvmctrl.h:581</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html">NVMCTRL_INTENSET_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00266">nvmctrl.h:266</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html_a367a53f996895c84cc7772398c60d03b"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html#a367a53f996895c84cc7772398c60d03b">NVMCTRL_INTENSET_Type::SUSP</a></div><div class="ttdeci">uint16_t SUSP</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00275">nvmctrl.h:275</a></div></div>
<div class="ttc" id="aunionNVMCTRL__PBLDATA__Type_html_a5d2ff39bbfcd35809ac1ee48daff5685"><div class="ttname"><a href="unionNVMCTRL__PBLDATA__Type.html#a5d2ff39bbfcd35809ac1ee48daff5685">NVMCTRL_PBLDATA_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00441">nvmctrl.h:441</a></div></div>
<div class="ttc" id="aunionNVMCTRL__ADDR__Type_html"><div class="ttname"><a href="unionNVMCTRL__ADDR__Type.html">NVMCTRL_ADDR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00400">nvmctrl.h:400</a></div></div>
<div class="ttc" id="aunionNVMCTRL__SEESTAT__Type_html_a93222de39a417e536cb0ac9b99f569f8"><div class="ttname"><a href="unionNVMCTRL__SEESTAT__Type.html#a93222de39a417e536cb0ac9b99f569f8">NVMCTRL_SEESTAT_Type::PSZ</a></div><div class="ttdeci">uint32_t PSZ</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00550">nvmctrl.h:550</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_ae67c4f1da3c4d05980e4bfa83b9e93a6"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#ae67c4f1da3c4d05980e4bfa83b9e93a6">NVMCTRL_INTFLAG_Type::PROGE</a></div><div class="ttdeci">__I uint16_t PROGE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00318">nvmctrl.h:318</a></div></div>
<div class="ttc" id="aunionNVMCTRL__DBGCTRL__Type_html_a58028d83730f1bc2004e646391aaff37"><div class="ttname"><a href="unionNVMCTRL__DBGCTRL__Type.html#a58028d83730f1bc2004e646391aaff37">NVMCTRL_DBGCTRL_Type::ECCDIS</a></div><div class="ttdeci">uint8_t ECCDIS</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00496">nvmctrl.h:496</a></div></div>
<div class="ttc" id="aunionNVMCTRL__SEESTAT__Type_html_a6124fd33b572b188fcc4daf30f9f3b06"><div class="ttname"><a href="unionNVMCTRL__SEESTAT__Type.html#a6124fd33b572b188fcc4daf30f9f3b06">NVMCTRL_SEESTAT_Type::SBLK</a></div><div class="ttdeci">uint32_t SBLK</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00548">nvmctrl.h:548</a></div></div>
<div class="ttc" id="aunionNVMCTRL__DBGCTRL__Type_html_a3d2d0e61e554ede5b97e8c7f55519a7d"><div class="ttname"><a href="unionNVMCTRL__DBGCTRL__Type.html#a3d2d0e61e554ede5b97e8c7f55519a7d">NVMCTRL_DBGCTRL_Type::ECCELOG</a></div><div class="ttdeci">uint8_t ECCELOG</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00497">nvmctrl.h:497</a></div></div>
<div class="ttc" id="asame54n19a_8h_html_a0d957f1433aaf5d70e4dc2b68288442d"><div class="ttname"><a href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a></div><div class="ttdeci">volatile const uint8_t RoReg8</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00053">same54n19a.h:53</a></div></div>
<div class="ttc" id="aunionNVMCTRL__CTRLB__Type_html_a1632d370d1a889790f59cd1e1167f07b"><div class="ttname"><a href="unionNVMCTRL__CTRLB__Type.html#a1632d370d1a889790f59cd1e1167f07b">NVMCTRL_CTRLB_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00109">nvmctrl.h:109</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html_abf97f6c7c80d31d7a6d1b2f513166dad"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html#abf97f6c7c80d31d7a6d1b2f513166dad">NVMCTRL_INTENSET_Type::SEESOVF</a></div><div class="ttdeci">uint16_t SEESOVF</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00277">nvmctrl.h:277</a></div></div>
<div class="ttc" id="astructNvmctrl_html_a7c7db1c3ef2a8a290f214ae45db87a83"><div class="ttname"><a href="structNvmctrl.html#a7c7db1c3ef2a8a290f214ae45db87a83">Nvmctrl::INTENCLR</a></div><div class="ttdeci">__IO NVMCTRL_INTENCLR_Type INTENCLR</div><div class="ttdoc">Offset: 0x0C (R/W 16) Interrupt Enable Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00586">nvmctrl.h:586</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_ad003775067789cc5ad149fc566d26f20"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#ad003775067789cc5ad149fc566d26f20">NVMCTRL_INTFLAG_Type::SEESOVF</a></div><div class="ttdeci">__I uint16_t SEESOVF</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00325">nvmctrl.h:325</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html_a2cfa4ba94c13f8960beaf5459555d1d5"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html#a2cfa4ba94c13f8960beaf5459555d1d5">NVMCTRL_INTENCLR_Type::ADDRE</a></div><div class="ttdeci">uint16_t ADDRE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00221">nvmctrl.h:221</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_a188f8921aa82b38489c488cfb99d23f0"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#a188f8921aa82b38489c488cfb99d23f0">NVMCTRL_INTFLAG_Type::ADDRE</a></div><div class="ttdeci">__I uint16_t ADDRE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00317">nvmctrl.h:317</a></div></div>
<div class="ttc" id="aunionNVMCTRL__RUNLOCK__Type_html_a5ae1b23fc98934b9d720c4cb77892613"><div class="ttname"><a href="unionNVMCTRL__RUNLOCK__Type.html#a5ae1b23fc98934b9d720c4cb77892613">NVMCTRL_RUNLOCK_Type::RUNLOCK</a></div><div class="ttdeci">uint32_t RUNLOCK</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00421">nvmctrl.h:421</a></div></div>
<div class="ttc" id="aunionNVMCTRL__CTRLB__Type_html_ab8c908cb79b7f76453eeb8d8274c1e78"><div class="ttname"><a href="unionNVMCTRL__CTRLB__Type.html#ab8c908cb79b7f76453eeb8d8274c1e78">NVMCTRL_CTRLB_Type::CMDEX</a></div><div class="ttdeci">uint16_t CMDEX</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00107">nvmctrl.h:107</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html_aed69c41dc59031c87a1df89d327ea2be"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html#aed69c41dc59031c87a1df89d327ea2be">NVMCTRL_INTENCLR_Type::PROGE</a></div><div class="ttdeci">uint16_t PROGE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00222">nvmctrl.h:222</a></div></div>
<div class="ttc" id="aunionNVMCTRL__PBLDATA__Type_html"><div class="ttname"><a href="unionNVMCTRL__PBLDATA__Type.html">NVMCTRL_PBLDATA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00437">nvmctrl.h:437</a></div></div>
<div class="ttc" id="astructNvmctrl_html_ac7ffb9869923d722cdbb8d5cf66778e2"><div class="ttname"><a href="structNvmctrl.html#ac7ffb9869923d722cdbb8d5cf66778e2">Nvmctrl::SEESTAT</a></div><div class="ttdeci">__I NVMCTRL_SEESTAT_Type SEESTAT</div><div class="ttdoc">Offset: 0x2C (R/ 32) SmartEEPROM Status Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00598">nvmctrl.h:598</a></div></div>
<div class="ttc" id="aunionNVMCTRL__CTRLA__Type_html_a3437a1c23022e60b41149d46aefbb8a6"><div class="ttname"><a href="unionNVMCTRL__CTRLA__Type.html#a3437a1c23022e60b41149d46aefbb8a6">NVMCTRL_CTRLA_Type::AHBNS0</a></div><div class="ttdeci">uint16_t AHBNS0</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00052">nvmctrl.h:52</a></div></div>
<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_a27460c6fb274bc39d76ed2b04bef2c71"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#a27460c6fb274bc39d76ed2b04bef2c71">NVMCTRL_INTFLAG_Type::SEEWRC</a></div><div class="ttdeci">__I uint16_t SEEWRC</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00326">nvmctrl.h:326</a></div></div>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_U2400</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>REV_OSC32KCTRL</b>&#160;&#160;&#160;0x100</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a22544563390854dfa7f044a4b83abb54">OSC32KCTRL_INTENCLR_OFFSET</a>&#160;&#160;&#160;0x00</td></tr>
<tr class="memdesc:a22544563390854dfa7f044a4b83abb54"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_INTENCLR offset) Interrupt Enable Clear <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#ad3aafd31e91ecf11f10d847aca17c178">OSC32KCTRL_INTENCLR_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:ad3aafd31e91ecf11f10d847aca17c178"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_INTENCLR reset_value) Interrupt Enable Clear <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#ac526cada7174d6b98a29d5f0cf44ae97">OSC32KCTRL_INTENCLR_XOSC32KRDY_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ac526cada7174d6b98a29d5f0cf44ae97"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_INTENCLR) XOSC32K Ready Interrupt Enable <br /></td></tr>
<tr class="separator:ac526cada7174d6b98a29d5f0cf44ae97"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9ff2e92e80971d5c85b058c13c3a72d8"><td class="memItemLeft" align="right" valign="top"><a id="a9ff2e92e80971d5c85b058c13c3a72d8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_INTENCLR_XOSC32KRDY</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#ac526cada7174d6b98a29d5f0cf44ae97">OSC32KCTRL_INTENCLR_XOSC32KRDY_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#af25e6f5cc19d74258a0272cab04cc74e">OSC32KCTRL_INTENCLR_XOSC32KFAIL_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:af25e6f5cc19d74258a0272cab04cc74e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_INTENCLR) XOSC32K Clock Failure Detector Interrupt Enable <br /></td></tr>
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<tr class="memitem:a9b04b9b6d57110689f93d44723739711"><td class="memItemLeft" align="right" valign="top"><a id="a9b04b9b6d57110689f93d44723739711"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_INTENCLR_XOSC32KFAIL</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#af25e6f5cc19d74258a0272cab04cc74e">OSC32KCTRL_INTENCLR_XOSC32KFAIL_Pos</a>)</td></tr>
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<tr class="memitem:a753f913b2693500c8b4c878c5ed1e60a"><td class="memItemLeft" align="right" valign="top"><a id="a753f913b2693500c8b4c878c5ed1e60a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a753f913b2693500c8b4c878c5ed1e60a">OSC32KCTRL_INTENCLR_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000005)</td></tr>
<tr class="memdesc:a753f913b2693500c8b4c878c5ed1e60a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_INTENCLR) MASK Register <br /></td></tr>
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<tr class="memitem:acd0c571999e2292d247edb6c3226bc6a"><td class="memItemLeft" align="right" valign="top"><a id="acd0c571999e2292d247edb6c3226bc6a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#acd0c571999e2292d247edb6c3226bc6a">OSC32KCTRL_INTENSET_OFFSET</a>&#160;&#160;&#160;0x04</td></tr>
<tr class="memdesc:acd0c571999e2292d247edb6c3226bc6a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_INTENSET offset) Interrupt Enable Set <br /></td></tr>
<tr class="separator:acd0c571999e2292d247edb6c3226bc6a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a50b1ca7855eb0e99ad3619bb83f08d14"><td class="memItemLeft" align="right" valign="top"><a id="a50b1ca7855eb0e99ad3619bb83f08d14"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a50b1ca7855eb0e99ad3619bb83f08d14">OSC32KCTRL_INTENSET_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a50b1ca7855eb0e99ad3619bb83f08d14"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_INTENSET reset_value) Interrupt Enable Set <br /></td></tr>
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<tr class="memitem:af952ca2a3c0659258f67df4af0455662"><td class="memItemLeft" align="right" valign="top"><a id="af952ca2a3c0659258f67df4af0455662"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#af952ca2a3c0659258f67df4af0455662">OSC32KCTRL_INTENSET_XOSC32KRDY_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:af952ca2a3c0659258f67df4af0455662"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_INTENSET) XOSC32K Ready Interrupt Enable <br /></td></tr>
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<tr class="memitem:ab6791e6053589baa831f510e92f28557"><td class="memItemLeft" align="right" valign="top"><a id="ab6791e6053589baa831f510e92f28557"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_INTENSET_XOSC32KRDY</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#af952ca2a3c0659258f67df4af0455662">OSC32KCTRL_INTENSET_XOSC32KRDY_Pos</a>)</td></tr>
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<tr class="memitem:a7ebf60f93ae5934bdb16757b89c65663"><td class="memItemLeft" align="right" valign="top"><a id="a7ebf60f93ae5934bdb16757b89c65663"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a7ebf60f93ae5934bdb16757b89c65663">OSC32KCTRL_INTENSET_XOSC32KFAIL_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:a7ebf60f93ae5934bdb16757b89c65663"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_INTENSET) XOSC32K Clock Failure Detector Interrupt Enable <br /></td></tr>
<tr class="separator:a7ebf60f93ae5934bdb16757b89c65663"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6837cf93594b6569aa5c9c42c1f77f14"><td class="memItemLeft" align="right" valign="top"><a id="a6837cf93594b6569aa5c9c42c1f77f14"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_INTENSET_XOSC32KFAIL</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#a7ebf60f93ae5934bdb16757b89c65663">OSC32KCTRL_INTENSET_XOSC32KFAIL_Pos</a>)</td></tr>
<tr class="separator:a6837cf93594b6569aa5c9c42c1f77f14"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:affc01dd3bc722708c644175127d73070"><td class="memItemLeft" align="right" valign="top"><a id="affc01dd3bc722708c644175127d73070"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#affc01dd3bc722708c644175127d73070">OSC32KCTRL_INTENSET_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000005)</td></tr>
<tr class="memdesc:affc01dd3bc722708c644175127d73070"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_INTENSET) MASK Register <br /></td></tr>
<tr class="separator:affc01dd3bc722708c644175127d73070"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aec77fa56678a12082b0db8a754fa1750"><td class="memItemLeft" align="right" valign="top"><a id="aec77fa56678a12082b0db8a754fa1750"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aec77fa56678a12082b0db8a754fa1750">OSC32KCTRL_INTFLAG_OFFSET</a>&#160;&#160;&#160;0x08</td></tr>
<tr class="memdesc:aec77fa56678a12082b0db8a754fa1750"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_INTFLAG offset) Interrupt Flag Status and Clear <br /></td></tr>
<tr class="separator:aec77fa56678a12082b0db8a754fa1750"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a29a58edeb42ff385598a3005004dddf0"><td class="memItemLeft" align="right" valign="top"><a id="a29a58edeb42ff385598a3005004dddf0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a29a58edeb42ff385598a3005004dddf0">OSC32KCTRL_INTFLAG_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a29a58edeb42ff385598a3005004dddf0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_INTFLAG reset_value) Interrupt Flag Status and Clear <br /></td></tr>
<tr class="separator:a29a58edeb42ff385598a3005004dddf0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a85c2db168fc2fe2f24f7d01f57721a86"><td class="memItemLeft" align="right" valign="top"><a id="a85c2db168fc2fe2f24f7d01f57721a86"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a85c2db168fc2fe2f24f7d01f57721a86">OSC32KCTRL_INTFLAG_XOSC32KRDY_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a85c2db168fc2fe2f24f7d01f57721a86"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_INTFLAG) XOSC32K Ready <br /></td></tr>
<tr class="separator:a85c2db168fc2fe2f24f7d01f57721a86"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a928db90e1b2498fad008f00b1f14567d"><td class="memItemLeft" align="right" valign="top"><a id="a928db90e1b2498fad008f00b1f14567d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_INTFLAG_XOSC32KRDY</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#a85c2db168fc2fe2f24f7d01f57721a86">OSC32KCTRL_INTFLAG_XOSC32KRDY_Pos</a>)</td></tr>
<tr class="separator:a928db90e1b2498fad008f00b1f14567d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac64beded2c373e26b4afc3145c5913de"><td class="memItemLeft" align="right" valign="top"><a id="ac64beded2c373e26b4afc3145c5913de"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#ac64beded2c373e26b4afc3145c5913de">OSC32KCTRL_INTFLAG_XOSC32KFAIL_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:ac64beded2c373e26b4afc3145c5913de"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_INTFLAG) XOSC32K Clock Failure Detector <br /></td></tr>
<tr class="separator:ac64beded2c373e26b4afc3145c5913de"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8a998695b05d55b68b4e1eb3b999e61e"><td class="memItemLeft" align="right" valign="top"><a id="a8a998695b05d55b68b4e1eb3b999e61e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_INTFLAG_XOSC32KFAIL</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#ac64beded2c373e26b4afc3145c5913de">OSC32KCTRL_INTFLAG_XOSC32KFAIL_Pos</a>)</td></tr>
<tr class="separator:a8a998695b05d55b68b4e1eb3b999e61e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7265e7d7ad5a14c6c1c13035721290c2"><td class="memItemLeft" align="right" valign="top"><a id="a7265e7d7ad5a14c6c1c13035721290c2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a7265e7d7ad5a14c6c1c13035721290c2">OSC32KCTRL_INTFLAG_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000005)</td></tr>
<tr class="memdesc:a7265e7d7ad5a14c6c1c13035721290c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_INTFLAG) MASK Register <br /></td></tr>
<tr class="separator:a7265e7d7ad5a14c6c1c13035721290c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aac54085818ba483d7ee48d673dee16a4"><td class="memItemLeft" align="right" valign="top"><a id="aac54085818ba483d7ee48d673dee16a4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aac54085818ba483d7ee48d673dee16a4">OSC32KCTRL_STATUS_OFFSET</a>&#160;&#160;&#160;0x0C</td></tr>
<tr class="memdesc:aac54085818ba483d7ee48d673dee16a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_STATUS offset) Power and Clocks Status <br /></td></tr>
<tr class="separator:aac54085818ba483d7ee48d673dee16a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9e2afc754dc43d2728983182cadff4f1"><td class="memItemLeft" align="right" valign="top"><a id="a9e2afc754dc43d2728983182cadff4f1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a9e2afc754dc43d2728983182cadff4f1">OSC32KCTRL_STATUS_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a9e2afc754dc43d2728983182cadff4f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_STATUS reset_value) Power and Clocks Status <br /></td></tr>
<tr class="separator:a9e2afc754dc43d2728983182cadff4f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa403dd126839f064ae0c834d2bd63477"><td class="memItemLeft" align="right" valign="top"><a id="aa403dd126839f064ae0c834d2bd63477"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aa403dd126839f064ae0c834d2bd63477">OSC32KCTRL_STATUS_XOSC32KRDY_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:aa403dd126839f064ae0c834d2bd63477"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_STATUS) XOSC32K Ready <br /></td></tr>
<tr class="separator:aa403dd126839f064ae0c834d2bd63477"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afc8fd494fedc012db5a796e6946346b8"><td class="memItemLeft" align="right" valign="top"><a id="afc8fd494fedc012db5a796e6946346b8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_STATUS_XOSC32KRDY</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#aa403dd126839f064ae0c834d2bd63477">OSC32KCTRL_STATUS_XOSC32KRDY_Pos</a>)</td></tr>
<tr class="separator:afc8fd494fedc012db5a796e6946346b8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aaa40c13030939e6facaf0e5e61977ceb"><td class="memItemLeft" align="right" valign="top"><a id="aaa40c13030939e6facaf0e5e61977ceb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aaa40c13030939e6facaf0e5e61977ceb">OSC32KCTRL_STATUS_XOSC32KFAIL_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:aaa40c13030939e6facaf0e5e61977ceb"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_STATUS) XOSC32K Clock Failure Detector <br /></td></tr>
<tr class="separator:aaa40c13030939e6facaf0e5e61977ceb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a45b7d349910ca1672a76fd009e998c5f"><td class="memItemLeft" align="right" valign="top"><a id="a45b7d349910ca1672a76fd009e998c5f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_STATUS_XOSC32KFAIL</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#aaa40c13030939e6facaf0e5e61977ceb">OSC32KCTRL_STATUS_XOSC32KFAIL_Pos</a>)</td></tr>
<tr class="separator:a45b7d349910ca1672a76fd009e998c5f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a747587aa6615db76b74bf6f40ecd6f78"><td class="memItemLeft" align="right" valign="top"><a id="a747587aa6615db76b74bf6f40ecd6f78"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a747587aa6615db76b74bf6f40ecd6f78">OSC32KCTRL_STATUS_XOSC32KSW_Pos</a>&#160;&#160;&#160;3</td></tr>
<tr class="memdesc:a747587aa6615db76b74bf6f40ecd6f78"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_STATUS) XOSC32K Clock switch <br /></td></tr>
<tr class="separator:a747587aa6615db76b74bf6f40ecd6f78"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab4c5a18dcba0868f64223e7efd636729"><td class="memItemLeft" align="right" valign="top"><a id="ab4c5a18dcba0868f64223e7efd636729"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_STATUS_XOSC32KSW</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#a747587aa6615db76b74bf6f40ecd6f78">OSC32KCTRL_STATUS_XOSC32KSW_Pos</a>)</td></tr>
<tr class="separator:ab4c5a18dcba0868f64223e7efd636729"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1951a838cab5c017c20ba51dcea40224"><td class="memItemLeft" align="right" valign="top"><a id="a1951a838cab5c017c20ba51dcea40224"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a1951a838cab5c017c20ba51dcea40224">OSC32KCTRL_STATUS_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000000D)</td></tr>
<tr class="memdesc:a1951a838cab5c017c20ba51dcea40224"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_STATUS) MASK Register <br /></td></tr>
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<tr class="memitem:aa2ebbecf02c02fa55aa17bb3f0099fbf"><td class="memItemLeft" align="right" valign="top"><a id="aa2ebbecf02c02fa55aa17bb3f0099fbf"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aa2ebbecf02c02fa55aa17bb3f0099fbf">OSC32KCTRL_RTCCTRL_OFFSET</a>&#160;&#160;&#160;0x10</td></tr>
<tr class="memdesc:aa2ebbecf02c02fa55aa17bb3f0099fbf"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_RTCCTRL offset) RTC Clock Selection <br /></td></tr>
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<tr class="memitem:a7d97c06430481f93acb8a0290e2dad80"><td class="memItemLeft" align="right" valign="top"><a id="a7d97c06430481f93acb8a0290e2dad80"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a7d97c06430481f93acb8a0290e2dad80">OSC32KCTRL_RTCCTRL_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a7d97c06430481f93acb8a0290e2dad80"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_RTCCTRL reset_value) RTC Clock Selection <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#adcfbd528df699f49aa94aed33cfa1324">OSC32KCTRL_RTCCTRL_RTCSEL_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:adcfbd528df699f49aa94aed33cfa1324"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_RTCCTRL) RTC Clock Selection <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_RTCCTRL_RTCSEL_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#adcfbd528df699f49aa94aed33cfa1324">OSC32KCTRL_RTCCTRL_RTCSEL_Pos</a>)</td></tr>
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<tr class="memitem:a9c5410c5a3c5f72873b82a08fddfa6d1"><td class="memItemLeft" align="right" valign="top"><a id="a9c5410c5a3c5f72873b82a08fddfa6d1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_RTCCTRL_RTCSEL</b>(value)&#160;&#160;&#160;(OSC32KCTRL_RTCCTRL_RTCSEL_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#adcfbd528df699f49aa94aed33cfa1324">OSC32KCTRL_RTCCTRL_RTCSEL_Pos</a>))</td></tr>
<tr class="separator:a9c5410c5a3c5f72873b82a08fddfa6d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abc6a6db1dfeac26e74f33b4afd4a1252"><td class="memItemLeft" align="right" valign="top"><a id="abc6a6db1dfeac26e74f33b4afd4a1252"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#abc6a6db1dfeac26e74f33b4afd4a1252">OSC32KCTRL_RTCCTRL_RTCSEL_ULP1K_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:abc6a6db1dfeac26e74f33b4afd4a1252"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_RTCCTRL) 1.024kHz from 32kHz internal ULP oscillator <br /></td></tr>
<tr class="separator:abc6a6db1dfeac26e74f33b4afd4a1252"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae97e1489ab8d1f1a49d8e7e2ad8b7427"><td class="memItemLeft" align="right" valign="top"><a id="ae97e1489ab8d1f1a49d8e7e2ad8b7427"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#ae97e1489ab8d1f1a49d8e7e2ad8b7427">OSC32KCTRL_RTCCTRL_RTCSEL_ULP32K_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:ae97e1489ab8d1f1a49d8e7e2ad8b7427"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_RTCCTRL) 32.768kHz from 32kHz internal ULP oscillator <br /></td></tr>
<tr class="separator:ae97e1489ab8d1f1a49d8e7e2ad8b7427"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a14454b0efb7d20c1a14a46ebc86ff167"><td class="memItemLeft" align="right" valign="top"><a id="a14454b0efb7d20c1a14a46ebc86ff167"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a14454b0efb7d20c1a14a46ebc86ff167">OSC32KCTRL_RTCCTRL_RTCSEL_XOSC1K_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
<tr class="memdesc:a14454b0efb7d20c1a14a46ebc86ff167"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_RTCCTRL) 1.024kHz from 32.768kHz internal oscillator <br /></td></tr>
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<tr class="memitem:a3a4fae30686693a728ec790fa0bde8e6"><td class="memItemLeft" align="right" valign="top"><a id="a3a4fae30686693a728ec790fa0bde8e6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a3a4fae30686693a728ec790fa0bde8e6">OSC32KCTRL_RTCCTRL_RTCSEL_XOSC32K_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
<tr class="memdesc:a3a4fae30686693a728ec790fa0bde8e6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_RTCCTRL) 32.768kHz from 32.768kHz external crystal oscillator <br /></td></tr>
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<tr class="memitem:afafab9c8c609b5fed9d2e316ac79fbd2"><td class="memItemLeft" align="right" valign="top"><a id="afafab9c8c609b5fed9d2e316ac79fbd2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_RTCCTRL_RTCSEL_ULP1K</b>&#160;&#160;&#160;(<a class="el" href="component_2osc32kctrl_8h.html#abc6a6db1dfeac26e74f33b4afd4a1252">OSC32KCTRL_RTCCTRL_RTCSEL_ULP1K_Val</a> &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#adcfbd528df699f49aa94aed33cfa1324">OSC32KCTRL_RTCCTRL_RTCSEL_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_RTCCTRL_RTCSEL_ULP32K</b>&#160;&#160;&#160;(<a class="el" href="component_2osc32kctrl_8h.html#ae97e1489ab8d1f1a49d8e7e2ad8b7427">OSC32KCTRL_RTCCTRL_RTCSEL_ULP32K_Val</a> &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#adcfbd528df699f49aa94aed33cfa1324">OSC32KCTRL_RTCCTRL_RTCSEL_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_RTCCTRL_RTCSEL_XOSC1K</b>&#160;&#160;&#160;(<a class="el" href="component_2osc32kctrl_8h.html#a14454b0efb7d20c1a14a46ebc86ff167">OSC32KCTRL_RTCCTRL_RTCSEL_XOSC1K_Val</a> &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#adcfbd528df699f49aa94aed33cfa1324">OSC32KCTRL_RTCCTRL_RTCSEL_Pos</a>)</td></tr>
<tr class="separator:a082a70fa1afabc485d1e05603757581a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aab04e1f8b1bd6a65de6ca3c58c945a4a"><td class="memItemLeft" align="right" valign="top"><a id="aab04e1f8b1bd6a65de6ca3c58c945a4a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_RTCCTRL_RTCSEL_XOSC32K</b>&#160;&#160;&#160;(<a class="el" href="component_2osc32kctrl_8h.html#a3a4fae30686693a728ec790fa0bde8e6">OSC32KCTRL_RTCCTRL_RTCSEL_XOSC32K_Val</a> &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#adcfbd528df699f49aa94aed33cfa1324">OSC32KCTRL_RTCCTRL_RTCSEL_Pos</a>)</td></tr>
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<tr class="memitem:aa679222a2941c8283211ffdc4f5a7899"><td class="memItemLeft" align="right" valign="top"><a id="aa679222a2941c8283211ffdc4f5a7899"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aa679222a2941c8283211ffdc4f5a7899">OSC32KCTRL_RTCCTRL_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x07)</td></tr>
<tr class="memdesc:aa679222a2941c8283211ffdc4f5a7899"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_RTCCTRL) MASK Register <br /></td></tr>
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<tr class="memitem:a4c8965d920445c75c0c2c3ef28b2a642"><td class="memItemLeft" align="right" valign="top"><a id="a4c8965d920445c75c0c2c3ef28b2a642"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a4c8965d920445c75c0c2c3ef28b2a642">OSC32KCTRL_XOSC32K_OFFSET</a>&#160;&#160;&#160;0x14</td></tr>
<tr class="memdesc:a4c8965d920445c75c0c2c3ef28b2a642"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_XOSC32K offset) 32kHz External Crystal Oscillator (XOSC32K) Control <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a387f876de09ea1649ef2298d27e83c00">OSC32KCTRL_XOSC32K_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2080)</td></tr>
<tr class="memdesc:a387f876de09ea1649ef2298d27e83c00"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_XOSC32K reset_value) 32kHz External Crystal Oscillator (XOSC32K) Control <br /></td></tr>
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<tr class="memitem:a0d7122ed419157c43c7c76da24469f6e"><td class="memItemLeft" align="right" valign="top"><a id="a0d7122ed419157c43c7c76da24469f6e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a0d7122ed419157c43c7c76da24469f6e">OSC32KCTRL_XOSC32K_ENABLE_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:a0d7122ed419157c43c7c76da24469f6e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_XOSC32K) Oscillator Enable <br /></td></tr>
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<tr class="memitem:a32d877d8a016b0277e09268656487204"><td class="memItemLeft" align="right" valign="top"><a id="a32d877d8a016b0277e09268656487204"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_ENABLE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#a0d7122ed419157c43c7c76da24469f6e">OSC32KCTRL_XOSC32K_ENABLE_Pos</a>)</td></tr>
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<tr class="memitem:aab290b9fde2ce0432bd019281585e60c"><td class="memItemLeft" align="right" valign="top"><a id="aab290b9fde2ce0432bd019281585e60c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aab290b9fde2ce0432bd019281585e60c">OSC32KCTRL_XOSC32K_XTALEN_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:aab290b9fde2ce0432bd019281585e60c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_XOSC32K) Crystal Oscillator Enable <br /></td></tr>
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<tr class="memitem:ad2de3df4aa5f28ed5aa7aa3dd10f8233"><td class="memItemLeft" align="right" valign="top"><a id="ad2de3df4aa5f28ed5aa7aa3dd10f8233"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_XTALEN</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#aab290b9fde2ce0432bd019281585e60c">OSC32KCTRL_XOSC32K_XTALEN_Pos</a>)</td></tr>
<tr class="separator:ad2de3df4aa5f28ed5aa7aa3dd10f8233"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a746636fe077be073185aec9422a5c7a6"><td class="memItemLeft" align="right" valign="top"><a id="a746636fe077be073185aec9422a5c7a6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a746636fe077be073185aec9422a5c7a6">OSC32KCTRL_XOSC32K_EN32K_Pos</a>&#160;&#160;&#160;3</td></tr>
<tr class="memdesc:a746636fe077be073185aec9422a5c7a6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_XOSC32K) 32kHz Output Enable <br /></td></tr>
<tr class="separator:a746636fe077be073185aec9422a5c7a6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1fa80f6c89dded8bc827e016e37a9ae8"><td class="memItemLeft" align="right" valign="top"><a id="a1fa80f6c89dded8bc827e016e37a9ae8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_EN32K</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#a746636fe077be073185aec9422a5c7a6">OSC32KCTRL_XOSC32K_EN32K_Pos</a>)</td></tr>
<tr class="separator:a1fa80f6c89dded8bc827e016e37a9ae8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ade7145443f1f0bbd5705dce47e2e990e"><td class="memItemLeft" align="right" valign="top"><a id="ade7145443f1f0bbd5705dce47e2e990e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#ade7145443f1f0bbd5705dce47e2e990e">OSC32KCTRL_XOSC32K_EN1K_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:ade7145443f1f0bbd5705dce47e2e990e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_XOSC32K) 1kHz Output Enable <br /></td></tr>
<tr class="separator:ade7145443f1f0bbd5705dce47e2e990e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a76147ae9ecde38088720cf375ffc25c5"><td class="memItemLeft" align="right" valign="top"><a id="a76147ae9ecde38088720cf375ffc25c5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_EN1K</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#ade7145443f1f0bbd5705dce47e2e990e">OSC32KCTRL_XOSC32K_EN1K_Pos</a>)</td></tr>
<tr class="separator:a76147ae9ecde38088720cf375ffc25c5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aab719702395f394c3f8ab2a0862e3c62"><td class="memItemLeft" align="right" valign="top"><a id="aab719702395f394c3f8ab2a0862e3c62"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aab719702395f394c3f8ab2a0862e3c62">OSC32KCTRL_XOSC32K_RUNSTDBY_Pos</a>&#160;&#160;&#160;6</td></tr>
<tr class="memdesc:aab719702395f394c3f8ab2a0862e3c62"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_XOSC32K) Run in Standby <br /></td></tr>
<tr class="separator:aab719702395f394c3f8ab2a0862e3c62"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8651bb51b712bcdeeed8dfce3edb1701"><td class="memItemLeft" align="right" valign="top"><a id="a8651bb51b712bcdeeed8dfce3edb1701"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_RUNSTDBY</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#aab719702395f394c3f8ab2a0862e3c62">OSC32KCTRL_XOSC32K_RUNSTDBY_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a3f72f0a3fe37daf64ad90aa1041cc747">OSC32KCTRL_XOSC32K_ONDEMAND_Pos</a>&#160;&#160;&#160;7</td></tr>
<tr class="memdesc:a3f72f0a3fe37daf64ad90aa1041cc747"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_XOSC32K) On Demand Control <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_ONDEMAND</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#a3f72f0a3fe37daf64ad90aa1041cc747">OSC32KCTRL_XOSC32K_ONDEMAND_Pos</a>)</td></tr>
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<tr class="memitem:ace3a98c58164bac82b192e5c04bbc4f8"><td class="memItemLeft" align="right" valign="top"><a id="ace3a98c58164bac82b192e5c04bbc4f8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#ace3a98c58164bac82b192e5c04bbc4f8">OSC32KCTRL_XOSC32K_STARTUP_Pos</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:ace3a98c58164bac82b192e5c04bbc4f8"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_XOSC32K) Oscillator Start-Up Time <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_STARTUP_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#ace3a98c58164bac82b192e5c04bbc4f8">OSC32KCTRL_XOSC32K_STARTUP_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_STARTUP</b>(value)&#160;&#160;&#160;(OSC32KCTRL_XOSC32K_STARTUP_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#ace3a98c58164bac82b192e5c04bbc4f8">OSC32KCTRL_XOSC32K_STARTUP_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aac0d0821539272a535011934da425e8b">OSC32KCTRL_XOSC32K_WRTLOCK_Pos</a>&#160;&#160;&#160;12</td></tr>
<tr class="memdesc:aac0d0821539272a535011934da425e8b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_XOSC32K) Write Lock <br /></td></tr>
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<tr class="memitem:a5e3d4392d4bac19edc5ea0a1362f2414"><td class="memItemLeft" align="right" valign="top"><a id="a5e3d4392d4bac19edc5ea0a1362f2414"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_WRTLOCK</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#aac0d0821539272a535011934da425e8b">OSC32KCTRL_XOSC32K_WRTLOCK_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a2951861a2035901bcd3f214e894a1a5e">OSC32KCTRL_XOSC32K_CGM_Pos</a>&#160;&#160;&#160;13</td></tr>
<tr class="memdesc:a2951861a2035901bcd3f214e894a1a5e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_XOSC32K) Control Gain Mode <br /></td></tr>
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<tr class="memitem:a2143a1e277d9787754f776c76df930a1"><td class="memItemLeft" align="right" valign="top"><a id="a2143a1e277d9787754f776c76df930a1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_CGM_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#a2951861a2035901bcd3f214e894a1a5e">OSC32KCTRL_XOSC32K_CGM_Pos</a>)</td></tr>
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<tr class="memitem:a3ca66f28519aa5c4487227575f090119"><td class="memItemLeft" align="right" valign="top"><a id="a3ca66f28519aa5c4487227575f090119"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_CGM</b>(value)&#160;&#160;&#160;(OSC32KCTRL_XOSC32K_CGM_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#a2951861a2035901bcd3f214e894a1a5e">OSC32KCTRL_XOSC32K_CGM_Pos</a>))</td></tr>
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<tr class="memitem:a13a89e5964df1c5525050900094eda55"><td class="memItemLeft" align="right" valign="top"><a id="a13a89e5964df1c5525050900094eda55"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a13a89e5964df1c5525050900094eda55">OSC32KCTRL_XOSC32K_CGM_XT_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:a13a89e5964df1c5525050900094eda55"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_XOSC32K) Standard mode <br /></td></tr>
<tr class="separator:a13a89e5964df1c5525050900094eda55"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5861dda7b93a256f983a20230827df31"><td class="memItemLeft" align="right" valign="top"><a id="a5861dda7b93a256f983a20230827df31"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a5861dda7b93a256f983a20230827df31">OSC32KCTRL_XOSC32K_CGM_HS_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a5861dda7b93a256f983a20230827df31"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_XOSC32K) High Speed mode <br /></td></tr>
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<tr class="memitem:a846ad0c322bd22687331a3fb6f6c9ea8"><td class="memItemLeft" align="right" valign="top"><a id="a846ad0c322bd22687331a3fb6f6c9ea8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_CGM_XT</b>&#160;&#160;&#160;(<a class="el" href="component_2osc32kctrl_8h.html#a13a89e5964df1c5525050900094eda55">OSC32KCTRL_XOSC32K_CGM_XT_Val</a> &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#a2951861a2035901bcd3f214e894a1a5e">OSC32KCTRL_XOSC32K_CGM_Pos</a>)</td></tr>
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<tr class="memitem:aa167696bb41284cdcef90f7f28ccf4f7"><td class="memItemLeft" align="right" valign="top"><a id="aa167696bb41284cdcef90f7f28ccf4f7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_CGM_HS</b>&#160;&#160;&#160;(<a class="el" href="component_2osc32kctrl_8h.html#a5861dda7b93a256f983a20230827df31">OSC32KCTRL_XOSC32K_CGM_HS_Val</a> &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#a2951861a2035901bcd3f214e894a1a5e">OSC32KCTRL_XOSC32K_CGM_Pos</a>)</td></tr>
<tr class="separator:aa167696bb41284cdcef90f7f28ccf4f7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad0a22f67c5bcc3d0f0df3840c623f7ec"><td class="memItemLeft" align="right" valign="top"><a id="ad0a22f67c5bcc3d0f0df3840c623f7ec"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#ad0a22f67c5bcc3d0f0df3840c623f7ec">OSC32KCTRL_XOSC32K_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x77DE)</td></tr>
<tr class="memdesc:ad0a22f67c5bcc3d0f0df3840c623f7ec"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_XOSC32K) MASK Register <br /></td></tr>
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<tr class="memitem:ab2fbb0a95bf2348b26d6eb55d9488e27"><td class="memItemLeft" align="right" valign="top"><a id="ab2fbb0a95bf2348b26d6eb55d9488e27"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#ab2fbb0a95bf2348b26d6eb55d9488e27">OSC32KCTRL_CFDCTRL_OFFSET</a>&#160;&#160;&#160;0x16</td></tr>
<tr class="memdesc:ab2fbb0a95bf2348b26d6eb55d9488e27"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_CFDCTRL offset) Clock Failure Detector Control <br /></td></tr>
<tr class="separator:ab2fbb0a95bf2348b26d6eb55d9488e27"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab195093fda704bdb95893108576c6ba5"><td class="memItemLeft" align="right" valign="top"><a id="ab195093fda704bdb95893108576c6ba5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#ab195093fda704bdb95893108576c6ba5">OSC32KCTRL_CFDCTRL_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:ab195093fda704bdb95893108576c6ba5"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_CFDCTRL reset_value) Clock Failure Detector Control <br /></td></tr>
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<tr class="memitem:a2aedb65f916f976703240140126904f6"><td class="memItemLeft" align="right" valign="top"><a id="a2aedb65f916f976703240140126904f6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a2aedb65f916f976703240140126904f6">OSC32KCTRL_CFDCTRL_CFDEN_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a2aedb65f916f976703240140126904f6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_CFDCTRL) Clock Failure Detector Enable <br /></td></tr>
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<tr class="memitem:a48c5bbd2014d4426de3da7c19843cccd"><td class="memItemLeft" align="right" valign="top"><a id="a48c5bbd2014d4426de3da7c19843cccd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_CFDCTRL_CFDEN</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#a2aedb65f916f976703240140126904f6">OSC32KCTRL_CFDCTRL_CFDEN_Pos</a>)</td></tr>
<tr class="separator:a48c5bbd2014d4426de3da7c19843cccd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2e8a160a709d649bf92161a98ed35068"><td class="memItemLeft" align="right" valign="top"><a id="a2e8a160a709d649bf92161a98ed35068"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a2e8a160a709d649bf92161a98ed35068">OSC32KCTRL_CFDCTRL_SWBACK_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:a2e8a160a709d649bf92161a98ed35068"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_CFDCTRL) Clock Switch Back <br /></td></tr>
<tr class="separator:a2e8a160a709d649bf92161a98ed35068"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4917b873da9c12348949f45296415642"><td class="memItemLeft" align="right" valign="top"><a id="a4917b873da9c12348949f45296415642"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_CFDCTRL_SWBACK</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#a2e8a160a709d649bf92161a98ed35068">OSC32KCTRL_CFDCTRL_SWBACK_Pos</a>)</td></tr>
<tr class="separator:a4917b873da9c12348949f45296415642"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2dc36bba505b43a70628172895e4cee3"><td class="memItemLeft" align="right" valign="top"><a id="a2dc36bba505b43a70628172895e4cee3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a2dc36bba505b43a70628172895e4cee3">OSC32KCTRL_CFDCTRL_CFDPRESC_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:a2dc36bba505b43a70628172895e4cee3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_CFDCTRL) Clock Failure Detector Prescaler <br /></td></tr>
<tr class="separator:a2dc36bba505b43a70628172895e4cee3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a365297836f76db49eeea030e59b87471"><td class="memItemLeft" align="right" valign="top"><a id="a365297836f76db49eeea030e59b87471"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_CFDCTRL_CFDPRESC</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#a2dc36bba505b43a70628172895e4cee3">OSC32KCTRL_CFDCTRL_CFDPRESC_Pos</a>)</td></tr>
<tr class="separator:a365297836f76db49eeea030e59b87471"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3fec783d5e565f11fe77f4ae88a9876d"><td class="memItemLeft" align="right" valign="top"><a id="a3fec783d5e565f11fe77f4ae88a9876d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a3fec783d5e565f11fe77f4ae88a9876d">OSC32KCTRL_CFDCTRL_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x07)</td></tr>
<tr class="memdesc:a3fec783d5e565f11fe77f4ae88a9876d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_CFDCTRL) MASK Register <br /></td></tr>
<tr class="separator:a3fec783d5e565f11fe77f4ae88a9876d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abe8425e24e008b4160dd1756dc5c4e66"><td class="memItemLeft" align="right" valign="top"><a id="abe8425e24e008b4160dd1756dc5c4e66"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#abe8425e24e008b4160dd1756dc5c4e66">OSC32KCTRL_EVCTRL_OFFSET</a>&#160;&#160;&#160;0x17</td></tr>
<tr class="memdesc:abe8425e24e008b4160dd1756dc5c4e66"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_EVCTRL offset) Event Control <br /></td></tr>
<tr class="separator:abe8425e24e008b4160dd1756dc5c4e66"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aced57526fa5e5b62a8f4bebb37deea0f"><td class="memItemLeft" align="right" valign="top"><a id="aced57526fa5e5b62a8f4bebb37deea0f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aced57526fa5e5b62a8f4bebb37deea0f">OSC32KCTRL_EVCTRL_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:aced57526fa5e5b62a8f4bebb37deea0f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_EVCTRL reset_value) Event Control <br /></td></tr>
<tr class="separator:aced57526fa5e5b62a8f4bebb37deea0f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a71fb66c27d4c80fa73af5641ef5083ae"><td class="memItemLeft" align="right" valign="top"><a id="a71fb66c27d4c80fa73af5641ef5083ae"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a71fb66c27d4c80fa73af5641ef5083ae">OSC32KCTRL_EVCTRL_CFDEO_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a71fb66c27d4c80fa73af5641ef5083ae"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_EVCTRL) Clock Failure Detector Event Output Enable <br /></td></tr>
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<tr class="memitem:a1539ff86694925a58269f5416763f901"><td class="memItemLeft" align="right" valign="top"><a id="a1539ff86694925a58269f5416763f901"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_EVCTRL_CFDEO</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#a71fb66c27d4c80fa73af5641ef5083ae">OSC32KCTRL_EVCTRL_CFDEO_Pos</a>)</td></tr>
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<tr class="memitem:a8c5fd77028706618775ef03e5b6fd146"><td class="memItemLeft" align="right" valign="top"><a id="a8c5fd77028706618775ef03e5b6fd146"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a8c5fd77028706618775ef03e5b6fd146">OSC32KCTRL_EVCTRL_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x01)</td></tr>
<tr class="memdesc:a8c5fd77028706618775ef03e5b6fd146"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_EVCTRL) MASK Register <br /></td></tr>
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<tr class="memitem:aa2ae9323b7a5247081c2bfc04f97e8d1"><td class="memItemLeft" align="right" valign="top"><a id="aa2ae9323b7a5247081c2bfc04f97e8d1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aa2ae9323b7a5247081c2bfc04f97e8d1">OSC32KCTRL_OSCULP32K_OFFSET</a>&#160;&#160;&#160;0x1C</td></tr>
<tr class="memdesc:aa2ae9323b7a5247081c2bfc04f97e8d1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_OSCULP32K offset) 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#ab745111a32543331557e25c5563a4511">OSC32KCTRL_OSCULP32K_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:ab745111a32543331557e25c5563a4511"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_OSCULP32K reset_value) 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a83057d513fe89052c2f00778184eeb02">OSC32KCTRL_OSCULP32K_EN32K_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:a83057d513fe89052c2f00778184eeb02"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_OSCULP32K) Enable Out 32k <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_OSCULP32K_EN32K</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#a83057d513fe89052c2f00778184eeb02">OSC32KCTRL_OSCULP32K_EN32K_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aadfe0343e0462db3b20dca24186d2681">OSC32KCTRL_OSCULP32K_EN1K_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:aadfe0343e0462db3b20dca24186d2681"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_OSCULP32K) Enable Out 1k <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_OSCULP32K_EN1K</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#aadfe0343e0462db3b20dca24186d2681">OSC32KCTRL_OSCULP32K_EN1K_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aa2abedc94425667d08d6682c2c4f19cf">OSC32KCTRL_OSCULP32K_CALIB_Pos</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:aa2abedc94425667d08d6682c2c4f19cf"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_OSCULP32K) Oscillator Calibration <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_OSCULP32K_CALIB_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3F) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#aa2abedc94425667d08d6682c2c4f19cf">OSC32KCTRL_OSCULP32K_CALIB_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_OSCULP32K_CALIB</b>(value)&#160;&#160;&#160;(OSC32KCTRL_OSCULP32K_CALIB_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#aa2abedc94425667d08d6682c2c4f19cf">OSC32KCTRL_OSCULP32K_CALIB_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a591a0a2ca06e742e29fcac7418e0593f">OSC32KCTRL_OSCULP32K_WRTLOCK_Pos</a>&#160;&#160;&#160;15</td></tr>
<tr class="memdesc:a591a0a2ca06e742e29fcac7418e0593f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_OSCULP32K) Write Lock <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_OSCULP32K_WRTLOCK</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2osc32kctrl_8h.html#a591a0a2ca06e742e29fcac7418e0593f">OSC32KCTRL_OSCULP32K_WRTLOCK_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a7b3ca0c8a3b7f6e1b9baf3c1da4cd182">OSC32KCTRL_OSCULP32K_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000BF06)</td></tr>
<tr class="memdesc:a7b3ca0c8a3b7f6e1b9baf3c1da4cd182"><td class="mdescLeft">&#160;</td><td class="mdescRight">(OSC32KCTRL_OSCULP32K) MASK Register <br /></td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Component description for OSC32KCTRL. </p>
<p>Copyright (c) 2019 Microchip Technology Inc.</p>
<p>\asf_license_start </p>
<p class="definition">Definition in file <a class="el" href="component_2osc32kctrl_8h_source.html">osc32kctrl.h</a>.</p>
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<a href="component_2osc32kctrl_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_OSC32KCTRL_COMPONENT_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_OSC32KCTRL_COMPONENT_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160; </div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define OSC32KCTRL_U2400</span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define REV_OSC32KCTRL 0x100</span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160; </div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="comment">/* -------- OSC32KCTRL_INTENCLR : (OSC32KCTRL Offset: 0x00) (R/W 32) Interrupt Enable Clear -------- */</span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00044"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__INTENCLR__Type.html"> 44</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00046"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__INTENCLR__Type.html#a9767d93a8f34890e0fca6167ae2f34e7"> 46</a></span>&#160; uint32_t <a class="code" href="unionOSC32KCTRL__INTENCLR__Type.html#a9767d93a8f34890e0fca6167ae2f34e7">XOSC32KRDY</a>:1; </div>
<div class="line"><a name="l00047"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__INTENCLR__Type.html#a4fa73355885869cafacd233393165321"> 47</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00048"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__INTENCLR__Type.html#acbae6cfc736c8503ededb2014cb893da"> 48</a></span>&#160; uint32_t <a class="code" href="unionOSC32KCTRL__INTENCLR__Type.html#acbae6cfc736c8503ededb2014cb893da">XOSC32KFAIL</a>:1; </div>
<div class="line"><a name="l00049"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__INTENCLR__Type.html#a6c8f982034669aedb2686d13616c7c7f"> 49</a></span>&#160; uint32_t :29; </div>
<div class="line"><a name="l00050"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__INTENCLR__Type.html#ab122f7b15c0752ade9f5bfc7d0831089"> 50</a></span>&#160; } bit; </div>
<div class="line"><a name="l00051"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__INTENCLR__Type.html#a4e4b0d19e00dfcf3cf8f414b5d4d5174"> 51</a></span>&#160; uint32_t <a class="code" href="unionOSC32KCTRL__INTENCLR__Type.html#a4e4b0d19e00dfcf3cf8f414b5d4d5174">reg</a>; </div>
<div class="line"><a name="l00052"></a><span class="lineno"> 52</span>&#160;} <a class="code" href="unionOSC32KCTRL__INTENCLR__Type.html">OSC32KCTRL_INTENCLR_Type</a>;</div>
<div class="line"><a name="l00053"></a><span class="lineno"> 53</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00054"></a><span class="lineno"> 54</span>&#160; </div>
<div class="line"><a name="l00055"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a22544563390854dfa7f044a4b83abb54"> 55</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_INTENCLR_OFFSET 0x00 </span></div>
<div class="line"><a name="l00056"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#ad3aafd31e91ecf11f10d847aca17c178"> 56</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_INTENCLR_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00058"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#ac526cada7174d6b98a29d5f0cf44ae97"> 58</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_INTENCLR_XOSC32KRDY_Pos 0 </span></div>
<div class="line"><a name="l00059"></a><span class="lineno"> 59</span>&#160;<span class="preprocessor">#define OSC32KCTRL_INTENCLR_XOSC32KRDY (_U_(0x1) &lt;&lt; OSC32KCTRL_INTENCLR_XOSC32KRDY_Pos)</span></div>
<div class="line"><a name="l00060"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#af25e6f5cc19d74258a0272cab04cc74e"> 60</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_INTENCLR_XOSC32KFAIL_Pos 2 </span></div>
<div class="line"><a name="l00061"></a><span class="lineno"> 61</span>&#160;<span class="preprocessor">#define OSC32KCTRL_INTENCLR_XOSC32KFAIL (_U_(0x1) &lt;&lt; OSC32KCTRL_INTENCLR_XOSC32KFAIL_Pos)</span></div>
<div class="line"><a name="l00062"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a753f913b2693500c8b4c878c5ed1e60a"> 62</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_INTENCLR_MASK _U_(0x00000005) </span></div>
<div class="line"><a name="l00064"></a><span class="lineno"> 64</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- OSC32KCTRL_INTENSET : (OSC32KCTRL Offset: 0x04) (R/W 32) Interrupt Enable Set -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00065"></a><span class="lineno"> 65</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00066"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__INTENSET__Type.html"> 66</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00067"></a><span class="lineno"> 67</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00068"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__INTENSET__Type.html#aae11a18ae465664ab32615eaa3d38e22"> 68</a></span>&#160; uint32_t <a class="code" href="unionOSC32KCTRL__INTENSET__Type.html#aae11a18ae465664ab32615eaa3d38e22">XOSC32KRDY</a>:1; </div>
<div class="line"><a name="l00069"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__INTENSET__Type.html#a04d6387a95e0d5bd185c13c55db6f3e1"> 69</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00070"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__INTENSET__Type.html#a778b6e8e689687f19b4872df5c9442a9"> 70</a></span>&#160; uint32_t <a class="code" href="unionOSC32KCTRL__INTENSET__Type.html#a778b6e8e689687f19b4872df5c9442a9">XOSC32KFAIL</a>:1; </div>
<div class="line"><a name="l00071"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__INTENSET__Type.html#a2d943b8ebbee7e4d9cee82128ba2290e"> 71</a></span>&#160; uint32_t :29; </div>
<div class="line"><a name="l00072"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__INTENSET__Type.html#a2bda98ab86ecc87cba9d1c4da4664b9e"> 72</a></span>&#160; } bit; </div>
<div class="line"><a name="l00073"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__INTENSET__Type.html#a40b6c3f262f0483bcf4beeb8a832f33c"> 73</a></span>&#160; uint32_t <a class="code" href="unionOSC32KCTRL__INTENSET__Type.html#a40b6c3f262f0483bcf4beeb8a832f33c">reg</a>; </div>
<div class="line"><a name="l00074"></a><span class="lineno"> 74</span>&#160;} <a class="code" href="unionOSC32KCTRL__INTENSET__Type.html">OSC32KCTRL_INTENSET_Type</a>;</div>
<div class="line"><a name="l00075"></a><span class="lineno"> 75</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00076"></a><span class="lineno"> 76</span>&#160; </div>
<div class="line"><a name="l00077"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#acd0c571999e2292d247edb6c3226bc6a"> 77</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_INTENSET_OFFSET 0x04 </span></div>
<div class="line"><a name="l00078"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a50b1ca7855eb0e99ad3619bb83f08d14"> 78</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_INTENSET_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00080"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#af952ca2a3c0659258f67df4af0455662"> 80</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_INTENSET_XOSC32KRDY_Pos 0 </span></div>
<div class="line"><a name="l00081"></a><span class="lineno"> 81</span>&#160;<span class="preprocessor">#define OSC32KCTRL_INTENSET_XOSC32KRDY (_U_(0x1) &lt;&lt; OSC32KCTRL_INTENSET_XOSC32KRDY_Pos)</span></div>
<div class="line"><a name="l00082"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a7ebf60f93ae5934bdb16757b89c65663"> 82</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_INTENSET_XOSC32KFAIL_Pos 2 </span></div>
<div class="line"><a name="l00083"></a><span class="lineno"> 83</span>&#160;<span class="preprocessor">#define OSC32KCTRL_INTENSET_XOSC32KFAIL (_U_(0x1) &lt;&lt; OSC32KCTRL_INTENSET_XOSC32KFAIL_Pos)</span></div>
<div class="line"><a name="l00084"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#affc01dd3bc722708c644175127d73070"> 84</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_INTENSET_MASK _U_(0x00000005) </span></div>
<div class="line"><a name="l00086"></a><span class="lineno"> 86</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- OSC32KCTRL_INTFLAG : (OSC32KCTRL Offset: 0x08) (R/W 32) Interrupt Flag Status and Clear -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00087"></a><span class="lineno"> 87</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00088"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__INTFLAG__Type.html"> 88</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{ <span class="comment">// __I to avoid read-modify-write on write-to-clear register</span></div>
<div class="line"><a name="l00089"></a><span class="lineno"> 89</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00090"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__INTFLAG__Type.html#a8ce6f0cac03c2259eaef81162a721792"> 90</a></span>&#160; __I uint32_t <a class="code" href="unionOSC32KCTRL__INTFLAG__Type.html#a8ce6f0cac03c2259eaef81162a721792">XOSC32KRDY</a>:1; </div>
<div class="line"><a name="l00091"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__INTFLAG__Type.html#a70f545d5e77582e7bf564d06661495cc"> 91</a></span>&#160; __I <a class="code" href="unionOSC32KCTRL__INTFLAG__Type.html#a70f545d5e77582e7bf564d06661495cc">uint32_t</a> :1; </div>
<div class="line"><a name="l00092"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__INTFLAG__Type.html#a8b92bb4dffc3755a12ef355f278ebec3"> 92</a></span>&#160; __I uint32_t <a class="code" href="unionOSC32KCTRL__INTFLAG__Type.html#a8b92bb4dffc3755a12ef355f278ebec3">XOSC32KFAIL</a>:1; </div>
<div class="line"><a name="l00093"></a><span class="lineno"> 93</span>&#160; __I uint32_t :29; </div>
<div class="line"><a name="l00094"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__INTFLAG__Type.html#a64f2af5fdc584ef2ea7f6361b82d8c7c"> 94</a></span>&#160; } bit; </div>
<div class="line"><a name="l00095"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__INTFLAG__Type.html#a2b9283a58346fdff73051c27d116573b"> 95</a></span>&#160; uint32_t <a class="code" href="unionOSC32KCTRL__INTFLAG__Type.html#a2b9283a58346fdff73051c27d116573b">reg</a>; </div>
<div class="line"><a name="l00096"></a><span class="lineno"> 96</span>&#160;} <a class="code" href="unionOSC32KCTRL__INTFLAG__Type.html">OSC32KCTRL_INTFLAG_Type</a>;</div>
<div class="line"><a name="l00097"></a><span class="lineno"> 97</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00098"></a><span class="lineno"> 98</span>&#160; </div>
<div class="line"><a name="l00099"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#aec77fa56678a12082b0db8a754fa1750"> 99</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_INTFLAG_OFFSET 0x08 </span></div>
<div class="line"><a name="l00100"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a29a58edeb42ff385598a3005004dddf0"> 100</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_INTFLAG_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00102"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a85c2db168fc2fe2f24f7d01f57721a86"> 102</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_INTFLAG_XOSC32KRDY_Pos 0 </span></div>
<div class="line"><a name="l00103"></a><span class="lineno"> 103</span>&#160;<span class="preprocessor">#define OSC32KCTRL_INTFLAG_XOSC32KRDY (_U_(0x1) &lt;&lt; OSC32KCTRL_INTFLAG_XOSC32KRDY_Pos)</span></div>
<div class="line"><a name="l00104"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#ac64beded2c373e26b4afc3145c5913de"> 104</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_INTFLAG_XOSC32KFAIL_Pos 2 </span></div>
<div class="line"><a name="l00105"></a><span class="lineno"> 105</span>&#160;<span class="preprocessor">#define OSC32KCTRL_INTFLAG_XOSC32KFAIL (_U_(0x1) &lt;&lt; OSC32KCTRL_INTFLAG_XOSC32KFAIL_Pos)</span></div>
<div class="line"><a name="l00106"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a7265e7d7ad5a14c6c1c13035721290c2"> 106</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_INTFLAG_MASK _U_(0x00000005) </span></div>
<div class="line"><a name="l00108"></a><span class="lineno"> 108</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- OSC32KCTRL_STATUS : (OSC32KCTRL Offset: 0x0C) (R/ 32) Power and Clocks Status -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00109"></a><span class="lineno"> 109</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00110"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__STATUS__Type.html"> 110</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00111"></a><span class="lineno"> 111</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00112"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__STATUS__Type.html#ae90fc9ce9f80cd21ca28e2b450d15765"> 112</a></span>&#160; uint32_t <a class="code" href="unionOSC32KCTRL__STATUS__Type.html#ae90fc9ce9f80cd21ca28e2b450d15765">XOSC32KRDY</a>:1; </div>
<div class="line"><a name="l00113"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__STATUS__Type.html#ac7bbc3dee77138bf73133e534217c559"> 113</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00114"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__STATUS__Type.html#a3c3b2796b9ca50d6f8ef0c636418bf5b"> 114</a></span>&#160; uint32_t <a class="code" href="unionOSC32KCTRL__STATUS__Type.html#a3c3b2796b9ca50d6f8ef0c636418bf5b">XOSC32KFAIL</a>:1; </div>
<div class="line"><a name="l00115"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__STATUS__Type.html#a65fdb5c9e0f3427487c4e9a22ae17222"> 115</a></span>&#160; uint32_t <a class="code" href="unionOSC32KCTRL__STATUS__Type.html#a65fdb5c9e0f3427487c4e9a22ae17222">XOSC32KSW</a>:1; </div>
<div class="line"><a name="l00116"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__STATUS__Type.html#ae54d87d6f8a1fa63863a10a5f51fab60"> 116</a></span>&#160; uint32_t :28; </div>
<div class="line"><a name="l00117"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__STATUS__Type.html#a43a49a635dad0776f2b01c9158559ebc"> 117</a></span>&#160; } bit; </div>
<div class="line"><a name="l00118"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__STATUS__Type.html#a044c3f31f968e7e7a88f22400382b777"> 118</a></span>&#160; uint32_t <a class="code" href="unionOSC32KCTRL__STATUS__Type.html#a044c3f31f968e7e7a88f22400382b777">reg</a>; </div>
<div class="line"><a name="l00119"></a><span class="lineno"> 119</span>&#160;} <a class="code" href="unionOSC32KCTRL__STATUS__Type.html">OSC32KCTRL_STATUS_Type</a>;</div>
<div class="line"><a name="l00120"></a><span class="lineno"> 120</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00121"></a><span class="lineno"> 121</span>&#160; </div>
<div class="line"><a name="l00122"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#aac54085818ba483d7ee48d673dee16a4"> 122</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_STATUS_OFFSET 0x0C </span></div>
<div class="line"><a name="l00123"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a9e2afc754dc43d2728983182cadff4f1"> 123</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_STATUS_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00125"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#aa403dd126839f064ae0c834d2bd63477"> 125</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_STATUS_XOSC32KRDY_Pos 0 </span></div>
<div class="line"><a name="l00126"></a><span class="lineno"> 126</span>&#160;<span class="preprocessor">#define OSC32KCTRL_STATUS_XOSC32KRDY (_U_(0x1) &lt;&lt; OSC32KCTRL_STATUS_XOSC32KRDY_Pos)</span></div>
<div class="line"><a name="l00127"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#aaa40c13030939e6facaf0e5e61977ceb"> 127</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_STATUS_XOSC32KFAIL_Pos 2 </span></div>
<div class="line"><a name="l00128"></a><span class="lineno"> 128</span>&#160;<span class="preprocessor">#define OSC32KCTRL_STATUS_XOSC32KFAIL (_U_(0x1) &lt;&lt; OSC32KCTRL_STATUS_XOSC32KFAIL_Pos)</span></div>
<div class="line"><a name="l00129"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a747587aa6615db76b74bf6f40ecd6f78"> 129</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_STATUS_XOSC32KSW_Pos 3 </span></div>
<div class="line"><a name="l00130"></a><span class="lineno"> 130</span>&#160;<span class="preprocessor">#define OSC32KCTRL_STATUS_XOSC32KSW (_U_(0x1) &lt;&lt; OSC32KCTRL_STATUS_XOSC32KSW_Pos)</span></div>
<div class="line"><a name="l00131"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a1951a838cab5c017c20ba51dcea40224"> 131</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_STATUS_MASK _U_(0x0000000D) </span></div>
<div class="line"><a name="l00133"></a><span class="lineno"> 133</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- OSC32KCTRL_RTCCTRL : (OSC32KCTRL Offset: 0x10) (R/W 8) RTC Clock Selection -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00134"></a><span class="lineno"> 134</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00135"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__RTCCTRL__Type.html"> 135</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00136"></a><span class="lineno"> 136</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00137"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__RTCCTRL__Type.html#aa19148619075344006f893115d071677"> 137</a></span>&#160; uint8_t <a class="code" href="unionOSC32KCTRL__RTCCTRL__Type.html#aa19148619075344006f893115d071677">RTCSEL</a>:3; </div>
<div class="line"><a name="l00138"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__RTCCTRL__Type.html#a88ef615f24b123fcc401fb5c58fc0ea6"> 138</a></span>&#160; uint8_t :5; </div>
<div class="line"><a name="l00139"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__RTCCTRL__Type.html#a8ac92662340a8129f230b962e0d996bc"> 139</a></span>&#160; } bit; </div>
<div class="line"><a name="l00140"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__RTCCTRL__Type.html#a314ef9617b1ba52b248fdba391f5c632"> 140</a></span>&#160; uint8_t <a class="code" href="unionOSC32KCTRL__RTCCTRL__Type.html#a314ef9617b1ba52b248fdba391f5c632">reg</a>; </div>
<div class="line"><a name="l00141"></a><span class="lineno"> 141</span>&#160;} <a class="code" href="unionOSC32KCTRL__RTCCTRL__Type.html">OSC32KCTRL_RTCCTRL_Type</a>;</div>
<div class="line"><a name="l00142"></a><span class="lineno"> 142</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00143"></a><span class="lineno"> 143</span>&#160; </div>
<div class="line"><a name="l00144"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#aa2ebbecf02c02fa55aa17bb3f0099fbf"> 144</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_RTCCTRL_OFFSET 0x10 </span></div>
<div class="line"><a name="l00145"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a7d97c06430481f93acb8a0290e2dad80"> 145</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_RTCCTRL_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00147"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#adcfbd528df699f49aa94aed33cfa1324"> 147</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_RTCCTRL_RTCSEL_Pos 0 </span></div>
<div class="line"><a name="l00148"></a><span class="lineno"> 148</span>&#160;<span class="preprocessor">#define OSC32KCTRL_RTCCTRL_RTCSEL_Msk (_U_(0x7) &lt;&lt; OSC32KCTRL_RTCCTRL_RTCSEL_Pos)</span></div>
<div class="line"><a name="l00149"></a><span class="lineno"> 149</span>&#160;<span class="preprocessor">#define OSC32KCTRL_RTCCTRL_RTCSEL(value) (OSC32KCTRL_RTCCTRL_RTCSEL_Msk &amp; ((value) &lt;&lt; OSC32KCTRL_RTCCTRL_RTCSEL_Pos))</span></div>
<div class="line"><a name="l00150"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#abc6a6db1dfeac26e74f33b4afd4a1252"> 150</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_RTCCTRL_RTCSEL_ULP1K_Val _U_(0x0) </span></div>
<div class="line"><a name="l00151"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#ae97e1489ab8d1f1a49d8e7e2ad8b7427"> 151</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_RTCCTRL_RTCSEL_ULP32K_Val _U_(0x1) </span></div>
<div class="line"><a name="l00152"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a14454b0efb7d20c1a14a46ebc86ff167"> 152</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_RTCCTRL_RTCSEL_XOSC1K_Val _U_(0x4) </span></div>
<div class="line"><a name="l00153"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a3a4fae30686693a728ec790fa0bde8e6"> 153</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_RTCCTRL_RTCSEL_XOSC32K_Val _U_(0x5) </span></div>
<div class="line"><a name="l00154"></a><span class="lineno"> 154</span>&#160;<span class="preprocessor">#define OSC32KCTRL_RTCCTRL_RTCSEL_ULP1K (OSC32KCTRL_RTCCTRL_RTCSEL_ULP1K_Val &lt;&lt; OSC32KCTRL_RTCCTRL_RTCSEL_Pos)</span></div>
<div class="line"><a name="l00155"></a><span class="lineno"> 155</span>&#160;<span class="preprocessor">#define OSC32KCTRL_RTCCTRL_RTCSEL_ULP32K (OSC32KCTRL_RTCCTRL_RTCSEL_ULP32K_Val &lt;&lt; OSC32KCTRL_RTCCTRL_RTCSEL_Pos)</span></div>
<div class="line"><a name="l00156"></a><span class="lineno"> 156</span>&#160;<span class="preprocessor">#define OSC32KCTRL_RTCCTRL_RTCSEL_XOSC1K (OSC32KCTRL_RTCCTRL_RTCSEL_XOSC1K_Val &lt;&lt; OSC32KCTRL_RTCCTRL_RTCSEL_Pos)</span></div>
<div class="line"><a name="l00157"></a><span class="lineno"> 157</span>&#160;<span class="preprocessor">#define OSC32KCTRL_RTCCTRL_RTCSEL_XOSC32K (OSC32KCTRL_RTCCTRL_RTCSEL_XOSC32K_Val &lt;&lt; OSC32KCTRL_RTCCTRL_RTCSEL_Pos)</span></div>
<div class="line"><a name="l00158"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#aa679222a2941c8283211ffdc4f5a7899"> 158</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_RTCCTRL_MASK _U_(0x07) </span></div>
<div class="line"><a name="l00160"></a><span class="lineno"> 160</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- OSC32KCTRL_XOSC32K : (OSC32KCTRL Offset: 0x14) (R/W 16) 32kHz External Crystal Oscillator (XOSC32K) Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00161"></a><span class="lineno"> 161</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00162"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__XOSC32K__Type.html"> 162</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00163"></a><span class="lineno"> 163</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00164"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__XOSC32K__Type.html#a93ff9ed7ae10ebe27603e5a661bb2240"> 164</a></span>&#160; uint16_t :1; </div>
<div class="line"><a name="l00165"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__XOSC32K__Type.html#a8bb8d5f6e822c43b6cf16187db7068fb"> 165</a></span>&#160; uint16_t <a class="code" href="unionOSC32KCTRL__XOSC32K__Type.html#a8bb8d5f6e822c43b6cf16187db7068fb">ENABLE</a>:1; </div>
<div class="line"><a name="l00166"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__XOSC32K__Type.html#a368a520c3ed615599b8cd16dba8efee3"> 166</a></span>&#160; uint16_t <a class="code" href="unionOSC32KCTRL__XOSC32K__Type.html#a368a520c3ed615599b8cd16dba8efee3">XTALEN</a>:1; </div>
<div class="line"><a name="l00167"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__XOSC32K__Type.html#a368d9adaf97b5dc6c73ab3b0c4633176"> 167</a></span>&#160; uint16_t <a class="code" href="unionOSC32KCTRL__XOSC32K__Type.html#a368d9adaf97b5dc6c73ab3b0c4633176">EN32K</a>:1; </div>
<div class="line"><a name="l00168"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__XOSC32K__Type.html#a8217c7f033a8ffee894bf9e67c680032"> 168</a></span>&#160; uint16_t <a class="code" href="unionOSC32KCTRL__XOSC32K__Type.html#a8217c7f033a8ffee894bf9e67c680032">EN1K</a>:1; </div>
<div class="line"><a name="l00169"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__XOSC32K__Type.html#a8967d56327e9397fe4dbedbeefcab30e"> 169</a></span>&#160; uint16_t :1; </div>
<div class="line"><a name="l00170"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__XOSC32K__Type.html#aa7582dd7fc299fbe767973ca9bdead77"> 170</a></span>&#160; uint16_t <a class="code" href="unionOSC32KCTRL__XOSC32K__Type.html#aa7582dd7fc299fbe767973ca9bdead77">RUNSTDBY</a>:1; </div>
<div class="line"><a name="l00171"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__XOSC32K__Type.html#a2a2f46d93727d7887f810396eda84286"> 171</a></span>&#160; uint16_t <a class="code" href="unionOSC32KCTRL__XOSC32K__Type.html#a2a2f46d93727d7887f810396eda84286">ONDEMAND</a>:1; </div>
<div class="line"><a name="l00172"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__XOSC32K__Type.html#ab5f6eba8484f4231b6be6990fe48a60d"> 172</a></span>&#160; uint16_t <a class="code" href="unionOSC32KCTRL__XOSC32K__Type.html#ab5f6eba8484f4231b6be6990fe48a60d">STARTUP</a>:3; </div>
<div class="line"><a name="l00173"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__XOSC32K__Type.html#a55c7fb4c25391f4f0c0c5b031166be39"> 173</a></span>&#160; uint16_t :1; </div>
<div class="line"><a name="l00174"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__XOSC32K__Type.html#a62461155ed45e0321f3fc15254c748eb"> 174</a></span>&#160; uint16_t <a class="code" href="unionOSC32KCTRL__XOSC32K__Type.html#a62461155ed45e0321f3fc15254c748eb">WRTLOCK</a>:1; </div>
<div class="line"><a name="l00175"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__XOSC32K__Type.html#ae4af6a5c56b4afc847c5490caea8d601"> 175</a></span>&#160; uint16_t <a class="code" href="unionOSC32KCTRL__XOSC32K__Type.html#ae4af6a5c56b4afc847c5490caea8d601">CGM</a>:2; </div>
<div class="line"><a name="l00176"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__XOSC32K__Type.html#a93800e7b3847b3de452aa0ae1498786b"> 176</a></span>&#160; uint16_t :1; </div>
<div class="line"><a name="l00177"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__XOSC32K__Type.html#a45551e54d3a3f0933d6518d2677eb6b6"> 177</a></span>&#160; } bit; </div>
<div class="line"><a name="l00178"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__XOSC32K__Type.html#ad09b1ef9b0480c54abd857900fdaaa76"> 178</a></span>&#160; uint16_t <a class="code" href="unionOSC32KCTRL__XOSC32K__Type.html#ad09b1ef9b0480c54abd857900fdaaa76">reg</a>; </div>
<div class="line"><a name="l00179"></a><span class="lineno"> 179</span>&#160;} <a class="code" href="unionOSC32KCTRL__XOSC32K__Type.html">OSC32KCTRL_XOSC32K_Type</a>;</div>
<div class="line"><a name="l00180"></a><span class="lineno"> 180</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00181"></a><span class="lineno"> 181</span>&#160; </div>
<div class="line"><a name="l00182"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a4c8965d920445c75c0c2c3ef28b2a642"> 182</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_OFFSET 0x14 </span></div>
<div class="line"><a name="l00183"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a387f876de09ea1649ef2298d27e83c00"> 183</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_RESETVALUE _U_(0x2080) </span></div>
<div class="line"><a name="l00185"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a0d7122ed419157c43c7c76da24469f6e"> 185</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_ENABLE_Pos 1 </span></div>
<div class="line"><a name="l00186"></a><span class="lineno"> 186</span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_ENABLE (_U_(0x1) &lt;&lt; OSC32KCTRL_XOSC32K_ENABLE_Pos)</span></div>
<div class="line"><a name="l00187"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#aab290b9fde2ce0432bd019281585e60c"> 187</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_XTALEN_Pos 2 </span></div>
<div class="line"><a name="l00188"></a><span class="lineno"> 188</span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_XTALEN (_U_(0x1) &lt;&lt; OSC32KCTRL_XOSC32K_XTALEN_Pos)</span></div>
<div class="line"><a name="l00189"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a746636fe077be073185aec9422a5c7a6"> 189</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_EN32K_Pos 3 </span></div>
<div class="line"><a name="l00190"></a><span class="lineno"> 190</span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_EN32K (_U_(0x1) &lt;&lt; OSC32KCTRL_XOSC32K_EN32K_Pos)</span></div>
<div class="line"><a name="l00191"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#ade7145443f1f0bbd5705dce47e2e990e"> 191</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_EN1K_Pos 4 </span></div>
<div class="line"><a name="l00192"></a><span class="lineno"> 192</span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_EN1K (_U_(0x1) &lt;&lt; OSC32KCTRL_XOSC32K_EN1K_Pos)</span></div>
<div class="line"><a name="l00193"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#aab719702395f394c3f8ab2a0862e3c62"> 193</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_RUNSTDBY_Pos 6 </span></div>
<div class="line"><a name="l00194"></a><span class="lineno"> 194</span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_RUNSTDBY (_U_(0x1) &lt;&lt; OSC32KCTRL_XOSC32K_RUNSTDBY_Pos)</span></div>
<div class="line"><a name="l00195"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a3f72f0a3fe37daf64ad90aa1041cc747"> 195</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_ONDEMAND_Pos 7 </span></div>
<div class="line"><a name="l00196"></a><span class="lineno"> 196</span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_ONDEMAND (_U_(0x1) &lt;&lt; OSC32KCTRL_XOSC32K_ONDEMAND_Pos)</span></div>
<div class="line"><a name="l00197"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#ace3a98c58164bac82b192e5c04bbc4f8"> 197</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_STARTUP_Pos 8 </span></div>
<div class="line"><a name="l00198"></a><span class="lineno"> 198</span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_STARTUP_Msk (_U_(0x7) &lt;&lt; OSC32KCTRL_XOSC32K_STARTUP_Pos)</span></div>
<div class="line"><a name="l00199"></a><span class="lineno"> 199</span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_STARTUP(value) (OSC32KCTRL_XOSC32K_STARTUP_Msk &amp; ((value) &lt;&lt; OSC32KCTRL_XOSC32K_STARTUP_Pos))</span></div>
<div class="line"><a name="l00200"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#aac0d0821539272a535011934da425e8b"> 200</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_WRTLOCK_Pos 12 </span></div>
<div class="line"><a name="l00201"></a><span class="lineno"> 201</span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_WRTLOCK (_U_(0x1) &lt;&lt; OSC32KCTRL_XOSC32K_WRTLOCK_Pos)</span></div>
<div class="line"><a name="l00202"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a2951861a2035901bcd3f214e894a1a5e"> 202</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_CGM_Pos 13 </span></div>
<div class="line"><a name="l00203"></a><span class="lineno"> 203</span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_CGM_Msk (_U_(0x3) &lt;&lt; OSC32KCTRL_XOSC32K_CGM_Pos)</span></div>
<div class="line"><a name="l00204"></a><span class="lineno"> 204</span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_CGM(value) (OSC32KCTRL_XOSC32K_CGM_Msk &amp; ((value) &lt;&lt; OSC32KCTRL_XOSC32K_CGM_Pos))</span></div>
<div class="line"><a name="l00205"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a13a89e5964df1c5525050900094eda55"> 205</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_CGM_XT_Val _U_(0x1) </span></div>
<div class="line"><a name="l00206"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a5861dda7b93a256f983a20230827df31"> 206</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_CGM_HS_Val _U_(0x2) </span></div>
<div class="line"><a name="l00207"></a><span class="lineno"> 207</span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_CGM_XT (OSC32KCTRL_XOSC32K_CGM_XT_Val &lt;&lt; OSC32KCTRL_XOSC32K_CGM_Pos)</span></div>
<div class="line"><a name="l00208"></a><span class="lineno"> 208</span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_CGM_HS (OSC32KCTRL_XOSC32K_CGM_HS_Val &lt;&lt; OSC32KCTRL_XOSC32K_CGM_Pos)</span></div>
<div class="line"><a name="l00209"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#ad0a22f67c5bcc3d0f0df3840c623f7ec"> 209</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_XOSC32K_MASK _U_(0x77DE) </span></div>
<div class="line"><a name="l00211"></a><span class="lineno"> 211</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- OSC32KCTRL_CFDCTRL : (OSC32KCTRL Offset: 0x16) (R/W 8) Clock Failure Detector Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00212"></a><span class="lineno"> 212</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00213"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__CFDCTRL__Type.html"> 213</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00214"></a><span class="lineno"> 214</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00215"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__CFDCTRL__Type.html#aa14913391282abbdccba6d495b91cba6"> 215</a></span>&#160; uint8_t <a class="code" href="unionOSC32KCTRL__CFDCTRL__Type.html#aa14913391282abbdccba6d495b91cba6">CFDEN</a>:1; </div>
<div class="line"><a name="l00216"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__CFDCTRL__Type.html#a44d6f566d3811d2d7aa11f176a9a07c9"> 216</a></span>&#160; uint8_t <a class="code" href="unionOSC32KCTRL__CFDCTRL__Type.html#a44d6f566d3811d2d7aa11f176a9a07c9">SWBACK</a>:1; </div>
<div class="line"><a name="l00217"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__CFDCTRL__Type.html#a6097fa051cc614e347bd4c29dfb0ae70"> 217</a></span>&#160; uint8_t <a class="code" href="unionOSC32KCTRL__CFDCTRL__Type.html#a6097fa051cc614e347bd4c29dfb0ae70">CFDPRESC</a>:1; </div>
<div class="line"><a name="l00218"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__CFDCTRL__Type.html#a1dafd0f072aa6e5cd6dc73d345507148"> 218</a></span>&#160; uint8_t :5; </div>
<div class="line"><a name="l00219"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__CFDCTRL__Type.html#abd9499a506e4cac47cf22f47d54e501e"> 219</a></span>&#160; } bit; </div>
<div class="line"><a name="l00220"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__CFDCTRL__Type.html#a118a2266930e5a788d634dcfa3a3a0a9"> 220</a></span>&#160; uint8_t <a class="code" href="unionOSC32KCTRL__CFDCTRL__Type.html#a118a2266930e5a788d634dcfa3a3a0a9">reg</a>; </div>
<div class="line"><a name="l00221"></a><span class="lineno"> 221</span>&#160;} <a class="code" href="unionOSC32KCTRL__CFDCTRL__Type.html">OSC32KCTRL_CFDCTRL_Type</a>;</div>
<div class="line"><a name="l00222"></a><span class="lineno"> 222</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00223"></a><span class="lineno"> 223</span>&#160; </div>
<div class="line"><a name="l00224"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#ab2fbb0a95bf2348b26d6eb55d9488e27"> 224</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_CFDCTRL_OFFSET 0x16 </span></div>
<div class="line"><a name="l00225"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#ab195093fda704bdb95893108576c6ba5"> 225</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_CFDCTRL_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00227"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a2aedb65f916f976703240140126904f6"> 227</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_CFDCTRL_CFDEN_Pos 0 </span></div>
<div class="line"><a name="l00228"></a><span class="lineno"> 228</span>&#160;<span class="preprocessor">#define OSC32KCTRL_CFDCTRL_CFDEN (_U_(0x1) &lt;&lt; OSC32KCTRL_CFDCTRL_CFDEN_Pos)</span></div>
<div class="line"><a name="l00229"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a2e8a160a709d649bf92161a98ed35068"> 229</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_CFDCTRL_SWBACK_Pos 1 </span></div>
<div class="line"><a name="l00230"></a><span class="lineno"> 230</span>&#160;<span class="preprocessor">#define OSC32KCTRL_CFDCTRL_SWBACK (_U_(0x1) &lt;&lt; OSC32KCTRL_CFDCTRL_SWBACK_Pos)</span></div>
<div class="line"><a name="l00231"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a2dc36bba505b43a70628172895e4cee3"> 231</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_CFDCTRL_CFDPRESC_Pos 2 </span></div>
<div class="line"><a name="l00232"></a><span class="lineno"> 232</span>&#160;<span class="preprocessor">#define OSC32KCTRL_CFDCTRL_CFDPRESC (_U_(0x1) &lt;&lt; OSC32KCTRL_CFDCTRL_CFDPRESC_Pos)</span></div>
<div class="line"><a name="l00233"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a3fec783d5e565f11fe77f4ae88a9876d"> 233</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_CFDCTRL_MASK _U_(0x07) </span></div>
<div class="line"><a name="l00235"></a><span class="lineno"> 235</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- OSC32KCTRL_EVCTRL : (OSC32KCTRL Offset: 0x17) (R/W 8) Event Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00236"></a><span class="lineno"> 236</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00237"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__EVCTRL__Type.html"> 237</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00238"></a><span class="lineno"> 238</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00239"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__EVCTRL__Type.html#a3c361bde4d3a6d0bb6e641eeb044fbe3"> 239</a></span>&#160; uint8_t <a class="code" href="unionOSC32KCTRL__EVCTRL__Type.html#a3c361bde4d3a6d0bb6e641eeb044fbe3">CFDEO</a>:1; </div>
<div class="line"><a name="l00240"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__EVCTRL__Type.html#afcec4755ece258e342c8fe01a7583b64"> 240</a></span>&#160; uint8_t :7; </div>
<div class="line"><a name="l00241"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__EVCTRL__Type.html#a8ab7bdd857a3e12b7615ac649a800fb6"> 241</a></span>&#160; } bit; </div>
<div class="line"><a name="l00242"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__EVCTRL__Type.html#adfe6cbdf618d03118495f1fa4e8839c4"> 242</a></span>&#160; uint8_t <a class="code" href="unionOSC32KCTRL__EVCTRL__Type.html#adfe6cbdf618d03118495f1fa4e8839c4">reg</a>; </div>
<div class="line"><a name="l00243"></a><span class="lineno"> 243</span>&#160;} <a class="code" href="unionOSC32KCTRL__EVCTRL__Type.html">OSC32KCTRL_EVCTRL_Type</a>;</div>
<div class="line"><a name="l00244"></a><span class="lineno"> 244</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00245"></a><span class="lineno"> 245</span>&#160; </div>
<div class="line"><a name="l00246"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#abe8425e24e008b4160dd1756dc5c4e66"> 246</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_EVCTRL_OFFSET 0x17 </span></div>
<div class="line"><a name="l00247"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#aced57526fa5e5b62a8f4bebb37deea0f"> 247</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_EVCTRL_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00249"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a71fb66c27d4c80fa73af5641ef5083ae"> 249</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_EVCTRL_CFDEO_Pos 0 </span></div>
<div class="line"><a name="l00250"></a><span class="lineno"> 250</span>&#160;<span class="preprocessor">#define OSC32KCTRL_EVCTRL_CFDEO (_U_(0x1) &lt;&lt; OSC32KCTRL_EVCTRL_CFDEO_Pos)</span></div>
<div class="line"><a name="l00251"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a8c5fd77028706618775ef03e5b6fd146"> 251</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_EVCTRL_MASK _U_(0x01) </span></div>
<div class="line"><a name="l00253"></a><span class="lineno"> 253</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- OSC32KCTRL_OSCULP32K : (OSC32KCTRL Offset: 0x1C) (R/W 32) 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00254"></a><span class="lineno"> 254</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00255"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__OSCULP32K__Type.html"> 255</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00256"></a><span class="lineno"> 256</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00257"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__OSCULP32K__Type.html#a1767155125bb06882796b3f0c46b0f7f"> 257</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00258"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__OSCULP32K__Type.html#af7776cc938cb0d3cdcaa582a28fffe75"> 258</a></span>&#160; uint32_t <a class="code" href="unionOSC32KCTRL__OSCULP32K__Type.html#af7776cc938cb0d3cdcaa582a28fffe75">EN32K</a>:1; </div>
<div class="line"><a name="l00259"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__OSCULP32K__Type.html#ab83c232455a20df5da643473a3fef418"> 259</a></span>&#160; uint32_t <a class="code" href="unionOSC32KCTRL__OSCULP32K__Type.html#ab83c232455a20df5da643473a3fef418">EN1K</a>:1; </div>
<div class="line"><a name="l00260"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__OSCULP32K__Type.html#a0ec7acf4185a95cc530db352375c0909"> 260</a></span>&#160; uint32_t :5; </div>
<div class="line"><a name="l00261"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__OSCULP32K__Type.html#a6d83f51bf1e431f38a17779a58278f8f"> 261</a></span>&#160; uint32_t <a class="code" href="unionOSC32KCTRL__OSCULP32K__Type.html#a6d83f51bf1e431f38a17779a58278f8f">CALIB</a>:6; </div>
<div class="line"><a name="l00262"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__OSCULP32K__Type.html#aebd3492fac20bc84281dc8764ef36a88"> 262</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00263"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__OSCULP32K__Type.html#aba63b989f1a3f81c02bfa60a297f4969"> 263</a></span>&#160; uint32_t <a class="code" href="unionOSC32KCTRL__OSCULP32K__Type.html#aba63b989f1a3f81c02bfa60a297f4969">WRTLOCK</a>:1; </div>
<div class="line"><a name="l00264"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__OSCULP32K__Type.html#a1313baa3d08c47b1f8cd24017e6b53a2"> 264</a></span>&#160; uint32_t :16; </div>
<div class="line"><a name="l00265"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__OSCULP32K__Type.html#a1dfc3616aa70039b4e1f68438490819e"> 265</a></span>&#160; } bit; </div>
<div class="line"><a name="l00266"></a><span class="lineno"><a class="line" href="unionOSC32KCTRL__OSCULP32K__Type.html#a8649fa7e2151bb48dc2999d466b0c4f4"> 266</a></span>&#160; uint32_t <a class="code" href="unionOSC32KCTRL__OSCULP32K__Type.html#a8649fa7e2151bb48dc2999d466b0c4f4">reg</a>; </div>
<div class="line"><a name="l00267"></a><span class="lineno"> 267</span>&#160;} <a class="code" href="unionOSC32KCTRL__OSCULP32K__Type.html">OSC32KCTRL_OSCULP32K_Type</a>;</div>
<div class="line"><a name="l00268"></a><span class="lineno"> 268</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00269"></a><span class="lineno"> 269</span>&#160; </div>
<div class="line"><a name="l00270"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#aa2ae9323b7a5247081c2bfc04f97e8d1"> 270</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_OSCULP32K_OFFSET 0x1C </span></div>
<div class="line"><a name="l00271"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#ab745111a32543331557e25c5563a4511"> 271</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_OSCULP32K_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00273"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a83057d513fe89052c2f00778184eeb02"> 273</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_OSCULP32K_EN32K_Pos 1 </span></div>
<div class="line"><a name="l00274"></a><span class="lineno"> 274</span>&#160;<span class="preprocessor">#define OSC32KCTRL_OSCULP32K_EN32K (_U_(0x1) &lt;&lt; OSC32KCTRL_OSCULP32K_EN32K_Pos)</span></div>
<div class="line"><a name="l00275"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#aadfe0343e0462db3b20dca24186d2681"> 275</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_OSCULP32K_EN1K_Pos 2 </span></div>
<div class="line"><a name="l00276"></a><span class="lineno"> 276</span>&#160;<span class="preprocessor">#define OSC32KCTRL_OSCULP32K_EN1K (_U_(0x1) &lt;&lt; OSC32KCTRL_OSCULP32K_EN1K_Pos)</span></div>
<div class="line"><a name="l00277"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#aa2abedc94425667d08d6682c2c4f19cf"> 277</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_OSCULP32K_CALIB_Pos 8 </span></div>
<div class="line"><a name="l00278"></a><span class="lineno"> 278</span>&#160;<span class="preprocessor">#define OSC32KCTRL_OSCULP32K_CALIB_Msk (_U_(0x3F) &lt;&lt; OSC32KCTRL_OSCULP32K_CALIB_Pos)</span></div>
<div class="line"><a name="l00279"></a><span class="lineno"> 279</span>&#160;<span class="preprocessor">#define OSC32KCTRL_OSCULP32K_CALIB(value) (OSC32KCTRL_OSCULP32K_CALIB_Msk &amp; ((value) &lt;&lt; OSC32KCTRL_OSCULP32K_CALIB_Pos))</span></div>
<div class="line"><a name="l00280"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a591a0a2ca06e742e29fcac7418e0593f"> 280</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_OSCULP32K_WRTLOCK_Pos 15 </span></div>
<div class="line"><a name="l00281"></a><span class="lineno"> 281</span>&#160;<span class="preprocessor">#define OSC32KCTRL_OSCULP32K_WRTLOCK (_U_(0x1) &lt;&lt; OSC32KCTRL_OSCULP32K_WRTLOCK_Pos)</span></div>
<div class="line"><a name="l00282"></a><span class="lineno"><a class="line" href="component_2osc32kctrl_8h.html#a7b3ca0c8a3b7f6e1b9baf3c1da4cd182"> 282</a></span>&#160;<span class="preprocessor">#define OSC32KCTRL_OSCULP32K_MASK _U_(0x0000BF06) </span></div>
<div class="line"><a name="l00285"></a><span class="lineno"> 285</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00286"></a><span class="lineno"><a class="line" href="structOsc32kctrl.html"> 286</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00287"></a><span class="lineno"><a class="line" href="structOsc32kctrl.html#a2cc865826e2c69780f5fbaf85e851ea1"> 287</a></span>&#160; __IO <a class="code" href="unionOSC32KCTRL__INTENCLR__Type.html">OSC32KCTRL_INTENCLR_Type</a> <a class="code" href="structOsc32kctrl.html#a2cc865826e2c69780f5fbaf85e851ea1">INTENCLR</a>; </div>
<div class="line"><a name="l00288"></a><span class="lineno"><a class="line" href="structOsc32kctrl.html#aae1184bb6b2cdaab784b0189726db80a"> 288</a></span>&#160; __IO <a class="code" href="unionOSC32KCTRL__INTENSET__Type.html">OSC32KCTRL_INTENSET_Type</a> <a class="code" href="structOsc32kctrl.html#aae1184bb6b2cdaab784b0189726db80a">INTENSET</a>; </div>
<div class="line"><a name="l00289"></a><span class="lineno"><a class="line" href="structOsc32kctrl.html#a15de0aa5c22b436baf5d2fc6a1f5aab6"> 289</a></span>&#160; __IO <a class="code" href="unionOSC32KCTRL__INTFLAG__Type.html">OSC32KCTRL_INTFLAG_Type</a> <a class="code" href="structOsc32kctrl.html#a15de0aa5c22b436baf5d2fc6a1f5aab6">INTFLAG</a>; </div>
<div class="line"><a name="l00290"></a><span class="lineno"><a class="line" href="structOsc32kctrl.html#aa6eb5a48bfc45b5127e57bec50d7fb7f"> 290</a></span>&#160; __I <a class="code" href="unionOSC32KCTRL__STATUS__Type.html">OSC32KCTRL_STATUS_Type</a> <a class="code" href="structOsc32kctrl.html#aa6eb5a48bfc45b5127e57bec50d7fb7f">STATUS</a>; </div>
<div class="line"><a name="l00291"></a><span class="lineno"><a class="line" href="structOsc32kctrl.html#a602070e4ec0aa0925797e3028646717f"> 291</a></span>&#160; __IO <a class="code" href="unionOSC32KCTRL__RTCCTRL__Type.html">OSC32KCTRL_RTCCTRL_Type</a> <a class="code" href="structOsc32kctrl.html#a602070e4ec0aa0925797e3028646717f">RTCCTRL</a>; </div>
<div class="line"><a name="l00292"></a><span class="lineno"> 292</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved1[0x3];</div>
<div class="line"><a name="l00293"></a><span class="lineno"><a class="line" href="structOsc32kctrl.html#abc6f2c7fed0114a0843284a4656e8afe"> 293</a></span>&#160; __IO <a class="code" href="unionOSC32KCTRL__XOSC32K__Type.html">OSC32KCTRL_XOSC32K_Type</a> <a class="code" href="structOsc32kctrl.html#abc6f2c7fed0114a0843284a4656e8afe">XOSC32K</a>; </div>
<div class="line"><a name="l00294"></a><span class="lineno"><a class="line" href="structOsc32kctrl.html#ae586021076bafc6e93fced5df3606c92"> 294</a></span>&#160; __IO <a class="code" href="unionOSC32KCTRL__CFDCTRL__Type.html">OSC32KCTRL_CFDCTRL_Type</a> <a class="code" href="structOsc32kctrl.html#ae586021076bafc6e93fced5df3606c92">CFDCTRL</a>; </div>
<div class="line"><a name="l00295"></a><span class="lineno"><a class="line" href="structOsc32kctrl.html#a5866ff04be545ff911a0f068da688c09"> 295</a></span>&#160; __IO <a class="code" href="unionOSC32KCTRL__EVCTRL__Type.html">OSC32KCTRL_EVCTRL_Type</a> <a class="code" href="structOsc32kctrl.html#a5866ff04be545ff911a0f068da688c09">EVCTRL</a>; </div>
<div class="line"><a name="l00296"></a><span class="lineno"> 296</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved2[0x4];</div>
<div class="line"><a name="l00297"></a><span class="lineno"><a class="line" href="structOsc32kctrl.html#a9bc8e06d5efac5d925b97fe81de80415"> 297</a></span>&#160; __IO <a class="code" href="unionOSC32KCTRL__OSCULP32K__Type.html">OSC32KCTRL_OSCULP32K_Type</a> <a class="code" href="structOsc32kctrl.html#a9bc8e06d5efac5d925b97fe81de80415">OSCULP32K</a>; </div>
<div class="line"><a name="l00298"></a><span class="lineno"> 298</span>&#160;} <a class="code" href="structOsc32kctrl.html">Osc32kctrl</a>;</div>
<div class="line"><a name="l00299"></a><span class="lineno"> 299</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00300"></a><span class="lineno"> 300</span>&#160; </div>
<div class="line"><a name="l00303"></a><span class="lineno"> 303</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_OSC32KCTRL_COMPONENT_ */</span><span class="preprocessor"></span></div>
</div><!-- fragment --></div><!-- contents -->
<div class="ttc" id="aunionOSC32KCTRL__INTFLAG__Type_html_a70f545d5e77582e7bf564d06661495cc"><div class="ttname"><a href="unionOSC32KCTRL__INTFLAG__Type.html#a70f545d5e77582e7bf564d06661495cc">OSC32KCTRL_INTFLAG_Type::uint32_t</a></div><div class="ttdeci">__I uint32_t</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00091">osc32kctrl.h:91</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__INTFLAG__Type_html_a2b9283a58346fdff73051c27d116573b"><div class="ttname"><a href="unionOSC32KCTRL__INTFLAG__Type.html#a2b9283a58346fdff73051c27d116573b">OSC32KCTRL_INTFLAG_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00095">osc32kctrl.h:95</a></div></div>
<div class="ttc" id="astructOsc32kctrl_html"><div class="ttname"><a href="structOsc32kctrl.html">Osc32kctrl</a></div><div class="ttdoc">OSC32KCTRL hardware registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00286">osc32kctrl.h:286</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__STATUS__Type_html"><div class="ttname"><a href="unionOSC32KCTRL__STATUS__Type.html">OSC32KCTRL_STATUS_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00110">osc32kctrl.h:110</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__XOSC32K__Type_html_ad09b1ef9b0480c54abd857900fdaaa76"><div class="ttname"><a href="unionOSC32KCTRL__XOSC32K__Type.html#ad09b1ef9b0480c54abd857900fdaaa76">OSC32KCTRL_XOSC32K_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00178">osc32kctrl.h:178</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__OSCULP32K__Type_html_a6d83f51bf1e431f38a17779a58278f8f"><div class="ttname"><a href="unionOSC32KCTRL__OSCULP32K__Type.html#a6d83f51bf1e431f38a17779a58278f8f">OSC32KCTRL_OSCULP32K_Type::CALIB</a></div><div class="ttdeci">uint32_t CALIB</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00261">osc32kctrl.h:261</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__CFDCTRL__Type_html_a118a2266930e5a788d634dcfa3a3a0a9"><div class="ttname"><a href="unionOSC32KCTRL__CFDCTRL__Type.html#a118a2266930e5a788d634dcfa3a3a0a9">OSC32KCTRL_CFDCTRL_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00220">osc32kctrl.h:220</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__OSCULP32K__Type_html_a8649fa7e2151bb48dc2999d466b0c4f4"><div class="ttname"><a href="unionOSC32KCTRL__OSCULP32K__Type.html#a8649fa7e2151bb48dc2999d466b0c4f4">OSC32KCTRL_OSCULP32K_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00266">osc32kctrl.h:266</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__STATUS__Type_html_a65fdb5c9e0f3427487c4e9a22ae17222"><div class="ttname"><a href="unionOSC32KCTRL__STATUS__Type.html#a65fdb5c9e0f3427487c4e9a22ae17222">OSC32KCTRL_STATUS_Type::XOSC32KSW</a></div><div class="ttdeci">uint32_t XOSC32KSW</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00115">osc32kctrl.h:115</a></div></div>
<div class="ttc" id="astructOsc32kctrl_html_a5866ff04be545ff911a0f068da688c09"><div class="ttname"><a href="structOsc32kctrl.html#a5866ff04be545ff911a0f068da688c09">Osc32kctrl::EVCTRL</a></div><div class="ttdeci">__IO OSC32KCTRL_EVCTRL_Type EVCTRL</div><div class="ttdoc">Offset: 0x17 (R/W 8) Event Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00295">osc32kctrl.h:295</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__CFDCTRL__Type_html_a6097fa051cc614e347bd4c29dfb0ae70"><div class="ttname"><a href="unionOSC32KCTRL__CFDCTRL__Type.html#a6097fa051cc614e347bd4c29dfb0ae70">OSC32KCTRL_CFDCTRL_Type::CFDPRESC</a></div><div class="ttdeci">uint8_t CFDPRESC</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00217">osc32kctrl.h:217</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__INTFLAG__Type_html"><div class="ttname"><a href="unionOSC32KCTRL__INTFLAG__Type.html">OSC32KCTRL_INTFLAG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00088">osc32kctrl.h:88</a></div></div>
<div class="ttc" id="astructOsc32kctrl_html_aa6eb5a48bfc45b5127e57bec50d7fb7f"><div class="ttname"><a href="structOsc32kctrl.html#aa6eb5a48bfc45b5127e57bec50d7fb7f">Osc32kctrl::STATUS</a></div><div class="ttdeci">__I OSC32KCTRL_STATUS_Type STATUS</div><div class="ttdoc">Offset: 0x0C (R/ 32) Power and Clocks Status.</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00290">osc32kctrl.h:290</a></div></div>
<div class="ttc" id="astructOsc32kctrl_html_ae586021076bafc6e93fced5df3606c92"><div class="ttname"><a href="structOsc32kctrl.html#ae586021076bafc6e93fced5df3606c92">Osc32kctrl::CFDCTRL</a></div><div class="ttdeci">__IO OSC32KCTRL_CFDCTRL_Type CFDCTRL</div><div class="ttdoc">Offset: 0x16 (R/W 8) Clock Failure Detector Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00294">osc32kctrl.h:294</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__OSCULP32K__Type_html"><div class="ttname"><a href="unionOSC32KCTRL__OSCULP32K__Type.html">OSC32KCTRL_OSCULP32K_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00255">osc32kctrl.h:255</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__CFDCTRL__Type_html_a44d6f566d3811d2d7aa11f176a9a07c9"><div class="ttname"><a href="unionOSC32KCTRL__CFDCTRL__Type.html#a44d6f566d3811d2d7aa11f176a9a07c9">OSC32KCTRL_CFDCTRL_Type::SWBACK</a></div><div class="ttdeci">uint8_t SWBACK</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00216">osc32kctrl.h:216</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__INTENSET__Type_html_a778b6e8e689687f19b4872df5c9442a9"><div class="ttname"><a href="unionOSC32KCTRL__INTENSET__Type.html#a778b6e8e689687f19b4872df5c9442a9">OSC32KCTRL_INTENSET_Type::XOSC32KFAIL</a></div><div class="ttdeci">uint32_t XOSC32KFAIL</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00070">osc32kctrl.h:70</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__INTFLAG__Type_html_a8ce6f0cac03c2259eaef81162a721792"><div class="ttname"><a href="unionOSC32KCTRL__INTFLAG__Type.html#a8ce6f0cac03c2259eaef81162a721792">OSC32KCTRL_INTFLAG_Type::XOSC32KRDY</a></div><div class="ttdeci">__I uint32_t XOSC32KRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00090">osc32kctrl.h:90</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__OSCULP32K__Type_html_af7776cc938cb0d3cdcaa582a28fffe75"><div class="ttname"><a href="unionOSC32KCTRL__OSCULP32K__Type.html#af7776cc938cb0d3cdcaa582a28fffe75">OSC32KCTRL_OSCULP32K_Type::EN32K</a></div><div class="ttdeci">uint32_t EN32K</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00258">osc32kctrl.h:258</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__OSCULP32K__Type_html_aba63b989f1a3f81c02bfa60a297f4969"><div class="ttname"><a href="unionOSC32KCTRL__OSCULP32K__Type.html#aba63b989f1a3f81c02bfa60a297f4969">OSC32KCTRL_OSCULP32K_Type::WRTLOCK</a></div><div class="ttdeci">uint32_t WRTLOCK</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00263">osc32kctrl.h:263</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__XOSC32K__Type_html_aa7582dd7fc299fbe767973ca9bdead77"><div class="ttname"><a href="unionOSC32KCTRL__XOSC32K__Type.html#aa7582dd7fc299fbe767973ca9bdead77">OSC32KCTRL_XOSC32K_Type::RUNSTDBY</a></div><div class="ttdeci">uint16_t RUNSTDBY</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00170">osc32kctrl.h:170</a></div></div>
<div class="ttc" id="astructOsc32kctrl_html_a15de0aa5c22b436baf5d2fc6a1f5aab6"><div class="ttname"><a href="structOsc32kctrl.html#a15de0aa5c22b436baf5d2fc6a1f5aab6">Osc32kctrl::INTFLAG</a></div><div class="ttdeci">__IO OSC32KCTRL_INTFLAG_Type INTFLAG</div><div class="ttdoc">Offset: 0x08 (R/W 32) Interrupt Flag Status and Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00289">osc32kctrl.h:289</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__XOSC32K__Type_html_ab5f6eba8484f4231b6be6990fe48a60d"><div class="ttname"><a href="unionOSC32KCTRL__XOSC32K__Type.html#ab5f6eba8484f4231b6be6990fe48a60d">OSC32KCTRL_XOSC32K_Type::STARTUP</a></div><div class="ttdeci">uint16_t STARTUP</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00172">osc32kctrl.h:172</a></div></div>
<div class="ttc" id="astructOsc32kctrl_html_abc6f2c7fed0114a0843284a4656e8afe"><div class="ttname"><a href="structOsc32kctrl.html#abc6f2c7fed0114a0843284a4656e8afe">Osc32kctrl::XOSC32K</a></div><div class="ttdeci">__IO OSC32KCTRL_XOSC32K_Type XOSC32K</div><div class="ttdoc">Offset: 0x14 (R/W 16) 32kHz External Crystal Oscillator (XOSC32K) Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00293">osc32kctrl.h:293</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__XOSC32K__Type_html_a2a2f46d93727d7887f810396eda84286"><div class="ttname"><a href="unionOSC32KCTRL__XOSC32K__Type.html#a2a2f46d93727d7887f810396eda84286">OSC32KCTRL_XOSC32K_Type::ONDEMAND</a></div><div class="ttdeci">uint16_t ONDEMAND</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00171">osc32kctrl.h:171</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__EVCTRL__Type_html"><div class="ttname"><a href="unionOSC32KCTRL__EVCTRL__Type.html">OSC32KCTRL_EVCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00237">osc32kctrl.h:237</a></div></div>
<div class="ttc" id="astructOsc32kctrl_html_a602070e4ec0aa0925797e3028646717f"><div class="ttname"><a href="structOsc32kctrl.html#a602070e4ec0aa0925797e3028646717f">Osc32kctrl::RTCCTRL</a></div><div class="ttdeci">__IO OSC32KCTRL_RTCCTRL_Type RTCCTRL</div><div class="ttdoc">Offset: 0x10 (R/W 8) RTC Clock Selection.</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00291">osc32kctrl.h:291</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__XOSC32K__Type_html_ae4af6a5c56b4afc847c5490caea8d601"><div class="ttname"><a href="unionOSC32KCTRL__XOSC32K__Type.html#ae4af6a5c56b4afc847c5490caea8d601">OSC32KCTRL_XOSC32K_Type::CGM</a></div><div class="ttdeci">uint16_t CGM</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00175">osc32kctrl.h:175</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__EVCTRL__Type_html_a3c361bde4d3a6d0bb6e641eeb044fbe3"><div class="ttname"><a href="unionOSC32KCTRL__EVCTRL__Type.html#a3c361bde4d3a6d0bb6e641eeb044fbe3">OSC32KCTRL_EVCTRL_Type::CFDEO</a></div><div class="ttdeci">uint8_t CFDEO</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00239">osc32kctrl.h:239</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__STATUS__Type_html_ae90fc9ce9f80cd21ca28e2b450d15765"><div class="ttname"><a href="unionOSC32KCTRL__STATUS__Type.html#ae90fc9ce9f80cd21ca28e2b450d15765">OSC32KCTRL_STATUS_Type::XOSC32KRDY</a></div><div class="ttdeci">uint32_t XOSC32KRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00112">osc32kctrl.h:112</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__INTFLAG__Type_html_a8b92bb4dffc3755a12ef355f278ebec3"><div class="ttname"><a href="unionOSC32KCTRL__INTFLAG__Type.html#a8b92bb4dffc3755a12ef355f278ebec3">OSC32KCTRL_INTFLAG_Type::XOSC32KFAIL</a></div><div class="ttdeci">__I uint32_t XOSC32KFAIL</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00092">osc32kctrl.h:92</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__INTENCLR__Type_html_a9767d93a8f34890e0fca6167ae2f34e7"><div class="ttname"><a href="unionOSC32KCTRL__INTENCLR__Type.html#a9767d93a8f34890e0fca6167ae2f34e7">OSC32KCTRL_INTENCLR_Type::XOSC32KRDY</a></div><div class="ttdeci">uint32_t XOSC32KRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00046">osc32kctrl.h:46</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__RTCCTRL__Type_html_aa19148619075344006f893115d071677"><div class="ttname"><a href="unionOSC32KCTRL__RTCCTRL__Type.html#aa19148619075344006f893115d071677">OSC32KCTRL_RTCCTRL_Type::RTCSEL</a></div><div class="ttdeci">uint8_t RTCSEL</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00137">osc32kctrl.h:137</a></div></div>
<div class="ttc" id="astructOsc32kctrl_html_a9bc8e06d5efac5d925b97fe81de80415"><div class="ttname"><a href="structOsc32kctrl.html#a9bc8e06d5efac5d925b97fe81de80415">Osc32kctrl::OSCULP32K</a></div><div class="ttdeci">__IO OSC32KCTRL_OSCULP32K_Type OSCULP32K</div><div class="ttdoc">Offset: 0x1C (R/W 32) 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00297">osc32kctrl.h:297</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__EVCTRL__Type_html_adfe6cbdf618d03118495f1fa4e8839c4"><div class="ttname"><a href="unionOSC32KCTRL__EVCTRL__Type.html#adfe6cbdf618d03118495f1fa4e8839c4">OSC32KCTRL_EVCTRL_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00242">osc32kctrl.h:242</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__INTENSET__Type_html_aae11a18ae465664ab32615eaa3d38e22"><div class="ttname"><a href="unionOSC32KCTRL__INTENSET__Type.html#aae11a18ae465664ab32615eaa3d38e22">OSC32KCTRL_INTENSET_Type::XOSC32KRDY</a></div><div class="ttdeci">uint32_t XOSC32KRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00068">osc32kctrl.h:68</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__XOSC32K__Type_html_a368d9adaf97b5dc6c73ab3b0c4633176"><div class="ttname"><a href="unionOSC32KCTRL__XOSC32K__Type.html#a368d9adaf97b5dc6c73ab3b0c4633176">OSC32KCTRL_XOSC32K_Type::EN32K</a></div><div class="ttdeci">uint16_t EN32K</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00167">osc32kctrl.h:167</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__CFDCTRL__Type_html_aa14913391282abbdccba6d495b91cba6"><div class="ttname"><a href="unionOSC32KCTRL__CFDCTRL__Type.html#aa14913391282abbdccba6d495b91cba6">OSC32KCTRL_CFDCTRL_Type::CFDEN</a></div><div class="ttdeci">uint8_t CFDEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00215">osc32kctrl.h:215</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__XOSC32K__Type_html_a8217c7f033a8ffee894bf9e67c680032"><div class="ttname"><a href="unionOSC32KCTRL__XOSC32K__Type.html#a8217c7f033a8ffee894bf9e67c680032">OSC32KCTRL_XOSC32K_Type::EN1K</a></div><div class="ttdeci">uint16_t EN1K</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00168">osc32kctrl.h:168</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__INTENCLR__Type_html"><div class="ttname"><a href="unionOSC32KCTRL__INTENCLR__Type.html">OSC32KCTRL_INTENCLR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00044">osc32kctrl.h:44</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__XOSC32K__Type_html"><div class="ttname"><a href="unionOSC32KCTRL__XOSC32K__Type.html">OSC32KCTRL_XOSC32K_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00162">osc32kctrl.h:162</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__OSCULP32K__Type_html_ab83c232455a20df5da643473a3fef418"><div class="ttname"><a href="unionOSC32KCTRL__OSCULP32K__Type.html#ab83c232455a20df5da643473a3fef418">OSC32KCTRL_OSCULP32K_Type::EN1K</a></div><div class="ttdeci">uint32_t EN1K</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00259">osc32kctrl.h:259</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__STATUS__Type_html_a3c3b2796b9ca50d6f8ef0c636418bf5b"><div class="ttname"><a href="unionOSC32KCTRL__STATUS__Type.html#a3c3b2796b9ca50d6f8ef0c636418bf5b">OSC32KCTRL_STATUS_Type::XOSC32KFAIL</a></div><div class="ttdeci">uint32_t XOSC32KFAIL</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00114">osc32kctrl.h:114</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__INTENSET__Type_html_a40b6c3f262f0483bcf4beeb8a832f33c"><div class="ttname"><a href="unionOSC32KCTRL__INTENSET__Type.html#a40b6c3f262f0483bcf4beeb8a832f33c">OSC32KCTRL_INTENSET_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00073">osc32kctrl.h:73</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__STATUS__Type_html_a044c3f31f968e7e7a88f22400382b777"><div class="ttname"><a href="unionOSC32KCTRL__STATUS__Type.html#a044c3f31f968e7e7a88f22400382b777">OSC32KCTRL_STATUS_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00118">osc32kctrl.h:118</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__CFDCTRL__Type_html"><div class="ttname"><a href="unionOSC32KCTRL__CFDCTRL__Type.html">OSC32KCTRL_CFDCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00213">osc32kctrl.h:213</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__RTCCTRL__Type_html_a314ef9617b1ba52b248fdba391f5c632"><div class="ttname"><a href="unionOSC32KCTRL__RTCCTRL__Type.html#a314ef9617b1ba52b248fdba391f5c632">OSC32KCTRL_RTCCTRL_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00140">osc32kctrl.h:140</a></div></div>
<div class="ttc" id="astructOsc32kctrl_html_aae1184bb6b2cdaab784b0189726db80a"><div class="ttname"><a href="structOsc32kctrl.html#aae1184bb6b2cdaab784b0189726db80a">Osc32kctrl::INTENSET</a></div><div class="ttdeci">__IO OSC32KCTRL_INTENSET_Type INTENSET</div><div class="ttdoc">Offset: 0x04 (R/W 32) Interrupt Enable Set.</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00288">osc32kctrl.h:288</a></div></div>
<div class="ttc" id="astructOsc32kctrl_html_a2cc865826e2c69780f5fbaf85e851ea1"><div class="ttname"><a href="structOsc32kctrl.html#a2cc865826e2c69780f5fbaf85e851ea1">Osc32kctrl::INTENCLR</a></div><div class="ttdeci">__IO OSC32KCTRL_INTENCLR_Type INTENCLR</div><div class="ttdoc">Offset: 0x00 (R/W 32) Interrupt Enable Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00287">osc32kctrl.h:287</a></div></div>
<div class="ttc" id="asame54n19a_8h_html_a0d957f1433aaf5d70e4dc2b68288442d"><div class="ttname"><a href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a></div><div class="ttdeci">volatile const uint8_t RoReg8</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00053">same54n19a.h:53</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__RTCCTRL__Type_html"><div class="ttname"><a href="unionOSC32KCTRL__RTCCTRL__Type.html">OSC32KCTRL_RTCCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00135">osc32kctrl.h:135</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__INTENCLR__Type_html_acbae6cfc736c8503ededb2014cb893da"><div class="ttname"><a href="unionOSC32KCTRL__INTENCLR__Type.html#acbae6cfc736c8503ededb2014cb893da">OSC32KCTRL_INTENCLR_Type::XOSC32KFAIL</a></div><div class="ttdeci">uint32_t XOSC32KFAIL</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00048">osc32kctrl.h:48</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__XOSC32K__Type_html_a368a520c3ed615599b8cd16dba8efee3"><div class="ttname"><a href="unionOSC32KCTRL__XOSC32K__Type.html#a368a520c3ed615599b8cd16dba8efee3">OSC32KCTRL_XOSC32K_Type::XTALEN</a></div><div class="ttdeci">uint16_t XTALEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00166">osc32kctrl.h:166</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__XOSC32K__Type_html_a8bb8d5f6e822c43b6cf16187db7068fb"><div class="ttname"><a href="unionOSC32KCTRL__XOSC32K__Type.html#a8bb8d5f6e822c43b6cf16187db7068fb">OSC32KCTRL_XOSC32K_Type::ENABLE</a></div><div class="ttdeci">uint16_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00165">osc32kctrl.h:165</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__XOSC32K__Type_html_a62461155ed45e0321f3fc15254c748eb"><div class="ttname"><a href="unionOSC32KCTRL__XOSC32K__Type.html#a62461155ed45e0321f3fc15254c748eb">OSC32KCTRL_XOSC32K_Type::WRTLOCK</a></div><div class="ttdeci">uint16_t WRTLOCK</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00174">osc32kctrl.h:174</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__INTENSET__Type_html"><div class="ttname"><a href="unionOSC32KCTRL__INTENSET__Type.html">OSC32KCTRL_INTENSET_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00066">osc32kctrl.h:66</a></div></div>
<div class="ttc" id="aunionOSC32KCTRL__INTENCLR__Type_html_a4e4b0d19e00dfcf3cf8f414b5d4d5174"><div class="ttname"><a href="unionOSC32KCTRL__INTENCLR__Type.html#a4e4b0d19e00dfcf3cf8f414b5d4d5174">OSC32KCTRL_INTENCLR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2osc32kctrl_8h_source.html#l00051">osc32kctrl.h:51</a></div></div>
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<a href="component_2oscctrl_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_OSCCTRL_COMPONENT_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_OSCCTRL_COMPONENT_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160; </div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define OSCCTRL_U2401</span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define REV_OSCCTRL 0x100</span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160; </div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="comment">/* -------- OSCCTRL_EVCTRL : (OSCCTRL Offset: 0x00) (R/W 8) Event Control -------- */</span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00044"></a><span class="lineno"><a class="line" href="unionOSCCTRL__EVCTRL__Type.html"> 44</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00046"></a><span class="lineno"><a class="line" href="unionOSCCTRL__EVCTRL__Type.html#ad64bf4ba3ba7564bb1352fb154a125e6"> 46</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__EVCTRL__Type.html#ad64bf4ba3ba7564bb1352fb154a125e6">CFDEO0</a>:1; </div>
<div class="line"><a name="l00047"></a><span class="lineno"><a class="line" href="unionOSCCTRL__EVCTRL__Type.html#a3b0bfb04912a1de90d522bc0b7da547b"> 47</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__EVCTRL__Type.html#a3b0bfb04912a1de90d522bc0b7da547b">CFDEO1</a>:1; </div>
<div class="line"><a name="l00048"></a><span class="lineno"><a class="line" href="unionOSCCTRL__EVCTRL__Type.html#a3cb1f4944c823a61e6f02458d6287bc6"> 48</a></span>&#160; uint8_t :6; </div>
<div class="line"><a name="l00049"></a><span class="lineno"><a class="line" href="unionOSCCTRL__EVCTRL__Type.html#ae762a4b0fd0b6eb2fdd1f6aa9f930234"> 49</a></span>&#160; } bit; </div>
<div class="line"><a name="l00050"></a><span class="lineno"> 50</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00051"></a><span class="lineno"><a class="line" href="unionOSCCTRL__EVCTRL__Type.html#a63acd217865e80f211c7a9e96ea9e79a"> 51</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__EVCTRL__Type.html#a63acd217865e80f211c7a9e96ea9e79a">CFDEO</a>:2; </div>
<div class="line"><a name="l00052"></a><span class="lineno"> 52</span>&#160; uint8_t :6; </div>
<div class="line"><a name="l00053"></a><span class="lineno"><a class="line" href="unionOSCCTRL__EVCTRL__Type.html#ac5e0a8dab43a70c540a22608424a705d"> 53</a></span>&#160; } vec; </div>
<div class="line"><a name="l00054"></a><span class="lineno"><a class="line" href="unionOSCCTRL__EVCTRL__Type.html#af58c28631fd4f9449f0ca7ef85926cc8"> 54</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__EVCTRL__Type.html#af58c28631fd4f9449f0ca7ef85926cc8">reg</a>; </div>
<div class="line"><a name="l00055"></a><span class="lineno"> 55</span>&#160;} <a class="code" href="unionOSCCTRL__EVCTRL__Type.html">OSCCTRL_EVCTRL_Type</a>;</div>
<div class="line"><a name="l00056"></a><span class="lineno"> 56</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00057"></a><span class="lineno"> 57</span>&#160; </div>
<div class="line"><a name="l00058"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a996fe1676326158a46ec7ca799f6c476"> 58</a></span>&#160;<span class="preprocessor">#define OSCCTRL_EVCTRL_OFFSET 0x00 </span></div>
<div class="line"><a name="l00059"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a3da520e04154e8d0d4e075f4b925d07e"> 59</a></span>&#160;<span class="preprocessor">#define OSCCTRL_EVCTRL_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00061"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ad86022dc131fd85aab7434a187d52d2b"> 61</a></span>&#160;<span class="preprocessor">#define OSCCTRL_EVCTRL_CFDEO0_Pos 0 </span></div>
<div class="line"><a name="l00062"></a><span class="lineno"> 62</span>&#160;<span class="preprocessor">#define OSCCTRL_EVCTRL_CFDEO0 (_U_(1) &lt;&lt; OSCCTRL_EVCTRL_CFDEO0_Pos)</span></div>
<div class="line"><a name="l00063"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#abfca963e158e3751e6eef579dc8e2459"> 63</a></span>&#160;<span class="preprocessor">#define OSCCTRL_EVCTRL_CFDEO1_Pos 1 </span></div>
<div class="line"><a name="l00064"></a><span class="lineno"> 64</span>&#160;<span class="preprocessor">#define OSCCTRL_EVCTRL_CFDEO1 (_U_(1) &lt;&lt; OSCCTRL_EVCTRL_CFDEO1_Pos)</span></div>
<div class="line"><a name="l00065"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a3a810998724eb0a551b11ebad8af0c3f"> 65</a></span>&#160;<span class="preprocessor">#define OSCCTRL_EVCTRL_CFDEO_Pos 0 </span></div>
<div class="line"><a name="l00066"></a><span class="lineno"> 66</span>&#160;<span class="preprocessor">#define OSCCTRL_EVCTRL_CFDEO_Msk (_U_(0x3) &lt;&lt; OSCCTRL_EVCTRL_CFDEO_Pos)</span></div>
<div class="line"><a name="l00067"></a><span class="lineno"> 67</span>&#160;<span class="preprocessor">#define OSCCTRL_EVCTRL_CFDEO(value) (OSCCTRL_EVCTRL_CFDEO_Msk &amp; ((value) &lt;&lt; OSCCTRL_EVCTRL_CFDEO_Pos))</span></div>
<div class="line"><a name="l00068"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ae40fb603cd76abcad4d1181cf7f806bb"> 68</a></span>&#160;<span class="preprocessor">#define OSCCTRL_EVCTRL_MASK _U_(0x03) </span></div>
<div class="line"><a name="l00070"></a><span class="lineno"> 70</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- OSCCTRL_INTENCLR : (OSCCTRL Offset: 0x04) (R/W 32) Interrupt Enable Clear -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00071"></a><span class="lineno"> 71</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00072"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html"> 72</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00073"></a><span class="lineno"> 73</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00074"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#a83e3925b2f9f8bc78eb9898a30fa70be"> 74</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENCLR__Type.html#a83e3925b2f9f8bc78eb9898a30fa70be">XOSCRDY0</a>:1; </div>
<div class="line"><a name="l00075"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#a9bcb9650050de7f3c8107c0652841f86"> 75</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENCLR__Type.html#a9bcb9650050de7f3c8107c0652841f86">XOSCRDY1</a>:1; </div>
<div class="line"><a name="l00076"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#aa28c9249763c07e5cbdd43b3d9c37b38"> 76</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENCLR__Type.html#aa28c9249763c07e5cbdd43b3d9c37b38">XOSCFAIL0</a>:1; </div>
<div class="line"><a name="l00077"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#a5224e287e09c188309367ebfd9e26a28"> 77</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENCLR__Type.html#a5224e287e09c188309367ebfd9e26a28">XOSCFAIL1</a>:1; </div>
<div class="line"><a name="l00078"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#a69ceff0ffffe0120be019898a92e3f61"> 78</a></span>&#160; uint32_t :4; </div>
<div class="line"><a name="l00079"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#ab1647145c80027477ebf862b48d7e5ea"> 79</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENCLR__Type.html#ab1647145c80027477ebf862b48d7e5ea">DFLLRDY</a>:1; </div>
<div class="line"><a name="l00080"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#a05f4d2dfb629353679afb4360e8cc0f0"> 80</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENCLR__Type.html#a05f4d2dfb629353679afb4360e8cc0f0">DFLLOOB</a>:1; </div>
<div class="line"><a name="l00081"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#ab52d80544ea8e1912690c3396997c3b8"> 81</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENCLR__Type.html#ab52d80544ea8e1912690c3396997c3b8">DFLLLCKF</a>:1; </div>
<div class="line"><a name="l00082"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#af9d070f1875249315f8744e6021538be"> 82</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENCLR__Type.html#af9d070f1875249315f8744e6021538be">DFLLLCKC</a>:1; </div>
<div class="line"><a name="l00083"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#a34cec95ff6b7f5a9b286f98f2bd44fae"> 83</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENCLR__Type.html#a34cec95ff6b7f5a9b286f98f2bd44fae">DFLLRCS</a>:1; </div>
<div class="line"><a name="l00084"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#ae0f90e41517a63f02238473ce65d2bcf"> 84</a></span>&#160; uint32_t :3; </div>
<div class="line"><a name="l00085"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#ab0ed8c9af4a8f8fafed8c53d859c05e9"> 85</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENCLR__Type.html#ab0ed8c9af4a8f8fafed8c53d859c05e9">DPLL0LCKR</a>:1; </div>
<div class="line"><a name="l00086"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#abaebf4ff134c6dd06da0a9090ee7890e"> 86</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENCLR__Type.html#abaebf4ff134c6dd06da0a9090ee7890e">DPLL0LCKF</a>:1; </div>
<div class="line"><a name="l00087"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#ac59316fca9150469fe6d4109903c94ff"> 87</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENCLR__Type.html#ac59316fca9150469fe6d4109903c94ff">DPLL0LTO</a>:1; </div>
<div class="line"><a name="l00088"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#ac33f3685a88f18fbc9a3b76aa0d671c5"> 88</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENCLR__Type.html#ac33f3685a88f18fbc9a3b76aa0d671c5">DPLL0LDRTO</a>:1; </div>
<div class="line"><a name="l00089"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#a7429dec06d090931e70fbb9e20c21770"> 89</a></span>&#160; uint32_t :4; </div>
<div class="line"><a name="l00090"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#a1109b6c313558c507d3ac272b32b3c87"> 90</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENCLR__Type.html#a1109b6c313558c507d3ac272b32b3c87">DPLL1LCKR</a>:1; </div>
<div class="line"><a name="l00091"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#adcee657c1a35d0166637be5cbfbd29fa"> 91</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENCLR__Type.html#adcee657c1a35d0166637be5cbfbd29fa">DPLL1LCKF</a>:1; </div>
<div class="line"><a name="l00092"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#a412dea9c72ccbff0bf10d55de1870189"> 92</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENCLR__Type.html#a412dea9c72ccbff0bf10d55de1870189">DPLL1LTO</a>:1; </div>
<div class="line"><a name="l00093"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#aaff0efc05c9f1df91bfde49befea5cd1"> 93</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENCLR__Type.html#aaff0efc05c9f1df91bfde49befea5cd1">DPLL1LDRTO</a>:1; </div>
<div class="line"><a name="l00094"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#a6c587c3da89306732c6ca276c7b4692e"> 94</a></span>&#160; uint32_t :4; </div>
<div class="line"><a name="l00095"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#a3abf8c2f9a67743a70d7f77a55a8d605"> 95</a></span>&#160; } bit; </div>
<div class="line"><a name="l00096"></a><span class="lineno"> 96</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00097"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#a4cbab9b1056c66eb59af1acbb43a20c1"> 97</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENCLR__Type.html#a4cbab9b1056c66eb59af1acbb43a20c1">XOSCRDY</a>:2; </div>
<div class="line"><a name="l00098"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#a17f1434546a200a555a1cb20f9ebbc1c"> 98</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENCLR__Type.html#a17f1434546a200a555a1cb20f9ebbc1c">XOSCFAIL</a>:2; </div>
<div class="line"><a name="l00099"></a><span class="lineno"> 99</span>&#160; uint32_t :28; </div>
<div class="line"><a name="l00100"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#a044b08442d3f52070e766e94cdad2b00"> 100</a></span>&#160; } vec; </div>
<div class="line"><a name="l00101"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENCLR__Type.html#ab1d93f2a0558e732e176ec45d71a7c19"> 101</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENCLR__Type.html#ab1d93f2a0558e732e176ec45d71a7c19">reg</a>; </div>
<div class="line"><a name="l00102"></a><span class="lineno"> 102</span>&#160;} <a class="code" href="unionOSCCTRL__INTENCLR__Type.html">OSCCTRL_INTENCLR_Type</a>;</div>
<div class="line"><a name="l00103"></a><span class="lineno"> 103</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00104"></a><span class="lineno"> 104</span>&#160; </div>
<div class="line"><a name="l00105"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a3f1d364493d38c935e8c304effcf6801"> 105</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_OFFSET 0x04 </span></div>
<div class="line"><a name="l00106"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ad54389e0eae425ccea549728bfe6bd79"> 106</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00108"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a1e83a14bcf2fd2c1318d219ae498e8da"> 108</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_XOSCRDY0_Pos 0 </span></div>
<div class="line"><a name="l00109"></a><span class="lineno"> 109</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_XOSCRDY0 (_U_(1) &lt;&lt; OSCCTRL_INTENCLR_XOSCRDY0_Pos)</span></div>
<div class="line"><a name="l00110"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a1c8c35169fba19f6288bd1af4ff29c4b"> 110</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_XOSCRDY1_Pos 1 </span></div>
<div class="line"><a name="l00111"></a><span class="lineno"> 111</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_XOSCRDY1 (_U_(1) &lt;&lt; OSCCTRL_INTENCLR_XOSCRDY1_Pos)</span></div>
<div class="line"><a name="l00112"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ad840e74b4b8a5bce231c57763f3d6a27"> 112</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_XOSCRDY_Pos 0 </span></div>
<div class="line"><a name="l00113"></a><span class="lineno"> 113</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_XOSCRDY_Msk (_U_(0x3) &lt;&lt; OSCCTRL_INTENCLR_XOSCRDY_Pos)</span></div>
<div class="line"><a name="l00114"></a><span class="lineno"> 114</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_XOSCRDY(value) (OSCCTRL_INTENCLR_XOSCRDY_Msk &amp; ((value) &lt;&lt; OSCCTRL_INTENCLR_XOSCRDY_Pos))</span></div>
<div class="line"><a name="l00115"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ad4ac60ee270bc85644b0258cbdf21db2"> 115</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_XOSCFAIL0_Pos 2 </span></div>
<div class="line"><a name="l00116"></a><span class="lineno"> 116</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_XOSCFAIL0 (_U_(1) &lt;&lt; OSCCTRL_INTENCLR_XOSCFAIL0_Pos)</span></div>
<div class="line"><a name="l00117"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ad11a3dbaa23fd72f3f236d263cd7b1be"> 117</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_XOSCFAIL1_Pos 3 </span></div>
<div class="line"><a name="l00118"></a><span class="lineno"> 118</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_XOSCFAIL1 (_U_(1) &lt;&lt; OSCCTRL_INTENCLR_XOSCFAIL1_Pos)</span></div>
<div class="line"><a name="l00119"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a391ebec0501a1af9e44d0096e2ab1d39"> 119</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_XOSCFAIL_Pos 2 </span></div>
<div class="line"><a name="l00120"></a><span class="lineno"> 120</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_XOSCFAIL_Msk (_U_(0x3) &lt;&lt; OSCCTRL_INTENCLR_XOSCFAIL_Pos)</span></div>
<div class="line"><a name="l00121"></a><span class="lineno"> 121</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_XOSCFAIL(value) (OSCCTRL_INTENCLR_XOSCFAIL_Msk &amp; ((value) &lt;&lt; OSCCTRL_INTENCLR_XOSCFAIL_Pos))</span></div>
<div class="line"><a name="l00122"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a34cb24a7f76328d1bb22092a9d238e1a"> 122</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DFLLRDY_Pos 8 </span></div>
<div class="line"><a name="l00123"></a><span class="lineno"> 123</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DFLLRDY (_U_(0x1) &lt;&lt; OSCCTRL_INTENCLR_DFLLRDY_Pos)</span></div>
<div class="line"><a name="l00124"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a42b59a19205fb09e83323b23751da9cc"> 124</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DFLLOOB_Pos 9 </span></div>
<div class="line"><a name="l00125"></a><span class="lineno"> 125</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DFLLOOB (_U_(0x1) &lt;&lt; OSCCTRL_INTENCLR_DFLLOOB_Pos)</span></div>
<div class="line"><a name="l00126"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#aedeada806272464f02c40c311aa13580"> 126</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DFLLLCKF_Pos 10 </span></div>
<div class="line"><a name="l00127"></a><span class="lineno"> 127</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DFLLLCKF (_U_(0x1) &lt;&lt; OSCCTRL_INTENCLR_DFLLLCKF_Pos)</span></div>
<div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#acfd407452687ecbe98f2092c48c9cf0b"> 128</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DFLLLCKC_Pos 11 </span></div>
<div class="line"><a name="l00129"></a><span class="lineno"> 129</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DFLLLCKC (_U_(0x1) &lt;&lt; OSCCTRL_INTENCLR_DFLLLCKC_Pos)</span></div>
<div class="line"><a name="l00130"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a6777b5190c055d4589c685a6672fe9f4"> 130</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DFLLRCS_Pos 12 </span></div>
<div class="line"><a name="l00131"></a><span class="lineno"> 131</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DFLLRCS (_U_(0x1) &lt;&lt; OSCCTRL_INTENCLR_DFLLRCS_Pos)</span></div>
<div class="line"><a name="l00132"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ac19aede6406fd2f749d3570bc7a9c84e"> 132</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DPLL0LCKR_Pos 16 </span></div>
<div class="line"><a name="l00133"></a><span class="lineno"> 133</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DPLL0LCKR (_U_(0x1) &lt;&lt; OSCCTRL_INTENCLR_DPLL0LCKR_Pos)</span></div>
<div class="line"><a name="l00134"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#aeec58398a0b8f3a65d683f1a41754ca9"> 134</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DPLL0LCKF_Pos 17 </span></div>
<div class="line"><a name="l00135"></a><span class="lineno"> 135</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DPLL0LCKF (_U_(0x1) &lt;&lt; OSCCTRL_INTENCLR_DPLL0LCKF_Pos)</span></div>
<div class="line"><a name="l00136"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ac5e6c94a61400538770c5b1220372e84"> 136</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DPLL0LTO_Pos 18 </span></div>
<div class="line"><a name="l00137"></a><span class="lineno"> 137</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DPLL0LTO (_U_(0x1) &lt;&lt; OSCCTRL_INTENCLR_DPLL0LTO_Pos)</span></div>
<div class="line"><a name="l00138"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#afcc038fd5ff3f0410e46081f764caf71"> 138</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DPLL0LDRTO_Pos 19 </span></div>
<div class="line"><a name="l00139"></a><span class="lineno"> 139</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DPLL0LDRTO (_U_(0x1) &lt;&lt; OSCCTRL_INTENCLR_DPLL0LDRTO_Pos)</span></div>
<div class="line"><a name="l00140"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a354c3795d5d51b019d89650327cd58cd"> 140</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DPLL1LCKR_Pos 24 </span></div>
<div class="line"><a name="l00141"></a><span class="lineno"> 141</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DPLL1LCKR (_U_(0x1) &lt;&lt; OSCCTRL_INTENCLR_DPLL1LCKR_Pos)</span></div>
<div class="line"><a name="l00142"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#acc1a03dc449ded12c7c04ece882f168d"> 142</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DPLL1LCKF_Pos 25 </span></div>
<div class="line"><a name="l00143"></a><span class="lineno"> 143</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DPLL1LCKF (_U_(0x1) &lt;&lt; OSCCTRL_INTENCLR_DPLL1LCKF_Pos)</span></div>
<div class="line"><a name="l00144"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a22e5d45e06513d280860be62567ec1ce"> 144</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DPLL1LTO_Pos 26 </span></div>
<div class="line"><a name="l00145"></a><span class="lineno"> 145</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DPLL1LTO (_U_(0x1) &lt;&lt; OSCCTRL_INTENCLR_DPLL1LTO_Pos)</span></div>
<div class="line"><a name="l00146"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#afb9da290c0b133fc1bf6e386b0db0ff0"> 146</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DPLL1LDRTO_Pos 27 </span></div>
<div class="line"><a name="l00147"></a><span class="lineno"> 147</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_DPLL1LDRTO (_U_(0x1) &lt;&lt; OSCCTRL_INTENCLR_DPLL1LDRTO_Pos)</span></div>
<div class="line"><a name="l00148"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a491d06abacebcf79ae6c8ab2ce06fc03"> 148</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENCLR_MASK _U_(0x0F0F1F0F) </span></div>
<div class="line"><a name="l00150"></a><span class="lineno"> 150</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- OSCCTRL_INTENSET : (OSCCTRL Offset: 0x08) (R/W 32) Interrupt Enable Set -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00151"></a><span class="lineno"> 151</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00152"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html"> 152</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00153"></a><span class="lineno"> 153</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00154"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#afe37798b768a6b61273987370b0cf50b"> 154</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENSET__Type.html#afe37798b768a6b61273987370b0cf50b">XOSCRDY0</a>:1; </div>
<div class="line"><a name="l00155"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#a98d8021fb7eae9aebbef635cef53c38b"> 155</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENSET__Type.html#a98d8021fb7eae9aebbef635cef53c38b">XOSCRDY1</a>:1; </div>
<div class="line"><a name="l00156"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#a121f44a9fe620b3438acc78c129da26b"> 156</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENSET__Type.html#a121f44a9fe620b3438acc78c129da26b">XOSCFAIL0</a>:1; </div>
<div class="line"><a name="l00157"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#ab7a319ff078e076c61cdd594c6b20601"> 157</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENSET__Type.html#ab7a319ff078e076c61cdd594c6b20601">XOSCFAIL1</a>:1; </div>
<div class="line"><a name="l00158"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#af8b72bb54ebdf76e8091d0dbe92f6d57"> 158</a></span>&#160; uint32_t :4; </div>
<div class="line"><a name="l00159"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#a4181721e6610df2760b735ae5c6a5956"> 159</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENSET__Type.html#a4181721e6610df2760b735ae5c6a5956">DFLLRDY</a>:1; </div>
<div class="line"><a name="l00160"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#a7922512485e5c79228856bb01598e81a"> 160</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENSET__Type.html#a7922512485e5c79228856bb01598e81a">DFLLOOB</a>:1; </div>
<div class="line"><a name="l00161"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#a26be62fcd8e136534c702bd60e6211ce"> 161</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENSET__Type.html#a26be62fcd8e136534c702bd60e6211ce">DFLLLCKF</a>:1; </div>
<div class="line"><a name="l00162"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#a3e8894ceeb8f60b463c15631a7e37678"> 162</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENSET__Type.html#a3e8894ceeb8f60b463c15631a7e37678">DFLLLCKC</a>:1; </div>
<div class="line"><a name="l00163"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#a2e1e2576894b3447bc5b4dc3337cc611"> 163</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENSET__Type.html#a2e1e2576894b3447bc5b4dc3337cc611">DFLLRCS</a>:1; </div>
<div class="line"><a name="l00164"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#a8b1ea4bd84affe2c834cf4534dd26238"> 164</a></span>&#160; uint32_t :3; </div>
<div class="line"><a name="l00165"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#a945688150d0615bee601f2ac66253fec"> 165</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENSET__Type.html#a945688150d0615bee601f2ac66253fec">DPLL0LCKR</a>:1; </div>
<div class="line"><a name="l00166"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#a720fa315e2bc651f6e771a295f5029fb"> 166</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENSET__Type.html#a720fa315e2bc651f6e771a295f5029fb">DPLL0LCKF</a>:1; </div>
<div class="line"><a name="l00167"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#adcc5a32b64b3255d0664219a3782ab41"> 167</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENSET__Type.html#adcc5a32b64b3255d0664219a3782ab41">DPLL0LTO</a>:1; </div>
<div class="line"><a name="l00168"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#a68bba136fa06d23a4965bde19b658964"> 168</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENSET__Type.html#a68bba136fa06d23a4965bde19b658964">DPLL0LDRTO</a>:1; </div>
<div class="line"><a name="l00169"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#a4ef9460939c6832a603b60d66e67e864"> 169</a></span>&#160; uint32_t :4; </div>
<div class="line"><a name="l00170"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#ab3489c4e2b39b65dd31b685f0fbf611e"> 170</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENSET__Type.html#ab3489c4e2b39b65dd31b685f0fbf611e">DPLL1LCKR</a>:1; </div>
<div class="line"><a name="l00171"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#a48f12382dd5a95f0d6a8bbd5ebc317a7"> 171</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENSET__Type.html#a48f12382dd5a95f0d6a8bbd5ebc317a7">DPLL1LCKF</a>:1; </div>
<div class="line"><a name="l00172"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#a6094cb6330e9a14afdde52b6ecfdd151"> 172</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENSET__Type.html#a6094cb6330e9a14afdde52b6ecfdd151">DPLL1LTO</a>:1; </div>
<div class="line"><a name="l00173"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#a5f4abdb04e74ff74a4d2ecf6627c9f15"> 173</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENSET__Type.html#a5f4abdb04e74ff74a4d2ecf6627c9f15">DPLL1LDRTO</a>:1; </div>
<div class="line"><a name="l00174"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#a14591611bca6e53a103664ae588dcca5"> 174</a></span>&#160; uint32_t :4; </div>
<div class="line"><a name="l00175"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#ac800f612490851bdde9235111ce1fcb7"> 175</a></span>&#160; } bit; </div>
<div class="line"><a name="l00176"></a><span class="lineno"> 176</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00177"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#a6a9e6f7186a0c9cccb72c29ef41a34d0"> 177</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENSET__Type.html#a6a9e6f7186a0c9cccb72c29ef41a34d0">XOSCRDY</a>:2; </div>
<div class="line"><a name="l00178"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#adac12ffa2859220a2faa02d1c9382aa4"> 178</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENSET__Type.html#adac12ffa2859220a2faa02d1c9382aa4">XOSCFAIL</a>:2; </div>
<div class="line"><a name="l00179"></a><span class="lineno"> 179</span>&#160; uint32_t :28; </div>
<div class="line"><a name="l00180"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#a8d774ce5c03039e41ed59619ec3a413d"> 180</a></span>&#160; } vec; </div>
<div class="line"><a name="l00181"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTENSET__Type.html#a0b1e8d91cae3805b0b59247bcc496e24"> 181</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTENSET__Type.html#a0b1e8d91cae3805b0b59247bcc496e24">reg</a>; </div>
<div class="line"><a name="l00182"></a><span class="lineno"> 182</span>&#160;} <a class="code" href="unionOSCCTRL__INTENSET__Type.html">OSCCTRL_INTENSET_Type</a>;</div>
<div class="line"><a name="l00183"></a><span class="lineno"> 183</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00184"></a><span class="lineno"> 184</span>&#160; </div>
<div class="line"><a name="l00185"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ac255483d2540447cf58a2ff1c9227c4c"> 185</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_OFFSET 0x08 </span></div>
<div class="line"><a name="l00186"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a59a8baa4ba504f85756373bebf779abd"> 186</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00188"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ac39d4f23555a607bce97a892f86b4406"> 188</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_XOSCRDY0_Pos 0 </span></div>
<div class="line"><a name="l00189"></a><span class="lineno"> 189</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_XOSCRDY0 (_U_(1) &lt;&lt; OSCCTRL_INTENSET_XOSCRDY0_Pos)</span></div>
<div class="line"><a name="l00190"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a1706bb7612abb1b8604b528df8d74fb6"> 190</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_XOSCRDY1_Pos 1 </span></div>
<div class="line"><a name="l00191"></a><span class="lineno"> 191</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_XOSCRDY1 (_U_(1) &lt;&lt; OSCCTRL_INTENSET_XOSCRDY1_Pos)</span></div>
<div class="line"><a name="l00192"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a51f8fe67474d300dae1f69f7877fcb21"> 192</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_XOSCRDY_Pos 0 </span></div>
<div class="line"><a name="l00193"></a><span class="lineno"> 193</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_XOSCRDY_Msk (_U_(0x3) &lt;&lt; OSCCTRL_INTENSET_XOSCRDY_Pos)</span></div>
<div class="line"><a name="l00194"></a><span class="lineno"> 194</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_XOSCRDY(value) (OSCCTRL_INTENSET_XOSCRDY_Msk &amp; ((value) &lt;&lt; OSCCTRL_INTENSET_XOSCRDY_Pos))</span></div>
<div class="line"><a name="l00195"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#adedd337090ca68da118c46ff224cd67b"> 195</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_XOSCFAIL0_Pos 2 </span></div>
<div class="line"><a name="l00196"></a><span class="lineno"> 196</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_XOSCFAIL0 (_U_(1) &lt;&lt; OSCCTRL_INTENSET_XOSCFAIL0_Pos)</span></div>
<div class="line"><a name="l00197"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a5dfbec57e3a4ddf4ff16808664dce852"> 197</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_XOSCFAIL1_Pos 3 </span></div>
<div class="line"><a name="l00198"></a><span class="lineno"> 198</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_XOSCFAIL1 (_U_(1) &lt;&lt; OSCCTRL_INTENSET_XOSCFAIL1_Pos)</span></div>
<div class="line"><a name="l00199"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ac85971e558aa827cf8a346fd73da42ce"> 199</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_XOSCFAIL_Pos 2 </span></div>
<div class="line"><a name="l00200"></a><span class="lineno"> 200</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_XOSCFAIL_Msk (_U_(0x3) &lt;&lt; OSCCTRL_INTENSET_XOSCFAIL_Pos)</span></div>
<div class="line"><a name="l00201"></a><span class="lineno"> 201</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_XOSCFAIL(value) (OSCCTRL_INTENSET_XOSCFAIL_Msk &amp; ((value) &lt;&lt; OSCCTRL_INTENSET_XOSCFAIL_Pos))</span></div>
<div class="line"><a name="l00202"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#aed032ff8ad78e9e4d9e0694dfbd26c38"> 202</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DFLLRDY_Pos 8 </span></div>
<div class="line"><a name="l00203"></a><span class="lineno"> 203</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DFLLRDY (_U_(0x1) &lt;&lt; OSCCTRL_INTENSET_DFLLRDY_Pos)</span></div>
<div class="line"><a name="l00204"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ab911e0fe7e6ea5dc65c44ae1718d7d32"> 204</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DFLLOOB_Pos 9 </span></div>
<div class="line"><a name="l00205"></a><span class="lineno"> 205</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DFLLOOB (_U_(0x1) &lt;&lt; OSCCTRL_INTENSET_DFLLOOB_Pos)</span></div>
<div class="line"><a name="l00206"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#af38520e46a7d6f00aad451bc70ce0ce9"> 206</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DFLLLCKF_Pos 10 </span></div>
<div class="line"><a name="l00207"></a><span class="lineno"> 207</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DFLLLCKF (_U_(0x1) &lt;&lt; OSCCTRL_INTENSET_DFLLLCKF_Pos)</span></div>
<div class="line"><a name="l00208"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a6ad90e329e97b3b3e480ef583fdf3eb6"> 208</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DFLLLCKC_Pos 11 </span></div>
<div class="line"><a name="l00209"></a><span class="lineno"> 209</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DFLLLCKC (_U_(0x1) &lt;&lt; OSCCTRL_INTENSET_DFLLLCKC_Pos)</span></div>
<div class="line"><a name="l00210"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a67b99d880e5ac94cee8f4cece41756d5"> 210</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DFLLRCS_Pos 12 </span></div>
<div class="line"><a name="l00211"></a><span class="lineno"> 211</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DFLLRCS (_U_(0x1) &lt;&lt; OSCCTRL_INTENSET_DFLLRCS_Pos)</span></div>
<div class="line"><a name="l00212"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a25324df8b7fcade4fc325aaa3a10efba"> 212</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DPLL0LCKR_Pos 16 </span></div>
<div class="line"><a name="l00213"></a><span class="lineno"> 213</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DPLL0LCKR (_U_(0x1) &lt;&lt; OSCCTRL_INTENSET_DPLL0LCKR_Pos)</span></div>
<div class="line"><a name="l00214"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a0c306bc4b7b53596e9f8b28f241f1738"> 214</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DPLL0LCKF_Pos 17 </span></div>
<div class="line"><a name="l00215"></a><span class="lineno"> 215</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DPLL0LCKF (_U_(0x1) &lt;&lt; OSCCTRL_INTENSET_DPLL0LCKF_Pos)</span></div>
<div class="line"><a name="l00216"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a577dbcbbc73c82bd44799a553e761631"> 216</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DPLL0LTO_Pos 18 </span></div>
<div class="line"><a name="l00217"></a><span class="lineno"> 217</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DPLL0LTO (_U_(0x1) &lt;&lt; OSCCTRL_INTENSET_DPLL0LTO_Pos)</span></div>
<div class="line"><a name="l00218"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a88ff4ba5e521a293381bb6a81ee96ff9"> 218</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DPLL0LDRTO_Pos 19 </span></div>
<div class="line"><a name="l00219"></a><span class="lineno"> 219</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DPLL0LDRTO (_U_(0x1) &lt;&lt; OSCCTRL_INTENSET_DPLL0LDRTO_Pos)</span></div>
<div class="line"><a name="l00220"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a984e977ed8becf685c4ba9e54b4a88d6"> 220</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DPLL1LCKR_Pos 24 </span></div>
<div class="line"><a name="l00221"></a><span class="lineno"> 221</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DPLL1LCKR (_U_(0x1) &lt;&lt; OSCCTRL_INTENSET_DPLL1LCKR_Pos)</span></div>
<div class="line"><a name="l00222"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ac2424b835502481d298d7b45d8d191c2"> 222</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DPLL1LCKF_Pos 25 </span></div>
<div class="line"><a name="l00223"></a><span class="lineno"> 223</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DPLL1LCKF (_U_(0x1) &lt;&lt; OSCCTRL_INTENSET_DPLL1LCKF_Pos)</span></div>
<div class="line"><a name="l00224"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a786f9307087e16a6a3de282cdbc8580a"> 224</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DPLL1LTO_Pos 26 </span></div>
<div class="line"><a name="l00225"></a><span class="lineno"> 225</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DPLL1LTO (_U_(0x1) &lt;&lt; OSCCTRL_INTENSET_DPLL1LTO_Pos)</span></div>
<div class="line"><a name="l00226"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a6ea2cc759e75ba1cc146354cb04ca4da"> 226</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DPLL1LDRTO_Pos 27 </span></div>
<div class="line"><a name="l00227"></a><span class="lineno"> 227</span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_DPLL1LDRTO (_U_(0x1) &lt;&lt; OSCCTRL_INTENSET_DPLL1LDRTO_Pos)</span></div>
<div class="line"><a name="l00228"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a58580ac326b8ea2f4f59a3f12a9baae3"> 228</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTENSET_MASK _U_(0x0F0F1F0F) </span></div>
<div class="line"><a name="l00230"></a><span class="lineno"> 230</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- OSCCTRL_INTFLAG : (OSCCTRL Offset: 0x0C) (R/W 32) Interrupt Flag Status and Clear -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00231"></a><span class="lineno"> 231</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00232"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTFLAG__Type.html"> 232</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{ <span class="comment">// __I to avoid read-modify-write on write-to-clear register</span></div>
<div class="line"><a name="l00233"></a><span class="lineno"> 233</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00234"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTFLAG__Type.html#a169e75c8282a413a27f6b6fdd18088d8"> 234</a></span>&#160; __I uint32_t <a class="code" href="unionOSCCTRL__INTFLAG__Type.html#a169e75c8282a413a27f6b6fdd18088d8">XOSCRDY0</a>:1; </div>
<div class="line"><a name="l00235"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTFLAG__Type.html#ab063c9654a7b02ddeb767c24c8640509"> 235</a></span>&#160; __I uint32_t <a class="code" href="unionOSCCTRL__INTFLAG__Type.html#ab063c9654a7b02ddeb767c24c8640509">XOSCRDY1</a>:1; </div>
<div class="line"><a name="l00236"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTFLAG__Type.html#a97675627ce7a2c793607b0c60a7bb0bd"> 236</a></span>&#160; __I uint32_t <a class="code" href="unionOSCCTRL__INTFLAG__Type.html#a97675627ce7a2c793607b0c60a7bb0bd">XOSCFAIL0</a>:1; </div>
<div class="line"><a name="l00237"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTFLAG__Type.html#a0063ac5d3a3b75713d0dd44b2538032a"> 237</a></span>&#160; __I uint32_t <a class="code" href="unionOSCCTRL__INTFLAG__Type.html#a0063ac5d3a3b75713d0dd44b2538032a">XOSCFAIL1</a>:1; </div>
<div class="line"><a name="l00238"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTFLAG__Type.html#ab90cc5ec95673930cbba74d659868935"> 238</a></span>&#160; __I <a class="code" href="unionOSCCTRL__INTFLAG__Type.html#ab90cc5ec95673930cbba74d659868935">uint32_t</a> :4; </div>
<div class="line"><a name="l00239"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTFLAG__Type.html#a03d89324c5f32658e1f3be28d5a110c9"> 239</a></span>&#160; __I uint32_t <a class="code" href="unionOSCCTRL__INTFLAG__Type.html#a03d89324c5f32658e1f3be28d5a110c9">DFLLRDY</a>:1; </div>
<div class="line"><a name="l00240"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTFLAG__Type.html#afa9a6a5cf8d36edd6086637b7d1d6418"> 240</a></span>&#160; __I uint32_t <a class="code" href="unionOSCCTRL__INTFLAG__Type.html#afa9a6a5cf8d36edd6086637b7d1d6418">DFLLOOB</a>:1; </div>
<div class="line"><a name="l00241"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTFLAG__Type.html#a72326f39f008158ada084c4e6c198492"> 241</a></span>&#160; __I uint32_t <a class="code" href="unionOSCCTRL__INTFLAG__Type.html#a72326f39f008158ada084c4e6c198492">DFLLLCKF</a>:1; </div>
<div class="line"><a name="l00242"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTFLAG__Type.html#accee9f2f26d4d155996e9c43a286e596"> 242</a></span>&#160; __I uint32_t <a class="code" href="unionOSCCTRL__INTFLAG__Type.html#accee9f2f26d4d155996e9c43a286e596">DFLLLCKC</a>:1; </div>
<div class="line"><a name="l00243"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTFLAG__Type.html#a937ddc40158d711b2c941a730b7fb6f9"> 243</a></span>&#160; __I uint32_t <a class="code" href="unionOSCCTRL__INTFLAG__Type.html#a937ddc40158d711b2c941a730b7fb6f9">DFLLRCS</a>:1; </div>
<div class="line"><a name="l00244"></a><span class="lineno"> 244</span>&#160; __I uint32_t :3; </div>
<div class="line"><a name="l00245"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTFLAG__Type.html#af1065569eb44a91700a84b826b100948"> 245</a></span>&#160; __I uint32_t <a class="code" href="unionOSCCTRL__INTFLAG__Type.html#af1065569eb44a91700a84b826b100948">DPLL0LCKR</a>:1; </div>
<div class="line"><a name="l00246"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTFLAG__Type.html#aa1dd36257438b9fa6459ae7ae3043c71"> 246</a></span>&#160; __I uint32_t <a class="code" href="unionOSCCTRL__INTFLAG__Type.html#aa1dd36257438b9fa6459ae7ae3043c71">DPLL0LCKF</a>:1; </div>
<div class="line"><a name="l00247"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTFLAG__Type.html#a05cc8cb989ca459a66226f06ce051d87"> 247</a></span>&#160; __I uint32_t <a class="code" href="unionOSCCTRL__INTFLAG__Type.html#a05cc8cb989ca459a66226f06ce051d87">DPLL0LTO</a>:1; </div>
<div class="line"><a name="l00248"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTFLAG__Type.html#a151fc00e3dff0c56b52d83b85586ec9e"> 248</a></span>&#160; __I uint32_t <a class="code" href="unionOSCCTRL__INTFLAG__Type.html#a151fc00e3dff0c56b52d83b85586ec9e">DPLL0LDRTO</a>:1; </div>
<div class="line"><a name="l00249"></a><span class="lineno"> 249</span>&#160; __I uint32_t :4; </div>
<div class="line"><a name="l00250"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTFLAG__Type.html#a17a1ab1b1e3e5a1f1753e82de38409fc"> 250</a></span>&#160; __I uint32_t <a class="code" href="unionOSCCTRL__INTFLAG__Type.html#a17a1ab1b1e3e5a1f1753e82de38409fc">DPLL1LCKR</a>:1; </div>
<div class="line"><a name="l00251"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTFLAG__Type.html#aeec6a8e6477d6a099c2536b773f2edb2"> 251</a></span>&#160; __I uint32_t <a class="code" href="unionOSCCTRL__INTFLAG__Type.html#aeec6a8e6477d6a099c2536b773f2edb2">DPLL1LCKF</a>:1; </div>
<div class="line"><a name="l00252"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTFLAG__Type.html#a279f8b6cd3dcece4885e650fd51040fb"> 252</a></span>&#160; __I uint32_t <a class="code" href="unionOSCCTRL__INTFLAG__Type.html#a279f8b6cd3dcece4885e650fd51040fb">DPLL1LTO</a>:1; </div>
<div class="line"><a name="l00253"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTFLAG__Type.html#a001e7aeaac46f99535681cc2dc55c96d"> 253</a></span>&#160; __I uint32_t <a class="code" href="unionOSCCTRL__INTFLAG__Type.html#a001e7aeaac46f99535681cc2dc55c96d">DPLL1LDRTO</a>:1; </div>
<div class="line"><a name="l00254"></a><span class="lineno"> 254</span>&#160; __I uint32_t :4; </div>
<div class="line"><a name="l00255"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTFLAG__Type.html#af7157a8604523fc6d24baf6a07abf09e"> 255</a></span>&#160; } bit; </div>
<div class="line"><a name="l00256"></a><span class="lineno"> 256</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00257"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTFLAG__Type.html#adb2e69c6bb9c97ac4fe09705cf1cf753"> 257</a></span>&#160; __I uint32_t <a class="code" href="unionOSCCTRL__INTFLAG__Type.html#adb2e69c6bb9c97ac4fe09705cf1cf753">XOSCRDY</a>:2; </div>
<div class="line"><a name="l00258"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTFLAG__Type.html#a85d16240f8ea8f26f1a41e946ce1ac81"> 258</a></span>&#160; __I uint32_t <a class="code" href="unionOSCCTRL__INTFLAG__Type.html#a85d16240f8ea8f26f1a41e946ce1ac81">XOSCFAIL</a>:2; </div>
<div class="line"><a name="l00259"></a><span class="lineno"> 259</span>&#160; __I uint32_t :28; </div>
<div class="line"><a name="l00260"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTFLAG__Type.html#a89bfd89dd7cfc66833662809f01016c5"> 260</a></span>&#160; } vec; </div>
<div class="line"><a name="l00261"></a><span class="lineno"><a class="line" href="unionOSCCTRL__INTFLAG__Type.html#adc4f2b29be8ff185857cc7397b07ab0a"> 261</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__INTFLAG__Type.html#adc4f2b29be8ff185857cc7397b07ab0a">reg</a>; </div>
<div class="line"><a name="l00262"></a><span class="lineno"> 262</span>&#160;} <a class="code" href="unionOSCCTRL__INTFLAG__Type.html">OSCCTRL_INTFLAG_Type</a>;</div>
<div class="line"><a name="l00263"></a><span class="lineno"> 263</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00264"></a><span class="lineno"> 264</span>&#160; </div>
<div class="line"><a name="l00265"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ad4379aa6be2f266b44248cf95b73bbc2"> 265</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_OFFSET 0x0C </span></div>
<div class="line"><a name="l00266"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#af36ade32e3a82aa932c61c67dd1051d2"> 266</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00268"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a2f5f25844f47105e86c7d844372648ec"> 268</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_XOSCRDY0_Pos 0 </span></div>
<div class="line"><a name="l00269"></a><span class="lineno"> 269</span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_XOSCRDY0 (_U_(1) &lt;&lt; OSCCTRL_INTFLAG_XOSCRDY0_Pos)</span></div>
<div class="line"><a name="l00270"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a64a72de75c54729a2b5629e31c6fe139"> 270</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_XOSCRDY1_Pos 1 </span></div>
<div class="line"><a name="l00271"></a><span class="lineno"> 271</span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_XOSCRDY1 (_U_(1) &lt;&lt; OSCCTRL_INTFLAG_XOSCRDY1_Pos)</span></div>
<div class="line"><a name="l00272"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a1c522599d8b45dd46183b68afb7c4179"> 272</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_XOSCRDY_Pos 0 </span></div>
<div class="line"><a name="l00273"></a><span class="lineno"> 273</span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_XOSCRDY_Msk (_U_(0x3) &lt;&lt; OSCCTRL_INTFLAG_XOSCRDY_Pos)</span></div>
<div class="line"><a name="l00274"></a><span class="lineno"> 274</span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_XOSCRDY(value) (OSCCTRL_INTFLAG_XOSCRDY_Msk &amp; ((value) &lt;&lt; OSCCTRL_INTFLAG_XOSCRDY_Pos))</span></div>
<div class="line"><a name="l00275"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a298eee00dead4a0e52d64f9c5a1efb57"> 275</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_XOSCFAIL0_Pos 2 </span></div>
<div class="line"><a name="l00276"></a><span class="lineno"> 276</span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_XOSCFAIL0 (_U_(1) &lt;&lt; OSCCTRL_INTFLAG_XOSCFAIL0_Pos)</span></div>
<div class="line"><a name="l00277"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a3814eb8fda4eac82c6f3fee253642a5a"> 277</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_XOSCFAIL1_Pos 3 </span></div>
<div class="line"><a name="l00278"></a><span class="lineno"> 278</span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_XOSCFAIL1 (_U_(1) &lt;&lt; OSCCTRL_INTFLAG_XOSCFAIL1_Pos)</span></div>
<div class="line"><a name="l00279"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a541a47ea56a176d322064f0a04db6fa8"> 279</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_XOSCFAIL_Pos 2 </span></div>
<div class="line"><a name="l00280"></a><span class="lineno"> 280</span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_XOSCFAIL_Msk (_U_(0x3) &lt;&lt; OSCCTRL_INTFLAG_XOSCFAIL_Pos)</span></div>
<div class="line"><a name="l00281"></a><span class="lineno"> 281</span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_XOSCFAIL(value) (OSCCTRL_INTFLAG_XOSCFAIL_Msk &amp; ((value) &lt;&lt; OSCCTRL_INTFLAG_XOSCFAIL_Pos))</span></div>
<div class="line"><a name="l00282"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a6d6c5edd1a31c2185011f2966f4d67e7"> 282</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DFLLRDY_Pos 8 </span></div>
<div class="line"><a name="l00283"></a><span class="lineno"> 283</span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DFLLRDY (_U_(0x1) &lt;&lt; OSCCTRL_INTFLAG_DFLLRDY_Pos)</span></div>
<div class="line"><a name="l00284"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ae2b4598023dd48f296dc3ed55faa93f7"> 284</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DFLLOOB_Pos 9 </span></div>
<div class="line"><a name="l00285"></a><span class="lineno"> 285</span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DFLLOOB (_U_(0x1) &lt;&lt; OSCCTRL_INTFLAG_DFLLOOB_Pos)</span></div>
<div class="line"><a name="l00286"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a6fbc9c37d06550c125c08973065bba1f"> 286</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DFLLLCKF_Pos 10 </span></div>
<div class="line"><a name="l00287"></a><span class="lineno"> 287</span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DFLLLCKF (_U_(0x1) &lt;&lt; OSCCTRL_INTFLAG_DFLLLCKF_Pos)</span></div>
<div class="line"><a name="l00288"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a2a4786711d775d7a9a3c56f1fcfaea2f"> 288</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DFLLLCKC_Pos 11 </span></div>
<div class="line"><a name="l00289"></a><span class="lineno"> 289</span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DFLLLCKC (_U_(0x1) &lt;&lt; OSCCTRL_INTFLAG_DFLLLCKC_Pos)</span></div>
<div class="line"><a name="l00290"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#aef59605a23b051cdd044b9635be34116"> 290</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DFLLRCS_Pos 12 </span></div>
<div class="line"><a name="l00291"></a><span class="lineno"> 291</span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DFLLRCS (_U_(0x1) &lt;&lt; OSCCTRL_INTFLAG_DFLLRCS_Pos)</span></div>
<div class="line"><a name="l00292"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a3a0cc7a56afc262dd18f4b3cd2e68ff2"> 292</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DPLL0LCKR_Pos 16 </span></div>
<div class="line"><a name="l00293"></a><span class="lineno"> 293</span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DPLL0LCKR (_U_(0x1) &lt;&lt; OSCCTRL_INTFLAG_DPLL0LCKR_Pos)</span></div>
<div class="line"><a name="l00294"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ad06bbc0757c0248ee56178ab6a48c28f"> 294</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DPLL0LCKF_Pos 17 </span></div>
<div class="line"><a name="l00295"></a><span class="lineno"> 295</span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DPLL0LCKF (_U_(0x1) &lt;&lt; OSCCTRL_INTFLAG_DPLL0LCKF_Pos)</span></div>
<div class="line"><a name="l00296"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ae9046f4d5ef37e7cde2ca88db111963b"> 296</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DPLL0LTO_Pos 18 </span></div>
<div class="line"><a name="l00297"></a><span class="lineno"> 297</span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DPLL0LTO (_U_(0x1) &lt;&lt; OSCCTRL_INTFLAG_DPLL0LTO_Pos)</span></div>
<div class="line"><a name="l00298"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a4829b1e7eec271be816ef664af6af236"> 298</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DPLL0LDRTO_Pos 19 </span></div>
<div class="line"><a name="l00299"></a><span class="lineno"> 299</span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DPLL0LDRTO (_U_(0x1) &lt;&lt; OSCCTRL_INTFLAG_DPLL0LDRTO_Pos)</span></div>
<div class="line"><a name="l00300"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a108254e167a37e6e4dfb9519bc11209e"> 300</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DPLL1LCKR_Pos 24 </span></div>
<div class="line"><a name="l00301"></a><span class="lineno"> 301</span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DPLL1LCKR (_U_(0x1) &lt;&lt; OSCCTRL_INTFLAG_DPLL1LCKR_Pos)</span></div>
<div class="line"><a name="l00302"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a0d2c2110aa97643a7e19b88e4b3e904d"> 302</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DPLL1LCKF_Pos 25 </span></div>
<div class="line"><a name="l00303"></a><span class="lineno"> 303</span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DPLL1LCKF (_U_(0x1) &lt;&lt; OSCCTRL_INTFLAG_DPLL1LCKF_Pos)</span></div>
<div class="line"><a name="l00304"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#aaa1a96063c00c12713e8873ecd40eb3c"> 304</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DPLL1LTO_Pos 26 </span></div>
<div class="line"><a name="l00305"></a><span class="lineno"> 305</span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DPLL1LTO (_U_(0x1) &lt;&lt; OSCCTRL_INTFLAG_DPLL1LTO_Pos)</span></div>
<div class="line"><a name="l00306"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a6ac997517d000d7d52c080327bbc6dba"> 306</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DPLL1LDRTO_Pos 27 </span></div>
<div class="line"><a name="l00307"></a><span class="lineno"> 307</span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_DPLL1LDRTO (_U_(0x1) &lt;&lt; OSCCTRL_INTFLAG_DPLL1LDRTO_Pos)</span></div>
<div class="line"><a name="l00308"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#aedd8a9f620939d751bf1a447933cefa1"> 308</a></span>&#160;<span class="preprocessor">#define OSCCTRL_INTFLAG_MASK _U_(0x0F0F1F0F) </span></div>
<div class="line"><a name="l00310"></a><span class="lineno"> 310</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- OSCCTRL_STATUS : (OSCCTRL Offset: 0x10) (R/ 32) Status -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00311"></a><span class="lineno"> 311</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00312"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html"> 312</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00313"></a><span class="lineno"> 313</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00314"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#a597c6190c85843d7bc38827d5ab6d010"> 314</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__STATUS__Type.html#a597c6190c85843d7bc38827d5ab6d010">XOSCRDY0</a>:1; </div>
<div class="line"><a name="l00315"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#ab25844e82a178ce32c9d0224b885ba05"> 315</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__STATUS__Type.html#ab25844e82a178ce32c9d0224b885ba05">XOSCRDY1</a>:1; </div>
<div class="line"><a name="l00316"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#af2caa57b9a6fca371d689c82c7ad86b6"> 316</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__STATUS__Type.html#af2caa57b9a6fca371d689c82c7ad86b6">XOSCFAIL0</a>:1; </div>
<div class="line"><a name="l00317"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#a0ecff96e2007d9df24f6134f49aa1957"> 317</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__STATUS__Type.html#a0ecff96e2007d9df24f6134f49aa1957">XOSCFAIL1</a>:1; </div>
<div class="line"><a name="l00318"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#ae6e7dd767c526e42046323be1b78b88f"> 318</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__STATUS__Type.html#ae6e7dd767c526e42046323be1b78b88f">XOSCCKSW0</a>:1; </div>
<div class="line"><a name="l00319"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#af7d2b14082a98938b7ba8fde907f0bd8"> 319</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__STATUS__Type.html#af7d2b14082a98938b7ba8fde907f0bd8">XOSCCKSW1</a>:1; </div>
<div class="line"><a name="l00320"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#a003a5b509c374d6b0b663cd9a26ee68e"> 320</a></span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00321"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#ad706612175f501423b9a6732925e2b11"> 321</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__STATUS__Type.html#ad706612175f501423b9a6732925e2b11">DFLLRDY</a>:1; </div>
<div class="line"><a name="l00322"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#ab52174f8813587e77c7b155b13893f6f"> 322</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__STATUS__Type.html#ab52174f8813587e77c7b155b13893f6f">DFLLOOB</a>:1; </div>
<div class="line"><a name="l00323"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#adfa9d08fd48c3b92f49785ef3a265341"> 323</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__STATUS__Type.html#adfa9d08fd48c3b92f49785ef3a265341">DFLLLCKF</a>:1; </div>
<div class="line"><a name="l00324"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#a37cc8061e04947f9b758b10c14daa9c4"> 324</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__STATUS__Type.html#a37cc8061e04947f9b758b10c14daa9c4">DFLLLCKC</a>:1; </div>
<div class="line"><a name="l00325"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#a49840071342d9e8ccd0ba4fba33a8f9b"> 325</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__STATUS__Type.html#a49840071342d9e8ccd0ba4fba33a8f9b">DFLLRCS</a>:1; </div>
<div class="line"><a name="l00326"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#a3fcaf5dd70119a8305f1a17ead50732b"> 326</a></span>&#160; uint32_t :3; </div>
<div class="line"><a name="l00327"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#a2592f44c470b144d03ee847ae7c0ccf2"> 327</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__STATUS__Type.html#a2592f44c470b144d03ee847ae7c0ccf2">DPLL0LCKR</a>:1; </div>
<div class="line"><a name="l00328"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#ac6b7d164516a988e7e51ba5c7603fedb"> 328</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__STATUS__Type.html#ac6b7d164516a988e7e51ba5c7603fedb">DPLL0LCKF</a>:1; </div>
<div class="line"><a name="l00329"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#ac1e34654c04f05d976822db5886142a8"> 329</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__STATUS__Type.html#ac1e34654c04f05d976822db5886142a8">DPLL0TO</a>:1; </div>
<div class="line"><a name="l00330"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#af98a3646534ecfd9af96c4b0cff719d2"> 330</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__STATUS__Type.html#af98a3646534ecfd9af96c4b0cff719d2">DPLL0LDRTO</a>:1; </div>
<div class="line"><a name="l00331"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#ae8affae0ca9b73f6059c390fc034218a"> 331</a></span>&#160; uint32_t :4; </div>
<div class="line"><a name="l00332"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#a37450d3c901d5807273606f852ed0b9f"> 332</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__STATUS__Type.html#a37450d3c901d5807273606f852ed0b9f">DPLL1LCKR</a>:1; </div>
<div class="line"><a name="l00333"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#ad30454ec3e0f4f3160009a0cb37ba252"> 333</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__STATUS__Type.html#ad30454ec3e0f4f3160009a0cb37ba252">DPLL1LCKF</a>:1; </div>
<div class="line"><a name="l00334"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#a4ae11ca07f98be94aaaa4f75ceb603cf"> 334</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__STATUS__Type.html#a4ae11ca07f98be94aaaa4f75ceb603cf">DPLL1TO</a>:1; </div>
<div class="line"><a name="l00335"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#adfe0af65216839f5c24efdb3be8a2b91"> 335</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__STATUS__Type.html#adfe0af65216839f5c24efdb3be8a2b91">DPLL1LDRTO</a>:1; </div>
<div class="line"><a name="l00336"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#a07d10bd91261647c35e222475fb595da"> 336</a></span>&#160; uint32_t :4; </div>
<div class="line"><a name="l00337"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#a7b08d9b8da144844c77f30ed6fbc185b"> 337</a></span>&#160; } bit; </div>
<div class="line"><a name="l00338"></a><span class="lineno"> 338</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00339"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#a6a8833a682776284b2d4f74f7a657725"> 339</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__STATUS__Type.html#a6a8833a682776284b2d4f74f7a657725">XOSCRDY</a>:2; </div>
<div class="line"><a name="l00340"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#afe6c65dcb311854213e21a6ce299df40"> 340</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__STATUS__Type.html#afe6c65dcb311854213e21a6ce299df40">XOSCFAIL</a>:2; </div>
<div class="line"><a name="l00341"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#af1e646898d06d5e94d51c3f787c6ba89"> 341</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__STATUS__Type.html#af1e646898d06d5e94d51c3f787c6ba89">XOSCCKSW</a>:2; </div>
<div class="line"><a name="l00342"></a><span class="lineno"> 342</span>&#160; uint32_t :26; </div>
<div class="line"><a name="l00343"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#a1cd66949099145b0fbff6e742262d555"> 343</a></span>&#160; } vec; </div>
<div class="line"><a name="l00344"></a><span class="lineno"><a class="line" href="unionOSCCTRL__STATUS__Type.html#a7f57945eef41024236f573782cf94cd9"> 344</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__STATUS__Type.html#a7f57945eef41024236f573782cf94cd9">reg</a>; </div>
<div class="line"><a name="l00345"></a><span class="lineno"> 345</span>&#160;} <a class="code" href="unionOSCCTRL__STATUS__Type.html">OSCCTRL_STATUS_Type</a>;</div>
<div class="line"><a name="l00346"></a><span class="lineno"> 346</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00347"></a><span class="lineno"> 347</span>&#160; </div>
<div class="line"><a name="l00348"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ad7dd78458893930f5f6800c743f745da"> 348</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_OFFSET 0x10 </span></div>
<div class="line"><a name="l00349"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a42375dcec180c57773050c0e0cd04b2e"> 349</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00351"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a68f494fbbdff8221ff788900f64ce3f2"> 351</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_XOSCRDY0_Pos 0 </span></div>
<div class="line"><a name="l00352"></a><span class="lineno"> 352</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_XOSCRDY0 (_U_(1) &lt;&lt; OSCCTRL_STATUS_XOSCRDY0_Pos)</span></div>
<div class="line"><a name="l00353"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ab7aa6e77ead6ec196101e548cf0cf339"> 353</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_XOSCRDY1_Pos 1 </span></div>
<div class="line"><a name="l00354"></a><span class="lineno"> 354</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_XOSCRDY1 (_U_(1) &lt;&lt; OSCCTRL_STATUS_XOSCRDY1_Pos)</span></div>
<div class="line"><a name="l00355"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a068335c4490f6266cd1b8ac6452c0775"> 355</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_XOSCRDY_Pos 0 </span></div>
<div class="line"><a name="l00356"></a><span class="lineno"> 356</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_XOSCRDY_Msk (_U_(0x3) &lt;&lt; OSCCTRL_STATUS_XOSCRDY_Pos)</span></div>
<div class="line"><a name="l00357"></a><span class="lineno"> 357</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_XOSCRDY(value) (OSCCTRL_STATUS_XOSCRDY_Msk &amp; ((value) &lt;&lt; OSCCTRL_STATUS_XOSCRDY_Pos))</span></div>
<div class="line"><a name="l00358"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a9065ab905aa937a21f1faf221841f1af"> 358</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_XOSCFAIL0_Pos 2 </span></div>
<div class="line"><a name="l00359"></a><span class="lineno"> 359</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_XOSCFAIL0 (_U_(1) &lt;&lt; OSCCTRL_STATUS_XOSCFAIL0_Pos)</span></div>
<div class="line"><a name="l00360"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a867c59248b265b1c6945fce69ec0bde1"> 360</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_XOSCFAIL1_Pos 3 </span></div>
<div class="line"><a name="l00361"></a><span class="lineno"> 361</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_XOSCFAIL1 (_U_(1) &lt;&lt; OSCCTRL_STATUS_XOSCFAIL1_Pos)</span></div>
<div class="line"><a name="l00362"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a6d1cd3df10786cca948c08469baca892"> 362</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_XOSCFAIL_Pos 2 </span></div>
<div class="line"><a name="l00363"></a><span class="lineno"> 363</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_XOSCFAIL_Msk (_U_(0x3) &lt;&lt; OSCCTRL_STATUS_XOSCFAIL_Pos)</span></div>
<div class="line"><a name="l00364"></a><span class="lineno"> 364</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_XOSCFAIL(value) (OSCCTRL_STATUS_XOSCFAIL_Msk &amp; ((value) &lt;&lt; OSCCTRL_STATUS_XOSCFAIL_Pos))</span></div>
<div class="line"><a name="l00365"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a31651f5f133ef03501a0c19af590af91"> 365</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_XOSCCKSW0_Pos 4 </span></div>
<div class="line"><a name="l00366"></a><span class="lineno"> 366</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_XOSCCKSW0 (_U_(1) &lt;&lt; OSCCTRL_STATUS_XOSCCKSW0_Pos)</span></div>
<div class="line"><a name="l00367"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a4a12531e0d9bf58fe06a568f7084f4de"> 367</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_XOSCCKSW1_Pos 5 </span></div>
<div class="line"><a name="l00368"></a><span class="lineno"> 368</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_XOSCCKSW1 (_U_(1) &lt;&lt; OSCCTRL_STATUS_XOSCCKSW1_Pos)</span></div>
<div class="line"><a name="l00369"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a9122c98578dbba6b79b1d4e8dc0c21f1"> 369</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_XOSCCKSW_Pos 4 </span></div>
<div class="line"><a name="l00370"></a><span class="lineno"> 370</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_XOSCCKSW_Msk (_U_(0x3) &lt;&lt; OSCCTRL_STATUS_XOSCCKSW_Pos)</span></div>
<div class="line"><a name="l00371"></a><span class="lineno"> 371</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_XOSCCKSW(value) (OSCCTRL_STATUS_XOSCCKSW_Msk &amp; ((value) &lt;&lt; OSCCTRL_STATUS_XOSCCKSW_Pos))</span></div>
<div class="line"><a name="l00372"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a93a88764e52b7292e9585f31459bab2e"> 372</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DFLLRDY_Pos 8 </span></div>
<div class="line"><a name="l00373"></a><span class="lineno"> 373</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DFLLRDY (_U_(0x1) &lt;&lt; OSCCTRL_STATUS_DFLLRDY_Pos)</span></div>
<div class="line"><a name="l00374"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a609a88a7dd6e51e13db39120c06e7802"> 374</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DFLLOOB_Pos 9 </span></div>
<div class="line"><a name="l00375"></a><span class="lineno"> 375</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DFLLOOB (_U_(0x1) &lt;&lt; OSCCTRL_STATUS_DFLLOOB_Pos)</span></div>
<div class="line"><a name="l00376"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ab0f92bd1bac8899184a0c9e827cb893e"> 376</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DFLLLCKF_Pos 10 </span></div>
<div class="line"><a name="l00377"></a><span class="lineno"> 377</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DFLLLCKF (_U_(0x1) &lt;&lt; OSCCTRL_STATUS_DFLLLCKF_Pos)</span></div>
<div class="line"><a name="l00378"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a1afa368e7e15936f20fc585a75ae2364"> 378</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DFLLLCKC_Pos 11 </span></div>
<div class="line"><a name="l00379"></a><span class="lineno"> 379</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DFLLLCKC (_U_(0x1) &lt;&lt; OSCCTRL_STATUS_DFLLLCKC_Pos)</span></div>
<div class="line"><a name="l00380"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a9d70ec5c52fd967af44a913183821e50"> 380</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DFLLRCS_Pos 12 </span></div>
<div class="line"><a name="l00381"></a><span class="lineno"> 381</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DFLLRCS (_U_(0x1) &lt;&lt; OSCCTRL_STATUS_DFLLRCS_Pos)</span></div>
<div class="line"><a name="l00382"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a2e36f4769f2b83a008449bcf77301ec1"> 382</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DPLL0LCKR_Pos 16 </span></div>
<div class="line"><a name="l00383"></a><span class="lineno"> 383</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DPLL0LCKR (_U_(0x1) &lt;&lt; OSCCTRL_STATUS_DPLL0LCKR_Pos)</span></div>
<div class="line"><a name="l00384"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a42192591909d1d068452a5d5a58fd35f"> 384</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DPLL0LCKF_Pos 17 </span></div>
<div class="line"><a name="l00385"></a><span class="lineno"> 385</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DPLL0LCKF (_U_(0x1) &lt;&lt; OSCCTRL_STATUS_DPLL0LCKF_Pos)</span></div>
<div class="line"><a name="l00386"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a28629f6bf7e47edc104c8077871944b2"> 386</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DPLL0TO_Pos 18 </span></div>
<div class="line"><a name="l00387"></a><span class="lineno"> 387</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DPLL0TO (_U_(0x1) &lt;&lt; OSCCTRL_STATUS_DPLL0TO_Pos)</span></div>
<div class="line"><a name="l00388"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a171a4fad2acfea2d53ba64333841c764"> 388</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DPLL0LDRTO_Pos 19 </span></div>
<div class="line"><a name="l00389"></a><span class="lineno"> 389</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DPLL0LDRTO (_U_(0x1) &lt;&lt; OSCCTRL_STATUS_DPLL0LDRTO_Pos)</span></div>
<div class="line"><a name="l00390"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a2f22483696b4c4d0589a2d17dab8779f"> 390</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DPLL1LCKR_Pos 24 </span></div>
<div class="line"><a name="l00391"></a><span class="lineno"> 391</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DPLL1LCKR (_U_(0x1) &lt;&lt; OSCCTRL_STATUS_DPLL1LCKR_Pos)</span></div>
<div class="line"><a name="l00392"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#aee59dcd46d23a4cf661080d023e23d67"> 392</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DPLL1LCKF_Pos 25 </span></div>
<div class="line"><a name="l00393"></a><span class="lineno"> 393</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DPLL1LCKF (_U_(0x1) &lt;&lt; OSCCTRL_STATUS_DPLL1LCKF_Pos)</span></div>
<div class="line"><a name="l00394"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a467800779492045ae90a78e39f45ebf3"> 394</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DPLL1TO_Pos 26 </span></div>
<div class="line"><a name="l00395"></a><span class="lineno"> 395</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DPLL1TO (_U_(0x1) &lt;&lt; OSCCTRL_STATUS_DPLL1TO_Pos)</span></div>
<div class="line"><a name="l00396"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a69fb155bb3b94f7a315d3aa75948f3f0"> 396</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DPLL1LDRTO_Pos 27 </span></div>
<div class="line"><a name="l00397"></a><span class="lineno"> 397</span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_DPLL1LDRTO (_U_(0x1) &lt;&lt; OSCCTRL_STATUS_DPLL1LDRTO_Pos)</span></div>
<div class="line"><a name="l00398"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a9f82ecd17b8fa59428ef3e31aea63aa6"> 398</a></span>&#160;<span class="preprocessor">#define OSCCTRL_STATUS_MASK _U_(0x0F0F1F3F) </span></div>
<div class="line"><a name="l00400"></a><span class="lineno"> 400</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- OSCCTRL_XOSCCTRL : (OSCCTRL Offset: 0x14) (R/W 32) External Multipurpose Crystal Oscillator Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00401"></a><span class="lineno"> 401</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00402"></a><span class="lineno"><a class="line" href="unionOSCCTRL__XOSCCTRL__Type.html"> 402</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00403"></a><span class="lineno"> 403</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00404"></a><span class="lineno"><a class="line" href="unionOSCCTRL__XOSCCTRL__Type.html#aae3055da53eaf3a239d234ad19c5408a"> 404</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00405"></a><span class="lineno"><a class="line" href="unionOSCCTRL__XOSCCTRL__Type.html#aacccad495320a503c3284c681fd96c4f"> 405</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__XOSCCTRL__Type.html#aacccad495320a503c3284c681fd96c4f">ENABLE</a>:1; </div>
<div class="line"><a name="l00406"></a><span class="lineno"><a class="line" href="unionOSCCTRL__XOSCCTRL__Type.html#a566276e47e972aac7c872d07f6047a2a"> 406</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__XOSCCTRL__Type.html#a566276e47e972aac7c872d07f6047a2a">XTALEN</a>:1; </div>
<div class="line"><a name="l00407"></a><span class="lineno"><a class="line" href="unionOSCCTRL__XOSCCTRL__Type.html#a4d041538d0d0a2f687c042d1ec446be1"> 407</a></span>&#160; uint32_t :3; </div>
<div class="line"><a name="l00408"></a><span class="lineno"><a class="line" href="unionOSCCTRL__XOSCCTRL__Type.html#a1e3ace5434334137bc6c2ac01ab68eaf"> 408</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__XOSCCTRL__Type.html#a1e3ace5434334137bc6c2ac01ab68eaf">RUNSTDBY</a>:1; </div>
<div class="line"><a name="l00409"></a><span class="lineno"><a class="line" href="unionOSCCTRL__XOSCCTRL__Type.html#ab2d3db3bbaf2451a8262ffee12837c57"> 409</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__XOSCCTRL__Type.html#ab2d3db3bbaf2451a8262ffee12837c57">ONDEMAND</a>:1; </div>
<div class="line"><a name="l00410"></a><span class="lineno"><a class="line" href="unionOSCCTRL__XOSCCTRL__Type.html#afd9cb159dfb70f9f6719438541152b7d"> 410</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__XOSCCTRL__Type.html#afd9cb159dfb70f9f6719438541152b7d">LOWBUFGAIN</a>:1; </div>
<div class="line"><a name="l00411"></a><span class="lineno"><a class="line" href="unionOSCCTRL__XOSCCTRL__Type.html#a247826826182f9a007ed2ad6f9581884"> 411</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__XOSCCTRL__Type.html#a247826826182f9a007ed2ad6f9581884">IPTAT</a>:2; </div>
<div class="line"><a name="l00412"></a><span class="lineno"><a class="line" href="unionOSCCTRL__XOSCCTRL__Type.html#a2d32f6073ca0dc88ed49c6a33ac670c7"> 412</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__XOSCCTRL__Type.html#a2d32f6073ca0dc88ed49c6a33ac670c7">IMULT</a>:4; </div>
<div class="line"><a name="l00413"></a><span class="lineno"><a class="line" href="unionOSCCTRL__XOSCCTRL__Type.html#af726f4f599c44488d80aa672f5dcb816"> 413</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__XOSCCTRL__Type.html#af726f4f599c44488d80aa672f5dcb816">ENALC</a>:1; </div>
<div class="line"><a name="l00414"></a><span class="lineno"><a class="line" href="unionOSCCTRL__XOSCCTRL__Type.html#acefa9517b4e52222122938816db59191"> 414</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__XOSCCTRL__Type.html#acefa9517b4e52222122938816db59191">CFDEN</a>:1; </div>
<div class="line"><a name="l00415"></a><span class="lineno"><a class="line" href="unionOSCCTRL__XOSCCTRL__Type.html#a7393bb3f95de24198a1b8a0779ffa435"> 415</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__XOSCCTRL__Type.html#a7393bb3f95de24198a1b8a0779ffa435">SWBEN</a>:1; </div>
<div class="line"><a name="l00416"></a><span class="lineno"><a class="line" href="unionOSCCTRL__XOSCCTRL__Type.html#aea7af0a15bc5aee81c4772d7fb3256e2"> 416</a></span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00417"></a><span class="lineno"><a class="line" href="unionOSCCTRL__XOSCCTRL__Type.html#a64d0d3ea09001ce6bf21733670cb540c"> 417</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__XOSCCTRL__Type.html#a64d0d3ea09001ce6bf21733670cb540c">STARTUP</a>:4; </div>
<div class="line"><a name="l00418"></a><span class="lineno"><a class="line" href="unionOSCCTRL__XOSCCTRL__Type.html#a848823d3318e26ed33879c4dc9b866f4"> 418</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__XOSCCTRL__Type.html#a848823d3318e26ed33879c4dc9b866f4">CFDPRESC</a>:4; </div>
<div class="line"><a name="l00419"></a><span class="lineno"><a class="line" href="unionOSCCTRL__XOSCCTRL__Type.html#a9bda5ed3a459bfed31c30fabf0504f45"> 419</a></span>&#160; uint32_t :4; </div>
<div class="line"><a name="l00420"></a><span class="lineno"><a class="line" href="unionOSCCTRL__XOSCCTRL__Type.html#af49b81aafa536a600bec7996b7375228"> 420</a></span>&#160; } bit; </div>
<div class="line"><a name="l00421"></a><span class="lineno"><a class="line" href="unionOSCCTRL__XOSCCTRL__Type.html#ab8cdf810de0695387a1d769842443f78"> 421</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__XOSCCTRL__Type.html#ab8cdf810de0695387a1d769842443f78">reg</a>; </div>
<div class="line"><a name="l00422"></a><span class="lineno"> 422</span>&#160;} <a class="code" href="unionOSCCTRL__XOSCCTRL__Type.html">OSCCTRL_XOSCCTRL_Type</a>;</div>
<div class="line"><a name="l00423"></a><span class="lineno"> 423</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00424"></a><span class="lineno"> 424</span>&#160; </div>
<div class="line"><a name="l00425"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ab61ec167eaec3b37ce0a5e09811eb519"> 425</a></span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_OFFSET 0x14 </span></div>
<div class="line"><a name="l00426"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a1e702ca999cd2ea9e938976d66e4d5e8"> 426</a></span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_RESETVALUE _U_(0x00000080) </span></div>
<div class="line"><a name="l00428"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a55753823c79f012a07776d32fb431e50"> 428</a></span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_ENABLE_Pos 1 </span></div>
<div class="line"><a name="l00429"></a><span class="lineno"> 429</span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_ENABLE (_U_(0x1) &lt;&lt; OSCCTRL_XOSCCTRL_ENABLE_Pos)</span></div>
<div class="line"><a name="l00430"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a46fe198075472a490bede30dd47abddd"> 430</a></span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_XTALEN_Pos 2 </span></div>
<div class="line"><a name="l00431"></a><span class="lineno"> 431</span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_XTALEN (_U_(0x1) &lt;&lt; OSCCTRL_XOSCCTRL_XTALEN_Pos)</span></div>
<div class="line"><a name="l00432"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ae633882a1d2a6b483181e4256d074c0e"> 432</a></span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_RUNSTDBY_Pos 6 </span></div>
<div class="line"><a name="l00433"></a><span class="lineno"> 433</span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_RUNSTDBY (_U_(0x1) &lt;&lt; OSCCTRL_XOSCCTRL_RUNSTDBY_Pos)</span></div>
<div class="line"><a name="l00434"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a3d087d7558147bb7da1da3c88ea2103c"> 434</a></span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_ONDEMAND_Pos 7 </span></div>
<div class="line"><a name="l00435"></a><span class="lineno"> 435</span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_ONDEMAND (_U_(0x1) &lt;&lt; OSCCTRL_XOSCCTRL_ONDEMAND_Pos)</span></div>
<div class="line"><a name="l00436"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a84c7d7844390844005bc5f34bc700e59"> 436</a></span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_LOWBUFGAIN_Pos 8 </span></div>
<div class="line"><a name="l00437"></a><span class="lineno"> 437</span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_LOWBUFGAIN (_U_(0x1) &lt;&lt; OSCCTRL_XOSCCTRL_LOWBUFGAIN_Pos)</span></div>
<div class="line"><a name="l00438"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a3003e6ff068504def0961267faa43879"> 438</a></span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_IPTAT_Pos 9 </span></div>
<div class="line"><a name="l00439"></a><span class="lineno"> 439</span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_IPTAT_Msk (_U_(0x3) &lt;&lt; OSCCTRL_XOSCCTRL_IPTAT_Pos)</span></div>
<div class="line"><a name="l00440"></a><span class="lineno"> 440</span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_IPTAT(value) (OSCCTRL_XOSCCTRL_IPTAT_Msk &amp; ((value) &lt;&lt; OSCCTRL_XOSCCTRL_IPTAT_Pos))</span></div>
<div class="line"><a name="l00441"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#abd250ec9e51c26d98151644963c508e2"> 441</a></span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_IMULT_Pos 11 </span></div>
<div class="line"><a name="l00442"></a><span class="lineno"> 442</span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_IMULT_Msk (_U_(0xF) &lt;&lt; OSCCTRL_XOSCCTRL_IMULT_Pos)</span></div>
<div class="line"><a name="l00443"></a><span class="lineno"> 443</span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_IMULT(value) (OSCCTRL_XOSCCTRL_IMULT_Msk &amp; ((value) &lt;&lt; OSCCTRL_XOSCCTRL_IMULT_Pos))</span></div>
<div class="line"><a name="l00444"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#aca0949c12da428ff0ae358a16d53a346"> 444</a></span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_ENALC_Pos 15 </span></div>
<div class="line"><a name="l00445"></a><span class="lineno"> 445</span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_ENALC (_U_(0x1) &lt;&lt; OSCCTRL_XOSCCTRL_ENALC_Pos)</span></div>
<div class="line"><a name="l00446"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a60d8c5bfc01b31ca34b5e519c831476d"> 446</a></span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_CFDEN_Pos 16 </span></div>
<div class="line"><a name="l00447"></a><span class="lineno"> 447</span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_CFDEN (_U_(0x1) &lt;&lt; OSCCTRL_XOSCCTRL_CFDEN_Pos)</span></div>
<div class="line"><a name="l00448"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a3c2bdacb812dab99256add8f91dafa0c"> 448</a></span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_SWBEN_Pos 17 </span></div>
<div class="line"><a name="l00449"></a><span class="lineno"> 449</span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_SWBEN (_U_(0x1) &lt;&lt; OSCCTRL_XOSCCTRL_SWBEN_Pos)</span></div>
<div class="line"><a name="l00450"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a4e50b7ee8f0aed0e3ffaf064b9febc35"> 450</a></span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_STARTUP_Pos 20 </span></div>
<div class="line"><a name="l00451"></a><span class="lineno"> 451</span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_STARTUP_Msk (_U_(0xF) &lt;&lt; OSCCTRL_XOSCCTRL_STARTUP_Pos)</span></div>
<div class="line"><a name="l00452"></a><span class="lineno"> 452</span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_STARTUP(value) (OSCCTRL_XOSCCTRL_STARTUP_Msk &amp; ((value) &lt;&lt; OSCCTRL_XOSCCTRL_STARTUP_Pos))</span></div>
<div class="line"><a name="l00453"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a8dc33d9d6ebbf5568858f380af797476"> 453</a></span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_CFDPRESC_Pos 24 </span></div>
<div class="line"><a name="l00454"></a><span class="lineno"> 454</span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_CFDPRESC_Msk (_U_(0xF) &lt;&lt; OSCCTRL_XOSCCTRL_CFDPRESC_Pos)</span></div>
<div class="line"><a name="l00455"></a><span class="lineno"> 455</span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_CFDPRESC(value) (OSCCTRL_XOSCCTRL_CFDPRESC_Msk &amp; ((value) &lt;&lt; OSCCTRL_XOSCCTRL_CFDPRESC_Pos))</span></div>
<div class="line"><a name="l00456"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a3569b3c01688e4b0d67f24f451162353"> 456</a></span>&#160;<span class="preprocessor">#define OSCCTRL_XOSCCTRL_MASK _U_(0x0FF3FFC6) </span></div>
<div class="line"><a name="l00458"></a><span class="lineno"> 458</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- OSCCTRL_DFLLCTRLA : (OSCCTRL Offset: 0x1C) (R/W 8) DFLL48M Control A -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00459"></a><span class="lineno"> 459</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00460"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLCTRLA__Type.html"> 460</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00461"></a><span class="lineno"> 461</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00462"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLCTRLA__Type.html#a778145efc3ad4c64e60b0e300c7bca5a"> 462</a></span>&#160; uint8_t :1; </div>
<div class="line"><a name="l00463"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLCTRLA__Type.html#a4d81d3df677e45b781748b52f04dc541"> 463</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__DFLLCTRLA__Type.html#a4d81d3df677e45b781748b52f04dc541">ENABLE</a>:1; </div>
<div class="line"><a name="l00464"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLCTRLA__Type.html#ae339217d27130c1ae6ad2e99e1e8eef5"> 464</a></span>&#160; uint8_t :4; </div>
<div class="line"><a name="l00465"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLCTRLA__Type.html#ab362598814969667425f62150877cc3a"> 465</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__DFLLCTRLA__Type.html#ab362598814969667425f62150877cc3a">RUNSTDBY</a>:1; </div>
<div class="line"><a name="l00466"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLCTRLA__Type.html#a27554c0ef44111f899436cda6223c905"> 466</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__DFLLCTRLA__Type.html#a27554c0ef44111f899436cda6223c905">ONDEMAND</a>:1; </div>
<div class="line"><a name="l00467"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLCTRLA__Type.html#a5978101f238abed07595388513491ec6"> 467</a></span>&#160; } bit; </div>
<div class="line"><a name="l00468"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLCTRLA__Type.html#a1251603fa61d0ceb8eb071748e45df7e"> 468</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__DFLLCTRLA__Type.html#a1251603fa61d0ceb8eb071748e45df7e">reg</a>; </div>
<div class="line"><a name="l00469"></a><span class="lineno"> 469</span>&#160;} <a class="code" href="unionOSCCTRL__DFLLCTRLA__Type.html">OSCCTRL_DFLLCTRLA_Type</a>;</div>
<div class="line"><a name="l00470"></a><span class="lineno"> 470</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00471"></a><span class="lineno"> 471</span>&#160; </div>
<div class="line"><a name="l00472"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a66a0e69b3ee663b2d47a635641b3f830"> 472</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLA_OFFSET 0x1C </span></div>
<div class="line"><a name="l00473"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a8e3996f83720641b903cbb6d9ec384ad"> 473</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLA_RESETVALUE _U_(0x82) </span></div>
<div class="line"><a name="l00475"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ac52718d932dc91aced9a43bcc0a30f67"> 475</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLA_ENABLE_Pos 1 </span></div>
<div class="line"><a name="l00476"></a><span class="lineno"> 476</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLA_ENABLE (_U_(0x1) &lt;&lt; OSCCTRL_DFLLCTRLA_ENABLE_Pos)</span></div>
<div class="line"><a name="l00477"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a6e18e8612332ec33be46da48d6af6326"> 477</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLA_RUNSTDBY_Pos 6 </span></div>
<div class="line"><a name="l00478"></a><span class="lineno"> 478</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLA_RUNSTDBY (_U_(0x1) &lt;&lt; OSCCTRL_DFLLCTRLA_RUNSTDBY_Pos)</span></div>
<div class="line"><a name="l00479"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ac55896db5f5513fffbead77d7725c7d4"> 479</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLA_ONDEMAND_Pos 7 </span></div>
<div class="line"><a name="l00480"></a><span class="lineno"> 480</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLA_ONDEMAND (_U_(0x1) &lt;&lt; OSCCTRL_DFLLCTRLA_ONDEMAND_Pos)</span></div>
<div class="line"><a name="l00481"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a8da8bde82b88385d7a0450edc12d4788"> 481</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLA_MASK _U_(0xC2) </span></div>
<div class="line"><a name="l00483"></a><span class="lineno"> 483</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- OSCCTRL_DFLLCTRLB : (OSCCTRL Offset: 0x20) (R/W 8) DFLL48M Control B -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00484"></a><span class="lineno"> 484</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00485"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLCTRLB__Type.html"> 485</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00486"></a><span class="lineno"> 486</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00487"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLCTRLB__Type.html#ad073fa411491617af1aac6d332e32a01"> 487</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__DFLLCTRLB__Type.html#ad073fa411491617af1aac6d332e32a01">MODE</a>:1; </div>
<div class="line"><a name="l00488"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLCTRLB__Type.html#aa787aa634559f07d4dc349caf779015a"> 488</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__DFLLCTRLB__Type.html#aa787aa634559f07d4dc349caf779015a">STABLE</a>:1; </div>
<div class="line"><a name="l00489"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLCTRLB__Type.html#ad0a1e5bfed4cf31a29a2118558a69df3"> 489</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__DFLLCTRLB__Type.html#ad0a1e5bfed4cf31a29a2118558a69df3">LLAW</a>:1; </div>
<div class="line"><a name="l00490"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLCTRLB__Type.html#ad2a934d461a2ee55bd3d5c0a97e7b3ae"> 490</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__DFLLCTRLB__Type.html#ad2a934d461a2ee55bd3d5c0a97e7b3ae">USBCRM</a>:1; </div>
<div class="line"><a name="l00491"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLCTRLB__Type.html#a5dab038e32ae993ae06c94f4efe066af"> 491</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__DFLLCTRLB__Type.html#a5dab038e32ae993ae06c94f4efe066af">CCDIS</a>:1; </div>
<div class="line"><a name="l00492"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLCTRLB__Type.html#aa1735531bdfbb47c2e39fc015dfe8dbc"> 492</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__DFLLCTRLB__Type.html#aa1735531bdfbb47c2e39fc015dfe8dbc">QLDIS</a>:1; </div>
<div class="line"><a name="l00493"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLCTRLB__Type.html#a7cd38d47492f6354562ae737c68cc70c"> 493</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__DFLLCTRLB__Type.html#a7cd38d47492f6354562ae737c68cc70c">BPLCKC</a>:1; </div>
<div class="line"><a name="l00494"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLCTRLB__Type.html#a471e12cb3293cc861e26065e2889f9b3"> 494</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__DFLLCTRLB__Type.html#a471e12cb3293cc861e26065e2889f9b3">WAITLOCK</a>:1; </div>
<div class="line"><a name="l00495"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLCTRLB__Type.html#a6ff71f36c7c6902041713db0877b0e51"> 495</a></span>&#160; } bit; </div>
<div class="line"><a name="l00496"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLCTRLB__Type.html#ad2268dcb386b9cc38f17a8620edee43f"> 496</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__DFLLCTRLB__Type.html#ad2268dcb386b9cc38f17a8620edee43f">reg</a>; </div>
<div class="line"><a name="l00497"></a><span class="lineno"> 497</span>&#160;} <a class="code" href="unionOSCCTRL__DFLLCTRLB__Type.html">OSCCTRL_DFLLCTRLB_Type</a>;</div>
<div class="line"><a name="l00498"></a><span class="lineno"> 498</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00499"></a><span class="lineno"> 499</span>&#160; </div>
<div class="line"><a name="l00500"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a69e718033e7a0dfb51ba54cadaca79eb"> 500</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLB_OFFSET 0x20 </span></div>
<div class="line"><a name="l00501"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a3febab6fa467422e1ef45900924b8d80"> 501</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLB_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00503"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a81a2b2a576221303235f1662fa482dc7"> 503</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLB_MODE_Pos 0 </span></div>
<div class="line"><a name="l00504"></a><span class="lineno"> 504</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLB_MODE (_U_(0x1) &lt;&lt; OSCCTRL_DFLLCTRLB_MODE_Pos)</span></div>
<div class="line"><a name="l00505"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ab3f3fa0d56fef05164fa2d4c782e7328"> 505</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLB_STABLE_Pos 1 </span></div>
<div class="line"><a name="l00506"></a><span class="lineno"> 506</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLB_STABLE (_U_(0x1) &lt;&lt; OSCCTRL_DFLLCTRLB_STABLE_Pos)</span></div>
<div class="line"><a name="l00507"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#aadbf916c853f33b2bfdb3aac1f51305e"> 507</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLB_LLAW_Pos 2 </span></div>
<div class="line"><a name="l00508"></a><span class="lineno"> 508</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLB_LLAW (_U_(0x1) &lt;&lt; OSCCTRL_DFLLCTRLB_LLAW_Pos)</span></div>
<div class="line"><a name="l00509"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#afe8c1970e53420b740d6a340f832eb78"> 509</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLB_USBCRM_Pos 3 </span></div>
<div class="line"><a name="l00510"></a><span class="lineno"> 510</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLB_USBCRM (_U_(0x1) &lt;&lt; OSCCTRL_DFLLCTRLB_USBCRM_Pos)</span></div>
<div class="line"><a name="l00511"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#afd696a109b6a505c8979712490300871"> 511</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLB_CCDIS_Pos 4 </span></div>
<div class="line"><a name="l00512"></a><span class="lineno"> 512</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLB_CCDIS (_U_(0x1) &lt;&lt; OSCCTRL_DFLLCTRLB_CCDIS_Pos)</span></div>
<div class="line"><a name="l00513"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#af137760440a258da8ff5058cd0ba8feb"> 513</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLB_QLDIS_Pos 5 </span></div>
<div class="line"><a name="l00514"></a><span class="lineno"> 514</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLB_QLDIS (_U_(0x1) &lt;&lt; OSCCTRL_DFLLCTRLB_QLDIS_Pos)</span></div>
<div class="line"><a name="l00515"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#aa51375783f841ae924335bcd1e11a9e7"> 515</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLB_BPLCKC_Pos 6 </span></div>
<div class="line"><a name="l00516"></a><span class="lineno"> 516</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLB_BPLCKC (_U_(0x1) &lt;&lt; OSCCTRL_DFLLCTRLB_BPLCKC_Pos)</span></div>
<div class="line"><a name="l00517"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a9b1b8f771d56ce2d7b917c28a48ac724"> 517</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLB_WAITLOCK_Pos 7 </span></div>
<div class="line"><a name="l00518"></a><span class="lineno"> 518</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLB_WAITLOCK (_U_(0x1) &lt;&lt; OSCCTRL_DFLLCTRLB_WAITLOCK_Pos)</span></div>
<div class="line"><a name="l00519"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a8e776a7b4b70ff9cc15cee6dbc792e80"> 519</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLCTRLB_MASK _U_(0xFF) </span></div>
<div class="line"><a name="l00521"></a><span class="lineno"> 521</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- OSCCTRL_DFLLVAL : (OSCCTRL Offset: 0x24) (R/W 32) DFLL48M Value -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00522"></a><span class="lineno"> 522</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00523"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLVAL__Type.html"> 523</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00524"></a><span class="lineno"> 524</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00525"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLVAL__Type.html#a4a3e33bbc911591455e56f8cbc5573ea"> 525</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DFLLVAL__Type.html#a4a3e33bbc911591455e56f8cbc5573ea">FINE</a>:8; </div>
<div class="line"><a name="l00526"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLVAL__Type.html#a8c4a0c6f359d14ba60dad67af8fcc7e5"> 526</a></span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00527"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLVAL__Type.html#a21ed729ac9c4bdc4f2a8df46d4df9c71"> 527</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DFLLVAL__Type.html#a21ed729ac9c4bdc4f2a8df46d4df9c71">COARSE</a>:6; </div>
<div class="line"><a name="l00528"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLVAL__Type.html#a644f3f85ff3190995d1b9c2e207dd0bb"> 528</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DFLLVAL__Type.html#a644f3f85ff3190995d1b9c2e207dd0bb">DIFF</a>:16; </div>
<div class="line"><a name="l00529"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLVAL__Type.html#a13fdddf22c3eba9defcf7854576feb65"> 529</a></span>&#160; } bit; </div>
<div class="line"><a name="l00530"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLVAL__Type.html#ad83f60e1a33c2dda5440837142e285e4"> 530</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DFLLVAL__Type.html#ad83f60e1a33c2dda5440837142e285e4">reg</a>; </div>
<div class="line"><a name="l00531"></a><span class="lineno"> 531</span>&#160;} <a class="code" href="unionOSCCTRL__DFLLVAL__Type.html">OSCCTRL_DFLLVAL_Type</a>;</div>
<div class="line"><a name="l00532"></a><span class="lineno"> 532</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00533"></a><span class="lineno"> 533</span>&#160; </div>
<div class="line"><a name="l00534"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a73984d1b76d49184781e4b3f31114b2f"> 534</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLVAL_OFFSET 0x24 </span></div>
<div class="line"><a name="l00535"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a698a0db24626335bd0120330a28bdfc3"> 535</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLVAL_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00537"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#acbf24eb2695191929f7fe5384e93ac82"> 537</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLVAL_FINE_Pos 0 </span></div>
<div class="line"><a name="l00538"></a><span class="lineno"> 538</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLVAL_FINE_Msk (_U_(0xFF) &lt;&lt; OSCCTRL_DFLLVAL_FINE_Pos)</span></div>
<div class="line"><a name="l00539"></a><span class="lineno"> 539</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLVAL_FINE(value) (OSCCTRL_DFLLVAL_FINE_Msk &amp; ((value) &lt;&lt; OSCCTRL_DFLLVAL_FINE_Pos))</span></div>
<div class="line"><a name="l00540"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a4060e9896f8ecee10e8c47b916b0a036"> 540</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLVAL_COARSE_Pos 10 </span></div>
<div class="line"><a name="l00541"></a><span class="lineno"> 541</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLVAL_COARSE_Msk (_U_(0x3F) &lt;&lt; OSCCTRL_DFLLVAL_COARSE_Pos)</span></div>
<div class="line"><a name="l00542"></a><span class="lineno"> 542</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLVAL_COARSE(value) (OSCCTRL_DFLLVAL_COARSE_Msk &amp; ((value) &lt;&lt; OSCCTRL_DFLLVAL_COARSE_Pos))</span></div>
<div class="line"><a name="l00543"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a3285312e7cb0b1dc1211b6e67bf9444d"> 543</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLVAL_DIFF_Pos 16 </span></div>
<div class="line"><a name="l00544"></a><span class="lineno"> 544</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLVAL_DIFF_Msk (_U_(0xFFFF) &lt;&lt; OSCCTRL_DFLLVAL_DIFF_Pos)</span></div>
<div class="line"><a name="l00545"></a><span class="lineno"> 545</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLVAL_DIFF(value) (OSCCTRL_DFLLVAL_DIFF_Msk &amp; ((value) &lt;&lt; OSCCTRL_DFLLVAL_DIFF_Pos))</span></div>
<div class="line"><a name="l00546"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a9f0663f26a54cc0857ad891963fd7d2e"> 546</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLVAL_MASK _U_(0xFFFFFCFF) </span></div>
<div class="line"><a name="l00548"></a><span class="lineno"> 548</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- OSCCTRL_DFLLMUL : (OSCCTRL Offset: 0x28) (R/W 32) DFLL48M Multiplier -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00549"></a><span class="lineno"> 549</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00550"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLMUL__Type.html"> 550</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00551"></a><span class="lineno"> 551</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00552"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLMUL__Type.html#a953ebf2488a6a6a109274e86f3f595e3"> 552</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DFLLMUL__Type.html#a953ebf2488a6a6a109274e86f3f595e3">MUL</a>:16; </div>
<div class="line"><a name="l00553"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLMUL__Type.html#a3f59f93c097fdb2cde10a5e0998fb290"> 553</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DFLLMUL__Type.html#a3f59f93c097fdb2cde10a5e0998fb290">FSTEP</a>:8; </div>
<div class="line"><a name="l00554"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLMUL__Type.html#af37ad24819c68eb48bbeed4f3c0dfd6d"> 554</a></span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00555"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLMUL__Type.html#a2b0e3b0c09f38fe671c7083fc558cfc4"> 555</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DFLLMUL__Type.html#a2b0e3b0c09f38fe671c7083fc558cfc4">CSTEP</a>:6; </div>
<div class="line"><a name="l00556"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLMUL__Type.html#a72e57237f1590da423372a0419d5b6f8"> 556</a></span>&#160; } bit; </div>
<div class="line"><a name="l00557"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLMUL__Type.html#afa6e917f44c41de5764b6ff8283bebeb"> 557</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DFLLMUL__Type.html#afa6e917f44c41de5764b6ff8283bebeb">reg</a>; </div>
<div class="line"><a name="l00558"></a><span class="lineno"> 558</span>&#160;} <a class="code" href="unionOSCCTRL__DFLLMUL__Type.html">OSCCTRL_DFLLMUL_Type</a>;</div>
<div class="line"><a name="l00559"></a><span class="lineno"> 559</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00560"></a><span class="lineno"> 560</span>&#160; </div>
<div class="line"><a name="l00561"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#acbc7ecae09d7c5833c15e713518f6af0"> 561</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLMUL_OFFSET 0x28 </span></div>
<div class="line"><a name="l00562"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a16ffd9100a1b1e248997caaf180cc818"> 562</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLMUL_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00564"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#af28d647c2e21f62492d2fb7dae6379c1"> 564</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLMUL_MUL_Pos 0 </span></div>
<div class="line"><a name="l00565"></a><span class="lineno"> 565</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLMUL_MUL_Msk (_U_(0xFFFF) &lt;&lt; OSCCTRL_DFLLMUL_MUL_Pos)</span></div>
<div class="line"><a name="l00566"></a><span class="lineno"> 566</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLMUL_MUL(value) (OSCCTRL_DFLLMUL_MUL_Msk &amp; ((value) &lt;&lt; OSCCTRL_DFLLMUL_MUL_Pos))</span></div>
<div class="line"><a name="l00567"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a4f5fe6a1887b7f8b49c1ff906c00d3c0"> 567</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLMUL_FSTEP_Pos 16 </span></div>
<div class="line"><a name="l00568"></a><span class="lineno"> 568</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLMUL_FSTEP_Msk (_U_(0xFF) &lt;&lt; OSCCTRL_DFLLMUL_FSTEP_Pos)</span></div>
<div class="line"><a name="l00569"></a><span class="lineno"> 569</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLMUL_FSTEP(value) (OSCCTRL_DFLLMUL_FSTEP_Msk &amp; ((value) &lt;&lt; OSCCTRL_DFLLMUL_FSTEP_Pos))</span></div>
<div class="line"><a name="l00570"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a0c8450b117abc6c2de82b7b1fc96297a"> 570</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLMUL_CSTEP_Pos 26 </span></div>
<div class="line"><a name="l00571"></a><span class="lineno"> 571</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLMUL_CSTEP_Msk (_U_(0x3F) &lt;&lt; OSCCTRL_DFLLMUL_CSTEP_Pos)</span></div>
<div class="line"><a name="l00572"></a><span class="lineno"> 572</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLMUL_CSTEP(value) (OSCCTRL_DFLLMUL_CSTEP_Msk &amp; ((value) &lt;&lt; OSCCTRL_DFLLMUL_CSTEP_Pos))</span></div>
<div class="line"><a name="l00573"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#af806f0aed246525bd1f1244e66da2550"> 573</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLMUL_MASK _U_(0xFCFFFFFF) </span></div>
<div class="line"><a name="l00575"></a><span class="lineno"> 575</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- OSCCTRL_DFLLSYNC : (OSCCTRL Offset: 0x2C) (R/W 8) DFLL48M Synchronization -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00576"></a><span class="lineno"> 576</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00577"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLSYNC__Type.html"> 577</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00578"></a><span class="lineno"> 578</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00579"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLSYNC__Type.html#a291b5e3059ef40c365a14d6016ed4541"> 579</a></span>&#160; uint8_t :1; </div>
<div class="line"><a name="l00580"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLSYNC__Type.html#ac900889c9e8c92497bda954dea174e10"> 580</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__DFLLSYNC__Type.html#ac900889c9e8c92497bda954dea174e10">ENABLE</a>:1; </div>
<div class="line"><a name="l00581"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLSYNC__Type.html#ac57da81dbc31fef20633943489f76036"> 581</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__DFLLSYNC__Type.html#ac57da81dbc31fef20633943489f76036">DFLLCTRLB</a>:1; </div>
<div class="line"><a name="l00582"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLSYNC__Type.html#a6415782df7d30d3f81b46329c25b4deb"> 582</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__DFLLSYNC__Type.html#a6415782df7d30d3f81b46329c25b4deb">DFLLVAL</a>:1; </div>
<div class="line"><a name="l00583"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLSYNC__Type.html#aba4561fcac0b7fc275a6e96032497f76"> 583</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__DFLLSYNC__Type.html#aba4561fcac0b7fc275a6e96032497f76">DFLLMUL</a>:1; </div>
<div class="line"><a name="l00584"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLSYNC__Type.html#a7ab51f215680060da67a454bebe2ac02"> 584</a></span>&#160; uint8_t :3; </div>
<div class="line"><a name="l00585"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLSYNC__Type.html#a9a74e9012a1363b4c744952737aa6c59"> 585</a></span>&#160; } bit; </div>
<div class="line"><a name="l00586"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DFLLSYNC__Type.html#a7f329d7b2b57f8c54d24509a1f36d83b"> 586</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__DFLLSYNC__Type.html#a7f329d7b2b57f8c54d24509a1f36d83b">reg</a>; </div>
<div class="line"><a name="l00587"></a><span class="lineno"> 587</span>&#160;} <a class="code" href="unionOSCCTRL__DFLLSYNC__Type.html">OSCCTRL_DFLLSYNC_Type</a>;</div>
<div class="line"><a name="l00588"></a><span class="lineno"> 588</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00589"></a><span class="lineno"> 589</span>&#160; </div>
<div class="line"><a name="l00590"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ae788363f83086b565eb6735cbb2e9ea0"> 590</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLSYNC_OFFSET 0x2C </span></div>
<div class="line"><a name="l00591"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ae8a44ba0fa19b83e9660609fcad38949"> 591</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLSYNC_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00593"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#adff68bf675fb7f9c30aa5e96c1e478f8"> 593</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLSYNC_ENABLE_Pos 1 </span></div>
<div class="line"><a name="l00594"></a><span class="lineno"> 594</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLSYNC_ENABLE (_U_(0x1) &lt;&lt; OSCCTRL_DFLLSYNC_ENABLE_Pos)</span></div>
<div class="line"><a name="l00595"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#af1d1777c5fbac95e3e98d57d1d2a39a9"> 595</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLSYNC_DFLLCTRLB_Pos 2 </span></div>
<div class="line"><a name="l00596"></a><span class="lineno"> 596</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLSYNC_DFLLCTRLB (_U_(0x1) &lt;&lt; OSCCTRL_DFLLSYNC_DFLLCTRLB_Pos)</span></div>
<div class="line"><a name="l00597"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a07da10ead25b5789ea16707e059a24e8"> 597</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLSYNC_DFLLVAL_Pos 3 </span></div>
<div class="line"><a name="l00598"></a><span class="lineno"> 598</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLSYNC_DFLLVAL (_U_(0x1) &lt;&lt; OSCCTRL_DFLLSYNC_DFLLVAL_Pos)</span></div>
<div class="line"><a name="l00599"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a52e6dad6dbda589bfb0cbc57afe2e3fd"> 599</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLSYNC_DFLLMUL_Pos 4 </span></div>
<div class="line"><a name="l00600"></a><span class="lineno"> 600</span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLSYNC_DFLLMUL (_U_(0x1) &lt;&lt; OSCCTRL_DFLLSYNC_DFLLMUL_Pos)</span></div>
<div class="line"><a name="l00601"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#afd97d4fa228e779e98b8706cd34934c2"> 601</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DFLLSYNC_MASK _U_(0x1E) </span></div>
<div class="line"><a name="l00603"></a><span class="lineno"> 603</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- OSCCTRL_DPLLCTRLA : (OSCCTRL Offset: 0x30) (R/W 8) DPLL DPLL Control A -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00604"></a><span class="lineno"> 604</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00605"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLCTRLA__Type.html"> 605</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00606"></a><span class="lineno"> 606</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00607"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLCTRLA__Type.html#aa621c67f03335c7473f0d30b18240f52"> 607</a></span>&#160; uint8_t :1; </div>
<div class="line"><a name="l00608"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLCTRLA__Type.html#afd20cc3b0682fb47317bf3026c5d7939"> 608</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__DPLLCTRLA__Type.html#afd20cc3b0682fb47317bf3026c5d7939">ENABLE</a>:1; </div>
<div class="line"><a name="l00609"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLCTRLA__Type.html#ab5183772fda3e3e18960e3e46a59d335"> 609</a></span>&#160; uint8_t :4; </div>
<div class="line"><a name="l00610"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLCTRLA__Type.html#a0976ef34662dd01429e10a57aa9ddecd"> 610</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__DPLLCTRLA__Type.html#a0976ef34662dd01429e10a57aa9ddecd">RUNSTDBY</a>:1; </div>
<div class="line"><a name="l00611"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLCTRLA__Type.html#adff898038902f3c4e58646ea03d85baa"> 611</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__DPLLCTRLA__Type.html#adff898038902f3c4e58646ea03d85baa">ONDEMAND</a>:1; </div>
<div class="line"><a name="l00612"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLCTRLA__Type.html#a4111335060c11e8fc9c0288c88498576"> 612</a></span>&#160; } bit; </div>
<div class="line"><a name="l00613"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLCTRLA__Type.html#a7ecac92363f86e9786773b840dfdf60e"> 613</a></span>&#160; uint8_t <a class="code" href="unionOSCCTRL__DPLLCTRLA__Type.html#a7ecac92363f86e9786773b840dfdf60e">reg</a>; </div>
<div class="line"><a name="l00614"></a><span class="lineno"> 614</span>&#160;} <a class="code" href="unionOSCCTRL__DPLLCTRLA__Type.html">OSCCTRL_DPLLCTRLA_Type</a>;</div>
<div class="line"><a name="l00615"></a><span class="lineno"> 615</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00616"></a><span class="lineno"> 616</span>&#160; </div>
<div class="line"><a name="l00617"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a37a4733b04ee101902f2512b99059cd5"> 617</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLA_OFFSET 0x30 </span></div>
<div class="line"><a name="l00618"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a1753de286cb86ad6e147893f3413bd61"> 618</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLA_RESETVALUE _U_(0x80) </span></div>
<div class="line"><a name="l00620"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a0b469beaddd68ce9ea7fca6c05e9ada5"> 620</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLA_ENABLE_Pos 1 </span></div>
<div class="line"><a name="l00621"></a><span class="lineno"> 621</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLA_ENABLE (_U_(0x1) &lt;&lt; OSCCTRL_DPLLCTRLA_ENABLE_Pos)</span></div>
<div class="line"><a name="l00622"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#afef60db26a0859cab97dfc76903c6156"> 622</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLA_RUNSTDBY_Pos 6 </span></div>
<div class="line"><a name="l00623"></a><span class="lineno"> 623</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLA_RUNSTDBY (_U_(0x1) &lt;&lt; OSCCTRL_DPLLCTRLA_RUNSTDBY_Pos)</span></div>
<div class="line"><a name="l00624"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ad9e01b631ceb9a9cd32ae5bc6e0f0483"> 624</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLA_ONDEMAND_Pos 7 </span></div>
<div class="line"><a name="l00625"></a><span class="lineno"> 625</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLA_ONDEMAND (_U_(0x1) &lt;&lt; OSCCTRL_DPLLCTRLA_ONDEMAND_Pos)</span></div>
<div class="line"><a name="l00626"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ad1b1636763f7932da29230659b6f1482"> 626</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLA_MASK _U_(0xC2) </span></div>
<div class="line"><a name="l00628"></a><span class="lineno"> 628</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- OSCCTRL_DPLLRATIO : (OSCCTRL Offset: 0x34) (R/W 32) DPLL DPLL Ratio Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00629"></a><span class="lineno"> 629</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00630"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLRATIO__Type.html"> 630</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00631"></a><span class="lineno"> 631</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00632"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLRATIO__Type.html#a944904ee3e32c3f797efade57712548d"> 632</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DPLLRATIO__Type.html#a944904ee3e32c3f797efade57712548d">LDR</a>:13; </div>
<div class="line"><a name="l00633"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLRATIO__Type.html#a75586bc4e0ffc6ee744879284b6d150b"> 633</a></span>&#160; uint32_t :3; </div>
<div class="line"><a name="l00634"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLRATIO__Type.html#a4be4a53e3e873744e880b775b1059e98"> 634</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DPLLRATIO__Type.html#a4be4a53e3e873744e880b775b1059e98">LDRFRAC</a>:5; </div>
<div class="line"><a name="l00635"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLRATIO__Type.html#a923e59413e6d61016e7dcc722b9afb1e"> 635</a></span>&#160; uint32_t :11; </div>
<div class="line"><a name="l00636"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLRATIO__Type.html#af5837445d0e12c8ee90f82463a427564"> 636</a></span>&#160; } bit; </div>
<div class="line"><a name="l00637"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLRATIO__Type.html#a6102603a8d85e6c5892535988ada81e6"> 637</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DPLLRATIO__Type.html#a6102603a8d85e6c5892535988ada81e6">reg</a>; </div>
<div class="line"><a name="l00638"></a><span class="lineno"> 638</span>&#160;} <a class="code" href="unionOSCCTRL__DPLLRATIO__Type.html">OSCCTRL_DPLLRATIO_Type</a>;</div>
<div class="line"><a name="l00639"></a><span class="lineno"> 639</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00640"></a><span class="lineno"> 640</span>&#160; </div>
<div class="line"><a name="l00641"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a60bf82218bf0deb9cc9cfcc05db4f5ee"> 641</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLRATIO_OFFSET 0x34 </span></div>
<div class="line"><a name="l00642"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a0644b362777fc4bd26ff3be75521a753"> 642</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLRATIO_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00644"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a8eca3bc229c889cd3d3779dc929c643f"> 644</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLRATIO_LDR_Pos 0 </span></div>
<div class="line"><a name="l00645"></a><span class="lineno"> 645</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLRATIO_LDR_Msk (_U_(0x1FFF) &lt;&lt; OSCCTRL_DPLLRATIO_LDR_Pos)</span></div>
<div class="line"><a name="l00646"></a><span class="lineno"> 646</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLRATIO_LDR(value) (OSCCTRL_DPLLRATIO_LDR_Msk &amp; ((value) &lt;&lt; OSCCTRL_DPLLRATIO_LDR_Pos))</span></div>
<div class="line"><a name="l00647"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#aef38c55c07d00397f447987ed0bc9bcc"> 647</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLRATIO_LDRFRAC_Pos 16 </span></div>
<div class="line"><a name="l00648"></a><span class="lineno"> 648</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLRATIO_LDRFRAC_Msk (_U_(0x1F) &lt;&lt; OSCCTRL_DPLLRATIO_LDRFRAC_Pos)</span></div>
<div class="line"><a name="l00649"></a><span class="lineno"> 649</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLRATIO_LDRFRAC(value) (OSCCTRL_DPLLRATIO_LDRFRAC_Msk &amp; ((value) &lt;&lt; OSCCTRL_DPLLRATIO_LDRFRAC_Pos))</span></div>
<div class="line"><a name="l00650"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a2f63ccd4be69ce0228fea5b36f5759c8"> 650</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLRATIO_MASK _U_(0x001F1FFF) </span></div>
<div class="line"><a name="l00652"></a><span class="lineno"> 652</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- OSCCTRL_DPLLCTRLB : (OSCCTRL Offset: 0x38) (R/W 32) DPLL DPLL Control B -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00653"></a><span class="lineno"> 653</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00654"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLCTRLB__Type.html"> 654</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00655"></a><span class="lineno"> 655</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00656"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLCTRLB__Type.html#a2e84f542968a325e76df1151d27f8136"> 656</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DPLLCTRLB__Type.html#a2e84f542968a325e76df1151d27f8136">FILTER</a>:4; </div>
<div class="line"><a name="l00657"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLCTRLB__Type.html#a713199f045639957242168693bb983f0"> 657</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DPLLCTRLB__Type.html#a713199f045639957242168693bb983f0">WUF</a>:1; </div>
<div class="line"><a name="l00658"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLCTRLB__Type.html#a3d23c8cdf08e9e55ca74a0a3b3982ab2"> 658</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DPLLCTRLB__Type.html#a3d23c8cdf08e9e55ca74a0a3b3982ab2">REFCLK</a>:3; </div>
<div class="line"><a name="l00659"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLCTRLB__Type.html#ad34f88eb6a301714b9ecbc6b8259c1d8"> 659</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DPLLCTRLB__Type.html#ad34f88eb6a301714b9ecbc6b8259c1d8">LTIME</a>:3; </div>
<div class="line"><a name="l00660"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLCTRLB__Type.html#a8437737759df6317fad5a28fc58b3148"> 660</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DPLLCTRLB__Type.html#a8437737759df6317fad5a28fc58b3148">LBYPASS</a>:1; </div>
<div class="line"><a name="l00661"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLCTRLB__Type.html#a3759cedc1c0f5cc5f627536ade0f2e48"> 661</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DPLLCTRLB__Type.html#a3759cedc1c0f5cc5f627536ade0f2e48">DCOFILTER</a>:3; </div>
<div class="line"><a name="l00662"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLCTRLB__Type.html#a73356040e5bd15931855988294b49b1a"> 662</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DPLLCTRLB__Type.html#a73356040e5bd15931855988294b49b1a">DCOEN</a>:1; </div>
<div class="line"><a name="l00663"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLCTRLB__Type.html#a5be496449839e9ec28890eb51c6c743f"> 663</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DPLLCTRLB__Type.html#a5be496449839e9ec28890eb51c6c743f">DIV</a>:11; </div>
<div class="line"><a name="l00664"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLCTRLB__Type.html#a2ca975f9fdb4c51957e81a49626e9cc3"> 664</a></span>&#160; uint32_t :5; </div>
<div class="line"><a name="l00665"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLCTRLB__Type.html#a00b8b50c6a8567508c56f13d61662ad3"> 665</a></span>&#160; } bit; </div>
<div class="line"><a name="l00666"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLCTRLB__Type.html#a89e9a957ce85e3f296126c51d49edd59"> 666</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DPLLCTRLB__Type.html#a89e9a957ce85e3f296126c51d49edd59">reg</a>; </div>
<div class="line"><a name="l00667"></a><span class="lineno"> 667</span>&#160;} <a class="code" href="unionOSCCTRL__DPLLCTRLB__Type.html">OSCCTRL_DPLLCTRLB_Type</a>;</div>
<div class="line"><a name="l00668"></a><span class="lineno"> 668</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00669"></a><span class="lineno"> 669</span>&#160; </div>
<div class="line"><a name="l00670"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a71dc4af9ba22fbd5c6aa3d5d371d9a59"> 670</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_OFFSET 0x38 </span></div>
<div class="line"><a name="l00671"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a49595cc57a3da5b0553aebc31760e7ca"> 671</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_RESETVALUE _U_(0x00000020) </span></div>
<div class="line"><a name="l00673"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a8df5368ebb5161543ef658da3a849a5e"> 673</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_FILTER_Pos 0 </span></div>
<div class="line"><a name="l00674"></a><span class="lineno"> 674</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_FILTER_Msk (_U_(0xF) &lt;&lt; OSCCTRL_DPLLCTRLB_FILTER_Pos)</span></div>
<div class="line"><a name="l00675"></a><span class="lineno"> 675</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_FILTER(value) (OSCCTRL_DPLLCTRLB_FILTER_Msk &amp; ((value) &lt;&lt; OSCCTRL_DPLLCTRLB_FILTER_Pos))</span></div>
<div class="line"><a name="l00676"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a93ec22d41bd1fbe0745a29b207d8691b"> 676</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_WUF_Pos 4 </span></div>
<div class="line"><a name="l00677"></a><span class="lineno"> 677</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_WUF (_U_(0x1) &lt;&lt; OSCCTRL_DPLLCTRLB_WUF_Pos)</span></div>
<div class="line"><a name="l00678"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ad0796705a34fa0f49ef3bd5384a9bcb7"> 678</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_REFCLK_Pos 5 </span></div>
<div class="line"><a name="l00679"></a><span class="lineno"> 679</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_REFCLK_Msk (_U_(0x7) &lt;&lt; OSCCTRL_DPLLCTRLB_REFCLK_Pos)</span></div>
<div class="line"><a name="l00680"></a><span class="lineno"> 680</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_REFCLK(value) (OSCCTRL_DPLLCTRLB_REFCLK_Msk &amp; ((value) &lt;&lt; OSCCTRL_DPLLCTRLB_REFCLK_Pos))</span></div>
<div class="line"><a name="l00681"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a38354933951893dbb52e7e27cb9f1dac"> 681</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_REFCLK_GCLK_Val _U_(0x0) </span></div>
<div class="line"><a name="l00682"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a4a987808375b88b41ddff5932c8f81e5"> 682</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_REFCLK_XOSC32_Val _U_(0x1) </span></div>
<div class="line"><a name="l00683"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ae7a65d1ec10c7884fc767e29df247358"> 683</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_REFCLK_XOSC0_Val _U_(0x2) </span></div>
<div class="line"><a name="l00684"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a9736f8eba0ea7cb54ca311a8066a2949"> 684</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_REFCLK_XOSC1_Val _U_(0x3) </span></div>
<div class="line"><a name="l00685"></a><span class="lineno"> 685</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_REFCLK_GCLK (OSCCTRL_DPLLCTRLB_REFCLK_GCLK_Val &lt;&lt; OSCCTRL_DPLLCTRLB_REFCLK_Pos)</span></div>
<div class="line"><a name="l00686"></a><span class="lineno"> 686</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_REFCLK_XOSC32 (OSCCTRL_DPLLCTRLB_REFCLK_XOSC32_Val &lt;&lt; OSCCTRL_DPLLCTRLB_REFCLK_Pos)</span></div>
<div class="line"><a name="l00687"></a><span class="lineno"> 687</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_REFCLK_XOSC0 (OSCCTRL_DPLLCTRLB_REFCLK_XOSC0_Val &lt;&lt; OSCCTRL_DPLLCTRLB_REFCLK_Pos)</span></div>
<div class="line"><a name="l00688"></a><span class="lineno"> 688</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_REFCLK_XOSC1 (OSCCTRL_DPLLCTRLB_REFCLK_XOSC1_Val &lt;&lt; OSCCTRL_DPLLCTRLB_REFCLK_Pos)</span></div>
<div class="line"><a name="l00689"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a548d60cb7bc67169f8aae58e9172405d"> 689</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_LTIME_Pos 8 </span></div>
<div class="line"><a name="l00690"></a><span class="lineno"> 690</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_LTIME_Msk (_U_(0x7) &lt;&lt; OSCCTRL_DPLLCTRLB_LTIME_Pos)</span></div>
<div class="line"><a name="l00691"></a><span class="lineno"> 691</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_LTIME(value) (OSCCTRL_DPLLCTRLB_LTIME_Msk &amp; ((value) &lt;&lt; OSCCTRL_DPLLCTRLB_LTIME_Pos))</span></div>
<div class="line"><a name="l00692"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a8ddcaa2262fb02d4d166efb6cab6cdce"> 692</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_LTIME_DEFAULT_Val _U_(0x0) </span></div>
<div class="line"><a name="l00693"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a77761eb0e9f20588023d1685f2fed4c7"> 693</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_LTIME_800US_Val _U_(0x4) </span></div>
<div class="line"><a name="l00694"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ac0731b39348d76cc048e022643f81e7a"> 694</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_LTIME_900US_Val _U_(0x5) </span></div>
<div class="line"><a name="l00695"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#acdf2a38bd236df0c88dc690bcb92f0af"> 695</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_LTIME_1MS_Val _U_(0x6) </span></div>
<div class="line"><a name="l00696"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a042bd49e50a351e297ce6d85b74d5c97"> 696</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_LTIME_1P1MS_Val _U_(0x7) </span></div>
<div class="line"><a name="l00697"></a><span class="lineno"> 697</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_LTIME_DEFAULT (OSCCTRL_DPLLCTRLB_LTIME_DEFAULT_Val &lt;&lt; OSCCTRL_DPLLCTRLB_LTIME_Pos)</span></div>
<div class="line"><a name="l00698"></a><span class="lineno"> 698</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_LTIME_800US (OSCCTRL_DPLLCTRLB_LTIME_800US_Val &lt;&lt; OSCCTRL_DPLLCTRLB_LTIME_Pos)</span></div>
<div class="line"><a name="l00699"></a><span class="lineno"> 699</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_LTIME_900US (OSCCTRL_DPLLCTRLB_LTIME_900US_Val &lt;&lt; OSCCTRL_DPLLCTRLB_LTIME_Pos)</span></div>
<div class="line"><a name="l00700"></a><span class="lineno"> 700</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_LTIME_1MS (OSCCTRL_DPLLCTRLB_LTIME_1MS_Val &lt;&lt; OSCCTRL_DPLLCTRLB_LTIME_Pos)</span></div>
<div class="line"><a name="l00701"></a><span class="lineno"> 701</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_LTIME_1P1MS (OSCCTRL_DPLLCTRLB_LTIME_1P1MS_Val &lt;&lt; OSCCTRL_DPLLCTRLB_LTIME_Pos)</span></div>
<div class="line"><a name="l00702"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a7ea92e3e4b6ef826bbdc4b861343472d"> 702</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_LBYPASS_Pos 11 </span></div>
<div class="line"><a name="l00703"></a><span class="lineno"> 703</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_LBYPASS (_U_(0x1) &lt;&lt; OSCCTRL_DPLLCTRLB_LBYPASS_Pos)</span></div>
<div class="line"><a name="l00704"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ae9ed5ffff32ec37cf905e90bc0d6165a"> 704</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_DCOFILTER_Pos 12 </span></div>
<div class="line"><a name="l00705"></a><span class="lineno"> 705</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_DCOFILTER_Msk (_U_(0x7) &lt;&lt; OSCCTRL_DPLLCTRLB_DCOFILTER_Pos)</span></div>
<div class="line"><a name="l00706"></a><span class="lineno"> 706</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_DCOFILTER(value) (OSCCTRL_DPLLCTRLB_DCOFILTER_Msk &amp; ((value) &lt;&lt; OSCCTRL_DPLLCTRLB_DCOFILTER_Pos))</span></div>
<div class="line"><a name="l00707"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a2f1d7d6d5f218e9011e9e74c3073e74f"> 707</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_DCOEN_Pos 15 </span></div>
<div class="line"><a name="l00708"></a><span class="lineno"> 708</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_DCOEN (_U_(0x1) &lt;&lt; OSCCTRL_DPLLCTRLB_DCOEN_Pos)</span></div>
<div class="line"><a name="l00709"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a4be649bdf3f99bbda9c530dbfadd27ef"> 709</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_DIV_Pos 16 </span></div>
<div class="line"><a name="l00710"></a><span class="lineno"> 710</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_DIV_Msk (_U_(0x7FF) &lt;&lt; OSCCTRL_DPLLCTRLB_DIV_Pos)</span></div>
<div class="line"><a name="l00711"></a><span class="lineno"> 711</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_DIV(value) (OSCCTRL_DPLLCTRLB_DIV_Msk &amp; ((value) &lt;&lt; OSCCTRL_DPLLCTRLB_DIV_Pos))</span></div>
<div class="line"><a name="l00712"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a05fc8d7b773b1d682b972d9f4101001d"> 712</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLCTRLB_MASK _U_(0x07FFFFFF) </span></div>
<div class="line"><a name="l00714"></a><span class="lineno"> 714</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- OSCCTRL_DPLLSYNCBUSY : (OSCCTRL Offset: 0x3C) (R/ 32) DPLL DPLL Synchronization Busy -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00715"></a><span class="lineno"> 715</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00716"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLSYNCBUSY__Type.html"> 716</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00717"></a><span class="lineno"> 717</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00718"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLSYNCBUSY__Type.html#a1c452577a4da7e8f453589a31744315b"> 718</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00719"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLSYNCBUSY__Type.html#ac1333d553ef07abfb43ad31b8ae836c4"> 719</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DPLLSYNCBUSY__Type.html#ac1333d553ef07abfb43ad31b8ae836c4">ENABLE</a>:1; </div>
<div class="line"><a name="l00720"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLSYNCBUSY__Type.html#a718a4d3ef6a9e73bb2987980aeb9524f"> 720</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DPLLSYNCBUSY__Type.html#a718a4d3ef6a9e73bb2987980aeb9524f">DPLLRATIO</a>:1; </div>
<div class="line"><a name="l00721"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLSYNCBUSY__Type.html#ad572784d24b6088d1276ecd08e51f3c3"> 721</a></span>&#160; uint32_t :29; </div>
<div class="line"><a name="l00722"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLSYNCBUSY__Type.html#a1a62e22ec7d2b11e78485fd96f6211a1"> 722</a></span>&#160; } bit; </div>
<div class="line"><a name="l00723"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLSYNCBUSY__Type.html#a7d2da4b7c785e0d6e920bf5fea08eb32"> 723</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DPLLSYNCBUSY__Type.html#a7d2da4b7c785e0d6e920bf5fea08eb32">reg</a>; </div>
<div class="line"><a name="l00724"></a><span class="lineno"> 724</span>&#160;} <a class="code" href="unionOSCCTRL__DPLLSYNCBUSY__Type.html">OSCCTRL_DPLLSYNCBUSY_Type</a>;</div>
<div class="line"><a name="l00725"></a><span class="lineno"> 725</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00726"></a><span class="lineno"> 726</span>&#160; </div>
<div class="line"><a name="l00727"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a2c5a41f1265f4fa368dd76a5e906a6ff"> 727</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLSYNCBUSY_OFFSET 0x3C </span></div>
<div class="line"><a name="l00728"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ad7e00f58be72dd69d9a2115fbe2d08bf"> 728</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLSYNCBUSY_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00730"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a54af50bfcb6024fc8f7bb09d075c76af"> 730</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLSYNCBUSY_ENABLE_Pos 1 </span></div>
<div class="line"><a name="l00731"></a><span class="lineno"> 731</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLSYNCBUSY_ENABLE (_U_(0x1) &lt;&lt; OSCCTRL_DPLLSYNCBUSY_ENABLE_Pos)</span></div>
<div class="line"><a name="l00732"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#ab2f0bc0ad59bccd246390ccd8886542d"> 732</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLSYNCBUSY_DPLLRATIO_Pos 2 </span></div>
<div class="line"><a name="l00733"></a><span class="lineno"> 733</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLSYNCBUSY_DPLLRATIO (_U_(0x1) &lt;&lt; OSCCTRL_DPLLSYNCBUSY_DPLLRATIO_Pos)</span></div>
<div class="line"><a name="l00734"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#afbce2b9bec1e87b9116643abd7b77d6b"> 734</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLSYNCBUSY_MASK _U_(0x00000006) </span></div>
<div class="line"><a name="l00736"></a><span class="lineno"> 736</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- OSCCTRL_DPLLSTATUS : (OSCCTRL Offset: 0x40) (R/ 32) DPLL DPLL Status -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00737"></a><span class="lineno"> 737</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00738"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLSTATUS__Type.html"> 738</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00739"></a><span class="lineno"> 739</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00740"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLSTATUS__Type.html#af5f426c6336b83fedaaa8b196c81617d"> 740</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DPLLSTATUS__Type.html#af5f426c6336b83fedaaa8b196c81617d">LOCK</a>:1; </div>
<div class="line"><a name="l00741"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLSTATUS__Type.html#ad97aef188b7856fcb4a3dc3d7801b92c"> 741</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DPLLSTATUS__Type.html#ad97aef188b7856fcb4a3dc3d7801b92c">CLKRDY</a>:1; </div>
<div class="line"><a name="l00742"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLSTATUS__Type.html#a2fbce7b322b00badc3b6ca2370283767"> 742</a></span>&#160; uint32_t :30; </div>
<div class="line"><a name="l00743"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLSTATUS__Type.html#a668835f6666759e73f0f795eca36c70c"> 743</a></span>&#160; } bit; </div>
<div class="line"><a name="l00744"></a><span class="lineno"><a class="line" href="unionOSCCTRL__DPLLSTATUS__Type.html#a07adf5c007afe05e47dd361f6226ddc6"> 744</a></span>&#160; uint32_t <a class="code" href="unionOSCCTRL__DPLLSTATUS__Type.html#a07adf5c007afe05e47dd361f6226ddc6">reg</a>; </div>
<div class="line"><a name="l00745"></a><span class="lineno"> 745</span>&#160;} <a class="code" href="unionOSCCTRL__DPLLSTATUS__Type.html">OSCCTRL_DPLLSTATUS_Type</a>;</div>
<div class="line"><a name="l00746"></a><span class="lineno"> 746</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00747"></a><span class="lineno"> 747</span>&#160; </div>
<div class="line"><a name="l00748"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a7187cfcdd8e6b42e88eff7617a051506"> 748</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLSTATUS_OFFSET 0x40 </span></div>
<div class="line"><a name="l00749"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a915e0da834493a69f9efaafc12a411d3"> 749</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLSTATUS_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00751"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a569aa091512f4853d45f9217287f49ee"> 751</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLSTATUS_LOCK_Pos 0 </span></div>
<div class="line"><a name="l00752"></a><span class="lineno"> 752</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLSTATUS_LOCK (_U_(0x1) &lt;&lt; OSCCTRL_DPLLSTATUS_LOCK_Pos)</span></div>
<div class="line"><a name="l00753"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a7050091daa0c7060570b8fb41a4396c7"> 753</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLSTATUS_CLKRDY_Pos 1 </span></div>
<div class="line"><a name="l00754"></a><span class="lineno"> 754</span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLSTATUS_CLKRDY (_U_(0x1) &lt;&lt; OSCCTRL_DPLLSTATUS_CLKRDY_Pos)</span></div>
<div class="line"><a name="l00755"></a><span class="lineno"><a class="line" href="component_2oscctrl_8h.html#a9594a8635037d6f6303db8bb1f9abede"> 755</a></span>&#160;<span class="preprocessor">#define OSCCTRL_DPLLSTATUS_MASK _U_(0x00000003) </span></div>
<div class="line"><a name="l00758"></a><span class="lineno"> 758</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00759"></a><span class="lineno"><a class="line" href="structOscctrlDpll.html"> 759</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00760"></a><span class="lineno"><a class="line" href="structOscctrlDpll.html#abcf1a25a3be1f40fd864723a908d94fc"> 760</a></span>&#160; __IO <a class="code" href="unionOSCCTRL__DPLLCTRLA__Type.html">OSCCTRL_DPLLCTRLA_Type</a> <a class="code" href="structOscctrlDpll.html#abcf1a25a3be1f40fd864723a908d94fc">DPLLCTRLA</a>; </div>
<div class="line"><a name="l00761"></a><span class="lineno"> 761</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved1[0x3];</div>
<div class="line"><a name="l00762"></a><span class="lineno"><a class="line" href="structOscctrlDpll.html#a927b7cc68a09013124bd6e75a18036fe"> 762</a></span>&#160; __IO <a class="code" href="unionOSCCTRL__DPLLRATIO__Type.html">OSCCTRL_DPLLRATIO_Type</a> <a class="code" href="structOscctrlDpll.html#a927b7cc68a09013124bd6e75a18036fe">DPLLRATIO</a>; </div>
<div class="line"><a name="l00763"></a><span class="lineno"><a class="line" href="structOscctrlDpll.html#aced92a08cb7459d7008309378121e673"> 763</a></span>&#160; __IO <a class="code" href="unionOSCCTRL__DPLLCTRLB__Type.html">OSCCTRL_DPLLCTRLB_Type</a> <a class="code" href="structOscctrlDpll.html#aced92a08cb7459d7008309378121e673">DPLLCTRLB</a>; </div>
<div class="line"><a name="l00764"></a><span class="lineno"><a class="line" href="structOscctrlDpll.html#ab10e65eef739e050ecde226adc98a2c5"> 764</a></span>&#160; __I <a class="code" href="unionOSCCTRL__DPLLSYNCBUSY__Type.html">OSCCTRL_DPLLSYNCBUSY_Type</a> <a class="code" href="structOscctrlDpll.html#ab10e65eef739e050ecde226adc98a2c5">DPLLSYNCBUSY</a>; </div>
<div class="line"><a name="l00765"></a><span class="lineno"><a class="line" href="structOscctrlDpll.html#aa135801aa9692f3ddaec87315d253c3e"> 765</a></span>&#160; __I <a class="code" href="unionOSCCTRL__DPLLSTATUS__Type.html">OSCCTRL_DPLLSTATUS_Type</a> <a class="code" href="structOscctrlDpll.html#aa135801aa9692f3ddaec87315d253c3e">DPLLSTATUS</a>; </div>
<div class="line"><a name="l00766"></a><span class="lineno"> 766</span>&#160;} <a class="code" href="structOscctrlDpll.html">OscctrlDpll</a>;</div>
<div class="line"><a name="l00767"></a><span class="lineno"> 767</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00768"></a><span class="lineno"> 768</span>&#160; </div>
<div class="line"><a name="l00770"></a><span class="lineno"> 770</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00771"></a><span class="lineno"><a class="line" href="structOscctrl.html"> 771</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00772"></a><span class="lineno"><a class="line" href="structOscctrl.html#a3d9a2ba0eb41137e7a5d0f73bfc7bdc8"> 772</a></span>&#160; __IO <a class="code" href="unionOSCCTRL__EVCTRL__Type.html">OSCCTRL_EVCTRL_Type</a> <a class="code" href="structOscctrl.html#a3d9a2ba0eb41137e7a5d0f73bfc7bdc8">EVCTRL</a>; </div>
<div class="line"><a name="l00773"></a><span class="lineno"> 773</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved1[0x3];</div>
<div class="line"><a name="l00774"></a><span class="lineno"><a class="line" href="structOscctrl.html#a6d860ddc7b53d096cb7c4f0e63053d3c"> 774</a></span>&#160; __IO <a class="code" href="unionOSCCTRL__INTENCLR__Type.html">OSCCTRL_INTENCLR_Type</a> <a class="code" href="structOscctrl.html#a6d860ddc7b53d096cb7c4f0e63053d3c">INTENCLR</a>; </div>
<div class="line"><a name="l00775"></a><span class="lineno"><a class="line" href="structOscctrl.html#a2574505371983e1f0a1228ec3e8f1d22"> 775</a></span>&#160; __IO <a class="code" href="unionOSCCTRL__INTENSET__Type.html">OSCCTRL_INTENSET_Type</a> <a class="code" href="structOscctrl.html#a2574505371983e1f0a1228ec3e8f1d22">INTENSET</a>; </div>
<div class="line"><a name="l00776"></a><span class="lineno"><a class="line" href="structOscctrl.html#aa1fcfa6ec9a636e85e721056268617fa"> 776</a></span>&#160; __IO <a class="code" href="unionOSCCTRL__INTFLAG__Type.html">OSCCTRL_INTFLAG_Type</a> <a class="code" href="structOscctrl.html#aa1fcfa6ec9a636e85e721056268617fa">INTFLAG</a>; </div>
<div class="line"><a name="l00777"></a><span class="lineno"><a class="line" href="structOscctrl.html#a4a7242dfd036f33a32da80313ad1bb01"> 777</a></span>&#160; __I <a class="code" href="unionOSCCTRL__STATUS__Type.html">OSCCTRL_STATUS_Type</a> <a class="code" href="structOscctrl.html#a4a7242dfd036f33a32da80313ad1bb01">STATUS</a>; </div>
<div class="line"><a name="l00778"></a><span class="lineno"><a class="line" href="structOscctrl.html#a577961ed982b57a5500ad4863171cb52"> 778</a></span>&#160; __IO <a class="code" href="unionOSCCTRL__XOSCCTRL__Type.html">OSCCTRL_XOSCCTRL_Type</a> XOSCCTRL[2]; </div>
<div class="line"><a name="l00779"></a><span class="lineno"><a class="line" href="structOscctrl.html#a991c8c7ca210b73cb9fc075f4bace8f3"> 779</a></span>&#160; __IO <a class="code" href="unionOSCCTRL__DFLLCTRLA__Type.html">OSCCTRL_DFLLCTRLA_Type</a> <a class="code" href="structOscctrl.html#a991c8c7ca210b73cb9fc075f4bace8f3">DFLLCTRLA</a>; </div>
<div class="line"><a name="l00780"></a><span class="lineno"> 780</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved2[0x3];</div>
<div class="line"><a name="l00781"></a><span class="lineno"><a class="line" href="structOscctrl.html#aac90d6fbc832e20c4e0a82993dc4a8bb"> 781</a></span>&#160; __IO <a class="code" href="unionOSCCTRL__DFLLCTRLB__Type.html">OSCCTRL_DFLLCTRLB_Type</a> <a class="code" href="structOscctrl.html#aac90d6fbc832e20c4e0a82993dc4a8bb">DFLLCTRLB</a>; </div>
<div class="line"><a name="l00782"></a><span class="lineno"> 782</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved3[0x3];</div>
<div class="line"><a name="l00783"></a><span class="lineno"><a class="line" href="structOscctrl.html#ac53609a01e9506a55b522270b056cfbd"> 783</a></span>&#160; __IO <a class="code" href="unionOSCCTRL__DFLLVAL__Type.html">OSCCTRL_DFLLVAL_Type</a> <a class="code" href="structOscctrl.html#ac53609a01e9506a55b522270b056cfbd">DFLLVAL</a>; </div>
<div class="line"><a name="l00784"></a><span class="lineno"><a class="line" href="structOscctrl.html#a6f5f5a94910b0097e158b10b409fe8fa"> 784</a></span>&#160; __IO <a class="code" href="unionOSCCTRL__DFLLMUL__Type.html">OSCCTRL_DFLLMUL_Type</a> <a class="code" href="structOscctrl.html#a6f5f5a94910b0097e158b10b409fe8fa">DFLLMUL</a>; </div>
<div class="line"><a name="l00785"></a><span class="lineno"><a class="line" href="structOscctrl.html#aa4857fc3c646f1118b8e0c22226b194d"> 785</a></span>&#160; __IO <a class="code" href="unionOSCCTRL__DFLLSYNC__Type.html">OSCCTRL_DFLLSYNC_Type</a> <a class="code" href="structOscctrl.html#aa4857fc3c646f1118b8e0c22226b194d">DFLLSYNC</a>; </div>
<div class="line"><a name="l00786"></a><span class="lineno"> 786</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved4[0x3];</div>
<div class="line"><a name="l00787"></a><span class="lineno"><a class="line" href="structOscctrl.html#a2a7ff599a3ed3884b51e6e5f54f1548b"> 787</a></span>&#160; <a class="code" href="structOscctrlDpll.html">OscctrlDpll</a> Dpll[2]; </div>
<div class="line"><a name="l00788"></a><span class="lineno"> 788</span>&#160;} <a class="code" href="structOscctrl.html">Oscctrl</a>;</div>
<div class="line"><a name="l00789"></a><span class="lineno"> 789</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00790"></a><span class="lineno"> 790</span>&#160; </div>
<div class="line"><a name="l00793"></a><span class="lineno"> 793</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_OSCCTRL_COMPONENT_ */</span><span class="preprocessor"></span></div>
</div><!-- fragment --></div><!-- contents -->
<div class="ttc" id="astructOscctrl_html_a6d860ddc7b53d096cb7c4f0e63053d3c"><div class="ttname"><a href="structOscctrl.html#a6d860ddc7b53d096cb7c4f0e63053d3c">Oscctrl::INTENCLR</a></div><div class="ttdeci">__IO OSCCTRL_INTENCLR_Type INTENCLR</div><div class="ttdoc">Offset: 0x04 (R/W 32) Interrupt Enable Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00774">oscctrl.h:774</a></div></div>
<div class="ttc" id="aunionOSCCTRL__STATUS__Type_html_a2592f44c470b144d03ee847ae7c0ccf2"><div class="ttname"><a href="unionOSCCTRL__STATUS__Type.html#a2592f44c470b144d03ee847ae7c0ccf2">OSCCTRL_STATUS_Type::DPLL0LCKR</a></div><div class="ttdeci">uint32_t DPLL0LCKR</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00327">oscctrl.h:327</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLMUL__Type_html_a3f59f93c097fdb2cde10a5e0998fb290"><div class="ttname"><a href="unionOSCCTRL__DFLLMUL__Type.html#a3f59f93c097fdb2cde10a5e0998fb290">OSCCTRL_DFLLMUL_Type::FSTEP</a></div><div class="ttdeci">uint32_t FSTEP</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00553">oscctrl.h:553</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLCTRLB__Type_html_ad2a934d461a2ee55bd3d5c0a97e7b3ae"><div class="ttname"><a href="unionOSCCTRL__DFLLCTRLB__Type.html#ad2a934d461a2ee55bd3d5c0a97e7b3ae">OSCCTRL_DFLLCTRLB_Type::USBCRM</a></div><div class="ttdeci">uint8_t USBCRM</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00490">oscctrl.h:490</a></div></div>
<div class="ttc" id="aunionOSCCTRL__STATUS__Type_html_a37450d3c901d5807273606f852ed0b9f"><div class="ttname"><a href="unionOSCCTRL__STATUS__Type.html#a37450d3c901d5807273606f852ed0b9f">OSCCTRL_STATUS_Type::DPLL1LCKR</a></div><div class="ttdeci">uint32_t DPLL1LCKR</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00332">oscctrl.h:332</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLCTRLB__Type_html_a5dab038e32ae993ae06c94f4efe066af"><div class="ttname"><a href="unionOSCCTRL__DFLLCTRLB__Type.html#a5dab038e32ae993ae06c94f4efe066af">OSCCTRL_DFLLCTRLB_Type::CCDIS</a></div><div class="ttdeci">uint8_t CCDIS</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00491">oscctrl.h:491</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENCLR__Type_html_abaebf4ff134c6dd06da0a9090ee7890e"><div class="ttname"><a href="unionOSCCTRL__INTENCLR__Type.html#abaebf4ff134c6dd06da0a9090ee7890e">OSCCTRL_INTENCLR_Type::DPLL0LCKF</a></div><div class="ttdeci">uint32_t DPLL0LCKF</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00086">oscctrl.h:86</a></div></div>
<div class="ttc" id="astructOscctrl_html_ac53609a01e9506a55b522270b056cfbd"><div class="ttname"><a href="structOscctrl.html#ac53609a01e9506a55b522270b056cfbd">Oscctrl::DFLLVAL</a></div><div class="ttdeci">__IO OSCCTRL_DFLLVAL_Type DFLLVAL</div><div class="ttdoc">Offset: 0x24 (R/W 32) DFLL48M Value.</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00783">oscctrl.h:783</a></div></div>
<div class="ttc" id="aunionOSCCTRL__XOSCCTRL__Type_html_acefa9517b4e52222122938816db59191"><div class="ttname"><a href="unionOSCCTRL__XOSCCTRL__Type.html#acefa9517b4e52222122938816db59191">OSCCTRL_XOSCCTRL_Type::CFDEN</a></div><div class="ttdeci">uint32_t CFDEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00414">oscctrl.h:414</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTFLAG__Type_html_a17a1ab1b1e3e5a1f1753e82de38409fc"><div class="ttname"><a href="unionOSCCTRL__INTFLAG__Type.html#a17a1ab1b1e3e5a1f1753e82de38409fc">OSCCTRL_INTFLAG_Type::DPLL1LCKR</a></div><div class="ttdeci">__I uint32_t DPLL1LCKR</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00250">oscctrl.h:250</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLVAL__Type_html_a4a3e33bbc911591455e56f8cbc5573ea"><div class="ttname"><a href="unionOSCCTRL__DFLLVAL__Type.html#a4a3e33bbc911591455e56f8cbc5573ea">OSCCTRL_DFLLVAL_Type::FINE</a></div><div class="ttdeci">uint32_t FINE</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00525">oscctrl.h:525</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLCTRLB__Type_html_a713199f045639957242168693bb983f0"><div class="ttname"><a href="unionOSCCTRL__DPLLCTRLB__Type.html#a713199f045639957242168693bb983f0">OSCCTRL_DPLLCTRLB_Type::WUF</a></div><div class="ttdeci">uint32_t WUF</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00657">oscctrl.h:657</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENCLR__Type_html_ab1d93f2a0558e732e176ec45d71a7c19"><div class="ttname"><a href="unionOSCCTRL__INTENCLR__Type.html#ab1d93f2a0558e732e176ec45d71a7c19">OSCCTRL_INTENCLR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00101">oscctrl.h:101</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLCTRLA__Type_html_a27554c0ef44111f899436cda6223c905"><div class="ttname"><a href="unionOSCCTRL__DFLLCTRLA__Type.html#a27554c0ef44111f899436cda6223c905">OSCCTRL_DFLLCTRLA_Type::ONDEMAND</a></div><div class="ttdeci">uint8_t ONDEMAND</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00466">oscctrl.h:466</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLVAL__Type_html"><div class="ttname"><a href="unionOSCCTRL__DFLLVAL__Type.html">OSCCTRL_DFLLVAL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00523">oscctrl.h:523</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLMUL__Type_html"><div class="ttname"><a href="unionOSCCTRL__DFLLMUL__Type.html">OSCCTRL_DFLLMUL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00550">oscctrl.h:550</a></div></div>
<div class="ttc" id="aunionOSCCTRL__XOSCCTRL__Type_html_a848823d3318e26ed33879c4dc9b866f4"><div class="ttname"><a href="unionOSCCTRL__XOSCCTRL__Type.html#a848823d3318e26ed33879c4dc9b866f4">OSCCTRL_XOSCCTRL_Type::CFDPRESC</a></div><div class="ttdeci">uint32_t CFDPRESC</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00418">oscctrl.h:418</a></div></div>
<div class="ttc" id="aunionOSCCTRL__STATUS__Type_html_ad30454ec3e0f4f3160009a0cb37ba252"><div class="ttname"><a href="unionOSCCTRL__STATUS__Type.html#ad30454ec3e0f4f3160009a0cb37ba252">OSCCTRL_STATUS_Type::DPLL1LCKF</a></div><div class="ttdeci">uint32_t DPLL1LCKF</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00333">oscctrl.h:333</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTFLAG__Type_html_a937ddc40158d711b2c941a730b7fb6f9"><div class="ttname"><a href="unionOSCCTRL__INTFLAG__Type.html#a937ddc40158d711b2c941a730b7fb6f9">OSCCTRL_INTFLAG_Type::DFLLRCS</a></div><div class="ttdeci">__I uint32_t DFLLRCS</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00243">oscctrl.h:243</a></div></div>
<div class="ttc" id="aunionOSCCTRL__XOSCCTRL__Type_html_ab8cdf810de0695387a1d769842443f78"><div class="ttname"><a href="unionOSCCTRL__XOSCCTRL__Type.html#ab8cdf810de0695387a1d769842443f78">OSCCTRL_XOSCCTRL_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00421">oscctrl.h:421</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENCLR__Type_html_adcee657c1a35d0166637be5cbfbd29fa"><div class="ttname"><a href="unionOSCCTRL__INTENCLR__Type.html#adcee657c1a35d0166637be5cbfbd29fa">OSCCTRL_INTENCLR_Type::DPLL1LCKF</a></div><div class="ttdeci">uint32_t DPLL1LCKF</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00091">oscctrl.h:91</a></div></div>
<div class="ttc" id="astructOscctrlDpll_html_abcf1a25a3be1f40fd864723a908d94fc"><div class="ttname"><a href="structOscctrlDpll.html#abcf1a25a3be1f40fd864723a908d94fc">OscctrlDpll::DPLLCTRLA</a></div><div class="ttdeci">__IO OSCCTRL_DPLLCTRLA_Type DPLLCTRLA</div><div class="ttdoc">Offset: 0x00 (R/W 8) DPLL Control A.</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00760">oscctrl.h:760</a></div></div>
<div class="ttc" id="astructOscctrl_html_aac90d6fbc832e20c4e0a82993dc4a8bb"><div class="ttname"><a href="structOscctrl.html#aac90d6fbc832e20c4e0a82993dc4a8bb">Oscctrl::DFLLCTRLB</a></div><div class="ttdeci">__IO OSCCTRL_DFLLCTRLB_Type DFLLCTRLB</div><div class="ttdoc">Offset: 0x20 (R/W 8) DFLL48M Control B.</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00781">oscctrl.h:781</a></div></div>
<div class="ttc" id="aunionOSCCTRL__XOSCCTRL__Type_html_a7393bb3f95de24198a1b8a0779ffa435"><div class="ttname"><a href="unionOSCCTRL__XOSCCTRL__Type.html#a7393bb3f95de24198a1b8a0779ffa435">OSCCTRL_XOSCCTRL_Type::SWBEN</a></div><div class="ttdeci">uint32_t SWBEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00415">oscctrl.h:415</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLCTRLA__Type_html_a4d81d3df677e45b781748b52f04dc541"><div class="ttname"><a href="unionOSCCTRL__DFLLCTRLA__Type.html#a4d81d3df677e45b781748b52f04dc541">OSCCTRL_DFLLCTRLA_Type::ENABLE</a></div><div class="ttdeci">uint8_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00463">oscctrl.h:463</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLCTRLA__Type_html_a1251603fa61d0ceb8eb071748e45df7e"><div class="ttname"><a href="unionOSCCTRL__DFLLCTRLA__Type.html#a1251603fa61d0ceb8eb071748e45df7e">OSCCTRL_DFLLCTRLA_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00468">oscctrl.h:468</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENSET__Type_html_a6a9e6f7186a0c9cccb72c29ef41a34d0"><div class="ttname"><a href="unionOSCCTRL__INTENSET__Type.html#a6a9e6f7186a0c9cccb72c29ef41a34d0">OSCCTRL_INTENSET_Type::XOSCRDY</a></div><div class="ttdeci">uint32_t XOSCRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00177">oscctrl.h:177</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENCLR__Type_html_a5224e287e09c188309367ebfd9e26a28"><div class="ttname"><a href="unionOSCCTRL__INTENCLR__Type.html#a5224e287e09c188309367ebfd9e26a28">OSCCTRL_INTENCLR_Type::XOSCFAIL1</a></div><div class="ttdeci">uint32_t XOSCFAIL1</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00077">oscctrl.h:77</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLCTRLB__Type_html_a3759cedc1c0f5cc5f627536ade0f2e48"><div class="ttname"><a href="unionOSCCTRL__DPLLCTRLB__Type.html#a3759cedc1c0f5cc5f627536ade0f2e48">OSCCTRL_DPLLCTRLB_Type::DCOFILTER</a></div><div class="ttdeci">uint32_t DCOFILTER</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00661">oscctrl.h:661</a></div></div>
<div class="ttc" id="aunionOSCCTRL__STATUS__Type_html_af98a3646534ecfd9af96c4b0cff719d2"><div class="ttname"><a href="unionOSCCTRL__STATUS__Type.html#af98a3646534ecfd9af96c4b0cff719d2">OSCCTRL_STATUS_Type::DPLL0LDRTO</a></div><div class="ttdeci">uint32_t DPLL0LDRTO</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00330">oscctrl.h:330</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENSET__Type_html_a2e1e2576894b3447bc5b4dc3337cc611"><div class="ttname"><a href="unionOSCCTRL__INTENSET__Type.html#a2e1e2576894b3447bc5b4dc3337cc611">OSCCTRL_INTENSET_Type::DFLLRCS</a></div><div class="ttdeci">uint32_t DFLLRCS</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00163">oscctrl.h:163</a></div></div>
<div class="ttc" id="aunionOSCCTRL__XOSCCTRL__Type_html_afd9cb159dfb70f9f6719438541152b7d"><div class="ttname"><a href="unionOSCCTRL__XOSCCTRL__Type.html#afd9cb159dfb70f9f6719438541152b7d">OSCCTRL_XOSCCTRL_Type::LOWBUFGAIN</a></div><div class="ttdeci">uint32_t LOWBUFGAIN</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00410">oscctrl.h:410</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLCTRLB__Type_html_a3d23c8cdf08e9e55ca74a0a3b3982ab2"><div class="ttname"><a href="unionOSCCTRL__DPLLCTRLB__Type.html#a3d23c8cdf08e9e55ca74a0a3b3982ab2">OSCCTRL_DPLLCTRLB_Type::REFCLK</a></div><div class="ttdeci">uint32_t REFCLK</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00658">oscctrl.h:658</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENSET__Type_html_a0b1e8d91cae3805b0b59247bcc496e24"><div class="ttname"><a href="unionOSCCTRL__INTENSET__Type.html#a0b1e8d91cae3805b0b59247bcc496e24">OSCCTRL_INTENSET_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00181">oscctrl.h:181</a></div></div>
<div class="ttc" id="aunionOSCCTRL__XOSCCTRL__Type_html_a1e3ace5434334137bc6c2ac01ab68eaf"><div class="ttname"><a href="unionOSCCTRL__XOSCCTRL__Type.html#a1e3ace5434334137bc6c2ac01ab68eaf">OSCCTRL_XOSCCTRL_Type::RUNSTDBY</a></div><div class="ttdeci">uint32_t RUNSTDBY</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00408">oscctrl.h:408</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLCTRLB__Type_html_a7cd38d47492f6354562ae737c68cc70c"><div class="ttname"><a href="unionOSCCTRL__DFLLCTRLB__Type.html#a7cd38d47492f6354562ae737c68cc70c">OSCCTRL_DFLLCTRLB_Type::BPLCKC</a></div><div class="ttdeci">uint8_t BPLCKC</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00493">oscctrl.h:493</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENSET__Type_html_a4181721e6610df2760b735ae5c6a5956"><div class="ttname"><a href="unionOSCCTRL__INTENSET__Type.html#a4181721e6610df2760b735ae5c6a5956">OSCCTRL_INTENSET_Type::DFLLRDY</a></div><div class="ttdeci">uint32_t DFLLRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00159">oscctrl.h:159</a></div></div>
<div class="ttc" id="aunionOSCCTRL__STATUS__Type_html_ac6b7d164516a988e7e51ba5c7603fedb"><div class="ttname"><a href="unionOSCCTRL__STATUS__Type.html#ac6b7d164516a988e7e51ba5c7603fedb">OSCCTRL_STATUS_Type::DPLL0LCKF</a></div><div class="ttdeci">uint32_t DPLL0LCKF</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00328">oscctrl.h:328</a></div></div>
<div class="ttc" id="aunionOSCCTRL__XOSCCTRL__Type_html_aacccad495320a503c3284c681fd96c4f"><div class="ttname"><a href="unionOSCCTRL__XOSCCTRL__Type.html#aacccad495320a503c3284c681fd96c4f">OSCCTRL_XOSCCTRL_Type::ENABLE</a></div><div class="ttdeci">uint32_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00405">oscctrl.h:405</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENSET__Type_html_ab3489c4e2b39b65dd31b685f0fbf611e"><div class="ttname"><a href="unionOSCCTRL__INTENSET__Type.html#ab3489c4e2b39b65dd31b685f0fbf611e">OSCCTRL_INTENSET_Type::DPLL1LCKR</a></div><div class="ttdeci">uint32_t DPLL1LCKR</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00170">oscctrl.h:170</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLSYNC__Type_html"><div class="ttname"><a href="unionOSCCTRL__DFLLSYNC__Type.html">OSCCTRL_DFLLSYNC_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00577">oscctrl.h:577</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENSET__Type_html_a720fa315e2bc651f6e771a295f5029fb"><div class="ttname"><a href="unionOSCCTRL__INTENSET__Type.html#a720fa315e2bc651f6e771a295f5029fb">OSCCTRL_INTENSET_Type::DPLL0LCKF</a></div><div class="ttdeci">uint32_t DPLL0LCKF</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00166">oscctrl.h:166</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENCLR__Type_html_aaff0efc05c9f1df91bfde49befea5cd1"><div class="ttname"><a href="unionOSCCTRL__INTENCLR__Type.html#aaff0efc05c9f1df91bfde49befea5cd1">OSCCTRL_INTENCLR_Type::DPLL1LDRTO</a></div><div class="ttdeci">uint32_t DPLL1LDRTO</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00093">oscctrl.h:93</a></div></div>
<div class="ttc" id="aunionOSCCTRL__STATUS__Type_html_a37cc8061e04947f9b758b10c14daa9c4"><div class="ttname"><a href="unionOSCCTRL__STATUS__Type.html#a37cc8061e04947f9b758b10c14daa9c4">OSCCTRL_STATUS_Type::DFLLLCKC</a></div><div class="ttdeci">uint32_t DFLLLCKC</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00324">oscctrl.h:324</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLSYNCBUSY__Type_html"><div class="ttname"><a href="unionOSCCTRL__DPLLSYNCBUSY__Type.html">OSCCTRL_DPLLSYNCBUSY_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00716">oscctrl.h:716</a></div></div>
<div class="ttc" id="aunionOSCCTRL__STATUS__Type_html"><div class="ttname"><a href="unionOSCCTRL__STATUS__Type.html">OSCCTRL_STATUS_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00312">oscctrl.h:312</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENCLR__Type_html_ac59316fca9150469fe6d4109903c94ff"><div class="ttname"><a href="unionOSCCTRL__INTENCLR__Type.html#ac59316fca9150469fe6d4109903c94ff">OSCCTRL_INTENCLR_Type::DPLL0LTO</a></div><div class="ttdeci">uint32_t DPLL0LTO</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00087">oscctrl.h:87</a></div></div>
<div class="ttc" id="aunionOSCCTRL__EVCTRL__Type_html_a63acd217865e80f211c7a9e96ea9e79a"><div class="ttname"><a href="unionOSCCTRL__EVCTRL__Type.html#a63acd217865e80f211c7a9e96ea9e79a">OSCCTRL_EVCTRL_Type::CFDEO</a></div><div class="ttdeci">uint8_t CFDEO</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00051">oscctrl.h:51</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLCTRLA__Type_html_ab362598814969667425f62150877cc3a"><div class="ttname"><a href="unionOSCCTRL__DFLLCTRLA__Type.html#ab362598814969667425f62150877cc3a">OSCCTRL_DFLLCTRLA_Type::RUNSTDBY</a></div><div class="ttdeci">uint8_t RUNSTDBY</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00465">oscctrl.h:465</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENSET__Type_html_ab7a319ff078e076c61cdd594c6b20601"><div class="ttname"><a href="unionOSCCTRL__INTENSET__Type.html#ab7a319ff078e076c61cdd594c6b20601">OSCCTRL_INTENSET_Type::XOSCFAIL1</a></div><div class="ttdeci">uint32_t XOSCFAIL1</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00157">oscctrl.h:157</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLCTRLB__Type_html_a89e9a957ce85e3f296126c51d49edd59"><div class="ttname"><a href="unionOSCCTRL__DPLLCTRLB__Type.html#a89e9a957ce85e3f296126c51d49edd59">OSCCTRL_DPLLCTRLB_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00666">oscctrl.h:666</a></div></div>
<div class="ttc" id="astructOscctrlDpll_html_a927b7cc68a09013124bd6e75a18036fe"><div class="ttname"><a href="structOscctrlDpll.html#a927b7cc68a09013124bd6e75a18036fe">OscctrlDpll::DPLLRATIO</a></div><div class="ttdeci">__IO OSCCTRL_DPLLRATIO_Type DPLLRATIO</div><div class="ttdoc">Offset: 0x04 (R/W 32) DPLL Ratio Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00762">oscctrl.h:762</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENCLR__Type_html_af9d070f1875249315f8744e6021538be"><div class="ttname"><a href="unionOSCCTRL__INTENCLR__Type.html#af9d070f1875249315f8744e6021538be">OSCCTRL_INTENCLR_Type::DFLLLCKC</a></div><div class="ttdeci">uint32_t DFLLLCKC</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00082">oscctrl.h:82</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLSYNC__Type_html_a6415782df7d30d3f81b46329c25b4deb"><div class="ttname"><a href="unionOSCCTRL__DFLLSYNC__Type.html#a6415782df7d30d3f81b46329c25b4deb">OSCCTRL_DFLLSYNC_Type::DFLLVAL</a></div><div class="ttdeci">uint8_t DFLLVAL</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00582">oscctrl.h:582</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTFLAG__Type_html"><div class="ttname"><a href="unionOSCCTRL__INTFLAG__Type.html">OSCCTRL_INTFLAG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00232">oscctrl.h:232</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENSET__Type_html_a121f44a9fe620b3438acc78c129da26b"><div class="ttname"><a href="unionOSCCTRL__INTENSET__Type.html#a121f44a9fe620b3438acc78c129da26b">OSCCTRL_INTENSET_Type::XOSCFAIL0</a></div><div class="ttdeci">uint32_t XOSCFAIL0</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00156">oscctrl.h:156</a></div></div>
<div class="ttc" id="astructOscctrlDpll_html"><div class="ttname"><a href="structOscctrlDpll.html">OscctrlDpll</a></div><div class="ttdoc">OscctrlDpll hardware registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00759">oscctrl.h:759</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLCTRLB__Type_html_ad34f88eb6a301714b9ecbc6b8259c1d8"><div class="ttname"><a href="unionOSCCTRL__DPLLCTRLB__Type.html#ad34f88eb6a301714b9ecbc6b8259c1d8">OSCCTRL_DPLLCTRLB_Type::LTIME</a></div><div class="ttdeci">uint32_t LTIME</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00659">oscctrl.h:659</a></div></div>
<div class="ttc" id="astructOscctrl_html_a6f5f5a94910b0097e158b10b409fe8fa"><div class="ttname"><a href="structOscctrl.html#a6f5f5a94910b0097e158b10b409fe8fa">Oscctrl::DFLLMUL</a></div><div class="ttdeci">__IO OSCCTRL_DFLLMUL_Type DFLLMUL</div><div class="ttdoc">Offset: 0x28 (R/W 32) DFLL48M Multiplier.</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00784">oscctrl.h:784</a></div></div>
<div class="ttc" id="astructOscctrl_html_aa4857fc3c646f1118b8e0c22226b194d"><div class="ttname"><a href="structOscctrl.html#aa4857fc3c646f1118b8e0c22226b194d">Oscctrl::DFLLSYNC</a></div><div class="ttdeci">__IO OSCCTRL_DFLLSYNC_Type DFLLSYNC</div><div class="ttdoc">Offset: 0x2C (R/W 8) DFLL48M Synchronization.</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00785">oscctrl.h:785</a></div></div>
<div class="ttc" id="aunionOSCCTRL__STATUS__Type_html_af7d2b14082a98938b7ba8fde907f0bd8"><div class="ttname"><a href="unionOSCCTRL__STATUS__Type.html#af7d2b14082a98938b7ba8fde907f0bd8">OSCCTRL_STATUS_Type::XOSCCKSW1</a></div><div class="ttdeci">uint32_t XOSCCKSW1</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00319">oscctrl.h:319</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENSET__Type_html"><div class="ttname"><a href="unionOSCCTRL__INTENSET__Type.html">OSCCTRL_INTENSET_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00152">oscctrl.h:152</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLVAL__Type_html_ad83f60e1a33c2dda5440837142e285e4"><div class="ttname"><a href="unionOSCCTRL__DFLLVAL__Type.html#ad83f60e1a33c2dda5440837142e285e4">OSCCTRL_DFLLVAL_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00530">oscctrl.h:530</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLRATIO__Type_html_a944904ee3e32c3f797efade57712548d"><div class="ttname"><a href="unionOSCCTRL__DPLLRATIO__Type.html#a944904ee3e32c3f797efade57712548d">OSCCTRL_DPLLRATIO_Type::LDR</a></div><div class="ttdeci">uint32_t LDR</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00632">oscctrl.h:632</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLCTRLB__Type_html_a8437737759df6317fad5a28fc58b3148"><div class="ttname"><a href="unionOSCCTRL__DPLLCTRLB__Type.html#a8437737759df6317fad5a28fc58b3148">OSCCTRL_DPLLCTRLB_Type::LBYPASS</a></div><div class="ttdeci">uint32_t LBYPASS</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00660">oscctrl.h:660</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLMUL__Type_html_afa6e917f44c41de5764b6ff8283bebeb"><div class="ttname"><a href="unionOSCCTRL__DFLLMUL__Type.html#afa6e917f44c41de5764b6ff8283bebeb">OSCCTRL_DFLLMUL_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00557">oscctrl.h:557</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLRATIO__Type_html_a6102603a8d85e6c5892535988ada81e6"><div class="ttname"><a href="unionOSCCTRL__DPLLRATIO__Type.html#a6102603a8d85e6c5892535988ada81e6">OSCCTRL_DPLLRATIO_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00637">oscctrl.h:637</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLCTRLA__Type_html"><div class="ttname"><a href="unionOSCCTRL__DFLLCTRLA__Type.html">OSCCTRL_DFLLCTRLA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00460">oscctrl.h:460</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLCTRLA__Type_html_a0976ef34662dd01429e10a57aa9ddecd"><div class="ttname"><a href="unionOSCCTRL__DPLLCTRLA__Type.html#a0976ef34662dd01429e10a57aa9ddecd">OSCCTRL_DPLLCTRLA_Type::RUNSTDBY</a></div><div class="ttdeci">uint8_t RUNSTDBY</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00610">oscctrl.h:610</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLSTATUS__Type_html"><div class="ttname"><a href="unionOSCCTRL__DPLLSTATUS__Type.html">OSCCTRL_DPLLSTATUS_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00738">oscctrl.h:738</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLCTRLB__Type_html_a2e84f542968a325e76df1151d27f8136"><div class="ttname"><a href="unionOSCCTRL__DPLLCTRLB__Type.html#a2e84f542968a325e76df1151d27f8136">OSCCTRL_DPLLCTRLB_Type::FILTER</a></div><div class="ttdeci">uint32_t FILTER</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00656">oscctrl.h:656</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLCTRLB__Type_html_ad2268dcb386b9cc38f17a8620edee43f"><div class="ttname"><a href="unionOSCCTRL__DFLLCTRLB__Type.html#ad2268dcb386b9cc38f17a8620edee43f">OSCCTRL_DFLLCTRLB_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00496">oscctrl.h:496</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLCTRLB__Type_html_a5be496449839e9ec28890eb51c6c743f"><div class="ttname"><a href="unionOSCCTRL__DPLLCTRLB__Type.html#a5be496449839e9ec28890eb51c6c743f">OSCCTRL_DPLLCTRLB_Type::DIV</a></div><div class="ttdeci">uint32_t DIV</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00663">oscctrl.h:663</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENSET__Type_html_a6094cb6330e9a14afdde52b6ecfdd151"><div class="ttname"><a href="unionOSCCTRL__INTENSET__Type.html#a6094cb6330e9a14afdde52b6ecfdd151">OSCCTRL_INTENSET_Type::DPLL1LTO</a></div><div class="ttdeci">uint32_t DPLL1LTO</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00172">oscctrl.h:172</a></div></div>
<div class="ttc" id="aunionOSCCTRL__STATUS__Type_html_ad706612175f501423b9a6732925e2b11"><div class="ttname"><a href="unionOSCCTRL__STATUS__Type.html#ad706612175f501423b9a6732925e2b11">OSCCTRL_STATUS_Type::DFLLRDY</a></div><div class="ttdeci">uint32_t DFLLRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00321">oscctrl.h:321</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLSYNC__Type_html_ac57da81dbc31fef20633943489f76036"><div class="ttname"><a href="unionOSCCTRL__DFLLSYNC__Type.html#ac57da81dbc31fef20633943489f76036">OSCCTRL_DFLLSYNC_Type::DFLLCTRLB</a></div><div class="ttdeci">uint8_t DFLLCTRLB</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00581">oscctrl.h:581</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLSYNCBUSY__Type_html_a7d2da4b7c785e0d6e920bf5fea08eb32"><div class="ttname"><a href="unionOSCCTRL__DPLLSYNCBUSY__Type.html#a7d2da4b7c785e0d6e920bf5fea08eb32">OSCCTRL_DPLLSYNCBUSY_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00723">oscctrl.h:723</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTFLAG__Type_html_a001e7aeaac46f99535681cc2dc55c96d"><div class="ttname"><a href="unionOSCCTRL__INTFLAG__Type.html#a001e7aeaac46f99535681cc2dc55c96d">OSCCTRL_INTFLAG_Type::DPLL1LDRTO</a></div><div class="ttdeci">__I uint32_t DPLL1LDRTO</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00253">oscctrl.h:253</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLSTATUS__Type_html_a07adf5c007afe05e47dd361f6226ddc6"><div class="ttname"><a href="unionOSCCTRL__DPLLSTATUS__Type.html#a07adf5c007afe05e47dd361f6226ddc6">OSCCTRL_DPLLSTATUS_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00744">oscctrl.h:744</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLCTRLB__Type_html"><div class="ttname"><a href="unionOSCCTRL__DFLLCTRLB__Type.html">OSCCTRL_DFLLCTRLB_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00485">oscctrl.h:485</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLSYNCBUSY__Type_html_ac1333d553ef07abfb43ad31b8ae836c4"><div class="ttname"><a href="unionOSCCTRL__DPLLSYNCBUSY__Type.html#ac1333d553ef07abfb43ad31b8ae836c4">OSCCTRL_DPLLSYNCBUSY_Type::ENABLE</a></div><div class="ttdeci">uint32_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00719">oscctrl.h:719</a></div></div>
<div class="ttc" id="astructOscctrl_html_a4a7242dfd036f33a32da80313ad1bb01"><div class="ttname"><a href="structOscctrl.html#a4a7242dfd036f33a32da80313ad1bb01">Oscctrl::STATUS</a></div><div class="ttdeci">__I OSCCTRL_STATUS_Type STATUS</div><div class="ttdoc">Offset: 0x10 (R/ 32) Status.</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00777">oscctrl.h:777</a></div></div>
<div class="ttc" id="aunionOSCCTRL__XOSCCTRL__Type_html_af726f4f599c44488d80aa672f5dcb816"><div class="ttname"><a href="unionOSCCTRL__XOSCCTRL__Type.html#af726f4f599c44488d80aa672f5dcb816">OSCCTRL_XOSCCTRL_Type::ENALC</a></div><div class="ttdeci">uint32_t ENALC</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00413">oscctrl.h:413</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENCLR__Type_html_ac33f3685a88f18fbc9a3b76aa0d671c5"><div class="ttname"><a href="unionOSCCTRL__INTENCLR__Type.html#ac33f3685a88f18fbc9a3b76aa0d671c5">OSCCTRL_INTENCLR_Type::DPLL0LDRTO</a></div><div class="ttdeci">uint32_t DPLL0LDRTO</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00088">oscctrl.h:88</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENCLR__Type_html_ab52d80544ea8e1912690c3396997c3b8"><div class="ttname"><a href="unionOSCCTRL__INTENCLR__Type.html#ab52d80544ea8e1912690c3396997c3b8">OSCCTRL_INTENCLR_Type::DFLLLCKF</a></div><div class="ttdeci">uint32_t DFLLLCKF</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00081">oscctrl.h:81</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTFLAG__Type_html_accee9f2f26d4d155996e9c43a286e596"><div class="ttname"><a href="unionOSCCTRL__INTFLAG__Type.html#accee9f2f26d4d155996e9c43a286e596">OSCCTRL_INTFLAG_Type::DFLLLCKC</a></div><div class="ttdeci">__I uint32_t DFLLLCKC</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00242">oscctrl.h:242</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTFLAG__Type_html_a0063ac5d3a3b75713d0dd44b2538032a"><div class="ttname"><a href="unionOSCCTRL__INTFLAG__Type.html#a0063ac5d3a3b75713d0dd44b2538032a">OSCCTRL_INTFLAG_Type::XOSCFAIL1</a></div><div class="ttdeci">__I uint32_t XOSCFAIL1</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00237">oscctrl.h:237</a></div></div>
<div class="ttc" id="aunionOSCCTRL__XOSCCTRL__Type_html"><div class="ttname"><a href="unionOSCCTRL__XOSCCTRL__Type.html">OSCCTRL_XOSCCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00402">oscctrl.h:402</a></div></div>
<div class="ttc" id="aunionOSCCTRL__EVCTRL__Type_html_ad64bf4ba3ba7564bb1352fb154a125e6"><div class="ttname"><a href="unionOSCCTRL__EVCTRL__Type.html#ad64bf4ba3ba7564bb1352fb154a125e6">OSCCTRL_EVCTRL_Type::CFDEO0</a></div><div class="ttdeci">uint8_t CFDEO0</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00046">oscctrl.h:46</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTFLAG__Type_html_a05cc8cb989ca459a66226f06ce051d87"><div class="ttname"><a href="unionOSCCTRL__INTFLAG__Type.html#a05cc8cb989ca459a66226f06ce051d87">OSCCTRL_INTFLAG_Type::DPLL0LTO</a></div><div class="ttdeci">__I uint32_t DPLL0LTO</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00247">oscctrl.h:247</a></div></div>
<div class="ttc" id="aunionOSCCTRL__STATUS__Type_html_af1e646898d06d5e94d51c3f787c6ba89"><div class="ttname"><a href="unionOSCCTRL__STATUS__Type.html#af1e646898d06d5e94d51c3f787c6ba89">OSCCTRL_STATUS_Type::XOSCCKSW</a></div><div class="ttdeci">uint32_t XOSCCKSW</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00341">oscctrl.h:341</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLMUL__Type_html_a2b0e3b0c09f38fe671c7083fc558cfc4"><div class="ttname"><a href="unionOSCCTRL__DFLLMUL__Type.html#a2b0e3b0c09f38fe671c7083fc558cfc4">OSCCTRL_DFLLMUL_Type::CSTEP</a></div><div class="ttdeci">uint32_t CSTEP</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00555">oscctrl.h:555</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLVAL__Type_html_a644f3f85ff3190995d1b9c2e207dd0bb"><div class="ttname"><a href="unionOSCCTRL__DFLLVAL__Type.html#a644f3f85ff3190995d1b9c2e207dd0bb">OSCCTRL_DFLLVAL_Type::DIFF</a></div><div class="ttdeci">uint32_t DIFF</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00528">oscctrl.h:528</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLCTRLB__Type_html_ad073fa411491617af1aac6d332e32a01"><div class="ttname"><a href="unionOSCCTRL__DFLLCTRLB__Type.html#ad073fa411491617af1aac6d332e32a01">OSCCTRL_DFLLCTRLB_Type::MODE</a></div><div class="ttdeci">uint8_t MODE</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00487">oscctrl.h:487</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENSET__Type_html_a48f12382dd5a95f0d6a8bbd5ebc317a7"><div class="ttname"><a href="unionOSCCTRL__INTENSET__Type.html#a48f12382dd5a95f0d6a8bbd5ebc317a7">OSCCTRL_INTENSET_Type::DPLL1LCKF</a></div><div class="ttdeci">uint32_t DPLL1LCKF</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00171">oscctrl.h:171</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLRATIO__Type_html"><div class="ttname"><a href="unionOSCCTRL__DPLLRATIO__Type.html">OSCCTRL_DPLLRATIO_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00630">oscctrl.h:630</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTFLAG__Type_html_a279f8b6cd3dcece4885e650fd51040fb"><div class="ttname"><a href="unionOSCCTRL__INTFLAG__Type.html#a279f8b6cd3dcece4885e650fd51040fb">OSCCTRL_INTFLAG_Type::DPLL1LTO</a></div><div class="ttdeci">__I uint32_t DPLL1LTO</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00252">oscctrl.h:252</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENCLR__Type_html_a34cec95ff6b7f5a9b286f98f2bd44fae"><div class="ttname"><a href="unionOSCCTRL__INTENCLR__Type.html#a34cec95ff6b7f5a9b286f98f2bd44fae">OSCCTRL_INTENCLR_Type::DFLLRCS</a></div><div class="ttdeci">uint32_t DFLLRCS</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00083">oscctrl.h:83</a></div></div>
<div class="ttc" id="aunionOSCCTRL__XOSCCTRL__Type_html_a2d32f6073ca0dc88ed49c6a33ac670c7"><div class="ttname"><a href="unionOSCCTRL__XOSCCTRL__Type.html#a2d32f6073ca0dc88ed49c6a33ac670c7">OSCCTRL_XOSCCTRL_Type::IMULT</a></div><div class="ttdeci">uint32_t IMULT</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00412">oscctrl.h:412</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLCTRLA__Type_html_a7ecac92363f86e9786773b840dfdf60e"><div class="ttname"><a href="unionOSCCTRL__DPLLCTRLA__Type.html#a7ecac92363f86e9786773b840dfdf60e">OSCCTRL_DPLLCTRLA_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00613">oscctrl.h:613</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENSET__Type_html_a26be62fcd8e136534c702bd60e6211ce"><div class="ttname"><a href="unionOSCCTRL__INTENSET__Type.html#a26be62fcd8e136534c702bd60e6211ce">OSCCTRL_INTENSET_Type::DFLLLCKF</a></div><div class="ttdeci">uint32_t DFLLLCKF</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00161">oscctrl.h:161</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLSTATUS__Type_html_ad97aef188b7856fcb4a3dc3d7801b92c"><div class="ttname"><a href="unionOSCCTRL__DPLLSTATUS__Type.html#ad97aef188b7856fcb4a3dc3d7801b92c">OSCCTRL_DPLLSTATUS_Type::CLKRDY</a></div><div class="ttdeci">uint32_t CLKRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00741">oscctrl.h:741</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTFLAG__Type_html_adc4f2b29be8ff185857cc7397b07ab0a"><div class="ttname"><a href="unionOSCCTRL__INTFLAG__Type.html#adc4f2b29be8ff185857cc7397b07ab0a">OSCCTRL_INTFLAG_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00261">oscctrl.h:261</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENCLR__Type_html_ab0ed8c9af4a8f8fafed8c53d859c05e9"><div class="ttname"><a href="unionOSCCTRL__INTENCLR__Type.html#ab0ed8c9af4a8f8fafed8c53d859c05e9">OSCCTRL_INTENCLR_Type::DPLL0LCKR</a></div><div class="ttdeci">uint32_t DPLL0LCKR</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00085">oscctrl.h:85</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENSET__Type_html_a7922512485e5c79228856bb01598e81a"><div class="ttname"><a href="unionOSCCTRL__INTENSET__Type.html#a7922512485e5c79228856bb01598e81a">OSCCTRL_INTENSET_Type::DFLLOOB</a></div><div class="ttdeci">uint32_t DFLLOOB</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00160">oscctrl.h:160</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLCTRLB__Type_html_ad0a1e5bfed4cf31a29a2118558a69df3"><div class="ttname"><a href="unionOSCCTRL__DFLLCTRLB__Type.html#ad0a1e5bfed4cf31a29a2118558a69df3">OSCCTRL_DFLLCTRLB_Type::LLAW</a></div><div class="ttdeci">uint8_t LLAW</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00489">oscctrl.h:489</a></div></div>
<div class="ttc" id="aunionOSCCTRL__EVCTRL__Type_html_a3b0bfb04912a1de90d522bc0b7da547b"><div class="ttname"><a href="unionOSCCTRL__EVCTRL__Type.html#a3b0bfb04912a1de90d522bc0b7da547b">OSCCTRL_EVCTRL_Type::CFDEO1</a></div><div class="ttdeci">uint8_t CFDEO1</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00047">oscctrl.h:47</a></div></div>
<div class="ttc" id="aunionOSCCTRL__STATUS__Type_html_ab25844e82a178ce32c9d0224b885ba05"><div class="ttname"><a href="unionOSCCTRL__STATUS__Type.html#ab25844e82a178ce32c9d0224b885ba05">OSCCTRL_STATUS_Type::XOSCRDY1</a></div><div class="ttdeci">uint32_t XOSCRDY1</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00315">oscctrl.h:315</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENSET__Type_html_a98d8021fb7eae9aebbef635cef53c38b"><div class="ttname"><a href="unionOSCCTRL__INTENSET__Type.html#a98d8021fb7eae9aebbef635cef53c38b">OSCCTRL_INTENSET_Type::XOSCRDY1</a></div><div class="ttdeci">uint32_t XOSCRDY1</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00155">oscctrl.h:155</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENCLR__Type_html"><div class="ttname"><a href="unionOSCCTRL__INTENCLR__Type.html">OSCCTRL_INTENCLR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00072">oscctrl.h:72</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLCTRLB__Type_html_a471e12cb3293cc861e26065e2889f9b3"><div class="ttname"><a href="unionOSCCTRL__DFLLCTRLB__Type.html#a471e12cb3293cc861e26065e2889f9b3">OSCCTRL_DFLLCTRLB_Type::WAITLOCK</a></div><div class="ttdeci">uint8_t WAITLOCK</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00494">oscctrl.h:494</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLSYNC__Type_html_aba4561fcac0b7fc275a6e96032497f76"><div class="ttname"><a href="unionOSCCTRL__DFLLSYNC__Type.html#aba4561fcac0b7fc275a6e96032497f76">OSCCTRL_DFLLSYNC_Type::DFLLMUL</a></div><div class="ttdeci">uint8_t DFLLMUL</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00583">oscctrl.h:583</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTFLAG__Type_html_aa1dd36257438b9fa6459ae7ae3043c71"><div class="ttname"><a href="unionOSCCTRL__INTFLAG__Type.html#aa1dd36257438b9fa6459ae7ae3043c71">OSCCTRL_INTFLAG_Type::DPLL0LCKF</a></div><div class="ttdeci">__I uint32_t DPLL0LCKF</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00246">oscctrl.h:246</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLCTRLB__Type_html_aa787aa634559f07d4dc349caf779015a"><div class="ttname"><a href="unionOSCCTRL__DFLLCTRLB__Type.html#aa787aa634559f07d4dc349caf779015a">OSCCTRL_DFLLCTRLB_Type::STABLE</a></div><div class="ttdeci">uint8_t STABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00488">oscctrl.h:488</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTFLAG__Type_html_ab90cc5ec95673930cbba74d659868935"><div class="ttname"><a href="unionOSCCTRL__INTFLAG__Type.html#ab90cc5ec95673930cbba74d659868935">OSCCTRL_INTFLAG_Type::uint32_t</a></div><div class="ttdeci">__I uint32_t</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00238">oscctrl.h:238</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENCLR__Type_html_a412dea9c72ccbff0bf10d55de1870189"><div class="ttname"><a href="unionOSCCTRL__INTENCLR__Type.html#a412dea9c72ccbff0bf10d55de1870189">OSCCTRL_INTENCLR_Type::DPLL1LTO</a></div><div class="ttdeci">uint32_t DPLL1LTO</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00092">oscctrl.h:92</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTFLAG__Type_html_a72326f39f008158ada084c4e6c198492"><div class="ttname"><a href="unionOSCCTRL__INTFLAG__Type.html#a72326f39f008158ada084c4e6c198492">OSCCTRL_INTFLAG_Type::DFLLLCKF</a></div><div class="ttdeci">__I uint32_t DFLLLCKF</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00241">oscctrl.h:241</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTFLAG__Type_html_a85d16240f8ea8f26f1a41e946ce1ac81"><div class="ttname"><a href="unionOSCCTRL__INTFLAG__Type.html#a85d16240f8ea8f26f1a41e946ce1ac81">OSCCTRL_INTFLAG_Type::XOSCFAIL</a></div><div class="ttdeci">__I uint32_t XOSCFAIL</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00258">oscctrl.h:258</a></div></div>
<div class="ttc" id="aunionOSCCTRL__STATUS__Type_html_adfe0af65216839f5c24efdb3be8a2b91"><div class="ttname"><a href="unionOSCCTRL__STATUS__Type.html#adfe0af65216839f5c24efdb3be8a2b91">OSCCTRL_STATUS_Type::DPLL1LDRTO</a></div><div class="ttdeci">uint32_t DPLL1LDRTO</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00335">oscctrl.h:335</a></div></div>
<div class="ttc" id="astructOscctrl_html_a991c8c7ca210b73cb9fc075f4bace8f3"><div class="ttname"><a href="structOscctrl.html#a991c8c7ca210b73cb9fc075f4bace8f3">Oscctrl::DFLLCTRLA</a></div><div class="ttdeci">__IO OSCCTRL_DFLLCTRLA_Type DFLLCTRLA</div><div class="ttdoc">Offset: 0x1C (R/W 8) DFLL48M Control A.</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00779">oscctrl.h:779</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLSYNCBUSY__Type_html_a718a4d3ef6a9e73bb2987980aeb9524f"><div class="ttname"><a href="unionOSCCTRL__DPLLSYNCBUSY__Type.html#a718a4d3ef6a9e73bb2987980aeb9524f">OSCCTRL_DPLLSYNCBUSY_Type::DPLLRATIO</a></div><div class="ttdeci">uint32_t DPLLRATIO</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00720">oscctrl.h:720</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENCLR__Type_html_aa28c9249763c07e5cbdd43b3d9c37b38"><div class="ttname"><a href="unionOSCCTRL__INTENCLR__Type.html#aa28c9249763c07e5cbdd43b3d9c37b38">OSCCTRL_INTENCLR_Type::XOSCFAIL0</a></div><div class="ttdeci">uint32_t XOSCFAIL0</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00076">oscctrl.h:76</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLCTRLA__Type_html_afd20cc3b0682fb47317bf3026c5d7939"><div class="ttname"><a href="unionOSCCTRL__DPLLCTRLA__Type.html#afd20cc3b0682fb47317bf3026c5d7939">OSCCTRL_DPLLCTRLA_Type::ENABLE</a></div><div class="ttdeci">uint8_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00608">oscctrl.h:608</a></div></div>
<div class="ttc" id="aunionOSCCTRL__STATUS__Type_html_a4ae11ca07f98be94aaaa4f75ceb603cf"><div class="ttname"><a href="unionOSCCTRL__STATUS__Type.html#a4ae11ca07f98be94aaaa4f75ceb603cf">OSCCTRL_STATUS_Type::DPLL1TO</a></div><div class="ttdeci">uint32_t DPLL1TO</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00334">oscctrl.h:334</a></div></div>
<div class="ttc" id="astructOscctrl_html_a3d9a2ba0eb41137e7a5d0f73bfc7bdc8"><div class="ttname"><a href="structOscctrl.html#a3d9a2ba0eb41137e7a5d0f73bfc7bdc8">Oscctrl::EVCTRL</a></div><div class="ttdeci">__IO OSCCTRL_EVCTRL_Type EVCTRL</div><div class="ttdoc">Offset: 0x00 (R/W 8) Event Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00772">oscctrl.h:772</a></div></div>
<div class="ttc" id="aunionOSCCTRL__STATUS__Type_html_ac1e34654c04f05d976822db5886142a8"><div class="ttname"><a href="unionOSCCTRL__STATUS__Type.html#ac1e34654c04f05d976822db5886142a8">OSCCTRL_STATUS_Type::DPLL0TO</a></div><div class="ttdeci">uint32_t DPLL0TO</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00329">oscctrl.h:329</a></div></div>
<div class="ttc" id="aunionOSCCTRL__STATUS__Type_html_afe6c65dcb311854213e21a6ce299df40"><div class="ttname"><a href="unionOSCCTRL__STATUS__Type.html#afe6c65dcb311854213e21a6ce299df40">OSCCTRL_STATUS_Type::XOSCFAIL</a></div><div class="ttdeci">uint32_t XOSCFAIL</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00340">oscctrl.h:340</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENSET__Type_html_a3e8894ceeb8f60b463c15631a7e37678"><div class="ttname"><a href="unionOSCCTRL__INTENSET__Type.html#a3e8894ceeb8f60b463c15631a7e37678">OSCCTRL_INTENSET_Type::DFLLLCKC</a></div><div class="ttdeci">uint32_t DFLLLCKC</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00162">oscctrl.h:162</a></div></div>
<div class="ttc" id="aunionOSCCTRL__STATUS__Type_html_a7f57945eef41024236f573782cf94cd9"><div class="ttname"><a href="unionOSCCTRL__STATUS__Type.html#a7f57945eef41024236f573782cf94cd9">OSCCTRL_STATUS_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00344">oscctrl.h:344</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTFLAG__Type_html_adb2e69c6bb9c97ac4fe09705cf1cf753"><div class="ttname"><a href="unionOSCCTRL__INTFLAG__Type.html#adb2e69c6bb9c97ac4fe09705cf1cf753">OSCCTRL_INTFLAG_Type::XOSCRDY</a></div><div class="ttdeci">__I uint32_t XOSCRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00257">oscctrl.h:257</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLSTATUS__Type_html_af5f426c6336b83fedaaa8b196c81617d"><div class="ttname"><a href="unionOSCCTRL__DPLLSTATUS__Type.html#af5f426c6336b83fedaaa8b196c81617d">OSCCTRL_DPLLSTATUS_Type::LOCK</a></div><div class="ttdeci">uint32_t LOCK</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00740">oscctrl.h:740</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENSET__Type_html_a945688150d0615bee601f2ac66253fec"><div class="ttname"><a href="unionOSCCTRL__INTENSET__Type.html#a945688150d0615bee601f2ac66253fec">OSCCTRL_INTENSET_Type::DPLL0LCKR</a></div><div class="ttdeci">uint32_t DPLL0LCKR</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00165">oscctrl.h:165</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLCTRLA__Type_html_adff898038902f3c4e58646ea03d85baa"><div class="ttname"><a href="unionOSCCTRL__DPLLCTRLA__Type.html#adff898038902f3c4e58646ea03d85baa">OSCCTRL_DPLLCTRLA_Type::ONDEMAND</a></div><div class="ttdeci">uint8_t ONDEMAND</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00611">oscctrl.h:611</a></div></div>
<div class="ttc" id="aunionOSCCTRL__XOSCCTRL__Type_html_a566276e47e972aac7c872d07f6047a2a"><div class="ttname"><a href="unionOSCCTRL__XOSCCTRL__Type.html#a566276e47e972aac7c872d07f6047a2a">OSCCTRL_XOSCCTRL_Type::XTALEN</a></div><div class="ttdeci">uint32_t XTALEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00406">oscctrl.h:406</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENSET__Type_html_adac12ffa2859220a2faa02d1c9382aa4"><div class="ttname"><a href="unionOSCCTRL__INTENSET__Type.html#adac12ffa2859220a2faa02d1c9382aa4">OSCCTRL_INTENSET_Type::XOSCFAIL</a></div><div class="ttdeci">uint32_t XOSCFAIL</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00178">oscctrl.h:178</a></div></div>
<div class="ttc" id="astructOscctrlDpll_html_aced92a08cb7459d7008309378121e673"><div class="ttname"><a href="structOscctrlDpll.html#aced92a08cb7459d7008309378121e673">OscctrlDpll::DPLLCTRLB</a></div><div class="ttdeci">__IO OSCCTRL_DPLLCTRLB_Type DPLLCTRLB</div><div class="ttdoc">Offset: 0x08 (R/W 32) DPLL Control B.</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00763">oscctrl.h:763</a></div></div>
<div class="ttc" id="aunionOSCCTRL__XOSCCTRL__Type_html_a247826826182f9a007ed2ad6f9581884"><div class="ttname"><a href="unionOSCCTRL__XOSCCTRL__Type.html#a247826826182f9a007ed2ad6f9581884">OSCCTRL_XOSCCTRL_Type::IPTAT</a></div><div class="ttdeci">uint32_t IPTAT</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00411">oscctrl.h:411</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENSET__Type_html_adcc5a32b64b3255d0664219a3782ab41"><div class="ttname"><a href="unionOSCCTRL__INTENSET__Type.html#adcc5a32b64b3255d0664219a3782ab41">OSCCTRL_INTENSET_Type::DPLL0LTO</a></div><div class="ttdeci">uint32_t DPLL0LTO</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00167">oscctrl.h:167</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLSYNC__Type_html_a7f329d7b2b57f8c54d24509a1f36d83b"><div class="ttname"><a href="unionOSCCTRL__DFLLSYNC__Type.html#a7f329d7b2b57f8c54d24509a1f36d83b">OSCCTRL_DFLLSYNC_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00586">oscctrl.h:586</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLCTRLB__Type_html_aa1735531bdfbb47c2e39fc015dfe8dbc"><div class="ttname"><a href="unionOSCCTRL__DFLLCTRLB__Type.html#aa1735531bdfbb47c2e39fc015dfe8dbc">OSCCTRL_DFLLCTRLB_Type::QLDIS</a></div><div class="ttdeci">uint8_t QLDIS</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00492">oscctrl.h:492</a></div></div>
<div class="ttc" id="aunionOSCCTRL__STATUS__Type_html_ab52174f8813587e77c7b155b13893f6f"><div class="ttname"><a href="unionOSCCTRL__STATUS__Type.html#ab52174f8813587e77c7b155b13893f6f">OSCCTRL_STATUS_Type::DFLLOOB</a></div><div class="ttdeci">uint32_t DFLLOOB</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00322">oscctrl.h:322</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLSYNC__Type_html_ac900889c9e8c92497bda954dea174e10"><div class="ttname"><a href="unionOSCCTRL__DFLLSYNC__Type.html#ac900889c9e8c92497bda954dea174e10">OSCCTRL_DFLLSYNC_Type::ENABLE</a></div><div class="ttdeci">uint8_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00580">oscctrl.h:580</a></div></div>
<div class="ttc" id="astructOscctrl_html"><div class="ttname"><a href="structOscctrl.html">Oscctrl</a></div><div class="ttdoc">OSCCTRL hardware registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00771">oscctrl.h:771</a></div></div>
<div class="ttc" id="aunionOSCCTRL__XOSCCTRL__Type_html_a64d0d3ea09001ce6bf21733670cb540c"><div class="ttname"><a href="unionOSCCTRL__XOSCCTRL__Type.html#a64d0d3ea09001ce6bf21733670cb540c">OSCCTRL_XOSCCTRL_Type::STARTUP</a></div><div class="ttdeci">uint32_t STARTUP</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00417">oscctrl.h:417</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLCTRLB__Type_html_a73356040e5bd15931855988294b49b1a"><div class="ttname"><a href="unionOSCCTRL__DPLLCTRLB__Type.html#a73356040e5bd15931855988294b49b1a">OSCCTRL_DPLLCTRLB_Type::DCOEN</a></div><div class="ttdeci">uint32_t DCOEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00662">oscctrl.h:662</a></div></div>
<div class="ttc" id="aunionOSCCTRL__EVCTRL__Type_html_af58c28631fd4f9449f0ca7ef85926cc8"><div class="ttname"><a href="unionOSCCTRL__EVCTRL__Type.html#af58c28631fd4f9449f0ca7ef85926cc8">OSCCTRL_EVCTRL_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00054">oscctrl.h:54</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLVAL__Type_html_a21ed729ac9c4bdc4f2a8df46d4df9c71"><div class="ttname"><a href="unionOSCCTRL__DFLLVAL__Type.html#a21ed729ac9c4bdc4f2a8df46d4df9c71">OSCCTRL_DFLLVAL_Type::COARSE</a></div><div class="ttdeci">uint32_t COARSE</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00527">oscctrl.h:527</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENCLR__Type_html_a05f4d2dfb629353679afb4360e8cc0f0"><div class="ttname"><a href="unionOSCCTRL__INTENCLR__Type.html#a05f4d2dfb629353679afb4360e8cc0f0">OSCCTRL_INTENCLR_Type::DFLLOOB</a></div><div class="ttdeci">uint32_t DFLLOOB</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00080">oscctrl.h:80</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENCLR__Type_html_ab1647145c80027477ebf862b48d7e5ea"><div class="ttname"><a href="unionOSCCTRL__INTENCLR__Type.html#ab1647145c80027477ebf862b48d7e5ea">OSCCTRL_INTENCLR_Type::DFLLRDY</a></div><div class="ttdeci">uint32_t DFLLRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00079">oscctrl.h:79</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENCLR__Type_html_a83e3925b2f9f8bc78eb9898a30fa70be"><div class="ttname"><a href="unionOSCCTRL__INTENCLR__Type.html#a83e3925b2f9f8bc78eb9898a30fa70be">OSCCTRL_INTENCLR_Type::XOSCRDY0</a></div><div class="ttdeci">uint32_t XOSCRDY0</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00074">oscctrl.h:74</a></div></div>
<div class="ttc" id="astructOscctrlDpll_html_aa135801aa9692f3ddaec87315d253c3e"><div class="ttname"><a href="structOscctrlDpll.html#aa135801aa9692f3ddaec87315d253c3e">OscctrlDpll::DPLLSTATUS</a></div><div class="ttdeci">__I OSCCTRL_DPLLSTATUS_Type DPLLSTATUS</div><div class="ttdoc">Offset: 0x10 (R/ 32) DPLL Status.</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00765">oscctrl.h:765</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLCTRLA__Type_html"><div class="ttname"><a href="unionOSCCTRL__DPLLCTRLA__Type.html">OSCCTRL_DPLLCTRLA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00605">oscctrl.h:605</a></div></div>
<div class="ttc" id="aunionOSCCTRL__STATUS__Type_html_adfa9d08fd48c3b92f49785ef3a265341"><div class="ttname"><a href="unionOSCCTRL__STATUS__Type.html#adfa9d08fd48c3b92f49785ef3a265341">OSCCTRL_STATUS_Type::DFLLLCKF</a></div><div class="ttdeci">uint32_t DFLLLCKF</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00323">oscctrl.h:323</a></div></div>
<div class="ttc" id="aunionOSCCTRL__STATUS__Type_html_a49840071342d9e8ccd0ba4fba33a8f9b"><div class="ttname"><a href="unionOSCCTRL__STATUS__Type.html#a49840071342d9e8ccd0ba4fba33a8f9b">OSCCTRL_STATUS_Type::DFLLRCS</a></div><div class="ttdeci">uint32_t DFLLRCS</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00325">oscctrl.h:325</a></div></div>
<div class="ttc" id="aunionOSCCTRL__STATUS__Type_html_a6a8833a682776284b2d4f74f7a657725"><div class="ttname"><a href="unionOSCCTRL__STATUS__Type.html#a6a8833a682776284b2d4f74f7a657725">OSCCTRL_STATUS_Type::XOSCRDY</a></div><div class="ttdeci">uint32_t XOSCRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00339">oscctrl.h:339</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTFLAG__Type_html_a151fc00e3dff0c56b52d83b85586ec9e"><div class="ttname"><a href="unionOSCCTRL__INTFLAG__Type.html#a151fc00e3dff0c56b52d83b85586ec9e">OSCCTRL_INTFLAG_Type::DPLL0LDRTO</a></div><div class="ttdeci">__I uint32_t DPLL0LDRTO</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00248">oscctrl.h:248</a></div></div>
<div class="ttc" id="asame54n19a_8h_html_a0d957f1433aaf5d70e4dc2b68288442d"><div class="ttname"><a href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a></div><div class="ttdeci">volatile const uint8_t RoReg8</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00053">same54n19a.h:53</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENCLR__Type_html_a9bcb9650050de7f3c8107c0652841f86"><div class="ttname"><a href="unionOSCCTRL__INTENCLR__Type.html#a9bcb9650050de7f3c8107c0652841f86">OSCCTRL_INTENCLR_Type::XOSCRDY1</a></div><div class="ttdeci">uint32_t XOSCRDY1</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00075">oscctrl.h:75</a></div></div>
<div class="ttc" id="astructOscctrlDpll_html_ab10e65eef739e050ecde226adc98a2c5"><div class="ttname"><a href="structOscctrlDpll.html#ab10e65eef739e050ecde226adc98a2c5">OscctrlDpll::DPLLSYNCBUSY</a></div><div class="ttdeci">__I OSCCTRL_DPLLSYNCBUSY_Type DPLLSYNCBUSY</div><div class="ttdoc">Offset: 0x0C (R/ 32) DPLL Synchronization Busy.</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00764">oscctrl.h:764</a></div></div>
<div class="ttc" id="astructOscctrl_html_a2574505371983e1f0a1228ec3e8f1d22"><div class="ttname"><a href="structOscctrl.html#a2574505371983e1f0a1228ec3e8f1d22">Oscctrl::INTENSET</a></div><div class="ttdeci">__IO OSCCTRL_INTENSET_Type INTENSET</div><div class="ttdoc">Offset: 0x08 (R/W 32) Interrupt Enable Set.</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00775">oscctrl.h:775</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENCLR__Type_html_a4cbab9b1056c66eb59af1acbb43a20c1"><div class="ttname"><a href="unionOSCCTRL__INTENCLR__Type.html#a4cbab9b1056c66eb59af1acbb43a20c1">OSCCTRL_INTENCLR_Type::XOSCRDY</a></div><div class="ttdeci">uint32_t XOSCRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00097">oscctrl.h:97</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENSET__Type_html_afe37798b768a6b61273987370b0cf50b"><div class="ttname"><a href="unionOSCCTRL__INTENSET__Type.html#afe37798b768a6b61273987370b0cf50b">OSCCTRL_INTENSET_Type::XOSCRDY0</a></div><div class="ttdeci">uint32_t XOSCRDY0</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00154">oscctrl.h:154</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTFLAG__Type_html_afa9a6a5cf8d36edd6086637b7d1d6418"><div class="ttname"><a href="unionOSCCTRL__INTFLAG__Type.html#afa9a6a5cf8d36edd6086637b7d1d6418">OSCCTRL_INTFLAG_Type::DFLLOOB</a></div><div class="ttdeci">__I uint32_t DFLLOOB</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00240">oscctrl.h:240</a></div></div>
<div class="ttc" id="aunionOSCCTRL__STATUS__Type_html_ae6e7dd767c526e42046323be1b78b88f"><div class="ttname"><a href="unionOSCCTRL__STATUS__Type.html#ae6e7dd767c526e42046323be1b78b88f">OSCCTRL_STATUS_Type::XOSCCKSW0</a></div><div class="ttdeci">uint32_t XOSCCKSW0</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00318">oscctrl.h:318</a></div></div>
<div class="ttc" id="aunionOSCCTRL__EVCTRL__Type_html"><div class="ttname"><a href="unionOSCCTRL__EVCTRL__Type.html">OSCCTRL_EVCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00044">oscctrl.h:44</a></div></div>
<div class="ttc" id="aunionOSCCTRL__STATUS__Type_html_af2caa57b9a6fca371d689c82c7ad86b6"><div class="ttname"><a href="unionOSCCTRL__STATUS__Type.html#af2caa57b9a6fca371d689c82c7ad86b6">OSCCTRL_STATUS_Type::XOSCFAIL0</a></div><div class="ttdeci">uint32_t XOSCFAIL0</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00316">oscctrl.h:316</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTFLAG__Type_html_af1065569eb44a91700a84b826b100948"><div class="ttname"><a href="unionOSCCTRL__INTFLAG__Type.html#af1065569eb44a91700a84b826b100948">OSCCTRL_INTFLAG_Type::DPLL0LCKR</a></div><div class="ttdeci">__I uint32_t DPLL0LCKR</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00245">oscctrl.h:245</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENSET__Type_html_a68bba136fa06d23a4965bde19b658964"><div class="ttname"><a href="unionOSCCTRL__INTENSET__Type.html#a68bba136fa06d23a4965bde19b658964">OSCCTRL_INTENSET_Type::DPLL0LDRTO</a></div><div class="ttdeci">uint32_t DPLL0LDRTO</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00168">oscctrl.h:168</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTFLAG__Type_html_aeec6a8e6477d6a099c2536b773f2edb2"><div class="ttname"><a href="unionOSCCTRL__INTFLAG__Type.html#aeec6a8e6477d6a099c2536b773f2edb2">OSCCTRL_INTFLAG_Type::DPLL1LCKF</a></div><div class="ttdeci">__I uint32_t DPLL1LCKF</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00251">oscctrl.h:251</a></div></div>
<div class="ttc" id="aunionOSCCTRL__STATUS__Type_html_a597c6190c85843d7bc38827d5ab6d010"><div class="ttname"><a href="unionOSCCTRL__STATUS__Type.html#a597c6190c85843d7bc38827d5ab6d010">OSCCTRL_STATUS_Type::XOSCRDY0</a></div><div class="ttdeci">uint32_t XOSCRDY0</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00314">oscctrl.h:314</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLCTRLB__Type_html"><div class="ttname"><a href="unionOSCCTRL__DPLLCTRLB__Type.html">OSCCTRL_DPLLCTRLB_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00654">oscctrl.h:654</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTFLAG__Type_html_ab063c9654a7b02ddeb767c24c8640509"><div class="ttname"><a href="unionOSCCTRL__INTFLAG__Type.html#ab063c9654a7b02ddeb767c24c8640509">OSCCTRL_INTFLAG_Type::XOSCRDY1</a></div><div class="ttdeci">__I uint32_t XOSCRDY1</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00235">oscctrl.h:235</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTFLAG__Type_html_a03d89324c5f32658e1f3be28d5a110c9"><div class="ttname"><a href="unionOSCCTRL__INTFLAG__Type.html#a03d89324c5f32658e1f3be28d5a110c9">OSCCTRL_INTFLAG_Type::DFLLRDY</a></div><div class="ttdeci">__I uint32_t DFLLRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00239">oscctrl.h:239</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENCLR__Type_html_a17f1434546a200a555a1cb20f9ebbc1c"><div class="ttname"><a href="unionOSCCTRL__INTENCLR__Type.html#a17f1434546a200a555a1cb20f9ebbc1c">OSCCTRL_INTENCLR_Type::XOSCFAIL</a></div><div class="ttdeci">uint32_t XOSCFAIL</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00098">oscctrl.h:98</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTFLAG__Type_html_a169e75c8282a413a27f6b6fdd18088d8"><div class="ttname"><a href="unionOSCCTRL__INTFLAG__Type.html#a169e75c8282a413a27f6b6fdd18088d8">OSCCTRL_INTFLAG_Type::XOSCRDY0</a></div><div class="ttdeci">__I uint32_t XOSCRDY0</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00234">oscctrl.h:234</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENCLR__Type_html_a1109b6c313558c507d3ac272b32b3c87"><div class="ttname"><a href="unionOSCCTRL__INTENCLR__Type.html#a1109b6c313558c507d3ac272b32b3c87">OSCCTRL_INTENCLR_Type::DPLL1LCKR</a></div><div class="ttdeci">uint32_t DPLL1LCKR</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00090">oscctrl.h:90</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTENSET__Type_html_a5f4abdb04e74ff74a4d2ecf6627c9f15"><div class="ttname"><a href="unionOSCCTRL__INTENSET__Type.html#a5f4abdb04e74ff74a4d2ecf6627c9f15">OSCCTRL_INTENSET_Type::DPLL1LDRTO</a></div><div class="ttdeci">uint32_t DPLL1LDRTO</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00173">oscctrl.h:173</a></div></div>
<div class="ttc" id="aunionOSCCTRL__STATUS__Type_html_a0ecff96e2007d9df24f6134f49aa1957"><div class="ttname"><a href="unionOSCCTRL__STATUS__Type.html#a0ecff96e2007d9df24f6134f49aa1957">OSCCTRL_STATUS_Type::XOSCFAIL1</a></div><div class="ttdeci">uint32_t XOSCFAIL1</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00317">oscctrl.h:317</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DPLLRATIO__Type_html_a4be4a53e3e873744e880b775b1059e98"><div class="ttname"><a href="unionOSCCTRL__DPLLRATIO__Type.html#a4be4a53e3e873744e880b775b1059e98">OSCCTRL_DPLLRATIO_Type::LDRFRAC</a></div><div class="ttdeci">uint32_t LDRFRAC</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00634">oscctrl.h:634</a></div></div>
<div class="ttc" id="aunionOSCCTRL__DFLLMUL__Type_html_a953ebf2488a6a6a109274e86f3f595e3"><div class="ttname"><a href="unionOSCCTRL__DFLLMUL__Type.html#a953ebf2488a6a6a109274e86f3f595e3">OSCCTRL_DFLLMUL_Type::MUL</a></div><div class="ttdeci">uint32_t MUL</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00552">oscctrl.h:552</a></div></div>
<div class="ttc" id="aunionOSCCTRL__XOSCCTRL__Type_html_ab2d3db3bbaf2451a8262ffee12837c57"><div class="ttname"><a href="unionOSCCTRL__XOSCCTRL__Type.html#ab2d3db3bbaf2451a8262ffee12837c57">OSCCTRL_XOSCCTRL_Type::ONDEMAND</a></div><div class="ttdeci">uint32_t ONDEMAND</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00409">oscctrl.h:409</a></div></div>
<div class="ttc" id="astructOscctrl_html_aa1fcfa6ec9a636e85e721056268617fa"><div class="ttname"><a href="structOscctrl.html#aa1fcfa6ec9a636e85e721056268617fa">Oscctrl::INTFLAG</a></div><div class="ttdeci">__IO OSCCTRL_INTFLAG_Type INTFLAG</div><div class="ttdoc">Offset: 0x0C (R/W 32) Interrupt Flag Status and Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00776">oscctrl.h:776</a></div></div>
<div class="ttc" id="aunionOSCCTRL__INTFLAG__Type_html_a97675627ce7a2c793607b0c60a7bb0bd"><div class="ttname"><a href="unionOSCCTRL__INTFLAG__Type.html#a97675627ce7a2c793607b0c60a7bb0bd">OSCCTRL_INTFLAG_Type::XOSCFAIL0</a></div><div class="ttdeci">__I uint32_t XOSCFAIL0</div><div class="ttdef"><b>Definition:</b> <a href="component_2oscctrl_8h_source.html#l00236">oscctrl.h:236</a></div></div>
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<a href="component_2pac_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_PAC_COMPONENT_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_PAC_COMPONENT_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160; </div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define PAC_U2120</span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define REV_PAC 0x120</span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160; </div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="comment">/* -------- PAC_WRCTRL : (PAC Offset: 0x00) (R/W 32) Write control -------- */</span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00044"></a><span class="lineno"><a class="line" href="unionPAC__WRCTRL__Type.html"> 44</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00046"></a><span class="lineno"><a class="line" href="unionPAC__WRCTRL__Type.html#a55e8c4ad2b0e0c4de47c9a1b19edd6c3"> 46</a></span>&#160; uint32_t <a class="code" href="unionPAC__WRCTRL__Type.html#a55e8c4ad2b0e0c4de47c9a1b19edd6c3">PERID</a>:16; </div>
<div class="line"><a name="l00047"></a><span class="lineno"><a class="line" href="unionPAC__WRCTRL__Type.html#a59fabdc8cf31587de5969dd1627393d8"> 47</a></span>&#160; uint32_t <a class="code" href="unionPAC__WRCTRL__Type.html#a59fabdc8cf31587de5969dd1627393d8">KEY</a>:8; </div>
<div class="line"><a name="l00048"></a><span class="lineno"><a class="line" href="unionPAC__WRCTRL__Type.html#a861c15a385738e9a656f1fb30bd02e4b"> 48</a></span>&#160; uint32_t :8; </div>
<div class="line"><a name="l00049"></a><span class="lineno"><a class="line" href="unionPAC__WRCTRL__Type.html#ac3cd12a9563e300c695d05cad37a86ec"> 49</a></span>&#160; } bit; </div>
<div class="line"><a name="l00050"></a><span class="lineno"><a class="line" href="unionPAC__WRCTRL__Type.html#a2d42d5d5bf2f4ed9eb643ddc322f8049"> 50</a></span>&#160; uint32_t <a class="code" href="unionPAC__WRCTRL__Type.html#a2d42d5d5bf2f4ed9eb643ddc322f8049">reg</a>; </div>
<div class="line"><a name="l00051"></a><span class="lineno"> 51</span>&#160;} <a class="code" href="unionPAC__WRCTRL__Type.html">PAC_WRCTRL_Type</a>;</div>
<div class="line"><a name="l00052"></a><span class="lineno"> 52</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00053"></a><span class="lineno"> 53</span>&#160; </div>
<div class="line"><a name="l00054"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a37963dbce03e6a2686f45d67f70539d5"> 54</a></span>&#160;<span class="preprocessor">#define PAC_WRCTRL_OFFSET 0x00 </span></div>
<div class="line"><a name="l00055"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a903fbff5f9673c0eda0d3309bbb78b34"> 55</a></span>&#160;<span class="preprocessor">#define PAC_WRCTRL_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00057"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a3dc9ff0a036088acbcfa5f449a5d822e"> 57</a></span>&#160;<span class="preprocessor">#define PAC_WRCTRL_PERID_Pos 0 </span></div>
<div class="line"><a name="l00058"></a><span class="lineno"> 58</span>&#160;<span class="preprocessor">#define PAC_WRCTRL_PERID_Msk (_U_(0xFFFF) &lt;&lt; PAC_WRCTRL_PERID_Pos)</span></div>
<div class="line"><a name="l00059"></a><span class="lineno"> 59</span>&#160;<span class="preprocessor">#define PAC_WRCTRL_PERID(value) (PAC_WRCTRL_PERID_Msk &amp; ((value) &lt;&lt; PAC_WRCTRL_PERID_Pos))</span></div>
<div class="line"><a name="l00060"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a40efb8e0f647731be9f0df54d385282d"> 60</a></span>&#160;<span class="preprocessor">#define PAC_WRCTRL_KEY_Pos 16 </span></div>
<div class="line"><a name="l00061"></a><span class="lineno"> 61</span>&#160;<span class="preprocessor">#define PAC_WRCTRL_KEY_Msk (_U_(0xFF) &lt;&lt; PAC_WRCTRL_KEY_Pos)</span></div>
<div class="line"><a name="l00062"></a><span class="lineno"> 62</span>&#160;<span class="preprocessor">#define PAC_WRCTRL_KEY(value) (PAC_WRCTRL_KEY_Msk &amp; ((value) &lt;&lt; PAC_WRCTRL_KEY_Pos))</span></div>
<div class="line"><a name="l00063"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#aab794b38156768a64abe6a8a232f4322"> 63</a></span>&#160;<span class="preprocessor">#define PAC_WRCTRL_KEY_OFF_Val _U_(0x0) </span></div>
<div class="line"><a name="l00064"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a5ee6860a242b2e370966db4a8e897d65"> 64</a></span>&#160;<span class="preprocessor">#define PAC_WRCTRL_KEY_CLR_Val _U_(0x1) </span></div>
<div class="line"><a name="l00065"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a4546bc0b91f6f0a0283eb1a9e48c767d"> 65</a></span>&#160;<span class="preprocessor">#define PAC_WRCTRL_KEY_SET_Val _U_(0x2) </span></div>
<div class="line"><a name="l00066"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a743a61ffc754e8f10947372a73e07289"> 66</a></span>&#160;<span class="preprocessor">#define PAC_WRCTRL_KEY_SETLCK_Val _U_(0x3) </span></div>
<div class="line"><a name="l00067"></a><span class="lineno"> 67</span>&#160;<span class="preprocessor">#define PAC_WRCTRL_KEY_OFF (PAC_WRCTRL_KEY_OFF_Val &lt;&lt; PAC_WRCTRL_KEY_Pos)</span></div>
<div class="line"><a name="l00068"></a><span class="lineno"> 68</span>&#160;<span class="preprocessor">#define PAC_WRCTRL_KEY_CLR (PAC_WRCTRL_KEY_CLR_Val &lt;&lt; PAC_WRCTRL_KEY_Pos)</span></div>
<div class="line"><a name="l00069"></a><span class="lineno"> 69</span>&#160;<span class="preprocessor">#define PAC_WRCTRL_KEY_SET (PAC_WRCTRL_KEY_SET_Val &lt;&lt; PAC_WRCTRL_KEY_Pos)</span></div>
<div class="line"><a name="l00070"></a><span class="lineno"> 70</span>&#160;<span class="preprocessor">#define PAC_WRCTRL_KEY_SETLCK (PAC_WRCTRL_KEY_SETLCK_Val &lt;&lt; PAC_WRCTRL_KEY_Pos)</span></div>
<div class="line"><a name="l00071"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a20de081af2514eb13d470f89d77999ed"> 71</a></span>&#160;<span class="preprocessor">#define PAC_WRCTRL_MASK _U_(0x00FFFFFF) </span></div>
<div class="line"><a name="l00073"></a><span class="lineno"> 73</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PAC_EVCTRL : (PAC Offset: 0x04) (R/W 8) Event control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00074"></a><span class="lineno"> 74</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00075"></a><span class="lineno"><a class="line" href="unionPAC__EVCTRL__Type.html"> 75</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00076"></a><span class="lineno"> 76</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00077"></a><span class="lineno"><a class="line" href="unionPAC__EVCTRL__Type.html#a08ad9f5b8427481586e8c446c57f831b"> 77</a></span>&#160; uint8_t <a class="code" href="unionPAC__EVCTRL__Type.html#a08ad9f5b8427481586e8c446c57f831b">ERREO</a>:1; </div>
<div class="line"><a name="l00078"></a><span class="lineno"><a class="line" href="unionPAC__EVCTRL__Type.html#ad94c7f6e4a33a2fe1beb822e18becb15"> 78</a></span>&#160; uint8_t :7; </div>
<div class="line"><a name="l00079"></a><span class="lineno"><a class="line" href="unionPAC__EVCTRL__Type.html#a511cc554052adf783af1e0b2c40b4fad"> 79</a></span>&#160; } bit; </div>
<div class="line"><a name="l00080"></a><span class="lineno"><a class="line" href="unionPAC__EVCTRL__Type.html#ab816f0a266ad03a5db3b743a45ad3a7b"> 80</a></span>&#160; uint8_t <a class="code" href="unionPAC__EVCTRL__Type.html#ab816f0a266ad03a5db3b743a45ad3a7b">reg</a>; </div>
<div class="line"><a name="l00081"></a><span class="lineno"> 81</span>&#160;} <a class="code" href="unionPAC__EVCTRL__Type.html">PAC_EVCTRL_Type</a>;</div>
<div class="line"><a name="l00082"></a><span class="lineno"> 82</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00083"></a><span class="lineno"> 83</span>&#160; </div>
<div class="line"><a name="l00084"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a3ff92d7bb0f7e261da7ddb81bbaf900f"> 84</a></span>&#160;<span class="preprocessor">#define PAC_EVCTRL_OFFSET 0x04 </span></div>
<div class="line"><a name="l00085"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ac4be9b5abd80d24d56fac00c9becb708"> 85</a></span>&#160;<span class="preprocessor">#define PAC_EVCTRL_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00087"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a5920713bfe0dc88ccdc65852e077e8c9"> 87</a></span>&#160;<span class="preprocessor">#define PAC_EVCTRL_ERREO_Pos 0 </span></div>
<div class="line"><a name="l00088"></a><span class="lineno"> 88</span>&#160;<span class="preprocessor">#define PAC_EVCTRL_ERREO (_U_(0x1) &lt;&lt; PAC_EVCTRL_ERREO_Pos)</span></div>
<div class="line"><a name="l00089"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a512b4c1a352ec1cdbee25ec33dddc526"> 89</a></span>&#160;<span class="preprocessor">#define PAC_EVCTRL_MASK _U_(0x01) </span></div>
<div class="line"><a name="l00091"></a><span class="lineno"> 91</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PAC_INTENCLR : (PAC Offset: 0x08) (R/W 8) Interrupt enable clear -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00092"></a><span class="lineno"> 92</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00093"></a><span class="lineno"><a class="line" href="unionPAC__INTENCLR__Type.html"> 93</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00094"></a><span class="lineno"> 94</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00095"></a><span class="lineno"><a class="line" href="unionPAC__INTENCLR__Type.html#a34c1616f9582a2be3019c29b07d758ac"> 95</a></span>&#160; uint8_t <a class="code" href="unionPAC__INTENCLR__Type.html#a34c1616f9582a2be3019c29b07d758ac">ERR</a>:1; </div>
<div class="line"><a name="l00096"></a><span class="lineno"><a class="line" href="unionPAC__INTENCLR__Type.html#a232bf027eea9dd4eb1358672cc4a5af2"> 96</a></span>&#160; uint8_t :7; </div>
<div class="line"><a name="l00097"></a><span class="lineno"><a class="line" href="unionPAC__INTENCLR__Type.html#a89630c2e301023b4120d82584fc1c580"> 97</a></span>&#160; } bit; </div>
<div class="line"><a name="l00098"></a><span class="lineno"><a class="line" href="unionPAC__INTENCLR__Type.html#aee8c569bbbc8cf9173802dde9754f76d"> 98</a></span>&#160; uint8_t <a class="code" href="unionPAC__INTENCLR__Type.html#aee8c569bbbc8cf9173802dde9754f76d">reg</a>; </div>
<div class="line"><a name="l00099"></a><span class="lineno"> 99</span>&#160;} <a class="code" href="unionPAC__INTENCLR__Type.html">PAC_INTENCLR_Type</a>;</div>
<div class="line"><a name="l00100"></a><span class="lineno"> 100</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00101"></a><span class="lineno"> 101</span>&#160; </div>
<div class="line"><a name="l00102"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ab74ed8f7d8aa591cf1c8a49d5dd394a4"> 102</a></span>&#160;<span class="preprocessor">#define PAC_INTENCLR_OFFSET 0x08 </span></div>
<div class="line"><a name="l00103"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#af70176d821e215c1479501941b47cb6d"> 103</a></span>&#160;<span class="preprocessor">#define PAC_INTENCLR_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00105"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a9d91633dd3124f58a42f16cbdf9bda28"> 105</a></span>&#160;<span class="preprocessor">#define PAC_INTENCLR_ERR_Pos 0 </span></div>
<div class="line"><a name="l00106"></a><span class="lineno"> 106</span>&#160;<span class="preprocessor">#define PAC_INTENCLR_ERR (_U_(0x1) &lt;&lt; PAC_INTENCLR_ERR_Pos)</span></div>
<div class="line"><a name="l00107"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a5d611adf6f1cc6376f50b18834e49b61"> 107</a></span>&#160;<span class="preprocessor">#define PAC_INTENCLR_MASK _U_(0x01) </span></div>
<div class="line"><a name="l00109"></a><span class="lineno"> 109</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PAC_INTENSET : (PAC Offset: 0x09) (R/W 8) Interrupt enable set -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00110"></a><span class="lineno"> 110</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00111"></a><span class="lineno"><a class="line" href="unionPAC__INTENSET__Type.html"> 111</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00112"></a><span class="lineno"> 112</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00113"></a><span class="lineno"><a class="line" href="unionPAC__INTENSET__Type.html#afc5b259bd2c160a171dc77aa00489306"> 113</a></span>&#160; uint8_t <a class="code" href="unionPAC__INTENSET__Type.html#afc5b259bd2c160a171dc77aa00489306">ERR</a>:1; </div>
<div class="line"><a name="l00114"></a><span class="lineno"><a class="line" href="unionPAC__INTENSET__Type.html#a7e878d9082371a7d35c2fa5459b7e6ac"> 114</a></span>&#160; uint8_t :7; </div>
<div class="line"><a name="l00115"></a><span class="lineno"><a class="line" href="unionPAC__INTENSET__Type.html#a7c0c871c1c208bee1fcc3eabe8c095ce"> 115</a></span>&#160; } bit; </div>
<div class="line"><a name="l00116"></a><span class="lineno"><a class="line" href="unionPAC__INTENSET__Type.html#a7dbbd6533558a1cd00f547a1d51d42a4"> 116</a></span>&#160; uint8_t <a class="code" href="unionPAC__INTENSET__Type.html#a7dbbd6533558a1cd00f547a1d51d42a4">reg</a>; </div>
<div class="line"><a name="l00117"></a><span class="lineno"> 117</span>&#160;} <a class="code" href="unionPAC__INTENSET__Type.html">PAC_INTENSET_Type</a>;</div>
<div class="line"><a name="l00118"></a><span class="lineno"> 118</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00119"></a><span class="lineno"> 119</span>&#160; </div>
<div class="line"><a name="l00120"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a421fbc8df3566dfcce8a684c5ae89aaa"> 120</a></span>&#160;<span class="preprocessor">#define PAC_INTENSET_OFFSET 0x09 </span></div>
<div class="line"><a name="l00121"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a76af054cd69c5f88e62b0c70e9303e80"> 121</a></span>&#160;<span class="preprocessor">#define PAC_INTENSET_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00123"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ab88efd740ff8813223ad6f542d9a9b21"> 123</a></span>&#160;<span class="preprocessor">#define PAC_INTENSET_ERR_Pos 0 </span></div>
<div class="line"><a name="l00124"></a><span class="lineno"> 124</span>&#160;<span class="preprocessor">#define PAC_INTENSET_ERR (_U_(0x1) &lt;&lt; PAC_INTENSET_ERR_Pos)</span></div>
<div class="line"><a name="l00125"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a275044a43202e526e110b4df9bbcd57c"> 125</a></span>&#160;<span class="preprocessor">#define PAC_INTENSET_MASK _U_(0x01) </span></div>
<div class="line"><a name="l00127"></a><span class="lineno"> 127</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PAC_INTFLAGAHB : (PAC Offset: 0x10) (R/W 32) Bridge interrupt flag status -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00128"></a><span class="lineno"> 128</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00129"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGAHB__Type.html"> 129</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{ <span class="comment">// __I to avoid read-modify-write on write-to-clear register</span></div>
<div class="line"><a name="l00130"></a><span class="lineno"> 130</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00131"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGAHB__Type.html#a1493abd9914771840e728a4dab68a1ea"> 131</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGAHB__Type.html#a1493abd9914771840e728a4dab68a1ea">FLASH_</a>:1; </div>
<div class="line"><a name="l00132"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGAHB__Type.html#a7d2a708765a14bb35460c63de3b75590"> 132</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGAHB__Type.html#a7d2a708765a14bb35460c63de3b75590">FLASH_ALT_</a>:1; </div>
<div class="line"><a name="l00133"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGAHB__Type.html#a310905c2f2afce8975a98763dc14c3ec"> 133</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGAHB__Type.html#a310905c2f2afce8975a98763dc14c3ec">SEEPROM_</a>:1; </div>
<div class="line"><a name="l00134"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGAHB__Type.html#a2d4c3bba65e47d367fb014731fa70f61"> 134</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGAHB__Type.html#a2d4c3bba65e47d367fb014731fa70f61">RAMCM4S_</a>:1; </div>
<div class="line"><a name="l00135"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGAHB__Type.html#a4273db3850a034ba9e0617c9db9076b6"> 135</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGAHB__Type.html#a4273db3850a034ba9e0617c9db9076b6">RAMPPPDSU_</a>:1; </div>
<div class="line"><a name="l00136"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGAHB__Type.html#a9de15febf70997de358bac6dd2ee9399"> 136</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGAHB__Type.html#a9de15febf70997de358bac6dd2ee9399">RAMDMAWR_</a>:1; </div>
<div class="line"><a name="l00137"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGAHB__Type.html#ad54e6f74a8c8d915cefb76151c80a32e"> 137</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGAHB__Type.html#ad54e6f74a8c8d915cefb76151c80a32e">RAMDMACICM_</a>:1; </div>
<div class="line"><a name="l00138"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGAHB__Type.html#a4f02abe23ecb09a7e8b22aa17c75e72e"> 138</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGAHB__Type.html#a4f02abe23ecb09a7e8b22aa17c75e72e">HPB0_</a>:1; </div>
<div class="line"><a name="l00139"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGAHB__Type.html#afdedb761fe7c06817c11b1a118328587"> 139</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGAHB__Type.html#afdedb761fe7c06817c11b1a118328587">HPB1_</a>:1; </div>
<div class="line"><a name="l00140"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGAHB__Type.html#a1265ba4ea019230d8dcb8349a78837fc"> 140</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGAHB__Type.html#a1265ba4ea019230d8dcb8349a78837fc">HPB2_</a>:1; </div>
<div class="line"><a name="l00141"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGAHB__Type.html#a1a621bbacf6593fe6841ccbaa61d3d98"> 141</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGAHB__Type.html#a1a621bbacf6593fe6841ccbaa61d3d98">HPB3_</a>:1; </div>
<div class="line"><a name="l00142"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGAHB__Type.html#aeb3f9bcef60e3e2638d884eaeab9ebb3"> 142</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGAHB__Type.html#aeb3f9bcef60e3e2638d884eaeab9ebb3">PUKCC_</a>:1; </div>
<div class="line"><a name="l00143"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGAHB__Type.html#a444669982642924724acf6482026651b"> 143</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGAHB__Type.html#a444669982642924724acf6482026651b">SDHC0_</a>:1; </div>
<div class="line"><a name="l00144"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGAHB__Type.html#a9983e75a9b9ff79e16642e058872aa6d"> 144</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGAHB__Type.html#a9983e75a9b9ff79e16642e058872aa6d">SDHC1_</a>:1; </div>
<div class="line"><a name="l00145"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGAHB__Type.html#addf451dda42bd9b4bd1834403fc7b063"> 145</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGAHB__Type.html#addf451dda42bd9b4bd1834403fc7b063">QSPI_</a>:1; </div>
<div class="line"><a name="l00146"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGAHB__Type.html#a893751a8f7a5cf86b41c6d7f9ad4b56a"> 146</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGAHB__Type.html#a893751a8f7a5cf86b41c6d7f9ad4b56a">BKUPRAM_</a>:1; </div>
<div class="line"><a name="l00147"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGAHB__Type.html#a78cb36b5246ea3187029b85021e02e6f"> 147</a></span>&#160; __I <a class="code" href="unionPAC__INTFLAGAHB__Type.html#a78cb36b5246ea3187029b85021e02e6f">uint32_t</a> :16; </div>
<div class="line"><a name="l00148"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGAHB__Type.html#a4badf732f5c781563938307f3a763180"> 148</a></span>&#160; } bit; </div>
<div class="line"><a name="l00149"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGAHB__Type.html#a540fa7338dbb77f067ecbc09c69394a8"> 149</a></span>&#160; uint32_t <a class="code" href="unionPAC__INTFLAGAHB__Type.html#a540fa7338dbb77f067ecbc09c69394a8">reg</a>; </div>
<div class="line"><a name="l00150"></a><span class="lineno"> 150</span>&#160;} <a class="code" href="unionPAC__INTFLAGAHB__Type.html">PAC_INTFLAGAHB_Type</a>;</div>
<div class="line"><a name="l00151"></a><span class="lineno"> 151</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00152"></a><span class="lineno"> 152</span>&#160; </div>
<div class="line"><a name="l00153"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a83fa61fe80493623b4c03803a5868356"> 153</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_OFFSET 0x10 </span></div>
<div class="line"><a name="l00154"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a26d7f3826d7482e68af262319e44f4ed"> 154</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00156"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a9473b5c5dff72c63c354118051ce0ee6"> 156</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_FLASH_Pos 0 </span></div>
<div class="line"><a name="l00157"></a><span class="lineno"> 157</span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_FLASH (_U_(0x1) &lt;&lt; PAC_INTFLAGAHB_FLASH_Pos)</span></div>
<div class="line"><a name="l00158"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#acaded044371918fe0d8eaed785c99603"> 158</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_FLASH_ALT_Pos 1 </span></div>
<div class="line"><a name="l00159"></a><span class="lineno"> 159</span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_FLASH_ALT (_U_(0x1) &lt;&lt; PAC_INTFLAGAHB_FLASH_ALT_Pos)</span></div>
<div class="line"><a name="l00160"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#af83bd5337e86d3519aa5e912b0019d23"> 160</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_SEEPROM_Pos 2 </span></div>
<div class="line"><a name="l00161"></a><span class="lineno"> 161</span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_SEEPROM (_U_(0x1) &lt;&lt; PAC_INTFLAGAHB_SEEPROM_Pos)</span></div>
<div class="line"><a name="l00162"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a27fef4a558c34041d427e9d9dc3aea03"> 162</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_RAMCM4S_Pos 3 </span></div>
<div class="line"><a name="l00163"></a><span class="lineno"> 163</span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_RAMCM4S (_U_(0x1) &lt;&lt; PAC_INTFLAGAHB_RAMCM4S_Pos)</span></div>
<div class="line"><a name="l00164"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#aaf95888cc36a5e902ba1738258905d0f"> 164</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_RAMPPPDSU_Pos 4 </span></div>
<div class="line"><a name="l00165"></a><span class="lineno"> 165</span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_RAMPPPDSU (_U_(0x1) &lt;&lt; PAC_INTFLAGAHB_RAMPPPDSU_Pos)</span></div>
<div class="line"><a name="l00166"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a7bee76177eed9c9d314fda3b6af62b01"> 166</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_RAMDMAWR_Pos 5 </span></div>
<div class="line"><a name="l00167"></a><span class="lineno"> 167</span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_RAMDMAWR (_U_(0x1) &lt;&lt; PAC_INTFLAGAHB_RAMDMAWR_Pos)</span></div>
<div class="line"><a name="l00168"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a4a02cb89dc754be9bee043c2593624a0"> 168</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_RAMDMACICM_Pos 6 </span></div>
<div class="line"><a name="l00169"></a><span class="lineno"> 169</span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_RAMDMACICM (_U_(0x1) &lt;&lt; PAC_INTFLAGAHB_RAMDMACICM_Pos)</span></div>
<div class="line"><a name="l00170"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a9060cadbd6000995c8033e96d40c2ee3"> 170</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_HPB0_Pos 7 </span></div>
<div class="line"><a name="l00171"></a><span class="lineno"> 171</span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_HPB0 (_U_(0x1) &lt;&lt; PAC_INTFLAGAHB_HPB0_Pos)</span></div>
<div class="line"><a name="l00172"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#afa1c35302b965176e72cad01c2f93bdf"> 172</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_HPB1_Pos 8 </span></div>
<div class="line"><a name="l00173"></a><span class="lineno"> 173</span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_HPB1 (_U_(0x1) &lt;&lt; PAC_INTFLAGAHB_HPB1_Pos)</span></div>
<div class="line"><a name="l00174"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a8cb745f54251f1a82c17a32b53aea8a1"> 174</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_HPB2_Pos 9 </span></div>
<div class="line"><a name="l00175"></a><span class="lineno"> 175</span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_HPB2 (_U_(0x1) &lt;&lt; PAC_INTFLAGAHB_HPB2_Pos)</span></div>
<div class="line"><a name="l00176"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a192895933b071d5cdb982db8da4a8d57"> 176</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_HPB3_Pos 10 </span></div>
<div class="line"><a name="l00177"></a><span class="lineno"> 177</span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_HPB3 (_U_(0x1) &lt;&lt; PAC_INTFLAGAHB_HPB3_Pos)</span></div>
<div class="line"><a name="l00178"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a0c7426feb2540f45d9c69acaba2b47f4"> 178</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_PUKCC_Pos 11 </span></div>
<div class="line"><a name="l00179"></a><span class="lineno"> 179</span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_PUKCC (_U_(0x1) &lt;&lt; PAC_INTFLAGAHB_PUKCC_Pos)</span></div>
<div class="line"><a name="l00180"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a3d147aaf7e9214d2e9410a3bca2a45e0"> 180</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_SDHC0_Pos 12 </span></div>
<div class="line"><a name="l00181"></a><span class="lineno"> 181</span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_SDHC0 (_U_(0x1) &lt;&lt; PAC_INTFLAGAHB_SDHC0_Pos)</span></div>
<div class="line"><a name="l00182"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a0bec90f71c0cac5670de1420312112b7"> 182</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_SDHC1_Pos 13 </span></div>
<div class="line"><a name="l00183"></a><span class="lineno"> 183</span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_SDHC1 (_U_(0x1) &lt;&lt; PAC_INTFLAGAHB_SDHC1_Pos)</span></div>
<div class="line"><a name="l00184"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#aaebf905b86746dac228ca6a761ffbead"> 184</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_QSPI_Pos 14 </span></div>
<div class="line"><a name="l00185"></a><span class="lineno"> 185</span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_QSPI (_U_(0x1) &lt;&lt; PAC_INTFLAGAHB_QSPI_Pos)</span></div>
<div class="line"><a name="l00186"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a5048def2bee9c55d741ea4d4dcb2af86"> 186</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_BKUPRAM_Pos 15 </span></div>
<div class="line"><a name="l00187"></a><span class="lineno"> 187</span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_BKUPRAM (_U_(0x1) &lt;&lt; PAC_INTFLAGAHB_BKUPRAM_Pos)</span></div>
<div class="line"><a name="l00188"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ade378cf78980d5a5047a176b8fe09375"> 188</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGAHB_MASK _U_(0x0000FFFF) </span></div>
<div class="line"><a name="l00190"></a><span class="lineno"> 190</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PAC_INTFLAGA : (PAC Offset: 0x14) (R/W 32) Peripheral interrupt flag status - Bridge A -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00191"></a><span class="lineno"> 191</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00192"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGA__Type.html"> 192</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{ <span class="comment">// __I to avoid read-modify-write on write-to-clear register</span></div>
<div class="line"><a name="l00193"></a><span class="lineno"> 193</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00194"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGA__Type.html#a511c299d6068f6a6e51f49fd4a2844d2"> 194</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGA__Type.html#a511c299d6068f6a6e51f49fd4a2844d2">PAC_</a>:1; </div>
<div class="line"><a name="l00195"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGA__Type.html#a9525cf7e0c365d6f0c5a68b73c759964"> 195</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGA__Type.html#a9525cf7e0c365d6f0c5a68b73c759964">PM_</a>:1; </div>
<div class="line"><a name="l00196"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGA__Type.html#aab517d8db3c0e8ae6175f01fa838771a"> 196</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGA__Type.html#aab517d8db3c0e8ae6175f01fa838771a">MCLK_</a>:1; </div>
<div class="line"><a name="l00197"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGA__Type.html#a6a24655756223a11de0700ef7b467113"> 197</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGA__Type.html#a6a24655756223a11de0700ef7b467113">RSTC_</a>:1; </div>
<div class="line"><a name="l00198"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGA__Type.html#a5b62a0a2939e792001834edc95b780f1"> 198</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGA__Type.html#a5b62a0a2939e792001834edc95b780f1">OSCCTRL_</a>:1; </div>
<div class="line"><a name="l00199"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGA__Type.html#a62ebbd62cd313325cc08d077904600ad"> 199</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGA__Type.html#a62ebbd62cd313325cc08d077904600ad">OSC32KCTRL_</a>:1; </div>
<div class="line"><a name="l00200"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGA__Type.html#aba2bb2e7a7561c838a089f1b8ee98dee"> 200</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGA__Type.html#aba2bb2e7a7561c838a089f1b8ee98dee">SUPC_</a>:1; </div>
<div class="line"><a name="l00201"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGA__Type.html#a48e187c4353fe84632a1ce0f8399da79"> 201</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGA__Type.html#a48e187c4353fe84632a1ce0f8399da79">GCLK_</a>:1; </div>
<div class="line"><a name="l00202"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGA__Type.html#a95d433222779b9876e94e13368814529"> 202</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGA__Type.html#a95d433222779b9876e94e13368814529">WDT_</a>:1; </div>
<div class="line"><a name="l00203"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGA__Type.html#a6e74c9366d6bcb61cacf67b07d1229a1"> 203</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGA__Type.html#a6e74c9366d6bcb61cacf67b07d1229a1">RTC_</a>:1; </div>
<div class="line"><a name="l00204"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGA__Type.html#a52682830a2ffd3c81aa5b7b7ae1c4066"> 204</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGA__Type.html#a52682830a2ffd3c81aa5b7b7ae1c4066">EIC_</a>:1; </div>
<div class="line"><a name="l00205"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGA__Type.html#a5dd12b70fc137215000d2bf3875da549"> 205</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGA__Type.html#a5dd12b70fc137215000d2bf3875da549">FREQM_</a>:1; </div>
<div class="line"><a name="l00206"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGA__Type.html#ace4c8ba6ab5ad18c940146e24f158529"> 206</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGA__Type.html#ace4c8ba6ab5ad18c940146e24f158529">SERCOM0_</a>:1; </div>
<div class="line"><a name="l00207"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGA__Type.html#a09c28099696365f89840c5597b74ac00"> 207</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGA__Type.html#a09c28099696365f89840c5597b74ac00">SERCOM1_</a>:1; </div>
<div class="line"><a name="l00208"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGA__Type.html#a5595e182f568d040022828a7dae973b7"> 208</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGA__Type.html#a5595e182f568d040022828a7dae973b7">TC0_</a>:1; </div>
<div class="line"><a name="l00209"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGA__Type.html#aa5cc5a43cf0e145021b6121dc90d1948"> 209</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGA__Type.html#aa5cc5a43cf0e145021b6121dc90d1948">TC1_</a>:1; </div>
<div class="line"><a name="l00210"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGA__Type.html#a7a6220dfd32208d1565a7ec5f480576c"> 210</a></span>&#160; __I <a class="code" href="unionPAC__INTFLAGA__Type.html#a7a6220dfd32208d1565a7ec5f480576c">uint32_t</a> :16; </div>
<div class="line"><a name="l00211"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGA__Type.html#a827742a52e59527f20fa93140dc98c32"> 211</a></span>&#160; } bit; </div>
<div class="line"><a name="l00212"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGA__Type.html#a41aaf8213e2017431cfb9aa20dd349b9"> 212</a></span>&#160; uint32_t <a class="code" href="unionPAC__INTFLAGA__Type.html#a41aaf8213e2017431cfb9aa20dd349b9">reg</a>; </div>
<div class="line"><a name="l00213"></a><span class="lineno"> 213</span>&#160;} <a class="code" href="unionPAC__INTFLAGA__Type.html">PAC_INTFLAGA_Type</a>;</div>
<div class="line"><a name="l00214"></a><span class="lineno"> 214</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00215"></a><span class="lineno"> 215</span>&#160; </div>
<div class="line"><a name="l00216"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a60a473e4010e9cf3199b82139414f8c1"> 216</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_OFFSET 0x14 </span></div>
<div class="line"><a name="l00217"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ac48baf8aa4b8fb392e030088d32fca07"> 217</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00219"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ad876de42e0d96efce9b8ccd0172d70f3"> 219</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_PAC_Pos 0 </span></div>
<div class="line"><a name="l00220"></a><span class="lineno"> 220</span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_PAC (_U_(0x1) &lt;&lt; PAC_INTFLAGA_PAC_Pos)</span></div>
<div class="line"><a name="l00221"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#add3a4639c92a89f74a0bfb8f1e5e4447"> 221</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_PM_Pos 1 </span></div>
<div class="line"><a name="l00222"></a><span class="lineno"> 222</span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_PM (_U_(0x1) &lt;&lt; PAC_INTFLAGA_PM_Pos)</span></div>
<div class="line"><a name="l00223"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a34d71b64255f5253ff36cb01eec6435a"> 223</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_MCLK_Pos 2 </span></div>
<div class="line"><a name="l00224"></a><span class="lineno"> 224</span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_MCLK (_U_(0x1) &lt;&lt; PAC_INTFLAGA_MCLK_Pos)</span></div>
<div class="line"><a name="l00225"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#acea8dc7ff223aaf6ebae753d92457d3e"> 225</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_RSTC_Pos 3 </span></div>
<div class="line"><a name="l00226"></a><span class="lineno"> 226</span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_RSTC (_U_(0x1) &lt;&lt; PAC_INTFLAGA_RSTC_Pos)</span></div>
<div class="line"><a name="l00227"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ab1d2e78c048c19fa40ded1a2164911c1"> 227</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_OSCCTRL_Pos 4 </span></div>
<div class="line"><a name="l00228"></a><span class="lineno"> 228</span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_OSCCTRL (_U_(0x1) &lt;&lt; PAC_INTFLAGA_OSCCTRL_Pos)</span></div>
<div class="line"><a name="l00229"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a98b1bb28cf160cc139d57a5371a2bb57"> 229</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_OSC32KCTRL_Pos 5 </span></div>
<div class="line"><a name="l00230"></a><span class="lineno"> 230</span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_OSC32KCTRL (_U_(0x1) &lt;&lt; PAC_INTFLAGA_OSC32KCTRL_Pos)</span></div>
<div class="line"><a name="l00231"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a3a76db3b81641575ae9d66ccd76f9b57"> 231</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_SUPC_Pos 6 </span></div>
<div class="line"><a name="l00232"></a><span class="lineno"> 232</span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_SUPC (_U_(0x1) &lt;&lt; PAC_INTFLAGA_SUPC_Pos)</span></div>
<div class="line"><a name="l00233"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a79e2af224a5f7298a2780418863d8397"> 233</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_GCLK_Pos 7 </span></div>
<div class="line"><a name="l00234"></a><span class="lineno"> 234</span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_GCLK (_U_(0x1) &lt;&lt; PAC_INTFLAGA_GCLK_Pos)</span></div>
<div class="line"><a name="l00235"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a89762a30c9ce064cb310ef9070a38f39"> 235</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_WDT_Pos 8 </span></div>
<div class="line"><a name="l00236"></a><span class="lineno"> 236</span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_WDT (_U_(0x1) &lt;&lt; PAC_INTFLAGA_WDT_Pos)</span></div>
<div class="line"><a name="l00237"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a3395ee0d9089942d7695d0a5cb854579"> 237</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_RTC_Pos 9 </span></div>
<div class="line"><a name="l00238"></a><span class="lineno"> 238</span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_RTC (_U_(0x1) &lt;&lt; PAC_INTFLAGA_RTC_Pos)</span></div>
<div class="line"><a name="l00239"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a9401973db26dc04699c92c7213d58a71"> 239</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_EIC_Pos 10 </span></div>
<div class="line"><a name="l00240"></a><span class="lineno"> 240</span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_EIC (_U_(0x1) &lt;&lt; PAC_INTFLAGA_EIC_Pos)</span></div>
<div class="line"><a name="l00241"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a1b66f547513abbbfbdca97992cf146e2"> 241</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_FREQM_Pos 11 </span></div>
<div class="line"><a name="l00242"></a><span class="lineno"> 242</span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_FREQM (_U_(0x1) &lt;&lt; PAC_INTFLAGA_FREQM_Pos)</span></div>
<div class="line"><a name="l00243"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ac89041d229f4f141b2542b53ee8fd005"> 243</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_SERCOM0_Pos 12 </span></div>
<div class="line"><a name="l00244"></a><span class="lineno"> 244</span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_SERCOM0 (_U_(0x1) &lt;&lt; PAC_INTFLAGA_SERCOM0_Pos)</span></div>
<div class="line"><a name="l00245"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ac663c6cb21dc94354cf14f9b9e6327b3"> 245</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_SERCOM1_Pos 13 </span></div>
<div class="line"><a name="l00246"></a><span class="lineno"> 246</span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_SERCOM1 (_U_(0x1) &lt;&lt; PAC_INTFLAGA_SERCOM1_Pos)</span></div>
<div class="line"><a name="l00247"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a0d72a5b8fd07b78c40601689bf0a9793"> 247</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_TC0_Pos 14 </span></div>
<div class="line"><a name="l00248"></a><span class="lineno"> 248</span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_TC0 (_U_(0x1) &lt;&lt; PAC_INTFLAGA_TC0_Pos)</span></div>
<div class="line"><a name="l00249"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ae5e8138a0e5e72bffcac678a164ab978"> 249</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_TC1_Pos 15 </span></div>
<div class="line"><a name="l00250"></a><span class="lineno"> 250</span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_TC1 (_U_(0x1) &lt;&lt; PAC_INTFLAGA_TC1_Pos)</span></div>
<div class="line"><a name="l00251"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#acb516faf4eff811311d1d179213ff279"> 251</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGA_MASK _U_(0x0000FFFF) </span></div>
<div class="line"><a name="l00253"></a><span class="lineno"> 253</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PAC_INTFLAGB : (PAC Offset: 0x18) (R/W 32) Peripheral interrupt flag status - Bridge B -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00254"></a><span class="lineno"> 254</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00255"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGB__Type.html"> 255</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{ <span class="comment">// __I to avoid read-modify-write on write-to-clear register</span></div>
<div class="line"><a name="l00256"></a><span class="lineno"> 256</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00257"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGB__Type.html#accaa67d99213e877b038d3d87f2c8535"> 257</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGB__Type.html#accaa67d99213e877b038d3d87f2c8535">USB_</a>:1; </div>
<div class="line"><a name="l00258"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGB__Type.html#abf8a9c210c3ddcd55ab05599a0d64b6c"> 258</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGB__Type.html#abf8a9c210c3ddcd55ab05599a0d64b6c">DSU_</a>:1; </div>
<div class="line"><a name="l00259"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGB__Type.html#a9dad06dddaea9e7c0418c07e829c3d92"> 259</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGB__Type.html#a9dad06dddaea9e7c0418c07e829c3d92">NVMCTRL_</a>:1; </div>
<div class="line"><a name="l00260"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGB__Type.html#acea63acd8d9a3a8f0e1efa762425a2e9"> 260</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGB__Type.html#acea63acd8d9a3a8f0e1efa762425a2e9">CMCC_</a>:1; </div>
<div class="line"><a name="l00261"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGB__Type.html#a43699cc1634c4ba9fa31b1e35ae1866c"> 261</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGB__Type.html#a43699cc1634c4ba9fa31b1e35ae1866c">PORT_</a>:1; </div>
<div class="line"><a name="l00262"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGB__Type.html#a82b30ced1dc0078620083e1b73c4acda"> 262</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGB__Type.html#a82b30ced1dc0078620083e1b73c4acda">DMAC_</a>:1; </div>
<div class="line"><a name="l00263"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGB__Type.html#ac6a1e0fcd718d3a0238303e84e094baa"> 263</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGB__Type.html#ac6a1e0fcd718d3a0238303e84e094baa">HMATRIX_</a>:1; </div>
<div class="line"><a name="l00264"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGB__Type.html#aa2eef6cf3256b0880a7fffe0b886525c"> 264</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGB__Type.html#aa2eef6cf3256b0880a7fffe0b886525c">EVSYS_</a>:1; </div>
<div class="line"><a name="l00265"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGB__Type.html#aa1cc3912243057d318814c9aa4cefb20"> 265</a></span>&#160; __I <a class="code" href="unionPAC__INTFLAGB__Type.html#aa1cc3912243057d318814c9aa4cefb20">uint32_t</a> :1; </div>
<div class="line"><a name="l00266"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGB__Type.html#ab589357b8c6d24d9146d0a3ecab8e661"> 266</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGB__Type.html#ab589357b8c6d24d9146d0a3ecab8e661">SERCOM2_</a>:1; </div>
<div class="line"><a name="l00267"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGB__Type.html#ac3ea70df4df1bbeca1b1f96a0e7e7211"> 267</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGB__Type.html#ac3ea70df4df1bbeca1b1f96a0e7e7211">SERCOM3_</a>:1; </div>
<div class="line"><a name="l00268"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGB__Type.html#a2c8ab9a8e0b3a98aa9a444c02b88be09"> 268</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGB__Type.html#a2c8ab9a8e0b3a98aa9a444c02b88be09">TCC0_</a>:1; </div>
<div class="line"><a name="l00269"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGB__Type.html#a0b96b1fe0fcfae9dd6d9ac4a80a2921c"> 269</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGB__Type.html#a0b96b1fe0fcfae9dd6d9ac4a80a2921c">TCC1_</a>:1; </div>
<div class="line"><a name="l00270"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGB__Type.html#a42ab2afce5b6d4014a963a099ba802d1"> 270</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGB__Type.html#a42ab2afce5b6d4014a963a099ba802d1">TC2_</a>:1; </div>
<div class="line"><a name="l00271"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGB__Type.html#a420ad99d701f2ca2909e0ac0f2799958"> 271</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGB__Type.html#a420ad99d701f2ca2909e0ac0f2799958">TC3_</a>:1; </div>
<div class="line"><a name="l00272"></a><span class="lineno"> 272</span>&#160; __I uint32_t :1; </div>
<div class="line"><a name="l00273"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGB__Type.html#aa710c7cc4bdf69480615823f4944aa20"> 273</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGB__Type.html#aa710c7cc4bdf69480615823f4944aa20">RAMECC_</a>:1; </div>
<div class="line"><a name="l00274"></a><span class="lineno"> 274</span>&#160; __I uint32_t :15; </div>
<div class="line"><a name="l00275"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGB__Type.html#a80b37fd3ec76f2283cc9058c8589dae7"> 275</a></span>&#160; } bit; </div>
<div class="line"><a name="l00276"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGB__Type.html#acdf853a942ed023f4f1c06ab94483ef1"> 276</a></span>&#160; uint32_t <a class="code" href="unionPAC__INTFLAGB__Type.html#acdf853a942ed023f4f1c06ab94483ef1">reg</a>; </div>
<div class="line"><a name="l00277"></a><span class="lineno"> 277</span>&#160;} <a class="code" href="unionPAC__INTFLAGB__Type.html">PAC_INTFLAGB_Type</a>;</div>
<div class="line"><a name="l00278"></a><span class="lineno"> 278</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00279"></a><span class="lineno"> 279</span>&#160; </div>
<div class="line"><a name="l00280"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a008f186584878920c54459ef777fa7cf"> 280</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_OFFSET 0x18 </span></div>
<div class="line"><a name="l00281"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a565a30045293eefff3bffdf0772e38b2"> 281</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00283"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a518b16d2f73cb68cd1553e57d99592d3"> 283</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_USB_Pos 0 </span></div>
<div class="line"><a name="l00284"></a><span class="lineno"> 284</span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_USB (_U_(0x1) &lt;&lt; PAC_INTFLAGB_USB_Pos)</span></div>
<div class="line"><a name="l00285"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#af37fe8fcd3be26d9a958db2acf1f6ec2"> 285</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_DSU_Pos 1 </span></div>
<div class="line"><a name="l00286"></a><span class="lineno"> 286</span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_DSU (_U_(0x1) &lt;&lt; PAC_INTFLAGB_DSU_Pos)</span></div>
<div class="line"><a name="l00287"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ad2e15892745f7ecbb2385a50e6c362b4"> 287</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_NVMCTRL_Pos 2 </span></div>
<div class="line"><a name="l00288"></a><span class="lineno"> 288</span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_NVMCTRL (_U_(0x1) &lt;&lt; PAC_INTFLAGB_NVMCTRL_Pos)</span></div>
<div class="line"><a name="l00289"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a7a471c09066b44eedf66a6e2edb9b5db"> 289</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_CMCC_Pos 3 </span></div>
<div class="line"><a name="l00290"></a><span class="lineno"> 290</span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_CMCC (_U_(0x1) &lt;&lt; PAC_INTFLAGB_CMCC_Pos)</span></div>
<div class="line"><a name="l00291"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a5d40b284fd3ed69513d99dcba5ef170b"> 291</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_PORT_Pos 4 </span></div>
<div class="line"><a name="l00292"></a><span class="lineno"> 292</span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_PORT (_U_(0x1) &lt;&lt; PAC_INTFLAGB_PORT_Pos)</span></div>
<div class="line"><a name="l00293"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a98f31cffc77f594f95cb08741260eb99"> 293</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_DMAC_Pos 5 </span></div>
<div class="line"><a name="l00294"></a><span class="lineno"> 294</span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_DMAC (_U_(0x1) &lt;&lt; PAC_INTFLAGB_DMAC_Pos)</span></div>
<div class="line"><a name="l00295"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a6d2d80d01becd0e74b0b232039798dd4"> 295</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_HMATRIX_Pos 6 </span></div>
<div class="line"><a name="l00296"></a><span class="lineno"> 296</span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_HMATRIX (_U_(0x1) &lt;&lt; PAC_INTFLAGB_HMATRIX_Pos)</span></div>
<div class="line"><a name="l00297"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a1b5c52d368464bd3731ad2e14953d6a4"> 297</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_EVSYS_Pos 7 </span></div>
<div class="line"><a name="l00298"></a><span class="lineno"> 298</span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_EVSYS (_U_(0x1) &lt;&lt; PAC_INTFLAGB_EVSYS_Pos)</span></div>
<div class="line"><a name="l00299"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#af93fbb838efad6e7ad00dddc4d27ad82"> 299</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_SERCOM2_Pos 9 </span></div>
<div class="line"><a name="l00300"></a><span class="lineno"> 300</span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_SERCOM2 (_U_(0x1) &lt;&lt; PAC_INTFLAGB_SERCOM2_Pos)</span></div>
<div class="line"><a name="l00301"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ae3d23fa4e7329fbeae7327f01767f9b6"> 301</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_SERCOM3_Pos 10 </span></div>
<div class="line"><a name="l00302"></a><span class="lineno"> 302</span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_SERCOM3 (_U_(0x1) &lt;&lt; PAC_INTFLAGB_SERCOM3_Pos)</span></div>
<div class="line"><a name="l00303"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a18dc4787b5c1bdcd5535e3beff034376"> 303</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_TCC0_Pos 11 </span></div>
<div class="line"><a name="l00304"></a><span class="lineno"> 304</span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_TCC0 (_U_(0x1) &lt;&lt; PAC_INTFLAGB_TCC0_Pos)</span></div>
<div class="line"><a name="l00305"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#adc980629818d5a45bc8a194960f5da33"> 305</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_TCC1_Pos 12 </span></div>
<div class="line"><a name="l00306"></a><span class="lineno"> 306</span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_TCC1 (_U_(0x1) &lt;&lt; PAC_INTFLAGB_TCC1_Pos)</span></div>
<div class="line"><a name="l00307"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ab5922e5483fb1dd7d8077ad8b0776874"> 307</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_TC2_Pos 13 </span></div>
<div class="line"><a name="l00308"></a><span class="lineno"> 308</span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_TC2 (_U_(0x1) &lt;&lt; PAC_INTFLAGB_TC2_Pos)</span></div>
<div class="line"><a name="l00309"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a5b8ef5c2741104b2be6be401cb407f63"> 309</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_TC3_Pos 14 </span></div>
<div class="line"><a name="l00310"></a><span class="lineno"> 310</span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_TC3 (_U_(0x1) &lt;&lt; PAC_INTFLAGB_TC3_Pos)</span></div>
<div class="line"><a name="l00311"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a52422b0401cc33470cd1bb1a3902f75a"> 311</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_RAMECC_Pos 16 </span></div>
<div class="line"><a name="l00312"></a><span class="lineno"> 312</span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_RAMECC (_U_(0x1) &lt;&lt; PAC_INTFLAGB_RAMECC_Pos)</span></div>
<div class="line"><a name="l00313"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a707b08b4a7e4c1e636e402d60cb23cdc"> 313</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGB_MASK _U_(0x00017EFF) </span></div>
<div class="line"><a name="l00315"></a><span class="lineno"> 315</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PAC_INTFLAGC : (PAC Offset: 0x1C) (R/W 32) Peripheral interrupt flag status - Bridge C -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00316"></a><span class="lineno"> 316</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00317"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGC__Type.html"> 317</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{ <span class="comment">// __I to avoid read-modify-write on write-to-clear register</span></div>
<div class="line"><a name="l00318"></a><span class="lineno"> 318</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00319"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGC__Type.html#a42edae4e0859ddf7fc3e2c690907ed65"> 319</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGC__Type.html#a42edae4e0859ddf7fc3e2c690907ed65">CAN0_</a>:1; </div>
<div class="line"><a name="l00320"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGC__Type.html#a023532988624a71f27db6a355145296b"> 320</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGC__Type.html#a023532988624a71f27db6a355145296b">CAN1_</a>:1; </div>
<div class="line"><a name="l00321"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGC__Type.html#aa1321746f5b0830e0599e51d0f3c4744"> 321</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGC__Type.html#aa1321746f5b0830e0599e51d0f3c4744">GMAC_</a>:1; </div>
<div class="line"><a name="l00322"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGC__Type.html#ae670501a7336a5e9a357315adcf88dbc"> 322</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGC__Type.html#ae670501a7336a5e9a357315adcf88dbc">TCC2_</a>:1; </div>
<div class="line"><a name="l00323"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGC__Type.html#a598abfcfd83c840b8cada60131df264f"> 323</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGC__Type.html#a598abfcfd83c840b8cada60131df264f">TCC3_</a>:1; </div>
<div class="line"><a name="l00324"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGC__Type.html#aabdb939a85dd73d733b5abc8baaed9e2"> 324</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGC__Type.html#aabdb939a85dd73d733b5abc8baaed9e2">TC4_</a>:1; </div>
<div class="line"><a name="l00325"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGC__Type.html#aff2d9a7a6e808ace1310cd4295b83158"> 325</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGC__Type.html#aff2d9a7a6e808ace1310cd4295b83158">TC5_</a>:1; </div>
<div class="line"><a name="l00326"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGC__Type.html#a97dbaa143295d908adb375f362088d99"> 326</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGC__Type.html#a97dbaa143295d908adb375f362088d99">PDEC_</a>:1; </div>
<div class="line"><a name="l00327"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGC__Type.html#a27528872a5332ef9a1bafcc716ac7c19"> 327</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGC__Type.html#a27528872a5332ef9a1bafcc716ac7c19">AC_</a>:1; </div>
<div class="line"><a name="l00328"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGC__Type.html#a16f876f912b40e08156948d7be37a0e6"> 328</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGC__Type.html#a16f876f912b40e08156948d7be37a0e6">AES_</a>:1; </div>
<div class="line"><a name="l00329"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGC__Type.html#aba570551a632e3978c436fa9599cad9b"> 329</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGC__Type.html#aba570551a632e3978c436fa9599cad9b">TRNG_</a>:1; </div>
<div class="line"><a name="l00330"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGC__Type.html#ae4036404a026fc2d5612b47f60c43b5f"> 330</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGC__Type.html#ae4036404a026fc2d5612b47f60c43b5f">ICM_</a>:1; </div>
<div class="line"><a name="l00331"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGC__Type.html#a8740afb91b0bc8183aae69ce38479b5f"> 331</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGC__Type.html#a8740afb91b0bc8183aae69ce38479b5f">PUKCC_</a>:1; </div>
<div class="line"><a name="l00332"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGC__Type.html#a296ad3b2f810fa13f696a4bd8730f4a0"> 332</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGC__Type.html#a296ad3b2f810fa13f696a4bd8730f4a0">QSPI_</a>:1; </div>
<div class="line"><a name="l00333"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGC__Type.html#a05e4b98eeddfe34287a943d9fa865f5e"> 333</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGC__Type.html#a05e4b98eeddfe34287a943d9fa865f5e">CCL_</a>:1; </div>
<div class="line"><a name="l00334"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGC__Type.html#ad5e02e317c394fa5a913e6e646f02040"> 334</a></span>&#160; __I <a class="code" href="unionPAC__INTFLAGC__Type.html#ad5e02e317c394fa5a913e6e646f02040">uint32_t</a> :17; </div>
<div class="line"><a name="l00335"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGC__Type.html#a44f729d4775db31f48d9ffa214118989"> 335</a></span>&#160; } bit; </div>
<div class="line"><a name="l00336"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGC__Type.html#ae236ec8b8a9d57f74bd7198501411f8c"> 336</a></span>&#160; uint32_t <a class="code" href="unionPAC__INTFLAGC__Type.html#ae236ec8b8a9d57f74bd7198501411f8c">reg</a>; </div>
<div class="line"><a name="l00337"></a><span class="lineno"> 337</span>&#160;} <a class="code" href="unionPAC__INTFLAGC__Type.html">PAC_INTFLAGC_Type</a>;</div>
<div class="line"><a name="l00338"></a><span class="lineno"> 338</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00339"></a><span class="lineno"> 339</span>&#160; </div>
<div class="line"><a name="l00340"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a917dcc040608ffd02857a4f84194be21"> 340</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_OFFSET 0x1C </span></div>
<div class="line"><a name="l00341"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a2ce41e793355fdc0e3a1835e8ef29188"> 341</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00343"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a917262dc373844aabf0ccf4f5c6dbe97"> 343</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_CAN0_Pos 0 </span></div>
<div class="line"><a name="l00344"></a><span class="lineno"> 344</span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_CAN0 (_U_(0x1) &lt;&lt; PAC_INTFLAGC_CAN0_Pos)</span></div>
<div class="line"><a name="l00345"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ae07f74c392b43fb5f37ea84f6961d9d5"> 345</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_CAN1_Pos 1 </span></div>
<div class="line"><a name="l00346"></a><span class="lineno"> 346</span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_CAN1 (_U_(0x1) &lt;&lt; PAC_INTFLAGC_CAN1_Pos)</span></div>
<div class="line"><a name="l00347"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a37d890cc00f055efbc30bf8bb7a164e3"> 347</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_GMAC_Pos 2 </span></div>
<div class="line"><a name="l00348"></a><span class="lineno"> 348</span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_GMAC (_U_(0x1) &lt;&lt; PAC_INTFLAGC_GMAC_Pos)</span></div>
<div class="line"><a name="l00349"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a2a6694132bd55f596d80a23a5098e7a6"> 349</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_TCC2_Pos 3 </span></div>
<div class="line"><a name="l00350"></a><span class="lineno"> 350</span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_TCC2 (_U_(0x1) &lt;&lt; PAC_INTFLAGC_TCC2_Pos)</span></div>
<div class="line"><a name="l00351"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a0f618902a13efb8dadb63acb67b9b98e"> 351</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_TCC3_Pos 4 </span></div>
<div class="line"><a name="l00352"></a><span class="lineno"> 352</span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_TCC3 (_U_(0x1) &lt;&lt; PAC_INTFLAGC_TCC3_Pos)</span></div>
<div class="line"><a name="l00353"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a644540ca6bb514d5d388c2ea48e90baa"> 353</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_TC4_Pos 5 </span></div>
<div class="line"><a name="l00354"></a><span class="lineno"> 354</span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_TC4 (_U_(0x1) &lt;&lt; PAC_INTFLAGC_TC4_Pos)</span></div>
<div class="line"><a name="l00355"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a985a1983180b50bc944118ada684cb61"> 355</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_TC5_Pos 6 </span></div>
<div class="line"><a name="l00356"></a><span class="lineno"> 356</span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_TC5 (_U_(0x1) &lt;&lt; PAC_INTFLAGC_TC5_Pos)</span></div>
<div class="line"><a name="l00357"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a0c9398bc05b77ffe161a2a66274d20b1"> 357</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_PDEC_Pos 7 </span></div>
<div class="line"><a name="l00358"></a><span class="lineno"> 358</span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_PDEC (_U_(0x1) &lt;&lt; PAC_INTFLAGC_PDEC_Pos)</span></div>
<div class="line"><a name="l00359"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a3b312cbab7d99787dbb16d434e3707ae"> 359</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_AC_Pos 8 </span></div>
<div class="line"><a name="l00360"></a><span class="lineno"> 360</span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_AC (_U_(0x1) &lt;&lt; PAC_INTFLAGC_AC_Pos)</span></div>
<div class="line"><a name="l00361"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a907567b05744c1f2a034f8f730f72c47"> 361</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_AES_Pos 9 </span></div>
<div class="line"><a name="l00362"></a><span class="lineno"> 362</span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_AES (_U_(0x1) &lt;&lt; PAC_INTFLAGC_AES_Pos)</span></div>
<div class="line"><a name="l00363"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a22ee6ab690da90cff67b50a87c04ce59"> 363</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_TRNG_Pos 10 </span></div>
<div class="line"><a name="l00364"></a><span class="lineno"> 364</span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_TRNG (_U_(0x1) &lt;&lt; PAC_INTFLAGC_TRNG_Pos)</span></div>
<div class="line"><a name="l00365"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ae35f00083020b8e4fe95de4f8526eacc"> 365</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_ICM_Pos 11 </span></div>
<div class="line"><a name="l00366"></a><span class="lineno"> 366</span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_ICM (_U_(0x1) &lt;&lt; PAC_INTFLAGC_ICM_Pos)</span></div>
<div class="line"><a name="l00367"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a4b4e1cc111974efabc8ee622946dd447"> 367</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_PUKCC_Pos 12 </span></div>
<div class="line"><a name="l00368"></a><span class="lineno"> 368</span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_PUKCC (_U_(0x1) &lt;&lt; PAC_INTFLAGC_PUKCC_Pos)</span></div>
<div class="line"><a name="l00369"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ad1fa09e537e734f3c83b5e873fa179e5"> 369</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_QSPI_Pos 13 </span></div>
<div class="line"><a name="l00370"></a><span class="lineno"> 370</span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_QSPI (_U_(0x1) &lt;&lt; PAC_INTFLAGC_QSPI_Pos)</span></div>
<div class="line"><a name="l00371"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a9e6f8f32e165dffa33efb4999c8f9f3f"> 371</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_CCL_Pos 14 </span></div>
<div class="line"><a name="l00372"></a><span class="lineno"> 372</span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_CCL (_U_(0x1) &lt;&lt; PAC_INTFLAGC_CCL_Pos)</span></div>
<div class="line"><a name="l00373"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a4cce7e4ad8ae62263da0d09e97638410"> 373</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGC_MASK _U_(0x00007FFF) </span></div>
<div class="line"><a name="l00375"></a><span class="lineno"> 375</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PAC_INTFLAGD : (PAC Offset: 0x20) (R/W 32) Peripheral interrupt flag status - Bridge D -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00376"></a><span class="lineno"> 376</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00377"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGD__Type.html"> 377</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{ <span class="comment">// __I to avoid read-modify-write on write-to-clear register</span></div>
<div class="line"><a name="l00378"></a><span class="lineno"> 378</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00379"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGD__Type.html#a966704eb1cee1b8be9de6a67ba297324"> 379</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGD__Type.html#a966704eb1cee1b8be9de6a67ba297324">SERCOM4_</a>:1; </div>
<div class="line"><a name="l00380"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGD__Type.html#a2ed7d13d59aa2ef7c00ae44092e6fa2d"> 380</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGD__Type.html#a2ed7d13d59aa2ef7c00ae44092e6fa2d">SERCOM5_</a>:1; </div>
<div class="line"><a name="l00381"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGD__Type.html#a28ca84661663e359d029690a111697ab"> 381</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGD__Type.html#a28ca84661663e359d029690a111697ab">SERCOM6_</a>:1; </div>
<div class="line"><a name="l00382"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGD__Type.html#aca179dde58f3ff1f0cc029701b487add"> 382</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGD__Type.html#aca179dde58f3ff1f0cc029701b487add">SERCOM7_</a>:1; </div>
<div class="line"><a name="l00383"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGD__Type.html#a441228b1e4585ee22dd24744f7d7f21d"> 383</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGD__Type.html#a441228b1e4585ee22dd24744f7d7f21d">TCC4_</a>:1; </div>
<div class="line"><a name="l00384"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGD__Type.html#ad6512d05650fcc3d8e305e2365402911"> 384</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGD__Type.html#ad6512d05650fcc3d8e305e2365402911">TC6_</a>:1; </div>
<div class="line"><a name="l00385"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGD__Type.html#ae3bc8b5a1fb9ff5366701d71582ee39f"> 385</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGD__Type.html#ae3bc8b5a1fb9ff5366701d71582ee39f">TC7_</a>:1; </div>
<div class="line"><a name="l00386"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGD__Type.html#a8ed92cc6f5f114f82bf3f77f6a9f602f"> 386</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGD__Type.html#a8ed92cc6f5f114f82bf3f77f6a9f602f">ADC0_</a>:1; </div>
<div class="line"><a name="l00387"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGD__Type.html#a07dc277b04812483b5461236ce1e3b2d"> 387</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGD__Type.html#a07dc277b04812483b5461236ce1e3b2d">ADC1_</a>:1; </div>
<div class="line"><a name="l00388"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGD__Type.html#a18fbc6fd875a11949d5bea5a39369d88"> 388</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGD__Type.html#a18fbc6fd875a11949d5bea5a39369d88">DAC_</a>:1; </div>
<div class="line"><a name="l00389"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGD__Type.html#a73e6c998d7f7c1e9a8224bee7541d16b"> 389</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGD__Type.html#a73e6c998d7f7c1e9a8224bee7541d16b">I2S_</a>:1; </div>
<div class="line"><a name="l00390"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGD__Type.html#ad0a850c671e07d56fa9a253fdd994389"> 390</a></span>&#160; __I uint32_t <a class="code" href="unionPAC__INTFLAGD__Type.html#ad0a850c671e07d56fa9a253fdd994389">PCC_</a>:1; </div>
<div class="line"><a name="l00391"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGD__Type.html#ac2c56b9e111a6dbbfde71ebd541438b0"> 391</a></span>&#160; __I <a class="code" href="unionPAC__INTFLAGD__Type.html#ac2c56b9e111a6dbbfde71ebd541438b0">uint32_t</a> :20; </div>
<div class="line"><a name="l00392"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGD__Type.html#abe6370339a7289d51c8ff465a0e5c33f"> 392</a></span>&#160; } bit; </div>
<div class="line"><a name="l00393"></a><span class="lineno"><a class="line" href="unionPAC__INTFLAGD__Type.html#a8fc29f2d08e3860cb46efaa9bea5264a"> 393</a></span>&#160; uint32_t <a class="code" href="unionPAC__INTFLAGD__Type.html#a8fc29f2d08e3860cb46efaa9bea5264a">reg</a>; </div>
<div class="line"><a name="l00394"></a><span class="lineno"> 394</span>&#160;} <a class="code" href="unionPAC__INTFLAGD__Type.html">PAC_INTFLAGD_Type</a>;</div>
<div class="line"><a name="l00395"></a><span class="lineno"> 395</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00396"></a><span class="lineno"> 396</span>&#160; </div>
<div class="line"><a name="l00397"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a970cb6a03ee41e86ce0fb8a9304f7536"> 397</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_OFFSET 0x20 </span></div>
<div class="line"><a name="l00398"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a2f043f534d182198a69716a088028e25"> 398</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00400"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a3210ae29e51aca63c3a78b61b6f83004"> 400</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_SERCOM4_Pos 0 </span></div>
<div class="line"><a name="l00401"></a><span class="lineno"> 401</span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_SERCOM4 (_U_(0x1) &lt;&lt; PAC_INTFLAGD_SERCOM4_Pos)</span></div>
<div class="line"><a name="l00402"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a859b551a7a65676a62c4964dd642024d"> 402</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_SERCOM5_Pos 1 </span></div>
<div class="line"><a name="l00403"></a><span class="lineno"> 403</span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_SERCOM5 (_U_(0x1) &lt;&lt; PAC_INTFLAGD_SERCOM5_Pos)</span></div>
<div class="line"><a name="l00404"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a5f9eaecd31eb71cc78608f392a208a19"> 404</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_SERCOM6_Pos 2 </span></div>
<div class="line"><a name="l00405"></a><span class="lineno"> 405</span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_SERCOM6 (_U_(0x1) &lt;&lt; PAC_INTFLAGD_SERCOM6_Pos)</span></div>
<div class="line"><a name="l00406"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a1c4d2453abf7d7344408b218cb5b421a"> 406</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_SERCOM7_Pos 3 </span></div>
<div class="line"><a name="l00407"></a><span class="lineno"> 407</span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_SERCOM7 (_U_(0x1) &lt;&lt; PAC_INTFLAGD_SERCOM7_Pos)</span></div>
<div class="line"><a name="l00408"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a6e9dcacc894f1df55e8ac936b4561adf"> 408</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_TCC4_Pos 4 </span></div>
<div class="line"><a name="l00409"></a><span class="lineno"> 409</span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_TCC4 (_U_(0x1) &lt;&lt; PAC_INTFLAGD_TCC4_Pos)</span></div>
<div class="line"><a name="l00410"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a1e8acb166ea1fbb9070da2aadf73de89"> 410</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_TC6_Pos 5 </span></div>
<div class="line"><a name="l00411"></a><span class="lineno"> 411</span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_TC6 (_U_(0x1) &lt;&lt; PAC_INTFLAGD_TC6_Pos)</span></div>
<div class="line"><a name="l00412"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a43970fd1fa484747dd031eed074c90bc"> 412</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_TC7_Pos 6 </span></div>
<div class="line"><a name="l00413"></a><span class="lineno"> 413</span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_TC7 (_U_(0x1) &lt;&lt; PAC_INTFLAGD_TC7_Pos)</span></div>
<div class="line"><a name="l00414"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#adff8945ccfe2d44f10e627e11449e073"> 414</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_ADC0_Pos 7 </span></div>
<div class="line"><a name="l00415"></a><span class="lineno"> 415</span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_ADC0 (_U_(0x1) &lt;&lt; PAC_INTFLAGD_ADC0_Pos)</span></div>
<div class="line"><a name="l00416"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ac37bf65b33a3e5b79bb410274227f318"> 416</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_ADC1_Pos 8 </span></div>
<div class="line"><a name="l00417"></a><span class="lineno"> 417</span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_ADC1 (_U_(0x1) &lt;&lt; PAC_INTFLAGD_ADC1_Pos)</span></div>
<div class="line"><a name="l00418"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a184d8e7a4b4c35b55b39b6eda941e6d8"> 418</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_DAC_Pos 9 </span></div>
<div class="line"><a name="l00419"></a><span class="lineno"> 419</span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_DAC (_U_(0x1) &lt;&lt; PAC_INTFLAGD_DAC_Pos)</span></div>
<div class="line"><a name="l00420"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a715467d3566531bbe0d8428ddca72cce"> 420</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_I2S_Pos 10 </span></div>
<div class="line"><a name="l00421"></a><span class="lineno"> 421</span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_I2S (_U_(0x1) &lt;&lt; PAC_INTFLAGD_I2S_Pos)</span></div>
<div class="line"><a name="l00422"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ada97744e3e2c672b104f964a6960df26"> 422</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_PCC_Pos 11 </span></div>
<div class="line"><a name="l00423"></a><span class="lineno"> 423</span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_PCC (_U_(0x1) &lt;&lt; PAC_INTFLAGD_PCC_Pos)</span></div>
<div class="line"><a name="l00424"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ab3623c4757ea9825019449fc16c83644"> 424</a></span>&#160;<span class="preprocessor">#define PAC_INTFLAGD_MASK _U_(0x00000FFF) </span></div>
<div class="line"><a name="l00426"></a><span class="lineno"> 426</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PAC_STATUSA : (PAC Offset: 0x34) (R/ 32) Peripheral write protection status - Bridge A -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00427"></a><span class="lineno"> 427</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00428"></a><span class="lineno"><a class="line" href="unionPAC__STATUSA__Type.html"> 428</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00429"></a><span class="lineno"> 429</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00430"></a><span class="lineno"><a class="line" href="unionPAC__STATUSA__Type.html#ad72331de1a7eb1f25850ed105b6e38d4"> 430</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSA__Type.html#ad72331de1a7eb1f25850ed105b6e38d4">PAC_</a>:1; </div>
<div class="line"><a name="l00431"></a><span class="lineno"><a class="line" href="unionPAC__STATUSA__Type.html#a4a4e57cceb0c24c85cb62e58d021bbfc"> 431</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSA__Type.html#a4a4e57cceb0c24c85cb62e58d021bbfc">PM_</a>:1; </div>
<div class="line"><a name="l00432"></a><span class="lineno"><a class="line" href="unionPAC__STATUSA__Type.html#a56c3d6356e4728df39cdf842cd3f5883"> 432</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSA__Type.html#a56c3d6356e4728df39cdf842cd3f5883">MCLK_</a>:1; </div>
<div class="line"><a name="l00433"></a><span class="lineno"><a class="line" href="unionPAC__STATUSA__Type.html#a5650c046300e98cd8fd5759c65eeac70"> 433</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSA__Type.html#a5650c046300e98cd8fd5759c65eeac70">RSTC_</a>:1; </div>
<div class="line"><a name="l00434"></a><span class="lineno"><a class="line" href="unionPAC__STATUSA__Type.html#aca0419c15c216c75000c20dc5df2d967"> 434</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSA__Type.html#aca0419c15c216c75000c20dc5df2d967">OSCCTRL_</a>:1; </div>
<div class="line"><a name="l00435"></a><span class="lineno"><a class="line" href="unionPAC__STATUSA__Type.html#a3d7062cb7b01559c3ade53a550b16d9d"> 435</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSA__Type.html#a3d7062cb7b01559c3ade53a550b16d9d">OSC32KCTRL_</a>:1; </div>
<div class="line"><a name="l00436"></a><span class="lineno"><a class="line" href="unionPAC__STATUSA__Type.html#a631d9236e06650f3ebf513995836c364"> 436</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSA__Type.html#a631d9236e06650f3ebf513995836c364">SUPC_</a>:1; </div>
<div class="line"><a name="l00437"></a><span class="lineno"><a class="line" href="unionPAC__STATUSA__Type.html#a67e9683546f09097d5aee589e92ae650"> 437</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSA__Type.html#a67e9683546f09097d5aee589e92ae650">GCLK_</a>:1; </div>
<div class="line"><a name="l00438"></a><span class="lineno"><a class="line" href="unionPAC__STATUSA__Type.html#a782fa17ee6ead608e2ab401072a97ede"> 438</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSA__Type.html#a782fa17ee6ead608e2ab401072a97ede">WDT_</a>:1; </div>
<div class="line"><a name="l00439"></a><span class="lineno"><a class="line" href="unionPAC__STATUSA__Type.html#add0063090a8840c42a2e365b86148d38"> 439</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSA__Type.html#add0063090a8840c42a2e365b86148d38">RTC_</a>:1; </div>
<div class="line"><a name="l00440"></a><span class="lineno"><a class="line" href="unionPAC__STATUSA__Type.html#a1f5dabc0c375e37909e9d27a2f3f8789"> 440</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSA__Type.html#a1f5dabc0c375e37909e9d27a2f3f8789">EIC_</a>:1; </div>
<div class="line"><a name="l00441"></a><span class="lineno"><a class="line" href="unionPAC__STATUSA__Type.html#a2fcc6b477e51fefc9f457effc0c61c04"> 441</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSA__Type.html#a2fcc6b477e51fefc9f457effc0c61c04">FREQM_</a>:1; </div>
<div class="line"><a name="l00442"></a><span class="lineno"><a class="line" href="unionPAC__STATUSA__Type.html#ae34e5714daff5891866834cc8e67437d"> 442</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSA__Type.html#ae34e5714daff5891866834cc8e67437d">SERCOM0_</a>:1; </div>
<div class="line"><a name="l00443"></a><span class="lineno"><a class="line" href="unionPAC__STATUSA__Type.html#a6832f4a521c2ab7a99bb9a858859a25a"> 443</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSA__Type.html#a6832f4a521c2ab7a99bb9a858859a25a">SERCOM1_</a>:1; </div>
<div class="line"><a name="l00444"></a><span class="lineno"><a class="line" href="unionPAC__STATUSA__Type.html#a883b5beb94ad41135a8a7a6c08d9ae42"> 444</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSA__Type.html#a883b5beb94ad41135a8a7a6c08d9ae42">TC0_</a>:1; </div>
<div class="line"><a name="l00445"></a><span class="lineno"><a class="line" href="unionPAC__STATUSA__Type.html#af38bbc749443f8c5219b5bdd1d8452c6"> 445</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSA__Type.html#af38bbc749443f8c5219b5bdd1d8452c6">TC1_</a>:1; </div>
<div class="line"><a name="l00446"></a><span class="lineno"><a class="line" href="unionPAC__STATUSA__Type.html#a90628eb04e11675c1b472afbabe4230d"> 446</a></span>&#160; uint32_t :16; </div>
<div class="line"><a name="l00447"></a><span class="lineno"><a class="line" href="unionPAC__STATUSA__Type.html#a7337909329354d1c5cbbf482892ec0bd"> 447</a></span>&#160; } bit; </div>
<div class="line"><a name="l00448"></a><span class="lineno"><a class="line" href="unionPAC__STATUSA__Type.html#a71db262dfdd7bf0e7e95a179e4cfaaf2"> 448</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSA__Type.html#a71db262dfdd7bf0e7e95a179e4cfaaf2">reg</a>; </div>
<div class="line"><a name="l00449"></a><span class="lineno"> 449</span>&#160;} <a class="code" href="unionPAC__STATUSA__Type.html">PAC_STATUSA_Type</a>;</div>
<div class="line"><a name="l00450"></a><span class="lineno"> 450</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00451"></a><span class="lineno"> 451</span>&#160; </div>
<div class="line"><a name="l00452"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#abf62b1837716a321c16770a76d164572"> 452</a></span>&#160;<span class="preprocessor">#define PAC_STATUSA_OFFSET 0x34 </span></div>
<div class="line"><a name="l00453"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a2183163da5a36f6ead159c41fc6b9ac4"> 453</a></span>&#160;<span class="preprocessor">#define PAC_STATUSA_RESETVALUE _U_(0x00010000) </span></div>
<div class="line"><a name="l00455"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a55556e01c92a8676a1619a17da62341f"> 455</a></span>&#160;<span class="preprocessor">#define PAC_STATUSA_PAC_Pos 0 </span></div>
<div class="line"><a name="l00456"></a><span class="lineno"> 456</span>&#160;<span class="preprocessor">#define PAC_STATUSA_PAC (_U_(0x1) &lt;&lt; PAC_STATUSA_PAC_Pos)</span></div>
<div class="line"><a name="l00457"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a2d5148e0330671373476773f906f94ac"> 457</a></span>&#160;<span class="preprocessor">#define PAC_STATUSA_PM_Pos 1 </span></div>
<div class="line"><a name="l00458"></a><span class="lineno"> 458</span>&#160;<span class="preprocessor">#define PAC_STATUSA_PM (_U_(0x1) &lt;&lt; PAC_STATUSA_PM_Pos)</span></div>
<div class="line"><a name="l00459"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a360a83771977e030a6fd87157c6bc13e"> 459</a></span>&#160;<span class="preprocessor">#define PAC_STATUSA_MCLK_Pos 2 </span></div>
<div class="line"><a name="l00460"></a><span class="lineno"> 460</span>&#160;<span class="preprocessor">#define PAC_STATUSA_MCLK (_U_(0x1) &lt;&lt; PAC_STATUSA_MCLK_Pos)</span></div>
<div class="line"><a name="l00461"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a72d085783a9e1a35516e156489fc8857"> 461</a></span>&#160;<span class="preprocessor">#define PAC_STATUSA_RSTC_Pos 3 </span></div>
<div class="line"><a name="l00462"></a><span class="lineno"> 462</span>&#160;<span class="preprocessor">#define PAC_STATUSA_RSTC (_U_(0x1) &lt;&lt; PAC_STATUSA_RSTC_Pos)</span></div>
<div class="line"><a name="l00463"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ac28b45c8a797fc8f3ec4a3727441faa1"> 463</a></span>&#160;<span class="preprocessor">#define PAC_STATUSA_OSCCTRL_Pos 4 </span></div>
<div class="line"><a name="l00464"></a><span class="lineno"> 464</span>&#160;<span class="preprocessor">#define PAC_STATUSA_OSCCTRL (_U_(0x1) &lt;&lt; PAC_STATUSA_OSCCTRL_Pos)</span></div>
<div class="line"><a name="l00465"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ac6bf26d952a01ac692e8542aac25052d"> 465</a></span>&#160;<span class="preprocessor">#define PAC_STATUSA_OSC32KCTRL_Pos 5 </span></div>
<div class="line"><a name="l00466"></a><span class="lineno"> 466</span>&#160;<span class="preprocessor">#define PAC_STATUSA_OSC32KCTRL (_U_(0x1) &lt;&lt; PAC_STATUSA_OSC32KCTRL_Pos)</span></div>
<div class="line"><a name="l00467"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a82dcca6147d2ad915db3d11ff146ee31"> 467</a></span>&#160;<span class="preprocessor">#define PAC_STATUSA_SUPC_Pos 6 </span></div>
<div class="line"><a name="l00468"></a><span class="lineno"> 468</span>&#160;<span class="preprocessor">#define PAC_STATUSA_SUPC (_U_(0x1) &lt;&lt; PAC_STATUSA_SUPC_Pos)</span></div>
<div class="line"><a name="l00469"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a0c584cd3a88f683cc7c93e9d1910caf5"> 469</a></span>&#160;<span class="preprocessor">#define PAC_STATUSA_GCLK_Pos 7 </span></div>
<div class="line"><a name="l00470"></a><span class="lineno"> 470</span>&#160;<span class="preprocessor">#define PAC_STATUSA_GCLK (_U_(0x1) &lt;&lt; PAC_STATUSA_GCLK_Pos)</span></div>
<div class="line"><a name="l00471"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a15676949922ed43796d9045298acc87e"> 471</a></span>&#160;<span class="preprocessor">#define PAC_STATUSA_WDT_Pos 8 </span></div>
<div class="line"><a name="l00472"></a><span class="lineno"> 472</span>&#160;<span class="preprocessor">#define PAC_STATUSA_WDT (_U_(0x1) &lt;&lt; PAC_STATUSA_WDT_Pos)</span></div>
<div class="line"><a name="l00473"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ac4930d9957067b060b9708721a4b1ef5"> 473</a></span>&#160;<span class="preprocessor">#define PAC_STATUSA_RTC_Pos 9 </span></div>
<div class="line"><a name="l00474"></a><span class="lineno"> 474</span>&#160;<span class="preprocessor">#define PAC_STATUSA_RTC (_U_(0x1) &lt;&lt; PAC_STATUSA_RTC_Pos)</span></div>
<div class="line"><a name="l00475"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a7c818bfff34cd0f8531ef638fb892ac8"> 475</a></span>&#160;<span class="preprocessor">#define PAC_STATUSA_EIC_Pos 10 </span></div>
<div class="line"><a name="l00476"></a><span class="lineno"> 476</span>&#160;<span class="preprocessor">#define PAC_STATUSA_EIC (_U_(0x1) &lt;&lt; PAC_STATUSA_EIC_Pos)</span></div>
<div class="line"><a name="l00477"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ac52e43ac8e73d290d36a3183d39ff9ea"> 477</a></span>&#160;<span class="preprocessor">#define PAC_STATUSA_FREQM_Pos 11 </span></div>
<div class="line"><a name="l00478"></a><span class="lineno"> 478</span>&#160;<span class="preprocessor">#define PAC_STATUSA_FREQM (_U_(0x1) &lt;&lt; PAC_STATUSA_FREQM_Pos)</span></div>
<div class="line"><a name="l00479"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a6241ab4b1b6bb665a97ea5ac30687b62"> 479</a></span>&#160;<span class="preprocessor">#define PAC_STATUSA_SERCOM0_Pos 12 </span></div>
<div class="line"><a name="l00480"></a><span class="lineno"> 480</span>&#160;<span class="preprocessor">#define PAC_STATUSA_SERCOM0 (_U_(0x1) &lt;&lt; PAC_STATUSA_SERCOM0_Pos)</span></div>
<div class="line"><a name="l00481"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a7ac90d6cc394d96fd4af6747a99f553d"> 481</a></span>&#160;<span class="preprocessor">#define PAC_STATUSA_SERCOM1_Pos 13 </span></div>
<div class="line"><a name="l00482"></a><span class="lineno"> 482</span>&#160;<span class="preprocessor">#define PAC_STATUSA_SERCOM1 (_U_(0x1) &lt;&lt; PAC_STATUSA_SERCOM1_Pos)</span></div>
<div class="line"><a name="l00483"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a2ca558e11003eab65cdc49280ba7dc03"> 483</a></span>&#160;<span class="preprocessor">#define PAC_STATUSA_TC0_Pos 14 </span></div>
<div class="line"><a name="l00484"></a><span class="lineno"> 484</span>&#160;<span class="preprocessor">#define PAC_STATUSA_TC0 (_U_(0x1) &lt;&lt; PAC_STATUSA_TC0_Pos)</span></div>
<div class="line"><a name="l00485"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ad1f2672434ed1f9553c110ef9ec70662"> 485</a></span>&#160;<span class="preprocessor">#define PAC_STATUSA_TC1_Pos 15 </span></div>
<div class="line"><a name="l00486"></a><span class="lineno"> 486</span>&#160;<span class="preprocessor">#define PAC_STATUSA_TC1 (_U_(0x1) &lt;&lt; PAC_STATUSA_TC1_Pos)</span></div>
<div class="line"><a name="l00487"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a77188759f505eb879ab21ee88f0664e5"> 487</a></span>&#160;<span class="preprocessor">#define PAC_STATUSA_MASK _U_(0x0000FFFF) </span></div>
<div class="line"><a name="l00489"></a><span class="lineno"> 489</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PAC_STATUSB : (PAC Offset: 0x38) (R/ 32) Peripheral write protection status - Bridge B -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00490"></a><span class="lineno"> 490</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00491"></a><span class="lineno"><a class="line" href="unionPAC__STATUSB__Type.html"> 491</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00492"></a><span class="lineno"> 492</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00493"></a><span class="lineno"><a class="line" href="unionPAC__STATUSB__Type.html#a2d0ab2400b7aef04fe1d7374abab6270"> 493</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSB__Type.html#a2d0ab2400b7aef04fe1d7374abab6270">USB_</a>:1; </div>
<div class="line"><a name="l00494"></a><span class="lineno"><a class="line" href="unionPAC__STATUSB__Type.html#aed81a22b8a549d464b65d4312d6a7579"> 494</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSB__Type.html#aed81a22b8a549d464b65d4312d6a7579">DSU_</a>:1; </div>
<div class="line"><a name="l00495"></a><span class="lineno"><a class="line" href="unionPAC__STATUSB__Type.html#a7ca7d7fd80bac2ffe7dcccacd05a5544"> 495</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSB__Type.html#a7ca7d7fd80bac2ffe7dcccacd05a5544">NVMCTRL_</a>:1; </div>
<div class="line"><a name="l00496"></a><span class="lineno"><a class="line" href="unionPAC__STATUSB__Type.html#a87dd2f4e0b864ec0843cfbeb3c42138a"> 496</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSB__Type.html#a87dd2f4e0b864ec0843cfbeb3c42138a">CMCC_</a>:1; </div>
<div class="line"><a name="l00497"></a><span class="lineno"><a class="line" href="unionPAC__STATUSB__Type.html#ae2a5ca7f0afb759aad4adc6b8f020f7e"> 497</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSB__Type.html#ae2a5ca7f0afb759aad4adc6b8f020f7e">PORT_</a>:1; </div>
<div class="line"><a name="l00498"></a><span class="lineno"><a class="line" href="unionPAC__STATUSB__Type.html#ab45344bf7c3a6b14b9ea65f4a9963433"> 498</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSB__Type.html#ab45344bf7c3a6b14b9ea65f4a9963433">DMAC_</a>:1; </div>
<div class="line"><a name="l00499"></a><span class="lineno"><a class="line" href="unionPAC__STATUSB__Type.html#a7d5683e6a305f2892c2c5c67e942d9df"> 499</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSB__Type.html#a7d5683e6a305f2892c2c5c67e942d9df">HMATRIX_</a>:1; </div>
<div class="line"><a name="l00500"></a><span class="lineno"><a class="line" href="unionPAC__STATUSB__Type.html#a954780964e038ef0e857007459bc1468"> 500</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSB__Type.html#a954780964e038ef0e857007459bc1468">EVSYS_</a>:1; </div>
<div class="line"><a name="l00501"></a><span class="lineno"><a class="line" href="unionPAC__STATUSB__Type.html#a55c2e7508ece546f13fa4a850675b8d1"> 501</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00502"></a><span class="lineno"><a class="line" href="unionPAC__STATUSB__Type.html#a4ac1bbd409a772332c60ceb4d5ffce7b"> 502</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSB__Type.html#a4ac1bbd409a772332c60ceb4d5ffce7b">SERCOM2_</a>:1; </div>
<div class="line"><a name="l00503"></a><span class="lineno"><a class="line" href="unionPAC__STATUSB__Type.html#a72a1ffd904ae6e4f55f15777753c8f29"> 503</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSB__Type.html#a72a1ffd904ae6e4f55f15777753c8f29">SERCOM3_</a>:1; </div>
<div class="line"><a name="l00504"></a><span class="lineno"><a class="line" href="unionPAC__STATUSB__Type.html#aa7cae59f679fd823875f111a750f60fb"> 504</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSB__Type.html#aa7cae59f679fd823875f111a750f60fb">TCC0_</a>:1; </div>
<div class="line"><a name="l00505"></a><span class="lineno"><a class="line" href="unionPAC__STATUSB__Type.html#a0a0d8a5ea1112797c973f7f557e2762c"> 505</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSB__Type.html#a0a0d8a5ea1112797c973f7f557e2762c">TCC1_</a>:1; </div>
<div class="line"><a name="l00506"></a><span class="lineno"><a class="line" href="unionPAC__STATUSB__Type.html#a10bf937b659e19bdf05166ebb4da6bfd"> 506</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSB__Type.html#a10bf937b659e19bdf05166ebb4da6bfd">TC2_</a>:1; </div>
<div class="line"><a name="l00507"></a><span class="lineno"><a class="line" href="unionPAC__STATUSB__Type.html#a28105d726409b1bdce18db79aba0f3fd"> 507</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSB__Type.html#a28105d726409b1bdce18db79aba0f3fd">TC3_</a>:1; </div>
<div class="line"><a name="l00508"></a><span class="lineno"><a class="line" href="unionPAC__STATUSB__Type.html#af43601db99c76d060ffa74b63b0d009e"> 508</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00509"></a><span class="lineno"><a class="line" href="unionPAC__STATUSB__Type.html#a01955777cbb20e7f676b2ba48d9ad205"> 509</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSB__Type.html#a01955777cbb20e7f676b2ba48d9ad205">RAMECC_</a>:1; </div>
<div class="line"><a name="l00510"></a><span class="lineno"><a class="line" href="unionPAC__STATUSB__Type.html#a4fc89cae45a6f5bfb2ccb4294fcb3f04"> 510</a></span>&#160; uint32_t :15; </div>
<div class="line"><a name="l00511"></a><span class="lineno"><a class="line" href="unionPAC__STATUSB__Type.html#a965fd71bc841588c7451005abe744f21"> 511</a></span>&#160; } bit; </div>
<div class="line"><a name="l00512"></a><span class="lineno"><a class="line" href="unionPAC__STATUSB__Type.html#a726065f557c17b1c1e828cbbcad5a1c2"> 512</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSB__Type.html#a726065f557c17b1c1e828cbbcad5a1c2">reg</a>; </div>
<div class="line"><a name="l00513"></a><span class="lineno"> 513</span>&#160;} <a class="code" href="unionPAC__STATUSB__Type.html">PAC_STATUSB_Type</a>;</div>
<div class="line"><a name="l00514"></a><span class="lineno"> 514</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00515"></a><span class="lineno"> 515</span>&#160; </div>
<div class="line"><a name="l00516"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a409ce85984018c2a3999703ec840ec74"> 516</a></span>&#160;<span class="preprocessor">#define PAC_STATUSB_OFFSET 0x38 </span></div>
<div class="line"><a name="l00517"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a48f2e5152a65d63751ffbc7b321bb1c7"> 517</a></span>&#160;<span class="preprocessor">#define PAC_STATUSB_RESETVALUE _U_(0x00000002) </span></div>
<div class="line"><a name="l00519"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a7ce1c5b0369c93a4ea6f8d4c06d08566"> 519</a></span>&#160;<span class="preprocessor">#define PAC_STATUSB_USB_Pos 0 </span></div>
<div class="line"><a name="l00520"></a><span class="lineno"> 520</span>&#160;<span class="preprocessor">#define PAC_STATUSB_USB (_U_(0x1) &lt;&lt; PAC_STATUSB_USB_Pos)</span></div>
<div class="line"><a name="l00521"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#af88bb5b688043911841541b2af4fb66c"> 521</a></span>&#160;<span class="preprocessor">#define PAC_STATUSB_DSU_Pos 1 </span></div>
<div class="line"><a name="l00522"></a><span class="lineno"> 522</span>&#160;<span class="preprocessor">#define PAC_STATUSB_DSU (_U_(0x1) &lt;&lt; PAC_STATUSB_DSU_Pos)</span></div>
<div class="line"><a name="l00523"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ae4de2b760c743f5e657e089cf946f643"> 523</a></span>&#160;<span class="preprocessor">#define PAC_STATUSB_NVMCTRL_Pos 2 </span></div>
<div class="line"><a name="l00524"></a><span class="lineno"> 524</span>&#160;<span class="preprocessor">#define PAC_STATUSB_NVMCTRL (_U_(0x1) &lt;&lt; PAC_STATUSB_NVMCTRL_Pos)</span></div>
<div class="line"><a name="l00525"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ad3d549c5010de857fbe7fd989dd4af95"> 525</a></span>&#160;<span class="preprocessor">#define PAC_STATUSB_CMCC_Pos 3 </span></div>
<div class="line"><a name="l00526"></a><span class="lineno"> 526</span>&#160;<span class="preprocessor">#define PAC_STATUSB_CMCC (_U_(0x1) &lt;&lt; PAC_STATUSB_CMCC_Pos)</span></div>
<div class="line"><a name="l00527"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#aeb6b89e131cf154223c6a719c71769c0"> 527</a></span>&#160;<span class="preprocessor">#define PAC_STATUSB_PORT_Pos 4 </span></div>
<div class="line"><a name="l00528"></a><span class="lineno"> 528</span>&#160;<span class="preprocessor">#define PAC_STATUSB_PORT (_U_(0x1) &lt;&lt; PAC_STATUSB_PORT_Pos)</span></div>
<div class="line"><a name="l00529"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ae37430904450761ec32c29797e83f65f"> 529</a></span>&#160;<span class="preprocessor">#define PAC_STATUSB_DMAC_Pos 5 </span></div>
<div class="line"><a name="l00530"></a><span class="lineno"> 530</span>&#160;<span class="preprocessor">#define PAC_STATUSB_DMAC (_U_(0x1) &lt;&lt; PAC_STATUSB_DMAC_Pos)</span></div>
<div class="line"><a name="l00531"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a10345e72dc01970669faf4c3ba761629"> 531</a></span>&#160;<span class="preprocessor">#define PAC_STATUSB_HMATRIX_Pos 6 </span></div>
<div class="line"><a name="l00532"></a><span class="lineno"> 532</span>&#160;<span class="preprocessor">#define PAC_STATUSB_HMATRIX (_U_(0x1) &lt;&lt; PAC_STATUSB_HMATRIX_Pos)</span></div>
<div class="line"><a name="l00533"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a8cd29522b0eaab8751a42563d154c461"> 533</a></span>&#160;<span class="preprocessor">#define PAC_STATUSB_EVSYS_Pos 7 </span></div>
<div class="line"><a name="l00534"></a><span class="lineno"> 534</span>&#160;<span class="preprocessor">#define PAC_STATUSB_EVSYS (_U_(0x1) &lt;&lt; PAC_STATUSB_EVSYS_Pos)</span></div>
<div class="line"><a name="l00535"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a91b417e5663fd4b036aac084a44eb0d3"> 535</a></span>&#160;<span class="preprocessor">#define PAC_STATUSB_SERCOM2_Pos 9 </span></div>
<div class="line"><a name="l00536"></a><span class="lineno"> 536</span>&#160;<span class="preprocessor">#define PAC_STATUSB_SERCOM2 (_U_(0x1) &lt;&lt; PAC_STATUSB_SERCOM2_Pos)</span></div>
<div class="line"><a name="l00537"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a69545d07be486628aab7a9b86c9e8baf"> 537</a></span>&#160;<span class="preprocessor">#define PAC_STATUSB_SERCOM3_Pos 10 </span></div>
<div class="line"><a name="l00538"></a><span class="lineno"> 538</span>&#160;<span class="preprocessor">#define PAC_STATUSB_SERCOM3 (_U_(0x1) &lt;&lt; PAC_STATUSB_SERCOM3_Pos)</span></div>
<div class="line"><a name="l00539"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ade543721a30cc90b1ec4ce12d4eb5db6"> 539</a></span>&#160;<span class="preprocessor">#define PAC_STATUSB_TCC0_Pos 11 </span></div>
<div class="line"><a name="l00540"></a><span class="lineno"> 540</span>&#160;<span class="preprocessor">#define PAC_STATUSB_TCC0 (_U_(0x1) &lt;&lt; PAC_STATUSB_TCC0_Pos)</span></div>
<div class="line"><a name="l00541"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ae2f886996252b7676d4bab6fc263e081"> 541</a></span>&#160;<span class="preprocessor">#define PAC_STATUSB_TCC1_Pos 12 </span></div>
<div class="line"><a name="l00542"></a><span class="lineno"> 542</span>&#160;<span class="preprocessor">#define PAC_STATUSB_TCC1 (_U_(0x1) &lt;&lt; PAC_STATUSB_TCC1_Pos)</span></div>
<div class="line"><a name="l00543"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ad9937d8cf412170449532532e1263350"> 543</a></span>&#160;<span class="preprocessor">#define PAC_STATUSB_TC2_Pos 13 </span></div>
<div class="line"><a name="l00544"></a><span class="lineno"> 544</span>&#160;<span class="preprocessor">#define PAC_STATUSB_TC2 (_U_(0x1) &lt;&lt; PAC_STATUSB_TC2_Pos)</span></div>
<div class="line"><a name="l00545"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a8cd2a5f7f8f7a0a87d276290f5fd6420"> 545</a></span>&#160;<span class="preprocessor">#define PAC_STATUSB_TC3_Pos 14 </span></div>
<div class="line"><a name="l00546"></a><span class="lineno"> 546</span>&#160;<span class="preprocessor">#define PAC_STATUSB_TC3 (_U_(0x1) &lt;&lt; PAC_STATUSB_TC3_Pos)</span></div>
<div class="line"><a name="l00547"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a002ed25ab9e98095589f46d72748cfe2"> 547</a></span>&#160;<span class="preprocessor">#define PAC_STATUSB_RAMECC_Pos 16 </span></div>
<div class="line"><a name="l00548"></a><span class="lineno"> 548</span>&#160;<span class="preprocessor">#define PAC_STATUSB_RAMECC (_U_(0x1) &lt;&lt; PAC_STATUSB_RAMECC_Pos)</span></div>
<div class="line"><a name="l00549"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a306c5aba8594220dc52ae9928658e191"> 549</a></span>&#160;<span class="preprocessor">#define PAC_STATUSB_MASK _U_(0x00017EFF) </span></div>
<div class="line"><a name="l00551"></a><span class="lineno"> 551</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PAC_STATUSC : (PAC Offset: 0x3C) (R/ 32) Peripheral write protection status - Bridge C -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00552"></a><span class="lineno"> 552</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00553"></a><span class="lineno"><a class="line" href="unionPAC__STATUSC__Type.html"> 553</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00554"></a><span class="lineno"> 554</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00555"></a><span class="lineno"><a class="line" href="unionPAC__STATUSC__Type.html#af8075cddccfd06a862d99fd1cedd2519"> 555</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSC__Type.html#af8075cddccfd06a862d99fd1cedd2519">CAN0_</a>:1; </div>
<div class="line"><a name="l00556"></a><span class="lineno"><a class="line" href="unionPAC__STATUSC__Type.html#aef37dec4312e0676d0f45ec905c782a7"> 556</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSC__Type.html#aef37dec4312e0676d0f45ec905c782a7">CAN1_</a>:1; </div>
<div class="line"><a name="l00557"></a><span class="lineno"><a class="line" href="unionPAC__STATUSC__Type.html#a5d262296e65bd4ded79e6867a59ee8f9"> 557</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSC__Type.html#a5d262296e65bd4ded79e6867a59ee8f9">GMAC_</a>:1; </div>
<div class="line"><a name="l00558"></a><span class="lineno"><a class="line" href="unionPAC__STATUSC__Type.html#a8f03e605a966e9913ee2bf1b477eb933"> 558</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSC__Type.html#a8f03e605a966e9913ee2bf1b477eb933">TCC2_</a>:1; </div>
<div class="line"><a name="l00559"></a><span class="lineno"><a class="line" href="unionPAC__STATUSC__Type.html#a5f9b646fe1bb7d2b128eff77371c6df0"> 559</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSC__Type.html#a5f9b646fe1bb7d2b128eff77371c6df0">TCC3_</a>:1; </div>
<div class="line"><a name="l00560"></a><span class="lineno"><a class="line" href="unionPAC__STATUSC__Type.html#a3363a6151fc88c53d9c211edf0980020"> 560</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSC__Type.html#a3363a6151fc88c53d9c211edf0980020">TC4_</a>:1; </div>
<div class="line"><a name="l00561"></a><span class="lineno"><a class="line" href="unionPAC__STATUSC__Type.html#ae183aaa4b9c1b661f2c2a963ffe49ea0"> 561</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSC__Type.html#ae183aaa4b9c1b661f2c2a963ffe49ea0">TC5_</a>:1; </div>
<div class="line"><a name="l00562"></a><span class="lineno"><a class="line" href="unionPAC__STATUSC__Type.html#a8afac9ad1faa89d165cf52f92b0d8052"> 562</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSC__Type.html#a8afac9ad1faa89d165cf52f92b0d8052">PDEC_</a>:1; </div>
<div class="line"><a name="l00563"></a><span class="lineno"><a class="line" href="unionPAC__STATUSC__Type.html#aba4a2b1c7a8065832925d11a2bc8184d"> 563</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSC__Type.html#aba4a2b1c7a8065832925d11a2bc8184d">AC_</a>:1; </div>
<div class="line"><a name="l00564"></a><span class="lineno"><a class="line" href="unionPAC__STATUSC__Type.html#ad9d7497d58f1ae14c64663a22ed532ce"> 564</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSC__Type.html#ad9d7497d58f1ae14c64663a22ed532ce">AES_</a>:1; </div>
<div class="line"><a name="l00565"></a><span class="lineno"><a class="line" href="unionPAC__STATUSC__Type.html#a0848dc1219608c037412d66db6bd95ef"> 565</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSC__Type.html#a0848dc1219608c037412d66db6bd95ef">TRNG_</a>:1; </div>
<div class="line"><a name="l00566"></a><span class="lineno"><a class="line" href="unionPAC__STATUSC__Type.html#a1302faa1167eb462db8b9bbf68c6612a"> 566</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSC__Type.html#a1302faa1167eb462db8b9bbf68c6612a">ICM_</a>:1; </div>
<div class="line"><a name="l00567"></a><span class="lineno"><a class="line" href="unionPAC__STATUSC__Type.html#a1a8b5b5d54640c85d559463e521633db"> 567</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSC__Type.html#a1a8b5b5d54640c85d559463e521633db">PUKCC_</a>:1; </div>
<div class="line"><a name="l00568"></a><span class="lineno"><a class="line" href="unionPAC__STATUSC__Type.html#af6a6165ddbe7bdf9bd379df06a143277"> 568</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSC__Type.html#af6a6165ddbe7bdf9bd379df06a143277">QSPI_</a>:1; </div>
<div class="line"><a name="l00569"></a><span class="lineno"><a class="line" href="unionPAC__STATUSC__Type.html#afc80dbd67ec39125839a8134eb92ba74"> 569</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSC__Type.html#afc80dbd67ec39125839a8134eb92ba74">CCL_</a>:1; </div>
<div class="line"><a name="l00570"></a><span class="lineno"><a class="line" href="unionPAC__STATUSC__Type.html#aaa13627b7bcb1a0458c502fb15ca0220"> 570</a></span>&#160; uint32_t :17; </div>
<div class="line"><a name="l00571"></a><span class="lineno"><a class="line" href="unionPAC__STATUSC__Type.html#ab113f125457f72b1ed7cc98acc0800a0"> 571</a></span>&#160; } bit; </div>
<div class="line"><a name="l00572"></a><span class="lineno"><a class="line" href="unionPAC__STATUSC__Type.html#a95ba822bf0d300b89bf1afc1adca08d9"> 572</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSC__Type.html#a95ba822bf0d300b89bf1afc1adca08d9">reg</a>; </div>
<div class="line"><a name="l00573"></a><span class="lineno"> 573</span>&#160;} <a class="code" href="unionPAC__STATUSC__Type.html">PAC_STATUSC_Type</a>;</div>
<div class="line"><a name="l00574"></a><span class="lineno"> 574</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00575"></a><span class="lineno"> 575</span>&#160; </div>
<div class="line"><a name="l00576"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ad72799e383707f84a5cebed8f14a808b"> 576</a></span>&#160;<span class="preprocessor">#define PAC_STATUSC_OFFSET 0x3C </span></div>
<div class="line"><a name="l00577"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a98914e088261a85a15041e76cc321990"> 577</a></span>&#160;<span class="preprocessor">#define PAC_STATUSC_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00579"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a90e024fad6212c5822ea1ffe05da8086"> 579</a></span>&#160;<span class="preprocessor">#define PAC_STATUSC_CAN0_Pos 0 </span></div>
<div class="line"><a name="l00580"></a><span class="lineno"> 580</span>&#160;<span class="preprocessor">#define PAC_STATUSC_CAN0 (_U_(0x1) &lt;&lt; PAC_STATUSC_CAN0_Pos)</span></div>
<div class="line"><a name="l00581"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#adc561e43667fd1d78926c1a93b128c76"> 581</a></span>&#160;<span class="preprocessor">#define PAC_STATUSC_CAN1_Pos 1 </span></div>
<div class="line"><a name="l00582"></a><span class="lineno"> 582</span>&#160;<span class="preprocessor">#define PAC_STATUSC_CAN1 (_U_(0x1) &lt;&lt; PAC_STATUSC_CAN1_Pos)</span></div>
<div class="line"><a name="l00583"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a8eb9c6a9d9631235467229ccd924bd0e"> 583</a></span>&#160;<span class="preprocessor">#define PAC_STATUSC_GMAC_Pos 2 </span></div>
<div class="line"><a name="l00584"></a><span class="lineno"> 584</span>&#160;<span class="preprocessor">#define PAC_STATUSC_GMAC (_U_(0x1) &lt;&lt; PAC_STATUSC_GMAC_Pos)</span></div>
<div class="line"><a name="l00585"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a363f0ab4f17009945bd276faef4d64ef"> 585</a></span>&#160;<span class="preprocessor">#define PAC_STATUSC_TCC2_Pos 3 </span></div>
<div class="line"><a name="l00586"></a><span class="lineno"> 586</span>&#160;<span class="preprocessor">#define PAC_STATUSC_TCC2 (_U_(0x1) &lt;&lt; PAC_STATUSC_TCC2_Pos)</span></div>
<div class="line"><a name="l00587"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#af01748ff8c7df83439b6b8e46322422d"> 587</a></span>&#160;<span class="preprocessor">#define PAC_STATUSC_TCC3_Pos 4 </span></div>
<div class="line"><a name="l00588"></a><span class="lineno"> 588</span>&#160;<span class="preprocessor">#define PAC_STATUSC_TCC3 (_U_(0x1) &lt;&lt; PAC_STATUSC_TCC3_Pos)</span></div>
<div class="line"><a name="l00589"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a4774a2f6a0e8c32248d7d08ecfbde678"> 589</a></span>&#160;<span class="preprocessor">#define PAC_STATUSC_TC4_Pos 5 </span></div>
<div class="line"><a name="l00590"></a><span class="lineno"> 590</span>&#160;<span class="preprocessor">#define PAC_STATUSC_TC4 (_U_(0x1) &lt;&lt; PAC_STATUSC_TC4_Pos)</span></div>
<div class="line"><a name="l00591"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ad763f9ce67583749185797fee49ea255"> 591</a></span>&#160;<span class="preprocessor">#define PAC_STATUSC_TC5_Pos 6 </span></div>
<div class="line"><a name="l00592"></a><span class="lineno"> 592</span>&#160;<span class="preprocessor">#define PAC_STATUSC_TC5 (_U_(0x1) &lt;&lt; PAC_STATUSC_TC5_Pos)</span></div>
<div class="line"><a name="l00593"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a48c24a02b72c4ea83808bbad031b67fc"> 593</a></span>&#160;<span class="preprocessor">#define PAC_STATUSC_PDEC_Pos 7 </span></div>
<div class="line"><a name="l00594"></a><span class="lineno"> 594</span>&#160;<span class="preprocessor">#define PAC_STATUSC_PDEC (_U_(0x1) &lt;&lt; PAC_STATUSC_PDEC_Pos)</span></div>
<div class="line"><a name="l00595"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#afb8f150f52b9ce4b9f1621678628e13a"> 595</a></span>&#160;<span class="preprocessor">#define PAC_STATUSC_AC_Pos 8 </span></div>
<div class="line"><a name="l00596"></a><span class="lineno"> 596</span>&#160;<span class="preprocessor">#define PAC_STATUSC_AC (_U_(0x1) &lt;&lt; PAC_STATUSC_AC_Pos)</span></div>
<div class="line"><a name="l00597"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a943e14d4182bd430af9f0b021907f857"> 597</a></span>&#160;<span class="preprocessor">#define PAC_STATUSC_AES_Pos 9 </span></div>
<div class="line"><a name="l00598"></a><span class="lineno"> 598</span>&#160;<span class="preprocessor">#define PAC_STATUSC_AES (_U_(0x1) &lt;&lt; PAC_STATUSC_AES_Pos)</span></div>
<div class="line"><a name="l00599"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a4d1dd6d7a07420af21e10aeabd8bfd26"> 599</a></span>&#160;<span class="preprocessor">#define PAC_STATUSC_TRNG_Pos 10 </span></div>
<div class="line"><a name="l00600"></a><span class="lineno"> 600</span>&#160;<span class="preprocessor">#define PAC_STATUSC_TRNG (_U_(0x1) &lt;&lt; PAC_STATUSC_TRNG_Pos)</span></div>
<div class="line"><a name="l00601"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a32b4915b4c16e5d45ec98232b9426d4f"> 601</a></span>&#160;<span class="preprocessor">#define PAC_STATUSC_ICM_Pos 11 </span></div>
<div class="line"><a name="l00602"></a><span class="lineno"> 602</span>&#160;<span class="preprocessor">#define PAC_STATUSC_ICM (_U_(0x1) &lt;&lt; PAC_STATUSC_ICM_Pos)</span></div>
<div class="line"><a name="l00603"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ad9b9e93fb8b07ae2f332bb0ebad46a12"> 603</a></span>&#160;<span class="preprocessor">#define PAC_STATUSC_PUKCC_Pos 12 </span></div>
<div class="line"><a name="l00604"></a><span class="lineno"> 604</span>&#160;<span class="preprocessor">#define PAC_STATUSC_PUKCC (_U_(0x1) &lt;&lt; PAC_STATUSC_PUKCC_Pos)</span></div>
<div class="line"><a name="l00605"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a56f11d19378e2e4c63f0d19ced78f0c5"> 605</a></span>&#160;<span class="preprocessor">#define PAC_STATUSC_QSPI_Pos 13 </span></div>
<div class="line"><a name="l00606"></a><span class="lineno"> 606</span>&#160;<span class="preprocessor">#define PAC_STATUSC_QSPI (_U_(0x1) &lt;&lt; PAC_STATUSC_QSPI_Pos)</span></div>
<div class="line"><a name="l00607"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ac41f62ba1d1bfc1b2771fb6f24d23a33"> 607</a></span>&#160;<span class="preprocessor">#define PAC_STATUSC_CCL_Pos 14 </span></div>
<div class="line"><a name="l00608"></a><span class="lineno"> 608</span>&#160;<span class="preprocessor">#define PAC_STATUSC_CCL (_U_(0x1) &lt;&lt; PAC_STATUSC_CCL_Pos)</span></div>
<div class="line"><a name="l00609"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#acc821d1f16470c8436ec7f5f8015e1b6"> 609</a></span>&#160;<span class="preprocessor">#define PAC_STATUSC_MASK _U_(0x00007FFF) </span></div>
<div class="line"><a name="l00611"></a><span class="lineno"> 611</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PAC_STATUSD : (PAC Offset: 0x40) (R/ 32) Peripheral write protection status - Bridge D -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00612"></a><span class="lineno"> 612</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00613"></a><span class="lineno"><a class="line" href="unionPAC__STATUSD__Type.html"> 613</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00614"></a><span class="lineno"> 614</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00615"></a><span class="lineno"><a class="line" href="unionPAC__STATUSD__Type.html#aeb39ffd1974e586c5870ba617eceb9ae"> 615</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSD__Type.html#aeb39ffd1974e586c5870ba617eceb9ae">SERCOM4_</a>:1; </div>
<div class="line"><a name="l00616"></a><span class="lineno"><a class="line" href="unionPAC__STATUSD__Type.html#aaae18611ba2b0ab03771050fb324f205"> 616</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSD__Type.html#aaae18611ba2b0ab03771050fb324f205">SERCOM5_</a>:1; </div>
<div class="line"><a name="l00617"></a><span class="lineno"><a class="line" href="unionPAC__STATUSD__Type.html#aac991d3ea5c6fa032769c271b22b1c5f"> 617</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSD__Type.html#aac991d3ea5c6fa032769c271b22b1c5f">SERCOM6_</a>:1; </div>
<div class="line"><a name="l00618"></a><span class="lineno"><a class="line" href="unionPAC__STATUSD__Type.html#aecf40a0978d52b8522fb1de530f73116"> 618</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSD__Type.html#aecf40a0978d52b8522fb1de530f73116">SERCOM7_</a>:1; </div>
<div class="line"><a name="l00619"></a><span class="lineno"><a class="line" href="unionPAC__STATUSD__Type.html#a805c3aa69d37ab2f83277a6a7d37468c"> 619</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSD__Type.html#a805c3aa69d37ab2f83277a6a7d37468c">TCC4_</a>:1; </div>
<div class="line"><a name="l00620"></a><span class="lineno"><a class="line" href="unionPAC__STATUSD__Type.html#a9c31f4ed66b22f4cb401afa8b6ecd3d5"> 620</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSD__Type.html#a9c31f4ed66b22f4cb401afa8b6ecd3d5">TC6_</a>:1; </div>
<div class="line"><a name="l00621"></a><span class="lineno"><a class="line" href="unionPAC__STATUSD__Type.html#a1ade62f577fc07feca6c12558c58b1a6"> 621</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSD__Type.html#a1ade62f577fc07feca6c12558c58b1a6">TC7_</a>:1; </div>
<div class="line"><a name="l00622"></a><span class="lineno"><a class="line" href="unionPAC__STATUSD__Type.html#a3f238c82bd6efcf19c99b7f5889c02cf"> 622</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSD__Type.html#a3f238c82bd6efcf19c99b7f5889c02cf">ADC0_</a>:1; </div>
<div class="line"><a name="l00623"></a><span class="lineno"><a class="line" href="unionPAC__STATUSD__Type.html#a838bc12705b4d80d773cc754d8eea9d6"> 623</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSD__Type.html#a838bc12705b4d80d773cc754d8eea9d6">ADC1_</a>:1; </div>
<div class="line"><a name="l00624"></a><span class="lineno"><a class="line" href="unionPAC__STATUSD__Type.html#a46fb4c84ca59c9c7f63f931c18a3a6af"> 624</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSD__Type.html#a46fb4c84ca59c9c7f63f931c18a3a6af">DAC_</a>:1; </div>
<div class="line"><a name="l00625"></a><span class="lineno"><a class="line" href="unionPAC__STATUSD__Type.html#ad3016963d600ca7066f51ed4a561a72a"> 625</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSD__Type.html#ad3016963d600ca7066f51ed4a561a72a">I2S_</a>:1; </div>
<div class="line"><a name="l00626"></a><span class="lineno"><a class="line" href="unionPAC__STATUSD__Type.html#a69ea7889003dacb40fd80166c07fca4c"> 626</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSD__Type.html#a69ea7889003dacb40fd80166c07fca4c">PCC_</a>:1; </div>
<div class="line"><a name="l00627"></a><span class="lineno"><a class="line" href="unionPAC__STATUSD__Type.html#abab9c99ea61d696a8d268e0f5a20d3e9"> 627</a></span>&#160; uint32_t :20; </div>
<div class="line"><a name="l00628"></a><span class="lineno"><a class="line" href="unionPAC__STATUSD__Type.html#aa8c2414d0aa00acdaed81673e324e53e"> 628</a></span>&#160; } bit; </div>
<div class="line"><a name="l00629"></a><span class="lineno"><a class="line" href="unionPAC__STATUSD__Type.html#a75a936abd7369f4bf515548de6d5f598"> 629</a></span>&#160; uint32_t <a class="code" href="unionPAC__STATUSD__Type.html#a75a936abd7369f4bf515548de6d5f598">reg</a>; </div>
<div class="line"><a name="l00630"></a><span class="lineno"> 630</span>&#160;} <a class="code" href="unionPAC__STATUSD__Type.html">PAC_STATUSD_Type</a>;</div>
<div class="line"><a name="l00631"></a><span class="lineno"> 631</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00632"></a><span class="lineno"> 632</span>&#160; </div>
<div class="line"><a name="l00633"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a44e164fc209d12c6ac1481861d0545e5"> 633</a></span>&#160;<span class="preprocessor">#define PAC_STATUSD_OFFSET 0x40 </span></div>
<div class="line"><a name="l00634"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a189046a9c50c9c323b117b3a80661ec9"> 634</a></span>&#160;<span class="preprocessor">#define PAC_STATUSD_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00636"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ab8dc784e823903cf70b36d76c44fd912"> 636</a></span>&#160;<span class="preprocessor">#define PAC_STATUSD_SERCOM4_Pos 0 </span></div>
<div class="line"><a name="l00637"></a><span class="lineno"> 637</span>&#160;<span class="preprocessor">#define PAC_STATUSD_SERCOM4 (_U_(0x1) &lt;&lt; PAC_STATUSD_SERCOM4_Pos)</span></div>
<div class="line"><a name="l00638"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a35f1c5c15a4194e879bd5dbbe6171f2f"> 638</a></span>&#160;<span class="preprocessor">#define PAC_STATUSD_SERCOM5_Pos 1 </span></div>
<div class="line"><a name="l00639"></a><span class="lineno"> 639</span>&#160;<span class="preprocessor">#define PAC_STATUSD_SERCOM5 (_U_(0x1) &lt;&lt; PAC_STATUSD_SERCOM5_Pos)</span></div>
<div class="line"><a name="l00640"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a554fec9ac2431314c2e77eb9f00e7888"> 640</a></span>&#160;<span class="preprocessor">#define PAC_STATUSD_SERCOM6_Pos 2 </span></div>
<div class="line"><a name="l00641"></a><span class="lineno"> 641</span>&#160;<span class="preprocessor">#define PAC_STATUSD_SERCOM6 (_U_(0x1) &lt;&lt; PAC_STATUSD_SERCOM6_Pos)</span></div>
<div class="line"><a name="l00642"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a7e463764cb8bfa3ed2203bb103e7dd1a"> 642</a></span>&#160;<span class="preprocessor">#define PAC_STATUSD_SERCOM7_Pos 3 </span></div>
<div class="line"><a name="l00643"></a><span class="lineno"> 643</span>&#160;<span class="preprocessor">#define PAC_STATUSD_SERCOM7 (_U_(0x1) &lt;&lt; PAC_STATUSD_SERCOM7_Pos)</span></div>
<div class="line"><a name="l00644"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a2ec950e95fe8b6deb7fae852c2105415"> 644</a></span>&#160;<span class="preprocessor">#define PAC_STATUSD_TCC4_Pos 4 </span></div>
<div class="line"><a name="l00645"></a><span class="lineno"> 645</span>&#160;<span class="preprocessor">#define PAC_STATUSD_TCC4 (_U_(0x1) &lt;&lt; PAC_STATUSD_TCC4_Pos)</span></div>
<div class="line"><a name="l00646"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a962b47193a73621fc59e7bd7681c80de"> 646</a></span>&#160;<span class="preprocessor">#define PAC_STATUSD_TC6_Pos 5 </span></div>
<div class="line"><a name="l00647"></a><span class="lineno"> 647</span>&#160;<span class="preprocessor">#define PAC_STATUSD_TC6 (_U_(0x1) &lt;&lt; PAC_STATUSD_TC6_Pos)</span></div>
<div class="line"><a name="l00648"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a758efbdc3e7954c7e3c4d529fe347cc8"> 648</a></span>&#160;<span class="preprocessor">#define PAC_STATUSD_TC7_Pos 6 </span></div>
<div class="line"><a name="l00649"></a><span class="lineno"> 649</span>&#160;<span class="preprocessor">#define PAC_STATUSD_TC7 (_U_(0x1) &lt;&lt; PAC_STATUSD_TC7_Pos)</span></div>
<div class="line"><a name="l00650"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a10d5ffafdd3949f7759eb7007acfcc76"> 650</a></span>&#160;<span class="preprocessor">#define PAC_STATUSD_ADC0_Pos 7 </span></div>
<div class="line"><a name="l00651"></a><span class="lineno"> 651</span>&#160;<span class="preprocessor">#define PAC_STATUSD_ADC0 (_U_(0x1) &lt;&lt; PAC_STATUSD_ADC0_Pos)</span></div>
<div class="line"><a name="l00652"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a22601457bc5c9f6b54011a626dade3f7"> 652</a></span>&#160;<span class="preprocessor">#define PAC_STATUSD_ADC1_Pos 8 </span></div>
<div class="line"><a name="l00653"></a><span class="lineno"> 653</span>&#160;<span class="preprocessor">#define PAC_STATUSD_ADC1 (_U_(0x1) &lt;&lt; PAC_STATUSD_ADC1_Pos)</span></div>
<div class="line"><a name="l00654"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a1ad23ef762bece435866b9e654519938"> 654</a></span>&#160;<span class="preprocessor">#define PAC_STATUSD_DAC_Pos 9 </span></div>
<div class="line"><a name="l00655"></a><span class="lineno"> 655</span>&#160;<span class="preprocessor">#define PAC_STATUSD_DAC (_U_(0x1) &lt;&lt; PAC_STATUSD_DAC_Pos)</span></div>
<div class="line"><a name="l00656"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#ae73eb5f7d27b043ad031981268f5d297"> 656</a></span>&#160;<span class="preprocessor">#define PAC_STATUSD_I2S_Pos 10 </span></div>
<div class="line"><a name="l00657"></a><span class="lineno"> 657</span>&#160;<span class="preprocessor">#define PAC_STATUSD_I2S (_U_(0x1) &lt;&lt; PAC_STATUSD_I2S_Pos)</span></div>
<div class="line"><a name="l00658"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a2961419a7540e33ccb80cf767dd1b95f"> 658</a></span>&#160;<span class="preprocessor">#define PAC_STATUSD_PCC_Pos 11 </span></div>
<div class="line"><a name="l00659"></a><span class="lineno"> 659</span>&#160;<span class="preprocessor">#define PAC_STATUSD_PCC (_U_(0x1) &lt;&lt; PAC_STATUSD_PCC_Pos)</span></div>
<div class="line"><a name="l00660"></a><span class="lineno"><a class="line" href="component_2pac_8h.html#a00d22737e63523d60365c645b3efff3a"> 660</a></span>&#160;<span class="preprocessor">#define PAC_STATUSD_MASK _U_(0x00000FFF) </span></div>
<div class="line"><a name="l00663"></a><span class="lineno"> 663</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00664"></a><span class="lineno"><a class="line" href="structPac.html"> 664</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00665"></a><span class="lineno"><a class="line" href="structPac.html#a4b2496dfffd2d47da5afc77c0b259338"> 665</a></span>&#160; __IO <a class="code" href="unionPAC__WRCTRL__Type.html">PAC_WRCTRL_Type</a> <a class="code" href="structPac.html#a4b2496dfffd2d47da5afc77c0b259338">WRCTRL</a>; </div>
<div class="line"><a name="l00666"></a><span class="lineno"><a class="line" href="structPac.html#a51f5feac918430a1638cc4184942003f"> 666</a></span>&#160; __IO <a class="code" href="unionPAC__EVCTRL__Type.html">PAC_EVCTRL_Type</a> <a class="code" href="structPac.html#a51f5feac918430a1638cc4184942003f">EVCTRL</a>; </div>
<div class="line"><a name="l00667"></a><span class="lineno"> 667</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved1[0x3];</div>
<div class="line"><a name="l00668"></a><span class="lineno"><a class="line" href="structPac.html#a3c9266e1f270edd8e6eebc44cdce1005"> 668</a></span>&#160; __IO <a class="code" href="unionPAC__INTENCLR__Type.html">PAC_INTENCLR_Type</a> <a class="code" href="structPac.html#a3c9266e1f270edd8e6eebc44cdce1005">INTENCLR</a>; </div>
<div class="line"><a name="l00669"></a><span class="lineno"><a class="line" href="structPac.html#a710a1d05491b5b53c87e1ad8f98c178b"> 669</a></span>&#160; __IO <a class="code" href="unionPAC__INTENSET__Type.html">PAC_INTENSET_Type</a> <a class="code" href="structPac.html#a710a1d05491b5b53c87e1ad8f98c178b">INTENSET</a>; </div>
<div class="line"><a name="l00670"></a><span class="lineno"> 670</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved2[0x6];</div>
<div class="line"><a name="l00671"></a><span class="lineno"><a class="line" href="structPac.html#a43204082738d35bfd321db9f92960be4"> 671</a></span>&#160; __IO <a class="code" href="unionPAC__INTFLAGAHB__Type.html">PAC_INTFLAGAHB_Type</a> <a class="code" href="structPac.html#a43204082738d35bfd321db9f92960be4">INTFLAGAHB</a>; </div>
<div class="line"><a name="l00672"></a><span class="lineno"><a class="line" href="structPac.html#a88c4b94bbb43bfc8bc6ef1c8315dd4b3"> 672</a></span>&#160; __IO <a class="code" href="unionPAC__INTFLAGA__Type.html">PAC_INTFLAGA_Type</a> <a class="code" href="structPac.html#a88c4b94bbb43bfc8bc6ef1c8315dd4b3">INTFLAGA</a>; </div>
<div class="line"><a name="l00673"></a><span class="lineno"><a class="line" href="structPac.html#aa24c383457a9d02e95b5338afd45a1d0"> 673</a></span>&#160; __IO <a class="code" href="unionPAC__INTFLAGB__Type.html">PAC_INTFLAGB_Type</a> <a class="code" href="structPac.html#aa24c383457a9d02e95b5338afd45a1d0">INTFLAGB</a>; </div>
<div class="line"><a name="l00674"></a><span class="lineno"><a class="line" href="structPac.html#a3233539abbe44636f3206332631e017c"> 674</a></span>&#160; __IO <a class="code" href="unionPAC__INTFLAGC__Type.html">PAC_INTFLAGC_Type</a> <a class="code" href="structPac.html#a3233539abbe44636f3206332631e017c">INTFLAGC</a>; </div>
<div class="line"><a name="l00675"></a><span class="lineno"><a class="line" href="structPac.html#ac6d1478ff1d24eb47f9cb43edeb282b3"> 675</a></span>&#160; __IO <a class="code" href="unionPAC__INTFLAGD__Type.html">PAC_INTFLAGD_Type</a> <a class="code" href="structPac.html#ac6d1478ff1d24eb47f9cb43edeb282b3">INTFLAGD</a>; </div>
<div class="line"><a name="l00676"></a><span class="lineno"> 676</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved3[0x10];</div>
<div class="line"><a name="l00677"></a><span class="lineno"><a class="line" href="structPac.html#af6f8aa5f0054587a09947c68a321c229"> 677</a></span>&#160; __I <a class="code" href="unionPAC__STATUSA__Type.html">PAC_STATUSA_Type</a> <a class="code" href="structPac.html#af6f8aa5f0054587a09947c68a321c229">STATUSA</a>; </div>
<div class="line"><a name="l00678"></a><span class="lineno"><a class="line" href="structPac.html#a3a9b9a4ca0984c013fd139811a0a2ba0"> 678</a></span>&#160; __I <a class="code" href="unionPAC__STATUSB__Type.html">PAC_STATUSB_Type</a> <a class="code" href="structPac.html#a3a9b9a4ca0984c013fd139811a0a2ba0">STATUSB</a>; </div>
<div class="line"><a name="l00679"></a><span class="lineno"><a class="line" href="structPac.html#abf41a3781084f01e0d278300cb763f29"> 679</a></span>&#160; __I <a class="code" href="unionPAC__STATUSC__Type.html">PAC_STATUSC_Type</a> <a class="code" href="structPac.html#abf41a3781084f01e0d278300cb763f29">STATUSC</a>; </div>
<div class="line"><a name="l00680"></a><span class="lineno"><a class="line" href="structPac.html#afaf2caaf5e4105c9a4cd93d998976793"> 680</a></span>&#160; __I <a class="code" href="unionPAC__STATUSD__Type.html">PAC_STATUSD_Type</a> <a class="code" href="structPac.html#afaf2caaf5e4105c9a4cd93d998976793">STATUSD</a>; </div>
<div class="line"><a name="l00681"></a><span class="lineno"> 681</span>&#160;} <a class="code" href="structPac.html">Pac</a>;</div>
<div class="line"><a name="l00682"></a><span class="lineno"> 682</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00683"></a><span class="lineno"> 683</span>&#160; </div>
<div class="line"><a name="l00686"></a><span class="lineno"> 686</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_PAC_COMPONENT_ */</span><span class="preprocessor"></span></div>
</div><!-- fragment --></div><!-- contents -->
<div class="ttc" id="aunionPAC__INTFLAGAHB__Type_html_a1265ba4ea019230d8dcb8349a78837fc"><div class="ttname"><a href="unionPAC__INTFLAGAHB__Type.html#a1265ba4ea019230d8dcb8349a78837fc">PAC_INTFLAGAHB_Type::HPB2_</a></div><div class="ttdeci">__I uint32_t HPB2_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00140">pac.h:140</a></div></div>
<div class="ttc" id="aunionPAC__STATUSD__Type_html_a75a936abd7369f4bf515548de6d5f598"><div class="ttname"><a href="unionPAC__STATUSD__Type.html#a75a936abd7369f4bf515548de6d5f598">PAC_STATUSD_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00629">pac.h:629</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGB__Type_html_ac6a1e0fcd718d3a0238303e84e094baa"><div class="ttname"><a href="unionPAC__INTFLAGB__Type.html#ac6a1e0fcd718d3a0238303e84e094baa">PAC_INTFLAGB_Type::HMATRIX_</a></div><div class="ttdeci">__I uint32_t HMATRIX_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00263">pac.h:263</a></div></div>
<div class="ttc" id="astructPac_html_a51f5feac918430a1638cc4184942003f"><div class="ttname"><a href="structPac.html#a51f5feac918430a1638cc4184942003f">Pac::EVCTRL</a></div><div class="ttdeci">__IO PAC_EVCTRL_Type EVCTRL</div><div class="ttdoc">Offset: 0x04 (R/W 8) Event control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00666">pac.h:666</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGA__Type_html_aba2bb2e7a7561c838a089f1b8ee98dee"><div class="ttname"><a href="unionPAC__INTFLAGA__Type.html#aba2bb2e7a7561c838a089f1b8ee98dee">PAC_INTFLAGA_Type::SUPC_</a></div><div class="ttdeci">__I uint32_t SUPC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00200">pac.h:200</a></div></div>
<div class="ttc" id="aunionPAC__WRCTRL__Type_html_a59fabdc8cf31587de5969dd1627393d8"><div class="ttname"><a href="unionPAC__WRCTRL__Type.html#a59fabdc8cf31587de5969dd1627393d8">PAC_WRCTRL_Type::KEY</a></div><div class="ttdeci">uint32_t KEY</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00047">pac.h:47</a></div></div>
<div class="ttc" id="aunionPAC__STATUSD__Type_html_a3f238c82bd6efcf19c99b7f5889c02cf"><div class="ttname"><a href="unionPAC__STATUSD__Type.html#a3f238c82bd6efcf19c99b7f5889c02cf">PAC_STATUSD_Type::ADC0_</a></div><div class="ttdeci">uint32_t ADC0_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00622">pac.h:622</a></div></div>
<div class="ttc" id="aunionPAC__STATUSA__Type_html_a67e9683546f09097d5aee589e92ae650"><div class="ttname"><a href="unionPAC__STATUSA__Type.html#a67e9683546f09097d5aee589e92ae650">PAC_STATUSA_Type::GCLK_</a></div><div class="ttdeci">uint32_t GCLK_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00437">pac.h:437</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGA__Type_html_aa5cc5a43cf0e145021b6121dc90d1948"><div class="ttname"><a href="unionPAC__INTFLAGA__Type.html#aa5cc5a43cf0e145021b6121dc90d1948">PAC_INTFLAGA_Type::TC1_</a></div><div class="ttdeci">__I uint32_t TC1_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00209">pac.h:209</a></div></div>
<div class="ttc" id="aunionPAC__STATUSB__Type_html_a726065f557c17b1c1e828cbbcad5a1c2"><div class="ttname"><a href="unionPAC__STATUSB__Type.html#a726065f557c17b1c1e828cbbcad5a1c2">PAC_STATUSB_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00512">pac.h:512</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGAHB__Type_html_a893751a8f7a5cf86b41c6d7f9ad4b56a"><div class="ttname"><a href="unionPAC__INTFLAGAHB__Type.html#a893751a8f7a5cf86b41c6d7f9ad4b56a">PAC_INTFLAGAHB_Type::BKUPRAM_</a></div><div class="ttdeci">__I uint32_t BKUPRAM_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00146">pac.h:146</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGAHB__Type_html_a4273db3850a034ba9e0617c9db9076b6"><div class="ttname"><a href="unionPAC__INTFLAGAHB__Type.html#a4273db3850a034ba9e0617c9db9076b6">PAC_INTFLAGAHB_Type::RAMPPPDSU_</a></div><div class="ttdeci">__I uint32_t RAMPPPDSU_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00135">pac.h:135</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGB__Type_html_ab589357b8c6d24d9146d0a3ecab8e661"><div class="ttname"><a href="unionPAC__INTFLAGB__Type.html#ab589357b8c6d24d9146d0a3ecab8e661">PAC_INTFLAGB_Type::SERCOM2_</a></div><div class="ttdeci">__I uint32_t SERCOM2_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00266">pac.h:266</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGC__Type_html"><div class="ttname"><a href="unionPAC__INTFLAGC__Type.html">PAC_INTFLAGC_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00317">pac.h:317</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGD__Type_html_a18fbc6fd875a11949d5bea5a39369d88"><div class="ttname"><a href="unionPAC__INTFLAGD__Type.html#a18fbc6fd875a11949d5bea5a39369d88">PAC_INTFLAGD_Type::DAC_</a></div><div class="ttdeci">__I uint32_t DAC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00388">pac.h:388</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGAHB__Type_html_a7d2a708765a14bb35460c63de3b75590"><div class="ttname"><a href="unionPAC__INTFLAGAHB__Type.html#a7d2a708765a14bb35460c63de3b75590">PAC_INTFLAGAHB_Type::FLASH_ALT_</a></div><div class="ttdeci">__I uint32_t FLASH_ALT_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00132">pac.h:132</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGAHB__Type_html_a9983e75a9b9ff79e16642e058872aa6d"><div class="ttname"><a href="unionPAC__INTFLAGAHB__Type.html#a9983e75a9b9ff79e16642e058872aa6d">PAC_INTFLAGAHB_Type::SDHC1_</a></div><div class="ttdeci">__I uint32_t SDHC1_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00144">pac.h:144</a></div></div>
<div class="ttc" id="aunionPAC__STATUSA__Type_html_af38bbc749443f8c5219b5bdd1d8452c6"><div class="ttname"><a href="unionPAC__STATUSA__Type.html#af38bbc749443f8c5219b5bdd1d8452c6">PAC_STATUSA_Type::TC1_</a></div><div class="ttdeci">uint32_t TC1_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00445">pac.h:445</a></div></div>
<div class="ttc" id="aunionPAC__STATUSD__Type_html_a1ade62f577fc07feca6c12558c58b1a6"><div class="ttname"><a href="unionPAC__STATUSD__Type.html#a1ade62f577fc07feca6c12558c58b1a6">PAC_STATUSD_Type::TC7_</a></div><div class="ttdeci">uint32_t TC7_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00621">pac.h:621</a></div></div>
<div class="ttc" id="aunionPAC__STATUSC__Type_html_a1302faa1167eb462db8b9bbf68c6612a"><div class="ttname"><a href="unionPAC__STATUSC__Type.html#a1302faa1167eb462db8b9bbf68c6612a">PAC_STATUSC_Type::ICM_</a></div><div class="ttdeci">uint32_t ICM_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00566">pac.h:566</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGAHB__Type_html_a9de15febf70997de358bac6dd2ee9399"><div class="ttname"><a href="unionPAC__INTFLAGAHB__Type.html#a9de15febf70997de358bac6dd2ee9399">PAC_INTFLAGAHB_Type::RAMDMAWR_</a></div><div class="ttdeci">__I uint32_t RAMDMAWR_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00136">pac.h:136</a></div></div>
<div class="ttc" id="aunionPAC__WRCTRL__Type_html_a55e8c4ad2b0e0c4de47c9a1b19edd6c3"><div class="ttname"><a href="unionPAC__WRCTRL__Type.html#a55e8c4ad2b0e0c4de47c9a1b19edd6c3">PAC_WRCTRL_Type::PERID</a></div><div class="ttdeci">uint32_t PERID</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00046">pac.h:46</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGC__Type_html_a42edae4e0859ddf7fc3e2c690907ed65"><div class="ttname"><a href="unionPAC__INTFLAGC__Type.html#a42edae4e0859ddf7fc3e2c690907ed65">PAC_INTFLAGC_Type::CAN0_</a></div><div class="ttdeci">__I uint32_t CAN0_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00319">pac.h:319</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGC__Type_html_a598abfcfd83c840b8cada60131df264f"><div class="ttname"><a href="unionPAC__INTFLAGC__Type.html#a598abfcfd83c840b8cada60131df264f">PAC_INTFLAGC_Type::TCC3_</a></div><div class="ttdeci">__I uint32_t TCC3_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00323">pac.h:323</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGAHB__Type_html_a310905c2f2afce8975a98763dc14c3ec"><div class="ttname"><a href="unionPAC__INTFLAGAHB__Type.html#a310905c2f2afce8975a98763dc14c3ec">PAC_INTFLAGAHB_Type::SEEPROM_</a></div><div class="ttdeci">__I uint32_t SEEPROM_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00133">pac.h:133</a></div></div>
<div class="ttc" id="astructPac_html_af6f8aa5f0054587a09947c68a321c229"><div class="ttname"><a href="structPac.html#af6f8aa5f0054587a09947c68a321c229">Pac::STATUSA</a></div><div class="ttdeci">__I PAC_STATUSA_Type STATUSA</div><div class="ttdoc">Offset: 0x34 (R/ 32) Peripheral write protection status - Bridge A.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00677">pac.h:677</a></div></div>
<div class="ttc" id="aunionPAC__STATUSD__Type_html_aac991d3ea5c6fa032769c271b22b1c5f"><div class="ttname"><a href="unionPAC__STATUSD__Type.html#aac991d3ea5c6fa032769c271b22b1c5f">PAC_STATUSD_Type::SERCOM6_</a></div><div class="ttdeci">uint32_t SERCOM6_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00617">pac.h:617</a></div></div>
<div class="ttc" id="aunionPAC__EVCTRL__Type_html_a08ad9f5b8427481586e8c446c57f831b"><div class="ttname"><a href="unionPAC__EVCTRL__Type.html#a08ad9f5b8427481586e8c446c57f831b">PAC_EVCTRL_Type::ERREO</a></div><div class="ttdeci">uint8_t ERREO</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00077">pac.h:77</a></div></div>
<div class="ttc" id="aunionPAC__STATUSC__Type_html_a1a8b5b5d54640c85d559463e521633db"><div class="ttname"><a href="unionPAC__STATUSC__Type.html#a1a8b5b5d54640c85d559463e521633db">PAC_STATUSC_Type::PUKCC_</a></div><div class="ttdeci">uint32_t PUKCC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00567">pac.h:567</a></div></div>
<div class="ttc" id="astructPac_html_a3c9266e1f270edd8e6eebc44cdce1005"><div class="ttname"><a href="structPac.html#a3c9266e1f270edd8e6eebc44cdce1005">Pac::INTENCLR</a></div><div class="ttdeci">__IO PAC_INTENCLR_Type INTENCLR</div><div class="ttdoc">Offset: 0x08 (R/W 8) Interrupt enable clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00668">pac.h:668</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGA__Type_html_a511c299d6068f6a6e51f49fd4a2844d2"><div class="ttname"><a href="unionPAC__INTFLAGA__Type.html#a511c299d6068f6a6e51f49fd4a2844d2">PAC_INTFLAGA_Type::PAC_</a></div><div class="ttdeci">__I uint32_t PAC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00194">pac.h:194</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGAHB__Type_html_a444669982642924724acf6482026651b"><div class="ttname"><a href="unionPAC__INTFLAGAHB__Type.html#a444669982642924724acf6482026651b">PAC_INTFLAGAHB_Type::SDHC0_</a></div><div class="ttdeci">__I uint32_t SDHC0_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00143">pac.h:143</a></div></div>
<div class="ttc" id="aunionPAC__STATUSA__Type_html"><div class="ttname"><a href="unionPAC__STATUSA__Type.html">PAC_STATUSA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00428">pac.h:428</a></div></div>
<div class="ttc" id="aunionPAC__STATUSC__Type_html_a0848dc1219608c037412d66db6bd95ef"><div class="ttname"><a href="unionPAC__STATUSC__Type.html#a0848dc1219608c037412d66db6bd95ef">PAC_STATUSC_Type::TRNG_</a></div><div class="ttdeci">uint32_t TRNG_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00565">pac.h:565</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGA__Type_html_a48e187c4353fe84632a1ce0f8399da79"><div class="ttname"><a href="unionPAC__INTFLAGA__Type.html#a48e187c4353fe84632a1ce0f8399da79">PAC_INTFLAGA_Type::GCLK_</a></div><div class="ttdeci">__I uint32_t GCLK_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00201">pac.h:201</a></div></div>
<div class="ttc" id="aunionPAC__STATUSC__Type_html_afc80dbd67ec39125839a8134eb92ba74"><div class="ttname"><a href="unionPAC__STATUSC__Type.html#afc80dbd67ec39125839a8134eb92ba74">PAC_STATUSC_Type::CCL_</a></div><div class="ttdeci">uint32_t CCL_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00569">pac.h:569</a></div></div>
<div class="ttc" id="aunionPAC__STATUSD__Type_html_ad3016963d600ca7066f51ed4a561a72a"><div class="ttname"><a href="unionPAC__STATUSD__Type.html#ad3016963d600ca7066f51ed4a561a72a">PAC_STATUSD_Type::I2S_</a></div><div class="ttdeci">uint32_t I2S_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00625">pac.h:625</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGB__Type_html_ac3ea70df4df1bbeca1b1f96a0e7e7211"><div class="ttname"><a href="unionPAC__INTFLAGB__Type.html#ac3ea70df4df1bbeca1b1f96a0e7e7211">PAC_INTFLAGB_Type::SERCOM3_</a></div><div class="ttdeci">__I uint32_t SERCOM3_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00267">pac.h:267</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGB__Type_html_a0b96b1fe0fcfae9dd6d9ac4a80a2921c"><div class="ttname"><a href="unionPAC__INTFLAGB__Type.html#a0b96b1fe0fcfae9dd6d9ac4a80a2921c">PAC_INTFLAGB_Type::TCC1_</a></div><div class="ttdeci">__I uint32_t TCC1_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00269">pac.h:269</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGD__Type_html_a441228b1e4585ee22dd24744f7d7f21d"><div class="ttname"><a href="unionPAC__INTFLAGD__Type.html#a441228b1e4585ee22dd24744f7d7f21d">PAC_INTFLAGD_Type::TCC4_</a></div><div class="ttdeci">__I uint32_t TCC4_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00383">pac.h:383</a></div></div>
<div class="ttc" id="aunionPAC__STATUSA__Type_html_a56c3d6356e4728df39cdf842cd3f5883"><div class="ttname"><a href="unionPAC__STATUSA__Type.html#a56c3d6356e4728df39cdf842cd3f5883">PAC_STATUSA_Type::MCLK_</a></div><div class="ttdeci">uint32_t MCLK_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00432">pac.h:432</a></div></div>
<div class="ttc" id="aunionPAC__STATUSD__Type_html"><div class="ttname"><a href="unionPAC__STATUSD__Type.html">PAC_STATUSD_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00613">pac.h:613</a></div></div>
<div class="ttc" id="aunionPAC__STATUSD__Type_html_a9c31f4ed66b22f4cb401afa8b6ecd3d5"><div class="ttname"><a href="unionPAC__STATUSD__Type.html#a9c31f4ed66b22f4cb401afa8b6ecd3d5">PAC_STATUSD_Type::TC6_</a></div><div class="ttdeci">uint32_t TC6_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00620">pac.h:620</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGAHB__Type_html"><div class="ttname"><a href="unionPAC__INTFLAGAHB__Type.html">PAC_INTFLAGAHB_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00129">pac.h:129</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGAHB__Type_html_ad54e6f74a8c8d915cefb76151c80a32e"><div class="ttname"><a href="unionPAC__INTFLAGAHB__Type.html#ad54e6f74a8c8d915cefb76151c80a32e">PAC_INTFLAGAHB_Type::RAMDMACICM_</a></div><div class="ttdeci">__I uint32_t RAMDMACICM_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00137">pac.h:137</a></div></div>
<div class="ttc" id="aunionPAC__STATUSB__Type_html"><div class="ttname"><a href="unionPAC__STATUSB__Type.html">PAC_STATUSB_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00491">pac.h:491</a></div></div>
<div class="ttc" id="astructPac_html_a3233539abbe44636f3206332631e017c"><div class="ttname"><a href="structPac.html#a3233539abbe44636f3206332631e017c">Pac::INTFLAGC</a></div><div class="ttdeci">__IO PAC_INTFLAGC_Type INTFLAGC</div><div class="ttdoc">Offset: 0x1C (R/W 32) Peripheral interrupt flag status - Bridge C.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00674">pac.h:674</a></div></div>
<div class="ttc" id="aunionPAC__STATUSA__Type_html_a5650c046300e98cd8fd5759c65eeac70"><div class="ttname"><a href="unionPAC__STATUSA__Type.html#a5650c046300e98cd8fd5759c65eeac70">PAC_STATUSA_Type::RSTC_</a></div><div class="ttdeci">uint32_t RSTC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00433">pac.h:433</a></div></div>
<div class="ttc" id="aunionPAC__INTENCLR__Type_html_a34c1616f9582a2be3019c29b07d758ac"><div class="ttname"><a href="unionPAC__INTENCLR__Type.html#a34c1616f9582a2be3019c29b07d758ac">PAC_INTENCLR_Type::ERR</a></div><div class="ttdeci">uint8_t ERR</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00095">pac.h:95</a></div></div>
<div class="ttc" id="aunionPAC__STATUSD__Type_html_a69ea7889003dacb40fd80166c07fca4c"><div class="ttname"><a href="unionPAC__STATUSD__Type.html#a69ea7889003dacb40fd80166c07fca4c">PAC_STATUSD_Type::PCC_</a></div><div class="ttdeci">uint32_t PCC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00626">pac.h:626</a></div></div>
<div class="ttc" id="aunionPAC__STATUSA__Type_html_add0063090a8840c42a2e365b86148d38"><div class="ttname"><a href="unionPAC__STATUSA__Type.html#add0063090a8840c42a2e365b86148d38">PAC_STATUSA_Type::RTC_</a></div><div class="ttdeci">uint32_t RTC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00439">pac.h:439</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGAHB__Type_html_afdedb761fe7c06817c11b1a118328587"><div class="ttname"><a href="unionPAC__INTFLAGAHB__Type.html#afdedb761fe7c06817c11b1a118328587">PAC_INTFLAGAHB_Type::HPB1_</a></div><div class="ttdeci">__I uint32_t HPB1_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00139">pac.h:139</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGD__Type_html_a07dc277b04812483b5461236ce1e3b2d"><div class="ttname"><a href="unionPAC__INTFLAGD__Type.html#a07dc277b04812483b5461236ce1e3b2d">PAC_INTFLAGD_Type::ADC1_</a></div><div class="ttdeci">__I uint32_t ADC1_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00387">pac.h:387</a></div></div>
<div class="ttc" id="aunionPAC__STATUSB__Type_html_aa7cae59f679fd823875f111a750f60fb"><div class="ttname"><a href="unionPAC__STATUSB__Type.html#aa7cae59f679fd823875f111a750f60fb">PAC_STATUSB_Type::TCC0_</a></div><div class="ttdeci">uint32_t TCC0_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00504">pac.h:504</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGA__Type_html_a62ebbd62cd313325cc08d077904600ad"><div class="ttname"><a href="unionPAC__INTFLAGA__Type.html#a62ebbd62cd313325cc08d077904600ad">PAC_INTFLAGA_Type::OSC32KCTRL_</a></div><div class="ttdeci">__I uint32_t OSC32KCTRL_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00199">pac.h:199</a></div></div>
<div class="ttc" id="aunionPAC__STATUSD__Type_html_a46fb4c84ca59c9c7f63f931c18a3a6af"><div class="ttname"><a href="unionPAC__STATUSD__Type.html#a46fb4c84ca59c9c7f63f931c18a3a6af">PAC_STATUSD_Type::DAC_</a></div><div class="ttdeci">uint32_t DAC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00624">pac.h:624</a></div></div>
<div class="ttc" id="aunionPAC__STATUSA__Type_html_a3d7062cb7b01559c3ade53a550b16d9d"><div class="ttname"><a href="unionPAC__STATUSA__Type.html#a3d7062cb7b01559c3ade53a550b16d9d">PAC_STATUSA_Type::OSC32KCTRL_</a></div><div class="ttdeci">uint32_t OSC32KCTRL_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00435">pac.h:435</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGA__Type_html_a6a24655756223a11de0700ef7b467113"><div class="ttname"><a href="unionPAC__INTFLAGA__Type.html#a6a24655756223a11de0700ef7b467113">PAC_INTFLAGA_Type::RSTC_</a></div><div class="ttdeci">__I uint32_t RSTC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00197">pac.h:197</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGA__Type_html_a5595e182f568d040022828a7dae973b7"><div class="ttname"><a href="unionPAC__INTFLAGA__Type.html#a5595e182f568d040022828a7dae973b7">PAC_INTFLAGA_Type::TC0_</a></div><div class="ttdeci">__I uint32_t TC0_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00208">pac.h:208</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGB__Type_html_abf8a9c210c3ddcd55ab05599a0d64b6c"><div class="ttname"><a href="unionPAC__INTFLAGB__Type.html#abf8a9c210c3ddcd55ab05599a0d64b6c">PAC_INTFLAGB_Type::DSU_</a></div><div class="ttdeci">__I uint32_t DSU_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00258">pac.h:258</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGA__Type_html_a7a6220dfd32208d1565a7ec5f480576c"><div class="ttname"><a href="unionPAC__INTFLAGA__Type.html#a7a6220dfd32208d1565a7ec5f480576c">PAC_INTFLAGA_Type::uint32_t</a></div><div class="ttdeci">__I uint32_t</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00210">pac.h:210</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGA__Type_html_aab517d8db3c0e8ae6175f01fa838771a"><div class="ttname"><a href="unionPAC__INTFLAGA__Type.html#aab517d8db3c0e8ae6175f01fa838771a">PAC_INTFLAGA_Type::MCLK_</a></div><div class="ttdeci">__I uint32_t MCLK_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00196">pac.h:196</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGC__Type_html_ae670501a7336a5e9a357315adcf88dbc"><div class="ttname"><a href="unionPAC__INTFLAGC__Type.html#ae670501a7336a5e9a357315adcf88dbc">PAC_INTFLAGC_Type::TCC2_</a></div><div class="ttdeci">__I uint32_t TCC2_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00322">pac.h:322</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGC__Type_html_a296ad3b2f810fa13f696a4bd8730f4a0"><div class="ttname"><a href="unionPAC__INTFLAGC__Type.html#a296ad3b2f810fa13f696a4bd8730f4a0">PAC_INTFLAGC_Type::QSPI_</a></div><div class="ttdeci">__I uint32_t QSPI_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00332">pac.h:332</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGB__Type_html_a43699cc1634c4ba9fa31b1e35ae1866c"><div class="ttname"><a href="unionPAC__INTFLAGB__Type.html#a43699cc1634c4ba9fa31b1e35ae1866c">PAC_INTFLAGB_Type::PORT_</a></div><div class="ttdeci">__I uint32_t PORT_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00261">pac.h:261</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGC__Type_html_a97dbaa143295d908adb375f362088d99"><div class="ttname"><a href="unionPAC__INTFLAGC__Type.html#a97dbaa143295d908adb375f362088d99">PAC_INTFLAGC_Type::PDEC_</a></div><div class="ttdeci">__I uint32_t PDEC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00326">pac.h:326</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGB__Type_html_acea63acd8d9a3a8f0e1efa762425a2e9"><div class="ttname"><a href="unionPAC__INTFLAGB__Type.html#acea63acd8d9a3a8f0e1efa762425a2e9">PAC_INTFLAGB_Type::CMCC_</a></div><div class="ttdeci">__I uint32_t CMCC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00260">pac.h:260</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGB__Type_html_aa1cc3912243057d318814c9aa4cefb20"><div class="ttname"><a href="unionPAC__INTFLAGB__Type.html#aa1cc3912243057d318814c9aa4cefb20">PAC_INTFLAGB_Type::uint32_t</a></div><div class="ttdeci">__I uint32_t</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00265">pac.h:265</a></div></div>
<div class="ttc" id="aunionPAC__STATUSA__Type_html_a1f5dabc0c375e37909e9d27a2f3f8789"><div class="ttname"><a href="unionPAC__STATUSA__Type.html#a1f5dabc0c375e37909e9d27a2f3f8789">PAC_STATUSA_Type::EIC_</a></div><div class="ttdeci">uint32_t EIC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00440">pac.h:440</a></div></div>
<div class="ttc" id="aunionPAC__STATUSC__Type_html_ae183aaa4b9c1b661f2c2a963ffe49ea0"><div class="ttname"><a href="unionPAC__STATUSC__Type.html#ae183aaa4b9c1b661f2c2a963ffe49ea0">PAC_STATUSC_Type::TC5_</a></div><div class="ttdeci">uint32_t TC5_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00561">pac.h:561</a></div></div>
<div class="ttc" id="aunionPAC__WRCTRL__Type_html"><div class="ttname"><a href="unionPAC__WRCTRL__Type.html">PAC_WRCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00044">pac.h:44</a></div></div>
<div class="ttc" id="aunionPAC__STATUSB__Type_html_a2d0ab2400b7aef04fe1d7374abab6270"><div class="ttname"><a href="unionPAC__STATUSB__Type.html#a2d0ab2400b7aef04fe1d7374abab6270">PAC_STATUSB_Type::USB_</a></div><div class="ttdeci">uint32_t USB_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00493">pac.h:493</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGB__Type_html_a82b30ced1dc0078620083e1b73c4acda"><div class="ttname"><a href="unionPAC__INTFLAGB__Type.html#a82b30ced1dc0078620083e1b73c4acda">PAC_INTFLAGB_Type::DMAC_</a></div><div class="ttdeci">__I uint32_t DMAC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00262">pac.h:262</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGC__Type_html_a16f876f912b40e08156948d7be37a0e6"><div class="ttname"><a href="unionPAC__INTFLAGC__Type.html#a16f876f912b40e08156948d7be37a0e6">PAC_INTFLAGC_Type::AES_</a></div><div class="ttdeci">__I uint32_t AES_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00328">pac.h:328</a></div></div>
<div class="ttc" id="aunionPAC__INTENSET__Type_html_afc5b259bd2c160a171dc77aa00489306"><div class="ttname"><a href="unionPAC__INTENSET__Type.html#afc5b259bd2c160a171dc77aa00489306">PAC_INTENSET_Type::ERR</a></div><div class="ttdeci">uint8_t ERR</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00113">pac.h:113</a></div></div>
<div class="ttc" id="aunionPAC__STATUSC__Type_html_a95ba822bf0d300b89bf1afc1adca08d9"><div class="ttname"><a href="unionPAC__STATUSC__Type.html#a95ba822bf0d300b89bf1afc1adca08d9">PAC_STATUSC_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00572">pac.h:572</a></div></div>
<div class="ttc" id="aunionPAC__STATUSC__Type_html_aef37dec4312e0676d0f45ec905c782a7"><div class="ttname"><a href="unionPAC__STATUSC__Type.html#aef37dec4312e0676d0f45ec905c782a7">PAC_STATUSC_Type::CAN1_</a></div><div class="ttdeci">uint32_t CAN1_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00556">pac.h:556</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGAHB__Type_html_a1493abd9914771840e728a4dab68a1ea"><div class="ttname"><a href="unionPAC__INTFLAGAHB__Type.html#a1493abd9914771840e728a4dab68a1ea">PAC_INTFLAGAHB_Type::FLASH_</a></div><div class="ttdeci">__I uint32_t FLASH_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00131">pac.h:131</a></div></div>
<div class="ttc" id="astructPac_html"><div class="ttname"><a href="structPac.html">Pac</a></div><div class="ttdoc">PAC hardware registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00664">pac.h:664</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGB__Type_html_aa2eef6cf3256b0880a7fffe0b886525c"><div class="ttname"><a href="unionPAC__INTFLAGB__Type.html#aa2eef6cf3256b0880a7fffe0b886525c">PAC_INTFLAGB_Type::EVSYS_</a></div><div class="ttdeci">__I uint32_t EVSYS_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00264">pac.h:264</a></div></div>
<div class="ttc" id="aunionPAC__STATUSB__Type_html_a10bf937b659e19bdf05166ebb4da6bfd"><div class="ttname"><a href="unionPAC__STATUSB__Type.html#a10bf937b659e19bdf05166ebb4da6bfd">PAC_STATUSB_Type::TC2_</a></div><div class="ttdeci">uint32_t TC2_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00506">pac.h:506</a></div></div>
<div class="ttc" id="aunionPAC__STATUSB__Type_html_a4ac1bbd409a772332c60ceb4d5ffce7b"><div class="ttname"><a href="unionPAC__STATUSB__Type.html#a4ac1bbd409a772332c60ceb4d5ffce7b">PAC_STATUSB_Type::SERCOM2_</a></div><div class="ttdeci">uint32_t SERCOM2_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00502">pac.h:502</a></div></div>
<div class="ttc" id="aunionPAC__STATUSD__Type_html_aaae18611ba2b0ab03771050fb324f205"><div class="ttname"><a href="unionPAC__STATUSD__Type.html#aaae18611ba2b0ab03771050fb324f205">PAC_STATUSD_Type::SERCOM5_</a></div><div class="ttdeci">uint32_t SERCOM5_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00616">pac.h:616</a></div></div>
<div class="ttc" id="aunionPAC__STATUSA__Type_html_ae34e5714daff5891866834cc8e67437d"><div class="ttname"><a href="unionPAC__STATUSA__Type.html#ae34e5714daff5891866834cc8e67437d">PAC_STATUSA_Type::SERCOM0_</a></div><div class="ttdeci">uint32_t SERCOM0_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00442">pac.h:442</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGD__Type_html_ac2c56b9e111a6dbbfde71ebd541438b0"><div class="ttname"><a href="unionPAC__INTFLAGD__Type.html#ac2c56b9e111a6dbbfde71ebd541438b0">PAC_INTFLAGD_Type::uint32_t</a></div><div class="ttdeci">__I uint32_t</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00391">pac.h:391</a></div></div>
<div class="ttc" id="aunionPAC__STATUSB__Type_html_a28105d726409b1bdce18db79aba0f3fd"><div class="ttname"><a href="unionPAC__STATUSB__Type.html#a28105d726409b1bdce18db79aba0f3fd">PAC_STATUSB_Type::TC3_</a></div><div class="ttdeci">uint32_t TC3_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00507">pac.h:507</a></div></div>
<div class="ttc" id="aunionPAC__STATUSC__Type_html_a3363a6151fc88c53d9c211edf0980020"><div class="ttname"><a href="unionPAC__STATUSC__Type.html#a3363a6151fc88c53d9c211edf0980020">PAC_STATUSC_Type::TC4_</a></div><div class="ttdeci">uint32_t TC4_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00560">pac.h:560</a></div></div>
<div class="ttc" id="astructPac_html_a88c4b94bbb43bfc8bc6ef1c8315dd4b3"><div class="ttname"><a href="structPac.html#a88c4b94bbb43bfc8bc6ef1c8315dd4b3">Pac::INTFLAGA</a></div><div class="ttdeci">__IO PAC_INTFLAGA_Type INTFLAGA</div><div class="ttdoc">Offset: 0x14 (R/W 32) Peripheral interrupt flag status - Bridge A.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00672">pac.h:672</a></div></div>
<div class="ttc" id="aunionPAC__STATUSD__Type_html_a805c3aa69d37ab2f83277a6a7d37468c"><div class="ttname"><a href="unionPAC__STATUSD__Type.html#a805c3aa69d37ab2f83277a6a7d37468c">PAC_STATUSD_Type::TCC4_</a></div><div class="ttdeci">uint32_t TCC4_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00619">pac.h:619</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGAHB__Type_html_a1a621bbacf6593fe6841ccbaa61d3d98"><div class="ttname"><a href="unionPAC__INTFLAGAHB__Type.html#a1a621bbacf6593fe6841ccbaa61d3d98">PAC_INTFLAGAHB_Type::HPB3_</a></div><div class="ttdeci">__I uint32_t HPB3_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00141">pac.h:141</a></div></div>
<div class="ttc" id="aunionPAC__STATUSC__Type_html_ad9d7497d58f1ae14c64663a22ed532ce"><div class="ttname"><a href="unionPAC__STATUSC__Type.html#ad9d7497d58f1ae14c64663a22ed532ce">PAC_STATUSC_Type::AES_</a></div><div class="ttdeci">uint32_t AES_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00564">pac.h:564</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGC__Type_html_a05e4b98eeddfe34287a943d9fa865f5e"><div class="ttname"><a href="unionPAC__INTFLAGC__Type.html#a05e4b98eeddfe34287a943d9fa865f5e">PAC_INTFLAGC_Type::CCL_</a></div><div class="ttdeci">__I uint32_t CCL_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00333">pac.h:333</a></div></div>
<div class="ttc" id="aunionPAC__STATUSA__Type_html_a883b5beb94ad41135a8a7a6c08d9ae42"><div class="ttname"><a href="unionPAC__STATUSA__Type.html#a883b5beb94ad41135a8a7a6c08d9ae42">PAC_STATUSA_Type::TC0_</a></div><div class="ttdeci">uint32_t TC0_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00444">pac.h:444</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGB__Type_html_acdf853a942ed023f4f1c06ab94483ef1"><div class="ttname"><a href="unionPAC__INTFLAGB__Type.html#acdf853a942ed023f4f1c06ab94483ef1">PAC_INTFLAGB_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00276">pac.h:276</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGA__Type_html"><div class="ttname"><a href="unionPAC__INTFLAGA__Type.html">PAC_INTFLAGA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00192">pac.h:192</a></div></div>
<div class="ttc" id="aunionPAC__STATUSB__Type_html_a72a1ffd904ae6e4f55f15777753c8f29"><div class="ttname"><a href="unionPAC__STATUSB__Type.html#a72a1ffd904ae6e4f55f15777753c8f29">PAC_STATUSB_Type::SERCOM3_</a></div><div class="ttdeci">uint32_t SERCOM3_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00503">pac.h:503</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGD__Type_html_a8fc29f2d08e3860cb46efaa9bea5264a"><div class="ttname"><a href="unionPAC__INTFLAGD__Type.html#a8fc29f2d08e3860cb46efaa9bea5264a">PAC_INTFLAGD_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00393">pac.h:393</a></div></div>
<div class="ttc" id="aunionPAC__STATUSC__Type_html_aba4a2b1c7a8065832925d11a2bc8184d"><div class="ttname"><a href="unionPAC__STATUSC__Type.html#aba4a2b1c7a8065832925d11a2bc8184d">PAC_STATUSC_Type::AC_</a></div><div class="ttdeci">uint32_t AC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00563">pac.h:563</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGA__Type_html_a09c28099696365f89840c5597b74ac00"><div class="ttname"><a href="unionPAC__INTFLAGA__Type.html#a09c28099696365f89840c5597b74ac00">PAC_INTFLAGA_Type::SERCOM1_</a></div><div class="ttdeci">__I uint32_t SERCOM1_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00207">pac.h:207</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGA__Type_html_a95d433222779b9876e94e13368814529"><div class="ttname"><a href="unionPAC__INTFLAGA__Type.html#a95d433222779b9876e94e13368814529">PAC_INTFLAGA_Type::WDT_</a></div><div class="ttdeci">__I uint32_t WDT_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00202">pac.h:202</a></div></div>
<div class="ttc" id="aunionPAC__STATUSA__Type_html_a6832f4a521c2ab7a99bb9a858859a25a"><div class="ttname"><a href="unionPAC__STATUSA__Type.html#a6832f4a521c2ab7a99bb9a858859a25a">PAC_STATUSA_Type::SERCOM1_</a></div><div class="ttdeci">uint32_t SERCOM1_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00443">pac.h:443</a></div></div>
<div class="ttc" id="aunionPAC__STATUSB__Type_html_a01955777cbb20e7f676b2ba48d9ad205"><div class="ttname"><a href="unionPAC__STATUSB__Type.html#a01955777cbb20e7f676b2ba48d9ad205">PAC_STATUSB_Type::RAMECC_</a></div><div class="ttdeci">uint32_t RAMECC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00509">pac.h:509</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGC__Type_html_ad5e02e317c394fa5a913e6e646f02040"><div class="ttname"><a href="unionPAC__INTFLAGC__Type.html#ad5e02e317c394fa5a913e6e646f02040">PAC_INTFLAGC_Type::uint32_t</a></div><div class="ttdeci">__I uint32_t</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00334">pac.h:334</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGC__Type_html_aabdb939a85dd73d733b5abc8baaed9e2"><div class="ttname"><a href="unionPAC__INTFLAGC__Type.html#aabdb939a85dd73d733b5abc8baaed9e2">PAC_INTFLAGC_Type::TC4_</a></div><div class="ttdeci">__I uint32_t TC4_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00324">pac.h:324</a></div></div>
<div class="ttc" id="aunionPAC__STATUSB__Type_html_a954780964e038ef0e857007459bc1468"><div class="ttname"><a href="unionPAC__STATUSB__Type.html#a954780964e038ef0e857007459bc1468">PAC_STATUSB_Type::EVSYS_</a></div><div class="ttdeci">uint32_t EVSYS_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00500">pac.h:500</a></div></div>
<div class="ttc" id="aunionPAC__STATUSC__Type_html_a8f03e605a966e9913ee2bf1b477eb933"><div class="ttname"><a href="unionPAC__STATUSC__Type.html#a8f03e605a966e9913ee2bf1b477eb933">PAC_STATUSC_Type::TCC2_</a></div><div class="ttdeci">uint32_t TCC2_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00558">pac.h:558</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGA__Type_html_a6e74c9366d6bcb61cacf67b07d1229a1"><div class="ttname"><a href="unionPAC__INTFLAGA__Type.html#a6e74c9366d6bcb61cacf67b07d1229a1">PAC_INTFLAGA_Type::RTC_</a></div><div class="ttdeci">__I uint32_t RTC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00203">pac.h:203</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGC__Type_html_aff2d9a7a6e808ace1310cd4295b83158"><div class="ttname"><a href="unionPAC__INTFLAGC__Type.html#aff2d9a7a6e808ace1310cd4295b83158">PAC_INTFLAGC_Type::TC5_</a></div><div class="ttdeci">__I uint32_t TC5_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00325">pac.h:325</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGB__Type_html_aa710c7cc4bdf69480615823f4944aa20"><div class="ttname"><a href="unionPAC__INTFLAGB__Type.html#aa710c7cc4bdf69480615823f4944aa20">PAC_INTFLAGB_Type::RAMECC_</a></div><div class="ttdeci">__I uint32_t RAMECC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00273">pac.h:273</a></div></div>
<div class="ttc" id="aunionPAC__STATUSD__Type_html_aeb39ffd1974e586c5870ba617eceb9ae"><div class="ttname"><a href="unionPAC__STATUSD__Type.html#aeb39ffd1974e586c5870ba617eceb9ae">PAC_STATUSD_Type::SERCOM4_</a></div><div class="ttdeci">uint32_t SERCOM4_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00615">pac.h:615</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGB__Type_html_a9dad06dddaea9e7c0418c07e829c3d92"><div class="ttname"><a href="unionPAC__INTFLAGB__Type.html#a9dad06dddaea9e7c0418c07e829c3d92">PAC_INTFLAGB_Type::NVMCTRL_</a></div><div class="ttdeci">__I uint32_t NVMCTRL_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00259">pac.h:259</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGA__Type_html_a5b62a0a2939e792001834edc95b780f1"><div class="ttname"><a href="unionPAC__INTFLAGA__Type.html#a5b62a0a2939e792001834edc95b780f1">PAC_INTFLAGA_Type::OSCCTRL_</a></div><div class="ttdeci">__I uint32_t OSCCTRL_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00198">pac.h:198</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGAHB__Type_html_a4f02abe23ecb09a7e8b22aa17c75e72e"><div class="ttname"><a href="unionPAC__INTFLAGAHB__Type.html#a4f02abe23ecb09a7e8b22aa17c75e72e">PAC_INTFLAGAHB_Type::HPB0_</a></div><div class="ttdeci">__I uint32_t HPB0_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00138">pac.h:138</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGD__Type_html_ad6512d05650fcc3d8e305e2365402911"><div class="ttname"><a href="unionPAC__INTFLAGD__Type.html#ad6512d05650fcc3d8e305e2365402911">PAC_INTFLAGD_Type::TC6_</a></div><div class="ttdeci">__I uint32_t TC6_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00384">pac.h:384</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGC__Type_html_aa1321746f5b0830e0599e51d0f3c4744"><div class="ttname"><a href="unionPAC__INTFLAGC__Type.html#aa1321746f5b0830e0599e51d0f3c4744">PAC_INTFLAGC_Type::GMAC_</a></div><div class="ttdeci">__I uint32_t GMAC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00321">pac.h:321</a></div></div>
<div class="ttc" id="astructPac_html_a3a9b9a4ca0984c013fd139811a0a2ba0"><div class="ttname"><a href="structPac.html#a3a9b9a4ca0984c013fd139811a0a2ba0">Pac::STATUSB</a></div><div class="ttdeci">__I PAC_STATUSB_Type STATUSB</div><div class="ttdoc">Offset: 0x38 (R/ 32) Peripheral write protection status - Bridge B.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00678">pac.h:678</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGAHB__Type_html_a78cb36b5246ea3187029b85021e02e6f"><div class="ttname"><a href="unionPAC__INTFLAGAHB__Type.html#a78cb36b5246ea3187029b85021e02e6f">PAC_INTFLAGAHB_Type::uint32_t</a></div><div class="ttdeci">__I uint32_t</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00147">pac.h:147</a></div></div>
<div class="ttc" id="astructPac_html_aa24c383457a9d02e95b5338afd45a1d0"><div class="ttname"><a href="structPac.html#aa24c383457a9d02e95b5338afd45a1d0">Pac::INTFLAGB</a></div><div class="ttdeci">__IO PAC_INTFLAGB_Type INTFLAGB</div><div class="ttdoc">Offset: 0x18 (R/W 32) Peripheral interrupt flag status - Bridge B.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00673">pac.h:673</a></div></div>
<div class="ttc" id="aunionPAC__STATUSC__Type_html_a8afac9ad1faa89d165cf52f92b0d8052"><div class="ttname"><a href="unionPAC__STATUSC__Type.html#a8afac9ad1faa89d165cf52f92b0d8052">PAC_STATUSC_Type::PDEC_</a></div><div class="ttdeci">uint32_t PDEC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00562">pac.h:562</a></div></div>
<div class="ttc" id="aunionPAC__STATUSC__Type_html_af6a6165ddbe7bdf9bd379df06a143277"><div class="ttname"><a href="unionPAC__STATUSC__Type.html#af6a6165ddbe7bdf9bd379df06a143277">PAC_STATUSC_Type::QSPI_</a></div><div class="ttdeci">uint32_t QSPI_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00568">pac.h:568</a></div></div>
<div class="ttc" id="astructPac_html_abf41a3781084f01e0d278300cb763f29"><div class="ttname"><a href="structPac.html#abf41a3781084f01e0d278300cb763f29">Pac::STATUSC</a></div><div class="ttdeci">__I PAC_STATUSC_Type STATUSC</div><div class="ttdoc">Offset: 0x3C (R/ 32) Peripheral write protection status - Bridge C.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00679">pac.h:679</a></div></div>
<div class="ttc" id="aunionPAC__WRCTRL__Type_html_a2d42d5d5bf2f4ed9eb643ddc322f8049"><div class="ttname"><a href="unionPAC__WRCTRL__Type.html#a2d42d5d5bf2f4ed9eb643ddc322f8049">PAC_WRCTRL_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00050">pac.h:50</a></div></div>
<div class="ttc" id="aunionPAC__STATUSB__Type_html_a87dd2f4e0b864ec0843cfbeb3c42138a"><div class="ttname"><a href="unionPAC__STATUSB__Type.html#a87dd2f4e0b864ec0843cfbeb3c42138a">PAC_STATUSB_Type::CMCC_</a></div><div class="ttdeci">uint32_t CMCC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00496">pac.h:496</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGA__Type_html_a52682830a2ffd3c81aa5b7b7ae1c4066"><div class="ttname"><a href="unionPAC__INTFLAGA__Type.html#a52682830a2ffd3c81aa5b7b7ae1c4066">PAC_INTFLAGA_Type::EIC_</a></div><div class="ttdeci">__I uint32_t EIC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00204">pac.h:204</a></div></div>
<div class="ttc" id="aunionPAC__STATUSD__Type_html_a838bc12705b4d80d773cc754d8eea9d6"><div class="ttname"><a href="unionPAC__STATUSD__Type.html#a838bc12705b4d80d773cc754d8eea9d6">PAC_STATUSD_Type::ADC1_</a></div><div class="ttdeci">uint32_t ADC1_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00623">pac.h:623</a></div></div>
<div class="ttc" id="aunionPAC__STATUSB__Type_html_ae2a5ca7f0afb759aad4adc6b8f020f7e"><div class="ttname"><a href="unionPAC__STATUSB__Type.html#ae2a5ca7f0afb759aad4adc6b8f020f7e">PAC_STATUSB_Type::PORT_</a></div><div class="ttdeci">uint32_t PORT_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00497">pac.h:497</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGAHB__Type_html_aeb3f9bcef60e3e2638d884eaeab9ebb3"><div class="ttname"><a href="unionPAC__INTFLAGAHB__Type.html#aeb3f9bcef60e3e2638d884eaeab9ebb3">PAC_INTFLAGAHB_Type::PUKCC_</a></div><div class="ttdeci">__I uint32_t PUKCC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00142">pac.h:142</a></div></div>
<div class="ttc" id="astructPac_html_a710a1d05491b5b53c87e1ad8f98c178b"><div class="ttname"><a href="structPac.html#a710a1d05491b5b53c87e1ad8f98c178b">Pac::INTENSET</a></div><div class="ttdeci">__IO PAC_INTENSET_Type INTENSET</div><div class="ttdoc">Offset: 0x09 (R/W 8) Interrupt enable set.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00669">pac.h:669</a></div></div>
<div class="ttc" id="aunionPAC__STATUSB__Type_html_aed81a22b8a549d464b65d4312d6a7579"><div class="ttname"><a href="unionPAC__STATUSB__Type.html#aed81a22b8a549d464b65d4312d6a7579">PAC_STATUSB_Type::DSU_</a></div><div class="ttdeci">uint32_t DSU_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00494">pac.h:494</a></div></div>
<div class="ttc" id="aunionPAC__STATUSA__Type_html_a4a4e57cceb0c24c85cb62e58d021bbfc"><div class="ttname"><a href="unionPAC__STATUSA__Type.html#a4a4e57cceb0c24c85cb62e58d021bbfc">PAC_STATUSA_Type::PM_</a></div><div class="ttdeci">uint32_t PM_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00431">pac.h:431</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGD__Type_html_aca179dde58f3ff1f0cc029701b487add"><div class="ttname"><a href="unionPAC__INTFLAGD__Type.html#aca179dde58f3ff1f0cc029701b487add">PAC_INTFLAGD_Type::SERCOM7_</a></div><div class="ttdeci">__I uint32_t SERCOM7_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00382">pac.h:382</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGD__Type_html"><div class="ttname"><a href="unionPAC__INTFLAGD__Type.html">PAC_INTFLAGD_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00377">pac.h:377</a></div></div>
<div class="ttc" id="aunionPAC__STATUSC__Type_html_af8075cddccfd06a862d99fd1cedd2519"><div class="ttname"><a href="unionPAC__STATUSC__Type.html#af8075cddccfd06a862d99fd1cedd2519">PAC_STATUSC_Type::CAN0_</a></div><div class="ttdeci">uint32_t CAN0_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00555">pac.h:555</a></div></div>
<div class="ttc" id="aunionPAC__INTENSET__Type_html"><div class="ttname"><a href="unionPAC__INTENSET__Type.html">PAC_INTENSET_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00111">pac.h:111</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGAHB__Type_html_a540fa7338dbb77f067ecbc09c69394a8"><div class="ttname"><a href="unionPAC__INTFLAGAHB__Type.html#a540fa7338dbb77f067ecbc09c69394a8">PAC_INTFLAGAHB_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00149">pac.h:149</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGB__Type_html_a420ad99d701f2ca2909e0ac0f2799958"><div class="ttname"><a href="unionPAC__INTFLAGB__Type.html#a420ad99d701f2ca2909e0ac0f2799958">PAC_INTFLAGB_Type::TC3_</a></div><div class="ttdeci">__I uint32_t TC3_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00271">pac.h:271</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGC__Type_html_a27528872a5332ef9a1bafcc716ac7c19"><div class="ttname"><a href="unionPAC__INTFLAGC__Type.html#a27528872a5332ef9a1bafcc716ac7c19">PAC_INTFLAGC_Type::AC_</a></div><div class="ttdeci">__I uint32_t AC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00327">pac.h:327</a></div></div>
<div class="ttc" id="aunionPAC__STATUSB__Type_html_ab45344bf7c3a6b14b9ea65f4a9963433"><div class="ttname"><a href="unionPAC__STATUSB__Type.html#ab45344bf7c3a6b14b9ea65f4a9963433">PAC_STATUSB_Type::DMAC_</a></div><div class="ttdeci">uint32_t DMAC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00498">pac.h:498</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGA__Type_html_a5dd12b70fc137215000d2bf3875da549"><div class="ttname"><a href="unionPAC__INTFLAGA__Type.html#a5dd12b70fc137215000d2bf3875da549">PAC_INTFLAGA_Type::FREQM_</a></div><div class="ttdeci">__I uint32_t FREQM_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00205">pac.h:205</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGA__Type_html_ace4c8ba6ab5ad18c940146e24f158529"><div class="ttname"><a href="unionPAC__INTFLAGA__Type.html#ace4c8ba6ab5ad18c940146e24f158529">PAC_INTFLAGA_Type::SERCOM0_</a></div><div class="ttdeci">__I uint32_t SERCOM0_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00206">pac.h:206</a></div></div>
<div class="ttc" id="aunionPAC__INTENCLR__Type_html_aee8c569bbbc8cf9173802dde9754f76d"><div class="ttname"><a href="unionPAC__INTENCLR__Type.html#aee8c569bbbc8cf9173802dde9754f76d">PAC_INTENCLR_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00098">pac.h:98</a></div></div>
<div class="ttc" id="astructPac_html_ac6d1478ff1d24eb47f9cb43edeb282b3"><div class="ttname"><a href="structPac.html#ac6d1478ff1d24eb47f9cb43edeb282b3">Pac::INTFLAGD</a></div><div class="ttdeci">__IO PAC_INTFLAGD_Type INTFLAGD</div><div class="ttdoc">Offset: 0x20 (R/W 32) Peripheral interrupt flag status - Bridge D.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00675">pac.h:675</a></div></div>
<div class="ttc" id="aunionPAC__STATUSA__Type_html_a2fcc6b477e51fefc9f457effc0c61c04"><div class="ttname"><a href="unionPAC__STATUSA__Type.html#a2fcc6b477e51fefc9f457effc0c61c04">PAC_STATUSA_Type::FREQM_</a></div><div class="ttdeci">uint32_t FREQM_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00441">pac.h:441</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGAHB__Type_html_addf451dda42bd9b4bd1834403fc7b063"><div class="ttname"><a href="unionPAC__INTFLAGAHB__Type.html#addf451dda42bd9b4bd1834403fc7b063">PAC_INTFLAGAHB_Type::QSPI_</a></div><div class="ttdeci">__I uint32_t QSPI_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00145">pac.h:145</a></div></div>
<div class="ttc" id="aunionPAC__STATUSB__Type_html_a7d5683e6a305f2892c2c5c67e942d9df"><div class="ttname"><a href="unionPAC__STATUSB__Type.html#a7d5683e6a305f2892c2c5c67e942d9df">PAC_STATUSB_Type::HMATRIX_</a></div><div class="ttdeci">uint32_t HMATRIX_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00499">pac.h:499</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGD__Type_html_a73e6c998d7f7c1e9a8224bee7541d16b"><div class="ttname"><a href="unionPAC__INTFLAGD__Type.html#a73e6c998d7f7c1e9a8224bee7541d16b">PAC_INTFLAGD_Type::I2S_</a></div><div class="ttdeci">__I uint32_t I2S_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00389">pac.h:389</a></div></div>
<div class="ttc" id="astructPac_html_afaf2caaf5e4105c9a4cd93d998976793"><div class="ttname"><a href="structPac.html#afaf2caaf5e4105c9a4cd93d998976793">Pac::STATUSD</a></div><div class="ttdeci">__I PAC_STATUSD_Type STATUSD</div><div class="ttdoc">Offset: 0x40 (R/ 32) Peripheral write protection status - Bridge D.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00680">pac.h:680</a></div></div>
<div class="ttc" id="aunionPAC__STATUSA__Type_html_a71db262dfdd7bf0e7e95a179e4cfaaf2"><div class="ttname"><a href="unionPAC__STATUSA__Type.html#a71db262dfdd7bf0e7e95a179e4cfaaf2">PAC_STATUSA_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00448">pac.h:448</a></div></div>
<div class="ttc" id="aunionPAC__STATUSC__Type_html_a5f9b646fe1bb7d2b128eff77371c6df0"><div class="ttname"><a href="unionPAC__STATUSC__Type.html#a5f9b646fe1bb7d2b128eff77371c6df0">PAC_STATUSC_Type::TCC3_</a></div><div class="ttdeci">uint32_t TCC3_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00559">pac.h:559</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGD__Type_html_ae3bc8b5a1fb9ff5366701d71582ee39f"><div class="ttname"><a href="unionPAC__INTFLAGD__Type.html#ae3bc8b5a1fb9ff5366701d71582ee39f">PAC_INTFLAGD_Type::TC7_</a></div><div class="ttdeci">__I uint32_t TC7_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00385">pac.h:385</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGD__Type_html_a8ed92cc6f5f114f82bf3f77f6a9f602f"><div class="ttname"><a href="unionPAC__INTFLAGD__Type.html#a8ed92cc6f5f114f82bf3f77f6a9f602f">PAC_INTFLAGD_Type::ADC0_</a></div><div class="ttdeci">__I uint32_t ADC0_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00386">pac.h:386</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGA__Type_html_a41aaf8213e2017431cfb9aa20dd349b9"><div class="ttname"><a href="unionPAC__INTFLAGA__Type.html#a41aaf8213e2017431cfb9aa20dd349b9">PAC_INTFLAGA_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00212">pac.h:212</a></div></div>
<div class="ttc" id="asame54n19a_8h_html_a0d957f1433aaf5d70e4dc2b68288442d"><div class="ttname"><a href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a></div><div class="ttdeci">volatile const uint8_t RoReg8</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00053">same54n19a.h:53</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGB__Type_html_a2c8ab9a8e0b3a98aa9a444c02b88be09"><div class="ttname"><a href="unionPAC__INTFLAGB__Type.html#a2c8ab9a8e0b3a98aa9a444c02b88be09">PAC_INTFLAGB_Type::TCC0_</a></div><div class="ttdeci">__I uint32_t TCC0_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00268">pac.h:268</a></div></div>
<div class="ttc" id="aunionPAC__STATUSC__Type_html_a5d262296e65bd4ded79e6867a59ee8f9"><div class="ttname"><a href="unionPAC__STATUSC__Type.html#a5d262296e65bd4ded79e6867a59ee8f9">PAC_STATUSC_Type::GMAC_</a></div><div class="ttdeci">uint32_t GMAC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00557">pac.h:557</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGC__Type_html_ae4036404a026fc2d5612b47f60c43b5f"><div class="ttname"><a href="unionPAC__INTFLAGC__Type.html#ae4036404a026fc2d5612b47f60c43b5f">PAC_INTFLAGC_Type::ICM_</a></div><div class="ttdeci">__I uint32_t ICM_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00330">pac.h:330</a></div></div>
<div class="ttc" id="aunionPAC__STATUSB__Type_html_a7ca7d7fd80bac2ffe7dcccacd05a5544"><div class="ttname"><a href="unionPAC__STATUSB__Type.html#a7ca7d7fd80bac2ffe7dcccacd05a5544">PAC_STATUSB_Type::NVMCTRL_</a></div><div class="ttdeci">uint32_t NVMCTRL_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00495">pac.h:495</a></div></div>
<div class="ttc" id="aunionPAC__STATUSB__Type_html_a0a0d8a5ea1112797c973f7f557e2762c"><div class="ttname"><a href="unionPAC__STATUSB__Type.html#a0a0d8a5ea1112797c973f7f557e2762c">PAC_STATUSB_Type::TCC1_</a></div><div class="ttdeci">uint32_t TCC1_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00505">pac.h:505</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGB__Type_html_accaa67d99213e877b038d3d87f2c8535"><div class="ttname"><a href="unionPAC__INTFLAGB__Type.html#accaa67d99213e877b038d3d87f2c8535">PAC_INTFLAGB_Type::USB_</a></div><div class="ttdeci">__I uint32_t USB_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00257">pac.h:257</a></div></div>
<div class="ttc" id="aunionPAC__STATUSA__Type_html_a782fa17ee6ead608e2ab401072a97ede"><div class="ttname"><a href="unionPAC__STATUSA__Type.html#a782fa17ee6ead608e2ab401072a97ede">PAC_STATUSA_Type::WDT_</a></div><div class="ttdeci">uint32_t WDT_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00438">pac.h:438</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGB__Type_html"><div class="ttname"><a href="unionPAC__INTFLAGB__Type.html">PAC_INTFLAGB_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00255">pac.h:255</a></div></div>
<div class="ttc" id="aunionPAC__INTENSET__Type_html_a7dbbd6533558a1cd00f547a1d51d42a4"><div class="ttname"><a href="unionPAC__INTENSET__Type.html#a7dbbd6533558a1cd00f547a1d51d42a4">PAC_INTENSET_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00116">pac.h:116</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGD__Type_html_a2ed7d13d59aa2ef7c00ae44092e6fa2d"><div class="ttname"><a href="unionPAC__INTFLAGD__Type.html#a2ed7d13d59aa2ef7c00ae44092e6fa2d">PAC_INTFLAGD_Type::SERCOM5_</a></div><div class="ttdeci">__I uint32_t SERCOM5_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00380">pac.h:380</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGC__Type_html_aba570551a632e3978c436fa9599cad9b"><div class="ttname"><a href="unionPAC__INTFLAGC__Type.html#aba570551a632e3978c436fa9599cad9b">PAC_INTFLAGC_Type::TRNG_</a></div><div class="ttdeci">__I uint32_t TRNG_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00329">pac.h:329</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGAHB__Type_html_a2d4c3bba65e47d367fb014731fa70f61"><div class="ttname"><a href="unionPAC__INTFLAGAHB__Type.html#a2d4c3bba65e47d367fb014731fa70f61">PAC_INTFLAGAHB_Type::RAMCM4S_</a></div><div class="ttdeci">__I uint32_t RAMCM4S_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00134">pac.h:134</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGB__Type_html_a42ab2afce5b6d4014a963a099ba802d1"><div class="ttname"><a href="unionPAC__INTFLAGB__Type.html#a42ab2afce5b6d4014a963a099ba802d1">PAC_INTFLAGB_Type::TC2_</a></div><div class="ttdeci">__I uint32_t TC2_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00270">pac.h:270</a></div></div>
<div class="ttc" id="aunionPAC__EVCTRL__Type_html_ab816f0a266ad03a5db3b743a45ad3a7b"><div class="ttname"><a href="unionPAC__EVCTRL__Type.html#ab816f0a266ad03a5db3b743a45ad3a7b">PAC_EVCTRL_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00080">pac.h:80</a></div></div>
<div class="ttc" id="aunionPAC__INTENCLR__Type_html"><div class="ttname"><a href="unionPAC__INTENCLR__Type.html">PAC_INTENCLR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00093">pac.h:93</a></div></div>
<div class="ttc" id="aunionPAC__STATUSC__Type_html"><div class="ttname"><a href="unionPAC__STATUSC__Type.html">PAC_STATUSC_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00553">pac.h:553</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGD__Type_html_a966704eb1cee1b8be9de6a67ba297324"><div class="ttname"><a href="unionPAC__INTFLAGD__Type.html#a966704eb1cee1b8be9de6a67ba297324">PAC_INTFLAGD_Type::SERCOM4_</a></div><div class="ttdeci">__I uint32_t SERCOM4_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00379">pac.h:379</a></div></div>
<div class="ttc" id="astructPac_html_a43204082738d35bfd321db9f92960be4"><div class="ttname"><a href="structPac.html#a43204082738d35bfd321db9f92960be4">Pac::INTFLAGAHB</a></div><div class="ttdeci">__IO PAC_INTFLAGAHB_Type INTFLAGAHB</div><div class="ttdoc">Offset: 0x10 (R/W 32) Bridge interrupt flag status.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00671">pac.h:671</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGD__Type_html_a28ca84661663e359d029690a111697ab"><div class="ttname"><a href="unionPAC__INTFLAGD__Type.html#a28ca84661663e359d029690a111697ab">PAC_INTFLAGD_Type::SERCOM6_</a></div><div class="ttdeci">__I uint32_t SERCOM6_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00381">pac.h:381</a></div></div>
<div class="ttc" id="aunionPAC__STATUSA__Type_html_a631d9236e06650f3ebf513995836c364"><div class="ttname"><a href="unionPAC__STATUSA__Type.html#a631d9236e06650f3ebf513995836c364">PAC_STATUSA_Type::SUPC_</a></div><div class="ttdeci">uint32_t SUPC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00436">pac.h:436</a></div></div>
<div class="ttc" id="astructPac_html_a4b2496dfffd2d47da5afc77c0b259338"><div class="ttname"><a href="structPac.html#a4b2496dfffd2d47da5afc77c0b259338">Pac::WRCTRL</a></div><div class="ttdeci">__IO PAC_WRCTRL_Type WRCTRL</div><div class="ttdoc">Offset: 0x00 (R/W 32) Write control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00665">pac.h:665</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGC__Type_html_a8740afb91b0bc8183aae69ce38479b5f"><div class="ttname"><a href="unionPAC__INTFLAGC__Type.html#a8740afb91b0bc8183aae69ce38479b5f">PAC_INTFLAGC_Type::PUKCC_</a></div><div class="ttdeci">__I uint32_t PUKCC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00331">pac.h:331</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGC__Type_html_a023532988624a71f27db6a355145296b"><div class="ttname"><a href="unionPAC__INTFLAGC__Type.html#a023532988624a71f27db6a355145296b">PAC_INTFLAGC_Type::CAN1_</a></div><div class="ttdeci">__I uint32_t CAN1_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00320">pac.h:320</a></div></div>
<div class="ttc" id="aunionPAC__STATUSD__Type_html_aecf40a0978d52b8522fb1de530f73116"><div class="ttname"><a href="unionPAC__STATUSD__Type.html#aecf40a0978d52b8522fb1de530f73116">PAC_STATUSD_Type::SERCOM7_</a></div><div class="ttdeci">uint32_t SERCOM7_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00618">pac.h:618</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGD__Type_html_ad0a850c671e07d56fa9a253fdd994389"><div class="ttname"><a href="unionPAC__INTFLAGD__Type.html#ad0a850c671e07d56fa9a253fdd994389">PAC_INTFLAGD_Type::PCC_</a></div><div class="ttdeci">__I uint32_t PCC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00390">pac.h:390</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGA__Type_html_a9525cf7e0c365d6f0c5a68b73c759964"><div class="ttname"><a href="unionPAC__INTFLAGA__Type.html#a9525cf7e0c365d6f0c5a68b73c759964">PAC_INTFLAGA_Type::PM_</a></div><div class="ttdeci">__I uint32_t PM_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00195">pac.h:195</a></div></div>
<div class="ttc" id="aunionPAC__EVCTRL__Type_html"><div class="ttname"><a href="unionPAC__EVCTRL__Type.html">PAC_EVCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00075">pac.h:75</a></div></div>
<div class="ttc" id="aunionPAC__STATUSA__Type_html_ad72331de1a7eb1f25850ed105b6e38d4"><div class="ttname"><a href="unionPAC__STATUSA__Type.html#ad72331de1a7eb1f25850ed105b6e38d4">PAC_STATUSA_Type::PAC_</a></div><div class="ttdeci">uint32_t PAC_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00430">pac.h:430</a></div></div>
<div class="ttc" id="aunionPAC__INTFLAGC__Type_html_ae236ec8b8a9d57f74bd7198501411f8c"><div class="ttname"><a href="unionPAC__INTFLAGC__Type.html#ae236ec8b8a9d57f74bd7198501411f8c">PAC_INTFLAGC_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00336">pac.h:336</a></div></div>
<div class="ttc" id="aunionPAC__STATUSA__Type_html_aca0419c15c216c75000c20dc5df2d967"><div class="ttname"><a href="unionPAC__STATUSA__Type.html#aca0419c15c216c75000c20dc5df2d967">PAC_STATUSA_Type::OSCCTRL_</a></div><div class="ttdeci">uint32_t OSCCTRL_</div><div class="ttdef"><b>Definition:</b> <a href="component_2pac_8h_source.html#l00434">pac.h:434</a></div></div>
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<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_2bb2e10400507f879251f0324a0a8c7c.html">component</a></li> </ul>
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<a href="#nested-classes">Data Structures</a> &#124;
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<div class="title">pcc.h File Reference</div> </div>
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<p>Component description for PCC.
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<p><a href="component_2pcc_8h_source.html">Go to the source code of this file.</a></p>
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Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionPCC__MR__Type.html">PCC_MR_Type</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionPCC__IER__Type.html">PCC_IER_Type</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionPCC__IDR__Type.html">PCC_IDR_Type</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionPCC__IMR__Type.html">PCC_IMR_Type</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionPCC__ISR__Type.html">PCC_ISR_Type</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionPCC__RHR__Type.html">PCC_RHR_Type</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionPCC__WPMR__Type.html">PCC_WPMR_Type</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionPCC__WPSR__Type.html">PCC_WPSR_Type</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structPcc.html">Pcc</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">PCC hardware registers. <a href="structPcc.html#details">More...</a><br /></td></tr>
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</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:a4e35cb21ead84aa814bd6dfa9eaf8079"><td class="memItemLeft" align="right" valign="top"><a id="a4e35cb21ead84aa814bd6dfa9eaf8079"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_U2017</b></td></tr>
<tr class="separator:a4e35cb21ead84aa814bd6dfa9eaf8079"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6003465897a211f506b05560ee55e796"><td class="memItemLeft" align="right" valign="top"><a id="a6003465897a211f506b05560ee55e796"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>REV_PCC</b>&#160;&#160;&#160;0x110</td></tr>
<tr class="separator:a6003465897a211f506b05560ee55e796"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abe16c7b5f0364b3c92b50af9ddcdace5"><td class="memItemLeft" align="right" valign="top"><a id="abe16c7b5f0364b3c92b50af9ddcdace5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#abe16c7b5f0364b3c92b50af9ddcdace5">PCC_MR_OFFSET</a>&#160;&#160;&#160;0x00</td></tr>
<tr class="memdesc:abe16c7b5f0364b3c92b50af9ddcdace5"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_MR offset) Mode Register <br /></td></tr>
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<tr class="memitem:ad8d7c7ba1405078359dc204d5ab172f7"><td class="memItemLeft" align="right" valign="top"><a id="ad8d7c7ba1405078359dc204d5ab172f7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#ad8d7c7ba1405078359dc204d5ab172f7">PCC_MR_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:ad8d7c7ba1405078359dc204d5ab172f7"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_MR reset_value) Mode Register <br /></td></tr>
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<tr class="memitem:aa2f688df32f65aee98dd6faa104a00e8"><td class="memItemLeft" align="right" valign="top"><a id="aa2f688df32f65aee98dd6faa104a00e8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#aa2f688df32f65aee98dd6faa104a00e8">PCC_MR_PCEN_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:aa2f688df32f65aee98dd6faa104a00e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_MR) Parallel Capture Enable <br /></td></tr>
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<tr class="memitem:a8fe695a65bd1a5ce347525f29f900ad8"><td class="memItemLeft" align="right" valign="top"><a id="a8fe695a65bd1a5ce347525f29f900ad8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_MR_PCEN</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2pcc_8h.html#aa2f688df32f65aee98dd6faa104a00e8">PCC_MR_PCEN_Pos</a>)</td></tr>
<tr class="separator:a8fe695a65bd1a5ce347525f29f900ad8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a32db4f441363770b323326ba3447a8e4"><td class="memItemLeft" align="right" valign="top"><a id="a32db4f441363770b323326ba3447a8e4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a32db4f441363770b323326ba3447a8e4">PCC_MR_DSIZE_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:a32db4f441363770b323326ba3447a8e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_MR) Data size <br /></td></tr>
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<tr class="memitem:a54bdaabba09f689578e4806e08e1b99e"><td class="memItemLeft" align="right" valign="top"><a id="a54bdaabba09f689578e4806e08e1b99e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_MR_DSIZE_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2pcc_8h.html#a32db4f441363770b323326ba3447a8e4">PCC_MR_DSIZE_Pos</a>)</td></tr>
<tr class="separator:a54bdaabba09f689578e4806e08e1b99e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a75c89a3c1245ee1c3015b62755ba0103"><td class="memItemLeft" align="right" valign="top"><a id="a75c89a3c1245ee1c3015b62755ba0103"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_MR_DSIZE</b>(value)&#160;&#160;&#160;(PCC_MR_DSIZE_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2pcc_8h.html#a32db4f441363770b323326ba3447a8e4">PCC_MR_DSIZE_Pos</a>))</td></tr>
<tr class="separator:a75c89a3c1245ee1c3015b62755ba0103"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a44db3b3e5e54997723ffee9ac5a57c93"><td class="memItemLeft" align="right" valign="top"><a id="a44db3b3e5e54997723ffee9ac5a57c93"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a44db3b3e5e54997723ffee9ac5a57c93">PCC_MR_SCALE_Pos</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:a44db3b3e5e54997723ffee9ac5a57c93"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_MR) Scale data <br /></td></tr>
<tr class="separator:a44db3b3e5e54997723ffee9ac5a57c93"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:accd888e142e4ccd5c9db08c8d64460a5"><td class="memItemLeft" align="right" valign="top"><a id="accd888e142e4ccd5c9db08c8d64460a5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_MR_SCALE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2pcc_8h.html#a44db3b3e5e54997723ffee9ac5a57c93">PCC_MR_SCALE_Pos</a>)</td></tr>
<tr class="separator:accd888e142e4ccd5c9db08c8d64460a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ada2ec39d94e76b1bf98ec0cb906acd17"><td class="memItemLeft" align="right" valign="top"><a id="ada2ec39d94e76b1bf98ec0cb906acd17"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#ada2ec39d94e76b1bf98ec0cb906acd17">PCC_MR_ALWYS_Pos</a>&#160;&#160;&#160;9</td></tr>
<tr class="memdesc:ada2ec39d94e76b1bf98ec0cb906acd17"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_MR) Always Sampling <br /></td></tr>
<tr class="separator:ada2ec39d94e76b1bf98ec0cb906acd17"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afb2247de4b60fc9166f0157ed1623480"><td class="memItemLeft" align="right" valign="top"><a id="afb2247de4b60fc9166f0157ed1623480"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_MR_ALWYS</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2pcc_8h.html#ada2ec39d94e76b1bf98ec0cb906acd17">PCC_MR_ALWYS_Pos</a>)</td></tr>
<tr class="separator:afb2247de4b60fc9166f0157ed1623480"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6227f3ab181a9d3cb91508ae485141c4"><td class="memItemLeft" align="right" valign="top"><a id="a6227f3ab181a9d3cb91508ae485141c4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a6227f3ab181a9d3cb91508ae485141c4">PCC_MR_HALFS_Pos</a>&#160;&#160;&#160;10</td></tr>
<tr class="memdesc:a6227f3ab181a9d3cb91508ae485141c4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_MR) Half Sampling <br /></td></tr>
<tr class="separator:a6227f3ab181a9d3cb91508ae485141c4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a08de4d5286995f8b36587bce63f22dc8"><td class="memItemLeft" align="right" valign="top"><a id="a08de4d5286995f8b36587bce63f22dc8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_MR_HALFS</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2pcc_8h.html#a6227f3ab181a9d3cb91508ae485141c4">PCC_MR_HALFS_Pos</a>)</td></tr>
<tr class="separator:a08de4d5286995f8b36587bce63f22dc8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a339418d5c6f6fe8622bd94174d9af5cb"><td class="memItemLeft" align="right" valign="top"><a id="a339418d5c6f6fe8622bd94174d9af5cb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a339418d5c6f6fe8622bd94174d9af5cb">PCC_MR_FRSTS_Pos</a>&#160;&#160;&#160;11</td></tr>
<tr class="memdesc:a339418d5c6f6fe8622bd94174d9af5cb"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_MR) First sample <br /></td></tr>
<tr class="separator:a339418d5c6f6fe8622bd94174d9af5cb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aca03521adb6d0ec4c8d338d20f404234"><td class="memItemLeft" align="right" valign="top"><a id="aca03521adb6d0ec4c8d338d20f404234"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_MR_FRSTS</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2pcc_8h.html#a339418d5c6f6fe8622bd94174d9af5cb">PCC_MR_FRSTS_Pos</a>)</td></tr>
<tr class="separator:aca03521adb6d0ec4c8d338d20f404234"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aaf4ad3c430637f8bbbd1acbe60f3dd85"><td class="memItemLeft" align="right" valign="top"><a id="aaf4ad3c430637f8bbbd1acbe60f3dd85"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#aaf4ad3c430637f8bbbd1acbe60f3dd85">PCC_MR_ISIZE_Pos</a>&#160;&#160;&#160;16</td></tr>
<tr class="memdesc:aaf4ad3c430637f8bbbd1acbe60f3dd85"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_MR) Input Data Size <br /></td></tr>
<tr class="separator:aaf4ad3c430637f8bbbd1acbe60f3dd85"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af824daf541253256e2e139a458f165c8"><td class="memItemLeft" align="right" valign="top"><a id="af824daf541253256e2e139a458f165c8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_MR_ISIZE_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) &lt;&lt; <a class="el" href="component_2pcc_8h.html#aaf4ad3c430637f8bbbd1acbe60f3dd85">PCC_MR_ISIZE_Pos</a>)</td></tr>
<tr class="separator:af824daf541253256e2e139a458f165c8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a73bda88faa35a47b7e6a83a398142503"><td class="memItemLeft" align="right" valign="top"><a id="a73bda88faa35a47b7e6a83a398142503"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_MR_ISIZE</b>(value)&#160;&#160;&#160;(PCC_MR_ISIZE_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2pcc_8h.html#aaf4ad3c430637f8bbbd1acbe60f3dd85">PCC_MR_ISIZE_Pos</a>))</td></tr>
<tr class="separator:a73bda88faa35a47b7e6a83a398142503"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad600b9b7c54609930d89c9f9a5d4dbc2"><td class="memItemLeft" align="right" valign="top"><a id="ad600b9b7c54609930d89c9f9a5d4dbc2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#ad600b9b7c54609930d89c9f9a5d4dbc2">PCC_MR_CID_Pos</a>&#160;&#160;&#160;30</td></tr>
<tr class="memdesc:ad600b9b7c54609930d89c9f9a5d4dbc2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_MR) Clear If Disabled <br /></td></tr>
<tr class="separator:ad600b9b7c54609930d89c9f9a5d4dbc2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac991bc569bd92f8a5f2b751fd12ace12"><td class="memItemLeft" align="right" valign="top"><a id="ac991bc569bd92f8a5f2b751fd12ace12"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_MR_CID_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2pcc_8h.html#ad600b9b7c54609930d89c9f9a5d4dbc2">PCC_MR_CID_Pos</a>)</td></tr>
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<tr class="memitem:ae6c8bcb01c6b74d51288500d6c499ed0"><td class="memItemLeft" align="right" valign="top"><a id="ae6c8bcb01c6b74d51288500d6c499ed0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_MR_CID</b>(value)&#160;&#160;&#160;(PCC_MR_CID_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2pcc_8h.html#ad600b9b7c54609930d89c9f9a5d4dbc2">PCC_MR_CID_Pos</a>))</td></tr>
<tr class="separator:ae6c8bcb01c6b74d51288500d6c499ed0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac13de15c80e7865e8cfccaad7b1a41cc"><td class="memItemLeft" align="right" valign="top"><a id="ac13de15c80e7865e8cfccaad7b1a41cc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#ac13de15c80e7865e8cfccaad7b1a41cc">PCC_MR_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xC0070F31)</td></tr>
<tr class="memdesc:ac13de15c80e7865e8cfccaad7b1a41cc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_MR) MASK Register <br /></td></tr>
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<tr class="memitem:a04455cec5fbea18cff02cda1a99e0a4d"><td class="memItemLeft" align="right" valign="top"><a id="a04455cec5fbea18cff02cda1a99e0a4d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a04455cec5fbea18cff02cda1a99e0a4d">PCC_IER_OFFSET</a>&#160;&#160;&#160;0x04</td></tr>
<tr class="memdesc:a04455cec5fbea18cff02cda1a99e0a4d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_IER offset) Interrupt Enable Register <br /></td></tr>
<tr class="separator:a04455cec5fbea18cff02cda1a99e0a4d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab8e7dc5a7151033a244edcc2330b0a56"><td class="memItemLeft" align="right" valign="top"><a id="ab8e7dc5a7151033a244edcc2330b0a56"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#ab8e7dc5a7151033a244edcc2330b0a56">PCC_IER_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:ab8e7dc5a7151033a244edcc2330b0a56"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_IER reset_value) Interrupt Enable Register <br /></td></tr>
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<tr class="memitem:a8e23f175cc1ec773591acc46cfe0bd0f"><td class="memItemLeft" align="right" valign="top"><a id="a8e23f175cc1ec773591acc46cfe0bd0f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a8e23f175cc1ec773591acc46cfe0bd0f">PCC_IER_DRDY_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a8e23f175cc1ec773591acc46cfe0bd0f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_IER) Data Ready Interrupt Enable <br /></td></tr>
<tr class="separator:a8e23f175cc1ec773591acc46cfe0bd0f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a323e64e0e6ee3942cb5e856f1fdbb318"><td class="memItemLeft" align="right" valign="top"><a id="a323e64e0e6ee3942cb5e856f1fdbb318"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_IER_DRDY</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2pcc_8h.html#a8e23f175cc1ec773591acc46cfe0bd0f">PCC_IER_DRDY_Pos</a>)</td></tr>
<tr class="separator:a323e64e0e6ee3942cb5e856f1fdbb318"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac6f2728ea8a412b211def673ecb65e78"><td class="memItemLeft" align="right" valign="top"><a id="ac6f2728ea8a412b211def673ecb65e78"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#ac6f2728ea8a412b211def673ecb65e78">PCC_IER_OVRE_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:ac6f2728ea8a412b211def673ecb65e78"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_IER) Overrun Error Interrupt Enable <br /></td></tr>
<tr class="separator:ac6f2728ea8a412b211def673ecb65e78"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4168f13e664b1d7b2c0561874f5a9c85"><td class="memItemLeft" align="right" valign="top"><a id="a4168f13e664b1d7b2c0561874f5a9c85"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_IER_OVRE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2pcc_8h.html#ac6f2728ea8a412b211def673ecb65e78">PCC_IER_OVRE_Pos</a>)</td></tr>
<tr class="separator:a4168f13e664b1d7b2c0561874f5a9c85"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a72a1d200817a6f738f11e5d838e86f32"><td class="memItemLeft" align="right" valign="top"><a id="a72a1d200817a6f738f11e5d838e86f32"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a72a1d200817a6f738f11e5d838e86f32">PCC_IER_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000003)</td></tr>
<tr class="memdesc:a72a1d200817a6f738f11e5d838e86f32"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_IER) MASK Register <br /></td></tr>
<tr class="separator:a72a1d200817a6f738f11e5d838e86f32"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a46c605907efe863e46261c68f9e638ca"><td class="memItemLeft" align="right" valign="top"><a id="a46c605907efe863e46261c68f9e638ca"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a46c605907efe863e46261c68f9e638ca">PCC_IDR_OFFSET</a>&#160;&#160;&#160;0x08</td></tr>
<tr class="memdesc:a46c605907efe863e46261c68f9e638ca"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_IDR offset) Interrupt Disable Register <br /></td></tr>
<tr class="separator:a46c605907efe863e46261c68f9e638ca"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2df4f3c107c1da36f799050997f0d22e"><td class="memItemLeft" align="right" valign="top"><a id="a2df4f3c107c1da36f799050997f0d22e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a2df4f3c107c1da36f799050997f0d22e">PCC_IDR_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a2df4f3c107c1da36f799050997f0d22e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_IDR reset_value) Interrupt Disable Register <br /></td></tr>
<tr class="separator:a2df4f3c107c1da36f799050997f0d22e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af10dc873f13b918c69a05fb61bf4a34c"><td class="memItemLeft" align="right" valign="top"><a id="af10dc873f13b918c69a05fb61bf4a34c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#af10dc873f13b918c69a05fb61bf4a34c">PCC_IDR_DRDY_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:af10dc873f13b918c69a05fb61bf4a34c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_IDR) Data Ready Interrupt Disable <br /></td></tr>
<tr class="separator:af10dc873f13b918c69a05fb61bf4a34c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac839cf4f5ca672d9642b8888bba8daa4"><td class="memItemLeft" align="right" valign="top"><a id="ac839cf4f5ca672d9642b8888bba8daa4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_IDR_DRDY</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2pcc_8h.html#af10dc873f13b918c69a05fb61bf4a34c">PCC_IDR_DRDY_Pos</a>)</td></tr>
<tr class="separator:ac839cf4f5ca672d9642b8888bba8daa4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aecc0e350756dae83a40c32f9c2395cc7"><td class="memItemLeft" align="right" valign="top"><a id="aecc0e350756dae83a40c32f9c2395cc7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#aecc0e350756dae83a40c32f9c2395cc7">PCC_IDR_OVRE_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:aecc0e350756dae83a40c32f9c2395cc7"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_IDR) Overrun Error Interrupt Disable <br /></td></tr>
<tr class="separator:aecc0e350756dae83a40c32f9c2395cc7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a57be997be6bb41970a01bf610815d072"><td class="memItemLeft" align="right" valign="top"><a id="a57be997be6bb41970a01bf610815d072"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_IDR_OVRE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2pcc_8h.html#aecc0e350756dae83a40c32f9c2395cc7">PCC_IDR_OVRE_Pos</a>)</td></tr>
<tr class="separator:a57be997be6bb41970a01bf610815d072"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af8f8036f039e5d26c2e529a8a838cb5c"><td class="memItemLeft" align="right" valign="top"><a id="af8f8036f039e5d26c2e529a8a838cb5c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#af8f8036f039e5d26c2e529a8a838cb5c">PCC_IDR_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000003)</td></tr>
<tr class="memdesc:af8f8036f039e5d26c2e529a8a838cb5c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_IDR) MASK Register <br /></td></tr>
<tr class="separator:af8f8036f039e5d26c2e529a8a838cb5c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a70b6c9a36ef4245cdae57c55af4aaaad"><td class="memItemLeft" align="right" valign="top"><a id="a70b6c9a36ef4245cdae57c55af4aaaad"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a70b6c9a36ef4245cdae57c55af4aaaad">PCC_IMR_OFFSET</a>&#160;&#160;&#160;0x0C</td></tr>
<tr class="memdesc:a70b6c9a36ef4245cdae57c55af4aaaad"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_IMR offset) Interrupt Mask Register <br /></td></tr>
<tr class="separator:a70b6c9a36ef4245cdae57c55af4aaaad"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6862a1b82b634ed667aa69783d74ee8a"><td class="memItemLeft" align="right" valign="top"><a id="a6862a1b82b634ed667aa69783d74ee8a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a6862a1b82b634ed667aa69783d74ee8a">PCC_IMR_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a6862a1b82b634ed667aa69783d74ee8a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_IMR reset_value) Interrupt Mask Register <br /></td></tr>
<tr class="separator:a6862a1b82b634ed667aa69783d74ee8a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a728fea4b29b9eae92b782315e5f313dd"><td class="memItemLeft" align="right" valign="top"><a id="a728fea4b29b9eae92b782315e5f313dd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a728fea4b29b9eae92b782315e5f313dd">PCC_IMR_DRDY_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a728fea4b29b9eae92b782315e5f313dd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_IMR) Data Ready Interrupt Mask <br /></td></tr>
<tr class="separator:a728fea4b29b9eae92b782315e5f313dd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8d5d6dd219c9ebdcac7380f30956e7b5"><td class="memItemLeft" align="right" valign="top"><a id="a8d5d6dd219c9ebdcac7380f30956e7b5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_IMR_DRDY</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2pcc_8h.html#a728fea4b29b9eae92b782315e5f313dd">PCC_IMR_DRDY_Pos</a>)</td></tr>
<tr class="separator:a8d5d6dd219c9ebdcac7380f30956e7b5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6410ef9d1ca48b9f676dafc28772f323"><td class="memItemLeft" align="right" valign="top"><a id="a6410ef9d1ca48b9f676dafc28772f323"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a6410ef9d1ca48b9f676dafc28772f323">PCC_IMR_OVRE_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:a6410ef9d1ca48b9f676dafc28772f323"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_IMR) Overrun Error Interrupt Mask <br /></td></tr>
<tr class="separator:a6410ef9d1ca48b9f676dafc28772f323"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a578b997681663d59350bea64994c40ca"><td class="memItemLeft" align="right" valign="top"><a id="a578b997681663d59350bea64994c40ca"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_IMR_OVRE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2pcc_8h.html#a6410ef9d1ca48b9f676dafc28772f323">PCC_IMR_OVRE_Pos</a>)</td></tr>
<tr class="separator:a578b997681663d59350bea64994c40ca"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac0c0568b06fcac79024c81d71a7c9a79"><td class="memItemLeft" align="right" valign="top"><a id="ac0c0568b06fcac79024c81d71a7c9a79"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#ac0c0568b06fcac79024c81d71a7c9a79">PCC_IMR_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000003)</td></tr>
<tr class="memdesc:ac0c0568b06fcac79024c81d71a7c9a79"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_IMR) MASK Register <br /></td></tr>
<tr class="separator:ac0c0568b06fcac79024c81d71a7c9a79"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae1efffb83b9583b99be0e5b62bece6f4"><td class="memItemLeft" align="right" valign="top"><a id="ae1efffb83b9583b99be0e5b62bece6f4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#ae1efffb83b9583b99be0e5b62bece6f4">PCC_ISR_OFFSET</a>&#160;&#160;&#160;0x10</td></tr>
<tr class="memdesc:ae1efffb83b9583b99be0e5b62bece6f4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_ISR offset) Interrupt Status Register <br /></td></tr>
<tr class="separator:ae1efffb83b9583b99be0e5b62bece6f4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5c496d2c30fa3c1e15b0add8ef7eb6f6"><td class="memItemLeft" align="right" valign="top"><a id="a5c496d2c30fa3c1e15b0add8ef7eb6f6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a5c496d2c30fa3c1e15b0add8ef7eb6f6">PCC_ISR_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a5c496d2c30fa3c1e15b0add8ef7eb6f6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_ISR reset_value) Interrupt Status Register <br /></td></tr>
<tr class="separator:a5c496d2c30fa3c1e15b0add8ef7eb6f6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac0dd9b90a1744f753b1a4b0556f51901"><td class="memItemLeft" align="right" valign="top"><a id="ac0dd9b90a1744f753b1a4b0556f51901"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#ac0dd9b90a1744f753b1a4b0556f51901">PCC_ISR_DRDY_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ac0dd9b90a1744f753b1a4b0556f51901"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_ISR) Data Ready Interrupt Status <br /></td></tr>
<tr class="separator:ac0dd9b90a1744f753b1a4b0556f51901"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aac7d9e281b96b7f04609e17bfc7d1f9c"><td class="memItemLeft" align="right" valign="top"><a id="aac7d9e281b96b7f04609e17bfc7d1f9c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_ISR_DRDY</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2pcc_8h.html#ac0dd9b90a1744f753b1a4b0556f51901">PCC_ISR_DRDY_Pos</a>)</td></tr>
<tr class="separator:aac7d9e281b96b7f04609e17bfc7d1f9c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa0b359eb2325727f0763430233540c52"><td class="memItemLeft" align="right" valign="top"><a id="aa0b359eb2325727f0763430233540c52"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#aa0b359eb2325727f0763430233540c52">PCC_ISR_OVRE_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:aa0b359eb2325727f0763430233540c52"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_ISR) Overrun Error Interrupt Status <br /></td></tr>
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<tr class="memitem:a147306a765379c071be6468ead13c45d"><td class="memItemLeft" align="right" valign="top"><a id="a147306a765379c071be6468ead13c45d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_ISR_OVRE</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2pcc_8h.html#aa0b359eb2325727f0763430233540c52">PCC_ISR_OVRE_Pos</a>)</td></tr>
<tr class="separator:a147306a765379c071be6468ead13c45d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2b75d8ba5be63620debdf4ef98098ca0"><td class="memItemLeft" align="right" valign="top"><a id="a2b75d8ba5be63620debdf4ef98098ca0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a2b75d8ba5be63620debdf4ef98098ca0">PCC_ISR_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000003)</td></tr>
<tr class="memdesc:a2b75d8ba5be63620debdf4ef98098ca0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_ISR) MASK Register <br /></td></tr>
<tr class="separator:a2b75d8ba5be63620debdf4ef98098ca0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7769f078892febe675944a3acec20067"><td class="memItemLeft" align="right" valign="top"><a id="a7769f078892febe675944a3acec20067"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a7769f078892febe675944a3acec20067">PCC_RHR_OFFSET</a>&#160;&#160;&#160;0x14</td></tr>
<tr class="memdesc:a7769f078892febe675944a3acec20067"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_RHR offset) Reception Holding Register <br /></td></tr>
<tr class="separator:a7769f078892febe675944a3acec20067"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a36d1b49b7e277c4f39c636f6574c39db"><td class="memItemLeft" align="right" valign="top"><a id="a36d1b49b7e277c4f39c636f6574c39db"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a36d1b49b7e277c4f39c636f6574c39db">PCC_RHR_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a36d1b49b7e277c4f39c636f6574c39db"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_RHR reset_value) Reception Holding Register <br /></td></tr>
<tr class="separator:a36d1b49b7e277c4f39c636f6574c39db"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a90662ce7f86b63b830c1a883f9762f3c"><td class="memItemLeft" align="right" valign="top"><a id="a90662ce7f86b63b830c1a883f9762f3c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a90662ce7f86b63b830c1a883f9762f3c">PCC_RHR_RDATA_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a90662ce7f86b63b830c1a883f9762f3c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_RHR) Reception Data <br /></td></tr>
<tr class="separator:a90662ce7f86b63b830c1a883f9762f3c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1e1d6af9bc62b70038bff87d68287a55"><td class="memItemLeft" align="right" valign="top"><a id="a1e1d6af9bc62b70038bff87d68287a55"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_RHR_RDATA_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF) &lt;&lt; <a class="el" href="component_2pcc_8h.html#a90662ce7f86b63b830c1a883f9762f3c">PCC_RHR_RDATA_Pos</a>)</td></tr>
<tr class="separator:a1e1d6af9bc62b70038bff87d68287a55"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a31947bd41d8319d57a2c5dccec46fed3"><td class="memItemLeft" align="right" valign="top"><a id="a31947bd41d8319d57a2c5dccec46fed3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_RHR_RDATA</b>(value)&#160;&#160;&#160;(PCC_RHR_RDATA_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2pcc_8h.html#a90662ce7f86b63b830c1a883f9762f3c">PCC_RHR_RDATA_Pos</a>))</td></tr>
<tr class="separator:a31947bd41d8319d57a2c5dccec46fed3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5234737701963b81b4a99c293a4ff0ce"><td class="memItemLeft" align="right" valign="top"><a id="a5234737701963b81b4a99c293a4ff0ce"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a5234737701963b81b4a99c293a4ff0ce">PCC_RHR_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:a5234737701963b81b4a99c293a4ff0ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_RHR) MASK Register <br /></td></tr>
<tr class="separator:a5234737701963b81b4a99c293a4ff0ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1b38544917f4b7e3bfa9b60014b1c4d6"><td class="memItemLeft" align="right" valign="top"><a id="a1b38544917f4b7e3bfa9b60014b1c4d6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a1b38544917f4b7e3bfa9b60014b1c4d6">PCC_WPMR_OFFSET</a>&#160;&#160;&#160;0xE0</td></tr>
<tr class="memdesc:a1b38544917f4b7e3bfa9b60014b1c4d6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_WPMR offset) Write Protection Mode Register <br /></td></tr>
<tr class="separator:a1b38544917f4b7e3bfa9b60014b1c4d6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a159781cbe8254f1ca45799575ab17ca6"><td class="memItemLeft" align="right" valign="top"><a id="a159781cbe8254f1ca45799575ab17ca6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a159781cbe8254f1ca45799575ab17ca6">PCC_WPMR_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a159781cbe8254f1ca45799575ab17ca6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_WPMR reset_value) Write Protection Mode Register <br /></td></tr>
<tr class="separator:a159781cbe8254f1ca45799575ab17ca6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afe9e54d60083e19457da5b5c70a8b1c6"><td class="memItemLeft" align="right" valign="top"><a id="afe9e54d60083e19457da5b5c70a8b1c6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#afe9e54d60083e19457da5b5c70a8b1c6">PCC_WPMR_WPEN_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:afe9e54d60083e19457da5b5c70a8b1c6"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_WPMR) Write Protection Enable <br /></td></tr>
<tr class="separator:afe9e54d60083e19457da5b5c70a8b1c6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7de95ebe0ecf7a8c14b56b7f3a4a6643"><td class="memItemLeft" align="right" valign="top"><a id="a7de95ebe0ecf7a8c14b56b7f3a4a6643"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_WPMR_WPEN</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2pcc_8h.html#afe9e54d60083e19457da5b5c70a8b1c6">PCC_WPMR_WPEN_Pos</a>)</td></tr>
<tr class="separator:a7de95ebe0ecf7a8c14b56b7f3a4a6643"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae607ff7b99d4271d80b2c057d2a4025f"><td class="memItemLeft" align="right" valign="top"><a id="ae607ff7b99d4271d80b2c057d2a4025f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#ae607ff7b99d4271d80b2c057d2a4025f">PCC_WPMR_WPKEY_Pos</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:ae607ff7b99d4271d80b2c057d2a4025f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_WPMR) Write Protection Key <br /></td></tr>
<tr class="separator:ae607ff7b99d4271d80b2c057d2a4025f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a80cf2a1ff25d4898df75ac446ab5d162"><td class="memItemLeft" align="right" valign="top"><a id="a80cf2a1ff25d4898df75ac446ab5d162"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_WPMR_WPKEY_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFF) &lt;&lt; <a class="el" href="component_2pcc_8h.html#ae607ff7b99d4271d80b2c057d2a4025f">PCC_WPMR_WPKEY_Pos</a>)</td></tr>
<tr class="separator:a80cf2a1ff25d4898df75ac446ab5d162"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9b7746fc032bb65282172c792639b1e0"><td class="memItemLeft" align="right" valign="top"><a id="a9b7746fc032bb65282172c792639b1e0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_WPMR_WPKEY</b>(value)&#160;&#160;&#160;(PCC_WPMR_WPKEY_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2pcc_8h.html#ae607ff7b99d4271d80b2c057d2a4025f">PCC_WPMR_WPKEY_Pos</a>))</td></tr>
<tr class="separator:a9b7746fc032bb65282172c792639b1e0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a81169f2799b6df95807e3a521d309948"><td class="memItemLeft" align="right" valign="top"><a id="a81169f2799b6df95807e3a521d309948"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a81169f2799b6df95807e3a521d309948">PCC_WPMR_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFF01)</td></tr>
<tr class="memdesc:a81169f2799b6df95807e3a521d309948"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_WPMR) MASK Register <br /></td></tr>
<tr class="separator:a81169f2799b6df95807e3a521d309948"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a76a394c01142bde41e7ce1a4e7285043"><td class="memItemLeft" align="right" valign="top"><a id="a76a394c01142bde41e7ce1a4e7285043"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a76a394c01142bde41e7ce1a4e7285043">PCC_WPSR_OFFSET</a>&#160;&#160;&#160;0xE4</td></tr>
<tr class="memdesc:a76a394c01142bde41e7ce1a4e7285043"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_WPSR offset) Write Protection Status Register <br /></td></tr>
<tr class="separator:a76a394c01142bde41e7ce1a4e7285043"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a923c7a70b7e03ba5cc13a498ef90def3"><td class="memItemLeft" align="right" valign="top"><a id="a923c7a70b7e03ba5cc13a498ef90def3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a923c7a70b7e03ba5cc13a498ef90def3">PCC_WPSR_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a923c7a70b7e03ba5cc13a498ef90def3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_WPSR reset_value) Write Protection Status Register <br /></td></tr>
<tr class="separator:a923c7a70b7e03ba5cc13a498ef90def3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aaefc795cdf28abca9a95827f69faf668"><td class="memItemLeft" align="right" valign="top"><a id="aaefc795cdf28abca9a95827f69faf668"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#aaefc795cdf28abca9a95827f69faf668">PCC_WPSR_WPVS_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:aaefc795cdf28abca9a95827f69faf668"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_WPSR) Write Protection Violation Source <br /></td></tr>
<tr class="separator:aaefc795cdf28abca9a95827f69faf668"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a50e2c3b4d2c3730f08679174b76cefbf"><td class="memItemLeft" align="right" valign="top"><a id="a50e2c3b4d2c3730f08679174b76cefbf"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_WPSR_WPVS</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2pcc_8h.html#aaefc795cdf28abca9a95827f69faf668">PCC_WPSR_WPVS_Pos</a>)</td></tr>
<tr class="separator:a50e2c3b4d2c3730f08679174b76cefbf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a00c53e3b7428569d5d6a701b97c76ed1"><td class="memItemLeft" align="right" valign="top"><a id="a00c53e3b7428569d5d6a701b97c76ed1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a00c53e3b7428569d5d6a701b97c76ed1">PCC_WPSR_WPVSRC_Pos</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:a00c53e3b7428569d5d6a701b97c76ed1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_WPSR) Write Protection Violation Status <br /></td></tr>
<tr class="separator:a00c53e3b7428569d5d6a701b97c76ed1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0a7866929ccdf909716f5f986207affc"><td class="memItemLeft" align="right" valign="top"><a id="a0a7866929ccdf909716f5f986207affc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_WPSR_WPVSRC_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF) &lt;&lt; <a class="el" href="component_2pcc_8h.html#a00c53e3b7428569d5d6a701b97c76ed1">PCC_WPSR_WPVSRC_Pos</a>)</td></tr>
<tr class="separator:a0a7866929ccdf909716f5f986207affc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a69b5500e434250255422cafc71c1d426"><td class="memItemLeft" align="right" valign="top"><a id="a69b5500e434250255422cafc71c1d426"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PCC_WPSR_WPVSRC</b>(value)&#160;&#160;&#160;(PCC_WPSR_WPVSRC_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2pcc_8h.html#a00c53e3b7428569d5d6a701b97c76ed1">PCC_WPSR_WPVSRC_Pos</a>))</td></tr>
<tr class="separator:a69b5500e434250255422cafc71c1d426"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a28ee2303726b788111a300f04de2fd1d"><td class="memItemLeft" align="right" valign="top"><a id="a28ee2303726b788111a300f04de2fd1d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pcc_8h.html#a28ee2303726b788111a300f04de2fd1d">PCC_WPSR_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00FFFF01)</td></tr>
<tr class="memdesc:a28ee2303726b788111a300f04de2fd1d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PCC_WPSR) MASK Register <br /></td></tr>
<tr class="separator:a28ee2303726b788111a300f04de2fd1d"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Component description for PCC. </p>
<p>Copyright (c) 2019 Microchip Technology Inc.</p>
<p>\asf_license_start </p>
<p class="definition">Definition in file <a class="el" href="component_2pcc_8h_source.html">pcc.h</a>.</p>
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<div class="title">pcc.h</div> </div>
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<a href="component_2pcc_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_PCC_COMPONENT_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_PCC_COMPONENT_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160; </div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define PCC_U2017</span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define REV_PCC 0x110</span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160; </div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="comment">/* -------- PCC_MR : (PCC Offset: 0x00) (R/W 32) Mode Register -------- */</span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00044"></a><span class="lineno"><a class="line" href="unionPCC__MR__Type.html"> 44</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00046"></a><span class="lineno"><a class="line" href="unionPCC__MR__Type.html#a7444dce128e917f5d86b55a8263b8e1a"> 46</a></span>&#160; uint32_t <a class="code" href="unionPCC__MR__Type.html#a7444dce128e917f5d86b55a8263b8e1a">PCEN</a>:1; </div>
<div class="line"><a name="l00047"></a><span class="lineno"><a class="line" href="unionPCC__MR__Type.html#a352c4769717eaffd264c5e614467f31f"> 47</a></span>&#160; uint32_t :3; </div>
<div class="line"><a name="l00048"></a><span class="lineno"><a class="line" href="unionPCC__MR__Type.html#a6c177b778df7c5de116ae78d8b24e66b"> 48</a></span>&#160; uint32_t <a class="code" href="unionPCC__MR__Type.html#a6c177b778df7c5de116ae78d8b24e66b">DSIZE</a>:2; </div>
<div class="line"><a name="l00049"></a><span class="lineno"><a class="line" href="unionPCC__MR__Type.html#ae97703a462df0a1026aad291ccfad7e5"> 49</a></span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00050"></a><span class="lineno"><a class="line" href="unionPCC__MR__Type.html#a94c2cd67739551055c53e5f8ebf80d81"> 50</a></span>&#160; uint32_t <a class="code" href="unionPCC__MR__Type.html#a94c2cd67739551055c53e5f8ebf80d81">SCALE</a>:1; </div>
<div class="line"><a name="l00051"></a><span class="lineno"><a class="line" href="unionPCC__MR__Type.html#ade19eca877bcb3b3d30fdb33f8b4f028"> 51</a></span>&#160; uint32_t <a class="code" href="unionPCC__MR__Type.html#ade19eca877bcb3b3d30fdb33f8b4f028">ALWYS</a>:1; </div>
<div class="line"><a name="l00052"></a><span class="lineno"><a class="line" href="unionPCC__MR__Type.html#a31a45244b60213d85e1b9b102489e989"> 52</a></span>&#160; uint32_t <a class="code" href="unionPCC__MR__Type.html#a31a45244b60213d85e1b9b102489e989">HALFS</a>:1; </div>
<div class="line"><a name="l00053"></a><span class="lineno"><a class="line" href="unionPCC__MR__Type.html#adcb7742f8decf8f9f701a5ceb96b1846"> 53</a></span>&#160; uint32_t <a class="code" href="unionPCC__MR__Type.html#adcb7742f8decf8f9f701a5ceb96b1846">FRSTS</a>:1; </div>
<div class="line"><a name="l00054"></a><span class="lineno"><a class="line" href="unionPCC__MR__Type.html#a94421e4ad077ceada17648dbddf0bec6"> 54</a></span>&#160; uint32_t :4; </div>
<div class="line"><a name="l00055"></a><span class="lineno"><a class="line" href="unionPCC__MR__Type.html#a72461a175cdb0e4605ccfedb93c1d39a"> 55</a></span>&#160; uint32_t <a class="code" href="unionPCC__MR__Type.html#a72461a175cdb0e4605ccfedb93c1d39a">ISIZE</a>:3; </div>
<div class="line"><a name="l00056"></a><span class="lineno"><a class="line" href="unionPCC__MR__Type.html#a5c6fa927b2c8c24b4f923b6a315dbef4"> 56</a></span>&#160; uint32_t :11; </div>
<div class="line"><a name="l00057"></a><span class="lineno"><a class="line" href="unionPCC__MR__Type.html#abe82184db0ed5b1de10605fc3e00961b"> 57</a></span>&#160; uint32_t <a class="code" href="unionPCC__MR__Type.html#abe82184db0ed5b1de10605fc3e00961b">CID</a>:2; </div>
<div class="line"><a name="l00058"></a><span class="lineno"><a class="line" href="unionPCC__MR__Type.html#a1ed869ed8a29dfe1cc0ed0b502879101"> 58</a></span>&#160; } bit; </div>
<div class="line"><a name="l00059"></a><span class="lineno"><a class="line" href="unionPCC__MR__Type.html#ab38bba74598aef0c2f1a43c959e9e99b"> 59</a></span>&#160; uint32_t <a class="code" href="unionPCC__MR__Type.html#ab38bba74598aef0c2f1a43c959e9e99b">reg</a>; </div>
<div class="line"><a name="l00060"></a><span class="lineno"> 60</span>&#160;} <a class="code" href="unionPCC__MR__Type.html">PCC_MR_Type</a>;</div>
<div class="line"><a name="l00061"></a><span class="lineno"> 61</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00062"></a><span class="lineno"> 62</span>&#160; </div>
<div class="line"><a name="l00063"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#abe16c7b5f0364b3c92b50af9ddcdace5"> 63</a></span>&#160;<span class="preprocessor">#define PCC_MR_OFFSET 0x00 </span></div>
<div class="line"><a name="l00064"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#ad8d7c7ba1405078359dc204d5ab172f7"> 64</a></span>&#160;<span class="preprocessor">#define PCC_MR_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00066"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#aa2f688df32f65aee98dd6faa104a00e8"> 66</a></span>&#160;<span class="preprocessor">#define PCC_MR_PCEN_Pos 0 </span></div>
<div class="line"><a name="l00067"></a><span class="lineno"> 67</span>&#160;<span class="preprocessor">#define PCC_MR_PCEN (_U_(0x1) &lt;&lt; PCC_MR_PCEN_Pos)</span></div>
<div class="line"><a name="l00068"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a32db4f441363770b323326ba3447a8e4"> 68</a></span>&#160;<span class="preprocessor">#define PCC_MR_DSIZE_Pos 4 </span></div>
<div class="line"><a name="l00069"></a><span class="lineno"> 69</span>&#160;<span class="preprocessor">#define PCC_MR_DSIZE_Msk (_U_(0x3) &lt;&lt; PCC_MR_DSIZE_Pos)</span></div>
<div class="line"><a name="l00070"></a><span class="lineno"> 70</span>&#160;<span class="preprocessor">#define PCC_MR_DSIZE(value) (PCC_MR_DSIZE_Msk &amp; ((value) &lt;&lt; PCC_MR_DSIZE_Pos))</span></div>
<div class="line"><a name="l00071"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a44db3b3e5e54997723ffee9ac5a57c93"> 71</a></span>&#160;<span class="preprocessor">#define PCC_MR_SCALE_Pos 8 </span></div>
<div class="line"><a name="l00072"></a><span class="lineno"> 72</span>&#160;<span class="preprocessor">#define PCC_MR_SCALE (_U_(0x1) &lt;&lt; PCC_MR_SCALE_Pos)</span></div>
<div class="line"><a name="l00073"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#ada2ec39d94e76b1bf98ec0cb906acd17"> 73</a></span>&#160;<span class="preprocessor">#define PCC_MR_ALWYS_Pos 9 </span></div>
<div class="line"><a name="l00074"></a><span class="lineno"> 74</span>&#160;<span class="preprocessor">#define PCC_MR_ALWYS (_U_(0x1) &lt;&lt; PCC_MR_ALWYS_Pos)</span></div>
<div class="line"><a name="l00075"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a6227f3ab181a9d3cb91508ae485141c4"> 75</a></span>&#160;<span class="preprocessor">#define PCC_MR_HALFS_Pos 10 </span></div>
<div class="line"><a name="l00076"></a><span class="lineno"> 76</span>&#160;<span class="preprocessor">#define PCC_MR_HALFS (_U_(0x1) &lt;&lt; PCC_MR_HALFS_Pos)</span></div>
<div class="line"><a name="l00077"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a339418d5c6f6fe8622bd94174d9af5cb"> 77</a></span>&#160;<span class="preprocessor">#define PCC_MR_FRSTS_Pos 11 </span></div>
<div class="line"><a name="l00078"></a><span class="lineno"> 78</span>&#160;<span class="preprocessor">#define PCC_MR_FRSTS (_U_(0x1) &lt;&lt; PCC_MR_FRSTS_Pos)</span></div>
<div class="line"><a name="l00079"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#aaf4ad3c430637f8bbbd1acbe60f3dd85"> 79</a></span>&#160;<span class="preprocessor">#define PCC_MR_ISIZE_Pos 16 </span></div>
<div class="line"><a name="l00080"></a><span class="lineno"> 80</span>&#160;<span class="preprocessor">#define PCC_MR_ISIZE_Msk (_U_(0x7) &lt;&lt; PCC_MR_ISIZE_Pos)</span></div>
<div class="line"><a name="l00081"></a><span class="lineno"> 81</span>&#160;<span class="preprocessor">#define PCC_MR_ISIZE(value) (PCC_MR_ISIZE_Msk &amp; ((value) &lt;&lt; PCC_MR_ISIZE_Pos))</span></div>
<div class="line"><a name="l00082"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#ad600b9b7c54609930d89c9f9a5d4dbc2"> 82</a></span>&#160;<span class="preprocessor">#define PCC_MR_CID_Pos 30 </span></div>
<div class="line"><a name="l00083"></a><span class="lineno"> 83</span>&#160;<span class="preprocessor">#define PCC_MR_CID_Msk (_U_(0x3) &lt;&lt; PCC_MR_CID_Pos)</span></div>
<div class="line"><a name="l00084"></a><span class="lineno"> 84</span>&#160;<span class="preprocessor">#define PCC_MR_CID(value) (PCC_MR_CID_Msk &amp; ((value) &lt;&lt; PCC_MR_CID_Pos))</span></div>
<div class="line"><a name="l00085"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#ac13de15c80e7865e8cfccaad7b1a41cc"> 85</a></span>&#160;<span class="preprocessor">#define PCC_MR_MASK _U_(0xC0070F31) </span></div>
<div class="line"><a name="l00087"></a><span class="lineno"> 87</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PCC_IER : (PCC Offset: 0x04) ( /W 32) Interrupt Enable Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00088"></a><span class="lineno"> 88</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00089"></a><span class="lineno"><a class="line" href="unionPCC__IER__Type.html"> 89</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00090"></a><span class="lineno"> 90</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00091"></a><span class="lineno"><a class="line" href="unionPCC__IER__Type.html#aefa00063c8962e538bfa75808b3cf40a"> 91</a></span>&#160; uint32_t <a class="code" href="unionPCC__IER__Type.html#aefa00063c8962e538bfa75808b3cf40a">DRDY</a>:1; </div>
<div class="line"><a name="l00092"></a><span class="lineno"><a class="line" href="unionPCC__IER__Type.html#a6f959e1608b95115dbd3bfc14fe1d098"> 92</a></span>&#160; uint32_t <a class="code" href="unionPCC__IER__Type.html#a6f959e1608b95115dbd3bfc14fe1d098">OVRE</a>:1; </div>
<div class="line"><a name="l00093"></a><span class="lineno"><a class="line" href="unionPCC__IER__Type.html#a1ed537b96cde31cd61f616a0b8c5e7b9"> 93</a></span>&#160; uint32_t :30; </div>
<div class="line"><a name="l00094"></a><span class="lineno"><a class="line" href="unionPCC__IER__Type.html#ab034b231fd75e3968b3a15410775f6d4"> 94</a></span>&#160; } bit; </div>
<div class="line"><a name="l00095"></a><span class="lineno"><a class="line" href="unionPCC__IER__Type.html#afdcbecdda104ac998a212ba7f11bd27a"> 95</a></span>&#160; uint32_t <a class="code" href="unionPCC__IER__Type.html#afdcbecdda104ac998a212ba7f11bd27a">reg</a>; </div>
<div class="line"><a name="l00096"></a><span class="lineno"> 96</span>&#160;} <a class="code" href="unionPCC__IER__Type.html">PCC_IER_Type</a>;</div>
<div class="line"><a name="l00097"></a><span class="lineno"> 97</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00098"></a><span class="lineno"> 98</span>&#160; </div>
<div class="line"><a name="l00099"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a04455cec5fbea18cff02cda1a99e0a4d"> 99</a></span>&#160;<span class="preprocessor">#define PCC_IER_OFFSET 0x04 </span></div>
<div class="line"><a name="l00100"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#ab8e7dc5a7151033a244edcc2330b0a56"> 100</a></span>&#160;<span class="preprocessor">#define PCC_IER_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00102"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a8e23f175cc1ec773591acc46cfe0bd0f"> 102</a></span>&#160;<span class="preprocessor">#define PCC_IER_DRDY_Pos 0 </span></div>
<div class="line"><a name="l00103"></a><span class="lineno"> 103</span>&#160;<span class="preprocessor">#define PCC_IER_DRDY (_U_(0x1) &lt;&lt; PCC_IER_DRDY_Pos)</span></div>
<div class="line"><a name="l00104"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#ac6f2728ea8a412b211def673ecb65e78"> 104</a></span>&#160;<span class="preprocessor">#define PCC_IER_OVRE_Pos 1 </span></div>
<div class="line"><a name="l00105"></a><span class="lineno"> 105</span>&#160;<span class="preprocessor">#define PCC_IER_OVRE (_U_(0x1) &lt;&lt; PCC_IER_OVRE_Pos)</span></div>
<div class="line"><a name="l00106"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a72a1d200817a6f738f11e5d838e86f32"> 106</a></span>&#160;<span class="preprocessor">#define PCC_IER_MASK _U_(0x00000003) </span></div>
<div class="line"><a name="l00108"></a><span class="lineno"> 108</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PCC_IDR : (PCC Offset: 0x08) ( /W 32) Interrupt Disable Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00109"></a><span class="lineno"> 109</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00110"></a><span class="lineno"><a class="line" href="unionPCC__IDR__Type.html"> 110</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00111"></a><span class="lineno"> 111</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00112"></a><span class="lineno"><a class="line" href="unionPCC__IDR__Type.html#a12d51065b15771e660c5d08852334f54"> 112</a></span>&#160; uint32_t <a class="code" href="unionPCC__IDR__Type.html#a12d51065b15771e660c5d08852334f54">DRDY</a>:1; </div>
<div class="line"><a name="l00113"></a><span class="lineno"><a class="line" href="unionPCC__IDR__Type.html#a0e37b38c257b7f8542081459f78e9ab0"> 113</a></span>&#160; uint32_t <a class="code" href="unionPCC__IDR__Type.html#a0e37b38c257b7f8542081459f78e9ab0">OVRE</a>:1; </div>
<div class="line"><a name="l00114"></a><span class="lineno"><a class="line" href="unionPCC__IDR__Type.html#a4967cf965752bcecf6f7d9678afc4cb1"> 114</a></span>&#160; uint32_t :30; </div>
<div class="line"><a name="l00115"></a><span class="lineno"><a class="line" href="unionPCC__IDR__Type.html#a146233a2a26066a997520f52eb9699f6"> 115</a></span>&#160; } bit; </div>
<div class="line"><a name="l00116"></a><span class="lineno"><a class="line" href="unionPCC__IDR__Type.html#afcac0122e0be5b9fe85167a79b4e135e"> 116</a></span>&#160; uint32_t <a class="code" href="unionPCC__IDR__Type.html#afcac0122e0be5b9fe85167a79b4e135e">reg</a>; </div>
<div class="line"><a name="l00117"></a><span class="lineno"> 117</span>&#160;} <a class="code" href="unionPCC__IDR__Type.html">PCC_IDR_Type</a>;</div>
<div class="line"><a name="l00118"></a><span class="lineno"> 118</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00119"></a><span class="lineno"> 119</span>&#160; </div>
<div class="line"><a name="l00120"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a46c605907efe863e46261c68f9e638ca"> 120</a></span>&#160;<span class="preprocessor">#define PCC_IDR_OFFSET 0x08 </span></div>
<div class="line"><a name="l00121"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a2df4f3c107c1da36f799050997f0d22e"> 121</a></span>&#160;<span class="preprocessor">#define PCC_IDR_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00123"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#af10dc873f13b918c69a05fb61bf4a34c"> 123</a></span>&#160;<span class="preprocessor">#define PCC_IDR_DRDY_Pos 0 </span></div>
<div class="line"><a name="l00124"></a><span class="lineno"> 124</span>&#160;<span class="preprocessor">#define PCC_IDR_DRDY (_U_(0x1) &lt;&lt; PCC_IDR_DRDY_Pos)</span></div>
<div class="line"><a name="l00125"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#aecc0e350756dae83a40c32f9c2395cc7"> 125</a></span>&#160;<span class="preprocessor">#define PCC_IDR_OVRE_Pos 1 </span></div>
<div class="line"><a name="l00126"></a><span class="lineno"> 126</span>&#160;<span class="preprocessor">#define PCC_IDR_OVRE (_U_(0x1) &lt;&lt; PCC_IDR_OVRE_Pos)</span></div>
<div class="line"><a name="l00127"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#af8f8036f039e5d26c2e529a8a838cb5c"> 127</a></span>&#160;<span class="preprocessor">#define PCC_IDR_MASK _U_(0x00000003) </span></div>
<div class="line"><a name="l00129"></a><span class="lineno"> 129</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PCC_IMR : (PCC Offset: 0x0C) (R/ 32) Interrupt Mask Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00130"></a><span class="lineno"> 130</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00131"></a><span class="lineno"><a class="line" href="unionPCC__IMR__Type.html"> 131</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00132"></a><span class="lineno"> 132</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00133"></a><span class="lineno"><a class="line" href="unionPCC__IMR__Type.html#a2152d12467e0ec051fab893125f6bbe6"> 133</a></span>&#160; uint32_t <a class="code" href="unionPCC__IMR__Type.html#a2152d12467e0ec051fab893125f6bbe6">DRDY</a>:1; </div>
<div class="line"><a name="l00134"></a><span class="lineno"><a class="line" href="unionPCC__IMR__Type.html#a7e6628b541818e819edd5c3f62c12a95"> 134</a></span>&#160; uint32_t <a class="code" href="unionPCC__IMR__Type.html#a7e6628b541818e819edd5c3f62c12a95">OVRE</a>:1; </div>
<div class="line"><a name="l00135"></a><span class="lineno"><a class="line" href="unionPCC__IMR__Type.html#a559e88a2e91ed703005fc34498792ec0"> 135</a></span>&#160; uint32_t :30; </div>
<div class="line"><a name="l00136"></a><span class="lineno"><a class="line" href="unionPCC__IMR__Type.html#ac6a1c993c8c523bb1c1a8b724e128e0e"> 136</a></span>&#160; } bit; </div>
<div class="line"><a name="l00137"></a><span class="lineno"><a class="line" href="unionPCC__IMR__Type.html#a7d45c9bf58c582e681abe2a8e4c12d48"> 137</a></span>&#160; uint32_t <a class="code" href="unionPCC__IMR__Type.html#a7d45c9bf58c582e681abe2a8e4c12d48">reg</a>; </div>
<div class="line"><a name="l00138"></a><span class="lineno"> 138</span>&#160;} <a class="code" href="unionPCC__IMR__Type.html">PCC_IMR_Type</a>;</div>
<div class="line"><a name="l00139"></a><span class="lineno"> 139</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00140"></a><span class="lineno"> 140</span>&#160; </div>
<div class="line"><a name="l00141"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a70b6c9a36ef4245cdae57c55af4aaaad"> 141</a></span>&#160;<span class="preprocessor">#define PCC_IMR_OFFSET 0x0C </span></div>
<div class="line"><a name="l00142"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a6862a1b82b634ed667aa69783d74ee8a"> 142</a></span>&#160;<span class="preprocessor">#define PCC_IMR_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00144"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a728fea4b29b9eae92b782315e5f313dd"> 144</a></span>&#160;<span class="preprocessor">#define PCC_IMR_DRDY_Pos 0 </span></div>
<div class="line"><a name="l00145"></a><span class="lineno"> 145</span>&#160;<span class="preprocessor">#define PCC_IMR_DRDY (_U_(0x1) &lt;&lt; PCC_IMR_DRDY_Pos)</span></div>
<div class="line"><a name="l00146"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a6410ef9d1ca48b9f676dafc28772f323"> 146</a></span>&#160;<span class="preprocessor">#define PCC_IMR_OVRE_Pos 1 </span></div>
<div class="line"><a name="l00147"></a><span class="lineno"> 147</span>&#160;<span class="preprocessor">#define PCC_IMR_OVRE (_U_(0x1) &lt;&lt; PCC_IMR_OVRE_Pos)</span></div>
<div class="line"><a name="l00148"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#ac0c0568b06fcac79024c81d71a7c9a79"> 148</a></span>&#160;<span class="preprocessor">#define PCC_IMR_MASK _U_(0x00000003) </span></div>
<div class="line"><a name="l00150"></a><span class="lineno"> 150</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PCC_ISR : (PCC Offset: 0x10) (R/ 32) Interrupt Status Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00151"></a><span class="lineno"> 151</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00152"></a><span class="lineno"><a class="line" href="unionPCC__ISR__Type.html"> 152</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00153"></a><span class="lineno"> 153</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00154"></a><span class="lineno"><a class="line" href="unionPCC__ISR__Type.html#af0b2dd26e8eee879e12ffb8fc89d9b0f"> 154</a></span>&#160; uint32_t <a class="code" href="unionPCC__ISR__Type.html#af0b2dd26e8eee879e12ffb8fc89d9b0f">DRDY</a>:1; </div>
<div class="line"><a name="l00155"></a><span class="lineno"><a class="line" href="unionPCC__ISR__Type.html#ab0cfe5c8be2527c456aad3447b358c07"> 155</a></span>&#160; uint32_t <a class="code" href="unionPCC__ISR__Type.html#ab0cfe5c8be2527c456aad3447b358c07">OVRE</a>:1; </div>
<div class="line"><a name="l00156"></a><span class="lineno"><a class="line" href="unionPCC__ISR__Type.html#af45e8ff702f78f59832970e573ee27ab"> 156</a></span>&#160; uint32_t :30; </div>
<div class="line"><a name="l00157"></a><span class="lineno"><a class="line" href="unionPCC__ISR__Type.html#a89936fe0b4c35b473eae72d85a1bc052"> 157</a></span>&#160; } bit; </div>
<div class="line"><a name="l00158"></a><span class="lineno"><a class="line" href="unionPCC__ISR__Type.html#a0d35741335a99f34d25951fe20fe8b5e"> 158</a></span>&#160; uint32_t <a class="code" href="unionPCC__ISR__Type.html#a0d35741335a99f34d25951fe20fe8b5e">reg</a>; </div>
<div class="line"><a name="l00159"></a><span class="lineno"> 159</span>&#160;} <a class="code" href="unionPCC__ISR__Type.html">PCC_ISR_Type</a>;</div>
<div class="line"><a name="l00160"></a><span class="lineno"> 160</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00161"></a><span class="lineno"> 161</span>&#160; </div>
<div class="line"><a name="l00162"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#ae1efffb83b9583b99be0e5b62bece6f4"> 162</a></span>&#160;<span class="preprocessor">#define PCC_ISR_OFFSET 0x10 </span></div>
<div class="line"><a name="l00163"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a5c496d2c30fa3c1e15b0add8ef7eb6f6"> 163</a></span>&#160;<span class="preprocessor">#define PCC_ISR_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00165"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#ac0dd9b90a1744f753b1a4b0556f51901"> 165</a></span>&#160;<span class="preprocessor">#define PCC_ISR_DRDY_Pos 0 </span></div>
<div class="line"><a name="l00166"></a><span class="lineno"> 166</span>&#160;<span class="preprocessor">#define PCC_ISR_DRDY (_U_(0x1) &lt;&lt; PCC_ISR_DRDY_Pos)</span></div>
<div class="line"><a name="l00167"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#aa0b359eb2325727f0763430233540c52"> 167</a></span>&#160;<span class="preprocessor">#define PCC_ISR_OVRE_Pos 1 </span></div>
<div class="line"><a name="l00168"></a><span class="lineno"> 168</span>&#160;<span class="preprocessor">#define PCC_ISR_OVRE (_U_(0x1) &lt;&lt; PCC_ISR_OVRE_Pos)</span></div>
<div class="line"><a name="l00169"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a2b75d8ba5be63620debdf4ef98098ca0"> 169</a></span>&#160;<span class="preprocessor">#define PCC_ISR_MASK _U_(0x00000003) </span></div>
<div class="line"><a name="l00171"></a><span class="lineno"> 171</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PCC_RHR : (PCC Offset: 0x14) (R/ 32) Reception Holding Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00172"></a><span class="lineno"> 172</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00173"></a><span class="lineno"><a class="line" href="unionPCC__RHR__Type.html"> 173</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00174"></a><span class="lineno"> 174</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00175"></a><span class="lineno"><a class="line" href="unionPCC__RHR__Type.html#adf3caf0705e4ef5dab6f7ff36f4bc351"> 175</a></span>&#160; uint32_t <a class="code" href="unionPCC__RHR__Type.html#adf3caf0705e4ef5dab6f7ff36f4bc351">RDATA</a>:32; </div>
<div class="line"><a name="l00176"></a><span class="lineno"><a class="line" href="unionPCC__RHR__Type.html#aa162d4925d9a7a6c8b761b6ea3e188d6"> 176</a></span>&#160; } bit; </div>
<div class="line"><a name="l00177"></a><span class="lineno"><a class="line" href="unionPCC__RHR__Type.html#aa83e51888fb082408955846474d3c101"> 177</a></span>&#160; uint32_t <a class="code" href="unionPCC__RHR__Type.html#aa83e51888fb082408955846474d3c101">reg</a>; </div>
<div class="line"><a name="l00178"></a><span class="lineno"> 178</span>&#160;} <a class="code" href="unionPCC__RHR__Type.html">PCC_RHR_Type</a>;</div>
<div class="line"><a name="l00179"></a><span class="lineno"> 179</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00180"></a><span class="lineno"> 180</span>&#160; </div>
<div class="line"><a name="l00181"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a7769f078892febe675944a3acec20067"> 181</a></span>&#160;<span class="preprocessor">#define PCC_RHR_OFFSET 0x14 </span></div>
<div class="line"><a name="l00182"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a36d1b49b7e277c4f39c636f6574c39db"> 182</a></span>&#160;<span class="preprocessor">#define PCC_RHR_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00184"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a90662ce7f86b63b830c1a883f9762f3c"> 184</a></span>&#160;<span class="preprocessor">#define PCC_RHR_RDATA_Pos 0 </span></div>
<div class="line"><a name="l00185"></a><span class="lineno"> 185</span>&#160;<span class="preprocessor">#define PCC_RHR_RDATA_Msk (_U_(0xFFFFFFFF) &lt;&lt; PCC_RHR_RDATA_Pos)</span></div>
<div class="line"><a name="l00186"></a><span class="lineno"> 186</span>&#160;<span class="preprocessor">#define PCC_RHR_RDATA(value) (PCC_RHR_RDATA_Msk &amp; ((value) &lt;&lt; PCC_RHR_RDATA_Pos))</span></div>
<div class="line"><a name="l00187"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a5234737701963b81b4a99c293a4ff0ce"> 187</a></span>&#160;<span class="preprocessor">#define PCC_RHR_MASK _U_(0xFFFFFFFF) </span></div>
<div class="line"><a name="l00189"></a><span class="lineno"> 189</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PCC_WPMR : (PCC Offset: 0xE0) (R/W 32) Write Protection Mode Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00190"></a><span class="lineno"> 190</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00191"></a><span class="lineno"><a class="line" href="unionPCC__WPMR__Type.html"> 191</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00192"></a><span class="lineno"> 192</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00193"></a><span class="lineno"><a class="line" href="unionPCC__WPMR__Type.html#a3f1c20e744960da1ff02379f711468df"> 193</a></span>&#160; uint32_t <a class="code" href="unionPCC__WPMR__Type.html#a3f1c20e744960da1ff02379f711468df">WPEN</a>:1; </div>
<div class="line"><a name="l00194"></a><span class="lineno"><a class="line" href="unionPCC__WPMR__Type.html#a2ada69c7c53ab90247b22f68d4d46f21"> 194</a></span>&#160; uint32_t :7; </div>
<div class="line"><a name="l00195"></a><span class="lineno"><a class="line" href="unionPCC__WPMR__Type.html#a209a7b4031fff6b268663581e66987c0"> 195</a></span>&#160; uint32_t <a class="code" href="unionPCC__WPMR__Type.html#a209a7b4031fff6b268663581e66987c0">WPKEY</a>:24; </div>
<div class="line"><a name="l00196"></a><span class="lineno"><a class="line" href="unionPCC__WPMR__Type.html#affb77d027831bf63aca2024f397bdc6f"> 196</a></span>&#160; } bit; </div>
<div class="line"><a name="l00197"></a><span class="lineno"><a class="line" href="unionPCC__WPMR__Type.html#add143cd46ff58fc0c60b0ce176ec1bcd"> 197</a></span>&#160; uint32_t <a class="code" href="unionPCC__WPMR__Type.html#add143cd46ff58fc0c60b0ce176ec1bcd">reg</a>; </div>
<div class="line"><a name="l00198"></a><span class="lineno"> 198</span>&#160;} <a class="code" href="unionPCC__WPMR__Type.html">PCC_WPMR_Type</a>;</div>
<div class="line"><a name="l00199"></a><span class="lineno"> 199</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00200"></a><span class="lineno"> 200</span>&#160; </div>
<div class="line"><a name="l00201"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a1b38544917f4b7e3bfa9b60014b1c4d6"> 201</a></span>&#160;<span class="preprocessor">#define PCC_WPMR_OFFSET 0xE0 </span></div>
<div class="line"><a name="l00202"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a159781cbe8254f1ca45799575ab17ca6"> 202</a></span>&#160;<span class="preprocessor">#define PCC_WPMR_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00204"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#afe9e54d60083e19457da5b5c70a8b1c6"> 204</a></span>&#160;<span class="preprocessor">#define PCC_WPMR_WPEN_Pos 0 </span></div>
<div class="line"><a name="l00205"></a><span class="lineno"> 205</span>&#160;<span class="preprocessor">#define PCC_WPMR_WPEN (_U_(0x1) &lt;&lt; PCC_WPMR_WPEN_Pos)</span></div>
<div class="line"><a name="l00206"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#ae607ff7b99d4271d80b2c057d2a4025f"> 206</a></span>&#160;<span class="preprocessor">#define PCC_WPMR_WPKEY_Pos 8 </span></div>
<div class="line"><a name="l00207"></a><span class="lineno"> 207</span>&#160;<span class="preprocessor">#define PCC_WPMR_WPKEY_Msk (_U_(0xFFFFFF) &lt;&lt; PCC_WPMR_WPKEY_Pos)</span></div>
<div class="line"><a name="l00208"></a><span class="lineno"> 208</span>&#160;<span class="preprocessor">#define PCC_WPMR_WPKEY(value) (PCC_WPMR_WPKEY_Msk &amp; ((value) &lt;&lt; PCC_WPMR_WPKEY_Pos))</span></div>
<div class="line"><a name="l00209"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a81169f2799b6df95807e3a521d309948"> 209</a></span>&#160;<span class="preprocessor">#define PCC_WPMR_MASK _U_(0xFFFFFF01) </span></div>
<div class="line"><a name="l00211"></a><span class="lineno"> 211</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PCC_WPSR : (PCC Offset: 0xE4) (R/ 32) Write Protection Status Register -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00212"></a><span class="lineno"> 212</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00213"></a><span class="lineno"><a class="line" href="unionPCC__WPSR__Type.html"> 213</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00214"></a><span class="lineno"> 214</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00215"></a><span class="lineno"><a class="line" href="unionPCC__WPSR__Type.html#a335670e5d0cd2e672c9b8ae4defee1db"> 215</a></span>&#160; uint32_t <a class="code" href="unionPCC__WPSR__Type.html#a335670e5d0cd2e672c9b8ae4defee1db">WPVS</a>:1; </div>
<div class="line"><a name="l00216"></a><span class="lineno"><a class="line" href="unionPCC__WPSR__Type.html#ae85111b97f6ab6a21423fd3abd1d54c2"> 216</a></span>&#160; uint32_t :7; </div>
<div class="line"><a name="l00217"></a><span class="lineno"><a class="line" href="unionPCC__WPSR__Type.html#ac7a1452b7a0d36d6e9ddafdc5b945cd3"> 217</a></span>&#160; uint32_t <a class="code" href="unionPCC__WPSR__Type.html#ac7a1452b7a0d36d6e9ddafdc5b945cd3">WPVSRC</a>:16; </div>
<div class="line"><a name="l00218"></a><span class="lineno"><a class="line" href="unionPCC__WPSR__Type.html#a41bfa6f6fbcabb28fbe22035f3b91865"> 218</a></span>&#160; uint32_t :8; </div>
<div class="line"><a name="l00219"></a><span class="lineno"><a class="line" href="unionPCC__WPSR__Type.html#adbca139c366087e56ddec29e9374cc23"> 219</a></span>&#160; } bit; </div>
<div class="line"><a name="l00220"></a><span class="lineno"><a class="line" href="unionPCC__WPSR__Type.html#a9b694da3a208f453895f659298f31027"> 220</a></span>&#160; uint32_t <a class="code" href="unionPCC__WPSR__Type.html#a9b694da3a208f453895f659298f31027">reg</a>; </div>
<div class="line"><a name="l00221"></a><span class="lineno"> 221</span>&#160;} <a class="code" href="unionPCC__WPSR__Type.html">PCC_WPSR_Type</a>;</div>
<div class="line"><a name="l00222"></a><span class="lineno"> 222</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00223"></a><span class="lineno"> 223</span>&#160; </div>
<div class="line"><a name="l00224"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a76a394c01142bde41e7ce1a4e7285043"> 224</a></span>&#160;<span class="preprocessor">#define PCC_WPSR_OFFSET 0xE4 </span></div>
<div class="line"><a name="l00225"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a923c7a70b7e03ba5cc13a498ef90def3"> 225</a></span>&#160;<span class="preprocessor">#define PCC_WPSR_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00227"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#aaefc795cdf28abca9a95827f69faf668"> 227</a></span>&#160;<span class="preprocessor">#define PCC_WPSR_WPVS_Pos 0 </span></div>
<div class="line"><a name="l00228"></a><span class="lineno"> 228</span>&#160;<span class="preprocessor">#define PCC_WPSR_WPVS (_U_(0x1) &lt;&lt; PCC_WPSR_WPVS_Pos)</span></div>
<div class="line"><a name="l00229"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a00c53e3b7428569d5d6a701b97c76ed1"> 229</a></span>&#160;<span class="preprocessor">#define PCC_WPSR_WPVSRC_Pos 8 </span></div>
<div class="line"><a name="l00230"></a><span class="lineno"> 230</span>&#160;<span class="preprocessor">#define PCC_WPSR_WPVSRC_Msk (_U_(0xFFFF) &lt;&lt; PCC_WPSR_WPVSRC_Pos)</span></div>
<div class="line"><a name="l00231"></a><span class="lineno"> 231</span>&#160;<span class="preprocessor">#define PCC_WPSR_WPVSRC(value) (PCC_WPSR_WPVSRC_Msk &amp; ((value) &lt;&lt; PCC_WPSR_WPVSRC_Pos))</span></div>
<div class="line"><a name="l00232"></a><span class="lineno"><a class="line" href="component_2pcc_8h.html#a28ee2303726b788111a300f04de2fd1d"> 232</a></span>&#160;<span class="preprocessor">#define PCC_WPSR_MASK _U_(0x00FFFF01) </span></div>
<div class="line"><a name="l00235"></a><span class="lineno"> 235</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00236"></a><span class="lineno"><a class="line" href="structPcc.html"> 236</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00237"></a><span class="lineno"><a class="line" href="structPcc.html#ae240887b2bf7144186f620fe54b7b4ce"> 237</a></span>&#160; __IO <a class="code" href="unionPCC__MR__Type.html">PCC_MR_Type</a> <a class="code" href="structPcc.html#ae240887b2bf7144186f620fe54b7b4ce">MR</a>; </div>
<div class="line"><a name="l00238"></a><span class="lineno"><a class="line" href="structPcc.html#a6c2954b3c6aa92058a24957870027bd6"> 238</a></span>&#160; __O <a class="code" href="unionPCC__IER__Type.html">PCC_IER_Type</a> <a class="code" href="structPcc.html#a6c2954b3c6aa92058a24957870027bd6">IER</a>; </div>
<div class="line"><a name="l00239"></a><span class="lineno"><a class="line" href="structPcc.html#a68a7f18eb1d2a51b0db3d6ef49708e43"> 239</a></span>&#160; __O <a class="code" href="unionPCC__IDR__Type.html">PCC_IDR_Type</a> <a class="code" href="structPcc.html#a68a7f18eb1d2a51b0db3d6ef49708e43">IDR</a>; </div>
<div class="line"><a name="l00240"></a><span class="lineno"><a class="line" href="structPcc.html#acb3566521ba318766a1a3ecbdbd8baae"> 240</a></span>&#160; __I <a class="code" href="unionPCC__IMR__Type.html">PCC_IMR_Type</a> <a class="code" href="structPcc.html#acb3566521ba318766a1a3ecbdbd8baae">IMR</a>; </div>
<div class="line"><a name="l00241"></a><span class="lineno"><a class="line" href="structPcc.html#aacd3b5efe72afb0bea29042ebc85e35c"> 241</a></span>&#160; __I <a class="code" href="unionPCC__ISR__Type.html">PCC_ISR_Type</a> <a class="code" href="structPcc.html#aacd3b5efe72afb0bea29042ebc85e35c">ISR</a>; </div>
<div class="line"><a name="l00242"></a><span class="lineno"><a class="line" href="structPcc.html#ad7af51ea47759671b95a4f2c961e5438"> 242</a></span>&#160; __I <a class="code" href="unionPCC__RHR__Type.html">PCC_RHR_Type</a> <a class="code" href="structPcc.html#ad7af51ea47759671b95a4f2c961e5438">RHR</a>; </div>
<div class="line"><a name="l00243"></a><span class="lineno"> 243</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved1[0xC8];</div>
<div class="line"><a name="l00244"></a><span class="lineno"><a class="line" href="structPcc.html#a4773bc88915b9d5405d3de9de0b13f28"> 244</a></span>&#160; __IO <a class="code" href="unionPCC__WPMR__Type.html">PCC_WPMR_Type</a> <a class="code" href="structPcc.html#a4773bc88915b9d5405d3de9de0b13f28">WPMR</a>; </div>
<div class="line"><a name="l00245"></a><span class="lineno"><a class="line" href="structPcc.html#aa2759a62fec64920b9d9886645cebf65"> 245</a></span>&#160; __I <a class="code" href="unionPCC__WPSR__Type.html">PCC_WPSR_Type</a> <a class="code" href="structPcc.html#aa2759a62fec64920b9d9886645cebf65">WPSR</a>; </div>
<div class="line"><a name="l00246"></a><span class="lineno"> 246</span>&#160;} <a class="code" href="structPcc.html">Pcc</a>;</div>
<div class="line"><a name="l00247"></a><span class="lineno"> 247</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00248"></a><span class="lineno"> 248</span>&#160; </div>
<div class="line"><a name="l00251"></a><span class="lineno"> 251</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_PCC_COMPONENT_ */</span><span class="preprocessor"></span></div>
</div><!-- fragment --></div><!-- contents -->
<div class="ttc" id="astructPcc_html_acb3566521ba318766a1a3ecbdbd8baae"><div class="ttname"><a href="structPcc.html#acb3566521ba318766a1a3ecbdbd8baae">Pcc::IMR</a></div><div class="ttdeci">__I PCC_IMR_Type IMR</div><div class="ttdoc">Offset: 0x0C (R/ 32) Interrupt Mask Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00240">pcc.h:240</a></div></div>
<div class="ttc" id="aunionPCC__RHR__Type_html_adf3caf0705e4ef5dab6f7ff36f4bc351"><div class="ttname"><a href="unionPCC__RHR__Type.html#adf3caf0705e4ef5dab6f7ff36f4bc351">PCC_RHR_Type::RDATA</a></div><div class="ttdeci">uint32_t RDATA</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00175">pcc.h:175</a></div></div>
<div class="ttc" id="aunionPCC__MR__Type_html_ab38bba74598aef0c2f1a43c959e9e99b"><div class="ttname"><a href="unionPCC__MR__Type.html#ab38bba74598aef0c2f1a43c959e9e99b">PCC_MR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00059">pcc.h:59</a></div></div>
<div class="ttc" id="aunionPCC__WPMR__Type_html_add143cd46ff58fc0c60b0ce176ec1bcd"><div class="ttname"><a href="unionPCC__WPMR__Type.html#add143cd46ff58fc0c60b0ce176ec1bcd">PCC_WPMR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00197">pcc.h:197</a></div></div>
<div class="ttc" id="aunionPCC__IER__Type_html_afdcbecdda104ac998a212ba7f11bd27a"><div class="ttname"><a href="unionPCC__IER__Type.html#afdcbecdda104ac998a212ba7f11bd27a">PCC_IER_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00095">pcc.h:95</a></div></div>
<div class="ttc" id="aunionPCC__MR__Type_html_a72461a175cdb0e4605ccfedb93c1d39a"><div class="ttname"><a href="unionPCC__MR__Type.html#a72461a175cdb0e4605ccfedb93c1d39a">PCC_MR_Type::ISIZE</a></div><div class="ttdeci">uint32_t ISIZE</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00055">pcc.h:55</a></div></div>
<div class="ttc" id="astructPcc_html_ae240887b2bf7144186f620fe54b7b4ce"><div class="ttname"><a href="structPcc.html#ae240887b2bf7144186f620fe54b7b4ce">Pcc::MR</a></div><div class="ttdeci">__IO PCC_MR_Type MR</div><div class="ttdoc">Offset: 0x00 (R/W 32) Mode Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00237">pcc.h:237</a></div></div>
<div class="ttc" id="aunionPCC__IMR__Type_html"><div class="ttname"><a href="unionPCC__IMR__Type.html">PCC_IMR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00131">pcc.h:131</a></div></div>
<div class="ttc" id="aunionPCC__WPSR__Type_html_a335670e5d0cd2e672c9b8ae4defee1db"><div class="ttname"><a href="unionPCC__WPSR__Type.html#a335670e5d0cd2e672c9b8ae4defee1db">PCC_WPSR_Type::WPVS</a></div><div class="ttdeci">uint32_t WPVS</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00215">pcc.h:215</a></div></div>
<div class="ttc" id="astructPcc_html_ad7af51ea47759671b95a4f2c961e5438"><div class="ttname"><a href="structPcc.html#ad7af51ea47759671b95a4f2c961e5438">Pcc::RHR</a></div><div class="ttdeci">__I PCC_RHR_Type RHR</div><div class="ttdoc">Offset: 0x14 (R/ 32) Reception Holding Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00242">pcc.h:242</a></div></div>
<div class="ttc" id="aunionPCC__WPSR__Type_html"><div class="ttname"><a href="unionPCC__WPSR__Type.html">PCC_WPSR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00213">pcc.h:213</a></div></div>
<div class="ttc" id="aunionPCC__IMR__Type_html_a2152d12467e0ec051fab893125f6bbe6"><div class="ttname"><a href="unionPCC__IMR__Type.html#a2152d12467e0ec051fab893125f6bbe6">PCC_IMR_Type::DRDY</a></div><div class="ttdeci">uint32_t DRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00133">pcc.h:133</a></div></div>
<div class="ttc" id="aunionPCC__IMR__Type_html_a7d45c9bf58c582e681abe2a8e4c12d48"><div class="ttname"><a href="unionPCC__IMR__Type.html#a7d45c9bf58c582e681abe2a8e4c12d48">PCC_IMR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00137">pcc.h:137</a></div></div>
<div class="ttc" id="aunionPCC__MR__Type_html_a31a45244b60213d85e1b9b102489e989"><div class="ttname"><a href="unionPCC__MR__Type.html#a31a45244b60213d85e1b9b102489e989">PCC_MR_Type::HALFS</a></div><div class="ttdeci">uint32_t HALFS</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00052">pcc.h:52</a></div></div>
<div class="ttc" id="aunionPCC__WPMR__Type_html_a3f1c20e744960da1ff02379f711468df"><div class="ttname"><a href="unionPCC__WPMR__Type.html#a3f1c20e744960da1ff02379f711468df">PCC_WPMR_Type::WPEN</a></div><div class="ttdeci">uint32_t WPEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00193">pcc.h:193</a></div></div>
<div class="ttc" id="astructPcc_html_a6c2954b3c6aa92058a24957870027bd6"><div class="ttname"><a href="structPcc.html#a6c2954b3c6aa92058a24957870027bd6">Pcc::IER</a></div><div class="ttdeci">__O PCC_IER_Type IER</div><div class="ttdoc">Offset: 0x04 ( /W 32) Interrupt Enable Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00238">pcc.h:238</a></div></div>
<div class="ttc" id="aunionPCC__IER__Type_html_a6f959e1608b95115dbd3bfc14fe1d098"><div class="ttname"><a href="unionPCC__IER__Type.html#a6f959e1608b95115dbd3bfc14fe1d098">PCC_IER_Type::OVRE</a></div><div class="ttdeci">uint32_t OVRE</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00092">pcc.h:92</a></div></div>
<div class="ttc" id="aunionPCC__IDR__Type_html"><div class="ttname"><a href="unionPCC__IDR__Type.html">PCC_IDR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00110">pcc.h:110</a></div></div>
<div class="ttc" id="aunionPCC__MR__Type_html_adcb7742f8decf8f9f701a5ceb96b1846"><div class="ttname"><a href="unionPCC__MR__Type.html#adcb7742f8decf8f9f701a5ceb96b1846">PCC_MR_Type::FRSTS</a></div><div class="ttdeci">uint32_t FRSTS</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00053">pcc.h:53</a></div></div>
<div class="ttc" id="astructPcc_html_a4773bc88915b9d5405d3de9de0b13f28"><div class="ttname"><a href="structPcc.html#a4773bc88915b9d5405d3de9de0b13f28">Pcc::WPMR</a></div><div class="ttdeci">__IO PCC_WPMR_Type WPMR</div><div class="ttdoc">Offset: 0xE0 (R/W 32) Write Protection Mode Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00244">pcc.h:244</a></div></div>
<div class="ttc" id="aunionPCC__WPSR__Type_html_a9b694da3a208f453895f659298f31027"><div class="ttname"><a href="unionPCC__WPSR__Type.html#a9b694da3a208f453895f659298f31027">PCC_WPSR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00220">pcc.h:220</a></div></div>
<div class="ttc" id="aunionPCC__RHR__Type_html"><div class="ttname"><a href="unionPCC__RHR__Type.html">PCC_RHR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00173">pcc.h:173</a></div></div>
<div class="ttc" id="aunionPCC__IDR__Type_html_a12d51065b15771e660c5d08852334f54"><div class="ttname"><a href="unionPCC__IDR__Type.html#a12d51065b15771e660c5d08852334f54">PCC_IDR_Type::DRDY</a></div><div class="ttdeci">uint32_t DRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00112">pcc.h:112</a></div></div>
<div class="ttc" id="aunionPCC__ISR__Type_html_a0d35741335a99f34d25951fe20fe8b5e"><div class="ttname"><a href="unionPCC__ISR__Type.html#a0d35741335a99f34d25951fe20fe8b5e">PCC_ISR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00158">pcc.h:158</a></div></div>
<div class="ttc" id="aunionPCC__IER__Type_html_aefa00063c8962e538bfa75808b3cf40a"><div class="ttname"><a href="unionPCC__IER__Type.html#aefa00063c8962e538bfa75808b3cf40a">PCC_IER_Type::DRDY</a></div><div class="ttdeci">uint32_t DRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00091">pcc.h:91</a></div></div>
<div class="ttc" id="aunionPCC__IDR__Type_html_afcac0122e0be5b9fe85167a79b4e135e"><div class="ttname"><a href="unionPCC__IDR__Type.html#afcac0122e0be5b9fe85167a79b4e135e">PCC_IDR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00116">pcc.h:116</a></div></div>
<div class="ttc" id="aunionPCC__IDR__Type_html_a0e37b38c257b7f8542081459f78e9ab0"><div class="ttname"><a href="unionPCC__IDR__Type.html#a0e37b38c257b7f8542081459f78e9ab0">PCC_IDR_Type::OVRE</a></div><div class="ttdeci">uint32_t OVRE</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00113">pcc.h:113</a></div></div>
<div class="ttc" id="aunionPCC__ISR__Type_html_af0b2dd26e8eee879e12ffb8fc89d9b0f"><div class="ttname"><a href="unionPCC__ISR__Type.html#af0b2dd26e8eee879e12ffb8fc89d9b0f">PCC_ISR_Type::DRDY</a></div><div class="ttdeci">uint32_t DRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00154">pcc.h:154</a></div></div>
<div class="ttc" id="aunionPCC__MR__Type_html_a94c2cd67739551055c53e5f8ebf80d81"><div class="ttname"><a href="unionPCC__MR__Type.html#a94c2cd67739551055c53e5f8ebf80d81">PCC_MR_Type::SCALE</a></div><div class="ttdeci">uint32_t SCALE</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00050">pcc.h:50</a></div></div>
<div class="ttc" id="astructPcc_html_aa2759a62fec64920b9d9886645cebf65"><div class="ttname"><a href="structPcc.html#aa2759a62fec64920b9d9886645cebf65">Pcc::WPSR</a></div><div class="ttdeci">__I PCC_WPSR_Type WPSR</div><div class="ttdoc">Offset: 0xE4 (R/ 32) Write Protection Status Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00245">pcc.h:245</a></div></div>
<div class="ttc" id="aunionPCC__MR__Type_html_a7444dce128e917f5d86b55a8263b8e1a"><div class="ttname"><a href="unionPCC__MR__Type.html#a7444dce128e917f5d86b55a8263b8e1a">PCC_MR_Type::PCEN</a></div><div class="ttdeci">uint32_t PCEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00046">pcc.h:46</a></div></div>
<div class="ttc" id="aunionPCC__MR__Type_html"><div class="ttname"><a href="unionPCC__MR__Type.html">PCC_MR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00044">pcc.h:44</a></div></div>
<div class="ttc" id="aunionPCC__WPMR__Type_html"><div class="ttname"><a href="unionPCC__WPMR__Type.html">PCC_WPMR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00191">pcc.h:191</a></div></div>
<div class="ttc" id="aunionPCC__MR__Type_html_ade19eca877bcb3b3d30fdb33f8b4f028"><div class="ttname"><a href="unionPCC__MR__Type.html#ade19eca877bcb3b3d30fdb33f8b4f028">PCC_MR_Type::ALWYS</a></div><div class="ttdeci">uint32_t ALWYS</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00051">pcc.h:51</a></div></div>
<div class="ttc" id="aunionPCC__MR__Type_html_a6c177b778df7c5de116ae78d8b24e66b"><div class="ttname"><a href="unionPCC__MR__Type.html#a6c177b778df7c5de116ae78d8b24e66b">PCC_MR_Type::DSIZE</a></div><div class="ttdeci">uint32_t DSIZE</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00048">pcc.h:48</a></div></div>
<div class="ttc" id="asame54n19a_8h_html_a0d957f1433aaf5d70e4dc2b68288442d"><div class="ttname"><a href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a></div><div class="ttdeci">volatile const uint8_t RoReg8</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00053">same54n19a.h:53</a></div></div>
<div class="ttc" id="aunionPCC__ISR__Type_html_ab0cfe5c8be2527c456aad3447b358c07"><div class="ttname"><a href="unionPCC__ISR__Type.html#ab0cfe5c8be2527c456aad3447b358c07">PCC_ISR_Type::OVRE</a></div><div class="ttdeci">uint32_t OVRE</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00155">pcc.h:155</a></div></div>
<div class="ttc" id="aunionPCC__RHR__Type_html_aa83e51888fb082408955846474d3c101"><div class="ttname"><a href="unionPCC__RHR__Type.html#aa83e51888fb082408955846474d3c101">PCC_RHR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00177">pcc.h:177</a></div></div>
<div class="ttc" id="aunionPCC__IER__Type_html"><div class="ttname"><a href="unionPCC__IER__Type.html">PCC_IER_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00089">pcc.h:89</a></div></div>
<div class="ttc" id="aunionPCC__WPMR__Type_html_a209a7b4031fff6b268663581e66987c0"><div class="ttname"><a href="unionPCC__WPMR__Type.html#a209a7b4031fff6b268663581e66987c0">PCC_WPMR_Type::WPKEY</a></div><div class="ttdeci">uint32_t WPKEY</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00195">pcc.h:195</a></div></div>
<div class="ttc" id="astructPcc_html"><div class="ttname"><a href="structPcc.html">Pcc</a></div><div class="ttdoc">PCC hardware registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00236">pcc.h:236</a></div></div>
<div class="ttc" id="aunionPCC__WPSR__Type_html_ac7a1452b7a0d36d6e9ddafdc5b945cd3"><div class="ttname"><a href="unionPCC__WPSR__Type.html#ac7a1452b7a0d36d6e9ddafdc5b945cd3">PCC_WPSR_Type::WPVSRC</a></div><div class="ttdeci">uint32_t WPVSRC</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00217">pcc.h:217</a></div></div>
<div class="ttc" id="aunionPCC__IMR__Type_html_a7e6628b541818e819edd5c3f62c12a95"><div class="ttname"><a href="unionPCC__IMR__Type.html#a7e6628b541818e819edd5c3f62c12a95">PCC_IMR_Type::OVRE</a></div><div class="ttdeci">uint32_t OVRE</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00134">pcc.h:134</a></div></div>
<div class="ttc" id="aunionPCC__ISR__Type_html"><div class="ttname"><a href="unionPCC__ISR__Type.html">PCC_ISR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00152">pcc.h:152</a></div></div>
<div class="ttc" id="aunionPCC__MR__Type_html_abe82184db0ed5b1de10605fc3e00961b"><div class="ttname"><a href="unionPCC__MR__Type.html#abe82184db0ed5b1de10605fc3e00961b">PCC_MR_Type::CID</a></div><div class="ttdeci">uint32_t CID</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00057">pcc.h:57</a></div></div>
<div class="ttc" id="astructPcc_html_aacd3b5efe72afb0bea29042ebc85e35c"><div class="ttname"><a href="structPcc.html#aacd3b5efe72afb0bea29042ebc85e35c">Pcc::ISR</a></div><div class="ttdeci">__I PCC_ISR_Type ISR</div><div class="ttdoc">Offset: 0x10 (R/ 32) Interrupt Status Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00241">pcc.h:241</a></div></div>
<div class="ttc" id="astructPcc_html_a68a7f18eb1d2a51b0db3d6ef49708e43"><div class="ttname"><a href="structPcc.html#a68a7f18eb1d2a51b0db3d6ef49708e43">Pcc::IDR</a></div><div class="ttdeci">__O PCC_IDR_Type IDR</div><div class="ttdoc">Offset: 0x08 ( /W 32) Interrupt Disable Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pcc_8h_source.html#l00239">pcc.h:239</a></div></div>
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<a href="component_2pdec_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_PDEC_COMPONENT_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_PDEC_COMPONENT_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160; </div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define PDEC_U2263</span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define REV_PDEC 0x100</span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160; </div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="comment">/* -------- PDEC_CTRLA : (PDEC Offset: 0x00) (R/W 32) Control A -------- */</span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00044"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html"> 44</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00046"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#adae072081d8786323e05e51c608e2de4"> 46</a></span>&#160; uint32_t <a class="code" href="unionPDEC__CTRLA__Type.html#adae072081d8786323e05e51c608e2de4">SWRST</a>:1; </div>
<div class="line"><a name="l00047"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#a39e367e12313677d2b59ed216ad964ef"> 47</a></span>&#160; uint32_t <a class="code" href="unionPDEC__CTRLA__Type.html#a39e367e12313677d2b59ed216ad964ef">ENABLE</a>:1; </div>
<div class="line"><a name="l00048"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#ad660b0cfe70d97caecd0f20b1065e7cc"> 48</a></span>&#160; uint32_t <a class="code" href="unionPDEC__CTRLA__Type.html#ad660b0cfe70d97caecd0f20b1065e7cc">MODE</a>:2; </div>
<div class="line"><a name="l00049"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#aad0803c5bf77cf04f9a335630c865455"> 49</a></span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00050"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#a44711322384158eeefec016d3ff3ef82"> 50</a></span>&#160; uint32_t <a class="code" href="unionPDEC__CTRLA__Type.html#a44711322384158eeefec016d3ff3ef82">RUNSTDBY</a>:1; </div>
<div class="line"><a name="l00051"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#a1cf084a06147f4f3ff2cbe7ffee08a80"> 51</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00052"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#afb2b66e63b131ccac22169404049f586"> 52</a></span>&#160; uint32_t <a class="code" href="unionPDEC__CTRLA__Type.html#afb2b66e63b131ccac22169404049f586">CONF</a>:3; </div>
<div class="line"><a name="l00053"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#a8c8fa04f983284cb19b2545afe884c5f"> 53</a></span>&#160; uint32_t <a class="code" href="unionPDEC__CTRLA__Type.html#a8c8fa04f983284cb19b2545afe884c5f">ALOCK</a>:1; </div>
<div class="line"><a name="l00054"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#abb3210710a3b99919125e597ae371e99"> 54</a></span>&#160; uint32_t :2; </div>
<div class="line"><a name="l00055"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#af8b1f8c55aae9cbba239620c2583a723"> 55</a></span>&#160; uint32_t <a class="code" href="unionPDEC__CTRLA__Type.html#af8b1f8c55aae9cbba239620c2583a723">SWAP</a>:1; </div>
<div class="line"><a name="l00056"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#af86d533bce18b880a57360b398207c35"> 56</a></span>&#160; uint32_t <a class="code" href="unionPDEC__CTRLA__Type.html#af86d533bce18b880a57360b398207c35">PEREN</a>:1; </div>
<div class="line"><a name="l00057"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#a45cc8968a4ec996f992ea0a4e8dd8591"> 57</a></span>&#160; uint32_t <a class="code" href="unionPDEC__CTRLA__Type.html#a45cc8968a4ec996f992ea0a4e8dd8591">PINEN0</a>:1; </div>
<div class="line"><a name="l00058"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#a4816244b101ec0a2074d3fd98a419dc4"> 58</a></span>&#160; uint32_t <a class="code" href="unionPDEC__CTRLA__Type.html#a4816244b101ec0a2074d3fd98a419dc4">PINEN1</a>:1; </div>
<div class="line"><a name="l00059"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#a7da964a6f56d2439dc42ae515393c9af"> 59</a></span>&#160; uint32_t <a class="code" href="unionPDEC__CTRLA__Type.html#a7da964a6f56d2439dc42ae515393c9af">PINEN2</a>:1; </div>
<div class="line"><a name="l00060"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#a35b5e070e459b3714a0c0d8c07f2913f"> 60</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00061"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#a731ee1d8432484ed8a19ad1ffacc8973"> 61</a></span>&#160; uint32_t <a class="code" href="unionPDEC__CTRLA__Type.html#a731ee1d8432484ed8a19ad1ffacc8973">PINVEN0</a>:1; </div>
<div class="line"><a name="l00062"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#ab415505afa9b4cf4b58e48752f9ea4eb"> 62</a></span>&#160; uint32_t <a class="code" href="unionPDEC__CTRLA__Type.html#ab415505afa9b4cf4b58e48752f9ea4eb">PINVEN1</a>:1; </div>
<div class="line"><a name="l00063"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#a4e4e23ba7df08032869ddf9780ebfebd"> 63</a></span>&#160; uint32_t <a class="code" href="unionPDEC__CTRLA__Type.html#a4e4e23ba7df08032869ddf9780ebfebd">PINVEN2</a>:1; </div>
<div class="line"><a name="l00064"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#a8fb27fca16eb4c9234f793b4863b98f2"> 64</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00065"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#a50796b590db278638df3a400f4604403"> 65</a></span>&#160; uint32_t <a class="code" href="unionPDEC__CTRLA__Type.html#a50796b590db278638df3a400f4604403">ANGULAR</a>:3; </div>
<div class="line"><a name="l00066"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#a32852cec71d1ff68006901dadffd5d2a"> 66</a></span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00067"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#add201539601b478030ef95fcecf34dd5"> 67</a></span>&#160; uint32_t <a class="code" href="unionPDEC__CTRLA__Type.html#add201539601b478030ef95fcecf34dd5">MAXCMP</a>:4; </div>
<div class="line"><a name="l00068"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#a2a53c79c2921f846385cf50a7b3c4035"> 68</a></span>&#160; } bit; </div>
<div class="line"><a name="l00069"></a><span class="lineno"> 69</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00070"></a><span class="lineno"> 70</span>&#160; uint32_t :16; </div>
<div class="line"><a name="l00071"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#ae2b6511de10a4578329cdd6eada6400a"> 71</a></span>&#160; uint32_t <a class="code" href="unionPDEC__CTRLA__Type.html#ae2b6511de10a4578329cdd6eada6400a">PINEN</a>:3; </div>
<div class="line"><a name="l00072"></a><span class="lineno"> 72</span>&#160; uint32_t :1; </div>
<div class="line"><a name="l00073"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#a85627f847584ba7b221f6077a53a58dd"> 73</a></span>&#160; uint32_t <a class="code" href="unionPDEC__CTRLA__Type.html#a85627f847584ba7b221f6077a53a58dd">PINVEN</a>:3; </div>
<div class="line"><a name="l00074"></a><span class="lineno"> 74</span>&#160; uint32_t :9; </div>
<div class="line"><a name="l00075"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#a333484f05bfa8f0977436bde93cc2087"> 75</a></span>&#160; } vec; </div>
<div class="line"><a name="l00076"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLA__Type.html#ad324062a120082e991d005749b06776e"> 76</a></span>&#160; uint32_t <a class="code" href="unionPDEC__CTRLA__Type.html#ad324062a120082e991d005749b06776e">reg</a>; </div>
<div class="line"><a name="l00077"></a><span class="lineno"> 77</span>&#160;} <a class="code" href="unionPDEC__CTRLA__Type.html">PDEC_CTRLA_Type</a>;</div>
<div class="line"><a name="l00078"></a><span class="lineno"> 78</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00079"></a><span class="lineno"> 79</span>&#160; </div>
<div class="line"><a name="l00080"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a19db329a3704c4037ef9d7f6787ef73e"> 80</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_OFFSET 0x00 </span></div>
<div class="line"><a name="l00081"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a41cf5be56e1706e7fd08accabaaac544"> 81</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00083"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a5c6348bca9ba7cd2d519ed19d344fee2"> 83</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_SWRST_Pos 0 </span></div>
<div class="line"><a name="l00084"></a><span class="lineno"> 84</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_SWRST (_U_(0x1) &lt;&lt; PDEC_CTRLA_SWRST_Pos)</span></div>
<div class="line"><a name="l00085"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a3201e8495a8c33f7a6fe6cf7957daef8"> 85</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_ENABLE_Pos 1 </span></div>
<div class="line"><a name="l00086"></a><span class="lineno"> 86</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_ENABLE (_U_(0x1) &lt;&lt; PDEC_CTRLA_ENABLE_Pos)</span></div>
<div class="line"><a name="l00087"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a3c255d55868e1d7f0b7bd7fc67632ffb"> 87</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_MODE_Pos 2 </span></div>
<div class="line"><a name="l00088"></a><span class="lineno"> 88</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_MODE_Msk (_U_(0x3) &lt;&lt; PDEC_CTRLA_MODE_Pos)</span></div>
<div class="line"><a name="l00089"></a><span class="lineno"> 89</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_MODE(value) (PDEC_CTRLA_MODE_Msk &amp; ((value) &lt;&lt; PDEC_CTRLA_MODE_Pos))</span></div>
<div class="line"><a name="l00090"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a8cd4b219b8c471205161a703506f7a66"> 90</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_MODE_QDEC_Val _U_(0x0) </span></div>
<div class="line"><a name="l00091"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#aa5f61ebf0632651632855f8d791333a8"> 91</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_MODE_HALL_Val _U_(0x1) </span></div>
<div class="line"><a name="l00092"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a965013bd6b06ec4f7ff84f83b59c325a"> 92</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_MODE_COUNTER_Val _U_(0x2) </span></div>
<div class="line"><a name="l00093"></a><span class="lineno"> 93</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_MODE_QDEC (PDEC_CTRLA_MODE_QDEC_Val &lt;&lt; PDEC_CTRLA_MODE_Pos)</span></div>
<div class="line"><a name="l00094"></a><span class="lineno"> 94</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_MODE_HALL (PDEC_CTRLA_MODE_HALL_Val &lt;&lt; PDEC_CTRLA_MODE_Pos)</span></div>
<div class="line"><a name="l00095"></a><span class="lineno"> 95</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_MODE_COUNTER (PDEC_CTRLA_MODE_COUNTER_Val &lt;&lt; PDEC_CTRLA_MODE_Pos)</span></div>
<div class="line"><a name="l00096"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a533c2f02227babdf98fb90380b75b0e5"> 96</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_RUNSTDBY_Pos 6 </span></div>
<div class="line"><a name="l00097"></a><span class="lineno"> 97</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_RUNSTDBY (_U_(0x1) &lt;&lt; PDEC_CTRLA_RUNSTDBY_Pos)</span></div>
<div class="line"><a name="l00098"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#aff3fb0281182b294f983d743087b87b8"> 98</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_CONF_Pos 8 </span></div>
<div class="line"><a name="l00099"></a><span class="lineno"> 99</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_CONF_Msk (_U_(0x7) &lt;&lt; PDEC_CTRLA_CONF_Pos)</span></div>
<div class="line"><a name="l00100"></a><span class="lineno"> 100</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_CONF(value) (PDEC_CTRLA_CONF_Msk &amp; ((value) &lt;&lt; PDEC_CTRLA_CONF_Pos))</span></div>
<div class="line"><a name="l00101"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a869c6f159569a1e3610b5ecd1251c9a6"> 101</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_CONF_X4_Val _U_(0x0) </span></div>
<div class="line"><a name="l00102"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a3429d3c3a5ff555b6af8c2759082fb36"> 102</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_CONF_X4S_Val _U_(0x1) </span></div>
<div class="line"><a name="l00103"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ab3fb5e2629b34abf63577f49297f5e26"> 103</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_CONF_X2_Val _U_(0x2) </span></div>
<div class="line"><a name="l00104"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a7937877f203fc19a3a2806631d3405de"> 104</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_CONF_X2S_Val _U_(0x3) </span></div>
<div class="line"><a name="l00105"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#af4d76e4e9121c6f0bfe63f7f97d0b8e7"> 105</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_CONF_AUTOC_Val _U_(0x4) </span></div>
<div class="line"><a name="l00106"></a><span class="lineno"> 106</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_CONF_X4 (PDEC_CTRLA_CONF_X4_Val &lt;&lt; PDEC_CTRLA_CONF_Pos)</span></div>
<div class="line"><a name="l00107"></a><span class="lineno"> 107</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_CONF_X4S (PDEC_CTRLA_CONF_X4S_Val &lt;&lt; PDEC_CTRLA_CONF_Pos)</span></div>
<div class="line"><a name="l00108"></a><span class="lineno"> 108</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_CONF_X2 (PDEC_CTRLA_CONF_X2_Val &lt;&lt; PDEC_CTRLA_CONF_Pos)</span></div>
<div class="line"><a name="l00109"></a><span class="lineno"> 109</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_CONF_X2S (PDEC_CTRLA_CONF_X2S_Val &lt;&lt; PDEC_CTRLA_CONF_Pos)</span></div>
<div class="line"><a name="l00110"></a><span class="lineno"> 110</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_CONF_AUTOC (PDEC_CTRLA_CONF_AUTOC_Val &lt;&lt; PDEC_CTRLA_CONF_Pos)</span></div>
<div class="line"><a name="l00111"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#afa854e9f9e7adb9695498929044eadef"> 111</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_ALOCK_Pos 11 </span></div>
<div class="line"><a name="l00112"></a><span class="lineno"> 112</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_ALOCK (_U_(0x1) &lt;&lt; PDEC_CTRLA_ALOCK_Pos)</span></div>
<div class="line"><a name="l00113"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a26818e8336430d348222822fad98746b"> 113</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_SWAP_Pos 14 </span></div>
<div class="line"><a name="l00114"></a><span class="lineno"> 114</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_SWAP (_U_(0x1) &lt;&lt; PDEC_CTRLA_SWAP_Pos)</span></div>
<div class="line"><a name="l00115"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a4bf0bdab09430e159a91c5b79ea2b0fd"> 115</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_PEREN_Pos 15 </span></div>
<div class="line"><a name="l00116"></a><span class="lineno"> 116</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_PEREN (_U_(0x1) &lt;&lt; PDEC_CTRLA_PEREN_Pos)</span></div>
<div class="line"><a name="l00117"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a5803b3dd7f82752a2ad3505646ef7c91"> 117</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_PINEN0_Pos 16 </span></div>
<div class="line"><a name="l00118"></a><span class="lineno"> 118</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_PINEN0 (_U_(1) &lt;&lt; PDEC_CTRLA_PINEN0_Pos)</span></div>
<div class="line"><a name="l00119"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a61b5149ba0061b6e6e8ba3d12bc78ffe"> 119</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_PINEN1_Pos 17 </span></div>
<div class="line"><a name="l00120"></a><span class="lineno"> 120</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_PINEN1 (_U_(1) &lt;&lt; PDEC_CTRLA_PINEN1_Pos)</span></div>
<div class="line"><a name="l00121"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a766e5c55bd2e788d9206d0fe36ac3a35"> 121</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_PINEN2_Pos 18 </span></div>
<div class="line"><a name="l00122"></a><span class="lineno"> 122</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_PINEN2 (_U_(1) &lt;&lt; PDEC_CTRLA_PINEN2_Pos)</span></div>
<div class="line"><a name="l00123"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a7c5dc2b00960787304bc9aa228ac10f7"> 123</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_PINEN_Pos 16 </span></div>
<div class="line"><a name="l00124"></a><span class="lineno"> 124</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_PINEN_Msk (_U_(0x7) &lt;&lt; PDEC_CTRLA_PINEN_Pos)</span></div>
<div class="line"><a name="l00125"></a><span class="lineno"> 125</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_PINEN(value) (PDEC_CTRLA_PINEN_Msk &amp; ((value) &lt;&lt; PDEC_CTRLA_PINEN_Pos))</span></div>
<div class="line"><a name="l00126"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#af1e96a87891f019037d59ed90516db31"> 126</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_PINVEN0_Pos 20 </span></div>
<div class="line"><a name="l00127"></a><span class="lineno"> 127</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_PINVEN0 (_U_(1) &lt;&lt; PDEC_CTRLA_PINVEN0_Pos)</span></div>
<div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a5544de288c5d5ebd75b3211f5e5f4a81"> 128</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_PINVEN1_Pos 21 </span></div>
<div class="line"><a name="l00129"></a><span class="lineno"> 129</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_PINVEN1 (_U_(1) &lt;&lt; PDEC_CTRLA_PINVEN1_Pos)</span></div>
<div class="line"><a name="l00130"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a439229f1b1d3cefbf0565438f66c8432"> 130</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_PINVEN2_Pos 22 </span></div>
<div class="line"><a name="l00131"></a><span class="lineno"> 131</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_PINVEN2 (_U_(1) &lt;&lt; PDEC_CTRLA_PINVEN2_Pos)</span></div>
<div class="line"><a name="l00132"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a8c24f4dc8bc567d0334d6a794a273600"> 132</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_PINVEN_Pos 20 </span></div>
<div class="line"><a name="l00133"></a><span class="lineno"> 133</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_PINVEN_Msk (_U_(0x7) &lt;&lt; PDEC_CTRLA_PINVEN_Pos)</span></div>
<div class="line"><a name="l00134"></a><span class="lineno"> 134</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_PINVEN(value) (PDEC_CTRLA_PINVEN_Msk &amp; ((value) &lt;&lt; PDEC_CTRLA_PINVEN_Pos))</span></div>
<div class="line"><a name="l00135"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#af09044284f026080e90be8bcd37cf4b7"> 135</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_ANGULAR_Pos 24 </span></div>
<div class="line"><a name="l00136"></a><span class="lineno"> 136</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_ANGULAR_Msk (_U_(0x7) &lt;&lt; PDEC_CTRLA_ANGULAR_Pos)</span></div>
<div class="line"><a name="l00137"></a><span class="lineno"> 137</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_ANGULAR(value) (PDEC_CTRLA_ANGULAR_Msk &amp; ((value) &lt;&lt; PDEC_CTRLA_ANGULAR_Pos))</span></div>
<div class="line"><a name="l00138"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a80ae129f393fd65d0d3feb2ebebcf3df"> 138</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_MAXCMP_Pos 28 </span></div>
<div class="line"><a name="l00139"></a><span class="lineno"> 139</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_MAXCMP_Msk (_U_(0xF) &lt;&lt; PDEC_CTRLA_MAXCMP_Pos)</span></div>
<div class="line"><a name="l00140"></a><span class="lineno"> 140</span>&#160;<span class="preprocessor">#define PDEC_CTRLA_MAXCMP(value) (PDEC_CTRLA_MAXCMP_Msk &amp; ((value) &lt;&lt; PDEC_CTRLA_MAXCMP_Pos))</span></div>
<div class="line"><a name="l00141"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#adc9ae38fd75c7b23c01a2536c7428eab"> 141</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLA_MASK _U_(0xF777CF4F) </span></div>
<div class="line"><a name="l00143"></a><span class="lineno"> 143</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PDEC_CTRLBCLR : (PDEC Offset: 0x04) (R/W 8) Control B Clear -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00144"></a><span class="lineno"> 144</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00145"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLBCLR__Type.html"> 145</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00146"></a><span class="lineno"> 146</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00147"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLBCLR__Type.html#a0de00c60ad37efb0ae787beec99cb8e3"> 147</a></span>&#160; uint8_t :1; </div>
<div class="line"><a name="l00148"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLBCLR__Type.html#adf3de57497ed33de6b5dcd46a7910e58"> 148</a></span>&#160; uint8_t <a class="code" href="unionPDEC__CTRLBCLR__Type.html#adf3de57497ed33de6b5dcd46a7910e58">LUPD</a>:1; </div>
<div class="line"><a name="l00149"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLBCLR__Type.html#a58bb6b4419c511464bb2bbd46f4b4ec5"> 149</a></span>&#160; uint8_t :3; </div>
<div class="line"><a name="l00150"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLBCLR__Type.html#ace69437e9cc441fff79e13d35c52d475"> 150</a></span>&#160; uint8_t <a class="code" href="unionPDEC__CTRLBCLR__Type.html#ace69437e9cc441fff79e13d35c52d475">CMD</a>:3; </div>
<div class="line"><a name="l00151"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLBCLR__Type.html#abeb25109a8826d8daf2805809fc700a9"> 151</a></span>&#160; } bit; </div>
<div class="line"><a name="l00152"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLBCLR__Type.html#a44603e97f7006901beb3d2fac046f587"> 152</a></span>&#160; uint8_t <a class="code" href="unionPDEC__CTRLBCLR__Type.html#a44603e97f7006901beb3d2fac046f587">reg</a>; </div>
<div class="line"><a name="l00153"></a><span class="lineno"> 153</span>&#160;} <a class="code" href="unionPDEC__CTRLBCLR__Type.html">PDEC_CTRLBCLR_Type</a>;</div>
<div class="line"><a name="l00154"></a><span class="lineno"> 154</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00155"></a><span class="lineno"> 155</span>&#160; </div>
<div class="line"><a name="l00156"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#afce9d6740e29ea1e18c939e7036293fe"> 156</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLBCLR_OFFSET 0x04 </span></div>
<div class="line"><a name="l00157"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a1e84a3cb623f62ae0a86ec98bda9232e"> 157</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLBCLR_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00159"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ae3c53dcc157e8418f23470476bbce1b5"> 159</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLBCLR_LUPD_Pos 1 </span></div>
<div class="line"><a name="l00160"></a><span class="lineno"> 160</span>&#160;<span class="preprocessor">#define PDEC_CTRLBCLR_LUPD (_U_(0x1) &lt;&lt; PDEC_CTRLBCLR_LUPD_Pos)</span></div>
<div class="line"><a name="l00161"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a7fcdb57646e10bcbb529466a40e0c527"> 161</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLBCLR_CMD_Pos 5 </span></div>
<div class="line"><a name="l00162"></a><span class="lineno"> 162</span>&#160;<span class="preprocessor">#define PDEC_CTRLBCLR_CMD_Msk (_U_(0x7) &lt;&lt; PDEC_CTRLBCLR_CMD_Pos)</span></div>
<div class="line"><a name="l00163"></a><span class="lineno"> 163</span>&#160;<span class="preprocessor">#define PDEC_CTRLBCLR_CMD(value) (PDEC_CTRLBCLR_CMD_Msk &amp; ((value) &lt;&lt; PDEC_CTRLBCLR_CMD_Pos))</span></div>
<div class="line"><a name="l00164"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#af8a9e800018881b6f9943fb2b288ef49"> 164</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLBCLR_CMD_NONE_Val _U_(0x0) </span></div>
<div class="line"><a name="l00165"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#afcf37ae0a2b8320794cc42f166cb4e41"> 165</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLBCLR_CMD_RETRIGGER_Val _U_(0x1) </span></div>
<div class="line"><a name="l00166"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a099080d560f921386c35a97a8c840c80"> 166</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLBCLR_CMD_UPDATE_Val _U_(0x2) </span></div>
<div class="line"><a name="l00167"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a0f01303a50cf223b47ad4b409787a8c2"> 167</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLBCLR_CMD_READSYNC_Val _U_(0x3) </span></div>
<div class="line"><a name="l00168"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a93a208068be128566fdf3b721fdd11fe"> 168</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLBCLR_CMD_START_Val _U_(0x4) </span></div>
<div class="line"><a name="l00169"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a996326a513313f1fcbe5482bc6f3e995"> 169</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLBCLR_CMD_STOP_Val _U_(0x5) </span></div>
<div class="line"><a name="l00170"></a><span class="lineno"> 170</span>&#160;<span class="preprocessor">#define PDEC_CTRLBCLR_CMD_NONE (PDEC_CTRLBCLR_CMD_NONE_Val &lt;&lt; PDEC_CTRLBCLR_CMD_Pos)</span></div>
<div class="line"><a name="l00171"></a><span class="lineno"> 171</span>&#160;<span class="preprocessor">#define PDEC_CTRLBCLR_CMD_RETRIGGER (PDEC_CTRLBCLR_CMD_RETRIGGER_Val &lt;&lt; PDEC_CTRLBCLR_CMD_Pos)</span></div>
<div class="line"><a name="l00172"></a><span class="lineno"> 172</span>&#160;<span class="preprocessor">#define PDEC_CTRLBCLR_CMD_UPDATE (PDEC_CTRLBCLR_CMD_UPDATE_Val &lt;&lt; PDEC_CTRLBCLR_CMD_Pos)</span></div>
<div class="line"><a name="l00173"></a><span class="lineno"> 173</span>&#160;<span class="preprocessor">#define PDEC_CTRLBCLR_CMD_READSYNC (PDEC_CTRLBCLR_CMD_READSYNC_Val &lt;&lt; PDEC_CTRLBCLR_CMD_Pos)</span></div>
<div class="line"><a name="l00174"></a><span class="lineno"> 174</span>&#160;<span class="preprocessor">#define PDEC_CTRLBCLR_CMD_START (PDEC_CTRLBCLR_CMD_START_Val &lt;&lt; PDEC_CTRLBCLR_CMD_Pos)</span></div>
<div class="line"><a name="l00175"></a><span class="lineno"> 175</span>&#160;<span class="preprocessor">#define PDEC_CTRLBCLR_CMD_STOP (PDEC_CTRLBCLR_CMD_STOP_Val &lt;&lt; PDEC_CTRLBCLR_CMD_Pos)</span></div>
<div class="line"><a name="l00176"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a11bd564d315744cab4e00a72cdd877b2"> 176</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLBCLR_MASK _U_(0xE2) </span></div>
<div class="line"><a name="l00178"></a><span class="lineno"> 178</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PDEC_CTRLBSET : (PDEC Offset: 0x05) (R/W 8) Control B Set -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00179"></a><span class="lineno"> 179</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00180"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLBSET__Type.html"> 180</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00181"></a><span class="lineno"> 181</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00182"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLBSET__Type.html#a345c612b21db307d0a022f613a788b10"> 182</a></span>&#160; uint8_t :1; </div>
<div class="line"><a name="l00183"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLBSET__Type.html#a98dee966bb7bb054e62490482b9e3431"> 183</a></span>&#160; uint8_t <a class="code" href="unionPDEC__CTRLBSET__Type.html#a98dee966bb7bb054e62490482b9e3431">LUPD</a>:1; </div>
<div class="line"><a name="l00184"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLBSET__Type.html#a664f61529d254553a79677ab86e963c9"> 184</a></span>&#160; uint8_t :3; </div>
<div class="line"><a name="l00185"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLBSET__Type.html#ad6a6a5b631618eade0827ca39969a428"> 185</a></span>&#160; uint8_t <a class="code" href="unionPDEC__CTRLBSET__Type.html#ad6a6a5b631618eade0827ca39969a428">CMD</a>:3; </div>
<div class="line"><a name="l00186"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLBSET__Type.html#a26b0d0baf2c65357c11944bfb8e587be"> 186</a></span>&#160; } bit; </div>
<div class="line"><a name="l00187"></a><span class="lineno"><a class="line" href="unionPDEC__CTRLBSET__Type.html#a2c7cdfa35f6c7fada05a3325a85b1ea1"> 187</a></span>&#160; uint8_t <a class="code" href="unionPDEC__CTRLBSET__Type.html#a2c7cdfa35f6c7fada05a3325a85b1ea1">reg</a>; </div>
<div class="line"><a name="l00188"></a><span class="lineno"> 188</span>&#160;} <a class="code" href="unionPDEC__CTRLBSET__Type.html">PDEC_CTRLBSET_Type</a>;</div>
<div class="line"><a name="l00189"></a><span class="lineno"> 189</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00190"></a><span class="lineno"> 190</span>&#160; </div>
<div class="line"><a name="l00191"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a5e8712dd85c5786fef4cdf2b00db3b41"> 191</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLBSET_OFFSET 0x05 </span></div>
<div class="line"><a name="l00192"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a2853b325ee8716b43b0faec05554fa03"> 192</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLBSET_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00194"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a1d9c09955f99b439a14b1308a445cb54"> 194</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLBSET_LUPD_Pos 1 </span></div>
<div class="line"><a name="l00195"></a><span class="lineno"> 195</span>&#160;<span class="preprocessor">#define PDEC_CTRLBSET_LUPD (_U_(0x1) &lt;&lt; PDEC_CTRLBSET_LUPD_Pos)</span></div>
<div class="line"><a name="l00196"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ab83a334b87bf0b8f5758bf470ec74cdf"> 196</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLBSET_CMD_Pos 5 </span></div>
<div class="line"><a name="l00197"></a><span class="lineno"> 197</span>&#160;<span class="preprocessor">#define PDEC_CTRLBSET_CMD_Msk (_U_(0x7) &lt;&lt; PDEC_CTRLBSET_CMD_Pos)</span></div>
<div class="line"><a name="l00198"></a><span class="lineno"> 198</span>&#160;<span class="preprocessor">#define PDEC_CTRLBSET_CMD(value) (PDEC_CTRLBSET_CMD_Msk &amp; ((value) &lt;&lt; PDEC_CTRLBSET_CMD_Pos))</span></div>
<div class="line"><a name="l00199"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a7c8d66da142044ecc87c2302c8249231"> 199</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLBSET_CMD_NONE_Val _U_(0x0) </span></div>
<div class="line"><a name="l00200"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a00d4a730040c384f079dd9ee22715fc6"> 200</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLBSET_CMD_RETRIGGER_Val _U_(0x1) </span></div>
<div class="line"><a name="l00201"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a0b5ed733c1a18a8d1b9358f2c066094e"> 201</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLBSET_CMD_UPDATE_Val _U_(0x2) </span></div>
<div class="line"><a name="l00202"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a78b3ca12b0ef8d224f50bdf1ed82e837"> 202</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLBSET_CMD_READSYNC_Val _U_(0x3) </span></div>
<div class="line"><a name="l00203"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a5d4b9596cb0a63e904e47226d636e3f4"> 203</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLBSET_CMD_START_Val _U_(0x4) </span></div>
<div class="line"><a name="l00204"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a7d09c5313e53f561b387a3a39c0a344b"> 204</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLBSET_CMD_STOP_Val _U_(0x5) </span></div>
<div class="line"><a name="l00205"></a><span class="lineno"> 205</span>&#160;<span class="preprocessor">#define PDEC_CTRLBSET_CMD_NONE (PDEC_CTRLBSET_CMD_NONE_Val &lt;&lt; PDEC_CTRLBSET_CMD_Pos)</span></div>
<div class="line"><a name="l00206"></a><span class="lineno"> 206</span>&#160;<span class="preprocessor">#define PDEC_CTRLBSET_CMD_RETRIGGER (PDEC_CTRLBSET_CMD_RETRIGGER_Val &lt;&lt; PDEC_CTRLBSET_CMD_Pos)</span></div>
<div class="line"><a name="l00207"></a><span class="lineno"> 207</span>&#160;<span class="preprocessor">#define PDEC_CTRLBSET_CMD_UPDATE (PDEC_CTRLBSET_CMD_UPDATE_Val &lt;&lt; PDEC_CTRLBSET_CMD_Pos)</span></div>
<div class="line"><a name="l00208"></a><span class="lineno"> 208</span>&#160;<span class="preprocessor">#define PDEC_CTRLBSET_CMD_READSYNC (PDEC_CTRLBSET_CMD_READSYNC_Val &lt;&lt; PDEC_CTRLBSET_CMD_Pos)</span></div>
<div class="line"><a name="l00209"></a><span class="lineno"> 209</span>&#160;<span class="preprocessor">#define PDEC_CTRLBSET_CMD_START (PDEC_CTRLBSET_CMD_START_Val &lt;&lt; PDEC_CTRLBSET_CMD_Pos)</span></div>
<div class="line"><a name="l00210"></a><span class="lineno"> 210</span>&#160;<span class="preprocessor">#define PDEC_CTRLBSET_CMD_STOP (PDEC_CTRLBSET_CMD_STOP_Val &lt;&lt; PDEC_CTRLBSET_CMD_Pos)</span></div>
<div class="line"><a name="l00211"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a8c3fa339a0d6d83536fdbdf791520ebf"> 211</a></span>&#160;<span class="preprocessor">#define PDEC_CTRLBSET_MASK _U_(0xE2) </span></div>
<div class="line"><a name="l00213"></a><span class="lineno"> 213</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PDEC_EVCTRL : (PDEC Offset: 0x06) (R/W 16) Event Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00214"></a><span class="lineno"> 214</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00215"></a><span class="lineno"><a class="line" href="unionPDEC__EVCTRL__Type.html"> 215</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00216"></a><span class="lineno"> 216</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00217"></a><span class="lineno"><a class="line" href="unionPDEC__EVCTRL__Type.html#a9a265b816d619100b8a056536426299f"> 217</a></span>&#160; uint16_t <a class="code" href="unionPDEC__EVCTRL__Type.html#a9a265b816d619100b8a056536426299f">EVACT</a>:2; </div>
<div class="line"><a name="l00218"></a><span class="lineno"><a class="line" href="unionPDEC__EVCTRL__Type.html#a0b643bf7799c5fb575a28ef3fc545f08"> 218</a></span>&#160; uint16_t <a class="code" href="unionPDEC__EVCTRL__Type.html#a0b643bf7799c5fb575a28ef3fc545f08">EVINV</a>:3; </div>
<div class="line"><a name="l00219"></a><span class="lineno"><a class="line" href="unionPDEC__EVCTRL__Type.html#a92c497a61f4194e936cd31213d66b727"> 219</a></span>&#160; uint16_t <a class="code" href="unionPDEC__EVCTRL__Type.html#a92c497a61f4194e936cd31213d66b727">EVEI</a>:3; </div>
<div class="line"><a name="l00220"></a><span class="lineno"><a class="line" href="unionPDEC__EVCTRL__Type.html#a188110a714ac487b74e816c13a54833c"> 220</a></span>&#160; uint16_t <a class="code" href="unionPDEC__EVCTRL__Type.html#a188110a714ac487b74e816c13a54833c">OVFEO</a>:1; </div>
<div class="line"><a name="l00221"></a><span class="lineno"><a class="line" href="unionPDEC__EVCTRL__Type.html#a12407e9b69ecc84f0b0a2f283465862c"> 221</a></span>&#160; uint16_t <a class="code" href="unionPDEC__EVCTRL__Type.html#a12407e9b69ecc84f0b0a2f283465862c">ERREO</a>:1; </div>
<div class="line"><a name="l00222"></a><span class="lineno"><a class="line" href="unionPDEC__EVCTRL__Type.html#a87be45b780f7cd9197f68a2105a391cd"> 222</a></span>&#160; uint16_t <a class="code" href="unionPDEC__EVCTRL__Type.html#a87be45b780f7cd9197f68a2105a391cd">DIREO</a>:1; </div>
<div class="line"><a name="l00223"></a><span class="lineno"><a class="line" href="unionPDEC__EVCTRL__Type.html#abf0877764cfdba046db0a98a9b4cd793"> 223</a></span>&#160; uint16_t <a class="code" href="unionPDEC__EVCTRL__Type.html#abf0877764cfdba046db0a98a9b4cd793">VLCEO</a>:1; </div>
<div class="line"><a name="l00224"></a><span class="lineno"><a class="line" href="unionPDEC__EVCTRL__Type.html#a36aabaf7d4fcf3dcdc76c8cce6199eb8"> 224</a></span>&#160; uint16_t <a class="code" href="unionPDEC__EVCTRL__Type.html#a36aabaf7d4fcf3dcdc76c8cce6199eb8">MCEO0</a>:1; </div>
<div class="line"><a name="l00225"></a><span class="lineno"><a class="line" href="unionPDEC__EVCTRL__Type.html#a21130feb1fe6135ff956f2777701a47d"> 225</a></span>&#160; uint16_t <a class="code" href="unionPDEC__EVCTRL__Type.html#a21130feb1fe6135ff956f2777701a47d">MCEO1</a>:1; </div>
<div class="line"><a name="l00226"></a><span class="lineno"><a class="line" href="unionPDEC__EVCTRL__Type.html#a352304f507305d86305fc02fa85deef5"> 226</a></span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00227"></a><span class="lineno"><a class="line" href="unionPDEC__EVCTRL__Type.html#a91784f3408894fb33faf931726cb923c"> 227</a></span>&#160; } bit; </div>
<div class="line"><a name="l00228"></a><span class="lineno"> 228</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00229"></a><span class="lineno"> 229</span>&#160; uint16_t :12; </div>
<div class="line"><a name="l00230"></a><span class="lineno"><a class="line" href="unionPDEC__EVCTRL__Type.html#aaf6b59f62cdca6411a084873d2e0f456"> 230</a></span>&#160; uint16_t <a class="code" href="unionPDEC__EVCTRL__Type.html#aaf6b59f62cdca6411a084873d2e0f456">MCEO</a>:2; </div>
<div class="line"><a name="l00231"></a><span class="lineno"><a class="line" href="unionPDEC__EVCTRL__Type.html#a7e51af7efd98e65d59f2728c3e9422c4"> 231</a></span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00232"></a><span class="lineno"><a class="line" href="unionPDEC__EVCTRL__Type.html#a407848d1570e05af4b248611f356c347"> 232</a></span>&#160; } vec; </div>
<div class="line"><a name="l00233"></a><span class="lineno"><a class="line" href="unionPDEC__EVCTRL__Type.html#a28db1597355764ff6d7f1817b03ec631"> 233</a></span>&#160; uint16_t <a class="code" href="unionPDEC__EVCTRL__Type.html#a28db1597355764ff6d7f1817b03ec631">reg</a>; </div>
<div class="line"><a name="l00234"></a><span class="lineno"> 234</span>&#160;} <a class="code" href="unionPDEC__EVCTRL__Type.html">PDEC_EVCTRL_Type</a>;</div>
<div class="line"><a name="l00235"></a><span class="lineno"> 235</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00236"></a><span class="lineno"> 236</span>&#160; </div>
<div class="line"><a name="l00237"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a439e052a95537a40c61e73226c6df7a3"> 237</a></span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_OFFSET 0x06 </span></div>
<div class="line"><a name="l00238"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ab45cb751aad9370ceebc1ba9d1d62686"> 238</a></span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_RESETVALUE _U_(0x0000) </span></div>
<div class="line"><a name="l00240"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a5b28d590f6c2575c2f5195ef3b6bb6b7"> 240</a></span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_EVACT_Pos 0 </span></div>
<div class="line"><a name="l00241"></a><span class="lineno"> 241</span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_EVACT_Msk (_U_(0x3) &lt;&lt; PDEC_EVCTRL_EVACT_Pos)</span></div>
<div class="line"><a name="l00242"></a><span class="lineno"> 242</span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_EVACT(value) (PDEC_EVCTRL_EVACT_Msk &amp; ((value) &lt;&lt; PDEC_EVCTRL_EVACT_Pos))</span></div>
<div class="line"><a name="l00243"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ae272c3901808b96289cf51d88c38ddad"> 243</a></span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_EVACT_OFF_Val _U_(0x0) </span></div>
<div class="line"><a name="l00244"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ac81c66659f9eca80241a6c2b10fb8a0d"> 244</a></span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_EVACT_RETRIGGER_Val _U_(0x1) </span></div>
<div class="line"><a name="l00245"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a8c265b09522553e7f65beec5fadca748"> 245</a></span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_EVACT_COUNT_Val _U_(0x2) </span></div>
<div class="line"><a name="l00246"></a><span class="lineno"> 246</span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_EVACT_OFF (PDEC_EVCTRL_EVACT_OFF_Val &lt;&lt; PDEC_EVCTRL_EVACT_Pos)</span></div>
<div class="line"><a name="l00247"></a><span class="lineno"> 247</span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_EVACT_RETRIGGER (PDEC_EVCTRL_EVACT_RETRIGGER_Val &lt;&lt; PDEC_EVCTRL_EVACT_Pos)</span></div>
<div class="line"><a name="l00248"></a><span class="lineno"> 248</span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_EVACT_COUNT (PDEC_EVCTRL_EVACT_COUNT_Val &lt;&lt; PDEC_EVCTRL_EVACT_Pos)</span></div>
<div class="line"><a name="l00249"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ae7ccc7dbc947df6fa88347c5fe528aac"> 249</a></span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_EVINV_Pos 2 </span></div>
<div class="line"><a name="l00250"></a><span class="lineno"> 250</span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_EVINV_Msk (_U_(0x7) &lt;&lt; PDEC_EVCTRL_EVINV_Pos)</span></div>
<div class="line"><a name="l00251"></a><span class="lineno"> 251</span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_EVINV(value) (PDEC_EVCTRL_EVINV_Msk &amp; ((value) &lt;&lt; PDEC_EVCTRL_EVINV_Pos))</span></div>
<div class="line"><a name="l00252"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a4a9d60867af2989a270953fd58cf850c"> 252</a></span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_EVEI_Pos 5 </span></div>
<div class="line"><a name="l00253"></a><span class="lineno"> 253</span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_EVEI_Msk (_U_(0x7) &lt;&lt; PDEC_EVCTRL_EVEI_Pos)</span></div>
<div class="line"><a name="l00254"></a><span class="lineno"> 254</span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_EVEI(value) (PDEC_EVCTRL_EVEI_Msk &amp; ((value) &lt;&lt; PDEC_EVCTRL_EVEI_Pos))</span></div>
<div class="line"><a name="l00255"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#af38508af251995942e85b8a0dc1a929d"> 255</a></span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_OVFEO_Pos 8 </span></div>
<div class="line"><a name="l00256"></a><span class="lineno"> 256</span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_OVFEO (_U_(0x1) &lt;&lt; PDEC_EVCTRL_OVFEO_Pos)</span></div>
<div class="line"><a name="l00257"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#aa19abe6bb468d36cb0fbaf5f0e16a83d"> 257</a></span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_ERREO_Pos 9 </span></div>
<div class="line"><a name="l00258"></a><span class="lineno"> 258</span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_ERREO (_U_(0x1) &lt;&lt; PDEC_EVCTRL_ERREO_Pos)</span></div>
<div class="line"><a name="l00259"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a5ab2ebd1f63877b9c1ee7184962586f5"> 259</a></span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_DIREO_Pos 10 </span></div>
<div class="line"><a name="l00260"></a><span class="lineno"> 260</span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_DIREO (_U_(0x1) &lt;&lt; PDEC_EVCTRL_DIREO_Pos)</span></div>
<div class="line"><a name="l00261"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a4fc860c9741d8d815e29f01dd5ff23a6"> 261</a></span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_VLCEO_Pos 11 </span></div>
<div class="line"><a name="l00262"></a><span class="lineno"> 262</span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_VLCEO (_U_(0x1) &lt;&lt; PDEC_EVCTRL_VLCEO_Pos)</span></div>
<div class="line"><a name="l00263"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a084a1886bf08cd94a0bdcb15ea616af0"> 263</a></span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_MCEO0_Pos 12 </span></div>
<div class="line"><a name="l00264"></a><span class="lineno"> 264</span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_MCEO0 (_U_(1) &lt;&lt; PDEC_EVCTRL_MCEO0_Pos)</span></div>
<div class="line"><a name="l00265"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a43d1e7ae55988b5548e81b8703d39027"> 265</a></span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_MCEO1_Pos 13 </span></div>
<div class="line"><a name="l00266"></a><span class="lineno"> 266</span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_MCEO1 (_U_(1) &lt;&lt; PDEC_EVCTRL_MCEO1_Pos)</span></div>
<div class="line"><a name="l00267"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a8a73536606134febb88b9648b59b7f10"> 267</a></span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_MCEO_Pos 12 </span></div>
<div class="line"><a name="l00268"></a><span class="lineno"> 268</span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_MCEO_Msk (_U_(0x3) &lt;&lt; PDEC_EVCTRL_MCEO_Pos)</span></div>
<div class="line"><a name="l00269"></a><span class="lineno"> 269</span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_MCEO(value) (PDEC_EVCTRL_MCEO_Msk &amp; ((value) &lt;&lt; PDEC_EVCTRL_MCEO_Pos))</span></div>
<div class="line"><a name="l00270"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a6f1b27ef3893127501a8288ba554c33e"> 270</a></span>&#160;<span class="preprocessor">#define PDEC_EVCTRL_MASK _U_(0x3FFF) </span></div>
<div class="line"><a name="l00272"></a><span class="lineno"> 272</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PDEC_INTENCLR : (PDEC Offset: 0x08) (R/W 8) Interrupt Enable Clear -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00273"></a><span class="lineno"> 273</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00274"></a><span class="lineno"><a class="line" href="unionPDEC__INTENCLR__Type.html"> 274</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00275"></a><span class="lineno"> 275</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00276"></a><span class="lineno"><a class="line" href="unionPDEC__INTENCLR__Type.html#a2b0151e4e0f0ff7e6263f7e07e7a0cf6"> 276</a></span>&#160; uint8_t <a class="code" href="unionPDEC__INTENCLR__Type.html#a2b0151e4e0f0ff7e6263f7e07e7a0cf6">OVF</a>:1; </div>
<div class="line"><a name="l00277"></a><span class="lineno"><a class="line" href="unionPDEC__INTENCLR__Type.html#ac38018a6816cb0d298bfe4f889f577c9"> 277</a></span>&#160; uint8_t <a class="code" href="unionPDEC__INTENCLR__Type.html#ac38018a6816cb0d298bfe4f889f577c9">ERR</a>:1; </div>
<div class="line"><a name="l00278"></a><span class="lineno"><a class="line" href="unionPDEC__INTENCLR__Type.html#ae0b164c71a36d38d5ce4e034f828d93d"> 278</a></span>&#160; uint8_t <a class="code" href="unionPDEC__INTENCLR__Type.html#ae0b164c71a36d38d5ce4e034f828d93d">DIR</a>:1; </div>
<div class="line"><a name="l00279"></a><span class="lineno"><a class="line" href="unionPDEC__INTENCLR__Type.html#a1ec08a1d7ab35b5d8f4b4d26f4e020b2"> 279</a></span>&#160; uint8_t <a class="code" href="unionPDEC__INTENCLR__Type.html#a1ec08a1d7ab35b5d8f4b4d26f4e020b2">VLC</a>:1; </div>
<div class="line"><a name="l00280"></a><span class="lineno"><a class="line" href="unionPDEC__INTENCLR__Type.html#ae3be344cb563bc45746c4625b42c3fc1"> 280</a></span>&#160; uint8_t <a class="code" href="unionPDEC__INTENCLR__Type.html#ae3be344cb563bc45746c4625b42c3fc1">MC0</a>:1; </div>
<div class="line"><a name="l00281"></a><span class="lineno"><a class="line" href="unionPDEC__INTENCLR__Type.html#a215dbae3b32d69108e5a312be3ec2c89"> 281</a></span>&#160; uint8_t <a class="code" href="unionPDEC__INTENCLR__Type.html#a215dbae3b32d69108e5a312be3ec2c89">MC1</a>:1; </div>
<div class="line"><a name="l00282"></a><span class="lineno"><a class="line" href="unionPDEC__INTENCLR__Type.html#a1c6d7bc543677b3b5629c8136117c129"> 282</a></span>&#160; uint8_t :2; </div>
<div class="line"><a name="l00283"></a><span class="lineno"><a class="line" href="unionPDEC__INTENCLR__Type.html#a107052827e20b71eaf84dd5c3a8a63c1"> 283</a></span>&#160; } bit; </div>
<div class="line"><a name="l00284"></a><span class="lineno"> 284</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00285"></a><span class="lineno"> 285</span>&#160; uint8_t :4; </div>
<div class="line"><a name="l00286"></a><span class="lineno"><a class="line" href="unionPDEC__INTENCLR__Type.html#acb55227447926accad81bc2f8b053e92"> 286</a></span>&#160; uint8_t <a class="code" href="unionPDEC__INTENCLR__Type.html#acb55227447926accad81bc2f8b053e92">MC</a>:2; </div>
<div class="line"><a name="l00287"></a><span class="lineno"><a class="line" href="unionPDEC__INTENCLR__Type.html#a09d35c075d59e777f9fb89891ab065dd"> 287</a></span>&#160; uint8_t :2; </div>
<div class="line"><a name="l00288"></a><span class="lineno"><a class="line" href="unionPDEC__INTENCLR__Type.html#aff6e71dd5f66959d5a76e3ae32965585"> 288</a></span>&#160; } vec; </div>
<div class="line"><a name="l00289"></a><span class="lineno"><a class="line" href="unionPDEC__INTENCLR__Type.html#ab31984e298b00342bfc79544aaa814ae"> 289</a></span>&#160; uint8_t <a class="code" href="unionPDEC__INTENCLR__Type.html#ab31984e298b00342bfc79544aaa814ae">reg</a>; </div>
<div class="line"><a name="l00290"></a><span class="lineno"> 290</span>&#160;} <a class="code" href="unionPDEC__INTENCLR__Type.html">PDEC_INTENCLR_Type</a>;</div>
<div class="line"><a name="l00291"></a><span class="lineno"> 291</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00292"></a><span class="lineno"> 292</span>&#160; </div>
<div class="line"><a name="l00293"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a783c428d8cfd00d83b7086258a9bf3a2"> 293</a></span>&#160;<span class="preprocessor">#define PDEC_INTENCLR_OFFSET 0x08 </span></div>
<div class="line"><a name="l00294"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#aef0bd8d6cca4a05116574cd39a796552"> 294</a></span>&#160;<span class="preprocessor">#define PDEC_INTENCLR_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00296"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#aadbd9626979acfc15fd10ee5a303dcf5"> 296</a></span>&#160;<span class="preprocessor">#define PDEC_INTENCLR_OVF_Pos 0 </span></div>
<div class="line"><a name="l00297"></a><span class="lineno"> 297</span>&#160;<span class="preprocessor">#define PDEC_INTENCLR_OVF (_U_(0x1) &lt;&lt; PDEC_INTENCLR_OVF_Pos)</span></div>
<div class="line"><a name="l00298"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a14bf86bbdbaf7687deba2c058a3c0733"> 298</a></span>&#160;<span class="preprocessor">#define PDEC_INTENCLR_ERR_Pos 1 </span></div>
<div class="line"><a name="l00299"></a><span class="lineno"> 299</span>&#160;<span class="preprocessor">#define PDEC_INTENCLR_ERR (_U_(0x1) &lt;&lt; PDEC_INTENCLR_ERR_Pos)</span></div>
<div class="line"><a name="l00300"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a9c48dd7d0a7e9a93b4758759680f27bb"> 300</a></span>&#160;<span class="preprocessor">#define PDEC_INTENCLR_DIR_Pos 2 </span></div>
<div class="line"><a name="l00301"></a><span class="lineno"> 301</span>&#160;<span class="preprocessor">#define PDEC_INTENCLR_DIR (_U_(0x1) &lt;&lt; PDEC_INTENCLR_DIR_Pos)</span></div>
<div class="line"><a name="l00302"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ad67f55edc4666e6f3db655f5ffbbada6"> 302</a></span>&#160;<span class="preprocessor">#define PDEC_INTENCLR_VLC_Pos 3 </span></div>
<div class="line"><a name="l00303"></a><span class="lineno"> 303</span>&#160;<span class="preprocessor">#define PDEC_INTENCLR_VLC (_U_(0x1) &lt;&lt; PDEC_INTENCLR_VLC_Pos)</span></div>
<div class="line"><a name="l00304"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ab1e3391916a1ce33f162b4838478ba99"> 304</a></span>&#160;<span class="preprocessor">#define PDEC_INTENCLR_MC0_Pos 4 </span></div>
<div class="line"><a name="l00305"></a><span class="lineno"> 305</span>&#160;<span class="preprocessor">#define PDEC_INTENCLR_MC0 (_U_(1) &lt;&lt; PDEC_INTENCLR_MC0_Pos)</span></div>
<div class="line"><a name="l00306"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ac9625c30442ce6728cf4e851d0bae5a6"> 306</a></span>&#160;<span class="preprocessor">#define PDEC_INTENCLR_MC1_Pos 5 </span></div>
<div class="line"><a name="l00307"></a><span class="lineno"> 307</span>&#160;<span class="preprocessor">#define PDEC_INTENCLR_MC1 (_U_(1) &lt;&lt; PDEC_INTENCLR_MC1_Pos)</span></div>
<div class="line"><a name="l00308"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#afc725e6cf6a056970dbc1ba4c186ddad"> 308</a></span>&#160;<span class="preprocessor">#define PDEC_INTENCLR_MC_Pos 4 </span></div>
<div class="line"><a name="l00309"></a><span class="lineno"> 309</span>&#160;<span class="preprocessor">#define PDEC_INTENCLR_MC_Msk (_U_(0x3) &lt;&lt; PDEC_INTENCLR_MC_Pos)</span></div>
<div class="line"><a name="l00310"></a><span class="lineno"> 310</span>&#160;<span class="preprocessor">#define PDEC_INTENCLR_MC(value) (PDEC_INTENCLR_MC_Msk &amp; ((value) &lt;&lt; PDEC_INTENCLR_MC_Pos))</span></div>
<div class="line"><a name="l00311"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ae32ca843e993521282321d0b5e7df517"> 311</a></span>&#160;<span class="preprocessor">#define PDEC_INTENCLR_MASK _U_(0x3F) </span></div>
<div class="line"><a name="l00313"></a><span class="lineno"> 313</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PDEC_INTENSET : (PDEC Offset: 0x09) (R/W 8) Interrupt Enable Set -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00314"></a><span class="lineno"> 314</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00315"></a><span class="lineno"><a class="line" href="unionPDEC__INTENSET__Type.html"> 315</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00316"></a><span class="lineno"> 316</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00317"></a><span class="lineno"><a class="line" href="unionPDEC__INTENSET__Type.html#a8be272a2c28d72b66ac3cf3c9065ec7f"> 317</a></span>&#160; uint8_t <a class="code" href="unionPDEC__INTENSET__Type.html#a8be272a2c28d72b66ac3cf3c9065ec7f">OVF</a>:1; </div>
<div class="line"><a name="l00318"></a><span class="lineno"><a class="line" href="unionPDEC__INTENSET__Type.html#ac20fb4bfead5d5a235e8f718b72bcf4c"> 318</a></span>&#160; uint8_t <a class="code" href="unionPDEC__INTENSET__Type.html#ac20fb4bfead5d5a235e8f718b72bcf4c">ERR</a>:1; </div>
<div class="line"><a name="l00319"></a><span class="lineno"><a class="line" href="unionPDEC__INTENSET__Type.html#a7d18179eaefc62dd2b6cafef2e317f1b"> 319</a></span>&#160; uint8_t <a class="code" href="unionPDEC__INTENSET__Type.html#a7d18179eaefc62dd2b6cafef2e317f1b">DIR</a>:1; </div>
<div class="line"><a name="l00320"></a><span class="lineno"><a class="line" href="unionPDEC__INTENSET__Type.html#a3c6b2f217302f5139a365938ed68cc7d"> 320</a></span>&#160; uint8_t <a class="code" href="unionPDEC__INTENSET__Type.html#a3c6b2f217302f5139a365938ed68cc7d">VLC</a>:1; </div>
<div class="line"><a name="l00321"></a><span class="lineno"><a class="line" href="unionPDEC__INTENSET__Type.html#a52ca664c0df1b6f5c548fdbb9b7a97da"> 321</a></span>&#160; uint8_t <a class="code" href="unionPDEC__INTENSET__Type.html#a52ca664c0df1b6f5c548fdbb9b7a97da">MC0</a>:1; </div>
<div class="line"><a name="l00322"></a><span class="lineno"><a class="line" href="unionPDEC__INTENSET__Type.html#ab38fcba7b0aa0cf1c8117235faf13c5f"> 322</a></span>&#160; uint8_t <a class="code" href="unionPDEC__INTENSET__Type.html#ab38fcba7b0aa0cf1c8117235faf13c5f">MC1</a>:1; </div>
<div class="line"><a name="l00323"></a><span class="lineno"><a class="line" href="unionPDEC__INTENSET__Type.html#af1ac6c85bc8f9ae2d51cb18ab054d213"> 323</a></span>&#160; uint8_t :2; </div>
<div class="line"><a name="l00324"></a><span class="lineno"><a class="line" href="unionPDEC__INTENSET__Type.html#aff0448fc66ea906eeb0b2e8b90b2b1ef"> 324</a></span>&#160; } bit; </div>
<div class="line"><a name="l00325"></a><span class="lineno"> 325</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00326"></a><span class="lineno"> 326</span>&#160; uint8_t :4; </div>
<div class="line"><a name="l00327"></a><span class="lineno"><a class="line" href="unionPDEC__INTENSET__Type.html#ad8a95c127da961c32a47f201bc8a41fa"> 327</a></span>&#160; uint8_t <a class="code" href="unionPDEC__INTENSET__Type.html#ad8a95c127da961c32a47f201bc8a41fa">MC</a>:2; </div>
<div class="line"><a name="l00328"></a><span class="lineno"><a class="line" href="unionPDEC__INTENSET__Type.html#ae902bd680244294e28ab4362b3a6eedd"> 328</a></span>&#160; uint8_t :2; </div>
<div class="line"><a name="l00329"></a><span class="lineno"><a class="line" href="unionPDEC__INTENSET__Type.html#ad748455d9ba80f69505c8776e335d5f5"> 329</a></span>&#160; } vec; </div>
<div class="line"><a name="l00330"></a><span class="lineno"><a class="line" href="unionPDEC__INTENSET__Type.html#af6b385821af6754085926efb5905092c"> 330</a></span>&#160; uint8_t <a class="code" href="unionPDEC__INTENSET__Type.html#af6b385821af6754085926efb5905092c">reg</a>; </div>
<div class="line"><a name="l00331"></a><span class="lineno"> 331</span>&#160;} <a class="code" href="unionPDEC__INTENSET__Type.html">PDEC_INTENSET_Type</a>;</div>
<div class="line"><a name="l00332"></a><span class="lineno"> 332</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00333"></a><span class="lineno"> 333</span>&#160; </div>
<div class="line"><a name="l00334"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a20b4ce66ad9c1ca454b170c774248c64"> 334</a></span>&#160;<span class="preprocessor">#define PDEC_INTENSET_OFFSET 0x09 </span></div>
<div class="line"><a name="l00335"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#acb785c69015f72f941eb53269a8616ca"> 335</a></span>&#160;<span class="preprocessor">#define PDEC_INTENSET_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00337"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a4d787844ead38ec48cc215e8e0f68185"> 337</a></span>&#160;<span class="preprocessor">#define PDEC_INTENSET_OVF_Pos 0 </span></div>
<div class="line"><a name="l00338"></a><span class="lineno"> 338</span>&#160;<span class="preprocessor">#define PDEC_INTENSET_OVF (_U_(0x1) &lt;&lt; PDEC_INTENSET_OVF_Pos)</span></div>
<div class="line"><a name="l00339"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a9f50990a65c431de97004c93e52fe129"> 339</a></span>&#160;<span class="preprocessor">#define PDEC_INTENSET_ERR_Pos 1 </span></div>
<div class="line"><a name="l00340"></a><span class="lineno"> 340</span>&#160;<span class="preprocessor">#define PDEC_INTENSET_ERR (_U_(0x1) &lt;&lt; PDEC_INTENSET_ERR_Pos)</span></div>
<div class="line"><a name="l00341"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ae0c2f31f5253da9dc62a08becc5a4481"> 341</a></span>&#160;<span class="preprocessor">#define PDEC_INTENSET_DIR_Pos 2 </span></div>
<div class="line"><a name="l00342"></a><span class="lineno"> 342</span>&#160;<span class="preprocessor">#define PDEC_INTENSET_DIR (_U_(0x1) &lt;&lt; PDEC_INTENSET_DIR_Pos)</span></div>
<div class="line"><a name="l00343"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#aac43de2a544227fd855d9470a60ea468"> 343</a></span>&#160;<span class="preprocessor">#define PDEC_INTENSET_VLC_Pos 3 </span></div>
<div class="line"><a name="l00344"></a><span class="lineno"> 344</span>&#160;<span class="preprocessor">#define PDEC_INTENSET_VLC (_U_(0x1) &lt;&lt; PDEC_INTENSET_VLC_Pos)</span></div>
<div class="line"><a name="l00345"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a7772878a317c57239adb62ddd18076d2"> 345</a></span>&#160;<span class="preprocessor">#define PDEC_INTENSET_MC0_Pos 4 </span></div>
<div class="line"><a name="l00346"></a><span class="lineno"> 346</span>&#160;<span class="preprocessor">#define PDEC_INTENSET_MC0 (_U_(1) &lt;&lt; PDEC_INTENSET_MC0_Pos)</span></div>
<div class="line"><a name="l00347"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#aa034cf3be3730618d97c320cb3f970c5"> 347</a></span>&#160;<span class="preprocessor">#define PDEC_INTENSET_MC1_Pos 5 </span></div>
<div class="line"><a name="l00348"></a><span class="lineno"> 348</span>&#160;<span class="preprocessor">#define PDEC_INTENSET_MC1 (_U_(1) &lt;&lt; PDEC_INTENSET_MC1_Pos)</span></div>
<div class="line"><a name="l00349"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a35d69bba70ea31cc9763ddc81d49c315"> 349</a></span>&#160;<span class="preprocessor">#define PDEC_INTENSET_MC_Pos 4 </span></div>
<div class="line"><a name="l00350"></a><span class="lineno"> 350</span>&#160;<span class="preprocessor">#define PDEC_INTENSET_MC_Msk (_U_(0x3) &lt;&lt; PDEC_INTENSET_MC_Pos)</span></div>
<div class="line"><a name="l00351"></a><span class="lineno"> 351</span>&#160;<span class="preprocessor">#define PDEC_INTENSET_MC(value) (PDEC_INTENSET_MC_Msk &amp; ((value) &lt;&lt; PDEC_INTENSET_MC_Pos))</span></div>
<div class="line"><a name="l00352"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a9eb89a39dc1edcfe5a0da02d8678d2fd"> 352</a></span>&#160;<span class="preprocessor">#define PDEC_INTENSET_MASK _U_(0x3F) </span></div>
<div class="line"><a name="l00354"></a><span class="lineno"> 354</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PDEC_INTFLAG : (PDEC Offset: 0x0A) (R/W 8) Interrupt Flag Status and Clear -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00355"></a><span class="lineno"> 355</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00356"></a><span class="lineno"><a class="line" href="unionPDEC__INTFLAG__Type.html"> 356</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{ <span class="comment">// __I to avoid read-modify-write on write-to-clear register</span></div>
<div class="line"><a name="l00357"></a><span class="lineno"> 357</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00358"></a><span class="lineno"><a class="line" href="unionPDEC__INTFLAG__Type.html#a2a5212d8f0df4d7f4c504e6d02ffcce9"> 358</a></span>&#160; __I uint8_t <a class="code" href="unionPDEC__INTFLAG__Type.html#a2a5212d8f0df4d7f4c504e6d02ffcce9">OVF</a>:1; </div>
<div class="line"><a name="l00359"></a><span class="lineno"><a class="line" href="unionPDEC__INTFLAG__Type.html#ad24e49a0907723d081d1ff17eea45062"> 359</a></span>&#160; __I uint8_t <a class="code" href="unionPDEC__INTFLAG__Type.html#ad24e49a0907723d081d1ff17eea45062">ERR</a>:1; </div>
<div class="line"><a name="l00360"></a><span class="lineno"><a class="line" href="unionPDEC__INTFLAG__Type.html#afeee7b68d7f97ea7d9aff1e5fed67c84"> 360</a></span>&#160; __I uint8_t <a class="code" href="unionPDEC__INTFLAG__Type.html#afeee7b68d7f97ea7d9aff1e5fed67c84">DIR</a>:1; </div>
<div class="line"><a name="l00361"></a><span class="lineno"><a class="line" href="unionPDEC__INTFLAG__Type.html#ac2aadcd0f56455465d26cfbcbd143b95"> 361</a></span>&#160; __I uint8_t <a class="code" href="unionPDEC__INTFLAG__Type.html#ac2aadcd0f56455465d26cfbcbd143b95">VLC</a>:1; </div>
<div class="line"><a name="l00362"></a><span class="lineno"><a class="line" href="unionPDEC__INTFLAG__Type.html#a02f55a909c0c7c2545370b26737cb5f7"> 362</a></span>&#160; __I uint8_t <a class="code" href="unionPDEC__INTFLAG__Type.html#a02f55a909c0c7c2545370b26737cb5f7">MC0</a>:1; </div>
<div class="line"><a name="l00363"></a><span class="lineno"><a class="line" href="unionPDEC__INTFLAG__Type.html#a8f5b9f6b0aeead92bcf554506debdde8"> 363</a></span>&#160; __I uint8_t <a class="code" href="unionPDEC__INTFLAG__Type.html#a8f5b9f6b0aeead92bcf554506debdde8">MC1</a>:1; </div>
<div class="line"><a name="l00364"></a><span class="lineno"><a class="line" href="unionPDEC__INTFLAG__Type.html#a07b7669882e5669f5797021b942fb8e7"> 364</a></span>&#160; __I <a class="code" href="unionPDEC__INTFLAG__Type.html#a07b7669882e5669f5797021b942fb8e7">uint8_t</a> :2; </div>
<div class="line"><a name="l00365"></a><span class="lineno"><a class="line" href="unionPDEC__INTFLAG__Type.html#a448dad39f663d177e81ab4eed964222a"> 365</a></span>&#160; } bit; </div>
<div class="line"><a name="l00366"></a><span class="lineno"> 366</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00367"></a><span class="lineno"> 367</span>&#160; __I uint8_t :4; </div>
<div class="line"><a name="l00368"></a><span class="lineno"><a class="line" href="unionPDEC__INTFLAG__Type.html#a7314d3723063fece0ce804bff2e9a9f0"> 368</a></span>&#160; __I uint8_t <a class="code" href="unionPDEC__INTFLAG__Type.html#a7314d3723063fece0ce804bff2e9a9f0">MC</a>:2; </div>
<div class="line"><a name="l00369"></a><span class="lineno"> 369</span>&#160; __I uint8_t :2; </div>
<div class="line"><a name="l00370"></a><span class="lineno"><a class="line" href="unionPDEC__INTFLAG__Type.html#a3efe33bd2b0a6f164aec924ae4df1a08"> 370</a></span>&#160; } vec; </div>
<div class="line"><a name="l00371"></a><span class="lineno"><a class="line" href="unionPDEC__INTFLAG__Type.html#aa2dd572bdb2def4c4fd8af3111e9de20"> 371</a></span>&#160; uint8_t <a class="code" href="unionPDEC__INTFLAG__Type.html#aa2dd572bdb2def4c4fd8af3111e9de20">reg</a>; </div>
<div class="line"><a name="l00372"></a><span class="lineno"> 372</span>&#160;} <a class="code" href="unionPDEC__INTFLAG__Type.html">PDEC_INTFLAG_Type</a>;</div>
<div class="line"><a name="l00373"></a><span class="lineno"> 373</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00374"></a><span class="lineno"> 374</span>&#160; </div>
<div class="line"><a name="l00375"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a7b0b631034febaa8b8a6a052bb8d1f0c"> 375</a></span>&#160;<span class="preprocessor">#define PDEC_INTFLAG_OFFSET 0x0A </span></div>
<div class="line"><a name="l00376"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a1796ebb5eeaf6d5ad3dd0195368315ec"> 376</a></span>&#160;<span class="preprocessor">#define PDEC_INTFLAG_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00378"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a65c846954ad7b2eddf46896673ed26ef"> 378</a></span>&#160;<span class="preprocessor">#define PDEC_INTFLAG_OVF_Pos 0 </span></div>
<div class="line"><a name="l00379"></a><span class="lineno"> 379</span>&#160;<span class="preprocessor">#define PDEC_INTFLAG_OVF (_U_(0x1) &lt;&lt; PDEC_INTFLAG_OVF_Pos)</span></div>
<div class="line"><a name="l00380"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#aaa30f896fded2df92f8273cc475c17f3"> 380</a></span>&#160;<span class="preprocessor">#define PDEC_INTFLAG_ERR_Pos 1 </span></div>
<div class="line"><a name="l00381"></a><span class="lineno"> 381</span>&#160;<span class="preprocessor">#define PDEC_INTFLAG_ERR (_U_(0x1) &lt;&lt; PDEC_INTFLAG_ERR_Pos)</span></div>
<div class="line"><a name="l00382"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ad7c260ee00c6781ef81bd78b8deb4057"> 382</a></span>&#160;<span class="preprocessor">#define PDEC_INTFLAG_DIR_Pos 2 </span></div>
<div class="line"><a name="l00383"></a><span class="lineno"> 383</span>&#160;<span class="preprocessor">#define PDEC_INTFLAG_DIR (_U_(0x1) &lt;&lt; PDEC_INTFLAG_DIR_Pos)</span></div>
<div class="line"><a name="l00384"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a9649a2db308bf4090c07d2a4d6b8ad40"> 384</a></span>&#160;<span class="preprocessor">#define PDEC_INTFLAG_VLC_Pos 3 </span></div>
<div class="line"><a name="l00385"></a><span class="lineno"> 385</span>&#160;<span class="preprocessor">#define PDEC_INTFLAG_VLC (_U_(0x1) &lt;&lt; PDEC_INTFLAG_VLC_Pos)</span></div>
<div class="line"><a name="l00386"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a7f0e45ef917e03e1f9743661eed42911"> 386</a></span>&#160;<span class="preprocessor">#define PDEC_INTFLAG_MC0_Pos 4 </span></div>
<div class="line"><a name="l00387"></a><span class="lineno"> 387</span>&#160;<span class="preprocessor">#define PDEC_INTFLAG_MC0 (_U_(1) &lt;&lt; PDEC_INTFLAG_MC0_Pos)</span></div>
<div class="line"><a name="l00388"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#aa992821bf4a4b79ca9847d482a49c6eb"> 388</a></span>&#160;<span class="preprocessor">#define PDEC_INTFLAG_MC1_Pos 5 </span></div>
<div class="line"><a name="l00389"></a><span class="lineno"> 389</span>&#160;<span class="preprocessor">#define PDEC_INTFLAG_MC1 (_U_(1) &lt;&lt; PDEC_INTFLAG_MC1_Pos)</span></div>
<div class="line"><a name="l00390"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#abab4572ee3bc55234f8c6fb3a27f5584"> 390</a></span>&#160;<span class="preprocessor">#define PDEC_INTFLAG_MC_Pos 4 </span></div>
<div class="line"><a name="l00391"></a><span class="lineno"> 391</span>&#160;<span class="preprocessor">#define PDEC_INTFLAG_MC_Msk (_U_(0x3) &lt;&lt; PDEC_INTFLAG_MC_Pos)</span></div>
<div class="line"><a name="l00392"></a><span class="lineno"> 392</span>&#160;<span class="preprocessor">#define PDEC_INTFLAG_MC(value) (PDEC_INTFLAG_MC_Msk &amp; ((value) &lt;&lt; PDEC_INTFLAG_MC_Pos))</span></div>
<div class="line"><a name="l00393"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a00508b2d806f01481767477720166ca4"> 393</a></span>&#160;<span class="preprocessor">#define PDEC_INTFLAG_MASK _U_(0x3F) </span></div>
<div class="line"><a name="l00395"></a><span class="lineno"> 395</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PDEC_STATUS : (PDEC Offset: 0x0C) (R/W 16) Status -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00396"></a><span class="lineno"> 396</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00397"></a><span class="lineno"><a class="line" href="unionPDEC__STATUS__Type.html"> 397</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00398"></a><span class="lineno"> 398</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00399"></a><span class="lineno"><a class="line" href="unionPDEC__STATUS__Type.html#a3f71f6078fec4ddb56bbd1d7d96cc293"> 399</a></span>&#160; uint16_t <a class="code" href="unionPDEC__STATUS__Type.html#a3f71f6078fec4ddb56bbd1d7d96cc293">QERR</a>:1; </div>
<div class="line"><a name="l00400"></a><span class="lineno"><a class="line" href="unionPDEC__STATUS__Type.html#abb24dc60aa4d9dbeda04107692bab4bb"> 400</a></span>&#160; uint16_t <a class="code" href="unionPDEC__STATUS__Type.html#abb24dc60aa4d9dbeda04107692bab4bb">IDXERR</a>:1; </div>
<div class="line"><a name="l00401"></a><span class="lineno"><a class="line" href="unionPDEC__STATUS__Type.html#a7e57a79e098f6ac3b08b11a9f1b419da"> 401</a></span>&#160; uint16_t <a class="code" href="unionPDEC__STATUS__Type.html#a7e57a79e098f6ac3b08b11a9f1b419da">MPERR</a>:1; </div>
<div class="line"><a name="l00402"></a><span class="lineno"><a class="line" href="unionPDEC__STATUS__Type.html#a7d2042d9b329d89af1744b6ed702544e"> 402</a></span>&#160; uint16_t :1; </div>
<div class="line"><a name="l00403"></a><span class="lineno"><a class="line" href="unionPDEC__STATUS__Type.html#a0d3b54587e79518a494c58c68ff3d3e6"> 403</a></span>&#160; uint16_t <a class="code" href="unionPDEC__STATUS__Type.html#a0d3b54587e79518a494c58c68ff3d3e6">WINERR</a>:1; </div>
<div class="line"><a name="l00404"></a><span class="lineno"><a class="line" href="unionPDEC__STATUS__Type.html#ac91411e5f4cea4126a79290b83ea2a74"> 404</a></span>&#160; uint16_t <a class="code" href="unionPDEC__STATUS__Type.html#ac91411e5f4cea4126a79290b83ea2a74">HERR</a>:1; </div>
<div class="line"><a name="l00405"></a><span class="lineno"><a class="line" href="unionPDEC__STATUS__Type.html#aa25d04bff595da5d74cfc96182a3cba0"> 405</a></span>&#160; uint16_t <a class="code" href="unionPDEC__STATUS__Type.html#aa25d04bff595da5d74cfc96182a3cba0">STOP</a>:1; </div>
<div class="line"><a name="l00406"></a><span class="lineno"><a class="line" href="unionPDEC__STATUS__Type.html#a669311e94908484987f61984fab0cd1d"> 406</a></span>&#160; uint16_t <a class="code" href="unionPDEC__STATUS__Type.html#a669311e94908484987f61984fab0cd1d">DIR</a>:1; </div>
<div class="line"><a name="l00407"></a><span class="lineno"><a class="line" href="unionPDEC__STATUS__Type.html#a522590cc58295f0aeb7d50b8984c6e71"> 407</a></span>&#160; uint16_t <a class="code" href="unionPDEC__STATUS__Type.html#a522590cc58295f0aeb7d50b8984c6e71">PRESCBUFV</a>:1; </div>
<div class="line"><a name="l00408"></a><span class="lineno"><a class="line" href="unionPDEC__STATUS__Type.html#a086f2987cb0e00df7f99b225b266fd8d"> 408</a></span>&#160; uint16_t <a class="code" href="unionPDEC__STATUS__Type.html#a086f2987cb0e00df7f99b225b266fd8d">FILTERBUFV</a>:1; </div>
<div class="line"><a name="l00409"></a><span class="lineno"><a class="line" href="unionPDEC__STATUS__Type.html#ad78e8903825c9665f25651f002ddafbb"> 409</a></span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00410"></a><span class="lineno"><a class="line" href="unionPDEC__STATUS__Type.html#a8bd847b252374e0cb61fe54e32b9f80d"> 410</a></span>&#160; uint16_t <a class="code" href="unionPDEC__STATUS__Type.html#a8bd847b252374e0cb61fe54e32b9f80d">CCBUFV0</a>:1; </div>
<div class="line"><a name="l00411"></a><span class="lineno"><a class="line" href="unionPDEC__STATUS__Type.html#a955456be038131ad5effe0a5a99985ac"> 411</a></span>&#160; uint16_t <a class="code" href="unionPDEC__STATUS__Type.html#a955456be038131ad5effe0a5a99985ac">CCBUFV1</a>:1; </div>
<div class="line"><a name="l00412"></a><span class="lineno"><a class="line" href="unionPDEC__STATUS__Type.html#a476a89e626d17c6f040e64a0a43ce8be"> 412</a></span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00413"></a><span class="lineno"><a class="line" href="unionPDEC__STATUS__Type.html#a0972234b49a436b5b4c998eda5ec456f"> 413</a></span>&#160; } bit; </div>
<div class="line"><a name="l00414"></a><span class="lineno"> 414</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00415"></a><span class="lineno"> 415</span>&#160; uint16_t :12; </div>
<div class="line"><a name="l00416"></a><span class="lineno"><a class="line" href="unionPDEC__STATUS__Type.html#a444a683977af61c2a427fa829d959d26"> 416</a></span>&#160; uint16_t <a class="code" href="unionPDEC__STATUS__Type.html#a444a683977af61c2a427fa829d959d26">CCBUFV</a>:2; </div>
<div class="line"><a name="l00417"></a><span class="lineno"> 417</span>&#160; uint16_t :2; </div>
<div class="line"><a name="l00418"></a><span class="lineno"><a class="line" href="unionPDEC__STATUS__Type.html#ad7cd6a2eec4d4ef462f580a97b5ae263"> 418</a></span>&#160; } vec; </div>
<div class="line"><a name="l00419"></a><span class="lineno"><a class="line" href="unionPDEC__STATUS__Type.html#a38327de824777dffa3fb9ee43f8aecb7"> 419</a></span>&#160; uint16_t <a class="code" href="unionPDEC__STATUS__Type.html#a38327de824777dffa3fb9ee43f8aecb7">reg</a>; </div>
<div class="line"><a name="l00420"></a><span class="lineno"> 420</span>&#160;} <a class="code" href="unionPDEC__STATUS__Type.html">PDEC_STATUS_Type</a>;</div>
<div class="line"><a name="l00421"></a><span class="lineno"> 421</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00422"></a><span class="lineno"> 422</span>&#160; </div>
<div class="line"><a name="l00423"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a72f8957e1128ac2be69e46b7e065a9fd"> 423</a></span>&#160;<span class="preprocessor">#define PDEC_STATUS_OFFSET 0x0C </span></div>
<div class="line"><a name="l00424"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a5292706b6082893147012bebc5638a10"> 424</a></span>&#160;<span class="preprocessor">#define PDEC_STATUS_RESETVALUE _U_(0x0040) </span></div>
<div class="line"><a name="l00426"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a41194b00adfe77891d133f531500915d"> 426</a></span>&#160;<span class="preprocessor">#define PDEC_STATUS_QERR_Pos 0 </span></div>
<div class="line"><a name="l00427"></a><span class="lineno"> 427</span>&#160;<span class="preprocessor">#define PDEC_STATUS_QERR (_U_(0x1) &lt;&lt; PDEC_STATUS_QERR_Pos)</span></div>
<div class="line"><a name="l00428"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a1620442f9884c296e05b5d3267704058"> 428</a></span>&#160;<span class="preprocessor">#define PDEC_STATUS_IDXERR_Pos 1 </span></div>
<div class="line"><a name="l00429"></a><span class="lineno"> 429</span>&#160;<span class="preprocessor">#define PDEC_STATUS_IDXERR (_U_(0x1) &lt;&lt; PDEC_STATUS_IDXERR_Pos)</span></div>
<div class="line"><a name="l00430"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#aeceb61fc259533c2332a09d6d15f5f6f"> 430</a></span>&#160;<span class="preprocessor">#define PDEC_STATUS_MPERR_Pos 2 </span></div>
<div class="line"><a name="l00431"></a><span class="lineno"> 431</span>&#160;<span class="preprocessor">#define PDEC_STATUS_MPERR (_U_(0x1) &lt;&lt; PDEC_STATUS_MPERR_Pos)</span></div>
<div class="line"><a name="l00432"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ad0ef841ec75095a05d8509c52e2c0136"> 432</a></span>&#160;<span class="preprocessor">#define PDEC_STATUS_WINERR_Pos 4 </span></div>
<div class="line"><a name="l00433"></a><span class="lineno"> 433</span>&#160;<span class="preprocessor">#define PDEC_STATUS_WINERR (_U_(0x1) &lt;&lt; PDEC_STATUS_WINERR_Pos)</span></div>
<div class="line"><a name="l00434"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ae7e5a17e72569e44bde1663820ec424a"> 434</a></span>&#160;<span class="preprocessor">#define PDEC_STATUS_HERR_Pos 5 </span></div>
<div class="line"><a name="l00435"></a><span class="lineno"> 435</span>&#160;<span class="preprocessor">#define PDEC_STATUS_HERR (_U_(0x1) &lt;&lt; PDEC_STATUS_HERR_Pos)</span></div>
<div class="line"><a name="l00436"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a4c0f0014051ab3781fe6400945b08ff8"> 436</a></span>&#160;<span class="preprocessor">#define PDEC_STATUS_STOP_Pos 6 </span></div>
<div class="line"><a name="l00437"></a><span class="lineno"> 437</span>&#160;<span class="preprocessor">#define PDEC_STATUS_STOP (_U_(0x1) &lt;&lt; PDEC_STATUS_STOP_Pos)</span></div>
<div class="line"><a name="l00438"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a427a0ae0a3268c7e8cb68dfa9fb41541"> 438</a></span>&#160;<span class="preprocessor">#define PDEC_STATUS_DIR_Pos 7 </span></div>
<div class="line"><a name="l00439"></a><span class="lineno"> 439</span>&#160;<span class="preprocessor">#define PDEC_STATUS_DIR (_U_(0x1) &lt;&lt; PDEC_STATUS_DIR_Pos)</span></div>
<div class="line"><a name="l00440"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a3f26b4b9c327f6215a2337cb6889878c"> 440</a></span>&#160;<span class="preprocessor">#define PDEC_STATUS_PRESCBUFV_Pos 8 </span></div>
<div class="line"><a name="l00441"></a><span class="lineno"> 441</span>&#160;<span class="preprocessor">#define PDEC_STATUS_PRESCBUFV (_U_(0x1) &lt;&lt; PDEC_STATUS_PRESCBUFV_Pos)</span></div>
<div class="line"><a name="l00442"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a089cb9bd3dc237dd3910c71dd4cf9ec0"> 442</a></span>&#160;<span class="preprocessor">#define PDEC_STATUS_FILTERBUFV_Pos 9 </span></div>
<div class="line"><a name="l00443"></a><span class="lineno"> 443</span>&#160;<span class="preprocessor">#define PDEC_STATUS_FILTERBUFV (_U_(0x1) &lt;&lt; PDEC_STATUS_FILTERBUFV_Pos)</span></div>
<div class="line"><a name="l00444"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ad62ec22eca5e0b891b3bea84ab35d226"> 444</a></span>&#160;<span class="preprocessor">#define PDEC_STATUS_CCBUFV0_Pos 12 </span></div>
<div class="line"><a name="l00445"></a><span class="lineno"> 445</span>&#160;<span class="preprocessor">#define PDEC_STATUS_CCBUFV0 (_U_(1) &lt;&lt; PDEC_STATUS_CCBUFV0_Pos)</span></div>
<div class="line"><a name="l00446"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a3a501650c2cff79e2ad1afbd48c65f9e"> 446</a></span>&#160;<span class="preprocessor">#define PDEC_STATUS_CCBUFV1_Pos 13 </span></div>
<div class="line"><a name="l00447"></a><span class="lineno"> 447</span>&#160;<span class="preprocessor">#define PDEC_STATUS_CCBUFV1 (_U_(1) &lt;&lt; PDEC_STATUS_CCBUFV1_Pos)</span></div>
<div class="line"><a name="l00448"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a895009371595b1899c6dfca3745e4cb3"> 448</a></span>&#160;<span class="preprocessor">#define PDEC_STATUS_CCBUFV_Pos 12 </span></div>
<div class="line"><a name="l00449"></a><span class="lineno"> 449</span>&#160;<span class="preprocessor">#define PDEC_STATUS_CCBUFV_Msk (_U_(0x3) &lt;&lt; PDEC_STATUS_CCBUFV_Pos)</span></div>
<div class="line"><a name="l00450"></a><span class="lineno"> 450</span>&#160;<span class="preprocessor">#define PDEC_STATUS_CCBUFV(value) (PDEC_STATUS_CCBUFV_Msk &amp; ((value) &lt;&lt; PDEC_STATUS_CCBUFV_Pos))</span></div>
<div class="line"><a name="l00451"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#aec453ca362b309f630d6700db21515f0"> 451</a></span>&#160;<span class="preprocessor">#define PDEC_STATUS_MASK _U_(0x33F7) </span></div>
<div class="line"><a name="l00453"></a><span class="lineno"> 453</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PDEC_DBGCTRL : (PDEC Offset: 0x0F) (R/W 8) Debug Control -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00454"></a><span class="lineno"> 454</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00455"></a><span class="lineno"><a class="line" href="unionPDEC__DBGCTRL__Type.html"> 455</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00456"></a><span class="lineno"> 456</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00457"></a><span class="lineno"><a class="line" href="unionPDEC__DBGCTRL__Type.html#aae93958360c321e18de2500cc161dd89"> 457</a></span>&#160; uint8_t <a class="code" href="unionPDEC__DBGCTRL__Type.html#aae93958360c321e18de2500cc161dd89">DBGRUN</a>:1; </div>
<div class="line"><a name="l00458"></a><span class="lineno"><a class="line" href="unionPDEC__DBGCTRL__Type.html#ab978303b5d20a533a2d065304887b927"> 458</a></span>&#160; uint8_t :7; </div>
<div class="line"><a name="l00459"></a><span class="lineno"><a class="line" href="unionPDEC__DBGCTRL__Type.html#af39c76754871899b496156b3219caab3"> 459</a></span>&#160; } bit; </div>
<div class="line"><a name="l00460"></a><span class="lineno"><a class="line" href="unionPDEC__DBGCTRL__Type.html#ae68bb0a79c26f800f33f610da5b7aa62"> 460</a></span>&#160; uint8_t <a class="code" href="unionPDEC__DBGCTRL__Type.html#ae68bb0a79c26f800f33f610da5b7aa62">reg</a>; </div>
<div class="line"><a name="l00461"></a><span class="lineno"> 461</span>&#160;} <a class="code" href="unionPDEC__DBGCTRL__Type.html">PDEC_DBGCTRL_Type</a>;</div>
<div class="line"><a name="l00462"></a><span class="lineno"> 462</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00463"></a><span class="lineno"> 463</span>&#160; </div>
<div class="line"><a name="l00464"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a55fc1ce010ff3551af09aab0317744da"> 464</a></span>&#160;<span class="preprocessor">#define PDEC_DBGCTRL_OFFSET 0x0F </span></div>
<div class="line"><a name="l00465"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a360fbed50d8e2b49ed0c07123f64e9b3"> 465</a></span>&#160;<span class="preprocessor">#define PDEC_DBGCTRL_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00467"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a5954ae1b5736f45cd53a4823f5e589ee"> 467</a></span>&#160;<span class="preprocessor">#define PDEC_DBGCTRL_DBGRUN_Pos 0 </span></div>
<div class="line"><a name="l00468"></a><span class="lineno"> 468</span>&#160;<span class="preprocessor">#define PDEC_DBGCTRL_DBGRUN (_U_(0x1) &lt;&lt; PDEC_DBGCTRL_DBGRUN_Pos)</span></div>
<div class="line"><a name="l00469"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a3a4a15230b7a7233db45086bfd085696"> 469</a></span>&#160;<span class="preprocessor">#define PDEC_DBGCTRL_MASK _U_(0x01) </span></div>
<div class="line"><a name="l00471"></a><span class="lineno"> 471</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PDEC_SYNCBUSY : (PDEC Offset: 0x10) (R/ 32) Synchronization Status -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00472"></a><span class="lineno"> 472</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00473"></a><span class="lineno"><a class="line" href="unionPDEC__SYNCBUSY__Type.html"> 473</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00474"></a><span class="lineno"> 474</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00475"></a><span class="lineno"><a class="line" href="unionPDEC__SYNCBUSY__Type.html#a7b9eb35dd7f7b883df7209eed4872cf8"> 475</a></span>&#160; uint32_t <a class="code" href="unionPDEC__SYNCBUSY__Type.html#a7b9eb35dd7f7b883df7209eed4872cf8">SWRST</a>:1; </div>
<div class="line"><a name="l00476"></a><span class="lineno"><a class="line" href="unionPDEC__SYNCBUSY__Type.html#a91459e10b34ae5c79cc7d68e51b31c11"> 476</a></span>&#160; uint32_t <a class="code" href="unionPDEC__SYNCBUSY__Type.html#a91459e10b34ae5c79cc7d68e51b31c11">ENABLE</a>:1; </div>
<div class="line"><a name="l00477"></a><span class="lineno"><a class="line" href="unionPDEC__SYNCBUSY__Type.html#a37ddad64abd51ef20b689007087a5094"> 477</a></span>&#160; uint32_t <a class="code" href="unionPDEC__SYNCBUSY__Type.html#a37ddad64abd51ef20b689007087a5094">CTRLB</a>:1; </div>
<div class="line"><a name="l00478"></a><span class="lineno"><a class="line" href="unionPDEC__SYNCBUSY__Type.html#a71c4fdc17157fb170c0b35381bf1ad3e"> 478</a></span>&#160; uint32_t <a class="code" href="unionPDEC__SYNCBUSY__Type.html#a71c4fdc17157fb170c0b35381bf1ad3e">STATUS</a>:1; </div>
<div class="line"><a name="l00479"></a><span class="lineno"><a class="line" href="unionPDEC__SYNCBUSY__Type.html#a322fe467fd0a83dd077ff0b8e6bbaf96"> 479</a></span>&#160; uint32_t <a class="code" href="unionPDEC__SYNCBUSY__Type.html#a322fe467fd0a83dd077ff0b8e6bbaf96">PRESC</a>:1; </div>
<div class="line"><a name="l00480"></a><span class="lineno"><a class="line" href="unionPDEC__SYNCBUSY__Type.html#a467a228fc6298bd26123ba23b7909af6"> 480</a></span>&#160; uint32_t <a class="code" href="unionPDEC__SYNCBUSY__Type.html#a467a228fc6298bd26123ba23b7909af6">FILTER</a>:1; </div>
<div class="line"><a name="l00481"></a><span class="lineno"><a class="line" href="unionPDEC__SYNCBUSY__Type.html#a634ac9c34ecd71b7029866f018f68399"> 481</a></span>&#160; uint32_t <a class="code" href="unionPDEC__SYNCBUSY__Type.html#a634ac9c34ecd71b7029866f018f68399">COUNT</a>:1; </div>
<div class="line"><a name="l00482"></a><span class="lineno"><a class="line" href="unionPDEC__SYNCBUSY__Type.html#afa852d1aa0fd69ff9ecedfeaa3e03aa7"> 482</a></span>&#160; uint32_t <a class="code" href="unionPDEC__SYNCBUSY__Type.html#afa852d1aa0fd69ff9ecedfeaa3e03aa7">CC0</a>:1; </div>
<div class="line"><a name="l00483"></a><span class="lineno"><a class="line" href="unionPDEC__SYNCBUSY__Type.html#aa76658f49e7363d5b229573ab79e7cf2"> 483</a></span>&#160; uint32_t <a class="code" href="unionPDEC__SYNCBUSY__Type.html#aa76658f49e7363d5b229573ab79e7cf2">CC1</a>:1; </div>
<div class="line"><a name="l00484"></a><span class="lineno"><a class="line" href="unionPDEC__SYNCBUSY__Type.html#a6f79e7fa062a83f6f5d5f15fa2b3e3ae"> 484</a></span>&#160; uint32_t :23; </div>
<div class="line"><a name="l00485"></a><span class="lineno"><a class="line" href="unionPDEC__SYNCBUSY__Type.html#adf549dd8745ea92fc8dac0f39287432a"> 485</a></span>&#160; } bit; </div>
<div class="line"><a name="l00486"></a><span class="lineno"> 486</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00487"></a><span class="lineno"> 487</span>&#160; uint32_t :7; </div>
<div class="line"><a name="l00488"></a><span class="lineno"><a class="line" href="unionPDEC__SYNCBUSY__Type.html#a50362d56bef2430b507cb7878856aadd"> 488</a></span>&#160; uint32_t <a class="code" href="unionPDEC__SYNCBUSY__Type.html#a50362d56bef2430b507cb7878856aadd">CC</a>:2; </div>
<div class="line"><a name="l00489"></a><span class="lineno"><a class="line" href="unionPDEC__SYNCBUSY__Type.html#aa11583b8e5a1d9b52c48ac35ab29c8d7"> 489</a></span>&#160; uint32_t :23; </div>
<div class="line"><a name="l00490"></a><span class="lineno"><a class="line" href="unionPDEC__SYNCBUSY__Type.html#a2ac7b0889e4255a016fd1914d245fa7d"> 490</a></span>&#160; } vec; </div>
<div class="line"><a name="l00491"></a><span class="lineno"><a class="line" href="unionPDEC__SYNCBUSY__Type.html#a7ea8b4ebce54d877fe7f6ea3f336d424"> 491</a></span>&#160; uint32_t <a class="code" href="unionPDEC__SYNCBUSY__Type.html#a7ea8b4ebce54d877fe7f6ea3f336d424">reg</a>; </div>
<div class="line"><a name="l00492"></a><span class="lineno"> 492</span>&#160;} <a class="code" href="unionPDEC__SYNCBUSY__Type.html">PDEC_SYNCBUSY_Type</a>;</div>
<div class="line"><a name="l00493"></a><span class="lineno"> 493</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00494"></a><span class="lineno"> 494</span>&#160; </div>
<div class="line"><a name="l00495"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#abb3e7f9ea403119dfc4ac5da1ca9033c"> 495</a></span>&#160;<span class="preprocessor">#define PDEC_SYNCBUSY_OFFSET 0x10 </span></div>
<div class="line"><a name="l00496"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#aa6d3cdabc510ecc09fd35764f4d0ef79"> 496</a></span>&#160;<span class="preprocessor">#define PDEC_SYNCBUSY_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00498"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a885065347314812aa75e4e32d45a2f28"> 498</a></span>&#160;<span class="preprocessor">#define PDEC_SYNCBUSY_SWRST_Pos 0 </span></div>
<div class="line"><a name="l00499"></a><span class="lineno"> 499</span>&#160;<span class="preprocessor">#define PDEC_SYNCBUSY_SWRST (_U_(0x1) &lt;&lt; PDEC_SYNCBUSY_SWRST_Pos)</span></div>
<div class="line"><a name="l00500"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a1b808b4298444179232312998891c5c8"> 500</a></span>&#160;<span class="preprocessor">#define PDEC_SYNCBUSY_ENABLE_Pos 1 </span></div>
<div class="line"><a name="l00501"></a><span class="lineno"> 501</span>&#160;<span class="preprocessor">#define PDEC_SYNCBUSY_ENABLE (_U_(0x1) &lt;&lt; PDEC_SYNCBUSY_ENABLE_Pos)</span></div>
<div class="line"><a name="l00502"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a993faf556d445485d0f00dcebf3ed6bb"> 502</a></span>&#160;<span class="preprocessor">#define PDEC_SYNCBUSY_CTRLB_Pos 2 </span></div>
<div class="line"><a name="l00503"></a><span class="lineno"> 503</span>&#160;<span class="preprocessor">#define PDEC_SYNCBUSY_CTRLB (_U_(0x1) &lt;&lt; PDEC_SYNCBUSY_CTRLB_Pos)</span></div>
<div class="line"><a name="l00504"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a5af8da69b079f4bcbcc473a64c5542b7"> 504</a></span>&#160;<span class="preprocessor">#define PDEC_SYNCBUSY_STATUS_Pos 3 </span></div>
<div class="line"><a name="l00505"></a><span class="lineno"> 505</span>&#160;<span class="preprocessor">#define PDEC_SYNCBUSY_STATUS (_U_(0x1) &lt;&lt; PDEC_SYNCBUSY_STATUS_Pos)</span></div>
<div class="line"><a name="l00506"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a7853b76edbdc3c13ec05497af44d2f96"> 506</a></span>&#160;<span class="preprocessor">#define PDEC_SYNCBUSY_PRESC_Pos 4 </span></div>
<div class="line"><a name="l00507"></a><span class="lineno"> 507</span>&#160;<span class="preprocessor">#define PDEC_SYNCBUSY_PRESC (_U_(0x1) &lt;&lt; PDEC_SYNCBUSY_PRESC_Pos)</span></div>
<div class="line"><a name="l00508"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a0f685928ed67efd4561847a6b2dbda05"> 508</a></span>&#160;<span class="preprocessor">#define PDEC_SYNCBUSY_FILTER_Pos 5 </span></div>
<div class="line"><a name="l00509"></a><span class="lineno"> 509</span>&#160;<span class="preprocessor">#define PDEC_SYNCBUSY_FILTER (_U_(0x1) &lt;&lt; PDEC_SYNCBUSY_FILTER_Pos)</span></div>
<div class="line"><a name="l00510"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a6a35903f2a70e0f961ca80109453710b"> 510</a></span>&#160;<span class="preprocessor">#define PDEC_SYNCBUSY_COUNT_Pos 6 </span></div>
<div class="line"><a name="l00511"></a><span class="lineno"> 511</span>&#160;<span class="preprocessor">#define PDEC_SYNCBUSY_COUNT (_U_(0x1) &lt;&lt; PDEC_SYNCBUSY_COUNT_Pos)</span></div>
<div class="line"><a name="l00512"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a9cd755e96f1de29f9dd5dfab3b8505fb"> 512</a></span>&#160;<span class="preprocessor">#define PDEC_SYNCBUSY_CC0_Pos 7 </span></div>
<div class="line"><a name="l00513"></a><span class="lineno"> 513</span>&#160;<span class="preprocessor">#define PDEC_SYNCBUSY_CC0 (_U_(1) &lt;&lt; PDEC_SYNCBUSY_CC0_Pos)</span></div>
<div class="line"><a name="l00514"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a61ded50a80d621bfc67d02d71daf4081"> 514</a></span>&#160;<span class="preprocessor">#define PDEC_SYNCBUSY_CC1_Pos 8 </span></div>
<div class="line"><a name="l00515"></a><span class="lineno"> 515</span>&#160;<span class="preprocessor">#define PDEC_SYNCBUSY_CC1 (_U_(1) &lt;&lt; PDEC_SYNCBUSY_CC1_Pos)</span></div>
<div class="line"><a name="l00516"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a8ecdf71646571925a51924c5a2fd7042"> 516</a></span>&#160;<span class="preprocessor">#define PDEC_SYNCBUSY_CC_Pos 7 </span></div>
<div class="line"><a name="l00517"></a><span class="lineno"> 517</span>&#160;<span class="preprocessor">#define PDEC_SYNCBUSY_CC_Msk (_U_(0x3) &lt;&lt; PDEC_SYNCBUSY_CC_Pos)</span></div>
<div class="line"><a name="l00518"></a><span class="lineno"> 518</span>&#160;<span class="preprocessor">#define PDEC_SYNCBUSY_CC(value) (PDEC_SYNCBUSY_CC_Msk &amp; ((value) &lt;&lt; PDEC_SYNCBUSY_CC_Pos))</span></div>
<div class="line"><a name="l00519"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a683f630b6111215d47f6c08fd4459ff3"> 519</a></span>&#160;<span class="preprocessor">#define PDEC_SYNCBUSY_MASK _U_(0x000001FF) </span></div>
<div class="line"><a name="l00521"></a><span class="lineno"> 521</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PDEC_PRESC : (PDEC Offset: 0x14) (R/W 8) Prescaler Value -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00522"></a><span class="lineno"> 522</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00523"></a><span class="lineno"><a class="line" href="unionPDEC__PRESC__Type.html"> 523</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00524"></a><span class="lineno"> 524</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00525"></a><span class="lineno"><a class="line" href="unionPDEC__PRESC__Type.html#a8d0eb4ba48d757ce8bed2d03ac74aef9"> 525</a></span>&#160; uint8_t <a class="code" href="unionPDEC__PRESC__Type.html#a8d0eb4ba48d757ce8bed2d03ac74aef9">PRESC</a>:4; </div>
<div class="line"><a name="l00526"></a><span class="lineno"><a class="line" href="unionPDEC__PRESC__Type.html#a03854d169c85367ab94881a724cdbe53"> 526</a></span>&#160; uint8_t :4; </div>
<div class="line"><a name="l00527"></a><span class="lineno"><a class="line" href="unionPDEC__PRESC__Type.html#a81eb3a8eeb60e54fd7fcbc94beb84783"> 527</a></span>&#160; } bit; </div>
<div class="line"><a name="l00528"></a><span class="lineno"><a class="line" href="unionPDEC__PRESC__Type.html#a10e7f57f6082c73615820fd9e7fe0cc1"> 528</a></span>&#160; uint8_t <a class="code" href="unionPDEC__PRESC__Type.html#a10e7f57f6082c73615820fd9e7fe0cc1">reg</a>; </div>
<div class="line"><a name="l00529"></a><span class="lineno"> 529</span>&#160;} <a class="code" href="unionPDEC__PRESC__Type.html">PDEC_PRESC_Type</a>;</div>
<div class="line"><a name="l00530"></a><span class="lineno"> 530</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00531"></a><span class="lineno"> 531</span>&#160; </div>
<div class="line"><a name="l00532"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a864bee113dc3074635d21dadcbc9bd0d"> 532</a></span>&#160;<span class="preprocessor">#define PDEC_PRESC_OFFSET 0x14 </span></div>
<div class="line"><a name="l00533"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a16e1b180ac2d2c91773fcf199f2f4ad5"> 533</a></span>&#160;<span class="preprocessor">#define PDEC_PRESC_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00535"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ab7275f8b2e9278de7e890f91cb159cea"> 535</a></span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC_Pos 0 </span></div>
<div class="line"><a name="l00536"></a><span class="lineno"> 536</span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC_Msk (_U_(0xF) &lt;&lt; PDEC_PRESC_PRESC_Pos)</span></div>
<div class="line"><a name="l00537"></a><span class="lineno"> 537</span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC(value) (PDEC_PRESC_PRESC_Msk &amp; ((value) &lt;&lt; PDEC_PRESC_PRESC_Pos))</span></div>
<div class="line"><a name="l00538"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a1b9ed6fcdefa5ebf3495597ef3c3af4a"> 538</a></span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC_DIV1_Val _U_(0x0) </span></div>
<div class="line"><a name="l00539"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a14a43c5de56c3e94074f532c337427ec"> 539</a></span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC_DIV2_Val _U_(0x1) </span></div>
<div class="line"><a name="l00540"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ad6890179021e81cb58c254e79a9ea2a0"> 540</a></span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC_DIV4_Val _U_(0x2) </span></div>
<div class="line"><a name="l00541"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#aca412171044f687bbb0da3b5c15b0c1a"> 541</a></span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC_DIV8_Val _U_(0x3) </span></div>
<div class="line"><a name="l00542"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a26eeb135806fa1b2ebdc4675c9354130"> 542</a></span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC_DIV16_Val _U_(0x4) </span></div>
<div class="line"><a name="l00543"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#af62d41129fd8bb87cbc1ea340f1b967c"> 543</a></span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC_DIV32_Val _U_(0x5) </span></div>
<div class="line"><a name="l00544"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a09f2e7ec8474fb3b5fb49e4003508e11"> 544</a></span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC_DIV64_Val _U_(0x6) </span></div>
<div class="line"><a name="l00545"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ae5df63996fc88d9e0bc1f15bbcaab891"> 545</a></span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC_DIV128_Val _U_(0x7) </span></div>
<div class="line"><a name="l00546"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a8a1eb3bf5ea66b8464f27c8421bbacef"> 546</a></span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC_DIV256_Val _U_(0x8) </span></div>
<div class="line"><a name="l00547"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ab583f134c4086b5f98da9b13c858dc9d"> 547</a></span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC_DIV512_Val _U_(0x9) </span></div>
<div class="line"><a name="l00548"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a9095c80ab0e090702ca3e88707071dea"> 548</a></span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC_DIV1024_Val _U_(0xA) </span></div>
<div class="line"><a name="l00549"></a><span class="lineno"> 549</span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC_DIV1 (PDEC_PRESC_PRESC_DIV1_Val &lt;&lt; PDEC_PRESC_PRESC_Pos)</span></div>
<div class="line"><a name="l00550"></a><span class="lineno"> 550</span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC_DIV2 (PDEC_PRESC_PRESC_DIV2_Val &lt;&lt; PDEC_PRESC_PRESC_Pos)</span></div>
<div class="line"><a name="l00551"></a><span class="lineno"> 551</span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC_DIV4 (PDEC_PRESC_PRESC_DIV4_Val &lt;&lt; PDEC_PRESC_PRESC_Pos)</span></div>
<div class="line"><a name="l00552"></a><span class="lineno"> 552</span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC_DIV8 (PDEC_PRESC_PRESC_DIV8_Val &lt;&lt; PDEC_PRESC_PRESC_Pos)</span></div>
<div class="line"><a name="l00553"></a><span class="lineno"> 553</span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC_DIV16 (PDEC_PRESC_PRESC_DIV16_Val &lt;&lt; PDEC_PRESC_PRESC_Pos)</span></div>
<div class="line"><a name="l00554"></a><span class="lineno"> 554</span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC_DIV32 (PDEC_PRESC_PRESC_DIV32_Val &lt;&lt; PDEC_PRESC_PRESC_Pos)</span></div>
<div class="line"><a name="l00555"></a><span class="lineno"> 555</span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC_DIV64 (PDEC_PRESC_PRESC_DIV64_Val &lt;&lt; PDEC_PRESC_PRESC_Pos)</span></div>
<div class="line"><a name="l00556"></a><span class="lineno"> 556</span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC_DIV128 (PDEC_PRESC_PRESC_DIV128_Val &lt;&lt; PDEC_PRESC_PRESC_Pos)</span></div>
<div class="line"><a name="l00557"></a><span class="lineno"> 557</span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC_DIV256 (PDEC_PRESC_PRESC_DIV256_Val &lt;&lt; PDEC_PRESC_PRESC_Pos)</span></div>
<div class="line"><a name="l00558"></a><span class="lineno"> 558</span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC_DIV512 (PDEC_PRESC_PRESC_DIV512_Val &lt;&lt; PDEC_PRESC_PRESC_Pos)</span></div>
<div class="line"><a name="l00559"></a><span class="lineno"> 559</span>&#160;<span class="preprocessor">#define PDEC_PRESC_PRESC_DIV1024 (PDEC_PRESC_PRESC_DIV1024_Val &lt;&lt; PDEC_PRESC_PRESC_Pos)</span></div>
<div class="line"><a name="l00560"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a96531eb4c383beed57f82745a7a435eb"> 560</a></span>&#160;<span class="preprocessor">#define PDEC_PRESC_MASK _U_(0x0F) </span></div>
<div class="line"><a name="l00562"></a><span class="lineno"> 562</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PDEC_FILTER : (PDEC Offset: 0x15) (R/W 8) Filter Value -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00563"></a><span class="lineno"> 563</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00564"></a><span class="lineno"><a class="line" href="unionPDEC__FILTER__Type.html"> 564</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00565"></a><span class="lineno"> 565</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00566"></a><span class="lineno"><a class="line" href="unionPDEC__FILTER__Type.html#a6c33edf5901d807efdb6454dc136f7ab"> 566</a></span>&#160; uint8_t <a class="code" href="unionPDEC__FILTER__Type.html#a6c33edf5901d807efdb6454dc136f7ab">FILTER</a>:8; </div>
<div class="line"><a name="l00567"></a><span class="lineno"><a class="line" href="unionPDEC__FILTER__Type.html#aeda6a34f019fc97901365ee739d62297"> 567</a></span>&#160; } bit; </div>
<div class="line"><a name="l00568"></a><span class="lineno"><a class="line" href="unionPDEC__FILTER__Type.html#a25e5cf1dbabdf0e0c679fe58d34e4f0c"> 568</a></span>&#160; uint8_t <a class="code" href="unionPDEC__FILTER__Type.html#a25e5cf1dbabdf0e0c679fe58d34e4f0c">reg</a>; </div>
<div class="line"><a name="l00569"></a><span class="lineno"> 569</span>&#160;} <a class="code" href="unionPDEC__FILTER__Type.html">PDEC_FILTER_Type</a>;</div>
<div class="line"><a name="l00570"></a><span class="lineno"> 570</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00571"></a><span class="lineno"> 571</span>&#160; </div>
<div class="line"><a name="l00572"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a7b8e589bba3b4e446c005e5cad01839e"> 572</a></span>&#160;<span class="preprocessor">#define PDEC_FILTER_OFFSET 0x15 </span></div>
<div class="line"><a name="l00573"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a89c40b3787413b17424c2cd731d7bdf5"> 573</a></span>&#160;<span class="preprocessor">#define PDEC_FILTER_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00575"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a84fc33e10f2b89dc9fd0a8ba7760cf53"> 575</a></span>&#160;<span class="preprocessor">#define PDEC_FILTER_FILTER_Pos 0 </span></div>
<div class="line"><a name="l00576"></a><span class="lineno"> 576</span>&#160;<span class="preprocessor">#define PDEC_FILTER_FILTER_Msk (_U_(0xFF) &lt;&lt; PDEC_FILTER_FILTER_Pos)</span></div>
<div class="line"><a name="l00577"></a><span class="lineno"> 577</span>&#160;<span class="preprocessor">#define PDEC_FILTER_FILTER(value) (PDEC_FILTER_FILTER_Msk &amp; ((value) &lt;&lt; PDEC_FILTER_FILTER_Pos))</span></div>
<div class="line"><a name="l00578"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a0933631a52e731c75248187b175eaa71"> 578</a></span>&#160;<span class="preprocessor">#define PDEC_FILTER_MASK _U_(0xFF) </span></div>
<div class="line"><a name="l00580"></a><span class="lineno"> 580</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PDEC_PRESCBUF : (PDEC Offset: 0x18) (R/W 8) Prescaler Buffer Value -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00581"></a><span class="lineno"> 581</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00582"></a><span class="lineno"><a class="line" href="unionPDEC__PRESCBUF__Type.html"> 582</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00583"></a><span class="lineno"> 583</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00584"></a><span class="lineno"><a class="line" href="unionPDEC__PRESCBUF__Type.html#ac3ce6c24bcf84de6306bb7aa5ec14f33"> 584</a></span>&#160; uint8_t <a class="code" href="unionPDEC__PRESCBUF__Type.html#ac3ce6c24bcf84de6306bb7aa5ec14f33">PRESCBUF</a>:4; </div>
<div class="line"><a name="l00585"></a><span class="lineno"><a class="line" href="unionPDEC__PRESCBUF__Type.html#a740f5f768168fd4da50325b43e7e4f95"> 585</a></span>&#160; uint8_t :4; </div>
<div class="line"><a name="l00586"></a><span class="lineno"><a class="line" href="unionPDEC__PRESCBUF__Type.html#aa2349d5ee10d290620a7cc3dbc064366"> 586</a></span>&#160; } bit; </div>
<div class="line"><a name="l00587"></a><span class="lineno"><a class="line" href="unionPDEC__PRESCBUF__Type.html#ab20577b4c7aae048809d53613ebc93ad"> 587</a></span>&#160; uint8_t <a class="code" href="unionPDEC__PRESCBUF__Type.html#ab20577b4c7aae048809d53613ebc93ad">reg</a>; </div>
<div class="line"><a name="l00588"></a><span class="lineno"> 588</span>&#160;} <a class="code" href="unionPDEC__PRESCBUF__Type.html">PDEC_PRESCBUF_Type</a>;</div>
<div class="line"><a name="l00589"></a><span class="lineno"> 589</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00590"></a><span class="lineno"> 590</span>&#160; </div>
<div class="line"><a name="l00591"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a03c5660db83a8f78ae420a86e51a647f"> 591</a></span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_OFFSET 0x18 </span></div>
<div class="line"><a name="l00592"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a234e1f9da28a1f55d087cc1ca606b1cf"> 592</a></span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00594"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ad932adac3ebb023747c413b256532e92"> 594</a></span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF_Pos 0 </span></div>
<div class="line"><a name="l00595"></a><span class="lineno"> 595</span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF_Msk (_U_(0xF) &lt;&lt; PDEC_PRESCBUF_PRESCBUF_Pos)</span></div>
<div class="line"><a name="l00596"></a><span class="lineno"> 596</span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF(value) (PDEC_PRESCBUF_PRESCBUF_Msk &amp; ((value) &lt;&lt; PDEC_PRESCBUF_PRESCBUF_Pos))</span></div>
<div class="line"><a name="l00597"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a2b40ca3a5e35d54edd13cd559edb245f"> 597</a></span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF_DIV1_Val _U_(0x0) </span></div>
<div class="line"><a name="l00598"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a4146165144bc8d3ff4b3f74ada50ef23"> 598</a></span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF_DIV2_Val _U_(0x1) </span></div>
<div class="line"><a name="l00599"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ab55e39b3fd0de651af21a08a759c4f8f"> 599</a></span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF_DIV4_Val _U_(0x2) </span></div>
<div class="line"><a name="l00600"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a37b8a4c52bea5b0cabd57c0a9e6220aa"> 600</a></span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF_DIV8_Val _U_(0x3) </span></div>
<div class="line"><a name="l00601"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a3d7c602114cd94a06da5049466406dd3"> 601</a></span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF_DIV16_Val _U_(0x4) </span></div>
<div class="line"><a name="l00602"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a67d35e6f662202772d90d79c3d75338f"> 602</a></span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF_DIV32_Val _U_(0x5) </span></div>
<div class="line"><a name="l00603"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ab7915c18a4502999051120a0381b3fa2"> 603</a></span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF_DIV64_Val _U_(0x6) </span></div>
<div class="line"><a name="l00604"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ad4b64e50814da07ffdcf41b0e0c26c77"> 604</a></span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF_DIV128_Val _U_(0x7) </span></div>
<div class="line"><a name="l00605"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a7dfae9ba24abb2c58bc0be0ee95ee7c8"> 605</a></span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF_DIV256_Val _U_(0x8) </span></div>
<div class="line"><a name="l00606"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a928ac65e39c52cb4978259371761f29f"> 606</a></span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF_DIV512_Val _U_(0x9) </span></div>
<div class="line"><a name="l00607"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a75d993b292ad38010f5172d62827fde7"> 607</a></span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF_DIV1024_Val _U_(0xA) </span></div>
<div class="line"><a name="l00608"></a><span class="lineno"> 608</span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF_DIV1 (PDEC_PRESCBUF_PRESCBUF_DIV1_Val &lt;&lt; PDEC_PRESCBUF_PRESCBUF_Pos)</span></div>
<div class="line"><a name="l00609"></a><span class="lineno"> 609</span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF_DIV2 (PDEC_PRESCBUF_PRESCBUF_DIV2_Val &lt;&lt; PDEC_PRESCBUF_PRESCBUF_Pos)</span></div>
<div class="line"><a name="l00610"></a><span class="lineno"> 610</span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF_DIV4 (PDEC_PRESCBUF_PRESCBUF_DIV4_Val &lt;&lt; PDEC_PRESCBUF_PRESCBUF_Pos)</span></div>
<div class="line"><a name="l00611"></a><span class="lineno"> 611</span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF_DIV8 (PDEC_PRESCBUF_PRESCBUF_DIV8_Val &lt;&lt; PDEC_PRESCBUF_PRESCBUF_Pos)</span></div>
<div class="line"><a name="l00612"></a><span class="lineno"> 612</span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF_DIV16 (PDEC_PRESCBUF_PRESCBUF_DIV16_Val &lt;&lt; PDEC_PRESCBUF_PRESCBUF_Pos)</span></div>
<div class="line"><a name="l00613"></a><span class="lineno"> 613</span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF_DIV32 (PDEC_PRESCBUF_PRESCBUF_DIV32_Val &lt;&lt; PDEC_PRESCBUF_PRESCBUF_Pos)</span></div>
<div class="line"><a name="l00614"></a><span class="lineno"> 614</span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF_DIV64 (PDEC_PRESCBUF_PRESCBUF_DIV64_Val &lt;&lt; PDEC_PRESCBUF_PRESCBUF_Pos)</span></div>
<div class="line"><a name="l00615"></a><span class="lineno"> 615</span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF_DIV128 (PDEC_PRESCBUF_PRESCBUF_DIV128_Val &lt;&lt; PDEC_PRESCBUF_PRESCBUF_Pos)</span></div>
<div class="line"><a name="l00616"></a><span class="lineno"> 616</span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF_DIV256 (PDEC_PRESCBUF_PRESCBUF_DIV256_Val &lt;&lt; PDEC_PRESCBUF_PRESCBUF_Pos)</span></div>
<div class="line"><a name="l00617"></a><span class="lineno"> 617</span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF_DIV512 (PDEC_PRESCBUF_PRESCBUF_DIV512_Val &lt;&lt; PDEC_PRESCBUF_PRESCBUF_Pos)</span></div>
<div class="line"><a name="l00618"></a><span class="lineno"> 618</span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_PRESCBUF_DIV1024 (PDEC_PRESCBUF_PRESCBUF_DIV1024_Val &lt;&lt; PDEC_PRESCBUF_PRESCBUF_Pos)</span></div>
<div class="line"><a name="l00619"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a92dd18948f71487394069dcfcc154ef8"> 619</a></span>&#160;<span class="preprocessor">#define PDEC_PRESCBUF_MASK _U_(0x0F) </span></div>
<div class="line"><a name="l00621"></a><span class="lineno"> 621</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PDEC_FILTERBUF : (PDEC Offset: 0x19) (R/W 8) Filter Buffer Value -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00622"></a><span class="lineno"> 622</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00623"></a><span class="lineno"><a class="line" href="unionPDEC__FILTERBUF__Type.html"> 623</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00624"></a><span class="lineno"> 624</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00625"></a><span class="lineno"><a class="line" href="unionPDEC__FILTERBUF__Type.html#a4752a2c1fb0133c1fe0347ff7dcffbfc"> 625</a></span>&#160; uint8_t <a class="code" href="unionPDEC__FILTERBUF__Type.html#a4752a2c1fb0133c1fe0347ff7dcffbfc">FILTERBUF</a>:8; </div>
<div class="line"><a name="l00626"></a><span class="lineno"><a class="line" href="unionPDEC__FILTERBUF__Type.html#ac44ca833fe1eda87849df58f8798de35"> 626</a></span>&#160; } bit; </div>
<div class="line"><a name="l00627"></a><span class="lineno"><a class="line" href="unionPDEC__FILTERBUF__Type.html#ae49d3c554a3e09de2352436e10ac14b6"> 627</a></span>&#160; uint8_t <a class="code" href="unionPDEC__FILTERBUF__Type.html#ae49d3c554a3e09de2352436e10ac14b6">reg</a>; </div>
<div class="line"><a name="l00628"></a><span class="lineno"> 628</span>&#160;} <a class="code" href="unionPDEC__FILTERBUF__Type.html">PDEC_FILTERBUF_Type</a>;</div>
<div class="line"><a name="l00629"></a><span class="lineno"> 629</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00630"></a><span class="lineno"> 630</span>&#160; </div>
<div class="line"><a name="l00631"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a61d0735e9351e9c1e37ccaff590dd5bb"> 631</a></span>&#160;<span class="preprocessor">#define PDEC_FILTERBUF_OFFSET 0x19 </span></div>
<div class="line"><a name="l00632"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a5100f8081f8b7600ff3f846ec568e2fa"> 632</a></span>&#160;<span class="preprocessor">#define PDEC_FILTERBUF_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00634"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a62de25081131544e1042f23addeab764"> 634</a></span>&#160;<span class="preprocessor">#define PDEC_FILTERBUF_FILTERBUF_Pos 0 </span></div>
<div class="line"><a name="l00635"></a><span class="lineno"> 635</span>&#160;<span class="preprocessor">#define PDEC_FILTERBUF_FILTERBUF_Msk (_U_(0xFF) &lt;&lt; PDEC_FILTERBUF_FILTERBUF_Pos)</span></div>
<div class="line"><a name="l00636"></a><span class="lineno"> 636</span>&#160;<span class="preprocessor">#define PDEC_FILTERBUF_FILTERBUF(value) (PDEC_FILTERBUF_FILTERBUF_Msk &amp; ((value) &lt;&lt; PDEC_FILTERBUF_FILTERBUF_Pos))</span></div>
<div class="line"><a name="l00637"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ad0357a6f932b2923a4748e6f5efe3244"> 637</a></span>&#160;<span class="preprocessor">#define PDEC_FILTERBUF_MASK _U_(0xFF) </span></div>
<div class="line"><a name="l00639"></a><span class="lineno"> 639</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PDEC_COUNT : (PDEC Offset: 0x1C) (R/W 32) Counter Value -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00640"></a><span class="lineno"> 640</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00641"></a><span class="lineno"><a class="line" href="unionPDEC__COUNT__Type.html"> 641</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00642"></a><span class="lineno"> 642</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00643"></a><span class="lineno"><a class="line" href="unionPDEC__COUNT__Type.html#ae4192cbeb6a700b067b5ce016fb2a509"> 643</a></span>&#160; uint32_t <a class="code" href="unionPDEC__COUNT__Type.html#ae4192cbeb6a700b067b5ce016fb2a509">COUNT</a>:16; </div>
<div class="line"><a name="l00644"></a><span class="lineno"><a class="line" href="unionPDEC__COUNT__Type.html#af768e563f39dd8d2a6d5047e9aae57a7"> 644</a></span>&#160; uint32_t :16; </div>
<div class="line"><a name="l00645"></a><span class="lineno"><a class="line" href="unionPDEC__COUNT__Type.html#adfa9febe93bf7e05992a61a58cfe2cc8"> 645</a></span>&#160; } bit; </div>
<div class="line"><a name="l00646"></a><span class="lineno"><a class="line" href="unionPDEC__COUNT__Type.html#a67cf4afb1f319adc3da00a2a45c8f943"> 646</a></span>&#160; uint32_t <a class="code" href="unionPDEC__COUNT__Type.html#a67cf4afb1f319adc3da00a2a45c8f943">reg</a>; </div>
<div class="line"><a name="l00647"></a><span class="lineno"> 647</span>&#160;} <a class="code" href="unionPDEC__COUNT__Type.html">PDEC_COUNT_Type</a>;</div>
<div class="line"><a name="l00648"></a><span class="lineno"> 648</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00649"></a><span class="lineno"> 649</span>&#160; </div>
<div class="line"><a name="l00650"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a2a133c174dc53bf7f64d56a397e03bc8"> 650</a></span>&#160;<span class="preprocessor">#define PDEC_COUNT_OFFSET 0x1C </span></div>
<div class="line"><a name="l00651"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#af6aa68a4bbb75fa846b96a57d7b8d238"> 651</a></span>&#160;<span class="preprocessor">#define PDEC_COUNT_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00653"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#aa973961eb10f65d9804479c0302db04c"> 653</a></span>&#160;<span class="preprocessor">#define PDEC_COUNT_COUNT_Pos 0 </span></div>
<div class="line"><a name="l00654"></a><span class="lineno"> 654</span>&#160;<span class="preprocessor">#define PDEC_COUNT_COUNT_Msk (_U_(0xFFFF) &lt;&lt; PDEC_COUNT_COUNT_Pos)</span></div>
<div class="line"><a name="l00655"></a><span class="lineno"> 655</span>&#160;<span class="preprocessor">#define PDEC_COUNT_COUNT(value) (PDEC_COUNT_COUNT_Msk &amp; ((value) &lt;&lt; PDEC_COUNT_COUNT_Pos))</span></div>
<div class="line"><a name="l00656"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a7c103ea7b8fb2d03d3e5e2d2cc110596"> 656</a></span>&#160;<span class="preprocessor">#define PDEC_COUNT_MASK _U_(0x0000FFFF) </span></div>
<div class="line"><a name="l00658"></a><span class="lineno"> 658</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PDEC_CC : (PDEC Offset: 0x20) (R/W 32) Channel n Compare Value -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00659"></a><span class="lineno"> 659</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00660"></a><span class="lineno"><a class="line" href="unionPDEC__CC__Type.html"> 660</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00661"></a><span class="lineno"> 661</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00662"></a><span class="lineno"><a class="line" href="unionPDEC__CC__Type.html#a3ccdde3ae2af0fe27b3b5165dbdac1ab"> 662</a></span>&#160; uint32_t <a class="code" href="unionPDEC__CC__Type.html#a3ccdde3ae2af0fe27b3b5165dbdac1ab">CC</a>:16; </div>
<div class="line"><a name="l00663"></a><span class="lineno"><a class="line" href="unionPDEC__CC__Type.html#a603f1e4862e5f0f4b9d7c58eaf257346"> 663</a></span>&#160; uint32_t :16; </div>
<div class="line"><a name="l00664"></a><span class="lineno"><a class="line" href="unionPDEC__CC__Type.html#a7e6a252bece443d9b3bd6060bf21ea92"> 664</a></span>&#160; } bit; </div>
<div class="line"><a name="l00665"></a><span class="lineno"><a class="line" href="unionPDEC__CC__Type.html#ab9cd74821067cb731f3d229d3d884778"> 665</a></span>&#160; uint32_t <a class="code" href="unionPDEC__CC__Type.html#ab9cd74821067cb731f3d229d3d884778">reg</a>; </div>
<div class="line"><a name="l00666"></a><span class="lineno"> 666</span>&#160;} <a class="code" href="unionPDEC__CC__Type.html">PDEC_CC_Type</a>;</div>
<div class="line"><a name="l00667"></a><span class="lineno"> 667</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00668"></a><span class="lineno"> 668</span>&#160; </div>
<div class="line"><a name="l00669"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a324ef11cba39b62fb00aba2ffd7bf853"> 669</a></span>&#160;<span class="preprocessor">#define PDEC_CC_OFFSET 0x20 </span></div>
<div class="line"><a name="l00670"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a891ab1a7914a8662b1274e7b4d4a9c1d"> 670</a></span>&#160;<span class="preprocessor">#define PDEC_CC_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00672"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a8a6cb6fb80edf9389024ea7b5f5b5981"> 672</a></span>&#160;<span class="preprocessor">#define PDEC_CC_CC_Pos 0 </span></div>
<div class="line"><a name="l00673"></a><span class="lineno"> 673</span>&#160;<span class="preprocessor">#define PDEC_CC_CC_Msk (_U_(0xFFFF) &lt;&lt; PDEC_CC_CC_Pos)</span></div>
<div class="line"><a name="l00674"></a><span class="lineno"> 674</span>&#160;<span class="preprocessor">#define PDEC_CC_CC(value) (PDEC_CC_CC_Msk &amp; ((value) &lt;&lt; PDEC_CC_CC_Pos))</span></div>
<div class="line"><a name="l00675"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ab005132b5ad2bc99e627dd3b309c7cf0"> 675</a></span>&#160;<span class="preprocessor">#define PDEC_CC_MASK _U_(0x0000FFFF) </span></div>
<div class="line"><a name="l00677"></a><span class="lineno"> 677</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PDEC_CCBUF : (PDEC Offset: 0x30) (R/W 32) Channel Compare Buffer Value -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00678"></a><span class="lineno"> 678</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00679"></a><span class="lineno"><a class="line" href="unionPDEC__CCBUF__Type.html"> 679</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00680"></a><span class="lineno"> 680</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00681"></a><span class="lineno"><a class="line" href="unionPDEC__CCBUF__Type.html#a001e22d10d600275898baa3635204838"> 681</a></span>&#160; uint32_t <a class="code" href="unionPDEC__CCBUF__Type.html#a001e22d10d600275898baa3635204838">CCBUF</a>:16; </div>
<div class="line"><a name="l00682"></a><span class="lineno"><a class="line" href="unionPDEC__CCBUF__Type.html#ae7919754b2c042c480ee4c190e0696b6"> 682</a></span>&#160; uint32_t :16; </div>
<div class="line"><a name="l00683"></a><span class="lineno"><a class="line" href="unionPDEC__CCBUF__Type.html#aa8bd7d9348826e580d19a776edb8cd40"> 683</a></span>&#160; } bit; </div>
<div class="line"><a name="l00684"></a><span class="lineno"><a class="line" href="unionPDEC__CCBUF__Type.html#a685c62371b2654de9b9f6b4ab27cdb2a"> 684</a></span>&#160; uint32_t <a class="code" href="unionPDEC__CCBUF__Type.html#a685c62371b2654de9b9f6b4ab27cdb2a">reg</a>; </div>
<div class="line"><a name="l00685"></a><span class="lineno"> 685</span>&#160;} <a class="code" href="unionPDEC__CCBUF__Type.html">PDEC_CCBUF_Type</a>;</div>
<div class="line"><a name="l00686"></a><span class="lineno"> 686</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00687"></a><span class="lineno"> 687</span>&#160; </div>
<div class="line"><a name="l00688"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ad09616578e156328eebedb259896b606"> 688</a></span>&#160;<span class="preprocessor">#define PDEC_CCBUF_OFFSET 0x30 </span></div>
<div class="line"><a name="l00689"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a30b054194849c00fcad11055b2a923dd"> 689</a></span>&#160;<span class="preprocessor">#define PDEC_CCBUF_RESETVALUE _U_(0x00000000) </span></div>
<div class="line"><a name="l00691"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#ade50103c6343319f1675d26167640781"> 691</a></span>&#160;<span class="preprocessor">#define PDEC_CCBUF_CCBUF_Pos 0 </span></div>
<div class="line"><a name="l00692"></a><span class="lineno"> 692</span>&#160;<span class="preprocessor">#define PDEC_CCBUF_CCBUF_Msk (_U_(0xFFFF) &lt;&lt; PDEC_CCBUF_CCBUF_Pos)</span></div>
<div class="line"><a name="l00693"></a><span class="lineno"> 693</span>&#160;<span class="preprocessor">#define PDEC_CCBUF_CCBUF(value) (PDEC_CCBUF_CCBUF_Msk &amp; ((value) &lt;&lt; PDEC_CCBUF_CCBUF_Pos))</span></div>
<div class="line"><a name="l00694"></a><span class="lineno"><a class="line" href="component_2pdec_8h.html#a6a582f5f76444e464075090827fba249"> 694</a></span>&#160;<span class="preprocessor">#define PDEC_CCBUF_MASK _U_(0x0000FFFF) </span></div>
<div class="line"><a name="l00697"></a><span class="lineno"> 697</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00698"></a><span class="lineno"><a class="line" href="structPdec.html"> 698</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00699"></a><span class="lineno"><a class="line" href="structPdec.html#abbd37a7f83fe231552ea40b7a98b695e"> 699</a></span>&#160; __IO <a class="code" href="unionPDEC__CTRLA__Type.html">PDEC_CTRLA_Type</a> <a class="code" href="structPdec.html#abbd37a7f83fe231552ea40b7a98b695e">CTRLA</a>; </div>
<div class="line"><a name="l00700"></a><span class="lineno"><a class="line" href="structPdec.html#af7558c80275bb620e95eedc468e2937a"> 700</a></span>&#160; __IO <a class="code" href="unionPDEC__CTRLBCLR__Type.html">PDEC_CTRLBCLR_Type</a> <a class="code" href="structPdec.html#af7558c80275bb620e95eedc468e2937a">CTRLBCLR</a>; </div>
<div class="line"><a name="l00701"></a><span class="lineno"><a class="line" href="structPdec.html#a79e2931566772274ab603cbfbe194a64"> 701</a></span>&#160; __IO <a class="code" href="unionPDEC__CTRLBSET__Type.html">PDEC_CTRLBSET_Type</a> <a class="code" href="structPdec.html#a79e2931566772274ab603cbfbe194a64">CTRLBSET</a>; </div>
<div class="line"><a name="l00702"></a><span class="lineno"><a class="line" href="structPdec.html#a9a2d3727b9007cee9d73855cf3f97b61"> 702</a></span>&#160; __IO <a class="code" href="unionPDEC__EVCTRL__Type.html">PDEC_EVCTRL_Type</a> <a class="code" href="structPdec.html#a9a2d3727b9007cee9d73855cf3f97b61">EVCTRL</a>; </div>
<div class="line"><a name="l00703"></a><span class="lineno"><a class="line" href="structPdec.html#a3b944bd14fd26d2b3af5f69b35cbdf37"> 703</a></span>&#160; __IO <a class="code" href="unionPDEC__INTENCLR__Type.html">PDEC_INTENCLR_Type</a> <a class="code" href="structPdec.html#a3b944bd14fd26d2b3af5f69b35cbdf37">INTENCLR</a>; </div>
<div class="line"><a name="l00704"></a><span class="lineno"><a class="line" href="structPdec.html#a9052561a41d34991ed1407878a52d58a"> 704</a></span>&#160; __IO <a class="code" href="unionPDEC__INTENSET__Type.html">PDEC_INTENSET_Type</a> <a class="code" href="structPdec.html#a9052561a41d34991ed1407878a52d58a">INTENSET</a>; </div>
<div class="line"><a name="l00705"></a><span class="lineno"><a class="line" href="structPdec.html#a9b601eebe5b5bab912a13adef7e36ffb"> 705</a></span>&#160; __IO <a class="code" href="unionPDEC__INTFLAG__Type.html">PDEC_INTFLAG_Type</a> <a class="code" href="structPdec.html#a9b601eebe5b5bab912a13adef7e36ffb">INTFLAG</a>; </div>
<div class="line"><a name="l00706"></a><span class="lineno"> 706</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved1[0x1];</div>
<div class="line"><a name="l00707"></a><span class="lineno"><a class="line" href="structPdec.html#ae4402c2c9ae1c89b44fe17f02e6a471f"> 707</a></span>&#160; __IO <a class="code" href="unionPDEC__STATUS__Type.html">PDEC_STATUS_Type</a> <a class="code" href="structPdec.html#ae4402c2c9ae1c89b44fe17f02e6a471f">STATUS</a>; </div>
<div class="line"><a name="l00708"></a><span class="lineno"> 708</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved2[0x1];</div>
<div class="line"><a name="l00709"></a><span class="lineno"><a class="line" href="structPdec.html#abdf566cec48944515787f62d8d059e47"> 709</a></span>&#160; __IO <a class="code" href="unionPDEC__DBGCTRL__Type.html">PDEC_DBGCTRL_Type</a> <a class="code" href="structPdec.html#abdf566cec48944515787f62d8d059e47">DBGCTRL</a>; </div>
<div class="line"><a name="l00710"></a><span class="lineno"><a class="line" href="structPdec.html#a15e9b6f761497f96a5d4f758de294e47"> 710</a></span>&#160; __I <a class="code" href="unionPDEC__SYNCBUSY__Type.html">PDEC_SYNCBUSY_Type</a> <a class="code" href="structPdec.html#a15e9b6f761497f96a5d4f758de294e47">SYNCBUSY</a>; </div>
<div class="line"><a name="l00711"></a><span class="lineno"><a class="line" href="structPdec.html#ac518c41c0383cadf24605698d3303f19"> 711</a></span>&#160; __IO <a class="code" href="unionPDEC__PRESC__Type.html">PDEC_PRESC_Type</a> <a class="code" href="structPdec.html#ac518c41c0383cadf24605698d3303f19">PRESC</a>; </div>
<div class="line"><a name="l00712"></a><span class="lineno"><a class="line" href="structPdec.html#a3a3b3c5aec98674ae833b90964dd1877"> 712</a></span>&#160; __IO <a class="code" href="unionPDEC__FILTER__Type.html">PDEC_FILTER_Type</a> <a class="code" href="structPdec.html#a3a3b3c5aec98674ae833b90964dd1877">FILTER</a>; </div>
<div class="line"><a name="l00713"></a><span class="lineno"> 713</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved3[0x2];</div>
<div class="line"><a name="l00714"></a><span class="lineno"><a class="line" href="structPdec.html#ac550ed3f472b474d415663f667462ccb"> 714</a></span>&#160; __IO <a class="code" href="unionPDEC__PRESCBUF__Type.html">PDEC_PRESCBUF_Type</a> <a class="code" href="structPdec.html#ac550ed3f472b474d415663f667462ccb">PRESCBUF</a>; </div>
<div class="line"><a name="l00715"></a><span class="lineno"><a class="line" href="structPdec.html#ac2e29f66b8c9c739ac70cddcbc296c1f"> 715</a></span>&#160; __IO <a class="code" href="unionPDEC__FILTERBUF__Type.html">PDEC_FILTERBUF_Type</a> <a class="code" href="structPdec.html#ac2e29f66b8c9c739ac70cddcbc296c1f">FILTERBUF</a>; </div>
<div class="line"><a name="l00716"></a><span class="lineno"> 716</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved4[0x2];</div>
<div class="line"><a name="l00717"></a><span class="lineno"><a class="line" href="structPdec.html#a7883ce5294d10e0fa8c77b4a86421862"> 717</a></span>&#160; __IO <a class="code" href="unionPDEC__COUNT__Type.html">PDEC_COUNT_Type</a> <a class="code" href="structPdec.html#a7883ce5294d10e0fa8c77b4a86421862">COUNT</a>; </div>
<div class="line"><a name="l00718"></a><span class="lineno"><a class="line" href="structPdec.html#a74a36c168c7db41d3b5ff8fc51f67634"> 718</a></span>&#160; __IO <a class="code" href="unionPDEC__CC__Type.html">PDEC_CC_Type</a> CC[2]; </div>
<div class="line"><a name="l00719"></a><span class="lineno"> 719</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved5[0x8];</div>
<div class="line"><a name="l00720"></a><span class="lineno"><a class="line" href="structPdec.html#a367f1abf31ffb859d96193a949a957cf"> 720</a></span>&#160; __IO <a class="code" href="unionPDEC__CCBUF__Type.html">PDEC_CCBUF_Type</a> CCBUF[2]; </div>
<div class="line"><a name="l00721"></a><span class="lineno"> 721</span>&#160;} <a class="code" href="structPdec.html">Pdec</a>;</div>
<div class="line"><a name="l00722"></a><span class="lineno"> 722</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00723"></a><span class="lineno"> 723</span>&#160; </div>
<div class="line"><a name="l00726"></a><span class="lineno"> 726</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_PDEC_COMPONENT_ */</span><span class="preprocessor"></span></div>
</div><!-- fragment --></div><!-- contents -->
<div class="ttc" id="aunionPDEC__EVCTRL__Type_html_aaf6b59f62cdca6411a084873d2e0f456"><div class="ttname"><a href="unionPDEC__EVCTRL__Type.html#aaf6b59f62cdca6411a084873d2e0f456">PDEC_EVCTRL_Type::MCEO</a></div><div class="ttdeci">uint16_t MCEO</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00230">pdec.h:230</a></div></div>
<div class="ttc" id="aunionPDEC__INTENSET__Type_html_ac20fb4bfead5d5a235e8f718b72bcf4c"><div class="ttname"><a href="unionPDEC__INTENSET__Type.html#ac20fb4bfead5d5a235e8f718b72bcf4c">PDEC_INTENSET_Type::ERR</a></div><div class="ttdeci">uint8_t ERR</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00318">pdec.h:318</a></div></div>
<div class="ttc" id="aunionPDEC__INTFLAG__Type_html"><div class="ttname"><a href="unionPDEC__INTFLAG__Type.html">PDEC_INTFLAG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00356">pdec.h:356</a></div></div>
<div class="ttc" id="aunionPDEC__FILTER__Type_html_a25e5cf1dbabdf0e0c679fe58d34e4f0c"><div class="ttname"><a href="unionPDEC__FILTER__Type.html#a25e5cf1dbabdf0e0c679fe58d34e4f0c">PDEC_FILTER_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00568">pdec.h:568</a></div></div>
<div class="ttc" id="aunionPDEC__PRESC__Type_html_a8d0eb4ba48d757ce8bed2d03ac74aef9"><div class="ttname"><a href="unionPDEC__PRESC__Type.html#a8d0eb4ba48d757ce8bed2d03ac74aef9">PDEC_PRESC_Type::PRESC</a></div><div class="ttdeci">uint8_t PRESC</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00525">pdec.h:525</a></div></div>
<div class="ttc" id="aunionPDEC__INTENCLR__Type_html_a215dbae3b32d69108e5a312be3ec2c89"><div class="ttname"><a href="unionPDEC__INTENCLR__Type.html#a215dbae3b32d69108e5a312be3ec2c89">PDEC_INTENCLR_Type::MC1</a></div><div class="ttdeci">uint8_t MC1</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00281">pdec.h:281</a></div></div>
<div class="ttc" id="aunionPDEC__DBGCTRL__Type_html_ae68bb0a79c26f800f33f610da5b7aa62"><div class="ttname"><a href="unionPDEC__DBGCTRL__Type.html#ae68bb0a79c26f800f33f610da5b7aa62">PDEC_DBGCTRL_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00460">pdec.h:460</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLBSET__Type_html"><div class="ttname"><a href="unionPDEC__CTRLBSET__Type.html">PDEC_CTRLBSET_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00180">pdec.h:180</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLA__Type_html_a8c8fa04f983284cb19b2545afe884c5f"><div class="ttname"><a href="unionPDEC__CTRLA__Type.html#a8c8fa04f983284cb19b2545afe884c5f">PDEC_CTRLA_Type::ALOCK</a></div><div class="ttdeci">uint32_t ALOCK</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00053">pdec.h:53</a></div></div>
<div class="ttc" id="aunionPDEC__INTENSET__Type_html_a7d18179eaefc62dd2b6cafef2e317f1b"><div class="ttname"><a href="unionPDEC__INTENSET__Type.html#a7d18179eaefc62dd2b6cafef2e317f1b">PDEC_INTENSET_Type::DIR</a></div><div class="ttdeci">uint8_t DIR</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00319">pdec.h:319</a></div></div>
<div class="ttc" id="aunionPDEC__STATUS__Type_html_a38327de824777dffa3fb9ee43f8aecb7"><div class="ttname"><a href="unionPDEC__STATUS__Type.html#a38327de824777dffa3fb9ee43f8aecb7">PDEC_STATUS_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00419">pdec.h:419</a></div></div>
<div class="ttc" id="aunionPDEC__STATUS__Type_html_abb24dc60aa4d9dbeda04107692bab4bb"><div class="ttname"><a href="unionPDEC__STATUS__Type.html#abb24dc60aa4d9dbeda04107692bab4bb">PDEC_STATUS_Type::IDXERR</a></div><div class="ttdeci">uint16_t IDXERR</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00400">pdec.h:400</a></div></div>
<div class="ttc" id="aunionPDEC__STATUS__Type_html_a669311e94908484987f61984fab0cd1d"><div class="ttname"><a href="unionPDEC__STATUS__Type.html#a669311e94908484987f61984fab0cd1d">PDEC_STATUS_Type::DIR</a></div><div class="ttdeci">uint16_t DIR</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00406">pdec.h:406</a></div></div>
<div class="ttc" id="aunionPDEC__STATUS__Type_html_a955456be038131ad5effe0a5a99985ac"><div class="ttname"><a href="unionPDEC__STATUS__Type.html#a955456be038131ad5effe0a5a99985ac">PDEC_STATUS_Type::CCBUFV1</a></div><div class="ttdeci">uint16_t CCBUFV1</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00411">pdec.h:411</a></div></div>
<div class="ttc" id="aunionPDEC__STATUS__Type_html_a086f2987cb0e00df7f99b225b266fd8d"><div class="ttname"><a href="unionPDEC__STATUS__Type.html#a086f2987cb0e00df7f99b225b266fd8d">PDEC_STATUS_Type::FILTERBUFV</a></div><div class="ttdeci">uint16_t FILTERBUFV</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00408">pdec.h:408</a></div></div>
<div class="ttc" id="aunionPDEC__INTENCLR__Type_html_ab31984e298b00342bfc79544aaa814ae"><div class="ttname"><a href="unionPDEC__INTENCLR__Type.html#ab31984e298b00342bfc79544aaa814ae">PDEC_INTENCLR_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00289">pdec.h:289</a></div></div>
<div class="ttc" id="aunionPDEC__PRESCBUF__Type_html_ac3ce6c24bcf84de6306bb7aa5ec14f33"><div class="ttname"><a href="unionPDEC__PRESCBUF__Type.html#ac3ce6c24bcf84de6306bb7aa5ec14f33">PDEC_PRESCBUF_Type::PRESCBUF</a></div><div class="ttdeci">uint8_t PRESCBUF</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00584">pdec.h:584</a></div></div>
<div class="ttc" id="aunionPDEC__SYNCBUSY__Type_html_aa76658f49e7363d5b229573ab79e7cf2"><div class="ttname"><a href="unionPDEC__SYNCBUSY__Type.html#aa76658f49e7363d5b229573ab79e7cf2">PDEC_SYNCBUSY_Type::CC1</a></div><div class="ttdeci">uint32_t CC1</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00483">pdec.h:483</a></div></div>
<div class="ttc" id="astructPdec_html_a3b944bd14fd26d2b3af5f69b35cbdf37"><div class="ttname"><a href="structPdec.html#a3b944bd14fd26d2b3af5f69b35cbdf37">Pdec::INTENCLR</a></div><div class="ttdeci">__IO PDEC_INTENCLR_Type INTENCLR</div><div class="ttdoc">Offset: 0x08 (R/W 8) Interrupt Enable Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00703">pdec.h:703</a></div></div>
<div class="ttc" id="astructPdec_html_ac2e29f66b8c9c739ac70cddcbc296c1f"><div class="ttname"><a href="structPdec.html#ac2e29f66b8c9c739ac70cddcbc296c1f">Pdec::FILTERBUF</a></div><div class="ttdeci">__IO PDEC_FILTERBUF_Type FILTERBUF</div><div class="ttdoc">Offset: 0x19 (R/W 8) Filter Buffer Value.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00715">pdec.h:715</a></div></div>
<div class="ttc" id="aunionPDEC__SYNCBUSY__Type_html_a50362d56bef2430b507cb7878856aadd"><div class="ttname"><a href="unionPDEC__SYNCBUSY__Type.html#a50362d56bef2430b507cb7878856aadd">PDEC_SYNCBUSY_Type::CC</a></div><div class="ttdeci">uint32_t CC</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00488">pdec.h:488</a></div></div>
<div class="ttc" id="astructPdec_html"><div class="ttname"><a href="structPdec.html">Pdec</a></div><div class="ttdoc">PDEC hardware registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00698">pdec.h:698</a></div></div>
<div class="ttc" id="aunionPDEC__EVCTRL__Type_html_a12407e9b69ecc84f0b0a2f283465862c"><div class="ttname"><a href="unionPDEC__EVCTRL__Type.html#a12407e9b69ecc84f0b0a2f283465862c">PDEC_EVCTRL_Type::ERREO</a></div><div class="ttdeci">uint16_t ERREO</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00221">pdec.h:221</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLA__Type_html_a7da964a6f56d2439dc42ae515393c9af"><div class="ttname"><a href="unionPDEC__CTRLA__Type.html#a7da964a6f56d2439dc42ae515393c9af">PDEC_CTRLA_Type::PINEN2</a></div><div class="ttdeci">uint32_t PINEN2</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00059">pdec.h:59</a></div></div>
<div class="ttc" id="aunionPDEC__INTENCLR__Type_html_acb55227447926accad81bc2f8b053e92"><div class="ttname"><a href="unionPDEC__INTENCLR__Type.html#acb55227447926accad81bc2f8b053e92">PDEC_INTENCLR_Type::MC</a></div><div class="ttdeci">uint8_t MC</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00286">pdec.h:286</a></div></div>
<div class="ttc" id="aunionPDEC__DBGCTRL__Type_html"><div class="ttname"><a href="unionPDEC__DBGCTRL__Type.html">PDEC_DBGCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00455">pdec.h:455</a></div></div>
<div class="ttc" id="astructPdec_html_a3a3b3c5aec98674ae833b90964dd1877"><div class="ttname"><a href="structPdec.html#a3a3b3c5aec98674ae833b90964dd1877">Pdec::FILTER</a></div><div class="ttdeci">__IO PDEC_FILTER_Type FILTER</div><div class="ttdoc">Offset: 0x15 (R/W 8) Filter Value.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00712">pdec.h:712</a></div></div>
<div class="ttc" id="aunionPDEC__FILTERBUF__Type_html_ae49d3c554a3e09de2352436e10ac14b6"><div class="ttname"><a href="unionPDEC__FILTERBUF__Type.html#ae49d3c554a3e09de2352436e10ac14b6">PDEC_FILTERBUF_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00627">pdec.h:627</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLA__Type_html_add201539601b478030ef95fcecf34dd5"><div class="ttname"><a href="unionPDEC__CTRLA__Type.html#add201539601b478030ef95fcecf34dd5">PDEC_CTRLA_Type::MAXCMP</a></div><div class="ttdeci">uint32_t MAXCMP</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00067">pdec.h:67</a></div></div>
<div class="ttc" id="aunionPDEC__STATUS__Type_html_a444a683977af61c2a427fa829d959d26"><div class="ttname"><a href="unionPDEC__STATUS__Type.html#a444a683977af61c2a427fa829d959d26">PDEC_STATUS_Type::CCBUFV</a></div><div class="ttdeci">uint16_t CCBUFV</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00416">pdec.h:416</a></div></div>
<div class="ttc" id="aunionPDEC__STATUS__Type_html_a8bd847b252374e0cb61fe54e32b9f80d"><div class="ttname"><a href="unionPDEC__STATUS__Type.html#a8bd847b252374e0cb61fe54e32b9f80d">PDEC_STATUS_Type::CCBUFV0</a></div><div class="ttdeci">uint16_t CCBUFV0</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00410">pdec.h:410</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLA__Type_html_a731ee1d8432484ed8a19ad1ffacc8973"><div class="ttname"><a href="unionPDEC__CTRLA__Type.html#a731ee1d8432484ed8a19ad1ffacc8973">PDEC_CTRLA_Type::PINVEN0</a></div><div class="ttdeci">uint32_t PINVEN0</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00061">pdec.h:61</a></div></div>
<div class="ttc" id="astructPdec_html_ac518c41c0383cadf24605698d3303f19"><div class="ttname"><a href="structPdec.html#ac518c41c0383cadf24605698d3303f19">Pdec::PRESC</a></div><div class="ttdeci">__IO PDEC_PRESC_Type PRESC</div><div class="ttdoc">Offset: 0x14 (R/W 8) Prescaler Value.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00711">pdec.h:711</a></div></div>
<div class="ttc" id="aunionPDEC__STATUS__Type_html_a7e57a79e098f6ac3b08b11a9f1b419da"><div class="ttname"><a href="unionPDEC__STATUS__Type.html#a7e57a79e098f6ac3b08b11a9f1b419da">PDEC_STATUS_Type::MPERR</a></div><div class="ttdeci">uint16_t MPERR</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00401">pdec.h:401</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLA__Type_html_ab415505afa9b4cf4b58e48752f9ea4eb"><div class="ttname"><a href="unionPDEC__CTRLA__Type.html#ab415505afa9b4cf4b58e48752f9ea4eb">PDEC_CTRLA_Type::PINVEN1</a></div><div class="ttdeci">uint32_t PINVEN1</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00062">pdec.h:62</a></div></div>
<div class="ttc" id="aunionPDEC__INTFLAG__Type_html_a7314d3723063fece0ce804bff2e9a9f0"><div class="ttname"><a href="unionPDEC__INTFLAG__Type.html#a7314d3723063fece0ce804bff2e9a9f0">PDEC_INTFLAG_Type::MC</a></div><div class="ttdeci">__I uint8_t MC</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00368">pdec.h:368</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLA__Type_html"><div class="ttname"><a href="unionPDEC__CTRLA__Type.html">PDEC_CTRLA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00044">pdec.h:44</a></div></div>
<div class="ttc" id="astructPdec_html_a9a2d3727b9007cee9d73855cf3f97b61"><div class="ttname"><a href="structPdec.html#a9a2d3727b9007cee9d73855cf3f97b61">Pdec::EVCTRL</a></div><div class="ttdeci">__IO PDEC_EVCTRL_Type EVCTRL</div><div class="ttdoc">Offset: 0x06 (R/W 16) Event Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00702">pdec.h:702</a></div></div>
<div class="ttc" id="aunionPDEC__INTFLAG__Type_html_aa2dd572bdb2def4c4fd8af3111e9de20"><div class="ttname"><a href="unionPDEC__INTFLAG__Type.html#aa2dd572bdb2def4c4fd8af3111e9de20">PDEC_INTFLAG_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00371">pdec.h:371</a></div></div>
<div class="ttc" id="aunionPDEC__INTENCLR__Type_html_a1ec08a1d7ab35b5d8f4b4d26f4e020b2"><div class="ttname"><a href="unionPDEC__INTENCLR__Type.html#a1ec08a1d7ab35b5d8f4b4d26f4e020b2">PDEC_INTENCLR_Type::VLC</a></div><div class="ttdeci">uint8_t VLC</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00279">pdec.h:279</a></div></div>
<div class="ttc" id="aunionPDEC__INTFLAG__Type_html_ad24e49a0907723d081d1ff17eea45062"><div class="ttname"><a href="unionPDEC__INTFLAG__Type.html#ad24e49a0907723d081d1ff17eea45062">PDEC_INTFLAG_Type::ERR</a></div><div class="ttdeci">__I uint8_t ERR</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00359">pdec.h:359</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLA__Type_html_a4e4e23ba7df08032869ddf9780ebfebd"><div class="ttname"><a href="unionPDEC__CTRLA__Type.html#a4e4e23ba7df08032869ddf9780ebfebd">PDEC_CTRLA_Type::PINVEN2</a></div><div class="ttdeci">uint32_t PINVEN2</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00063">pdec.h:63</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLBCLR__Type_html_adf3de57497ed33de6b5dcd46a7910e58"><div class="ttname"><a href="unionPDEC__CTRLBCLR__Type.html#adf3de57497ed33de6b5dcd46a7910e58">PDEC_CTRLBCLR_Type::LUPD</a></div><div class="ttdeci">uint8_t LUPD</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00148">pdec.h:148</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLBSET__Type_html_a2c7cdfa35f6c7fada05a3325a85b1ea1"><div class="ttname"><a href="unionPDEC__CTRLBSET__Type.html#a2c7cdfa35f6c7fada05a3325a85b1ea1">PDEC_CTRLBSET_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00187">pdec.h:187</a></div></div>
<div class="ttc" id="aunionPDEC__FILTER__Type_html_a6c33edf5901d807efdb6454dc136f7ab"><div class="ttname"><a href="unionPDEC__FILTER__Type.html#a6c33edf5901d807efdb6454dc136f7ab">PDEC_FILTER_Type::FILTER</a></div><div class="ttdeci">uint8_t FILTER</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00566">pdec.h:566</a></div></div>
<div class="ttc" id="aunionPDEC__PRESCBUF__Type_html"><div class="ttname"><a href="unionPDEC__PRESCBUF__Type.html">PDEC_PRESCBUF_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00582">pdec.h:582</a></div></div>
<div class="ttc" id="aunionPDEC__INTENSET__Type_html_ad8a95c127da961c32a47f201bc8a41fa"><div class="ttname"><a href="unionPDEC__INTENSET__Type.html#ad8a95c127da961c32a47f201bc8a41fa">PDEC_INTENSET_Type::MC</a></div><div class="ttdeci">uint8_t MC</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00327">pdec.h:327</a></div></div>
<div class="ttc" id="aunionPDEC__SYNCBUSY__Type_html_a634ac9c34ecd71b7029866f018f68399"><div class="ttname"><a href="unionPDEC__SYNCBUSY__Type.html#a634ac9c34ecd71b7029866f018f68399">PDEC_SYNCBUSY_Type::COUNT</a></div><div class="ttdeci">uint32_t COUNT</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00481">pdec.h:481</a></div></div>
<div class="ttc" id="aunionPDEC__STATUS__Type_html"><div class="ttname"><a href="unionPDEC__STATUS__Type.html">PDEC_STATUS_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00397">pdec.h:397</a></div></div>
<div class="ttc" id="aunionPDEC__EVCTRL__Type_html_a28db1597355764ff6d7f1817b03ec631"><div class="ttname"><a href="unionPDEC__EVCTRL__Type.html#a28db1597355764ff6d7f1817b03ec631">PDEC_EVCTRL_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00233">pdec.h:233</a></div></div>
<div class="ttc" id="aunionPDEC__INTENCLR__Type_html_ac38018a6816cb0d298bfe4f889f577c9"><div class="ttname"><a href="unionPDEC__INTENCLR__Type.html#ac38018a6816cb0d298bfe4f889f577c9">PDEC_INTENCLR_Type::ERR</a></div><div class="ttdeci">uint8_t ERR</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00277">pdec.h:277</a></div></div>
<div class="ttc" id="aunionPDEC__SYNCBUSY__Type_html_a322fe467fd0a83dd077ff0b8e6bbaf96"><div class="ttname"><a href="unionPDEC__SYNCBUSY__Type.html#a322fe467fd0a83dd077ff0b8e6bbaf96">PDEC_SYNCBUSY_Type::PRESC</a></div><div class="ttdeci">uint32_t PRESC</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00479">pdec.h:479</a></div></div>
<div class="ttc" id="aunionPDEC__FILTER__Type_html"><div class="ttname"><a href="unionPDEC__FILTER__Type.html">PDEC_FILTER_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00564">pdec.h:564</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLA__Type_html_af8b1f8c55aae9cbba239620c2583a723"><div class="ttname"><a href="unionPDEC__CTRLA__Type.html#af8b1f8c55aae9cbba239620c2583a723">PDEC_CTRLA_Type::SWAP</a></div><div class="ttdeci">uint32_t SWAP</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00055">pdec.h:55</a></div></div>
<div class="ttc" id="astructPdec_html_a9052561a41d34991ed1407878a52d58a"><div class="ttname"><a href="structPdec.html#a9052561a41d34991ed1407878a52d58a">Pdec::INTENSET</a></div><div class="ttdeci">__IO PDEC_INTENSET_Type INTENSET</div><div class="ttdoc">Offset: 0x09 (R/W 8) Interrupt Enable Set.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00704">pdec.h:704</a></div></div>
<div class="ttc" id="aunionPDEC__FILTERBUF__Type_html"><div class="ttname"><a href="unionPDEC__FILTERBUF__Type.html">PDEC_FILTERBUF_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00623">pdec.h:623</a></div></div>
<div class="ttc" id="aunionPDEC__PRESC__Type_html"><div class="ttname"><a href="unionPDEC__PRESC__Type.html">PDEC_PRESC_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00523">pdec.h:523</a></div></div>
<div class="ttc" id="aunionPDEC__STATUS__Type_html_aa25d04bff595da5d74cfc96182a3cba0"><div class="ttname"><a href="unionPDEC__STATUS__Type.html#aa25d04bff595da5d74cfc96182a3cba0">PDEC_STATUS_Type::STOP</a></div><div class="ttdeci">uint16_t STOP</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00405">pdec.h:405</a></div></div>
<div class="ttc" id="astructPdec_html_af7558c80275bb620e95eedc468e2937a"><div class="ttname"><a href="structPdec.html#af7558c80275bb620e95eedc468e2937a">Pdec::CTRLBCLR</a></div><div class="ttdeci">__IO PDEC_CTRLBCLR_Type CTRLBCLR</div><div class="ttdoc">Offset: 0x04 (R/W 8) Control B Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00700">pdec.h:700</a></div></div>
<div class="ttc" id="aunionPDEC__DBGCTRL__Type_html_aae93958360c321e18de2500cc161dd89"><div class="ttname"><a href="unionPDEC__DBGCTRL__Type.html#aae93958360c321e18de2500cc161dd89">PDEC_DBGCTRL_Type::DBGRUN</a></div><div class="ttdeci">uint8_t DBGRUN</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00457">pdec.h:457</a></div></div>
<div class="ttc" id="aunionPDEC__SYNCBUSY__Type_html_a467a228fc6298bd26123ba23b7909af6"><div class="ttname"><a href="unionPDEC__SYNCBUSY__Type.html#a467a228fc6298bd26123ba23b7909af6">PDEC_SYNCBUSY_Type::FILTER</a></div><div class="ttdeci">uint32_t FILTER</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00480">pdec.h:480</a></div></div>
<div class="ttc" id="aunionPDEC__PRESC__Type_html_a10e7f57f6082c73615820fd9e7fe0cc1"><div class="ttname"><a href="unionPDEC__PRESC__Type.html#a10e7f57f6082c73615820fd9e7fe0cc1">PDEC_PRESC_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00528">pdec.h:528</a></div></div>
<div class="ttc" id="aunionPDEC__INTENSET__Type_html_a8be272a2c28d72b66ac3cf3c9065ec7f"><div class="ttname"><a href="unionPDEC__INTENSET__Type.html#a8be272a2c28d72b66ac3cf3c9065ec7f">PDEC_INTENSET_Type::OVF</a></div><div class="ttdeci">uint8_t OVF</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00317">pdec.h:317</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLA__Type_html_adae072081d8786323e05e51c608e2de4"><div class="ttname"><a href="unionPDEC__CTRLA__Type.html#adae072081d8786323e05e51c608e2de4">PDEC_CTRLA_Type::SWRST</a></div><div class="ttdeci">uint32_t SWRST</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00046">pdec.h:46</a></div></div>
<div class="ttc" id="aunionPDEC__PRESCBUF__Type_html_ab20577b4c7aae048809d53613ebc93ad"><div class="ttname"><a href="unionPDEC__PRESCBUF__Type.html#ab20577b4c7aae048809d53613ebc93ad">PDEC_PRESCBUF_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00587">pdec.h:587</a></div></div>
<div class="ttc" id="astructPdec_html_a7883ce5294d10e0fa8c77b4a86421862"><div class="ttname"><a href="structPdec.html#a7883ce5294d10e0fa8c77b4a86421862">Pdec::COUNT</a></div><div class="ttdeci">__IO PDEC_COUNT_Type COUNT</div><div class="ttdoc">Offset: 0x1C (R/W 32) Counter Value.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00717">pdec.h:717</a></div></div>
<div class="ttc" id="astructPdec_html_a15e9b6f761497f96a5d4f758de294e47"><div class="ttname"><a href="structPdec.html#a15e9b6f761497f96a5d4f758de294e47">Pdec::SYNCBUSY</a></div><div class="ttdeci">__I PDEC_SYNCBUSY_Type SYNCBUSY</div><div class="ttdoc">Offset: 0x10 (R/ 32) Synchronization Status.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00710">pdec.h:710</a></div></div>
<div class="ttc" id="aunionPDEC__COUNT__Type_html"><div class="ttname"><a href="unionPDEC__COUNT__Type.html">PDEC_COUNT_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00641">pdec.h:641</a></div></div>
<div class="ttc" id="aunionPDEC__INTENCLR__Type_html"><div class="ttname"><a href="unionPDEC__INTENCLR__Type.html">PDEC_INTENCLR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00274">pdec.h:274</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLA__Type_html_a45cc8968a4ec996f992ea0a4e8dd8591"><div class="ttname"><a href="unionPDEC__CTRLA__Type.html#a45cc8968a4ec996f992ea0a4e8dd8591">PDEC_CTRLA_Type::PINEN0</a></div><div class="ttdeci">uint32_t PINEN0</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00057">pdec.h:57</a></div></div>
<div class="ttc" id="aunionPDEC__SYNCBUSY__Type_html_a7b9eb35dd7f7b883df7209eed4872cf8"><div class="ttname"><a href="unionPDEC__SYNCBUSY__Type.html#a7b9eb35dd7f7b883df7209eed4872cf8">PDEC_SYNCBUSY_Type::SWRST</a></div><div class="ttdeci">uint32_t SWRST</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00475">pdec.h:475</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLA__Type_html_ae2b6511de10a4578329cdd6eada6400a"><div class="ttname"><a href="unionPDEC__CTRLA__Type.html#ae2b6511de10a4578329cdd6eada6400a">PDEC_CTRLA_Type::PINEN</a></div><div class="ttdeci">uint32_t PINEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00071">pdec.h:71</a></div></div>
<div class="ttc" id="aunionPDEC__STATUS__Type_html_a0d3b54587e79518a494c58c68ff3d3e6"><div class="ttname"><a href="unionPDEC__STATUS__Type.html#a0d3b54587e79518a494c58c68ff3d3e6">PDEC_STATUS_Type::WINERR</a></div><div class="ttdeci">uint16_t WINERR</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00403">pdec.h:403</a></div></div>
<div class="ttc" id="aunionPDEC__INTENCLR__Type_html_a2b0151e4e0f0ff7e6263f7e07e7a0cf6"><div class="ttname"><a href="unionPDEC__INTENCLR__Type.html#a2b0151e4e0f0ff7e6263f7e07e7a0cf6">PDEC_INTENCLR_Type::OVF</a></div><div class="ttdeci">uint8_t OVF</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00276">pdec.h:276</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLBSET__Type_html_ad6a6a5b631618eade0827ca39969a428"><div class="ttname"><a href="unionPDEC__CTRLBSET__Type.html#ad6a6a5b631618eade0827ca39969a428">PDEC_CTRLBSET_Type::CMD</a></div><div class="ttdeci">uint8_t CMD</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00185">pdec.h:185</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLA__Type_html_a85627f847584ba7b221f6077a53a58dd"><div class="ttname"><a href="unionPDEC__CTRLA__Type.html#a85627f847584ba7b221f6077a53a58dd">PDEC_CTRLA_Type::PINVEN</a></div><div class="ttdeci">uint32_t PINVEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00073">pdec.h:73</a></div></div>
<div class="ttc" id="aunionPDEC__EVCTRL__Type_html"><div class="ttname"><a href="unionPDEC__EVCTRL__Type.html">PDEC_EVCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00215">pdec.h:215</a></div></div>
<div class="ttc" id="astructPdec_html_a79e2931566772274ab603cbfbe194a64"><div class="ttname"><a href="structPdec.html#a79e2931566772274ab603cbfbe194a64">Pdec::CTRLBSET</a></div><div class="ttdeci">__IO PDEC_CTRLBSET_Type CTRLBSET</div><div class="ttdoc">Offset: 0x05 (R/W 8) Control B Set.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00701">pdec.h:701</a></div></div>
<div class="ttc" id="astructPdec_html_ac550ed3f472b474d415663f667462ccb"><div class="ttname"><a href="structPdec.html#ac550ed3f472b474d415663f667462ccb">Pdec::PRESCBUF</a></div><div class="ttdeci">__IO PDEC_PRESCBUF_Type PRESCBUF</div><div class="ttdoc">Offset: 0x18 (R/W 8) Prescaler Buffer Value.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00714">pdec.h:714</a></div></div>
<div class="ttc" id="aunionPDEC__INTENSET__Type_html_a3c6b2f217302f5139a365938ed68cc7d"><div class="ttname"><a href="unionPDEC__INTENSET__Type.html#a3c6b2f217302f5139a365938ed68cc7d">PDEC_INTENSET_Type::VLC</a></div><div class="ttdeci">uint8_t VLC</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00320">pdec.h:320</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLA__Type_html_af86d533bce18b880a57360b398207c35"><div class="ttname"><a href="unionPDEC__CTRLA__Type.html#af86d533bce18b880a57360b398207c35">PDEC_CTRLA_Type::PEREN</a></div><div class="ttdeci">uint32_t PEREN</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00056">pdec.h:56</a></div></div>
<div class="ttc" id="aunionPDEC__INTFLAG__Type_html_afeee7b68d7f97ea7d9aff1e5fed67c84"><div class="ttname"><a href="unionPDEC__INTFLAG__Type.html#afeee7b68d7f97ea7d9aff1e5fed67c84">PDEC_INTFLAG_Type::DIR</a></div><div class="ttdeci">__I uint8_t DIR</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00360">pdec.h:360</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLBCLR__Type_html_a44603e97f7006901beb3d2fac046f587"><div class="ttname"><a href="unionPDEC__CTRLBCLR__Type.html#a44603e97f7006901beb3d2fac046f587">PDEC_CTRLBCLR_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00152">pdec.h:152</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLBSET__Type_html_a98dee966bb7bb054e62490482b9e3431"><div class="ttname"><a href="unionPDEC__CTRLBSET__Type.html#a98dee966bb7bb054e62490482b9e3431">PDEC_CTRLBSET_Type::LUPD</a></div><div class="ttdeci">uint8_t LUPD</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00183">pdec.h:183</a></div></div>
<div class="ttc" id="aunionPDEC__SYNCBUSY__Type_html_a71c4fdc17157fb170c0b35381bf1ad3e"><div class="ttname"><a href="unionPDEC__SYNCBUSY__Type.html#a71c4fdc17157fb170c0b35381bf1ad3e">PDEC_SYNCBUSY_Type::STATUS</a></div><div class="ttdeci">uint32_t STATUS</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00478">pdec.h:478</a></div></div>
<div class="ttc" id="aunionPDEC__STATUS__Type_html_a3f71f6078fec4ddb56bbd1d7d96cc293"><div class="ttname"><a href="unionPDEC__STATUS__Type.html#a3f71f6078fec4ddb56bbd1d7d96cc293">PDEC_STATUS_Type::QERR</a></div><div class="ttdeci">uint16_t QERR</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00399">pdec.h:399</a></div></div>
<div class="ttc" id="aunionPDEC__SYNCBUSY__Type_html"><div class="ttname"><a href="unionPDEC__SYNCBUSY__Type.html">PDEC_SYNCBUSY_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00473">pdec.h:473</a></div></div>
<div class="ttc" id="aunionPDEC__SYNCBUSY__Type_html_afa852d1aa0fd69ff9ecedfeaa3e03aa7"><div class="ttname"><a href="unionPDEC__SYNCBUSY__Type.html#afa852d1aa0fd69ff9ecedfeaa3e03aa7">PDEC_SYNCBUSY_Type::CC0</a></div><div class="ttdeci">uint32_t CC0</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00482">pdec.h:482</a></div></div>
<div class="ttc" id="aunionPDEC__SYNCBUSY__Type_html_a91459e10b34ae5c79cc7d68e51b31c11"><div class="ttname"><a href="unionPDEC__SYNCBUSY__Type.html#a91459e10b34ae5c79cc7d68e51b31c11">PDEC_SYNCBUSY_Type::ENABLE</a></div><div class="ttdeci">uint32_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00476">pdec.h:476</a></div></div>
<div class="ttc" id="aunionPDEC__INTENCLR__Type_html_ae3be344cb563bc45746c4625b42c3fc1"><div class="ttname"><a href="unionPDEC__INTENCLR__Type.html#ae3be344cb563bc45746c4625b42c3fc1">PDEC_INTENCLR_Type::MC0</a></div><div class="ttdeci">uint8_t MC0</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00280">pdec.h:280</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLA__Type_html_ad660b0cfe70d97caecd0f20b1065e7cc"><div class="ttname"><a href="unionPDEC__CTRLA__Type.html#ad660b0cfe70d97caecd0f20b1065e7cc">PDEC_CTRLA_Type::MODE</a></div><div class="ttdeci">uint32_t MODE</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00048">pdec.h:48</a></div></div>
<div class="ttc" id="aunionPDEC__INTENSET__Type_html_ab38fcba7b0aa0cf1c8117235faf13c5f"><div class="ttname"><a href="unionPDEC__INTENSET__Type.html#ab38fcba7b0aa0cf1c8117235faf13c5f">PDEC_INTENSET_Type::MC1</a></div><div class="ttdeci">uint8_t MC1</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00322">pdec.h:322</a></div></div>
<div class="ttc" id="aunionPDEC__EVCTRL__Type_html_a92c497a61f4194e936cd31213d66b727"><div class="ttname"><a href="unionPDEC__EVCTRL__Type.html#a92c497a61f4194e936cd31213d66b727">PDEC_EVCTRL_Type::EVEI</a></div><div class="ttdeci">uint16_t EVEI</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00219">pdec.h:219</a></div></div>
<div class="ttc" id="aunionPDEC__EVCTRL__Type_html_a188110a714ac487b74e816c13a54833c"><div class="ttname"><a href="unionPDEC__EVCTRL__Type.html#a188110a714ac487b74e816c13a54833c">PDEC_EVCTRL_Type::OVFEO</a></div><div class="ttdeci">uint16_t OVFEO</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00220">pdec.h:220</a></div></div>
<div class="ttc" id="aunionPDEC__INTENCLR__Type_html_ae0b164c71a36d38d5ce4e034f828d93d"><div class="ttname"><a href="unionPDEC__INTENCLR__Type.html#ae0b164c71a36d38d5ce4e034f828d93d">PDEC_INTENCLR_Type::DIR</a></div><div class="ttdeci">uint8_t DIR</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00278">pdec.h:278</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLBCLR__Type_html_ace69437e9cc441fff79e13d35c52d475"><div class="ttname"><a href="unionPDEC__CTRLBCLR__Type.html#ace69437e9cc441fff79e13d35c52d475">PDEC_CTRLBCLR_Type::CMD</a></div><div class="ttdeci">uint8_t CMD</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00150">pdec.h:150</a></div></div>
<div class="ttc" id="astructPdec_html_ae4402c2c9ae1c89b44fe17f02e6a471f"><div class="ttname"><a href="structPdec.html#ae4402c2c9ae1c89b44fe17f02e6a471f">Pdec::STATUS</a></div><div class="ttdeci">__IO PDEC_STATUS_Type STATUS</div><div class="ttdoc">Offset: 0x0C (R/W 16) Status.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00707">pdec.h:707</a></div></div>
<div class="ttc" id="aunionPDEC__FILTERBUF__Type_html_a4752a2c1fb0133c1fe0347ff7dcffbfc"><div class="ttname"><a href="unionPDEC__FILTERBUF__Type.html#a4752a2c1fb0133c1fe0347ff7dcffbfc">PDEC_FILTERBUF_Type::FILTERBUF</a></div><div class="ttdeci">uint8_t FILTERBUF</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00625">pdec.h:625</a></div></div>
<div class="ttc" id="aunionPDEC__SYNCBUSY__Type_html_a7ea8b4ebce54d877fe7f6ea3f336d424"><div class="ttname"><a href="unionPDEC__SYNCBUSY__Type.html#a7ea8b4ebce54d877fe7f6ea3f336d424">PDEC_SYNCBUSY_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00491">pdec.h:491</a></div></div>
<div class="ttc" id="aunionPDEC__CCBUF__Type_html_a001e22d10d600275898baa3635204838"><div class="ttname"><a href="unionPDEC__CCBUF__Type.html#a001e22d10d600275898baa3635204838">PDEC_CCBUF_Type::CCBUF</a></div><div class="ttdeci">uint32_t CCBUF</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00681">pdec.h:681</a></div></div>
<div class="ttc" id="aunionPDEC__COUNT__Type_html_ae4192cbeb6a700b067b5ce016fb2a509"><div class="ttname"><a href="unionPDEC__COUNT__Type.html#ae4192cbeb6a700b067b5ce016fb2a509">PDEC_COUNT_Type::COUNT</a></div><div class="ttdeci">uint32_t COUNT</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00643">pdec.h:643</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLA__Type_html_a44711322384158eeefec016d3ff3ef82"><div class="ttname"><a href="unionPDEC__CTRLA__Type.html#a44711322384158eeefec016d3ff3ef82">PDEC_CTRLA_Type::RUNSTDBY</a></div><div class="ttdeci">uint32_t RUNSTDBY</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00050">pdec.h:50</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLA__Type_html_a50796b590db278638df3a400f4604403"><div class="ttname"><a href="unionPDEC__CTRLA__Type.html#a50796b590db278638df3a400f4604403">PDEC_CTRLA_Type::ANGULAR</a></div><div class="ttdeci">uint32_t ANGULAR</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00065">pdec.h:65</a></div></div>
<div class="ttc" id="aunionPDEC__EVCTRL__Type_html_a0b643bf7799c5fb575a28ef3fc545f08"><div class="ttname"><a href="unionPDEC__EVCTRL__Type.html#a0b643bf7799c5fb575a28ef3fc545f08">PDEC_EVCTRL_Type::EVINV</a></div><div class="ttdeci">uint16_t EVINV</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00218">pdec.h:218</a></div></div>
<div class="ttc" id="aunionPDEC__EVCTRL__Type_html_a21130feb1fe6135ff956f2777701a47d"><div class="ttname"><a href="unionPDEC__EVCTRL__Type.html#a21130feb1fe6135ff956f2777701a47d">PDEC_EVCTRL_Type::MCEO1</a></div><div class="ttdeci">uint16_t MCEO1</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00225">pdec.h:225</a></div></div>
<div class="ttc" id="aunionPDEC__INTFLAG__Type_html_ac2aadcd0f56455465d26cfbcbd143b95"><div class="ttname"><a href="unionPDEC__INTFLAG__Type.html#ac2aadcd0f56455465d26cfbcbd143b95">PDEC_INTFLAG_Type::VLC</a></div><div class="ttdeci">__I uint8_t VLC</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00361">pdec.h:361</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLA__Type_html_ad324062a120082e991d005749b06776e"><div class="ttname"><a href="unionPDEC__CTRLA__Type.html#ad324062a120082e991d005749b06776e">PDEC_CTRLA_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00076">pdec.h:76</a></div></div>
<div class="ttc" id="aunionPDEC__EVCTRL__Type_html_a87be45b780f7cd9197f68a2105a391cd"><div class="ttname"><a href="unionPDEC__EVCTRL__Type.html#a87be45b780f7cd9197f68a2105a391cd">PDEC_EVCTRL_Type::DIREO</a></div><div class="ttdeci">uint16_t DIREO</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00222">pdec.h:222</a></div></div>
<div class="ttc" id="aunionPDEC__INTFLAG__Type_html_a07b7669882e5669f5797021b942fb8e7"><div class="ttname"><a href="unionPDEC__INTFLAG__Type.html#a07b7669882e5669f5797021b942fb8e7">PDEC_INTFLAG_Type::uint8_t</a></div><div class="ttdeci">__I uint8_t</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00364">pdec.h:364</a></div></div>
<div class="ttc" id="aunionPDEC__INTFLAG__Type_html_a02f55a909c0c7c2545370b26737cb5f7"><div class="ttname"><a href="unionPDEC__INTFLAG__Type.html#a02f55a909c0c7c2545370b26737cb5f7">PDEC_INTFLAG_Type::MC0</a></div><div class="ttdeci">__I uint8_t MC0</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00362">pdec.h:362</a></div></div>
<div class="ttc" id="aunionPDEC__SYNCBUSY__Type_html_a37ddad64abd51ef20b689007087a5094"><div class="ttname"><a href="unionPDEC__SYNCBUSY__Type.html#a37ddad64abd51ef20b689007087a5094">PDEC_SYNCBUSY_Type::CTRLB</a></div><div class="ttdeci">uint32_t CTRLB</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00477">pdec.h:477</a></div></div>
<div class="ttc" id="aunionPDEC__CCBUF__Type_html"><div class="ttname"><a href="unionPDEC__CCBUF__Type.html">PDEC_CCBUF_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00679">pdec.h:679</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLA__Type_html_afb2b66e63b131ccac22169404049f586"><div class="ttname"><a href="unionPDEC__CTRLA__Type.html#afb2b66e63b131ccac22169404049f586">PDEC_CTRLA_Type::CONF</a></div><div class="ttdeci">uint32_t CONF</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00052">pdec.h:52</a></div></div>
<div class="ttc" id="aunionPDEC__EVCTRL__Type_html_a36aabaf7d4fcf3dcdc76c8cce6199eb8"><div class="ttname"><a href="unionPDEC__EVCTRL__Type.html#a36aabaf7d4fcf3dcdc76c8cce6199eb8">PDEC_EVCTRL_Type::MCEO0</a></div><div class="ttdeci">uint16_t MCEO0</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00224">pdec.h:224</a></div></div>
<div class="ttc" id="asame54n19a_8h_html_a0d957f1433aaf5d70e4dc2b68288442d"><div class="ttname"><a href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a></div><div class="ttdeci">volatile const uint8_t RoReg8</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00053">same54n19a.h:53</a></div></div>
<div class="ttc" id="aunionPDEC__INTENSET__Type_html"><div class="ttname"><a href="unionPDEC__INTENSET__Type.html">PDEC_INTENSET_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00315">pdec.h:315</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLBCLR__Type_html"><div class="ttname"><a href="unionPDEC__CTRLBCLR__Type.html">PDEC_CTRLBCLR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00145">pdec.h:145</a></div></div>
<div class="ttc" id="aunionPDEC__INTENSET__Type_html_a52ca664c0df1b6f5c548fdbb9b7a97da"><div class="ttname"><a href="unionPDEC__INTENSET__Type.html#a52ca664c0df1b6f5c548fdbb9b7a97da">PDEC_INTENSET_Type::MC0</a></div><div class="ttdeci">uint8_t MC0</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00321">pdec.h:321</a></div></div>
<div class="ttc" id="aunionPDEC__EVCTRL__Type_html_abf0877764cfdba046db0a98a9b4cd793"><div class="ttname"><a href="unionPDEC__EVCTRL__Type.html#abf0877764cfdba046db0a98a9b4cd793">PDEC_EVCTRL_Type::VLCEO</a></div><div class="ttdeci">uint16_t VLCEO</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00223">pdec.h:223</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLA__Type_html_a39e367e12313677d2b59ed216ad964ef"><div class="ttname"><a href="unionPDEC__CTRLA__Type.html#a39e367e12313677d2b59ed216ad964ef">PDEC_CTRLA_Type::ENABLE</a></div><div class="ttdeci">uint32_t ENABLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00047">pdec.h:47</a></div></div>
<div class="ttc" id="astructPdec_html_abbd37a7f83fe231552ea40b7a98b695e"><div class="ttname"><a href="structPdec.html#abbd37a7f83fe231552ea40b7a98b695e">Pdec::CTRLA</a></div><div class="ttdeci">__IO PDEC_CTRLA_Type CTRLA</div><div class="ttdoc">Offset: 0x00 (R/W 32) Control A.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00699">pdec.h:699</a></div></div>
<div class="ttc" id="aunionPDEC__INTENSET__Type_html_af6b385821af6754085926efb5905092c"><div class="ttname"><a href="unionPDEC__INTENSET__Type.html#af6b385821af6754085926efb5905092c">PDEC_INTENSET_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00330">pdec.h:330</a></div></div>
<div class="ttc" id="aunionPDEC__CC__Type_html_ab9cd74821067cb731f3d229d3d884778"><div class="ttname"><a href="unionPDEC__CC__Type.html#ab9cd74821067cb731f3d229d3d884778">PDEC_CC_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00665">pdec.h:665</a></div></div>
<div class="ttc" id="astructPdec_html_abdf566cec48944515787f62d8d059e47"><div class="ttname"><a href="structPdec.html#abdf566cec48944515787f62d8d059e47">Pdec::DBGCTRL</a></div><div class="ttdeci">__IO PDEC_DBGCTRL_Type DBGCTRL</div><div class="ttdoc">Offset: 0x0F (R/W 8) Debug Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00709">pdec.h:709</a></div></div>
<div class="ttc" id="aunionPDEC__STATUS__Type_html_a522590cc58295f0aeb7d50b8984c6e71"><div class="ttname"><a href="unionPDEC__STATUS__Type.html#a522590cc58295f0aeb7d50b8984c6e71">PDEC_STATUS_Type::PRESCBUFV</a></div><div class="ttdeci">uint16_t PRESCBUFV</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00407">pdec.h:407</a></div></div>
<div class="ttc" id="astructPdec_html_a9b601eebe5b5bab912a13adef7e36ffb"><div class="ttname"><a href="structPdec.html#a9b601eebe5b5bab912a13adef7e36ffb">Pdec::INTFLAG</a></div><div class="ttdeci">__IO PDEC_INTFLAG_Type INTFLAG</div><div class="ttdoc">Offset: 0x0A (R/W 8) Interrupt Flag Status and Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00705">pdec.h:705</a></div></div>
<div class="ttc" id="aunionPDEC__CCBUF__Type_html_a685c62371b2654de9b9f6b4ab27cdb2a"><div class="ttname"><a href="unionPDEC__CCBUF__Type.html#a685c62371b2654de9b9f6b4ab27cdb2a">PDEC_CCBUF_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00684">pdec.h:684</a></div></div>
<div class="ttc" id="aunionPDEC__CC__Type_html"><div class="ttname"><a href="unionPDEC__CC__Type.html">PDEC_CC_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00660">pdec.h:660</a></div></div>
<div class="ttc" id="aunionPDEC__INTFLAG__Type_html_a2a5212d8f0df4d7f4c504e6d02ffcce9"><div class="ttname"><a href="unionPDEC__INTFLAG__Type.html#a2a5212d8f0df4d7f4c504e6d02ffcce9">PDEC_INTFLAG_Type::OVF</a></div><div class="ttdeci">__I uint8_t OVF</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00358">pdec.h:358</a></div></div>
<div class="ttc" id="aunionPDEC__STATUS__Type_html_ac91411e5f4cea4126a79290b83ea2a74"><div class="ttname"><a href="unionPDEC__STATUS__Type.html#ac91411e5f4cea4126a79290b83ea2a74">PDEC_STATUS_Type::HERR</a></div><div class="ttdeci">uint16_t HERR</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00404">pdec.h:404</a></div></div>
<div class="ttc" id="aunionPDEC__CTRLA__Type_html_a4816244b101ec0a2074d3fd98a419dc4"><div class="ttname"><a href="unionPDEC__CTRLA__Type.html#a4816244b101ec0a2074d3fd98a419dc4">PDEC_CTRLA_Type::PINEN1</a></div><div class="ttdeci">uint32_t PINEN1</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00058">pdec.h:58</a></div></div>
<div class="ttc" id="aunionPDEC__INTFLAG__Type_html_a8f5b9f6b0aeead92bcf554506debdde8"><div class="ttname"><a href="unionPDEC__INTFLAG__Type.html#a8f5b9f6b0aeead92bcf554506debdde8">PDEC_INTFLAG_Type::MC1</a></div><div class="ttdeci">__I uint8_t MC1</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00363">pdec.h:363</a></div></div>
<div class="ttc" id="aunionPDEC__CC__Type_html_a3ccdde3ae2af0fe27b3b5165dbdac1ab"><div class="ttname"><a href="unionPDEC__CC__Type.html#a3ccdde3ae2af0fe27b3b5165dbdac1ab">PDEC_CC_Type::CC</a></div><div class="ttdeci">uint32_t CC</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00662">pdec.h:662</a></div></div>
<div class="ttc" id="aunionPDEC__EVCTRL__Type_html_a9a265b816d619100b8a056536426299f"><div class="ttname"><a href="unionPDEC__EVCTRL__Type.html#a9a265b816d619100b8a056536426299f">PDEC_EVCTRL_Type::EVACT</a></div><div class="ttdeci">uint16_t EVACT</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00217">pdec.h:217</a></div></div>
<div class="ttc" id="aunionPDEC__COUNT__Type_html_a67cf4afb1f319adc3da00a2a45c8f943"><div class="ttname"><a href="unionPDEC__COUNT__Type.html#a67cf4afb1f319adc3da00a2a45c8f943">PDEC_COUNT_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pdec_8h_source.html#l00646">pdec.h:646</a></div></div>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_U2406</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>REV_PM</b>&#160;&#160;&#160;0x100</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#ac47de8c1c1280430ce8873f9ef37e6f3">PM_CTRLA_OFFSET</a>&#160;&#160;&#160;0x00</td></tr>
<tr class="memdesc:ac47de8c1c1280430ce8873f9ef37e6f3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_CTRLA offset) Control A <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a78f1f5bb930dafe9d37737015e35f096">PM_CTRLA_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a78f1f5bb930dafe9d37737015e35f096"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_CTRLA reset_value) Control A <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#ad2bf677585d69908c39a132d5c978166">PM_CTRLA_IORET_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:ad2bf677585d69908c39a132d5c978166"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_CTRLA) I/O Retention <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_CTRLA_IORET</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2pm_8h.html#ad2bf677585d69908c39a132d5c978166">PM_CTRLA_IORET_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a9dc3e7122cd1ad4fe6d1764dbabc1957">PM_CTRLA_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x04)</td></tr>
<tr class="memdesc:a9dc3e7122cd1ad4fe6d1764dbabc1957"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_CTRLA) MASK Register <br /></td></tr>
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<tr class="memitem:aaf4fb96895e38d59c94cd6b6991cd97f"><td class="memItemLeft" align="right" valign="top"><a id="aaf4fb96895e38d59c94cd6b6991cd97f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#aaf4fb96895e38d59c94cd6b6991cd97f">PM_SLEEPCFG_OFFSET</a>&#160;&#160;&#160;0x01</td></tr>
<tr class="memdesc:aaf4fb96895e38d59c94cd6b6991cd97f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_SLEEPCFG offset) Sleep Configuration <br /></td></tr>
<tr class="separator:aaf4fb96895e38d59c94cd6b6991cd97f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a23e99f0924363f28017cdd0d725efb7a"><td class="memItemLeft" align="right" valign="top"><a id="a23e99f0924363f28017cdd0d725efb7a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a23e99f0924363f28017cdd0d725efb7a">PM_SLEEPCFG_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x02)</td></tr>
<tr class="memdesc:a23e99f0924363f28017cdd0d725efb7a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_SLEEPCFG reset_value) Sleep Configuration <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a35bc67c3429373f2ad67992a2c731a59">PM_SLEEPCFG_SLEEPMODE_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a35bc67c3429373f2ad67992a2c731a59"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_SLEEPCFG) Sleep Mode <br /></td></tr>
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<tr class="memitem:aa7f010ada439bb8d744c9a9709f4c7ff"><td class="memItemLeft" align="right" valign="top"><a id="aa7f010ada439bb8d744c9a9709f4c7ff"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_SLEEPCFG_SLEEPMODE_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) &lt;&lt; <a class="el" href="component_2pm_8h.html#a35bc67c3429373f2ad67992a2c731a59">PM_SLEEPCFG_SLEEPMODE_Pos</a>)</td></tr>
<tr class="separator:aa7f010ada439bb8d744c9a9709f4c7ff"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_SLEEPCFG_SLEEPMODE</b>(value)&#160;&#160;&#160;(PM_SLEEPCFG_SLEEPMODE_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2pm_8h.html#a35bc67c3429373f2ad67992a2c731a59">PM_SLEEPCFG_SLEEPMODE_Pos</a>))</td></tr>
<tr class="separator:ae8c1cf5a4e7bb49d99f20b8bf5839341"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#aeac8be8e55515e28ce319c353cb7f1e2">PM_SLEEPCFG_SLEEPMODE_IDLE0_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:aeac8be8e55515e28ce319c353cb7f1e2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_SLEEPCFG) CPU clock is OFF <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#affca82a32fcc77efc796ad8113fc2624">PM_SLEEPCFG_SLEEPMODE_IDLE1_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:affca82a32fcc77efc796ad8113fc2624"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_SLEEPCFG) AHB clock is OFF <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#aa39bc5c9c9144b45a525dbac465c4603">PM_SLEEPCFG_SLEEPMODE_IDLE2_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:aa39bc5c9c9144b45a525dbac465c4603"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_SLEEPCFG) APB clock are OFF <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#afad7594ad3c4bf0e456b4686140360c1">PM_SLEEPCFG_SLEEPMODE_STANDBY_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
<tr class="memdesc:afad7594ad3c4bf0e456b4686140360c1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_SLEEPCFG) All Clocks are OFF <br /></td></tr>
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<tr class="memitem:adba39a3c4f17a562539c9c6f166b0f9c"><td class="memItemLeft" align="right" valign="top"><a id="adba39a3c4f17a562539c9c6f166b0f9c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#adba39a3c4f17a562539c9c6f166b0f9c">PM_SLEEPCFG_SLEEPMODE_HIBERNATE_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
<tr class="memdesc:adba39a3c4f17a562539c9c6f166b0f9c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_SLEEPCFG) Backup domain is ON as well as some PDRAMs <br /></td></tr>
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<tr class="memitem:a4fa413e3dd29c199b7ad62c4f8f533ea"><td class="memItemLeft" align="right" valign="top"><a id="a4fa413e3dd29c199b7ad62c4f8f533ea"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a4fa413e3dd29c199b7ad62c4f8f533ea">PM_SLEEPCFG_SLEEPMODE_BACKUP_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x6)</td></tr>
<tr class="memdesc:a4fa413e3dd29c199b7ad62c4f8f533ea"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_SLEEPCFG) Only Backup domain is powered ON <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a7f882d1a05a4bc12d6b2a16f5556d294">PM_SLEEPCFG_SLEEPMODE_OFF_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7)</td></tr>
<tr class="memdesc:a7f882d1a05a4bc12d6b2a16f5556d294"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_SLEEPCFG) All power domains are powered OFF <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_SLEEPCFG_SLEEPMODE_IDLE0</b>&#160;&#160;&#160;(<a class="el" href="component_2pm_8h.html#aeac8be8e55515e28ce319c353cb7f1e2">PM_SLEEPCFG_SLEEPMODE_IDLE0_Val</a> &lt;&lt; <a class="el" href="component_2pm_8h.html#a35bc67c3429373f2ad67992a2c731a59">PM_SLEEPCFG_SLEEPMODE_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_SLEEPCFG_SLEEPMODE_IDLE1</b>&#160;&#160;&#160;(<a class="el" href="component_2pm_8h.html#affca82a32fcc77efc796ad8113fc2624">PM_SLEEPCFG_SLEEPMODE_IDLE1_Val</a> &lt;&lt; <a class="el" href="component_2pm_8h.html#a35bc67c3429373f2ad67992a2c731a59">PM_SLEEPCFG_SLEEPMODE_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_SLEEPCFG_SLEEPMODE_IDLE2</b>&#160;&#160;&#160;(<a class="el" href="component_2pm_8h.html#aa39bc5c9c9144b45a525dbac465c4603">PM_SLEEPCFG_SLEEPMODE_IDLE2_Val</a> &lt;&lt; <a class="el" href="component_2pm_8h.html#a35bc67c3429373f2ad67992a2c731a59">PM_SLEEPCFG_SLEEPMODE_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_SLEEPCFG_SLEEPMODE_STANDBY</b>&#160;&#160;&#160;(<a class="el" href="component_2pm_8h.html#afad7594ad3c4bf0e456b4686140360c1">PM_SLEEPCFG_SLEEPMODE_STANDBY_Val</a> &lt;&lt; <a class="el" href="component_2pm_8h.html#a35bc67c3429373f2ad67992a2c731a59">PM_SLEEPCFG_SLEEPMODE_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_SLEEPCFG_SLEEPMODE_HIBERNATE</b>&#160;&#160;&#160;(<a class="el" href="component_2pm_8h.html#adba39a3c4f17a562539c9c6f166b0f9c">PM_SLEEPCFG_SLEEPMODE_HIBERNATE_Val</a> &lt;&lt; <a class="el" href="component_2pm_8h.html#a35bc67c3429373f2ad67992a2c731a59">PM_SLEEPCFG_SLEEPMODE_Pos</a>)</td></tr>
<tr class="separator:a05f248e37c3abefff14fca0f679fe87b"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_SLEEPCFG_SLEEPMODE_BACKUP</b>&#160;&#160;&#160;(<a class="el" href="component_2pm_8h.html#a4fa413e3dd29c199b7ad62c4f8f533ea">PM_SLEEPCFG_SLEEPMODE_BACKUP_Val</a> &lt;&lt; <a class="el" href="component_2pm_8h.html#a35bc67c3429373f2ad67992a2c731a59">PM_SLEEPCFG_SLEEPMODE_Pos</a>)</td></tr>
<tr class="separator:a19b25741ba163602903faca0d721c626"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_SLEEPCFG_SLEEPMODE_OFF</b>&#160;&#160;&#160;(<a class="el" href="component_2pm_8h.html#a7f882d1a05a4bc12d6b2a16f5556d294">PM_SLEEPCFG_SLEEPMODE_OFF_Val</a> &lt;&lt; <a class="el" href="component_2pm_8h.html#a35bc67c3429373f2ad67992a2c731a59">PM_SLEEPCFG_SLEEPMODE_Pos</a>)</td></tr>
<tr class="separator:ad2a9375ae47433adf7f782d9048228b0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a589930f958b6d1b101228160b09263c8"><td class="memItemLeft" align="right" valign="top"><a id="a589930f958b6d1b101228160b09263c8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a589930f958b6d1b101228160b09263c8">PM_SLEEPCFG_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x07)</td></tr>
<tr class="memdesc:a589930f958b6d1b101228160b09263c8"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_SLEEPCFG) MASK Register <br /></td></tr>
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<tr class="memitem:a96e613f029988a0e97e71761daab56d8"><td class="memItemLeft" align="right" valign="top"><a id="a96e613f029988a0e97e71761daab56d8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a96e613f029988a0e97e71761daab56d8">PM_INTENCLR_OFFSET</a>&#160;&#160;&#160;0x04</td></tr>
<tr class="memdesc:a96e613f029988a0e97e71761daab56d8"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_INTENCLR offset) Interrupt Enable Clear <br /></td></tr>
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<tr class="memitem:a6af1e46f631f08562f2affcba415c69c"><td class="memItemLeft" align="right" valign="top"><a id="a6af1e46f631f08562f2affcba415c69c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a6af1e46f631f08562f2affcba415c69c">PM_INTENCLR_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a6af1e46f631f08562f2affcba415c69c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_INTENCLR reset_value) Interrupt Enable Clear <br /></td></tr>
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<tr class="memitem:a53d5b03084c74af386cfa20c69cfe302"><td class="memItemLeft" align="right" valign="top"><a id="a53d5b03084c74af386cfa20c69cfe302"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a53d5b03084c74af386cfa20c69cfe302">PM_INTENCLR_SLEEPRDY_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a53d5b03084c74af386cfa20c69cfe302"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_INTENCLR) Sleep Mode Entry Ready Enable <br /></td></tr>
<tr class="separator:a53d5b03084c74af386cfa20c69cfe302"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4bae08a4742d59846ea2fc4e0c3c758b"><td class="memItemLeft" align="right" valign="top"><a id="a4bae08a4742d59846ea2fc4e0c3c758b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_INTENCLR_SLEEPRDY</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2pm_8h.html#a53d5b03084c74af386cfa20c69cfe302">PM_INTENCLR_SLEEPRDY_Pos</a>)</td></tr>
<tr class="separator:a4bae08a4742d59846ea2fc4e0c3c758b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a69858d0d83319582e961338ebf0e6def"><td class="memItemLeft" align="right" valign="top"><a id="a69858d0d83319582e961338ebf0e6def"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a69858d0d83319582e961338ebf0e6def">PM_INTENCLR_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x01)</td></tr>
<tr class="memdesc:a69858d0d83319582e961338ebf0e6def"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_INTENCLR) MASK Register <br /></td></tr>
<tr class="separator:a69858d0d83319582e961338ebf0e6def"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:acbb9e160784aa556b444d77c22d69b5e"><td class="memItemLeft" align="right" valign="top"><a id="acbb9e160784aa556b444d77c22d69b5e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#acbb9e160784aa556b444d77c22d69b5e">PM_INTENSET_OFFSET</a>&#160;&#160;&#160;0x05</td></tr>
<tr class="memdesc:acbb9e160784aa556b444d77c22d69b5e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_INTENSET offset) Interrupt Enable Set <br /></td></tr>
<tr class="separator:acbb9e160784aa556b444d77c22d69b5e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1ff5cf286622565d1fdcfcae1e552bfd"><td class="memItemLeft" align="right" valign="top"><a id="a1ff5cf286622565d1fdcfcae1e552bfd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a1ff5cf286622565d1fdcfcae1e552bfd">PM_INTENSET_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a1ff5cf286622565d1fdcfcae1e552bfd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_INTENSET reset_value) Interrupt Enable Set <br /></td></tr>
<tr class="separator:a1ff5cf286622565d1fdcfcae1e552bfd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab4bf05279c0dbfd3874d555d8ed34d76"><td class="memItemLeft" align="right" valign="top"><a id="ab4bf05279c0dbfd3874d555d8ed34d76"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#ab4bf05279c0dbfd3874d555d8ed34d76">PM_INTENSET_SLEEPRDY_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ab4bf05279c0dbfd3874d555d8ed34d76"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_INTENSET) Sleep Mode Entry Ready Enable <br /></td></tr>
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<tr class="memitem:a23fa27158603233c69749065f96fb94d"><td class="memItemLeft" align="right" valign="top"><a id="a23fa27158603233c69749065f96fb94d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_INTENSET_SLEEPRDY</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2pm_8h.html#ab4bf05279c0dbfd3874d555d8ed34d76">PM_INTENSET_SLEEPRDY_Pos</a>)</td></tr>
<tr class="separator:a23fa27158603233c69749065f96fb94d"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a913aa0f4020e344151814557d64767d7">PM_INTENSET_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x01)</td></tr>
<tr class="memdesc:a913aa0f4020e344151814557d64767d7"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_INTENSET) MASK Register <br /></td></tr>
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<tr class="memitem:a9f885fcf58926ce0a55a0cb84523b6cc"><td class="memItemLeft" align="right" valign="top"><a id="a9f885fcf58926ce0a55a0cb84523b6cc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a9f885fcf58926ce0a55a0cb84523b6cc">PM_INTFLAG_OFFSET</a>&#160;&#160;&#160;0x06</td></tr>
<tr class="memdesc:a9f885fcf58926ce0a55a0cb84523b6cc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_INTFLAG offset) Interrupt Flag Status and Clear <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a75ec112ff873ab4855f99087a5023b13">PM_INTFLAG_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a75ec112ff873ab4855f99087a5023b13"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_INTFLAG reset_value) Interrupt Flag Status and Clear <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a9dd60c8172dae7e81853e64080fc8a6d">PM_INTFLAG_SLEEPRDY_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a9dd60c8172dae7e81853e64080fc8a6d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_INTFLAG) Sleep Mode Entry Ready <br /></td></tr>
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<tr class="memitem:a03e2015ba26a7a20e55d4570b279f622"><td class="memItemLeft" align="right" valign="top"><a id="a03e2015ba26a7a20e55d4570b279f622"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_INTFLAG_SLEEPRDY</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2pm_8h.html#a9dd60c8172dae7e81853e64080fc8a6d">PM_INTFLAG_SLEEPRDY_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#ac5ddba598ffebe3739bbba90116b3ba3">PM_INTFLAG_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x01)</td></tr>
<tr class="memdesc:ac5ddba598ffebe3739bbba90116b3ba3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_INTFLAG) MASK Register <br /></td></tr>
<tr class="separator:ac5ddba598ffebe3739bbba90116b3ba3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af4b99f5917c042cf00e7aa0ddfcefb5a"><td class="memItemLeft" align="right" valign="top"><a id="af4b99f5917c042cf00e7aa0ddfcefb5a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#af4b99f5917c042cf00e7aa0ddfcefb5a">PM_STDBYCFG_OFFSET</a>&#160;&#160;&#160;0x08</td></tr>
<tr class="memdesc:af4b99f5917c042cf00e7aa0ddfcefb5a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_STDBYCFG offset) Standby Configuration <br /></td></tr>
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<tr class="memitem:a31844cf2eeaf7b9dc7de67de663967ec"><td class="memItemLeft" align="right" valign="top"><a id="a31844cf2eeaf7b9dc7de67de663967ec"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a31844cf2eeaf7b9dc7de67de663967ec">PM_STDBYCFG_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a31844cf2eeaf7b9dc7de67de663967ec"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_STDBYCFG reset_value) Standby Configuration <br /></td></tr>
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<tr class="memitem:aedbb80b7b88e3a26e07ccdeaceddceba"><td class="memItemLeft" align="right" valign="top"><a id="aedbb80b7b88e3a26e07ccdeaceddceba"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#aedbb80b7b88e3a26e07ccdeaceddceba">PM_STDBYCFG_RAMCFG_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:aedbb80b7b88e3a26e07ccdeaceddceba"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_STDBYCFG) Ram Configuration <br /></td></tr>
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<tr class="memitem:a05ae50e412e8bf8538f44f557889cd4b"><td class="memItemLeft" align="right" valign="top"><a id="a05ae50e412e8bf8538f44f557889cd4b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_STDBYCFG_RAMCFG_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2pm_8h.html#aedbb80b7b88e3a26e07ccdeaceddceba">PM_STDBYCFG_RAMCFG_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_STDBYCFG_RAMCFG</b>(value)&#160;&#160;&#160;(PM_STDBYCFG_RAMCFG_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2pm_8h.html#aedbb80b7b88e3a26e07ccdeaceddceba">PM_STDBYCFG_RAMCFG_Pos</a>))</td></tr>
<tr class="separator:a87a5c85354ed56f50032f057dfdba34b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a62b99fadcfea459ad6701424bc20534a"><td class="memItemLeft" align="right" valign="top"><a id="a62b99fadcfea459ad6701424bc20534a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a62b99fadcfea459ad6701424bc20534a">PM_STDBYCFG_RAMCFG_RET_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a62b99fadcfea459ad6701424bc20534a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_STDBYCFG) All the RAMs are retained <br /></td></tr>
<tr class="separator:a62b99fadcfea459ad6701424bc20534a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad311d6ab5de711be8606c7af3562e643"><td class="memItemLeft" align="right" valign="top"><a id="ad311d6ab5de711be8606c7af3562e643"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#ad311d6ab5de711be8606c7af3562e643">PM_STDBYCFG_RAMCFG_PARTIAL_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:ad311d6ab5de711be8606c7af3562e643"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_STDBYCFG) Only the first 32K bytes are retained <br /></td></tr>
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<tr class="memitem:ac2d2a831540877e815821835e4f93e37"><td class="memItemLeft" align="right" valign="top"><a id="ac2d2a831540877e815821835e4f93e37"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#ac2d2a831540877e815821835e4f93e37">PM_STDBYCFG_RAMCFG_OFF_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:ac2d2a831540877e815821835e4f93e37"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_STDBYCFG) All the RAMs are OFF <br /></td></tr>
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<tr class="memitem:af419df09e4e5de7f9b0924c0b8c21841"><td class="memItemLeft" align="right" valign="top"><a id="af419df09e4e5de7f9b0924c0b8c21841"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_STDBYCFG_RAMCFG_RET</b>&#160;&#160;&#160;(<a class="el" href="component_2pm_8h.html#a62b99fadcfea459ad6701424bc20534a">PM_STDBYCFG_RAMCFG_RET_Val</a> &lt;&lt; <a class="el" href="component_2pm_8h.html#aedbb80b7b88e3a26e07ccdeaceddceba">PM_STDBYCFG_RAMCFG_Pos</a>)</td></tr>
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<tr class="memitem:a88c5072dfc154cecc5f012f4a6123dd3"><td class="memItemLeft" align="right" valign="top"><a id="a88c5072dfc154cecc5f012f4a6123dd3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_STDBYCFG_RAMCFG_PARTIAL</b>&#160;&#160;&#160;(<a class="el" href="component_2pm_8h.html#ad311d6ab5de711be8606c7af3562e643">PM_STDBYCFG_RAMCFG_PARTIAL_Val</a> &lt;&lt; <a class="el" href="component_2pm_8h.html#aedbb80b7b88e3a26e07ccdeaceddceba">PM_STDBYCFG_RAMCFG_Pos</a>)</td></tr>
<tr class="separator:a88c5072dfc154cecc5f012f4a6123dd3"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_STDBYCFG_RAMCFG_OFF</b>&#160;&#160;&#160;(<a class="el" href="component_2pm_8h.html#ac2d2a831540877e815821835e4f93e37">PM_STDBYCFG_RAMCFG_OFF_Val</a> &lt;&lt; <a class="el" href="component_2pm_8h.html#aedbb80b7b88e3a26e07ccdeaceddceba">PM_STDBYCFG_RAMCFG_Pos</a>)</td></tr>
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<tr class="memitem:a6bbc1643cec5ceec7f8405595f0b3a67"><td class="memItemLeft" align="right" valign="top"><a id="a6bbc1643cec5ceec7f8405595f0b3a67"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a6bbc1643cec5ceec7f8405595f0b3a67">PM_STDBYCFG_FASTWKUP_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:a6bbc1643cec5ceec7f8405595f0b3a67"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_STDBYCFG) Fast Wakeup <br /></td></tr>
<tr class="separator:a6bbc1643cec5ceec7f8405595f0b3a67"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abd62ac910def68d29aa63835adf2161d"><td class="memItemLeft" align="right" valign="top"><a id="abd62ac910def68d29aa63835adf2161d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_STDBYCFG_FASTWKUP_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2pm_8h.html#a6bbc1643cec5ceec7f8405595f0b3a67">PM_STDBYCFG_FASTWKUP_Pos</a>)</td></tr>
<tr class="separator:abd62ac910def68d29aa63835adf2161d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a72f1e3dceaf5c16f1cc6ec319efb148e"><td class="memItemLeft" align="right" valign="top"><a id="a72f1e3dceaf5c16f1cc6ec319efb148e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_STDBYCFG_FASTWKUP</b>(value)&#160;&#160;&#160;(PM_STDBYCFG_FASTWKUP_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2pm_8h.html#a6bbc1643cec5ceec7f8405595f0b3a67">PM_STDBYCFG_FASTWKUP_Pos</a>))</td></tr>
<tr class="separator:a72f1e3dceaf5c16f1cc6ec319efb148e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9bbd6af7e430a29d33dbcebefe7d32d9"><td class="memItemLeft" align="right" valign="top"><a id="a9bbd6af7e430a29d33dbcebefe7d32d9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a9bbd6af7e430a29d33dbcebefe7d32d9">PM_STDBYCFG_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x33)</td></tr>
<tr class="memdesc:a9bbd6af7e430a29d33dbcebefe7d32d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_STDBYCFG) MASK Register <br /></td></tr>
<tr class="separator:a9bbd6af7e430a29d33dbcebefe7d32d9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:addce60b79d7abddb19658e9445ab0ff3"><td class="memItemLeft" align="right" valign="top"><a id="addce60b79d7abddb19658e9445ab0ff3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#addce60b79d7abddb19658e9445ab0ff3">PM_HIBCFG_OFFSET</a>&#160;&#160;&#160;0x09</td></tr>
<tr class="memdesc:addce60b79d7abddb19658e9445ab0ff3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_HIBCFG offset) Hibernate Configuration <br /></td></tr>
<tr class="separator:addce60b79d7abddb19658e9445ab0ff3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac470ecb83bcd18448c39707021ef27c0"><td class="memItemLeft" align="right" valign="top"><a id="ac470ecb83bcd18448c39707021ef27c0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#ac470ecb83bcd18448c39707021ef27c0">PM_HIBCFG_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:ac470ecb83bcd18448c39707021ef27c0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_HIBCFG reset_value) Hibernate Configuration <br /></td></tr>
<tr class="separator:ac470ecb83bcd18448c39707021ef27c0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a74cf322c7db4e2c8bc5b358e7487e0dd"><td class="memItemLeft" align="right" valign="top"><a id="a74cf322c7db4e2c8bc5b358e7487e0dd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a74cf322c7db4e2c8bc5b358e7487e0dd">PM_HIBCFG_RAMCFG_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a74cf322c7db4e2c8bc5b358e7487e0dd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_HIBCFG) Ram Configuration <br /></td></tr>
<tr class="separator:a74cf322c7db4e2c8bc5b358e7487e0dd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2b619f48674b897824ce2333245e04ce"><td class="memItemLeft" align="right" valign="top"><a id="a2b619f48674b897824ce2333245e04ce"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_HIBCFG_RAMCFG_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2pm_8h.html#a74cf322c7db4e2c8bc5b358e7487e0dd">PM_HIBCFG_RAMCFG_Pos</a>)</td></tr>
<tr class="separator:a2b619f48674b897824ce2333245e04ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa4c64e3ac39bf72b0a205ecbf35f84f0"><td class="memItemLeft" align="right" valign="top"><a id="aa4c64e3ac39bf72b0a205ecbf35f84f0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_HIBCFG_RAMCFG</b>(value)&#160;&#160;&#160;(PM_HIBCFG_RAMCFG_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2pm_8h.html#a74cf322c7db4e2c8bc5b358e7487e0dd">PM_HIBCFG_RAMCFG_Pos</a>))</td></tr>
<tr class="separator:aa4c64e3ac39bf72b0a205ecbf35f84f0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abc777f96e1e35918d06259d2d87a0490"><td class="memItemLeft" align="right" valign="top"><a id="abc777f96e1e35918d06259d2d87a0490"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#abc777f96e1e35918d06259d2d87a0490">PM_HIBCFG_BRAMCFG_Pos</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:abc777f96e1e35918d06259d2d87a0490"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_HIBCFG) Backup Ram Configuration <br /></td></tr>
<tr class="separator:abc777f96e1e35918d06259d2d87a0490"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af2fa13439fba5cb829c197ab18d95831"><td class="memItemLeft" align="right" valign="top"><a id="af2fa13439fba5cb829c197ab18d95831"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_HIBCFG_BRAMCFG_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2pm_8h.html#abc777f96e1e35918d06259d2d87a0490">PM_HIBCFG_BRAMCFG_Pos</a>)</td></tr>
<tr class="separator:af2fa13439fba5cb829c197ab18d95831"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aca1dcbbaa70465ce29ddb9b72af1a2b5"><td class="memItemLeft" align="right" valign="top"><a id="aca1dcbbaa70465ce29ddb9b72af1a2b5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_HIBCFG_BRAMCFG</b>(value)&#160;&#160;&#160;(PM_HIBCFG_BRAMCFG_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2pm_8h.html#abc777f96e1e35918d06259d2d87a0490">PM_HIBCFG_BRAMCFG_Pos</a>))</td></tr>
<tr class="separator:aca1dcbbaa70465ce29ddb9b72af1a2b5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aff03e2db52cd5d012b08d06bef47c143"><td class="memItemLeft" align="right" valign="top"><a id="aff03e2db52cd5d012b08d06bef47c143"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#aff03e2db52cd5d012b08d06bef47c143">PM_HIBCFG_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0F)</td></tr>
<tr class="memdesc:aff03e2db52cd5d012b08d06bef47c143"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_HIBCFG) MASK Register <br /></td></tr>
<tr class="separator:aff03e2db52cd5d012b08d06bef47c143"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a740e0f452171d6f7228b7ec31d6a789b"><td class="memItemLeft" align="right" valign="top"><a id="a740e0f452171d6f7228b7ec31d6a789b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a740e0f452171d6f7228b7ec31d6a789b">PM_BKUPCFG_OFFSET</a>&#160;&#160;&#160;0x0A</td></tr>
<tr class="memdesc:a740e0f452171d6f7228b7ec31d6a789b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_BKUPCFG offset) Backup Configuration <br /></td></tr>
<tr class="separator:a740e0f452171d6f7228b7ec31d6a789b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3ebbff184fdf40478ee97b2ecf88773b"><td class="memItemLeft" align="right" valign="top"><a id="a3ebbff184fdf40478ee97b2ecf88773b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a3ebbff184fdf40478ee97b2ecf88773b">PM_BKUPCFG_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a3ebbff184fdf40478ee97b2ecf88773b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_BKUPCFG reset_value) Backup Configuration <br /></td></tr>
<tr class="separator:a3ebbff184fdf40478ee97b2ecf88773b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a97f56fa65dc62e0e0ed020ae6b634b92"><td class="memItemLeft" align="right" valign="top"><a id="a97f56fa65dc62e0e0ed020ae6b634b92"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a97f56fa65dc62e0e0ed020ae6b634b92">PM_BKUPCFG_BRAMCFG_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a97f56fa65dc62e0e0ed020ae6b634b92"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_BKUPCFG) Ram Configuration <br /></td></tr>
<tr class="separator:a97f56fa65dc62e0e0ed020ae6b634b92"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a30bca634b51c072c058507e9aa379db4"><td class="memItemLeft" align="right" valign="top"><a id="a30bca634b51c072c058507e9aa379db4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_BKUPCFG_BRAMCFG_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2pm_8h.html#a97f56fa65dc62e0e0ed020ae6b634b92">PM_BKUPCFG_BRAMCFG_Pos</a>)</td></tr>
<tr class="separator:a30bca634b51c072c058507e9aa379db4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af7153e3df7626f9fa7a8f9ed0cb6a1ed"><td class="memItemLeft" align="right" valign="top"><a id="af7153e3df7626f9fa7a8f9ed0cb6a1ed"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_BKUPCFG_BRAMCFG</b>(value)&#160;&#160;&#160;(PM_BKUPCFG_BRAMCFG_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2pm_8h.html#a97f56fa65dc62e0e0ed020ae6b634b92">PM_BKUPCFG_BRAMCFG_Pos</a>))</td></tr>
<tr class="separator:af7153e3df7626f9fa7a8f9ed0cb6a1ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af61363bc17d23afcccae80b52da05234"><td class="memItemLeft" align="right" valign="top"><a id="af61363bc17d23afcccae80b52da05234"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#af61363bc17d23afcccae80b52da05234">PM_BKUPCFG_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x03)</td></tr>
<tr class="memdesc:af61363bc17d23afcccae80b52da05234"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_BKUPCFG) MASK Register <br /></td></tr>
<tr class="separator:af61363bc17d23afcccae80b52da05234"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abdbff3c9deb90644b518a60253972c5d"><td class="memItemLeft" align="right" valign="top"><a id="abdbff3c9deb90644b518a60253972c5d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#abdbff3c9deb90644b518a60253972c5d">PM_PWSAKDLY_OFFSET</a>&#160;&#160;&#160;0x12</td></tr>
<tr class="memdesc:abdbff3c9deb90644b518a60253972c5d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_PWSAKDLY offset) Power Switch Acknowledge Delay <br /></td></tr>
<tr class="separator:abdbff3c9deb90644b518a60253972c5d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab7eb4f5579cf6c78d5780e3fd703e98d"><td class="memItemLeft" align="right" valign="top"><a id="ab7eb4f5579cf6c78d5780e3fd703e98d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#ab7eb4f5579cf6c78d5780e3fd703e98d">PM_PWSAKDLY_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:ab7eb4f5579cf6c78d5780e3fd703e98d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_PWSAKDLY reset_value) Power Switch Acknowledge Delay <br /></td></tr>
<tr class="separator:ab7eb4f5579cf6c78d5780e3fd703e98d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a161c5ac97a5a4695c56eb9e5d99454ed"><td class="memItemLeft" align="right" valign="top"><a id="a161c5ac97a5a4695c56eb9e5d99454ed"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#a161c5ac97a5a4695c56eb9e5d99454ed">PM_PWSAKDLY_DLYVAL_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a161c5ac97a5a4695c56eb9e5d99454ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_PWSAKDLY) Delay Value <br /></td></tr>
<tr class="separator:a161c5ac97a5a4695c56eb9e5d99454ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aedf7554a925ba9ada847c946ce1f2be1"><td class="memItemLeft" align="right" valign="top"><a id="aedf7554a925ba9ada847c946ce1f2be1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_PWSAKDLY_DLYVAL_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7F) &lt;&lt; <a class="el" href="component_2pm_8h.html#a161c5ac97a5a4695c56eb9e5d99454ed">PM_PWSAKDLY_DLYVAL_Pos</a>)</td></tr>
<tr class="separator:aedf7554a925ba9ada847c946ce1f2be1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad14cac0eac25cbcc9cadc23798592bca"><td class="memItemLeft" align="right" valign="top"><a id="ad14cac0eac25cbcc9cadc23798592bca"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_PWSAKDLY_DLYVAL</b>(value)&#160;&#160;&#160;(PM_PWSAKDLY_DLYVAL_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2pm_8h.html#a161c5ac97a5a4695c56eb9e5d99454ed">PM_PWSAKDLY_DLYVAL_Pos</a>))</td></tr>
<tr class="separator:ad14cac0eac25cbcc9cadc23798592bca"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad9f7ff35a1092e97c24b88a8ec82b692"><td class="memItemLeft" align="right" valign="top"><a id="ad9f7ff35a1092e97c24b88a8ec82b692"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#ad9f7ff35a1092e97c24b88a8ec82b692">PM_PWSAKDLY_IGNACK_Pos</a>&#160;&#160;&#160;7</td></tr>
<tr class="memdesc:ad9f7ff35a1092e97c24b88a8ec82b692"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_PWSAKDLY) Ignore Acknowledge <br /></td></tr>
<tr class="separator:ad9f7ff35a1092e97c24b88a8ec82b692"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab1af84adcc08e34ef6d77a701f12c72d"><td class="memItemLeft" align="right" valign="top"><a id="ab1af84adcc08e34ef6d77a701f12c72d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PM_PWSAKDLY_IGNACK</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2pm_8h.html#ad9f7ff35a1092e97c24b88a8ec82b692">PM_PWSAKDLY_IGNACK_Pos</a>)</td></tr>
<tr class="separator:ab1af84adcc08e34ef6d77a701f12c72d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab5db0ec95c8f83c78fe258c4747a83cc"><td class="memItemLeft" align="right" valign="top"><a id="ab5db0ec95c8f83c78fe258c4747a83cc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2pm_8h.html#ab5db0ec95c8f83c78fe258c4747a83cc">PM_PWSAKDLY_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF)</td></tr>
<tr class="memdesc:ab5db0ec95c8f83c78fe258c4747a83cc"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PM_PWSAKDLY) MASK Register <br /></td></tr>
<tr class="separator:ab5db0ec95c8f83c78fe258c4747a83cc"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Component description for PM. </p>
<p>Copyright (c) 2019 Microchip Technology Inc.</p>
<p>\asf_license_start </p>
<p class="definition">Definition in file <a class="el" href="component_2pm_8h_source.html">pm.h</a>.</p>
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<a href="component_2pm_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_PM_COMPONENT_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_PM_COMPONENT_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="comment">/* ========================================================================== */</span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160; </div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define PM_U2406</span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define REV_PM 0x100</span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160; </div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="comment">/* -------- PM_CTRLA : (PM Offset: 0x00) (R/W 8) Control A -------- */</span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00044"></a><span class="lineno"><a class="line" href="unionPM__CTRLA__Type.html"> 44</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00046"></a><span class="lineno"><a class="line" href="unionPM__CTRLA__Type.html#a10e22af4411c09f09e85fe4e602bdd87"> 46</a></span>&#160; uint8_t :2; </div>
<div class="line"><a name="l00047"></a><span class="lineno"><a class="line" href="unionPM__CTRLA__Type.html#a115f73d46fbe0a126716a07cc568c54f"> 47</a></span>&#160; uint8_t <a class="code" href="unionPM__CTRLA__Type.html#a115f73d46fbe0a126716a07cc568c54f">IORET</a>:1; </div>
<div class="line"><a name="l00048"></a><span class="lineno"><a class="line" href="unionPM__CTRLA__Type.html#a04093a0998d7b942dfa073f1b8527e89"> 48</a></span>&#160; uint8_t :5; </div>
<div class="line"><a name="l00049"></a><span class="lineno"><a class="line" href="unionPM__CTRLA__Type.html#a827f6e8656ed8a03d37ac171314e2655"> 49</a></span>&#160; } bit; </div>
<div class="line"><a name="l00050"></a><span class="lineno"><a class="line" href="unionPM__CTRLA__Type.html#ae9fcc0678a177091f73b8d243aa62acd"> 50</a></span>&#160; uint8_t <a class="code" href="unionPM__CTRLA__Type.html#ae9fcc0678a177091f73b8d243aa62acd">reg</a>; </div>
<div class="line"><a name="l00051"></a><span class="lineno"> 51</span>&#160;} <a class="code" href="unionPM__CTRLA__Type.html">PM_CTRLA_Type</a>;</div>
<div class="line"><a name="l00052"></a><span class="lineno"> 52</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00053"></a><span class="lineno"> 53</span>&#160; </div>
<div class="line"><a name="l00054"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#ac47de8c1c1280430ce8873f9ef37e6f3"> 54</a></span>&#160;<span class="preprocessor">#define PM_CTRLA_OFFSET 0x00 </span></div>
<div class="line"><a name="l00055"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a78f1f5bb930dafe9d37737015e35f096"> 55</a></span>&#160;<span class="preprocessor">#define PM_CTRLA_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00057"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#ad2bf677585d69908c39a132d5c978166"> 57</a></span>&#160;<span class="preprocessor">#define PM_CTRLA_IORET_Pos 2 </span></div>
<div class="line"><a name="l00058"></a><span class="lineno"> 58</span>&#160;<span class="preprocessor">#define PM_CTRLA_IORET (_U_(0x1) &lt;&lt; PM_CTRLA_IORET_Pos)</span></div>
<div class="line"><a name="l00059"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a9dc3e7122cd1ad4fe6d1764dbabc1957"> 59</a></span>&#160;<span class="preprocessor">#define PM_CTRLA_MASK _U_(0x04) </span></div>
<div class="line"><a name="l00061"></a><span class="lineno"> 61</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PM_SLEEPCFG : (PM Offset: 0x01) (R/W 8) Sleep Configuration -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00062"></a><span class="lineno"> 62</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00063"></a><span class="lineno"><a class="line" href="unionPM__SLEEPCFG__Type.html"> 63</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00064"></a><span class="lineno"> 64</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00065"></a><span class="lineno"><a class="line" href="unionPM__SLEEPCFG__Type.html#af5f310d047324bf1d7288227de8a8558"> 65</a></span>&#160; uint8_t <a class="code" href="unionPM__SLEEPCFG__Type.html#af5f310d047324bf1d7288227de8a8558">SLEEPMODE</a>:3; </div>
<div class="line"><a name="l00066"></a><span class="lineno"><a class="line" href="unionPM__SLEEPCFG__Type.html#af1ceac300fe4d0cce4188e54f72dc3d9"> 66</a></span>&#160; uint8_t :5; </div>
<div class="line"><a name="l00067"></a><span class="lineno"><a class="line" href="unionPM__SLEEPCFG__Type.html#ad9c48873c69909685e9c02b67cb807ee"> 67</a></span>&#160; } bit; </div>
<div class="line"><a name="l00068"></a><span class="lineno"><a class="line" href="unionPM__SLEEPCFG__Type.html#a3bc7b75f0440e924138812f0b313ba73"> 68</a></span>&#160; uint8_t <a class="code" href="unionPM__SLEEPCFG__Type.html#a3bc7b75f0440e924138812f0b313ba73">reg</a>; </div>
<div class="line"><a name="l00069"></a><span class="lineno"> 69</span>&#160;} <a class="code" href="unionPM__SLEEPCFG__Type.html">PM_SLEEPCFG_Type</a>;</div>
<div class="line"><a name="l00070"></a><span class="lineno"> 70</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00071"></a><span class="lineno"> 71</span>&#160; </div>
<div class="line"><a name="l00072"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#aaf4fb96895e38d59c94cd6b6991cd97f"> 72</a></span>&#160;<span class="preprocessor">#define PM_SLEEPCFG_OFFSET 0x01 </span></div>
<div class="line"><a name="l00073"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a23e99f0924363f28017cdd0d725efb7a"> 73</a></span>&#160;<span class="preprocessor">#define PM_SLEEPCFG_RESETVALUE _U_(0x02) </span></div>
<div class="line"><a name="l00075"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a35bc67c3429373f2ad67992a2c731a59"> 75</a></span>&#160;<span class="preprocessor">#define PM_SLEEPCFG_SLEEPMODE_Pos 0 </span></div>
<div class="line"><a name="l00076"></a><span class="lineno"> 76</span>&#160;<span class="preprocessor">#define PM_SLEEPCFG_SLEEPMODE_Msk (_U_(0x7) &lt;&lt; PM_SLEEPCFG_SLEEPMODE_Pos)</span></div>
<div class="line"><a name="l00077"></a><span class="lineno"> 77</span>&#160;<span class="preprocessor">#define PM_SLEEPCFG_SLEEPMODE(value) (PM_SLEEPCFG_SLEEPMODE_Msk &amp; ((value) &lt;&lt; PM_SLEEPCFG_SLEEPMODE_Pos))</span></div>
<div class="line"><a name="l00078"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#aeac8be8e55515e28ce319c353cb7f1e2"> 78</a></span>&#160;<span class="preprocessor">#define PM_SLEEPCFG_SLEEPMODE_IDLE0_Val _U_(0x0) </span></div>
<div class="line"><a name="l00079"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#affca82a32fcc77efc796ad8113fc2624"> 79</a></span>&#160;<span class="preprocessor">#define PM_SLEEPCFG_SLEEPMODE_IDLE1_Val _U_(0x1) </span></div>
<div class="line"><a name="l00080"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#aa39bc5c9c9144b45a525dbac465c4603"> 80</a></span>&#160;<span class="preprocessor">#define PM_SLEEPCFG_SLEEPMODE_IDLE2_Val _U_(0x2) </span></div>
<div class="line"><a name="l00081"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#afad7594ad3c4bf0e456b4686140360c1"> 81</a></span>&#160;<span class="preprocessor">#define PM_SLEEPCFG_SLEEPMODE_STANDBY_Val _U_(0x4) </span></div>
<div class="line"><a name="l00082"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#adba39a3c4f17a562539c9c6f166b0f9c"> 82</a></span>&#160;<span class="preprocessor">#define PM_SLEEPCFG_SLEEPMODE_HIBERNATE_Val _U_(0x5) </span></div>
<div class="line"><a name="l00083"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a4fa413e3dd29c199b7ad62c4f8f533ea"> 83</a></span>&#160;<span class="preprocessor">#define PM_SLEEPCFG_SLEEPMODE_BACKUP_Val _U_(0x6) </span></div>
<div class="line"><a name="l00084"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a7f882d1a05a4bc12d6b2a16f5556d294"> 84</a></span>&#160;<span class="preprocessor">#define PM_SLEEPCFG_SLEEPMODE_OFF_Val _U_(0x7) </span></div>
<div class="line"><a name="l00085"></a><span class="lineno"> 85</span>&#160;<span class="preprocessor">#define PM_SLEEPCFG_SLEEPMODE_IDLE0 (PM_SLEEPCFG_SLEEPMODE_IDLE0_Val &lt;&lt; PM_SLEEPCFG_SLEEPMODE_Pos)</span></div>
<div class="line"><a name="l00086"></a><span class="lineno"> 86</span>&#160;<span class="preprocessor">#define PM_SLEEPCFG_SLEEPMODE_IDLE1 (PM_SLEEPCFG_SLEEPMODE_IDLE1_Val &lt;&lt; PM_SLEEPCFG_SLEEPMODE_Pos)</span></div>
<div class="line"><a name="l00087"></a><span class="lineno"> 87</span>&#160;<span class="preprocessor">#define PM_SLEEPCFG_SLEEPMODE_IDLE2 (PM_SLEEPCFG_SLEEPMODE_IDLE2_Val &lt;&lt; PM_SLEEPCFG_SLEEPMODE_Pos)</span></div>
<div class="line"><a name="l00088"></a><span class="lineno"> 88</span>&#160;<span class="preprocessor">#define PM_SLEEPCFG_SLEEPMODE_STANDBY (PM_SLEEPCFG_SLEEPMODE_STANDBY_Val &lt;&lt; PM_SLEEPCFG_SLEEPMODE_Pos)</span></div>
<div class="line"><a name="l00089"></a><span class="lineno"> 89</span>&#160;<span class="preprocessor">#define PM_SLEEPCFG_SLEEPMODE_HIBERNATE (PM_SLEEPCFG_SLEEPMODE_HIBERNATE_Val &lt;&lt; PM_SLEEPCFG_SLEEPMODE_Pos)</span></div>
<div class="line"><a name="l00090"></a><span class="lineno"> 90</span>&#160;<span class="preprocessor">#define PM_SLEEPCFG_SLEEPMODE_BACKUP (PM_SLEEPCFG_SLEEPMODE_BACKUP_Val &lt;&lt; PM_SLEEPCFG_SLEEPMODE_Pos)</span></div>
<div class="line"><a name="l00091"></a><span class="lineno"> 91</span>&#160;<span class="preprocessor">#define PM_SLEEPCFG_SLEEPMODE_OFF (PM_SLEEPCFG_SLEEPMODE_OFF_Val &lt;&lt; PM_SLEEPCFG_SLEEPMODE_Pos)</span></div>
<div class="line"><a name="l00092"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a589930f958b6d1b101228160b09263c8"> 92</a></span>&#160;<span class="preprocessor">#define PM_SLEEPCFG_MASK _U_(0x07) </span></div>
<div class="line"><a name="l00094"></a><span class="lineno"> 94</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PM_INTENCLR : (PM Offset: 0x04) (R/W 8) Interrupt Enable Clear -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00095"></a><span class="lineno"> 95</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00096"></a><span class="lineno"><a class="line" href="unionPM__INTENCLR__Type.html"> 96</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00097"></a><span class="lineno"> 97</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00098"></a><span class="lineno"><a class="line" href="unionPM__INTENCLR__Type.html#ad41dd4695a53feace4d0b1a23ad55ca6"> 98</a></span>&#160; uint8_t <a class="code" href="unionPM__INTENCLR__Type.html#ad41dd4695a53feace4d0b1a23ad55ca6">SLEEPRDY</a>:1; </div>
<div class="line"><a name="l00099"></a><span class="lineno"><a class="line" href="unionPM__INTENCLR__Type.html#aae873435d8c48a8297b86206aa68bfa3"> 99</a></span>&#160; uint8_t :7; </div>
<div class="line"><a name="l00100"></a><span class="lineno"><a class="line" href="unionPM__INTENCLR__Type.html#a69524a3f5e00993dd44a06060496d866"> 100</a></span>&#160; } bit; </div>
<div class="line"><a name="l00101"></a><span class="lineno"><a class="line" href="unionPM__INTENCLR__Type.html#a6d8b0b5c281b9d15d9709302ae515f07"> 101</a></span>&#160; uint8_t <a class="code" href="unionPM__INTENCLR__Type.html#a6d8b0b5c281b9d15d9709302ae515f07">reg</a>; </div>
<div class="line"><a name="l00102"></a><span class="lineno"> 102</span>&#160;} <a class="code" href="unionPM__INTENCLR__Type.html">PM_INTENCLR_Type</a>;</div>
<div class="line"><a name="l00103"></a><span class="lineno"> 103</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00104"></a><span class="lineno"> 104</span>&#160; </div>
<div class="line"><a name="l00105"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a96e613f029988a0e97e71761daab56d8"> 105</a></span>&#160;<span class="preprocessor">#define PM_INTENCLR_OFFSET 0x04 </span></div>
<div class="line"><a name="l00106"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a6af1e46f631f08562f2affcba415c69c"> 106</a></span>&#160;<span class="preprocessor">#define PM_INTENCLR_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00108"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a53d5b03084c74af386cfa20c69cfe302"> 108</a></span>&#160;<span class="preprocessor">#define PM_INTENCLR_SLEEPRDY_Pos 0 </span></div>
<div class="line"><a name="l00109"></a><span class="lineno"> 109</span>&#160;<span class="preprocessor">#define PM_INTENCLR_SLEEPRDY (_U_(0x1) &lt;&lt; PM_INTENCLR_SLEEPRDY_Pos)</span></div>
<div class="line"><a name="l00110"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a69858d0d83319582e961338ebf0e6def"> 110</a></span>&#160;<span class="preprocessor">#define PM_INTENCLR_MASK _U_(0x01) </span></div>
<div class="line"><a name="l00112"></a><span class="lineno"> 112</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PM_INTENSET : (PM Offset: 0x05) (R/W 8) Interrupt Enable Set -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00113"></a><span class="lineno"> 113</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00114"></a><span class="lineno"><a class="line" href="unionPM__INTENSET__Type.html"> 114</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00115"></a><span class="lineno"> 115</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00116"></a><span class="lineno"><a class="line" href="unionPM__INTENSET__Type.html#a7ec5c08ca19bf81d361dc5fe30d42a7b"> 116</a></span>&#160; uint8_t <a class="code" href="unionPM__INTENSET__Type.html#a7ec5c08ca19bf81d361dc5fe30d42a7b">SLEEPRDY</a>:1; </div>
<div class="line"><a name="l00117"></a><span class="lineno"><a class="line" href="unionPM__INTENSET__Type.html#ab6c27de46ad9e346d7f8e0350af7ceae"> 117</a></span>&#160; uint8_t :7; </div>
<div class="line"><a name="l00118"></a><span class="lineno"><a class="line" href="unionPM__INTENSET__Type.html#a2d802a5fe7e7e22e51c1e0e8c1803808"> 118</a></span>&#160; } bit; </div>
<div class="line"><a name="l00119"></a><span class="lineno"><a class="line" href="unionPM__INTENSET__Type.html#aea623941e13f9fa48547ffd84350bbf8"> 119</a></span>&#160; uint8_t <a class="code" href="unionPM__INTENSET__Type.html#aea623941e13f9fa48547ffd84350bbf8">reg</a>; </div>
<div class="line"><a name="l00120"></a><span class="lineno"> 120</span>&#160;} <a class="code" href="unionPM__INTENSET__Type.html">PM_INTENSET_Type</a>;</div>
<div class="line"><a name="l00121"></a><span class="lineno"> 121</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00122"></a><span class="lineno"> 122</span>&#160; </div>
<div class="line"><a name="l00123"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#acbb9e160784aa556b444d77c22d69b5e"> 123</a></span>&#160;<span class="preprocessor">#define PM_INTENSET_OFFSET 0x05 </span></div>
<div class="line"><a name="l00124"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a1ff5cf286622565d1fdcfcae1e552bfd"> 124</a></span>&#160;<span class="preprocessor">#define PM_INTENSET_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00126"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#ab4bf05279c0dbfd3874d555d8ed34d76"> 126</a></span>&#160;<span class="preprocessor">#define PM_INTENSET_SLEEPRDY_Pos 0 </span></div>
<div class="line"><a name="l00127"></a><span class="lineno"> 127</span>&#160;<span class="preprocessor">#define PM_INTENSET_SLEEPRDY (_U_(0x1) &lt;&lt; PM_INTENSET_SLEEPRDY_Pos)</span></div>
<div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a913aa0f4020e344151814557d64767d7"> 128</a></span>&#160;<span class="preprocessor">#define PM_INTENSET_MASK _U_(0x01) </span></div>
<div class="line"><a name="l00130"></a><span class="lineno"> 130</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PM_INTFLAG : (PM Offset: 0x06) (R/W 8) Interrupt Flag Status and Clear -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00131"></a><span class="lineno"> 131</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00132"></a><span class="lineno"><a class="line" href="unionPM__INTFLAG__Type.html"> 132</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{ <span class="comment">// __I to avoid read-modify-write on write-to-clear register</span></div>
<div class="line"><a name="l00133"></a><span class="lineno"> 133</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00134"></a><span class="lineno"><a class="line" href="unionPM__INTFLAG__Type.html#a570eaac6b13e6eebe070ee735d084a8b"> 134</a></span>&#160; __I uint8_t <a class="code" href="unionPM__INTFLAG__Type.html#a570eaac6b13e6eebe070ee735d084a8b">SLEEPRDY</a>:1; </div>
<div class="line"><a name="l00135"></a><span class="lineno"><a class="line" href="unionPM__INTFLAG__Type.html#a8fa12a38bd1b48716eb6f33c6569f8a5"> 135</a></span>&#160; __I <a class="code" href="unionPM__INTFLAG__Type.html#a8fa12a38bd1b48716eb6f33c6569f8a5">uint8_t</a> :7; </div>
<div class="line"><a name="l00136"></a><span class="lineno"><a class="line" href="unionPM__INTFLAG__Type.html#a10d82e3f7d2548bd8cc30f8c8f5ce2b2"> 136</a></span>&#160; } bit; </div>
<div class="line"><a name="l00137"></a><span class="lineno"><a class="line" href="unionPM__INTFLAG__Type.html#a02f67588995f159aa56ced08b2280c40"> 137</a></span>&#160; uint8_t <a class="code" href="unionPM__INTFLAG__Type.html#a02f67588995f159aa56ced08b2280c40">reg</a>; </div>
<div class="line"><a name="l00138"></a><span class="lineno"> 138</span>&#160;} <a class="code" href="unionPM__INTFLAG__Type.html">PM_INTFLAG_Type</a>;</div>
<div class="line"><a name="l00139"></a><span class="lineno"> 139</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00140"></a><span class="lineno"> 140</span>&#160; </div>
<div class="line"><a name="l00141"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a9f885fcf58926ce0a55a0cb84523b6cc"> 141</a></span>&#160;<span class="preprocessor">#define PM_INTFLAG_OFFSET 0x06 </span></div>
<div class="line"><a name="l00142"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a75ec112ff873ab4855f99087a5023b13"> 142</a></span>&#160;<span class="preprocessor">#define PM_INTFLAG_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00144"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a9dd60c8172dae7e81853e64080fc8a6d"> 144</a></span>&#160;<span class="preprocessor">#define PM_INTFLAG_SLEEPRDY_Pos 0 </span></div>
<div class="line"><a name="l00145"></a><span class="lineno"> 145</span>&#160;<span class="preprocessor">#define PM_INTFLAG_SLEEPRDY (_U_(0x1) &lt;&lt; PM_INTFLAG_SLEEPRDY_Pos)</span></div>
<div class="line"><a name="l00146"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#ac5ddba598ffebe3739bbba90116b3ba3"> 146</a></span>&#160;<span class="preprocessor">#define PM_INTFLAG_MASK _U_(0x01) </span></div>
<div class="line"><a name="l00148"></a><span class="lineno"> 148</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PM_STDBYCFG : (PM Offset: 0x08) (R/W 8) Standby Configuration -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00149"></a><span class="lineno"> 149</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00150"></a><span class="lineno"><a class="line" href="unionPM__STDBYCFG__Type.html"> 150</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00151"></a><span class="lineno"> 151</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00152"></a><span class="lineno"><a class="line" href="unionPM__STDBYCFG__Type.html#af503533c38a840b5af2dc2a35ddcfc61"> 152</a></span>&#160; uint8_t <a class="code" href="unionPM__STDBYCFG__Type.html#af503533c38a840b5af2dc2a35ddcfc61">RAMCFG</a>:2; </div>
<div class="line"><a name="l00153"></a><span class="lineno"><a class="line" href="unionPM__STDBYCFG__Type.html#a0cd7aee7207c208c28d8cb3eb4ce2e7a"> 153</a></span>&#160; uint8_t :2; </div>
<div class="line"><a name="l00154"></a><span class="lineno"><a class="line" href="unionPM__STDBYCFG__Type.html#aa94f621ae28b5ea3258c168f810eeb3b"> 154</a></span>&#160; uint8_t <a class="code" href="unionPM__STDBYCFG__Type.html#aa94f621ae28b5ea3258c168f810eeb3b">FASTWKUP</a>:2; </div>
<div class="line"><a name="l00155"></a><span class="lineno"><a class="line" href="unionPM__STDBYCFG__Type.html#a4c4b05d7f0462121dbbae3108c16ea80"> 155</a></span>&#160; uint8_t :2; </div>
<div class="line"><a name="l00156"></a><span class="lineno"><a class="line" href="unionPM__STDBYCFG__Type.html#afde71eaf8a192e9b60be16b09de32765"> 156</a></span>&#160; } bit; </div>
<div class="line"><a name="l00157"></a><span class="lineno"><a class="line" href="unionPM__STDBYCFG__Type.html#aca45bfff581cac022d98d2a80066d157"> 157</a></span>&#160; uint8_t <a class="code" href="unionPM__STDBYCFG__Type.html#aca45bfff581cac022d98d2a80066d157">reg</a>; </div>
<div class="line"><a name="l00158"></a><span class="lineno"> 158</span>&#160;} <a class="code" href="unionPM__STDBYCFG__Type.html">PM_STDBYCFG_Type</a>;</div>
<div class="line"><a name="l00159"></a><span class="lineno"> 159</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00160"></a><span class="lineno"> 160</span>&#160; </div>
<div class="line"><a name="l00161"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#af4b99f5917c042cf00e7aa0ddfcefb5a"> 161</a></span>&#160;<span class="preprocessor">#define PM_STDBYCFG_OFFSET 0x08 </span></div>
<div class="line"><a name="l00162"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a31844cf2eeaf7b9dc7de67de663967ec"> 162</a></span>&#160;<span class="preprocessor">#define PM_STDBYCFG_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00164"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#aedbb80b7b88e3a26e07ccdeaceddceba"> 164</a></span>&#160;<span class="preprocessor">#define PM_STDBYCFG_RAMCFG_Pos 0 </span></div>
<div class="line"><a name="l00165"></a><span class="lineno"> 165</span>&#160;<span class="preprocessor">#define PM_STDBYCFG_RAMCFG_Msk (_U_(0x3) &lt;&lt; PM_STDBYCFG_RAMCFG_Pos)</span></div>
<div class="line"><a name="l00166"></a><span class="lineno"> 166</span>&#160;<span class="preprocessor">#define PM_STDBYCFG_RAMCFG(value) (PM_STDBYCFG_RAMCFG_Msk &amp; ((value) &lt;&lt; PM_STDBYCFG_RAMCFG_Pos))</span></div>
<div class="line"><a name="l00167"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a62b99fadcfea459ad6701424bc20534a"> 167</a></span>&#160;<span class="preprocessor">#define PM_STDBYCFG_RAMCFG_RET_Val _U_(0x0) </span></div>
<div class="line"><a name="l00168"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#ad311d6ab5de711be8606c7af3562e643"> 168</a></span>&#160;<span class="preprocessor">#define PM_STDBYCFG_RAMCFG_PARTIAL_Val _U_(0x1) </span></div>
<div class="line"><a name="l00169"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#ac2d2a831540877e815821835e4f93e37"> 169</a></span>&#160;<span class="preprocessor">#define PM_STDBYCFG_RAMCFG_OFF_Val _U_(0x2) </span></div>
<div class="line"><a name="l00170"></a><span class="lineno"> 170</span>&#160;<span class="preprocessor">#define PM_STDBYCFG_RAMCFG_RET (PM_STDBYCFG_RAMCFG_RET_Val &lt;&lt; PM_STDBYCFG_RAMCFG_Pos)</span></div>
<div class="line"><a name="l00171"></a><span class="lineno"> 171</span>&#160;<span class="preprocessor">#define PM_STDBYCFG_RAMCFG_PARTIAL (PM_STDBYCFG_RAMCFG_PARTIAL_Val &lt;&lt; PM_STDBYCFG_RAMCFG_Pos)</span></div>
<div class="line"><a name="l00172"></a><span class="lineno"> 172</span>&#160;<span class="preprocessor">#define PM_STDBYCFG_RAMCFG_OFF (PM_STDBYCFG_RAMCFG_OFF_Val &lt;&lt; PM_STDBYCFG_RAMCFG_Pos)</span></div>
<div class="line"><a name="l00173"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a6bbc1643cec5ceec7f8405595f0b3a67"> 173</a></span>&#160;<span class="preprocessor">#define PM_STDBYCFG_FASTWKUP_Pos 4 </span></div>
<div class="line"><a name="l00174"></a><span class="lineno"> 174</span>&#160;<span class="preprocessor">#define PM_STDBYCFG_FASTWKUP_Msk (_U_(0x3) &lt;&lt; PM_STDBYCFG_FASTWKUP_Pos)</span></div>
<div class="line"><a name="l00175"></a><span class="lineno"> 175</span>&#160;<span class="preprocessor">#define PM_STDBYCFG_FASTWKUP(value) (PM_STDBYCFG_FASTWKUP_Msk &amp; ((value) &lt;&lt; PM_STDBYCFG_FASTWKUP_Pos))</span></div>
<div class="line"><a name="l00176"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a9bbd6af7e430a29d33dbcebefe7d32d9"> 176</a></span>&#160;<span class="preprocessor">#define PM_STDBYCFG_MASK _U_(0x33) </span></div>
<div class="line"><a name="l00178"></a><span class="lineno"> 178</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PM_HIBCFG : (PM Offset: 0x09) (R/W 8) Hibernate Configuration -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00179"></a><span class="lineno"> 179</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00180"></a><span class="lineno"><a class="line" href="unionPM__HIBCFG__Type.html"> 180</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00181"></a><span class="lineno"> 181</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00182"></a><span class="lineno"><a class="line" href="unionPM__HIBCFG__Type.html#a104edcec40c6ca17beb1f46f52f078db"> 182</a></span>&#160; uint8_t <a class="code" href="unionPM__HIBCFG__Type.html#a104edcec40c6ca17beb1f46f52f078db">RAMCFG</a>:2; </div>
<div class="line"><a name="l00183"></a><span class="lineno"><a class="line" href="unionPM__HIBCFG__Type.html#a97439f5b52e448f0ea576dadb361c885"> 183</a></span>&#160; uint8_t <a class="code" href="unionPM__HIBCFG__Type.html#a97439f5b52e448f0ea576dadb361c885">BRAMCFG</a>:2; </div>
<div class="line"><a name="l00184"></a><span class="lineno"><a class="line" href="unionPM__HIBCFG__Type.html#aa0af1b34a9769ff6db91a1af05ae8a93"> 184</a></span>&#160; uint8_t :4; </div>
<div class="line"><a name="l00185"></a><span class="lineno"><a class="line" href="unionPM__HIBCFG__Type.html#ab4e286fcdcec934661121dcf7f4dace3"> 185</a></span>&#160; } bit; </div>
<div class="line"><a name="l00186"></a><span class="lineno"><a class="line" href="unionPM__HIBCFG__Type.html#a20dc824c9375df893fc48a3cb46d16ee"> 186</a></span>&#160; uint8_t <a class="code" href="unionPM__HIBCFG__Type.html#a20dc824c9375df893fc48a3cb46d16ee">reg</a>; </div>
<div class="line"><a name="l00187"></a><span class="lineno"> 187</span>&#160;} <a class="code" href="unionPM__HIBCFG__Type.html">PM_HIBCFG_Type</a>;</div>
<div class="line"><a name="l00188"></a><span class="lineno"> 188</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00189"></a><span class="lineno"> 189</span>&#160; </div>
<div class="line"><a name="l00190"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#addce60b79d7abddb19658e9445ab0ff3"> 190</a></span>&#160;<span class="preprocessor">#define PM_HIBCFG_OFFSET 0x09 </span></div>
<div class="line"><a name="l00191"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#ac470ecb83bcd18448c39707021ef27c0"> 191</a></span>&#160;<span class="preprocessor">#define PM_HIBCFG_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00193"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a74cf322c7db4e2c8bc5b358e7487e0dd"> 193</a></span>&#160;<span class="preprocessor">#define PM_HIBCFG_RAMCFG_Pos 0 </span></div>
<div class="line"><a name="l00194"></a><span class="lineno"> 194</span>&#160;<span class="preprocessor">#define PM_HIBCFG_RAMCFG_Msk (_U_(0x3) &lt;&lt; PM_HIBCFG_RAMCFG_Pos)</span></div>
<div class="line"><a name="l00195"></a><span class="lineno"> 195</span>&#160;<span class="preprocessor">#define PM_HIBCFG_RAMCFG(value) (PM_HIBCFG_RAMCFG_Msk &amp; ((value) &lt;&lt; PM_HIBCFG_RAMCFG_Pos))</span></div>
<div class="line"><a name="l00196"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#abc777f96e1e35918d06259d2d87a0490"> 196</a></span>&#160;<span class="preprocessor">#define PM_HIBCFG_BRAMCFG_Pos 2 </span></div>
<div class="line"><a name="l00197"></a><span class="lineno"> 197</span>&#160;<span class="preprocessor">#define PM_HIBCFG_BRAMCFG_Msk (_U_(0x3) &lt;&lt; PM_HIBCFG_BRAMCFG_Pos)</span></div>
<div class="line"><a name="l00198"></a><span class="lineno"> 198</span>&#160;<span class="preprocessor">#define PM_HIBCFG_BRAMCFG(value) (PM_HIBCFG_BRAMCFG_Msk &amp; ((value) &lt;&lt; PM_HIBCFG_BRAMCFG_Pos))</span></div>
<div class="line"><a name="l00199"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#aff03e2db52cd5d012b08d06bef47c143"> 199</a></span>&#160;<span class="preprocessor">#define PM_HIBCFG_MASK _U_(0x0F) </span></div>
<div class="line"><a name="l00201"></a><span class="lineno"> 201</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PM_BKUPCFG : (PM Offset: 0x0A) (R/W 8) Backup Configuration -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00202"></a><span class="lineno"> 202</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00203"></a><span class="lineno"><a class="line" href="unionPM__BKUPCFG__Type.html"> 203</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00204"></a><span class="lineno"> 204</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00205"></a><span class="lineno"><a class="line" href="unionPM__BKUPCFG__Type.html#a816369be9fa671d098a82f0e9a0399c0"> 205</a></span>&#160; uint8_t <a class="code" href="unionPM__BKUPCFG__Type.html#a816369be9fa671d098a82f0e9a0399c0">BRAMCFG</a>:2; </div>
<div class="line"><a name="l00206"></a><span class="lineno"><a class="line" href="unionPM__BKUPCFG__Type.html#ad3c88213e1c7f93093683725c02e79ce"> 206</a></span>&#160; uint8_t :6; </div>
<div class="line"><a name="l00207"></a><span class="lineno"><a class="line" href="unionPM__BKUPCFG__Type.html#ad97af90af086ff98b7b40f9c342b4546"> 207</a></span>&#160; } bit; </div>
<div class="line"><a name="l00208"></a><span class="lineno"><a class="line" href="unionPM__BKUPCFG__Type.html#aa3987eacfd5238292c8094895c881138"> 208</a></span>&#160; uint8_t <a class="code" href="unionPM__BKUPCFG__Type.html#aa3987eacfd5238292c8094895c881138">reg</a>; </div>
<div class="line"><a name="l00209"></a><span class="lineno"> 209</span>&#160;} <a class="code" href="unionPM__BKUPCFG__Type.html">PM_BKUPCFG_Type</a>;</div>
<div class="line"><a name="l00210"></a><span class="lineno"> 210</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00211"></a><span class="lineno"> 211</span>&#160; </div>
<div class="line"><a name="l00212"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a740e0f452171d6f7228b7ec31d6a789b"> 212</a></span>&#160;<span class="preprocessor">#define PM_BKUPCFG_OFFSET 0x0A </span></div>
<div class="line"><a name="l00213"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a3ebbff184fdf40478ee97b2ecf88773b"> 213</a></span>&#160;<span class="preprocessor">#define PM_BKUPCFG_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00215"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a97f56fa65dc62e0e0ed020ae6b634b92"> 215</a></span>&#160;<span class="preprocessor">#define PM_BKUPCFG_BRAMCFG_Pos 0 </span></div>
<div class="line"><a name="l00216"></a><span class="lineno"> 216</span>&#160;<span class="preprocessor">#define PM_BKUPCFG_BRAMCFG_Msk (_U_(0x3) &lt;&lt; PM_BKUPCFG_BRAMCFG_Pos)</span></div>
<div class="line"><a name="l00217"></a><span class="lineno"> 217</span>&#160;<span class="preprocessor">#define PM_BKUPCFG_BRAMCFG(value) (PM_BKUPCFG_BRAMCFG_Msk &amp; ((value) &lt;&lt; PM_BKUPCFG_BRAMCFG_Pos))</span></div>
<div class="line"><a name="l00218"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#af61363bc17d23afcccae80b52da05234"> 218</a></span>&#160;<span class="preprocessor">#define PM_BKUPCFG_MASK _U_(0x03) </span></div>
<div class="line"><a name="l00220"></a><span class="lineno"> 220</span>&#160;<span class="preprocessor"></span><span class="comment">/* -------- PM_PWSAKDLY : (PM Offset: 0x12) (R/W 8) Power Switch Acknowledge Delay -------- */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00221"></a><span class="lineno"> 221</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00222"></a><span class="lineno"><a class="line" href="unionPM__PWSAKDLY__Type.html"> 222</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
<div class="line"><a name="l00223"></a><span class="lineno"> 223</span>&#160; <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00224"></a><span class="lineno"><a class="line" href="unionPM__PWSAKDLY__Type.html#a8fd493a526a1ab5a925f50622e89b1ff"> 224</a></span>&#160; uint8_t <a class="code" href="unionPM__PWSAKDLY__Type.html#a8fd493a526a1ab5a925f50622e89b1ff">DLYVAL</a>:7; </div>
<div class="line"><a name="l00225"></a><span class="lineno"><a class="line" href="unionPM__PWSAKDLY__Type.html#a2e9322fb23abd54c959950516f256b1a"> 225</a></span>&#160; uint8_t <a class="code" href="unionPM__PWSAKDLY__Type.html#a2e9322fb23abd54c959950516f256b1a">IGNACK</a>:1; </div>
<div class="line"><a name="l00226"></a><span class="lineno"><a class="line" href="unionPM__PWSAKDLY__Type.html#a0d006611ad000005214bdc87972491cf"> 226</a></span>&#160; } bit; </div>
<div class="line"><a name="l00227"></a><span class="lineno"><a class="line" href="unionPM__PWSAKDLY__Type.html#abc365b84b22d1ca32873d77ae820599d"> 227</a></span>&#160; uint8_t <a class="code" href="unionPM__PWSAKDLY__Type.html#abc365b84b22d1ca32873d77ae820599d">reg</a>; </div>
<div class="line"><a name="l00228"></a><span class="lineno"> 228</span>&#160;} <a class="code" href="unionPM__PWSAKDLY__Type.html">PM_PWSAKDLY_Type</a>;</div>
<div class="line"><a name="l00229"></a><span class="lineno"> 229</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00230"></a><span class="lineno"> 230</span>&#160; </div>
<div class="line"><a name="l00231"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#abdbff3c9deb90644b518a60253972c5d"> 231</a></span>&#160;<span class="preprocessor">#define PM_PWSAKDLY_OFFSET 0x12 </span></div>
<div class="line"><a name="l00232"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#ab7eb4f5579cf6c78d5780e3fd703e98d"> 232</a></span>&#160;<span class="preprocessor">#define PM_PWSAKDLY_RESETVALUE _U_(0x00) </span></div>
<div class="line"><a name="l00234"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#a161c5ac97a5a4695c56eb9e5d99454ed"> 234</a></span>&#160;<span class="preprocessor">#define PM_PWSAKDLY_DLYVAL_Pos 0 </span></div>
<div class="line"><a name="l00235"></a><span class="lineno"> 235</span>&#160;<span class="preprocessor">#define PM_PWSAKDLY_DLYVAL_Msk (_U_(0x7F) &lt;&lt; PM_PWSAKDLY_DLYVAL_Pos)</span></div>
<div class="line"><a name="l00236"></a><span class="lineno"> 236</span>&#160;<span class="preprocessor">#define PM_PWSAKDLY_DLYVAL(value) (PM_PWSAKDLY_DLYVAL_Msk &amp; ((value) &lt;&lt; PM_PWSAKDLY_DLYVAL_Pos))</span></div>
<div class="line"><a name="l00237"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#ad9f7ff35a1092e97c24b88a8ec82b692"> 237</a></span>&#160;<span class="preprocessor">#define PM_PWSAKDLY_IGNACK_Pos 7 </span></div>
<div class="line"><a name="l00238"></a><span class="lineno"> 238</span>&#160;<span class="preprocessor">#define PM_PWSAKDLY_IGNACK (_U_(0x1) &lt;&lt; PM_PWSAKDLY_IGNACK_Pos)</span></div>
<div class="line"><a name="l00239"></a><span class="lineno"><a class="line" href="component_2pm_8h.html#ab5db0ec95c8f83c78fe258c4747a83cc"> 239</a></span>&#160;<span class="preprocessor">#define PM_PWSAKDLY_MASK _U_(0xFF) </span></div>
<div class="line"><a name="l00242"></a><span class="lineno"> 242</span>&#160;<span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00243"></a><span class="lineno"><a class="line" href="structPm.html"> 243</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a name="l00244"></a><span class="lineno"><a class="line" href="structPm.html#a5e802c548acab3cc3c21b1836d2a1a65"> 244</a></span>&#160; __IO <a class="code" href="unionPM__CTRLA__Type.html">PM_CTRLA_Type</a> <a class="code" href="structPm.html#a5e802c548acab3cc3c21b1836d2a1a65">CTRLA</a>; </div>
<div class="line"><a name="l00245"></a><span class="lineno"><a class="line" href="structPm.html#ae9475eabdc567c4cc2ba8304751d589d"> 245</a></span>&#160; __IO <a class="code" href="unionPM__SLEEPCFG__Type.html">PM_SLEEPCFG_Type</a> <a class="code" href="structPm.html#ae9475eabdc567c4cc2ba8304751d589d">SLEEPCFG</a>; </div>
<div class="line"><a name="l00246"></a><span class="lineno"> 246</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved1[0x2];</div>
<div class="line"><a name="l00247"></a><span class="lineno"><a class="line" href="structPm.html#ad0083e323b10f67deea9354e60c691dd"> 247</a></span>&#160; __IO <a class="code" href="unionPM__INTENCLR__Type.html">PM_INTENCLR_Type</a> <a class="code" href="structPm.html#ad0083e323b10f67deea9354e60c691dd">INTENCLR</a>; </div>
<div class="line"><a name="l00248"></a><span class="lineno"><a class="line" href="structPm.html#aae11f1dff46c370d8fd6cea5a1ba4bce"> 248</a></span>&#160; __IO <a class="code" href="unionPM__INTENSET__Type.html">PM_INTENSET_Type</a> <a class="code" href="structPm.html#aae11f1dff46c370d8fd6cea5a1ba4bce">INTENSET</a>; </div>
<div class="line"><a name="l00249"></a><span class="lineno"><a class="line" href="structPm.html#a8089472da81397d8469b1426ccb85bc6"> 249</a></span>&#160; __IO <a class="code" href="unionPM__INTFLAG__Type.html">PM_INTFLAG_Type</a> <a class="code" href="structPm.html#a8089472da81397d8469b1426ccb85bc6">INTFLAG</a>; </div>
<div class="line"><a name="l00250"></a><span class="lineno"> 250</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved2[0x1];</div>
<div class="line"><a name="l00251"></a><span class="lineno"><a class="line" href="structPm.html#a602e2d24b34da6b0d910f046cfd76289"> 251</a></span>&#160; __IO <a class="code" href="unionPM__STDBYCFG__Type.html">PM_STDBYCFG_Type</a> <a class="code" href="structPm.html#a602e2d24b34da6b0d910f046cfd76289">STDBYCFG</a>; </div>
<div class="line"><a name="l00252"></a><span class="lineno"><a class="line" href="structPm.html#a276ad02ba19ab8cb44e81e4f85fa9fd8"> 252</a></span>&#160; __IO <a class="code" href="unionPM__HIBCFG__Type.html">PM_HIBCFG_Type</a> <a class="code" href="structPm.html#a276ad02ba19ab8cb44e81e4f85fa9fd8">HIBCFG</a>; </div>
<div class="line"><a name="l00253"></a><span class="lineno"><a class="line" href="structPm.html#a76e8cf4fc4b74d7a508bd042ecc4fb30"> 253</a></span>&#160; __IO <a class="code" href="unionPM__BKUPCFG__Type.html">PM_BKUPCFG_Type</a> <a class="code" href="structPm.html#a76e8cf4fc4b74d7a508bd042ecc4fb30">BKUPCFG</a>; </div>
<div class="line"><a name="l00254"></a><span class="lineno"> 254</span>&#160; <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved3[0x7];</div>
<div class="line"><a name="l00255"></a><span class="lineno"><a class="line" href="structPm.html#a3e48fb857ca0dc6eb76ce225154df5f0"> 255</a></span>&#160; __IO <a class="code" href="unionPM__PWSAKDLY__Type.html">PM_PWSAKDLY_Type</a> <a class="code" href="structPm.html#a3e48fb857ca0dc6eb76ce225154df5f0">PWSAKDLY</a>; </div>
<div class="line"><a name="l00256"></a><span class="lineno"> 256</span>&#160;} <a class="code" href="structPm.html">Pm</a>;</div>
<div class="line"><a name="l00257"></a><span class="lineno"> 257</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00258"></a><span class="lineno"> 258</span>&#160; </div>
<div class="line"><a name="l00261"></a><span class="lineno"> 261</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_PM_COMPONENT_ */</span><span class="preprocessor"></span></div>
</div><!-- fragment --></div><!-- contents -->
<div class="ttc" id="aunionPM__INTENCLR__Type_html"><div class="ttname"><a href="unionPM__INTENCLR__Type.html">PM_INTENCLR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00096">pm.h:96</a></div></div>
<div class="ttc" id="astructPm_html_a276ad02ba19ab8cb44e81e4f85fa9fd8"><div class="ttname"><a href="structPm.html#a276ad02ba19ab8cb44e81e4f85fa9fd8">Pm::HIBCFG</a></div><div class="ttdeci">__IO PM_HIBCFG_Type HIBCFG</div><div class="ttdoc">Offset: 0x09 (R/W 8) Hibernate Configuration.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00252">pm.h:252</a></div></div>
<div class="ttc" id="astructPm_html_aae11f1dff46c370d8fd6cea5a1ba4bce"><div class="ttname"><a href="structPm.html#aae11f1dff46c370d8fd6cea5a1ba4bce">Pm::INTENSET</a></div><div class="ttdeci">__IO PM_INTENSET_Type INTENSET</div><div class="ttdoc">Offset: 0x05 (R/W 8) Interrupt Enable Set.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00248">pm.h:248</a></div></div>
<div class="ttc" id="aunionPM__STDBYCFG__Type_html_af503533c38a840b5af2dc2a35ddcfc61"><div class="ttname"><a href="unionPM__STDBYCFG__Type.html#af503533c38a840b5af2dc2a35ddcfc61">PM_STDBYCFG_Type::RAMCFG</a></div><div class="ttdeci">uint8_t RAMCFG</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00152">pm.h:152</a></div></div>
<div class="ttc" id="aunionPM__HIBCFG__Type_html_a104edcec40c6ca17beb1f46f52f078db"><div class="ttname"><a href="unionPM__HIBCFG__Type.html#a104edcec40c6ca17beb1f46f52f078db">PM_HIBCFG_Type::RAMCFG</a></div><div class="ttdeci">uint8_t RAMCFG</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00182">pm.h:182</a></div></div>
<div class="ttc" id="aunionPM__HIBCFG__Type_html_a97439f5b52e448f0ea576dadb361c885"><div class="ttname"><a href="unionPM__HIBCFG__Type.html#a97439f5b52e448f0ea576dadb361c885">PM_HIBCFG_Type::BRAMCFG</a></div><div class="ttdeci">uint8_t BRAMCFG</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00183">pm.h:183</a></div></div>
<div class="ttc" id="aunionPM__INTFLAG__Type_html_a02f67588995f159aa56ced08b2280c40"><div class="ttname"><a href="unionPM__INTFLAG__Type.html#a02f67588995f159aa56ced08b2280c40">PM_INTFLAG_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00137">pm.h:137</a></div></div>
<div class="ttc" id="astructPm_html_a5e802c548acab3cc3c21b1836d2a1a65"><div class="ttname"><a href="structPm.html#a5e802c548acab3cc3c21b1836d2a1a65">Pm::CTRLA</a></div><div class="ttdeci">__IO PM_CTRLA_Type CTRLA</div><div class="ttdoc">Offset: 0x00 (R/W 8) Control A.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00244">pm.h:244</a></div></div>
<div class="ttc" id="aunionPM__STDBYCFG__Type_html_aa94f621ae28b5ea3258c168f810eeb3b"><div class="ttname"><a href="unionPM__STDBYCFG__Type.html#aa94f621ae28b5ea3258c168f810eeb3b">PM_STDBYCFG_Type::FASTWKUP</a></div><div class="ttdeci">uint8_t FASTWKUP</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00154">pm.h:154</a></div></div>
<div class="ttc" id="aunionPM__BKUPCFG__Type_html"><div class="ttname"><a href="unionPM__BKUPCFG__Type.html">PM_BKUPCFG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00203">pm.h:203</a></div></div>
<div class="ttc" id="aunionPM__INTFLAG__Type_html_a8fa12a38bd1b48716eb6f33c6569f8a5"><div class="ttname"><a href="unionPM__INTFLAG__Type.html#a8fa12a38bd1b48716eb6f33c6569f8a5">PM_INTFLAG_Type::uint8_t</a></div><div class="ttdeci">__I uint8_t</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00135">pm.h:135</a></div></div>
<div class="ttc" id="aunionPM__INTFLAG__Type_html_a570eaac6b13e6eebe070ee735d084a8b"><div class="ttname"><a href="unionPM__INTFLAG__Type.html#a570eaac6b13e6eebe070ee735d084a8b">PM_INTFLAG_Type::SLEEPRDY</a></div><div class="ttdeci">__I uint8_t SLEEPRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00134">pm.h:134</a></div></div>
<div class="ttc" id="aunionPM__PWSAKDLY__Type_html_a8fd493a526a1ab5a925f50622e89b1ff"><div class="ttname"><a href="unionPM__PWSAKDLY__Type.html#a8fd493a526a1ab5a925f50622e89b1ff">PM_PWSAKDLY_Type::DLYVAL</a></div><div class="ttdeci">uint8_t DLYVAL</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00224">pm.h:224</a></div></div>
<div class="ttc" id="aunionPM__SLEEPCFG__Type_html_af5f310d047324bf1d7288227de8a8558"><div class="ttname"><a href="unionPM__SLEEPCFG__Type.html#af5f310d047324bf1d7288227de8a8558">PM_SLEEPCFG_Type::SLEEPMODE</a></div><div class="ttdeci">uint8_t SLEEPMODE</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00065">pm.h:65</a></div></div>
<div class="ttc" id="aunionPM__SLEEPCFG__Type_html_a3bc7b75f0440e924138812f0b313ba73"><div class="ttname"><a href="unionPM__SLEEPCFG__Type.html#a3bc7b75f0440e924138812f0b313ba73">PM_SLEEPCFG_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00068">pm.h:68</a></div></div>
<div class="ttc" id="aunionPM__BKUPCFG__Type_html_a816369be9fa671d098a82f0e9a0399c0"><div class="ttname"><a href="unionPM__BKUPCFG__Type.html#a816369be9fa671d098a82f0e9a0399c0">PM_BKUPCFG_Type::BRAMCFG</a></div><div class="ttdeci">uint8_t BRAMCFG</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00205">pm.h:205</a></div></div>
<div class="ttc" id="astructPm_html"><div class="ttname"><a href="structPm.html">Pm</a></div><div class="ttdoc">PM hardware registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00243">pm.h:243</a></div></div>
<div class="ttc" id="aunionPM__INTENSET__Type_html_a7ec5c08ca19bf81d361dc5fe30d42a7b"><div class="ttname"><a href="unionPM__INTENSET__Type.html#a7ec5c08ca19bf81d361dc5fe30d42a7b">PM_INTENSET_Type::SLEEPRDY</a></div><div class="ttdeci">uint8_t SLEEPRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00116">pm.h:116</a></div></div>
<div class="ttc" id="astructPm_html_a8089472da81397d8469b1426ccb85bc6"><div class="ttname"><a href="structPm.html#a8089472da81397d8469b1426ccb85bc6">Pm::INTFLAG</a></div><div class="ttdeci">__IO PM_INTFLAG_Type INTFLAG</div><div class="ttdoc">Offset: 0x06 (R/W 8) Interrupt Flag Status and Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00249">pm.h:249</a></div></div>
<div class="ttc" id="aunionPM__CTRLA__Type_html_a115f73d46fbe0a126716a07cc568c54f"><div class="ttname"><a href="unionPM__CTRLA__Type.html#a115f73d46fbe0a126716a07cc568c54f">PM_CTRLA_Type::IORET</a></div><div class="ttdeci">uint8_t IORET</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00047">pm.h:47</a></div></div>
<div class="ttc" id="aunionPM__SLEEPCFG__Type_html"><div class="ttname"><a href="unionPM__SLEEPCFG__Type.html">PM_SLEEPCFG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00063">pm.h:63</a></div></div>
<div class="ttc" id="aunionPM__BKUPCFG__Type_html_aa3987eacfd5238292c8094895c881138"><div class="ttname"><a href="unionPM__BKUPCFG__Type.html#aa3987eacfd5238292c8094895c881138">PM_BKUPCFG_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00208">pm.h:208</a></div></div>
<div class="ttc" id="astructPm_html_a602e2d24b34da6b0d910f046cfd76289"><div class="ttname"><a href="structPm.html#a602e2d24b34da6b0d910f046cfd76289">Pm::STDBYCFG</a></div><div class="ttdeci">__IO PM_STDBYCFG_Type STDBYCFG</div><div class="ttdoc">Offset: 0x08 (R/W 8) Standby Configuration.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00251">pm.h:251</a></div></div>
<div class="ttc" id="aunionPM__INTFLAG__Type_html"><div class="ttname"><a href="unionPM__INTFLAG__Type.html">PM_INTFLAG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00132">pm.h:132</a></div></div>
<div class="ttc" id="aunionPM__STDBYCFG__Type_html"><div class="ttname"><a href="unionPM__STDBYCFG__Type.html">PM_STDBYCFG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00150">pm.h:150</a></div></div>
<div class="ttc" id="aunionPM__INTENCLR__Type_html_a6d8b0b5c281b9d15d9709302ae515f07"><div class="ttname"><a href="unionPM__INTENCLR__Type.html#a6d8b0b5c281b9d15d9709302ae515f07">PM_INTENCLR_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00101">pm.h:101</a></div></div>
<div class="ttc" id="astructPm_html_a76e8cf4fc4b74d7a508bd042ecc4fb30"><div class="ttname"><a href="structPm.html#a76e8cf4fc4b74d7a508bd042ecc4fb30">Pm::BKUPCFG</a></div><div class="ttdeci">__IO PM_BKUPCFG_Type BKUPCFG</div><div class="ttdoc">Offset: 0x0A (R/W 8) Backup Configuration.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00253">pm.h:253</a></div></div>
<div class="ttc" id="aunionPM__PWSAKDLY__Type_html_a2e9322fb23abd54c959950516f256b1a"><div class="ttname"><a href="unionPM__PWSAKDLY__Type.html#a2e9322fb23abd54c959950516f256b1a">PM_PWSAKDLY_Type::IGNACK</a></div><div class="ttdeci">uint8_t IGNACK</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00225">pm.h:225</a></div></div>
<div class="ttc" id="aunionPM__INTENCLR__Type_html_ad41dd4695a53feace4d0b1a23ad55ca6"><div class="ttname"><a href="unionPM__INTENCLR__Type.html#ad41dd4695a53feace4d0b1a23ad55ca6">PM_INTENCLR_Type::SLEEPRDY</a></div><div class="ttdeci">uint8_t SLEEPRDY</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00098">pm.h:98</a></div></div>
<div class="ttc" id="aunionPM__CTRLA__Type_html"><div class="ttname"><a href="unionPM__CTRLA__Type.html">PM_CTRLA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00044">pm.h:44</a></div></div>
<div class="ttc" id="astructPm_html_ad0083e323b10f67deea9354e60c691dd"><div class="ttname"><a href="structPm.html#ad0083e323b10f67deea9354e60c691dd">Pm::INTENCLR</a></div><div class="ttdeci">__IO PM_INTENCLR_Type INTENCLR</div><div class="ttdoc">Offset: 0x04 (R/W 8) Interrupt Enable Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00247">pm.h:247</a></div></div>
<div class="ttc" id="aunionPM__PWSAKDLY__Type_html"><div class="ttname"><a href="unionPM__PWSAKDLY__Type.html">PM_PWSAKDLY_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00222">pm.h:222</a></div></div>
<div class="ttc" id="asame54n19a_8h_html_a0d957f1433aaf5d70e4dc2b68288442d"><div class="ttname"><a href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a></div><div class="ttdeci">volatile const uint8_t RoReg8</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00053">same54n19a.h:53</a></div></div>
<div class="ttc" id="aunionPM__HIBCFG__Type_html_a20dc824c9375df893fc48a3cb46d16ee"><div class="ttname"><a href="unionPM__HIBCFG__Type.html#a20dc824c9375df893fc48a3cb46d16ee">PM_HIBCFG_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00186">pm.h:186</a></div></div>
<div class="ttc" id="aunionPM__HIBCFG__Type_html"><div class="ttname"><a href="unionPM__HIBCFG__Type.html">PM_HIBCFG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00180">pm.h:180</a></div></div>
<div class="ttc" id="aunionPM__INTENSET__Type_html_aea623941e13f9fa48547ffd84350bbf8"><div class="ttname"><a href="unionPM__INTENSET__Type.html#aea623941e13f9fa48547ffd84350bbf8">PM_INTENSET_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00119">pm.h:119</a></div></div>
<div class="ttc" id="astructPm_html_ae9475eabdc567c4cc2ba8304751d589d"><div class="ttname"><a href="structPm.html#ae9475eabdc567c4cc2ba8304751d589d">Pm::SLEEPCFG</a></div><div class="ttdeci">__IO PM_SLEEPCFG_Type SLEEPCFG</div><div class="ttdoc">Offset: 0x01 (R/W 8) Sleep Configuration.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00245">pm.h:245</a></div></div>
<div class="ttc" id="aunionPM__PWSAKDLY__Type_html_abc365b84b22d1ca32873d77ae820599d"><div class="ttname"><a href="unionPM__PWSAKDLY__Type.html#abc365b84b22d1ca32873d77ae820599d">PM_PWSAKDLY_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00227">pm.h:227</a></div></div>
<div class="ttc" id="astructPm_html_a3e48fb857ca0dc6eb76ce225154df5f0"><div class="ttname"><a href="structPm.html#a3e48fb857ca0dc6eb76ce225154df5f0">Pm::PWSAKDLY</a></div><div class="ttdeci">__IO PM_PWSAKDLY_Type PWSAKDLY</div><div class="ttdoc">Offset: 0x12 (R/W 8) Power Switch Acknowledge Delay.</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00255">pm.h:255</a></div></div>
<div class="ttc" id="aunionPM__INTENSET__Type_html"><div class="ttname"><a href="unionPM__INTENSET__Type.html">PM_INTENSET_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00114">pm.h:114</a></div></div>
<div class="ttc" id="aunionPM__STDBYCFG__Type_html_aca45bfff581cac022d98d2a80066d157"><div class="ttname"><a href="unionPM__STDBYCFG__Type.html#aca45bfff581cac022d98d2a80066d157">PM_STDBYCFG_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00157">pm.h:157</a></div></div>
<div class="ttc" id="aunionPM__CTRLA__Type_html_ae9fcc0678a177091f73b8d243aa62acd"><div class="ttname"><a href="unionPM__CTRLA__Type.html#ae9fcc0678a177091f73b8d243aa62acd">PM_CTRLA_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2pm_8h_source.html#l00050">pm.h:50</a></div></div>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionPORT__DIRCLR__Type.html">PORT_DIRCLR_Type</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionPORT__DIRSET__Type.html">PORT_DIRSET_Type</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionPORT__DIRTGL__Type.html">PORT_DIRTGL_Type</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionPORT__OUT__Type.html">PORT_OUT_Type</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionPORT__OUTCLR__Type.html">PORT_OUTCLR_Type</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionPORT__OUTSET__Type.html">PORT_OUTSET_Type</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionPORT__OUTTGL__Type.html">PORT_OUTTGL_Type</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionPORT__IN__Type.html">PORT_IN_Type</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionPORT__CTRL__Type.html">PORT_CTRL_Type</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionPORT__WRCONFIG__Type.html">PORT_WRCONFIG_Type</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionPORT__EVCTRL__Type.html">PORT_EVCTRL_Type</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionPORT__PMUX__Type.html">PORT_PMUX_Type</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionPORT__PINCFG__Type.html">PORT_PINCFG_Type</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structPortGroup.html">PortGroup</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight"><a class="el" href="structPortGroup.html" title="PortGroup hardware registers.">PortGroup</a> hardware registers. <a href="structPortGroup.html#details">More...</a><br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structPort.html">Port</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">PORT hardware registers. <a href="structPort.html#details">More...</a><br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:a5f5568d546a890f14a2dfa54f417a233"><td class="memItemLeft" align="right" valign="top"><a id="a5f5568d546a890f14a2dfa54f417a233"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_U2210</b></td></tr>
<tr class="separator:a5f5568d546a890f14a2dfa54f417a233"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a48cafc8c658dd3e36eb503cd8069ff00"><td class="memItemLeft" align="right" valign="top"><a id="a48cafc8c658dd3e36eb503cd8069ff00"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>REV_PORT</b>&#160;&#160;&#160;0x220</td></tr>
<tr class="separator:a48cafc8c658dd3e36eb503cd8069ff00"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae80e64be75702d9047a0150d9c6eafb1"><td class="memItemLeft" align="right" valign="top"><a id="ae80e64be75702d9047a0150d9c6eafb1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#ae80e64be75702d9047a0150d9c6eafb1">PORT_DIR_OFFSET</a>&#160;&#160;&#160;0x00</td></tr>
<tr class="memdesc:ae80e64be75702d9047a0150d9c6eafb1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_DIR offset) Data Direction <br /></td></tr>
<tr class="separator:ae80e64be75702d9047a0150d9c6eafb1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a63e44bc52961c08e11fd93c736cdf35c"><td class="memItemLeft" align="right" valign="top"><a id="a63e44bc52961c08e11fd93c736cdf35c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a63e44bc52961c08e11fd93c736cdf35c">PORT_DIR_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a63e44bc52961c08e11fd93c736cdf35c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_DIR reset_value) Data Direction <br /></td></tr>
<tr class="separator:a63e44bc52961c08e11fd93c736cdf35c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a24c8369138b85d0fa6b7acdf9f8c8734"><td class="memItemLeft" align="right" valign="top"><a id="a24c8369138b85d0fa6b7acdf9f8c8734"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a24c8369138b85d0fa6b7acdf9f8c8734">PORT_DIR_DIR_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a24c8369138b85d0fa6b7acdf9f8c8734"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_DIR) <a class="el" href="structPort.html" title="PORT hardware registers.">Port</a> Data Direction <br /></td></tr>
<tr class="separator:a24c8369138b85d0fa6b7acdf9f8c8734"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a37edf1972fbe60184737440da12c0a7f"><td class="memItemLeft" align="right" valign="top"><a id="a37edf1972fbe60184737440da12c0a7f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_DIR_DIR_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF) &lt;&lt; <a class="el" href="component_2port_8h.html#a24c8369138b85d0fa6b7acdf9f8c8734">PORT_DIR_DIR_Pos</a>)</td></tr>
<tr class="separator:a37edf1972fbe60184737440da12c0a7f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a87c01006429d0cd3c7d19b2ec7512231"><td class="memItemLeft" align="right" valign="top"><a id="a87c01006429d0cd3c7d19b2ec7512231"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_DIR_DIR</b>(value)&#160;&#160;&#160;(PORT_DIR_DIR_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2port_8h.html#a24c8369138b85d0fa6b7acdf9f8c8734">PORT_DIR_DIR_Pos</a>))</td></tr>
<tr class="separator:a87c01006429d0cd3c7d19b2ec7512231"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1ac033c587515efaff3b5002747b1295"><td class="memItemLeft" align="right" valign="top"><a id="a1ac033c587515efaff3b5002747b1295"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a1ac033c587515efaff3b5002747b1295">PORT_DIR_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:a1ac033c587515efaff3b5002747b1295"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_DIR) MASK Register <br /></td></tr>
<tr class="separator:a1ac033c587515efaff3b5002747b1295"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6617757b2b2a4873ca225341c0350b6b"><td class="memItemLeft" align="right" valign="top"><a id="a6617757b2b2a4873ca225341c0350b6b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a6617757b2b2a4873ca225341c0350b6b">PORT_DIRCLR_OFFSET</a>&#160;&#160;&#160;0x04</td></tr>
<tr class="memdesc:a6617757b2b2a4873ca225341c0350b6b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_DIRCLR offset) Data Direction Clear <br /></td></tr>
<tr class="separator:a6617757b2b2a4873ca225341c0350b6b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae97e35763f237bbf69af7623183891a1"><td class="memItemLeft" align="right" valign="top"><a id="ae97e35763f237bbf69af7623183891a1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#ae97e35763f237bbf69af7623183891a1">PORT_DIRCLR_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:ae97e35763f237bbf69af7623183891a1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_DIRCLR reset_value) Data Direction Clear <br /></td></tr>
<tr class="separator:ae97e35763f237bbf69af7623183891a1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aab58ac44a417949e78c7e743c2b6cb8e"><td class="memItemLeft" align="right" valign="top"><a id="aab58ac44a417949e78c7e743c2b6cb8e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#aab58ac44a417949e78c7e743c2b6cb8e">PORT_DIRCLR_DIRCLR_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:aab58ac44a417949e78c7e743c2b6cb8e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_DIRCLR) <a class="el" href="structPort.html" title="PORT hardware registers.">Port</a> Data Direction Clear <br /></td></tr>
<tr class="separator:aab58ac44a417949e78c7e743c2b6cb8e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5c1e3f46819a99640cb16a7e16298c97"><td class="memItemLeft" align="right" valign="top"><a id="a5c1e3f46819a99640cb16a7e16298c97"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_DIRCLR_DIRCLR_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF) &lt;&lt; <a class="el" href="component_2port_8h.html#aab58ac44a417949e78c7e743c2b6cb8e">PORT_DIRCLR_DIRCLR_Pos</a>)</td></tr>
<tr class="separator:a5c1e3f46819a99640cb16a7e16298c97"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0d5423999a4724201584a4388c8d23c1"><td class="memItemLeft" align="right" valign="top"><a id="a0d5423999a4724201584a4388c8d23c1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_DIRCLR_DIRCLR</b>(value)&#160;&#160;&#160;(PORT_DIRCLR_DIRCLR_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2port_8h.html#aab58ac44a417949e78c7e743c2b6cb8e">PORT_DIRCLR_DIRCLR_Pos</a>))</td></tr>
<tr class="separator:a0d5423999a4724201584a4388c8d23c1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af03d21b4e469df93029d2e6a017c7e9e"><td class="memItemLeft" align="right" valign="top"><a id="af03d21b4e469df93029d2e6a017c7e9e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#af03d21b4e469df93029d2e6a017c7e9e">PORT_DIRCLR_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:af03d21b4e469df93029d2e6a017c7e9e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_DIRCLR) MASK Register <br /></td></tr>
<tr class="separator:af03d21b4e469df93029d2e6a017c7e9e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:acbe953a0e93e6e780964524f176fc408"><td class="memItemLeft" align="right" valign="top"><a id="acbe953a0e93e6e780964524f176fc408"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#acbe953a0e93e6e780964524f176fc408">PORT_DIRSET_OFFSET</a>&#160;&#160;&#160;0x08</td></tr>
<tr class="memdesc:acbe953a0e93e6e780964524f176fc408"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_DIRSET offset) Data Direction Set <br /></td></tr>
<tr class="separator:acbe953a0e93e6e780964524f176fc408"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:acff4d1ab9a1fe8e242ebd247d5de9c7d"><td class="memItemLeft" align="right" valign="top"><a id="acff4d1ab9a1fe8e242ebd247d5de9c7d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#acff4d1ab9a1fe8e242ebd247d5de9c7d">PORT_DIRSET_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:acff4d1ab9a1fe8e242ebd247d5de9c7d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_DIRSET reset_value) Data Direction Set <br /></td></tr>
<tr class="separator:acff4d1ab9a1fe8e242ebd247d5de9c7d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa2c0a845406e6ca4e31556d413108aeb"><td class="memItemLeft" align="right" valign="top"><a id="aa2c0a845406e6ca4e31556d413108aeb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#aa2c0a845406e6ca4e31556d413108aeb">PORT_DIRSET_DIRSET_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:aa2c0a845406e6ca4e31556d413108aeb"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_DIRSET) <a class="el" href="structPort.html" title="PORT hardware registers.">Port</a> Data Direction Set <br /></td></tr>
<tr class="separator:aa2c0a845406e6ca4e31556d413108aeb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0b4a8e93964c1bedc8f48b0fa037e500"><td class="memItemLeft" align="right" valign="top"><a id="a0b4a8e93964c1bedc8f48b0fa037e500"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_DIRSET_DIRSET_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF) &lt;&lt; <a class="el" href="component_2port_8h.html#aa2c0a845406e6ca4e31556d413108aeb">PORT_DIRSET_DIRSET_Pos</a>)</td></tr>
<tr class="separator:a0b4a8e93964c1bedc8f48b0fa037e500"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a75a539d2c42e4d5058181a8700b8e9c0"><td class="memItemLeft" align="right" valign="top"><a id="a75a539d2c42e4d5058181a8700b8e9c0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_DIRSET_DIRSET</b>(value)&#160;&#160;&#160;(PORT_DIRSET_DIRSET_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2port_8h.html#aa2c0a845406e6ca4e31556d413108aeb">PORT_DIRSET_DIRSET_Pos</a>))</td></tr>
<tr class="separator:a75a539d2c42e4d5058181a8700b8e9c0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab1abf1381a08ea14af8f13dc141993e4"><td class="memItemLeft" align="right" valign="top"><a id="ab1abf1381a08ea14af8f13dc141993e4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#ab1abf1381a08ea14af8f13dc141993e4">PORT_DIRSET_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:ab1abf1381a08ea14af8f13dc141993e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_DIRSET) MASK Register <br /></td></tr>
<tr class="separator:ab1abf1381a08ea14af8f13dc141993e4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a527f45d84e80e23f0545616308328337"><td class="memItemLeft" align="right" valign="top"><a id="a527f45d84e80e23f0545616308328337"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a527f45d84e80e23f0545616308328337">PORT_DIRTGL_OFFSET</a>&#160;&#160;&#160;0x0C</td></tr>
<tr class="memdesc:a527f45d84e80e23f0545616308328337"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_DIRTGL offset) Data Direction Toggle <br /></td></tr>
<tr class="separator:a527f45d84e80e23f0545616308328337"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abf69bb8e2dcdb2658c393352c4ab1451"><td class="memItemLeft" align="right" valign="top"><a id="abf69bb8e2dcdb2658c393352c4ab1451"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#abf69bb8e2dcdb2658c393352c4ab1451">PORT_DIRTGL_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:abf69bb8e2dcdb2658c393352c4ab1451"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_DIRTGL reset_value) Data Direction Toggle <br /></td></tr>
<tr class="separator:abf69bb8e2dcdb2658c393352c4ab1451"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae76952ebb5d27345861883e92a0b4580"><td class="memItemLeft" align="right" valign="top"><a id="ae76952ebb5d27345861883e92a0b4580"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#ae76952ebb5d27345861883e92a0b4580">PORT_DIRTGL_DIRTGL_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ae76952ebb5d27345861883e92a0b4580"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_DIRTGL) <a class="el" href="structPort.html" title="PORT hardware registers.">Port</a> Data Direction Toggle <br /></td></tr>
<tr class="separator:ae76952ebb5d27345861883e92a0b4580"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3f760de671e765111e9c760fdec994f5"><td class="memItemLeft" align="right" valign="top"><a id="a3f760de671e765111e9c760fdec994f5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_DIRTGL_DIRTGL_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF) &lt;&lt; <a class="el" href="component_2port_8h.html#ae76952ebb5d27345861883e92a0b4580">PORT_DIRTGL_DIRTGL_Pos</a>)</td></tr>
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<tr class="memitem:ab6900b708762f7a3aaef111ac5929366"><td class="memItemLeft" align="right" valign="top"><a id="ab6900b708762f7a3aaef111ac5929366"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_DIRTGL_DIRTGL</b>(value)&#160;&#160;&#160;(PORT_DIRTGL_DIRTGL_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2port_8h.html#ae76952ebb5d27345861883e92a0b4580">PORT_DIRTGL_DIRTGL_Pos</a>))</td></tr>
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<tr class="memitem:aad67e44b66d1e6d214a468d19fe5c37b"><td class="memItemLeft" align="right" valign="top"><a id="aad67e44b66d1e6d214a468d19fe5c37b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#aad67e44b66d1e6d214a468d19fe5c37b">PORT_DIRTGL_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:aad67e44b66d1e6d214a468d19fe5c37b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_DIRTGL) MASK Register <br /></td></tr>
<tr class="separator:aad67e44b66d1e6d214a468d19fe5c37b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a613c002dd1466d78b367184b2e8d5702"><td class="memItemLeft" align="right" valign="top"><a id="a613c002dd1466d78b367184b2e8d5702"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a613c002dd1466d78b367184b2e8d5702">PORT_OUT_OFFSET</a>&#160;&#160;&#160;0x10</td></tr>
<tr class="memdesc:a613c002dd1466d78b367184b2e8d5702"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_OUT offset) Data Output Value <br /></td></tr>
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<tr class="memitem:af021492775d0fe23716f66e5ee65ef34"><td class="memItemLeft" align="right" valign="top"><a id="af021492775d0fe23716f66e5ee65ef34"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#af021492775d0fe23716f66e5ee65ef34">PORT_OUT_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:af021492775d0fe23716f66e5ee65ef34"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_OUT reset_value) Data Output Value <br /></td></tr>
<tr class="separator:af021492775d0fe23716f66e5ee65ef34"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2311d33aa22995c6371e1a7f8fbf4b8b"><td class="memItemLeft" align="right" valign="top"><a id="a2311d33aa22995c6371e1a7f8fbf4b8b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a2311d33aa22995c6371e1a7f8fbf4b8b">PORT_OUT_OUT_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a2311d33aa22995c6371e1a7f8fbf4b8b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_OUT) PORT Data Output Value <br /></td></tr>
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<tr class="memitem:a9c23adb5d24fc6e1b2f4eeaa5b14bfa6"><td class="memItemLeft" align="right" valign="top"><a id="a9c23adb5d24fc6e1b2f4eeaa5b14bfa6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_OUT_OUT_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF) &lt;&lt; <a class="el" href="component_2port_8h.html#a2311d33aa22995c6371e1a7f8fbf4b8b">PORT_OUT_OUT_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_OUT_OUT</b>(value)&#160;&#160;&#160;(PORT_OUT_OUT_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2port_8h.html#a2311d33aa22995c6371e1a7f8fbf4b8b">PORT_OUT_OUT_Pos</a>))</td></tr>
<tr class="separator:a089cc4f40a2dbf3abb393017317fdf5d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a14d208ae2f33fb3a123593bc0ee91b5c"><td class="memItemLeft" align="right" valign="top"><a id="a14d208ae2f33fb3a123593bc0ee91b5c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a14d208ae2f33fb3a123593bc0ee91b5c">PORT_OUT_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:a14d208ae2f33fb3a123593bc0ee91b5c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_OUT) MASK Register <br /></td></tr>
<tr class="separator:a14d208ae2f33fb3a123593bc0ee91b5c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abfa9579bd1cebd85dc745bfd430a6453"><td class="memItemLeft" align="right" valign="top"><a id="abfa9579bd1cebd85dc745bfd430a6453"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#abfa9579bd1cebd85dc745bfd430a6453">PORT_OUTCLR_OFFSET</a>&#160;&#160;&#160;0x14</td></tr>
<tr class="memdesc:abfa9579bd1cebd85dc745bfd430a6453"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_OUTCLR offset) Data Output Value Clear <br /></td></tr>
<tr class="separator:abfa9579bd1cebd85dc745bfd430a6453"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad9e9f2f4052c8c9a19937ade97602106"><td class="memItemLeft" align="right" valign="top"><a id="ad9e9f2f4052c8c9a19937ade97602106"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#ad9e9f2f4052c8c9a19937ade97602106">PORT_OUTCLR_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:ad9e9f2f4052c8c9a19937ade97602106"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_OUTCLR reset_value) Data Output Value Clear <br /></td></tr>
<tr class="separator:ad9e9f2f4052c8c9a19937ade97602106"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa448fb60871992079921f4c31b2ab0a0"><td class="memItemLeft" align="right" valign="top"><a id="aa448fb60871992079921f4c31b2ab0a0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#aa448fb60871992079921f4c31b2ab0a0">PORT_OUTCLR_OUTCLR_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:aa448fb60871992079921f4c31b2ab0a0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_OUTCLR) PORT Data Output Value Clear <br /></td></tr>
<tr class="separator:aa448fb60871992079921f4c31b2ab0a0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aece9af6cd305c4d43772a0fbd4288de2"><td class="memItemLeft" align="right" valign="top"><a id="aece9af6cd305c4d43772a0fbd4288de2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_OUTCLR_OUTCLR_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF) &lt;&lt; <a class="el" href="component_2port_8h.html#aa448fb60871992079921f4c31b2ab0a0">PORT_OUTCLR_OUTCLR_Pos</a>)</td></tr>
<tr class="separator:aece9af6cd305c4d43772a0fbd4288de2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a770d56801d959c8fb260e82d5df7ce60"><td class="memItemLeft" align="right" valign="top"><a id="a770d56801d959c8fb260e82d5df7ce60"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_OUTCLR_OUTCLR</b>(value)&#160;&#160;&#160;(PORT_OUTCLR_OUTCLR_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2port_8h.html#aa448fb60871992079921f4c31b2ab0a0">PORT_OUTCLR_OUTCLR_Pos</a>))</td></tr>
<tr class="separator:a770d56801d959c8fb260e82d5df7ce60"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a600b1512b7fcc7de565adb38783650fd"><td class="memItemLeft" align="right" valign="top"><a id="a600b1512b7fcc7de565adb38783650fd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a600b1512b7fcc7de565adb38783650fd">PORT_OUTCLR_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:a600b1512b7fcc7de565adb38783650fd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_OUTCLR) MASK Register <br /></td></tr>
<tr class="separator:a600b1512b7fcc7de565adb38783650fd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2836c334826cf0fa63d6be8319f3eaa4"><td class="memItemLeft" align="right" valign="top"><a id="a2836c334826cf0fa63d6be8319f3eaa4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a2836c334826cf0fa63d6be8319f3eaa4">PORT_OUTSET_OFFSET</a>&#160;&#160;&#160;0x18</td></tr>
<tr class="memdesc:a2836c334826cf0fa63d6be8319f3eaa4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_OUTSET offset) Data Output Value Set <br /></td></tr>
<tr class="separator:a2836c334826cf0fa63d6be8319f3eaa4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a703a3d3fb11897242e5edbdda11d3e01"><td class="memItemLeft" align="right" valign="top"><a id="a703a3d3fb11897242e5edbdda11d3e01"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a703a3d3fb11897242e5edbdda11d3e01">PORT_OUTSET_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a703a3d3fb11897242e5edbdda11d3e01"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_OUTSET reset_value) Data Output Value Set <br /></td></tr>
<tr class="separator:a703a3d3fb11897242e5edbdda11d3e01"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab15b9d26363709ae77584b0f8140ba42"><td class="memItemLeft" align="right" valign="top"><a id="ab15b9d26363709ae77584b0f8140ba42"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#ab15b9d26363709ae77584b0f8140ba42">PORT_OUTSET_OUTSET_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ab15b9d26363709ae77584b0f8140ba42"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_OUTSET) PORT Data Output Value Set <br /></td></tr>
<tr class="separator:ab15b9d26363709ae77584b0f8140ba42"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a090fd7414eb6fa473a4036f84f853dca"><td class="memItemLeft" align="right" valign="top"><a id="a090fd7414eb6fa473a4036f84f853dca"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_OUTSET_OUTSET_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF) &lt;&lt; <a class="el" href="component_2port_8h.html#ab15b9d26363709ae77584b0f8140ba42">PORT_OUTSET_OUTSET_Pos</a>)</td></tr>
<tr class="separator:a090fd7414eb6fa473a4036f84f853dca"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad55b0fcb6f9df9920cdd1e23cb809b31"><td class="memItemLeft" align="right" valign="top"><a id="ad55b0fcb6f9df9920cdd1e23cb809b31"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_OUTSET_OUTSET</b>(value)&#160;&#160;&#160;(PORT_OUTSET_OUTSET_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2port_8h.html#ab15b9d26363709ae77584b0f8140ba42">PORT_OUTSET_OUTSET_Pos</a>))</td></tr>
<tr class="separator:ad55b0fcb6f9df9920cdd1e23cb809b31"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac9419f71279d6ec7826fd713af780d7c"><td class="memItemLeft" align="right" valign="top"><a id="ac9419f71279d6ec7826fd713af780d7c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#ac9419f71279d6ec7826fd713af780d7c">PORT_OUTSET_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:ac9419f71279d6ec7826fd713af780d7c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_OUTSET) MASK Register <br /></td></tr>
<tr class="separator:ac9419f71279d6ec7826fd713af780d7c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a661859dca022c7deb7a367616d203747"><td class="memItemLeft" align="right" valign="top"><a id="a661859dca022c7deb7a367616d203747"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a661859dca022c7deb7a367616d203747">PORT_OUTTGL_OFFSET</a>&#160;&#160;&#160;0x1C</td></tr>
<tr class="memdesc:a661859dca022c7deb7a367616d203747"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_OUTTGL offset) Data Output Value Toggle <br /></td></tr>
<tr class="separator:a661859dca022c7deb7a367616d203747"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a487997310b5fc1ce56e003c201da8df2"><td class="memItemLeft" align="right" valign="top"><a id="a487997310b5fc1ce56e003c201da8df2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a487997310b5fc1ce56e003c201da8df2">PORT_OUTTGL_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a487997310b5fc1ce56e003c201da8df2"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_OUTTGL reset_value) Data Output Value Toggle <br /></td></tr>
<tr class="separator:a487997310b5fc1ce56e003c201da8df2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9cccd9f68244563b806d73204ee44c3e"><td class="memItemLeft" align="right" valign="top"><a id="a9cccd9f68244563b806d73204ee44c3e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a9cccd9f68244563b806d73204ee44c3e">PORT_OUTTGL_OUTTGL_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a9cccd9f68244563b806d73204ee44c3e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_OUTTGL) PORT Data Output Value Toggle <br /></td></tr>
<tr class="separator:a9cccd9f68244563b806d73204ee44c3e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad9024ad4caab786a0f4074a8e28f9638"><td class="memItemLeft" align="right" valign="top"><a id="ad9024ad4caab786a0f4074a8e28f9638"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_OUTTGL_OUTTGL_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF) &lt;&lt; <a class="el" href="component_2port_8h.html#a9cccd9f68244563b806d73204ee44c3e">PORT_OUTTGL_OUTTGL_Pos</a>)</td></tr>
<tr class="separator:ad9024ad4caab786a0f4074a8e28f9638"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a41c33bcdaaea793dc1ee8f7b34ee05dd"><td class="memItemLeft" align="right" valign="top"><a id="a41c33bcdaaea793dc1ee8f7b34ee05dd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_OUTTGL_OUTTGL</b>(value)&#160;&#160;&#160;(PORT_OUTTGL_OUTTGL_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2port_8h.html#a9cccd9f68244563b806d73204ee44c3e">PORT_OUTTGL_OUTTGL_Pos</a>))</td></tr>
<tr class="separator:a41c33bcdaaea793dc1ee8f7b34ee05dd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abaf3cbe8835ddcd94e55d99946aa9c4c"><td class="memItemLeft" align="right" valign="top"><a id="abaf3cbe8835ddcd94e55d99946aa9c4c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#abaf3cbe8835ddcd94e55d99946aa9c4c">PORT_OUTTGL_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:abaf3cbe8835ddcd94e55d99946aa9c4c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_OUTTGL) MASK Register <br /></td></tr>
<tr class="separator:abaf3cbe8835ddcd94e55d99946aa9c4c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7ce997c987c624b541986263e20a5c43"><td class="memItemLeft" align="right" valign="top"><a id="a7ce997c987c624b541986263e20a5c43"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a7ce997c987c624b541986263e20a5c43">PORT_IN_OFFSET</a>&#160;&#160;&#160;0x20</td></tr>
<tr class="memdesc:a7ce997c987c624b541986263e20a5c43"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_IN offset) Data Input Value <br /></td></tr>
<tr class="separator:a7ce997c987c624b541986263e20a5c43"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a439d1273dd238888045148efebac2333"><td class="memItemLeft" align="right" valign="top"><a id="a439d1273dd238888045148efebac2333"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a439d1273dd238888045148efebac2333">PORT_IN_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a439d1273dd238888045148efebac2333"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_IN reset_value) Data Input Value <br /></td></tr>
<tr class="separator:a439d1273dd238888045148efebac2333"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a39fa578b833d4c48b8090804a97c918b">PORT_IN_IN_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a39fa578b833d4c48b8090804a97c918b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_IN) PORT Data Input Value <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_IN_IN_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF) &lt;&lt; <a class="el" href="component_2port_8h.html#a39fa578b833d4c48b8090804a97c918b">PORT_IN_IN_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_IN_IN</b>(value)&#160;&#160;&#160;(PORT_IN_IN_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2port_8h.html#a39fa578b833d4c48b8090804a97c918b">PORT_IN_IN_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#ac632cdcc705e953c0b1040681bb7056a">PORT_IN_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:ac632cdcc705e953c0b1040681bb7056a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_IN) MASK Register <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a3a53a2a2a7695aa20f7827ceafcec8d5">PORT_CTRL_OFFSET</a>&#160;&#160;&#160;0x24</td></tr>
<tr class="memdesc:a3a53a2a2a7695aa20f7827ceafcec8d5"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_CTRL offset) Control <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a24912324fee45dc65e6d91dce8b908c3">PORT_CTRL_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a24912324fee45dc65e6d91dce8b908c3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_CTRL reset_value) Control <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#af27535115d3c255e443dbe76e1e1a03c">PORT_CTRL_SAMPLING_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:af27535115d3c255e443dbe76e1e1a03c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_CTRL) Input Sampling Mode <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_CTRL_SAMPLING_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF) &lt;&lt; <a class="el" href="component_2port_8h.html#af27535115d3c255e443dbe76e1e1a03c">PORT_CTRL_SAMPLING_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_CTRL_SAMPLING</b>(value)&#160;&#160;&#160;(PORT_CTRL_SAMPLING_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2port_8h.html#af27535115d3c255e443dbe76e1e1a03c">PORT_CTRL_SAMPLING_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a9c5aed68de5b7c9dd9239edbd64af23b">PORT_CTRL_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:a9c5aed68de5b7c9dd9239edbd64af23b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_CTRL) MASK Register <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a9d707b59cf1ecab326071c79a1334f67">PORT_WRCONFIG_OFFSET</a>&#160;&#160;&#160;0x28</td></tr>
<tr class="memdesc:a9d707b59cf1ecab326071c79a1334f67"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_WRCONFIG offset) Write Configuration <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a1962785a10daf1e85b2bab4203bc0f30">PORT_WRCONFIG_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a1962785a10daf1e85b2bab4203bc0f30"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_WRCONFIG reset_value) Write Configuration <br /></td></tr>
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<tr class="memitem:ab1a78a8f36fb7fceed5ec4b2f821670e"><td class="memItemLeft" align="right" valign="top"><a id="ab1a78a8f36fb7fceed5ec4b2f821670e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#ab1a78a8f36fb7fceed5ec4b2f821670e">PORT_WRCONFIG_PINMASK_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ab1a78a8f36fb7fceed5ec4b2f821670e"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_WRCONFIG) Pin Mask for Multiple Pin Configuration <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_WRCONFIG_PINMASK_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF) &lt;&lt; <a class="el" href="component_2port_8h.html#ab1a78a8f36fb7fceed5ec4b2f821670e">PORT_WRCONFIG_PINMASK_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_WRCONFIG_PINMASK</b>(value)&#160;&#160;&#160;(PORT_WRCONFIG_PINMASK_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2port_8h.html#ab1a78a8f36fb7fceed5ec4b2f821670e">PORT_WRCONFIG_PINMASK_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#aafa832687961ca48e5dacadda81a6371">PORT_WRCONFIG_PMUXEN_Pos</a>&#160;&#160;&#160;16</td></tr>
<tr class="memdesc:aafa832687961ca48e5dacadda81a6371"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_WRCONFIG) Peripheral Multiplexer Enable <br /></td></tr>
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<tr class="memitem:a6ab07d485a3b9379cf529664d618e768"><td class="memItemLeft" align="right" valign="top"><a id="a6ab07d485a3b9379cf529664d618e768"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_WRCONFIG_PMUXEN</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2port_8h.html#aafa832687961ca48e5dacadda81a6371">PORT_WRCONFIG_PMUXEN_Pos</a>)</td></tr>
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<tr class="memitem:a54ebbb830cf16e6a9fc18bbc5879684a"><td class="memItemLeft" align="right" valign="top"><a id="a54ebbb830cf16e6a9fc18bbc5879684a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a54ebbb830cf16e6a9fc18bbc5879684a">PORT_WRCONFIG_INEN_Pos</a>&#160;&#160;&#160;17</td></tr>
<tr class="memdesc:a54ebbb830cf16e6a9fc18bbc5879684a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_WRCONFIG) Input Enable <br /></td></tr>
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<tr class="memitem:add5762cfb19c27a0831497111b8bf99f"><td class="memItemLeft" align="right" valign="top"><a id="add5762cfb19c27a0831497111b8bf99f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_WRCONFIG_INEN</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2port_8h.html#a54ebbb830cf16e6a9fc18bbc5879684a">PORT_WRCONFIG_INEN_Pos</a>)</td></tr>
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<tr class="memitem:a69f7af299459c5a15bccf50da8b5240d"><td class="memItemLeft" align="right" valign="top"><a id="a69f7af299459c5a15bccf50da8b5240d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a69f7af299459c5a15bccf50da8b5240d">PORT_WRCONFIG_PULLEN_Pos</a>&#160;&#160;&#160;18</td></tr>
<tr class="memdesc:a69f7af299459c5a15bccf50da8b5240d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_WRCONFIG) Pull Enable <br /></td></tr>
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<tr class="memitem:a1b7efe7fb02e3da8402e319f0bd4314a"><td class="memItemLeft" align="right" valign="top"><a id="a1b7efe7fb02e3da8402e319f0bd4314a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_WRCONFIG_PULLEN</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2port_8h.html#a69f7af299459c5a15bccf50da8b5240d">PORT_WRCONFIG_PULLEN_Pos</a>)</td></tr>
<tr class="separator:a1b7efe7fb02e3da8402e319f0bd4314a"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#ae2dd656b888ede1553412037840d6ac4">PORT_WRCONFIG_DRVSTR_Pos</a>&#160;&#160;&#160;22</td></tr>
<tr class="memdesc:ae2dd656b888ede1553412037840d6ac4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_WRCONFIG) Output Driver Strength Selection <br /></td></tr>
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<tr class="memitem:aaa9cec94d7f7ebc2df0d6ce88456c797"><td class="memItemLeft" align="right" valign="top"><a id="aaa9cec94d7f7ebc2df0d6ce88456c797"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_WRCONFIG_DRVSTR</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2port_8h.html#ae2dd656b888ede1553412037840d6ac4">PORT_WRCONFIG_DRVSTR_Pos</a>)</td></tr>
<tr class="separator:aaa9cec94d7f7ebc2df0d6ce88456c797"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#ad821493573ea6954861bdb5007458439">PORT_WRCONFIG_PMUX_Pos</a>&#160;&#160;&#160;24</td></tr>
<tr class="memdesc:ad821493573ea6954861bdb5007458439"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_WRCONFIG) Peripheral Multiplexing <br /></td></tr>
<tr class="separator:ad821493573ea6954861bdb5007458439"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aed50ce1ba0629befed40ccf940ea623e"><td class="memItemLeft" align="right" valign="top"><a id="aed50ce1ba0629befed40ccf940ea623e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_WRCONFIG_PMUX_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2port_8h.html#ad821493573ea6954861bdb5007458439">PORT_WRCONFIG_PMUX_Pos</a>)</td></tr>
<tr class="separator:aed50ce1ba0629befed40ccf940ea623e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a79d664bf70f1494ebd35f75905b98ca3"><td class="memItemLeft" align="right" valign="top"><a id="a79d664bf70f1494ebd35f75905b98ca3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_WRCONFIG_PMUX</b>(value)&#160;&#160;&#160;(PORT_WRCONFIG_PMUX_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2port_8h.html#ad821493573ea6954861bdb5007458439">PORT_WRCONFIG_PMUX_Pos</a>))</td></tr>
<tr class="separator:a79d664bf70f1494ebd35f75905b98ca3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af5c01e870b3cd28ea4b5d16e0970f641"><td class="memItemLeft" align="right" valign="top"><a id="af5c01e870b3cd28ea4b5d16e0970f641"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#af5c01e870b3cd28ea4b5d16e0970f641">PORT_WRCONFIG_WRPMUX_Pos</a>&#160;&#160;&#160;28</td></tr>
<tr class="memdesc:af5c01e870b3cd28ea4b5d16e0970f641"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_WRCONFIG) Write PMUX <br /></td></tr>
<tr class="separator:af5c01e870b3cd28ea4b5d16e0970f641"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a41389a6f616a685fbca4a6cbb6e48206"><td class="memItemLeft" align="right" valign="top"><a id="a41389a6f616a685fbca4a6cbb6e48206"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_WRCONFIG_WRPMUX</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2port_8h.html#af5c01e870b3cd28ea4b5d16e0970f641">PORT_WRCONFIG_WRPMUX_Pos</a>)</td></tr>
<tr class="separator:a41389a6f616a685fbca4a6cbb6e48206"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac9e9a5084c654419e2762a4557fc0fe0"><td class="memItemLeft" align="right" valign="top"><a id="ac9e9a5084c654419e2762a4557fc0fe0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#ac9e9a5084c654419e2762a4557fc0fe0">PORT_WRCONFIG_WRPINCFG_Pos</a>&#160;&#160;&#160;30</td></tr>
<tr class="memdesc:ac9e9a5084c654419e2762a4557fc0fe0"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_WRCONFIG) Write PINCFG <br /></td></tr>
<tr class="separator:ac9e9a5084c654419e2762a4557fc0fe0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af100527c943f5f4af1132a46c7d2340f"><td class="memItemLeft" align="right" valign="top"><a id="af100527c943f5f4af1132a46c7d2340f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_WRCONFIG_WRPINCFG</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2port_8h.html#ac9e9a5084c654419e2762a4557fc0fe0">PORT_WRCONFIG_WRPINCFG_Pos</a>)</td></tr>
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<tr class="memitem:ac3b5f0e8062dcbecbc11d515cbc11dd1"><td class="memItemLeft" align="right" valign="top"><a id="ac3b5f0e8062dcbecbc11d515cbc11dd1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#ac3b5f0e8062dcbecbc11d515cbc11dd1">PORT_WRCONFIG_HWSEL_Pos</a>&#160;&#160;&#160;31</td></tr>
<tr class="memdesc:ac3b5f0e8062dcbecbc11d515cbc11dd1"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_WRCONFIG) Half-Word Select <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_WRCONFIG_HWSEL</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2port_8h.html#ac3b5f0e8062dcbecbc11d515cbc11dd1">PORT_WRCONFIG_HWSEL_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a3d16ca9f7506e69958fe01fcffb6f8fd">PORT_WRCONFIG_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xDF47FFFF)</td></tr>
<tr class="memdesc:a3d16ca9f7506e69958fe01fcffb6f8fd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_WRCONFIG) MASK Register <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a4b64423d2758a4f1bba1badf79821d40">PORT_EVCTRL_OFFSET</a>&#160;&#160;&#160;0x2C</td></tr>
<tr class="memdesc:a4b64423d2758a4f1bba1badf79821d40"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_EVCTRL offset) Event Input Control <br /></td></tr>
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<tr class="memitem:a0738c519ca0891aebbbb0c3b6c16a7e8"><td class="memItemLeft" align="right" valign="top"><a id="a0738c519ca0891aebbbb0c3b6c16a7e8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a0738c519ca0891aebbbb0c3b6c16a7e8">PORT_EVCTRL_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
<tr class="memdesc:a0738c519ca0891aebbbb0c3b6c16a7e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_EVCTRL reset_value) Event Input Control <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#ac8c61aca87d2364723a79981619eaf1a">PORT_EVCTRL_PID0_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ac8c61aca87d2364723a79981619eaf1a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_EVCTRL) PORT Event Pin Identifier 0 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_EVCTRL_PID0_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1F) &lt;&lt; <a class="el" href="component_2port_8h.html#ac8c61aca87d2364723a79981619eaf1a">PORT_EVCTRL_PID0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_EVCTRL_PID0</b>(value)&#160;&#160;&#160;(PORT_EVCTRL_PID0_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2port_8h.html#ac8c61aca87d2364723a79981619eaf1a">PORT_EVCTRL_PID0_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a34e976f20ab7a82c517be8a4e6fe3ac8">PORT_EVCTRL_EVACT0_Pos</a>&#160;&#160;&#160;5</td></tr>
<tr class="memdesc:a34e976f20ab7a82c517be8a4e6fe3ac8"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_EVCTRL) PORT Event Action 0 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_EVCTRL_EVACT0_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2port_8h.html#a34e976f20ab7a82c517be8a4e6fe3ac8">PORT_EVCTRL_EVACT0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_EVCTRL_EVACT0</b>(value)&#160;&#160;&#160;(PORT_EVCTRL_EVACT0_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2port_8h.html#a34e976f20ab7a82c517be8a4e6fe3ac8">PORT_EVCTRL_EVACT0_Pos</a>))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a88aaee02ec1f0b9686456310e3d45f47">PORT_EVCTRL_EVACT0_OUT_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
<tr class="memdesc:a88aaee02ec1f0b9686456310e3d45f47"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_EVCTRL) Event output to pin <br /></td></tr>
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<tr class="memitem:a631c6b4d7860db50a679c15796c096ce"><td class="memItemLeft" align="right" valign="top"><a id="a631c6b4d7860db50a679c15796c096ce"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a631c6b4d7860db50a679c15796c096ce">PORT_EVCTRL_EVACT0_SET_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
<tr class="memdesc:a631c6b4d7860db50a679c15796c096ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_EVCTRL) Set output register of pin on event <br /></td></tr>
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<tr class="memitem:a99f834eac30880a07af2a3625b39fcb3"><td class="memItemLeft" align="right" valign="top"><a id="a99f834eac30880a07af2a3625b39fcb3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a99f834eac30880a07af2a3625b39fcb3">PORT_EVCTRL_EVACT0_CLR_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
<tr class="memdesc:a99f834eac30880a07af2a3625b39fcb3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_EVCTRL) Clear output register of pin on event <br /></td></tr>
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<tr class="memitem:a72b02ed6101a538c353b771cb89d481d"><td class="memItemLeft" align="right" valign="top"><a id="a72b02ed6101a538c353b771cb89d481d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a72b02ed6101a538c353b771cb89d481d">PORT_EVCTRL_EVACT0_TGL_Val</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
<tr class="memdesc:a72b02ed6101a538c353b771cb89d481d"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_EVCTRL) Toggle output register of pin on event <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_EVCTRL_EVACT0_OUT</b>&#160;&#160;&#160;(<a class="el" href="component_2port_8h.html#a88aaee02ec1f0b9686456310e3d45f47">PORT_EVCTRL_EVACT0_OUT_Val</a> &lt;&lt; <a class="el" href="component_2port_8h.html#a34e976f20ab7a82c517be8a4e6fe3ac8">PORT_EVCTRL_EVACT0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_EVCTRL_EVACT0_SET</b>&#160;&#160;&#160;(<a class="el" href="component_2port_8h.html#a631c6b4d7860db50a679c15796c096ce">PORT_EVCTRL_EVACT0_SET_Val</a> &lt;&lt; <a class="el" href="component_2port_8h.html#a34e976f20ab7a82c517be8a4e6fe3ac8">PORT_EVCTRL_EVACT0_Pos</a>)</td></tr>
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<tr class="memitem:a4c8c6a29421d0e9caad46e4e7d2ec7ec"><td class="memItemLeft" align="right" valign="top"><a id="a4c8c6a29421d0e9caad46e4e7d2ec7ec"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_EVCTRL_EVACT0_CLR</b>&#160;&#160;&#160;(<a class="el" href="component_2port_8h.html#a99f834eac30880a07af2a3625b39fcb3">PORT_EVCTRL_EVACT0_CLR_Val</a> &lt;&lt; <a class="el" href="component_2port_8h.html#a34e976f20ab7a82c517be8a4e6fe3ac8">PORT_EVCTRL_EVACT0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_EVCTRL_EVACT0_TGL</b>&#160;&#160;&#160;(<a class="el" href="component_2port_8h.html#a72b02ed6101a538c353b771cb89d481d">PORT_EVCTRL_EVACT0_TGL_Val</a> &lt;&lt; <a class="el" href="component_2port_8h.html#a34e976f20ab7a82c517be8a4e6fe3ac8">PORT_EVCTRL_EVACT0_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a88f4bfafa9042b97077d13d5eaaac2af">PORT_EVCTRL_PORTEI0_Pos</a>&#160;&#160;&#160;7</td></tr>
<tr class="memdesc:a88f4bfafa9042b97077d13d5eaaac2af"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_EVCTRL) PORT Event Input Enable 0 <br /></td></tr>
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<tr class="memitem:a62af651d85d73dc4913ce9e77796d7dc"><td class="memItemLeft" align="right" valign="top"><a id="a62af651d85d73dc4913ce9e77796d7dc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_EVCTRL_PORTEI0</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2port_8h.html#a88f4bfafa9042b97077d13d5eaaac2af">PORT_EVCTRL_PORTEI0_Pos</a>)</td></tr>
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<tr class="memitem:a3b4c736f727d87be5bd9343cba9d3cd4"><td class="memItemLeft" align="right" valign="top"><a id="a3b4c736f727d87be5bd9343cba9d3cd4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a3b4c736f727d87be5bd9343cba9d3cd4">PORT_EVCTRL_PID1_Pos</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:a3b4c736f727d87be5bd9343cba9d3cd4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_EVCTRL) PORT Event Pin Identifier 1 <br /></td></tr>
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<tr class="memitem:a176c1ebe1a3a4dd2bea6069c6490387b"><td class="memItemLeft" align="right" valign="top"><a id="a176c1ebe1a3a4dd2bea6069c6490387b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_EVCTRL_PID1_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1F) &lt;&lt; <a class="el" href="component_2port_8h.html#a3b4c736f727d87be5bd9343cba9d3cd4">PORT_EVCTRL_PID1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_EVCTRL_PID1</b>(value)&#160;&#160;&#160;(PORT_EVCTRL_PID1_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2port_8h.html#a3b4c736f727d87be5bd9343cba9d3cd4">PORT_EVCTRL_PID1_Pos</a>))</td></tr>
<tr class="separator:a34418908d5ddd5e0ecfefdd4d9529885"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2800a8b732f0fe2a59d621a6a223e2fd"><td class="memItemLeft" align="right" valign="top"><a id="a2800a8b732f0fe2a59d621a6a223e2fd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a2800a8b732f0fe2a59d621a6a223e2fd">PORT_EVCTRL_EVACT1_Pos</a>&#160;&#160;&#160;13</td></tr>
<tr class="memdesc:a2800a8b732f0fe2a59d621a6a223e2fd"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_EVCTRL) PORT Event Action 1 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_EVCTRL_EVACT1_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2port_8h.html#a2800a8b732f0fe2a59d621a6a223e2fd">PORT_EVCTRL_EVACT1_Pos</a>)</td></tr>
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<tr class="memitem:a68944fb2b9981a0aab66f54b0f508320"><td class="memItemLeft" align="right" valign="top"><a id="a68944fb2b9981a0aab66f54b0f508320"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_EVCTRL_EVACT1</b>(value)&#160;&#160;&#160;(PORT_EVCTRL_EVACT1_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2port_8h.html#a2800a8b732f0fe2a59d621a6a223e2fd">PORT_EVCTRL_EVACT1_Pos</a>))</td></tr>
<tr class="separator:a68944fb2b9981a0aab66f54b0f508320"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8bfeb0b02717c696f7e1af20e4ca77c5"><td class="memItemLeft" align="right" valign="top"><a id="a8bfeb0b02717c696f7e1af20e4ca77c5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a8bfeb0b02717c696f7e1af20e4ca77c5">PORT_EVCTRL_PORTEI1_Pos</a>&#160;&#160;&#160;15</td></tr>
<tr class="memdesc:a8bfeb0b02717c696f7e1af20e4ca77c5"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_EVCTRL) PORT Event Input Enable 1 <br /></td></tr>
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<tr class="memitem:a4a0e0425148de6aef2441cfc497d5ff4"><td class="memItemLeft" align="right" valign="top"><a id="a4a0e0425148de6aef2441cfc497d5ff4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_EVCTRL_PORTEI1</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2port_8h.html#a8bfeb0b02717c696f7e1af20e4ca77c5">PORT_EVCTRL_PORTEI1_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#aa21f7704518c8b141129d4bded526ffa">PORT_EVCTRL_PID2_Pos</a>&#160;&#160;&#160;16</td></tr>
<tr class="memdesc:aa21f7704518c8b141129d4bded526ffa"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_EVCTRL) PORT Event Pin Identifier 2 <br /></td></tr>
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<tr class="memitem:a346d437ebf7b41a9a49da801e9f6517b"><td class="memItemLeft" align="right" valign="top"><a id="a346d437ebf7b41a9a49da801e9f6517b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_EVCTRL_PID2_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1F) &lt;&lt; <a class="el" href="component_2port_8h.html#aa21f7704518c8b141129d4bded526ffa">PORT_EVCTRL_PID2_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_EVCTRL_PID2</b>(value)&#160;&#160;&#160;(PORT_EVCTRL_PID2_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2port_8h.html#aa21f7704518c8b141129d4bded526ffa">PORT_EVCTRL_PID2_Pos</a>))</td></tr>
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<tr class="memitem:acd45d1b50592f003b3d9e42a85132211"><td class="memItemLeft" align="right" valign="top"><a id="acd45d1b50592f003b3d9e42a85132211"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#acd45d1b50592f003b3d9e42a85132211">PORT_EVCTRL_EVACT2_Pos</a>&#160;&#160;&#160;21</td></tr>
<tr class="memdesc:acd45d1b50592f003b3d9e42a85132211"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_EVCTRL) PORT Event Action 2 <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_EVCTRL_EVACT2_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2port_8h.html#acd45d1b50592f003b3d9e42a85132211">PORT_EVCTRL_EVACT2_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_EVCTRL_EVACT2</b>(value)&#160;&#160;&#160;(PORT_EVCTRL_EVACT2_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2port_8h.html#acd45d1b50592f003b3d9e42a85132211">PORT_EVCTRL_EVACT2_Pos</a>))</td></tr>
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<tr class="memitem:a5314beeda2b4a48292ede491bf20d093"><td class="memItemLeft" align="right" valign="top"><a id="a5314beeda2b4a48292ede491bf20d093"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a5314beeda2b4a48292ede491bf20d093">PORT_EVCTRL_PORTEI2_Pos</a>&#160;&#160;&#160;23</td></tr>
<tr class="memdesc:a5314beeda2b4a48292ede491bf20d093"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_EVCTRL) PORT Event Input Enable 2 <br /></td></tr>
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<tr class="memitem:a92499272df8129b33c5a677d41d79a51"><td class="memItemLeft" align="right" valign="top"><a id="a92499272df8129b33c5a677d41d79a51"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_EVCTRL_PORTEI2</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2port_8h.html#a5314beeda2b4a48292ede491bf20d093">PORT_EVCTRL_PORTEI2_Pos</a>)</td></tr>
<tr class="separator:a92499272df8129b33c5a677d41d79a51"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac60f3d827e52d29afc68baf448f3133b"><td class="memItemLeft" align="right" valign="top"><a id="ac60f3d827e52d29afc68baf448f3133b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#ac60f3d827e52d29afc68baf448f3133b">PORT_EVCTRL_PID3_Pos</a>&#160;&#160;&#160;24</td></tr>
<tr class="memdesc:ac60f3d827e52d29afc68baf448f3133b"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_EVCTRL) PORT Event Pin Identifier 3 <br /></td></tr>
<tr class="separator:ac60f3d827e52d29afc68baf448f3133b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac1775be3c8bdf4a2b12bec995200547d"><td class="memItemLeft" align="right" valign="top"><a id="ac1775be3c8bdf4a2b12bec995200547d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_EVCTRL_PID3_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1F) &lt;&lt; <a class="el" href="component_2port_8h.html#ac60f3d827e52d29afc68baf448f3133b">PORT_EVCTRL_PID3_Pos</a>)</td></tr>
<tr class="separator:ac1775be3c8bdf4a2b12bec995200547d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a718dc93cbf01d907bf0e08061e23fa16"><td class="memItemLeft" align="right" valign="top"><a id="a718dc93cbf01d907bf0e08061e23fa16"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_EVCTRL_PID3</b>(value)&#160;&#160;&#160;(PORT_EVCTRL_PID3_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2port_8h.html#ac60f3d827e52d29afc68baf448f3133b">PORT_EVCTRL_PID3_Pos</a>))</td></tr>
<tr class="separator:a718dc93cbf01d907bf0e08061e23fa16"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa35b06ebab0565a6a5ee15f1099ac4c4"><td class="memItemLeft" align="right" valign="top"><a id="aa35b06ebab0565a6a5ee15f1099ac4c4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#aa35b06ebab0565a6a5ee15f1099ac4c4">PORT_EVCTRL_EVACT3_Pos</a>&#160;&#160;&#160;29</td></tr>
<tr class="memdesc:aa35b06ebab0565a6a5ee15f1099ac4c4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_EVCTRL) PORT Event Action 3 <br /></td></tr>
<tr class="separator:aa35b06ebab0565a6a5ee15f1099ac4c4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af5a3c61a631db36e1ef5b0ecdf8e5e71"><td class="memItemLeft" align="right" valign="top"><a id="af5a3c61a631db36e1ef5b0ecdf8e5e71"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_EVCTRL_EVACT3_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) &lt;&lt; <a class="el" href="component_2port_8h.html#aa35b06ebab0565a6a5ee15f1099ac4c4">PORT_EVCTRL_EVACT3_Pos</a>)</td></tr>
<tr class="separator:af5a3c61a631db36e1ef5b0ecdf8e5e71"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3ad7c5b187811e20124753a158c9a310"><td class="memItemLeft" align="right" valign="top"><a id="a3ad7c5b187811e20124753a158c9a310"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_EVCTRL_EVACT3</b>(value)&#160;&#160;&#160;(PORT_EVCTRL_EVACT3_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2port_8h.html#aa35b06ebab0565a6a5ee15f1099ac4c4">PORT_EVCTRL_EVACT3_Pos</a>))</td></tr>
<tr class="separator:a3ad7c5b187811e20124753a158c9a310"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7cd6572f4b33d084356d9a523ded28de"><td class="memItemLeft" align="right" valign="top"><a id="a7cd6572f4b33d084356d9a523ded28de"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a7cd6572f4b33d084356d9a523ded28de">PORT_EVCTRL_PORTEI3_Pos</a>&#160;&#160;&#160;31</td></tr>
<tr class="memdesc:a7cd6572f4b33d084356d9a523ded28de"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_EVCTRL) PORT Event Input Enable 3 <br /></td></tr>
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<tr class="memitem:a47cb485a47d099c325a5a9280e4d0bab"><td class="memItemLeft" align="right" valign="top"><a id="a47cb485a47d099c325a5a9280e4d0bab"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_EVCTRL_PORTEI3</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2port_8h.html#a7cd6572f4b33d084356d9a523ded28de">PORT_EVCTRL_PORTEI3_Pos</a>)</td></tr>
<tr class="separator:a47cb485a47d099c325a5a9280e4d0bab"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:acff97e1262ff21624f76c9169653e4a4"><td class="memItemLeft" align="right" valign="top"><a id="acff97e1262ff21624f76c9169653e4a4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#acff97e1262ff21624f76c9169653e4a4">PORT_EVCTRL_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
<tr class="memdesc:acff97e1262ff21624f76c9169653e4a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_EVCTRL) MASK Register <br /></td></tr>
<tr class="separator:acff97e1262ff21624f76c9169653e4a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2b2cfb87664f62a60eb5f01a7fbf4e9a"><td class="memItemLeft" align="right" valign="top"><a id="a2b2cfb87664f62a60eb5f01a7fbf4e9a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a2b2cfb87664f62a60eb5f01a7fbf4e9a">PORT_PMUX_OFFSET</a>&#160;&#160;&#160;0x30</td></tr>
<tr class="memdesc:a2b2cfb87664f62a60eb5f01a7fbf4e9a"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_PMUX offset) Peripheral Multiplexing <br /></td></tr>
<tr class="separator:a2b2cfb87664f62a60eb5f01a7fbf4e9a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4a150e2f7e2344a8a2f7e3d08ef6c39f"><td class="memItemLeft" align="right" valign="top"><a id="a4a150e2f7e2344a8a2f7e3d08ef6c39f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a4a150e2f7e2344a8a2f7e3d08ef6c39f">PORT_PMUX_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a4a150e2f7e2344a8a2f7e3d08ef6c39f"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_PMUX reset_value) Peripheral Multiplexing <br /></td></tr>
<tr class="separator:a4a150e2f7e2344a8a2f7e3d08ef6c39f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a38a4c4871ecabeb4ad36398b73685bac"><td class="memItemLeft" align="right" valign="top"><a id="a38a4c4871ecabeb4ad36398b73685bac"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a38a4c4871ecabeb4ad36398b73685bac">PORT_PMUX_PMUXE_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a38a4c4871ecabeb4ad36398b73685bac"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_PMUX) Peripheral Multiplexing for Even-Numbered Pin <br /></td></tr>
<tr class="separator:a38a4c4871ecabeb4ad36398b73685bac"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae955cb77e730b16d702cd0fcdb156ec4"><td class="memItemLeft" align="right" valign="top"><a id="ae955cb77e730b16d702cd0fcdb156ec4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_PMUX_PMUXE_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2port_8h.html#a38a4c4871ecabeb4ad36398b73685bac">PORT_PMUX_PMUXE_Pos</a>)</td></tr>
<tr class="separator:ae955cb77e730b16d702cd0fcdb156ec4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1a0548ef99b601e76ee01c5de4b8f32b"><td class="memItemLeft" align="right" valign="top"><a id="a1a0548ef99b601e76ee01c5de4b8f32b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_PMUX_PMUXE</b>(value)&#160;&#160;&#160;(PORT_PMUX_PMUXE_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2port_8h.html#a38a4c4871ecabeb4ad36398b73685bac">PORT_PMUX_PMUXE_Pos</a>))</td></tr>
<tr class="separator:a1a0548ef99b601e76ee01c5de4b8f32b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a80a28619ad2db553b64d4ce4545368d3"><td class="memItemLeft" align="right" valign="top"><a id="a80a28619ad2db553b64d4ce4545368d3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a80a28619ad2db553b64d4ce4545368d3">PORT_PMUX_PMUXO_Pos</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:a80a28619ad2db553b64d4ce4545368d3"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_PMUX) Peripheral Multiplexing for Odd-Numbered Pin <br /></td></tr>
<tr class="separator:a80a28619ad2db553b64d4ce4545368d3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afd360b4eecfb7fb93fde5c9e1c6da3a0"><td class="memItemLeft" align="right" valign="top"><a id="afd360b4eecfb7fb93fde5c9e1c6da3a0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_PMUX_PMUXO_Msk</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) &lt;&lt; <a class="el" href="component_2port_8h.html#a80a28619ad2db553b64d4ce4545368d3">PORT_PMUX_PMUXO_Pos</a>)</td></tr>
<tr class="separator:afd360b4eecfb7fb93fde5c9e1c6da3a0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9e83be4ac2a68323e1910518c9290f21"><td class="memItemLeft" align="right" valign="top"><a id="a9e83be4ac2a68323e1910518c9290f21"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_PMUX_PMUXO</b>(value)&#160;&#160;&#160;(PORT_PMUX_PMUXO_Msk &amp; ((value) &lt;&lt; <a class="el" href="component_2port_8h.html#a80a28619ad2db553b64d4ce4545368d3">PORT_PMUX_PMUXO_Pos</a>))</td></tr>
<tr class="separator:a9e83be4ac2a68323e1910518c9290f21"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1b48850f8861140de4eb5b75544f05e7"><td class="memItemLeft" align="right" valign="top"><a id="a1b48850f8861140de4eb5b75544f05e7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a1b48850f8861140de4eb5b75544f05e7">PORT_PMUX_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF)</td></tr>
<tr class="memdesc:a1b48850f8861140de4eb5b75544f05e7"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_PMUX) MASK Register <br /></td></tr>
<tr class="separator:a1b48850f8861140de4eb5b75544f05e7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5329a91f7ccfbc23850b5be176724aec"><td class="memItemLeft" align="right" valign="top"><a id="a5329a91f7ccfbc23850b5be176724aec"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a5329a91f7ccfbc23850b5be176724aec">PORT_PINCFG_OFFSET</a>&#160;&#160;&#160;0x40</td></tr>
<tr class="memdesc:a5329a91f7ccfbc23850b5be176724aec"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_PINCFG offset) Pin Configuration <br /></td></tr>
<tr class="separator:a5329a91f7ccfbc23850b5be176724aec"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4e8b3dae5451509a2d436e492ecc4f52"><td class="memItemLeft" align="right" valign="top"><a id="a4e8b3dae5451509a2d436e492ecc4f52"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a4e8b3dae5451509a2d436e492ecc4f52">PORT_PINCFG_RESETVALUE</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
<tr class="memdesc:a4e8b3dae5451509a2d436e492ecc4f52"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_PINCFG reset_value) Pin Configuration <br /></td></tr>
<tr class="separator:a4e8b3dae5451509a2d436e492ecc4f52"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1b62eff2451a3e0cfe61e19024900c17"><td class="memItemLeft" align="right" valign="top"><a id="a1b62eff2451a3e0cfe61e19024900c17"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a1b62eff2451a3e0cfe61e19024900c17">PORT_PINCFG_PMUXEN_Pos</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:a1b62eff2451a3e0cfe61e19024900c17"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_PINCFG) Peripheral Multiplexer Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_PINCFG_PMUXEN</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2port_8h.html#a1b62eff2451a3e0cfe61e19024900c17">PORT_PINCFG_PMUXEN_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a485a99f4d0377f2ab8f26a2f79ef6604">PORT_PINCFG_INEN_Pos</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:a485a99f4d0377f2ab8f26a2f79ef6604"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_PINCFG) Input Enable <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_PINCFG_INEN</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2port_8h.html#a485a99f4d0377f2ab8f26a2f79ef6604">PORT_PINCFG_INEN_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a686c2d965f888e1538721fee55c89fb5">PORT_PINCFG_PULLEN_Pos</a>&#160;&#160;&#160;2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_PINCFG_PULLEN</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2port_8h.html#a686c2d965f888e1538721fee55c89fb5">PORT_PINCFG_PULLEN_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a42ef9392a67cfdc9f6d712f9d758f379">PORT_PINCFG_DRVSTR_Pos</a>&#160;&#160;&#160;6</td></tr>
<tr class="memdesc:a42ef9392a67cfdc9f6d712f9d758f379"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_PINCFG) Output Driver Strength Selection <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PORT_PINCFG_DRVSTR</b>&#160;&#160;&#160;(<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) &lt;&lt; <a class="el" href="component_2port_8h.html#a42ef9392a67cfdc9f6d712f9d758f379">PORT_PINCFG_DRVSTR_Pos</a>)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="component_2port_8h.html#a6e82d11b9330c18aa786f4f4693fa55c">PORT_PINCFG_MASK</a>&#160;&#160;&#160;<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x47)</td></tr>
<tr class="memdesc:a6e82d11b9330c18aa786f4f4693fa55c"><td class="mdescLeft">&#160;</td><td class="mdescRight">(PORT_PINCFG) MASK Register <br /></td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Component description for PORT. </p>
<p>Copyright (c) 2019 Microchip Technology Inc.</p>
<p>\asf_license_start </p>
<p class="definition">Definition in file <a class="el" href="component_2port_8h_source.html">port.h</a>.</p>
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