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1554 lines
256 KiB
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1554 lines
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<title>SAME54P20A Test Project: /storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/i2s.h File Reference</title>
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<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_2bb2e10400507f879251f0324a0a8c7c.html">component</a></li> </ul>
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<a href="#nested-classes">Data Structures</a> |
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<a href="#define-members">Macros</a> </div>
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<div class="headertitle">
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<div class="title">i2s.h File Reference</div> </div>
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</div><!--header-->
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<div class="contents">
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<p>Component description for I2S.
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<a href="#details">More...</a></p>
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<p><a href="component_2i2s_8h_source.html">Go to the source code of this file.</a></p>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a>
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Data Structures</h2></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionI2S__CTRLA__Type.html">I2S_CTRLA_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionI2S__CLKCTRL__Type.html">I2S_CLKCTRL_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionI2S__INTENCLR__Type.html">I2S_INTENCLR_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionI2S__INTENSET__Type.html">I2S_INTENSET_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionI2S__INTFLAG__Type.html">I2S_INTFLAG_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionI2S__SYNCBUSY__Type.html">I2S_SYNCBUSY_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionI2S__TXCTRL__Type.html">I2S_TXCTRL_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionI2S__RXCTRL__Type.html">I2S_RXCTRL_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionI2S__TXDATA__Type.html">I2S_TXDATA_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionI2S__RXDATA__Type.html">I2S_RXDATA_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="structI2s.html">I2s</a></td></tr>
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<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">I2S hardware registers. <a href="structI2s.html#details">More...</a><br /></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:a1b77184c9cb24174a046ad3780533506"><td class="memItemLeft" align="right" valign="top"><a id="a1b77184c9cb24174a046ad3780533506"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_U2224</b></td></tr>
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<tr class="separator:a1b77184c9cb24174a046ad3780533506"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab3cc351208f2a37adb18d25a1608295e"><td class="memItemLeft" align="right" valign="top"><a id="ab3cc351208f2a37adb18d25a1608295e"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>REV_I2S</b>   0x200</td></tr>
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<tr class="separator:ab3cc351208f2a37adb18d25a1608295e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6d620cfa3bc2af7bdbbbae9252f5b567"><td class="memItemLeft" align="right" valign="top"><a id="a6d620cfa3bc2af7bdbbbae9252f5b567"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a6d620cfa3bc2af7bdbbbae9252f5b567">I2S_CTRLA_OFFSET</a>   0x00</td></tr>
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<tr class="memdesc:a6d620cfa3bc2af7bdbbbae9252f5b567"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CTRLA offset) Control A <br /></td></tr>
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<tr class="separator:a6d620cfa3bc2af7bdbbbae9252f5b567"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac55724eab173039ae6acf553ed92c693"><td class="memItemLeft" align="right" valign="top"><a id="ac55724eab173039ae6acf553ed92c693"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#ac55724eab173039ae6acf553ed92c693">I2S_CTRLA_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
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<tr class="memdesc:ac55724eab173039ae6acf553ed92c693"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CTRLA reset_value) Control A <br /></td></tr>
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<tr class="separator:ac55724eab173039ae6acf553ed92c693"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a397b6ac745baf60099bd267adf4143a8"><td class="memItemLeft" align="right" valign="top"><a id="a397b6ac745baf60099bd267adf4143a8"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a397b6ac745baf60099bd267adf4143a8">I2S_CTRLA_SWRST_Pos</a>   0</td></tr>
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<tr class="memdesc:a397b6ac745baf60099bd267adf4143a8"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CTRLA) Software Reset <br /></td></tr>
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<tr class="separator:a397b6ac745baf60099bd267adf4143a8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aed039b9c7a91d09469b5f86b1b44d0c2"><td class="memItemLeft" align="right" valign="top"><a id="aed039b9c7a91d09469b5f86b1b44d0c2"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CTRLA_SWRST</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#a397b6ac745baf60099bd267adf4143a8">I2S_CTRLA_SWRST_Pos</a>)</td></tr>
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<tr class="separator:aed039b9c7a91d09469b5f86b1b44d0c2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3eca624a3bbc9c500de9624a3c816399"><td class="memItemLeft" align="right" valign="top"><a id="a3eca624a3bbc9c500de9624a3c816399"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a3eca624a3bbc9c500de9624a3c816399">I2S_CTRLA_ENABLE_Pos</a>   1</td></tr>
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<tr class="memdesc:a3eca624a3bbc9c500de9624a3c816399"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CTRLA) Enable <br /></td></tr>
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<tr class="separator:a3eca624a3bbc9c500de9624a3c816399"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acf2dacb0aa6f00d2f1115c42384788c7"><td class="memItemLeft" align="right" valign="top"><a id="acf2dacb0aa6f00d2f1115c42384788c7"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CTRLA_ENABLE</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#a3eca624a3bbc9c500de9624a3c816399">I2S_CTRLA_ENABLE_Pos</a>)</td></tr>
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<tr class="separator:acf2dacb0aa6f00d2f1115c42384788c7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7d77c4b6486ab5045b81fc091b9e338d"><td class="memItemLeft" align="right" valign="top"><a id="a7d77c4b6486ab5045b81fc091b9e338d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a7d77c4b6486ab5045b81fc091b9e338d">I2S_CTRLA_CKEN0_Pos</a>   2</td></tr>
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<tr class="memdesc:a7d77c4b6486ab5045b81fc091b9e338d"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CTRLA) Clock Unit 0 Enable <br /></td></tr>
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<tr class="separator:a7d77c4b6486ab5045b81fc091b9e338d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2f4c150a112be4da696c969952c910d9"><td class="memItemLeft" align="right" valign="top"><a id="a2f4c150a112be4da696c969952c910d9"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CTRLA_CKEN0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a7d77c4b6486ab5045b81fc091b9e338d">I2S_CTRLA_CKEN0_Pos</a>)</td></tr>
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<tr class="separator:a2f4c150a112be4da696c969952c910d9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8e21e63a40f88a9e5ec0542ff8df23c0"><td class="memItemLeft" align="right" valign="top"><a id="a8e21e63a40f88a9e5ec0542ff8df23c0"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a8e21e63a40f88a9e5ec0542ff8df23c0">I2S_CTRLA_CKEN1_Pos</a>   3</td></tr>
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<tr class="memdesc:a8e21e63a40f88a9e5ec0542ff8df23c0"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CTRLA) Clock Unit 1 Enable <br /></td></tr>
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<tr class="separator:a8e21e63a40f88a9e5ec0542ff8df23c0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:add6b7ad6d9052a5d24d9ece5e040026b"><td class="memItemLeft" align="right" valign="top"><a id="add6b7ad6d9052a5d24d9ece5e040026b"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CTRLA_CKEN1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a8e21e63a40f88a9e5ec0542ff8df23c0">I2S_CTRLA_CKEN1_Pos</a>)</td></tr>
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<tr class="separator:add6b7ad6d9052a5d24d9ece5e040026b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8c61333786563ab2ed03bfb976fc4e74"><td class="memItemLeft" align="right" valign="top"><a id="a8c61333786563ab2ed03bfb976fc4e74"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a8c61333786563ab2ed03bfb976fc4e74">I2S_CTRLA_CKEN_Pos</a>   2</td></tr>
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<tr class="memdesc:a8c61333786563ab2ed03bfb976fc4e74"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CTRLA) Clock Unit x Enable <br /></td></tr>
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<tr class="separator:a8c61333786563ab2ed03bfb976fc4e74"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2cd22fd7f0233a0731fab67198c9caab"><td class="memItemLeft" align="right" valign="top"><a id="a2cd22fd7f0233a0731fab67198c9caab"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CTRLA_CKEN_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2i2s_8h.html#a8c61333786563ab2ed03bfb976fc4e74">I2S_CTRLA_CKEN_Pos</a>)</td></tr>
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<tr class="separator:a2cd22fd7f0233a0731fab67198c9caab"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae551d4a28e1d7fef6423f5f1ab175748"><td class="memItemLeft" align="right" valign="top"><a id="ae551d4a28e1d7fef6423f5f1ab175748"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CTRLA_CKEN</b>(value)   (I2S_CTRLA_CKEN_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#a8c61333786563ab2ed03bfb976fc4e74">I2S_CTRLA_CKEN_Pos</a>))</td></tr>
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<tr class="separator:ae551d4a28e1d7fef6423f5f1ab175748"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a501e61ab1ba7bb3b2bac7373ff80bd5e"><td class="memItemLeft" align="right" valign="top"><a id="a501e61ab1ba7bb3b2bac7373ff80bd5e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a501e61ab1ba7bb3b2bac7373ff80bd5e">I2S_CTRLA_TXEN_Pos</a>   4</td></tr>
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<tr class="memdesc:a501e61ab1ba7bb3b2bac7373ff80bd5e"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CTRLA) Tx Serializer Enable <br /></td></tr>
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<tr class="separator:a501e61ab1ba7bb3b2bac7373ff80bd5e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a69460ab8e7550cc92ac9ba41aec30303"><td class="memItemLeft" align="right" valign="top"><a id="a69460ab8e7550cc92ac9ba41aec30303"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CTRLA_TXEN</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#a501e61ab1ba7bb3b2bac7373ff80bd5e">I2S_CTRLA_TXEN_Pos</a>)</td></tr>
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<tr class="separator:a69460ab8e7550cc92ac9ba41aec30303"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a06fcfeab9e39e7492298e3a4a3e58950"><td class="memItemLeft" align="right" valign="top"><a id="a06fcfeab9e39e7492298e3a4a3e58950"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a06fcfeab9e39e7492298e3a4a3e58950">I2S_CTRLA_RXEN_Pos</a>   5</td></tr>
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<tr class="memdesc:a06fcfeab9e39e7492298e3a4a3e58950"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CTRLA) Rx Serializer Enable <br /></td></tr>
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<tr class="memitem:ae10042cd5128c5e04f467b12cee2cd67"><td class="memItemLeft" align="right" valign="top"><a id="ae10042cd5128c5e04f467b12cee2cd67"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CTRLA_RXEN</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#a06fcfeab9e39e7492298e3a4a3e58950">I2S_CTRLA_RXEN_Pos</a>)</td></tr>
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<tr class="memitem:a89739cb190180a69697f3ece0470b780"><td class="memItemLeft" align="right" valign="top"><a id="a89739cb190180a69697f3ece0470b780"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a89739cb190180a69697f3ece0470b780">I2S_CTRLA_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3F)</td></tr>
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<tr class="memdesc:a89739cb190180a69697f3ece0470b780"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CTRLA) MASK Register <br /></td></tr>
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<tr class="memitem:ac9120317bb8722d15b6abd2964cc6b66"><td class="memItemLeft" align="right" valign="top"><a id="ac9120317bb8722d15b6abd2964cc6b66"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#ac9120317bb8722d15b6abd2964cc6b66">I2S_CLKCTRL_OFFSET</a>   0x04</td></tr>
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<tr class="memdesc:ac9120317bb8722d15b6abd2964cc6b66"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL offset) Clock Unit n Control <br /></td></tr>
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<tr class="memitem:a34cc8d707a5387d2ff9232ba0b30f95e"><td class="memItemLeft" align="right" valign="top"><a id="a34cc8d707a5387d2ff9232ba0b30f95e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a34cc8d707a5387d2ff9232ba0b30f95e">I2S_CLKCTRL_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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<tr class="memdesc:a34cc8d707a5387d2ff9232ba0b30f95e"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL reset_value) Clock Unit n Control <br /></td></tr>
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<tr class="memitem:a3790543c148a2adda023e411fd6595ad"><td class="memItemLeft" align="right" valign="top"><a id="a3790543c148a2adda023e411fd6595ad"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a3790543c148a2adda023e411fd6595ad">I2S_CLKCTRL_SLOTSIZE_Pos</a>   0</td></tr>
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<tr class="memdesc:a3790543c148a2adda023e411fd6595ad"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) Slot Size <br /></td></tr>
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<tr class="memitem:a44dd337625fc79571870ef2128a2511d"><td class="memItemLeft" align="right" valign="top"><a id="a44dd337625fc79571870ef2128a2511d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_SLOTSIZE_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2i2s_8h.html#a3790543c148a2adda023e411fd6595ad">I2S_CLKCTRL_SLOTSIZE_Pos</a>)</td></tr>
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<tr class="memitem:afd401f673040058bc2f610bbd8b8d045"><td class="memItemLeft" align="right" valign="top"><a id="afd401f673040058bc2f610bbd8b8d045"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_SLOTSIZE</b>(value)   (I2S_CLKCTRL_SLOTSIZE_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#a3790543c148a2adda023e411fd6595ad">I2S_CLKCTRL_SLOTSIZE_Pos</a>))</td></tr>
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<tr class="memitem:a8bdf35936a6d3d62de0c94cde31b1c94"><td class="memItemLeft" align="right" valign="top"><a id="a8bdf35936a6d3d62de0c94cde31b1c94"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a8bdf35936a6d3d62de0c94cde31b1c94">I2S_CLKCTRL_SLOTSIZE_8_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:a8bdf35936a6d3d62de0c94cde31b1c94"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) 8-bit Slot for Clock Unit n <br /></td></tr>
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<tr class="memitem:a4caa59c4008c74b3ee0a8be8dd02183b"><td class="memItemLeft" align="right" valign="top"><a id="a4caa59c4008c74b3ee0a8be8dd02183b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a4caa59c4008c74b3ee0a8be8dd02183b">I2S_CLKCTRL_SLOTSIZE_16_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:a4caa59c4008c74b3ee0a8be8dd02183b"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) 16-bit Slot for Clock Unit n <br /></td></tr>
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<tr class="separator:a4caa59c4008c74b3ee0a8be8dd02183b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abbc9d2ad05bbc8e24cdc97dcc5ffdd04"><td class="memItemLeft" align="right" valign="top"><a id="abbc9d2ad05bbc8e24cdc97dcc5ffdd04"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#abbc9d2ad05bbc8e24cdc97dcc5ffdd04">I2S_CLKCTRL_SLOTSIZE_24_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
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<tr class="memdesc:abbc9d2ad05bbc8e24cdc97dcc5ffdd04"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) 24-bit Slot for Clock Unit n <br /></td></tr>
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<tr class="memitem:aaee0ee592d4468e2abf681def2ad82b7"><td class="memItemLeft" align="right" valign="top"><a id="aaee0ee592d4468e2abf681def2ad82b7"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#aaee0ee592d4468e2abf681def2ad82b7">I2S_CLKCTRL_SLOTSIZE_32_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
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<tr class="memdesc:aaee0ee592d4468e2abf681def2ad82b7"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) 32-bit Slot for Clock Unit n <br /></td></tr>
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<tr class="memitem:a9e0141598261a29feaf7035268e56190"><td class="memItemLeft" align="right" valign="top"><a id="a9e0141598261a29feaf7035268e56190"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_SLOTSIZE_8</b>   (<a class="el" href="component_2i2s_8h.html#a8bdf35936a6d3d62de0c94cde31b1c94">I2S_CLKCTRL_SLOTSIZE_8_Val</a> << <a class="el" href="component_2i2s_8h.html#a3790543c148a2adda023e411fd6595ad">I2S_CLKCTRL_SLOTSIZE_Pos</a>)</td></tr>
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<tr class="memitem:abb0f421f0ccb2663d741941a78266807"><td class="memItemLeft" align="right" valign="top"><a id="abb0f421f0ccb2663d741941a78266807"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_SLOTSIZE_16</b>   (<a class="el" href="component_2i2s_8h.html#a4caa59c4008c74b3ee0a8be8dd02183b">I2S_CLKCTRL_SLOTSIZE_16_Val</a> << <a class="el" href="component_2i2s_8h.html#a3790543c148a2adda023e411fd6595ad">I2S_CLKCTRL_SLOTSIZE_Pos</a>)</td></tr>
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<tr class="memitem:ad58c0aac2d553c0dc3f93b7b5c24bc73"><td class="memItemLeft" align="right" valign="top"><a id="ad58c0aac2d553c0dc3f93b7b5c24bc73"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_SLOTSIZE_24</b>   (<a class="el" href="component_2i2s_8h.html#abbc9d2ad05bbc8e24cdc97dcc5ffdd04">I2S_CLKCTRL_SLOTSIZE_24_Val</a> << <a class="el" href="component_2i2s_8h.html#a3790543c148a2adda023e411fd6595ad">I2S_CLKCTRL_SLOTSIZE_Pos</a>)</td></tr>
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<tr class="separator:ad58c0aac2d553c0dc3f93b7b5c24bc73"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7996024acd6861fcddfbaf3d73618f29"><td class="memItemLeft" align="right" valign="top"><a id="a7996024acd6861fcddfbaf3d73618f29"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_SLOTSIZE_32</b>   (<a class="el" href="component_2i2s_8h.html#aaee0ee592d4468e2abf681def2ad82b7">I2S_CLKCTRL_SLOTSIZE_32_Val</a> << <a class="el" href="component_2i2s_8h.html#a3790543c148a2adda023e411fd6595ad">I2S_CLKCTRL_SLOTSIZE_Pos</a>)</td></tr>
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<tr class="separator:a7996024acd6861fcddfbaf3d73618f29"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae01bc499f135be63219ee2c6444c05b3"><td class="memItemLeft" align="right" valign="top"><a id="ae01bc499f135be63219ee2c6444c05b3"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#ae01bc499f135be63219ee2c6444c05b3">I2S_CLKCTRL_NBSLOTS_Pos</a>   2</td></tr>
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<tr class="memdesc:ae01bc499f135be63219ee2c6444c05b3"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) Number of Slots in Frame <br /></td></tr>
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<tr class="memitem:aa4107f2fd48ed25a1c282061c77d7009"><td class="memItemLeft" align="right" valign="top"><a id="aa4107f2fd48ed25a1c282061c77d7009"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_NBSLOTS_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) << <a class="el" href="component_2i2s_8h.html#ae01bc499f135be63219ee2c6444c05b3">I2S_CLKCTRL_NBSLOTS_Pos</a>)</td></tr>
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<tr class="separator:aa4107f2fd48ed25a1c282061c77d7009"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad634b27b89efb879319ab451d344657f"><td class="memItemLeft" align="right" valign="top"><a id="ad634b27b89efb879319ab451d344657f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_NBSLOTS</b>(value)   (I2S_CLKCTRL_NBSLOTS_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#ae01bc499f135be63219ee2c6444c05b3">I2S_CLKCTRL_NBSLOTS_Pos</a>))</td></tr>
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<tr class="separator:ad634b27b89efb879319ab451d344657f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a68fd7a78e998d738a74bf6a56a47a082"><td class="memItemLeft" align="right" valign="top"><a id="a68fd7a78e998d738a74bf6a56a47a082"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a68fd7a78e998d738a74bf6a56a47a082">I2S_CLKCTRL_FSWIDTH_Pos</a>   5</td></tr>
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<tr class="memdesc:a68fd7a78e998d738a74bf6a56a47a082"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) Frame Sync Width <br /></td></tr>
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<tr class="memitem:a85d46e1c158ee5b634e1e97a3609a0d4"><td class="memItemLeft" align="right" valign="top"><a id="a85d46e1c158ee5b634e1e97a3609a0d4"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_FSWIDTH_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2i2s_8h.html#a68fd7a78e998d738a74bf6a56a47a082">I2S_CLKCTRL_FSWIDTH_Pos</a>)</td></tr>
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<tr class="separator:a85d46e1c158ee5b634e1e97a3609a0d4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa94679ae6bdcb5fb23330c37a55f8305"><td class="memItemLeft" align="right" valign="top"><a id="aa94679ae6bdcb5fb23330c37a55f8305"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_FSWIDTH</b>(value)   (I2S_CLKCTRL_FSWIDTH_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#a68fd7a78e998d738a74bf6a56a47a082">I2S_CLKCTRL_FSWIDTH_Pos</a>))</td></tr>
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<tr class="separator:aa94679ae6bdcb5fb23330c37a55f8305"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a95aeb939939817f4a06c2b7fad0baf11"><td class="memItemLeft" align="right" valign="top"><a id="a95aeb939939817f4a06c2b7fad0baf11"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a95aeb939939817f4a06c2b7fad0baf11">I2S_CLKCTRL_FSWIDTH_SLOT_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:a95aeb939939817f4a06c2b7fad0baf11"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) Frame Sync Pulse is 1 Slot wide (default for I2S protocol) <br /></td></tr>
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<tr class="separator:a95aeb939939817f4a06c2b7fad0baf11"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a74f044f2df267ca85a29fea55b94cd7b"><td class="memItemLeft" align="right" valign="top"><a id="a74f044f2df267ca85a29fea55b94cd7b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a74f044f2df267ca85a29fea55b94cd7b">I2S_CLKCTRL_FSWIDTH_HALF_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:a74f044f2df267ca85a29fea55b94cd7b"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) Frame Sync Pulse is half a Frame wide <br /></td></tr>
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<tr class="separator:a74f044f2df267ca85a29fea55b94cd7b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8e586922105865e834930dfc922c1671"><td class="memItemLeft" align="right" valign="top"><a id="a8e586922105865e834930dfc922c1671"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a8e586922105865e834930dfc922c1671">I2S_CLKCTRL_FSWIDTH_BIT_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
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<tr class="memdesc:a8e586922105865e834930dfc922c1671"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) Frame Sync Pulse is 1 Bit wide <br /></td></tr>
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<tr class="memitem:ad8a9cb5d05e25833a45f099860ac162e"><td class="memItemLeft" align="right" valign="top"><a id="ad8a9cb5d05e25833a45f099860ac162e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#ad8a9cb5d05e25833a45f099860ac162e">I2S_CLKCTRL_FSWIDTH_BURST_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
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<tr class="memdesc:ad8a9cb5d05e25833a45f099860ac162e"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) Clock Unit n operates in Burst mode, with a 1-bit wide Frame Sync pulse per Data sample, only when Data transfer is requested <br /></td></tr>
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<tr class="memitem:a9c4c5a0dffa25c33d832bbbc29694647"><td class="memItemLeft" align="right" valign="top"><a id="a9c4c5a0dffa25c33d832bbbc29694647"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_FSWIDTH_SLOT</b>   (<a class="el" href="component_2i2s_8h.html#a95aeb939939817f4a06c2b7fad0baf11">I2S_CLKCTRL_FSWIDTH_SLOT_Val</a> << <a class="el" href="component_2i2s_8h.html#a68fd7a78e998d738a74bf6a56a47a082">I2S_CLKCTRL_FSWIDTH_Pos</a>)</td></tr>
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<tr class="memitem:a1818a7168e3c4b0cfee3f478c819ce18"><td class="memItemLeft" align="right" valign="top"><a id="a1818a7168e3c4b0cfee3f478c819ce18"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_FSWIDTH_HALF</b>   (<a class="el" href="component_2i2s_8h.html#a74f044f2df267ca85a29fea55b94cd7b">I2S_CLKCTRL_FSWIDTH_HALF_Val</a> << <a class="el" href="component_2i2s_8h.html#a68fd7a78e998d738a74bf6a56a47a082">I2S_CLKCTRL_FSWIDTH_Pos</a>)</td></tr>
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<tr class="memitem:adf1a62e89e9b168b0a41ee8546d20e58"><td class="memItemLeft" align="right" valign="top"><a id="adf1a62e89e9b168b0a41ee8546d20e58"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_FSWIDTH_BIT</b>   (<a class="el" href="component_2i2s_8h.html#a8e586922105865e834930dfc922c1671">I2S_CLKCTRL_FSWIDTH_BIT_Val</a> << <a class="el" href="component_2i2s_8h.html#a68fd7a78e998d738a74bf6a56a47a082">I2S_CLKCTRL_FSWIDTH_Pos</a>)</td></tr>
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<tr class="memitem:a804d973398548f1cf459dde59bf12022"><td class="memItemLeft" align="right" valign="top"><a id="a804d973398548f1cf459dde59bf12022"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_FSWIDTH_BURST</b>   (<a class="el" href="component_2i2s_8h.html#ad8a9cb5d05e25833a45f099860ac162e">I2S_CLKCTRL_FSWIDTH_BURST_Val</a> << <a class="el" href="component_2i2s_8h.html#a68fd7a78e998d738a74bf6a56a47a082">I2S_CLKCTRL_FSWIDTH_Pos</a>)</td></tr>
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<tr class="separator:a804d973398548f1cf459dde59bf12022"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a49490bb9926136b0a51f72cf1cb06d0b"><td class="memItemLeft" align="right" valign="top"><a id="a49490bb9926136b0a51f72cf1cb06d0b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a49490bb9926136b0a51f72cf1cb06d0b">I2S_CLKCTRL_BITDELAY_Pos</a>   7</td></tr>
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<tr class="memdesc:a49490bb9926136b0a51f72cf1cb06d0b"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) Data Delay from Frame Sync <br /></td></tr>
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<tr class="memitem:a2d8c66be6d6b5f64aacba964e48a5ea5"><td class="memItemLeft" align="right" valign="top"><a id="a2d8c66be6d6b5f64aacba964e48a5ea5"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_BITDELAY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#a49490bb9926136b0a51f72cf1cb06d0b">I2S_CLKCTRL_BITDELAY_Pos</a>)</td></tr>
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<tr class="separator:a2d8c66be6d6b5f64aacba964e48a5ea5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8f7fa76cbdfa92a9d34cb21798f42e05"><td class="memItemLeft" align="right" valign="top"><a id="a8f7fa76cbdfa92a9d34cb21798f42e05"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a8f7fa76cbdfa92a9d34cb21798f42e05">I2S_CLKCTRL_BITDELAY_LJ_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:a8f7fa76cbdfa92a9d34cb21798f42e05"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) Left Justified (0 Bit Delay) <br /></td></tr>
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<tr class="separator:a8f7fa76cbdfa92a9d34cb21798f42e05"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afcd06500145915a75264200ecd94b82c"><td class="memItemLeft" align="right" valign="top"><a id="afcd06500145915a75264200ecd94b82c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#afcd06500145915a75264200ecd94b82c">I2S_CLKCTRL_BITDELAY_I2S_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:afcd06500145915a75264200ecd94b82c"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) I2S (1 Bit Delay) <br /></td></tr>
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<tr class="separator:afcd06500145915a75264200ecd94b82c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a721f776e9a35c5024dc2e8e8a63a4d15"><td class="memItemLeft" align="right" valign="top"><a id="a721f776e9a35c5024dc2e8e8a63a4d15"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_BITDELAY_LJ</b>   (<a class="el" href="component_2i2s_8h.html#a8f7fa76cbdfa92a9d34cb21798f42e05">I2S_CLKCTRL_BITDELAY_LJ_Val</a> << <a class="el" href="component_2i2s_8h.html#a49490bb9926136b0a51f72cf1cb06d0b">I2S_CLKCTRL_BITDELAY_Pos</a>)</td></tr>
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<tr class="separator:a721f776e9a35c5024dc2e8e8a63a4d15"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abf1e20fabbfe8768c1b8787abe539663"><td class="memItemLeft" align="right" valign="top"><a id="abf1e20fabbfe8768c1b8787abe539663"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_BITDELAY_I2S</b>   (<a class="el" href="component_2i2s_8h.html#afcd06500145915a75264200ecd94b82c">I2S_CLKCTRL_BITDELAY_I2S_Val</a> << <a class="el" href="component_2i2s_8h.html#a49490bb9926136b0a51f72cf1cb06d0b">I2S_CLKCTRL_BITDELAY_Pos</a>)</td></tr>
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<tr class="separator:abf1e20fabbfe8768c1b8787abe539663"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa51b72506368a9cf76123c0309c2058f"><td class="memItemLeft" align="right" valign="top"><a id="aa51b72506368a9cf76123c0309c2058f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#aa51b72506368a9cf76123c0309c2058f">I2S_CLKCTRL_FSSEL_Pos</a>   8</td></tr>
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<tr class="memdesc:aa51b72506368a9cf76123c0309c2058f"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) Frame Sync Select <br /></td></tr>
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<tr class="separator:aa51b72506368a9cf76123c0309c2058f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae43cf754e40fd54acfac573f5ec3d198"><td class="memItemLeft" align="right" valign="top"><a id="ae43cf754e40fd54acfac573f5ec3d198"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_FSSEL</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#aa51b72506368a9cf76123c0309c2058f">I2S_CLKCTRL_FSSEL_Pos</a>)</td></tr>
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<tr class="separator:ae43cf754e40fd54acfac573f5ec3d198"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a39d58817b2ebcbad9625f2b5aeadc335"><td class="memItemLeft" align="right" valign="top"><a id="a39d58817b2ebcbad9625f2b5aeadc335"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a39d58817b2ebcbad9625f2b5aeadc335">I2S_CLKCTRL_FSSEL_SCKDIV_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:a39d58817b2ebcbad9625f2b5aeadc335"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) Divided Serial Clock n is used as Frame Sync n source <br /></td></tr>
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<tr class="separator:a39d58817b2ebcbad9625f2b5aeadc335"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a705fcc1a6a527511c4840dddc95a2008"><td class="memItemLeft" align="right" valign="top"><a id="a705fcc1a6a527511c4840dddc95a2008"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a705fcc1a6a527511c4840dddc95a2008">I2S_CLKCTRL_FSSEL_FSPIN_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:a705fcc1a6a527511c4840dddc95a2008"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) FSn input pin is used as Frame Sync n source <br /></td></tr>
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<tr class="separator:a705fcc1a6a527511c4840dddc95a2008"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6387f8879fd35d78c746f151d3d6bea4"><td class="memItemLeft" align="right" valign="top"><a id="a6387f8879fd35d78c746f151d3d6bea4"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_FSSEL_SCKDIV</b>   (<a class="el" href="component_2i2s_8h.html#a39d58817b2ebcbad9625f2b5aeadc335">I2S_CLKCTRL_FSSEL_SCKDIV_Val</a> << <a class="el" href="component_2i2s_8h.html#aa51b72506368a9cf76123c0309c2058f">I2S_CLKCTRL_FSSEL_Pos</a>)</td></tr>
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<tr class="separator:a6387f8879fd35d78c746f151d3d6bea4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa710606a14fcfc076244e8b7d0d621ac"><td class="memItemLeft" align="right" valign="top"><a id="aa710606a14fcfc076244e8b7d0d621ac"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_FSSEL_FSPIN</b>   (<a class="el" href="component_2i2s_8h.html#a705fcc1a6a527511c4840dddc95a2008">I2S_CLKCTRL_FSSEL_FSPIN_Val</a> << <a class="el" href="component_2i2s_8h.html#aa51b72506368a9cf76123c0309c2058f">I2S_CLKCTRL_FSSEL_Pos</a>)</td></tr>
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<tr class="separator:aa710606a14fcfc076244e8b7d0d621ac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a29373d39bfacc2e611c7529033904695"><td class="memItemLeft" align="right" valign="top"><a id="a29373d39bfacc2e611c7529033904695"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a29373d39bfacc2e611c7529033904695">I2S_CLKCTRL_FSINV_Pos</a>   9</td></tr>
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<tr class="memdesc:a29373d39bfacc2e611c7529033904695"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) Frame Sync Invert <br /></td></tr>
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<tr class="separator:a29373d39bfacc2e611c7529033904695"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa289e9c50933115f514d05a6894d7ae7"><td class="memItemLeft" align="right" valign="top"><a id="aa289e9c50933115f514d05a6894d7ae7"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_FSINV</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#a29373d39bfacc2e611c7529033904695">I2S_CLKCTRL_FSINV_Pos</a>)</td></tr>
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<tr class="separator:aa289e9c50933115f514d05a6894d7ae7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acaf6b659b41ebeb68a953853623fe32f"><td class="memItemLeft" align="right" valign="top"><a id="acaf6b659b41ebeb68a953853623fe32f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#acaf6b659b41ebeb68a953853623fe32f">I2S_CLKCTRL_FSOUTINV_Pos</a>   10</td></tr>
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<tr class="memdesc:acaf6b659b41ebeb68a953853623fe32f"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) Frame Sync Output Invert <br /></td></tr>
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<tr class="separator:acaf6b659b41ebeb68a953853623fe32f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a02ec00a84ee3b4221259ebbd153441ee"><td class="memItemLeft" align="right" valign="top"><a id="a02ec00a84ee3b4221259ebbd153441ee"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_FSOUTINV</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#acaf6b659b41ebeb68a953853623fe32f">I2S_CLKCTRL_FSOUTINV_Pos</a>)</td></tr>
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<tr class="separator:a02ec00a84ee3b4221259ebbd153441ee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a51d7bf9feb1a438c178c07077a84d6ec"><td class="memItemLeft" align="right" valign="top"><a id="a51d7bf9feb1a438c178c07077a84d6ec"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a51d7bf9feb1a438c178c07077a84d6ec">I2S_CLKCTRL_SCKSEL_Pos</a>   11</td></tr>
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<tr class="memdesc:a51d7bf9feb1a438c178c07077a84d6ec"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) Serial Clock Select <br /></td></tr>
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<tr class="separator:a51d7bf9feb1a438c178c07077a84d6ec"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9be30940834f5b7858c437b644d26159"><td class="memItemLeft" align="right" valign="top"><a id="a9be30940834f5b7858c437b644d26159"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_SCKSEL</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#a51d7bf9feb1a438c178c07077a84d6ec">I2S_CLKCTRL_SCKSEL_Pos</a>)</td></tr>
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<tr class="separator:a9be30940834f5b7858c437b644d26159"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4fcee5b58df1d5d62935da463555752d"><td class="memItemLeft" align="right" valign="top"><a id="a4fcee5b58df1d5d62935da463555752d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a4fcee5b58df1d5d62935da463555752d">I2S_CLKCTRL_SCKSEL_MCKDIV_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:a4fcee5b58df1d5d62935da463555752d"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) Divided Master Clock n is used as Serial Clock n source <br /></td></tr>
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<tr class="separator:a4fcee5b58df1d5d62935da463555752d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af4b508014f15cb047bddbb681228668f"><td class="memItemLeft" align="right" valign="top"><a id="af4b508014f15cb047bddbb681228668f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#af4b508014f15cb047bddbb681228668f">I2S_CLKCTRL_SCKSEL_SCKPIN_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:af4b508014f15cb047bddbb681228668f"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) SCKn input pin is used as Serial Clock n source <br /></td></tr>
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<tr class="separator:af4b508014f15cb047bddbb681228668f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af2f686a8e9ac7e64f31506d5e90915cf"><td class="memItemLeft" align="right" valign="top"><a id="af2f686a8e9ac7e64f31506d5e90915cf"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_SCKSEL_MCKDIV</b>   (<a class="el" href="component_2i2s_8h.html#a4fcee5b58df1d5d62935da463555752d">I2S_CLKCTRL_SCKSEL_MCKDIV_Val</a> << <a class="el" href="component_2i2s_8h.html#a51d7bf9feb1a438c178c07077a84d6ec">I2S_CLKCTRL_SCKSEL_Pos</a>)</td></tr>
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<tr class="separator:af2f686a8e9ac7e64f31506d5e90915cf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a95d25d13e6a5887b87653460069a0faf"><td class="memItemLeft" align="right" valign="top"><a id="a95d25d13e6a5887b87653460069a0faf"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_SCKSEL_SCKPIN</b>   (<a class="el" href="component_2i2s_8h.html#af4b508014f15cb047bddbb681228668f">I2S_CLKCTRL_SCKSEL_SCKPIN_Val</a> << <a class="el" href="component_2i2s_8h.html#a51d7bf9feb1a438c178c07077a84d6ec">I2S_CLKCTRL_SCKSEL_Pos</a>)</td></tr>
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<tr class="separator:a95d25d13e6a5887b87653460069a0faf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a74c1d5849cebe8fb0e16e16251e8f60d"><td class="memItemLeft" align="right" valign="top"><a id="a74c1d5849cebe8fb0e16e16251e8f60d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a74c1d5849cebe8fb0e16e16251e8f60d">I2S_CLKCTRL_SCKOUTINV_Pos</a>   12</td></tr>
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<tr class="memdesc:a74c1d5849cebe8fb0e16e16251e8f60d"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) Serial Clock Output Invert <br /></td></tr>
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<tr class="separator:a74c1d5849cebe8fb0e16e16251e8f60d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aed5babc3f9f6dcf40c0e037d3815f903"><td class="memItemLeft" align="right" valign="top"><a id="aed5babc3f9f6dcf40c0e037d3815f903"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_SCKOUTINV</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#a74c1d5849cebe8fb0e16e16251e8f60d">I2S_CLKCTRL_SCKOUTINV_Pos</a>)</td></tr>
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<tr class="memitem:a4767c420ba0c4a22f2cfd89f1bd64533"><td class="memItemLeft" align="right" valign="top"><a id="a4767c420ba0c4a22f2cfd89f1bd64533"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a4767c420ba0c4a22f2cfd89f1bd64533">I2S_CLKCTRL_MCKSEL_Pos</a>   13</td></tr>
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<tr class="memdesc:a4767c420ba0c4a22f2cfd89f1bd64533"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) Master Clock Select <br /></td></tr>
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<tr class="memitem:ac54e73bcbbdf2aa91a0c197b4db65c43"><td class="memItemLeft" align="right" valign="top"><a id="ac54e73bcbbdf2aa91a0c197b4db65c43"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_MCKSEL</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#a4767c420ba0c4a22f2cfd89f1bd64533">I2S_CLKCTRL_MCKSEL_Pos</a>)</td></tr>
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<tr class="separator:ac54e73bcbbdf2aa91a0c197b4db65c43"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad99be42bcb1d8ee04c4f99b4e64612cd"><td class="memItemLeft" align="right" valign="top"><a id="ad99be42bcb1d8ee04c4f99b4e64612cd"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#ad99be42bcb1d8ee04c4f99b4e64612cd">I2S_CLKCTRL_MCKSEL_GCLK_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:ad99be42bcb1d8ee04c4f99b4e64612cd"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) GCLK_I2S_n is used as Master Clock n source <br /></td></tr>
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<tr class="separator:ad99be42bcb1d8ee04c4f99b4e64612cd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a628c7be58d58c99048e2c6fe700924ff"><td class="memItemLeft" align="right" valign="top"><a id="a628c7be58d58c99048e2c6fe700924ff"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a628c7be58d58c99048e2c6fe700924ff">I2S_CLKCTRL_MCKSEL_MCKPIN_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:a628c7be58d58c99048e2c6fe700924ff"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) MCKn input pin is used as Master Clock n source <br /></td></tr>
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<tr class="memitem:a6e280bc84532616d674392928cc5a755"><td class="memItemLeft" align="right" valign="top"><a id="a6e280bc84532616d674392928cc5a755"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_MCKSEL_GCLK</b>   (<a class="el" href="component_2i2s_8h.html#ad99be42bcb1d8ee04c4f99b4e64612cd">I2S_CLKCTRL_MCKSEL_GCLK_Val</a> << <a class="el" href="component_2i2s_8h.html#a4767c420ba0c4a22f2cfd89f1bd64533">I2S_CLKCTRL_MCKSEL_Pos</a>)</td></tr>
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<tr class="separator:a6e280bc84532616d674392928cc5a755"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:adda1112d528a34e0e924a581a4b568fd"><td class="memItemLeft" align="right" valign="top"><a id="adda1112d528a34e0e924a581a4b568fd"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_MCKSEL_MCKPIN</b>   (<a class="el" href="component_2i2s_8h.html#a628c7be58d58c99048e2c6fe700924ff">I2S_CLKCTRL_MCKSEL_MCKPIN_Val</a> << <a class="el" href="component_2i2s_8h.html#a4767c420ba0c4a22f2cfd89f1bd64533">I2S_CLKCTRL_MCKSEL_Pos</a>)</td></tr>
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<tr class="separator:adda1112d528a34e0e924a581a4b568fd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aacb10d0c0efa62757e4ad2835e34b7ea"><td class="memItemLeft" align="right" valign="top"><a id="aacb10d0c0efa62757e4ad2835e34b7ea"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#aacb10d0c0efa62757e4ad2835e34b7ea">I2S_CLKCTRL_MCKEN_Pos</a>   14</td></tr>
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<tr class="memdesc:aacb10d0c0efa62757e4ad2835e34b7ea"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) Master Clock Enable <br /></td></tr>
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<tr class="separator:aacb10d0c0efa62757e4ad2835e34b7ea"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a96856305f20a311dde028fc39a1fe580"><td class="memItemLeft" align="right" valign="top"><a id="a96856305f20a311dde028fc39a1fe580"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_MCKEN</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#aacb10d0c0efa62757e4ad2835e34b7ea">I2S_CLKCTRL_MCKEN_Pos</a>)</td></tr>
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<tr class="separator:a96856305f20a311dde028fc39a1fe580"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4fc0a23600a4d7c260a70a0e72aefb3e"><td class="memItemLeft" align="right" valign="top"><a id="a4fc0a23600a4d7c260a70a0e72aefb3e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a4fc0a23600a4d7c260a70a0e72aefb3e">I2S_CLKCTRL_MCKOUTINV_Pos</a>   15</td></tr>
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<tr class="memdesc:a4fc0a23600a4d7c260a70a0e72aefb3e"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) Master Clock Output Invert <br /></td></tr>
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<tr class="separator:a4fc0a23600a4d7c260a70a0e72aefb3e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae19ec4f1e6612fcc7820b6cc290e5230"><td class="memItemLeft" align="right" valign="top"><a id="ae19ec4f1e6612fcc7820b6cc290e5230"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_MCKOUTINV</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#a4fc0a23600a4d7c260a70a0e72aefb3e">I2S_CLKCTRL_MCKOUTINV_Pos</a>)</td></tr>
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<tr class="separator:ae19ec4f1e6612fcc7820b6cc290e5230"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad3726a482440530335068151b6dc027d"><td class="memItemLeft" align="right" valign="top"><a id="ad3726a482440530335068151b6dc027d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#ad3726a482440530335068151b6dc027d">I2S_CLKCTRL_MCKDIV_Pos</a>   16</td></tr>
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<tr class="memdesc:ad3726a482440530335068151b6dc027d"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) Master Clock Division Factor <br /></td></tr>
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<tr class="separator:ad3726a482440530335068151b6dc027d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a41ca3ed01a8f63d3bfc985235f71514f"><td class="memItemLeft" align="right" valign="top"><a id="a41ca3ed01a8f63d3bfc985235f71514f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_MCKDIV_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3F) << <a class="el" href="component_2i2s_8h.html#ad3726a482440530335068151b6dc027d">I2S_CLKCTRL_MCKDIV_Pos</a>)</td></tr>
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<tr class="separator:a41ca3ed01a8f63d3bfc985235f71514f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af19164a5f5aa7e0d145186931712dddd"><td class="memItemLeft" align="right" valign="top"><a id="af19164a5f5aa7e0d145186931712dddd"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_MCKDIV</b>(value)   (I2S_CLKCTRL_MCKDIV_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#ad3726a482440530335068151b6dc027d">I2S_CLKCTRL_MCKDIV_Pos</a>))</td></tr>
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<tr class="separator:af19164a5f5aa7e0d145186931712dddd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afebe81d51492d496f010c589066b6480"><td class="memItemLeft" align="right" valign="top"><a id="afebe81d51492d496f010c589066b6480"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#afebe81d51492d496f010c589066b6480">I2S_CLKCTRL_MCKOUTDIV_Pos</a>   24</td></tr>
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<tr class="memdesc:afebe81d51492d496f010c589066b6480"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) Master Clock Output Division Factor <br /></td></tr>
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<tr class="separator:afebe81d51492d496f010c589066b6480"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac4fe4e07620f8c566167fe76c557d67f"><td class="memItemLeft" align="right" valign="top"><a id="ac4fe4e07620f8c566167fe76c557d67f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_MCKOUTDIV_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3F) << <a class="el" href="component_2i2s_8h.html#afebe81d51492d496f010c589066b6480">I2S_CLKCTRL_MCKOUTDIV_Pos</a>)</td></tr>
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<tr class="separator:ac4fe4e07620f8c566167fe76c557d67f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a08bedeccf65c07f15c1e64d8659aa1fe"><td class="memItemLeft" align="right" valign="top"><a id="a08bedeccf65c07f15c1e64d8659aa1fe"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_CLKCTRL_MCKOUTDIV</b>(value)   (I2S_CLKCTRL_MCKOUTDIV_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#afebe81d51492d496f010c589066b6480">I2S_CLKCTRL_MCKOUTDIV_Pos</a>))</td></tr>
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<tr class="separator:a08bedeccf65c07f15c1e64d8659aa1fe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8226b438dcf86a1ccb34b1a34ee20851"><td class="memItemLeft" align="right" valign="top"><a id="a8226b438dcf86a1ccb34b1a34ee20851"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a8226b438dcf86a1ccb34b1a34ee20851">I2S_CLKCTRL_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3F3FFFFF)</td></tr>
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<tr class="memdesc:a8226b438dcf86a1ccb34b1a34ee20851"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_CLKCTRL) MASK Register <br /></td></tr>
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<tr class="separator:a8226b438dcf86a1ccb34b1a34ee20851"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abd070bc8ffee600ddb258303c5ff7e6c"><td class="memItemLeft" align="right" valign="top"><a id="abd070bc8ffee600ddb258303c5ff7e6c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#abd070bc8ffee600ddb258303c5ff7e6c">I2S_INTENCLR_OFFSET</a>   0x0C</td></tr>
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<tr class="memdesc:abd070bc8ffee600ddb258303c5ff7e6c"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENCLR offset) Interrupt Enable Clear <br /></td></tr>
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<tr class="separator:abd070bc8ffee600ddb258303c5ff7e6c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2bc24ab6ab10ee3fcad4fb0678e122f4"><td class="memItemLeft" align="right" valign="top"><a id="a2bc24ab6ab10ee3fcad4fb0678e122f4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a2bc24ab6ab10ee3fcad4fb0678e122f4">I2S_INTENCLR_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000)</td></tr>
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<tr class="memdesc:a2bc24ab6ab10ee3fcad4fb0678e122f4"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENCLR reset_value) Interrupt Enable Clear <br /></td></tr>
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<tr class="separator:a2bc24ab6ab10ee3fcad4fb0678e122f4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a15e508b4c8f7428f2ff99616060bc6ee"><td class="memItemLeft" align="right" valign="top"><a id="a15e508b4c8f7428f2ff99616060bc6ee"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a15e508b4c8f7428f2ff99616060bc6ee">I2S_INTENCLR_RXRDY0_Pos</a>   0</td></tr>
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<tr class="memdesc:a15e508b4c8f7428f2ff99616060bc6ee"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENCLR) Receive Ready 0 Interrupt Enable <br /></td></tr>
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<tr class="separator:a15e508b4c8f7428f2ff99616060bc6ee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7ff108ed55e857f93004acc3fb91553f"><td class="memItemLeft" align="right" valign="top"><a id="a7ff108ed55e857f93004acc3fb91553f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENCLR_RXRDY0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a15e508b4c8f7428f2ff99616060bc6ee">I2S_INTENCLR_RXRDY0_Pos</a>)</td></tr>
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<tr class="separator:a7ff108ed55e857f93004acc3fb91553f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab9fb50d874f6597bfa69abb73fbf2862"><td class="memItemLeft" align="right" valign="top"><a id="ab9fb50d874f6597bfa69abb73fbf2862"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#ab9fb50d874f6597bfa69abb73fbf2862">I2S_INTENCLR_RXRDY1_Pos</a>   1</td></tr>
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<tr class="memdesc:ab9fb50d874f6597bfa69abb73fbf2862"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENCLR) Receive Ready 1 Interrupt Enable <br /></td></tr>
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<tr class="separator:ab9fb50d874f6597bfa69abb73fbf2862"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab56d0e5a4f38d74f7af4ab65cab3f808"><td class="memItemLeft" align="right" valign="top"><a id="ab56d0e5a4f38d74f7af4ab65cab3f808"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENCLR_RXRDY1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#ab9fb50d874f6597bfa69abb73fbf2862">I2S_INTENCLR_RXRDY1_Pos</a>)</td></tr>
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<tr class="separator:ab56d0e5a4f38d74f7af4ab65cab3f808"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a04eb812f8b42d1d690ba5420fc6b242b"><td class="memItemLeft" align="right" valign="top"><a id="a04eb812f8b42d1d690ba5420fc6b242b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a04eb812f8b42d1d690ba5420fc6b242b">I2S_INTENCLR_RXRDY_Pos</a>   0</td></tr>
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<tr class="memdesc:a04eb812f8b42d1d690ba5420fc6b242b"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENCLR) Receive Ready x Interrupt Enable <br /></td></tr>
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<tr class="separator:a04eb812f8b42d1d690ba5420fc6b242b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae15f7b5571b4a8ed1c8146b9d67b8032"><td class="memItemLeft" align="right" valign="top"><a id="ae15f7b5571b4a8ed1c8146b9d67b8032"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENCLR_RXRDY_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2i2s_8h.html#a04eb812f8b42d1d690ba5420fc6b242b">I2S_INTENCLR_RXRDY_Pos</a>)</td></tr>
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<tr class="separator:ae15f7b5571b4a8ed1c8146b9d67b8032"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad029e4591f16d6f1866551831160265f"><td class="memItemLeft" align="right" valign="top"><a id="ad029e4591f16d6f1866551831160265f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENCLR_RXRDY</b>(value)   (I2S_INTENCLR_RXRDY_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#a04eb812f8b42d1d690ba5420fc6b242b">I2S_INTENCLR_RXRDY_Pos</a>))</td></tr>
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<tr class="separator:ad029e4591f16d6f1866551831160265f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae7b60215ac9e256b4660e710f2a20a15"><td class="memItemLeft" align="right" valign="top"><a id="ae7b60215ac9e256b4660e710f2a20a15"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#ae7b60215ac9e256b4660e710f2a20a15">I2S_INTENCLR_RXOR0_Pos</a>   4</td></tr>
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<tr class="memdesc:ae7b60215ac9e256b4660e710f2a20a15"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENCLR) Receive Overrun 0 Interrupt Enable <br /></td></tr>
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<tr class="separator:ae7b60215ac9e256b4660e710f2a20a15"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9b6632183c5bcca6570c0c30f457d42f"><td class="memItemLeft" align="right" valign="top"><a id="a9b6632183c5bcca6570c0c30f457d42f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENCLR_RXOR0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#ae7b60215ac9e256b4660e710f2a20a15">I2S_INTENCLR_RXOR0_Pos</a>)</td></tr>
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<tr class="separator:a9b6632183c5bcca6570c0c30f457d42f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3ac2f9b1f31d415d4e071d8af0074b06"><td class="memItemLeft" align="right" valign="top"><a id="a3ac2f9b1f31d415d4e071d8af0074b06"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a3ac2f9b1f31d415d4e071d8af0074b06">I2S_INTENCLR_RXOR1_Pos</a>   5</td></tr>
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<tr class="memdesc:a3ac2f9b1f31d415d4e071d8af0074b06"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENCLR) Receive Overrun 1 Interrupt Enable <br /></td></tr>
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<tr class="separator:a3ac2f9b1f31d415d4e071d8af0074b06"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2e7eccc1cf52943b7cc80ddcd2181697"><td class="memItemLeft" align="right" valign="top"><a id="a2e7eccc1cf52943b7cc80ddcd2181697"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENCLR_RXOR1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a3ac2f9b1f31d415d4e071d8af0074b06">I2S_INTENCLR_RXOR1_Pos</a>)</td></tr>
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<tr class="separator:a2e7eccc1cf52943b7cc80ddcd2181697"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afed2283ebdd42b5c187abf28e6029f0c"><td class="memItemLeft" align="right" valign="top"><a id="afed2283ebdd42b5c187abf28e6029f0c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#afed2283ebdd42b5c187abf28e6029f0c">I2S_INTENCLR_RXOR_Pos</a>   4</td></tr>
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<tr class="memdesc:afed2283ebdd42b5c187abf28e6029f0c"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENCLR) Receive Overrun x Interrupt Enable <br /></td></tr>
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<tr class="separator:afed2283ebdd42b5c187abf28e6029f0c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afb5629453a4a107273b9e3bc00bc989d"><td class="memItemLeft" align="right" valign="top"><a id="afb5629453a4a107273b9e3bc00bc989d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENCLR_RXOR_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2i2s_8h.html#afed2283ebdd42b5c187abf28e6029f0c">I2S_INTENCLR_RXOR_Pos</a>)</td></tr>
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<tr class="separator:afb5629453a4a107273b9e3bc00bc989d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab14925acd44a229f426248236fb84fc7"><td class="memItemLeft" align="right" valign="top"><a id="ab14925acd44a229f426248236fb84fc7"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENCLR_RXOR</b>(value)   (I2S_INTENCLR_RXOR_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#afed2283ebdd42b5c187abf28e6029f0c">I2S_INTENCLR_RXOR_Pos</a>))</td></tr>
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<tr class="separator:ab14925acd44a229f426248236fb84fc7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2ec1727e262443ba522900c51416e3c6"><td class="memItemLeft" align="right" valign="top"><a id="a2ec1727e262443ba522900c51416e3c6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a2ec1727e262443ba522900c51416e3c6">I2S_INTENCLR_TXRDY0_Pos</a>   8</td></tr>
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<tr class="memdesc:a2ec1727e262443ba522900c51416e3c6"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENCLR) Transmit Ready 0 Interrupt Enable <br /></td></tr>
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<tr class="separator:a2ec1727e262443ba522900c51416e3c6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8a7a4cebc41d3b0f473cdb6dbb89795c"><td class="memItemLeft" align="right" valign="top"><a id="a8a7a4cebc41d3b0f473cdb6dbb89795c"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENCLR_TXRDY0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a2ec1727e262443ba522900c51416e3c6">I2S_INTENCLR_TXRDY0_Pos</a>)</td></tr>
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<tr class="separator:a8a7a4cebc41d3b0f473cdb6dbb89795c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad9aeb6db3a8f09c6c6d586b64a98e4c3"><td class="memItemLeft" align="right" valign="top"><a id="ad9aeb6db3a8f09c6c6d586b64a98e4c3"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#ad9aeb6db3a8f09c6c6d586b64a98e4c3">I2S_INTENCLR_TXRDY1_Pos</a>   9</td></tr>
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<tr class="memdesc:ad9aeb6db3a8f09c6c6d586b64a98e4c3"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENCLR) Transmit Ready 1 Interrupt Enable <br /></td></tr>
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<tr class="separator:ad9aeb6db3a8f09c6c6d586b64a98e4c3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac3e4c3ba6f23da81d38341a66e17d7b7"><td class="memItemLeft" align="right" valign="top"><a id="ac3e4c3ba6f23da81d38341a66e17d7b7"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENCLR_TXRDY1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#ad9aeb6db3a8f09c6c6d586b64a98e4c3">I2S_INTENCLR_TXRDY1_Pos</a>)</td></tr>
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<tr class="separator:ac3e4c3ba6f23da81d38341a66e17d7b7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afc89b68c83bd2907f5c7a91cd36a667f"><td class="memItemLeft" align="right" valign="top"><a id="afc89b68c83bd2907f5c7a91cd36a667f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#afc89b68c83bd2907f5c7a91cd36a667f">I2S_INTENCLR_TXRDY_Pos</a>   8</td></tr>
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<tr class="memdesc:afc89b68c83bd2907f5c7a91cd36a667f"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENCLR) Transmit Ready x Interrupt Enable <br /></td></tr>
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<tr class="separator:afc89b68c83bd2907f5c7a91cd36a667f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4478cdcdd49295aa9290fe7cbaa24402"><td class="memItemLeft" align="right" valign="top"><a id="a4478cdcdd49295aa9290fe7cbaa24402"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENCLR_TXRDY_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2i2s_8h.html#afc89b68c83bd2907f5c7a91cd36a667f">I2S_INTENCLR_TXRDY_Pos</a>)</td></tr>
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<tr class="separator:a4478cdcdd49295aa9290fe7cbaa24402"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afaf0d1c25089b67ff674b4082c9e3c57"><td class="memItemLeft" align="right" valign="top"><a id="afaf0d1c25089b67ff674b4082c9e3c57"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENCLR_TXRDY</b>(value)   (I2S_INTENCLR_TXRDY_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#afc89b68c83bd2907f5c7a91cd36a667f">I2S_INTENCLR_TXRDY_Pos</a>))</td></tr>
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<tr class="separator:afaf0d1c25089b67ff674b4082c9e3c57"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a40a52fbc12775b89db0e5e917beaba8d"><td class="memItemLeft" align="right" valign="top"><a id="a40a52fbc12775b89db0e5e917beaba8d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a40a52fbc12775b89db0e5e917beaba8d">I2S_INTENCLR_TXUR0_Pos</a>   12</td></tr>
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<tr class="memdesc:a40a52fbc12775b89db0e5e917beaba8d"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENCLR) Transmit Underrun 0 Interrupt Enable <br /></td></tr>
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<tr class="separator:a40a52fbc12775b89db0e5e917beaba8d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a47c148cc316ca37aaac8705127808cbf"><td class="memItemLeft" align="right" valign="top"><a id="a47c148cc316ca37aaac8705127808cbf"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENCLR_TXUR0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a40a52fbc12775b89db0e5e917beaba8d">I2S_INTENCLR_TXUR0_Pos</a>)</td></tr>
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<tr class="separator:a47c148cc316ca37aaac8705127808cbf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8e6e57c754c211623784759da161c01d"><td class="memItemLeft" align="right" valign="top"><a id="a8e6e57c754c211623784759da161c01d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a8e6e57c754c211623784759da161c01d">I2S_INTENCLR_TXUR1_Pos</a>   13</td></tr>
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<tr class="memdesc:a8e6e57c754c211623784759da161c01d"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENCLR) Transmit Underrun 1 Interrupt Enable <br /></td></tr>
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<tr class="separator:a8e6e57c754c211623784759da161c01d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac20cff666a30b67d4b34d20785cca674"><td class="memItemLeft" align="right" valign="top"><a id="ac20cff666a30b67d4b34d20785cca674"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENCLR_TXUR1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a8e6e57c754c211623784759da161c01d">I2S_INTENCLR_TXUR1_Pos</a>)</td></tr>
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<tr class="separator:ac20cff666a30b67d4b34d20785cca674"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3532309a5035b5752b503639978a9e62"><td class="memItemLeft" align="right" valign="top"><a id="a3532309a5035b5752b503639978a9e62"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a3532309a5035b5752b503639978a9e62">I2S_INTENCLR_TXUR_Pos</a>   12</td></tr>
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<tr class="memdesc:a3532309a5035b5752b503639978a9e62"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENCLR) Transmit Underrun x Interrupt Enable <br /></td></tr>
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<tr class="separator:a3532309a5035b5752b503639978a9e62"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6ee31ccc96227d279f7ee4655c1fb76c"><td class="memItemLeft" align="right" valign="top"><a id="a6ee31ccc96227d279f7ee4655c1fb76c"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENCLR_TXUR_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2i2s_8h.html#a3532309a5035b5752b503639978a9e62">I2S_INTENCLR_TXUR_Pos</a>)</td></tr>
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<tr class="separator:a6ee31ccc96227d279f7ee4655c1fb76c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4054401c4bbb7f1e7f1f3c5815f2c6fe"><td class="memItemLeft" align="right" valign="top"><a id="a4054401c4bbb7f1e7f1f3c5815f2c6fe"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENCLR_TXUR</b>(value)   (I2S_INTENCLR_TXUR_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#a3532309a5035b5752b503639978a9e62">I2S_INTENCLR_TXUR_Pos</a>))</td></tr>
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<tr class="separator:a4054401c4bbb7f1e7f1f3c5815f2c6fe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7511aeab3570168deef863a0945ff013"><td class="memItemLeft" align="right" valign="top"><a id="a7511aeab3570168deef863a0945ff013"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a7511aeab3570168deef863a0945ff013">I2S_INTENCLR_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3333)</td></tr>
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<tr class="memdesc:a7511aeab3570168deef863a0945ff013"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENCLR) MASK Register <br /></td></tr>
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<tr class="separator:a7511aeab3570168deef863a0945ff013"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4f7799200879d836b56557cc501fc86c"><td class="memItemLeft" align="right" valign="top"><a id="a4f7799200879d836b56557cc501fc86c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a4f7799200879d836b56557cc501fc86c">I2S_INTENSET_OFFSET</a>   0x10</td></tr>
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<tr class="memdesc:a4f7799200879d836b56557cc501fc86c"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENSET offset) Interrupt Enable Set <br /></td></tr>
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<tr class="separator:a4f7799200879d836b56557cc501fc86c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af0d24a1632b21dc544a62f9ba89478e3"><td class="memItemLeft" align="right" valign="top"><a id="af0d24a1632b21dc544a62f9ba89478e3"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#af0d24a1632b21dc544a62f9ba89478e3">I2S_INTENSET_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000)</td></tr>
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<tr class="memdesc:af0d24a1632b21dc544a62f9ba89478e3"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENSET reset_value) Interrupt Enable Set <br /></td></tr>
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<tr class="separator:af0d24a1632b21dc544a62f9ba89478e3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a20017e8afeaed03d067cdab28118f120"><td class="memItemLeft" align="right" valign="top"><a id="a20017e8afeaed03d067cdab28118f120"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a20017e8afeaed03d067cdab28118f120">I2S_INTENSET_RXRDY0_Pos</a>   0</td></tr>
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<tr class="memdesc:a20017e8afeaed03d067cdab28118f120"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENSET) Receive Ready 0 Interrupt Enable <br /></td></tr>
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<tr class="separator:a20017e8afeaed03d067cdab28118f120"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9213fb4aa656a330bcdf9d6c9d9d1c94"><td class="memItemLeft" align="right" valign="top"><a id="a9213fb4aa656a330bcdf9d6c9d9d1c94"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENSET_RXRDY0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a20017e8afeaed03d067cdab28118f120">I2S_INTENSET_RXRDY0_Pos</a>)</td></tr>
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<tr class="separator:a9213fb4aa656a330bcdf9d6c9d9d1c94"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9f5ba1356e9c6c4cc5a89174ea9c9544"><td class="memItemLeft" align="right" valign="top"><a id="a9f5ba1356e9c6c4cc5a89174ea9c9544"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a9f5ba1356e9c6c4cc5a89174ea9c9544">I2S_INTENSET_RXRDY1_Pos</a>   1</td></tr>
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<tr class="memdesc:a9f5ba1356e9c6c4cc5a89174ea9c9544"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENSET) Receive Ready 1 Interrupt Enable <br /></td></tr>
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<tr class="separator:a9f5ba1356e9c6c4cc5a89174ea9c9544"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af0efe32b781f9ead361317571e232f9d"><td class="memItemLeft" align="right" valign="top"><a id="af0efe32b781f9ead361317571e232f9d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENSET_RXRDY1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a9f5ba1356e9c6c4cc5a89174ea9c9544">I2S_INTENSET_RXRDY1_Pos</a>)</td></tr>
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<tr class="separator:af0efe32b781f9ead361317571e232f9d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6a83119896f3ef19f62b84b85047291b"><td class="memItemLeft" align="right" valign="top"><a id="a6a83119896f3ef19f62b84b85047291b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a6a83119896f3ef19f62b84b85047291b">I2S_INTENSET_RXRDY_Pos</a>   0</td></tr>
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<tr class="memdesc:a6a83119896f3ef19f62b84b85047291b"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENSET) Receive Ready x Interrupt Enable <br /></td></tr>
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<tr class="separator:a6a83119896f3ef19f62b84b85047291b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6ee165031f3205ebaf462f6b6a1f09ea"><td class="memItemLeft" align="right" valign="top"><a id="a6ee165031f3205ebaf462f6b6a1f09ea"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENSET_RXRDY_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2i2s_8h.html#a6a83119896f3ef19f62b84b85047291b">I2S_INTENSET_RXRDY_Pos</a>)</td></tr>
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<tr class="separator:a6ee165031f3205ebaf462f6b6a1f09ea"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acf810abfdd9e9b21179e4b7e5ca69893"><td class="memItemLeft" align="right" valign="top"><a id="acf810abfdd9e9b21179e4b7e5ca69893"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENSET_RXRDY</b>(value)   (I2S_INTENSET_RXRDY_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#a6a83119896f3ef19f62b84b85047291b">I2S_INTENSET_RXRDY_Pos</a>))</td></tr>
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<tr class="separator:acf810abfdd9e9b21179e4b7e5ca69893"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a329b94c3981eea317584e01a84bbc23b"><td class="memItemLeft" align="right" valign="top"><a id="a329b94c3981eea317584e01a84bbc23b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a329b94c3981eea317584e01a84bbc23b">I2S_INTENSET_RXOR0_Pos</a>   4</td></tr>
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<tr class="memdesc:a329b94c3981eea317584e01a84bbc23b"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENSET) Receive Overrun 0 Interrupt Enable <br /></td></tr>
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<tr class="separator:a329b94c3981eea317584e01a84bbc23b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae892bf14f0577ca0761c327ee273afe5"><td class="memItemLeft" align="right" valign="top"><a id="ae892bf14f0577ca0761c327ee273afe5"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENSET_RXOR0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a329b94c3981eea317584e01a84bbc23b">I2S_INTENSET_RXOR0_Pos</a>)</td></tr>
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<tr class="separator:ae892bf14f0577ca0761c327ee273afe5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa80578c073e672c92eb123cda1edd527"><td class="memItemLeft" align="right" valign="top"><a id="aa80578c073e672c92eb123cda1edd527"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#aa80578c073e672c92eb123cda1edd527">I2S_INTENSET_RXOR1_Pos</a>   5</td></tr>
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<tr class="memdesc:aa80578c073e672c92eb123cda1edd527"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENSET) Receive Overrun 1 Interrupt Enable <br /></td></tr>
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<tr class="separator:aa80578c073e672c92eb123cda1edd527"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad455f0bfa8c5c8181ab663a22f8e4040"><td class="memItemLeft" align="right" valign="top"><a id="ad455f0bfa8c5c8181ab663a22f8e4040"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENSET_RXOR1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#aa80578c073e672c92eb123cda1edd527">I2S_INTENSET_RXOR1_Pos</a>)</td></tr>
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<tr class="separator:ad455f0bfa8c5c8181ab663a22f8e4040"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a85f713671974c54bdf903cbc6767f5d0"><td class="memItemLeft" align="right" valign="top"><a id="a85f713671974c54bdf903cbc6767f5d0"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a85f713671974c54bdf903cbc6767f5d0">I2S_INTENSET_RXOR_Pos</a>   4</td></tr>
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<tr class="memdesc:a85f713671974c54bdf903cbc6767f5d0"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENSET) Receive Overrun x Interrupt Enable <br /></td></tr>
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<tr class="separator:a85f713671974c54bdf903cbc6767f5d0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0865f7837ebba5f593483a57f854099f"><td class="memItemLeft" align="right" valign="top"><a id="a0865f7837ebba5f593483a57f854099f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENSET_RXOR_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2i2s_8h.html#a85f713671974c54bdf903cbc6767f5d0">I2S_INTENSET_RXOR_Pos</a>)</td></tr>
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<tr class="separator:a0865f7837ebba5f593483a57f854099f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a26372a31c0ce9cb1a0c88819151b1236"><td class="memItemLeft" align="right" valign="top"><a id="a26372a31c0ce9cb1a0c88819151b1236"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENSET_RXOR</b>(value)   (I2S_INTENSET_RXOR_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#a85f713671974c54bdf903cbc6767f5d0">I2S_INTENSET_RXOR_Pos</a>))</td></tr>
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<tr class="separator:a26372a31c0ce9cb1a0c88819151b1236"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6e9a7c3dba406e01057e4923c0df405f"><td class="memItemLeft" align="right" valign="top"><a id="a6e9a7c3dba406e01057e4923c0df405f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a6e9a7c3dba406e01057e4923c0df405f">I2S_INTENSET_TXRDY0_Pos</a>   8</td></tr>
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<tr class="memdesc:a6e9a7c3dba406e01057e4923c0df405f"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENSET) Transmit Ready 0 Interrupt Enable <br /></td></tr>
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<tr class="separator:a6e9a7c3dba406e01057e4923c0df405f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afa4a56586a454ade50852221c210e782"><td class="memItemLeft" align="right" valign="top"><a id="afa4a56586a454ade50852221c210e782"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENSET_TXRDY0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a6e9a7c3dba406e01057e4923c0df405f">I2S_INTENSET_TXRDY0_Pos</a>)</td></tr>
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<tr class="separator:afa4a56586a454ade50852221c210e782"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a825c2ed15a9153b24d8a83533b9cca35"><td class="memItemLeft" align="right" valign="top"><a id="a825c2ed15a9153b24d8a83533b9cca35"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a825c2ed15a9153b24d8a83533b9cca35">I2S_INTENSET_TXRDY1_Pos</a>   9</td></tr>
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<tr class="memdesc:a825c2ed15a9153b24d8a83533b9cca35"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENSET) Transmit Ready 1 Interrupt Enable <br /></td></tr>
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<tr class="separator:a825c2ed15a9153b24d8a83533b9cca35"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4f9060aacb1c8f416b8635ce0f475e93"><td class="memItemLeft" align="right" valign="top"><a id="a4f9060aacb1c8f416b8635ce0f475e93"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENSET_TXRDY1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a825c2ed15a9153b24d8a83533b9cca35">I2S_INTENSET_TXRDY1_Pos</a>)</td></tr>
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<tr class="separator:a4f9060aacb1c8f416b8635ce0f475e93"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4f5152f72ea4c8ccf037b78380108771"><td class="memItemLeft" align="right" valign="top"><a id="a4f5152f72ea4c8ccf037b78380108771"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a4f5152f72ea4c8ccf037b78380108771">I2S_INTENSET_TXRDY_Pos</a>   8</td></tr>
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<tr class="memdesc:a4f5152f72ea4c8ccf037b78380108771"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENSET) Transmit Ready x Interrupt Enable <br /></td></tr>
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<tr class="separator:a4f5152f72ea4c8ccf037b78380108771"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad15a505681f8723a1d63b0177c8c2ea4"><td class="memItemLeft" align="right" valign="top"><a id="ad15a505681f8723a1d63b0177c8c2ea4"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENSET_TXRDY_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2i2s_8h.html#a4f5152f72ea4c8ccf037b78380108771">I2S_INTENSET_TXRDY_Pos</a>)</td></tr>
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<tr class="separator:ad15a505681f8723a1d63b0177c8c2ea4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a123c33dcaa77d96cc5c78e7e48d80b5c"><td class="memItemLeft" align="right" valign="top"><a id="a123c33dcaa77d96cc5c78e7e48d80b5c"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENSET_TXRDY</b>(value)   (I2S_INTENSET_TXRDY_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#a4f5152f72ea4c8ccf037b78380108771">I2S_INTENSET_TXRDY_Pos</a>))</td></tr>
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<tr class="separator:a123c33dcaa77d96cc5c78e7e48d80b5c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae7a70a245f4559dc2e882e5b5e40c24e"><td class="memItemLeft" align="right" valign="top"><a id="ae7a70a245f4559dc2e882e5b5e40c24e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#ae7a70a245f4559dc2e882e5b5e40c24e">I2S_INTENSET_TXUR0_Pos</a>   12</td></tr>
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<tr class="memdesc:ae7a70a245f4559dc2e882e5b5e40c24e"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENSET) Transmit Underrun 0 Interrupt Enable <br /></td></tr>
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<tr class="separator:ae7a70a245f4559dc2e882e5b5e40c24e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5b08e58fcc69ffed60e4254485439997"><td class="memItemLeft" align="right" valign="top"><a id="a5b08e58fcc69ffed60e4254485439997"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENSET_TXUR0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#ae7a70a245f4559dc2e882e5b5e40c24e">I2S_INTENSET_TXUR0_Pos</a>)</td></tr>
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<tr class="separator:a5b08e58fcc69ffed60e4254485439997"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a97d5fc3092599da0d0950d4cbdf8ec66"><td class="memItemLeft" align="right" valign="top"><a id="a97d5fc3092599da0d0950d4cbdf8ec66"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a97d5fc3092599da0d0950d4cbdf8ec66">I2S_INTENSET_TXUR1_Pos</a>   13</td></tr>
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<tr class="memdesc:a97d5fc3092599da0d0950d4cbdf8ec66"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENSET) Transmit Underrun 1 Interrupt Enable <br /></td></tr>
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<tr class="separator:a97d5fc3092599da0d0950d4cbdf8ec66"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab046100f410a1bd0626e9e6ffd9b1b9e"><td class="memItemLeft" align="right" valign="top"><a id="ab046100f410a1bd0626e9e6ffd9b1b9e"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENSET_TXUR1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a97d5fc3092599da0d0950d4cbdf8ec66">I2S_INTENSET_TXUR1_Pos</a>)</td></tr>
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<tr class="separator:ab046100f410a1bd0626e9e6ffd9b1b9e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0b01a5e36ed19ab2e98e0685a96d1e04"><td class="memItemLeft" align="right" valign="top"><a id="a0b01a5e36ed19ab2e98e0685a96d1e04"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a0b01a5e36ed19ab2e98e0685a96d1e04">I2S_INTENSET_TXUR_Pos</a>   12</td></tr>
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<tr class="memdesc:a0b01a5e36ed19ab2e98e0685a96d1e04"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENSET) Transmit Underrun x Interrupt Enable <br /></td></tr>
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<tr class="separator:a0b01a5e36ed19ab2e98e0685a96d1e04"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4d02b05cf1dede1a1393883f07fe28c9"><td class="memItemLeft" align="right" valign="top"><a id="a4d02b05cf1dede1a1393883f07fe28c9"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENSET_TXUR_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2i2s_8h.html#a0b01a5e36ed19ab2e98e0685a96d1e04">I2S_INTENSET_TXUR_Pos</a>)</td></tr>
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<tr class="separator:a4d02b05cf1dede1a1393883f07fe28c9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4f09b4f1c6418f27ba5256b8e1c88eed"><td class="memItemLeft" align="right" valign="top"><a id="a4f09b4f1c6418f27ba5256b8e1c88eed"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTENSET_TXUR</b>(value)   (I2S_INTENSET_TXUR_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#a0b01a5e36ed19ab2e98e0685a96d1e04">I2S_INTENSET_TXUR_Pos</a>))</td></tr>
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<tr class="separator:a4f09b4f1c6418f27ba5256b8e1c88eed"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a69068c25175bd3bb6b3cd8dd5b48a933"><td class="memItemLeft" align="right" valign="top"><a id="a69068c25175bd3bb6b3cd8dd5b48a933"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a69068c25175bd3bb6b3cd8dd5b48a933">I2S_INTENSET_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3333)</td></tr>
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<tr class="memdesc:a69068c25175bd3bb6b3cd8dd5b48a933"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTENSET) MASK Register <br /></td></tr>
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<tr class="separator:a69068c25175bd3bb6b3cd8dd5b48a933"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac8ef4f6d3231d368efdb2135b13146d8"><td class="memItemLeft" align="right" valign="top"><a id="ac8ef4f6d3231d368efdb2135b13146d8"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#ac8ef4f6d3231d368efdb2135b13146d8">I2S_INTFLAG_OFFSET</a>   0x14</td></tr>
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<tr class="memdesc:ac8ef4f6d3231d368efdb2135b13146d8"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTFLAG offset) Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="separator:ac8ef4f6d3231d368efdb2135b13146d8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a683106ff6b1673adc53e28a118d2c6b5"><td class="memItemLeft" align="right" valign="top"><a id="a683106ff6b1673adc53e28a118d2c6b5"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a683106ff6b1673adc53e28a118d2c6b5">I2S_INTFLAG_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000)</td></tr>
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<tr class="memdesc:a683106ff6b1673adc53e28a118d2c6b5"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTFLAG reset_value) Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="separator:a683106ff6b1673adc53e28a118d2c6b5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1eaa330e64ae98b22bd94d4820ef25bd"><td class="memItemLeft" align="right" valign="top"><a id="a1eaa330e64ae98b22bd94d4820ef25bd"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a1eaa330e64ae98b22bd94d4820ef25bd">I2S_INTFLAG_RXRDY0_Pos</a>   0</td></tr>
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<tr class="memdesc:a1eaa330e64ae98b22bd94d4820ef25bd"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTFLAG) Receive Ready 0 <br /></td></tr>
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<tr class="separator:a1eaa330e64ae98b22bd94d4820ef25bd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:adebee67de6a2af71109f61fb052fe41d"><td class="memItemLeft" align="right" valign="top"><a id="adebee67de6a2af71109f61fb052fe41d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTFLAG_RXRDY0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a1eaa330e64ae98b22bd94d4820ef25bd">I2S_INTFLAG_RXRDY0_Pos</a>)</td></tr>
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<tr class="separator:adebee67de6a2af71109f61fb052fe41d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3872451a6ff3dac098d309ac91a07224"><td class="memItemLeft" align="right" valign="top"><a id="a3872451a6ff3dac098d309ac91a07224"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a3872451a6ff3dac098d309ac91a07224">I2S_INTFLAG_RXRDY1_Pos</a>   1</td></tr>
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<tr class="memdesc:a3872451a6ff3dac098d309ac91a07224"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTFLAG) Receive Ready 1 <br /></td></tr>
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<tr class="separator:a3872451a6ff3dac098d309ac91a07224"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a68e15a0e4da0ca3240848b7119b1717f"><td class="memItemLeft" align="right" valign="top"><a id="a68e15a0e4da0ca3240848b7119b1717f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTFLAG_RXRDY1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a3872451a6ff3dac098d309ac91a07224">I2S_INTFLAG_RXRDY1_Pos</a>)</td></tr>
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<tr class="separator:a68e15a0e4da0ca3240848b7119b1717f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af35339d81893f2eb7074bda7576ed732"><td class="memItemLeft" align="right" valign="top"><a id="af35339d81893f2eb7074bda7576ed732"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#af35339d81893f2eb7074bda7576ed732">I2S_INTFLAG_RXRDY_Pos</a>   0</td></tr>
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<tr class="memdesc:af35339d81893f2eb7074bda7576ed732"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTFLAG) Receive Ready x <br /></td></tr>
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<tr class="separator:af35339d81893f2eb7074bda7576ed732"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a93d66c990592148cd8581b65a74eb2e1"><td class="memItemLeft" align="right" valign="top"><a id="a93d66c990592148cd8581b65a74eb2e1"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTFLAG_RXRDY_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2i2s_8h.html#af35339d81893f2eb7074bda7576ed732">I2S_INTFLAG_RXRDY_Pos</a>)</td></tr>
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<tr class="separator:a93d66c990592148cd8581b65a74eb2e1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af6b6f5d15bf306558145429949367186"><td class="memItemLeft" align="right" valign="top"><a id="af6b6f5d15bf306558145429949367186"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTFLAG_RXRDY</b>(value)   (I2S_INTFLAG_RXRDY_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#af35339d81893f2eb7074bda7576ed732">I2S_INTFLAG_RXRDY_Pos</a>))</td></tr>
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<tr class="separator:af6b6f5d15bf306558145429949367186"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aea01a5af5d62e72433ff5a4576fb2a5a"><td class="memItemLeft" align="right" valign="top"><a id="aea01a5af5d62e72433ff5a4576fb2a5a"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#aea01a5af5d62e72433ff5a4576fb2a5a">I2S_INTFLAG_RXOR0_Pos</a>   4</td></tr>
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<tr class="memdesc:aea01a5af5d62e72433ff5a4576fb2a5a"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTFLAG) Receive Overrun 0 <br /></td></tr>
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<tr class="separator:aea01a5af5d62e72433ff5a4576fb2a5a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5bad75f86ed54c371c28f35a026183ea"><td class="memItemLeft" align="right" valign="top"><a id="a5bad75f86ed54c371c28f35a026183ea"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTFLAG_RXOR0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#aea01a5af5d62e72433ff5a4576fb2a5a">I2S_INTFLAG_RXOR0_Pos</a>)</td></tr>
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<tr class="separator:a5bad75f86ed54c371c28f35a026183ea"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a187192cb3469dd749d34479792551617"><td class="memItemLeft" align="right" valign="top"><a id="a187192cb3469dd749d34479792551617"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a187192cb3469dd749d34479792551617">I2S_INTFLAG_RXOR1_Pos</a>   5</td></tr>
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<tr class="memdesc:a187192cb3469dd749d34479792551617"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTFLAG) Receive Overrun 1 <br /></td></tr>
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<tr class="separator:a187192cb3469dd749d34479792551617"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa9d19afa1900eddcd502f9d87e3ee835"><td class="memItemLeft" align="right" valign="top"><a id="aa9d19afa1900eddcd502f9d87e3ee835"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTFLAG_RXOR1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a187192cb3469dd749d34479792551617">I2S_INTFLAG_RXOR1_Pos</a>)</td></tr>
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<tr class="separator:aa9d19afa1900eddcd502f9d87e3ee835"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a72a2ee346cab69a89d41a362304e67a8"><td class="memItemLeft" align="right" valign="top"><a id="a72a2ee346cab69a89d41a362304e67a8"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a72a2ee346cab69a89d41a362304e67a8">I2S_INTFLAG_RXOR_Pos</a>   4</td></tr>
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<tr class="memdesc:a72a2ee346cab69a89d41a362304e67a8"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTFLAG) Receive Overrun x <br /></td></tr>
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<tr class="separator:a72a2ee346cab69a89d41a362304e67a8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a414752427244b650e65ac321ecb3135e"><td class="memItemLeft" align="right" valign="top"><a id="a414752427244b650e65ac321ecb3135e"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTFLAG_RXOR_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2i2s_8h.html#a72a2ee346cab69a89d41a362304e67a8">I2S_INTFLAG_RXOR_Pos</a>)</td></tr>
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<tr class="separator:a414752427244b650e65ac321ecb3135e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1a5e3318f41880a021fe5b5dfd396d52"><td class="memItemLeft" align="right" valign="top"><a id="a1a5e3318f41880a021fe5b5dfd396d52"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTFLAG_RXOR</b>(value)   (I2S_INTFLAG_RXOR_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#a72a2ee346cab69a89d41a362304e67a8">I2S_INTFLAG_RXOR_Pos</a>))</td></tr>
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<tr class="separator:a1a5e3318f41880a021fe5b5dfd396d52"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab8cb5231618dcbf1dc0755bef513fcbb"><td class="memItemLeft" align="right" valign="top"><a id="ab8cb5231618dcbf1dc0755bef513fcbb"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#ab8cb5231618dcbf1dc0755bef513fcbb">I2S_INTFLAG_TXRDY0_Pos</a>   8</td></tr>
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<tr class="memdesc:ab8cb5231618dcbf1dc0755bef513fcbb"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTFLAG) Transmit Ready 0 <br /></td></tr>
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<tr class="separator:ab8cb5231618dcbf1dc0755bef513fcbb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7a16e807db956dac69978175034668e8"><td class="memItemLeft" align="right" valign="top"><a id="a7a16e807db956dac69978175034668e8"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTFLAG_TXRDY0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#ab8cb5231618dcbf1dc0755bef513fcbb">I2S_INTFLAG_TXRDY0_Pos</a>)</td></tr>
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<tr class="separator:a7a16e807db956dac69978175034668e8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa6d976afb12a4186f3801d42d7f3eaf2"><td class="memItemLeft" align="right" valign="top"><a id="aa6d976afb12a4186f3801d42d7f3eaf2"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#aa6d976afb12a4186f3801d42d7f3eaf2">I2S_INTFLAG_TXRDY1_Pos</a>   9</td></tr>
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<tr class="memdesc:aa6d976afb12a4186f3801d42d7f3eaf2"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTFLAG) Transmit Ready 1 <br /></td></tr>
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<tr class="separator:aa6d976afb12a4186f3801d42d7f3eaf2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a33a4f398c668f8bf7c78917d360fc5b3"><td class="memItemLeft" align="right" valign="top"><a id="a33a4f398c668f8bf7c78917d360fc5b3"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTFLAG_TXRDY1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#aa6d976afb12a4186f3801d42d7f3eaf2">I2S_INTFLAG_TXRDY1_Pos</a>)</td></tr>
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<tr class="separator:a33a4f398c668f8bf7c78917d360fc5b3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4401102e0bff61291957c9418e23a1b8"><td class="memItemLeft" align="right" valign="top"><a id="a4401102e0bff61291957c9418e23a1b8"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a4401102e0bff61291957c9418e23a1b8">I2S_INTFLAG_TXRDY_Pos</a>   8</td></tr>
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<tr class="memdesc:a4401102e0bff61291957c9418e23a1b8"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTFLAG) Transmit Ready x <br /></td></tr>
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<tr class="separator:a4401102e0bff61291957c9418e23a1b8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9ced11c097a854754d75dc3b7733b092"><td class="memItemLeft" align="right" valign="top"><a id="a9ced11c097a854754d75dc3b7733b092"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTFLAG_TXRDY_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2i2s_8h.html#a4401102e0bff61291957c9418e23a1b8">I2S_INTFLAG_TXRDY_Pos</a>)</td></tr>
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<tr class="separator:a9ced11c097a854754d75dc3b7733b092"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a92a388f5139c30094c676e3f5575162d"><td class="memItemLeft" align="right" valign="top"><a id="a92a388f5139c30094c676e3f5575162d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTFLAG_TXRDY</b>(value)   (I2S_INTFLAG_TXRDY_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#a4401102e0bff61291957c9418e23a1b8">I2S_INTFLAG_TXRDY_Pos</a>))</td></tr>
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<tr class="separator:a92a388f5139c30094c676e3f5575162d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5f0b5fd326750e4e70210add0dd2dce7"><td class="memItemLeft" align="right" valign="top"><a id="a5f0b5fd326750e4e70210add0dd2dce7"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a5f0b5fd326750e4e70210add0dd2dce7">I2S_INTFLAG_TXUR0_Pos</a>   12</td></tr>
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<tr class="memdesc:a5f0b5fd326750e4e70210add0dd2dce7"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTFLAG) Transmit Underrun 0 <br /></td></tr>
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<tr class="separator:a5f0b5fd326750e4e70210add0dd2dce7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:adc982fab08feb2d03387ec5ba8dad4a8"><td class="memItemLeft" align="right" valign="top"><a id="adc982fab08feb2d03387ec5ba8dad4a8"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTFLAG_TXUR0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a5f0b5fd326750e4e70210add0dd2dce7">I2S_INTFLAG_TXUR0_Pos</a>)</td></tr>
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<tr class="separator:adc982fab08feb2d03387ec5ba8dad4a8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5b34bc919a96b16a6b6cf8fcd7d1c657"><td class="memItemLeft" align="right" valign="top"><a id="a5b34bc919a96b16a6b6cf8fcd7d1c657"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a5b34bc919a96b16a6b6cf8fcd7d1c657">I2S_INTFLAG_TXUR1_Pos</a>   13</td></tr>
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<tr class="memdesc:a5b34bc919a96b16a6b6cf8fcd7d1c657"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTFLAG) Transmit Underrun 1 <br /></td></tr>
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<tr class="separator:a5b34bc919a96b16a6b6cf8fcd7d1c657"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a15ca78dcb05e3abe4af78cae1254038c"><td class="memItemLeft" align="right" valign="top"><a id="a15ca78dcb05e3abe4af78cae1254038c"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTFLAG_TXUR1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a5b34bc919a96b16a6b6cf8fcd7d1c657">I2S_INTFLAG_TXUR1_Pos</a>)</td></tr>
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<tr class="separator:a15ca78dcb05e3abe4af78cae1254038c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8f19374ab8dd41bf7c35c129c1389fa7"><td class="memItemLeft" align="right" valign="top"><a id="a8f19374ab8dd41bf7c35c129c1389fa7"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a8f19374ab8dd41bf7c35c129c1389fa7">I2S_INTFLAG_TXUR_Pos</a>   12</td></tr>
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<tr class="memdesc:a8f19374ab8dd41bf7c35c129c1389fa7"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTFLAG) Transmit Underrun x <br /></td></tr>
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<tr class="separator:a8f19374ab8dd41bf7c35c129c1389fa7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abe183b50f2bd07fae8280f3eefeb724f"><td class="memItemLeft" align="right" valign="top"><a id="abe183b50f2bd07fae8280f3eefeb724f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTFLAG_TXUR_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2i2s_8h.html#a8f19374ab8dd41bf7c35c129c1389fa7">I2S_INTFLAG_TXUR_Pos</a>)</td></tr>
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<tr class="separator:abe183b50f2bd07fae8280f3eefeb724f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3a1f040fea02487e81c8d76054f21589"><td class="memItemLeft" align="right" valign="top"><a id="a3a1f040fea02487e81c8d76054f21589"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_INTFLAG_TXUR</b>(value)   (I2S_INTFLAG_TXUR_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#a8f19374ab8dd41bf7c35c129c1389fa7">I2S_INTFLAG_TXUR_Pos</a>))</td></tr>
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<tr class="separator:a3a1f040fea02487e81c8d76054f21589"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa253de8b7b161df5481550f7ff9d2039"><td class="memItemLeft" align="right" valign="top"><a id="aa253de8b7b161df5481550f7ff9d2039"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#aa253de8b7b161df5481550f7ff9d2039">I2S_INTFLAG_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3333)</td></tr>
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<tr class="memdesc:aa253de8b7b161df5481550f7ff9d2039"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_INTFLAG) MASK Register <br /></td></tr>
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<tr class="separator:aa253de8b7b161df5481550f7ff9d2039"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0cd04094390fbef4453649aee09aa9d4"><td class="memItemLeft" align="right" valign="top"><a id="a0cd04094390fbef4453649aee09aa9d4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a0cd04094390fbef4453649aee09aa9d4">I2S_SYNCBUSY_OFFSET</a>   0x18</td></tr>
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<tr class="memdesc:a0cd04094390fbef4453649aee09aa9d4"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_SYNCBUSY offset) Synchronization Status <br /></td></tr>
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<tr class="separator:a0cd04094390fbef4453649aee09aa9d4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6056c0d1259c0880975992ee251302eb"><td class="memItemLeft" align="right" valign="top"><a id="a6056c0d1259c0880975992ee251302eb"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a6056c0d1259c0880975992ee251302eb">I2S_SYNCBUSY_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000)</td></tr>
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<tr class="memdesc:a6056c0d1259c0880975992ee251302eb"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_SYNCBUSY reset_value) Synchronization Status <br /></td></tr>
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<tr class="separator:a6056c0d1259c0880975992ee251302eb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0735d318b474ea6b9e13243f244300d7"><td class="memItemLeft" align="right" valign="top"><a id="a0735d318b474ea6b9e13243f244300d7"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a0735d318b474ea6b9e13243f244300d7">I2S_SYNCBUSY_SWRST_Pos</a>   0</td></tr>
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<tr class="memdesc:a0735d318b474ea6b9e13243f244300d7"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_SYNCBUSY) Software Reset Synchronization Status <br /></td></tr>
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<tr class="separator:a0735d318b474ea6b9e13243f244300d7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a010bbfcba485d97201f0250254fece6f"><td class="memItemLeft" align="right" valign="top"><a id="a010bbfcba485d97201f0250254fece6f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_SYNCBUSY_SWRST</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#a0735d318b474ea6b9e13243f244300d7">I2S_SYNCBUSY_SWRST_Pos</a>)</td></tr>
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<tr class="separator:a010bbfcba485d97201f0250254fece6f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a783d665b2de37a5eab0a52f8c7ff3d2d"><td class="memItemLeft" align="right" valign="top"><a id="a783d665b2de37a5eab0a52f8c7ff3d2d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a783d665b2de37a5eab0a52f8c7ff3d2d">I2S_SYNCBUSY_ENABLE_Pos</a>   1</td></tr>
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<tr class="memdesc:a783d665b2de37a5eab0a52f8c7ff3d2d"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_SYNCBUSY) Enable Synchronization Status <br /></td></tr>
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<tr class="separator:a783d665b2de37a5eab0a52f8c7ff3d2d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abdcd41b14e722f50a01b670dfa090193"><td class="memItemLeft" align="right" valign="top"><a id="abdcd41b14e722f50a01b670dfa090193"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_SYNCBUSY_ENABLE</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#a783d665b2de37a5eab0a52f8c7ff3d2d">I2S_SYNCBUSY_ENABLE_Pos</a>)</td></tr>
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<tr class="separator:abdcd41b14e722f50a01b670dfa090193"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aad9165400f5446588625f6c8f431ea03"><td class="memItemLeft" align="right" valign="top"><a id="aad9165400f5446588625f6c8f431ea03"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#aad9165400f5446588625f6c8f431ea03">I2S_SYNCBUSY_CKEN0_Pos</a>   2</td></tr>
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<tr class="memdesc:aad9165400f5446588625f6c8f431ea03"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_SYNCBUSY) Clock Unit 0 Enable Synchronization Status <br /></td></tr>
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<tr class="separator:aad9165400f5446588625f6c8f431ea03"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aaf8d3080b82faf203cd3a2eade821d5f"><td class="memItemLeft" align="right" valign="top"><a id="aaf8d3080b82faf203cd3a2eade821d5f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_SYNCBUSY_CKEN0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#aad9165400f5446588625f6c8f431ea03">I2S_SYNCBUSY_CKEN0_Pos</a>)</td></tr>
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<tr class="separator:aaf8d3080b82faf203cd3a2eade821d5f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ade7d604973323633d18920cbc18ad843"><td class="memItemLeft" align="right" valign="top"><a id="ade7d604973323633d18920cbc18ad843"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#ade7d604973323633d18920cbc18ad843">I2S_SYNCBUSY_CKEN1_Pos</a>   3</td></tr>
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<tr class="memdesc:ade7d604973323633d18920cbc18ad843"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_SYNCBUSY) Clock Unit 1 Enable Synchronization Status <br /></td></tr>
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<tr class="separator:ade7d604973323633d18920cbc18ad843"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a23c356144c606182551517e5f7ec2733"><td class="memItemLeft" align="right" valign="top"><a id="a23c356144c606182551517e5f7ec2733"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_SYNCBUSY_CKEN1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#ade7d604973323633d18920cbc18ad843">I2S_SYNCBUSY_CKEN1_Pos</a>)</td></tr>
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<tr class="separator:a23c356144c606182551517e5f7ec2733"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a923903cb1b27cc2aef70f3cb8417f5fb"><td class="memItemLeft" align="right" valign="top"><a id="a923903cb1b27cc2aef70f3cb8417f5fb"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a923903cb1b27cc2aef70f3cb8417f5fb">I2S_SYNCBUSY_CKEN_Pos</a>   2</td></tr>
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<tr class="memdesc:a923903cb1b27cc2aef70f3cb8417f5fb"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_SYNCBUSY) Clock Unit x Enable Synchronization Status <br /></td></tr>
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<tr class="separator:a923903cb1b27cc2aef70f3cb8417f5fb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a38c64fb3dad9ce2dcdcc6c13ea3302ae"><td class="memItemLeft" align="right" valign="top"><a id="a38c64fb3dad9ce2dcdcc6c13ea3302ae"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_SYNCBUSY_CKEN_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2i2s_8h.html#a923903cb1b27cc2aef70f3cb8417f5fb">I2S_SYNCBUSY_CKEN_Pos</a>)</td></tr>
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<tr class="separator:a38c64fb3dad9ce2dcdcc6c13ea3302ae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6657a55dc12888cd0dd4916ee0191ec2"><td class="memItemLeft" align="right" valign="top"><a id="a6657a55dc12888cd0dd4916ee0191ec2"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_SYNCBUSY_CKEN</b>(value)   (I2S_SYNCBUSY_CKEN_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#a923903cb1b27cc2aef70f3cb8417f5fb">I2S_SYNCBUSY_CKEN_Pos</a>))</td></tr>
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<tr class="separator:a6657a55dc12888cd0dd4916ee0191ec2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5c5a708036d8cdf1223e5094eef9fe65"><td class="memItemLeft" align="right" valign="top"><a id="a5c5a708036d8cdf1223e5094eef9fe65"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a5c5a708036d8cdf1223e5094eef9fe65">I2S_SYNCBUSY_TXEN_Pos</a>   4</td></tr>
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<tr class="memdesc:a5c5a708036d8cdf1223e5094eef9fe65"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_SYNCBUSY) Tx Serializer Enable Synchronization Status <br /></td></tr>
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<tr class="separator:a5c5a708036d8cdf1223e5094eef9fe65"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab93404185186000be959cf3f2ac72dd1"><td class="memItemLeft" align="right" valign="top"><a id="ab93404185186000be959cf3f2ac72dd1"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_SYNCBUSY_TXEN</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#a5c5a708036d8cdf1223e5094eef9fe65">I2S_SYNCBUSY_TXEN_Pos</a>)</td></tr>
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<tr class="separator:ab93404185186000be959cf3f2ac72dd1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1b6cc3cec4808e223738c1fede7d8c89"><td class="memItemLeft" align="right" valign="top"><a id="a1b6cc3cec4808e223738c1fede7d8c89"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a1b6cc3cec4808e223738c1fede7d8c89">I2S_SYNCBUSY_RXEN_Pos</a>   5</td></tr>
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<tr class="memdesc:a1b6cc3cec4808e223738c1fede7d8c89"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_SYNCBUSY) Rx Serializer Enable Synchronization Status <br /></td></tr>
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<tr class="separator:a1b6cc3cec4808e223738c1fede7d8c89"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5129f57032673afa4c0f204341c32d20"><td class="memItemLeft" align="right" valign="top"><a id="a5129f57032673afa4c0f204341c32d20"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_SYNCBUSY_RXEN</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#a1b6cc3cec4808e223738c1fede7d8c89">I2S_SYNCBUSY_RXEN_Pos</a>)</td></tr>
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<tr class="separator:a5129f57032673afa4c0f204341c32d20"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a684051dd31b98aba39a2b19f2bb434ac"><td class="memItemLeft" align="right" valign="top"><a id="a684051dd31b98aba39a2b19f2bb434ac"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a684051dd31b98aba39a2b19f2bb434ac">I2S_SYNCBUSY_TXDATA_Pos</a>   8</td></tr>
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<tr class="memdesc:a684051dd31b98aba39a2b19f2bb434ac"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_SYNCBUSY) Tx Data Synchronization Status <br /></td></tr>
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<tr class="separator:a684051dd31b98aba39a2b19f2bb434ac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afa143493f033a42734472691603ea7f2"><td class="memItemLeft" align="right" valign="top"><a id="afa143493f033a42734472691603ea7f2"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_SYNCBUSY_TXDATA</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#a684051dd31b98aba39a2b19f2bb434ac">I2S_SYNCBUSY_TXDATA_Pos</a>)</td></tr>
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<tr class="separator:afa143493f033a42734472691603ea7f2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab8d696fef77572b1fec4333606cbd456"><td class="memItemLeft" align="right" valign="top"><a id="ab8d696fef77572b1fec4333606cbd456"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#ab8d696fef77572b1fec4333606cbd456">I2S_SYNCBUSY_RXDATA_Pos</a>   9</td></tr>
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<tr class="memdesc:ab8d696fef77572b1fec4333606cbd456"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_SYNCBUSY) Rx Data Synchronization Status <br /></td></tr>
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<tr class="separator:ab8d696fef77572b1fec4333606cbd456"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8e633cec6431f0732b3a2f6d1899a26d"><td class="memItemLeft" align="right" valign="top"><a id="a8e633cec6431f0732b3a2f6d1899a26d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_SYNCBUSY_RXDATA</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#ab8d696fef77572b1fec4333606cbd456">I2S_SYNCBUSY_RXDATA_Pos</a>)</td></tr>
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<tr class="separator:a8e633cec6431f0732b3a2f6d1899a26d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a662c1a0e01af60d4d9bcd3974cbea0c8"><td class="memItemLeft" align="right" valign="top"><a id="a662c1a0e01af60d4d9bcd3974cbea0c8"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a662c1a0e01af60d4d9bcd3974cbea0c8">I2S_SYNCBUSY_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x033F)</td></tr>
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<tr class="memdesc:a662c1a0e01af60d4d9bcd3974cbea0c8"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_SYNCBUSY) MASK Register <br /></td></tr>
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<tr class="separator:a662c1a0e01af60d4d9bcd3974cbea0c8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2e34bcec02ecf6a95b16d232d03f82f1"><td class="memItemLeft" align="right" valign="top"><a id="a2e34bcec02ecf6a95b16d232d03f82f1"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a2e34bcec02ecf6a95b16d232d03f82f1">I2S_TXCTRL_OFFSET</a>   0x20</td></tr>
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<tr class="memdesc:a2e34bcec02ecf6a95b16d232d03f82f1"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL offset) Tx Serializer Control <br /></td></tr>
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<tr class="separator:a2e34bcec02ecf6a95b16d232d03f82f1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a569f1702a598fdee2c10aabfa7ef510b"><td class="memItemLeft" align="right" valign="top"><a id="a569f1702a598fdee2c10aabfa7ef510b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a569f1702a598fdee2c10aabfa7ef510b">I2S_TXCTRL_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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<tr class="memdesc:a569f1702a598fdee2c10aabfa7ef510b"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL reset_value) Tx Serializer Control <br /></td></tr>
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<tr class="separator:a569f1702a598fdee2c10aabfa7ef510b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4ee81fab5c877046d73633a914329bec"><td class="memItemLeft" align="right" valign="top"><a id="a4ee81fab5c877046d73633a914329bec"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a4ee81fab5c877046d73633a914329bec">I2S_TXCTRL_TXDEFAULT_Pos</a>   2</td></tr>
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<tr class="memdesc:a4ee81fab5c877046d73633a914329bec"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Line Default Line when Slot Disabled <br /></td></tr>
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<tr class="separator:a4ee81fab5c877046d73633a914329bec"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a873bb8f0d9aa6422494b4e127dd89a4f"><td class="memItemLeft" align="right" valign="top"><a id="a873bb8f0d9aa6422494b4e127dd89a4f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_TXDEFAULT_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2i2s_8h.html#a4ee81fab5c877046d73633a914329bec">I2S_TXCTRL_TXDEFAULT_Pos</a>)</td></tr>
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<tr class="separator:a873bb8f0d9aa6422494b4e127dd89a4f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6184544f6a0ac35f770078fdfbcf3a16"><td class="memItemLeft" align="right" valign="top"><a id="a6184544f6a0ac35f770078fdfbcf3a16"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_TXDEFAULT</b>(value)   (I2S_TXCTRL_TXDEFAULT_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#a4ee81fab5c877046d73633a914329bec">I2S_TXCTRL_TXDEFAULT_Pos</a>))</td></tr>
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<tr class="separator:a6184544f6a0ac35f770078fdfbcf3a16"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abf5713a735b7914ddc5f2ed65255e99a"><td class="memItemLeft" align="right" valign="top"><a id="abf5713a735b7914ddc5f2ed65255e99a"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#abf5713a735b7914ddc5f2ed65255e99a">I2S_TXCTRL_TXDEFAULT_ZERO_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:abf5713a735b7914ddc5f2ed65255e99a"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Output Default Value is 0 <br /></td></tr>
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<tr class="separator:abf5713a735b7914ddc5f2ed65255e99a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6b44b19936325c1879d3bd75cbbc29d4"><td class="memItemLeft" align="right" valign="top"><a id="a6b44b19936325c1879d3bd75cbbc29d4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a6b44b19936325c1879d3bd75cbbc29d4">I2S_TXCTRL_TXDEFAULT_ONE_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:a6b44b19936325c1879d3bd75cbbc29d4"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Output Default Value is 1 <br /></td></tr>
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<tr class="separator:a6b44b19936325c1879d3bd75cbbc29d4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa8f2f87914dcc6dd6b74ff20d9a39b28"><td class="memItemLeft" align="right" valign="top"><a id="aa8f2f87914dcc6dd6b74ff20d9a39b28"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#aa8f2f87914dcc6dd6b74ff20d9a39b28">I2S_TXCTRL_TXDEFAULT_HIZ_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
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<tr class="memdesc:aa8f2f87914dcc6dd6b74ff20d9a39b28"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Output Default Value is high impedance <br /></td></tr>
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<tr class="separator:aa8f2f87914dcc6dd6b74ff20d9a39b28"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aeef23b5fce5f83667a117355d57cfb70"><td class="memItemLeft" align="right" valign="top"><a id="aeef23b5fce5f83667a117355d57cfb70"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_TXDEFAULT_ZERO</b>   (<a class="el" href="component_2i2s_8h.html#abf5713a735b7914ddc5f2ed65255e99a">I2S_TXCTRL_TXDEFAULT_ZERO_Val</a> << <a class="el" href="component_2i2s_8h.html#a4ee81fab5c877046d73633a914329bec">I2S_TXCTRL_TXDEFAULT_Pos</a>)</td></tr>
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<tr class="separator:aeef23b5fce5f83667a117355d57cfb70"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abad265d5221ff997a5552d265360d9d6"><td class="memItemLeft" align="right" valign="top"><a id="abad265d5221ff997a5552d265360d9d6"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_TXDEFAULT_ONE</b>   (<a class="el" href="component_2i2s_8h.html#a6b44b19936325c1879d3bd75cbbc29d4">I2S_TXCTRL_TXDEFAULT_ONE_Val</a> << <a class="el" href="component_2i2s_8h.html#a4ee81fab5c877046d73633a914329bec">I2S_TXCTRL_TXDEFAULT_Pos</a>)</td></tr>
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<tr class="separator:abad265d5221ff997a5552d265360d9d6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a85ed5c901ca9c8d30341264a75869337"><td class="memItemLeft" align="right" valign="top"><a id="a85ed5c901ca9c8d30341264a75869337"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_TXDEFAULT_HIZ</b>   (<a class="el" href="component_2i2s_8h.html#aa8f2f87914dcc6dd6b74ff20d9a39b28">I2S_TXCTRL_TXDEFAULT_HIZ_Val</a> << <a class="el" href="component_2i2s_8h.html#a4ee81fab5c877046d73633a914329bec">I2S_TXCTRL_TXDEFAULT_Pos</a>)</td></tr>
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<tr class="separator:a85ed5c901ca9c8d30341264a75869337"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae7ee47675fb5e76abf6dbe14f7699155"><td class="memItemLeft" align="right" valign="top"><a id="ae7ee47675fb5e76abf6dbe14f7699155"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#ae7ee47675fb5e76abf6dbe14f7699155">I2S_TXCTRL_TXSAME_Pos</a>   4</td></tr>
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<tr class="memdesc:ae7ee47675fb5e76abf6dbe14f7699155"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Transmit Data when Underrun <br /></td></tr>
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<tr class="separator:ae7ee47675fb5e76abf6dbe14f7699155"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2b3789bf841795205bab8b64ebb22860"><td class="memItemLeft" align="right" valign="top"><a id="a2b3789bf841795205bab8b64ebb22860"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_TXSAME</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#ae7ee47675fb5e76abf6dbe14f7699155">I2S_TXCTRL_TXSAME_Pos</a>)</td></tr>
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<tr class="separator:a2b3789bf841795205bab8b64ebb22860"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8c9daea34ac95e8251a0c0d9c6f4fd3b"><td class="memItemLeft" align="right" valign="top"><a id="a8c9daea34ac95e8251a0c0d9c6f4fd3b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a8c9daea34ac95e8251a0c0d9c6f4fd3b">I2S_TXCTRL_TXSAME_ZERO_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:a8c9daea34ac95e8251a0c0d9c6f4fd3b"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Zero data transmitted in case of underrun <br /></td></tr>
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<tr class="separator:a8c9daea34ac95e8251a0c0d9c6f4fd3b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a56aa36e07182679fe675b2ccb45ef744"><td class="memItemLeft" align="right" valign="top"><a id="a56aa36e07182679fe675b2ccb45ef744"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a56aa36e07182679fe675b2ccb45ef744">I2S_TXCTRL_TXSAME_SAME_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:a56aa36e07182679fe675b2ccb45ef744"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Last data transmitted in case of underrun <br /></td></tr>
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<tr class="separator:a56aa36e07182679fe675b2ccb45ef744"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab6e6483ec0c492df8f4948f01fa25889"><td class="memItemLeft" align="right" valign="top"><a id="ab6e6483ec0c492df8f4948f01fa25889"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_TXSAME_ZERO</b>   (<a class="el" href="component_2i2s_8h.html#a8c9daea34ac95e8251a0c0d9c6f4fd3b">I2S_TXCTRL_TXSAME_ZERO_Val</a> << <a class="el" href="component_2i2s_8h.html#ae7ee47675fb5e76abf6dbe14f7699155">I2S_TXCTRL_TXSAME_Pos</a>)</td></tr>
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<tr class="separator:ab6e6483ec0c492df8f4948f01fa25889"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aee548e7eb982e1a2a394bd1e19082c88"><td class="memItemLeft" align="right" valign="top"><a id="aee548e7eb982e1a2a394bd1e19082c88"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_TXSAME_SAME</b>   (<a class="el" href="component_2i2s_8h.html#a56aa36e07182679fe675b2ccb45ef744">I2S_TXCTRL_TXSAME_SAME_Val</a> << <a class="el" href="component_2i2s_8h.html#ae7ee47675fb5e76abf6dbe14f7699155">I2S_TXCTRL_TXSAME_Pos</a>)</td></tr>
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<tr class="separator:aee548e7eb982e1a2a394bd1e19082c88"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2dcef89c94502331d72c7be7d49a0715"><td class="memItemLeft" align="right" valign="top"><a id="a2dcef89c94502331d72c7be7d49a0715"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a2dcef89c94502331d72c7be7d49a0715">I2S_TXCTRL_SLOTADJ_Pos</a>   7</td></tr>
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<tr class="memdesc:a2dcef89c94502331d72c7be7d49a0715"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Data Slot Formatting Adjust <br /></td></tr>
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<tr class="separator:a2dcef89c94502331d72c7be7d49a0715"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab4a523aac93b62bdec4a59f6c34d1b0c"><td class="memItemLeft" align="right" valign="top"><a id="ab4a523aac93b62bdec4a59f6c34d1b0c"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_SLOTADJ</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#a2dcef89c94502331d72c7be7d49a0715">I2S_TXCTRL_SLOTADJ_Pos</a>)</td></tr>
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<tr class="separator:ab4a523aac93b62bdec4a59f6c34d1b0c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af6c8aad73c238dacb355279b61a5a865"><td class="memItemLeft" align="right" valign="top"><a id="af6c8aad73c238dacb355279b61a5a865"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#af6c8aad73c238dacb355279b61a5a865">I2S_TXCTRL_SLOTADJ_RIGHT_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:af6c8aad73c238dacb355279b61a5a865"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Data is right adjusted in slot <br /></td></tr>
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<tr class="separator:af6c8aad73c238dacb355279b61a5a865"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3b6b42c52ca38d5dbccb44477f774191"><td class="memItemLeft" align="right" valign="top"><a id="a3b6b42c52ca38d5dbccb44477f774191"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a3b6b42c52ca38d5dbccb44477f774191">I2S_TXCTRL_SLOTADJ_LEFT_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:a3b6b42c52ca38d5dbccb44477f774191"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Data is left adjusted in slot <br /></td></tr>
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<tr class="separator:a3b6b42c52ca38d5dbccb44477f774191"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3567cd405cc8bbee69795938031e6132"><td class="memItemLeft" align="right" valign="top"><a id="a3567cd405cc8bbee69795938031e6132"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_SLOTADJ_RIGHT</b>   (<a class="el" href="component_2i2s_8h.html#af6c8aad73c238dacb355279b61a5a865">I2S_TXCTRL_SLOTADJ_RIGHT_Val</a> << <a class="el" href="component_2i2s_8h.html#a2dcef89c94502331d72c7be7d49a0715">I2S_TXCTRL_SLOTADJ_Pos</a>)</td></tr>
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<tr class="separator:a3567cd405cc8bbee69795938031e6132"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad305302ea6e139655e08bf13124ee6a0"><td class="memItemLeft" align="right" valign="top"><a id="ad305302ea6e139655e08bf13124ee6a0"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_SLOTADJ_LEFT</b>   (<a class="el" href="component_2i2s_8h.html#a3b6b42c52ca38d5dbccb44477f774191">I2S_TXCTRL_SLOTADJ_LEFT_Val</a> << <a class="el" href="component_2i2s_8h.html#a2dcef89c94502331d72c7be7d49a0715">I2S_TXCTRL_SLOTADJ_Pos</a>)</td></tr>
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<tr class="separator:ad305302ea6e139655e08bf13124ee6a0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a28c993de802c402e5792c940a7a1d467"><td class="memItemLeft" align="right" valign="top"><a id="a28c993de802c402e5792c940a7a1d467"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a28c993de802c402e5792c940a7a1d467">I2S_TXCTRL_DATASIZE_Pos</a>   8</td></tr>
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<tr class="memdesc:a28c993de802c402e5792c940a7a1d467"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Data Word Size <br /></td></tr>
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<tr class="separator:a28c993de802c402e5792c940a7a1d467"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a020745900f0b9070e468d7fc67e27c02"><td class="memItemLeft" align="right" valign="top"><a id="a020745900f0b9070e468d7fc67e27c02"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_DATASIZE_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) << <a class="el" href="component_2i2s_8h.html#a28c993de802c402e5792c940a7a1d467">I2S_TXCTRL_DATASIZE_Pos</a>)</td></tr>
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<tr class="separator:a020745900f0b9070e468d7fc67e27c02"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac03e4eb7d7662a5e23918f2704032f7e"><td class="memItemLeft" align="right" valign="top"><a id="ac03e4eb7d7662a5e23918f2704032f7e"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_DATASIZE</b>(value)   (I2S_TXCTRL_DATASIZE_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#a28c993de802c402e5792c940a7a1d467">I2S_TXCTRL_DATASIZE_Pos</a>))</td></tr>
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<tr class="separator:ac03e4eb7d7662a5e23918f2704032f7e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7b82c3e309628130ac1ff7b1090a11c6"><td class="memItemLeft" align="right" valign="top"><a id="a7b82c3e309628130ac1ff7b1090a11c6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a7b82c3e309628130ac1ff7b1090a11c6">I2S_TXCTRL_DATASIZE_32_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:a7b82c3e309628130ac1ff7b1090a11c6"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) 32 bits <br /></td></tr>
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<tr class="separator:a7b82c3e309628130ac1ff7b1090a11c6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a21e35459fb472fc624e08cf933b72409"><td class="memItemLeft" align="right" valign="top"><a id="a21e35459fb472fc624e08cf933b72409"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a21e35459fb472fc624e08cf933b72409">I2S_TXCTRL_DATASIZE_24_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:a21e35459fb472fc624e08cf933b72409"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) 24 bits <br /></td></tr>
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<tr class="separator:a21e35459fb472fc624e08cf933b72409"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2198ddb85fd954f54de0b36e05e1fb86"><td class="memItemLeft" align="right" valign="top"><a id="a2198ddb85fd954f54de0b36e05e1fb86"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a2198ddb85fd954f54de0b36e05e1fb86">I2S_TXCTRL_DATASIZE_20_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
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<tr class="memdesc:a2198ddb85fd954f54de0b36e05e1fb86"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) 20 bits <br /></td></tr>
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<tr class="separator:a2198ddb85fd954f54de0b36e05e1fb86"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a91f0b3e7f8dff05a5489498a6e718029"><td class="memItemLeft" align="right" valign="top"><a id="a91f0b3e7f8dff05a5489498a6e718029"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a91f0b3e7f8dff05a5489498a6e718029">I2S_TXCTRL_DATASIZE_18_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
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<tr class="memdesc:a91f0b3e7f8dff05a5489498a6e718029"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) 18 bits <br /></td></tr>
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<tr class="separator:a91f0b3e7f8dff05a5489498a6e718029"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1f8d8000e3d65bc9b0013ba93063ba04"><td class="memItemLeft" align="right" valign="top"><a id="a1f8d8000e3d65bc9b0013ba93063ba04"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a1f8d8000e3d65bc9b0013ba93063ba04">I2S_TXCTRL_DATASIZE_16_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
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<tr class="memdesc:a1f8d8000e3d65bc9b0013ba93063ba04"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) 16 bits <br /></td></tr>
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<tr class="separator:a1f8d8000e3d65bc9b0013ba93063ba04"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a18f6eada090015088f017e5d71b80445"><td class="memItemLeft" align="right" valign="top"><a id="a18f6eada090015088f017e5d71b80445"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a18f6eada090015088f017e5d71b80445">I2S_TXCTRL_DATASIZE_16C_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
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<tr class="memdesc:a18f6eada090015088f017e5d71b80445"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) 16 bits compact stereo <br /></td></tr>
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<tr class="separator:a18f6eada090015088f017e5d71b80445"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a85a355f001735cad1c8ea4cd34df1484"><td class="memItemLeft" align="right" valign="top"><a id="a85a355f001735cad1c8ea4cd34df1484"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a85a355f001735cad1c8ea4cd34df1484">I2S_TXCTRL_DATASIZE_8_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x6)</td></tr>
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<tr class="memdesc:a85a355f001735cad1c8ea4cd34df1484"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) 8 bits <br /></td></tr>
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<tr class="separator:a85a355f001735cad1c8ea4cd34df1484"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a855a9dc60589498c0ad6e12524b39997"><td class="memItemLeft" align="right" valign="top"><a id="a855a9dc60589498c0ad6e12524b39997"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a855a9dc60589498c0ad6e12524b39997">I2S_TXCTRL_DATASIZE_8C_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7)</td></tr>
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<tr class="memdesc:a855a9dc60589498c0ad6e12524b39997"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) 8 bits compact stereo <br /></td></tr>
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<tr class="memitem:ac71b033961612db86ecdb7c0bddec1de"><td class="memItemLeft" align="right" valign="top"><a id="ac71b033961612db86ecdb7c0bddec1de"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_DATASIZE_32</b>   (<a class="el" href="component_2i2s_8h.html#a7b82c3e309628130ac1ff7b1090a11c6">I2S_TXCTRL_DATASIZE_32_Val</a> << <a class="el" href="component_2i2s_8h.html#a28c993de802c402e5792c940a7a1d467">I2S_TXCTRL_DATASIZE_Pos</a>)</td></tr>
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<tr class="memitem:af4eb48ce8ae1dc2194fdb85ade51ec5f"><td class="memItemLeft" align="right" valign="top"><a id="af4eb48ce8ae1dc2194fdb85ade51ec5f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_DATASIZE_24</b>   (<a class="el" href="component_2i2s_8h.html#a21e35459fb472fc624e08cf933b72409">I2S_TXCTRL_DATASIZE_24_Val</a> << <a class="el" href="component_2i2s_8h.html#a28c993de802c402e5792c940a7a1d467">I2S_TXCTRL_DATASIZE_Pos</a>)</td></tr>
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<tr class="separator:af4eb48ce8ae1dc2194fdb85ade51ec5f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae8b3ebea75cfeb20f95c2c2da59e51a6"><td class="memItemLeft" align="right" valign="top"><a id="ae8b3ebea75cfeb20f95c2c2da59e51a6"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_DATASIZE_20</b>   (<a class="el" href="component_2i2s_8h.html#a2198ddb85fd954f54de0b36e05e1fb86">I2S_TXCTRL_DATASIZE_20_Val</a> << <a class="el" href="component_2i2s_8h.html#a28c993de802c402e5792c940a7a1d467">I2S_TXCTRL_DATASIZE_Pos</a>)</td></tr>
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<tr class="separator:ae8b3ebea75cfeb20f95c2c2da59e51a6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad6b26d9e11d87d5d3e51f327825db31e"><td class="memItemLeft" align="right" valign="top"><a id="ad6b26d9e11d87d5d3e51f327825db31e"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_DATASIZE_18</b>   (<a class="el" href="component_2i2s_8h.html#a91f0b3e7f8dff05a5489498a6e718029">I2S_TXCTRL_DATASIZE_18_Val</a> << <a class="el" href="component_2i2s_8h.html#a28c993de802c402e5792c940a7a1d467">I2S_TXCTRL_DATASIZE_Pos</a>)</td></tr>
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<tr class="separator:ad6b26d9e11d87d5d3e51f327825db31e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a76ff78dd4276b4f6f4facf899c0bbbc1"><td class="memItemLeft" align="right" valign="top"><a id="a76ff78dd4276b4f6f4facf899c0bbbc1"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_DATASIZE_16</b>   (<a class="el" href="component_2i2s_8h.html#a1f8d8000e3d65bc9b0013ba93063ba04">I2S_TXCTRL_DATASIZE_16_Val</a> << <a class="el" href="component_2i2s_8h.html#a28c993de802c402e5792c940a7a1d467">I2S_TXCTRL_DATASIZE_Pos</a>)</td></tr>
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<tr class="separator:a76ff78dd4276b4f6f4facf899c0bbbc1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a809549f4212563a68c24c46848a98206"><td class="memItemLeft" align="right" valign="top"><a id="a809549f4212563a68c24c46848a98206"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_DATASIZE_16C</b>   (<a class="el" href="component_2i2s_8h.html#a18f6eada090015088f017e5d71b80445">I2S_TXCTRL_DATASIZE_16C_Val</a> << <a class="el" href="component_2i2s_8h.html#a28c993de802c402e5792c940a7a1d467">I2S_TXCTRL_DATASIZE_Pos</a>)</td></tr>
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<tr class="separator:a809549f4212563a68c24c46848a98206"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afb8ff283c22f16ef06126144ce4432bf"><td class="memItemLeft" align="right" valign="top"><a id="afb8ff283c22f16ef06126144ce4432bf"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_DATASIZE_8</b>   (<a class="el" href="component_2i2s_8h.html#a85a355f001735cad1c8ea4cd34df1484">I2S_TXCTRL_DATASIZE_8_Val</a> << <a class="el" href="component_2i2s_8h.html#a28c993de802c402e5792c940a7a1d467">I2S_TXCTRL_DATASIZE_Pos</a>)</td></tr>
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<tr class="separator:afb8ff283c22f16ef06126144ce4432bf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a233be86c08af0df1d815b070b2053476"><td class="memItemLeft" align="right" valign="top"><a id="a233be86c08af0df1d815b070b2053476"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_DATASIZE_8C</b>   (<a class="el" href="component_2i2s_8h.html#a855a9dc60589498c0ad6e12524b39997">I2S_TXCTRL_DATASIZE_8C_Val</a> << <a class="el" href="component_2i2s_8h.html#a28c993de802c402e5792c940a7a1d467">I2S_TXCTRL_DATASIZE_Pos</a>)</td></tr>
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<tr class="separator:a233be86c08af0df1d815b070b2053476"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acf308742ff7a9389d9f995323f248991"><td class="memItemLeft" align="right" valign="top"><a id="acf308742ff7a9389d9f995323f248991"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#acf308742ff7a9389d9f995323f248991">I2S_TXCTRL_WORDADJ_Pos</a>   12</td></tr>
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<tr class="memdesc:acf308742ff7a9389d9f995323f248991"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Data Word Formatting Adjust <br /></td></tr>
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<tr class="separator:acf308742ff7a9389d9f995323f248991"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aec9e972438aec9c75b90c3c97c8351c0"><td class="memItemLeft" align="right" valign="top"><a id="aec9e972438aec9c75b90c3c97c8351c0"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_WORDADJ</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#acf308742ff7a9389d9f995323f248991">I2S_TXCTRL_WORDADJ_Pos</a>)</td></tr>
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<tr class="separator:aec9e972438aec9c75b90c3c97c8351c0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aeda58124b748aa45852fa476b80e9154"><td class="memItemLeft" align="right" valign="top"><a id="aeda58124b748aa45852fa476b80e9154"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#aeda58124b748aa45852fa476b80e9154">I2S_TXCTRL_WORDADJ_RIGHT_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:aeda58124b748aa45852fa476b80e9154"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Data is right adjusted in word <br /></td></tr>
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<tr class="separator:aeda58124b748aa45852fa476b80e9154"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa50789c82a9bf9c026deb554b92cb193"><td class="memItemLeft" align="right" valign="top"><a id="aa50789c82a9bf9c026deb554b92cb193"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#aa50789c82a9bf9c026deb554b92cb193">I2S_TXCTRL_WORDADJ_LEFT_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:aa50789c82a9bf9c026deb554b92cb193"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Data is left adjusted in word <br /></td></tr>
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<tr class="separator:aa50789c82a9bf9c026deb554b92cb193"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af609b21ae18dcc967cc684107df2785d"><td class="memItemLeft" align="right" valign="top"><a id="af609b21ae18dcc967cc684107df2785d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_WORDADJ_RIGHT</b>   (<a class="el" href="component_2i2s_8h.html#aeda58124b748aa45852fa476b80e9154">I2S_TXCTRL_WORDADJ_RIGHT_Val</a> << <a class="el" href="component_2i2s_8h.html#acf308742ff7a9389d9f995323f248991">I2S_TXCTRL_WORDADJ_Pos</a>)</td></tr>
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<tr class="separator:af609b21ae18dcc967cc684107df2785d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a917967a2ab452cf5bdffe04619a13044"><td class="memItemLeft" align="right" valign="top"><a id="a917967a2ab452cf5bdffe04619a13044"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_WORDADJ_LEFT</b>   (<a class="el" href="component_2i2s_8h.html#aa50789c82a9bf9c026deb554b92cb193">I2S_TXCTRL_WORDADJ_LEFT_Val</a> << <a class="el" href="component_2i2s_8h.html#acf308742ff7a9389d9f995323f248991">I2S_TXCTRL_WORDADJ_Pos</a>)</td></tr>
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<tr class="separator:a917967a2ab452cf5bdffe04619a13044"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a37b2fd7565e71d4177be7fb170dbd7cb"><td class="memItemLeft" align="right" valign="top"><a id="a37b2fd7565e71d4177be7fb170dbd7cb"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a37b2fd7565e71d4177be7fb170dbd7cb">I2S_TXCTRL_EXTEND_Pos</a>   13</td></tr>
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<tr class="memdesc:a37b2fd7565e71d4177be7fb170dbd7cb"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Data Formatting Bit Extension <br /></td></tr>
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<tr class="separator:a37b2fd7565e71d4177be7fb170dbd7cb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a06b4b55cf4eb7eee89e724d9d90c850b"><td class="memItemLeft" align="right" valign="top"><a id="a06b4b55cf4eb7eee89e724d9d90c850b"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_EXTEND_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2i2s_8h.html#a37b2fd7565e71d4177be7fb170dbd7cb">I2S_TXCTRL_EXTEND_Pos</a>)</td></tr>
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<tr class="separator:a06b4b55cf4eb7eee89e724d9d90c850b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a10d02f6d83e5e4557b063025e0d34e5b"><td class="memItemLeft" align="right" valign="top"><a id="a10d02f6d83e5e4557b063025e0d34e5b"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_EXTEND</b>(value)   (I2S_TXCTRL_EXTEND_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#a37b2fd7565e71d4177be7fb170dbd7cb">I2S_TXCTRL_EXTEND_Pos</a>))</td></tr>
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<tr class="separator:a10d02f6d83e5e4557b063025e0d34e5b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a89b72a65da6a321eb0fbcac9fc8cbdb7"><td class="memItemLeft" align="right" valign="top"><a id="a89b72a65da6a321eb0fbcac9fc8cbdb7"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a89b72a65da6a321eb0fbcac9fc8cbdb7">I2S_TXCTRL_EXTEND_ZERO_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:a89b72a65da6a321eb0fbcac9fc8cbdb7"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Extend with zeroes <br /></td></tr>
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<tr class="separator:a89b72a65da6a321eb0fbcac9fc8cbdb7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1f21ff99cc1e6fd0a764600b1471362c"><td class="memItemLeft" align="right" valign="top"><a id="a1f21ff99cc1e6fd0a764600b1471362c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a1f21ff99cc1e6fd0a764600b1471362c">I2S_TXCTRL_EXTEND_ONE_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:a1f21ff99cc1e6fd0a764600b1471362c"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Extend with ones <br /></td></tr>
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<tr class="separator:a1f21ff99cc1e6fd0a764600b1471362c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a43d0477c416edaf7c8facf7b61d62f74"><td class="memItemLeft" align="right" valign="top"><a id="a43d0477c416edaf7c8facf7b61d62f74"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a43d0477c416edaf7c8facf7b61d62f74">I2S_TXCTRL_EXTEND_MSBIT_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
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<tr class="memdesc:a43d0477c416edaf7c8facf7b61d62f74"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Extend with Most Significant Bit <br /></td></tr>
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<tr class="separator:a43d0477c416edaf7c8facf7b61d62f74"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a459c8299453f5ac1166fc16ba024b6ef"><td class="memItemLeft" align="right" valign="top"><a id="a459c8299453f5ac1166fc16ba024b6ef"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a459c8299453f5ac1166fc16ba024b6ef">I2S_TXCTRL_EXTEND_LSBIT_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
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<tr class="memdesc:a459c8299453f5ac1166fc16ba024b6ef"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Extend with Least Significant Bit <br /></td></tr>
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<tr class="separator:a459c8299453f5ac1166fc16ba024b6ef"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a78ff960a92891d6aa4b19cf706548696"><td class="memItemLeft" align="right" valign="top"><a id="a78ff960a92891d6aa4b19cf706548696"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_EXTEND_ZERO</b>   (<a class="el" href="component_2i2s_8h.html#a89b72a65da6a321eb0fbcac9fc8cbdb7">I2S_TXCTRL_EXTEND_ZERO_Val</a> << <a class="el" href="component_2i2s_8h.html#a37b2fd7565e71d4177be7fb170dbd7cb">I2S_TXCTRL_EXTEND_Pos</a>)</td></tr>
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<tr class="separator:a78ff960a92891d6aa4b19cf706548696"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a41906a7fa839be829da715b3133e1238"><td class="memItemLeft" align="right" valign="top"><a id="a41906a7fa839be829da715b3133e1238"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_EXTEND_ONE</b>   (<a class="el" href="component_2i2s_8h.html#a1f21ff99cc1e6fd0a764600b1471362c">I2S_TXCTRL_EXTEND_ONE_Val</a> << <a class="el" href="component_2i2s_8h.html#a37b2fd7565e71d4177be7fb170dbd7cb">I2S_TXCTRL_EXTEND_Pos</a>)</td></tr>
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<tr class="separator:a41906a7fa839be829da715b3133e1238"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a214c890bd170e56f9acb68362bb8d46c"><td class="memItemLeft" align="right" valign="top"><a id="a214c890bd170e56f9acb68362bb8d46c"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_EXTEND_MSBIT</b>   (<a class="el" href="component_2i2s_8h.html#a43d0477c416edaf7c8facf7b61d62f74">I2S_TXCTRL_EXTEND_MSBIT_Val</a> << <a class="el" href="component_2i2s_8h.html#a37b2fd7565e71d4177be7fb170dbd7cb">I2S_TXCTRL_EXTEND_Pos</a>)</td></tr>
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<tr class="separator:a214c890bd170e56f9acb68362bb8d46c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a366dc2b5b59b4f1899f9271295554555"><td class="memItemLeft" align="right" valign="top"><a id="a366dc2b5b59b4f1899f9271295554555"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_EXTEND_LSBIT</b>   (<a class="el" href="component_2i2s_8h.html#a459c8299453f5ac1166fc16ba024b6ef">I2S_TXCTRL_EXTEND_LSBIT_Val</a> << <a class="el" href="component_2i2s_8h.html#a37b2fd7565e71d4177be7fb170dbd7cb">I2S_TXCTRL_EXTEND_Pos</a>)</td></tr>
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<tr class="separator:a366dc2b5b59b4f1899f9271295554555"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae1b975bebe4775f0477e68de4bd61c59"><td class="memItemLeft" align="right" valign="top"><a id="ae1b975bebe4775f0477e68de4bd61c59"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#ae1b975bebe4775f0477e68de4bd61c59">I2S_TXCTRL_BITREV_Pos</a>   15</td></tr>
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<tr class="memdesc:ae1b975bebe4775f0477e68de4bd61c59"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Data Formatting Bit Reverse <br /></td></tr>
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<tr class="separator:ae1b975bebe4775f0477e68de4bd61c59"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:adc515620090e5fbcf200aa175ee19c06"><td class="memItemLeft" align="right" valign="top"><a id="adc515620090e5fbcf200aa175ee19c06"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_BITREV</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#ae1b975bebe4775f0477e68de4bd61c59">I2S_TXCTRL_BITREV_Pos</a>)</td></tr>
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<tr class="separator:adc515620090e5fbcf200aa175ee19c06"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af740bf2aac1cb1d02e41ff8c45f505d8"><td class="memItemLeft" align="right" valign="top"><a id="af740bf2aac1cb1d02e41ff8c45f505d8"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#af740bf2aac1cb1d02e41ff8c45f505d8">I2S_TXCTRL_BITREV_MSBIT_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:af740bf2aac1cb1d02e41ff8c45f505d8"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Transfer Data Most Significant Bit (MSB) first (default for I2S protocol) <br /></td></tr>
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<tr class="separator:af740bf2aac1cb1d02e41ff8c45f505d8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a349219787fd6652c900c28fc6c91431b"><td class="memItemLeft" align="right" valign="top"><a id="a349219787fd6652c900c28fc6c91431b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a349219787fd6652c900c28fc6c91431b">I2S_TXCTRL_BITREV_LSBIT_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:a349219787fd6652c900c28fc6c91431b"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Transfer Data Least Significant Bit (LSB) first <br /></td></tr>
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<tr class="separator:a349219787fd6652c900c28fc6c91431b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acdfef50e98b3a577f90537b7c2cb8430"><td class="memItemLeft" align="right" valign="top"><a id="acdfef50e98b3a577f90537b7c2cb8430"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_BITREV_MSBIT</b>   (<a class="el" href="component_2i2s_8h.html#af740bf2aac1cb1d02e41ff8c45f505d8">I2S_TXCTRL_BITREV_MSBIT_Val</a> << <a class="el" href="component_2i2s_8h.html#ae1b975bebe4775f0477e68de4bd61c59">I2S_TXCTRL_BITREV_Pos</a>)</td></tr>
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<tr class="separator:acdfef50e98b3a577f90537b7c2cb8430"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7ab20cf37b79b08507b5a8b237186697"><td class="memItemLeft" align="right" valign="top"><a id="a7ab20cf37b79b08507b5a8b237186697"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_BITREV_LSBIT</b>   (<a class="el" href="component_2i2s_8h.html#a349219787fd6652c900c28fc6c91431b">I2S_TXCTRL_BITREV_LSBIT_Val</a> << <a class="el" href="component_2i2s_8h.html#ae1b975bebe4775f0477e68de4bd61c59">I2S_TXCTRL_BITREV_Pos</a>)</td></tr>
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<tr class="separator:a7ab20cf37b79b08507b5a8b237186697"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5b37220966a55f4c97e447b5b5a4d5f5"><td class="memItemLeft" align="right" valign="top"><a id="a5b37220966a55f4c97e447b5b5a4d5f5"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a5b37220966a55f4c97e447b5b5a4d5f5">I2S_TXCTRL_SLOTDIS0_Pos</a>   16</td></tr>
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<tr class="memdesc:a5b37220966a55f4c97e447b5b5a4d5f5"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Slot 0 Disabled for this Serializer <br /></td></tr>
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<tr class="separator:a5b37220966a55f4c97e447b5b5a4d5f5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a57912ba40b898fbf6d3544ce1aa6fbaf"><td class="memItemLeft" align="right" valign="top"><a id="a57912ba40b898fbf6d3544ce1aa6fbaf"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_SLOTDIS0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a5b37220966a55f4c97e447b5b5a4d5f5">I2S_TXCTRL_SLOTDIS0_Pos</a>)</td></tr>
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<tr class="separator:a57912ba40b898fbf6d3544ce1aa6fbaf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aebb22b299317c3b746d176b6b3c37a10"><td class="memItemLeft" align="right" valign="top"><a id="aebb22b299317c3b746d176b6b3c37a10"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#aebb22b299317c3b746d176b6b3c37a10">I2S_TXCTRL_SLOTDIS1_Pos</a>   17</td></tr>
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<tr class="memdesc:aebb22b299317c3b746d176b6b3c37a10"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Slot 1 Disabled for this Serializer <br /></td></tr>
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<tr class="separator:aebb22b299317c3b746d176b6b3c37a10"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:add96ddcf1fcd61c16889394f04d93637"><td class="memItemLeft" align="right" valign="top"><a id="add96ddcf1fcd61c16889394f04d93637"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_SLOTDIS1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#aebb22b299317c3b746d176b6b3c37a10">I2S_TXCTRL_SLOTDIS1_Pos</a>)</td></tr>
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<tr class="separator:add96ddcf1fcd61c16889394f04d93637"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a926aa8edd873ca289a6266bdb3a6948d"><td class="memItemLeft" align="right" valign="top"><a id="a926aa8edd873ca289a6266bdb3a6948d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a926aa8edd873ca289a6266bdb3a6948d">I2S_TXCTRL_SLOTDIS2_Pos</a>   18</td></tr>
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<tr class="memdesc:a926aa8edd873ca289a6266bdb3a6948d"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Slot 2 Disabled for this Serializer <br /></td></tr>
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<tr class="separator:a926aa8edd873ca289a6266bdb3a6948d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac23c4b0c073c33b74946bf739409eb4b"><td class="memItemLeft" align="right" valign="top"><a id="ac23c4b0c073c33b74946bf739409eb4b"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_SLOTDIS2</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a926aa8edd873ca289a6266bdb3a6948d">I2S_TXCTRL_SLOTDIS2_Pos</a>)</td></tr>
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<tr class="separator:ac23c4b0c073c33b74946bf739409eb4b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa6b570d5fe4470934981ba98cdcf7131"><td class="memItemLeft" align="right" valign="top"><a id="aa6b570d5fe4470934981ba98cdcf7131"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#aa6b570d5fe4470934981ba98cdcf7131">I2S_TXCTRL_SLOTDIS3_Pos</a>   19</td></tr>
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<tr class="memdesc:aa6b570d5fe4470934981ba98cdcf7131"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Slot 3 Disabled for this Serializer <br /></td></tr>
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<tr class="separator:aa6b570d5fe4470934981ba98cdcf7131"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac6e92cdc4831762a2b96ff6629564c50"><td class="memItemLeft" align="right" valign="top"><a id="ac6e92cdc4831762a2b96ff6629564c50"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_SLOTDIS3</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#aa6b570d5fe4470934981ba98cdcf7131">I2S_TXCTRL_SLOTDIS3_Pos</a>)</td></tr>
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<tr class="separator:ac6e92cdc4831762a2b96ff6629564c50"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aad4cd0b91555f9e7fee10efcabf1b789"><td class="memItemLeft" align="right" valign="top"><a id="aad4cd0b91555f9e7fee10efcabf1b789"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#aad4cd0b91555f9e7fee10efcabf1b789">I2S_TXCTRL_SLOTDIS4_Pos</a>   20</td></tr>
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<tr class="memdesc:aad4cd0b91555f9e7fee10efcabf1b789"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Slot 4 Disabled for this Serializer <br /></td></tr>
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<tr class="separator:aad4cd0b91555f9e7fee10efcabf1b789"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af15c49d87faecf52c492468cf6e1eb1b"><td class="memItemLeft" align="right" valign="top"><a id="af15c49d87faecf52c492468cf6e1eb1b"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_SLOTDIS4</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#aad4cd0b91555f9e7fee10efcabf1b789">I2S_TXCTRL_SLOTDIS4_Pos</a>)</td></tr>
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<tr class="separator:af15c49d87faecf52c492468cf6e1eb1b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7fa7b3f8c3a8b5f73a21e8e23ec10bac"><td class="memItemLeft" align="right" valign="top"><a id="a7fa7b3f8c3a8b5f73a21e8e23ec10bac"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a7fa7b3f8c3a8b5f73a21e8e23ec10bac">I2S_TXCTRL_SLOTDIS5_Pos</a>   21</td></tr>
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<tr class="memdesc:a7fa7b3f8c3a8b5f73a21e8e23ec10bac"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Slot 5 Disabled for this Serializer <br /></td></tr>
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<tr class="separator:a7fa7b3f8c3a8b5f73a21e8e23ec10bac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae07a9f3e4d127737a30300baa3a36d71"><td class="memItemLeft" align="right" valign="top"><a id="ae07a9f3e4d127737a30300baa3a36d71"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_SLOTDIS5</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a7fa7b3f8c3a8b5f73a21e8e23ec10bac">I2S_TXCTRL_SLOTDIS5_Pos</a>)</td></tr>
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<tr class="separator:ae07a9f3e4d127737a30300baa3a36d71"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a33c62bb9e584f109e68e5d3f3c31bb5f"><td class="memItemLeft" align="right" valign="top"><a id="a33c62bb9e584f109e68e5d3f3c31bb5f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a33c62bb9e584f109e68e5d3f3c31bb5f">I2S_TXCTRL_SLOTDIS6_Pos</a>   22</td></tr>
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<tr class="memdesc:a33c62bb9e584f109e68e5d3f3c31bb5f"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Slot 6 Disabled for this Serializer <br /></td></tr>
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<tr class="separator:a33c62bb9e584f109e68e5d3f3c31bb5f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3c7ab2c702611bf342492363c3c90194"><td class="memItemLeft" align="right" valign="top"><a id="a3c7ab2c702611bf342492363c3c90194"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_SLOTDIS6</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a33c62bb9e584f109e68e5d3f3c31bb5f">I2S_TXCTRL_SLOTDIS6_Pos</a>)</td></tr>
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<tr class="separator:a3c7ab2c702611bf342492363c3c90194"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1ebbc3f080e98c930bc2c135d1790eeb"><td class="memItemLeft" align="right" valign="top"><a id="a1ebbc3f080e98c930bc2c135d1790eeb"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a1ebbc3f080e98c930bc2c135d1790eeb">I2S_TXCTRL_SLOTDIS7_Pos</a>   23</td></tr>
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<tr class="memdesc:a1ebbc3f080e98c930bc2c135d1790eeb"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Slot 7 Disabled for this Serializer <br /></td></tr>
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<tr class="separator:a1ebbc3f080e98c930bc2c135d1790eeb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8a2bf3d3868267c0865602a1ada60de0"><td class="memItemLeft" align="right" valign="top"><a id="a8a2bf3d3868267c0865602a1ada60de0"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_SLOTDIS7</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a1ebbc3f080e98c930bc2c135d1790eeb">I2S_TXCTRL_SLOTDIS7_Pos</a>)</td></tr>
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<tr class="separator:a8a2bf3d3868267c0865602a1ada60de0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2bb7b4f5c569e1af3c107e942ee93f47"><td class="memItemLeft" align="right" valign="top"><a id="a2bb7b4f5c569e1af3c107e942ee93f47"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a2bb7b4f5c569e1af3c107e942ee93f47">I2S_TXCTRL_SLOTDIS_Pos</a>   16</td></tr>
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<tr class="memdesc:a2bb7b4f5c569e1af3c107e942ee93f47"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Slot x Disabled for this Serializer <br /></td></tr>
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<tr class="separator:a2bb7b4f5c569e1af3c107e942ee93f47"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a48d9664f8f66bfc4ab2ac52ea9954c06"><td class="memItemLeft" align="right" valign="top"><a id="a48d9664f8f66bfc4ab2ac52ea9954c06"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_SLOTDIS_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF) << <a class="el" href="component_2i2s_8h.html#a2bb7b4f5c569e1af3c107e942ee93f47">I2S_TXCTRL_SLOTDIS_Pos</a>)</td></tr>
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<tr class="separator:a48d9664f8f66bfc4ab2ac52ea9954c06"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae6cd4dc2ff3a662b8c1c82f155ebfa35"><td class="memItemLeft" align="right" valign="top"><a id="ae6cd4dc2ff3a662b8c1c82f155ebfa35"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_SLOTDIS</b>(value)   (I2S_TXCTRL_SLOTDIS_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#a2bb7b4f5c569e1af3c107e942ee93f47">I2S_TXCTRL_SLOTDIS_Pos</a>))</td></tr>
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<tr class="separator:ae6cd4dc2ff3a662b8c1c82f155ebfa35"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac6cb93d5503a1e116a386f6f6ef55c49"><td class="memItemLeft" align="right" valign="top"><a id="ac6cb93d5503a1e116a386f6f6ef55c49"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#ac6cb93d5503a1e116a386f6f6ef55c49">I2S_TXCTRL_MONO_Pos</a>   24</td></tr>
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<tr class="memdesc:ac6cb93d5503a1e116a386f6f6ef55c49"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Mono Mode <br /></td></tr>
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<tr class="separator:ac6cb93d5503a1e116a386f6f6ef55c49"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4481780c1aafdce9bcf78476fe2a7a87"><td class="memItemLeft" align="right" valign="top"><a id="a4481780c1aafdce9bcf78476fe2a7a87"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_MONO</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#ac6cb93d5503a1e116a386f6f6ef55c49">I2S_TXCTRL_MONO_Pos</a>)</td></tr>
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<tr class="separator:a4481780c1aafdce9bcf78476fe2a7a87"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a71cdc71680ce9ff486d264e3d2ed8ded"><td class="memItemLeft" align="right" valign="top"><a id="a71cdc71680ce9ff486d264e3d2ed8ded"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a71cdc71680ce9ff486d264e3d2ed8ded">I2S_TXCTRL_MONO_STEREO_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:a71cdc71680ce9ff486d264e3d2ed8ded"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Normal mode <br /></td></tr>
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<tr class="separator:a71cdc71680ce9ff486d264e3d2ed8ded"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abcc79cb421297fcc9d0129dd4558c0d6"><td class="memItemLeft" align="right" valign="top"><a id="abcc79cb421297fcc9d0129dd4558c0d6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#abcc79cb421297fcc9d0129dd4558c0d6">I2S_TXCTRL_MONO_MONO_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:abcc79cb421297fcc9d0129dd4558c0d6"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Left channel data is duplicated to right channel <br /></td></tr>
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<tr class="memitem:a7fc380f08bd1125b3e0fd0f257d322aa"><td class="memItemLeft" align="right" valign="top"><a id="a7fc380f08bd1125b3e0fd0f257d322aa"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_MONO_STEREO</b>   (<a class="el" href="component_2i2s_8h.html#a71cdc71680ce9ff486d264e3d2ed8ded">I2S_TXCTRL_MONO_STEREO_Val</a> << <a class="el" href="component_2i2s_8h.html#ac6cb93d5503a1e116a386f6f6ef55c49">I2S_TXCTRL_MONO_Pos</a>)</td></tr>
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<tr class="memitem:a802443474c239e1742d55f22308df750"><td class="memItemLeft" align="right" valign="top"><a id="a802443474c239e1742d55f22308df750"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_MONO_MONO</b>   (<a class="el" href="component_2i2s_8h.html#abcc79cb421297fcc9d0129dd4558c0d6">I2S_TXCTRL_MONO_MONO_Val</a> << <a class="el" href="component_2i2s_8h.html#ac6cb93d5503a1e116a386f6f6ef55c49">I2S_TXCTRL_MONO_Pos</a>)</td></tr>
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<tr class="memitem:a4244640d48bf5c939ac301c968669526"><td class="memItemLeft" align="right" valign="top"><a id="a4244640d48bf5c939ac301c968669526"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a4244640d48bf5c939ac301c968669526">I2S_TXCTRL_DMA_Pos</a>   25</td></tr>
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<tr class="memdesc:a4244640d48bf5c939ac301c968669526"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Single or Multiple DMA Channels <br /></td></tr>
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<tr class="memitem:a3fa75bef6e3a477a39219b8b6e10a088"><td class="memItemLeft" align="right" valign="top"><a id="a3fa75bef6e3a477a39219b8b6e10a088"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_DMA</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#a4244640d48bf5c939ac301c968669526">I2S_TXCTRL_DMA_Pos</a>)</td></tr>
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<tr class="separator:a3fa75bef6e3a477a39219b8b6e10a088"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a46dda93f82c55912a66658f122b43bcf"><td class="memItemLeft" align="right" valign="top"><a id="a46dda93f82c55912a66658f122b43bcf"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a46dda93f82c55912a66658f122b43bcf">I2S_TXCTRL_DMA_SINGLE_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:a46dda93f82c55912a66658f122b43bcf"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) Single DMA channel <br /></td></tr>
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<tr class="separator:a46dda93f82c55912a66658f122b43bcf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2be75d9e42c8f9c11c685455bb1c7420"><td class="memItemLeft" align="right" valign="top"><a id="a2be75d9e42c8f9c11c685455bb1c7420"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a2be75d9e42c8f9c11c685455bb1c7420">I2S_TXCTRL_DMA_MULTIPLE_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:a2be75d9e42c8f9c11c685455bb1c7420"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) One DMA channel per data channel <br /></td></tr>
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<tr class="memitem:a0f9a5a22f7213d034adea7b759d6e70f"><td class="memItemLeft" align="right" valign="top"><a id="a0f9a5a22f7213d034adea7b759d6e70f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_DMA_SINGLE</b>   (<a class="el" href="component_2i2s_8h.html#a46dda93f82c55912a66658f122b43bcf">I2S_TXCTRL_DMA_SINGLE_Val</a> << <a class="el" href="component_2i2s_8h.html#a4244640d48bf5c939ac301c968669526">I2S_TXCTRL_DMA_Pos</a>)</td></tr>
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<tr class="memitem:a8aed9ef29ce88a8c13c1173dad1f16f6"><td class="memItemLeft" align="right" valign="top"><a id="a8aed9ef29ce88a8c13c1173dad1f16f6"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXCTRL_DMA_MULTIPLE</b>   (<a class="el" href="component_2i2s_8h.html#a2be75d9e42c8f9c11c685455bb1c7420">I2S_TXCTRL_DMA_MULTIPLE_Val</a> << <a class="el" href="component_2i2s_8h.html#a4244640d48bf5c939ac301c968669526">I2S_TXCTRL_DMA_Pos</a>)</td></tr>
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<tr class="separator:a8aed9ef29ce88a8c13c1173dad1f16f6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aec1e6da19a9a67218389ab7091287328"><td class="memItemLeft" align="right" valign="top"><a id="aec1e6da19a9a67218389ab7091287328"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#aec1e6da19a9a67218389ab7091287328">I2S_TXCTRL_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x03FFF79C)</td></tr>
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<tr class="memdesc:aec1e6da19a9a67218389ab7091287328"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXCTRL) MASK Register <br /></td></tr>
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<tr class="memitem:a20ef159c381b0d3f9bdcb88e22dac048"><td class="memItemLeft" align="right" valign="top"><a id="a20ef159c381b0d3f9bdcb88e22dac048"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a20ef159c381b0d3f9bdcb88e22dac048">I2S_RXCTRL_OFFSET</a>   0x24</td></tr>
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<tr class="memdesc:a20ef159c381b0d3f9bdcb88e22dac048"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL offset) Rx Serializer Control <br /></td></tr>
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<tr class="separator:a20ef159c381b0d3f9bdcb88e22dac048"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1d4fd8bc89985b67f1c3e567d8e235f0"><td class="memItemLeft" align="right" valign="top"><a id="a1d4fd8bc89985b67f1c3e567d8e235f0"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a1d4fd8bc89985b67f1c3e567d8e235f0">I2S_RXCTRL_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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<tr class="memdesc:a1d4fd8bc89985b67f1c3e567d8e235f0"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL reset_value) Rx Serializer Control <br /></td></tr>
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<tr class="separator:a1d4fd8bc89985b67f1c3e567d8e235f0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0e3aefa2716526f84eedd3de813c7470"><td class="memItemLeft" align="right" valign="top"><a id="a0e3aefa2716526f84eedd3de813c7470"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a0e3aefa2716526f84eedd3de813c7470">I2S_RXCTRL_SERMODE_Pos</a>   0</td></tr>
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<tr class="memdesc:a0e3aefa2716526f84eedd3de813c7470"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Serializer Mode <br /></td></tr>
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<tr class="separator:a0e3aefa2716526f84eedd3de813c7470"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afe55d41b7875d5efd2fc81aab4d8b812"><td class="memItemLeft" align="right" valign="top"><a id="afe55d41b7875d5efd2fc81aab4d8b812"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_SERMODE_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2i2s_8h.html#a0e3aefa2716526f84eedd3de813c7470">I2S_RXCTRL_SERMODE_Pos</a>)</td></tr>
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<tr class="separator:afe55d41b7875d5efd2fc81aab4d8b812"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae9590a3486cf009433f0f551575c82dd"><td class="memItemLeft" align="right" valign="top"><a id="ae9590a3486cf009433f0f551575c82dd"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_SERMODE</b>(value)   (I2S_RXCTRL_SERMODE_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#a0e3aefa2716526f84eedd3de813c7470">I2S_RXCTRL_SERMODE_Pos</a>))</td></tr>
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<tr class="separator:ae9590a3486cf009433f0f551575c82dd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8b3f26e178ed08e633d945067b4a7249"><td class="memItemLeft" align="right" valign="top"><a id="a8b3f26e178ed08e633d945067b4a7249"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a8b3f26e178ed08e633d945067b4a7249">I2S_RXCTRL_SERMODE_RX_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:a8b3f26e178ed08e633d945067b4a7249"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Receive <br /></td></tr>
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<tr class="separator:a8b3f26e178ed08e633d945067b4a7249"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6f10754a9b32ad10f3cb4d7483e2ca49"><td class="memItemLeft" align="right" valign="top"><a id="a6f10754a9b32ad10f3cb4d7483e2ca49"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a6f10754a9b32ad10f3cb4d7483e2ca49">I2S_RXCTRL_SERMODE_PDM2_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
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<tr class="memdesc:a6f10754a9b32ad10f3cb4d7483e2ca49"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Receive one PDM data on each serial clock edge <br /></td></tr>
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<tr class="separator:a6f10754a9b32ad10f3cb4d7483e2ca49"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af503b4367f31a79721e861cf31d0b386"><td class="memItemLeft" align="right" valign="top"><a id="af503b4367f31a79721e861cf31d0b386"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_SERMODE_RX</b>   (<a class="el" href="component_2i2s_8h.html#a8b3f26e178ed08e633d945067b4a7249">I2S_RXCTRL_SERMODE_RX_Val</a> << <a class="el" href="component_2i2s_8h.html#a0e3aefa2716526f84eedd3de813c7470">I2S_RXCTRL_SERMODE_Pos</a>)</td></tr>
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<tr class="separator:af503b4367f31a79721e861cf31d0b386"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac7afa20f982d4baf7dbaf28e52a745cd"><td class="memItemLeft" align="right" valign="top"><a id="ac7afa20f982d4baf7dbaf28e52a745cd"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_SERMODE_PDM2</b>   (<a class="el" href="component_2i2s_8h.html#a6f10754a9b32ad10f3cb4d7483e2ca49">I2S_RXCTRL_SERMODE_PDM2_Val</a> << <a class="el" href="component_2i2s_8h.html#a0e3aefa2716526f84eedd3de813c7470">I2S_RXCTRL_SERMODE_Pos</a>)</td></tr>
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<tr class="separator:ac7afa20f982d4baf7dbaf28e52a745cd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a651115fd712c9d92b2afa088a6ea9ba4"><td class="memItemLeft" align="right" valign="top"><a id="a651115fd712c9d92b2afa088a6ea9ba4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a651115fd712c9d92b2afa088a6ea9ba4">I2S_RXCTRL_CLKSEL_Pos</a>   5</td></tr>
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<tr class="memdesc:a651115fd712c9d92b2afa088a6ea9ba4"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Clock Unit Selection <br /></td></tr>
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<tr class="separator:a651115fd712c9d92b2afa088a6ea9ba4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2213eb7139e983a62eace5ecc58b34b1"><td class="memItemLeft" align="right" valign="top"><a id="a2213eb7139e983a62eace5ecc58b34b1"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_CLKSEL</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#a651115fd712c9d92b2afa088a6ea9ba4">I2S_RXCTRL_CLKSEL_Pos</a>)</td></tr>
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<tr class="separator:a2213eb7139e983a62eace5ecc58b34b1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1bf5e6a62ea3c9152ccded8930946871"><td class="memItemLeft" align="right" valign="top"><a id="a1bf5e6a62ea3c9152ccded8930946871"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a1bf5e6a62ea3c9152ccded8930946871">I2S_RXCTRL_CLKSEL_CLK0_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:a1bf5e6a62ea3c9152ccded8930946871"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Use Clock Unit 0 <br /></td></tr>
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<tr class="separator:a1bf5e6a62ea3c9152ccded8930946871"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab5566340ff2baa8b4144fad7ef03d699"><td class="memItemLeft" align="right" valign="top"><a id="ab5566340ff2baa8b4144fad7ef03d699"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#ab5566340ff2baa8b4144fad7ef03d699">I2S_RXCTRL_CLKSEL_CLK1_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:ab5566340ff2baa8b4144fad7ef03d699"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Use Clock Unit 1 <br /></td></tr>
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<tr class="separator:ab5566340ff2baa8b4144fad7ef03d699"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a347ff378dd00f0e8d60c95adff479ec9"><td class="memItemLeft" align="right" valign="top"><a id="a347ff378dd00f0e8d60c95adff479ec9"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_CLKSEL_CLK0</b>   (<a class="el" href="component_2i2s_8h.html#a1bf5e6a62ea3c9152ccded8930946871">I2S_RXCTRL_CLKSEL_CLK0_Val</a> << <a class="el" href="component_2i2s_8h.html#a651115fd712c9d92b2afa088a6ea9ba4">I2S_RXCTRL_CLKSEL_Pos</a>)</td></tr>
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<tr class="separator:a347ff378dd00f0e8d60c95adff479ec9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a02db20e3d3fa5949682c720bdfa81556"><td class="memItemLeft" align="right" valign="top"><a id="a02db20e3d3fa5949682c720bdfa81556"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_CLKSEL_CLK1</b>   (<a class="el" href="component_2i2s_8h.html#ab5566340ff2baa8b4144fad7ef03d699">I2S_RXCTRL_CLKSEL_CLK1_Val</a> << <a class="el" href="component_2i2s_8h.html#a651115fd712c9d92b2afa088a6ea9ba4">I2S_RXCTRL_CLKSEL_Pos</a>)</td></tr>
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<tr class="separator:a02db20e3d3fa5949682c720bdfa81556"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abb4d28db80499ecd44a89f9719b78a65"><td class="memItemLeft" align="right" valign="top"><a id="abb4d28db80499ecd44a89f9719b78a65"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#abb4d28db80499ecd44a89f9719b78a65">I2S_RXCTRL_SLOTADJ_Pos</a>   7</td></tr>
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<tr class="memdesc:abb4d28db80499ecd44a89f9719b78a65"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Data Slot Formatting Adjust <br /></td></tr>
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<tr class="separator:abb4d28db80499ecd44a89f9719b78a65"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a63430f0b42bf0b451830d6163e68656d"><td class="memItemLeft" align="right" valign="top"><a id="a63430f0b42bf0b451830d6163e68656d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_SLOTADJ</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#abb4d28db80499ecd44a89f9719b78a65">I2S_RXCTRL_SLOTADJ_Pos</a>)</td></tr>
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<tr class="separator:a63430f0b42bf0b451830d6163e68656d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9062e73bee32d548de7e9f5d5d45a917"><td class="memItemLeft" align="right" valign="top"><a id="a9062e73bee32d548de7e9f5d5d45a917"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a9062e73bee32d548de7e9f5d5d45a917">I2S_RXCTRL_SLOTADJ_RIGHT_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:a9062e73bee32d548de7e9f5d5d45a917"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Data is right adjusted in slot <br /></td></tr>
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<tr class="separator:a9062e73bee32d548de7e9f5d5d45a917"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:adb489860994fc1b15e98af9b5d043ab0"><td class="memItemLeft" align="right" valign="top"><a id="adb489860994fc1b15e98af9b5d043ab0"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#adb489860994fc1b15e98af9b5d043ab0">I2S_RXCTRL_SLOTADJ_LEFT_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:adb489860994fc1b15e98af9b5d043ab0"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Data is left adjusted in slot <br /></td></tr>
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<tr class="separator:adb489860994fc1b15e98af9b5d043ab0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a981d2e0b3b39de8e0d55112aea677e45"><td class="memItemLeft" align="right" valign="top"><a id="a981d2e0b3b39de8e0d55112aea677e45"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_SLOTADJ_RIGHT</b>   (<a class="el" href="component_2i2s_8h.html#a9062e73bee32d548de7e9f5d5d45a917">I2S_RXCTRL_SLOTADJ_RIGHT_Val</a> << <a class="el" href="component_2i2s_8h.html#abb4d28db80499ecd44a89f9719b78a65">I2S_RXCTRL_SLOTADJ_Pos</a>)</td></tr>
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<tr class="separator:a981d2e0b3b39de8e0d55112aea677e45"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad15bfede7f67a207634bc210745fa4f2"><td class="memItemLeft" align="right" valign="top"><a id="ad15bfede7f67a207634bc210745fa4f2"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_SLOTADJ_LEFT</b>   (<a class="el" href="component_2i2s_8h.html#adb489860994fc1b15e98af9b5d043ab0">I2S_RXCTRL_SLOTADJ_LEFT_Val</a> << <a class="el" href="component_2i2s_8h.html#abb4d28db80499ecd44a89f9719b78a65">I2S_RXCTRL_SLOTADJ_Pos</a>)</td></tr>
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<tr class="separator:ad15bfede7f67a207634bc210745fa4f2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab02b820857f008f6dce1a3b2aca8abdf"><td class="memItemLeft" align="right" valign="top"><a id="ab02b820857f008f6dce1a3b2aca8abdf"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#ab02b820857f008f6dce1a3b2aca8abdf">I2S_RXCTRL_DATASIZE_Pos</a>   8</td></tr>
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<tr class="memdesc:ab02b820857f008f6dce1a3b2aca8abdf"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Data Word Size <br /></td></tr>
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<tr class="separator:ab02b820857f008f6dce1a3b2aca8abdf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa4372d009908cdcf59bffdd248587d07"><td class="memItemLeft" align="right" valign="top"><a id="aa4372d009908cdcf59bffdd248587d07"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_DATASIZE_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) << <a class="el" href="component_2i2s_8h.html#ab02b820857f008f6dce1a3b2aca8abdf">I2S_RXCTRL_DATASIZE_Pos</a>)</td></tr>
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<tr class="separator:aa4372d009908cdcf59bffdd248587d07"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a04713ba98e3041ca503668ac0858e641"><td class="memItemLeft" align="right" valign="top"><a id="a04713ba98e3041ca503668ac0858e641"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_DATASIZE</b>(value)   (I2S_RXCTRL_DATASIZE_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#ab02b820857f008f6dce1a3b2aca8abdf">I2S_RXCTRL_DATASIZE_Pos</a>))</td></tr>
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<tr class="separator:a04713ba98e3041ca503668ac0858e641"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a382da5627a63d7a6c98674de4a5ba03d"><td class="memItemLeft" align="right" valign="top"><a id="a382da5627a63d7a6c98674de4a5ba03d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a382da5627a63d7a6c98674de4a5ba03d">I2S_RXCTRL_DATASIZE_32_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:a382da5627a63d7a6c98674de4a5ba03d"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) 32 bits <br /></td></tr>
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<tr class="separator:a382da5627a63d7a6c98674de4a5ba03d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a10c8a4e2f20063d37fa2d24027718829"><td class="memItemLeft" align="right" valign="top"><a id="a10c8a4e2f20063d37fa2d24027718829"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a10c8a4e2f20063d37fa2d24027718829">I2S_RXCTRL_DATASIZE_24_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:a10c8a4e2f20063d37fa2d24027718829"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) 24 bits <br /></td></tr>
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<tr class="separator:a10c8a4e2f20063d37fa2d24027718829"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afdb0227564c5d171483a812ba25a9b5a"><td class="memItemLeft" align="right" valign="top"><a id="afdb0227564c5d171483a812ba25a9b5a"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#afdb0227564c5d171483a812ba25a9b5a">I2S_RXCTRL_DATASIZE_20_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
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<tr class="memdesc:afdb0227564c5d171483a812ba25a9b5a"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) 20 bits <br /></td></tr>
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<tr class="separator:afdb0227564c5d171483a812ba25a9b5a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9aa9c80f04de2464087be188b988481d"><td class="memItemLeft" align="right" valign="top"><a id="a9aa9c80f04de2464087be188b988481d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a9aa9c80f04de2464087be188b988481d">I2S_RXCTRL_DATASIZE_18_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
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<tr class="memdesc:a9aa9c80f04de2464087be188b988481d"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) 18 bits <br /></td></tr>
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<tr class="separator:a9aa9c80f04de2464087be188b988481d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a47e69a45e045535406ad55e11ad5d71c"><td class="memItemLeft" align="right" valign="top"><a id="a47e69a45e045535406ad55e11ad5d71c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a47e69a45e045535406ad55e11ad5d71c">I2S_RXCTRL_DATASIZE_16_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
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<tr class="memdesc:a47e69a45e045535406ad55e11ad5d71c"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) 16 bits <br /></td></tr>
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<tr class="separator:a47e69a45e045535406ad55e11ad5d71c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4e55a2002f9093bb01be018bbd7459ac"><td class="memItemLeft" align="right" valign="top"><a id="a4e55a2002f9093bb01be018bbd7459ac"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a4e55a2002f9093bb01be018bbd7459ac">I2S_RXCTRL_DATASIZE_16C_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
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<tr class="memdesc:a4e55a2002f9093bb01be018bbd7459ac"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) 16 bits compact stereo <br /></td></tr>
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<tr class="separator:a4e55a2002f9093bb01be018bbd7459ac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6ab4f649f427ba70829ead258480e3f2"><td class="memItemLeft" align="right" valign="top"><a id="a6ab4f649f427ba70829ead258480e3f2"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a6ab4f649f427ba70829ead258480e3f2">I2S_RXCTRL_DATASIZE_8_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x6)</td></tr>
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<tr class="memdesc:a6ab4f649f427ba70829ead258480e3f2"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) 8 bits <br /></td></tr>
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<tr class="separator:a6ab4f649f427ba70829ead258480e3f2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a64ebb00aef17da0a3250559554e51fd2"><td class="memItemLeft" align="right" valign="top"><a id="a64ebb00aef17da0a3250559554e51fd2"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a64ebb00aef17da0a3250559554e51fd2">I2S_RXCTRL_DATASIZE_8C_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7)</td></tr>
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<tr class="memdesc:a64ebb00aef17da0a3250559554e51fd2"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) 8 bits compact stereo <br /></td></tr>
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<tr class="separator:a64ebb00aef17da0a3250559554e51fd2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a314e311b62b4a6319b59c47b49132f90"><td class="memItemLeft" align="right" valign="top"><a id="a314e311b62b4a6319b59c47b49132f90"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_DATASIZE_32</b>   (<a class="el" href="component_2i2s_8h.html#a382da5627a63d7a6c98674de4a5ba03d">I2S_RXCTRL_DATASIZE_32_Val</a> << <a class="el" href="component_2i2s_8h.html#ab02b820857f008f6dce1a3b2aca8abdf">I2S_RXCTRL_DATASIZE_Pos</a>)</td></tr>
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<tr class="separator:a314e311b62b4a6319b59c47b49132f90"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a74f016b61d6a4b9a8d65d0305e39b84a"><td class="memItemLeft" align="right" valign="top"><a id="a74f016b61d6a4b9a8d65d0305e39b84a"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_DATASIZE_24</b>   (<a class="el" href="component_2i2s_8h.html#a10c8a4e2f20063d37fa2d24027718829">I2S_RXCTRL_DATASIZE_24_Val</a> << <a class="el" href="component_2i2s_8h.html#ab02b820857f008f6dce1a3b2aca8abdf">I2S_RXCTRL_DATASIZE_Pos</a>)</td></tr>
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<tr class="separator:a74f016b61d6a4b9a8d65d0305e39b84a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a199eb996d380ff56aa36637e6a4c2f2d"><td class="memItemLeft" align="right" valign="top"><a id="a199eb996d380ff56aa36637e6a4c2f2d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_DATASIZE_20</b>   (<a class="el" href="component_2i2s_8h.html#afdb0227564c5d171483a812ba25a9b5a">I2S_RXCTRL_DATASIZE_20_Val</a> << <a class="el" href="component_2i2s_8h.html#ab02b820857f008f6dce1a3b2aca8abdf">I2S_RXCTRL_DATASIZE_Pos</a>)</td></tr>
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<tr class="separator:a199eb996d380ff56aa36637e6a4c2f2d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a91568f14765d670ccf07c66512cd94ee"><td class="memItemLeft" align="right" valign="top"><a id="a91568f14765d670ccf07c66512cd94ee"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_DATASIZE_18</b>   (<a class="el" href="component_2i2s_8h.html#a9aa9c80f04de2464087be188b988481d">I2S_RXCTRL_DATASIZE_18_Val</a> << <a class="el" href="component_2i2s_8h.html#ab02b820857f008f6dce1a3b2aca8abdf">I2S_RXCTRL_DATASIZE_Pos</a>)</td></tr>
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<tr class="separator:a91568f14765d670ccf07c66512cd94ee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a183818c2b8b04ffbe6d228194db7b318"><td class="memItemLeft" align="right" valign="top"><a id="a183818c2b8b04ffbe6d228194db7b318"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_DATASIZE_16</b>   (<a class="el" href="component_2i2s_8h.html#a47e69a45e045535406ad55e11ad5d71c">I2S_RXCTRL_DATASIZE_16_Val</a> << <a class="el" href="component_2i2s_8h.html#ab02b820857f008f6dce1a3b2aca8abdf">I2S_RXCTRL_DATASIZE_Pos</a>)</td></tr>
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<tr class="separator:a183818c2b8b04ffbe6d228194db7b318"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a24abeb3a3deaee08853827465420451e"><td class="memItemLeft" align="right" valign="top"><a id="a24abeb3a3deaee08853827465420451e"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_DATASIZE_16C</b>   (<a class="el" href="component_2i2s_8h.html#a4e55a2002f9093bb01be018bbd7459ac">I2S_RXCTRL_DATASIZE_16C_Val</a> << <a class="el" href="component_2i2s_8h.html#ab02b820857f008f6dce1a3b2aca8abdf">I2S_RXCTRL_DATASIZE_Pos</a>)</td></tr>
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<tr class="separator:a24abeb3a3deaee08853827465420451e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae63cfcdfcac600d2e45aa8ac8a3c76dd"><td class="memItemLeft" align="right" valign="top"><a id="ae63cfcdfcac600d2e45aa8ac8a3c76dd"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_DATASIZE_8</b>   (<a class="el" href="component_2i2s_8h.html#a6ab4f649f427ba70829ead258480e3f2">I2S_RXCTRL_DATASIZE_8_Val</a> << <a class="el" href="component_2i2s_8h.html#ab02b820857f008f6dce1a3b2aca8abdf">I2S_RXCTRL_DATASIZE_Pos</a>)</td></tr>
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<tr class="separator:ae63cfcdfcac600d2e45aa8ac8a3c76dd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2d7c39ecbe56157fe6cb691c71c65e91"><td class="memItemLeft" align="right" valign="top"><a id="a2d7c39ecbe56157fe6cb691c71c65e91"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_DATASIZE_8C</b>   (<a class="el" href="component_2i2s_8h.html#a64ebb00aef17da0a3250559554e51fd2">I2S_RXCTRL_DATASIZE_8C_Val</a> << <a class="el" href="component_2i2s_8h.html#ab02b820857f008f6dce1a3b2aca8abdf">I2S_RXCTRL_DATASIZE_Pos</a>)</td></tr>
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<tr class="separator:a2d7c39ecbe56157fe6cb691c71c65e91"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a40c17f1a66744acba8807f3655deca3f"><td class="memItemLeft" align="right" valign="top"><a id="a40c17f1a66744acba8807f3655deca3f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a40c17f1a66744acba8807f3655deca3f">I2S_RXCTRL_WORDADJ_Pos</a>   12</td></tr>
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<tr class="memdesc:a40c17f1a66744acba8807f3655deca3f"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Data Word Formatting Adjust <br /></td></tr>
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<tr class="separator:a40c17f1a66744acba8807f3655deca3f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3a57193915c4a8356786bb31eb77d3e8"><td class="memItemLeft" align="right" valign="top"><a id="a3a57193915c4a8356786bb31eb77d3e8"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_WORDADJ</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#a40c17f1a66744acba8807f3655deca3f">I2S_RXCTRL_WORDADJ_Pos</a>)</td></tr>
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<tr class="separator:a3a57193915c4a8356786bb31eb77d3e8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0ef32bad8115a443570b008e0a89a77a"><td class="memItemLeft" align="right" valign="top"><a id="a0ef32bad8115a443570b008e0a89a77a"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a0ef32bad8115a443570b008e0a89a77a">I2S_RXCTRL_WORDADJ_RIGHT_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:a0ef32bad8115a443570b008e0a89a77a"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Data is right adjusted in word <br /></td></tr>
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<tr class="separator:a0ef32bad8115a443570b008e0a89a77a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a59746517d26d97df6ad8e3b6317bd2ad"><td class="memItemLeft" align="right" valign="top"><a id="a59746517d26d97df6ad8e3b6317bd2ad"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a59746517d26d97df6ad8e3b6317bd2ad">I2S_RXCTRL_WORDADJ_LEFT_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:a59746517d26d97df6ad8e3b6317bd2ad"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Data is left adjusted in word <br /></td></tr>
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<tr class="memitem:ad9a39780bd5824d6dc066607f85f4a53"><td class="memItemLeft" align="right" valign="top"><a id="ad9a39780bd5824d6dc066607f85f4a53"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_WORDADJ_RIGHT</b>   (<a class="el" href="component_2i2s_8h.html#a0ef32bad8115a443570b008e0a89a77a">I2S_RXCTRL_WORDADJ_RIGHT_Val</a> << <a class="el" href="component_2i2s_8h.html#a40c17f1a66744acba8807f3655deca3f">I2S_RXCTRL_WORDADJ_Pos</a>)</td></tr>
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<tr class="separator:ad9a39780bd5824d6dc066607f85f4a53"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aad3c194bcc746e305b513187f2c31a4c"><td class="memItemLeft" align="right" valign="top"><a id="aad3c194bcc746e305b513187f2c31a4c"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_WORDADJ_LEFT</b>   (<a class="el" href="component_2i2s_8h.html#a59746517d26d97df6ad8e3b6317bd2ad">I2S_RXCTRL_WORDADJ_LEFT_Val</a> << <a class="el" href="component_2i2s_8h.html#a40c17f1a66744acba8807f3655deca3f">I2S_RXCTRL_WORDADJ_Pos</a>)</td></tr>
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<tr class="separator:aad3c194bcc746e305b513187f2c31a4c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a57b4866cd968ac5f4c10d28a70b2fef6"><td class="memItemLeft" align="right" valign="top"><a id="a57b4866cd968ac5f4c10d28a70b2fef6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a57b4866cd968ac5f4c10d28a70b2fef6">I2S_RXCTRL_EXTEND_Pos</a>   13</td></tr>
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<tr class="memdesc:a57b4866cd968ac5f4c10d28a70b2fef6"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Data Formatting Bit Extension <br /></td></tr>
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<tr class="separator:a57b4866cd968ac5f4c10d28a70b2fef6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa40e4584649336903cbb8f529802616f"><td class="memItemLeft" align="right" valign="top"><a id="aa40e4584649336903cbb8f529802616f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_EXTEND_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2i2s_8h.html#a57b4866cd968ac5f4c10d28a70b2fef6">I2S_RXCTRL_EXTEND_Pos</a>)</td></tr>
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<tr class="separator:aa40e4584649336903cbb8f529802616f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:adc5bb656b9dedc3c65cc9b3c89eb81dd"><td class="memItemLeft" align="right" valign="top"><a id="adc5bb656b9dedc3c65cc9b3c89eb81dd"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_EXTEND</b>(value)   (I2S_RXCTRL_EXTEND_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#a57b4866cd968ac5f4c10d28a70b2fef6">I2S_RXCTRL_EXTEND_Pos</a>))</td></tr>
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<tr class="separator:adc5bb656b9dedc3c65cc9b3c89eb81dd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8d87ac641c726722fa04c7dbe206968d"><td class="memItemLeft" align="right" valign="top"><a id="a8d87ac641c726722fa04c7dbe206968d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a8d87ac641c726722fa04c7dbe206968d">I2S_RXCTRL_EXTEND_ZERO_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:a8d87ac641c726722fa04c7dbe206968d"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Extend with zeroes <br /></td></tr>
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<tr class="separator:a8d87ac641c726722fa04c7dbe206968d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abfafaba50aaa222fd4e4e0e917bf1f4e"><td class="memItemLeft" align="right" valign="top"><a id="abfafaba50aaa222fd4e4e0e917bf1f4e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#abfafaba50aaa222fd4e4e0e917bf1f4e">I2S_RXCTRL_EXTEND_ONE_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:abfafaba50aaa222fd4e4e0e917bf1f4e"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Extend with ones <br /></td></tr>
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<tr class="separator:abfafaba50aaa222fd4e4e0e917bf1f4e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9609b632d91bb077c22d232fa15e7e9e"><td class="memItemLeft" align="right" valign="top"><a id="a9609b632d91bb077c22d232fa15e7e9e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a9609b632d91bb077c22d232fa15e7e9e">I2S_RXCTRL_EXTEND_MSBIT_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
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<tr class="memdesc:a9609b632d91bb077c22d232fa15e7e9e"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Extend with Most Significant Bit <br /></td></tr>
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<tr class="separator:a9609b632d91bb077c22d232fa15e7e9e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acca345974d2174e3c4545622ea6d76da"><td class="memItemLeft" align="right" valign="top"><a id="acca345974d2174e3c4545622ea6d76da"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#acca345974d2174e3c4545622ea6d76da">I2S_RXCTRL_EXTEND_LSBIT_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
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<tr class="memdesc:acca345974d2174e3c4545622ea6d76da"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Extend with Least Significant Bit <br /></td></tr>
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<tr class="separator:acca345974d2174e3c4545622ea6d76da"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac616194160a54a085b4db0236a4061e1"><td class="memItemLeft" align="right" valign="top"><a id="ac616194160a54a085b4db0236a4061e1"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_EXTEND_ZERO</b>   (<a class="el" href="component_2i2s_8h.html#a8d87ac641c726722fa04c7dbe206968d">I2S_RXCTRL_EXTEND_ZERO_Val</a> << <a class="el" href="component_2i2s_8h.html#a57b4866cd968ac5f4c10d28a70b2fef6">I2S_RXCTRL_EXTEND_Pos</a>)</td></tr>
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<tr class="separator:ac616194160a54a085b4db0236a4061e1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3d9504fb0eec4b7b585d80d809639a30"><td class="memItemLeft" align="right" valign="top"><a id="a3d9504fb0eec4b7b585d80d809639a30"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_EXTEND_ONE</b>   (<a class="el" href="component_2i2s_8h.html#abfafaba50aaa222fd4e4e0e917bf1f4e">I2S_RXCTRL_EXTEND_ONE_Val</a> << <a class="el" href="component_2i2s_8h.html#a57b4866cd968ac5f4c10d28a70b2fef6">I2S_RXCTRL_EXTEND_Pos</a>)</td></tr>
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<tr class="separator:a3d9504fb0eec4b7b585d80d809639a30"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac38f6219faf7437353a9fad82346f2cf"><td class="memItemLeft" align="right" valign="top"><a id="ac38f6219faf7437353a9fad82346f2cf"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_EXTEND_MSBIT</b>   (<a class="el" href="component_2i2s_8h.html#a9609b632d91bb077c22d232fa15e7e9e">I2S_RXCTRL_EXTEND_MSBIT_Val</a> << <a class="el" href="component_2i2s_8h.html#a57b4866cd968ac5f4c10d28a70b2fef6">I2S_RXCTRL_EXTEND_Pos</a>)</td></tr>
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<tr class="separator:ac38f6219faf7437353a9fad82346f2cf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aed7e9a36931fdb601fd5a58cc9ee372e"><td class="memItemLeft" align="right" valign="top"><a id="aed7e9a36931fdb601fd5a58cc9ee372e"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_EXTEND_LSBIT</b>   (<a class="el" href="component_2i2s_8h.html#acca345974d2174e3c4545622ea6d76da">I2S_RXCTRL_EXTEND_LSBIT_Val</a> << <a class="el" href="component_2i2s_8h.html#a57b4866cd968ac5f4c10d28a70b2fef6">I2S_RXCTRL_EXTEND_Pos</a>)</td></tr>
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<tr class="separator:aed7e9a36931fdb601fd5a58cc9ee372e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a483344f9eb7d762425531749ca656065"><td class="memItemLeft" align="right" valign="top"><a id="a483344f9eb7d762425531749ca656065"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a483344f9eb7d762425531749ca656065">I2S_RXCTRL_BITREV_Pos</a>   15</td></tr>
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<tr class="memdesc:a483344f9eb7d762425531749ca656065"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Data Formatting Bit Reverse <br /></td></tr>
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<tr class="separator:a483344f9eb7d762425531749ca656065"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae299f8463256c6d9439cbf986da9c66c"><td class="memItemLeft" align="right" valign="top"><a id="ae299f8463256c6d9439cbf986da9c66c"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_BITREV</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#a483344f9eb7d762425531749ca656065">I2S_RXCTRL_BITREV_Pos</a>)</td></tr>
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<tr class="separator:ae299f8463256c6d9439cbf986da9c66c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a328d2ab97927812391d0c5d42fdf47bd"><td class="memItemLeft" align="right" valign="top"><a id="a328d2ab97927812391d0c5d42fdf47bd"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a328d2ab97927812391d0c5d42fdf47bd">I2S_RXCTRL_BITREV_MSBIT_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:a328d2ab97927812391d0c5d42fdf47bd"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Transfer Data Most Significant Bit (MSB) first (default for I2S protocol) <br /></td></tr>
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<tr class="separator:a328d2ab97927812391d0c5d42fdf47bd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4189215c57c5f54690a43a016562e256"><td class="memItemLeft" align="right" valign="top"><a id="a4189215c57c5f54690a43a016562e256"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a4189215c57c5f54690a43a016562e256">I2S_RXCTRL_BITREV_LSBIT_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:a4189215c57c5f54690a43a016562e256"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Transfer Data Least Significant Bit (LSB) first <br /></td></tr>
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<tr class="separator:a4189215c57c5f54690a43a016562e256"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a85c4e61ca2132121636c49d207589c2f"><td class="memItemLeft" align="right" valign="top"><a id="a85c4e61ca2132121636c49d207589c2f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_BITREV_MSBIT</b>   (<a class="el" href="component_2i2s_8h.html#a328d2ab97927812391d0c5d42fdf47bd">I2S_RXCTRL_BITREV_MSBIT_Val</a> << <a class="el" href="component_2i2s_8h.html#a483344f9eb7d762425531749ca656065">I2S_RXCTRL_BITREV_Pos</a>)</td></tr>
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<tr class="separator:a85c4e61ca2132121636c49d207589c2f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9a010c24bd42d663889ad93daca3491d"><td class="memItemLeft" align="right" valign="top"><a id="a9a010c24bd42d663889ad93daca3491d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_BITREV_LSBIT</b>   (<a class="el" href="component_2i2s_8h.html#a4189215c57c5f54690a43a016562e256">I2S_RXCTRL_BITREV_LSBIT_Val</a> << <a class="el" href="component_2i2s_8h.html#a483344f9eb7d762425531749ca656065">I2S_RXCTRL_BITREV_Pos</a>)</td></tr>
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<tr class="separator:a9a010c24bd42d663889ad93daca3491d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1bea8cedd534e39f72a7856fcd4df913"><td class="memItemLeft" align="right" valign="top"><a id="a1bea8cedd534e39f72a7856fcd4df913"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a1bea8cedd534e39f72a7856fcd4df913">I2S_RXCTRL_SLOTDIS0_Pos</a>   16</td></tr>
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<tr class="memdesc:a1bea8cedd534e39f72a7856fcd4df913"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Slot 0 Disabled for this Serializer <br /></td></tr>
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<tr class="separator:a1bea8cedd534e39f72a7856fcd4df913"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab0ccd7e1b6502716576f4da487fb88bf"><td class="memItemLeft" align="right" valign="top"><a id="ab0ccd7e1b6502716576f4da487fb88bf"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_SLOTDIS0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a1bea8cedd534e39f72a7856fcd4df913">I2S_RXCTRL_SLOTDIS0_Pos</a>)</td></tr>
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<tr class="separator:ab0ccd7e1b6502716576f4da487fb88bf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a33eb8ff4391f73c9c0a29c3999d8bc0c"><td class="memItemLeft" align="right" valign="top"><a id="a33eb8ff4391f73c9c0a29c3999d8bc0c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a33eb8ff4391f73c9c0a29c3999d8bc0c">I2S_RXCTRL_SLOTDIS1_Pos</a>   17</td></tr>
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<tr class="memdesc:a33eb8ff4391f73c9c0a29c3999d8bc0c"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Slot 1 Disabled for this Serializer <br /></td></tr>
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<tr class="separator:a33eb8ff4391f73c9c0a29c3999d8bc0c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6f2fa2d2051f3ee6abc1af2faa45fb90"><td class="memItemLeft" align="right" valign="top"><a id="a6f2fa2d2051f3ee6abc1af2faa45fb90"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_SLOTDIS1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a33eb8ff4391f73c9c0a29c3999d8bc0c">I2S_RXCTRL_SLOTDIS1_Pos</a>)</td></tr>
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<tr class="separator:a6f2fa2d2051f3ee6abc1af2faa45fb90"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a96d36b7da56a1dc773afbe44b17ee4d5"><td class="memItemLeft" align="right" valign="top"><a id="a96d36b7da56a1dc773afbe44b17ee4d5"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a96d36b7da56a1dc773afbe44b17ee4d5">I2S_RXCTRL_SLOTDIS2_Pos</a>   18</td></tr>
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<tr class="memdesc:a96d36b7da56a1dc773afbe44b17ee4d5"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Slot 2 Disabled for this Serializer <br /></td></tr>
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<tr class="separator:a96d36b7da56a1dc773afbe44b17ee4d5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac5c59222b09344194c5ed5ac3dc81337"><td class="memItemLeft" align="right" valign="top"><a id="ac5c59222b09344194c5ed5ac3dc81337"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_SLOTDIS2</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a96d36b7da56a1dc773afbe44b17ee4d5">I2S_RXCTRL_SLOTDIS2_Pos</a>)</td></tr>
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<tr class="separator:ac5c59222b09344194c5ed5ac3dc81337"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4bf54a466964d32665c1e561a62b682c"><td class="memItemLeft" align="right" valign="top"><a id="a4bf54a466964d32665c1e561a62b682c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a4bf54a466964d32665c1e561a62b682c">I2S_RXCTRL_SLOTDIS3_Pos</a>   19</td></tr>
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<tr class="memdesc:a4bf54a466964d32665c1e561a62b682c"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Slot 3 Disabled for this Serializer <br /></td></tr>
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<tr class="separator:a4bf54a466964d32665c1e561a62b682c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aca1a86ae7c6a507496a20f6406b4909e"><td class="memItemLeft" align="right" valign="top"><a id="aca1a86ae7c6a507496a20f6406b4909e"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_SLOTDIS3</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a4bf54a466964d32665c1e561a62b682c">I2S_RXCTRL_SLOTDIS3_Pos</a>)</td></tr>
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<tr class="separator:aca1a86ae7c6a507496a20f6406b4909e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3b7cfb3be624e94a4a9fbbeb4cf6ae6c"><td class="memItemLeft" align="right" valign="top"><a id="a3b7cfb3be624e94a4a9fbbeb4cf6ae6c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a3b7cfb3be624e94a4a9fbbeb4cf6ae6c">I2S_RXCTRL_SLOTDIS4_Pos</a>   20</td></tr>
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<tr class="memdesc:a3b7cfb3be624e94a4a9fbbeb4cf6ae6c"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Slot 4 Disabled for this Serializer <br /></td></tr>
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<tr class="separator:a3b7cfb3be624e94a4a9fbbeb4cf6ae6c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a128355fb089b2fbb12f3cf70c3f80877"><td class="memItemLeft" align="right" valign="top"><a id="a128355fb089b2fbb12f3cf70c3f80877"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_SLOTDIS4</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a3b7cfb3be624e94a4a9fbbeb4cf6ae6c">I2S_RXCTRL_SLOTDIS4_Pos</a>)</td></tr>
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<tr class="separator:a128355fb089b2fbb12f3cf70c3f80877"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0cc263101bbc164ee3073843c512b799"><td class="memItemLeft" align="right" valign="top"><a id="a0cc263101bbc164ee3073843c512b799"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a0cc263101bbc164ee3073843c512b799">I2S_RXCTRL_SLOTDIS5_Pos</a>   21</td></tr>
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<tr class="memdesc:a0cc263101bbc164ee3073843c512b799"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Slot 5 Disabled for this Serializer <br /></td></tr>
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<tr class="separator:a0cc263101bbc164ee3073843c512b799"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa54ef803175129cd4938210d459ef58a"><td class="memItemLeft" align="right" valign="top"><a id="aa54ef803175129cd4938210d459ef58a"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_SLOTDIS5</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#a0cc263101bbc164ee3073843c512b799">I2S_RXCTRL_SLOTDIS5_Pos</a>)</td></tr>
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<tr class="separator:aa54ef803175129cd4938210d459ef58a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad8c4ff976e4aef052e9c504ba2fe9eb6"><td class="memItemLeft" align="right" valign="top"><a id="ad8c4ff976e4aef052e9c504ba2fe9eb6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#ad8c4ff976e4aef052e9c504ba2fe9eb6">I2S_RXCTRL_SLOTDIS6_Pos</a>   22</td></tr>
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<tr class="memdesc:ad8c4ff976e4aef052e9c504ba2fe9eb6"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Slot 6 Disabled for this Serializer <br /></td></tr>
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<tr class="separator:ad8c4ff976e4aef052e9c504ba2fe9eb6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a14a6665e7e6c5f035970bfa132729871"><td class="memItemLeft" align="right" valign="top"><a id="a14a6665e7e6c5f035970bfa132729871"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_SLOTDIS6</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#ad8c4ff976e4aef052e9c504ba2fe9eb6">I2S_RXCTRL_SLOTDIS6_Pos</a>)</td></tr>
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<tr class="separator:a14a6665e7e6c5f035970bfa132729871"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae2ed8f19af21a758099dc050e97099b6"><td class="memItemLeft" align="right" valign="top"><a id="ae2ed8f19af21a758099dc050e97099b6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#ae2ed8f19af21a758099dc050e97099b6">I2S_RXCTRL_SLOTDIS7_Pos</a>   23</td></tr>
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<tr class="memdesc:ae2ed8f19af21a758099dc050e97099b6"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Slot 7 Disabled for this Serializer <br /></td></tr>
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<tr class="separator:ae2ed8f19af21a758099dc050e97099b6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8afd05d79b254b1ee4c25f2cbd28f00d"><td class="memItemLeft" align="right" valign="top"><a id="a8afd05d79b254b1ee4c25f2cbd28f00d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_SLOTDIS7</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2i2s_8h.html#ae2ed8f19af21a758099dc050e97099b6">I2S_RXCTRL_SLOTDIS7_Pos</a>)</td></tr>
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<tr class="separator:a8afd05d79b254b1ee4c25f2cbd28f00d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8ea445e37a78507cae01076d7583ec8b"><td class="memItemLeft" align="right" valign="top"><a id="a8ea445e37a78507cae01076d7583ec8b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a8ea445e37a78507cae01076d7583ec8b">I2S_RXCTRL_SLOTDIS_Pos</a>   16</td></tr>
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<tr class="memdesc:a8ea445e37a78507cae01076d7583ec8b"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Slot x Disabled for this Serializer <br /></td></tr>
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<tr class="separator:a8ea445e37a78507cae01076d7583ec8b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a892a79b68c0ff88e4dcd14d953572af2"><td class="memItemLeft" align="right" valign="top"><a id="a892a79b68c0ff88e4dcd14d953572af2"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_SLOTDIS_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF) << <a class="el" href="component_2i2s_8h.html#a8ea445e37a78507cae01076d7583ec8b">I2S_RXCTRL_SLOTDIS_Pos</a>)</td></tr>
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<tr class="separator:a892a79b68c0ff88e4dcd14d953572af2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9cff622957c57bfa8864acb6f13887f7"><td class="memItemLeft" align="right" valign="top"><a id="a9cff622957c57bfa8864acb6f13887f7"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_SLOTDIS</b>(value)   (I2S_RXCTRL_SLOTDIS_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#a8ea445e37a78507cae01076d7583ec8b">I2S_RXCTRL_SLOTDIS_Pos</a>))</td></tr>
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<tr class="separator:a9cff622957c57bfa8864acb6f13887f7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac84304637c46e1c504eab48099e2a5d5"><td class="memItemLeft" align="right" valign="top"><a id="ac84304637c46e1c504eab48099e2a5d5"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#ac84304637c46e1c504eab48099e2a5d5">I2S_RXCTRL_MONO_Pos</a>   24</td></tr>
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<tr class="memdesc:ac84304637c46e1c504eab48099e2a5d5"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Mono Mode <br /></td></tr>
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<tr class="separator:ac84304637c46e1c504eab48099e2a5d5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a51f12f5f0490c73219ff33c4feee770d"><td class="memItemLeft" align="right" valign="top"><a id="a51f12f5f0490c73219ff33c4feee770d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_MONO</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#ac84304637c46e1c504eab48099e2a5d5">I2S_RXCTRL_MONO_Pos</a>)</td></tr>
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<tr class="separator:a51f12f5f0490c73219ff33c4feee770d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a57b383a9544d35949f9c541d14f9f0cd"><td class="memItemLeft" align="right" valign="top"><a id="a57b383a9544d35949f9c541d14f9f0cd"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a57b383a9544d35949f9c541d14f9f0cd">I2S_RXCTRL_MONO_STEREO_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:a57b383a9544d35949f9c541d14f9f0cd"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Normal mode <br /></td></tr>
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<tr class="separator:a57b383a9544d35949f9c541d14f9f0cd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:adeb03f3d85e233df41c7bf9dc1815efd"><td class="memItemLeft" align="right" valign="top"><a id="adeb03f3d85e233df41c7bf9dc1815efd"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#adeb03f3d85e233df41c7bf9dc1815efd">I2S_RXCTRL_MONO_MONO_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:adeb03f3d85e233df41c7bf9dc1815efd"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Left channel data is duplicated to right channel <br /></td></tr>
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<tr class="separator:adeb03f3d85e233df41c7bf9dc1815efd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad45544077cc3d0080b3b00be6ea09040"><td class="memItemLeft" align="right" valign="top"><a id="ad45544077cc3d0080b3b00be6ea09040"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_MONO_STEREO</b>   (<a class="el" href="component_2i2s_8h.html#a57b383a9544d35949f9c541d14f9f0cd">I2S_RXCTRL_MONO_STEREO_Val</a> << <a class="el" href="component_2i2s_8h.html#ac84304637c46e1c504eab48099e2a5d5">I2S_RXCTRL_MONO_Pos</a>)</td></tr>
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<tr class="separator:ad45544077cc3d0080b3b00be6ea09040"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a81eb98a894e8993ee93da10781b33d9f"><td class="memItemLeft" align="right" valign="top"><a id="a81eb98a894e8993ee93da10781b33d9f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_MONO_MONO</b>   (<a class="el" href="component_2i2s_8h.html#adeb03f3d85e233df41c7bf9dc1815efd">I2S_RXCTRL_MONO_MONO_Val</a> << <a class="el" href="component_2i2s_8h.html#ac84304637c46e1c504eab48099e2a5d5">I2S_RXCTRL_MONO_Pos</a>)</td></tr>
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<tr class="separator:a81eb98a894e8993ee93da10781b33d9f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5a300a1a8820ef8c25efb483c5e55bd6"><td class="memItemLeft" align="right" valign="top"><a id="a5a300a1a8820ef8c25efb483c5e55bd6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a5a300a1a8820ef8c25efb483c5e55bd6">I2S_RXCTRL_DMA_Pos</a>   25</td></tr>
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<tr class="memdesc:a5a300a1a8820ef8c25efb483c5e55bd6"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Single or Multiple DMA Channels <br /></td></tr>
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<tr class="separator:a5a300a1a8820ef8c25efb483c5e55bd6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5836101cdc63607a9eb44ee6157ab40b"><td class="memItemLeft" align="right" valign="top"><a id="a5836101cdc63607a9eb44ee6157ab40b"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_DMA</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#a5a300a1a8820ef8c25efb483c5e55bd6">I2S_RXCTRL_DMA_Pos</a>)</td></tr>
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<tr class="separator:a5836101cdc63607a9eb44ee6157ab40b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a120be82e1fceec25d7a921abd34f61bc"><td class="memItemLeft" align="right" valign="top"><a id="a120be82e1fceec25d7a921abd34f61bc"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a120be82e1fceec25d7a921abd34f61bc">I2S_RXCTRL_DMA_SINGLE_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:a120be82e1fceec25d7a921abd34f61bc"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Single DMA channel <br /></td></tr>
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<tr class="separator:a120be82e1fceec25d7a921abd34f61bc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5822f4572a509a97827ed13a7033201b"><td class="memItemLeft" align="right" valign="top"><a id="a5822f4572a509a97827ed13a7033201b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a5822f4572a509a97827ed13a7033201b">I2S_RXCTRL_DMA_MULTIPLE_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:a5822f4572a509a97827ed13a7033201b"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) One DMA channel per data channel <br /></td></tr>
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<tr class="separator:a5822f4572a509a97827ed13a7033201b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac444c3c6f18919451e87cc5717cee2b4"><td class="memItemLeft" align="right" valign="top"><a id="ac444c3c6f18919451e87cc5717cee2b4"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_DMA_SINGLE</b>   (<a class="el" href="component_2i2s_8h.html#a120be82e1fceec25d7a921abd34f61bc">I2S_RXCTRL_DMA_SINGLE_Val</a> << <a class="el" href="component_2i2s_8h.html#a5a300a1a8820ef8c25efb483c5e55bd6">I2S_RXCTRL_DMA_Pos</a>)</td></tr>
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<tr class="separator:ac444c3c6f18919451e87cc5717cee2b4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aab3ae197c8a757d7bb16f036e2a1d795"><td class="memItemLeft" align="right" valign="top"><a id="aab3ae197c8a757d7bb16f036e2a1d795"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_DMA_MULTIPLE</b>   (<a class="el" href="component_2i2s_8h.html#a5822f4572a509a97827ed13a7033201b">I2S_RXCTRL_DMA_MULTIPLE_Val</a> << <a class="el" href="component_2i2s_8h.html#a5a300a1a8820ef8c25efb483c5e55bd6">I2S_RXCTRL_DMA_Pos</a>)</td></tr>
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<tr class="separator:aab3ae197c8a757d7bb16f036e2a1d795"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7efe036f26ad1909176af6ebc151a430"><td class="memItemLeft" align="right" valign="top"><a id="a7efe036f26ad1909176af6ebc151a430"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a7efe036f26ad1909176af6ebc151a430">I2S_RXCTRL_RXLOOP_Pos</a>   26</td></tr>
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<tr class="memdesc:a7efe036f26ad1909176af6ebc151a430"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) Loop-back Test Mode <br /></td></tr>
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<tr class="separator:a7efe036f26ad1909176af6ebc151a430"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac050d7aa37421b7f986f9c7f6320c1a6"><td class="memItemLeft" align="right" valign="top"><a id="ac050d7aa37421b7f986f9c7f6320c1a6"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXCTRL_RXLOOP</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2i2s_8h.html#a7efe036f26ad1909176af6ebc151a430">I2S_RXCTRL_RXLOOP_Pos</a>)</td></tr>
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<tr class="separator:ac050d7aa37421b7f986f9c7f6320c1a6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6d8503b0dc93eb0901b6dc1618ffc716"><td class="memItemLeft" align="right" valign="top"><a id="a6d8503b0dc93eb0901b6dc1618ffc716"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a6d8503b0dc93eb0901b6dc1618ffc716">I2S_RXCTRL_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x07FFF7A3)</td></tr>
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<tr class="memdesc:a6d8503b0dc93eb0901b6dc1618ffc716"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXCTRL) MASK Register <br /></td></tr>
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<tr class="separator:a6d8503b0dc93eb0901b6dc1618ffc716"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ada12d7efed336775d229dfe14c65a307"><td class="memItemLeft" align="right" valign="top"><a id="ada12d7efed336775d229dfe14c65a307"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#ada12d7efed336775d229dfe14c65a307">I2S_TXDATA_OFFSET</a>   0x30</td></tr>
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<tr class="memdesc:ada12d7efed336775d229dfe14c65a307"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXDATA offset) Tx Data <br /></td></tr>
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<tr class="separator:ada12d7efed336775d229dfe14c65a307"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ada26aa0aeee2b7e61667114cd23d9dff"><td class="memItemLeft" align="right" valign="top"><a id="ada26aa0aeee2b7e61667114cd23d9dff"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#ada26aa0aeee2b7e61667114cd23d9dff">I2S_TXDATA_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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<tr class="memdesc:ada26aa0aeee2b7e61667114cd23d9dff"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXDATA reset_value) Tx Data <br /></td></tr>
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<tr class="separator:ada26aa0aeee2b7e61667114cd23d9dff"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afbc4a3c6619ccc1fc90e94e9ef78bb55"><td class="memItemLeft" align="right" valign="top"><a id="afbc4a3c6619ccc1fc90e94e9ef78bb55"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#afbc4a3c6619ccc1fc90e94e9ef78bb55">I2S_TXDATA_DATA_Pos</a>   0</td></tr>
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<tr class="memdesc:afbc4a3c6619ccc1fc90e94e9ef78bb55"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXDATA) Sample Data <br /></td></tr>
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<tr class="separator:afbc4a3c6619ccc1fc90e94e9ef78bb55"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a33e2e4eb5f5902c957e08e6cda14ffc7"><td class="memItemLeft" align="right" valign="top"><a id="a33e2e4eb5f5902c957e08e6cda14ffc7"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXDATA_DATA_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF) << <a class="el" href="component_2i2s_8h.html#afbc4a3c6619ccc1fc90e94e9ef78bb55">I2S_TXDATA_DATA_Pos</a>)</td></tr>
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<tr class="separator:a33e2e4eb5f5902c957e08e6cda14ffc7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a56fe707dc23eb1f0d0cccf9822719419"><td class="memItemLeft" align="right" valign="top"><a id="a56fe707dc23eb1f0d0cccf9822719419"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_TXDATA_DATA</b>(value)   (I2S_TXDATA_DATA_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#afbc4a3c6619ccc1fc90e94e9ef78bb55">I2S_TXDATA_DATA_Pos</a>))</td></tr>
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<tr class="separator:a56fe707dc23eb1f0d0cccf9822719419"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6f307db1494c5c7e1d21bb43ad8c756c"><td class="memItemLeft" align="right" valign="top"><a id="a6f307db1494c5c7e1d21bb43ad8c756c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a6f307db1494c5c7e1d21bb43ad8c756c">I2S_TXDATA_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
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<tr class="memdesc:a6f307db1494c5c7e1d21bb43ad8c756c"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_TXDATA) MASK Register <br /></td></tr>
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<tr class="separator:a6f307db1494c5c7e1d21bb43ad8c756c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a86a01925f507e5d8cfaf8d2dbd95aca5"><td class="memItemLeft" align="right" valign="top"><a id="a86a01925f507e5d8cfaf8d2dbd95aca5"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a86a01925f507e5d8cfaf8d2dbd95aca5">I2S_RXDATA_OFFSET</a>   0x34</td></tr>
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<tr class="memdesc:a86a01925f507e5d8cfaf8d2dbd95aca5"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXDATA offset) Rx Data <br /></td></tr>
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<tr class="separator:a86a01925f507e5d8cfaf8d2dbd95aca5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abed90c12d2497812fff0fba07c6d2823"><td class="memItemLeft" align="right" valign="top"><a id="abed90c12d2497812fff0fba07c6d2823"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#abed90c12d2497812fff0fba07c6d2823">I2S_RXDATA_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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<tr class="memdesc:abed90c12d2497812fff0fba07c6d2823"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXDATA reset_value) Rx Data <br /></td></tr>
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<tr class="separator:abed90c12d2497812fff0fba07c6d2823"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a24e58dacf0ef2e194c53418b1d3949cc"><td class="memItemLeft" align="right" valign="top"><a id="a24e58dacf0ef2e194c53418b1d3949cc"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a24e58dacf0ef2e194c53418b1d3949cc">I2S_RXDATA_DATA_Pos</a>   0</td></tr>
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<tr class="memdesc:a24e58dacf0ef2e194c53418b1d3949cc"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXDATA) Sample Data <br /></td></tr>
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<tr class="separator:a24e58dacf0ef2e194c53418b1d3949cc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0ffe6190de01ba26ce97a63f50c30b02"><td class="memItemLeft" align="right" valign="top"><a id="a0ffe6190de01ba26ce97a63f50c30b02"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXDATA_DATA_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF) << <a class="el" href="component_2i2s_8h.html#a24e58dacf0ef2e194c53418b1d3949cc">I2S_RXDATA_DATA_Pos</a>)</td></tr>
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<tr class="separator:a0ffe6190de01ba26ce97a63f50c30b02"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9af12b831159bd9188df8e0495ecab57"><td class="memItemLeft" align="right" valign="top"><a id="a9af12b831159bd9188df8e0495ecab57"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2S_RXDATA_DATA</b>(value)   (I2S_RXDATA_DATA_Msk & ((value) << <a class="el" href="component_2i2s_8h.html#a24e58dacf0ef2e194c53418b1d3949cc">I2S_RXDATA_DATA_Pos</a>))</td></tr>
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<tr class="separator:a9af12b831159bd9188df8e0495ecab57"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0cbe951f14e6321ea6adfe5cbf1c3a18"><td class="memItemLeft" align="right" valign="top"><a id="a0cbe951f14e6321ea6adfe5cbf1c3a18"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2i2s_8h.html#a0cbe951f14e6321ea6adfe5cbf1c3a18">I2S_RXDATA_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFFFFFF)</td></tr>
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<tr class="memdesc:a0cbe951f14e6321ea6adfe5cbf1c3a18"><td class="mdescLeft"> </td><td class="mdescRight">(I2S_RXDATA) MASK Register <br /></td></tr>
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<tr class="separator:a0cbe951f14e6321ea6adfe5cbf1c3a18"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<div class="textblock"><p>Component description for I2S. </p>
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<p>Copyright (c) 2019 Microchip Technology Inc.</p>
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<p>\asf_license_start </p>
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<p class="definition">Definition in file <a class="el" href="component_2i2s_8h_source.html">i2s.h</a>.</p>
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