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245 lines
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4 years ago
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<title>SAME54P20A Test Project: /storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/instance/tc0.h File Reference</title>
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<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_92b117bae75cf16a05ca7611db29e9c7.html">instance</a></li> </ul>
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<a href="#define-members">Macros</a> </div>
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<div class="title">tc0.h File Reference</div> </div>
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<p>Instance description for TC0.
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<a href="#details">More...</a></p>
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<p><a href="tc0_8h_source.html">Go to the source code of this file.</a></p>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:a501a29d491fdc64ccf54b854fc7a0416"><td class="memItemLeft" align="right" valign="top"><a id="a501a29d491fdc64ccf54b854fc7a0416"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#a501a29d491fdc64ccf54b854fc7a0416">REG_TC0_CTRLA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x40003800UL)</td></tr>
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<tr class="memdesc:a501a29d491fdc64ccf54b854fc7a0416"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) Control A <br /></td></tr>
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<tr class="separator:a501a29d491fdc64ccf54b854fc7a0416"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a52e563deca463927a67d758c8440ce94"><td class="memItemLeft" align="right" valign="top"><a id="a52e563deca463927a67d758c8440ce94"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#a52e563deca463927a67d758c8440ce94">REG_TC0_CTRLBCLR</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x40003804UL)</td></tr>
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<tr class="memdesc:a52e563deca463927a67d758c8440ce94"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) Control B Clear <br /></td></tr>
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<tr class="separator:a52e563deca463927a67d758c8440ce94"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae9a6ae4b9eeb3ab5740e74533133231f"><td class="memItemLeft" align="right" valign="top"><a id="ae9a6ae4b9eeb3ab5740e74533133231f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#ae9a6ae4b9eeb3ab5740e74533133231f">REG_TC0_CTRLBSET</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x40003805UL)</td></tr>
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<tr class="memdesc:ae9a6ae4b9eeb3ab5740e74533133231f"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) Control B Set <br /></td></tr>
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<tr class="separator:ae9a6ae4b9eeb3ab5740e74533133231f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3e07d56ef477f730a08ecf805c011489"><td class="memItemLeft" align="right" valign="top"><a id="a3e07d56ef477f730a08ecf805c011489"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#a3e07d56ef477f730a08ecf805c011489">REG_TC0_EVCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x40003806UL)</td></tr>
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<tr class="memdesc:a3e07d56ef477f730a08ecf805c011489"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) Event Control <br /></td></tr>
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<tr class="separator:a3e07d56ef477f730a08ecf805c011489"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a952f878bfb85b9ba26abff4a22a7522f"><td class="memItemLeft" align="right" valign="top"><a id="a952f878bfb85b9ba26abff4a22a7522f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#a952f878bfb85b9ba26abff4a22a7522f">REG_TC0_INTENCLR</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x40003808UL)</td></tr>
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<tr class="memdesc:a952f878bfb85b9ba26abff4a22a7522f"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) Interrupt Enable Clear <br /></td></tr>
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<tr class="separator:a952f878bfb85b9ba26abff4a22a7522f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aca5dd6c113c34f6c503cbe688e45a9c5"><td class="memItemLeft" align="right" valign="top"><a id="aca5dd6c113c34f6c503cbe688e45a9c5"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#aca5dd6c113c34f6c503cbe688e45a9c5">REG_TC0_INTENSET</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x40003809UL)</td></tr>
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<tr class="memdesc:aca5dd6c113c34f6c503cbe688e45a9c5"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) Interrupt Enable Set <br /></td></tr>
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<tr class="separator:aca5dd6c113c34f6c503cbe688e45a9c5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aed10d46f7d47ff44ee8d5942360e1a9a"><td class="memItemLeft" align="right" valign="top"><a id="aed10d46f7d47ff44ee8d5942360e1a9a"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#aed10d46f7d47ff44ee8d5942360e1a9a">REG_TC0_INTFLAG</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4000380AUL)</td></tr>
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<tr class="memdesc:aed10d46f7d47ff44ee8d5942360e1a9a"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="separator:aed10d46f7d47ff44ee8d5942360e1a9a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00fdb55a56a33638104ad31bf3f3f182"><td class="memItemLeft" align="right" valign="top"><a id="a00fdb55a56a33638104ad31bf3f3f182"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#a00fdb55a56a33638104ad31bf3f3f182">REG_TC0_STATUS</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4000380BUL)</td></tr>
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<tr class="memdesc:a00fdb55a56a33638104ad31bf3f3f182"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) Status <br /></td></tr>
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<tr class="separator:a00fdb55a56a33638104ad31bf3f3f182"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9e00c234c76aec073adb0388cad52c68"><td class="memItemLeft" align="right" valign="top"><a id="a9e00c234c76aec073adb0388cad52c68"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#a9e00c234c76aec073adb0388cad52c68">REG_TC0_WAVE</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4000380CUL)</td></tr>
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<tr class="memdesc:a9e00c234c76aec073adb0388cad52c68"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) Waveform Generation Control <br /></td></tr>
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<tr class="separator:a9e00c234c76aec073adb0388cad52c68"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5c9efa7d2ec38147d9b0ffdaa33f536b"><td class="memItemLeft" align="right" valign="top"><a id="a5c9efa7d2ec38147d9b0ffdaa33f536b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#a5c9efa7d2ec38147d9b0ffdaa33f536b">REG_TC0_DRVCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4000380DUL)</td></tr>
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<tr class="memdesc:a5c9efa7d2ec38147d9b0ffdaa33f536b"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) Control C <br /></td></tr>
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<tr class="separator:a5c9efa7d2ec38147d9b0ffdaa33f536b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6fea929a7941a2b9bbd863b55e76ca68"><td class="memItemLeft" align="right" valign="top"><a id="a6fea929a7941a2b9bbd863b55e76ca68"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#a6fea929a7941a2b9bbd863b55e76ca68">REG_TC0_DBGCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4000380FUL)</td></tr>
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<tr class="memdesc:a6fea929a7941a2b9bbd863b55e76ca68"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) Debug Control <br /></td></tr>
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<tr class="separator:a6fea929a7941a2b9bbd863b55e76ca68"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:adc1cf6fcb8fd4f5e93943790568020a9"><td class="memItemLeft" align="right" valign="top"><a id="adc1cf6fcb8fd4f5e93943790568020a9"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#adc1cf6fcb8fd4f5e93943790568020a9">REG_TC0_SYNCBUSY</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x40003810UL)</td></tr>
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<tr class="memdesc:adc1cf6fcb8fd4f5e93943790568020a9"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) Synchronization Status <br /></td></tr>
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<tr class="separator:adc1cf6fcb8fd4f5e93943790568020a9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a85d595198b1c1440221a8109cc046c78"><td class="memItemLeft" align="right" valign="top"><a id="a85d595198b1c1440221a8109cc046c78"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#a85d595198b1c1440221a8109cc046c78">REG_TC0_COUNT16_COUNT</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x40003814UL)</td></tr>
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<tr class="memdesc:a85d595198b1c1440221a8109cc046c78"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) COUNT16 Count <br /></td></tr>
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<tr class="separator:a85d595198b1c1440221a8109cc046c78"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a80429d809bb7fa5d1bc3bba8120a2c00"><td class="memItemLeft" align="right" valign="top"><a id="a80429d809bb7fa5d1bc3bba8120a2c00"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#a80429d809bb7fa5d1bc3bba8120a2c00">REG_TC0_COUNT16_CC0</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x4000381CUL)</td></tr>
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<tr class="memdesc:a80429d809bb7fa5d1bc3bba8120a2c00"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) COUNT16 Compare and Capture 0 <br /></td></tr>
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<tr class="separator:a80429d809bb7fa5d1bc3bba8120a2c00"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a68fbdeb33e1beba3f09fef4a01edec17"><td class="memItemLeft" align="right" valign="top"><a id="a68fbdeb33e1beba3f09fef4a01edec17"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#a68fbdeb33e1beba3f09fef4a01edec17">REG_TC0_COUNT16_CC1</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x4000381EUL)</td></tr>
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<tr class="memdesc:a68fbdeb33e1beba3f09fef4a01edec17"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) COUNT16 Compare and Capture 1 <br /></td></tr>
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<tr class="separator:a68fbdeb33e1beba3f09fef4a01edec17"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8b2fc7a4645c962ba85f6f3a92f0529c"><td class="memItemLeft" align="right" valign="top"><a id="a8b2fc7a4645c962ba85f6f3a92f0529c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#a8b2fc7a4645c962ba85f6f3a92f0529c">REG_TC0_COUNT16_CCBUF0</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x40003830UL)</td></tr>
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<tr class="memdesc:a8b2fc7a4645c962ba85f6f3a92f0529c"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) COUNT16 Compare and Capture Buffer 0 <br /></td></tr>
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<tr class="separator:a8b2fc7a4645c962ba85f6f3a92f0529c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9f94c46481b56a3e1caadd799af3da9d"><td class="memItemLeft" align="right" valign="top"><a id="a9f94c46481b56a3e1caadd799af3da9d"></a>
|
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#a9f94c46481b56a3e1caadd799af3da9d">REG_TC0_COUNT16_CCBUF1</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x40003832UL)</td></tr>
|
||
|
|
<tr class="memdesc:a9f94c46481b56a3e1caadd799af3da9d"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) COUNT16 Compare and Capture Buffer 1 <br /></td></tr>
|
||
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<tr class="separator:a9f94c46481b56a3e1caadd799af3da9d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:a166f52310a912bd6d7d81cf0684c82bf"><td class="memItemLeft" align="right" valign="top"><a id="a166f52310a912bd6d7d81cf0684c82bf"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#a166f52310a912bd6d7d81cf0684c82bf">REG_TC0_COUNT32_COUNT</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x40003814UL)</td></tr>
|
||
|
|
<tr class="memdesc:a166f52310a912bd6d7d81cf0684c82bf"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) COUNT32 Count <br /></td></tr>
|
||
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<tr class="separator:a166f52310a912bd6d7d81cf0684c82bf"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:a4bc750dad60cfcf006c7726a04b9ce9c"><td class="memItemLeft" align="right" valign="top"><a id="a4bc750dad60cfcf006c7726a04b9ce9c"></a>
|
||
|
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#a4bc750dad60cfcf006c7726a04b9ce9c">REG_TC0_COUNT32_CC0</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4000381CUL)</td></tr>
|
||
|
|
<tr class="memdesc:a4bc750dad60cfcf006c7726a04b9ce9c"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) COUNT32 Compare and Capture 0 <br /></td></tr>
|
||
|
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<tr class="separator:a4bc750dad60cfcf006c7726a04b9ce9c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:ab22fbf8a3b69ffd2a3e2f05637a92c86"><td class="memItemLeft" align="right" valign="top"><a id="ab22fbf8a3b69ffd2a3e2f05637a92c86"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#ab22fbf8a3b69ffd2a3e2f05637a92c86">REG_TC0_COUNT32_CC1</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x40003820UL)</td></tr>
|
||
|
|
<tr class="memdesc:ab22fbf8a3b69ffd2a3e2f05637a92c86"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) COUNT32 Compare and Capture 1 <br /></td></tr>
|
||
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<tr class="separator:ab22fbf8a3b69ffd2a3e2f05637a92c86"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:ad34b246580a8fd096af0d232b8e937dc"><td class="memItemLeft" align="right" valign="top"><a id="ad34b246580a8fd096af0d232b8e937dc"></a>
|
||
|
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#ad34b246580a8fd096af0d232b8e937dc">REG_TC0_COUNT32_CCBUF0</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x40003830UL)</td></tr>
|
||
|
|
<tr class="memdesc:ad34b246580a8fd096af0d232b8e937dc"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) COUNT32 Compare and Capture Buffer 0 <br /></td></tr>
|
||
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<tr class="separator:ad34b246580a8fd096af0d232b8e937dc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:a10621ba2863c6086a9107d66fa510923"><td class="memItemLeft" align="right" valign="top"><a id="a10621ba2863c6086a9107d66fa510923"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#a10621ba2863c6086a9107d66fa510923">REG_TC0_COUNT32_CCBUF1</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x40003834UL)</td></tr>
|
||
|
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<tr class="memdesc:a10621ba2863c6086a9107d66fa510923"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) COUNT32 Compare and Capture Buffer 1 <br /></td></tr>
|
||
|
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<tr class="separator:a10621ba2863c6086a9107d66fa510923"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
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<tr class="memitem:a265e360444ac2c22261e62cfc8a9531c"><td class="memItemLeft" align="right" valign="top"><a id="a265e360444ac2c22261e62cfc8a9531c"></a>
|
||
|
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#a265e360444ac2c22261e62cfc8a9531c">REG_TC0_COUNT8_COUNT</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x40003814UL)</td></tr>
|
||
|
|
<tr class="memdesc:a265e360444ac2c22261e62cfc8a9531c"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) COUNT8 Count <br /></td></tr>
|
||
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<tr class="separator:a265e360444ac2c22261e62cfc8a9531c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:a1df99c66fd2e4c8d0e1a7cbd5ed85740"><td class="memItemLeft" align="right" valign="top"><a id="a1df99c66fd2e4c8d0e1a7cbd5ed85740"></a>
|
||
|
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#a1df99c66fd2e4c8d0e1a7cbd5ed85740">REG_TC0_COUNT8_PER</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4000381BUL)</td></tr>
|
||
|
|
<tr class="memdesc:a1df99c66fd2e4c8d0e1a7cbd5ed85740"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) COUNT8 Period <br /></td></tr>
|
||
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<tr class="separator:a1df99c66fd2e4c8d0e1a7cbd5ed85740"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:a7563890ac8081315d1e44f5839f537b4"><td class="memItemLeft" align="right" valign="top"><a id="a7563890ac8081315d1e44f5839f537b4"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#a7563890ac8081315d1e44f5839f537b4">REG_TC0_COUNT8_CC0</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4000381CUL)</td></tr>
|
||
|
|
<tr class="memdesc:a7563890ac8081315d1e44f5839f537b4"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) COUNT8 Compare and Capture 0 <br /></td></tr>
|
||
|
|
<tr class="separator:a7563890ac8081315d1e44f5839f537b4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
|
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<tr class="memitem:ad26f1e087e67966a7a799c28bf588b45"><td class="memItemLeft" align="right" valign="top"><a id="ad26f1e087e67966a7a799c28bf588b45"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#ad26f1e087e67966a7a799c28bf588b45">REG_TC0_COUNT8_CC1</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4000381DUL)</td></tr>
|
||
|
|
<tr class="memdesc:ad26f1e087e67966a7a799c28bf588b45"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) COUNT8 Compare and Capture 1 <br /></td></tr>
|
||
|
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<tr class="separator:ad26f1e087e67966a7a799c28bf588b45"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:a3c5c2f13b7755b25fabc4d5f48ec0781"><td class="memItemLeft" align="right" valign="top"><a id="a3c5c2f13b7755b25fabc4d5f48ec0781"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#a3c5c2f13b7755b25fabc4d5f48ec0781">REG_TC0_COUNT8_PERBUF</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4000382FUL)</td></tr>
|
||
|
|
<tr class="memdesc:a3c5c2f13b7755b25fabc4d5f48ec0781"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) COUNT8 Period Buffer <br /></td></tr>
|
||
|
|
<tr class="separator:a3c5c2f13b7755b25fabc4d5f48ec0781"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:a9230ff443c63e2e9a5520a33f0c08c08"><td class="memItemLeft" align="right" valign="top"><a id="a9230ff443c63e2e9a5520a33f0c08c08"></a>
|
||
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#a9230ff443c63e2e9a5520a33f0c08c08">REG_TC0_COUNT8_CCBUF0</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x40003830UL)</td></tr>
|
||
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<tr class="memdesc:a9230ff443c63e2e9a5520a33f0c08c08"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) COUNT8 Compare and Capture Buffer 0 <br /></td></tr>
|
||
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<tr class="separator:a9230ff443c63e2e9a5520a33f0c08c08"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2206851e921fa37563c07c1962428c30"><td class="memItemLeft" align="right" valign="top"><a id="a2206851e921fa37563c07c1962428c30"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tc0_8h.html#a2206851e921fa37563c07c1962428c30">REG_TC0_COUNT8_CCBUF1</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x40003831UL)</td></tr>
|
||
|
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<tr class="memdesc:a2206851e921fa37563c07c1962428c30"><td class="mdescLeft"> </td><td class="mdescRight">(TC0) COUNT8 Compare and Capture Buffer 1 <br /></td></tr>
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||
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<tr class="separator:a2206851e921fa37563c07c1962428c30"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab05629533803d9cfa67c385b5732c92f"><td class="memItemLeft" align="right" valign="top"><a id="ab05629533803d9cfa67c385b5732c92f"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><b>TC0_CC_NUM</b>   2</td></tr>
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||
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<tr class="separator:ab05629533803d9cfa67c385b5732c92f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab3ddbc8012230d792637d4fec15afdb1"><td class="memItemLeft" align="right" valign="top"><a id="ab3ddbc8012230d792637d4fec15afdb1"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>TC0_DMAC_ID_MC_0</b>   45</td></tr>
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||
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<tr class="separator:ab3ddbc8012230d792637d4fec15afdb1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae867494e0bdebc26b03ecea6cf24f6cb"><td class="memItemLeft" align="right" valign="top"><a id="ae867494e0bdebc26b03ecea6cf24f6cb"></a>
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||
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#define </td><td class="memItemRight" valign="bottom"><b>TC0_DMAC_ID_MC_1</b>   46</td></tr>
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||
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<tr class="separator:ae867494e0bdebc26b03ecea6cf24f6cb"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:a1aa1c230ff3f54be4756390e9c60a5be"><td class="memItemLeft" align="right" valign="top"><a id="a1aa1c230ff3f54be4756390e9c60a5be"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>TC0_DMAC_ID_MC_LSB</b>   45</td></tr>
|
||
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<tr class="separator:a1aa1c230ff3f54be4756390e9c60a5be"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:a79e17798d3e66ce1a05b1e0d1d321732"><td class="memItemLeft" align="right" valign="top"><a id="a79e17798d3e66ce1a05b1e0d1d321732"></a>
|
||
|
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#define </td><td class="memItemRight" valign="bottom"><b>TC0_DMAC_ID_MC_MSB</b>   46</td></tr>
|
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<tr class="separator:a79e17798d3e66ce1a05b1e0d1d321732"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:a91fe8420750f3266798496f68465e0d3"><td class="memItemLeft" align="right" valign="top"><a id="a91fe8420750f3266798496f68465e0d3"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>TC0_DMAC_ID_MC_SIZE</b>   2</td></tr>
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<tr class="separator:a91fe8420750f3266798496f68465e0d3"><td class="memSeparator" colspan="2"> </td></tr>
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||
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<tr class="memitem:ad07a266bd448a7b403cbe7be38981f7d"><td class="memItemLeft" align="right" valign="top"><a id="ad07a266bd448a7b403cbe7be38981f7d"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>TC0_DMAC_ID_OVF</b>   44</td></tr>
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<tr class="separator:ad07a266bd448a7b403cbe7be38981f7d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:ac2f037aaaf7f9956339ba97546a93fa8"><td class="memItemLeft" align="right" valign="top"><a id="ac2f037aaaf7f9956339ba97546a93fa8"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>TC0_EXT</b>   0</td></tr>
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||
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<tr class="separator:ac2f037aaaf7f9956339ba97546a93fa8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:ad607ade465977e007f16aec025480fc2"><td class="memItemLeft" align="right" valign="top"><a id="ad607ade465977e007f16aec025480fc2"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>TC0_GCLK_ID</b>   9</td></tr>
|
||
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<tr class="separator:ad607ade465977e007f16aec025480fc2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:a541a7710ac3c7404e4ce604d79806fb3"><td class="memItemLeft" align="right" valign="top"><a id="a541a7710ac3c7404e4ce604d79806fb3"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>TC0_MASTER_SLAVE_MODE</b>   1</td></tr>
|
||
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<tr class="separator:a541a7710ac3c7404e4ce604d79806fb3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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<tr class="memitem:ae67d0bfcf89c5c2d95b982aed8e76370"><td class="memItemLeft" align="right" valign="top"><a id="ae67d0bfcf89c5c2d95b982aed8e76370"></a>
|
||
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#define </td><td class="memItemRight" valign="bottom"><b>TC0_OW_NUM</b>   2</td></tr>
|
||
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<tr class="separator:ae67d0bfcf89c5c2d95b982aed8e76370"><td class="memSeparator" colspan="2"> </td></tr>
|
||
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</table>
|
||
|
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
|
||
|
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<div class="textblock"><p>Instance description for TC0. </p>
|
||
|
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<p>Copyright (c) 2019 Microchip Technology Inc.</p>
|
||
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<p>\asf_license_start </p>
|
||
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|
||
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<p class="definition">Definition in file <a class="el" href="tc0_8h_source.html">tc0.h</a>.</p>
|
||
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</div></div><!-- contents -->
|
||
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<!-- start footer part -->
|
||
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<hr class="footer"/><address class="footer"><small>
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Generated by <a href="http://www.doxygen.org/index.html"><img class="footer" src="doxygen.svg" width="104" height="31" alt="doxygen"/></a> 1.8.20
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</small></address>
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</body>
|
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</html>
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