SAME54P20A Test Project
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Instance description for TC0. More...
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Macros | |
#define | REG_TC0_CTRLA (*(RwReg *)0x40003800UL) |
(TC0) Control A | |
#define | REG_TC0_CTRLBCLR (*(RwReg8 *)0x40003804UL) |
(TC0) Control B Clear | |
#define | REG_TC0_CTRLBSET (*(RwReg8 *)0x40003805UL) |
(TC0) Control B Set | |
#define | REG_TC0_EVCTRL (*(RwReg16*)0x40003806UL) |
(TC0) Event Control | |
#define | REG_TC0_INTENCLR (*(RwReg8 *)0x40003808UL) |
(TC0) Interrupt Enable Clear | |
#define | REG_TC0_INTENSET (*(RwReg8 *)0x40003809UL) |
(TC0) Interrupt Enable Set | |
#define | REG_TC0_INTFLAG (*(RwReg8 *)0x4000380AUL) |
(TC0) Interrupt Flag Status and Clear | |
#define | REG_TC0_STATUS (*(RwReg8 *)0x4000380BUL) |
(TC0) Status | |
#define | REG_TC0_WAVE (*(RwReg8 *)0x4000380CUL) |
(TC0) Waveform Generation Control | |
#define | REG_TC0_DRVCTRL (*(RwReg8 *)0x4000380DUL) |
(TC0) Control C | |
#define | REG_TC0_DBGCTRL (*(RwReg8 *)0x4000380FUL) |
(TC0) Debug Control | |
#define | REG_TC0_SYNCBUSY (*(RoReg *)0x40003810UL) |
(TC0) Synchronization Status | |
#define | REG_TC0_COUNT16_COUNT (*(RwReg16*)0x40003814UL) |
(TC0) COUNT16 Count | |
#define | REG_TC0_COUNT16_CC0 (*(RwReg16*)0x4000381CUL) |
(TC0) COUNT16 Compare and Capture 0 | |
#define | REG_TC0_COUNT16_CC1 (*(RwReg16*)0x4000381EUL) |
(TC0) COUNT16 Compare and Capture 1 | |
#define | REG_TC0_COUNT16_CCBUF0 (*(RwReg16*)0x40003830UL) |
(TC0) COUNT16 Compare and Capture Buffer 0 | |
#define | REG_TC0_COUNT16_CCBUF1 (*(RwReg16*)0x40003832UL) |
(TC0) COUNT16 Compare and Capture Buffer 1 | |
#define | REG_TC0_COUNT32_COUNT (*(RwReg *)0x40003814UL) |
(TC0) COUNT32 Count | |
#define | REG_TC0_COUNT32_CC0 (*(RwReg *)0x4000381CUL) |
(TC0) COUNT32 Compare and Capture 0 | |
#define | REG_TC0_COUNT32_CC1 (*(RwReg *)0x40003820UL) |
(TC0) COUNT32 Compare and Capture 1 | |
#define | REG_TC0_COUNT32_CCBUF0 (*(RwReg *)0x40003830UL) |
(TC0) COUNT32 Compare and Capture Buffer 0 | |
#define | REG_TC0_COUNT32_CCBUF1 (*(RwReg *)0x40003834UL) |
(TC0) COUNT32 Compare and Capture Buffer 1 | |
#define | REG_TC0_COUNT8_COUNT (*(RwReg8 *)0x40003814UL) |
(TC0) COUNT8 Count | |
#define | REG_TC0_COUNT8_PER (*(RwReg8 *)0x4000381BUL) |
(TC0) COUNT8 Period | |
#define | REG_TC0_COUNT8_CC0 (*(RwReg8 *)0x4000381CUL) |
(TC0) COUNT8 Compare and Capture 0 | |
#define | REG_TC0_COUNT8_CC1 (*(RwReg8 *)0x4000381DUL) |
(TC0) COUNT8 Compare and Capture 1 | |
#define | REG_TC0_COUNT8_PERBUF (*(RwReg8 *)0x4000382FUL) |
(TC0) COUNT8 Period Buffer | |
#define | REG_TC0_COUNT8_CCBUF0 (*(RwReg8 *)0x40003830UL) |
(TC0) COUNT8 Compare and Capture Buffer 0 | |
#define | REG_TC0_COUNT8_CCBUF1 (*(RwReg8 *)0x40003831UL) |
(TC0) COUNT8 Compare and Capture Buffer 1 | |
#define | TC0_CC_NUM 2 |
#define | TC0_DMAC_ID_MC_0 45 |
#define | TC0_DMAC_ID_MC_1 46 |
#define | TC0_DMAC_ID_MC_LSB 45 |
#define | TC0_DMAC_ID_MC_MSB 46 |
#define | TC0_DMAC_ID_MC_SIZE 2 |
#define | TC0_DMAC_ID_OVF 44 |
#define | TC0_EXT 0 |
#define | TC0_GCLK_ID 9 |
#define | TC0_MASTER_SLAVE_MODE 1 |
#define | TC0_OW_NUM 2 |
Instance description for TC0.
Copyright (c) 2019 Microchip Technology Inc.
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Definition in file tc0.h.