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51 lines
2.7 KiB
C
51 lines
2.7 KiB
C
4 years ago
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/**
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* \brief Component description for GPBR
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*
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* Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries.
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*
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* Subject to your compliance with these terms, you may use Microchip software and any derivatives
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* exclusively with Microchip products. It is your responsibility to comply with third party license
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* terms applicable to your use of third party software (including open source software) that may
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* accompany Microchip software.
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*
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* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY,
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* APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND
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* FITNESS FOR A PARTICULAR PURPOSE.
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*
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* IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
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* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
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* MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
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* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT
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* EXCEED THE AMOUNT OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
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*
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*/
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/* file generated from device description version 2017-08-25T14:00:00Z */
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#ifndef _SAME70_GPBR_COMPONENT_H_
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#define _SAME70_GPBR_COMPONENT_H_
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/* ************************************************************************** */
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/* SOFTWARE API DEFINITION FOR GPBR */
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/* ************************************************************************** */
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/* -------- SYS_GPBR : (GPBR Offset: 0x00) (R/W 32) General Purpose Backup Register 0 -------- */
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#define SYS_GPBR_GPBR_VALUE_Pos _U_(0) /**< (SYS_GPBR) Value of GPBR x Position */
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#define SYS_GPBR_GPBR_VALUE_Msk (_U_(0xFFFFFFFF) << SYS_GPBR_GPBR_VALUE_Pos) /**< (SYS_GPBR) Value of GPBR x Mask */
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#define SYS_GPBR_GPBR_VALUE(value) (SYS_GPBR_GPBR_VALUE_Msk & ((value) << SYS_GPBR_GPBR_VALUE_Pos))
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#define SYS_GPBR_Msk _U_(0xFFFFFFFF) /**< (SYS_GPBR) Register Mask */
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/** \brief GPBR register offsets definitions */
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#define SYS_GPBR_REG_OFST (0x00) /**< (SYS_GPBR) General Purpose Backup Register 0 Offset */
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#if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
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/** \brief GPBR register API structure */
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typedef struct
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{
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__IO uint32_t SYS_GPBR[8]; /**< Offset: 0x00 (R/W 32) General Purpose Backup Register 0 */
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} gpbr_registers_t;
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#endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
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#endif /* _SAME70_GPBR_COMPONENT_H_ */
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