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366 lines
13 KiB
Plaintext
366 lines
13 KiB
Plaintext
4 years ago
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testdir.elf: file format elf32-littlearm
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Sections:
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Idx Name Size VMA LMA File off Algn
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0 .text 000002c0 00000000 00000000 00010000 2**2
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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1 .relocate 00000000 20000000 20000000 000102c0 2**0
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CONTENTS
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2 .bss 0000001c 20000000 20000000 00020000 2**2
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ALLOC
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3 .stack 00002004 2000001c 2000001c 00020000 2**0
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ALLOC
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4 .ARM.attributes 00000028 00000000 00000000 000102c0 2**0
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CONTENTS, READONLY
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5 .comment 0000001e 00000000 00000000 000102e8 2**0
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CONTENTS, READONLY
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6 .debug_info 00003d0a 00000000 00000000 00010306 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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7 .debug_abbrev 000003d9 00000000 00000000 00014010 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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8 .debug_aranges 00000048 00000000 00000000 000143e9 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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9 .debug_ranges 000000f0 00000000 00000000 00014431 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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10 .debug_macro 00011a5c 00000000 00000000 00014521 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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11 .debug_line 00000b0b 00000000 00000000 00025f7d 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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12 .debug_str 0006ed4e 00000000 00000000 00026a88 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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13 .debug_frame 000000dc 00000000 00000000 000957d8 2**2
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CONTENTS, READONLY, DEBUGGING, OCTETS
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14 .debug_loc 0000027c 00000000 00000000 000958b4 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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Disassembly of section .text:
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00000000 <exception_table>:
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0: 20 20 00 20 01 01 00 00 fd 00 00 00 fd 00 00 00 . ............
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...
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2c: fd 00 00 00 00 00 00 00 00 00 00 00 fd 00 00 00 ................
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3c: fd 00 00 00 fd 00 00 00 fd 00 00 00 fd 00 00 00 ................
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4c: fd 00 00 00 fd 00 00 00 fd 00 00 00 fd 00 00 00 ................
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5c: fd 00 00 00 fd 00 00 00 fd 00 00 00 fd 00 00 00 ................
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6c: fd 00 00 00 fd 00 00 00 fd 00 00 00 fd 00 00 00 ................
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7c: fd 00 00 00 fd 00 00 00 fd 00 00 00 fd 00 00 00 ................
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8c: fd 00 00 00 fd 00 00 00 fd 00 00 00 fd 00 00 00 ................
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9c: fd 00 00 00 fd 00 00 00 fd 00 00 00 fd 00 00 00 ................
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ac: fd 00 00 00 00 00 00 00 ........
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000000b4 <__do_global_dtors_aux>:
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b4: b510 push {r4, lr}
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b6: 4c06 ldr r4, [pc, #24] ; (d0 <__do_global_dtors_aux+0x1c>)
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b8: 7823 ldrb r3, [r4, #0]
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ba: 2b00 cmp r3, #0
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bc: d107 bne.n ce <__do_global_dtors_aux+0x1a>
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be: 4b05 ldr r3, [pc, #20] ; (d4 <__do_global_dtors_aux+0x20>)
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c0: 2b00 cmp r3, #0
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c2: d002 beq.n ca <__do_global_dtors_aux+0x16>
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c4: 4804 ldr r0, [pc, #16] ; (d8 <__do_global_dtors_aux+0x24>)
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c6: e000 b.n ca <__do_global_dtors_aux+0x16>
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c8: bf00 nop
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ca: 2301 movs r3, #1
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cc: 7023 strb r3, [r4, #0]
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ce: bd10 pop {r4, pc}
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d0: 20000000 .word 0x20000000
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d4: 00000000 .word 0x00000000
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d8: 000002c0 .word 0x000002c0
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000000dc <frame_dummy>:
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dc: 4b04 ldr r3, [pc, #16] ; (f0 <frame_dummy+0x14>)
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de: b510 push {r4, lr}
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e0: 2b00 cmp r3, #0
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e2: d003 beq.n ec <frame_dummy+0x10>
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e4: 4903 ldr r1, [pc, #12] ; (f4 <frame_dummy+0x18>)
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e6: 4804 ldr r0, [pc, #16] ; (f8 <frame_dummy+0x1c>)
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e8: e000 b.n ec <frame_dummy+0x10>
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ea: bf00 nop
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ec: bd10 pop {r4, pc}
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ee: 46c0 nop ; (mov r8, r8)
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f0: 00000000 .word 0x00000000
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f4: 20000004 .word 0x20000004
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f8: 000002c0 .word 0x000002c0
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000000fc <Dummy_Handler>:
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/**
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* \brief Default interrupt handler for unused IRQs.
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*/
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void Dummy_Handler(void)
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{
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while (1) {
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fc: e7fe b.n fc <Dummy_Handler>
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...
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00000100 <Reset_Handler>:
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if (pSrc != pDest) {
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100: 4925 ldr r1, [pc, #148] ; (198 <Reset_Handler+0x98>)
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102: 4826 ldr r0, [pc, #152] ; (19c <Reset_Handler+0x9c>)
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{
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104: b570 push {r4, r5, r6, lr}
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if (pSrc != pDest) {
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106: 4281 cmp r1, r0
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108: d00a beq.n 120 <Reset_Handler+0x20>
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*pDest++ = *pSrc++;
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10a: 4b25 ldr r3, [pc, #148] ; (1a0 <Reset_Handler+0xa0>)
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10c: 1ec4 subs r4, r0, #3
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10e: 2200 movs r2, #0
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110: 42a3 cmp r3, r4
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112: d303 bcc.n 11c <Reset_Handler+0x1c>
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114: 3303 adds r3, #3
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116: 1a1a subs r2, r3, r0
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118: 0892 lsrs r2, r2, #2
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11a: 0092 lsls r2, r2, #2
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11c: 4b21 ldr r3, [pc, #132] ; (1a4 <Reset_Handler+0xa4>)
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11e: 4798 blx r3
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*pDest++ = 0;
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120: 4821 ldr r0, [pc, #132] ; (1a8 <Reset_Handler+0xa8>)
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122: 4b22 ldr r3, [pc, #136] ; (1ac <Reset_Handler+0xac>)
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124: 1ec1 subs r1, r0, #3
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126: 2200 movs r2, #0
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128: 4299 cmp r1, r3
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12a: d803 bhi.n 134 <Reset_Handler+0x34>
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12c: 3303 adds r3, #3
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12e: 1a1a subs r2, r3, r0
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130: 0892 lsrs r2, r2, #2
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132: 0092 lsls r2, r2, #2
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134: 2100 movs r1, #0
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136: 4b1e ldr r3, [pc, #120] ; (1b0 <Reset_Handler+0xb0>)
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138: 4798 blx r3
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SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);
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13a: 22ff movs r2, #255 ; 0xff
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13c: 4b1d ldr r3, [pc, #116] ; (1b4 <Reset_Handler+0xb4>)
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USB->DEVICE.QOSCTRL.bit.CQOS = 2;
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13e: 2103 movs r1, #3
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SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);
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140: 4393 bics r3, r2
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142: 4a1d ldr r2, [pc, #116] ; (1b8 <Reset_Handler+0xb8>)
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USB->DEVICE.QOSCTRL.bit.DQOS = 2;
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144: 250c movs r5, #12
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SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);
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146: 6093 str r3, [r2, #8]
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SBMATRIX->SFR[SBMATRIX_SLAVE_HMCRAMC0].reg = 2;
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148: 2202 movs r2, #2
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USB->DEVICE.QOSCTRL.bit.DQOS = 2;
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14a: 2408 movs r4, #8
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DMAC->QOSCTRL.bit.DQOS = 2;
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14c: 2630 movs r6, #48 ; 0x30
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SBMATRIX->SFR[SBMATRIX_SLAVE_HMCRAMC0].reg = 2;
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14e: 4b1b ldr r3, [pc, #108] ; (1bc <Reset_Handler+0xbc>)
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USB->DEVICE.QOSCTRL.bit.CQOS = 2;
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150: 481b ldr r0, [pc, #108] ; (1c0 <Reset_Handler+0xc0>)
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SBMATRIX->SFR[SBMATRIX_SLAVE_HMCRAMC0].reg = 2;
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152: 625a str r2, [r3, #36] ; 0x24
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USB->DEVICE.QOSCTRL.bit.CQOS = 2;
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154: 78c3 ldrb r3, [r0, #3]
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156: 438b bics r3, r1
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158: 4313 orrs r3, r2
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15a: 70c3 strb r3, [r0, #3]
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USB->DEVICE.QOSCTRL.bit.DQOS = 2;
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15c: 78c3 ldrb r3, [r0, #3]
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15e: 43ab bics r3, r5
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160: 4323 orrs r3, r4
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162: 70c3 strb r3, [r0, #3]
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DMAC->QOSCTRL.bit.DQOS = 2;
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164: 4b17 ldr r3, [pc, #92] ; (1c4 <Reset_Handler+0xc4>)
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166: 7b98 ldrb r0, [r3, #14]
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168: 43b0 bics r0, r6
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16a: 0006 movs r6, r0
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16c: 2020 movs r0, #32
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16e: 4330 orrs r0, r6
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170: 7398 strb r0, [r3, #14]
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DMAC->QOSCTRL.bit.FQOS = 2;
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172: 7b98 ldrb r0, [r3, #14]
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174: 43a8 bics r0, r5
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176: 4304 orrs r4, r0
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178: 739c strb r4, [r3, #14]
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DMAC->QOSCTRL.bit.WRBQOS = 2;
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17a: 7b98 ldrb r0, [r3, #14]
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17c: 4388 bics r0, r1
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17e: 4302 orrs r2, r0
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180: 739a strb r2, [r3, #14]
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NVMCTRL->CTRLB.bit.MANW = 1;
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182: 2380 movs r3, #128 ; 0x80
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184: 4a10 ldr r2, [pc, #64] ; (1c8 <Reset_Handler+0xc8>)
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186: 6851 ldr r1, [r2, #4]
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188: 430b orrs r3, r1
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18a: 6053 str r3, [r2, #4]
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__libc_init_array();
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18c: 4b0f ldr r3, [pc, #60] ; (1cc <Reset_Handler+0xcc>)
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18e: 4798 blx r3
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main();
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190: 4b0f ldr r3, [pc, #60] ; (1d0 <Reset_Handler+0xd0>)
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192: 4798 blx r3
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while (1);
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194: e7fe b.n 194 <Reset_Handler+0x94>
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196: 46c0 nop ; (mov r8, r8)
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198: 000002c0 .word 0x000002c0
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19c: 20000000 .word 0x20000000
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1a0: 20000000 .word 0x20000000
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1a4: 0000027d .word 0x0000027d
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1a8: 20000000 .word 0x20000000
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1ac: 2000001c .word 0x2000001c
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1b0: 0000028f .word 0x0000028f
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1b4: 00000000 .word 0x00000000
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1b8: e000ed00 .word 0xe000ed00
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1bc: 410070fc .word 0x410070fc
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1c0: 41005000 .word 0x41005000
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1c4: 41004800 .word 0x41004800
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1c8: 41004000 .word 0x41004000
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1cc: 00000235 .word 0x00000235
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1d0: 000001d5 .word 0x000001d5
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000001d4 <main>:
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void init_pin(int port, int pin)
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{
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uint32_t* dir_reg = (uint32_t*)((PORT_ADDR | (port * PORT_GROUP_SIZE) | PORT_DIR_OFF));
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*dir_reg |= (1 << pin);
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1d4: 4a13 ldr r2, [pc, #76] ; (224 <main+0x50>)
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1d6: 4b14 ldr r3, [pc, #80] ; (228 <main+0x54>)
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1d8: 6811 ldr r1, [r2, #0]
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}
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void clr_pin(int port, int pin)
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{
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uint32_t* out_reg = (uint32_t*)((PORT_ADDR | (port * PORT_GROUP_SIZE) | PORT_OUT_OFF));
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*out_reg &= ~(1 << pin);
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1da: 2080 movs r0, #128 ; 0x80
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*dir_reg |= (1 << pin);
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1dc: 430b orrs r3, r1
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*out_reg &= ~(1 << pin);
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1de: 2102 movs r1, #2
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{
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1e0: b530 push {r4, r5, lr}
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*dir_reg |= (1 << pin);
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1e2: 6013 str r3, [r2, #0]
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*out_reg &= ~(1 << pin);
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1e4: 4c11 ldr r4, [pc, #68] ; (22c <main+0x58>)
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1e6: 4a12 ldr r2, [pc, #72] ; (230 <main+0x5c>)
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1e8: 05c0 lsls r0, r0, #23
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1ea: 25fa movs r5, #250 ; 0xfa
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1ec: 6813 ldr r3, [r2, #0]
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1ee: 006d lsls r5, r5, #1
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1f0: 438b bics r3, r1
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1f2: 4303 orrs r3, r0
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1f4: 6013 str r3, [r2, #0]
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{
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1f6: 2364 movs r3, #100 ; 0x64
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asm volatile("nop");
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1f8: 46c0 nop ; (mov r8, r8)
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for(i=0;i<100;i++)
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1fa: 3b01 subs r3, #1
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1fc: 2b00 cmp r3, #0
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1fe: d1fb bne.n 1f8 <main+0x24>
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for(;n>0;n--)
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200: 3d01 subs r5, #1
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202: 2d00 cmp r5, #0
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204: d1f7 bne.n 1f6 <main+0x22>
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*out_reg |= (1 << pin);
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206: 25fa movs r5, #250 ; 0xfa
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*out_reg &= ~(1 << pin);
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208: 6813 ldr r3, [r2, #0]
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*out_reg |= (1 << pin);
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20a: 006d lsls r5, r5, #1
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*out_reg &= ~(1 << pin);
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20c: 4023 ands r3, r4
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*out_reg |= (1 << pin);
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20e: 430b orrs r3, r1
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210: 6013 str r3, [r2, #0]
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*out_reg &= ~(1 << pin);
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212: 2364 movs r3, #100 ; 0x64
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asm volatile("nop");
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214: 46c0 nop ; (mov r8, r8)
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for(i=0;i<100;i++)
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216: 3b01 subs r3, #1
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218: 2b00 cmp r3, #0
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21a: d1fb bne.n 214 <main+0x40>
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for(;n>0;n--)
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21c: 3d01 subs r5, #1
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21e: 2d00 cmp r5, #0
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220: d1f7 bne.n 212 <main+0x3e>
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222: e7e2 b.n 1ea <main+0x16>
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224: 41004480 .word 0x41004480
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228: 40000002 .word 0x40000002
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|
|
22c: bfffffff .word 0xbfffffff
|
||
|
|
230: 41004490 .word 0x41004490
|
||
|
|
|
||
|
|
00000234 <__libc_init_array>:
|
||
|
|
234: b570 push {r4, r5, r6, lr}
|
||
|
|
236: 2600 movs r6, #0
|
||
|
|
238: 4d0c ldr r5, [pc, #48] ; (26c <__libc_init_array+0x38>)
|
||
|
|
23a: 4c0d ldr r4, [pc, #52] ; (270 <__libc_init_array+0x3c>)
|
||
|
|
23c: 1b64 subs r4, r4, r5
|
||
|
|
23e: 10a4 asrs r4, r4, #2
|
||
|
|
240: 42a6 cmp r6, r4
|
||
|
|
242: d109 bne.n 258 <__libc_init_array+0x24>
|
||
|
|
244: 2600 movs r6, #0
|
||
|
|
246: f000 f82b bl 2a0 <_init>
|
||
|
|
24a: 4d0a ldr r5, [pc, #40] ; (274 <__libc_init_array+0x40>)
|
||
|
|
24c: 4c0a ldr r4, [pc, #40] ; (278 <__libc_init_array+0x44>)
|
||
|
|
24e: 1b64 subs r4, r4, r5
|
||
|
|
250: 10a4 asrs r4, r4, #2
|
||
|
|
252: 42a6 cmp r6, r4
|
||
|
|
254: d105 bne.n 262 <__libc_init_array+0x2e>
|
||
|
|
256: bd70 pop {r4, r5, r6, pc}
|
||
|
|
258: 00b3 lsls r3, r6, #2
|
||
|
|
25a: 58eb ldr r3, [r5, r3]
|
||
|
|
25c: 4798 blx r3
|
||
|
|
25e: 3601 adds r6, #1
|
||
|
|
260: e7ee b.n 240 <__libc_init_array+0xc>
|
||
|
|
262: 00b3 lsls r3, r6, #2
|
||
|
|
264: 58eb ldr r3, [r5, r3]
|
||
|
|
266: 4798 blx r3
|
||
|
|
268: 3601 adds r6, #1
|
||
|
|
26a: e7f2 b.n 252 <__libc_init_array+0x1e>
|
||
|
|
26c: 000002ac .word 0x000002ac
|
||
|
|
270: 000002ac .word 0x000002ac
|
||
|
|
274: 000002ac .word 0x000002ac
|
||
|
|
278: 000002b0 .word 0x000002b0
|
||
|
|
|
||
|
|
0000027c <memcpy>:
|
||
|
|
27c: 2300 movs r3, #0
|
||
|
|
27e: b510 push {r4, lr}
|
||
|
|
280: 429a cmp r2, r3
|
||
|
|
282: d100 bne.n 286 <memcpy+0xa>
|
||
|
|
284: bd10 pop {r4, pc}
|
||
|
|
286: 5ccc ldrb r4, [r1, r3]
|
||
|
|
288: 54c4 strb r4, [r0, r3]
|
||
|
|
28a: 3301 adds r3, #1
|
||
|
|
28c: e7f8 b.n 280 <memcpy+0x4>
|
||
|
|
|
||
|
|
0000028e <memset>:
|
||
|
|
28e: 0003 movs r3, r0
|
||
|
|
290: 1882 adds r2, r0, r2
|
||
|
|
292: 4293 cmp r3, r2
|
||
|
|
294: d100 bne.n 298 <memset+0xa>
|
||
|
|
296: 4770 bx lr
|
||
|
|
298: 7019 strb r1, [r3, #0]
|
||
|
|
29a: 3301 adds r3, #1
|
||
|
|
29c: e7f9 b.n 292 <memset+0x4>
|
||
|
|
...
|
||
|
|
|
||
|
|
000002a0 <_init>:
|
||
|
|
2a0: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
|
|
2a2: 46c0 nop ; (mov r8, r8)
|
||
|
|
2a4: bcf8 pop {r3, r4, r5, r6, r7}
|
||
|
|
2a6: bc08 pop {r3}
|
||
|
|
2a8: 469e mov lr, r3
|
||
|
|
2aa: 4770 bx lr
|
||
|
|
|
||
|
|
000002ac <__frame_dummy_init_array_entry>:
|
||
|
|
2ac: 00dd 0000 ....
|
||
|
|
|
||
|
|
000002b0 <_fini>:
|
||
|
|
2b0: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
|
|
2b2: 46c0 nop ; (mov r8, r8)
|
||
|
|
2b4: bcf8 pop {r3, r4, r5, r6, r7}
|
||
|
|
2b6: bc08 pop {r3}
|
||
|
|
2b8: 469e mov lr, r3
|
||
|
|
2ba: 4770 bx lr
|
||
|
|
|
||
|
|
000002bc <__do_global_dtors_aux_fini_array_entry>:
|
||
|
|
2bc: 00b5 0000 ....
|