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62 lines
2.0 KiB
C
62 lines
2.0 KiB
C
/**
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* \file
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*
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* \brief Core related functionality implementation.
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*
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* Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Subject to your compliance with these terms, you may use Microchip
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* software and any derivatives exclusively with Microchip products.
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* It is your responsibility to comply with third party license terms applicable
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* to your use of third party software (including open source software) that
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* may accompany Microchip software.
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*
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* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
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* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
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* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
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* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
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* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
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* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
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* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
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* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
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* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
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* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
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* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
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*
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* \asf_license_stop
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*
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*/
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#ifndef _HPL_CORE_PORT_H_INCLUDED
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#define _HPL_CORE_PORT_H_INCLUDED
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#include <peripheral_clk_config.h>
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/* It's possible to include this file in ARM ASM files (e.g., in FreeRTOS IAR
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* portable implement, portasm.s -> FreeRTOSConfig.h -> hpl_core_port.h),
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* there will be assembling errors.
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* So the following things are not included for assembling.
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*/
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#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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#ifndef _UNIT_TEST_
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#include <compiler.h>
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#endif
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/**
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* \brief Check if it's in ISR handling
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* \return \c true if it's in ISR
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*/
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static inline bool _is_in_isr(void)
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{
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return (SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk);
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}
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#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
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#endif /* _HPL_CORE_PORT_H_INCLUDED */
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