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204 lines
5.1 KiB
C
204 lines
5.1 KiB
C
/**
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* \file
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*
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* \brief SAM Power manager
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*
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* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Subject to your compliance with these terms, you may use Microchip
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* software and any derivatives exclusively with Microchip products.
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* It is your responsibility to comply with third party license terms applicable
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* to your use of third party software (including open source software) that
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* may accompany Microchip software.
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*
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* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
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* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
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* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
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* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
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* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
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* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
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* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
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* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
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* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
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* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
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* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
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*
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* \asf_license_stop
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*/
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#ifndef _HPL_PM_BASE_H_INCLUDED
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#define _HPL_PM_BASE_H_INCLUDED
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <utils_assert.h>
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/**
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* \addtogroup pm_group PM Low Level Driver Helpers
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*
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* \section pm_helpers_rev Revision History
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* - v0.0.0.1 Initial Commit
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*
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*@{
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*/
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/**
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* \brief Power Manager buses
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*/
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enum _pm_bus { PM_BUS_AHB, PM_BUS_APBA, PM_BUS_APBB, PM_BUS_APBC };
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/**
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* \name HPL functions
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*/
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//@{
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/**
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* \brief Retrieve AHB index
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*
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* \param[in] module Module to get index for
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*
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* \return index of the given module if succeeds, ERR_INVALID_ARG otherwise
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*/
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static inline int32_t _pm_get_ahb_index(const void *const module)
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{
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if ((uint32_t)module == (uint32_t)PM_BUS_APBA) {
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return 0;
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} else if ((uint32_t)module == (uint32_t)PM_BUS_APBB) {
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return 1;
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} else if ((uint32_t)module == (uint32_t)PM_BUS_APBC) {
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return 2;
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}
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if ((uint32_t)module == (uint32_t)DSU) {
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return 3;
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} else if ((uint32_t)module == (uint32_t)NVMCTRL) {
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return 4;
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} else if ((uint32_t)module == (uint32_t)DMAC) {
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return 5;
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}
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#ifdef USB
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else if ((uint32_t)module == (uint32_t)USB) {
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return 6;
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}
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#endif
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return ERR_INVALID_ARG;
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}
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/**
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* \brief Retrieve APBB index
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*
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* \param[in] module Module to get index for
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*
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* \return index of the given module if succeeds, ERR_INVALID_ARG otherwise
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*/
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static inline int32_t _pm_get_apbb_index(const void *const module)
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{
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if ((uint32_t)module == (uint32_t)PAC1) {
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return 0;
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} else if ((uint32_t)module == (uint32_t)DSU) {
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return 1;
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} else if ((uint32_t)module == (uint32_t)NVMCTRL) {
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return 2;
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}
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if ((uint32_t)module == (uint32_t)PORT) {
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return 3;
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} else if ((uint32_t)module == (uint32_t)DMAC) {
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return 4;
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}
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#ifdef USB
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else if ((uint32_t)module == (uint32_t)USB) {
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return 5;
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}
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#endif
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return ERR_INVALID_ARG;
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}
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/**
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* \brief Enable clock on the given bus for the given hardware module
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*
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* This function enables clock on the given bus for the given hardware module.
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* For an overview of available buses and hardware modules see datasheet.
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*
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* \param[in] bus A bus to enable clock on
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* \param[in] module A hardware module to enable clock for
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*/
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static inline void _pm_enable_bus_clock(const enum _pm_bus bus, const void *const module)
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{
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uint32_t peripheral = ((uint32_t)module & 0x0000ff00) >> 10;
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switch (bus) {
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case PM_BUS_AHB:
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if (_pm_get_ahb_index(module) >= 0) {
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peripheral = (uint32_t)_pm_get_ahb_index(module);
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PM->AHBMASK.reg |= 1 << peripheral;
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}
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break;
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case PM_BUS_APBA:
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PM->APBAMASK.reg |= 1 << peripheral;
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break;
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case PM_BUS_APBB:
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if (_pm_get_apbb_index(module) >= 0) {
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peripheral = (uint32_t)_pm_get_apbb_index(module);
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PM->APBBMASK.reg |= 1 << peripheral;
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}
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break;
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case PM_BUS_APBC:
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PM->APBCMASK.reg |= 1 << peripheral;
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break;
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default:
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ASSERT(false);
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break;
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}
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}
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/**
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* \brief Disable clock on the given bus for the given hardware module
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*
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* This function disables clock on the given bus for the given hardware module.
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* For an overview of available buses and hardware modules see datasheet.
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*
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* \param[in] bus A bus to disable clock on
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* \param[in] module A hardware module to disable clock for
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*/
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static inline void _pm_disable_bus_clock(const enum _pm_bus bus, const void *const module)
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{
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uint32_t peripheral = ((uint32_t)module & 0x0000ff00) >> 10;
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switch (bus) {
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case PM_BUS_AHB:
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if (_pm_get_ahb_index(module) >= 0) {
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peripheral = (uint32_t)_pm_get_ahb_index(module);
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PM->AHBMASK.reg &= ~(1 << peripheral);
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}
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break;
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case PM_BUS_APBA:
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PM->APBAMASK.reg &= ~(1 << peripheral);
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break;
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case PM_BUS_APBB:
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if (_pm_get_apbb_index(module) >= 0) {
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peripheral = (uint32_t)_pm_get_apbb_index(module);
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PM->APBBMASK.reg &= ~(1 << peripheral);
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}
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break;
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case PM_BUS_APBC:
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PM->APBCMASK.reg &= ~(1 << peripheral);
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break;
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default:
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ASSERT(false);
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break;
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}
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}
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/**@}*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* _HPL_PM_BASE_H_INCLUDED */
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