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66 lines
2.9 KiB
C
66 lines
2.9 KiB
C
3 years ago
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/**
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* \file
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*
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* \brief Instance description for GCLK
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*
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* Copyright (c) 2018 Microchip Technology Inc.
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*
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* \asf_license_start
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*
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* \page License
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License"); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the Licence at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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* \asf_license_stop
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*
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*/
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#ifndef _SAMD21_GCLK_INSTANCE_
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#define _SAMD21_GCLK_INSTANCE_
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/* ========== Register definition for GCLK peripheral ========== */
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#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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#define REG_GCLK_CTRL (0x40000C00) /**< \brief (GCLK) Control */
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#define REG_GCLK_STATUS (0x40000C01) /**< \brief (GCLK) Status */
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#define REG_GCLK_CLKCTRL (0x40000C02) /**< \brief (GCLK) Generic Clock Control */
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#define REG_GCLK_GENCTRL (0x40000C04) /**< \brief (GCLK) Generic Clock Generator Control */
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#define REG_GCLK_GENDIV (0x40000C08) /**< \brief (GCLK) Generic Clock Generator Division */
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#else
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#define REG_GCLK_CTRL (*(RwReg8 *)0x40000C00UL) /**< \brief (GCLK) Control */
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#define REG_GCLK_STATUS (*(RoReg8 *)0x40000C01UL) /**< \brief (GCLK) Status */
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#define REG_GCLK_CLKCTRL (*(RwReg16*)0x40000C02UL) /**< \brief (GCLK) Generic Clock Control */
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#define REG_GCLK_GENCTRL (*(RwReg *)0x40000C04UL) /**< \brief (GCLK) Generic Clock Generator Control */
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#define REG_GCLK_GENDIV (*(RwReg *)0x40000C08UL) /**< \brief (GCLK) Generic Clock Generator Division */
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#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
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/* ========== Instance parameters for GCLK peripheral ========== */
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#define GCLK_GENDIV_BITS 16
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#define GCLK_GEN_NUM 9 // Number of Generic Clock Generators
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#define GCLK_GEN_NUM_MSB 8 // Number of Generic Clock Generators - 1
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#define GCLK_GEN_SOURCE_NUM_MSB 8 // Number of Generic Clock Sources - 1
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#define GCLK_NUM 37 // Number of Generic Clock Users
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#define GCLK_SOURCE_DFLL48M 7
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#define GCLK_SOURCE_DPLL96M 8
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#define GCLK_SOURCE_GCLKGEN1 2
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#define GCLK_SOURCE_GCLKIN 1
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#define GCLK_SOURCE_NUM 9 // Number of Generic Clock Sources
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#define GCLK_SOURCE_OSCULP32K 3
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#define GCLK_SOURCE_OSC8M 6
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#define GCLK_SOURCE_OSC32K 4
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#define GCLK_SOURCE_XOSC 0
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#define GCLK_SOURCE_XOSC32K 5
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#endif /* _SAMD21_GCLK_INSTANCE_ */
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