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Skywave-Firmware
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Skywave-Firmware/skywave_atxmega128a1_final/Debug/skywave_atxmega128a1_final.lss

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skywave_atxmega128a1_final.elf: file format elf32-avr
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 0000783e 00000000 00000000 00000094 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .data 000001c2 00802000 0000783e 000078d2 2**0
CONTENTS, ALLOC, LOAD, DATA
2 .bss 000007eb 008021c2 008021c2 00007a94 2**0
ALLOC
3 .comment 0000005c 00000000 00000000 00007a94 2**0
CONTENTS, READONLY
4 .note.gnu.avr.deviceinfo 00000040 00000000 00000000 00007af0 2**2
CONTENTS, READONLY
5 .debug_aranges 000008b8 00000000 00000000 00007b30 2**3
CONTENTS, READONLY, DEBUGGING
6 .debug_info 00016ca4 00000000 00000000 000083e8 2**0
CONTENTS, READONLY, DEBUGGING
7 .debug_abbrev 00007237 00000000 00000000 0001f08c 2**0
CONTENTS, READONLY, DEBUGGING
8 .debug_line 0000d797 00000000 00000000 000262c3 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_frame 0000268c 00000000 00000000 00033a5c 2**2
CONTENTS, READONLY, DEBUGGING
10 .debug_str 0003750b 00000000 00000000 000360e8 2**0
CONTENTS, READONLY, DEBUGGING
11 .debug_loc 0000905e 00000000 00000000 0006d5f3 2**0
CONTENTS, READONLY, DEBUGGING
12 .debug_ranges 00000808 00000000 00000000 00076658 2**3
CONTENTS, READONLY, DEBUGGING
13 .debug_macro 0000ef03 00000000 00000000 00076e60 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
00000000 <__vectors>:
0: fc c1 rjmp .+1016 ; 0x3fa <__ctors_end>
2: 00 00 nop
4: 20 c2 rjmp .+1088 ; 0x446 <__bad_interrupt>
6: 00 00 nop
8: 1e c2 rjmp .+1084 ; 0x446 <__bad_interrupt>
a: 00 00 nop
c: 1c c2 rjmp .+1080 ; 0x446 <__bad_interrupt>
e: 00 00 nop
10: 1a c2 rjmp .+1076 ; 0x446 <__bad_interrupt>
12: 00 00 nop
14: 18 c2 rjmp .+1072 ; 0x446 <__bad_interrupt>
16: 00 00 nop
18: 16 c2 rjmp .+1068 ; 0x446 <__bad_interrupt>
1a: 00 00 nop
1c: 14 c2 rjmp .+1064 ; 0x446 <__bad_interrupt>
1e: 00 00 nop
20: 12 c2 rjmp .+1060 ; 0x446 <__bad_interrupt>
22: 00 00 nop
24: 10 c2 rjmp .+1056 ; 0x446 <__bad_interrupt>
26: 00 00 nop
28: 0e c2 rjmp .+1052 ; 0x446 <__bad_interrupt>
2a: 00 00 nop
2c: 0c c2 rjmp .+1048 ; 0x446 <__bad_interrupt>
2e: 00 00 nop
30: 0a c2 rjmp .+1044 ; 0x446 <__bad_interrupt>
32: 00 00 nop
34: 0c 94 59 0e jmp 0x1cb2 ; 0x1cb2 <__vector_13>
38: 4a c4 rjmp .+2196 ; 0x8ce <__vector_14>
3a: 00 00 nop
3c: 80 c4 rjmp .+2304 ; 0x93e <__vector_15>
3e: 00 00 nop
40: 0c 94 9e 2e jmp 0x5d3c ; 0x5d3c <__vector_16>
44: b4 c4 rjmp .+2408 ; 0x9ae <__vector_17>
46: 00 00 nop
48: ea c4 rjmp .+2516 ; 0xa1e <__vector_18>
4a: 00 00 nop
4c: 20 c5 rjmp .+2624 ; 0xa8e <__vector_19>
4e: 00 00 nop
50: 56 c5 rjmp .+2732 ; 0xafe <__vector_20>
52: 00 00 nop
54: 8c c5 rjmp .+2840 ; 0xb6e <__vector_21>
56: 00 00 nop
58: c2 c5 rjmp .+2948 ; 0xbde <__vector_22>
5a: 00 00 nop
5c: f8 c5 rjmp .+3056 ; 0xc4e <__vector_23>
5e: 00 00 nop
60: f2 c1 rjmp .+996 ; 0x446 <__bad_interrupt>
62: 00 00 nop
64: 0c 94 eb 2f jmp 0x5fd6 ; 0x5fd6 <__vector_25>
68: ee c1 rjmp .+988 ; 0x446 <__bad_interrupt>
6a: 00 00 nop
6c: ec c1 rjmp .+984 ; 0x446 <__bad_interrupt>
6e: 00 00 nop
70: 0c 94 6d 15 jmp 0x2ada ; 0x2ada <__vector_28>
74: e8 c1 rjmp .+976 ; 0x446 <__bad_interrupt>
76: 00 00 nop
78: e6 c1 rjmp .+972 ; 0x446 <__bad_interrupt>
7a: 00 00 nop
7c: e4 c1 rjmp .+968 ; 0x446 <__bad_interrupt>
7e: 00 00 nop
80: e2 c1 rjmp .+964 ; 0x446 <__bad_interrupt>
82: 00 00 nop
84: e0 c1 rjmp .+960 ; 0x446 <__bad_interrupt>
86: 00 00 nop
88: de c1 rjmp .+956 ; 0x446 <__bad_interrupt>
8a: 00 00 nop
8c: dc c1 rjmp .+952 ; 0x446 <__bad_interrupt>
8e: 00 00 nop
90: da c1 rjmp .+948 ; 0x446 <__bad_interrupt>
92: 00 00 nop
94: d8 c1 rjmp .+944 ; 0x446 <__bad_interrupt>
96: 00 00 nop
98: d6 c1 rjmp .+940 ; 0x446 <__bad_interrupt>
9a: 00 00 nop
9c: 14 c3 rjmp .+1576 ; 0x6c6 <__vector_39>
9e: 00 00 nop
a0: 4f c3 rjmp .+1694 ; 0x740 <__vector_40>
a2: 00 00 nop
a4: 8a c3 rjmp .+1812 ; 0x7ba <__vector_41>
a6: 00 00 nop
a8: c5 c3 rjmp .+1930 ; 0x834 <__vector_42>
aa: 00 00 nop
ac: cc c1 rjmp .+920 ; 0x446 <__bad_interrupt>
ae: 00 00 nop
b0: ca c1 rjmp .+916 ; 0x446 <__bad_interrupt>
b2: 00 00 nop
b4: c8 c1 rjmp .+912 ; 0x446 <__bad_interrupt>
b6: 00 00 nop
b8: 0c 94 bd 0e jmp 0x1d7a ; 0x1d7a <__vector_46>
bc: 0c 94 8f 08 jmp 0x111e ; 0x111e <__vector_47>
c0: 0c 94 c7 08 jmp 0x118e ; 0x118e <__vector_48>
c4: 0c 94 ff 08 jmp 0x11fe ; 0x11fe <__vector_49>
c8: 0c 94 37 09 jmp 0x126e ; 0x126e <__vector_50>
cc: 0c 94 6f 09 jmp 0x12de ; 0x12de <__vector_51>
d0: 0c 94 a7 09 jmp 0x134e ; 0x134e <__vector_52>
d4: 0c 94 df 09 jmp 0x13be ; 0x13be <__vector_53>
d8: 0c 94 17 0a jmp 0x142e ; 0x142e <__vector_54>
dc: 0c 94 4f 0a jmp 0x149e ; 0x149e <__vector_55>
e0: 0c 94 87 0a jmp 0x150e ; 0x150e <__vector_56>
e4: b0 c1 rjmp .+864 ; 0x446 <__bad_interrupt>
e6: 00 00 nop
e8: ae c1 rjmp .+860 ; 0x446 <__bad_interrupt>
ea: 00 00 nop
ec: ac c1 rjmp .+856 ; 0x446 <__bad_interrupt>
ee: 00 00 nop
f0: aa c1 rjmp .+852 ; 0x446 <__bad_interrupt>
f2: 00 00 nop
f4: a8 c1 rjmp .+848 ; 0x446 <__bad_interrupt>
f6: 00 00 nop
f8: a6 c1 rjmp .+844 ; 0x446 <__bad_interrupt>
fa: 00 00 nop
fc: a4 c1 rjmp .+840 ; 0x446 <__bad_interrupt>
fe: 00 00 nop
100: 0c 94 96 17 jmp 0x2f2c ; 0x2f2c <__vector_64>
104: 0c 94 ce 14 jmp 0x299c ; 0x299c <__vector_65>
108: 0c 94 29 1d jmp 0x3a52 ; 0x3a52 <__vector_66>
10c: 9c c1 rjmp .+824 ; 0x446 <__bad_interrupt>
10e: 00 00 nop
110: 9a c1 rjmp .+820 ; 0x446 <__bad_interrupt>
112: 00 00 nop
114: 98 c1 rjmp .+816 ; 0x446 <__bad_interrupt>
116: 00 00 nop
118: 96 c1 rjmp .+812 ; 0x446 <__bad_interrupt>
11a: 00 00 nop
11c: e0 c1 rjmp .+960 ; 0x4de <__vector_71>
11e: 00 00 nop
120: 1b c2 rjmp .+1078 ; 0x558 <__vector_72>
122: 00 00 nop
124: 56 c2 rjmp .+1196 ; 0x5d2 <__vector_73>
126: 00 00 nop
128: 91 c2 rjmp .+1314 ; 0x64c <__vector_74>
12a: 00 00 nop
12c: 8c c1 rjmp .+792 ; 0x446 <__bad_interrupt>
12e: 00 00 nop
130: 0c 94 8b 0e jmp 0x1d16 ; 0x1d16 <__vector_76>
134: c4 c5 rjmp .+2952 ; 0xcbe <__vector_77>
136: 00 00 nop
138: fa c5 rjmp .+3060 ; 0xd2e <__vector_78>
13a: 00 00 nop
13c: 30 c6 rjmp .+3168 ; 0xd9e <__vector_79>
13e: 00 00 nop
140: 66 c6 rjmp .+3276 ; 0xe0e <__vector_80>
142: 00 00 nop
144: 9c c6 rjmp .+3384 ; 0xe7e <__vector_81>
146: 00 00 nop
148: d2 c6 rjmp .+3492 ; 0xeee <__vector_82>
14a: 00 00 nop
14c: 08 c7 rjmp .+3600 ; 0xf5e <__vector_83>
14e: 00 00 nop
150: 3e c7 rjmp .+3708 ; 0xfce <__vector_84>
152: 00 00 nop
154: 74 c7 rjmp .+3816 ; 0x103e <__vector_85>
156: 00 00 nop
158: aa c7 rjmp .+3924 ; 0x10ae <__vector_86>
15a: 00 00 nop
15c: 74 c1 rjmp .+744 ; 0x446 <__bad_interrupt>
15e: 00 00 nop
160: 72 c1 rjmp .+740 ; 0x446 <__bad_interrupt>
162: 00 00 nop
164: 70 c1 rjmp .+736 ; 0x446 <__bad_interrupt>
166: 00 00 nop
168: 6e c1 rjmp .+732 ; 0x446 <__bad_interrupt>
16a: 00 00 nop
16c: 6c c1 rjmp .+728 ; 0x446 <__bad_interrupt>
16e: 00 00 nop
170: 6a c1 rjmp .+724 ; 0x446 <__bad_interrupt>
172: 00 00 nop
174: 68 c1 rjmp .+720 ; 0x446 <__bad_interrupt>
176: 00 00 nop
178: 66 c1 rjmp .+716 ; 0x446 <__bad_interrupt>
17a: 00 00 nop
17c: 64 c1 rjmp .+712 ; 0x446 <__bad_interrupt>
17e: 00 00 nop
180: 62 c1 rjmp .+708 ; 0x446 <__bad_interrupt>
182: 00 00 nop
184: 60 c1 rjmp .+704 ; 0x446 <__bad_interrupt>
186: 00 00 nop
188: 5e c1 rjmp .+700 ; 0x446 <__bad_interrupt>
18a: 00 00 nop
18c: 5c c1 rjmp .+696 ; 0x446 <__bad_interrupt>
18e: 00 00 nop
190: 5a c1 rjmp .+692 ; 0x446 <__bad_interrupt>
192: 00 00 nop
194: 58 c1 rjmp .+688 ; 0x446 <__bad_interrupt>
196: 00 00 nop
198: 56 c1 rjmp .+684 ; 0x446 <__bad_interrupt>
19a: 00 00 nop
19c: 54 c1 rjmp .+680 ; 0x446 <__bad_interrupt>
19e: 00 00 nop
1a0: 52 c1 rjmp .+676 ; 0x446 <__bad_interrupt>
1a2: 00 00 nop
1a4: 50 c1 rjmp .+672 ; 0x446 <__bad_interrupt>
1a6: 00 00 nop
1a8: 4e c1 rjmp .+668 ; 0x446 <__bad_interrupt>
1aa: 00 00 nop
1ac: 0c 94 ef 0e jmp 0x1dde ; 0x1dde <__vector_107>
1b0: 0c 94 bf 0a jmp 0x157e ; 0x157e <__vector_108>
1b4: 0c 94 f7 0a jmp 0x15ee ; 0x15ee <__vector_109>
1b8: 0c 94 2f 0b jmp 0x165e ; 0x165e <__vector_110>
1bc: 0c 94 67 0b jmp 0x16ce ; 0x16ce <__vector_111>
1c0: 0c 94 9f 0b jmp 0x173e ; 0x173e <__vector_112>
1c4: 0c 94 d7 0b jmp 0x17ae ; 0x17ae <__vector_113>
1c8: 0c 94 0f 0c jmp 0x181e ; 0x181e <__vector_114>
1cc: 0c 94 47 0c jmp 0x188e ; 0x188e <__vector_115>
1d0: 0c 94 7f 0c jmp 0x18fe ; 0x18fe <__vector_116>
1d4: 0c 94 b7 0c jmp 0x196e ; 0x196e <__vector_117>
1d8: 36 c1 rjmp .+620 ; 0x446 <__bad_interrupt>
1da: 00 00 nop
1dc: 34 c1 rjmp .+616 ; 0x446 <__bad_interrupt>
1de: 00 00 nop
1e0: 32 c1 rjmp .+612 ; 0x446 <__bad_interrupt>
1e2: 00 00 nop
1e4: 30 c1 rjmp .+608 ; 0x446 <__bad_interrupt>
1e6: 00 00 nop
1e8: 2e c1 rjmp .+604 ; 0x446 <__bad_interrupt>
1ea: 00 00 nop
1ec: 2c c1 rjmp .+600 ; 0x446 <__bad_interrupt>
1ee: 00 00 nop
1f0: 2a c1 rjmp .+596 ; 0x446 <__bad_interrupt>
1f2: 00 00 nop
1f4: 28 c1 rjmp .+592 ; 0x446 <__bad_interrupt>
1f6: 00 00 nop
1f8: 26 c1 rjmp .+588 ; 0x446 <__bad_interrupt>
1fa: 00 00 nop
1fc: fa 12 cpse r15, r26
1fe: 0d 13 cpse r16, r29
200: 20 13 cpse r18, r16
202: 33 13 cpse r19, r19
204: 46 13 cpse r20, r22
206: 59 13 cpse r21, r25
208: 6c 13 cpse r22, r28
20a: 7f 13 cpse r23, r31
20c: 03 6e ori r16, 0xE3 ; 227
20e: db 36 cpi r29, 0x6B ; 107
210: 3d 9a sbi 0x07, 5 ; 7
212: 99 99 sbic 0x13, 1 ; 19
214: 99 3d cpi r25, 0xD9 ; 217
216: ab aa std Y+51, r10 ; 0x33
218: aa 2a or r10, r26
21a: 3e 00 .word 0x003e ; ????
21c: 00 00 nop
21e: 80 3f cpi r24, 0xF0 ; 240
220: 08 4a sbci r16, 0xA8 ; 168
222: d7 3b cpi r29, 0xB7 ; 183
224: 3b ce rjmp .-906 ; 0xfffffe9c <__eeprom_end+0xff7efe9c>
226: 01 6e ori r16, 0xE1 ; 225
228: 84 bc out 0x24, r8 ; 36
22a: bf fd .word 0xfdbf ; ????
22c: c1 2f mov r28, r17
22e: 3d 6c ori r19, 0xCD ; 205
230: 74 31 cpi r23, 0x14 ; 20
232: 9a bd out 0x2a, r25 ; 42
234: 56 83 std Z+6, r21 ; 0x06
236: 3d da rcall .-2950 ; 0xfffff6b2 <__eeprom_end+0xff7ef6b2>
238: 3d 00 .word 0x003d ; ????
23a: c7 7f andi r28, 0xF7 ; 247
23c: 11 be out 0x31, r1 ; 49
23e: d9 e4 ldi r29, 0x49 ; 73
240: bb 4c sbci r27, 0xCB ; 203
242: 3e 91 ld r19, -X
244: 6b aa std Y+51, r6 ; 0x33
246: aa be out 0x3a, r10 ; 58
248: 00 00 nop
24a: 00 80 ld r0, Z
24c: 3f 07 cpc r19, r31
24e: 2c 7a andi r18, 0xAC ; 172
250: a5 ba out 0x15, r10 ; 21
252: 6c c5 rjmp .+2776 ; 0xd2c <__vector_77+0x6e>
254: 90 da rcall .-2784 ; 0xfffff776 <__eeprom_end+0xff7ef776>
256: 3b 93 .word 0x933b ; ????
258: 65 fc sbrc r6, 5
25a: 8b bc out 0x2b, r8 ; 43
25c: 53 f8 bld r5, 3
25e: 10 fd sbrc r17, 0
260: 3c 56 subi r19, 0x6C ; 108
262: 92 83 std Z+2, r25 ; 0x02
264: 4d bd out 0x2d, r20 ; 45
266: 87 9d mul r24, r7
268: 3a b6 in r3, 0x3a ; 58
26a: 3d cb rjmp .-2438 ; 0xfffff8e6 <__eeprom_end+0xff7ef8e6>
26c: c9 bf out 0x39, r28 ; 57
26e: 5b be out 0x3b, r5 ; 59
270: 73 da rcall .-2842 ; 0xfffff758 <__eeprom_end+0xff7ef758>
272: 0f c9 rjmp .-3554 ; 0xfffff492 <__eeprom_end+0xff7ef492>
274: 3f 08 sbc r3, r15
276: 00 00 nop
278: 00 be out 0x30, r0 ; 48
27a: 92 24 eor r9, r2
27c: 49 12 cpse r4, r25
27e: 3e ab std Y+54, r19 ; 0x36
280: aa aa std Y+50, r10 ; 0x32
282: 2a be out 0x3a, r2 ; 58
284: cd cc rjmp .-1638 ; 0xfffffc20 <__eeprom_end+0xff7efc20>
286: cc 4c sbci r28, 0xCC ; 204
288: 3e 00 .word 0x003e ; ????
28a: 00 00 nop
28c: 80 be out 0x30, r8 ; 48
28e: ab aa std Y+51, r10 ; 0x33
290: aa aa std Y+50, r10 ; 0x32
292: 3e 00 .word 0x003e ; ????
294: 00 00 nop
296: 00 bf out 0x30, r16 ; 48
298: 00 00 nop
29a: 00 80 ld r0, Z
29c: 3f 00 .word 0x003f ; ????
29e: 00 00 nop
2a0: 00 00 nop
2a2: 08 41 sbci r16, 0x18 ; 24
2a4: 78 d3 rcall .+1776 ; 0x996 <__vector_15+0x58>
2a6: bb 43 sbci r27, 0x3B ; 59
2a8: 87 d1 rcall .+782 ; 0x5b8 <__vector_72+0x60>
2aa: 13 3d cpi r17, 0xD3 ; 211
2ac: 19 0e add r1, r25
2ae: 3c c3 rjmp .+1656 ; 0x928 <__vector_14+0x5a>
2b0: bd 42 sbci r27, 0x2D ; 45
2b2: 82 ad ldd r24, Z+58 ; 0x3a
2b4: 2b 3e cpi r18, 0xEB ; 235
2b6: 68 ec ldi r22, 0xC8 ; 200
2b8: 82 76 andi r24, 0x62 ; 98
2ba: be d9 rcall .-3204 ; 0xfffff638 <__eeprom_end+0xff7ef638>
2bc: 8f e1 ldi r24, 0x1F ; 31
2be: a9 3e cpi r26, 0xE9 ; 233
2c0: 4c 80 ldd r4, Y+4 ; 0x04
2c2: ef ff .word 0xffef ; ????
2c4: be 01 movw r22, r28
2c6: c4 ff sbrs r28, 4
2c8: 7f 3f cpi r23, 0xFF ; 255
2ca: 00 00 nop
2cc: 00 00 nop
2ce: 00 07 cpc r16, r16
2d0: 63 42 sbci r22, 0x23 ; 35
2d2: 36 b7 in r19, 0x36 ; 54
2d4: 9b d8 rcall .-3786 ; 0xfffff40c <__eeprom_end+0xff7ef40c>
2d6: a7 1a sub r10, r23
2d8: 39 68 ori r19, 0x89 ; 137
2da: 56 18 sub r5, r6
2dc: ae ba out 0x1e, r10 ; 30
2de: ab 55 subi r26, 0x5B ; 91
2e0: 8c 1d adc r24, r12
2e2: 3c b7 in r19, 0x3c ; 60
2e4: cc 57 subi r28, 0x7C ; 124
2e6: 63 bd out 0x23, r22 ; 35
2e8: 6d ed ldi r22, 0xDD ; 221
2ea: fd 75 andi r31, 0x5D ; 93
2ec: 3e f6 brtc .-114 ; 0x27c <__SREG__+0x23d>
2ee: 17 72 andi r17, 0x27 ; 39
2f0: 31 bf out 0x31, r19 ; 49
2f2: 00 00 nop
2f4: 00 80 ld r0, Z
2f6: 3f 00 .word 0x003f ; ????
000002f8 <__trampolines_end>:
2f8: 6e 61 ori r22, 0x1E ; 30
2fa: 6e 00 .word 0x006e ; ????
000002fc <__c.2332>:
2fc: 69 6e 66 00 00 40 7a 10 f3 5a 00 a0 72 4e 18 09 inf..@z..Z..rN..
30c: 00 10 a5 d4 e8 00 00 e8 76 48 17 00 00 e4 0b 54 ........vH.....T
31c: 02 00 00 ca 9a 3b 00 00 00 e1 f5 05 00 00 80 96 .....;..........
32c: 98 00 00 00 40 42 0f 00 00 00 a0 86 01 00 00 00 ....@B..........
33c: 10 27 00 00 00 00 e8 03 00 00 00 00 64 00 00 00 .'..........d...
34c: 00 00 0a 00 00 00 00 00 01 00 00 00 00 00 2c 76 ..............,v
35c: d8 88 dc 67 4f 08 23 df c1 df ae 59 e1 b1 b7 96 ...gO.#....Y....
36c: e5 e3 e4 53 c6 3a e6 51 99 76 96 e8 e6 c2 84 26 ...S.:.Q.v.....&
37c: eb 89 8c 9b 62 ed 40 7c 6f fc ef bc 9c 9f 40 f2 ....b.@|o.....@.
38c: ba a5 6f a5 f4 90 05 5a 2a f7 5c 93 6b 6c f9 67 ..o....Z*.\.kl.g
39c: 6d c1 1b fc e0 e4 0d 47 fe f5 20 e6 b5 00 d0 ed m......G.. .....
3ac: 90 2e 03 00 94 35 77 05 00 80 84 1e 08 00 00 20 .....5w........
3bc: 4e 0a 00 00 00 c8 0c 33 33 33 33 0f 98 6e 12 83 N......3333..n..
3cc: 11 41 ef 8d 21 14 89 3b e6 55 16 cf fe e6 db 18 .A..!..;.U......
3dc: d1 84 4b 38 1b f7 7c 1d 90 1d a4 bb e4 24 20 32 ..K8..|......$ 2
3ec: 84 72 5e 22 81 00 c9 f1 24 ec a1 e5 3d 27 .r^"....$...='
000003fa <__ctors_end>:
3fa: 11 24 eor r1, r1
3fc: 1f be out 0x3f, r1 ; 63
3fe: cf ef ldi r28, 0xFF ; 255
400: cd bf out 0x3d, r28 ; 61
402: df e3 ldi r29, 0x3F ; 63
404: de bf out 0x3e, r29 ; 62
406: 00 e0 ldi r16, 0x00 ; 0
408: 0c bf out 0x3c, r16 ; 60
40a: 18 be out 0x38, r1 ; 56
40c: 19 be out 0x39, r1 ; 57
40e: 1a be out 0x3a, r1 ; 58
410: 1b be out 0x3b, r1 ; 59
00000412 <__do_copy_data>:
412: 11 e2 ldi r17, 0x21 ; 33
414: a0 e0 ldi r26, 0x00 ; 0
416: b0 e2 ldi r27, 0x20 ; 32
418: ee e3 ldi r30, 0x3E ; 62
41a: f8 e7 ldi r31, 0x78 ; 120
41c: 00 e0 ldi r16, 0x00 ; 0
41e: 0b bf out 0x3b, r16 ; 59
420: 02 c0 rjmp .+4 ; 0x426 <__do_copy_data+0x14>
422: 07 90 elpm r0, Z+
424: 0d 92 st X+, r0
426: a2 3c cpi r26, 0xC2 ; 194
428: b1 07 cpc r27, r17
42a: d9 f7 brne .-10 ; 0x422 <__do_copy_data+0x10>
42c: 1b be out 0x3b, r1 ; 59
0000042e <__do_clear_bss>:
42e: 29 e2 ldi r18, 0x29 ; 41
430: a2 ec ldi r26, 0xC2 ; 194
432: b1 e2 ldi r27, 0x21 ; 33
434: 01 c0 rjmp .+2 ; 0x438 <.do_clear_bss_start>
00000436 <.do_clear_bss_loop>:
436: 1d 92 st X+, r1
00000438 <.do_clear_bss_start>:
438: ad 3a cpi r26, 0xAD ; 173
43a: b2 07 cpc r27, r18
43c: e1 f7 brne .-8 ; 0x436 <.do_clear_bss_loop>
43e: 0e 94 ce 30 call 0x619c ; 0x619c <main>
442: 0c 94 1d 3c jmp 0x783a ; 0x783a <_exit>
00000446 <__bad_interrupt>:
446: dc cd rjmp .-1096 ; 0x0 <__vectors>
00000448 <sysclk_init>:
# include <nvm.h>
#endif
void sysclk_init(void)
{
448: cf 93 push r28
44a: df 93 push r29
44c: 1f 92 push r1
44e: 1f 92 push r1
450: cd b7 in r28, 0x3d ; 61
452: de b7 in r29, 0x3e ; 62
#endif
bool need_rc2mhz = false;
/* Turn off all peripheral clocks that can be turned off. */
for (i = 0; i <= SYSCLK_PORT_F; i++) {
*(reg++) = 0xff;
454: 8f ef ldi r24, 0xFF ; 255
456: 80 93 70 00 sts 0x0070, r24 ; 0x800070 <__TEXT_REGION_LENGTH__+0x700070>
45a: 80 93 71 00 sts 0x0071, r24 ; 0x800071 <__TEXT_REGION_LENGTH__+0x700071>
45e: 80 93 72 00 sts 0x0072, r24 ; 0x800072 <__TEXT_REGION_LENGTH__+0x700072>
462: 80 93 73 00 sts 0x0073, r24 ; 0x800073 <__TEXT_REGION_LENGTH__+0x700073>
466: 80 93 74 00 sts 0x0074, r24 ; 0x800074 <__TEXT_REGION_LENGTH__+0x700074>
46a: 80 93 75 00 sts 0x0075, r24 ; 0x800075 <__TEXT_REGION_LENGTH__+0x700075>
46e: 80 93 76 00 sts 0x0076, r24 ; 0x800076 <__TEXT_REGION_LENGTH__+0x700076>
typedef uint8_t irqflags_t;
static inline irqflags_t cpu_irq_save(void)
{
volatile irqflags_t flags = SREG;
472: 8f b7 in r24, 0x3f ; 63
474: 8a 83 std Y+2, r24 ; 0x02
cpu_irq_disable();
476: f8 94 cli
return flags;
478: 9a 81 ldd r25, Y+2 ; 0x02
irqflags_t flags;
Assert(id != OSC_ID_USBSOF);
flags = cpu_irq_save();
OSC.CTRL |= id;
47a: e0 e5 ldi r30, 0x50 ; 80
47c: f0 e0 ldi r31, 0x00 ; 0
47e: 80 81 ld r24, Z
480: 82 60 ori r24, 0x02 ; 2
482: 80 83 st Z, r24
}
static inline void cpu_irq_restore(irqflags_t flags)
{
barrier();
SREG = flags;
484: 9f bf out 0x3f, r25 ; 63
static inline bool osc_is_ready(uint8_t id)
{
Assert(id != OSC_ID_USBSOF);
return OSC.STATUS & id;
486: 81 81 ldd r24, Z+1 ; 0x01
*
* \param id A number identifying the oscillator to wait for.
*/
static inline void osc_wait_ready(uint8_t id)
{
while (!osc_is_ready(id)) {
488: 81 ff sbrs r24, 1
48a: fd cf rjmp .-6 ; 0x486 <sysclk_init+0x3e>
default:
//unhandled_case(CONFIG_SYSCLK_SOURCE);
return;
}
ccp_write_io((uint8_t *)&CLK.CTRL, CONFIG_SYSCLK_SOURCE);
48c: 61 e0 ldi r22, 0x01 ; 1
48e: 80 e4 ldi r24, 0x40 ; 64
490: 90 e0 ldi r25, 0x00 ; 0
492: 0d d2 rcall .+1050 ; 0x8ae <ccp_write_io>
typedef uint8_t irqflags_t;
static inline irqflags_t cpu_irq_save(void)
{
volatile irqflags_t flags = SREG;
494: 8f b7 in r24, 0x3f ; 63
496: 89 83 std Y+1, r24 ; 0x01
cpu_irq_disable();
498: f8 94 cli
return flags;
49a: 99 81 ldd r25, Y+1 ; 0x01
irqflags_t flags;
Assert(id != OSC_ID_USBSOF);
flags = cpu_irq_save();
OSC.CTRL &= ~id;
49c: e0 e5 ldi r30, 0x50 ; 80
49e: f0 e0 ldi r31, 0x00 ; 0
4a0: 80 81 ld r24, Z
4a2: 8e 7f andi r24, 0xFE ; 254
4a4: 80 83 st Z, r24
}
static inline void cpu_irq_restore(irqflags_t flags)
{
barrier();
SREG = flags;
4a6: 9f bf out 0x3f, r25 ; 63
}
#ifdef CONFIG_RTC_SOURCE
sysclk_rtcsrc_enable(CONFIG_RTC_SOURCE);
#endif
}
4a8: 0f 90 pop r0
4aa: 0f 90 pop r0
4ac: df 91 pop r29
4ae: cf 91 pop r28
4b0: 08 95 ret
000004b2 <sysclk_enable_module>:
void sysclk_enable_module(enum sysclk_port_id port, uint8_t id)
{
4b2: cf 93 push r28
4b4: df 93 push r29
4b6: 1f 92 push r1
4b8: cd b7 in r28, 0x3d ; 61
4ba: de b7 in r29, 0x3e ; 62
typedef uint8_t irqflags_t;
static inline irqflags_t cpu_irq_save(void)
{
volatile irqflags_t flags = SREG;
4bc: 9f b7 in r25, 0x3f ; 63
4be: 99 83 std Y+1, r25 ; 0x01
cpu_irq_disable();
4c0: f8 94 cli
return flags;
4c2: 99 81 ldd r25, Y+1 ; 0x01
irqflags_t flags = cpu_irq_save();
*((uint8_t *)&PR.PRGEN + port) &= ~id;
4c4: e8 2f mov r30, r24
4c6: f0 e0 ldi r31, 0x00 ; 0
4c8: e0 59 subi r30, 0x90 ; 144
4ca: ff 4f sbci r31, 0xFF ; 255
4cc: 60 95 com r22
4ce: 80 81 ld r24, Z
4d0: 68 23 and r22, r24
4d2: 60 83 st Z, r22
}
static inline void cpu_irq_restore(irqflags_t flags)
{
barrier();
SREG = flags;
4d4: 9f bf out 0x3f, r25 ; 63
cpu_irq_restore(flags);
}
4d6: 0f 90 pop r0
4d8: df 91 pop r29
4da: cf 91 pop r28
4dc: 08 95 ret
000004de <__vector_71>:
*
* Calls the callback function that has been set for the ADC when the channel's
* interrupt flag is set, if its interrupt has been enabled.
*/
ISR(ADCA_CH0_vect)
{
4de: 1f 92 push r1
4e0: 0f 92 push r0
4e2: 0f b6 in r0, 0x3f ; 63
4e4: 0f 92 push r0
4e6: 11 24 eor r1, r1
4e8: 08 b6 in r0, 0x38 ; 56
4ea: 0f 92 push r0
4ec: 18 be out 0x38, r1 ; 56
4ee: 09 b6 in r0, 0x39 ; 57
4f0: 0f 92 push r0
4f2: 19 be out 0x39, r1 ; 57
4f4: 0b b6 in r0, 0x3b ; 59
4f6: 0f 92 push r0
4f8: 1b be out 0x3b, r1 ; 59
4fa: 2f 93 push r18
4fc: 3f 93 push r19
4fe: 4f 93 push r20
500: 5f 93 push r21
502: 6f 93 push r22
504: 7f 93 push r23
506: 8f 93 push r24
508: 9f 93 push r25
50a: af 93 push r26
50c: bf 93 push r27
50e: ef 93 push r30
510: ff 93 push r31
adca_callback(&ADCA, ADC_CH0, adc_get_result(&ADCA, ADC_CH0));
512: 40 91 24 02 lds r20, 0x0224 ; 0x800224 <__TEXT_REGION_LENGTH__+0x700224>
516: 50 91 25 02 lds r21, 0x0225 ; 0x800225 <__TEXT_REGION_LENGTH__+0x700225>
51a: e0 91 39 25 lds r30, 0x2539 ; 0x802539 <adca_callback>
51e: f0 91 3a 25 lds r31, 0x253A ; 0x80253a <adca_callback+0x1>
522: 61 e0 ldi r22, 0x01 ; 1
524: 80 e0 ldi r24, 0x00 ; 0
526: 92 e0 ldi r25, 0x02 ; 2
528: 19 95 eicall
}
52a: ff 91 pop r31
52c: ef 91 pop r30
52e: bf 91 pop r27
530: af 91 pop r26
532: 9f 91 pop r25
534: 8f 91 pop r24
536: 7f 91 pop r23
538: 6f 91 pop r22
53a: 5f 91 pop r21
53c: 4f 91 pop r20
53e: 3f 91 pop r19
540: 2f 91 pop r18
542: 0f 90 pop r0
544: 0b be out 0x3b, r0 ; 59
546: 0f 90 pop r0
548: 09 be out 0x39, r0 ; 57
54a: 0f 90 pop r0
54c: 08 be out 0x38, r0 ; 56
54e: 0f 90 pop r0
550: 0f be out 0x3f, r0 ; 63
552: 0f 90 pop r0
554: 1f 90 pop r1
556: 18 95 reti
00000558 <__vector_72>:
*
* Calls the callback function that has been set for the ADC when the channel's
* interrupt flag is set, if its interrupt has been enabled.
*/
ISR(ADCA_CH1_vect)
{
558: 1f 92 push r1
55a: 0f 92 push r0
55c: 0f b6 in r0, 0x3f ; 63
55e: 0f 92 push r0
560: 11 24 eor r1, r1
562: 08 b6 in r0, 0x38 ; 56
564: 0f 92 push r0
566: 18 be out 0x38, r1 ; 56
568: 09 b6 in r0, 0x39 ; 57
56a: 0f 92 push r0
56c: 19 be out 0x39, r1 ; 57
56e: 0b b6 in r0, 0x3b ; 59
570: 0f 92 push r0
572: 1b be out 0x3b, r1 ; 59
574: 2f 93 push r18
576: 3f 93 push r19
578: 4f 93 push r20
57a: 5f 93 push r21
57c: 6f 93 push r22
57e: 7f 93 push r23
580: 8f 93 push r24
582: 9f 93 push r25
584: af 93 push r26
586: bf 93 push r27
588: ef 93 push r30
58a: ff 93 push r31
adca_callback(&ADCA, ADC_CH1, adc_get_result(&ADCA, ADC_CH1));
58c: 40 91 2c 02 lds r20, 0x022C ; 0x80022c <__TEXT_REGION_LENGTH__+0x70022c>
590: 50 91 2d 02 lds r21, 0x022D ; 0x80022d <__TEXT_REGION_LENGTH__+0x70022d>
594: e0 91 39 25 lds r30, 0x2539 ; 0x802539 <adca_callback>
598: f0 91 3a 25 lds r31, 0x253A ; 0x80253a <adca_callback+0x1>
59c: 62 e0 ldi r22, 0x02 ; 2
59e: 80 e0 ldi r24, 0x00 ; 0
5a0: 92 e0 ldi r25, 0x02 ; 2
5a2: 19 95 eicall
}
5a4: ff 91 pop r31
5a6: ef 91 pop r30
5a8: bf 91 pop r27
5aa: af 91 pop r26
5ac: 9f 91 pop r25
5ae: 8f 91 pop r24
5b0: 7f 91 pop r23
5b2: 6f 91 pop r22
5b4: 5f 91 pop r21
5b6: 4f 91 pop r20
5b8: 3f 91 pop r19
5ba: 2f 91 pop r18
5bc: 0f 90 pop r0
5be: 0b be out 0x3b, r0 ; 59
5c0: 0f 90 pop r0
5c2: 09 be out 0x39, r0 ; 57
5c4: 0f 90 pop r0
5c6: 08 be out 0x38, r0 ; 56
5c8: 0f 90 pop r0
5ca: 0f be out 0x3f, r0 ; 63
5cc: 0f 90 pop r0
5ce: 1f 90 pop r1
5d0: 18 95 reti
000005d2 <__vector_73>:
*
* Calls the callback function that has been set for the ADC when the channel's
* interrupt flag is set, if its interrupt has been enabled.
*/
ISR(ADCA_CH2_vect)
{
5d2: 1f 92 push r1
5d4: 0f 92 push r0
5d6: 0f b6 in r0, 0x3f ; 63
5d8: 0f 92 push r0
5da: 11 24 eor r1, r1
5dc: 08 b6 in r0, 0x38 ; 56
5de: 0f 92 push r0
5e0: 18 be out 0x38, r1 ; 56
5e2: 09 b6 in r0, 0x39 ; 57
5e4: 0f 92 push r0
5e6: 19 be out 0x39, r1 ; 57
5e8: 0b b6 in r0, 0x3b ; 59
5ea: 0f 92 push r0
5ec: 1b be out 0x3b, r1 ; 59
5ee: 2f 93 push r18
5f0: 3f 93 push r19
5f2: 4f 93 push r20
5f4: 5f 93 push r21
5f6: 6f 93 push r22
5f8: 7f 93 push r23
5fa: 8f 93 push r24
5fc: 9f 93 push r25
5fe: af 93 push r26
600: bf 93 push r27
602: ef 93 push r30
604: ff 93 push r31
adca_callback(&ADCA, ADC_CH2, adc_get_result(&ADCA, ADC_CH2));
606: 40 91 34 02 lds r20, 0x0234 ; 0x800234 <__TEXT_REGION_LENGTH__+0x700234>
60a: 50 91 35 02 lds r21, 0x0235 ; 0x800235 <__TEXT_REGION_LENGTH__+0x700235>
60e: e0 91 39 25 lds r30, 0x2539 ; 0x802539 <adca_callback>
612: f0 91 3a 25 lds r31, 0x253A ; 0x80253a <adca_callback+0x1>
616: 64 e0 ldi r22, 0x04 ; 4
618: 80 e0 ldi r24, 0x00 ; 0
61a: 92 e0 ldi r25, 0x02 ; 2
61c: 19 95 eicall
}
61e: ff 91 pop r31
620: ef 91 pop r30
622: bf 91 pop r27
624: af 91 pop r26
626: 9f 91 pop r25
628: 8f 91 pop r24
62a: 7f 91 pop r23
62c: 6f 91 pop r22
62e: 5f 91 pop r21
630: 4f 91 pop r20
632: 3f 91 pop r19
634: 2f 91 pop r18
636: 0f 90 pop r0
638: 0b be out 0x3b, r0 ; 59
63a: 0f 90 pop r0
63c: 09 be out 0x39, r0 ; 57
63e: 0f 90 pop r0
640: 08 be out 0x38, r0 ; 56
642: 0f 90 pop r0
644: 0f be out 0x3f, r0 ; 63
646: 0f 90 pop r0
648: 1f 90 pop r1
64a: 18 95 reti
0000064c <__vector_74>:
*
* Calls the callback function that has been set for the ADC when the channel's
* interrupt flag is set, if its interrupt has been enabled.
*/
ISR(ADCA_CH3_vect)
{
64c: 1f 92 push r1
64e: 0f 92 push r0
650: 0f b6 in r0, 0x3f ; 63
652: 0f 92 push r0
654: 11 24 eor r1, r1
656: 08 b6 in r0, 0x38 ; 56
658: 0f 92 push r0
65a: 18 be out 0x38, r1 ; 56
65c: 09 b6 in r0, 0x39 ; 57
65e: 0f 92 push r0
660: 19 be out 0x39, r1 ; 57
662: 0b b6 in r0, 0x3b ; 59
664: 0f 92 push r0
666: 1b be out 0x3b, r1 ; 59
668: 2f 93 push r18
66a: 3f 93 push r19
66c: 4f 93 push r20
66e: 5f 93 push r21
670: 6f 93 push r22
672: 7f 93 push r23
674: 8f 93 push r24
676: 9f 93 push r25
678: af 93 push r26
67a: bf 93 push r27
67c: ef 93 push r30
67e: ff 93 push r31
adca_callback(&ADCA, ADC_CH3, adc_get_result(&ADCA, ADC_CH3));
680: 40 91 3c 02 lds r20, 0x023C ; 0x80023c <__TEXT_REGION_LENGTH__+0x70023c>
684: 50 91 3d 02 lds r21, 0x023D ; 0x80023d <__TEXT_REGION_LENGTH__+0x70023d>
688: e0 91 39 25 lds r30, 0x2539 ; 0x802539 <adca_callback>
68c: f0 91 3a 25 lds r31, 0x253A ; 0x80253a <adca_callback+0x1>
690: 68 e0 ldi r22, 0x08 ; 8
692: 80 e0 ldi r24, 0x00 ; 0
694: 92 e0 ldi r25, 0x02 ; 2
696: 19 95 eicall
}
698: ff 91 pop r31
69a: ef 91 pop r30
69c: bf 91 pop r27
69e: af 91 pop r26
6a0: 9f 91 pop r25
6a2: 8f 91 pop r24
6a4: 7f 91 pop r23
6a6: 6f 91 pop r22
6a8: 5f 91 pop r21
6aa: 4f 91 pop r20
6ac: 3f 91 pop r19
6ae: 2f 91 pop r18
6b0: 0f 90 pop r0
6b2: 0b be out 0x3b, r0 ; 59
6b4: 0f 90 pop r0
6b6: 09 be out 0x39, r0 ; 57
6b8: 0f 90 pop r0
6ba: 08 be out 0x38, r0 ; 56
6bc: 0f 90 pop r0
6be: 0f be out 0x3f, r0 ; 63
6c0: 0f 90 pop r0
6c2: 1f 90 pop r1
6c4: 18 95 reti
000006c6 <__vector_39>:
*
* Calls the callback function that has been set for the ADC when the channel's
* interrupt flag is set, if its interrupt has been enabled.
*/
ISR(ADCB_CH0_vect)
{
6c6: 1f 92 push r1
6c8: 0f 92 push r0
6ca: 0f b6 in r0, 0x3f ; 63
6cc: 0f 92 push r0
6ce: 11 24 eor r1, r1
6d0: 08 b6 in r0, 0x38 ; 56
6d2: 0f 92 push r0
6d4: 18 be out 0x38, r1 ; 56
6d6: 09 b6 in r0, 0x39 ; 57
6d8: 0f 92 push r0
6da: 19 be out 0x39, r1 ; 57
6dc: 0b b6 in r0, 0x3b ; 59
6de: 0f 92 push r0
6e0: 1b be out 0x3b, r1 ; 59
6e2: 2f 93 push r18
6e4: 3f 93 push r19
6e6: 4f 93 push r20
6e8: 5f 93 push r21
6ea: 6f 93 push r22
6ec: 7f 93 push r23
6ee: 8f 93 push r24
6f0: 9f 93 push r25
6f2: af 93 push r26
6f4: bf 93 push r27
6f6: ef 93 push r30
6f8: ff 93 push r31
adcb_callback(&ADCB, ADC_CH0, adc_get_result(&ADCB, ADC_CH0));
6fa: 40 91 64 02 lds r20, 0x0264 ; 0x800264 <__TEXT_REGION_LENGTH__+0x700264>
6fe: 50 91 65 02 lds r21, 0x0265 ; 0x800265 <__TEXT_REGION_LENGTH__+0x700265>
702: e0 91 37 25 lds r30, 0x2537 ; 0x802537 <adcb_callback>
706: f0 91 38 25 lds r31, 0x2538 ; 0x802538 <adcb_callback+0x1>
70a: 61 e0 ldi r22, 0x01 ; 1
70c: 80 e4 ldi r24, 0x40 ; 64
70e: 92 e0 ldi r25, 0x02 ; 2
710: 19 95 eicall
}
712: ff 91 pop r31
714: ef 91 pop r30
716: bf 91 pop r27
718: af 91 pop r26
71a: 9f 91 pop r25
71c: 8f 91 pop r24
71e: 7f 91 pop r23
720: 6f 91 pop r22
722: 5f 91 pop r21
724: 4f 91 pop r20
726: 3f 91 pop r19
728: 2f 91 pop r18
72a: 0f 90 pop r0
72c: 0b be out 0x3b, r0 ; 59
72e: 0f 90 pop r0
730: 09 be out 0x39, r0 ; 57
732: 0f 90 pop r0
734: 08 be out 0x38, r0 ; 56
736: 0f 90 pop r0
738: 0f be out 0x3f, r0 ; 63
73a: 0f 90 pop r0
73c: 1f 90 pop r1
73e: 18 95 reti
00000740 <__vector_40>:
*
* Calls the callback function that has been set for the ADC when the channel's
* interrupt flag is set, if its interrupt has been enabled.
*/
ISR(ADCB_CH1_vect)
{
740: 1f 92 push r1
742: 0f 92 push r0
744: 0f b6 in r0, 0x3f ; 63
746: 0f 92 push r0
748: 11 24 eor r1, r1
74a: 08 b6 in r0, 0x38 ; 56
74c: 0f 92 push r0
74e: 18 be out 0x38, r1 ; 56
750: 09 b6 in r0, 0x39 ; 57
752: 0f 92 push r0
754: 19 be out 0x39, r1 ; 57
756: 0b b6 in r0, 0x3b ; 59
758: 0f 92 push r0
75a: 1b be out 0x3b, r1 ; 59
75c: 2f 93 push r18
75e: 3f 93 push r19
760: 4f 93 push r20
762: 5f 93 push r21
764: 6f 93 push r22
766: 7f 93 push r23
768: 8f 93 push r24
76a: 9f 93 push r25
76c: af 93 push r26
76e: bf 93 push r27
770: ef 93 push r30
772: ff 93 push r31
adcb_callback(&ADCB, ADC_CH1, adc_get_result(&ADCB, ADC_CH1));
774: 40 91 6c 02 lds r20, 0x026C ; 0x80026c <__TEXT_REGION_LENGTH__+0x70026c>
778: 50 91 6d 02 lds r21, 0x026D ; 0x80026d <__TEXT_REGION_LENGTH__+0x70026d>
77c: e0 91 37 25 lds r30, 0x2537 ; 0x802537 <adcb_callback>
780: f0 91 38 25 lds r31, 0x2538 ; 0x802538 <adcb_callback+0x1>
784: 62 e0 ldi r22, 0x02 ; 2
786: 80 e4 ldi r24, 0x40 ; 64
788: 92 e0 ldi r25, 0x02 ; 2
78a: 19 95 eicall
}
78c: ff 91 pop r31
78e: ef 91 pop r30
790: bf 91 pop r27
792: af 91 pop r26
794: 9f 91 pop r25
796: 8f 91 pop r24
798: 7f 91 pop r23
79a: 6f 91 pop r22
79c: 5f 91 pop r21
79e: 4f 91 pop r20
7a0: 3f 91 pop r19
7a2: 2f 91 pop r18
7a4: 0f 90 pop r0
7a6: 0b be out 0x3b, r0 ; 59
7a8: 0f 90 pop r0
7aa: 09 be out 0x39, r0 ; 57
7ac: 0f 90 pop r0
7ae: 08 be out 0x38, r0 ; 56
7b0: 0f 90 pop r0
7b2: 0f be out 0x3f, r0 ; 63
7b4: 0f 90 pop r0
7b6: 1f 90 pop r1
7b8: 18 95 reti
000007ba <__vector_41>:
*
* Calls the callback function that has been set for the ADC when the channel's
* interrupt flag is set, if its interrupt has been enabled.
*/
ISR(ADCB_CH2_vect)
{
7ba: 1f 92 push r1
7bc: 0f 92 push r0
7be: 0f b6 in r0, 0x3f ; 63
7c0: 0f 92 push r0
7c2: 11 24 eor r1, r1
7c4: 08 b6 in r0, 0x38 ; 56
7c6: 0f 92 push r0
7c8: 18 be out 0x38, r1 ; 56
7ca: 09 b6 in r0, 0x39 ; 57
7cc: 0f 92 push r0
7ce: 19 be out 0x39, r1 ; 57
7d0: 0b b6 in r0, 0x3b ; 59
7d2: 0f 92 push r0
7d4: 1b be out 0x3b, r1 ; 59
7d6: 2f 93 push r18
7d8: 3f 93 push r19
7da: 4f 93 push r20
7dc: 5f 93 push r21
7de: 6f 93 push r22
7e0: 7f 93 push r23
7e2: 8f 93 push r24
7e4: 9f 93 push r25
7e6: af 93 push r26
7e8: bf 93 push r27
7ea: ef 93 push r30
7ec: ff 93 push r31
adcb_callback(&ADCB, ADC_CH2, adc_get_result(&ADCB, ADC_CH2));
7ee: 40 91 74 02 lds r20, 0x0274 ; 0x800274 <__TEXT_REGION_LENGTH__+0x700274>
7f2: 50 91 75 02 lds r21, 0x0275 ; 0x800275 <__TEXT_REGION_LENGTH__+0x700275>
7f6: e0 91 37 25 lds r30, 0x2537 ; 0x802537 <adcb_callback>
7fa: f0 91 38 25 lds r31, 0x2538 ; 0x802538 <adcb_callback+0x1>
7fe: 64 e0 ldi r22, 0x04 ; 4
800: 80 e4 ldi r24, 0x40 ; 64
802: 92 e0 ldi r25, 0x02 ; 2
804: 19 95 eicall
}
806: ff 91 pop r31
808: ef 91 pop r30
80a: bf 91 pop r27
80c: af 91 pop r26
80e: 9f 91 pop r25
810: 8f 91 pop r24
812: 7f 91 pop r23
814: 6f 91 pop r22
816: 5f 91 pop r21
818: 4f 91 pop r20
81a: 3f 91 pop r19
81c: 2f 91 pop r18
81e: 0f 90 pop r0
820: 0b be out 0x3b, r0 ; 59
822: 0f 90 pop r0
824: 09 be out 0x39, r0 ; 57
826: 0f 90 pop r0
828: 08 be out 0x38, r0 ; 56
82a: 0f 90 pop r0
82c: 0f be out 0x3f, r0 ; 63
82e: 0f 90 pop r0
830: 1f 90 pop r1
832: 18 95 reti
00000834 <__vector_42>:
*
* Calls the callback function that has been set for the ADC when the channel's
* interrupt flag is set, if its interrupt has been enabled.
*/
ISR(ADCB_CH3_vect)
{
834: 1f 92 push r1
836: 0f 92 push r0
838: 0f b6 in r0, 0x3f ; 63
83a: 0f 92 push r0
83c: 11 24 eor r1, r1
83e: 08 b6 in r0, 0x38 ; 56
840: 0f 92 push r0
842: 18 be out 0x38, r1 ; 56
844: 09 b6 in r0, 0x39 ; 57
846: 0f 92 push r0
848: 19 be out 0x39, r1 ; 57
84a: 0b b6 in r0, 0x3b ; 59
84c: 0f 92 push r0
84e: 1b be out 0x3b, r1 ; 59
850: 2f 93 push r18
852: 3f 93 push r19
854: 4f 93 push r20
856: 5f 93 push r21
858: 6f 93 push r22
85a: 7f 93 push r23
85c: 8f 93 push r24
85e: 9f 93 push r25
860: af 93 push r26
862: bf 93 push r27
864: ef 93 push r30
866: ff 93 push r31
adcb_callback(&ADCB, ADC_CH3, adc_get_result(&ADCB, ADC_CH3));
868: 40 91 7c 02 lds r20, 0x027C ; 0x80027c <__TEXT_REGION_LENGTH__+0x70027c>
86c: 50 91 7d 02 lds r21, 0x027D ; 0x80027d <__TEXT_REGION_LENGTH__+0x70027d>
870: e0 91 37 25 lds r30, 0x2537 ; 0x802537 <adcb_callback>
874: f0 91 38 25 lds r31, 0x2538 ; 0x802538 <adcb_callback+0x1>
878: 68 e0 ldi r22, 0x08 ; 8
87a: 80 e4 ldi r24, 0x40 ; 64
87c: 92 e0 ldi r25, 0x02 ; 2
87e: 19 95 eicall
}
880: ff 91 pop r31
882: ef 91 pop r30
884: bf 91 pop r27
886: af 91 pop r26
888: 9f 91 pop r25
88a: 8f 91 pop r24
88c: 7f 91 pop r23
88e: 6f 91 pop r22
890: 5f 91 pop r21
892: 4f 91 pop r20
894: 3f 91 pop r19
896: 2f 91 pop r18
898: 0f 90 pop r0
89a: 0b be out 0x3b, r0 ; 59
89c: 0f 90 pop r0
89e: 09 be out 0x39, r0 ; 57
8a0: 0f 90 pop r0
8a2: 08 be out 0x38, r0 ; 56
8a4: 0f 90 pop r0
8a6: 0f be out 0x3f, r0 ; 63
8a8: 0f 90 pop r0
8aa: 1f 90 pop r1
8ac: 18 95 reti
000008ae <ccp_write_io>:
PUBLIC_FUNCTION(ccp_write_io)
#if defined(__GNUC__)
out RAMPZ, r1 // Reset bits 23:16 of Z
8ae: 1b be out 0x3b, r1 ; 59
movw r30, r24 // Load addr into Z
8b0: fc 01 movw r30, r24
ldi r18, CCP_IOREG // Load magic CCP value
8b2: 28 ed ldi r18, 0xD8 ; 216
out CCP, r18 // Start CCP handshake
8b4: 24 bf out 0x34, r18 ; 52
st Z, r22 // Write value to I/O register
8b6: 60 83 st Z, r22
ret // Return to caller
8b8: 08 95 ret
000008ba <nvm_read_byte>:
#endif
#ifndef __DOXYGEN__
PUBLIC_FUNCTION(nvm_read_byte)
#if defined(__GNUC__)
lds r20, NVM_CMD ; Store NVM command register
8ba: 40 91 ca 01 lds r20, 0x01CA ; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca>
mov ZL, r22 ; Load byte index into low byte of Z.
8be: e6 2f mov r30, r22
mov ZH, r23 ; Load high byte into Z.
8c0: f7 2f mov r31, r23
sts NVM_CMD, r24 ; Load prepared command into NVM Command register.
8c2: 80 93 ca 01 sts 0x01CA, r24 ; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca>
lpm r24, Z ; Perform an LPM to read out byte
8c6: 84 91 lpm r24, Z
sts NVM_CMD, r20 ; Restore NVM command register
8c8: 40 93 ca 01 sts 0x01CA, r20 ; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca>
sts NVM_CMD, r16 ; Load prepared command into NVM Command register.
lpm r16, Z ; Perform an LPM to read out byte
sts NVM_CMD, r20 ; Restore NVM command register
#endif
ret
8cc: 08 95 ret
000008ce <__vector_14>:
{
cpu_irq_restore(iflags);
return;
}
cpu_irq_restore(iflags);
}
8ce: 1f 92 push r1
8d0: 0f 92 push r0
8d2: 0f b6 in r0, 0x3f ; 63
8d4: 0f 92 push r0
8d6: 11 24 eor r1, r1
8d8: 08 b6 in r0, 0x38 ; 56
8da: 0f 92 push r0
8dc: 18 be out 0x38, r1 ; 56
8de: 09 b6 in r0, 0x39 ; 57
8e0: 0f 92 push r0
8e2: 19 be out 0x39, r1 ; 57
8e4: 0b b6 in r0, 0x3b ; 59
8e6: 0f 92 push r0
8e8: 1b be out 0x3b, r1 ; 59
8ea: 2f 93 push r18
8ec: 3f 93 push r19
8ee: 4f 93 push r20
8f0: 5f 93 push r21
8f2: 6f 93 push r22
8f4: 7f 93 push r23
8f6: 8f 93 push r24
8f8: 9f 93 push r25
8fa: af 93 push r26
8fc: bf 93 push r27
8fe: ef 93 push r30
900: ff 93 push r31
902: e0 91 0e 22 lds r30, 0x220E ; 0x80220e <tc_tcc0_ovf_callback>
906: f0 91 0f 22 lds r31, 0x220F ; 0x80220f <tc_tcc0_ovf_callback+0x1>
90a: 30 97 sbiw r30, 0x00 ; 0
90c: 09 f0 breq .+2 ; 0x910 <__vector_14+0x42>
90e: 19 95 eicall
910: ff 91 pop r31
912: ef 91 pop r30
914: bf 91 pop r27
916: af 91 pop r26
918: 9f 91 pop r25
91a: 8f 91 pop r24
91c: 7f 91 pop r23
91e: 6f 91 pop r22
920: 5f 91 pop r21
922: 4f 91 pop r20
924: 3f 91 pop r19
926: 2f 91 pop r18
928: 0f 90 pop r0
92a: 0b be out 0x3b, r0 ; 59
92c: 0f 90 pop r0
92e: 09 be out 0x39, r0 ; 57
930: 0f 90 pop r0
932: 08 be out 0x38, r0 ; 56
934: 0f 90 pop r0
936: 0f be out 0x3f, r0 ; 63
938: 0f 90 pop r0
93a: 1f 90 pop r1
93c: 18 95 reti
0000093e <__vector_15>:
93e: 1f 92 push r1
940: 0f 92 push r0
942: 0f b6 in r0, 0x3f ; 63
944: 0f 92 push r0
946: 11 24 eor r1, r1
948: 08 b6 in r0, 0x38 ; 56
94a: 0f 92 push r0
94c: 18 be out 0x38, r1 ; 56
94e: 09 b6 in r0, 0x39 ; 57
950: 0f 92 push r0
952: 19 be out 0x39, r1 ; 57
954: 0b b6 in r0, 0x3b ; 59
956: 0f 92 push r0
958: 1b be out 0x3b, r1 ; 59
95a: 2f 93 push r18
95c: 3f 93 push r19
95e: 4f 93 push r20
960: 5f 93 push r21
962: 6f 93 push r22
964: 7f 93 push r23
966: 8f 93 push r24
968: 9f 93 push r25
96a: af 93 push r26
96c: bf 93 push r27
96e: ef 93 push r30
970: ff 93 push r31
972: e0 91 0c 22 lds r30, 0x220C ; 0x80220c <tc_tcc0_err_callback>
976: f0 91 0d 22 lds r31, 0x220D ; 0x80220d <tc_tcc0_err_callback+0x1>
97a: 30 97 sbiw r30, 0x00 ; 0
97c: 09 f0 breq .+2 ; 0x980 <__vector_15+0x42>
97e: 19 95 eicall
980: ff 91 pop r31
982: ef 91 pop r30
984: bf 91 pop r27
986: af 91 pop r26
988: 9f 91 pop r25
98a: 8f 91 pop r24
98c: 7f 91 pop r23
98e: 6f 91 pop r22
990: 5f 91 pop r21
992: 4f 91 pop r20
994: 3f 91 pop r19
996: 2f 91 pop r18
998: 0f 90 pop r0
99a: 0b be out 0x3b, r0 ; 59
99c: 0f 90 pop r0
99e: 09 be out 0x39, r0 ; 57
9a0: 0f 90 pop r0
9a2: 08 be out 0x38, r0 ; 56
9a4: 0f 90 pop r0
9a6: 0f be out 0x3f, r0 ; 63
9a8: 0f 90 pop r0
9aa: 1f 90 pop r1
9ac: 18 95 reti
000009ae <__vector_17>:
9ae: 1f 92 push r1
9b0: 0f 92 push r0
9b2: 0f b6 in r0, 0x3f ; 63
9b4: 0f 92 push r0
9b6: 11 24 eor r1, r1
9b8: 08 b6 in r0, 0x38 ; 56
9ba: 0f 92 push r0
9bc: 18 be out 0x38, r1 ; 56
9be: 09 b6 in r0, 0x39 ; 57
9c0: 0f 92 push r0
9c2: 19 be out 0x39, r1 ; 57
9c4: 0b b6 in r0, 0x3b ; 59
9c6: 0f 92 push r0
9c8: 1b be out 0x3b, r1 ; 59
9ca: 2f 93 push r18
9cc: 3f 93 push r19
9ce: 4f 93 push r20
9d0: 5f 93 push r21
9d2: 6f 93 push r22
9d4: 7f 93 push r23
9d6: 8f 93 push r24
9d8: 9f 93 push r25
9da: af 93 push r26
9dc: bf 93 push r27
9de: ef 93 push r30
9e0: ff 93 push r31
9e2: e0 91 0a 22 lds r30, 0x220A ; 0x80220a <tc_tcc0_ccb_callback>
9e6: f0 91 0b 22 lds r31, 0x220B ; 0x80220b <tc_tcc0_ccb_callback+0x1>
9ea: 30 97 sbiw r30, 0x00 ; 0
9ec: 09 f0 breq .+2 ; 0x9f0 <__vector_17+0x42>
9ee: 19 95 eicall
9f0: ff 91 pop r31
9f2: ef 91 pop r30
9f4: bf 91 pop r27
9f6: af 91 pop r26
9f8: 9f 91 pop r25
9fa: 8f 91 pop r24
9fc: 7f 91 pop r23
9fe: 6f 91 pop r22
a00: 5f 91 pop r21
a02: 4f 91 pop r20
a04: 3f 91 pop r19
a06: 2f 91 pop r18
a08: 0f 90 pop r0
a0a: 0b be out 0x3b, r0 ; 59
a0c: 0f 90 pop r0
a0e: 09 be out 0x39, r0 ; 57
a10: 0f 90 pop r0
a12: 08 be out 0x38, r0 ; 56
a14: 0f 90 pop r0
a16: 0f be out 0x3f, r0 ; 63
a18: 0f 90 pop r0
a1a: 1f 90 pop r1
a1c: 18 95 reti
00000a1e <__vector_18>:
a1e: 1f 92 push r1
a20: 0f 92 push r0
a22: 0f b6 in r0, 0x3f ; 63
a24: 0f 92 push r0
a26: 11 24 eor r1, r1
a28: 08 b6 in r0, 0x38 ; 56
a2a: 0f 92 push r0
a2c: 18 be out 0x38, r1 ; 56
a2e: 09 b6 in r0, 0x39 ; 57
a30: 0f 92 push r0
a32: 19 be out 0x39, r1 ; 57
a34: 0b b6 in r0, 0x3b ; 59
a36: 0f 92 push r0
a38: 1b be out 0x3b, r1 ; 59
a3a: 2f 93 push r18
a3c: 3f 93 push r19
a3e: 4f 93 push r20
a40: 5f 93 push r21
a42: 6f 93 push r22
a44: 7f 93 push r23
a46: 8f 93 push r24
a48: 9f 93 push r25
a4a: af 93 push r26
a4c: bf 93 push r27
a4e: ef 93 push r30
a50: ff 93 push r31
a52: e0 91 08 22 lds r30, 0x2208 ; 0x802208 <tc_tcc0_ccc_callback>
a56: f0 91 09 22 lds r31, 0x2209 ; 0x802209 <tc_tcc0_ccc_callback+0x1>
a5a: 30 97 sbiw r30, 0x00 ; 0
a5c: 09 f0 breq .+2 ; 0xa60 <__vector_18+0x42>
a5e: 19 95 eicall
a60: ff 91 pop r31
a62: ef 91 pop r30
a64: bf 91 pop r27
a66: af 91 pop r26
a68: 9f 91 pop r25
a6a: 8f 91 pop r24
a6c: 7f 91 pop r23
a6e: 6f 91 pop r22
a70: 5f 91 pop r21
a72: 4f 91 pop r20
a74: 3f 91 pop r19
a76: 2f 91 pop r18
a78: 0f 90 pop r0
a7a: 0b be out 0x3b, r0 ; 59
a7c: 0f 90 pop r0
a7e: 09 be out 0x39, r0 ; 57
a80: 0f 90 pop r0
a82: 08 be out 0x38, r0 ; 56
a84: 0f 90 pop r0
a86: 0f be out 0x3f, r0 ; 63
a88: 0f 90 pop r0
a8a: 1f 90 pop r1
a8c: 18 95 reti
00000a8e <__vector_19>:
a8e: 1f 92 push r1
a90: 0f 92 push r0
a92: 0f b6 in r0, 0x3f ; 63
a94: 0f 92 push r0
a96: 11 24 eor r1, r1
a98: 08 b6 in r0, 0x38 ; 56
a9a: 0f 92 push r0
a9c: 18 be out 0x38, r1 ; 56
a9e: 09 b6 in r0, 0x39 ; 57
aa0: 0f 92 push r0
aa2: 19 be out 0x39, r1 ; 57
aa4: 0b b6 in r0, 0x3b ; 59
aa6: 0f 92 push r0
aa8: 1b be out 0x3b, r1 ; 59
aaa: 2f 93 push r18
aac: 3f 93 push r19
aae: 4f 93 push r20
ab0: 5f 93 push r21
ab2: 6f 93 push r22
ab4: 7f 93 push r23
ab6: 8f 93 push r24
ab8: 9f 93 push r25
aba: af 93 push r26
abc: bf 93 push r27
abe: ef 93 push r30
ac0: ff 93 push r31
ac2: e0 91 06 22 lds r30, 0x2206 ; 0x802206 <tc_tcc0_ccd_callback>
ac6: f0 91 07 22 lds r31, 0x2207 ; 0x802207 <tc_tcc0_ccd_callback+0x1>
aca: 30 97 sbiw r30, 0x00 ; 0
acc: 09 f0 breq .+2 ; 0xad0 <__vector_19+0x42>
ace: 19 95 eicall
ad0: ff 91 pop r31
ad2: ef 91 pop r30
ad4: bf 91 pop r27
ad6: af 91 pop r26
ad8: 9f 91 pop r25
ada: 8f 91 pop r24
adc: 7f 91 pop r23
ade: 6f 91 pop r22
ae0: 5f 91 pop r21
ae2: 4f 91 pop r20
ae4: 3f 91 pop r19
ae6: 2f 91 pop r18
ae8: 0f 90 pop r0
aea: 0b be out 0x3b, r0 ; 59
aec: 0f 90 pop r0
aee: 09 be out 0x39, r0 ; 57
af0: 0f 90 pop r0
af2: 08 be out 0x38, r0 ; 56
af4: 0f 90 pop r0
af6: 0f be out 0x3f, r0 ; 63
af8: 0f 90 pop r0
afa: 1f 90 pop r1
afc: 18 95 reti
00000afe <__vector_20>:
afe: 1f 92 push r1
b00: 0f 92 push r0
b02: 0f b6 in r0, 0x3f ; 63
b04: 0f 92 push r0
b06: 11 24 eor r1, r1
b08: 08 b6 in r0, 0x38 ; 56
b0a: 0f 92 push r0
b0c: 18 be out 0x38, r1 ; 56
b0e: 09 b6 in r0, 0x39 ; 57
b10: 0f 92 push r0
b12: 19 be out 0x39, r1 ; 57
b14: 0b b6 in r0, 0x3b ; 59
b16: 0f 92 push r0
b18: 1b be out 0x3b, r1 ; 59
b1a: 2f 93 push r18
b1c: 3f 93 push r19
b1e: 4f 93 push r20
b20: 5f 93 push r21
b22: 6f 93 push r22
b24: 7f 93 push r23
b26: 8f 93 push r24
b28: 9f 93 push r25
b2a: af 93 push r26
b2c: bf 93 push r27
b2e: ef 93 push r30
b30: ff 93 push r31
b32: e0 91 04 22 lds r30, 0x2204 ; 0x802204 <tc_tcc1_ovf_callback>
b36: f0 91 05 22 lds r31, 0x2205 ; 0x802205 <tc_tcc1_ovf_callback+0x1>
b3a: 30 97 sbiw r30, 0x00 ; 0
b3c: 09 f0 breq .+2 ; 0xb40 <__vector_20+0x42>
b3e: 19 95 eicall
b40: ff 91 pop r31
b42: ef 91 pop r30
b44: bf 91 pop r27
b46: af 91 pop r26
b48: 9f 91 pop r25
b4a: 8f 91 pop r24
b4c: 7f 91 pop r23
b4e: 6f 91 pop r22
b50: 5f 91 pop r21
b52: 4f 91 pop r20
b54: 3f 91 pop r19
b56: 2f 91 pop r18
b58: 0f 90 pop r0
b5a: 0b be out 0x3b, r0 ; 59
b5c: 0f 90 pop r0
b5e: 09 be out 0x39, r0 ; 57
b60: 0f 90 pop r0
b62: 08 be out 0x38, r0 ; 56
b64: 0f 90 pop r0
b66: 0f be out 0x3f, r0 ; 63
b68: 0f 90 pop r0
b6a: 1f 90 pop r1
b6c: 18 95 reti
00000b6e <__vector_21>:
b6e: 1f 92 push r1
b70: 0f 92 push r0
b72: 0f b6 in r0, 0x3f ; 63
b74: 0f 92 push r0
b76: 11 24 eor r1, r1
b78: 08 b6 in r0, 0x38 ; 56
b7a: 0f 92 push r0
b7c: 18 be out 0x38, r1 ; 56
b7e: 09 b6 in r0, 0x39 ; 57
b80: 0f 92 push r0
b82: 19 be out 0x39, r1 ; 57
b84: 0b b6 in r0, 0x3b ; 59
b86: 0f 92 push r0
b88: 1b be out 0x3b, r1 ; 59
b8a: 2f 93 push r18
b8c: 3f 93 push r19
b8e: 4f 93 push r20
b90: 5f 93 push r21
b92: 6f 93 push r22
b94: 7f 93 push r23
b96: 8f 93 push r24
b98: 9f 93 push r25
b9a: af 93 push r26
b9c: bf 93 push r27
b9e: ef 93 push r30
ba0: ff 93 push r31
ba2: e0 91 02 22 lds r30, 0x2202 ; 0x802202 <tc_tcc1_err_callback>
ba6: f0 91 03 22 lds r31, 0x2203 ; 0x802203 <tc_tcc1_err_callback+0x1>
baa: 30 97 sbiw r30, 0x00 ; 0
bac: 09 f0 breq .+2 ; 0xbb0 <__vector_21+0x42>
bae: 19 95 eicall
bb0: ff 91 pop r31
bb2: ef 91 pop r30
bb4: bf 91 pop r27
bb6: af 91 pop r26
bb8: 9f 91 pop r25
bba: 8f 91 pop r24
bbc: 7f 91 pop r23
bbe: 6f 91 pop r22
bc0: 5f 91 pop r21
bc2: 4f 91 pop r20
bc4: 3f 91 pop r19
bc6: 2f 91 pop r18
bc8: 0f 90 pop r0
bca: 0b be out 0x3b, r0 ; 59
bcc: 0f 90 pop r0
bce: 09 be out 0x39, r0 ; 57
bd0: 0f 90 pop r0
bd2: 08 be out 0x38, r0 ; 56
bd4: 0f 90 pop r0
bd6: 0f be out 0x3f, r0 ; 63
bd8: 0f 90 pop r0
bda: 1f 90 pop r1
bdc: 18 95 reti
00000bde <__vector_22>:
bde: 1f 92 push r1
be0: 0f 92 push r0
be2: 0f b6 in r0, 0x3f ; 63
be4: 0f 92 push r0
be6: 11 24 eor r1, r1
be8: 08 b6 in r0, 0x38 ; 56
bea: 0f 92 push r0
bec: 18 be out 0x38, r1 ; 56
bee: 09 b6 in r0, 0x39 ; 57
bf0: 0f 92 push r0
bf2: 19 be out 0x39, r1 ; 57
bf4: 0b b6 in r0, 0x3b ; 59
bf6: 0f 92 push r0
bf8: 1b be out 0x3b, r1 ; 59
bfa: 2f 93 push r18
bfc: 3f 93 push r19
bfe: 4f 93 push r20
c00: 5f 93 push r21
c02: 6f 93 push r22
c04: 7f 93 push r23
c06: 8f 93 push r24
c08: 9f 93 push r25
c0a: af 93 push r26
c0c: bf 93 push r27
c0e: ef 93 push r30
c10: ff 93 push r31
c12: e0 91 00 22 lds r30, 0x2200 ; 0x802200 <tc_tcc1_cca_callback>
c16: f0 91 01 22 lds r31, 0x2201 ; 0x802201 <tc_tcc1_cca_callback+0x1>
c1a: 30 97 sbiw r30, 0x00 ; 0
c1c: 09 f0 breq .+2 ; 0xc20 <__vector_22+0x42>
c1e: 19 95 eicall
c20: ff 91 pop r31
c22: ef 91 pop r30
c24: bf 91 pop r27
c26: af 91 pop r26
c28: 9f 91 pop r25
c2a: 8f 91 pop r24
c2c: 7f 91 pop r23
c2e: 6f 91 pop r22
c30: 5f 91 pop r21
c32: 4f 91 pop r20
c34: 3f 91 pop r19
c36: 2f 91 pop r18
c38: 0f 90 pop r0
c3a: 0b be out 0x3b, r0 ; 59
c3c: 0f 90 pop r0
c3e: 09 be out 0x39, r0 ; 57
c40: 0f 90 pop r0
c42: 08 be out 0x38, r0 ; 56
c44: 0f 90 pop r0
c46: 0f be out 0x3f, r0 ; 63
c48: 0f 90 pop r0
c4a: 1f 90 pop r1
c4c: 18 95 reti
00000c4e <__vector_23>:
c4e: 1f 92 push r1
c50: 0f 92 push r0
c52: 0f b6 in r0, 0x3f ; 63
c54: 0f 92 push r0
c56: 11 24 eor r1, r1
c58: 08 b6 in r0, 0x38 ; 56
c5a: 0f 92 push r0
c5c: 18 be out 0x38, r1 ; 56
c5e: 09 b6 in r0, 0x39 ; 57
c60: 0f 92 push r0
c62: 19 be out 0x39, r1 ; 57
c64: 0b b6 in r0, 0x3b ; 59
c66: 0f 92 push r0
c68: 1b be out 0x3b, r1 ; 59
c6a: 2f 93 push r18
c6c: 3f 93 push r19
c6e: 4f 93 push r20
c70: 5f 93 push r21
c72: 6f 93 push r22
c74: 7f 93 push r23
c76: 8f 93 push r24
c78: 9f 93 push r25
c7a: af 93 push r26
c7c: bf 93 push r27
c7e: ef 93 push r30
c80: ff 93 push r31
c82: e0 91 fe 21 lds r30, 0x21FE ; 0x8021fe <tc_tcc1_ccb_callback>
c86: f0 91 ff 21 lds r31, 0x21FF ; 0x8021ff <tc_tcc1_ccb_callback+0x1>
c8a: 30 97 sbiw r30, 0x00 ; 0
c8c: 09 f0 breq .+2 ; 0xc90 <__vector_23+0x42>
c8e: 19 95 eicall
c90: ff 91 pop r31
c92: ef 91 pop r30
c94: bf 91 pop r27
c96: af 91 pop r26
c98: 9f 91 pop r25
c9a: 8f 91 pop r24
c9c: 7f 91 pop r23
c9e: 6f 91 pop r22
ca0: 5f 91 pop r21
ca2: 4f 91 pop r20
ca4: 3f 91 pop r19
ca6: 2f 91 pop r18
ca8: 0f 90 pop r0
caa: 0b be out 0x3b, r0 ; 59
cac: 0f 90 pop r0
cae: 09 be out 0x39, r0 ; 57
cb0: 0f 90 pop r0
cb2: 08 be out 0x38, r0 ; 56
cb4: 0f 90 pop r0
cb6: 0f be out 0x3f, r0 ; 63
cb8: 0f 90 pop r0
cba: 1f 90 pop r1
cbc: 18 95 reti
00000cbe <__vector_77>:
cbe: 1f 92 push r1
cc0: 0f 92 push r0
cc2: 0f b6 in r0, 0x3f ; 63
cc4: 0f 92 push r0
cc6: 11 24 eor r1, r1
cc8: 08 b6 in r0, 0x38 ; 56
cca: 0f 92 push r0
ccc: 18 be out 0x38, r1 ; 56
cce: 09 b6 in r0, 0x39 ; 57
cd0: 0f 92 push r0
cd2: 19 be out 0x39, r1 ; 57
cd4: 0b b6 in r0, 0x3b ; 59
cd6: 0f 92 push r0
cd8: 1b be out 0x3b, r1 ; 59
cda: 2f 93 push r18
cdc: 3f 93 push r19
cde: 4f 93 push r20
ce0: 5f 93 push r21
ce2: 6f 93 push r22
ce4: 7f 93 push r23
ce6: 8f 93 push r24
ce8: 9f 93 push r25
cea: af 93 push r26
cec: bf 93 push r27
cee: ef 93 push r30
cf0: ff 93 push r31
cf2: e0 91 fc 21 lds r30, 0x21FC ; 0x8021fc <tc_tcd0_ovf_callback>
cf6: f0 91 fd 21 lds r31, 0x21FD ; 0x8021fd <tc_tcd0_ovf_callback+0x1>
cfa: 30 97 sbiw r30, 0x00 ; 0
cfc: 09 f0 breq .+2 ; 0xd00 <__vector_77+0x42>
cfe: 19 95 eicall
d00: ff 91 pop r31
d02: ef 91 pop r30
d04: bf 91 pop r27
d06: af 91 pop r26
d08: 9f 91 pop r25
d0a: 8f 91 pop r24
d0c: 7f 91 pop r23
d0e: 6f 91 pop r22
d10: 5f 91 pop r21
d12: 4f 91 pop r20
d14: 3f 91 pop r19
d16: 2f 91 pop r18
d18: 0f 90 pop r0
d1a: 0b be out 0x3b, r0 ; 59
d1c: 0f 90 pop r0
d1e: 09 be out 0x39, r0 ; 57
d20: 0f 90 pop r0
d22: 08 be out 0x38, r0 ; 56
d24: 0f 90 pop r0
d26: 0f be out 0x3f, r0 ; 63
d28: 0f 90 pop r0
d2a: 1f 90 pop r1
d2c: 18 95 reti
00000d2e <__vector_78>:
d2e: 1f 92 push r1
d30: 0f 92 push r0
d32: 0f b6 in r0, 0x3f ; 63
d34: 0f 92 push r0
d36: 11 24 eor r1, r1
d38: 08 b6 in r0, 0x38 ; 56
d3a: 0f 92 push r0
d3c: 18 be out 0x38, r1 ; 56
d3e: 09 b6 in r0, 0x39 ; 57
d40: 0f 92 push r0
d42: 19 be out 0x39, r1 ; 57
d44: 0b b6 in r0, 0x3b ; 59
d46: 0f 92 push r0
d48: 1b be out 0x3b, r1 ; 59
d4a: 2f 93 push r18
d4c: 3f 93 push r19
d4e: 4f 93 push r20
d50: 5f 93 push r21
d52: 6f 93 push r22
d54: 7f 93 push r23
d56: 8f 93 push r24
d58: 9f 93 push r25
d5a: af 93 push r26
d5c: bf 93 push r27
d5e: ef 93 push r30
d60: ff 93 push r31
d62: e0 91 fa 21 lds r30, 0x21FA ; 0x8021fa <tc_tcd0_err_callback>
d66: f0 91 fb 21 lds r31, 0x21FB ; 0x8021fb <tc_tcd0_err_callback+0x1>
d6a: 30 97 sbiw r30, 0x00 ; 0
d6c: 09 f0 breq .+2 ; 0xd70 <__vector_78+0x42>
d6e: 19 95 eicall
d70: ff 91 pop r31
d72: ef 91 pop r30
d74: bf 91 pop r27
d76: af 91 pop r26
d78: 9f 91 pop r25
d7a: 8f 91 pop r24
d7c: 7f 91 pop r23
d7e: 6f 91 pop r22
d80: 5f 91 pop r21
d82: 4f 91 pop r20
d84: 3f 91 pop r19
d86: 2f 91 pop r18
d88: 0f 90 pop r0
d8a: 0b be out 0x3b, r0 ; 59
d8c: 0f 90 pop r0
d8e: 09 be out 0x39, r0 ; 57
d90: 0f 90 pop r0
d92: 08 be out 0x38, r0 ; 56
d94: 0f 90 pop r0
d96: 0f be out 0x3f, r0 ; 63
d98: 0f 90 pop r0
d9a: 1f 90 pop r1
d9c: 18 95 reti
00000d9e <__vector_79>:
d9e: 1f 92 push r1
da0: 0f 92 push r0
da2: 0f b6 in r0, 0x3f ; 63
da4: 0f 92 push r0
da6: 11 24 eor r1, r1
da8: 08 b6 in r0, 0x38 ; 56
daa: 0f 92 push r0
dac: 18 be out 0x38, r1 ; 56
dae: 09 b6 in r0, 0x39 ; 57
db0: 0f 92 push r0
db2: 19 be out 0x39, r1 ; 57
db4: 0b b6 in r0, 0x3b ; 59
db6: 0f 92 push r0
db8: 1b be out 0x3b, r1 ; 59
dba: 2f 93 push r18
dbc: 3f 93 push r19
dbe: 4f 93 push r20
dc0: 5f 93 push r21
dc2: 6f 93 push r22
dc4: 7f 93 push r23
dc6: 8f 93 push r24
dc8: 9f 93 push r25
dca: af 93 push r26
dcc: bf 93 push r27
dce: ef 93 push r30
dd0: ff 93 push r31
dd2: e0 91 f8 21 lds r30, 0x21F8 ; 0x8021f8 <tc_tcd0_cca_callback>
dd6: f0 91 f9 21 lds r31, 0x21F9 ; 0x8021f9 <tc_tcd0_cca_callback+0x1>
dda: 30 97 sbiw r30, 0x00 ; 0
ddc: 09 f0 breq .+2 ; 0xde0 <__vector_79+0x42>
dde: 19 95 eicall
de0: ff 91 pop r31
de2: ef 91 pop r30
de4: bf 91 pop r27
de6: af 91 pop r26
de8: 9f 91 pop r25
dea: 8f 91 pop r24
dec: 7f 91 pop r23
dee: 6f 91 pop r22
df0: 5f 91 pop r21
df2: 4f 91 pop r20
df4: 3f 91 pop r19
df6: 2f 91 pop r18
df8: 0f 90 pop r0
dfa: 0b be out 0x3b, r0 ; 59
dfc: 0f 90 pop r0
dfe: 09 be out 0x39, r0 ; 57
e00: 0f 90 pop r0
e02: 08 be out 0x38, r0 ; 56
e04: 0f 90 pop r0
e06: 0f be out 0x3f, r0 ; 63
e08: 0f 90 pop r0
e0a: 1f 90 pop r1
e0c: 18 95 reti
00000e0e <__vector_80>:
e0e: 1f 92 push r1
e10: 0f 92 push r0
e12: 0f b6 in r0, 0x3f ; 63
e14: 0f 92 push r0
e16: 11 24 eor r1, r1
e18: 08 b6 in r0, 0x38 ; 56
e1a: 0f 92 push r0
e1c: 18 be out 0x38, r1 ; 56
e1e: 09 b6 in r0, 0x39 ; 57
e20: 0f 92 push r0
e22: 19 be out 0x39, r1 ; 57
e24: 0b b6 in r0, 0x3b ; 59
e26: 0f 92 push r0
e28: 1b be out 0x3b, r1 ; 59
e2a: 2f 93 push r18
e2c: 3f 93 push r19
e2e: 4f 93 push r20
e30: 5f 93 push r21
e32: 6f 93 push r22
e34: 7f 93 push r23
e36: 8f 93 push r24
e38: 9f 93 push r25
e3a: af 93 push r26
e3c: bf 93 push r27
e3e: ef 93 push r30
e40: ff 93 push r31
e42: e0 91 f6 21 lds r30, 0x21F6 ; 0x8021f6 <tc_tcd0_ccb_callback>
e46: f0 91 f7 21 lds r31, 0x21F7 ; 0x8021f7 <tc_tcd0_ccb_callback+0x1>
e4a: 30 97 sbiw r30, 0x00 ; 0
e4c: 09 f0 breq .+2 ; 0xe50 <__vector_80+0x42>
e4e: 19 95 eicall
e50: ff 91 pop r31
e52: ef 91 pop r30
e54: bf 91 pop r27
e56: af 91 pop r26
e58: 9f 91 pop r25
e5a: 8f 91 pop r24
e5c: 7f 91 pop r23
e5e: 6f 91 pop r22
e60: 5f 91 pop r21
e62: 4f 91 pop r20
e64: 3f 91 pop r19
e66: 2f 91 pop r18
e68: 0f 90 pop r0
e6a: 0b be out 0x3b, r0 ; 59
e6c: 0f 90 pop r0
e6e: 09 be out 0x39, r0 ; 57
e70: 0f 90 pop r0
e72: 08 be out 0x38, r0 ; 56
e74: 0f 90 pop r0
e76: 0f be out 0x3f, r0 ; 63
e78: 0f 90 pop r0
e7a: 1f 90 pop r1
e7c: 18 95 reti
00000e7e <__vector_81>:
e7e: 1f 92 push r1
e80: 0f 92 push r0
e82: 0f b6 in r0, 0x3f ; 63
e84: 0f 92 push r0
e86: 11 24 eor r1, r1
e88: 08 b6 in r0, 0x38 ; 56
e8a: 0f 92 push r0
e8c: 18 be out 0x38, r1 ; 56
e8e: 09 b6 in r0, 0x39 ; 57
e90: 0f 92 push r0
e92: 19 be out 0x39, r1 ; 57
e94: 0b b6 in r0, 0x3b ; 59
e96: 0f 92 push r0
e98: 1b be out 0x3b, r1 ; 59
e9a: 2f 93 push r18
e9c: 3f 93 push r19
e9e: 4f 93 push r20
ea0: 5f 93 push r21
ea2: 6f 93 push r22
ea4: 7f 93 push r23
ea6: 8f 93 push r24
ea8: 9f 93 push r25
eaa: af 93 push r26
eac: bf 93 push r27
eae: ef 93 push r30
eb0: ff 93 push r31
eb2: e0 91 f4 21 lds r30, 0x21F4 ; 0x8021f4 <tc_tcd0_ccc_callback>
eb6: f0 91 f5 21 lds r31, 0x21F5 ; 0x8021f5 <tc_tcd0_ccc_callback+0x1>
eba: 30 97 sbiw r30, 0x00 ; 0
ebc: 09 f0 breq .+2 ; 0xec0 <__vector_81+0x42>
ebe: 19 95 eicall
ec0: ff 91 pop r31
ec2: ef 91 pop r30
ec4: bf 91 pop r27
ec6: af 91 pop r26
ec8: 9f 91 pop r25
eca: 8f 91 pop r24
ecc: 7f 91 pop r23
ece: 6f 91 pop r22
ed0: 5f 91 pop r21
ed2: 4f 91 pop r20
ed4: 3f 91 pop r19
ed6: 2f 91 pop r18
ed8: 0f 90 pop r0
eda: 0b be out 0x3b, r0 ; 59
edc: 0f 90 pop r0
ede: 09 be out 0x39, r0 ; 57
ee0: 0f 90 pop r0
ee2: 08 be out 0x38, r0 ; 56
ee4: 0f 90 pop r0
ee6: 0f be out 0x3f, r0 ; 63
ee8: 0f 90 pop r0
eea: 1f 90 pop r1
eec: 18 95 reti
00000eee <__vector_82>:
eee: 1f 92 push r1
ef0: 0f 92 push r0
ef2: 0f b6 in r0, 0x3f ; 63
ef4: 0f 92 push r0
ef6: 11 24 eor r1, r1
ef8: 08 b6 in r0, 0x38 ; 56
efa: 0f 92 push r0
efc: 18 be out 0x38, r1 ; 56
efe: 09 b6 in r0, 0x39 ; 57
f00: 0f 92 push r0
f02: 19 be out 0x39, r1 ; 57
f04: 0b b6 in r0, 0x3b ; 59
f06: 0f 92 push r0
f08: 1b be out 0x3b, r1 ; 59
f0a: 2f 93 push r18
f0c: 3f 93 push r19
f0e: 4f 93 push r20
f10: 5f 93 push r21
f12: 6f 93 push r22
f14: 7f 93 push r23
f16: 8f 93 push r24
f18: 9f 93 push r25
f1a: af 93 push r26
f1c: bf 93 push r27
f1e: ef 93 push r30
f20: ff 93 push r31
f22: e0 91 f2 21 lds r30, 0x21F2 ; 0x8021f2 <tc_tcd0_ccd_callback>
f26: f0 91 f3 21 lds r31, 0x21F3 ; 0x8021f3 <tc_tcd0_ccd_callback+0x1>
f2a: 30 97 sbiw r30, 0x00 ; 0
f2c: 09 f0 breq .+2 ; 0xf30 <__vector_82+0x42>
f2e: 19 95 eicall
f30: ff 91 pop r31
f32: ef 91 pop r30
f34: bf 91 pop r27
f36: af 91 pop r26
f38: 9f 91 pop r25
f3a: 8f 91 pop r24
f3c: 7f 91 pop r23
f3e: 6f 91 pop r22
f40: 5f 91 pop r21
f42: 4f 91 pop r20
f44: 3f 91 pop r19
f46: 2f 91 pop r18
f48: 0f 90 pop r0
f4a: 0b be out 0x3b, r0 ; 59
f4c: 0f 90 pop r0
f4e: 09 be out 0x39, r0 ; 57
f50: 0f 90 pop r0
f52: 08 be out 0x38, r0 ; 56
f54: 0f 90 pop r0
f56: 0f be out 0x3f, r0 ; 63
f58: 0f 90 pop r0
f5a: 1f 90 pop r1
f5c: 18 95 reti
00000f5e <__vector_83>:
f5e: 1f 92 push r1
f60: 0f 92 push r0
f62: 0f b6 in r0, 0x3f ; 63
f64: 0f 92 push r0
f66: 11 24 eor r1, r1
f68: 08 b6 in r0, 0x38 ; 56
f6a: 0f 92 push r0
f6c: 18 be out 0x38, r1 ; 56
f6e: 09 b6 in r0, 0x39 ; 57
f70: 0f 92 push r0
f72: 19 be out 0x39, r1 ; 57
f74: 0b b6 in r0, 0x3b ; 59
f76: 0f 92 push r0
f78: 1b be out 0x3b, r1 ; 59
f7a: 2f 93 push r18
f7c: 3f 93 push r19
f7e: 4f 93 push r20
f80: 5f 93 push r21
f82: 6f 93 push r22
f84: 7f 93 push r23
f86: 8f 93 push r24
f88: 9f 93 push r25
f8a: af 93 push r26
f8c: bf 93 push r27
f8e: ef 93 push r30
f90: ff 93 push r31
f92: e0 91 f0 21 lds r30, 0x21F0 ; 0x8021f0 <tc_tcd1_ovf_callback>
f96: f0 91 f1 21 lds r31, 0x21F1 ; 0x8021f1 <tc_tcd1_ovf_callback+0x1>
f9a: 30 97 sbiw r30, 0x00 ; 0
f9c: 09 f0 breq .+2 ; 0xfa0 <__vector_83+0x42>
f9e: 19 95 eicall
fa0: ff 91 pop r31
fa2: ef 91 pop r30
fa4: bf 91 pop r27
fa6: af 91 pop r26
fa8: 9f 91 pop r25
faa: 8f 91 pop r24
fac: 7f 91 pop r23
fae: 6f 91 pop r22
fb0: 5f 91 pop r21
fb2: 4f 91 pop r20
fb4: 3f 91 pop r19
fb6: 2f 91 pop r18
fb8: 0f 90 pop r0
fba: 0b be out 0x3b, r0 ; 59
fbc: 0f 90 pop r0
fbe: 09 be out 0x39, r0 ; 57
fc0: 0f 90 pop r0
fc2: 08 be out 0x38, r0 ; 56
fc4: 0f 90 pop r0
fc6: 0f be out 0x3f, r0 ; 63
fc8: 0f 90 pop r0
fca: 1f 90 pop r1
fcc: 18 95 reti
00000fce <__vector_84>:
fce: 1f 92 push r1
fd0: 0f 92 push r0
fd2: 0f b6 in r0, 0x3f ; 63
fd4: 0f 92 push r0
fd6: 11 24 eor r1, r1
fd8: 08 b6 in r0, 0x38 ; 56
fda: 0f 92 push r0
fdc: 18 be out 0x38, r1 ; 56
fde: 09 b6 in r0, 0x39 ; 57
fe0: 0f 92 push r0
fe2: 19 be out 0x39, r1 ; 57
fe4: 0b b6 in r0, 0x3b ; 59
fe6: 0f 92 push r0
fe8: 1b be out 0x3b, r1 ; 59
fea: 2f 93 push r18
fec: 3f 93 push r19
fee: 4f 93 push r20
ff0: 5f 93 push r21
ff2: 6f 93 push r22
ff4: 7f 93 push r23
ff6: 8f 93 push r24
ff8: 9f 93 push r25
ffa: af 93 push r26
ffc: bf 93 push r27
ffe: ef 93 push r30
1000: ff 93 push r31
1002: e0 91 ee 21 lds r30, 0x21EE ; 0x8021ee <tc_tcd1_err_callback>
1006: f0 91 ef 21 lds r31, 0x21EF ; 0x8021ef <tc_tcd1_err_callback+0x1>
100a: 30 97 sbiw r30, 0x00 ; 0
100c: 09 f0 breq .+2 ; 0x1010 <__vector_84+0x42>
100e: 19 95 eicall
1010: ff 91 pop r31
1012: ef 91 pop r30
1014: bf 91 pop r27
1016: af 91 pop r26
1018: 9f 91 pop r25
101a: 8f 91 pop r24
101c: 7f 91 pop r23
101e: 6f 91 pop r22
1020: 5f 91 pop r21
1022: 4f 91 pop r20
1024: 3f 91 pop r19
1026: 2f 91 pop r18
1028: 0f 90 pop r0
102a: 0b be out 0x3b, r0 ; 59
102c: 0f 90 pop r0
102e: 09 be out 0x39, r0 ; 57
1030: 0f 90 pop r0
1032: 08 be out 0x38, r0 ; 56
1034: 0f 90 pop r0
1036: 0f be out 0x3f, r0 ; 63
1038: 0f 90 pop r0
103a: 1f 90 pop r1
103c: 18 95 reti
0000103e <__vector_85>:
103e: 1f 92 push r1
1040: 0f 92 push r0
1042: 0f b6 in r0, 0x3f ; 63
1044: 0f 92 push r0
1046: 11 24 eor r1, r1
1048: 08 b6 in r0, 0x38 ; 56
104a: 0f 92 push r0
104c: 18 be out 0x38, r1 ; 56
104e: 09 b6 in r0, 0x39 ; 57
1050: 0f 92 push r0
1052: 19 be out 0x39, r1 ; 57
1054: 0b b6 in r0, 0x3b ; 59
1056: 0f 92 push r0
1058: 1b be out 0x3b, r1 ; 59
105a: 2f 93 push r18
105c: 3f 93 push r19
105e: 4f 93 push r20
1060: 5f 93 push r21
1062: 6f 93 push r22
1064: 7f 93 push r23
1066: 8f 93 push r24
1068: 9f 93 push r25
106a: af 93 push r26
106c: bf 93 push r27
106e: ef 93 push r30
1070: ff 93 push r31
1072: e0 91 ec 21 lds r30, 0x21EC ; 0x8021ec <tc_tcd1_cca_callback>
1076: f0 91 ed 21 lds r31, 0x21ED ; 0x8021ed <tc_tcd1_cca_callback+0x1>
107a: 30 97 sbiw r30, 0x00 ; 0
107c: 09 f0 breq .+2 ; 0x1080 <__vector_85+0x42>
107e: 19 95 eicall
1080: ff 91 pop r31
1082: ef 91 pop r30
1084: bf 91 pop r27
1086: af 91 pop r26
1088: 9f 91 pop r25
108a: 8f 91 pop r24
108c: 7f 91 pop r23
108e: 6f 91 pop r22
1090: 5f 91 pop r21
1092: 4f 91 pop r20
1094: 3f 91 pop r19
1096: 2f 91 pop r18
1098: 0f 90 pop r0
109a: 0b be out 0x3b, r0 ; 59
109c: 0f 90 pop r0
109e: 09 be out 0x39, r0 ; 57
10a0: 0f 90 pop r0
10a2: 08 be out 0x38, r0 ; 56
10a4: 0f 90 pop r0
10a6: 0f be out 0x3f, r0 ; 63
10a8: 0f 90 pop r0
10aa: 1f 90 pop r1
10ac: 18 95 reti
000010ae <__vector_86>:
10ae: 1f 92 push r1
10b0: 0f 92 push r0
10b2: 0f b6 in r0, 0x3f ; 63
10b4: 0f 92 push r0
10b6: 11 24 eor r1, r1
10b8: 08 b6 in r0, 0x38 ; 56
10ba: 0f 92 push r0
10bc: 18 be out 0x38, r1 ; 56
10be: 09 b6 in r0, 0x39 ; 57
10c0: 0f 92 push r0
10c2: 19 be out 0x39, r1 ; 57
10c4: 0b b6 in r0, 0x3b ; 59
10c6: 0f 92 push r0
10c8: 1b be out 0x3b, r1 ; 59
10ca: 2f 93 push r18
10cc: 3f 93 push r19
10ce: 4f 93 push r20
10d0: 5f 93 push r21
10d2: 6f 93 push r22
10d4: 7f 93 push r23
10d6: 8f 93 push r24
10d8: 9f 93 push r25
10da: af 93 push r26
10dc: bf 93 push r27
10de: ef 93 push r30
10e0: ff 93 push r31
10e2: e0 91 ea 21 lds r30, 0x21EA ; 0x8021ea <tc_tcd1_ccb_callback>
10e6: f0 91 eb 21 lds r31, 0x21EB ; 0x8021eb <tc_tcd1_ccb_callback+0x1>
10ea: 30 97 sbiw r30, 0x00 ; 0
10ec: 09 f0 breq .+2 ; 0x10f0 <__vector_86+0x42>
10ee: 19 95 eicall
10f0: ff 91 pop r31
10f2: ef 91 pop r30
10f4: bf 91 pop r27
10f6: af 91 pop r26
10f8: 9f 91 pop r25
10fa: 8f 91 pop r24
10fc: 7f 91 pop r23
10fe: 6f 91 pop r22
1100: 5f 91 pop r21
1102: 4f 91 pop r20
1104: 3f 91 pop r19
1106: 2f 91 pop r18
1108: 0f 90 pop r0
110a: 0b be out 0x3b, r0 ; 59
110c: 0f 90 pop r0
110e: 09 be out 0x39, r0 ; 57
1110: 0f 90 pop r0
1112: 08 be out 0x38, r0 ; 56
1114: 0f 90 pop r0
1116: 0f be out 0x3f, r0 ; 63
1118: 0f 90 pop r0
111a: 1f 90 pop r1
111c: 18 95 reti
0000111e <__vector_47>:
111e: 1f 92 push r1
1120: 0f 92 push r0
1122: 0f b6 in r0, 0x3f ; 63
1124: 0f 92 push r0
1126: 11 24 eor r1, r1
1128: 08 b6 in r0, 0x38 ; 56
112a: 0f 92 push r0
112c: 18 be out 0x38, r1 ; 56
112e: 09 b6 in r0, 0x39 ; 57
1130: 0f 92 push r0
1132: 19 be out 0x39, r1 ; 57
1134: 0b b6 in r0, 0x3b ; 59
1136: 0f 92 push r0
1138: 1b be out 0x3b, r1 ; 59
113a: 2f 93 push r18
113c: 3f 93 push r19
113e: 4f 93 push r20
1140: 5f 93 push r21
1142: 6f 93 push r22
1144: 7f 93 push r23
1146: 8f 93 push r24
1148: 9f 93 push r25
114a: af 93 push r26
114c: bf 93 push r27
114e: ef 93 push r30
1150: ff 93 push r31
1152: e0 91 e8 21 lds r30, 0x21E8 ; 0x8021e8 <tc_tce0_ovf_callback>
1156: f0 91 e9 21 lds r31, 0x21E9 ; 0x8021e9 <tc_tce0_ovf_callback+0x1>
115a: 30 97 sbiw r30, 0x00 ; 0
115c: 09 f0 breq .+2 ; 0x1160 <__vector_47+0x42>
115e: 19 95 eicall
1160: ff 91 pop r31
1162: ef 91 pop r30
1164: bf 91 pop r27
1166: af 91 pop r26
1168: 9f 91 pop r25
116a: 8f 91 pop r24
116c: 7f 91 pop r23
116e: 6f 91 pop r22
1170: 5f 91 pop r21
1172: 4f 91 pop r20
1174: 3f 91 pop r19
1176: 2f 91 pop r18
1178: 0f 90 pop r0
117a: 0b be out 0x3b, r0 ; 59
117c: 0f 90 pop r0
117e: 09 be out 0x39, r0 ; 57
1180: 0f 90 pop r0
1182: 08 be out 0x38, r0 ; 56
1184: 0f 90 pop r0
1186: 0f be out 0x3f, r0 ; 63
1188: 0f 90 pop r0
118a: 1f 90 pop r1
118c: 18 95 reti
0000118e <__vector_48>:
118e: 1f 92 push r1
1190: 0f 92 push r0
1192: 0f b6 in r0, 0x3f ; 63
1194: 0f 92 push r0
1196: 11 24 eor r1, r1
1198: 08 b6 in r0, 0x38 ; 56
119a: 0f 92 push r0
119c: 18 be out 0x38, r1 ; 56
119e: 09 b6 in r0, 0x39 ; 57
11a0: 0f 92 push r0
11a2: 19 be out 0x39, r1 ; 57
11a4: 0b b6 in r0, 0x3b ; 59
11a6: 0f 92 push r0
11a8: 1b be out 0x3b, r1 ; 59
11aa: 2f 93 push r18
11ac: 3f 93 push r19
11ae: 4f 93 push r20
11b0: 5f 93 push r21
11b2: 6f 93 push r22
11b4: 7f 93 push r23
11b6: 8f 93 push r24
11b8: 9f 93 push r25
11ba: af 93 push r26
11bc: bf 93 push r27
11be: ef 93 push r30
11c0: ff 93 push r31
11c2: e0 91 e6 21 lds r30, 0x21E6 ; 0x8021e6 <tc_tce0_err_callback>
11c6: f0 91 e7 21 lds r31, 0x21E7 ; 0x8021e7 <tc_tce0_err_callback+0x1>
11ca: 30 97 sbiw r30, 0x00 ; 0
11cc: 09 f0 breq .+2 ; 0x11d0 <__vector_48+0x42>
11ce: 19 95 eicall
11d0: ff 91 pop r31
11d2: ef 91 pop r30
11d4: bf 91 pop r27
11d6: af 91 pop r26
11d8: 9f 91 pop r25
11da: 8f 91 pop r24
11dc: 7f 91 pop r23
11de: 6f 91 pop r22
11e0: 5f 91 pop r21
11e2: 4f 91 pop r20
11e4: 3f 91 pop r19
11e6: 2f 91 pop r18
11e8: 0f 90 pop r0
11ea: 0b be out 0x3b, r0 ; 59
11ec: 0f 90 pop r0
11ee: 09 be out 0x39, r0 ; 57
11f0: 0f 90 pop r0
11f2: 08 be out 0x38, r0 ; 56
11f4: 0f 90 pop r0
11f6: 0f be out 0x3f, r0 ; 63
11f8: 0f 90 pop r0
11fa: 1f 90 pop r1
11fc: 18 95 reti
000011fe <__vector_49>:
11fe: 1f 92 push r1
1200: 0f 92 push r0
1202: 0f b6 in r0, 0x3f ; 63
1204: 0f 92 push r0
1206: 11 24 eor r1, r1
1208: 08 b6 in r0, 0x38 ; 56
120a: 0f 92 push r0
120c: 18 be out 0x38, r1 ; 56
120e: 09 b6 in r0, 0x39 ; 57
1210: 0f 92 push r0
1212: 19 be out 0x39, r1 ; 57
1214: 0b b6 in r0, 0x3b ; 59
1216: 0f 92 push r0
1218: 1b be out 0x3b, r1 ; 59
121a: 2f 93 push r18
121c: 3f 93 push r19
121e: 4f 93 push r20
1220: 5f 93 push r21
1222: 6f 93 push r22
1224: 7f 93 push r23
1226: 8f 93 push r24
1228: 9f 93 push r25
122a: af 93 push r26
122c: bf 93 push r27
122e: ef 93 push r30
1230: ff 93 push r31
1232: e0 91 e4 21 lds r30, 0x21E4 ; 0x8021e4 <tc_tce0_cca_callback>
1236: f0 91 e5 21 lds r31, 0x21E5 ; 0x8021e5 <tc_tce0_cca_callback+0x1>
123a: 30 97 sbiw r30, 0x00 ; 0
123c: 09 f0 breq .+2 ; 0x1240 <__vector_49+0x42>
123e: 19 95 eicall
1240: ff 91 pop r31
1242: ef 91 pop r30
1244: bf 91 pop r27
1246: af 91 pop r26
1248: 9f 91 pop r25
124a: 8f 91 pop r24
124c: 7f 91 pop r23
124e: 6f 91 pop r22
1250: 5f 91 pop r21
1252: 4f 91 pop r20
1254: 3f 91 pop r19
1256: 2f 91 pop r18
1258: 0f 90 pop r0
125a: 0b be out 0x3b, r0 ; 59
125c: 0f 90 pop r0
125e: 09 be out 0x39, r0 ; 57
1260: 0f 90 pop r0
1262: 08 be out 0x38, r0 ; 56
1264: 0f 90 pop r0
1266: 0f be out 0x3f, r0 ; 63
1268: 0f 90 pop r0
126a: 1f 90 pop r1
126c: 18 95 reti
0000126e <__vector_50>:
126e: 1f 92 push r1
1270: 0f 92 push r0
1272: 0f b6 in r0, 0x3f ; 63
1274: 0f 92 push r0
1276: 11 24 eor r1, r1
1278: 08 b6 in r0, 0x38 ; 56
127a: 0f 92 push r0
127c: 18 be out 0x38, r1 ; 56
127e: 09 b6 in r0, 0x39 ; 57
1280: 0f 92 push r0
1282: 19 be out 0x39, r1 ; 57
1284: 0b b6 in r0, 0x3b ; 59
1286: 0f 92 push r0
1288: 1b be out 0x3b, r1 ; 59
128a: 2f 93 push r18
128c: 3f 93 push r19
128e: 4f 93 push r20
1290: 5f 93 push r21
1292: 6f 93 push r22
1294: 7f 93 push r23
1296: 8f 93 push r24
1298: 9f 93 push r25
129a: af 93 push r26
129c: bf 93 push r27
129e: ef 93 push r30
12a0: ff 93 push r31
12a2: e0 91 e2 21 lds r30, 0x21E2 ; 0x8021e2 <tc_tce0_ccb_callback>
12a6: f0 91 e3 21 lds r31, 0x21E3 ; 0x8021e3 <tc_tce0_ccb_callback+0x1>
12aa: 30 97 sbiw r30, 0x00 ; 0
12ac: 09 f0 breq .+2 ; 0x12b0 <__vector_50+0x42>
12ae: 19 95 eicall
12b0: ff 91 pop r31
12b2: ef 91 pop r30
12b4: bf 91 pop r27
12b6: af 91 pop r26
12b8: 9f 91 pop r25
12ba: 8f 91 pop r24
12bc: 7f 91 pop r23
12be: 6f 91 pop r22
12c0: 5f 91 pop r21
12c2: 4f 91 pop r20
12c4: 3f 91 pop r19
12c6: 2f 91 pop r18
12c8: 0f 90 pop r0
12ca: 0b be out 0x3b, r0 ; 59
12cc: 0f 90 pop r0
12ce: 09 be out 0x39, r0 ; 57
12d0: 0f 90 pop r0
12d2: 08 be out 0x38, r0 ; 56
12d4: 0f 90 pop r0
12d6: 0f be out 0x3f, r0 ; 63
12d8: 0f 90 pop r0
12da: 1f 90 pop r1
12dc: 18 95 reti
000012de <__vector_51>:
12de: 1f 92 push r1
12e0: 0f 92 push r0
12e2: 0f b6 in r0, 0x3f ; 63
12e4: 0f 92 push r0
12e6: 11 24 eor r1, r1
12e8: 08 b6 in r0, 0x38 ; 56
12ea: 0f 92 push r0
12ec: 18 be out 0x38, r1 ; 56
12ee: 09 b6 in r0, 0x39 ; 57
12f0: 0f 92 push r0
12f2: 19 be out 0x39, r1 ; 57
12f4: 0b b6 in r0, 0x3b ; 59
12f6: 0f 92 push r0
12f8: 1b be out 0x3b, r1 ; 59
12fa: 2f 93 push r18
12fc: 3f 93 push r19
12fe: 4f 93 push r20
1300: 5f 93 push r21
1302: 6f 93 push r22
1304: 7f 93 push r23
1306: 8f 93 push r24
1308: 9f 93 push r25
130a: af 93 push r26
130c: bf 93 push r27
130e: ef 93 push r30
1310: ff 93 push r31
1312: e0 91 e0 21 lds r30, 0x21E0 ; 0x8021e0 <tc_tce0_ccc_callback>
1316: f0 91 e1 21 lds r31, 0x21E1 ; 0x8021e1 <tc_tce0_ccc_callback+0x1>
131a: 30 97 sbiw r30, 0x00 ; 0
131c: 09 f0 breq .+2 ; 0x1320 <__vector_51+0x42>
131e: 19 95 eicall
1320: ff 91 pop r31
1322: ef 91 pop r30
1324: bf 91 pop r27
1326: af 91 pop r26
1328: 9f 91 pop r25
132a: 8f 91 pop r24
132c: 7f 91 pop r23
132e: 6f 91 pop r22
1330: 5f 91 pop r21
1332: 4f 91 pop r20
1334: 3f 91 pop r19
1336: 2f 91 pop r18
1338: 0f 90 pop r0
133a: 0b be out 0x3b, r0 ; 59
133c: 0f 90 pop r0
133e: 09 be out 0x39, r0 ; 57
1340: 0f 90 pop r0
1342: 08 be out 0x38, r0 ; 56
1344: 0f 90 pop r0
1346: 0f be out 0x3f, r0 ; 63
1348: 0f 90 pop r0
134a: 1f 90 pop r1
134c: 18 95 reti
0000134e <__vector_52>:
134e: 1f 92 push r1
1350: 0f 92 push r0
1352: 0f b6 in r0, 0x3f ; 63
1354: 0f 92 push r0
1356: 11 24 eor r1, r1
1358: 08 b6 in r0, 0x38 ; 56
135a: 0f 92 push r0
135c: 18 be out 0x38, r1 ; 56
135e: 09 b6 in r0, 0x39 ; 57
1360: 0f 92 push r0
1362: 19 be out 0x39, r1 ; 57
1364: 0b b6 in r0, 0x3b ; 59
1366: 0f 92 push r0
1368: 1b be out 0x3b, r1 ; 59
136a: 2f 93 push r18
136c: 3f 93 push r19
136e: 4f 93 push r20
1370: 5f 93 push r21
1372: 6f 93 push r22
1374: 7f 93 push r23
1376: 8f 93 push r24
1378: 9f 93 push r25
137a: af 93 push r26
137c: bf 93 push r27
137e: ef 93 push r30
1380: ff 93 push r31
1382: e0 91 de 21 lds r30, 0x21DE ; 0x8021de <tc_tce0_ccd_callback>
1386: f0 91 df 21 lds r31, 0x21DF ; 0x8021df <tc_tce0_ccd_callback+0x1>
138a: 30 97 sbiw r30, 0x00 ; 0
138c: 09 f0 breq .+2 ; 0x1390 <__vector_52+0x42>
138e: 19 95 eicall
1390: ff 91 pop r31
1392: ef 91 pop r30
1394: bf 91 pop r27
1396: af 91 pop r26
1398: 9f 91 pop r25
139a: 8f 91 pop r24
139c: 7f 91 pop r23
139e: 6f 91 pop r22
13a0: 5f 91 pop r21
13a2: 4f 91 pop r20
13a4: 3f 91 pop r19
13a6: 2f 91 pop r18
13a8: 0f 90 pop r0
13aa: 0b be out 0x3b, r0 ; 59
13ac: 0f 90 pop r0
13ae: 09 be out 0x39, r0 ; 57
13b0: 0f 90 pop r0
13b2: 08 be out 0x38, r0 ; 56
13b4: 0f 90 pop r0
13b6: 0f be out 0x3f, r0 ; 63
13b8: 0f 90 pop r0
13ba: 1f 90 pop r1
13bc: 18 95 reti
000013be <__vector_53>:
13be: 1f 92 push r1
13c0: 0f 92 push r0
13c2: 0f b6 in r0, 0x3f ; 63
13c4: 0f 92 push r0
13c6: 11 24 eor r1, r1
13c8: 08 b6 in r0, 0x38 ; 56
13ca: 0f 92 push r0
13cc: 18 be out 0x38, r1 ; 56
13ce: 09 b6 in r0, 0x39 ; 57
13d0: 0f 92 push r0
13d2: 19 be out 0x39, r1 ; 57
13d4: 0b b6 in r0, 0x3b ; 59
13d6: 0f 92 push r0
13d8: 1b be out 0x3b, r1 ; 59
13da: 2f 93 push r18
13dc: 3f 93 push r19
13de: 4f 93 push r20
13e0: 5f 93 push r21
13e2: 6f 93 push r22
13e4: 7f 93 push r23
13e6: 8f 93 push r24
13e8: 9f 93 push r25
13ea: af 93 push r26
13ec: bf 93 push r27
13ee: ef 93 push r30
13f0: ff 93 push r31
13f2: e0 91 dc 21 lds r30, 0x21DC ; 0x8021dc <tc_tce1_ovf_callback>
13f6: f0 91 dd 21 lds r31, 0x21DD ; 0x8021dd <tc_tce1_ovf_callback+0x1>
13fa: 30 97 sbiw r30, 0x00 ; 0
13fc: 09 f0 breq .+2 ; 0x1400 <__vector_53+0x42>
13fe: 19 95 eicall
1400: ff 91 pop r31
1402: ef 91 pop r30
1404: bf 91 pop r27
1406: af 91 pop r26
1408: 9f 91 pop r25
140a: 8f 91 pop r24
140c: 7f 91 pop r23
140e: 6f 91 pop r22
1410: 5f 91 pop r21
1412: 4f 91 pop r20
1414: 3f 91 pop r19
1416: 2f 91 pop r18
1418: 0f 90 pop r0
141a: 0b be out 0x3b, r0 ; 59
141c: 0f 90 pop r0
141e: 09 be out 0x39, r0 ; 57
1420: 0f 90 pop r0
1422: 08 be out 0x38, r0 ; 56
1424: 0f 90 pop r0
1426: 0f be out 0x3f, r0 ; 63
1428: 0f 90 pop r0
142a: 1f 90 pop r1
142c: 18 95 reti
0000142e <__vector_54>:
142e: 1f 92 push r1
1430: 0f 92 push r0
1432: 0f b6 in r0, 0x3f ; 63
1434: 0f 92 push r0
1436: 11 24 eor r1, r1
1438: 08 b6 in r0, 0x38 ; 56
143a: 0f 92 push r0
143c: 18 be out 0x38, r1 ; 56
143e: 09 b6 in r0, 0x39 ; 57
1440: 0f 92 push r0
1442: 19 be out 0x39, r1 ; 57
1444: 0b b6 in r0, 0x3b ; 59
1446: 0f 92 push r0
1448: 1b be out 0x3b, r1 ; 59
144a: 2f 93 push r18
144c: 3f 93 push r19
144e: 4f 93 push r20
1450: 5f 93 push r21
1452: 6f 93 push r22
1454: 7f 93 push r23
1456: 8f 93 push r24
1458: 9f 93 push r25
145a: af 93 push r26
145c: bf 93 push r27
145e: ef 93 push r30
1460: ff 93 push r31
1462: e0 91 da 21 lds r30, 0x21DA ; 0x8021da <tc_tce1_err_callback>
1466: f0 91 db 21 lds r31, 0x21DB ; 0x8021db <tc_tce1_err_callback+0x1>
146a: 30 97 sbiw r30, 0x00 ; 0
146c: 09 f0 breq .+2 ; 0x1470 <__vector_54+0x42>
146e: 19 95 eicall
1470: ff 91 pop r31
1472: ef 91 pop r30
1474: bf 91 pop r27
1476: af 91 pop r26
1478: 9f 91 pop r25
147a: 8f 91 pop r24
147c: 7f 91 pop r23
147e: 6f 91 pop r22
1480: 5f 91 pop r21
1482: 4f 91 pop r20
1484: 3f 91 pop r19
1486: 2f 91 pop r18
1488: 0f 90 pop r0
148a: 0b be out 0x3b, r0 ; 59
148c: 0f 90 pop r0
148e: 09 be out 0x39, r0 ; 57
1490: 0f 90 pop r0
1492: 08 be out 0x38, r0 ; 56
1494: 0f 90 pop r0
1496: 0f be out 0x3f, r0 ; 63
1498: 0f 90 pop r0
149a: 1f 90 pop r1
149c: 18 95 reti
0000149e <__vector_55>:
149e: 1f 92 push r1
14a0: 0f 92 push r0
14a2: 0f b6 in r0, 0x3f ; 63
14a4: 0f 92 push r0
14a6: 11 24 eor r1, r1
14a8: 08 b6 in r0, 0x38 ; 56
14aa: 0f 92 push r0
14ac: 18 be out 0x38, r1 ; 56
14ae: 09 b6 in r0, 0x39 ; 57
14b0: 0f 92 push r0
14b2: 19 be out 0x39, r1 ; 57
14b4: 0b b6 in r0, 0x3b ; 59
14b6: 0f 92 push r0
14b8: 1b be out 0x3b, r1 ; 59
14ba: 2f 93 push r18
14bc: 3f 93 push r19
14be: 4f 93 push r20
14c0: 5f 93 push r21
14c2: 6f 93 push r22
14c4: 7f 93 push r23
14c6: 8f 93 push r24
14c8: 9f 93 push r25
14ca: af 93 push r26
14cc: bf 93 push r27
14ce: ef 93 push r30
14d0: ff 93 push r31
14d2: e0 91 d8 21 lds r30, 0x21D8 ; 0x8021d8 <tc_tce1_cca_callback>
14d6: f0 91 d9 21 lds r31, 0x21D9 ; 0x8021d9 <tc_tce1_cca_callback+0x1>
14da: 30 97 sbiw r30, 0x00 ; 0
14dc: 09 f0 breq .+2 ; 0x14e0 <__vector_55+0x42>
14de: 19 95 eicall
14e0: ff 91 pop r31
14e2: ef 91 pop r30
14e4: bf 91 pop r27
14e6: af 91 pop r26
14e8: 9f 91 pop r25
14ea: 8f 91 pop r24
14ec: 7f 91 pop r23
14ee: 6f 91 pop r22
14f0: 5f 91 pop r21
14f2: 4f 91 pop r20
14f4: 3f 91 pop r19
14f6: 2f 91 pop r18
14f8: 0f 90 pop r0
14fa: 0b be out 0x3b, r0 ; 59
14fc: 0f 90 pop r0
14fe: 09 be out 0x39, r0 ; 57
1500: 0f 90 pop r0
1502: 08 be out 0x38, r0 ; 56
1504: 0f 90 pop r0
1506: 0f be out 0x3f, r0 ; 63
1508: 0f 90 pop r0
150a: 1f 90 pop r1
150c: 18 95 reti
0000150e <__vector_56>:
150e: 1f 92 push r1
1510: 0f 92 push r0
1512: 0f b6 in r0, 0x3f ; 63
1514: 0f 92 push r0
1516: 11 24 eor r1, r1
1518: 08 b6 in r0, 0x38 ; 56
151a: 0f 92 push r0
151c: 18 be out 0x38, r1 ; 56
151e: 09 b6 in r0, 0x39 ; 57
1520: 0f 92 push r0
1522: 19 be out 0x39, r1 ; 57
1524: 0b b6 in r0, 0x3b ; 59
1526: 0f 92 push r0
1528: 1b be out 0x3b, r1 ; 59
152a: 2f 93 push r18
152c: 3f 93 push r19
152e: 4f 93 push r20
1530: 5f 93 push r21
1532: 6f 93 push r22
1534: 7f 93 push r23
1536: 8f 93 push r24
1538: 9f 93 push r25
153a: af 93 push r26
153c: bf 93 push r27
153e: ef 93 push r30
1540: ff 93 push r31
1542: e0 91 d6 21 lds r30, 0x21D6 ; 0x8021d6 <tc_tce1_ccb_callback>
1546: f0 91 d7 21 lds r31, 0x21D7 ; 0x8021d7 <tc_tce1_ccb_callback+0x1>
154a: 30 97 sbiw r30, 0x00 ; 0
154c: 09 f0 breq .+2 ; 0x1550 <__vector_56+0x42>
154e: 19 95 eicall
1550: ff 91 pop r31
1552: ef 91 pop r30
1554: bf 91 pop r27
1556: af 91 pop r26
1558: 9f 91 pop r25
155a: 8f 91 pop r24
155c: 7f 91 pop r23
155e: 6f 91 pop r22
1560: 5f 91 pop r21
1562: 4f 91 pop r20
1564: 3f 91 pop r19
1566: 2f 91 pop r18
1568: 0f 90 pop r0
156a: 0b be out 0x3b, r0 ; 59
156c: 0f 90 pop r0
156e: 09 be out 0x39, r0 ; 57
1570: 0f 90 pop r0
1572: 08 be out 0x38, r0 ; 56
1574: 0f 90 pop r0
1576: 0f be out 0x3f, r0 ; 63
1578: 0f 90 pop r0
157a: 1f 90 pop r1
157c: 18 95 reti
0000157e <__vector_108>:
157e: 1f 92 push r1
1580: 0f 92 push r0
1582: 0f b6 in r0, 0x3f ; 63
1584: 0f 92 push r0
1586: 11 24 eor r1, r1
1588: 08 b6 in r0, 0x38 ; 56
158a: 0f 92 push r0
158c: 18 be out 0x38, r1 ; 56
158e: 09 b6 in r0, 0x39 ; 57
1590: 0f 92 push r0
1592: 19 be out 0x39, r1 ; 57
1594: 0b b6 in r0, 0x3b ; 59
1596: 0f 92 push r0
1598: 1b be out 0x3b, r1 ; 59
159a: 2f 93 push r18
159c: 3f 93 push r19
159e: 4f 93 push r20
15a0: 5f 93 push r21
15a2: 6f 93 push r22
15a4: 7f 93 push r23
15a6: 8f 93 push r24
15a8: 9f 93 push r25
15aa: af 93 push r26
15ac: bf 93 push r27
15ae: ef 93 push r30
15b0: ff 93 push r31
15b2: e0 91 d4 21 lds r30, 0x21D4 ; 0x8021d4 <tc_tcf0_ovf_callback>
15b6: f0 91 d5 21 lds r31, 0x21D5 ; 0x8021d5 <tc_tcf0_ovf_callback+0x1>
15ba: 30 97 sbiw r30, 0x00 ; 0
15bc: 09 f0 breq .+2 ; 0x15c0 <__vector_108+0x42>
15be: 19 95 eicall
15c0: ff 91 pop r31
15c2: ef 91 pop r30
15c4: bf 91 pop r27
15c6: af 91 pop r26
15c8: 9f 91 pop r25
15ca: 8f 91 pop r24
15cc: 7f 91 pop r23
15ce: 6f 91 pop r22
15d0: 5f 91 pop r21
15d2: 4f 91 pop r20
15d4: 3f 91 pop r19
15d6: 2f 91 pop r18
15d8: 0f 90 pop r0
15da: 0b be out 0x3b, r0 ; 59
15dc: 0f 90 pop r0
15de: 09 be out 0x39, r0 ; 57
15e0: 0f 90 pop r0
15e2: 08 be out 0x38, r0 ; 56
15e4: 0f 90 pop r0
15e6: 0f be out 0x3f, r0 ; 63
15e8: 0f 90 pop r0
15ea: 1f 90 pop r1
15ec: 18 95 reti
000015ee <__vector_109>:
15ee: 1f 92 push r1
15f0: 0f 92 push r0
15f2: 0f b6 in r0, 0x3f ; 63
15f4: 0f 92 push r0
15f6: 11 24 eor r1, r1
15f8: 08 b6 in r0, 0x38 ; 56
15fa: 0f 92 push r0
15fc: 18 be out 0x38, r1 ; 56
15fe: 09 b6 in r0, 0x39 ; 57
1600: 0f 92 push r0
1602: 19 be out 0x39, r1 ; 57
1604: 0b b6 in r0, 0x3b ; 59
1606: 0f 92 push r0
1608: 1b be out 0x3b, r1 ; 59
160a: 2f 93 push r18
160c: 3f 93 push r19
160e: 4f 93 push r20
1610: 5f 93 push r21
1612: 6f 93 push r22
1614: 7f 93 push r23
1616: 8f 93 push r24
1618: 9f 93 push r25
161a: af 93 push r26
161c: bf 93 push r27
161e: ef 93 push r30
1620: ff 93 push r31
1622: e0 91 d2 21 lds r30, 0x21D2 ; 0x8021d2 <tc_tcf0_err_callback>
1626: f0 91 d3 21 lds r31, 0x21D3 ; 0x8021d3 <tc_tcf0_err_callback+0x1>
162a: 30 97 sbiw r30, 0x00 ; 0
162c: 09 f0 breq .+2 ; 0x1630 <__vector_109+0x42>
162e: 19 95 eicall
1630: ff 91 pop r31
1632: ef 91 pop r30
1634: bf 91 pop r27
1636: af 91 pop r26
1638: 9f 91 pop r25
163a: 8f 91 pop r24
163c: 7f 91 pop r23
163e: 6f 91 pop r22
1640: 5f 91 pop r21
1642: 4f 91 pop r20
1644: 3f 91 pop r19
1646: 2f 91 pop r18
1648: 0f 90 pop r0
164a: 0b be out 0x3b, r0 ; 59
164c: 0f 90 pop r0
164e: 09 be out 0x39, r0 ; 57
1650: 0f 90 pop r0
1652: 08 be out 0x38, r0 ; 56
1654: 0f 90 pop r0
1656: 0f be out 0x3f, r0 ; 63
1658: 0f 90 pop r0
165a: 1f 90 pop r1
165c: 18 95 reti
0000165e <__vector_110>:
165e: 1f 92 push r1
1660: 0f 92 push r0
1662: 0f b6 in r0, 0x3f ; 63
1664: 0f 92 push r0
1666: 11 24 eor r1, r1
1668: 08 b6 in r0, 0x38 ; 56
166a: 0f 92 push r0
166c: 18 be out 0x38, r1 ; 56
166e: 09 b6 in r0, 0x39 ; 57
1670: 0f 92 push r0
1672: 19 be out 0x39, r1 ; 57
1674: 0b b6 in r0, 0x3b ; 59
1676: 0f 92 push r0
1678: 1b be out 0x3b, r1 ; 59
167a: 2f 93 push r18
167c: 3f 93 push r19
167e: 4f 93 push r20
1680: 5f 93 push r21
1682: 6f 93 push r22
1684: 7f 93 push r23
1686: 8f 93 push r24
1688: 9f 93 push r25
168a: af 93 push r26
168c: bf 93 push r27
168e: ef 93 push r30
1690: ff 93 push r31
1692: e0 91 d0 21 lds r30, 0x21D0 ; 0x8021d0 <tc_tcf0_cca_callback>
1696: f0 91 d1 21 lds r31, 0x21D1 ; 0x8021d1 <tc_tcf0_cca_callback+0x1>
169a: 30 97 sbiw r30, 0x00 ; 0
169c: 09 f0 breq .+2 ; 0x16a0 <__vector_110+0x42>
169e: 19 95 eicall
16a0: ff 91 pop r31
16a2: ef 91 pop r30
16a4: bf 91 pop r27
16a6: af 91 pop r26
16a8: 9f 91 pop r25
16aa: 8f 91 pop r24
16ac: 7f 91 pop r23
16ae: 6f 91 pop r22
16b0: 5f 91 pop r21
16b2: 4f 91 pop r20
16b4: 3f 91 pop r19
16b6: 2f 91 pop r18
16b8: 0f 90 pop r0
16ba: 0b be out 0x3b, r0 ; 59
16bc: 0f 90 pop r0
16be: 09 be out 0x39, r0 ; 57
16c0: 0f 90 pop r0
16c2: 08 be out 0x38, r0 ; 56
16c4: 0f 90 pop r0
16c6: 0f be out 0x3f, r0 ; 63
16c8: 0f 90 pop r0
16ca: 1f 90 pop r1
16cc: 18 95 reti
000016ce <__vector_111>:
16ce: 1f 92 push r1
16d0: 0f 92 push r0
16d2: 0f b6 in r0, 0x3f ; 63
16d4: 0f 92 push r0
16d6: 11 24 eor r1, r1
16d8: 08 b6 in r0, 0x38 ; 56
16da: 0f 92 push r0
16dc: 18 be out 0x38, r1 ; 56
16de: 09 b6 in r0, 0x39 ; 57
16e0: 0f 92 push r0
16e2: 19 be out 0x39, r1 ; 57
16e4: 0b b6 in r0, 0x3b ; 59
16e6: 0f 92 push r0
16e8: 1b be out 0x3b, r1 ; 59
16ea: 2f 93 push r18
16ec: 3f 93 push r19
16ee: 4f 93 push r20
16f0: 5f 93 push r21
16f2: 6f 93 push r22
16f4: 7f 93 push r23
16f6: 8f 93 push r24
16f8: 9f 93 push r25
16fa: af 93 push r26
16fc: bf 93 push r27
16fe: ef 93 push r30
1700: ff 93 push r31
1702: e0 91 ce 21 lds r30, 0x21CE ; 0x8021ce <tc_tcf0_ccb_callback>
1706: f0 91 cf 21 lds r31, 0x21CF ; 0x8021cf <tc_tcf0_ccb_callback+0x1>
170a: 30 97 sbiw r30, 0x00 ; 0
170c: 09 f0 breq .+2 ; 0x1710 <__vector_111+0x42>
170e: 19 95 eicall
1710: ff 91 pop r31
1712: ef 91 pop r30
1714: bf 91 pop r27
1716: af 91 pop r26
1718: 9f 91 pop r25
171a: 8f 91 pop r24
171c: 7f 91 pop r23
171e: 6f 91 pop r22
1720: 5f 91 pop r21
1722: 4f 91 pop r20
1724: 3f 91 pop r19
1726: 2f 91 pop r18
1728: 0f 90 pop r0
172a: 0b be out 0x3b, r0 ; 59
172c: 0f 90 pop r0
172e: 09 be out 0x39, r0 ; 57
1730: 0f 90 pop r0
1732: 08 be out 0x38, r0 ; 56
1734: 0f 90 pop r0
1736: 0f be out 0x3f, r0 ; 63
1738: 0f 90 pop r0
173a: 1f 90 pop r1
173c: 18 95 reti
0000173e <__vector_112>:
173e: 1f 92 push r1
1740: 0f 92 push r0
1742: 0f b6 in r0, 0x3f ; 63
1744: 0f 92 push r0
1746: 11 24 eor r1, r1
1748: 08 b6 in r0, 0x38 ; 56
174a: 0f 92 push r0
174c: 18 be out 0x38, r1 ; 56
174e: 09 b6 in r0, 0x39 ; 57
1750: 0f 92 push r0
1752: 19 be out 0x39, r1 ; 57
1754: 0b b6 in r0, 0x3b ; 59
1756: 0f 92 push r0
1758: 1b be out 0x3b, r1 ; 59
175a: 2f 93 push r18
175c: 3f 93 push r19
175e: 4f 93 push r20
1760: 5f 93 push r21
1762: 6f 93 push r22
1764: 7f 93 push r23
1766: 8f 93 push r24
1768: 9f 93 push r25
176a: af 93 push r26
176c: bf 93 push r27
176e: ef 93 push r30
1770: ff 93 push r31
1772: e0 91 cc 21 lds r30, 0x21CC ; 0x8021cc <tc_tcf0_ccc_callback>
1776: f0 91 cd 21 lds r31, 0x21CD ; 0x8021cd <tc_tcf0_ccc_callback+0x1>
177a: 30 97 sbiw r30, 0x00 ; 0
177c: 09 f0 breq .+2 ; 0x1780 <__vector_112+0x42>
177e: 19 95 eicall
1780: ff 91 pop r31
1782: ef 91 pop r30
1784: bf 91 pop r27
1786: af 91 pop r26
1788: 9f 91 pop r25
178a: 8f 91 pop r24
178c: 7f 91 pop r23
178e: 6f 91 pop r22
1790: 5f 91 pop r21
1792: 4f 91 pop r20
1794: 3f 91 pop r19
1796: 2f 91 pop r18
1798: 0f 90 pop r0
179a: 0b be out 0x3b, r0 ; 59
179c: 0f 90 pop r0
179e: 09 be out 0x39, r0 ; 57
17a0: 0f 90 pop r0
17a2: 08 be out 0x38, r0 ; 56
17a4: 0f 90 pop r0
17a6: 0f be out 0x3f, r0 ; 63
17a8: 0f 90 pop r0
17aa: 1f 90 pop r1
17ac: 18 95 reti
000017ae <__vector_113>:
17ae: 1f 92 push r1
17b0: 0f 92 push r0
17b2: 0f b6 in r0, 0x3f ; 63
17b4: 0f 92 push r0
17b6: 11 24 eor r1, r1
17b8: 08 b6 in r0, 0x38 ; 56
17ba: 0f 92 push r0
17bc: 18 be out 0x38, r1 ; 56
17be: 09 b6 in r0, 0x39 ; 57
17c0: 0f 92 push r0
17c2: 19 be out 0x39, r1 ; 57
17c4: 0b b6 in r0, 0x3b ; 59
17c6: 0f 92 push r0
17c8: 1b be out 0x3b, r1 ; 59
17ca: 2f 93 push r18
17cc: 3f 93 push r19
17ce: 4f 93 push r20
17d0: 5f 93 push r21
17d2: 6f 93 push r22
17d4: 7f 93 push r23
17d6: 8f 93 push r24
17d8: 9f 93 push r25
17da: af 93 push r26
17dc: bf 93 push r27
17de: ef 93 push r30
17e0: ff 93 push r31
17e2: e0 91 ca 21 lds r30, 0x21CA ; 0x8021ca <tc_tcf0_ccd_callback>
17e6: f0 91 cb 21 lds r31, 0x21CB ; 0x8021cb <tc_tcf0_ccd_callback+0x1>
17ea: 30 97 sbiw r30, 0x00 ; 0
17ec: 09 f0 breq .+2 ; 0x17f0 <__vector_113+0x42>
17ee: 19 95 eicall
17f0: ff 91 pop r31
17f2: ef 91 pop r30
17f4: bf 91 pop r27
17f6: af 91 pop r26
17f8: 9f 91 pop r25
17fa: 8f 91 pop r24
17fc: 7f 91 pop r23
17fe: 6f 91 pop r22
1800: 5f 91 pop r21
1802: 4f 91 pop r20
1804: 3f 91 pop r19
1806: 2f 91 pop r18
1808: 0f 90 pop r0
180a: 0b be out 0x3b, r0 ; 59
180c: 0f 90 pop r0
180e: 09 be out 0x39, r0 ; 57
1810: 0f 90 pop r0
1812: 08 be out 0x38, r0 ; 56
1814: 0f 90 pop r0
1816: 0f be out 0x3f, r0 ; 63
1818: 0f 90 pop r0
181a: 1f 90 pop r1
181c: 18 95 reti
0000181e <__vector_114>:
181e: 1f 92 push r1
1820: 0f 92 push r0
1822: 0f b6 in r0, 0x3f ; 63
1824: 0f 92 push r0
1826: 11 24 eor r1, r1
1828: 08 b6 in r0, 0x38 ; 56
182a: 0f 92 push r0
182c: 18 be out 0x38, r1 ; 56
182e: 09 b6 in r0, 0x39 ; 57
1830: 0f 92 push r0
1832: 19 be out 0x39, r1 ; 57
1834: 0b b6 in r0, 0x3b ; 59
1836: 0f 92 push r0
1838: 1b be out 0x3b, r1 ; 59
183a: 2f 93 push r18
183c: 3f 93 push r19
183e: 4f 93 push r20
1840: 5f 93 push r21
1842: 6f 93 push r22
1844: 7f 93 push r23
1846: 8f 93 push r24
1848: 9f 93 push r25
184a: af 93 push r26
184c: bf 93 push r27
184e: ef 93 push r30
1850: ff 93 push r31
1852: e0 91 c8 21 lds r30, 0x21C8 ; 0x8021c8 <tc_tcf1_ovf_callback>
1856: f0 91 c9 21 lds r31, 0x21C9 ; 0x8021c9 <tc_tcf1_ovf_callback+0x1>
185a: 30 97 sbiw r30, 0x00 ; 0
185c: 09 f0 breq .+2 ; 0x1860 <__vector_114+0x42>
185e: 19 95 eicall
1860: ff 91 pop r31
1862: ef 91 pop r30
1864: bf 91 pop r27
1866: af 91 pop r26
1868: 9f 91 pop r25
186a: 8f 91 pop r24
186c: 7f 91 pop r23
186e: 6f 91 pop r22
1870: 5f 91 pop r21
1872: 4f 91 pop r20
1874: 3f 91 pop r19
1876: 2f 91 pop r18
1878: 0f 90 pop r0
187a: 0b be out 0x3b, r0 ; 59
187c: 0f 90 pop r0
187e: 09 be out 0x39, r0 ; 57
1880: 0f 90 pop r0
1882: 08 be out 0x38, r0 ; 56
1884: 0f 90 pop r0
1886: 0f be out 0x3f, r0 ; 63
1888: 0f 90 pop r0
188a: 1f 90 pop r1
188c: 18 95 reti
0000188e <__vector_115>:
188e: 1f 92 push r1
1890: 0f 92 push r0
1892: 0f b6 in r0, 0x3f ; 63
1894: 0f 92 push r0
1896: 11 24 eor r1, r1
1898: 08 b6 in r0, 0x38 ; 56
189a: 0f 92 push r0
189c: 18 be out 0x38, r1 ; 56
189e: 09 b6 in r0, 0x39 ; 57
18a0: 0f 92 push r0
18a2: 19 be out 0x39, r1 ; 57
18a4: 0b b6 in r0, 0x3b ; 59
18a6: 0f 92 push r0
18a8: 1b be out 0x3b, r1 ; 59
18aa: 2f 93 push r18
18ac: 3f 93 push r19
18ae: 4f 93 push r20
18b0: 5f 93 push r21
18b2: 6f 93 push r22
18b4: 7f 93 push r23
18b6: 8f 93 push r24
18b8: 9f 93 push r25
18ba: af 93 push r26
18bc: bf 93 push r27
18be: ef 93 push r30
18c0: ff 93 push r31
18c2: e0 91 c6 21 lds r30, 0x21C6 ; 0x8021c6 <tc_tcf1_err_callback>
18c6: f0 91 c7 21 lds r31, 0x21C7 ; 0x8021c7 <tc_tcf1_err_callback+0x1>
18ca: 30 97 sbiw r30, 0x00 ; 0
18cc: 09 f0 breq .+2 ; 0x18d0 <__vector_115+0x42>
18ce: 19 95 eicall
18d0: ff 91 pop r31
18d2: ef 91 pop r30
18d4: bf 91 pop r27
18d6: af 91 pop r26
18d8: 9f 91 pop r25
18da: 8f 91 pop r24
18dc: 7f 91 pop r23
18de: 6f 91 pop r22
18e0: 5f 91 pop r21
18e2: 4f 91 pop r20
18e4: 3f 91 pop r19
18e6: 2f 91 pop r18
18e8: 0f 90 pop r0
18ea: 0b be out 0x3b, r0 ; 59
18ec: 0f 90 pop r0
18ee: 09 be out 0x39, r0 ; 57
18f0: 0f 90 pop r0
18f2: 08 be out 0x38, r0 ; 56
18f4: 0f 90 pop r0
18f6: 0f be out 0x3f, r0 ; 63
18f8: 0f 90 pop r0
18fa: 1f 90 pop r1
18fc: 18 95 reti
000018fe <__vector_116>:
18fe: 1f 92 push r1
1900: 0f 92 push r0
1902: 0f b6 in r0, 0x3f ; 63
1904: 0f 92 push r0
1906: 11 24 eor r1, r1
1908: 08 b6 in r0, 0x38 ; 56
190a: 0f 92 push r0
190c: 18 be out 0x38, r1 ; 56
190e: 09 b6 in r0, 0x39 ; 57
1910: 0f 92 push r0
1912: 19 be out 0x39, r1 ; 57
1914: 0b b6 in r0, 0x3b ; 59
1916: 0f 92 push r0
1918: 1b be out 0x3b, r1 ; 59
191a: 2f 93 push r18
191c: 3f 93 push r19
191e: 4f 93 push r20
1920: 5f 93 push r21
1922: 6f 93 push r22
1924: 7f 93 push r23
1926: 8f 93 push r24
1928: 9f 93 push r25
192a: af 93 push r26
192c: bf 93 push r27
192e: ef 93 push r30
1930: ff 93 push r31
1932: e0 91 c4 21 lds r30, 0x21C4 ; 0x8021c4 <tc_tcf1_cca_callback>
1936: f0 91 c5 21 lds r31, 0x21C5 ; 0x8021c5 <tc_tcf1_cca_callback+0x1>
193a: 30 97 sbiw r30, 0x00 ; 0
193c: 09 f0 breq .+2 ; 0x1940 <__vector_116+0x42>
193e: 19 95 eicall
1940: ff 91 pop r31
1942: ef 91 pop r30
1944: bf 91 pop r27
1946: af 91 pop r26
1948: 9f 91 pop r25
194a: 8f 91 pop r24
194c: 7f 91 pop r23
194e: 6f 91 pop r22
1950: 5f 91 pop r21
1952: 4f 91 pop r20
1954: 3f 91 pop r19
1956: 2f 91 pop r18
1958: 0f 90 pop r0
195a: 0b be out 0x3b, r0 ; 59
195c: 0f 90 pop r0
195e: 09 be out 0x39, r0 ; 57
1960: 0f 90 pop r0
1962: 08 be out 0x38, r0 ; 56
1964: 0f 90 pop r0
1966: 0f be out 0x3f, r0 ; 63
1968: 0f 90 pop r0
196a: 1f 90 pop r1
196c: 18 95 reti
0000196e <__vector_117>:
196e: 1f 92 push r1
1970: 0f 92 push r0
1972: 0f b6 in r0, 0x3f ; 63
1974: 0f 92 push r0
1976: 11 24 eor r1, r1
1978: 08 b6 in r0, 0x38 ; 56
197a: 0f 92 push r0
197c: 18 be out 0x38, r1 ; 56
197e: 09 b6 in r0, 0x39 ; 57
1980: 0f 92 push r0
1982: 19 be out 0x39, r1 ; 57
1984: 0b b6 in r0, 0x3b ; 59
1986: 0f 92 push r0
1988: 1b be out 0x3b, r1 ; 59
198a: 2f 93 push r18
198c: 3f 93 push r19
198e: 4f 93 push r20
1990: 5f 93 push r21
1992: 6f 93 push r22
1994: 7f 93 push r23
1996: 8f 93 push r24
1998: 9f 93 push r25
199a: af 93 push r26
199c: bf 93 push r27
199e: ef 93 push r30
19a0: ff 93 push r31
19a2: e0 91 c2 21 lds r30, 0x21C2 ; 0x8021c2 <__data_end>
19a6: f0 91 c3 21 lds r31, 0x21C3 ; 0x8021c3 <__data_end+0x1>
19aa: 30 97 sbiw r30, 0x00 ; 0
19ac: 09 f0 breq .+2 ; 0x19b0 <__vector_117+0x42>
19ae: 19 95 eicall
19b0: ff 91 pop r31
19b2: ef 91 pop r30
19b4: bf 91 pop r27
19b6: af 91 pop r26
19b8: 9f 91 pop r25
19ba: 8f 91 pop r24
19bc: 7f 91 pop r23
19be: 6f 91 pop r22
19c0: 5f 91 pop r21
19c2: 4f 91 pop r20
19c4: 3f 91 pop r19
19c6: 2f 91 pop r18
19c8: 0f 90 pop r0
19ca: 0b be out 0x3b, r0 ; 59
19cc: 0f 90 pop r0
19ce: 09 be out 0x39, r0 ; 57
19d0: 0f 90 pop r0
19d2: 08 be out 0x38, r0 ; 56
19d4: 0f 90 pop r0
19d6: 0f be out 0x3f, r0 ; 63
19d8: 0f 90 pop r0
19da: 1f 90 pop r1
19dc: 18 95 reti
000019de <tc_enable>:
19de: 1f 93 push r17
19e0: cf 93 push r28
19e2: df 93 push r29
19e4: 1f 92 push r1
19e6: 1f 92 push r1
19e8: cd b7 in r28, 0x3d ; 61
19ea: de b7 in r29, 0x3e ; 62
19ec: 2f b7 in r18, 0x3f ; 63
19ee: 2a 83 std Y+2, r18 ; 0x02
19f0: f8 94 cli
19f2: 1a 81 ldd r17, Y+2 ; 0x02
19f4: 28 2f mov r18, r24
19f6: 39 2f mov r19, r25
19f8: 21 15 cp r18, r1
19fa: 88 e0 ldi r24, 0x08 ; 8
19fc: 38 07 cpc r19, r24
19fe: 49 f4 brne .+18 ; 0x1a12 <tc_enable+0x34>
1a00: 61 e0 ldi r22, 0x01 ; 1
1a02: 83 e0 ldi r24, 0x03 ; 3
1a04: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
1a08: 64 e0 ldi r22, 0x04 ; 4
1a0a: 83 e0 ldi r24, 0x03 ; 3
1a0c: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
1a10: 5c c0 rjmp .+184 ; 0x1aca <tc_enable+0xec>
1a12: 20 34 cpi r18, 0x40 ; 64
1a14: 88 e0 ldi r24, 0x08 ; 8
1a16: 38 07 cpc r19, r24
1a18: 49 f4 brne .+18 ; 0x1a2c <tc_enable+0x4e>
1a1a: 62 e0 ldi r22, 0x02 ; 2
1a1c: 83 e0 ldi r24, 0x03 ; 3
1a1e: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
1a22: 64 e0 ldi r22, 0x04 ; 4
1a24: 83 e0 ldi r24, 0x03 ; 3
1a26: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
1a2a: 4f c0 rjmp .+158 ; 0x1aca <tc_enable+0xec>
1a2c: 21 15 cp r18, r1
1a2e: 89 e0 ldi r24, 0x09 ; 9
1a30: 38 07 cpc r19, r24
1a32: 49 f4 brne .+18 ; 0x1a46 <tc_enable+0x68>
1a34: 61 e0 ldi r22, 0x01 ; 1
1a36: 84 e0 ldi r24, 0x04 ; 4
1a38: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
1a3c: 64 e0 ldi r22, 0x04 ; 4
1a3e: 84 e0 ldi r24, 0x04 ; 4
1a40: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
1a44: 42 c0 rjmp .+132 ; 0x1aca <tc_enable+0xec>
1a46: 20 34 cpi r18, 0x40 ; 64
1a48: 89 e0 ldi r24, 0x09 ; 9
1a4a: 38 07 cpc r19, r24
1a4c: 49 f4 brne .+18 ; 0x1a60 <tc_enable+0x82>
1a4e: 62 e0 ldi r22, 0x02 ; 2
1a50: 84 e0 ldi r24, 0x04 ; 4
1a52: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
1a56: 64 e0 ldi r22, 0x04 ; 4
1a58: 84 e0 ldi r24, 0x04 ; 4
1a5a: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
1a5e: 35 c0 rjmp .+106 ; 0x1aca <tc_enable+0xec>
1a60: 21 15 cp r18, r1
1a62: 8a e0 ldi r24, 0x0A ; 10
1a64: 38 07 cpc r19, r24
1a66: 49 f4 brne .+18 ; 0x1a7a <tc_enable+0x9c>
1a68: 61 e0 ldi r22, 0x01 ; 1
1a6a: 85 e0 ldi r24, 0x05 ; 5
1a6c: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
1a70: 64 e0 ldi r22, 0x04 ; 4
1a72: 85 e0 ldi r24, 0x05 ; 5
1a74: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
1a78: 28 c0 rjmp .+80 ; 0x1aca <tc_enable+0xec>
1a7a: 20 34 cpi r18, 0x40 ; 64
1a7c: 8a e0 ldi r24, 0x0A ; 10
1a7e: 38 07 cpc r19, r24
1a80: 49 f4 brne .+18 ; 0x1a94 <tc_enable+0xb6>
1a82: 62 e0 ldi r22, 0x02 ; 2
1a84: 85 e0 ldi r24, 0x05 ; 5
1a86: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
1a8a: 64 e0 ldi r22, 0x04 ; 4
1a8c: 85 e0 ldi r24, 0x05 ; 5
1a8e: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
1a92: 1b c0 rjmp .+54 ; 0x1aca <tc_enable+0xec>
1a94: 21 15 cp r18, r1
1a96: 8b e0 ldi r24, 0x0B ; 11
1a98: 38 07 cpc r19, r24
1a9a: 49 f4 brne .+18 ; 0x1aae <tc_enable+0xd0>
1a9c: 61 e0 ldi r22, 0x01 ; 1
1a9e: 86 e0 ldi r24, 0x06 ; 6
1aa0: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
1aa4: 64 e0 ldi r22, 0x04 ; 4
1aa6: 86 e0 ldi r24, 0x06 ; 6
1aa8: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
1aac: 0e c0 rjmp .+28 ; 0x1aca <tc_enable+0xec>
1aae: 20 34 cpi r18, 0x40 ; 64
1ab0: 3b 40 sbci r19, 0x0B ; 11
1ab2: 49 f4 brne .+18 ; 0x1ac6 <tc_enable+0xe8>
1ab4: 62 e0 ldi r22, 0x02 ; 2
1ab6: 86 e0 ldi r24, 0x06 ; 6
1ab8: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
1abc: 64 e0 ldi r22, 0x04 ; 4
1abe: 86 e0 ldi r24, 0x06 ; 6
1ac0: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
1ac4: 02 c0 rjmp .+4 ; 0x1aca <tc_enable+0xec>
1ac6: 1f bf out 0x3f, r17 ; 63
1ac8: 10 c0 rjmp .+32 ; 0x1aea <tc_enable+0x10c>
1aca: 80 91 32 25 lds r24, 0x2532 ; 0x802532 <sleepmgr_locks+0x1>
1ace: 8f 3f cpi r24, 0xFF ; 255
1ad0: 09 f4 brne .+2 ; 0x1ad4 <tc_enable+0xf6>
1ad2: ff cf rjmp .-2 ; 0x1ad2 <tc_enable+0xf4>
1ad4: 8f b7 in r24, 0x3f ; 63
1ad6: 89 83 std Y+1, r24 ; 0x01
1ad8: f8 94 cli
1ada: 99 81 ldd r25, Y+1 ; 0x01
1adc: e1 e3 ldi r30, 0x31 ; 49
1ade: f5 e2 ldi r31, 0x25 ; 37
1ae0: 81 81 ldd r24, Z+1 ; 0x01
1ae2: 8f 5f subi r24, 0xFF ; 255
1ae4: 81 83 std Z+1, r24 ; 0x01
1ae6: 9f bf out 0x3f, r25 ; 63
1ae8: 1f bf out 0x3f, r17 ; 63
1aea: 0f 90 pop r0
1aec: 0f 90 pop r0
1aee: df 91 pop r29
1af0: cf 91 pop r28
1af2: 1f 91 pop r17
1af4: 08 95 ret
00001af6 <tc_set_overflow_interrupt_callback>:
void tc_set_overflow_interrupt_callback(volatile void *tc,
tc_callback_t callback)
{
#ifdef TCC0
if ((uintptr_t) tc == (uintptr_t) & TCC0) {
1af6: 81 15 cp r24, r1
1af8: 28 e0 ldi r18, 0x08 ; 8
1afa: 92 07 cpc r25, r18
1afc: 29 f4 brne .+10 ; 0x1b08 <tc_set_overflow_interrupt_callback+0x12>
tc_tcc0_ovf_callback = callback;
1afe: 60 93 0e 22 sts 0x220E, r22 ; 0x80220e <tc_tcc0_ovf_callback>
1b02: 70 93 0f 22 sts 0x220F, r23 ; 0x80220f <tc_tcc0_ovf_callback+0x1>
1b06: 08 95 ret
} else
#endif
#ifdef TCC1
if ((uintptr_t) tc == (uintptr_t) & TCC1) {
1b08: 80 34 cpi r24, 0x40 ; 64
1b0a: 28 e0 ldi r18, 0x08 ; 8
1b0c: 92 07 cpc r25, r18
1b0e: 29 f4 brne .+10 ; 0x1b1a <tc_set_overflow_interrupt_callback+0x24>
tc_tcc1_ovf_callback = callback;
1b10: 60 93 04 22 sts 0x2204, r22 ; 0x802204 <tc_tcc1_ovf_callback>
1b14: 70 93 05 22 sts 0x2205, r23 ; 0x802205 <tc_tcc1_ovf_callback+0x1>
1b18: 08 95 ret
} else
#endif
#ifdef TCD0
if ((uintptr_t) tc == (uintptr_t) & TCD0) {
1b1a: 81 15 cp r24, r1
1b1c: 29 e0 ldi r18, 0x09 ; 9
1b1e: 92 07 cpc r25, r18
1b20: 29 f4 brne .+10 ; 0x1b2c <tc_set_overflow_interrupt_callback+0x36>
tc_tcd0_ovf_callback = callback;
1b22: 60 93 fc 21 sts 0x21FC, r22 ; 0x8021fc <tc_tcd0_ovf_callback>
1b26: 70 93 fd 21 sts 0x21FD, r23 ; 0x8021fd <tc_tcd0_ovf_callback+0x1>
1b2a: 08 95 ret
} else
#endif
#ifdef TCD1
if ((uintptr_t) tc == (uintptr_t) & TCD1) {
1b2c: 80 34 cpi r24, 0x40 ; 64
1b2e: 29 e0 ldi r18, 0x09 ; 9
1b30: 92 07 cpc r25, r18
1b32: 29 f4 brne .+10 ; 0x1b3e <tc_set_overflow_interrupt_callback+0x48>
tc_tcd1_ovf_callback = callback;
1b34: 60 93 f0 21 sts 0x21F0, r22 ; 0x8021f0 <tc_tcd1_ovf_callback>
1b38: 70 93 f1 21 sts 0x21F1, r23 ; 0x8021f1 <tc_tcd1_ovf_callback+0x1>
1b3c: 08 95 ret
} else
#endif
#ifdef TCE0
if ((uintptr_t) tc == (uintptr_t) & TCE0) {
1b3e: 81 15 cp r24, r1
1b40: 2a e0 ldi r18, 0x0A ; 10
1b42: 92 07 cpc r25, r18
1b44: 29 f4 brne .+10 ; 0x1b50 <tc_set_overflow_interrupt_callback+0x5a>
tc_tce0_ovf_callback = callback;
1b46: 60 93 e8 21 sts 0x21E8, r22 ; 0x8021e8 <tc_tce0_ovf_callback>
1b4a: 70 93 e9 21 sts 0x21E9, r23 ; 0x8021e9 <tc_tce0_ovf_callback+0x1>
1b4e: 08 95 ret
} else
#endif
#ifdef TCE1
if ((uintptr_t) tc == (uintptr_t) & TCE1) {
1b50: 80 34 cpi r24, 0x40 ; 64
1b52: 2a e0 ldi r18, 0x0A ; 10
1b54: 92 07 cpc r25, r18
1b56: 29 f4 brne .+10 ; 0x1b62 <tc_set_overflow_interrupt_callback+0x6c>
tc_tce1_ovf_callback = callback;
1b58: 60 93 dc 21 sts 0x21DC, r22 ; 0x8021dc <tc_tce1_ovf_callback>
1b5c: 70 93 dd 21 sts 0x21DD, r23 ; 0x8021dd <tc_tce1_ovf_callback+0x1>
1b60: 08 95 ret
} else
#endif
#ifdef TCF0
if ((uintptr_t) tc == (uintptr_t) & TCF0) {
1b62: 81 15 cp r24, r1
1b64: 2b e0 ldi r18, 0x0B ; 11
1b66: 92 07 cpc r25, r18
1b68: 29 f4 brne .+10 ; 0x1b74 <tc_set_overflow_interrupt_callback+0x7e>
tc_tcf0_ovf_callback = callback;
1b6a: 60 93 d4 21 sts 0x21D4, r22 ; 0x8021d4 <tc_tcf0_ovf_callback>
1b6e: 70 93 d5 21 sts 0x21D5, r23 ; 0x8021d5 <tc_tcf0_ovf_callback+0x1>
1b72: 08 95 ret
} else
#endif
#ifdef TCF1
if ((uintptr_t) tc == (uintptr_t) & TCF1) {
1b74: 80 34 cpi r24, 0x40 ; 64
1b76: 9b 40 sbci r25, 0x0B ; 11
1b78: 21 f4 brne .+8 ; 0x1b82 <tc_set_overflow_interrupt_callback+0x8c>
tc_tcf1_ovf_callback = callback;
1b7a: 60 93 c8 21 sts 0x21C8, r22 ; 0x8021c8 <tc_tcf1_ovf_callback>
1b7e: 70 93 c9 21 sts 0x21C9, r23 ; 0x8021c9 <tc_tcf1_ovf_callback+0x1>
1b82: 08 95 ret
00001b84 <twim_interrupt_handler>:
* \brief Common TWI master interrupt service routine.
*
* Check current status and calls the appropriate handler.
*/
static void twim_interrupt_handler(void)
{
1b84: cf 93 push r28
1b86: df 93 push r29
uint8_t const master_status = transfer.bus->MASTER.STATUS;
1b88: e0 91 10 22 lds r30, 0x2210 ; 0x802210 <transfer>
1b8c: f0 91 11 22 lds r31, 0x2211 ; 0x802211 <transfer+0x1>
1b90: 84 81 ldd r24, Z+4 ; 0x04
if (master_status & TWI_MASTER_ARBLOST_bm) {
1b92: 83 ff sbrs r24, 3
1b94: 08 c0 rjmp .+16 ; 0x1ba6 <twim_interrupt_handler+0x22>
transfer.bus->MASTER.STATUS = master_status | TWI_MASTER_ARBLOST_bm;
1b96: 88 60 ori r24, 0x08 ; 8
1b98: 84 83 std Z+4, r24 ; 0x04
transfer.bus->MASTER.CTRLC = TWI_MASTER_CMD_STOP_gc;
1b9a: 83 e0 ldi r24, 0x03 ; 3
1b9c: 83 83 std Z+3, r24 ; 0x03
transfer.status = ERR_BUSY;
1b9e: 86 ef ldi r24, 0xF6 ; 246
1ba0: 80 93 1a 22 sts 0x221A, r24 ; 0x80221a <transfer+0xa>
1ba4: 83 c0 rjmp .+262 ; 0x1cac <twim_interrupt_handler+0x128>
} else if ((master_status & TWI_MASTER_BUSERR_bm) ||
1ba6: 98 2f mov r25, r24
1ba8: 94 71 andi r25, 0x14 ; 20
1baa: 31 f0 breq .+12 ; 0x1bb8 <twim_interrupt_handler+0x34>
(master_status & TWI_MASTER_RXACK_bm)) {
transfer.bus->MASTER.CTRLC = TWI_MASTER_CMD_STOP_gc;
1bac: 83 e0 ldi r24, 0x03 ; 3
1bae: 83 83 std Z+3, r24 ; 0x03
transfer.status = ERR_IO_ERROR;
1bb0: 8f ef ldi r24, 0xFF ; 255
1bb2: 80 93 1a 22 sts 0x221A, r24 ; 0x80221a <transfer+0xa>
1bb6: 7a c0 rjmp .+244 ; 0x1cac <twim_interrupt_handler+0x128>
} else if (master_status & TWI_MASTER_WIF_bm) {
1bb8: 86 ff sbrs r24, 6
1bba: 43 c0 rjmp .+134 ; 0x1c42 <twim_interrupt_handler+0xbe>
* Handles TWI transactions (master write) and responses to (N)ACK.
*/
static inline void twim_write_handler(void)
{
TWI_t * const bus = transfer.bus;
twi_package_t * const pkg = transfer.pkg;
1bbc: c0 e1 ldi r28, 0x10 ; 16
1bbe: d2 e2 ldi r29, 0x22 ; 34
1bc0: aa 81 ldd r26, Y+2 ; 0x02
1bc2: bb 81 ldd r27, Y+3 ; 0x03
if (transfer.addr_count < pkg->addr_length) {
1bc4: 8c 81 ldd r24, Y+4 ; 0x04
1bc6: 9d 81 ldd r25, Y+5 ; 0x05
1bc8: 14 96 adiw r26, 0x04 ; 4
1bca: 2d 91 ld r18, X+
1bcc: 3c 91 ld r19, X
1bce: 15 97 sbiw r26, 0x05 ; 5
1bd0: 82 17 cp r24, r18
1bd2: 93 07 cpc r25, r19
1bd4: 6c f4 brge .+26 ; 0x1bf0 <twim_interrupt_handler+0x6c>
const uint8_t * const data = pkg->addr;
bus->MASTER.DATA = data[transfer.addr_count++];
1bd6: 9c 01 movw r18, r24
1bd8: 2f 5f subi r18, 0xFF ; 255
1bda: 3f 4f sbci r19, 0xFF ; 255
1bdc: 20 93 14 22 sts 0x2214, r18 ; 0x802214 <transfer+0x4>
1be0: 30 93 15 22 sts 0x2215, r19 ; 0x802215 <transfer+0x5>
1be4: a8 0f add r26, r24
1be6: b9 1f adc r27, r25
1be8: 11 96 adiw r26, 0x01 ; 1
1bea: 8c 91 ld r24, X
1bec: 87 83 std Z+7, r24 ; 0x07
1bee: 5e c0 rjmp .+188 ; 0x1cac <twim_interrupt_handler+0x128>
} else if (transfer.data_count < pkg->length) {
1bf0: 80 91 16 22 lds r24, 0x2216 ; 0x802216 <transfer+0x6>
1bf4: 90 91 17 22 lds r25, 0x2217 ; 0x802217 <transfer+0x7>
1bf8: 18 96 adiw r26, 0x08 ; 8
1bfa: 2d 91 ld r18, X+
1bfc: 3c 91 ld r19, X
1bfe: 19 97 sbiw r26, 0x09 ; 9
1c00: 82 17 cp r24, r18
1c02: 93 07 cpc r25, r19
1c04: c8 f4 brcc .+50 ; 0x1c38 <twim_interrupt_handler+0xb4>
if (transfer.read) {
1c06: 20 91 18 22 lds r18, 0x2218 ; 0x802218 <transfer+0x8>
1c0a: 22 23 and r18, r18
1c0c: 21 f0 breq .+8 ; 0x1c16 <twim_interrupt_handler+0x92>
/* Send repeated START condition (Address|R/W=1). */
bus->MASTER.ADDR |= 0x01;
1c0e: 86 81 ldd r24, Z+6 ; 0x06
1c10: 81 60 ori r24, 0x01 ; 1
1c12: 86 83 std Z+6, r24 ; 0x06
1c14: 4b c0 rjmp .+150 ; 0x1cac <twim_interrupt_handler+0x128>
} else {
const uint8_t * const data = pkg->buffer;
1c16: 16 96 adiw r26, 0x06 ; 6
1c18: 2d 91 ld r18, X+
1c1a: 3c 91 ld r19, X
1c1c: 17 97 sbiw r26, 0x07 ; 7
bus->MASTER.DATA = data[transfer.data_count++];
1c1e: ac 01 movw r20, r24
1c20: 4f 5f subi r20, 0xFF ; 255
1c22: 5f 4f sbci r21, 0xFF ; 255
1c24: 40 93 16 22 sts 0x2216, r20 ; 0x802216 <transfer+0x6>
1c28: 50 93 17 22 sts 0x2217, r21 ; 0x802217 <transfer+0x7>
1c2c: d9 01 movw r26, r18
1c2e: a8 0f add r26, r24
1c30: b9 1f adc r27, r25
1c32: 8c 91 ld r24, X
1c34: 87 83 std Z+7, r24 ; 0x07
1c36: 3a c0 rjmp .+116 ; 0x1cac <twim_interrupt_handler+0x128>
} else {
/* Send STOP condition to complete the transaction. */
bus->MASTER.CTRLC = TWI_MASTER_CMD_STOP_gc;
1c38: 83 e0 ldi r24, 0x03 ; 3
1c3a: 83 83 std Z+3, r24 ; 0x03
transfer.status = STATUS_OK;
1c3c: 10 92 1a 22 sts 0x221A, r1 ; 0x80221a <transfer+0xa>
1c40: 35 c0 rjmp .+106 ; 0x1cac <twim_interrupt_handler+0x128>
} else if (master_status & TWI_MASTER_WIF_bm) {
twim_write_handler();
} else if (master_status & TWI_MASTER_RIF_bm) {
1c42: 88 23 and r24, r24
1c44: 84 f5 brge .+96 ; 0x1ca6 <twim_interrupt_handler+0x122>
* reading bytes from the TWI slave.
*/
static inline void twim_read_handler(void)
{
TWI_t * const bus = transfer.bus;
twi_package_t * const pkg = transfer.pkg;
1c46: a0 e1 ldi r26, 0x10 ; 16
1c48: b2 e2 ldi r27, 0x22 ; 34
1c4a: 12 96 adiw r26, 0x02 ; 2
1c4c: cd 91 ld r28, X+
1c4e: dc 91 ld r29, X
1c50: 13 97 sbiw r26, 0x03 ; 3
if (transfer.data_count < pkg->length) {
1c52: 16 96 adiw r26, 0x06 ; 6
1c54: 8d 91 ld r24, X+
1c56: 9c 91 ld r25, X
1c58: 17 97 sbiw r26, 0x07 ; 7
1c5a: 28 85 ldd r18, Y+8 ; 0x08
1c5c: 39 85 ldd r19, Y+9 ; 0x09
1c5e: 82 17 cp r24, r18
1c60: 93 07 cpc r25, r19
1c62: d8 f4 brcc .+54 ; 0x1c9a <twim_interrupt_handler+0x116>
uint8_t * const data = pkg->buffer;
1c64: 6e 81 ldd r22, Y+6 ; 0x06
1c66: 7f 81 ldd r23, Y+7 ; 0x07
data[transfer.data_count++] = bus->MASTER.DATA;
1c68: 9c 01 movw r18, r24
1c6a: 2f 5f subi r18, 0xFF ; 255
1c6c: 3f 4f sbci r19, 0xFF ; 255
1c6e: 20 93 16 22 sts 0x2216, r18 ; 0x802216 <transfer+0x6>
1c72: 30 93 17 22 sts 0x2217, r19 ; 0x802217 <transfer+0x7>
1c76: 47 81 ldd r20, Z+7 ; 0x07
1c78: db 01 movw r26, r22
1c7a: a8 0f add r26, r24
1c7c: b9 1f adc r27, r25
1c7e: 4c 93 st X, r20
/* If there is more to read, issue ACK and start a byte read.
* Otherwise, issue NACK and STOP to complete the transaction.
*/
if (transfer.data_count < pkg->length) {
1c80: 88 85 ldd r24, Y+8 ; 0x08
1c82: 99 85 ldd r25, Y+9 ; 0x09
1c84: 28 17 cp r18, r24
1c86: 39 07 cpc r19, r25
1c88: 18 f4 brcc .+6 ; 0x1c90 <twim_interrupt_handler+0x10c>
bus->MASTER.CTRLC = TWI_MASTER_CMD_RECVTRANS_gc;
1c8a: 82 e0 ldi r24, 0x02 ; 2
1c8c: 83 83 std Z+3, r24 ; 0x03
1c8e: 0e c0 rjmp .+28 ; 0x1cac <twim_interrupt_handler+0x128>
} else {
bus->MASTER.CTRLC = TWI_MASTER_ACKACT_bm | TWI_MASTER_CMD_STOP_gc;
1c90: 87 e0 ldi r24, 0x07 ; 7
1c92: 83 83 std Z+3, r24 ; 0x03
transfer.status = STATUS_OK;
1c94: 10 92 1a 22 sts 0x221A, r1 ; 0x80221a <transfer+0xa>
1c98: 09 c0 rjmp .+18 ; 0x1cac <twim_interrupt_handler+0x128>
} else {
/* Issue STOP and buffer overflow condition. */
bus->MASTER.CTRLC = TWI_MASTER_CMD_STOP_gc;
1c9a: 83 e0 ldi r24, 0x03 ; 3
1c9c: 83 83 std Z+3, r24 ; 0x03
transfer.status = ERR_NO_MEMORY;
1c9e: 89 ef ldi r24, 0xF9 ; 249
1ca0: 80 93 1a 22 sts 0x221A, r24 ; 0x80221a <transfer+0xa>
1ca4: 03 c0 rjmp .+6 ; 0x1cac <twim_interrupt_handler+0x128>
twim_read_handler();
} else {
transfer.status = ERR_PROTOCOL;
1ca6: 8b ef ldi r24, 0xFB ; 251
1ca8: 80 93 1a 22 sts 0x221A, r24 ; 0x80221a <transfer+0xa>
}
}
1cac: df 91 pop r29
1cae: cf 91 pop r28
1cb0: 08 95 ret
00001cb2 <__vector_13>:
* parameters specified in the global \c transfer structure.
*/
static void twim_interrupt_handler(void);
#ifdef TWIC
ISR(TWIC_TWIM_vect) { twim_interrupt_handler(); }
1cb2: 1f 92 push r1
1cb4: 0f 92 push r0
1cb6: 0f b6 in r0, 0x3f ; 63
1cb8: 0f 92 push r0
1cba: 11 24 eor r1, r1
1cbc: 08 b6 in r0, 0x38 ; 56
1cbe: 0f 92 push r0
1cc0: 18 be out 0x38, r1 ; 56
1cc2: 09 b6 in r0, 0x39 ; 57
1cc4: 0f 92 push r0
1cc6: 19 be out 0x39, r1 ; 57
1cc8: 0b b6 in r0, 0x3b ; 59
1cca: 0f 92 push r0
1ccc: 1b be out 0x3b, r1 ; 59
1cce: 2f 93 push r18
1cd0: 3f 93 push r19
1cd2: 4f 93 push r20
1cd4: 5f 93 push r21
1cd6: 6f 93 push r22
1cd8: 7f 93 push r23
1cda: 8f 93 push r24
1cdc: 9f 93 push r25
1cde: af 93 push r26
1ce0: bf 93 push r27
1ce2: ef 93 push r30
1ce4: ff 93 push r31
1ce6: 4e df rcall .-356 ; 0x1b84 <twim_interrupt_handler>
1ce8: ff 91 pop r31
1cea: ef 91 pop r30
1cec: bf 91 pop r27
1cee: af 91 pop r26
1cf0: 9f 91 pop r25
1cf2: 8f 91 pop r24
1cf4: 7f 91 pop r23
1cf6: 6f 91 pop r22
1cf8: 5f 91 pop r21
1cfa: 4f 91 pop r20
1cfc: 3f 91 pop r19
1cfe: 2f 91 pop r18
1d00: 0f 90 pop r0
1d02: 0b be out 0x3b, r0 ; 59
1d04: 0f 90 pop r0
1d06: 09 be out 0x39, r0 ; 57
1d08: 0f 90 pop r0
1d0a: 08 be out 0x38, r0 ; 56
1d0c: 0f 90 pop r0
1d0e: 0f be out 0x3f, r0 ; 63
1d10: 0f 90 pop r0
1d12: 1f 90 pop r1
1d14: 18 95 reti
00001d16 <__vector_76>:
#endif
#ifdef TWID
ISR(TWID_TWIM_vect) { twim_interrupt_handler(); }
1d16: 1f 92 push r1
1d18: 0f 92 push r0
1d1a: 0f b6 in r0, 0x3f ; 63
1d1c: 0f 92 push r0
1d1e: 11 24 eor r1, r1
1d20: 08 b6 in r0, 0x38 ; 56
1d22: 0f 92 push r0
1d24: 18 be out 0x38, r1 ; 56
1d26: 09 b6 in r0, 0x39 ; 57
1d28: 0f 92 push r0
1d2a: 19 be out 0x39, r1 ; 57
1d2c: 0b b6 in r0, 0x3b ; 59
1d2e: 0f 92 push r0
1d30: 1b be out 0x3b, r1 ; 59
1d32: 2f 93 push r18
1d34: 3f 93 push r19
1d36: 4f 93 push r20
1d38: 5f 93 push r21
1d3a: 6f 93 push r22
1d3c: 7f 93 push r23
1d3e: 8f 93 push r24
1d40: 9f 93 push r25
1d42: af 93 push r26
1d44: bf 93 push r27
1d46: ef 93 push r30
1d48: ff 93 push r31
1d4a: 1c df rcall .-456 ; 0x1b84 <twim_interrupt_handler>
1d4c: ff 91 pop r31
1d4e: ef 91 pop r30
1d50: bf 91 pop r27
1d52: af 91 pop r26
1d54: 9f 91 pop r25
1d56: 8f 91 pop r24
1d58: 7f 91 pop r23
1d5a: 6f 91 pop r22
1d5c: 5f 91 pop r21
1d5e: 4f 91 pop r20
1d60: 3f 91 pop r19
1d62: 2f 91 pop r18
1d64: 0f 90 pop r0
1d66: 0b be out 0x3b, r0 ; 59
1d68: 0f 90 pop r0
1d6a: 09 be out 0x39, r0 ; 57
1d6c: 0f 90 pop r0
1d6e: 08 be out 0x38, r0 ; 56
1d70: 0f 90 pop r0
1d72: 0f be out 0x3f, r0 ; 63
1d74: 0f 90 pop r0
1d76: 1f 90 pop r1
1d78: 18 95 reti
00001d7a <__vector_46>:
#endif
#ifdef TWIE
ISR(TWIE_TWIM_vect) { twim_interrupt_handler(); }
1d7a: 1f 92 push r1
1d7c: 0f 92 push r0
1d7e: 0f b6 in r0, 0x3f ; 63
1d80: 0f 92 push r0
1d82: 11 24 eor r1, r1
1d84: 08 b6 in r0, 0x38 ; 56
1d86: 0f 92 push r0
1d88: 18 be out 0x38, r1 ; 56
1d8a: 09 b6 in r0, 0x39 ; 57
1d8c: 0f 92 push r0
1d8e: 19 be out 0x39, r1 ; 57
1d90: 0b b6 in r0, 0x3b ; 59
1d92: 0f 92 push r0
1d94: 1b be out 0x3b, r1 ; 59
1d96: 2f 93 push r18
1d98: 3f 93 push r19
1d9a: 4f 93 push r20
1d9c: 5f 93 push r21
1d9e: 6f 93 push r22
1da0: 7f 93 push r23
1da2: 8f 93 push r24
1da4: 9f 93 push r25
1da6: af 93 push r26
1da8: bf 93 push r27
1daa: ef 93 push r30
1dac: ff 93 push r31
1dae: ea de rcall .-556 ; 0x1b84 <twim_interrupt_handler>
1db0: ff 91 pop r31
1db2: ef 91 pop r30
1db4: bf 91 pop r27
1db6: af 91 pop r26
1db8: 9f 91 pop r25
1dba: 8f 91 pop r24
1dbc: 7f 91 pop r23
1dbe: 6f 91 pop r22
1dc0: 5f 91 pop r21
1dc2: 4f 91 pop r20
1dc4: 3f 91 pop r19
1dc6: 2f 91 pop r18
1dc8: 0f 90 pop r0
1dca: 0b be out 0x3b, r0 ; 59
1dcc: 0f 90 pop r0
1dce: 09 be out 0x39, r0 ; 57
1dd0: 0f 90 pop r0
1dd2: 08 be out 0x38, r0 ; 56
1dd4: 0f 90 pop r0
1dd6: 0f be out 0x3f, r0 ; 63
1dd8: 0f 90 pop r0
1dda: 1f 90 pop r1
1ddc: 18 95 reti
00001dde <__vector_107>:
#endif
#ifdef TWIF
ISR(TWIF_TWIM_vect) { twim_interrupt_handler(); }
1dde: 1f 92 push r1
1de0: 0f 92 push r0
1de2: 0f b6 in r0, 0x3f ; 63
1de4: 0f 92 push r0
1de6: 11 24 eor r1, r1
1de8: 08 b6 in r0, 0x38 ; 56
1dea: 0f 92 push r0
1dec: 18 be out 0x38, r1 ; 56
1dee: 09 b6 in r0, 0x39 ; 57
1df0: 0f 92 push r0
1df2: 19 be out 0x39, r1 ; 57
1df4: 0b b6 in r0, 0x3b ; 59
1df6: 0f 92 push r0
1df8: 1b be out 0x3b, r1 ; 59
1dfa: 2f 93 push r18
1dfc: 3f 93 push r19
1dfe: 4f 93 push r20
1e00: 5f 93 push r21
1e02: 6f 93 push r22
1e04: 7f 93 push r23
1e06: 8f 93 push r24
1e08: 9f 93 push r25
1e0a: af 93 push r26
1e0c: bf 93 push r27
1e0e: ef 93 push r30
1e10: ff 93 push r31
1e12: b8 de rcall .-656 ; 0x1b84 <twim_interrupt_handler>
1e14: ff 91 pop r31
1e16: ef 91 pop r30
1e18: bf 91 pop r27
1e1a: af 91 pop r26
1e1c: 9f 91 pop r25
1e1e: 8f 91 pop r24
1e20: 7f 91 pop r23
1e22: 6f 91 pop r22
1e24: 5f 91 pop r21
1e26: 4f 91 pop r20
1e28: 3f 91 pop r19
1e2a: 2f 91 pop r18
1e2c: 0f 90 pop r0
1e2e: 0b be out 0x3b, r0 ; 59
1e30: 0f 90 pop r0
1e32: 09 be out 0x39, r0 ; 57
1e34: 0f 90 pop r0
1e36: 08 be out 0x38, r0 ; 56
1e38: 0f 90 pop r0
1e3a: 0f be out 0x3f, r0 ; 63
1e3c: 0f 90 pop r0
1e3e: 1f 90 pop r1
1e40: 18 95 reti
00001e42 <twi_master_init>:
* (see \ref twi_options_t)
* \retval STATUS_OK Transaction is successful
* \retval ERR_INVALID_ARG Invalid arguments in \c opt.
*/
status_code_t twi_master_init(TWI_t *twi, const twi_options_t *opt)
{
1e42: fc 01 movw r30, r24
uint8_t const ctrla = CONF_TWIM_INTLVL | TWI_MASTER_RIEN_bm |
TWI_MASTER_WIEN_bm | TWI_MASTER_ENABLE_bm;
twi->MASTER.BAUD = opt->speed_reg;
1e44: db 01 movw r26, r22
1e46: 14 96 adiw r26, 0x04 ; 4
1e48: 8c 91 ld r24, X
1e4a: 85 83 std Z+5, r24 ; 0x05
twi->MASTER.CTRLA = ctrla;
1e4c: 88 eb ldi r24, 0xB8 ; 184
1e4e: 81 83 std Z+1, r24 ; 0x01
twi->MASTER.STATUS = TWI_MASTER_BUSSTATE_IDLE_gc;
1e50: 81 e0 ldi r24, 0x01 ; 1
1e52: 84 83 std Z+4, r24 ; 0x04
transfer.locked = false;
1e54: e0 e1 ldi r30, 0x10 ; 16
1e56: f2 e2 ldi r31, 0x22 ; 34
1e58: 11 86 std Z+9, r1 ; 0x09
transfer.status = STATUS_OK;
1e5a: 12 86 std Z+10, r1 ; 0x0a
/* Enable configured PMIC interrupt level. */
PMIC.CTRL |= CONF_PMIC_INTLVL;
1e5c: e0 ea ldi r30, 0xA0 ; 160
1e5e: f0 e0 ldi r31, 0x00 ; 0
1e60: 82 81 ldd r24, Z+2 ; 0x02
1e62: 82 60 ori r24, 0x02 ; 2
1e64: 82 83 std Z+2, r24 ; 0x02
cpu_irq_enable();
1e66: 78 94 sei
return STATUS_OK;
}
1e68: 80 e0 ldi r24, 0x00 ; 0
1e6a: 08 95 ret
00001e6c <twi_master_transfer>:
* - ERR_PROTOCOL to indicate an unexpected bus state
* - ERR_INVALID_ARG to indicate invalid arguments.
*/
status_code_t twi_master_transfer(TWI_t *twi,
const twi_package_t *package, bool read)
{
1e6c: cf 93 push r28
1e6e: df 93 push r29
1e70: 1f 92 push r1
1e72: cd b7 in r28, 0x3d ; 61
1e74: de b7 in r29, 0x3e ; 62
1e76: 9c 01 movw r18, r24
1e78: fb 01 movw r30, r22
/* Do a sanity check on the arguments. */
if ((twi == NULL) || (package == NULL)) {
1e7a: 89 2b or r24, r25
1e7c: 09 f4 brne .+2 ; 0x1e80 <twi_master_transfer+0x14>
1e7e: 51 c0 rjmp .+162 ; 0x1f22 <twi_master_transfer+0xb6>
1e80: 30 97 sbiw r30, 0x00 ; 0
1e82: 09 f4 brne .+2 ; 0x1e86 <twi_master_transfer+0x1a>
1e84: 50 c0 rjmp .+160 ; 0x1f26 <twi_master_transfer+0xba>
return ERR_INVALID_ARG;
}
/* Initiate a transaction when the bus is ready. */
status_code_t status = twim_acquire(package->no_wait);
1e86: 92 85 ldd r25, Z+10 ; 0x0a
*
* \return STATUS_OK if the bus is acquired, else ERR_BUSY.
*/
static inline status_code_t twim_acquire(bool no_wait)
{
while (transfer.locked) {
1e88: 80 91 19 22 lds r24, 0x2219 ; 0x802219 <transfer+0x9>
1e8c: 88 23 and r24, r24
1e8e: 19 f0 breq .+6 ; 0x1e96 <twi_master_transfer+0x2a>
if (no_wait) { return ERR_BUSY; }
1e90: 99 23 and r25, r25
1e92: f1 f3 breq .-4 ; 0x1e90 <twi_master_transfer+0x24>
1e94: 4a c0 rjmp .+148 ; 0x1f2a <twi_master_transfer+0xbe>
typedef uint8_t irqflags_t;
static inline irqflags_t cpu_irq_save(void)
{
volatile irqflags_t flags = SREG;
1e96: 8f b7 in r24, 0x3f ; 63
1e98: 89 83 std Y+1, r24 ; 0x01
cpu_irq_disable();
1e9a: f8 94 cli
return flags;
1e9c: 89 81 ldd r24, Y+1 ; 0x01
}
irqflags_t const flags = cpu_irq_save ();
transfer.locked = true;
1e9e: a0 e1 ldi r26, 0x10 ; 16
1ea0: b2 e2 ldi r27, 0x22 ; 34
1ea2: 91 e0 ldi r25, 0x01 ; 1
1ea4: 19 96 adiw r26, 0x09 ; 9
1ea6: 9c 93 st X, r25
1ea8: 19 97 sbiw r26, 0x09 ; 9
transfer.status = OPERATION_IN_PROGRESS;
1eaa: 90 e8 ldi r25, 0x80 ; 128
1eac: 1a 96 adiw r26, 0x0a ; 10
1eae: 9c 93 st X, r25
1eb0: 1a 97 sbiw r26, 0x0a ; 10
}
static inline void cpu_irq_restore(irqflags_t flags)
{
barrier();
SREG = flags;
1eb2: 8f bf out 0x3f, r24 ; 63
/* Initiate a transaction when the bus is ready. */
status_code_t status = twim_acquire(package->no_wait);
if (STATUS_OK == status) {
transfer.bus = (TWI_t *) twi;
1eb4: 2d 93 st X+, r18
1eb6: 3c 93 st X, r19
1eb8: 11 97 sbiw r26, 0x01 ; 1
transfer.pkg = (twi_package_t *) package;
1eba: 12 96 adiw r26, 0x02 ; 2
1ebc: 6d 93 st X+, r22
1ebe: 7c 93 st X, r23
1ec0: 13 97 sbiw r26, 0x03 ; 3
transfer.addr_count = 0;
1ec2: 14 96 adiw r26, 0x04 ; 4
1ec4: 1d 92 st X+, r1
1ec6: 1c 92 st X, r1
1ec8: 15 97 sbiw r26, 0x05 ; 5
transfer.data_count = 0;
1eca: 16 96 adiw r26, 0x06 ; 6
1ecc: 1d 92 st X+, r1
1ece: 1c 92 st X, r1
1ed0: 17 97 sbiw r26, 0x07 ; 7
transfer.read = read;
1ed2: 18 96 adiw r26, 0x08 ; 8
1ed4: 4c 93 st X, r20
uint8_t const chip = (package->chip) << 1;
1ed6: 80 81 ld r24, Z
1ed8: 88 0f add r24, r24
if (package->addr_length || (false == read)) {
1eda: 64 81 ldd r22, Z+4 ; 0x04
1edc: 75 81 ldd r23, Z+5 ; 0x05
1ede: 67 2b or r22, r23
1ee0: 11 f4 brne .+4 ; 0x1ee6 <twi_master_transfer+0x7a>
1ee2: 41 11 cpse r20, r1
1ee4: 03 c0 rjmp .+6 ; 0x1eec <twi_master_transfer+0x80>
transfer.bus->MASTER.ADDR = chip;
1ee6: f9 01 movw r30, r18
1ee8: 86 83 std Z+6, r24 ; 0x06
1eea: 03 c0 rjmp .+6 ; 0x1ef2 <twi_master_transfer+0x86>
} else if (read) {
transfer.bus->MASTER.ADDR = chip | 0x01;
1eec: 81 60 ori r24, 0x01 ; 1
1eee: f9 01 movw r30, r18
1ef0: 86 83 std Z+6, r24 ; 0x06
{
/* First wait for the driver event handler to indicate something
* other than a transfer in-progress, then test the bus interface
* for an Idle bus state.
*/
while (OPERATION_IN_PROGRESS == transfer.status);
1ef2: e0 e1 ldi r30, 0x10 ; 16
1ef4: f2 e2 ldi r31, 0x22 ; 34
1ef6: 92 85 ldd r25, Z+10 ; 0x0a
1ef8: 90 38 cpi r25, 0x80 ; 128
1efa: e9 f3 breq .-6 ; 0x1ef6 <twi_master_transfer+0x8a>
* \retval false The bus is currently busy.
*/
static inline bool twim_idle (const TWI_t * twi)
{
return ((twi->MASTER.STATUS & TWI_MASTER_BUSSTATE_gm)
1efc: f9 01 movw r30, r18
1efe: 84 81 ldd r24, Z+4 ; 0x04
* other than a transfer in-progress, then test the bus interface
* for an Idle bus state.
*/
while (OPERATION_IN_PROGRESS == transfer.status);
while (! twim_idle(transfer.bus)) { barrier(); }
1f00: 83 70 andi r24, 0x03 ; 3
1f02: 81 30 cpi r24, 0x01 ; 1
1f04: 49 f0 breq .+18 ; 0x1f18 <twi_master_transfer+0xac>
1f06: a0 e1 ldi r26, 0x10 ; 16
1f08: b2 e2 ldi r27, 0x22 ; 34
1f0a: ed 91 ld r30, X+
1f0c: fc 91 ld r31, X
1f0e: 11 97 sbiw r26, 0x01 ; 1
* \retval false The bus is currently busy.
*/
static inline bool twim_idle (const TWI_t * twi)
{
return ((twi->MASTER.STATUS & TWI_MASTER_BUSSTATE_gm)
1f10: 84 81 ldd r24, Z+4 ; 0x04
* other than a transfer in-progress, then test the bus interface
* for an Idle bus state.
*/
while (OPERATION_IN_PROGRESS == transfer.status);
while (! twim_idle(transfer.bus)) { barrier(); }
1f12: 83 70 andi r24, 0x03 ; 3
1f14: 81 30 cpi r24, 0x01 ; 1
1f16: c9 f7 brne .-14 ; 0x1f0a <twi_master_transfer+0x9e>
status_code_t const status = transfer.status;
1f18: e0 e1 ldi r30, 0x10 ; 16
1f1a: f2 e2 ldi r31, 0x22 ; 34
1f1c: 82 85 ldd r24, Z+10 ; 0x0a
transfer.locked = false;
1f1e: 11 86 std Z+9, r1 ; 0x09
1f20: 05 c0 rjmp .+10 ; 0x1f2c <twi_master_transfer+0xc0>
const twi_package_t *package, bool read)
{
/* Do a sanity check on the arguments. */
if ((twi == NULL) || (package == NULL)) {
return ERR_INVALID_ARG;
1f22: 88 ef ldi r24, 0xF8 ; 248
1f24: 03 c0 rjmp .+6 ; 0x1f2c <twi_master_transfer+0xc0>
1f26: 88 ef ldi r24, 0xF8 ; 248
1f28: 01 c0 rjmp .+2 ; 0x1f2c <twi_master_transfer+0xc0>
*/
static inline status_code_t twim_acquire(bool no_wait)
{
while (transfer.locked) {
if (no_wait) { return ERR_BUSY; }
1f2a: 86 ef ldi r24, 0xF6 ; 246
status = twim_release();
}
return status;
}
1f2c: 0f 90 pop r0
1f2e: df 91 pop r29
1f30: cf 91 pop r28
1f32: 08 95 ret
00001f34 <usart_putchar>:
if (baud_offset != USART_BAUD_UNDEFINED) {
(usart)->BAUDCTRLB = (uint8_t)((uint16_t)baudctrl);
(usart)->BAUDCTRLA = (uint8_t)((uint16_t)baudctrl >> 8);
}
}
1f34: fc 01 movw r30, r24
1f36: 91 81 ldd r25, Z+1 ; 0x01
1f38: 95 ff sbrs r25, 5
1f3a: fd cf rjmp .-6 ; 0x1f36 <usart_putchar+0x2>
1f3c: 60 83 st Z, r22
1f3e: 80 e0 ldi r24, 0x00 ; 0
1f40: 90 e0 ldi r25, 0x00 ; 0
1f42: 08 95 ret
00001f44 <usart_getchar>:
1f44: fc 01 movw r30, r24
1f46: 91 81 ldd r25, Z+1 ; 0x01
1f48: 99 23 and r25, r25
1f4a: ec f7 brge .-6 ; 0x1f46 <usart_getchar+0x2>
1f4c: 80 81 ld r24, Z
1f4e: 08 95 ret
00001f50 <usart_set_baudrate>:
* \retval true if the hardware supports the baud rate
* \retval false if the hardware does not support the baud rate (i.e. it's
* either too high or too low.)
*/
bool usart_set_baudrate(USART_t *usart, uint32_t baud, uint32_t cpu_hz)
{
1f50: 4f 92 push r4
1f52: 5f 92 push r5
1f54: 6f 92 push r6
1f56: 7f 92 push r7
1f58: 8f 92 push r8
1f5a: 9f 92 push r9
1f5c: af 92 push r10
1f5e: bf 92 push r11
1f60: ef 92 push r14
1f62: ff 92 push r15
1f64: 0f 93 push r16
1f66: 1f 93 push r17
1f68: cf 93 push r28
1f6a: 7c 01 movw r14, r24
1f6c: 4a 01 movw r8, r20
1f6e: 5b 01 movw r10, r22
1f70: 28 01 movw r4, r16
1f72: 39 01 movw r6, r18
/* 8 = (2^0) * 8 * (2^0) = (2^BSCALE_MIN) * 8 * (BSEL_MIN) */
max_rate = cpu_hz / 8;
/* 4194304 = (2^7) * 8 * (2^12) = (2^BSCALE_MAX) * 8 * (BSEL_MAX+1) */
min_rate = cpu_hz / 4194304;
if (!((usart)->CTRLB & USART_CLK2X_bm)) {
1f74: fc 01 movw r30, r24
1f76: 84 81 ldd r24, Z+4 ; 0x04
1f78: 82 ff sbrs r24, 2
1f7a: 16 c0 rjmp .+44 ; 0x1fa8 <usart_set_baudrate+0x58>
/*
* Check if the hardware supports the given baud rate
*/
/* 8 = (2^0) * 8 * (2^0) = (2^BSCALE_MIN) * 8 * (BSEL_MIN) */
max_rate = cpu_hz / 8;
1f7c: d9 01 movw r26, r18
1f7e: c8 01 movw r24, r16
1f80: 68 94 set
1f82: 12 f8 bld r1, 2
1f84: b6 95 lsr r27
1f86: a7 95 ror r26
1f88: 97 95 ror r25
1f8a: 87 95 ror r24
1f8c: 16 94 lsr r1
1f8e: d1 f7 brne .-12 ; 0x1f84 <usart_set_baudrate+0x34>
/* 4194304 = (2^7) * 8 * (2^12) = (2^BSCALE_MAX) * 8 * (BSEL_MAX+1) */
min_rate = cpu_hz / 4194304;
1f90: b9 01 movw r22, r18
1f92: a8 01 movw r20, r16
1f94: 03 2e mov r0, r19
1f96: 36 e1 ldi r19, 0x16 ; 22
1f98: 76 95 lsr r23
1f9a: 67 95 ror r22
1f9c: 57 95 ror r21
1f9e: 47 95 ror r20
1fa0: 3a 95 dec r19
1fa2: d1 f7 brne .-12 ; 0x1f98 <usart_set_baudrate+0x48>
1fa4: 30 2d mov r19, r0
1fa6: 15 c0 rjmp .+42 ; 0x1fd2 <usart_set_baudrate+0x82>
if (!((usart)->CTRLB & USART_CLK2X_bm)) {
max_rate /= 2;
1fa8: d9 01 movw r26, r18
1faa: c8 01 movw r24, r16
1fac: 68 94 set
1fae: 13 f8 bld r1, 3
1fb0: b6 95 lsr r27
1fb2: a7 95 ror r26
1fb4: 97 95 ror r25
1fb6: 87 95 ror r24
1fb8: 16 94 lsr r1
1fba: d1 f7 brne .-12 ; 0x1fb0 <usart_set_baudrate+0x60>
min_rate /= 2;
1fbc: b9 01 movw r22, r18
1fbe: a8 01 movw r20, r16
1fc0: 03 2e mov r0, r19
1fc2: 37 e1 ldi r19, 0x17 ; 23
1fc4: 76 95 lsr r23
1fc6: 67 95 ror r22
1fc8: 57 95 ror r21
1fca: 47 95 ror r20
1fcc: 3a 95 dec r19
1fce: d1 f7 brne .-12 ; 0x1fc4 <usart_set_baudrate+0x74>
1fd0: 30 2d mov r19, r0
}
if ((baud > max_rate) || (baud < min_rate)) {
1fd2: 88 15 cp r24, r8
1fd4: 99 05 cpc r25, r9
1fd6: aa 05 cpc r26, r10
1fd8: bb 05 cpc r27, r11
1fda: 08 f4 brcc .+2 ; 0x1fde <usart_set_baudrate+0x8e>
1fdc: a6 c0 rjmp .+332 ; 0x212a <usart_set_baudrate+0x1da>
1fde: 84 16 cp r8, r20
1fe0: 95 06 cpc r9, r21
1fe2: a6 06 cpc r10, r22
1fe4: b7 06 cpc r11, r23
1fe6: 08 f4 brcc .+2 ; 0x1fea <usart_set_baudrate+0x9a>
1fe8: a2 c0 rjmp .+324 ; 0x212e <usart_set_baudrate+0x1de>
return false;
}
/* Check if double speed is enabled. */
if (!((usart)->CTRLB & USART_CLK2X_bm)) {
1fea: f7 01 movw r30, r14
1fec: 84 81 ldd r24, Z+4 ; 0x04
1fee: 82 fd sbrc r24, 2
1ff0: 04 c0 rjmp .+8 ; 0x1ffa <usart_set_baudrate+0xaa>
baud *= 2;
1ff2: 88 0c add r8, r8
1ff4: 99 1c adc r9, r9
1ff6: aa 1c adc r10, r10
1ff8: bb 1c adc r11, r11
}
/* Find the lowest possible exponent. */
limit = 0xfffU >> 4;
ratio = cpu_hz / baud;
1ffa: c3 01 movw r24, r6
1ffc: b2 01 movw r22, r4
1ffe: a5 01 movw r20, r10
2000: 94 01 movw r18, r8
2002: 0e 94 2d 3a call 0x745a ; 0x745a <__udivmodsi4>
for (exp = -7; exp < 7; exp++) {
if (ratio < limit) {
2006: 2f 3f cpi r18, 0xFF ; 255
2008: 31 05 cpc r19, r1
200a: 41 05 cpc r20, r1
200c: 51 05 cpc r21, r1
200e: 08 f4 brcc .+2 ; 0x2012 <usart_set_baudrate+0xc2>
2010: 90 c0 rjmp .+288 ; 0x2132 <usart_set_baudrate+0x1e2>
2012: 8f ef ldi r24, 0xFF ; 255
2014: 90 e0 ldi r25, 0x00 ; 0
2016: a0 e0 ldi r26, 0x00 ; 0
2018: b0 e0 ldi r27, 0x00 ; 0
201a: c9 ef ldi r28, 0xF9 ; 249
201c: 05 c0 rjmp .+10 ; 0x2028 <usart_set_baudrate+0xd8>
201e: 28 17 cp r18, r24
2020: 39 07 cpc r19, r25
2022: 4a 07 cpc r20, r26
2024: 5b 07 cpc r21, r27
2026: 58 f0 brcs .+22 ; 0x203e <usart_set_baudrate+0xee>
break;
}
limit <<= 1;
2028: 88 0f add r24, r24
202a: 99 1f adc r25, r25
202c: aa 1f adc r26, r26
202e: bb 1f adc r27, r27
if (exp < -3) {
2030: cd 3f cpi r28, 0xFD ; 253
2032: 0c f4 brge .+2 ; 0x2036 <usart_set_baudrate+0xe6>
limit |= 1;
2034: 81 60 ori r24, 0x01 ; 1
2036: cf 5f subi r28, 0xFF ; 255
/* Find the lowest possible exponent. */
limit = 0xfffU >> 4;
ratio = cpu_hz / baud;
for (exp = -7; exp < 7; exp++) {
2038: c7 30 cpi r28, 0x07 ; 7
203a: 89 f7 brne .-30 ; 0x201e <usart_set_baudrate+0xce>
203c: 4f c0 rjmp .+158 ; 0x20dc <usart_set_baudrate+0x18c>
* point.
*
* The formula for calculating BSEL is slightly different when exp is
* negative than it is when exp is positive.
*/
if (exp < 0) {
203e: cc 23 and r28, r28
2040: 0c f0 brlt .+2 ; 0x2044 <usart_set_baudrate+0xf4>
2042: 4c c0 rjmp .+152 ; 0x20dc <usart_set_baudrate+0x18c>
/* We are supposed to subtract 1, then apply BSCALE. We want to
* apply BSCALE first, so we need to turn everything inside the
* parenthesis into a single fractional expression.
*/
cpu_hz -= 8 * baud;
2044: d5 01 movw r26, r10
2046: c4 01 movw r24, r8
2048: 88 0f add r24, r24
204a: 99 1f adc r25, r25
204c: aa 1f adc r26, r26
204e: bb 1f adc r27, r27
2050: 88 0f add r24, r24
2052: 99 1f adc r25, r25
2054: aa 1f adc r26, r26
2056: bb 1f adc r27, r27
2058: 88 0f add r24, r24
205a: 99 1f adc r25, r25
205c: aa 1f adc r26, r26
205e: bb 1f adc r27, r27
2060: 48 1a sub r4, r24
2062: 59 0a sbc r5, r25
2064: 6a 0a sbc r6, r26
2066: 7b 0a sbc r7, r27
/* If we end up with a left-shift after taking the final
* divide-by-8 into account, do the shift before the divide.
* Otherwise, left-shift the denominator instead (effectively
* resulting in an overall right shift.)
*/
if (exp <= -3) {
2068: ce 3f cpi r28, 0xFE ; 254
206a: f4 f4 brge .+60 ; 0x20a8 <usart_set_baudrate+0x158>
div = ((cpu_hz << (-exp - 3)) + baud / 2) / baud;
206c: 8d ef ldi r24, 0xFD ; 253
206e: 9f ef ldi r25, 0xFF ; 255
2070: 8c 1b sub r24, r28
2072: 91 09 sbc r25, r1
2074: c7 fd sbrc r28, 7
2076: 93 95 inc r25
2078: 04 c0 rjmp .+8 ; 0x2082 <usart_set_baudrate+0x132>
207a: 44 0c add r4, r4
207c: 55 1c adc r5, r5
207e: 66 1c adc r6, r6
2080: 77 1c adc r7, r7
2082: 8a 95 dec r24
2084: d2 f7 brpl .-12 ; 0x207a <usart_set_baudrate+0x12a>
2086: d5 01 movw r26, r10
2088: c4 01 movw r24, r8
208a: b6 95 lsr r27
208c: a7 95 ror r26
208e: 97 95 ror r25
2090: 87 95 ror r24
2092: bc 01 movw r22, r24
2094: cd 01 movw r24, r26
2096: 64 0d add r22, r4
2098: 75 1d adc r23, r5
209a: 86 1d adc r24, r6
209c: 97 1d adc r25, r7
209e: a5 01 movw r20, r10
20a0: 94 01 movw r18, r8
20a2: 0e 94 2d 3a call 0x745a ; 0x745a <__udivmodsi4>
20a6: 37 c0 rjmp .+110 ; 0x2116 <usart_set_baudrate+0x1c6>
} else {
baud <<= exp + 3;
20a8: 83 e0 ldi r24, 0x03 ; 3
20aa: 8c 0f add r24, r28
20ac: a5 01 movw r20, r10
20ae: 94 01 movw r18, r8
20b0: 04 c0 rjmp .+8 ; 0x20ba <usart_set_baudrate+0x16a>
20b2: 22 0f add r18, r18
20b4: 33 1f adc r19, r19
20b6: 44 1f adc r20, r20
20b8: 55 1f adc r21, r21
20ba: 8a 95 dec r24
20bc: d2 f7 brpl .-12 ; 0x20b2 <usart_set_baudrate+0x162>
div = (cpu_hz + baud / 2) / baud;
20be: da 01 movw r26, r20
20c0: c9 01 movw r24, r18
20c2: b6 95 lsr r27
20c4: a7 95 ror r26
20c6: 97 95 ror r25
20c8: 87 95 ror r24
20ca: bc 01 movw r22, r24
20cc: cd 01 movw r24, r26
20ce: 64 0d add r22, r4
20d0: 75 1d adc r23, r5
20d2: 86 1d adc r24, r6
20d4: 97 1d adc r25, r7
20d6: 0e 94 2d 3a call 0x745a ; 0x745a <__udivmodsi4>
20da: 1d c0 rjmp .+58 ; 0x2116 <usart_set_baudrate+0x1c6>
}
} else {
/* We will always do a right shift in this case, but we need to
* shift three extra positions because of the divide-by-8.
*/
baud <<= exp + 3;
20dc: 83 e0 ldi r24, 0x03 ; 3
20de: 8c 0f add r24, r28
20e0: a5 01 movw r20, r10
20e2: 94 01 movw r18, r8
20e4: 04 c0 rjmp .+8 ; 0x20ee <usart_set_baudrate+0x19e>
20e6: 22 0f add r18, r18
20e8: 33 1f adc r19, r19
20ea: 44 1f adc r20, r20
20ec: 55 1f adc r21, r21
20ee: 8a 95 dec r24
20f0: d2 f7 brpl .-12 ; 0x20e6 <usart_set_baudrate+0x196>
div = (cpu_hz + baud / 2) / baud - 1;
20f2: da 01 movw r26, r20
20f4: c9 01 movw r24, r18
20f6: b6 95 lsr r27
20f8: a7 95 ror r26
20fa: 97 95 ror r25
20fc: 87 95 ror r24
20fe: bc 01 movw r22, r24
2100: cd 01 movw r24, r26
2102: 64 0d add r22, r4
2104: 75 1d adc r23, r5
2106: 86 1d adc r24, r6
2108: 97 1d adc r25, r7
210a: 0e 94 2d 3a call 0x745a ; 0x745a <__udivmodsi4>
210e: 21 50 subi r18, 0x01 ; 1
2110: 31 09 sbc r19, r1
2112: 41 09 sbc r20, r1
2114: 51 09 sbc r21, r1
}
(usart)->BAUDCTRLB = (uint8_t)(((div >> 8) & 0X0F) | (exp << 4));
2116: 83 2f mov r24, r19
2118: 8f 70 andi r24, 0x0F ; 15
211a: c2 95 swap r28
211c: c0 7f andi r28, 0xF0 ; 240
211e: c8 2b or r28, r24
2120: f7 01 movw r30, r14
2122: c7 83 std Z+7, r28 ; 0x07
(usart)->BAUDCTRLA = (uint8_t)div;
2124: 26 83 std Z+6, r18 ; 0x06
return true;
2126: 81 e0 ldi r24, 0x01 ; 1
2128: 18 c0 rjmp .+48 ; 0x215a <usart_set_baudrate+0x20a>
max_rate /= 2;
min_rate /= 2;
}
if ((baud > max_rate) || (baud < min_rate)) {
return false;
212a: 80 e0 ldi r24, 0x00 ; 0
212c: 16 c0 rjmp .+44 ; 0x215a <usart_set_baudrate+0x20a>
212e: 80 e0 ldi r24, 0x00 ; 0
2130: 14 c0 rjmp .+40 ; 0x215a <usart_set_baudrate+0x20a>
if (exp < 0) {
/* We are supposed to subtract 1, then apply BSCALE. We want to
* apply BSCALE first, so we need to turn everything inside the
* parenthesis into a single fractional expression.
*/
cpu_hz -= 8 * baud;
2132: d5 01 movw r26, r10
2134: c4 01 movw r24, r8
2136: 88 0f add r24, r24
2138: 99 1f adc r25, r25
213a: aa 1f adc r26, r26
213c: bb 1f adc r27, r27
213e: 88 0f add r24, r24
2140: 99 1f adc r25, r25
2142: aa 1f adc r26, r26
2144: bb 1f adc r27, r27
2146: 88 0f add r24, r24
2148: 99 1f adc r25, r25
214a: aa 1f adc r26, r26
214c: bb 1f adc r27, r27
214e: 48 1a sub r4, r24
2150: 59 0a sbc r5, r25
2152: 6a 0a sbc r6, r26
2154: 7b 0a sbc r7, r27
/* Find the lowest possible exponent. */
limit = 0xfffU >> 4;
ratio = cpu_hz / baud;
for (exp = -7; exp < 7; exp++) {
2156: c9 ef ldi r28, 0xF9 ; 249
2158: 89 cf rjmp .-238 ; 0x206c <usart_set_baudrate+0x11c>
(usart)->BAUDCTRLB = (uint8_t)(((div >> 8) & 0X0F) | (exp << 4));
(usart)->BAUDCTRLA = (uint8_t)div;
return true;
}
215a: cf 91 pop r28
215c: 1f 91 pop r17
215e: 0f 91 pop r16
2160: ff 90 pop r15
2162: ef 90 pop r14
2164: bf 90 pop r11
2166: af 90 pop r10
2168: 9f 90 pop r9
216a: 8f 90 pop r8
216c: 7f 90 pop r7
216e: 6f 90 pop r6
2170: 5f 90 pop r5
2172: 4f 90 pop r4
2174: 08 95 ret
00002176 <usart_init_rs232>:
*
* \retval true if the initialization was successfull
* \retval false if the initialization failed (error in baud rate calculation)
*/
bool usart_init_rs232(USART_t *usart, const usart_rs232_options_t *opt)
{
2176: 0f 93 push r16
2178: 1f 93 push r17
217a: cf 93 push r28
217c: df 93 push r29
217e: ec 01 movw r28, r24
2180: 8b 01 movw r16, r22
*
* \param module Pointer to the module's base address.
*/
static inline void sysclk_enable_peripheral_clock(const volatile void *module)
{
if (module == NULL) {
2182: 00 97 sbiw r24, 0x00 ; 0
2184: 09 f4 brne .+2 ; 0x2188 <usart_init_rs232+0x12>
2186: 5d c1 rjmp .+698 ; 0x2442 <usart_init_rs232+0x2cc>
Assert(false);
}
#ifdef AES
else if (module == &AES) {
2188: 80 3c cpi r24, 0xC0 ; 192
218a: 91 05 cpc r25, r1
218c: 29 f4 brne .+10 ; 0x2198 <usart_init_rs232+0x22>
sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_AES);
218e: 60 e1 ldi r22, 0x10 ; 16
2190: 80 e0 ldi r24, 0x00 ; 0
2192: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
2196: 55 c1 rjmp .+682 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef EBI
else if (module == &EBI) {
2198: c0 34 cpi r28, 0x40 ; 64
219a: 84 e0 ldi r24, 0x04 ; 4
219c: d8 07 cpc r29, r24
219e: 29 f4 brne .+10 ; 0x21aa <usart_init_rs232+0x34>
sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_EBI);
21a0: 68 e0 ldi r22, 0x08 ; 8
21a2: 80 e0 ldi r24, 0x00 ; 0
21a4: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
21a8: 4c c1 rjmp .+664 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef RTC
else if (module == &RTC) {
21aa: c1 15 cp r28, r1
21ac: e4 e0 ldi r30, 0x04 ; 4
21ae: de 07 cpc r29, r30
21b0: 29 f4 brne .+10 ; 0x21bc <usart_init_rs232+0x46>
sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_RTC);
21b2: 64 e0 ldi r22, 0x04 ; 4
21b4: 80 e0 ldi r24, 0x00 ; 0
21b6: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
21ba: 43 c1 rjmp .+646 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef EVSYS
else if (module == &EVSYS) {
21bc: c0 38 cpi r28, 0x80 ; 128
21be: f1 e0 ldi r31, 0x01 ; 1
21c0: df 07 cpc r29, r31
21c2: 29 f4 brne .+10 ; 0x21ce <usart_init_rs232+0x58>
sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_EVSYS);
21c4: 62 e0 ldi r22, 0x02 ; 2
21c6: 80 e0 ldi r24, 0x00 ; 0
21c8: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
21cc: 3a c1 rjmp .+628 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef DMA
else if (module == &DMA) {
21ce: c1 15 cp r28, r1
21d0: 81 e0 ldi r24, 0x01 ; 1
21d2: d8 07 cpc r29, r24
21d4: 29 f4 brne .+10 ; 0x21e0 <usart_init_rs232+0x6a>
sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_DMA);
21d6: 61 e0 ldi r22, 0x01 ; 1
21d8: 80 e0 ldi r24, 0x00 ; 0
21da: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
21de: 31 c1 rjmp .+610 ; 0x2442 <usart_init_rs232+0x2cc>
else if (module == &EDMA) {
sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_EDMA);
}
#endif
#ifdef ACA
else if (module == &ACA) {
21e0: c0 38 cpi r28, 0x80 ; 128
21e2: e3 e0 ldi r30, 0x03 ; 3
21e4: de 07 cpc r29, r30
21e6: 29 f4 brne .+10 ; 0x21f2 <usart_init_rs232+0x7c>
sysclk_enable_module(SYSCLK_PORT_A, SYSCLK_AC);
21e8: 61 e0 ldi r22, 0x01 ; 1
21ea: 81 e0 ldi r24, 0x01 ; 1
21ec: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
21f0: 28 c1 rjmp .+592 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef ACB
else if (module == &ACB) {
21f2: c0 39 cpi r28, 0x90 ; 144
21f4: f3 e0 ldi r31, 0x03 ; 3
21f6: df 07 cpc r29, r31
21f8: 29 f4 brne .+10 ; 0x2204 <usart_init_rs232+0x8e>
sysclk_enable_module(SYSCLK_PORT_B, SYSCLK_AC);
21fa: 61 e0 ldi r22, 0x01 ; 1
21fc: 82 e0 ldi r24, 0x02 ; 2
21fe: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
2202: 1f c1 rjmp .+574 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef ADCA
else if (module == &ADCA) {
2204: c1 15 cp r28, r1
2206: 82 e0 ldi r24, 0x02 ; 2
2208: d8 07 cpc r29, r24
220a: 29 f4 brne .+10 ; 0x2216 <usart_init_rs232+0xa0>
sysclk_enable_module(SYSCLK_PORT_A, SYSCLK_ADC);
220c: 62 e0 ldi r22, 0x02 ; 2
220e: 81 e0 ldi r24, 0x01 ; 1
2210: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
2214: 16 c1 rjmp .+556 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef ADCB
else if (module == &ADCB) {
2216: c0 34 cpi r28, 0x40 ; 64
2218: e2 e0 ldi r30, 0x02 ; 2
221a: de 07 cpc r29, r30
221c: 29 f4 brne .+10 ; 0x2228 <usart_init_rs232+0xb2>
sysclk_enable_module(SYSCLK_PORT_B, SYSCLK_ADC);
221e: 62 e0 ldi r22, 0x02 ; 2
2220: 82 e0 ldi r24, 0x02 ; 2
2222: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
2226: 0d c1 rjmp .+538 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef DACA
else if (module == &DACA) {
2228: c1 15 cp r28, r1
222a: f3 e0 ldi r31, 0x03 ; 3
222c: df 07 cpc r29, r31
222e: 29 f4 brne .+10 ; 0x223a <usart_init_rs232+0xc4>
sysclk_enable_module(SYSCLK_PORT_A, SYSCLK_DAC);
2230: 64 e0 ldi r22, 0x04 ; 4
2232: 81 e0 ldi r24, 0x01 ; 1
2234: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
2238: 04 c1 rjmp .+520 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
// Workaround for bad XMEGA D header file
#if !XMEGA_D
#ifdef DACB
else if (module == &DACB) {
223a: c0 32 cpi r28, 0x20 ; 32
223c: 83 e0 ldi r24, 0x03 ; 3
223e: d8 07 cpc r29, r24
2240: 29 f4 brne .+10 ; 0x224c <usart_init_rs232+0xd6>
sysclk_enable_module(SYSCLK_PORT_B, SYSCLK_DAC);
2242: 64 e0 ldi r22, 0x04 ; 4
2244: 82 e0 ldi r24, 0x02 ; 2
2246: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
224a: fb c0 rjmp .+502 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#endif // Workaround end
#ifdef TCC0
else if (module == &TCC0) {
224c: c1 15 cp r28, r1
224e: e8 e0 ldi r30, 0x08 ; 8
2250: de 07 cpc r29, r30
2252: 29 f4 brne .+10 ; 0x225e <usart_init_rs232+0xe8>
sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TC0);
2254: 61 e0 ldi r22, 0x01 ; 1
2256: 83 e0 ldi r24, 0x03 ; 3
2258: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
225c: f2 c0 rjmp .+484 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef TCD0
else if (module == &TCD0) {
225e: c1 15 cp r28, r1
2260: f9 e0 ldi r31, 0x09 ; 9
2262: df 07 cpc r29, r31
2264: 29 f4 brne .+10 ; 0x2270 <usart_init_rs232+0xfa>
sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_TC0);
2266: 61 e0 ldi r22, 0x01 ; 1
2268: 84 e0 ldi r24, 0x04 ; 4
226a: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
226e: e9 c0 rjmp .+466 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef TCE0
else if (module == &TCE0) {
2270: c1 15 cp r28, r1
2272: 8a e0 ldi r24, 0x0A ; 10
2274: d8 07 cpc r29, r24
2276: 29 f4 brne .+10 ; 0x2282 <usart_init_rs232+0x10c>
sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_TC0);
2278: 61 e0 ldi r22, 0x01 ; 1
227a: 85 e0 ldi r24, 0x05 ; 5
227c: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
2280: e0 c0 rjmp .+448 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef TCF0
else if (module == &TCF0) {
2282: c1 15 cp r28, r1
2284: eb e0 ldi r30, 0x0B ; 11
2286: de 07 cpc r29, r30
2288: 29 f4 brne .+10 ; 0x2294 <usart_init_rs232+0x11e>
sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_TC0);
228a: 61 e0 ldi r22, 0x01 ; 1
228c: 86 e0 ldi r24, 0x06 ; 6
228e: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
2292: d7 c0 rjmp .+430 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef TCC1
else if (module == &TCC1) {
2294: c0 34 cpi r28, 0x40 ; 64
2296: f8 e0 ldi r31, 0x08 ; 8
2298: df 07 cpc r29, r31
229a: 29 f4 brne .+10 ; 0x22a6 <usart_init_rs232+0x130>
sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TC1);
229c: 62 e0 ldi r22, 0x02 ; 2
229e: 83 e0 ldi r24, 0x03 ; 3
22a0: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
22a4: ce c0 rjmp .+412 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef TCD1
else if (module == &TCD1) {
22a6: c0 34 cpi r28, 0x40 ; 64
22a8: 89 e0 ldi r24, 0x09 ; 9
22aa: d8 07 cpc r29, r24
22ac: 29 f4 brne .+10 ; 0x22b8 <usart_init_rs232+0x142>
sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_TC1);
22ae: 62 e0 ldi r22, 0x02 ; 2
22b0: 84 e0 ldi r24, 0x04 ; 4
22b2: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
22b6: c5 c0 rjmp .+394 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef TCE1
else if (module == &TCE1) {
22b8: c0 34 cpi r28, 0x40 ; 64
22ba: ea e0 ldi r30, 0x0A ; 10
22bc: de 07 cpc r29, r30
22be: 29 f4 brne .+10 ; 0x22ca <usart_init_rs232+0x154>
sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_TC1);
22c0: 62 e0 ldi r22, 0x02 ; 2
22c2: 85 e0 ldi r24, 0x05 ; 5
22c4: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
22c8: bc c0 rjmp .+376 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef TCF1
else if (module == &TCF1) {
22ca: c0 34 cpi r28, 0x40 ; 64
22cc: fb e0 ldi r31, 0x0B ; 11
22ce: df 07 cpc r29, r31
22d0: 29 f4 brne .+10 ; 0x22dc <usart_init_rs232+0x166>
sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_TC1);
22d2: 62 e0 ldi r22, 0x02 ; 2
22d4: 86 e0 ldi r24, 0x06 ; 6
22d6: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
22da: b3 c0 rjmp .+358 ; 0x2442 <usart_init_rs232+0x2cc>
else if (module == &TCD5) {
sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_TC5);
}
#endif
#ifdef HIRESC
else if (module == &HIRESC) {
22dc: c0 39 cpi r28, 0x90 ; 144
22de: 88 e0 ldi r24, 0x08 ; 8
22e0: d8 07 cpc r29, r24
22e2: 29 f4 brne .+10 ; 0x22ee <usart_init_rs232+0x178>
sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_HIRES);
22e4: 64 e0 ldi r22, 0x04 ; 4
22e6: 83 e0 ldi r24, 0x03 ; 3
22e8: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
22ec: aa c0 rjmp .+340 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef HIRESD
else if (module == &HIRESD) {
22ee: c0 39 cpi r28, 0x90 ; 144
22f0: e9 e0 ldi r30, 0x09 ; 9
22f2: de 07 cpc r29, r30
22f4: 29 f4 brne .+10 ; 0x2300 <usart_init_rs232+0x18a>
sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_HIRES);
22f6: 64 e0 ldi r22, 0x04 ; 4
22f8: 84 e0 ldi r24, 0x04 ; 4
22fa: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
22fe: a1 c0 rjmp .+322 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef HIRESE
else if (module == &HIRESE) {
2300: c0 39 cpi r28, 0x90 ; 144
2302: fa e0 ldi r31, 0x0A ; 10
2304: df 07 cpc r29, r31
2306: 29 f4 brne .+10 ; 0x2312 <usart_init_rs232+0x19c>
sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_HIRES);
2308: 64 e0 ldi r22, 0x04 ; 4
230a: 85 e0 ldi r24, 0x05 ; 5
230c: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
2310: 98 c0 rjmp .+304 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef HIRESF
else if (module == &HIRESF) {
2312: c0 39 cpi r28, 0x90 ; 144
2314: 8b e0 ldi r24, 0x0B ; 11
2316: d8 07 cpc r29, r24
2318: 29 f4 brne .+10 ; 0x2324 <usart_init_rs232+0x1ae>
sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_HIRES);
231a: 64 e0 ldi r22, 0x04 ; 4
231c: 86 e0 ldi r24, 0x06 ; 6
231e: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
2322: 8f c0 rjmp .+286 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef SPIC
else if (module == &SPIC) {
2324: c0 3c cpi r28, 0xC0 ; 192
2326: e8 e0 ldi r30, 0x08 ; 8
2328: de 07 cpc r29, r30
232a: 29 f4 brne .+10 ; 0x2336 <usart_init_rs232+0x1c0>
sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_SPI);
232c: 68 e0 ldi r22, 0x08 ; 8
232e: 83 e0 ldi r24, 0x03 ; 3
2330: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
2334: 86 c0 rjmp .+268 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef SPID
else if (module == &SPID) {
2336: c0 3c cpi r28, 0xC0 ; 192
2338: f9 e0 ldi r31, 0x09 ; 9
233a: df 07 cpc r29, r31
233c: 29 f4 brne .+10 ; 0x2348 <usart_init_rs232+0x1d2>
sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_SPI);
233e: 68 e0 ldi r22, 0x08 ; 8
2340: 84 e0 ldi r24, 0x04 ; 4
2342: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
2346: 7d c0 rjmp .+250 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef SPIE
else if (module == &SPIE) {
2348: c0 3c cpi r28, 0xC0 ; 192
234a: 8a e0 ldi r24, 0x0A ; 10
234c: d8 07 cpc r29, r24
234e: 29 f4 brne .+10 ; 0x235a <usart_init_rs232+0x1e4>
sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_SPI);
2350: 68 e0 ldi r22, 0x08 ; 8
2352: 85 e0 ldi r24, 0x05 ; 5
2354: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
2358: 74 c0 rjmp .+232 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef SPIF
else if (module == &SPIF) {
235a: c0 3c cpi r28, 0xC0 ; 192
235c: eb e0 ldi r30, 0x0B ; 11
235e: de 07 cpc r29, r30
2360: 29 f4 brne .+10 ; 0x236c <usart_init_rs232+0x1f6>
sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_SPI);
2362: 68 e0 ldi r22, 0x08 ; 8
2364: 86 e0 ldi r24, 0x06 ; 6
2366: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
236a: 6b c0 rjmp .+214 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef USARTC0
else if (module == &USARTC0) {
236c: c0 3a cpi r28, 0xA0 ; 160
236e: f8 e0 ldi r31, 0x08 ; 8
2370: df 07 cpc r29, r31
2372: 29 f4 brne .+10 ; 0x237e <usart_init_rs232+0x208>
sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_USART0);
2374: 60 e1 ldi r22, 0x10 ; 16
2376: 83 e0 ldi r24, 0x03 ; 3
2378: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
237c: 62 c0 rjmp .+196 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef USARTD0
else if (module == &USARTD0) {
237e: c0 3a cpi r28, 0xA0 ; 160
2380: 89 e0 ldi r24, 0x09 ; 9
2382: d8 07 cpc r29, r24
2384: 29 f4 brne .+10 ; 0x2390 <usart_init_rs232+0x21a>
sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_USART0);
2386: 60 e1 ldi r22, 0x10 ; 16
2388: 84 e0 ldi r24, 0x04 ; 4
238a: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
238e: 59 c0 rjmp .+178 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef USARTE0
else if (module == &USARTE0) {
2390: c0 3a cpi r28, 0xA0 ; 160
2392: ea e0 ldi r30, 0x0A ; 10
2394: de 07 cpc r29, r30
2396: 29 f4 brne .+10 ; 0x23a2 <usart_init_rs232+0x22c>
sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_USART0);
2398: 60 e1 ldi r22, 0x10 ; 16
239a: 85 e0 ldi r24, 0x05 ; 5
239c: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
23a0: 50 c0 rjmp .+160 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef USARTF0
else if (module == &USARTF0) {
23a2: c0 3a cpi r28, 0xA0 ; 160
23a4: fb e0 ldi r31, 0x0B ; 11
23a6: df 07 cpc r29, r31
23a8: 29 f4 brne .+10 ; 0x23b4 <usart_init_rs232+0x23e>
sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_USART0);
23aa: 60 e1 ldi r22, 0x10 ; 16
23ac: 86 e0 ldi r24, 0x06 ; 6
23ae: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
23b2: 47 c0 rjmp .+142 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef USARTC1
else if (module == &USARTC1) {
23b4: c0 3b cpi r28, 0xB0 ; 176
23b6: 88 e0 ldi r24, 0x08 ; 8
23b8: d8 07 cpc r29, r24
23ba: 29 f4 brne .+10 ; 0x23c6 <usart_init_rs232+0x250>
sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_USART1);
23bc: 60 e2 ldi r22, 0x20 ; 32
23be: 83 e0 ldi r24, 0x03 ; 3
23c0: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
23c4: 3e c0 rjmp .+124 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef USARTD1
else if (module == &USARTD1) {
23c6: c0 3b cpi r28, 0xB0 ; 176
23c8: e9 e0 ldi r30, 0x09 ; 9
23ca: de 07 cpc r29, r30
23cc: 29 f4 brne .+10 ; 0x23d8 <usart_init_rs232+0x262>
sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_USART1);
23ce: 60 e2 ldi r22, 0x20 ; 32
23d0: 84 e0 ldi r24, 0x04 ; 4
23d2: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
23d6: 35 c0 rjmp .+106 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef USARTE1
else if (module == &USARTE1) {
23d8: c0 3b cpi r28, 0xB0 ; 176
23da: fa e0 ldi r31, 0x0A ; 10
23dc: df 07 cpc r29, r31
23de: 29 f4 brne .+10 ; 0x23ea <usart_init_rs232+0x274>
sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_USART1);
23e0: 60 e2 ldi r22, 0x20 ; 32
23e2: 85 e0 ldi r24, 0x05 ; 5
23e4: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
23e8: 2c c0 rjmp .+88 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef USARTF1
else if (module == &USARTF1) {
23ea: c0 3b cpi r28, 0xB0 ; 176
23ec: 8b e0 ldi r24, 0x0B ; 11
23ee: d8 07 cpc r29, r24
23f0: 29 f4 brne .+10 ; 0x23fc <usart_init_rs232+0x286>
sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_USART1);
23f2: 60 e2 ldi r22, 0x20 ; 32
23f4: 86 e0 ldi r24, 0x06 ; 6
23f6: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
23fa: 23 c0 rjmp .+70 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef TWIC
else if (module == &TWIC) {
23fc: c0 38 cpi r28, 0x80 ; 128
23fe: e4 e0 ldi r30, 0x04 ; 4
2400: de 07 cpc r29, r30
2402: 29 f4 brne .+10 ; 0x240e <usart_init_rs232+0x298>
sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TWI);
2404: 60 e4 ldi r22, 0x40 ; 64
2406: 83 e0 ldi r24, 0x03 ; 3
2408: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
240c: 1a c0 rjmp .+52 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef TWID
else if (module == &TWID) {
240e: c0 39 cpi r28, 0x90 ; 144
2410: f4 e0 ldi r31, 0x04 ; 4
2412: df 07 cpc r29, r31
2414: 29 f4 brne .+10 ; 0x2420 <usart_init_rs232+0x2aa>
sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_TWI);
2416: 60 e4 ldi r22, 0x40 ; 64
2418: 84 e0 ldi r24, 0x04 ; 4
241a: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
241e: 11 c0 rjmp .+34 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef TWIE
else if (module == &TWIE) {
2420: c0 3a cpi r28, 0xA0 ; 160
2422: 84 e0 ldi r24, 0x04 ; 4
2424: d8 07 cpc r29, r24
2426: 29 f4 brne .+10 ; 0x2432 <usart_init_rs232+0x2bc>
sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_TWI);
2428: 60 e4 ldi r22, 0x40 ; 64
242a: 85 e0 ldi r24, 0x05 ; 5
242c: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
2430: 08 c0 rjmp .+16 ; 0x2442 <usart_init_rs232+0x2cc>
}
#endif
#ifdef TWIF
else if (module == &TWIF) {
2432: c0 3b cpi r28, 0xB0 ; 176
2434: e4 e0 ldi r30, 0x04 ; 4
2436: de 07 cpc r29, r30
2438: 21 f4 brne .+8 ; 0x2442 <usart_init_rs232+0x2cc>
sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_TWI);
243a: 60 e4 ldi r22, 0x40 ; 64
243c: 86 e0 ldi r24, 0x06 ; 6
243e: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
* - 0x2 : IrDA mode.
* - 0x3 : Master SPI mode.
*/
static inline void usart_set_mode(USART_t *usart, USART_CMODE_t usartmode)
{
(usart)->CTRLC = ((usart)->CTRLC & (~USART_CMODE_gm)) | usartmode;
2442: 8d 81 ldd r24, Y+5 ; 0x05
2444: 8f 73 andi r24, 0x3F ; 63
2446: 8d 83 std Y+5, r24 ; 0x05
* \param twoStopBits Enable two stop bit mode. Use bool type.
*/
static inline void usart_format_set(USART_t *usart, USART_CHSIZE_t charSize,
USART_PMODE_t parityMode, bool twoStopBits)
{
(usart)->CTRLC = (uint8_t)charSize | parityMode
2448: f8 01 movw r30, r16
244a: 95 81 ldd r25, Z+5 ; 0x05
244c: 84 81 ldd r24, Z+4 ; 0x04
244e: 89 2b or r24, r25
2450: 96 81 ldd r25, Z+6 ; 0x06
2452: 91 11 cpse r25, r1
2454: 98 e0 ldi r25, 0x08 ; 8
2456: 89 2b or r24, r25
2458: 8d 83 std Y+5, r24 ; 0x05
bool result;
sysclk_enable_peripheral_clock(usart);
usart_set_mode(usart, USART_CMODE_ASYNCHRONOUS_gc);
usart_format_set(usart, opt->charlength, opt->paritytype,
opt->stopbits);
result = usart_set_baudrate(usart, opt->baudrate, sysclk_get_per_hz());
245a: f8 01 movw r30, r16
245c: 40 81 ld r20, Z
245e: 51 81 ldd r21, Z+1 ; 0x01
2460: 62 81 ldd r22, Z+2 ; 0x02
2462: 73 81 ldd r23, Z+3 ; 0x03
2464: 00 e0 ldi r16, 0x00 ; 0
2466: 18 e4 ldi r17, 0x48 ; 72
2468: 28 ee ldi r18, 0xE8 ; 232
246a: 31 e0 ldi r19, 0x01 ; 1
246c: ce 01 movw r24, r28
246e: 70 dd rcall .-1312 ; 0x1f50 <usart_set_baudrate>
*
* \param usart Pointer to the USART module.
*/
static inline void usart_tx_enable(USART_t *usart)
{
(usart)->CTRLB |= USART_TXEN_bm;
2470: 9c 81 ldd r25, Y+4 ; 0x04
2472: 98 60 ori r25, 0x08 ; 8
2474: 9c 83 std Y+4, r25 ; 0x04
*
* \param usart Pointer to the USART module
*/
static inline void usart_rx_enable(USART_t *usart)
{
(usart)->CTRLB |= USART_RXEN_bm;
2476: 9c 81 ldd r25, Y+4 ; 0x04
2478: 90 61 ori r25, 0x10 ; 16
247a: 9c 83 std Y+4, r25 ; 0x04
usart_tx_enable(usart);
usart_rx_enable(usart);
return result;
}
247c: df 91 pop r29
247e: cf 91 pop r28
2480: 1f 91 pop r17
2482: 0f 91 pop r16
2484: 08 95 ret
00002486 <wdt_set_timeout_period>:
uint8_t temp = (WDT.WINCTRL & WDT_WPER_gm) |
(1 << WDT_WEN_bp) | (1 << WDT_WCEN_bp);
ccp_write_io((void *)&WDT.WINCTRL, temp);
wdt_wait_while_busy();
return true;
}
2486: 90 91 80 00 lds r25, 0x0080 ; 0x800080 <__TEXT_REGION_LENGTH__+0x700080>
248a: 24 e0 ldi r18, 0x04 ; 4
248c: 82 9f mul r24, r18
248e: b0 01 movw r22, r0
2490: 11 24 eor r1, r1
2492: 6c 73 andi r22, 0x3C ; 60
2494: 92 70 andi r25, 0x02 ; 2
2496: 91 60 ori r25, 0x01 ; 1
2498: 69 2b or r22, r25
249a: 80 e8 ldi r24, 0x80 ; 128
249c: 90 e0 ldi r25, 0x00 ; 0
249e: 0e 94 57 04 call 0x8ae ; 0x8ae <ccp_write_io>
24a2: e0 e8 ldi r30, 0x80 ; 128
24a4: f0 e0 ldi r31, 0x00 ; 0
24a6: 82 81 ldd r24, Z+2 ; 0x02
24a8: 80 fd sbrc r24, 0
24aa: fd cf rjmp .-6 ; 0x24a6 <wdt_set_timeout_period+0x20>
24ac: 08 95 ret
000024ae <wdt_enable>:
24ae: 60 91 80 00 lds r22, 0x0080 ; 0x800080 <__TEXT_REGION_LENGTH__+0x700080>
24b2: 6c 73 andi r22, 0x3C ; 60
24b4: 63 60 ori r22, 0x03 ; 3
24b6: 80 e8 ldi r24, 0x80 ; 128
24b8: 90 e0 ldi r25, 0x00 ; 0
24ba: 0e 94 57 04 call 0x8ae ; 0x8ae <ccp_write_io>
24be: e0 e8 ldi r30, 0x80 ; 128
24c0: f0 e0 ldi r31, 0x00 ; 0
24c2: 82 81 ldd r24, Z+2 ; 0x02
24c4: 80 fd sbrc r24, 0
24c6: fd cf rjmp .-6 ; 0x24c2 <wdt_enable+0x14>
24c8: 08 95 ret
000024ca <wdt_reset_mcu>:
uint8_t temp;
/*
* WDT enabled (minimum timeout period for max. security)
*/
temp = WDT_PER_8CLK_gc | (1 << WDT_ENABLE_bp) | (1 << WDT_CEN_bp);
ccp_write_io((void *)&WDT.CTRL, temp);
24ca: 63 e0 ldi r22, 0x03 ; 3
24cc: 80 e8 ldi r24, 0x80 ; 128
24ce: 90 e0 ldi r25, 0x00 ; 0
24d0: 0e 94 57 04 call 0x8ae ; 0x8ae <ccp_write_io>
/*! \brief Wait until WD settings are synchronized to the WD clock domain.
*
*/
static inline void wdt_wait_while_busy(void)
{
while ((WDT.STATUS & WDT_SYNCBUSY_bm) == WDT_SYNCBUSY_bm) {
24d4: e0 e8 ldi r30, 0x80 ; 128
24d6: f0 e0 ldi r31, 0x00 ; 0
24d8: 82 81 ldd r24, Z+2 ; 0x02
24da: 80 fd sbrc r24, 0
24dc: fd cf rjmp .-6 ; 0x24d8 <wdt_reset_mcu+0xe>
wdt_wait_while_busy();
/*
* WDT enabled (maximum window period for max. security)
*/
temp = WDT_WPER_8KCLK_gc | (1 << WDT_WEN_bp) | (1 << WDT_WCEN_bp);
ccp_write_io((void *)&WDT.WINCTRL, temp);
24de: 6b e2 ldi r22, 0x2B ; 43
24e0: 81 e8 ldi r24, 0x81 ; 129
24e2: 90 e0 ldi r25, 0x00 ; 0
24e4: 0e 94 57 04 call 0x8ae ; 0x8ae <ccp_write_io>
24e8: e0 e8 ldi r30, 0x80 ; 128
24ea: f0 e0 ldi r31, 0x00 ; 0
24ec: 82 81 ldd r24, Z+2 ; 0x02
24ee: 80 fd sbrc r24, 0
24f0: fd cf rjmp .-6 ; 0x24ec <wdt_reset_mcu+0x22>
wdt_wait_while_busy();
/*
* WDT Reset during window => WDT generates an Hard Reset.
*/
wdt_reset();
24f2: a8 95 wdr
24f4: ff cf rjmp .-2 ; 0x24f4 <wdt_reset_mcu+0x2a>
000024f6 <pwm_set_frequency>:
*
* \param config Pointer to PWM configuration.
* \param freq_hz Wanted PWM frequency in Hz.
*/
void pwm_set_frequency(struct pwm_config *config, uint16_t freq_hz)
{
24f6: cf 92 push r12
24f8: df 92 push r13
24fa: ef 92 push r14
24fc: ff 92 push r15
24fe: cf 93 push r28
2500: df 93 push r29
2502: ec 01 movw r28, r24
/* Avoid division by zero. */
Assert(freq_hz != 0);
/* Calculate the smallest divider for the requested frequency
related to the CPU frequency */
smallest_div = cpu_hz / freq_hz / 0xFFFF;
2504: 6b 01 movw r12, r22
2506: e1 2c mov r14, r1
2508: f1 2c mov r15, r1
250a: 60 e0 ldi r22, 0x00 ; 0
250c: 78 e4 ldi r23, 0x48 ; 72
250e: 88 ee ldi r24, 0xE8 ; 232
2510: 91 e0 ldi r25, 0x01 ; 1
2512: a7 01 movw r20, r14
2514: 96 01 movw r18, r12
2516: 0e 94 2d 3a call 0x745a ; 0x745a <__udivmodsi4>
251a: ca 01 movw r24, r20
251c: b9 01 movw r22, r18
251e: 2f ef ldi r18, 0xFF ; 255
2520: 3f ef ldi r19, 0xFF ; 255
2522: 40 e0 ldi r20, 0x00 ; 0
2524: 50 e0 ldi r21, 0x00 ; 0
2526: 0e 94 2d 3a call 0x745a ; 0x745a <__udivmodsi4>
if (smallest_div < 1) {
252a: 21 15 cp r18, r1
252c: 31 05 cpc r19, r1
252e: 29 f4 brne .+10 ; 0x253a <pwm_set_frequency+0x44>
dividor = 1;
config->clk_sel = PWM_CLK_DIV1;
2530: 81 e0 ldi r24, 0x01 ; 1
2532: 8c 83 std Y+4, r24 ; 0x04
/* Calculate the smallest divider for the requested frequency
related to the CPU frequency */
smallest_div = cpu_hz / freq_hz / 0xFFFF;
if (smallest_div < 1) {
dividor = 1;
2534: 21 e0 ldi r18, 0x01 ; 1
2536: 30 e0 ldi r19, 0x00 ; 0
2538: 2d c0 rjmp .+90 ; 0x2594 <pwm_set_frequency+0x9e>
config->clk_sel = PWM_CLK_DIV1;
} else if (smallest_div < 2) {
253a: 22 30 cpi r18, 0x02 ; 2
253c: 31 05 cpc r19, r1
253e: 28 f4 brcc .+10 ; 0x254a <pwm_set_frequency+0x54>
dividor = 2;
config->clk_sel = PWM_CLK_DIV2;
2540: 82 e0 ldi r24, 0x02 ; 2
2542: 8c 83 std Y+4, r24 ; 0x04
smallest_div = cpu_hz / freq_hz / 0xFFFF;
if (smallest_div < 1) {
dividor = 1;
config->clk_sel = PWM_CLK_DIV1;
} else if (smallest_div < 2) {
dividor = 2;
2544: 22 e0 ldi r18, 0x02 ; 2
2546: 30 e0 ldi r19, 0x00 ; 0
2548: 25 c0 rjmp .+74 ; 0x2594 <pwm_set_frequency+0x9e>
config->clk_sel = PWM_CLK_DIV2;
} else if (smallest_div < 4) {
254a: 24 30 cpi r18, 0x04 ; 4
254c: 31 05 cpc r19, r1
254e: 28 f4 brcc .+10 ; 0x255a <pwm_set_frequency+0x64>
dividor = 4;
config->clk_sel = PWM_CLK_DIV4;
2550: 83 e0 ldi r24, 0x03 ; 3
2552: 8c 83 std Y+4, r24 ; 0x04
config->clk_sel = PWM_CLK_DIV1;
} else if (smallest_div < 2) {
dividor = 2;
config->clk_sel = PWM_CLK_DIV2;
} else if (smallest_div < 4) {
dividor = 4;
2554: 24 e0 ldi r18, 0x04 ; 4
2556: 30 e0 ldi r19, 0x00 ; 0
2558: 1d c0 rjmp .+58 ; 0x2594 <pwm_set_frequency+0x9e>
config->clk_sel = PWM_CLK_DIV4;
} else if (smallest_div < 8) {
255a: 28 30 cpi r18, 0x08 ; 8
255c: 31 05 cpc r19, r1
255e: 28 f4 brcc .+10 ; 0x256a <pwm_set_frequency+0x74>
dividor = 8;
config->clk_sel = PWM_CLK_DIV8;
2560: 84 e0 ldi r24, 0x04 ; 4
2562: 8c 83 std Y+4, r24 ; 0x04
config->clk_sel = PWM_CLK_DIV2;
} else if (smallest_div < 4) {
dividor = 4;
config->clk_sel = PWM_CLK_DIV4;
} else if (smallest_div < 8) {
dividor = 8;
2564: 28 e0 ldi r18, 0x08 ; 8
2566: 30 e0 ldi r19, 0x00 ; 0
2568: 15 c0 rjmp .+42 ; 0x2594 <pwm_set_frequency+0x9e>
config->clk_sel = PWM_CLK_DIV8;
} else if (smallest_div < 64) {
256a: 20 34 cpi r18, 0x40 ; 64
256c: 31 05 cpc r19, r1
256e: 28 f4 brcc .+10 ; 0x257a <pwm_set_frequency+0x84>
dividor = 64;
config->clk_sel = PWM_CLK_DIV64;
2570: 85 e0 ldi r24, 0x05 ; 5
2572: 8c 83 std Y+4, r24 ; 0x04
config->clk_sel = PWM_CLK_DIV4;
} else if (smallest_div < 8) {
dividor = 8;
config->clk_sel = PWM_CLK_DIV8;
} else if (smallest_div < 64) {
dividor = 64;
2574: 20 e4 ldi r18, 0x40 ; 64
2576: 30 e0 ldi r19, 0x00 ; 0
2578: 0d c0 rjmp .+26 ; 0x2594 <pwm_set_frequency+0x9e>
config->clk_sel = PWM_CLK_DIV64;
} else if (smallest_div < 256) {
257a: 2f 3f cpi r18, 0xFF ; 255
257c: 31 05 cpc r19, r1
257e: 09 f0 breq .+2 ; 0x2582 <pwm_set_frequency+0x8c>
2580: 28 f4 brcc .+10 ; 0x258c <pwm_set_frequency+0x96>
dividor = 256;
config->clk_sel = PWM_CLK_DIV256;
2582: 86 e0 ldi r24, 0x06 ; 6
2584: 8c 83 std Y+4, r24 ; 0x04
config->clk_sel = PWM_CLK_DIV8;
} else if (smallest_div < 64) {
dividor = 64;
config->clk_sel = PWM_CLK_DIV64;
} else if (smallest_div < 256) {
dividor = 256;
2586: 20 e0 ldi r18, 0x00 ; 0
2588: 31 e0 ldi r19, 0x01 ; 1
258a: 04 c0 rjmp .+8 ; 0x2594 <pwm_set_frequency+0x9e>
config->clk_sel = PWM_CLK_DIV256;
} else {
dividor = 1024;
config->clk_sel = PWM_CLK_DIV1024;
258c: 87 e0 ldi r24, 0x07 ; 7
258e: 8c 83 std Y+4, r24 ; 0x04
config->clk_sel = PWM_CLK_DIV64;
} else if (smallest_div < 256) {
dividor = 256;
config->clk_sel = PWM_CLK_DIV256;
} else {
dividor = 1024;
2590: 20 e0 ldi r18, 0x00 ; 0
2592: 34 e0 ldi r19, 0x04 ; 4
config->clk_sel = PWM_CLK_DIV1024;
}
/* Calculate the period from the just found divider */
config->period = cpu_hz / dividor / freq_hz;
2594: 40 e0 ldi r20, 0x00 ; 0
2596: 50 e0 ldi r21, 0x00 ; 0
2598: 60 e0 ldi r22, 0x00 ; 0
259a: 78 e4 ldi r23, 0x48 ; 72
259c: 88 ee ldi r24, 0xE8 ; 232
259e: 91 e0 ldi r25, 0x01 ; 1
25a0: 0e 94 2d 3a call 0x745a ; 0x745a <__udivmodsi4>
25a4: ca 01 movw r24, r20
25a6: b9 01 movw r22, r18
25a8: a7 01 movw r20, r14
25aa: 96 01 movw r18, r12
25ac: 0e 94 2d 3a call 0x745a ; 0x745a <__udivmodsi4>
25b0: 2d 83 std Y+5, r18 ; 0x05
25b2: 3e 83 std Y+6, r19 ; 0x06
/* Make sure our period is at least 100 ticks so we are able to provide
a full range (0-100% duty cycle */
if (config->period < 100) {
25b4: 24 36 cpi r18, 0x64 ; 100
25b6: 31 05 cpc r19, r1
25b8: 18 f4 brcc .+6 ; 0x25c0 <pwm_set_frequency+0xca>
/* The period is too short. */
config->clk_sel = PWM_CLK_OFF;
25ba: 1c 82 std Y+4, r1 ; 0x04
config->period = 0;
25bc: 1d 82 std Y+5, r1 ; 0x05
25be: 1e 82 std Y+6, r1 ; 0x06
Assert(false);
}
}
25c0: df 91 pop r29
25c2: cf 91 pop r28
25c4: ff 90 pop r15
25c6: ef 90 pop r14
25c8: df 90 pop r13
25ca: cf 90 pop r12
25cc: 08 95 ret
000025ce <pwm_init>:
* \param channel \ref pwm_channel_t "CC channel" to use for this PWM.
* \param freq_hz Frequency to use for this PWM.
*/
void pwm_init(struct pwm_config *config, enum pwm_tc_t tc,
enum pwm_channel_t channel, uint16_t freq_hz)
{
25ce: 0f 93 push r16
25d0: 1f 93 push r17
25d2: cf 93 push r28
25d4: df 93 push r29
25d6: ec 01 movw r28, r24
25d8: 89 01 movw r16, r18
/* Set TC and correct I/O pin to output */
/*
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
*/
switch (tc) {
25da: 86 2f mov r24, r22
25dc: 90 e0 ldi r25, 0x00 ; 0
25de: 88 30 cpi r24, 0x08 ; 8
25e0: 91 05 cpc r25, r1
25e2: 08 f0 brcs .+2 ; 0x25e6 <pwm_init+0x18>
25e4: 9e c0 rjmp .+316 ; 0x2722 <pwm_init+0x154>
25e6: fc 01 movw r30, r24
25e8: 88 27 eor r24, r24
25ea: e2 50 subi r30, 0x02 ; 2
25ec: ff 4f sbci r31, 0xFF ; 255
25ee: 8f 4f sbci r24, 0xFF ; 255
25f0: 0c 94 4f 3a jmp 0x749e ; 0x749e <__tablejump2__>
#if defined(TCC0)
case PWM_TCC0:
config->tc = &TCC0;
25f4: 80 e0 ldi r24, 0x00 ; 0
25f6: 98 e0 ldi r25, 0x08 ; 8
25f8: 88 83 st Y, r24
25fa: 99 83 std Y+1, r25 ; 0x01
PORTC.DIR |= (1 << (channel-1));
25fc: e0 e4 ldi r30, 0x40 ; 64
25fe: f6 e0 ldi r31, 0x06 ; 6
2600: 30 81 ld r19, Z
2602: 81 e0 ldi r24, 0x01 ; 1
2604: 90 e0 ldi r25, 0x00 ; 0
2606: 2f ef ldi r18, 0xFF ; 255
2608: 24 0f add r18, r20
260a: 02 c0 rjmp .+4 ; 0x2610 <pwm_init+0x42>
260c: 88 0f add r24, r24
260e: 99 1f adc r25, r25
2610: 2a 95 dec r18
2612: e2 f7 brpl .-8 ; 0x260c <pwm_init+0x3e>
2614: 83 2b or r24, r19
2616: 80 83 st Z, r24
num_chan = 4;
break;
2618: 84 c0 rjmp .+264 ; 0x2722 <pwm_init+0x154>
#endif
#if defined(TCC1)
case PWM_TCC1:
config->tc = &TCC1;
261a: 80 e4 ldi r24, 0x40 ; 64
261c: 98 e0 ldi r25, 0x08 ; 8
261e: 88 83 st Y, r24
2620: 99 83 std Y+1, r25 ; 0x01
PORTC.DIR |= (1 << (channel+3));
2622: e0 e4 ldi r30, 0x40 ; 64
2624: f6 e0 ldi r31, 0x06 ; 6
2626: 30 81 ld r19, Z
2628: 81 e0 ldi r24, 0x01 ; 1
262a: 90 e0 ldi r25, 0x00 ; 0
262c: 23 e0 ldi r18, 0x03 ; 3
262e: 24 0f add r18, r20
2630: 02 c0 rjmp .+4 ; 0x2636 <pwm_init+0x68>
2632: 88 0f add r24, r24
2634: 99 1f adc r25, r25
2636: 2a 95 dec r18
2638: e2 f7 brpl .-8 ; 0x2632 <pwm_init+0x64>
263a: 83 2b or r24, r19
263c: 80 83 st Z, r24
num_chan = 2;
break;
263e: 71 c0 rjmp .+226 ; 0x2722 <pwm_init+0x154>
#endif
#if defined(TCD0)
case PWM_TCD0:
config->tc = &TCD0;
2640: 80 e0 ldi r24, 0x00 ; 0
2642: 99 e0 ldi r25, 0x09 ; 9
2644: 88 83 st Y, r24
2646: 99 83 std Y+1, r25 ; 0x01
PORTD.DIR |= (1 << (channel-1));
2648: e0 e6 ldi r30, 0x60 ; 96
264a: f6 e0 ldi r31, 0x06 ; 6
264c: 30 81 ld r19, Z
264e: 81 e0 ldi r24, 0x01 ; 1
2650: 90 e0 ldi r25, 0x00 ; 0
2652: 2f ef ldi r18, 0xFF ; 255
2654: 24 0f add r18, r20
2656: 02 c0 rjmp .+4 ; 0x265c <pwm_init+0x8e>
2658: 88 0f add r24, r24
265a: 99 1f adc r25, r25
265c: 2a 95 dec r18
265e: e2 f7 brpl .-8 ; 0x2658 <pwm_init+0x8a>
2660: 83 2b or r24, r19
2662: 80 83 st Z, r24
num_chan = 4;
break;
2664: 5e c0 rjmp .+188 ; 0x2722 <pwm_init+0x154>
#endif
#if defined(TCD1)
case PWM_TCD1:
config->tc = &TCD1;
2666: 80 e4 ldi r24, 0x40 ; 64
2668: 99 e0 ldi r25, 0x09 ; 9
266a: 88 83 st Y, r24
266c: 99 83 std Y+1, r25 ; 0x01
PORTD.DIR |= (1 << (channel+3));
266e: e0 e6 ldi r30, 0x60 ; 96
2670: f6 e0 ldi r31, 0x06 ; 6
2672: 30 81 ld r19, Z
2674: 81 e0 ldi r24, 0x01 ; 1
2676: 90 e0 ldi r25, 0x00 ; 0
2678: 23 e0 ldi r18, 0x03 ; 3
267a: 24 0f add r18, r20
267c: 02 c0 rjmp .+4 ; 0x2682 <pwm_init+0xb4>
267e: 88 0f add r24, r24
2680: 99 1f adc r25, r25
2682: 2a 95 dec r18
2684: e2 f7 brpl .-8 ; 0x267e <pwm_init+0xb0>
2686: 83 2b or r24, r19
2688: 80 83 st Z, r24
num_chan = 2;
break;
268a: 4b c0 rjmp .+150 ; 0x2722 <pwm_init+0x154>
#endif
#if defined(TCE0)
case PWM_TCE0:
config->tc = &TCE0;
268c: 80 e0 ldi r24, 0x00 ; 0
268e: 9a e0 ldi r25, 0x0A ; 10
2690: 88 83 st Y, r24
2692: 99 83 std Y+1, r25 ; 0x01
PORTE.DIR |= (1 << (channel-1));
2694: e0 e8 ldi r30, 0x80 ; 128
2696: f6 e0 ldi r31, 0x06 ; 6
2698: 30 81 ld r19, Z
269a: 81 e0 ldi r24, 0x01 ; 1
269c: 90 e0 ldi r25, 0x00 ; 0
269e: 2f ef ldi r18, 0xFF ; 255
26a0: 24 0f add r18, r20
26a2: 02 c0 rjmp .+4 ; 0x26a8 <pwm_init+0xda>
26a4: 88 0f add r24, r24
26a6: 99 1f adc r25, r25
26a8: 2a 95 dec r18
26aa: e2 f7 brpl .-8 ; 0x26a4 <pwm_init+0xd6>
26ac: 83 2b or r24, r19
26ae: 80 83 st Z, r24
num_chan = 4;
break;
26b0: 38 c0 rjmp .+112 ; 0x2722 <pwm_init+0x154>
#endif
#if defined(TCE1)
case PWM_TCE1:
config->tc = &TCE1;
26b2: 80 e4 ldi r24, 0x40 ; 64
26b4: 9a e0 ldi r25, 0x0A ; 10
26b6: 88 83 st Y, r24
26b8: 99 83 std Y+1, r25 ; 0x01
PORTE.DIR |= (1 << (channel+3));
26ba: e0 e8 ldi r30, 0x80 ; 128
26bc: f6 e0 ldi r31, 0x06 ; 6
26be: 30 81 ld r19, Z
26c0: 81 e0 ldi r24, 0x01 ; 1
26c2: 90 e0 ldi r25, 0x00 ; 0
26c4: 23 e0 ldi r18, 0x03 ; 3
26c6: 24 0f add r18, r20
26c8: 02 c0 rjmp .+4 ; 0x26ce <pwm_init+0x100>
26ca: 88 0f add r24, r24
26cc: 99 1f adc r25, r25
26ce: 2a 95 dec r18
26d0: e2 f7 brpl .-8 ; 0x26ca <pwm_init+0xfc>
26d2: 83 2b or r24, r19
26d4: 80 83 st Z, r24
num_chan = 2;
break;
26d6: 25 c0 rjmp .+74 ; 0x2722 <pwm_init+0x154>
#endif
#if defined(TCF0)
case PWM_TCF0:
config->tc = &TCF0;
26d8: 80 e0 ldi r24, 0x00 ; 0
26da: 9b e0 ldi r25, 0x0B ; 11
26dc: 88 83 st Y, r24
26de: 99 83 std Y+1, r25 ; 0x01
PORTF.DIR |= (1 << (channel-1));
26e0: e0 ea ldi r30, 0xA0 ; 160
26e2: f6 e0 ldi r31, 0x06 ; 6
26e4: 30 81 ld r19, Z
26e6: 81 e0 ldi r24, 0x01 ; 1
26e8: 90 e0 ldi r25, 0x00 ; 0
26ea: 2f ef ldi r18, 0xFF ; 255
26ec: 24 0f add r18, r20
26ee: 02 c0 rjmp .+4 ; 0x26f4 <pwm_init+0x126>
26f0: 88 0f add r24, r24
26f2: 99 1f adc r25, r25
26f4: 2a 95 dec r18
26f6: e2 f7 brpl .-8 ; 0x26f0 <pwm_init+0x122>
26f8: 83 2b or r24, r19
26fa: 80 83 st Z, r24
num_chan = 4;
break;
26fc: 12 c0 rjmp .+36 ; 0x2722 <pwm_init+0x154>
#endif
#if defined(TCF1)
case PWM_TCF1:
config->tc = &TCF1;
26fe: 80 e4 ldi r24, 0x40 ; 64
2700: 9b e0 ldi r25, 0x0B ; 11
2702: 88 83 st Y, r24
2704: 99 83 std Y+1, r25 ; 0x01
PORTF.DIR |= (1 << (channel+3));
2706: e0 ea ldi r30, 0xA0 ; 160
2708: f6 e0 ldi r31, 0x06 ; 6
270a: 30 81 ld r19, Z
270c: 81 e0 ldi r24, 0x01 ; 1
270e: 90 e0 ldi r25, 0x00 ; 0
2710: 23 e0 ldi r18, 0x03 ; 3
2712: 24 0f add r18, r20
2714: 02 c0 rjmp .+4 ; 0x271a <pwm_init+0x14c>
2716: 88 0f add r24, r24
2718: 99 1f adc r25, r25
271a: 2a 95 dec r18
271c: e2 f7 brpl .-8 ; 0x2716 <pwm_init+0x148>
271e: 83 2b or r24, r19
2720: 80 83 st Z, r24
}
/* Make sure we are not given a channel number larger
than this TC can handle */
Assert(channel <= num_chan);
config->channel = channel;
2722: 4a 83 std Y+2, r20 ; 0x02
/* Set the correct cc_mask */
switch (channel) {
2724: 42 30 cpi r20, 0x02 ; 2
2726: 61 f0 breq .+24 ; 0x2740 <pwm_init+0x172>
2728: 18 f4 brcc .+6 ; 0x2730 <pwm_init+0x162>
272a: 41 30 cpi r20, 0x01 ; 1
272c: 31 f0 breq .+12 ; 0x273a <pwm_init+0x16c>
272e: 10 c0 rjmp .+32 ; 0x2750 <pwm_init+0x182>
2730: 43 30 cpi r20, 0x03 ; 3
2732: 49 f0 breq .+18 ; 0x2746 <pwm_init+0x178>
2734: 44 30 cpi r20, 0x04 ; 4
2736: 51 f0 breq .+20 ; 0x274c <pwm_init+0x17e>
2738: 0b c0 rjmp .+22 ; 0x2750 <pwm_init+0x182>
case PWM_CH_A:
config->cc_mask = TC_CCAEN;
273a: 80 e1 ldi r24, 0x10 ; 16
273c: 8b 83 std Y+3, r24 ; 0x03
break;
273e: 08 c0 rjmp .+16 ; 0x2750 <pwm_init+0x182>
case PWM_CH_B:
config->cc_mask = TC_CCBEN;
2740: 80 e2 ldi r24, 0x20 ; 32
2742: 8b 83 std Y+3, r24 ; 0x03
break;
2744: 05 c0 rjmp .+10 ; 0x2750 <pwm_init+0x182>
case PWM_CH_C:
config->cc_mask = TC_CCCEN;
2746: 80 e4 ldi r24, 0x40 ; 64
2748: 8b 83 std Y+3, r24 ; 0x03
break;
274a: 02 c0 rjmp .+4 ; 0x2750 <pwm_init+0x182>
case PWM_CH_D:
config->cc_mask = TC_CCDEN;
274c: 80 e8 ldi r24, 0x80 ; 128
274e: 8b 83 std Y+3, r24 ; 0x03
Assert(false);
break;
}
/* Enable peripheral clock for this TC */
tc_enable(config->tc);
2750: 88 81 ld r24, Y
2752: 99 81 ldd r25, Y+1 ; 0x01
2754: 44 d9 rcall .-3448 ; 0x19de <tc_enable>
/* Set this TC's waveform generator in single slope mode */
tc_set_wgm(config->tc, TC_WG_SS);
2756: e8 81 ld r30, Y
2758: f9 81 ldd r31, Y+1 ; 0x01
* \param tc Pointer to TC module.
* \param wgm : waveform generator
*/
static inline void tc_set_wgm(volatile void *tc, enum tc_wg_mode_t wgm)
{
((TC0_t *)tc)->CTRLB = (((TC0_t *)tc)->CTRLB & ~TC0_WGMODE_gm) | wgm;
275a: 81 81 ldd r24, Z+1 ; 0x01
275c: 88 7f andi r24, 0xF8 ; 248
275e: 83 60 ori r24, 0x03 ; 3
2760: 81 83 std Z+1, r24 ; 0x01
/* Default values (disable TC and set minimum period)*/
config->period = 0;
2762: 1d 82 std Y+5, r1 ; 0x05
2764: 1e 82 std Y+6, r1 ; 0x06
config->clk_sel = PWM_CLK_OFF;
2766: 1c 82 std Y+4, r1 ; 0x04
tc_write_clock_source(config->tc, PWM_CLK_OFF);
2768: e8 81 ld r30, Y
276a: f9 81 ldd r31, Y+1 ; 0x01
*/
static inline void tc_write_clock_source(volatile void *tc,
TC_CLKSEL_t TC_CLKSEL_enum)
{
((TC0_t *)tc)->CTRLA =
(((TC0_t *)tc)->CTRLA & ~TC0_CLKSEL_gm) |
276c: 80 81 ld r24, Z
* \note Configuring the clock also starts the timer
*/
static inline void tc_write_clock_source(volatile void *tc,
TC_CLKSEL_t TC_CLKSEL_enum)
{
((TC0_t *)tc)->CTRLA =
276e: 80 7f andi r24, 0xF0 ; 240
2770: 80 83 st Z, r24
/* Set the PWM frequency */
pwm_set_frequency(config, freq_hz);
2772: b8 01 movw r22, r16
2774: ce 01 movw r24, r28
2776: bf de rcall .-642 ; 0x24f6 <pwm_set_frequency>
}
2778: df 91 pop r29
277a: cf 91 pop r28
277c: 1f 91 pop r17
277e: 0f 91 pop r16
2780: 08 95 ret
00002782 <pwm_start>:
*
* \param *config Pointer to the PWM configuration struct
* \param duty_cycle_scale Duty cycle as a value between 0 and 100.
*/
void pwm_start(struct pwm_config *config, uint8_t duty_cycle_scale)
{
2782: cf 93 push r28
2784: df 93 push r29
2786: ec 01 movw r28, r24
*/
static inline void pwm_set_duty_cycle_percent(struct pwm_config *config,
uint8_t duty_cycle_scale)
{
Assert( duty_cycle_scale <= 100 );
tc_write_cc_buffer(config->tc, (enum tc_cc_channel_t)config->channel,
2788: 2d 81 ldd r18, Y+5 ; 0x05
278a: 3e 81 ldd r19, Y+6 ; 0x06
278c: a6 2f mov r26, r22
278e: b0 e0 ldi r27, 0x00 ; 0
2790: 0e 94 58 3a call 0x74b0 ; 0x74b0 <__umulhisi3>
2794: 24 e6 ldi r18, 0x64 ; 100
2796: 30 e0 ldi r19, 0x00 ; 0
2798: 40 e0 ldi r20, 0x00 ; 0
279a: 50 e0 ldi r21, 0x00 ; 0
279c: 0e 94 2d 3a call 0x745a ; 0x745a <__udivmodsi4>
27a0: 8a 81 ldd r24, Y+2 ; 0x02
27a2: e8 81 ld r30, Y
27a4: f9 81 ldd r31, Y+1 ; 0x01
* \param buffer_value Counter Buffer value
*/
static inline void tc_write_cc_buffer(volatile void *tc,
enum tc_cc_channel_t channel_index, uint16_t buffer_value)
{
if (tc_is_tc0(void *tc)) {
27a6: e6 fd sbrc r30, 6
27a8: 17 c0 rjmp .+46 ; 0x27d8 <pwm_start+0x56>
switch (channel_index) {
27aa: 82 30 cpi r24, 0x02 ; 2
27ac: 61 f0 breq .+24 ; 0x27c6 <pwm_start+0x44>
27ae: 18 f4 brcc .+6 ; 0x27b6 <pwm_start+0x34>
27b0: 81 30 cpi r24, 0x01 ; 1
27b2: 31 f0 breq .+12 ; 0x27c0 <pwm_start+0x3e>
27b4: 1b c0 rjmp .+54 ; 0x27ec <pwm_start+0x6a>
27b6: 83 30 cpi r24, 0x03 ; 3
27b8: 49 f0 breq .+18 ; 0x27cc <pwm_start+0x4a>
27ba: 84 30 cpi r24, 0x04 ; 4
27bc: 51 f0 breq .+20 ; 0x27d2 <pwm_start+0x50>
27be: 16 c0 rjmp .+44 ; 0x27ec <pwm_start+0x6a>
case TC_CCA:
((TC0_t *)tc)->CCABUF = buffer_value;
27c0: 20 af std Z+56, r18 ; 0x38
27c2: 31 af std Z+57, r19 ; 0x39
27c4: 13 c0 rjmp .+38 ; 0x27ec <pwm_start+0x6a>
break;
case TC_CCB:
((TC0_t *)tc)->CCBBUF = buffer_value;
27c6: 22 af std Z+58, r18 ; 0x3a
27c8: 33 af std Z+59, r19 ; 0x3b
27ca: 10 c0 rjmp .+32 ; 0x27ec <pwm_start+0x6a>
break;
case TC_CCC:
((TC0_t *)tc)->CCCBUF = buffer_value;
27cc: 24 af std Z+60, r18 ; 0x3c
27ce: 35 af std Z+61, r19 ; 0x3d
27d0: 0d c0 rjmp .+26 ; 0x27ec <pwm_start+0x6a>
break;
case TC_CCD:
((TC0_t *)tc)->CCDBUF = buffer_value;
27d2: 26 af std Z+62, r18 ; 0x3e
27d4: 37 af std Z+63, r19 ; 0x3f
27d6: 0a c0 rjmp .+20 ; 0x27ec <pwm_start+0x6a>
break;
}
} else if (tc_is_tc1(void *tc)) {
switch (channel_index) {
27d8: 81 30 cpi r24, 0x01 ; 1
27da: 19 f0 breq .+6 ; 0x27e2 <pwm_start+0x60>
27dc: 82 30 cpi r24, 0x02 ; 2
27de: 21 f0 breq .+8 ; 0x27e8 <pwm_start+0x66>
27e0: 05 c0 rjmp .+10 ; 0x27ec <pwm_start+0x6a>
case TC_CCA:
((TC1_t *)tc)->CCABUF = buffer_value;
27e2: 20 af std Z+56, r18 ; 0x38
27e4: 31 af std Z+57, r19 ; 0x39
27e6: 02 c0 rjmp .+4 ; 0x27ec <pwm_start+0x6a>
break;
case TC_CCB:
((TC1_t *)tc)->CCBBUF = buffer_value;
27e8: 22 af std Z+58, r18 ; 0x3a
27ea: 33 af std Z+59, r19 ; 0x3b
/* Set given duty cycle */
pwm_set_duty_cycle_percent(config, duty_cycle_scale);
/* Set correct TC period */
tc_write_period(config->tc, config->period);
27ec: 8d 81 ldd r24, Y+5 ; 0x05
27ee: 9e 81 ldd r25, Y+6 ; 0x06
27f0: e8 81 ld r30, Y
27f2: f9 81 ldd r31, Y+1 ; 0x01
* \param tc Pointer to TC module.
* \param per_value Period value : PER
*/
static inline void tc_write_period(volatile void *tc, uint16_t per_value)
{
((TC0_t *)tc)->PER = per_value;
27f4: 86 a3 std Z+38, r24 ; 0x26
27f6: 97 a3 std Z+39, r25 ; 0x27
/* Enable CC channel for this TC */
tc_enable_cc_channels(config->tc, config->cc_mask);
27f8: 8b 81 ldd r24, Y+3 ; 0x03
27fa: e8 81 ld r30, Y
27fc: f9 81 ldd r31, Y+1 ; 0x01
* \param enablemask CC channel
*/
static inline void tc_enable_cc_channels(volatile void *tc,
enum tc_cc_channel_mask_enable_t enablemask)
{
if (tc_is_tc0(void *tc)) {
27fe: e6 fd sbrc r30, 6
2800: 04 c0 rjmp .+8 ; 0x280a <pwm_start+0x88>
((TC0_t *)tc)->CTRLB |= enablemask;
2802: 91 81 ldd r25, Z+1 ; 0x01
2804: 89 2b or r24, r25
2806: 81 83 std Z+1, r24 ; 0x01
2808: 04 c0 rjmp .+8 ; 0x2812 <pwm_start+0x90>
} else if (tc_is_tc1(void *tc)) {
((TC1_t *)tc)->CTRLB |=
280a: 91 81 ldd r25, Z+1 ; 0x01
280c: 80 73 andi r24, 0x30 ; 48
280e: 89 2b or r24, r25
2810: 81 83 std Z+1, r24 ; 0x01
/* Enable TC by setting correct clock prescaler */
tc_write_clock_source(config->tc, config->clk_sel);
2812: e8 81 ld r30, Y
2814: f9 81 ldd r31, Y+1 ; 0x01
*/
static inline void tc_write_clock_source(volatile void *tc,
TC_CLKSEL_t TC_CLKSEL_enum)
{
((TC0_t *)tc)->CTRLA =
(((TC0_t *)tc)->CTRLA & ~TC0_CLKSEL_gm) |
2816: 80 81 ld r24, Z
* \note Configuring the clock also starts the timer
*/
static inline void tc_write_clock_source(volatile void *tc,
TC_CLKSEL_t TC_CLKSEL_enum)
{
((TC0_t *)tc)->CTRLA =
2818: 80 7f andi r24, 0xF0 ; 240
281a: 9c 81 ldd r25, Y+4 ; 0x04
281c: 89 2b or r24, r25
281e: 80 83 st Z, r24
}
2820: df 91 pop r29
2822: cf 91 pop r28
2824: 08 95 ret
00002826 <ds3231_clear_ready>:
ds3231_status = true;
}
void ds3231_clear_ready(void)
{
ds3231_status = false;
2826: 10 92 1b 22 sts 0x221B, r1 ; 0x80221b <ds3231_status>
282a: 08 95 ret
0000282c <ds3231_set_time>:
}
void ds3231_set_time(uint8_t hours, uint8_t minutes, uint8_t seconds)
{
282c: 1f 93 push r17
282e: cf 93 push r28
2830: df 93 push r29
2832: 16 2f mov r17, r22
2834: d4 2f mov r29, r20
//high is pm
//low is am
uint8_t pm_or_am = 0;
if(hours >= 12)
2836: 8c 30 cpi r24, 0x0C ; 12
2838: 38 f0 brcs .+14 ; 0x2848 <ds3231_set_time+0x1c>
{
if(hours == 24)
283a: 88 31 cpi r24, 0x18 ; 24
283c: 39 f0 breq .+14 ; 0x284c <ds3231_set_time+0x20>
{
hours -= 12;
}
else if(hours == 12)
283e: 8c 30 cpi r24, 0x0C ; 12
2840: 41 f0 breq .+16 ; 0x2852 <ds3231_set_time+0x26>
{
pm_or_am = 1;
}
else
{
hours -= 12;
2842: 8c 50 subi r24, 0x0C ; 12
pm_or_am = 1;
2844: 31 e0 ldi r19, 0x01 ; 1
2846: 06 c0 rjmp .+12 ; 0x2854 <ds3231_set_time+0x28>
void ds3231_set_time(uint8_t hours, uint8_t minutes, uint8_t seconds)
{
//high is pm
//low is am
uint8_t pm_or_am = 0;
2848: 30 e0 ldi r19, 0x00 ; 0
284a: 04 c0 rjmp .+8 ; 0x2854 <ds3231_set_time+0x28>
284c: 30 e0 ldi r19, 0x00 ; 0
if(hours >= 12)
{
if(hours == 24)
{
hours -= 12;
284e: 8c e0 ldi r24, 0x0C ; 12
2850: 01 c0 rjmp .+2 ; 0x2854 <ds3231_set_time+0x28>
}
else if(hours == 12)
{
pm_or_am = 1;
2852: 31 e0 ldi r19, 0x01 ; 1
}
}
uint8_t formattedSeconds = ((seconds / 10) << 4) | (seconds % 10);
uint8_t formattedMinutes = ((minutes / 10) << 4) | (minutes % 10);
uint8_t formattedHours = (1 << 6) | (pm_or_am << 5) | ((hours / 10) << 4) | (hours % 10);
twi_write(DS3231_ADDR, DS3231_HOURS, formattedHours);
2854: cd ec ldi r28, 0xCD ; 205
2856: 8c 9f mul r24, r28
2858: 41 2d mov r20, r1
285a: 11 24 eor r1, r1
285c: 24 2f mov r18, r20
285e: 26 95 lsr r18
2860: 26 95 lsr r18
2862: 26 95 lsr r18
2864: 42 2f mov r20, r18
2866: 44 0f add r20, r20
2868: 94 2f mov r25, r20
286a: 99 0f add r25, r25
286c: 99 0f add r25, r25
286e: 94 0f add r25, r20
2870: 89 1b sub r24, r25
2872: 98 2f mov r25, r24
2874: 90 64 ori r25, 0x40 ; 64
2876: 83 2f mov r24, r19
2878: 82 95 swap r24
287a: 88 0f add r24, r24
287c: 80 7e andi r24, 0xE0 ; 224
287e: 89 2b or r24, r25
2880: 90 e1 ldi r25, 0x10 ; 16
2882: 29 9f mul r18, r25
2884: a0 01 movw r20, r0
2886: 11 24 eor r1, r1
2888: 48 2b or r20, r24
288a: 62 e0 ldi r22, 0x02 ; 2
288c: 88 e6 ldi r24, 0x68 ; 104
288e: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 <twi_write>
twi_write(DS3231_ADDR, DS3231_MINUTES, formattedMinutes);
2892: 1c 9f mul r17, r28
2894: 81 2d mov r24, r1
2896: 11 24 eor r1, r1
2898: 86 95 lsr r24
289a: 86 95 lsr r24
289c: 86 95 lsr r24
289e: 90 e1 ldi r25, 0x10 ; 16
28a0: 89 9f mul r24, r25
28a2: a0 01 movw r20, r0
28a4: 11 24 eor r1, r1
28a6: 88 0f add r24, r24
28a8: 98 2f mov r25, r24
28aa: 99 0f add r25, r25
28ac: 99 0f add r25, r25
28ae: 89 0f add r24, r25
28b0: 18 1b sub r17, r24
28b2: 41 2b or r20, r17
28b4: 61 e0 ldi r22, 0x01 ; 1
28b6: 88 e6 ldi r24, 0x68 ; 104
28b8: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 <twi_write>
twi_write(DS3231_ADDR, DS3231_SECONDS, formattedSeconds);
28bc: dc 9f mul r29, r28
28be: c1 2d mov r28, r1
28c0: 11 24 eor r1, r1
28c2: c6 95 lsr r28
28c4: c6 95 lsr r28
28c6: c6 95 lsr r28
28c8: 80 e1 ldi r24, 0x10 ; 16
28ca: c8 9f mul r28, r24
28cc: a0 01 movw r20, r0
28ce: 11 24 eor r1, r1
28d0: cc 0f add r28, r28
28d2: 8c 2f mov r24, r28
28d4: 88 0f add r24, r24
28d6: 88 0f add r24, r24
28d8: c8 0f add r28, r24
28da: dc 1b sub r29, r28
28dc: 4d 2b or r20, r29
28de: 60 e0 ldi r22, 0x00 ; 0
28e0: 88 e6 ldi r24, 0x68 ; 104
28e2: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 <twi_write>
}
28e6: df 91 pop r29
28e8: cf 91 pop r28
28ea: 1f 91 pop r17
28ec: 08 95 ret
000028ee <ds3231_init>:
static uint8_t rtc_buffer[32];
static _Bool ds3231_status;
static sw_time timeBank;
void ds3231_init(void)
{
ds3231_status = false;
28ee: 10 92 1b 22 sts 0x221B, r1 ; 0x80221b <ds3231_status>
timeBank.hour = 0;
timeBank.minute = 0;
timeBank.second = 0;
timeBank.pm_or_am = 1;
//reset and go
twi_write(DS3231_ADDR, DS3231_CTRL, 0x0);
28f2: 40 e0 ldi r20, 0x00 ; 0
28f4: 6e e0 ldi r22, 0x0E ; 14
28f6: 88 e6 ldi r24, 0x68 ; 104
28f8: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 <twi_write>
twi_write(DS3231_ADDR, DS3231_CTRL_STATUS, 0x0);
28fc: 40 e0 ldi r20, 0x00 ; 0
28fe: 6f e0 ldi r22, 0x0F ; 15
2900: 88 e6 ldi r24, 0x68 ; 104
2902: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 <twi_write>
//configure and enable interrupt
PORTD.PIN0CTRL = PORT_ISC_FALLING_gc;
2906: e0 e6 ldi r30, 0x60 ; 96
2908: f6 e0 ldi r31, 0x06 ; 6
290a: 82 e0 ldi r24, 0x02 ; 2
290c: 80 8b std Z+16, r24 ; 0x10
PORTD.INT1MASK = PIN0_bm;
290e: 81 e0 ldi r24, 0x01 ; 1
2910: 83 87 std Z+11, r24 ; 0x0b
//or equals OR ELSE
PORTD.INTCTRL |= PORT_INT1LVL_HI_gc;
2912: 81 85 ldd r24, Z+9 ; 0x09
2914: 8c 60 ori r24, 0x0C ; 12
2916: 81 87 std Z+9, r24 ; 0x09
//swprintf(SWDEBUG, "%#x\n", rtc_buffer);
ds3231_set_time(3, 58, 00);
2918: 40 e0 ldi r20, 0x00 ; 0
291a: 6a e3 ldi r22, 0x3A ; 58
291c: 83 e0 ldi r24, 0x03 ; 3
291e: 86 cf rjmp .-244 ; 0x282c <ds3231_set_time>
2920: 08 95 ret
00002922 <ds3231_get_time>:
twi_write(DS3231_ADDR, DS3231_MINUTES, formattedMinutes);
twi_write(DS3231_ADDR, DS3231_SECONDS, formattedSeconds);
}
void ds3231_get_time(sw_time* time)
{
2922: cf 93 push r28
2924: df 93 push r29
2926: ec 01 movw r28, r24
twi_read(DS3231_ADDR, DS3231_SECONDS, 3, rtc_buffer);
2928: 2c e1 ldi r18, 0x1C ; 28
292a: 32 e2 ldi r19, 0x22 ; 34
292c: 43 e0 ldi r20, 0x03 ; 3
292e: 60 e0 ldi r22, 0x00 ; 0
2930: 88 e6 ldi r24, 0x68 ; 104
2932: 0e 94 7a 2f call 0x5ef4 ; 0x5ef4 <twi_read>
uint8_t hours = rtc_buffer[2];
2936: ec e1 ldi r30, 0x1C ; 28
2938: f2 e2 ldi r31, 0x22 ; 34
293a: 22 81 ldd r18, Z+2 ; 0x02
uint8_t minutes = rtc_buffer[1];
293c: 91 81 ldd r25, Z+1 ; 0x01
uint8_t seconds = rtc_buffer[0];
293e: 80 81 ld r24, Z
time->hour = (((hours & ~0b11101111) >> 4) * 10) + (hours & ~0b11110000);
2940: 24 fb bst r18, 4
2942: 33 27 eor r19, r19
2944: 30 f9 bld r19, 0
2946: 33 0f add r19, r19
2948: 43 2f mov r20, r19
294a: 44 0f add r20, r20
294c: 44 0f add r20, r20
294e: 34 0f add r19, r20
2950: 42 2f mov r20, r18
2952: 4f 70 andi r20, 0x0F ; 15
2954: 34 0f add r19, r20
2956: 38 83 st Y, r19
time->minute = (((minutes & ~0b00001111) >> 4) * 10) + (minutes & ~0b11110000);
2958: 39 2f mov r19, r25
295a: 36 95 lsr r19
295c: 36 95 lsr r19
295e: 36 95 lsr r19
2960: 3e 71 andi r19, 0x1E ; 30
2962: 43 2f mov r20, r19
2964: 44 0f add r20, r20
2966: 44 0f add r20, r20
2968: 34 0f add r19, r20
296a: 9f 70 andi r25, 0x0F ; 15
296c: 93 0f add r25, r19
296e: 99 83 std Y+1, r25 ; 0x01
time->second = (((seconds & ~0b00001111) >> 4) * 10) + (seconds & ~0b11110000);
2970: 98 2f mov r25, r24
2972: 96 95 lsr r25
2974: 96 95 lsr r25
2976: 96 95 lsr r25
2978: 9e 71 andi r25, 0x1E ; 30
297a: 39 2f mov r19, r25
297c: 33 0f add r19, r19
297e: 33 0f add r19, r19
2980: 93 0f add r25, r19
2982: 8f 70 andi r24, 0x0F ; 15
2984: 89 0f add r24, r25
2986: 8a 83 std Y+2, r24 ; 0x02
//pm is high, am is low
time->pm_or_am = (hours & (1 << 5)) ? 1 : 0;
2988: 25 fb bst r18, 5
298a: 22 27 eor r18, r18
298c: 20 f9 bld r18, 0
298e: 2b 83 std Y+3, r18 ; 0x03
}
2990: df 91 pop r29
2992: cf 91 pop r28
2994: 08 95 ret
00002996 <ds3231_is_ready>:
_Bool ds3231_is_ready(void)
{
return ds3231_status;
}
2996: 80 91 1b 22 lds r24, 0x221B ; 0x80221b <ds3231_status>
299a: 08 95 ret
0000299c <__vector_65>:
ISR(PORTD_INT1_vect)
{
299c: 1f 92 push r1
299e: 0f 92 push r0
29a0: 0f b6 in r0, 0x3f ; 63
29a2: 0f 92 push r0
29a4: 11 24 eor r1, r1
29a6: 08 b6 in r0, 0x38 ; 56
29a8: 0f 92 push r0
29aa: 18 be out 0x38, r1 ; 56
29ac: 8f 93 push r24
ds3231_set_time(3, 58, 00);
}
void ds3231_set_ready(void)
{
ds3231_status = true;
29ae: 81 e0 ldi r24, 0x01 ; 1
29b0: 80 93 1b 22 sts 0x221B, r24 ; 0x80221b <ds3231_status>
}
ISR(PORTD_INT1_vect)
{
ds3231_set_ready();
29b4: 8f 91 pop r24
29b6: 0f 90 pop r0
29b8: 08 be out 0x38, r0 ; 56
29ba: 0f 90 pop r0
29bc: 0f be out 0x3f, r0 ; 63
29be: 0f 90 pop r0
29c0: 1f 90 pop r1
29c2: 18 95 reti
000029c4 <gps_data_init>:
29c4: fc 01 movw r30, r24
29c6: 12 82 std Z+2, r1 ; 0x02
29c8: a0 81 ld r26, Z
29ca: b1 81 ldd r27, Z+1 ; 0x01
29cc: 1c 92 st X, r1
29ce: 82 e0 ldi r24, 0x02 ; 2
29d0: 83 83 std Z+3, r24 ; 0x03
29d2: 08 95 ret
000029d4 <gps_init>:
29d4: 0f 93 push r16
29d6: 1f 93 push r17
29d8: cf 93 push r28
29da: df 93 push r29
29dc: 88 e1 ldi r24, 0x18 ; 24
29de: 90 e2 ldi r25, 0x20 ; 32
29e0: 0e 94 e2 2e call 0x5dc4 ; 0x5dc4 <ascii_to_decimal_int>
29e4: 9f 93 push r25
29e6: 8f 93 push r24
29e8: 8e e1 ldi r24, 0x1E ; 30
29ea: 90 e2 ldi r25, 0x20 ; 32
29ec: 9f 93 push r25
29ee: 8f 93 push r24
29f0: 88 e0 ldi r24, 0x08 ; 8
29f2: 8f 93 push r24
29f4: 80 ea ldi r24, 0xA0 ; 160
29f6: 8f 93 push r24
29f8: e0 91 3d 25 lds r30, 0x253D ; 0x80253d <swprintf>
29fc: f0 91 3e 25 lds r31, 0x253E ; 0x80253e <swprintf+0x1>
2a00: 19 95 eicall
2a02: cc e3 ldi r28, 0x3C ; 60
2a04: d2 e2 ldi r29, 0x22 ; 34
2a06: 04 e6 ldi r16, 0x64 ; 100
2a08: 12 e2 ldi r17, 0x22 ; 34
2a0a: 0f 90 pop r0
2a0c: 0f 90 pop r0
2a0e: 0f 90 pop r0
2a10: 0f 90 pop r0
2a12: 0f 90 pop r0
2a14: 0f 90 pop r0
2a16: ce 01 movw r24, r28
2a18: d5 df rcall .-86 ; 0x29c4 <gps_data_init>
2a1a: 24 96 adiw r28, 0x04 ; 4
2a1c: c0 17 cp r28, r16
2a1e: d1 07 cpc r29, r17
2a20: d1 f7 brne .-12 ; 0x2a16 <gps_init+0x42>
2a22: e6 e4 ldi r30, 0x46 ; 70
2a24: f9 e2 ldi r31, 0x29 ; 41
2a26: 80 e8 ldi r24, 0x80 ; 128
2a28: 95 e2 ldi r25, 0x25 ; 37
2a2a: a0 e0 ldi r26, 0x00 ; 0
2a2c: b0 e0 ldi r27, 0x00 ; 0
2a2e: 80 83 st Z, r24
2a30: 91 83 std Z+1, r25 ; 0x01
2a32: a2 83 std Z+2, r26 ; 0x02
2a34: b3 83 std Z+3, r27 ; 0x03
2a36: 81 e0 ldi r24, 0x01 ; 1
2a38: 86 83 std Z+6, r24 ; 0x06
2a3a: 15 82 std Z+5, r1 ; 0x05
2a3c: 83 e0 ldi r24, 0x03 ; 3
2a3e: 84 83 std Z+4, r24 ; 0x04
2a40: bf 01 movw r22, r30
2a42: 80 eb ldi r24, 0xB0 ; 176
2a44: 98 e0 ldi r25, 0x08 ; 8
2a46: 97 db rcall .-2258 ; 0x2176 <usart_init_rs232>
2a48: 82 e2 ldi r24, 0x22 ; 34
2a4a: 90 e2 ldi r25, 0x20 ; 32
2a4c: 9f 93 push r25
2a4e: 8f 93 push r24
2a50: d8 e0 ldi r29, 0x08 ; 8
2a52: df 93 push r29
2a54: c0 eb ldi r28, 0xB0 ; 176
2a56: cf 93 push r28
2a58: e0 91 3d 25 lds r30, 0x253D ; 0x80253d <swprintf>
2a5c: f0 91 3e 25 lds r31, 0x253E ; 0x80253e <swprintf+0x1>
2a60: 19 95 eicall
2a62: 85 e3 ldi r24, 0x35 ; 53
2a64: 90 e2 ldi r25, 0x20 ; 32
2a66: 9f 93 push r25
2a68: 8f 93 push r24
2a6a: df 93 push r29
2a6c: cf 93 push r28
2a6e: e0 91 3d 25 lds r30, 0x253D ; 0x80253d <swprintf>
2a72: f0 91 3e 25 lds r31, 0x253E ; 0x80253e <swprintf+0x1>
2a76: 19 95 eicall
2a78: 86 e4 ldi r24, 0x46 ; 70
2a7a: 90 e2 ldi r25, 0x20 ; 32
2a7c: 9f 93 push r25
2a7e: 8f 93 push r24
2a80: df 93 push r29
2a82: cf 93 push r28
2a84: e0 91 3d 25 lds r30, 0x253D ; 0x80253d <swprintf>
2a88: f0 91 3e 25 lds r31, 0x253E ; 0x80253e <swprintf+0x1>
2a8c: 19 95 eicall
2a8e: 8a e7 ldi r24, 0x7A ; 122
2a90: 90 e2 ldi r25, 0x20 ; 32
2a92: 9f 93 push r25
2a94: 8f 93 push r24
2a96: df 93 push r29
2a98: cf 93 push r28
2a9a: e0 91 3d 25 lds r30, 0x253D ; 0x80253d <swprintf>
2a9e: f0 91 3e 25 lds r31, 0x253E ; 0x80253e <swprintf+0x1>
2aa2: 19 95 eicall
2aa4: 84 e9 ldi r24, 0x94 ; 148
2aa6: 90 e2 ldi r25, 0x20 ; 32
2aa8: 9f 93 push r25
2aaa: 8f 93 push r24
2aac: df 93 push r29
2aae: cf 93 push r28
2ab0: e0 91 3d 25 lds r30, 0x253D ; 0x80253d <swprintf>
2ab4: f0 91 3e 25 lds r31, 0x253E ; 0x80253e <swprintf+0x1>
2ab8: 19 95 eicall
* \param level Interrupt level of the RXD interrupt.
*/
static inline void usart_set_rx_interrupt_level(USART_t *usart,
enum usart_int_level_t level)
{
(usart)->CTRLA = ((usart)->CTRLA & ~USART_RXCINTLVL_gm) |
2aba: e0 eb ldi r30, 0xB0 ; 176
2abc: f8 e0 ldi r31, 0x08 ; 8
2abe: 83 81 ldd r24, Z+3 ; 0x03
2ac0: 8f 7c andi r24, 0xCF ; 207
2ac2: 80 62 ori r24, 0x20 ; 32
2ac4: 83 83 std Z+3, r24 ; 0x03
2ac6: 8d b7 in r24, 0x3d ; 61
2ac8: 9e b7 in r25, 0x3e ; 62
2aca: 44 96 adiw r24, 0x14 ; 20
2acc: 8d bf out 0x3d, r24 ; 61
2ace: 9e bf out 0x3e, r25 ; 62
2ad0: df 91 pop r29
2ad2: cf 91 pop r28
2ad4: 1f 91 pop r17
2ad6: 0f 91 pop r16
2ad8: 08 95 ret
00002ada <__vector_28>:
2ada: 1f 92 push r1
2adc: 0f 92 push r0
2ade: 0f b6 in r0, 0x3f ; 63
2ae0: 0f 92 push r0
2ae2: 11 24 eor r1, r1
2ae4: 08 b6 in r0, 0x38 ; 56
2ae6: 0f 92 push r0
2ae8: 18 be out 0x38, r1 ; 56
2aea: 09 b6 in r0, 0x39 ; 57
2aec: 0f 92 push r0
2aee: 19 be out 0x39, r1 ; 57
2af0: 0b b6 in r0, 0x3b ; 59
2af2: 0f 92 push r0
2af4: 1b be out 0x3b, r1 ; 59
2af6: 2f 93 push r18
2af8: 3f 93 push r19
2afa: 4f 93 push r20
2afc: 5f 93 push r21
2afe: 6f 93 push r22
2b00: 7f 93 push r23
2b02: 8f 93 push r24
2b04: 9f 93 push r25
2b06: af 93 push r26
2b08: bf 93 push r27
2b0a: ef 93 push r30
2b0c: ff 93 push r31
2b0e: 80 eb ldi r24, 0xB0 ; 176
2b10: 98 e0 ldi r25, 0x08 ; 8
2b12: 18 da rcall .-3024 ; 0x1f44 <usart_getchar>
2b14: 80 93 45 29 sts 0x2945, r24 ; 0x802945 <gps_response_temp>
2b18: ff 91 pop r31
2b1a: ef 91 pop r30
2b1c: bf 91 pop r27
2b1e: af 91 pop r26
2b20: 9f 91 pop r25
2b22: 8f 91 pop r24
2b24: 7f 91 pop r23
2b26: 6f 91 pop r22
2b28: 5f 91 pop r21
2b2a: 4f 91 pop r20
2b2c: 3f 91 pop r19
2b2e: 2f 91 pop r18
2b30: 0f 90 pop r0
2b32: 0b be out 0x3b, r0 ; 59
2b34: 0f 90 pop r0
2b36: 09 be out 0x39, r0 ; 57
2b38: 0f 90 pop r0
2b3a: 08 be out 0x38, r0 ; 56
2b3c: 0f 90 pop r0
2b3e: 0f be out 0x3f, r0 ; 63
2b40: 0f 90 pop r0
2b42: 1f 90 pop r1
2b44: 18 95 reti
00002b46 <__portable_avr_delay_cycles>:
groundAlt_Data.samplect = 1;
bInitialAltitudeSet_MPL3 = true;
set_ntcle_off(groundAlt_Data.temp);
swprintf(SWDEBUG, "GROUND ALT: %-2.2f\n", groundAlt_Data.pressure);
}
2b46: 04 c0 rjmp .+8 ; 0x2b50 <__portable_avr_delay_cycles+0xa>
2b48: 61 50 subi r22, 0x01 ; 1
2b4a: 71 09 sbc r23, r1
2b4c: 81 09 sbc r24, r1
2b4e: 91 09 sbc r25, r1
2b50: 61 15 cp r22, r1
2b52: 71 05 cpc r23, r1
2b54: 81 05 cpc r24, r1
2b56: 91 05 cpc r25, r1
2b58: b9 f7 brne .-18 ; 0x2b48 <__portable_avr_delay_cycles+0x2>
2b5a: 08 95 ret
00002b5c <mpl3_init>:
2b5c: 48 e0 ldi r20, 0x08 ; 8
2b5e: 66 e6 ldi r22, 0x66 ; 102
2b60: 72 e2 ldi r23, 0x22 ; 34
2b62: 86 ea ldi r24, 0xA6 ; 166
2b64: 92 e2 ldi r25, 0x22 ; 34
2b66: 0e 94 9d 2d call 0x5b3a ; 0x5b3a <init_circ_buffer_float>
2b6a: 48 e0 ldi r20, 0x08 ; 8
2b6c: 66 e8 ldi r22, 0x86 ; 134
2b6e: 72 e2 ldi r23, 0x22 ; 34
2b70: 8b ea ldi r24, 0xAB ; 171
2b72: 92 e2 ldi r25, 0x22 ; 34
2b74: 0e 94 9d 2d call 0x5b3a ; 0x5b3a <init_circ_buffer_float>
2b78: 10 92 65 22 sts 0x2265, r1 ; 0x802265 <b_mpl3fired>
2b7c: 10 92 64 22 sts 0x2264, r1 ; 0x802264 <bInitialAltitudeSet_MPL3>
2b80: 44 e0 ldi r20, 0x04 ; 4
2b82: 66 e2 ldi r22, 0x26 ; 38
2b84: 80 e6 ldi r24, 0x60 ; 96
2b86: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 <twi_write>
2b8a: 2b eb ldi r18, 0xBB ; 187
2b8c: 32 e2 ldi r19, 0x22 ; 34
2b8e: 41 e0 ldi r20, 0x01 ; 1
2b90: 66 e2 ldi r22, 0x26 ; 38
2b92: 80 e6 ldi r24, 0x60 ; 96
2b94: 0e 94 7a 2f call 0x5ef4 ; 0x5ef4 <twi_read>
2b98: 80 91 bb 22 lds r24, 0x22BB ; 0x8022bb <mpl3_buffer>
2b9c: 82 fd sbrc r24, 2
2b9e: f5 cf rjmp .-22 ; 0x2b8a <mpl3_init+0x2e>
2ba0: 47 e0 ldi r20, 0x07 ; 7
2ba2: 63 e1 ldi r22, 0x13 ; 19
2ba4: 80 e6 ldi r24, 0x60 ; 96
2ba6: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 <twi_write>
2baa: 40 e2 ldi r20, 0x20 ; 32
2bac: 68 e2 ldi r22, 0x28 ; 40
2bae: 80 e6 ldi r24, 0x60 ; 96
2bb0: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 <twi_write>
2bb4: 40 e8 ldi r20, 0x80 ; 128
2bb6: 69 e2 ldi r22, 0x29 ; 41
2bb8: 80 e6 ldi r24, 0x60 ; 96
2bba: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 <twi_write>
2bbe: 40 e8 ldi r20, 0x80 ; 128
2bc0: 6a e2 ldi r22, 0x2A ; 42
2bc2: 80 e6 ldi r24, 0x60 ; 96
2bc4: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 <twi_write>
2bc8: 48 e9 ldi r20, 0x98 ; 152
2bca: 66 e2 ldi r22, 0x26 ; 38
2bcc: 80 e6 ldi r24, 0x60 ; 96
2bce: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 <twi_write>
2bd2: 66 e5 ldi r22, 0x56 ; 86
2bd4: 73 e2 ldi r23, 0x23 ; 35
2bd6: 88 e0 ldi r24, 0x08 ; 8
2bd8: 90 e0 ldi r25, 0x00 ; 0
2bda: b5 df rcall .-150 ; 0x2b46 <__portable_avr_delay_cycles>
2bdc: e0 e6 ldi r30, 0x60 ; 96
2bde: f6 e0 ldi r31, 0x06 ; 6
2be0: 81 e3 ldi r24, 0x31 ; 49
2be2: 82 8b std Z+18, r24 ; 0x12
2be4: 84 e0 ldi r24, 0x04 ; 4
2be6: 82 87 std Z+10, r24 ; 0x0a
2be8: 81 85 ldd r24, Z+9 ; 0x09
2bea: 83 60 ori r24, 0x03 ; 3
2bec: 81 87 std Z+9, r24 ; 0x09
2bee: 08 95 ret
00002bf0 <get_mpl3_data>:
2bf0: cf 93 push r28
2bf2: df 93 push r29
2bf4: 20 91 64 22 lds r18, 0x2264 ; 0x802264 <bInitialAltitudeSet_MPL3>
2bf8: 22 23 and r18, r18
2bfa: e1 f0 breq .+56 ; 0x2c34 <get_mpl3_data+0x44>
2bfc: ec 01 movw r28, r24
2bfe: 8b ea ldi r24, 0xAB ; 171
2c00: 92 e2 ldi r25, 0x22 ; 34
2c02: 0e 94 f8 2c call 0x59f0 ; 0x59f0 <cb_getAvg_float>
2c06: 6d 83 std Y+5, r22 ; 0x05
2c08: 7e 83 std Y+6, r23 ; 0x06
2c0a: 8f 83 std Y+7, r24 ; 0x07
2c0c: 98 87 std Y+8, r25 ; 0x08
2c0e: 86 ea ldi r24, 0xA6 ; 166
2c10: 92 e2 ldi r25, 0x22 ; 34
2c12: 0e 94 f8 2c call 0x59f0 ; 0x59f0 <cb_getAvg_float>
2c16: 20 91 b1 22 lds r18, 0x22B1 ; 0x8022b1 <groundAlt_Data+0x1>
2c1a: 30 91 b2 22 lds r19, 0x22B2 ; 0x8022b2 <groundAlt_Data+0x2>
2c1e: 40 91 b3 22 lds r20, 0x22B3 ; 0x8022b3 <groundAlt_Data+0x3>
2c22: 50 91 b4 22 lds r21, 0x22B4 ; 0x8022b4 <groundAlt_Data+0x4>
2c26: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
2c2a: 69 83 std Y+1, r22 ; 0x01
2c2c: 7a 83 std Y+2, r23 ; 0x02
2c2e: 8b 83 std Y+3, r24 ; 0x03
2c30: 9c 83 std Y+4, r25 ; 0x04
2c32: 09 c0 rjmp .+18 ; 0x2c46 <get_mpl3_data+0x56>
2c34: fc 01 movw r30, r24
2c36: 11 82 std Z+1, r1 ; 0x01
2c38: 12 82 std Z+2, r1 ; 0x02
2c3a: 13 82 std Z+3, r1 ; 0x03
2c3c: 14 82 std Z+4, r1 ; 0x04
2c3e: 15 82 std Z+5, r1 ; 0x05
2c40: 16 82 std Z+6, r1 ; 0x06
2c42: 17 82 std Z+7, r1 ; 0x07
2c44: 10 86 std Z+8, r1 ; 0x08
2c46: df 91 pop r29
2c48: cf 91 pop r28
2c4a: 08 95 ret
00002c4c <mpl3_get_data_status>:
2c4c: 80 91 65 22 lds r24, 0x2265 ; 0x802265 <b_mpl3fired>
2c50: 08 95 ret
00002c52 <mpl3_single_read>:
2c52: 81 11 cpse r24, r1
2c54: 06 c0 rjmp .+12 ; 0x2c62 <mpl3_single_read+0x10>
2c56: 4a e8 ldi r20, 0x8A ; 138
2c58: 66 e2 ldi r22, 0x26 ; 38
2c5a: 80 e6 ldi r24, 0x60 ; 96
2c5c: 0c 94 69 2f jmp 0x5ed2 ; 0x5ed2 <twi_write>
2c60: 08 95 ret
2c62: 4a e0 ldi r20, 0x0A ; 10
2c64: 66 e2 ldi r22, 0x26 ; 38
2c66: 80 e6 ldi r24, 0x60 ; 96
2c68: 0c 94 69 2f jmp 0x5ed2 ; 0x5ed2 <twi_write>
2c6c: 08 95 ret
00002c6e <mpl3_setInitialAltitude>:
2c6e: cf 92 push r12
2c70: df 92 push r13
2c72: ef 92 push r14
2c74: ff 92 push r15
2c76: cf 93 push r28
2c78: df 93 push r29
2c7a: c0 eb ldi r28, 0xB0 ; 176
2c7c: d2 e2 ldi r29, 0x22 ; 34
2c7e: 69 85 ldd r22, Y+9 ; 0x09
2c80: 7a 85 ldd r23, Y+10 ; 0x0a
2c82: 07 2e mov r0, r23
2c84: 00 0c add r0, r0
2c86: 88 0b sbc r24, r24
2c88: 99 0b sbc r25, r25
2c8a: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf>
2c8e: 6b 01 movw r12, r22
2c90: 7c 01 movw r14, r24
2c92: 9b 01 movw r18, r22
2c94: ac 01 movw r20, r24
2c96: 69 81 ldd r22, Y+1 ; 0x01
2c98: 7a 81 ldd r23, Y+2 ; 0x02
2c9a: 8b 81 ldd r24, Y+3 ; 0x03
2c9c: 9c 81 ldd r25, Y+4 ; 0x04
2c9e: 0e 94 b5 32 call 0x656a ; 0x656a <__divsf3>
2ca2: 69 83 std Y+1, r22 ; 0x01
2ca4: 7a 83 std Y+2, r23 ; 0x02
2ca6: 8b 83 std Y+3, r24 ; 0x03
2ca8: 9c 83 std Y+4, r25 ; 0x04
2caa: a7 01 movw r20, r14
2cac: 96 01 movw r18, r12
2cae: 6d 81 ldd r22, Y+5 ; 0x05
2cb0: 7e 81 ldd r23, Y+6 ; 0x06
2cb2: 8f 81 ldd r24, Y+7 ; 0x07
2cb4: 98 85 ldd r25, Y+8 ; 0x08
2cb6: 0e 94 b5 32 call 0x656a ; 0x656a <__divsf3>
2cba: 6d 83 std Y+5, r22 ; 0x05
2cbc: 7e 83 std Y+6, r23 ; 0x06
2cbe: 8f 83 std Y+7, r24 ; 0x07
2cc0: 98 87 std Y+8, r25 ; 0x08
2cc2: 21 e0 ldi r18, 0x01 ; 1
2cc4: 30 e0 ldi r19, 0x00 ; 0
2cc6: 29 87 std Y+9, r18 ; 0x09
2cc8: 3a 87 std Y+10, r19 ; 0x0a
2cca: 20 93 64 22 sts 0x2264, r18 ; 0x802264 <bInitialAltitudeSet_MPL3>
2cce: 0e 94 5c 30 call 0x60b8 ; 0x60b8 <set_ntcle_off>
2cd2: 8c 81 ldd r24, Y+4 ; 0x04
2cd4: 8f 93 push r24
2cd6: 8b 81 ldd r24, Y+3 ; 0x03
2cd8: 8f 93 push r24
2cda: 8a 81 ldd r24, Y+2 ; 0x02
2cdc: 8f 93 push r24
2cde: 89 81 ldd r24, Y+1 ; 0x01
2ce0: 8f 93 push r24
2ce2: 86 ea ldi r24, 0xA6 ; 166
2ce4: 90 e2 ldi r25, 0x20 ; 32
2ce6: 9f 93 push r25
2ce8: 8f 93 push r24
2cea: 88 e0 ldi r24, 0x08 ; 8
2cec: 8f 93 push r24
2cee: 80 ea ldi r24, 0xA0 ; 160
2cf0: 8f 93 push r24
2cf2: e0 91 3d 25 lds r30, 0x253D ; 0x80253d <swprintf>
2cf6: f0 91 3e 25 lds r31, 0x253E ; 0x80253e <swprintf+0x1>
2cfa: 19 95 eicall
2cfc: 8d b7 in r24, 0x3d ; 61
2cfe: 9e b7 in r25, 0x3e ; 62
2d00: 08 96 adiw r24, 0x08 ; 8
2d02: 8d bf out 0x3d, r24 ; 61
2d04: 9e bf out 0x3e, r25 ; 62
2d06: df 91 pop r29
2d08: cf 91 pop r28
2d0a: ff 90 pop r15
2d0c: ef 90 pop r14
2d0e: df 90 pop r13
2d10: cf 90 pop r12
2d12: 08 95 ret
00002d14 <calc_mpl3_data>:
2d14: 8f 92 push r8
2d16: 9f 92 push r9
2d18: af 92 push r10
2d1a: bf 92 push r11
2d1c: cf 92 push r12
2d1e: df 92 push r13
2d20: ef 92 push r14
2d22: ff 92 push r15
2d24: 0f 93 push r16
2d26: 1f 93 push r17
2d28: cf 93 push r28
2d2a: df 93 push r29
2d2c: 10 92 65 22 sts 0x2265, r1 ; 0x802265 <b_mpl3fired>
2d30: 2b eb ldi r18, 0xBB ; 187
2d32: 32 e2 ldi r19, 0x22 ; 34
2d34: 46 e0 ldi r20, 0x06 ; 6
2d36: 60 e0 ldi r22, 0x00 ; 0
2d38: 80 e6 ldi r24, 0x60 ; 96
2d3a: 0e 94 7a 2f call 0x5ef4 ; 0x5ef4 <twi_read>
2d3e: 80 91 bb 22 lds r24, 0x22BB ; 0x8022bb <mpl3_buffer>
2d42: 83 ff sbrs r24, 3
2d44: da c0 rjmp .+436 ; 0x2efa <calc_mpl3_data+0x1e6>
2d46: cb eb ldi r28, 0xBB ; 187
2d48: d2 e2 ldi r29, 0x22 ; 34
2d4a: b9 80 ldd r11, Y+1 ; 0x01
2d4c: ca 80 ldd r12, Y+2 ; 0x02
2d4e: ab 80 ldd r10, Y+3 ; 0x03
2d50: 1c 81 ldd r17, Y+4 ; 0x04
2d52: 0d 81 ldd r16, Y+5 ; 0x05
2d54: 9e 01 movw r18, r28
2d56: 41 e0 ldi r20, 0x01 ; 1
2d58: 66 e2 ldi r22, 0x26 ; 38
2d5a: 80 e6 ldi r24, 0x60 ; 96
2d5c: 0e 94 7a 2f call 0x5ef4 ; 0x5ef4 <twi_read>
2d60: 88 81 ld r24, Y
2d62: 88 23 and r24, r24
2d64: 1c f5 brge .+70 ; 0x2dac <calc_mpl3_data+0x98>
2d66: 6c 2d mov r22, r12
2d68: 70 e0 ldi r23, 0x00 ; 0
2d6a: 7b 29 or r23, r11
2d6c: 07 2e mov r0, r23
2d6e: 00 0c add r0, r0
2d70: 88 0b sbc r24, r24
2d72: 99 0b sbc r25, r25
2d74: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf>
2d78: 6b 01 movw r12, r22
2d7a: 7c 01 movw r14, r24
2d7c: ca 2d mov r28, r10
2d7e: c2 95 swap r28
2d80: cf 70 andi r28, 0x0F ; 15
2d82: 6c 2f mov r22, r28
2d84: 70 e0 ldi r23, 0x00 ; 0
2d86: 80 e0 ldi r24, 0x00 ; 0
2d88: 90 e0 ldi r25, 0x00 ; 0
2d8a: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf>
2d8e: 20 e0 ldi r18, 0x00 ; 0
2d90: 30 e0 ldi r19, 0x00 ; 0
2d92: 40 e8 ldi r20, 0x80 ; 128
2d94: 5d e3 ldi r21, 0x3D ; 61
2d96: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
2d9a: 9b 01 movw r18, r22
2d9c: ac 01 movw r20, r24
2d9e: c7 01 movw r24, r14
2da0: b6 01 movw r22, r12
2da2: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
2da6: 6b 01 movw r12, r22
2da8: 7c 01 movw r14, r24
2daa: 2f c0 rjmp .+94 ; 0x2e0a <calc_mpl3_data+0xf6>
2dac: d1 2c mov r13, r1
2dae: e1 2c mov r14, r1
2db0: f1 2c mov r15, r1
2db2: fe 2c mov r15, r14
2db4: ed 2c mov r14, r13
2db6: dc 2c mov r13, r12
2db8: cc 24 eor r12, r12
2dba: eb 28 or r14, r11
2dbc: ca 28 or r12, r10
2dbe: ca 2d mov r28, r10
2dc0: c0 73 andi r28, 0x30 ; 48
2dc2: c2 95 swap r28
2dc4: cf 70 andi r28, 0x0F ; 15
2dc6: 6c 2f mov r22, r28
2dc8: 70 e0 ldi r23, 0x00 ; 0
2dca: 80 e0 ldi r24, 0x00 ; 0
2dcc: 90 e0 ldi r25, 0x00 ; 0
2dce: 0e 94 4e 33 call 0x669c ; 0x669c <__floatunsisf>
2dd2: 20 e0 ldi r18, 0x00 ; 0
2dd4: 30 e0 ldi r19, 0x00 ; 0
2dd6: 40 e8 ldi r20, 0x80 ; 128
2dd8: 5e e3 ldi r21, 0x3E ; 62
2dda: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
2dde: 4b 01 movw r8, r22
2de0: 5c 01 movw r10, r24
2de2: c7 01 movw r24, r14
2de4: b6 01 movw r22, r12
2de6: 68 94 set
2de8: 15 f8 bld r1, 5
2dea: 95 95 asr r25
2dec: 87 95 ror r24
2dee: 77 95 ror r23
2df0: 67 95 ror r22
2df2: 16 94 lsr r1
2df4: d1 f7 brne .-12 ; 0x2dea <calc_mpl3_data+0xd6>
2df6: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf>
2dfa: 9b 01 movw r18, r22
2dfc: ac 01 movw r20, r24
2dfe: c5 01 movw r24, r10
2e00: b4 01 movw r22, r8
2e02: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
2e06: 6b 01 movw r12, r22
2e08: 7c 01 movw r14, r24
2e0a: a7 01 movw r20, r14
2e0c: 96 01 movw r18, r12
2e0e: c7 01 movw r24, r14
2e10: b6 01 movw r22, r12
2e12: 0e 94 b5 35 call 0x6b6a ; 0x6b6a <__unordsf2>
2e16: 81 11 cpse r24, r1
2e18: 72 c0 rjmp .+228 ; 0x2efe <calc_mpl3_data+0x1ea>
2e1a: 20 e0 ldi r18, 0x00 ; 0
2e1c: 30 e0 ldi r19, 0x00 ; 0
2e1e: a9 01 movw r20, r18
2e20: c7 01 movw r24, r14
2e22: b6 01 movw r22, r12
2e24: 0e 94 b1 32 call 0x6562 ; 0x6562 <__cmpsf2>
2e28: 88 23 and r24, r24
2e2a: 09 f4 brne .+2 ; 0x2e2e <calc_mpl3_data+0x11a>
2e2c: 6a c0 rjmp .+212 ; 0x2f02 <calc_mpl3_data+0x1ee>
2e2e: d0 2f mov r29, r16
2e30: d2 95 swap r29
2e32: df 70 andi r29, 0x0F ; 15
2e34: 6d 2f mov r22, r29
2e36: 70 e0 ldi r23, 0x00 ; 0
2e38: 80 e0 ldi r24, 0x00 ; 0
2e3a: 90 e0 ldi r25, 0x00 ; 0
2e3c: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf>
2e40: 20 e0 ldi r18, 0x00 ; 0
2e42: 30 e0 ldi r19, 0x00 ; 0
2e44: 40 e8 ldi r20, 0x80 ; 128
2e46: 5d e3 ldi r21, 0x3D ; 61
2e48: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
2e4c: 4b 01 movw r8, r22
2e4e: 5c 01 movw r10, r24
2e50: 61 2f mov r22, r17
2e52: 70 e0 ldi r23, 0x00 ; 0
2e54: 80 e0 ldi r24, 0x00 ; 0
2e56: 90 e0 ldi r25, 0x00 ; 0
2e58: 0e 94 4e 33 call 0x669c ; 0x669c <__floatunsisf>
2e5c: 9b 01 movw r18, r22
2e5e: ac 01 movw r20, r24
2e60: c5 01 movw r24, r10
2e62: b4 01 movw r22, r8
2e64: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
2e68: 4b 01 movw r8, r22
2e6a: 5c 01 movw r10, r24
2e6c: 9b 01 movw r18, r22
2e6e: ac 01 movw r20, r24
2e70: 0e 94 b5 35 call 0x6b6a ; 0x6b6a <__unordsf2>
2e74: 81 11 cpse r24, r1
2e76: 47 c0 rjmp .+142 ; 0x2f06 <calc_mpl3_data+0x1f2>
2e78: 20 e0 ldi r18, 0x00 ; 0
2e7a: 30 e0 ldi r19, 0x00 ; 0
2e7c: a9 01 movw r20, r18
2e7e: c5 01 movw r24, r10
2e80: b4 01 movw r22, r8
2e82: 0e 94 b1 32 call 0x6562 ; 0x6562 <__cmpsf2>
2e86: 88 23 and r24, r24
2e88: 09 f4 brne .+2 ; 0x2e8c <calc_mpl3_data+0x178>
2e8a: 3f c0 rjmp .+126 ; 0x2f0a <calc_mpl3_data+0x1f6>
2e8c: c0 91 64 22 lds r28, 0x2264 ; 0x802264 <bInitialAltitudeSet_MPL3>
2e90: cc 23 and r28, r28
2e92: 69 f0 breq .+26 ; 0x2eae <calc_mpl3_data+0x19a>
2e94: b5 01 movw r22, r10
2e96: a4 01 movw r20, r8
2e98: 8b ea ldi r24, 0xAB ; 171
2e9a: 92 e2 ldi r25, 0x22 ; 34
2e9c: 0e 94 ce 2c call 0x599c ; 0x599c <cb_append_float>
2ea0: b7 01 movw r22, r14
2ea2: a6 01 movw r20, r12
2ea4: 86 ea ldi r24, 0xA6 ; 166
2ea6: 92 e2 ldi r25, 0x22 ; 34
2ea8: 0e 94 ce 2c call 0x599c ; 0x599c <cb_append_float>
2eac: 31 c0 rjmp .+98 ; 0x2f10 <calc_mpl3_data+0x1fc>
2eae: c0 eb ldi r28, 0xB0 ; 176
2eb0: d2 e2 ldi r29, 0x22 ; 34
2eb2: a7 01 movw r20, r14
2eb4: 96 01 movw r18, r12
2eb6: 69 81 ldd r22, Y+1 ; 0x01
2eb8: 7a 81 ldd r23, Y+2 ; 0x02
2eba: 8b 81 ldd r24, Y+3 ; 0x03
2ebc: 9c 81 ldd r25, Y+4 ; 0x04
2ebe: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
2ec2: 69 83 std Y+1, r22 ; 0x01
2ec4: 7a 83 std Y+2, r23 ; 0x02
2ec6: 8b 83 std Y+3, r24 ; 0x03
2ec8: 9c 83 std Y+4, r25 ; 0x04
2eca: a5 01 movw r20, r10
2ecc: 94 01 movw r18, r8
2ece: 6d 81 ldd r22, Y+5 ; 0x05
2ed0: 7e 81 ldd r23, Y+6 ; 0x06
2ed2: 8f 81 ldd r24, Y+7 ; 0x07
2ed4: 98 85 ldd r25, Y+8 ; 0x08
2ed6: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
2eda: 6d 83 std Y+5, r22 ; 0x05
2edc: 7e 83 std Y+6, r23 ; 0x06
2ede: 8f 83 std Y+7, r24 ; 0x07
2ee0: 98 87 std Y+8, r25 ; 0x08
2ee2: 89 85 ldd r24, Y+9 ; 0x09
2ee4: 9a 85 ldd r25, Y+10 ; 0x0a
2ee6: 01 96 adiw r24, 0x01 ; 1
2ee8: 89 87 std Y+9, r24 ; 0x09
2eea: 9a 87 std Y+10, r25 ; 0x0a
2eec: 80 38 cpi r24, 0x80 ; 128
2eee: 91 05 cpc r25, r1
2ef0: 74 f0 brlt .+28 ; 0x2f0e <calc_mpl3_data+0x1fa>
2ef2: ce 01 movw r24, r28
2ef4: bc de rcall .-648 ; 0x2c6e <mpl3_setInitialAltitude>
2ef6: c1 e0 ldi r28, 0x01 ; 1
2ef8: 0b c0 rjmp .+22 ; 0x2f10 <calc_mpl3_data+0x1fc>
2efa: c0 e0 ldi r28, 0x00 ; 0
2efc: 09 c0 rjmp .+18 ; 0x2f10 <calc_mpl3_data+0x1fc>
2efe: c0 e0 ldi r28, 0x00 ; 0
2f00: 07 c0 rjmp .+14 ; 0x2f10 <calc_mpl3_data+0x1fc>
2f02: c0 e0 ldi r28, 0x00 ; 0
2f04: 05 c0 rjmp .+10 ; 0x2f10 <calc_mpl3_data+0x1fc>
2f06: c0 e0 ldi r28, 0x00 ; 0
2f08: 03 c0 rjmp .+6 ; 0x2f10 <calc_mpl3_data+0x1fc>
2f0a: c0 e0 ldi r28, 0x00 ; 0
2f0c: 01 c0 rjmp .+2 ; 0x2f10 <calc_mpl3_data+0x1fc>
2f0e: c1 e0 ldi r28, 0x01 ; 1
2f10: 8c 2f mov r24, r28
2f12: df 91 pop r29
2f14: cf 91 pop r28
2f16: 1f 91 pop r17
2f18: 0f 91 pop r16
2f1a: ff 90 pop r15
2f1c: ef 90 pop r14
2f1e: df 90 pop r13
2f20: cf 90 pop r12
2f22: bf 90 pop r11
2f24: af 90 pop r10
2f26: 9f 90 pop r9
2f28: 8f 90 pop r8
2f2a: 08 95 ret
00002f2c <__vector_64>:
_Bool mpl3_checkbInitialAltitudeSet(void)
{
return bInitialAltitudeSet_MPL3;
2f2c: 1f 92 push r1
2f2e: 0f 92 push r0
2f30: 0f b6 in r0, 0x3f ; 63
2f32: 0f 92 push r0
2f34: 11 24 eor r1, r1
2f36: 08 b6 in r0, 0x38 ; 56
2f38: 0f 92 push r0
2f3a: 18 be out 0x38, r1 ; 56
2f3c: 8f 93 push r24
void mpl3_clear_data_flag(void)
{
b_mpl3fired = false;
}
2f3e: 81 e0 ldi r24, 0x01 ; 1
2f40: 80 93 65 22 sts 0x2265, r24 ; 0x802265 <b_mpl3fired>
_Bool mpl3_checkbInitialAltitudeSet(void)
{
return bInitialAltitudeSet_MPL3;
}
2f44: 8f 91 pop r24
2f46: 0f 90 pop r0
2f48: 08 be out 0x38, r0 ; 56
2f4a: 0f 90 pop r0
2f4c: 0f be out 0x3f, r0 ; 63
2f4e: 0f 90 pop r0
2f50: 1f 90 pop r1
2f52: 18 95 reti
00002f54 <__portable_avr_delay_cycles>:
{
case MAG_14BITS:
mag_resolution = (float)(10.f * 4912.f / 8190.f);
break;
case MAG_16BITS:
mag_resolution = (float)(10.f * 4912.f / 32760.f);
2f54: 04 c0 rjmp .+8 ; 0x2f5e <__portable_avr_delay_cycles+0xa>
2f56: 61 50 subi r22, 0x01 ; 1
2f58: 71 09 sbc r23, r1
2f5a: 81 09 sbc r24, r1
2f5c: 91 09 sbc r25, r1
2f5e: 61 15 cp r22, r1
2f60: 71 05 cpc r23, r1
2f62: 81 05 cpc r24, r1
2f64: 91 05 cpc r25, r1
2f66: b9 f7 brne .-18 ; 0x2f56 <__portable_avr_delay_cycles+0x2>
2f68: 08 95 ret
00002f6a <set_mpu_data_status>:
2f6a: 80 93 89 24 sts 0x2489, r24 ; 0x802489 <b_mpu_data_ready>
2f6e: 08 95 ret
00002f70 <mpu_data_ready>:
2f70: 80 91 89 24 lds r24, 0x2489 ; 0x802489 <b_mpu_data_ready>
2f74: 08 95 ret
00002f76 <mpu_set_sample_rate>:
2f76: 68 2f mov r22, r24
2f78: 70 e0 ldi r23, 0x00 ; 0
2f7a: 88 ee ldi r24, 0xE8 ; 232
2f7c: 93 e0 ldi r25, 0x03 ; 3
2f7e: 0e 94 06 3a call 0x740c ; 0x740c <__udivmodhi4>
2f82: 4f ef ldi r20, 0xFF ; 255
2f84: 46 0f add r20, r22
2f86: 69 e1 ldi r22, 0x19 ; 25
2f88: 89 e6 ldi r24, 0x69 ; 105
2f8a: 0c 94 69 2f jmp 0x5ed2 ; 0x5ed2 <twi_write>
2f8e: 08 95 ret
00002f90 <mpu_get_accel_data>:
2f90: cf 93 push r28
2f92: df 93 push r29
2f94: ec 01 movw r28, r24
2f96: 84 e4 ldi r24, 0x44 ; 68
2f98: 94 e2 ldi r25, 0x24 ; 36
2f9a: 0e 94 f8 2c call 0x59f0 ; 0x59f0 <cb_getAvg_float>
2f9e: 68 83 st Y, r22
2fa0: 79 83 std Y+1, r23 ; 0x01
2fa2: 8a 83 std Y+2, r24 ; 0x02
2fa4: 9b 83 std Y+3, r25 ; 0x03
2fa6: 87 e1 ldi r24, 0x17 ; 23
2fa8: 94 e2 ldi r25, 0x24 ; 36
2faa: 0e 94 f8 2c call 0x59f0 ; 0x59f0 <cb_getAvg_float>
2fae: 6c 83 std Y+4, r22 ; 0x04
2fb0: 7d 83 std Y+5, r23 ; 0x05
2fb2: 8e 83 std Y+6, r24 ; 0x06
2fb4: 9f 83 std Y+7, r25 ; 0x07
2fb6: 8a ee ldi r24, 0xEA ; 234
2fb8: 93 e2 ldi r25, 0x23 ; 35
2fba: 0e 94 f8 2c call 0x59f0 ; 0x59f0 <cb_getAvg_float>
2fbe: 68 87 std Y+8, r22 ; 0x08
2fc0: 79 87 std Y+9, r23 ; 0x09
2fc2: 8a 87 std Y+10, r24 ; 0x0a
2fc4: 9b 87 std Y+11, r25 ; 0x0b
2fc6: df 91 pop r29
2fc8: cf 91 pop r28
2fca: 08 95 ret
00002fcc <mpu_get_rot_data>:
2fcc: cf 93 push r28
2fce: df 93 push r29
2fd0: ec 01 movw r28, r24
2fd2: 8d eb ldi r24, 0xBD ; 189
2fd4: 93 e2 ldi r25, 0x23 ; 35
2fd6: 0e 94 cd 2d call 0x5b9a ; 0x5b9a <cb_getAvg_double>
2fda: 68 83 st Y, r22
2fdc: 79 83 std Y+1, r23 ; 0x01
2fde: 8a 83 std Y+2, r24 ; 0x02
2fe0: 9b 83 std Y+3, r25 ; 0x03
2fe2: 80 e9 ldi r24, 0x90 ; 144
2fe4: 93 e2 ldi r25, 0x23 ; 35
2fe6: 0e 94 cd 2d call 0x5b9a ; 0x5b9a <cb_getAvg_double>
2fea: 6c 83 std Y+4, r22 ; 0x04
2fec: 7d 83 std Y+5, r23 ; 0x05
2fee: 8e 83 std Y+6, r24 ; 0x06
2ff0: 9f 83 std Y+7, r25 ; 0x07
2ff2: 83 e6 ldi r24, 0x63 ; 99
2ff4: 93 e2 ldi r25, 0x23 ; 35
2ff6: 0e 94 cd 2d call 0x5b9a ; 0x5b9a <cb_getAvg_double>
2ffa: 68 87 std Y+8, r22 ; 0x08
2ffc: 79 87 std Y+9, r23 ; 0x09
2ffe: 8a 87 std Y+10, r24 ; 0x0a
3000: 9b 87 std Y+11, r25 ; 0x0b
3002: df 91 pop r29
3004: cf 91 pop r28
3006: 08 95 ret
00003008 <mpu_filter_data>:
3008: 2f 92 push r2
300a: 3f 92 push r3
300c: 4f 92 push r4
300e: 5f 92 push r5
3010: 6f 92 push r6
3012: 7f 92 push r7
3014: 8f 92 push r8
3016: 9f 92 push r9
3018: af 92 push r10
301a: bf 92 push r11
301c: cf 92 push r12
301e: df 92 push r13
3020: ef 92 push r14
3022: ff 92 push r15
3024: 0f 93 push r16
3026: 1f 93 push r17
3028: cf 93 push r28
302a: df 93 push r29
302c: cd b7 in r28, 0x3d ; 61
302e: de b7 in r29, 0x3e ; 62
3030: a4 97 sbiw r28, 0x24 ; 36
3032: cd bf out 0x3d, r28 ; 61
3034: de bf out 0x3e, r29 ; 62
3036: fc 01 movw r30, r24
3038: a0 80 ld r10, Z
303a: b1 80 ldd r11, Z+1 ; 0x01
303c: c2 80 ldd r12, Z+2 ; 0x02
303e: d3 80 ldd r13, Z+3 ; 0x03
3040: e4 88 ldd r14, Z+20 ; 0x14
3042: f5 88 ldd r15, Z+21 ; 0x15
3044: 06 89 ldd r16, Z+22 ; 0x16
3046: 17 89 ldd r17, Z+23 ; 0x17
3048: 20 89 ldd r18, Z+16 ; 0x10
304a: 31 89 ldd r19, Z+17 ; 0x11
304c: 42 89 ldd r20, Z+18 ; 0x12
304e: 53 89 ldd r21, Z+19 ; 0x13
3050: 44 84 ldd r4, Z+12 ; 0x0c
3052: 55 84 ldd r5, Z+13 ; 0x0d
3054: 66 84 ldd r6, Z+14 ; 0x0e
3056: 77 84 ldd r7, Z+15 ; 0x0f
3058: 80 a1 ldd r24, Z+32 ; 0x20
305a: 91 a1 ldd r25, Z+33 ; 0x21
305c: a2 a1 ldd r26, Z+34 ; 0x22
305e: b3 a1 ldd r27, Z+35 ; 0x23
3060: b0 58 subi r27, 0x80 ; 128
3062: bf 93 push r27
3064: af 93 push r26
3066: 9f 93 push r25
3068: 8f 93 push r24
306a: 87 8d ldd r24, Z+31 ; 0x1f
306c: 8f 93 push r24
306e: 86 8d ldd r24, Z+30 ; 0x1e
3070: 8f 93 push r24
3072: 85 8d ldd r24, Z+29 ; 0x1d
3074: 8f 93 push r24
3076: 84 8d ldd r24, Z+28 ; 0x1c
3078: 8f 93 push r24
307a: 83 8d ldd r24, Z+27 ; 0x1b
307c: 8f 93 push r24
307e: 82 8d ldd r24, Z+26 ; 0x1a
3080: 8f 93 push r24
3082: 81 8d ldd r24, Z+25 ; 0x19
3084: 8f 93 push r24
3086: 80 8d ldd r24, Z+24 ; 0x18
3088: 8f 93 push r24
308a: 83 85 ldd r24, Z+11 ; 0x0b
308c: 8f 93 push r24
308e: 82 85 ldd r24, Z+10 ; 0x0a
3090: 8f 93 push r24
3092: 81 85 ldd r24, Z+9 ; 0x09
3094: 8f 93 push r24
3096: 80 85 ldd r24, Z+8 ; 0x08
3098: 8f 93 push r24
309a: 87 81 ldd r24, Z+7 ; 0x07
309c: 8f 93 push r24
309e: 86 81 ldd r24, Z+6 ; 0x06
30a0: 8f 93 push r24
30a2: 85 81 ldd r24, Z+5 ; 0x05
30a4: 8f 93 push r24
30a6: 84 81 ldd r24, Z+4 ; 0x04
30a8: 8f 93 push r24
30aa: c3 01 movw r24, r6
30ac: b2 01 movw r22, r4
30ae: 0e 94 22 24 call 0x4844 ; 0x4844 <MahonyAHRSupdate>
30b2: 60 91 00 20 lds r22, 0x2000 ; 0x802000 <__data_start>
30b6: 70 91 01 20 lds r23, 0x2001 ; 0x802001 <__data_start+0x1>
30ba: 80 91 02 20 lds r24, 0x2002 ; 0x802002 <__data_start+0x2>
30be: 90 91 03 20 lds r25, 0x2003 ; 0x802003 <__data_start+0x3>
30c2: 20 91 00 20 lds r18, 0x2000 ; 0x802000 <__data_start>
30c6: 30 91 01 20 lds r19, 0x2001 ; 0x802001 <__data_start+0x1>
30ca: 40 91 02 20 lds r20, 0x2002 ; 0x802002 <__data_start+0x2>
30ce: 50 91 03 20 lds r21, 0x2003 ; 0x802003 <__data_start+0x3>
30d2: 80 90 a4 24 lds r8, 0x24A4 ; 0x8024a4 <q1>
30d6: 90 90 a5 24 lds r9, 0x24A5 ; 0x8024a5 <q1+0x1>
30da: a0 90 a6 24 lds r10, 0x24A6 ; 0x8024a6 <q1+0x2>
30de: b0 90 a7 24 lds r11, 0x24A7 ; 0x8024a7 <q1+0x3>
30e2: 40 90 a4 24 lds r4, 0x24A4 ; 0x8024a4 <q1>
30e6: 50 90 a5 24 lds r5, 0x24A5 ; 0x8024a5 <q1+0x1>
30ea: 60 90 a6 24 lds r6, 0x24A6 ; 0x8024a6 <q1+0x2>
30ee: 70 90 a7 24 lds r7, 0x24A7 ; 0x8024a7 <q1+0x3>
30f2: e0 90 a0 24 lds r14, 0x24A0 ; 0x8024a0 <q2>
30f6: f0 90 a1 24 lds r15, 0x24A1 ; 0x8024a1 <q2+0x1>
30fa: 00 91 a2 24 lds r16, 0x24A2 ; 0x8024a2 <q2+0x2>
30fe: 10 91 a3 24 lds r17, 0x24A3 ; 0x8024a3 <q2+0x3>
3102: e9 82 std Y+1, r14 ; 0x01
3104: fa 82 std Y+2, r15 ; 0x02
3106: 0b 83 std Y+3, r16 ; 0x03
3108: 1c 83 std Y+4, r17 ; 0x04
310a: e0 90 a0 24 lds r14, 0x24A0 ; 0x8024a0 <q2>
310e: f0 90 a1 24 lds r15, 0x24A1 ; 0x8024a1 <q2+0x1>
3112: 00 91 a2 24 lds r16, 0x24A2 ; 0x8024a2 <q2+0x2>
3116: 10 91 a3 24 lds r17, 0x24A3 ; 0x8024a3 <q2+0x3>
311a: ed 82 std Y+5, r14 ; 0x05
311c: fe 82 std Y+6, r15 ; 0x06
311e: 0f 83 std Y+7, r16 ; 0x07
3120: 18 87 std Y+8, r17 ; 0x08
3122: e0 90 9c 24 lds r14, 0x249C ; 0x80249c <q3>
3126: f0 90 9d 24 lds r15, 0x249D ; 0x80249d <q3+0x1>
312a: 00 91 9e 24 lds r16, 0x249E ; 0x80249e <q3+0x2>
312e: 10 91 9f 24 lds r17, 0x249F ; 0x80249f <q3+0x3>
3132: e9 86 std Y+9, r14 ; 0x09
3134: fa 86 std Y+10, r15 ; 0x0a
3136: 0b 87 std Y+11, r16 ; 0x0b
3138: 1c 87 std Y+12, r17 ; 0x0c
313a: e0 90 9c 24 lds r14, 0x249C ; 0x80249c <q3>
313e: f0 90 9d 24 lds r15, 0x249D ; 0x80249d <q3+0x1>
3142: 00 91 9e 24 lds r16, 0x249E ; 0x80249e <q3+0x2>
3146: 10 91 9f 24 lds r17, 0x249F ; 0x80249f <q3+0x3>
314a: ed 86 std Y+13, r14 ; 0x0d
314c: fe 86 std Y+14, r15 ; 0x0e
314e: 0f 87 std Y+15, r16 ; 0x0f
3150: 18 8b std Y+16, r17 ; 0x10
3152: e0 90 a4 24 lds r14, 0x24A4 ; 0x8024a4 <q1>
3156: f0 90 a5 24 lds r15, 0x24A5 ; 0x8024a5 <q1+0x1>
315a: 00 91 a6 24 lds r16, 0x24A6 ; 0x8024a6 <q1+0x2>
315e: 10 91 a7 24 lds r17, 0x24A7 ; 0x8024a7 <q1+0x3>
3162: e9 8a std Y+17, r14 ; 0x11
3164: fa 8a std Y+18, r15 ; 0x12
3166: 0b 8b std Y+19, r16 ; 0x13
3168: 1c 8b std Y+20, r17 ; 0x14
316a: e0 90 a0 24 lds r14, 0x24A0 ; 0x8024a0 <q2>
316e: f0 90 a1 24 lds r15, 0x24A1 ; 0x8024a1 <q2+0x1>
3172: 00 91 a2 24 lds r16, 0x24A2 ; 0x8024a2 <q2+0x2>
3176: 10 91 a3 24 lds r17, 0x24A3 ; 0x8024a3 <q2+0x3>
317a: ed 8a std Y+21, r14 ; 0x15
317c: fe 8a std Y+22, r15 ; 0x16
317e: 0f 8b std Y+23, r16 ; 0x17
3180: 18 8f std Y+24, r17 ; 0x18
3182: e0 90 00 20 lds r14, 0x2000 ; 0x802000 <__data_start>
3186: f0 90 01 20 lds r15, 0x2001 ; 0x802001 <__data_start+0x1>
318a: 00 91 02 20 lds r16, 0x2002 ; 0x802002 <__data_start+0x2>
318e: 10 91 03 20 lds r17, 0x2003 ; 0x802003 <__data_start+0x3>
3192: e9 a2 std Y+33, r14 ; 0x21
3194: fa a2 std Y+34, r15 ; 0x22
3196: 0b a3 std Y+35, r16 ; 0x23
3198: 1c a3 std Y+36, r17 ; 0x24
319a: e0 90 9c 24 lds r14, 0x249C ; 0x80249c <q3>
319e: f0 90 9d 24 lds r15, 0x249D ; 0x80249d <q3+0x1>
31a2: 00 91 9e 24 lds r16, 0x249E ; 0x80249e <q3+0x2>
31a6: 10 91 9f 24 lds r17, 0x249F ; 0x80249f <q3+0x3>
31aa: e9 8e std Y+25, r14 ; 0x19
31ac: fa 8e std Y+26, r15 ; 0x1a
31ae: 0b 8f std Y+27, r16 ; 0x1b
31b0: 1c 8f std Y+28, r17 ; 0x1c
31b2: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
31b6: 6b 01 movw r12, r22
31b8: 7c 01 movw r14, r24
31ba: a3 01 movw r20, r6
31bc: 92 01 movw r18, r4
31be: c5 01 movw r24, r10
31c0: b4 01 movw r22, r8
31c2: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
31c6: 9b 01 movw r18, r22
31c8: ac 01 movw r20, r24
31ca: c7 01 movw r24, r14
31cc: b6 01 movw r22, r12
31ce: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
31d2: 4b 01 movw r8, r22
31d4: 5c 01 movw r10, r24
31d6: 2d 81 ldd r18, Y+5 ; 0x05
31d8: 3e 81 ldd r19, Y+6 ; 0x06
31da: 4f 81 ldd r20, Y+7 ; 0x07
31dc: 58 85 ldd r21, Y+8 ; 0x08
31de: 69 81 ldd r22, Y+1 ; 0x01
31e0: 7a 81 ldd r23, Y+2 ; 0x02
31e2: 8b 81 ldd r24, Y+3 ; 0x03
31e4: 9c 81 ldd r25, Y+4 ; 0x04
31e6: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
31ea: 9b 01 movw r18, r22
31ec: ac 01 movw r20, r24
31ee: c5 01 movw r24, r10
31f0: b4 01 movw r22, r8
31f2: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
31f6: 4b 01 movw r8, r22
31f8: 5c 01 movw r10, r24
31fa: 2d 85 ldd r18, Y+13 ; 0x0d
31fc: 3e 85 ldd r19, Y+14 ; 0x0e
31fe: 4f 85 ldd r20, Y+15 ; 0x0f
3200: 58 89 ldd r21, Y+16 ; 0x10
3202: 69 85 ldd r22, Y+9 ; 0x09
3204: 7a 85 ldd r23, Y+10 ; 0x0a
3206: 8b 85 ldd r24, Y+11 ; 0x0b
3208: 9c 85 ldd r25, Y+12 ; 0x0c
320a: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
320e: 9b 01 movw r18, r22
3210: ac 01 movw r20, r24
3212: c5 01 movw r24, r10
3214: b4 01 movw r22, r8
3216: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
321a: 2b 01 movw r4, r22
321c: 3c 01 movw r6, r24
321e: 2d 89 ldd r18, Y+21 ; 0x15
3220: 3e 89 ldd r19, Y+22 ; 0x16
3222: 4f 89 ldd r20, Y+23 ; 0x17
3224: 58 8d ldd r21, Y+24 ; 0x18
3226: 69 89 ldd r22, Y+17 ; 0x11
3228: 7a 89 ldd r23, Y+18 ; 0x12
322a: 8b 89 ldd r24, Y+19 ; 0x13
322c: 9c 89 ldd r25, Y+20 ; 0x14
322e: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3232: 4b 01 movw r8, r22
3234: 5c 01 movw r10, r24
3236: 29 8d ldd r18, Y+25 ; 0x19
3238: 3a 8d ldd r19, Y+26 ; 0x1a
323a: 4b 8d ldd r20, Y+27 ; 0x1b
323c: 5c 8d ldd r21, Y+28 ; 0x1c
323e: 69 a1 ldd r22, Y+33 ; 0x21
3240: 7a a1 ldd r23, Y+34 ; 0x22
3242: 8b a1 ldd r24, Y+35 ; 0x23
3244: 9c a1 ldd r25, Y+36 ; 0x24
3246: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
324a: 9b 01 movw r18, r22
324c: ac 01 movw r20, r24
324e: c5 01 movw r24, r10
3250: b4 01 movw r22, r8
3252: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
3256: 9b 01 movw r18, r22
3258: ac 01 movw r20, r24
325a: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
325e: a3 01 movw r20, r6
3260: 92 01 movw r18, r4
3262: 0e 94 5e 32 call 0x64bc ; 0x64bc <atan2>
3266: 0f 2e mov r0, r31
3268: f6 e7 ldi r31, 0x76 ; 118
326a: 2f 2e mov r2, r31
326c: f9 e2 ldi r31, 0x29 ; 41
326e: 3f 2e mov r3, r31
3270: f0 2d mov r31, r0
3272: f1 01 movw r30, r2
3274: 60 83 st Z, r22
3276: 71 83 std Z+1, r23 ; 0x01
3278: 82 83 std Z+2, r24 ; 0x02
327a: 93 83 std Z+3, r25 ; 0x03
327c: 60 91 a4 24 lds r22, 0x24A4 ; 0x8024a4 <q1>
3280: 70 91 a5 24 lds r23, 0x24A5 ; 0x8024a5 <q1+0x1>
3284: 80 91 a6 24 lds r24, 0x24A6 ; 0x8024a6 <q1+0x2>
3288: 90 91 a7 24 lds r25, 0x24A7 ; 0x8024a7 <q1+0x3>
328c: 20 91 9c 24 lds r18, 0x249C ; 0x80249c <q3>
3290: 30 91 9d 24 lds r19, 0x249D ; 0x80249d <q3+0x1>
3294: 40 91 9e 24 lds r20, 0x249E ; 0x80249e <q3+0x2>
3298: 50 91 9f 24 lds r21, 0x249F ; 0x80249f <q3+0x3>
329c: 80 90 00 20 lds r8, 0x2000 ; 0x802000 <__data_start>
32a0: 90 90 01 20 lds r9, 0x2001 ; 0x802001 <__data_start+0x1>
32a4: a0 90 02 20 lds r10, 0x2002 ; 0x802002 <__data_start+0x2>
32a8: b0 90 03 20 lds r11, 0x2003 ; 0x802003 <__data_start+0x3>
32ac: 40 90 a0 24 lds r4, 0x24A0 ; 0x8024a0 <q2>
32b0: 50 90 a1 24 lds r5, 0x24A1 ; 0x8024a1 <q2+0x1>
32b4: 60 90 a2 24 lds r6, 0x24A2 ; 0x8024a2 <q2+0x2>
32b8: 70 90 a3 24 lds r7, 0x24A3 ; 0x8024a3 <q2+0x3>
32bc: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
32c0: 6b 01 movw r12, r22
32c2: 7c 01 movw r14, r24
32c4: a3 01 movw r20, r6
32c6: 92 01 movw r18, r4
32c8: c5 01 movw r24, r10
32ca: b4 01 movw r22, r8
32cc: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
32d0: 9b 01 movw r18, r22
32d2: ac 01 movw r20, r24
32d4: c7 01 movw r24, r14
32d6: b6 01 movw r22, r12
32d8: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
32dc: 9b 01 movw r18, r22
32de: ac 01 movw r20, r24
32e0: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
32e4: 0e 94 38 32 call 0x6470 ; 0x6470 <asin>
32e8: dc 01 movw r26, r24
32ea: cb 01 movw r24, r22
32ec: b0 58 subi r27, 0x80 ; 128
32ee: 80 93 7a 29 sts 0x297A, r24 ; 0x80297a <rot+0x4>
32f2: 90 93 7b 29 sts 0x297B, r25 ; 0x80297b <rot+0x5>
32f6: a0 93 7c 29 sts 0x297C, r26 ; 0x80297c <rot+0x6>
32fa: b0 93 7d 29 sts 0x297D, r27 ; 0x80297d <rot+0x7>
32fe: 60 91 00 20 lds r22, 0x2000 ; 0x802000 <__data_start>
3302: 70 91 01 20 lds r23, 0x2001 ; 0x802001 <__data_start+0x1>
3306: 80 91 02 20 lds r24, 0x2002 ; 0x802002 <__data_start+0x2>
330a: 90 91 03 20 lds r25, 0x2003 ; 0x802003 <__data_start+0x3>
330e: 20 91 00 20 lds r18, 0x2000 ; 0x802000 <__data_start>
3312: 30 91 01 20 lds r19, 0x2001 ; 0x802001 <__data_start+0x1>
3316: 40 91 02 20 lds r20, 0x2002 ; 0x802002 <__data_start+0x2>
331a: 50 91 03 20 lds r21, 0x2003 ; 0x802003 <__data_start+0x3>
331e: 80 90 a4 24 lds r8, 0x24A4 ; 0x8024a4 <q1>
3322: 90 90 a5 24 lds r9, 0x24A5 ; 0x8024a5 <q1+0x1>
3326: a0 90 a6 24 lds r10, 0x24A6 ; 0x8024a6 <q1+0x2>
332a: b0 90 a7 24 lds r11, 0x24A7 ; 0x8024a7 <q1+0x3>
332e: 40 90 a4 24 lds r4, 0x24A4 ; 0x8024a4 <q1>
3332: 50 90 a5 24 lds r5, 0x24A5 ; 0x8024a5 <q1+0x1>
3336: 60 90 a6 24 lds r6, 0x24A6 ; 0x8024a6 <q1+0x2>
333a: 70 90 a7 24 lds r7, 0x24A7 ; 0x8024a7 <q1+0x3>
333e: e0 90 a0 24 lds r14, 0x24A0 ; 0x8024a0 <q2>
3342: f0 90 a1 24 lds r15, 0x24A1 ; 0x8024a1 <q2+0x1>
3346: 00 91 a2 24 lds r16, 0x24A2 ; 0x8024a2 <q2+0x2>
334a: 10 91 a3 24 lds r17, 0x24A3 ; 0x8024a3 <q2+0x3>
334e: e9 82 std Y+1, r14 ; 0x01
3350: fa 82 std Y+2, r15 ; 0x02
3352: 0b 83 std Y+3, r16 ; 0x03
3354: 1c 83 std Y+4, r17 ; 0x04
3356: e0 90 a0 24 lds r14, 0x24A0 ; 0x8024a0 <q2>
335a: f0 90 a1 24 lds r15, 0x24A1 ; 0x8024a1 <q2+0x1>
335e: 00 91 a2 24 lds r16, 0x24A2 ; 0x8024a2 <q2+0x2>
3362: 10 91 a3 24 lds r17, 0x24A3 ; 0x8024a3 <q2+0x3>
3366: ed 82 std Y+5, r14 ; 0x05
3368: fe 82 std Y+6, r15 ; 0x06
336a: 0f 83 std Y+7, r16 ; 0x07
336c: 18 87 std Y+8, r17 ; 0x08
336e: e0 90 9c 24 lds r14, 0x249C ; 0x80249c <q3>
3372: f0 90 9d 24 lds r15, 0x249D ; 0x80249d <q3+0x1>
3376: 00 91 9e 24 lds r16, 0x249E ; 0x80249e <q3+0x2>
337a: 10 91 9f 24 lds r17, 0x249F ; 0x80249f <q3+0x3>
337e: e9 86 std Y+9, r14 ; 0x09
3380: fa 86 std Y+10, r15 ; 0x0a
3382: 0b 87 std Y+11, r16 ; 0x0b
3384: 1c 87 std Y+12, r17 ; 0x0c
3386: e0 90 9c 24 lds r14, 0x249C ; 0x80249c <q3>
338a: f0 90 9d 24 lds r15, 0x249D ; 0x80249d <q3+0x1>
338e: 00 91 9e 24 lds r16, 0x249E ; 0x80249e <q3+0x2>
3392: 10 91 9f 24 lds r17, 0x249F ; 0x80249f <q3+0x3>
3396: ed 86 std Y+13, r14 ; 0x0d
3398: fe 86 std Y+14, r15 ; 0x0e
339a: 0f 87 std Y+15, r16 ; 0x0f
339c: 18 8b std Y+16, r17 ; 0x10
339e: e0 90 00 20 lds r14, 0x2000 ; 0x802000 <__data_start>
33a2: f0 90 01 20 lds r15, 0x2001 ; 0x802001 <__data_start+0x1>
33a6: 00 91 02 20 lds r16, 0x2002 ; 0x802002 <__data_start+0x2>
33aa: 10 91 03 20 lds r17, 0x2003 ; 0x802003 <__data_start+0x3>
33ae: e9 8a std Y+17, r14 ; 0x11
33b0: fa 8a std Y+18, r15 ; 0x12
33b2: 0b 8b std Y+19, r16 ; 0x13
33b4: 1c 8b std Y+20, r17 ; 0x14
33b6: e0 90 a4 24 lds r14, 0x24A4 ; 0x8024a4 <q1>
33ba: f0 90 a5 24 lds r15, 0x24A5 ; 0x8024a5 <q1+0x1>
33be: 00 91 a6 24 lds r16, 0x24A6 ; 0x8024a6 <q1+0x2>
33c2: 10 91 a7 24 lds r17, 0x24A7 ; 0x8024a7 <q1+0x3>
33c6: ed 8a std Y+21, r14 ; 0x15
33c8: fe 8a std Y+22, r15 ; 0x16
33ca: 0f 8b std Y+23, r16 ; 0x17
33cc: 18 8f std Y+24, r17 ; 0x18
33ce: e0 90 a0 24 lds r14, 0x24A0 ; 0x8024a0 <q2>
33d2: f0 90 a1 24 lds r15, 0x24A1 ; 0x8024a1 <q2+0x1>
33d6: 00 91 a2 24 lds r16, 0x24A2 ; 0x8024a2 <q2+0x2>
33da: 10 91 a3 24 lds r17, 0x24A3 ; 0x8024a3 <q2+0x3>
33de: e9 a2 std Y+33, r14 ; 0x21
33e0: fa a2 std Y+34, r15 ; 0x22
33e2: 0b a3 std Y+35, r16 ; 0x23
33e4: 1c a3 std Y+36, r17 ; 0x24
33e6: e0 90 9c 24 lds r14, 0x249C ; 0x80249c <q3>
33ea: f0 90 9d 24 lds r15, 0x249D ; 0x80249d <q3+0x1>
33ee: 00 91 9e 24 lds r16, 0x249E ; 0x80249e <q3+0x2>
33f2: 10 91 9f 24 lds r17, 0x249F ; 0x80249f <q3+0x3>
33f6: e9 8e std Y+25, r14 ; 0x19
33f8: fa 8e std Y+26, r15 ; 0x1a
33fa: 0b 8f std Y+27, r16 ; 0x1b
33fc: 1c 8f std Y+28, r17 ; 0x1c
33fe: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3402: 6b 01 movw r12, r22
3404: 7c 01 movw r14, r24
3406: a3 01 movw r20, r6
3408: 92 01 movw r18, r4
340a: c5 01 movw r24, r10
340c: b4 01 movw r22, r8
340e: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3412: 9b 01 movw r18, r22
3414: ac 01 movw r20, r24
3416: c7 01 movw r24, r14
3418: b6 01 movw r22, r12
341a: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
341e: 4b 01 movw r8, r22
3420: 5c 01 movw r10, r24
3422: 2d 81 ldd r18, Y+5 ; 0x05
3424: 3e 81 ldd r19, Y+6 ; 0x06
3426: 4f 81 ldd r20, Y+7 ; 0x07
3428: 58 85 ldd r21, Y+8 ; 0x08
342a: 69 81 ldd r22, Y+1 ; 0x01
342c: 7a 81 ldd r23, Y+2 ; 0x02
342e: 8b 81 ldd r24, Y+3 ; 0x03
3430: 9c 81 ldd r25, Y+4 ; 0x04
3432: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3436: 9b 01 movw r18, r22
3438: ac 01 movw r20, r24
343a: c5 01 movw r24, r10
343c: b4 01 movw r22, r8
343e: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
3442: 4b 01 movw r8, r22
3444: 5c 01 movw r10, r24
3446: 2d 85 ldd r18, Y+13 ; 0x0d
3448: 3e 85 ldd r19, Y+14 ; 0x0e
344a: 4f 85 ldd r20, Y+15 ; 0x0f
344c: 58 89 ldd r21, Y+16 ; 0x10
344e: 69 85 ldd r22, Y+9 ; 0x09
3450: 7a 85 ldd r23, Y+10 ; 0x0a
3452: 8b 85 ldd r24, Y+11 ; 0x0b
3454: 9c 85 ldd r25, Y+12 ; 0x0c
3456: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
345a: 9b 01 movw r18, r22
345c: ac 01 movw r20, r24
345e: c5 01 movw r24, r10
3460: b4 01 movw r22, r8
3462: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
3466: 2b 01 movw r4, r22
3468: 3c 01 movw r6, r24
346a: 2d 89 ldd r18, Y+21 ; 0x15
346c: 3e 89 ldd r19, Y+22 ; 0x16
346e: 4f 89 ldd r20, Y+23 ; 0x17
3470: 58 8d ldd r21, Y+24 ; 0x18
3472: 69 89 ldd r22, Y+17 ; 0x11
3474: 7a 89 ldd r23, Y+18 ; 0x12
3476: 8b 89 ldd r24, Y+19 ; 0x13
3478: 9c 89 ldd r25, Y+20 ; 0x14
347a: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
347e: 4b 01 movw r8, r22
3480: 5c 01 movw r10, r24
3482: 29 8d ldd r18, Y+25 ; 0x19
3484: 3a 8d ldd r19, Y+26 ; 0x1a
3486: 4b 8d ldd r20, Y+27 ; 0x1b
3488: 5c 8d ldd r21, Y+28 ; 0x1c
348a: 69 a1 ldd r22, Y+33 ; 0x21
348c: 7a a1 ldd r23, Y+34 ; 0x22
348e: 8b a1 ldd r24, Y+35 ; 0x23
3490: 9c a1 ldd r25, Y+36 ; 0x24
3492: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3496: 9b 01 movw r18, r22
3498: ac 01 movw r20, r24
349a: c5 01 movw r24, r10
349c: b4 01 movw r22, r8
349e: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
34a2: 9b 01 movw r18, r22
34a4: ac 01 movw r20, r24
34a6: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
34aa: a3 01 movw r20, r6
34ac: 92 01 movw r18, r4
34ae: 0e 94 5e 32 call 0x64bc ; 0x64bc <atan2>
34b2: 60 93 7e 29 sts 0x297E, r22 ; 0x80297e <rot+0x8>
34b6: 70 93 7f 29 sts 0x297F, r23 ; 0x80297f <rot+0x9>
34ba: 80 93 80 29 sts 0x2980, r24 ; 0x802980 <rot+0xa>
34be: 90 93 81 29 sts 0x2981, r25 ; 0x802981 <rot+0xb>
34c2: 60 91 7a 29 lds r22, 0x297A ; 0x80297a <rot+0x4>
34c6: 70 91 7b 29 lds r23, 0x297B ; 0x80297b <rot+0x5>
34ca: 80 91 7c 29 lds r24, 0x297C ; 0x80297c <rot+0x6>
34ce: 90 91 7d 29 lds r25, 0x297D ; 0x80297d <rot+0x7>
34d2: 2d ee ldi r18, 0xED ; 237
34d4: 3e e2 ldi r19, 0x2E ; 46
34d6: 45 e6 ldi r20, 0x65 ; 101
34d8: 52 e4 ldi r21, 0x42 ; 66
34da: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
34de: 60 93 7a 29 sts 0x297A, r22 ; 0x80297a <rot+0x4>
34e2: 70 93 7b 29 sts 0x297B, r23 ; 0x80297b <rot+0x5>
34e6: 80 93 7c 29 sts 0x297C, r24 ; 0x80297c <rot+0x6>
34ea: 90 93 7d 29 sts 0x297D, r25 ; 0x80297d <rot+0x7>
34ee: f1 01 movw r30, r2
34f0: 60 81 ld r22, Z
34f2: 71 81 ldd r23, Z+1 ; 0x01
34f4: 82 81 ldd r24, Z+2 ; 0x02
34f6: 93 81 ldd r25, Z+3 ; 0x03
34f8: 2d ee ldi r18, 0xED ; 237
34fa: 3e e2 ldi r19, 0x2E ; 46
34fc: 45 e6 ldi r20, 0x65 ; 101
34fe: 52 e4 ldi r21, 0x42 ; 66
3500: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3504: f1 01 movw r30, r2
3506: 60 83 st Z, r22
3508: 71 83 std Z+1, r23 ; 0x01
350a: 82 83 std Z+2, r24 ; 0x02
350c: 93 83 std Z+3, r25 ; 0x03
350e: 60 91 7e 29 lds r22, 0x297E ; 0x80297e <rot+0x8>
3512: 70 91 7f 29 lds r23, 0x297F ; 0x80297f <rot+0x9>
3516: 80 91 80 29 lds r24, 0x2980 ; 0x802980 <rot+0xa>
351a: 90 91 81 29 lds r25, 0x2981 ; 0x802981 <rot+0xb>
351e: 2d ee ldi r18, 0xED ; 237
3520: 3e e2 ldi r19, 0x2E ; 46
3522: 45 e6 ldi r20, 0x65 ; 101
3524: 52 e4 ldi r21, 0x42 ; 66
3526: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
352a: 60 93 7e 29 sts 0x297E, r22 ; 0x80297e <rot+0x8>
352e: 70 93 7f 29 sts 0x297F, r23 ; 0x80297f <rot+0x9>
3532: 80 93 80 29 sts 0x2980, r24 ; 0x802980 <rot+0xa>
3536: 90 93 81 29 sts 0x2981, r25 ; 0x802981 <rot+0xb>
353a: f1 01 movw r30, r2
353c: 40 81 ld r20, Z
353e: 51 81 ldd r21, Z+1 ; 0x01
3540: 62 81 ldd r22, Z+2 ; 0x02
3542: 73 81 ldd r23, Z+3 ; 0x03
3544: 8d eb ldi r24, 0xBD ; 189
3546: 93 e2 ldi r25, 0x23 ; 35
3548: 0e 94 a3 2d call 0x5b46 ; 0x5b46 <cb_append_double>
354c: 40 91 7a 29 lds r20, 0x297A ; 0x80297a <rot+0x4>
3550: 50 91 7b 29 lds r21, 0x297B ; 0x80297b <rot+0x5>
3554: 60 91 7c 29 lds r22, 0x297C ; 0x80297c <rot+0x6>
3558: 70 91 7d 29 lds r23, 0x297D ; 0x80297d <rot+0x7>
355c: 80 e9 ldi r24, 0x90 ; 144
355e: 93 e2 ldi r25, 0x23 ; 35
3560: 0e 94 a3 2d call 0x5b46 ; 0x5b46 <cb_append_double>
3564: 40 91 7e 29 lds r20, 0x297E ; 0x80297e <rot+0x8>
3568: 50 91 7f 29 lds r21, 0x297F ; 0x80297f <rot+0x9>
356c: 60 91 80 29 lds r22, 0x2980 ; 0x802980 <rot+0xa>
3570: 70 91 81 29 lds r23, 0x2981 ; 0x802981 <rot+0xb>
3574: 83 e6 ldi r24, 0x63 ; 99
3576: 93 e2 ldi r25, 0x23 ; 35
3578: 0e 94 a3 2d call 0x5b46 ; 0x5b46 <cb_append_double>
357c: cd bf out 0x3d, r28 ; 61
357e: de bf out 0x3e, r29 ; 62
3580: a4 96 adiw r28, 0x24 ; 36
3582: cd bf out 0x3d, r28 ; 61
3584: de bf out 0x3e, r29 ; 62
3586: df 91 pop r29
3588: cf 91 pop r28
358a: 1f 91 pop r17
358c: 0f 91 pop r16
358e: ff 90 pop r15
3590: ef 90 pop r14
3592: df 90 pop r13
3594: cf 90 pop r12
3596: bf 90 pop r11
3598: af 90 pop r10
359a: 9f 90 pop r9
359c: 8f 90 pop r8
359e: 7f 90 pop r7
35a0: 6f 90 pop r6
35a2: 5f 90 pop r5
35a4: 4f 90 pop r4
35a6: 3f 90 pop r3
35a8: 2f 90 pop r2
35aa: 08 95 ret
000035ac <mpu_read>:
35ac: cf 92 push r12
35ae: df 92 push r13
35b0: ef 92 push r14
35b2: ff 92 push r15
35b4: 0f 93 push r16
35b6: 1f 93 push r17
35b8: cf 93 push r28
35ba: df 93 push r29
35bc: 29 e4 ldi r18, 0x49 ; 73
35be: 34 e2 ldi r19, 0x24 ; 36
35c0: 4f e0 ldi r20, 0x0F ; 15
35c2: 6a e3 ldi r22, 0x3A ; 58
35c4: 89 e6 ldi r24, 0x69 ; 105
35c6: 0e 94 7a 2f call 0x5ef4 ; 0x5ef4 <twi_read>
35ca: 80 91 49 24 lds r24, 0x2449 ; 0x802449 <mpu_buffer>
35ce: 80 ff sbrs r24, 0
35d0: 32 c1 rjmp .+612 ; 0x3836 <mpu_read+0x28a>
35d2: e9 e4 ldi r30, 0x49 ; 73
35d4: f4 e2 ldi r31, 0x24 ; 36
35d6: 81 81 ldd r24, Z+1 ; 0x01
35d8: 90 e0 ldi r25, 0x00 ; 0
35da: 98 2f mov r25, r24
35dc: 88 27 eor r24, r24
35de: 22 81 ldd r18, Z+2 ; 0x02
35e0: 82 2b or r24, r18
35e2: 0e e8 ldi r16, 0x8E ; 142
35e4: 19 e2 ldi r17, 0x29 ; 41
35e6: d8 01 movw r26, r16
35e8: 8d 93 st X+, r24
35ea: 9c 93 st X, r25
35ec: 11 97 sbiw r26, 0x01 ; 1
35ee: 83 81 ldd r24, Z+3 ; 0x03
35f0: 90 e0 ldi r25, 0x00 ; 0
35f2: 98 2f mov r25, r24
35f4: 88 27 eor r24, r24
35f6: 24 81 ldd r18, Z+4 ; 0x04
35f8: 82 2b or r24, r18
35fa: 12 96 adiw r26, 0x02 ; 2
35fc: 8d 93 st X+, r24
35fe: 9c 93 st X, r25
3600: 13 97 sbiw r26, 0x03 ; 3
3602: 85 81 ldd r24, Z+5 ; 0x05
3604: 90 e0 ldi r25, 0x00 ; 0
3606: 98 2f mov r25, r24
3608: 88 27 eor r24, r24
360a: 26 81 ldd r18, Z+6 ; 0x06
360c: 82 2b or r24, r18
360e: 14 96 adiw r26, 0x04 ; 4
3610: 8d 93 st X+, r24
3612: 9c 93 st X, r25
3614: 15 97 sbiw r26, 0x05 ; 5
3616: 81 85 ldd r24, Z+9 ; 0x09
3618: 90 e0 ldi r25, 0x00 ; 0
361a: 98 2f mov r25, r24
361c: 88 27 eor r24, r24
361e: 22 85 ldd r18, Z+10 ; 0x0a
3620: 82 2b or r24, r18
3622: 16 96 adiw r26, 0x06 ; 6
3624: 8d 93 st X+, r24
3626: 9c 93 st X, r25
3628: 17 97 sbiw r26, 0x07 ; 7
362a: 83 85 ldd r24, Z+11 ; 0x0b
362c: 90 e0 ldi r25, 0x00 ; 0
362e: 98 2f mov r25, r24
3630: 88 27 eor r24, r24
3632: 24 85 ldd r18, Z+12 ; 0x0c
3634: 82 2b or r24, r18
3636: 18 96 adiw r26, 0x08 ; 8
3638: 8d 93 st X+, r24
363a: 9c 93 st X, r25
363c: 19 97 sbiw r26, 0x09 ; 9
363e: 85 85 ldd r24, Z+13 ; 0x0d
3640: 90 e0 ldi r25, 0x00 ; 0
3642: 98 2f mov r25, r24
3644: 88 27 eor r24, r24
3646: 26 85 ldd r18, Z+14 ; 0x0e
3648: 82 2b or r24, r18
364a: 1a 96 adiw r26, 0x0a ; 10
364c: 8d 93 st X+, r24
364e: 9c 93 st X, r25
3650: 1b 97 sbiw r26, 0x0b ; 11
3652: 6d 91 ld r22, X+
3654: 7c 91 ld r23, X
3656: c0 90 8a 29 lds r12, 0x298A ; 0x80298a <accel_resolution>
365a: d0 90 8b 29 lds r13, 0x298B ; 0x80298b <accel_resolution+0x1>
365e: e0 90 8c 29 lds r14, 0x298C ; 0x80298c <accel_resolution+0x2>
3662: f0 90 8d 29 lds r15, 0x298D ; 0x80298d <accel_resolution+0x3>
3666: 07 2e mov r0, r23
3668: 00 0c add r0, r0
366a: 88 0b sbc r24, r24
366c: 99 0b sbc r25, r25
366e: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf>
3672: a7 01 movw r20, r14
3674: 96 01 movw r18, r12
3676: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
367a: c2 e5 ldi r28, 0x52 ; 82
367c: d9 e2 ldi r29, 0x29 ; 41
367e: 68 83 st Y, r22
3680: 79 83 std Y+1, r23 ; 0x01
3682: 8a 83 std Y+2, r24 ; 0x02
3684: 9b 83 std Y+3, r25 ; 0x03
3686: f8 01 movw r30, r16
3688: 62 81 ldd r22, Z+2 ; 0x02
368a: 73 81 ldd r23, Z+3 ; 0x03
368c: c0 90 8a 29 lds r12, 0x298A ; 0x80298a <accel_resolution>
3690: d0 90 8b 29 lds r13, 0x298B ; 0x80298b <accel_resolution+0x1>
3694: e0 90 8c 29 lds r14, 0x298C ; 0x80298c <accel_resolution+0x2>
3698: f0 90 8d 29 lds r15, 0x298D ; 0x80298d <accel_resolution+0x3>
369c: 07 2e mov r0, r23
369e: 00 0c add r0, r0
36a0: 88 0b sbc r24, r24
36a2: 99 0b sbc r25, r25
36a4: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf>
36a8: a7 01 movw r20, r14
36aa: 96 01 movw r18, r12
36ac: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
36b0: 6c 83 std Y+4, r22 ; 0x04
36b2: 7d 83 std Y+5, r23 ; 0x05
36b4: 8e 83 std Y+6, r24 ; 0x06
36b6: 9f 83 std Y+7, r25 ; 0x07
36b8: d8 01 movw r26, r16
36ba: 14 96 adiw r26, 0x04 ; 4
36bc: 6d 91 ld r22, X+
36be: 7c 91 ld r23, X
36c0: 15 97 sbiw r26, 0x05 ; 5
36c2: c0 90 8a 29 lds r12, 0x298A ; 0x80298a <accel_resolution>
36c6: d0 90 8b 29 lds r13, 0x298B ; 0x80298b <accel_resolution+0x1>
36ca: e0 90 8c 29 lds r14, 0x298C ; 0x80298c <accel_resolution+0x2>
36ce: f0 90 8d 29 lds r15, 0x298D ; 0x80298d <accel_resolution+0x3>
36d2: 07 2e mov r0, r23
36d4: 00 0c add r0, r0
36d6: 88 0b sbc r24, r24
36d8: 99 0b sbc r25, r25
36da: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf>
36de: a7 01 movw r20, r14
36e0: 96 01 movw r18, r12
36e2: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
36e6: 68 87 std Y+8, r22 ; 0x08
36e8: 79 87 std Y+9, r23 ; 0x09
36ea: 8a 87 std Y+10, r24 ; 0x0a
36ec: 9b 87 std Y+11, r25 ; 0x0b
36ee: f8 01 movw r30, r16
36f0: 66 81 ldd r22, Z+6 ; 0x06
36f2: 77 81 ldd r23, Z+7 ; 0x07
36f4: c0 90 86 29 lds r12, 0x2986 ; 0x802986 <gyro_resolution>
36f8: d0 90 87 29 lds r13, 0x2987 ; 0x802987 <gyro_resolution+0x1>
36fc: e0 90 88 29 lds r14, 0x2988 ; 0x802988 <gyro_resolution+0x2>
3700: f0 90 89 29 lds r15, 0x2989 ; 0x802989 <gyro_resolution+0x3>
3704: 07 2e mov r0, r23
3706: 00 0c add r0, r0
3708: 88 0b sbc r24, r24
370a: 99 0b sbc r25, r25
370c: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf>
3710: a7 01 movw r20, r14
3712: 96 01 movw r18, r12
3714: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3718: 6c 87 std Y+12, r22 ; 0x0c
371a: 7d 87 std Y+13, r23 ; 0x0d
371c: 8e 87 std Y+14, r24 ; 0x0e
371e: 9f 87 std Y+15, r25 ; 0x0f
3720: d8 01 movw r26, r16
3722: 18 96 adiw r26, 0x08 ; 8
3724: 6d 91 ld r22, X+
3726: 7c 91 ld r23, X
3728: 19 97 sbiw r26, 0x09 ; 9
372a: c0 90 86 29 lds r12, 0x2986 ; 0x802986 <gyro_resolution>
372e: d0 90 87 29 lds r13, 0x2987 ; 0x802987 <gyro_resolution+0x1>
3732: e0 90 88 29 lds r14, 0x2988 ; 0x802988 <gyro_resolution+0x2>
3736: f0 90 89 29 lds r15, 0x2989 ; 0x802989 <gyro_resolution+0x3>
373a: 07 2e mov r0, r23
373c: 00 0c add r0, r0
373e: 88 0b sbc r24, r24
3740: 99 0b sbc r25, r25
3742: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf>
3746: a7 01 movw r20, r14
3748: 96 01 movw r18, r12
374a: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
374e: 68 8b std Y+16, r22 ; 0x10
3750: 79 8b std Y+17, r23 ; 0x11
3752: 8a 8b std Y+18, r24 ; 0x12
3754: 9b 8b std Y+19, r25 ; 0x13
3756: f8 01 movw r30, r16
3758: 62 85 ldd r22, Z+10 ; 0x0a
375a: 73 85 ldd r23, Z+11 ; 0x0b
375c: c0 90 86 29 lds r12, 0x2986 ; 0x802986 <gyro_resolution>
3760: d0 90 87 29 lds r13, 0x2987 ; 0x802987 <gyro_resolution+0x1>
3764: e0 90 88 29 lds r14, 0x2988 ; 0x802988 <gyro_resolution+0x2>
3768: f0 90 89 29 lds r15, 0x2989 ; 0x802989 <gyro_resolution+0x3>
376c: 07 2e mov r0, r23
376e: 00 0c add r0, r0
3770: 88 0b sbc r24, r24
3772: 99 0b sbc r25, r25
3774: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf>
3778: a7 01 movw r20, r14
377a: 96 01 movw r18, r12
377c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3780: 6c 8b std Y+20, r22 ; 0x14
3782: 7d 8b std Y+21, r23 ; 0x15
3784: 8e 8b std Y+22, r24 ; 0x16
3786: 9f 8b std Y+23, r25 ; 0x17
3788: 18 8e std Y+24, r1 ; 0x18
378a: 19 8e std Y+25, r1 ; 0x19
378c: 1a 8e std Y+26, r1 ; 0x1a
378e: 1b 8e std Y+27, r1 ; 0x1b
3790: 1c 8e std Y+28, r1 ; 0x1c
3792: 1d 8e std Y+29, r1 ; 0x1d
3794: 1e 8e std Y+30, r1 ; 0x1e
3796: 1f 8e std Y+31, r1 ; 0x1f
3798: 18 a2 std Y+32, r1 ; 0x20
379a: 19 a2 std Y+33, r1 ; 0x21
379c: 1a a2 std Y+34, r1 ; 0x22
379e: 1b a2 std Y+35, r1 ; 0x23
37a0: 08 85 ldd r16, Y+8 ; 0x08
37a2: 19 85 ldd r17, Y+9 ; 0x09
37a4: 2a 85 ldd r18, Y+10 ; 0x0a
37a6: 3b 85 ldd r19, Y+11 ; 0x0b
37a8: 4c 81 ldd r20, Y+4 ; 0x04
37aa: 5d 81 ldd r21, Y+5 ; 0x05
37ac: 6e 81 ldd r22, Y+6 ; 0x06
37ae: 7f 81 ldd r23, Y+7 ; 0x07
37b0: 88 81 ld r24, Y
37b2: 99 81 ldd r25, Y+1 ; 0x01
37b4: aa 81 ldd r26, Y+2 ; 0x02
37b6: bb 81 ldd r27, Y+3 ; 0x03
37b8: 3f 93 push r19
37ba: 2f 93 push r18
37bc: 1f 93 push r17
37be: 0f 93 push r16
37c0: 7f 93 push r23
37c2: 6f 93 push r22
37c4: 5f 93 push r21
37c6: 4f 93 push r20
37c8: bf 93 push r27
37ca: af 93 push r26
37cc: 9f 93 push r25
37ce: 8f 93 push r24
37d0: 8a eb ldi r24, 0xBA ; 186
37d2: 90 e2 ldi r25, 0x20 ; 32
37d4: 9f 93 push r25
37d6: 8f 93 push r24
37d8: 88 e0 ldi r24, 0x08 ; 8
37da: 8f 93 push r24
37dc: 80 ea ldi r24, 0xA0 ; 160
37de: 8f 93 push r24
37e0: e0 91 3d 25 lds r30, 0x253D ; 0x80253d <swprintf>
37e4: f0 91 3e 25 lds r31, 0x253E ; 0x80253e <swprintf+0x1>
37e8: 19 95 eicall
37ea: 48 81 ld r20, Y
37ec: 59 81 ldd r21, Y+1 ; 0x01
37ee: 6a 81 ldd r22, Y+2 ; 0x02
37f0: 7b 81 ldd r23, Y+3 ; 0x03
37f2: 84 e4 ldi r24, 0x44 ; 68
37f4: 94 e2 ldi r25, 0x24 ; 36
37f6: 0e 94 ce 2c call 0x599c ; 0x599c <cb_append_float>
37fa: 4c 81 ldd r20, Y+4 ; 0x04
37fc: 5d 81 ldd r21, Y+5 ; 0x05
37fe: 6e 81 ldd r22, Y+6 ; 0x06
3800: 7f 81 ldd r23, Y+7 ; 0x07
3802: 87 e1 ldi r24, 0x17 ; 23
3804: 94 e2 ldi r25, 0x24 ; 36
3806: 0e 94 ce 2c call 0x599c ; 0x599c <cb_append_float>
380a: 48 85 ldd r20, Y+8 ; 0x08
380c: 59 85 ldd r21, Y+9 ; 0x09
380e: 6a 85 ldd r22, Y+10 ; 0x0a
3810: 7b 85 ldd r23, Y+11 ; 0x0b
3812: 8a ee ldi r24, 0xEA ; 234
3814: 93 e2 ldi r25, 0x23 ; 35
3816: 0e 94 ce 2c call 0x599c ; 0x599c <cb_append_float>
381a: ce 01 movw r24, r28
381c: f5 db rcall .-2070 ; 0x3008 <mpu_filter_data>
381e: 29 e4 ldi r18, 0x49 ; 73
3820: 34 e2 ldi r19, 0x24 ; 36
3822: 41 e0 ldi r20, 0x01 ; 1
3824: 6a e3 ldi r22, 0x3A ; 58
3826: 89 e6 ldi r24, 0x69 ; 105
3828: 0e 94 7a 2f call 0x5ef4 ; 0x5ef4 <twi_read>
382c: 8d b7 in r24, 0x3d ; 61
382e: 9e b7 in r25, 0x3e ; 62
3830: 40 96 adiw r24, 0x10 ; 16
3832: 8d bf out 0x3d, r24 ; 61
3834: 9e bf out 0x3e, r25 ; 62
3836: df 91 pop r29
3838: cf 91 pop r28
383a: 1f 91 pop r17
383c: 0f 91 pop r16
383e: ff 90 pop r15
3840: ef 90 pop r14
3842: df 90 pop r13
3844: cf 90 pop r12
3846: 08 95 ret
00003848 <mpu_wai>:
3848: 29 e4 ldi r18, 0x49 ; 73
384a: 34 e2 ldi r19, 0x24 ; 36
384c: 41 e0 ldi r20, 0x01 ; 1
384e: 65 e7 ldi r22, 0x75 ; 117
3850: 89 e6 ldi r24, 0x69 ; 105
3852: 0e 94 7a 2f call 0x5ef4 ; 0x5ef4 <twi_read>
3856: 80 91 49 24 lds r24, 0x2449 ; 0x802449 <mpu_buffer>
385a: 81 37 cpi r24, 0x71 ; 113
385c: 89 f4 brne .+34 ; 0x3880 <mpu_wai+0x38>
385e: 80 ed ldi r24, 0xD0 ; 208
3860: 90 e2 ldi r25, 0x20 ; 32
3862: 9f 93 push r25
3864: 8f 93 push r24
3866: 88 e0 ldi r24, 0x08 ; 8
3868: 8f 93 push r24
386a: 80 ea ldi r24, 0xA0 ; 160
386c: 8f 93 push r24
386e: e0 91 3d 25 lds r30, 0x253D ; 0x80253d <swprintf>
3872: f0 91 3e 25 lds r31, 0x253E ; 0x80253e <swprintf+0x1>
3876: 19 95 eicall
3878: 0f 90 pop r0
387a: 0f 90 pop r0
387c: 0f 90 pop r0
387e: 0f 90 pop r0
3880: 08 95 ret
00003882 <set_accel_resolution>:
3882: 81 30 cpi r24, 0x01 ; 1
3884: 99 f0 breq .+38 ; 0x38ac <set_accel_resolution+0x2a>
3886: 28 f0 brcs .+10 ; 0x3892 <set_accel_resolution+0x10>
3888: 82 30 cpi r24, 0x02 ; 2
388a: e9 f0 breq .+58 ; 0x38c6 <set_accel_resolution+0x44>
388c: 83 30 cpi r24, 0x03 ; 3
388e: 41 f1 breq .+80 ; 0x38e0 <set_accel_resolution+0x5e>
3890: 33 c0 rjmp .+102 ; 0x38f8 <set_accel_resolution+0x76>
3892: 80 e0 ldi r24, 0x00 ; 0
3894: 90 e0 ldi r25, 0x00 ; 0
3896: a0 e8 ldi r26, 0x80 ; 128
3898: b8 e3 ldi r27, 0x38 ; 56
389a: 80 93 8a 29 sts 0x298A, r24 ; 0x80298a <accel_resolution>
389e: 90 93 8b 29 sts 0x298B, r25 ; 0x80298b <accel_resolution+0x1>
38a2: a0 93 8c 29 sts 0x298C, r26 ; 0x80298c <accel_resolution+0x2>
38a6: b0 93 8d 29 sts 0x298D, r27 ; 0x80298d <accel_resolution+0x3>
38aa: 26 c0 rjmp .+76 ; 0x38f8 <set_accel_resolution+0x76>
38ac: 80 e0 ldi r24, 0x00 ; 0
38ae: 90 e0 ldi r25, 0x00 ; 0
38b0: a0 e0 ldi r26, 0x00 ; 0
38b2: b9 e3 ldi r27, 0x39 ; 57
38b4: 80 93 8a 29 sts 0x298A, r24 ; 0x80298a <accel_resolution>
38b8: 90 93 8b 29 sts 0x298B, r25 ; 0x80298b <accel_resolution+0x1>
38bc: a0 93 8c 29 sts 0x298C, r26 ; 0x80298c <accel_resolution+0x2>
38c0: b0 93 8d 29 sts 0x298D, r27 ; 0x80298d <accel_resolution+0x3>
38c4: 19 c0 rjmp .+50 ; 0x38f8 <set_accel_resolution+0x76>
38c6: 80 e0 ldi r24, 0x00 ; 0
38c8: 90 e0 ldi r25, 0x00 ; 0
38ca: a0 e8 ldi r26, 0x80 ; 128
38cc: b9 e3 ldi r27, 0x39 ; 57
38ce: 80 93 8a 29 sts 0x298A, r24 ; 0x80298a <accel_resolution>
38d2: 90 93 8b 29 sts 0x298B, r25 ; 0x80298b <accel_resolution+0x1>
38d6: a0 93 8c 29 sts 0x298C, r26 ; 0x80298c <accel_resolution+0x2>
38da: b0 93 8d 29 sts 0x298D, r27 ; 0x80298d <accel_resolution+0x3>
38de: 0c c0 rjmp .+24 ; 0x38f8 <set_accel_resolution+0x76>
38e0: 80 e0 ldi r24, 0x00 ; 0
38e2: 90 e0 ldi r25, 0x00 ; 0
38e4: a0 e0 ldi r26, 0x00 ; 0
38e6: ba e3 ldi r27, 0x3A ; 58
38e8: 80 93 8a 29 sts 0x298A, r24 ; 0x80298a <accel_resolution>
38ec: 90 93 8b 29 sts 0x298B, r25 ; 0x80298b <accel_resolution+0x1>
38f0: a0 93 8c 29 sts 0x298C, r26 ; 0x80298c <accel_resolution+0x2>
38f4: b0 93 8d 29 sts 0x298D, r27 ; 0x80298d <accel_resolution+0x3>
38f8: 48 e1 ldi r20, 0x18 ; 24
38fa: 6c e1 ldi r22, 0x1C ; 28
38fc: 89 e6 ldi r24, 0x69 ; 105
38fe: 0c 94 69 2f jmp 0x5ed2 ; 0x5ed2 <twi_write>
3902: 08 95 ret
00003904 <set_gyro_resolution>:
}
}
void set_gyro_resolution(gyroScale scale)
{
switch(scale)
3904: 81 30 cpi r24, 0x01 ; 1
3906: 99 f0 breq .+38 ; 0x392e <set_gyro_resolution+0x2a>
3908: 28 f0 brcs .+10 ; 0x3914 <set_gyro_resolution+0x10>
390a: 82 30 cpi r24, 0x02 ; 2
390c: e9 f0 breq .+58 ; 0x3948 <set_gyro_resolution+0x44>
390e: 83 30 cpi r24, 0x03 ; 3
3910: 41 f1 breq .+80 ; 0x3962 <set_gyro_resolution+0x5e>
3912: 33 c0 rjmp .+102 ; 0x397a <set_gyro_resolution+0x76>
{
case GYRO_250DPS:
gyro_resolution = (float)(250.0/32760.0);
3914: 81 ea ldi r24, 0xA1 ; 161
3916: 9f e0 ldi r25, 0x0F ; 15
3918: aa ef ldi r26, 0xFA ; 250
391a: bb e3 ldi r27, 0x3B ; 59
391c: 80 93 86 29 sts 0x2986, r24 ; 0x802986 <gyro_resolution>
3920: 90 93 87 29 sts 0x2987, r25 ; 0x802987 <gyro_resolution+0x1>
3924: a0 93 88 29 sts 0x2988, r26 ; 0x802988 <gyro_resolution+0x2>
3928: b0 93 89 29 sts 0x2989, r27 ; 0x802989 <gyro_resolution+0x3>
break;
392c: 26 c0 rjmp .+76 ; 0x397a <set_gyro_resolution+0x76>
case GYRO_500DPS:
gyro_resolution = (float)(500.0/32760.0);
392e: 81 ea ldi r24, 0xA1 ; 161
3930: 9f e0 ldi r25, 0x0F ; 15
3932: aa e7 ldi r26, 0x7A ; 122
3934: bc e3 ldi r27, 0x3C ; 60
3936: 80 93 86 29 sts 0x2986, r24 ; 0x802986 <gyro_resolution>
393a: 90 93 87 29 sts 0x2987, r25 ; 0x802987 <gyro_resolution+0x1>
393e: a0 93 88 29 sts 0x2988, r26 ; 0x802988 <gyro_resolution+0x2>
3942: b0 93 89 29 sts 0x2989, r27 ; 0x802989 <gyro_resolution+0x3>
break;
3946: 19 c0 rjmp .+50 ; 0x397a <set_gyro_resolution+0x76>
case GYRO_1000DPS:
gyro_resolution = (float)(1000.0/32760.0);
3948: 81 ea ldi r24, 0xA1 ; 161
394a: 9f e0 ldi r25, 0x0F ; 15
394c: aa ef ldi r26, 0xFA ; 250
394e: bc e3 ldi r27, 0x3C ; 60
3950: 80 93 86 29 sts 0x2986, r24 ; 0x802986 <gyro_resolution>
3954: 90 93 87 29 sts 0x2987, r25 ; 0x802987 <gyro_resolution+0x1>
3958: a0 93 88 29 sts 0x2988, r26 ; 0x802988 <gyro_resolution+0x2>
395c: b0 93 89 29 sts 0x2989, r27 ; 0x802989 <gyro_resolution+0x3>
break;
3960: 0c c0 rjmp .+24 ; 0x397a <set_gyro_resolution+0x76>
case GYRO_2000DPS:
gyro_resolution = (float)(2000.0/32768.0);
3962: 80 e0 ldi r24, 0x00 ; 0
3964: 90 e0 ldi r25, 0x00 ; 0
3966: aa e7 ldi r26, 0x7A ; 122
3968: bd e3 ldi r27, 0x3D ; 61
396a: 80 93 86 29 sts 0x2986, r24 ; 0x802986 <gyro_resolution>
396e: 90 93 87 29 sts 0x2987, r25 ; 0x802987 <gyro_resolution+0x1>
3972: a0 93 88 29 sts 0x2988, r26 ; 0x802988 <gyro_resolution+0x2>
3976: b0 93 89 29 sts 0x2989, r27 ; 0x802989 <gyro_resolution+0x3>
break;
default:
break;
}
twi_write(MPU_ADDR, GYRO_CONFIG, (MPU_GYRO_SCALE << 3));
397a: 48 e1 ldi r20, 0x18 ; 24
397c: 6b e1 ldi r22, 0x1B ; 27
397e: 89 e6 ldi r24, 0x69 ; 105
3980: 0c 94 69 2f jmp 0x5ed2 ; 0x5ed2 <twi_write>
3984: 08 95 ret
00003986 <mpu_init>:
void mpu_init(void)
{
b_mag_calibrate = false;
init_circ_buffer_double(&cb_yaw, yaw_buff, 10);
3986: 4a e0 ldi r20, 0x0A ; 10
3988: 65 e9 ldi r22, 0x95 ; 149
398a: 73 e2 ldi r23, 0x23 ; 35
398c: 8d eb ldi r24, 0xBD ; 189
398e: 93 e2 ldi r25, 0x23 ; 35
3990: 0e 94 72 2e call 0x5ce4 ; 0x5ce4 <init_circ_buffer_double>
init_circ_buffer_double(&cb_pitch, pitch_buff, 10);
3994: 4a e0 ldi r20, 0x0A ; 10
3996: 68 e6 ldi r22, 0x68 ; 104
3998: 73 e2 ldi r23, 0x23 ; 35
399a: 80 e9 ldi r24, 0x90 ; 144
399c: 93 e2 ldi r25, 0x23 ; 35
399e: 0e 94 72 2e call 0x5ce4 ; 0x5ce4 <init_circ_buffer_double>
init_circ_buffer_double(&cb_roll, roll_buff, 10);
39a2: 4a e0 ldi r20, 0x0A ; 10
39a4: 6b e3 ldi r22, 0x3B ; 59
39a6: 73 e2 ldi r23, 0x23 ; 35
39a8: 83 e6 ldi r24, 0x63 ; 99
39aa: 93 e2 ldi r25, 0x23 ; 35
39ac: 0e 94 72 2e call 0x5ce4 ; 0x5ce4 <init_circ_buffer_double>
init_circ_buffer_float(&cb_accel_x, accel_buff_x, 10);
39b0: 4a e0 ldi r20, 0x0A ; 10
39b2: 6c e1 ldi r22, 0x1C ; 28
39b4: 74 e2 ldi r23, 0x24 ; 36
39b6: 84 e4 ldi r24, 0x44 ; 68
39b8: 94 e2 ldi r25, 0x24 ; 36
39ba: 0e 94 9d 2d call 0x5b3a ; 0x5b3a <init_circ_buffer_float>
init_circ_buffer_float(&cb_accel_y, accel_buff_y, 10);
39be: 4a e0 ldi r20, 0x0A ; 10
39c0: 6f ee ldi r22, 0xEF ; 239
39c2: 73 e2 ldi r23, 0x23 ; 35
39c4: 87 e1 ldi r24, 0x17 ; 23
39c6: 94 e2 ldi r25, 0x24 ; 36
39c8: 0e 94 9d 2d call 0x5b3a ; 0x5b3a <init_circ_buffer_float>
init_circ_buffer_float(&cb_accel_z, accel_buff_z, 10);
39cc: 4a e0 ldi r20, 0x0A ; 10
39ce: 62 ec ldi r22, 0xC2 ; 194
39d0: 73 e2 ldi r23, 0x23 ; 35
39d2: 8a ee ldi r24, 0xEA ; 234
39d4: 93 e2 ldi r25, 0x23 ; 35
39d6: 0e 94 9d 2d call 0x5b3a ; 0x5b3a <init_circ_buffer_float>
//reset imu
twi_write(MPU_ADDR, PWR_MGMT_1, 0x80);
39da: 40 e8 ldi r20, 0x80 ; 128
39dc: 6b e6 ldi r22, 0x6B ; 107
39de: 89 e6 ldi r24, 0x69 ; 105
39e0: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 <twi_write>
delay_ms(100);
39e4: 66 e5 ldi r22, 0x56 ; 86
39e6: 73 e2 ldi r23, 0x23 ; 35
39e8: 88 e0 ldi r24, 0x08 ; 8
39ea: 90 e0 ldi r25, 0x00 ; 0
39ec: b3 da rcall .-2714 ; 0x2f54 <__portable_avr_delay_cycles>
twi_write(MPU_ADDR, PWR_MGMT_1, 0x01);
39ee: 41 e0 ldi r20, 0x01 ; 1
39f0: 6b e6 ldi r22, 0x6B ; 107
39f2: 89 e6 ldi r24, 0x69 ; 105
39f4: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 <twi_write>
twi_write(MPU_ADDR, PWR_MGMT_2, 0x00);
39f8: 40 e0 ldi r20, 0x00 ; 0
39fa: 6c e6 ldi r22, 0x6C ; 108
39fc: 89 e6 ldi r24, 0x69 ; 105
39fe: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 <twi_write>
delay_ms(100);
3a02: 66 e5 ldi r22, 0x56 ; 86
3a04: 73 e2 ldi r23, 0x23 ; 35
3a06: 88 e0 ldi r24, 0x08 ; 8
3a08: 90 e0 ldi r25, 0x00 ; 0
3a0a: a4 da rcall .-2744 ; 0x2f54 <__portable_avr_delay_cycles>
//clock source config
//enable gyro + accel
//gyro init
twi_write(MPU_ADDR, MPU_CONFIG, 0x02); //gyro low pass filter config
3a0c: 42 e0 ldi r20, 0x02 ; 2
3a0e: 6a e1 ldi r22, 0x1A ; 26
3a10: 89 e6 ldi r24, 0x69 ; 105
3a12: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 <twi_write>
set_gyro_resolution(GYRO_2000DPS);
3a16: 83 e0 ldi r24, 0x03 ; 3
//accel config
set_accel_resolution(ACCEL_16G);
3a18: 75 df rcall .-278 ; 0x3904 <set_gyro_resolution>
3a1a: 83 e0 ldi r24, 0x03 ; 3
3a1c: 32 df rcall .-412 ; 0x3882 <set_accel_resolution>
twi_write(MPU_ADDR, ACCEL_CONFIG2, 0x02); //accel low pass filter config
3a1e: 42 e0 ldi r20, 0x02 ; 2
3a20: 6d e1 ldi r22, 0x1D ; 29
3a22: 89 e6 ldi r24, 0x69 ; 105
3a24: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 <twi_write>
//sample rate config
mpu_set_sample_rate(MPU_SAMPLE_RATE);
3a28: 84 e6 ldi r24, 0x64 ; 100
3a2a: a5 da rcall .-2742 ; 0x2f76 <mpu_set_sample_rate>
//mpu int config
twi_write(MPU_ADDR, INT_PIN_CFG, 0x22);
3a2c: 42 e2 ldi r20, 0x22 ; 34
3a2e: 67 e3 ldi r22, 0x37 ; 55
3a30: 89 e6 ldi r24, 0x69 ; 105
3a32: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 <twi_write>
twi_write(MPU_ADDR, INT_ENABLE, 0x01);
3a36: 41 e0 ldi r20, 0x01 ; 1
3a38: 68 e3 ldi r22, 0x38 ; 56
3a3a: 89 e6 ldi r24, 0x69 ; 105
3a3c: 0e 94 69 2f call 0x5ed2 ; 0x5ed2 <twi_write>
//not using mag
//mpu_mag_wai();
//mag init
//mag_init();
//int pin config on mcu
PORTA.PIN2CTRL = PORT_OPC_PULLDOWN_gc | PORT_ISC_RISING_gc;
3a40: e0 e0 ldi r30, 0x00 ; 0
3a42: f6 e0 ldi r31, 0x06 ; 6
3a44: 81 e1 ldi r24, 0x11 ; 17
3a46: 82 8b std Z+18, r24 ; 0x12
PORTA.INT0MASK = PIN2_bm;
3a48: 84 e0 ldi r24, 0x04 ; 4
3a4a: 82 87 std Z+10, r24 ; 0x0a
PORTA.INTCTRL = PORT_INT0LVL_HI_gc;
3a4c: 83 e0 ldi r24, 0x03 ; 3
3a4e: 81 87 std Z+9, r24 ; 0x09
3a50: 08 95 ret
00003a52 <__vector_66>:
}
twi_write(MPU_ADDR, GYRO_CONFIG, (MPU_GYRO_SCALE << 3));
}
ISR(PORTA_INT0_vect)
{
3a52: 1f 92 push r1
3a54: 0f 92 push r0
3a56: 0f b6 in r0, 0x3f ; 63
3a58: 0f 92 push r0
3a5a: 11 24 eor r1, r1
3a5c: 08 b6 in r0, 0x38 ; 56
3a5e: 0f 92 push r0
3a60: 18 be out 0x38, r1 ; 56
3a62: 8f 93 push r24
delay_ms(10);
}
void set_mpu_data_status(_Bool status)
{
b_mpu_data_ready = status;
3a64: 81 e0 ldi r24, 0x01 ; 1
3a66: 80 93 89 24 sts 0x2489, r24 ; 0x802489 <b_mpu_data_ready>
}
ISR(PORTA_INT0_vect)
{
set_mpu_data_status(true);
3a6a: 8f 91 pop r24
3a6c: 0f 90 pop r0
3a6e: 08 be out 0x38, r0 ; 56
3a70: 0f 90 pop r0
3a72: 0f be out 0x3f, r0 ; 63
3a74: 0f 90 pop r0
3a76: 1f 90 pop r1
3a78: 18 95 reti
00003a7a <start_ntcle_read>:
void get_ntcle_temp(void)
{
ntcle100_data.temp += (get_oversampled_ntcle_temp(NTCLE100_OVERSAMPLE_AMOUNT) - temp_off);
ntcle100_data.samplect++;
}
3a7a: e0 e0 ldi r30, 0x00 ; 0
3a7c: f2 e0 ldi r31, 0x02 ; 2
3a7e: 80 a1 ldd r24, Z+32 ; 0x20
3a80: 80 68 ori r24, 0x80 ; 128
3a82: 80 a3 std Z+32, r24 ; 0x20
3a84: 08 95 ret
00003a86 <get_adc_reading>:
3a86: f9 df rcall .-14 ; 0x3a7a <start_ntcle_read>
3a88: e0 e0 ldi r30, 0x00 ; 0
3a8a: f2 e0 ldi r31, 0x02 ; 2
3a8c: 83 a1 ldd r24, Z+35 ; 0x23
3a8e: 88 23 and r24, r24
3a90: e9 f3 breq .-6 ; 0x3a8c <get_adc_reading+0x6>
3a92: e0 e0 ldi r30, 0x00 ; 0
3a94: f2 e0 ldi r31, 0x02 ; 2
3a96: 84 a1 ldd r24, Z+36 ; 0x24
3a98: 95 a1 ldd r25, Z+37 ; 0x25
3a9a: 16 82 std Z+6, r1 ; 0x06
3a9c: 08 95 ret
00003a9e <calc_temp>:
3a9e: 8f 92 push r8
3aa0: 9f 92 push r9
3aa2: af 92 push r10
3aa4: bf 92 push r11
3aa6: cf 92 push r12
3aa8: df 92 push r13
3aaa: ef 92 push r14
3aac: ff 92 push r15
3aae: cf 93 push r28
3ab0: c4 2f mov r28, r20
3ab2: 0e 94 4e 33 call 0x669c ; 0x669c <__floatunsisf>
3ab6: 20 e0 ldi r18, 0x00 ; 0
3ab8: 30 e4 ldi r19, 0x40 ; 64
3aba: 4c e1 ldi r20, 0x1C ; 28
3abc: 56 e4 ldi r21, 0x46 ; 70
3abe: 0e 94 b5 32 call 0x656a ; 0x656a <__divsf3>
3ac2: 0e 94 61 34 call 0x68c2 ; 0x68c2 <log>
3ac6: 6b 01 movw r12, r22
3ac8: 7c 01 movw r14, r24
3aca: 9b 01 movw r18, r22
3acc: ac 01 movw r20, r24
3ace: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
3ad2: 22 e8 ldi r18, 0x82 ; 130
3ad4: 35 ed ldi r19, 0xD5 ; 213
3ad6: 4f e2 ldi r20, 0x2F ; 47
3ad8: 56 e3 ldi r21, 0x36 ; 54
3ada: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3ade: 4b 01 movw r8, r22
3ae0: 5c 01 movw r10, r24
3ae2: 21 ef ldi r18, 0xF1 ; 241
3ae4: 3b eb ldi r19, 0xBB ; 187
3ae6: 46 e8 ldi r20, 0x86 ; 134
3ae8: 59 e3 ldi r21, 0x39 ; 57
3aea: c7 01 movw r24, r14
3aec: b6 01 movw r22, r12
3aee: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3af2: 2d e0 ldi r18, 0x0D ; 13
3af4: 3f ec ldi r19, 0xCF ; 207
3af6: 4b e5 ldi r20, 0x5B ; 91
3af8: 5b e3 ldi r21, 0x3B ; 59
3afa: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
3afe: 9b 01 movw r18, r22
3b00: ac 01 movw r20, r24
3b02: c5 01 movw r24, r10
3b04: b4 01 movw r22, r8
3b06: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
3b0a: 4b 01 movw r8, r22
3b0c: 5c 01 movw r10, r24
3b0e: 20 e0 ldi r18, 0x00 ; 0
3b10: 30 e0 ldi r19, 0x00 ; 0
3b12: 40 e4 ldi r20, 0x40 ; 64
3b14: 50 e4 ldi r21, 0x40 ; 64
3b16: c7 01 movw r24, r14
3b18: b6 01 movw r22, r12
3b1a: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3b1e: 2a e6 ldi r18, 0x6A ; 106
3b20: 33 e1 ldi r19, 0x13 ; 19
3b22: 49 e8 ldi r20, 0x89 ; 137
3b24: 53 e3 ldi r21, 0x33 ; 51
3b26: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3b2a: 9b 01 movw r18, r22
3b2c: ac 01 movw r20, r24
3b2e: c5 01 movw r24, r10
3b30: b4 01 movw r22, r8
3b32: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
3b36: 9b 01 movw r18, r22
3b38: ac 01 movw r20, r24
3b3a: 60 e0 ldi r22, 0x00 ; 0
3b3c: 70 e0 ldi r23, 0x00 ; 0
3b3e: 80 e8 ldi r24, 0x80 ; 128
3b40: 9f e3 ldi r25, 0x3F ; 63
3b42: 0e 94 b5 32 call 0x656a ; 0x656a <__divsf3>
3b46: cc 23 and r28, r28
3b48: 89 f0 breq .+34 ; 0x3b6c <calc_temp+0xce>
3b4a: 23 e3 ldi r18, 0x33 ; 51
3b4c: 33 e9 ldi r19, 0x93 ; 147
3b4e: 48 e8 ldi r20, 0x88 ; 136
3b50: 53 e4 ldi r21, 0x43 ; 67
3b52: c6 2e mov r12, r22
3b54: d7 2e mov r13, r23
3b56: e8 2e mov r14, r24
3b58: f9 2e mov r15, r25
3b5a: c7 01 movw r24, r14
3b5c: b6 01 movw r22, r12
3b5e: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
3b62: 56 2f mov r21, r22
3b64: 47 2f mov r20, r23
3b66: 38 2f mov r19, r24
3b68: 29 2f mov r18, r25
3b6a: 04 c0 rjmp .+8 ; 0x3b74 <calc_temp+0xd6>
3b6c: 56 2f mov r21, r22
3b6e: 47 2f mov r20, r23
3b70: 38 2f mov r19, r24
3b72: 29 2f mov r18, r25
3b74: 65 2f mov r22, r21
3b76: 74 2f mov r23, r20
3b78: 83 2f mov r24, r19
3b7a: 92 2f mov r25, r18
3b7c: cf 91 pop r28
3b7e: ff 90 pop r15
3b80: ef 90 pop r14
3b82: df 90 pop r13
3b84: cf 90 pop r12
3b86: bf 90 pop r11
3b88: af 90 pop r10
3b8a: 9f 90 pop r9
3b8c: 8f 90 pop r8
3b8e: 08 95 ret
00003b90 <reset_ntcle_data>:
3b90: ea e8 ldi r30, 0x8A ; 138
3b92: f4 e2 ldi r31, 0x24 ; 36
3b94: 10 82 st Z, r1
3b96: 11 82 std Z+1, r1 ; 0x01
3b98: 12 82 std Z+2, r1 ; 0x02
3b9a: 13 82 std Z+3, r1 ; 0x03
3b9c: 14 82 std Z+4, r1 ; 0x04
3b9e: 15 82 std Z+5, r1 ; 0x05
3ba0: 08 95 ret
00003ba2 <get_ntcle_data>:
3ba2: ff 92 push r15
3ba4: 0f 93 push r16
3ba6: 1f 93 push r17
3ba8: cf 93 push r28
3baa: df 93 push r29
3bac: 8c 01 movw r16, r24
3bae: f6 2e mov r15, r22
3bb0: ca e8 ldi r28, 0x8A ; 138
3bb2: d4 e2 ldi r29, 0x24 ; 36
3bb4: 6c 81 ldd r22, Y+4 ; 0x04
3bb6: 7d 81 ldd r23, Y+5 ; 0x05
3bb8: 07 2e mov r0, r23
3bba: 00 0c add r0, r0
3bbc: 88 0b sbc r24, r24
3bbe: 99 0b sbc r25, r25
3bc0: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf>
3bc4: 9b 01 movw r18, r22
3bc6: ac 01 movw r20, r24
3bc8: 68 81 ld r22, Y
3bca: 79 81 ldd r23, Y+1 ; 0x01
3bcc: 8a 81 ldd r24, Y+2 ; 0x02
3bce: 9b 81 ldd r25, Y+3 ; 0x03
3bd0: 0e 94 b5 32 call 0x656a ; 0x656a <__divsf3>
3bd4: f8 01 movw r30, r16
3bd6: 60 83 st Z, r22
3bd8: 71 83 std Z+1, r23 ; 0x01
3bda: 82 83 std Z+2, r24 ; 0x02
3bdc: 93 83 std Z+3, r25 ; 0x03
3bde: f1 10 cpse r15, r1
3be0: d7 df rcall .-82 ; 0x3b90 <reset_ntcle_data>
3be2: df 91 pop r29
3be4: cf 91 pop r28
3be6: 1f 91 pop r17
3be8: 0f 91 pop r16
3bea: ff 90 pop r15
3bec: 08 95 ret
00003bee <get_oversampled_ntcle_temp>:
3bee: 4f 92 push r4
3bf0: 5f 92 push r5
3bf2: 6f 92 push r6
3bf4: 7f 92 push r7
3bf6: 8f 92 push r8
3bf8: 9f 92 push r9
3bfa: af 92 push r10
3bfc: bf 92 push r11
3bfe: cf 92 push r12
3c00: df 92 push r13
3c02: ef 92 push r14
3c04: ff 92 push r15
3c06: 0f 93 push r16
3c08: 1f 93 push r17
3c0a: cf 93 push r28
3c0c: df 93 push r29
3c0e: 8c 01 movw r16, r24
3c10: 18 16 cp r1, r24
3c12: 19 06 cpc r1, r25
3c14: 0c f0 brlt .+2 ; 0x3c18 <get_oversampled_ntcle_temp+0x2a>
3c16: 40 c0 rjmp .+128 ; 0x3c98 <get_oversampled_ntcle_temp+0xaa>
3c18: c0 e0 ldi r28, 0x00 ; 0
3c1a: d0 e0 ldi r29, 0x00 ; 0
3c1c: 81 2c mov r8, r1
3c1e: 91 2c mov r9, r1
3c20: 54 01 movw r10, r8
3c22: 31 df rcall .-414 ; 0x3a86 <get_adc_reading>
3c24: bc 01 movw r22, r24
3c26: 80 e0 ldi r24, 0x00 ; 0
3c28: 90 e0 ldi r25, 0x00 ; 0
3c2a: 0e 94 4e 33 call 0x669c ; 0x669c <__floatunsisf>
3c2e: 20 e0 ldi r18, 0x00 ; 0
3c30: 30 e0 ldi r19, 0x00 ; 0
3c32: 44 e0 ldi r20, 0x04 ; 4
3c34: 50 e4 ldi r21, 0x40 ; 64
3c36: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3c3a: 20 e0 ldi r18, 0x00 ; 0
3c3c: 30 e0 ldi r19, 0x00 ; 0
3c3e: 40 e8 ldi r20, 0x80 ; 128
3c40: 59 e3 ldi r21, 0x39 ; 57
3c42: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3c46: 6b 01 movw r12, r22
3c48: 7c 01 movw r14, r24
3c4a: 20 e0 ldi r18, 0x00 ; 0
3c4c: 30 e2 ldi r19, 0x20 ; 32
3c4e: 4b e4 ldi r20, 0x4B ; 75
3c50: 56 e4 ldi r21, 0x46 ; 70
3c52: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3c56: 2b 01 movw r4, r22
3c58: 3c 01 movw r6, r24
3c5a: a7 01 movw r20, r14
3c5c: 96 01 movw r18, r12
3c5e: 63 e3 ldi r22, 0x33 ; 51
3c60: 73 e3 ldi r23, 0x33 ; 51
3c62: 83 e5 ldi r24, 0x53 ; 83
3c64: 90 e4 ldi r25, 0x40 ; 64
3c66: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
3c6a: 9b 01 movw r18, r22
3c6c: ac 01 movw r20, r24
3c6e: c3 01 movw r24, r6
3c70: b2 01 movw r22, r4
3c72: 0e 94 b5 32 call 0x656a ; 0x656a <__divsf3>
3c76: 0e 94 22 33 call 0x6644 ; 0x6644 <__fixunssfsi>
3c7a: 41 e0 ldi r20, 0x01 ; 1
3c7c: 10 df rcall .-480 ; 0x3a9e <calc_temp>
3c7e: 9b 01 movw r18, r22
3c80: ac 01 movw r20, r24
3c82: c5 01 movw r24, r10
3c84: b4 01 movw r22, r8
3c86: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
3c8a: 4b 01 movw r8, r22
3c8c: 5c 01 movw r10, r24
3c8e: 21 96 adiw r28, 0x01 ; 1
3c90: 0c 17 cp r16, r28
3c92: 1d 07 cpc r17, r29
3c94: 31 f6 brne .-116 ; 0x3c22 <get_oversampled_ntcle_temp+0x34>
3c96: 03 c0 rjmp .+6 ; 0x3c9e <get_oversampled_ntcle_temp+0xb0>
3c98: 81 2c mov r8, r1
3c9a: 91 2c mov r9, r1
3c9c: 54 01 movw r10, r8
3c9e: b8 01 movw r22, r16
3ca0: 11 0f add r17, r17
3ca2: 88 0b sbc r24, r24
3ca4: 99 0b sbc r25, r25
3ca6: 0e 94 50 33 call 0x66a0 ; 0x66a0 <__floatsisf>
3caa: 9b 01 movw r18, r22
3cac: ac 01 movw r20, r24
3cae: c5 01 movw r24, r10
3cb0: b4 01 movw r22, r8
3cb2: 0e 94 b5 32 call 0x656a ; 0x656a <__divsf3>
3cb6: df 91 pop r29
3cb8: cf 91 pop r28
3cba: 1f 91 pop r17
3cbc: 0f 91 pop r16
3cbe: ff 90 pop r15
3cc0: ef 90 pop r14
3cc2: df 90 pop r13
3cc4: cf 90 pop r12
3cc6: bf 90 pop r11
3cc8: af 90 pop r10
3cca: 9f 90 pop r9
3ccc: 8f 90 pop r8
3cce: 7f 90 pop r7
3cd0: 6f 90 pop r6
3cd2: 5f 90 pop r5
3cd4: 4f 90 pop r4
3cd6: 08 95 ret
00003cd8 <get_ntcle_temp_now>:
ntcle100_data.samplect = 0;
}
float get_ntcle_temp_now(void)
{
return (get_oversampled_ntcle_temp(NTCLE100_OVERSAMPLE_AMOUNT) - temp_off);
3cd8: 84 e0 ldi r24, 0x04 ; 4
3cda: 90 e0 ldi r25, 0x00 ; 0
3cdc: 88 df rcall .-240 ; 0x3bee <get_oversampled_ntcle_temp>
3cde: 20 91 a0 29 lds r18, 0x29A0 ; 0x8029a0 <temp_off>
3ce2: 30 91 a1 29 lds r19, 0x29A1 ; 0x8029a1 <temp_off+0x1>
3ce6: 40 91 a2 29 lds r20, 0x29A2 ; 0x8029a2 <temp_off+0x2>
3cea: 50 91 a3 29 lds r21, 0x29A3 ; 0x8029a3 <temp_off+0x3>
3cee: 0c 94 d3 31 jmp 0x63a6 ; 0x63a6 <__subsf3>
}
3cf2: 08 95 ret
00003cf4 <ntcle100_init>:
{
ADCA.CH0.CTRL |= 0b10000000;
}
void ntcle100_init(void)
{
3cf4: cf 93 push r28
3cf6: df 93 push r29
temp_off = 0;
3cf8: 10 92 a0 29 sts 0x29A0, r1 ; 0x8029a0 <temp_off>
3cfc: 10 92 a1 29 sts 0x29A1, r1 ; 0x8029a1 <temp_off+0x1>
3d00: 10 92 a2 29 sts 0x29A2, r1 ; 0x8029a2 <temp_off+0x2>
3d04: 10 92 a3 29 sts 0x29A3, r1 ; 0x8029a3 <temp_off+0x3>
//enable adc channel 0
ADCA.CH0.CTRL = 0b00000001;
3d08: e0 e0 ldi r30, 0x00 ; 0
3d0a: f2 e0 ldi r31, 0x02 ; 2
3d0c: 81 e0 ldi r24, 0x01 ; 1
3d0e: 80 a3 std Z+32, r24 ; 0x20
//pin 0 for ch0
ADCA.CH0.MUXCTRL = 0b00000000;
3d10: 11 a2 std Z+33, r1 ; 0x21
swprintf(SWDEBUG, "Test temp: %-2.2f\n", get_ntcle_temp_now());
3d12: c0 91 3d 25 lds r28, 0x253D ; 0x80253d <swprintf>
3d16: d0 91 3e 25 lds r29, 0x253E ; 0x80253e <swprintf+0x1>
3d1a: de df rcall .-68 ; 0x3cd8 <get_ntcle_temp_now>
3d1c: 9f 93 push r25
3d1e: 8f 93 push r24
3d20: 7f 93 push r23
3d22: 6f 93 push r22
3d24: 8c ee ldi r24, 0xEC ; 236
3d26: 90 e2 ldi r25, 0x20 ; 32
3d28: 9f 93 push r25
3d2a: 8f 93 push r24
3d2c: 88 e0 ldi r24, 0x08 ; 8
3d2e: 8f 93 push r24
3d30: 80 ea ldi r24, 0xA0 ; 160
3d32: 8f 93 push r24
3d34: fe 01 movw r30, r28
3d36: 19 95 eicall
}
3d38: 8d b7 in r24, 0x3d ; 61
3d3a: 9e b7 in r25, 0x3e ; 62
3d3c: 08 96 adiw r24, 0x08 ; 8
3d3e: 8d bf out 0x3d, r24 ; 61
3d40: 9e bf out 0x3e, r25 ; 62
3d42: df 91 pop r29
3d44: cf 91 pop r28
3d46: 08 95 ret
00003d48 <adc_util_init>:
*/
#include "drivers/adc_util.h"
void adc_util_init(void)
{
3d48: 0f 93 push r16
3d4a: 1f 93 push r17
3d4c: cf 93 push r28
3d4e: df 93 push r29
//enable adca
ADCA.CTRLA = 0b00000001;
3d50: 00 e0 ldi r16, 0x00 ; 0
3d52: 12 e0 ldi r17, 0x02 ; 2
3d54: 81 e0 ldi r24, 0x01 ; 1
3d56: f8 01 movw r30, r16
3d58: 80 83 st Z, r24
//enable unsigned 12 bit res
ADCA.CTRLB = 0b00000000;
3d5a: 11 82 std Z+1, r1 ; 0x01
//[5:4] = 01 for Vcc/1.6 as ref voltage
ADCA.REFCTRL = 0b00010000;
3d5c: 80 e1 ldi r24, 0x10 ; 16
3d5e: 82 83 std Z+2, r24 ; 0x02
ADCA.PRESCALER = 0b00000101;
3d60: 85 e0 ldi r24, 0x05 ; 5
3d62: 84 83 std Z+4, r24 ; 0x04
*
* \param address Byte offset into the signature row
*/
static inline uint8_t nvm_read_production_signature_row(uint8_t address)
{
return nvm_read_byte(NVM_CMD_READ_CALIB_ROW_gc, address);
3d64: 61 e2 ldi r22, 0x21 ; 33
3d66: 70 e0 ldi r23, 0x00 ; 0
3d68: 82 e0 ldi r24, 0x02 ; 2
3d6a: 0e 94 5d 04 call 0x8ba ; 0x8ba <nvm_read_byte>
uint16_t data;
switch (cal) {
#ifdef ADCA
case ADC_CAL_ADCA:
data = nvm_read_production_signature_row(ADCACAL1);
3d6e: c8 2f mov r28, r24
3d70: d0 e0 ldi r29, 0x00 ; 0
data <<= 8;
3d72: dc 2f mov r29, r28
3d74: cc 27 eor r28, r28
3d76: 60 e2 ldi r22, 0x20 ; 32
3d78: 70 e0 ldi r23, 0x00 ; 0
3d7a: 82 e0 ldi r24, 0x02 ; 2
3d7c: 0e 94 5d 04 call 0x8ba ; 0x8ba <nvm_read_byte>
data |= nvm_read_production_signature_row(ADCACAL0);
3d80: c8 2b or r28, r24
ADCA.CAL = adc_get_calibration_data(ADC_CAL_ADCA);
3d82: f8 01 movw r30, r16
3d84: c4 87 std Z+12, r28 ; 0x0c
3d86: d5 87 std Z+13, r29 ; 0x0d
////enable adc 1
//ADCA.CH1.CTRL = 0b00000001;
//
////pin 1 for ch1
//ADCA.CH1.MUXCTRL = 0b00001000;
}
3d88: df 91 pop r29
3d8a: cf 91 pop r28
3d8c: 1f 91 pop r17
3d8e: 0f 91 pop r16
3d90: 08 95 ret
00003d92 <MahonyAHRSupdateIMU>:
3d92: 4f 92 push r4
3d94: 5f 92 push r5
3d96: 6f 92 push r6
3d98: 7f 92 push r7
3d9a: 8f 92 push r8
3d9c: 9f 92 push r9
3d9e: af 92 push r10
3da0: bf 92 push r11
3da2: cf 92 push r12
3da4: df 92 push r13
3da6: ef 92 push r14
3da8: ff 92 push r15
3daa: 0f 93 push r16
3dac: 1f 93 push r17
3dae: cf 93 push r28
3db0: df 93 push r29
3db2: cd b7 in r28, 0x3d ; 61
3db4: de b7 in r29, 0x3e ; 62
3db6: a4 97 sbiw r28, 0x24 ; 36
3db8: cd bf out 0x3d, r28 ; 61
3dba: de bf out 0x3e, r29 ; 62
3dbc: 69 87 std Y+9, r22 ; 0x09
3dbe: 7a 87 std Y+10, r23 ; 0x0a
3dc0: 8b 87 std Y+11, r24 ; 0x0b
3dc2: 9c 87 std Y+12, r25 ; 0x0c
3dc4: 2d 87 std Y+13, r18 ; 0x0d
3dc6: 3e 87 std Y+14, r19 ; 0x0e
3dc8: 4f 87 std Y+15, r20 ; 0x0f
3dca: 58 8b std Y+16, r21 ; 0x10
3dcc: e9 8a std Y+17, r14 ; 0x11
3dce: fa 8a std Y+18, r15 ; 0x12
3dd0: 0b 8b std Y+19, r16 ; 0x13
3dd2: 1c 8b std Y+20, r17 ; 0x14
3dd4: 20 e0 ldi r18, 0x00 ; 0
3dd6: 30 e0 ldi r19, 0x00 ; 0
3dd8: a9 01 movw r20, r18
3dda: c6 01 movw r24, r12
3ddc: b5 01 movw r22, r10
3dde: 0e 94 b1 32 call 0x6562 ; 0x6562 <__cmpsf2>
3de2: 81 11 cpse r24, r1
3de4: 17 c0 rjmp .+46 ; 0x3e14 <MahonyAHRSupdateIMU+0x82>
3de6: 20 e0 ldi r18, 0x00 ; 0
3de8: 30 e0 ldi r19, 0x00 ; 0
3dea: a9 01 movw r20, r18
3dec: 68 ad ldd r22, Y+56 ; 0x38
3dee: 79 ad ldd r23, Y+57 ; 0x39
3df0: 8a ad ldd r24, Y+58 ; 0x3a
3df2: 9b ad ldd r25, Y+59 ; 0x3b
3df4: 0e 94 b1 32 call 0x6562 ; 0x6562 <__cmpsf2>
3df8: 81 11 cpse r24, r1
3dfa: 0c c0 rjmp .+24 ; 0x3e14 <MahonyAHRSupdateIMU+0x82>
3dfc: 20 e0 ldi r18, 0x00 ; 0
3dfe: 30 e0 ldi r19, 0x00 ; 0
3e00: a9 01 movw r20, r18
3e02: 6c ad ldd r22, Y+60 ; 0x3c
3e04: 7d ad ldd r23, Y+61 ; 0x3d
3e06: 8e ad ldd r24, Y+62 ; 0x3e
3e08: 9f ad ldd r25, Y+63 ; 0x3f
3e0a: 0e 94 b1 32 call 0x6562 ; 0x6562 <__cmpsf2>
3e0e: 88 23 and r24, r24
3e10: 09 f4 brne .+2 ; 0x3e14 <MahonyAHRSupdateIMU+0x82>
3e12: 89 c2 rjmp .+1298 ; 0x4326 <__stack+0x327>
3e14: a6 01 movw r20, r12
3e16: 95 01 movw r18, r10
3e18: c6 01 movw r24, r12
3e1a: b5 01 movw r22, r10
3e1c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3e20: 2b 01 movw r4, r22
3e22: 3c 01 movw r6, r24
3e24: 28 ad ldd r18, Y+56 ; 0x38
3e26: 39 ad ldd r19, Y+57 ; 0x39
3e28: 4a ad ldd r20, Y+58 ; 0x3a
3e2a: 5b ad ldd r21, Y+59 ; 0x3b
3e2c: ca 01 movw r24, r20
3e2e: b9 01 movw r22, r18
3e30: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3e34: 9b 01 movw r18, r22
3e36: ac 01 movw r20, r24
3e38: c3 01 movw r24, r6
3e3a: b2 01 movw r22, r4
3e3c: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
3e40: 2b 01 movw r4, r22
3e42: 3c 01 movw r6, r24
3e44: 2c ad ldd r18, Y+60 ; 0x3c
3e46: 3d ad ldd r19, Y+61 ; 0x3d
3e48: 4e ad ldd r20, Y+62 ; 0x3e
3e4a: 5f ad ldd r21, Y+63 ; 0x3f
3e4c: ca 01 movw r24, r20
3e4e: b9 01 movw r22, r18
3e50: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3e54: 9b 01 movw r18, r22
3e56: ac 01 movw r20, r24
3e58: c3 01 movw r24, r6
3e5a: b2 01 movw r22, r4
3e5c: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
3e60: 2b 01 movw r4, r22
3e62: 3c 01 movw r6, r24
3e64: 75 94 asr r7
3e66: 67 94 ror r6
3e68: 57 94 ror r5
3e6a: 47 94 ror r4
3e6c: 1f ed ldi r17, 0xDF ; 223
3e6e: e1 2e mov r14, r17
3e70: 19 e5 ldi r17, 0x59 ; 89
3e72: f1 2e mov r15, r17
3e74: 07 e3 ldi r16, 0x37 ; 55
3e76: 1f e5 ldi r17, 0x5F ; 95
3e78: e4 18 sub r14, r4
3e7a: f5 08 sbc r15, r5
3e7c: 06 09 sbc r16, r6
3e7e: 17 09 sbc r17, r7
3e80: 20 e0 ldi r18, 0x00 ; 0
3e82: 30 e0 ldi r19, 0x00 ; 0
3e84: 40 e0 ldi r20, 0x00 ; 0
3e86: 5f e3 ldi r21, 0x3F ; 63
3e88: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3e8c: a8 01 movw r20, r16
3e8e: 97 01 movw r18, r14
3e90: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3e94: a8 01 movw r20, r16
3e96: 97 01 movw r18, r14
3e98: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3e9c: 9b 01 movw r18, r22
3e9e: ac 01 movw r20, r24
3ea0: 60 e0 ldi r22, 0x00 ; 0
3ea2: 70 e0 ldi r23, 0x00 ; 0
3ea4: 80 ec ldi r24, 0xC0 ; 192
3ea6: 9f e3 ldi r25, 0x3F ; 63
3ea8: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
3eac: a8 01 movw r20, r16
3eae: 97 01 movw r18, r14
3eb0: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3eb4: 2b 01 movw r4, r22
3eb6: 3c 01 movw r6, r24
3eb8: 9b 01 movw r18, r22
3eba: ac 01 movw r20, r24
3ebc: c6 01 movw r24, r12
3ebe: b5 01 movw r22, r10
3ec0: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3ec4: 69 83 std Y+1, r22 ; 0x01
3ec6: 7a 83 std Y+2, r23 ; 0x02
3ec8: 8b 83 std Y+3, r24 ; 0x03
3eca: 9c 83 std Y+4, r25 ; 0x04
3ecc: a3 01 movw r20, r6
3ece: 92 01 movw r18, r4
3ed0: 68 ad ldd r22, Y+56 ; 0x38
3ed2: 79 ad ldd r23, Y+57 ; 0x39
3ed4: 8a ad ldd r24, Y+58 ; 0x3a
3ed6: 9b ad ldd r25, Y+59 ; 0x3b
3ed8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3edc: 6d 83 std Y+5, r22 ; 0x05
3ede: 7e 83 std Y+6, r23 ; 0x06
3ee0: 8f 83 std Y+7, r24 ; 0x07
3ee2: 98 87 std Y+8, r25 ; 0x08
3ee4: a3 01 movw r20, r6
3ee6: 92 01 movw r18, r4
3ee8: 6c ad ldd r22, Y+60 ; 0x3c
3eea: 7d ad ldd r23, Y+61 ; 0x3d
3eec: 8e ad ldd r24, Y+62 ; 0x3e
3eee: 9f ad ldd r25, Y+63 ; 0x3f
3ef0: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3ef4: 6d 8b std Y+21, r22 ; 0x15
3ef6: 7e 8b std Y+22, r23 ; 0x16
3ef8: 8f 8b std Y+23, r24 ; 0x17
3efa: 98 8f std Y+24, r25 ; 0x18
3efc: 60 91 a4 24 lds r22, 0x24A4 ; 0x8024a4 <q1>
3f00: 70 91 a5 24 lds r23, 0x24A5 ; 0x8024a5 <q1+0x1>
3f04: 80 91 a6 24 lds r24, 0x24A6 ; 0x8024a6 <q1+0x2>
3f08: 90 91 a7 24 lds r25, 0x24A7 ; 0x8024a7 <q1+0x3>
3f0c: 20 91 9c 24 lds r18, 0x249C ; 0x80249c <q3>
3f10: 30 91 9d 24 lds r19, 0x249D ; 0x80249d <q3+0x1>
3f14: 40 91 9e 24 lds r20, 0x249E ; 0x80249e <q3+0x2>
3f18: 50 91 9f 24 lds r21, 0x249F ; 0x80249f <q3+0x3>
3f1c: 80 90 00 20 lds r8, 0x2000 ; 0x802000 <__data_start>
3f20: 90 90 01 20 lds r9, 0x2001 ; 0x802001 <__data_start+0x1>
3f24: a0 90 02 20 lds r10, 0x2002 ; 0x802002 <__data_start+0x2>
3f28: b0 90 03 20 lds r11, 0x2003 ; 0x802003 <__data_start+0x3>
3f2c: 40 90 a0 24 lds r4, 0x24A0 ; 0x8024a0 <q2>
3f30: 50 90 a1 24 lds r5, 0x24A1 ; 0x8024a1 <q2+0x1>
3f34: 60 90 a2 24 lds r6, 0x24A2 ; 0x8024a2 <q2+0x2>
3f38: 70 90 a3 24 lds r7, 0x24A3 ; 0x8024a3 <q2+0x3>
3f3c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3f40: 6b 01 movw r12, r22
3f42: 7c 01 movw r14, r24
3f44: a3 01 movw r20, r6
3f46: 92 01 movw r18, r4
3f48: c5 01 movw r24, r10
3f4a: b4 01 movw r22, r8
3f4c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3f50: 9b 01 movw r18, r22
3f52: ac 01 movw r20, r24
3f54: c7 01 movw r24, r14
3f56: b6 01 movw r22, r12
3f58: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
3f5c: 69 8f std Y+25, r22 ; 0x19
3f5e: 7a 8f std Y+26, r23 ; 0x1a
3f60: 8b 8f std Y+27, r24 ; 0x1b
3f62: 9c 8f std Y+28, r25 ; 0x1c
3f64: 60 91 00 20 lds r22, 0x2000 ; 0x802000 <__data_start>
3f68: 70 91 01 20 lds r23, 0x2001 ; 0x802001 <__data_start+0x1>
3f6c: 80 91 02 20 lds r24, 0x2002 ; 0x802002 <__data_start+0x2>
3f70: 90 91 03 20 lds r25, 0x2003 ; 0x802003 <__data_start+0x3>
3f74: 20 91 a4 24 lds r18, 0x24A4 ; 0x8024a4 <q1>
3f78: 30 91 a5 24 lds r19, 0x24A5 ; 0x8024a5 <q1+0x1>
3f7c: 40 91 a6 24 lds r20, 0x24A6 ; 0x8024a6 <q1+0x2>
3f80: 50 91 a7 24 lds r21, 0x24A7 ; 0x8024a7 <q1+0x3>
3f84: 80 90 a0 24 lds r8, 0x24A0 ; 0x8024a0 <q2>
3f88: 90 90 a1 24 lds r9, 0x24A1 ; 0x8024a1 <q2+0x1>
3f8c: a0 90 a2 24 lds r10, 0x24A2 ; 0x8024a2 <q2+0x2>
3f90: b0 90 a3 24 lds r11, 0x24A3 ; 0x8024a3 <q2+0x3>
3f94: 40 90 9c 24 lds r4, 0x249C ; 0x80249c <q3>
3f98: 50 90 9d 24 lds r5, 0x249D ; 0x80249d <q3+0x1>
3f9c: 60 90 9e 24 lds r6, 0x249E ; 0x80249e <q3+0x2>
3fa0: 70 90 9f 24 lds r7, 0x249F ; 0x80249f <q3+0x3>
3fa4: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3fa8: 6b 01 movw r12, r22
3faa: 7c 01 movw r14, r24
3fac: a3 01 movw r20, r6
3fae: 92 01 movw r18, r4
3fb0: c5 01 movw r24, r10
3fb2: b4 01 movw r22, r8
3fb4: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
3fb8: 9b 01 movw r18, r22
3fba: ac 01 movw r20, r24
3fbc: c7 01 movw r24, r14
3fbe: b6 01 movw r22, r12
3fc0: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
3fc4: 6d 8f std Y+29, r22 ; 0x1d
3fc6: 7e 8f std Y+30, r23 ; 0x1e
3fc8: 8f 8f std Y+31, r24 ; 0x1f
3fca: 98 a3 std Y+32, r25 ; 0x20
3fcc: 60 91 00 20 lds r22, 0x2000 ; 0x802000 <__data_start>
3fd0: 70 91 01 20 lds r23, 0x2001 ; 0x802001 <__data_start+0x1>
3fd4: 80 91 02 20 lds r24, 0x2002 ; 0x802002 <__data_start+0x2>
3fd8: 90 91 03 20 lds r25, 0x2003 ; 0x802003 <__data_start+0x3>
3fdc: 20 91 00 20 lds r18, 0x2000 ; 0x802000 <__data_start>
3fe0: 30 91 01 20 lds r19, 0x2001 ; 0x802001 <__data_start+0x1>
3fe4: 40 91 02 20 lds r20, 0x2002 ; 0x802002 <__data_start+0x2>
3fe8: 50 91 03 20 lds r21, 0x2003 ; 0x802003 <__data_start+0x3>
3fec: 80 90 9c 24 lds r8, 0x249C ; 0x80249c <q3>
3ff0: 90 90 9d 24 lds r9, 0x249D ; 0x80249d <q3+0x1>
3ff4: a0 90 9e 24 lds r10, 0x249E ; 0x80249e <q3+0x2>
3ff8: b0 90 9f 24 lds r11, 0x249F ; 0x80249f <q3+0x3>
3ffc: 40 90 9c 24 lds r4, 0x249C ; 0x80249c <q3>
4000: 50 90 9d 24 lds r5, 0x249D ; 0x80249d <q3+0x1>
4004: 60 90 9e 24 lds r6, 0x249E ; 0x80249e <q3+0x2>
4008: 70 90 9f 24 lds r7, 0x249F ; 0x80249f <q3+0x3>
400c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4010: 20 e0 ldi r18, 0x00 ; 0
4012: 30 e0 ldi r19, 0x00 ; 0
4014: 40 e0 ldi r20, 0x00 ; 0
4016: 5f e3 ldi r21, 0x3F ; 63
4018: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
401c: 6b 01 movw r12, r22
401e: 7c 01 movw r14, r24
4020: a3 01 movw r20, r6
4022: 92 01 movw r18, r4
4024: c5 01 movw r24, r10
4026: b4 01 movw r22, r8
4028: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
402c: 9b 01 movw r18, r22
402e: ac 01 movw r20, r24
4030: c7 01 movw r24, r14
4032: b6 01 movw r22, r12
4034: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
4038: 6b 01 movw r12, r22
403a: 7c 01 movw r14, r24
403c: 9b 01 movw r18, r22
403e: ac 01 movw r20, r24
4040: 6d 81 ldd r22, Y+5 ; 0x05
4042: 7e 81 ldd r23, Y+6 ; 0x06
4044: 8f 81 ldd r24, Y+7 ; 0x07
4046: 98 85 ldd r25, Y+8 ; 0x08
4048: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
404c: 4b 01 movw r8, r22
404e: 5c 01 movw r10, r24
4050: 2d 8d ldd r18, Y+29 ; 0x1d
4052: 3e 8d ldd r19, Y+30 ; 0x1e
4054: 4f 8d ldd r20, Y+31 ; 0x1f
4056: 58 a1 ldd r21, Y+32 ; 0x20
4058: 6d 89 ldd r22, Y+21 ; 0x15
405a: 7e 89 ldd r23, Y+22 ; 0x16
405c: 8f 89 ldd r24, Y+23 ; 0x17
405e: 98 8d ldd r25, Y+24 ; 0x18
4060: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4064: 9b 01 movw r18, r22
4066: ac 01 movw r20, r24
4068: c5 01 movw r24, r10
406a: b4 01 movw r22, r8
406c: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
4070: 69 a3 std Y+33, r22 ; 0x21
4072: 7a a3 std Y+34, r23 ; 0x22
4074: 8b a3 std Y+35, r24 ; 0x23
4076: 9c a3 std Y+36, r25 ; 0x24
4078: 29 8d ldd r18, Y+25 ; 0x19
407a: 3a 8d ldd r19, Y+26 ; 0x1a
407c: 4b 8d ldd r20, Y+27 ; 0x1b
407e: 5c 8d ldd r21, Y+28 ; 0x1c
4080: 6d 89 ldd r22, Y+21 ; 0x15
4082: 7e 89 ldd r23, Y+22 ; 0x16
4084: 8f 89 ldd r24, Y+23 ; 0x17
4086: 98 8d ldd r25, Y+24 ; 0x18
4088: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
408c: 4b 01 movw r8, r22
408e: 5c 01 movw r10, r24
4090: a7 01 movw r20, r14
4092: 96 01 movw r18, r12
4094: 69 81 ldd r22, Y+1 ; 0x01
4096: 7a 81 ldd r23, Y+2 ; 0x02
4098: 8b 81 ldd r24, Y+3 ; 0x03
409a: 9c 81 ldd r25, Y+4 ; 0x04
409c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
40a0: 9b 01 movw r18, r22
40a2: ac 01 movw r20, r24
40a4: c5 01 movw r24, r10
40a6: b4 01 movw r22, r8
40a8: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
40ac: 4b 01 movw r8, r22
40ae: 5c 01 movw r10, r24
40b0: 2d 8d ldd r18, Y+29 ; 0x1d
40b2: 3e 8d ldd r19, Y+30 ; 0x1e
40b4: 4f 8d ldd r20, Y+31 ; 0x1f
40b6: 58 a1 ldd r21, Y+32 ; 0x20
40b8: 69 81 ldd r22, Y+1 ; 0x01
40ba: 7a 81 ldd r23, Y+2 ; 0x02
40bc: 8b 81 ldd r24, Y+3 ; 0x03
40be: 9c 81 ldd r25, Y+4 ; 0x04
40c0: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
40c4: 6b 01 movw r12, r22
40c6: 7c 01 movw r14, r24
40c8: 29 8d ldd r18, Y+25 ; 0x19
40ca: 3a 8d ldd r19, Y+26 ; 0x1a
40cc: 4b 8d ldd r20, Y+27 ; 0x1b
40ce: 5c 8d ldd r21, Y+28 ; 0x1c
40d0: 6d 81 ldd r22, Y+5 ; 0x05
40d2: 7e 81 ldd r23, Y+6 ; 0x06
40d4: 8f 81 ldd r24, Y+7 ; 0x07
40d6: 98 85 ldd r25, Y+8 ; 0x08
40d8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
40dc: 9b 01 movw r18, r22
40de: ac 01 movw r20, r24
40e0: c7 01 movw r24, r14
40e2: b6 01 movw r22, r12
40e4: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
40e8: 6b 01 movw r12, r22
40ea: 7c 01 movw r14, r24
40ec: 60 91 a8 24 lds r22, 0x24A8 ; 0x8024a8 <twoKi>
40f0: 70 91 a9 24 lds r23, 0x24A9 ; 0x8024a9 <twoKi+0x1>
40f4: 80 91 aa 24 lds r24, 0x24AA ; 0x8024aa <twoKi+0x2>
40f8: 90 91 ab 24 lds r25, 0x24AB ; 0x8024ab <twoKi+0x3>
40fc: 20 e0 ldi r18, 0x00 ; 0
40fe: 30 e0 ldi r19, 0x00 ; 0
4100: a9 01 movw r20, r18
4102: 0e 94 51 34 call 0x68a2 ; 0x68a2 <__gesf2>
4106: 18 16 cp r1, r24
4108: 0c f0 brlt .+2 ; 0x410c <__stack+0x10d>
410a: ab c0 rjmp .+342 ; 0x4262 <__stack+0x263>
410c: 20 91 a8 24 lds r18, 0x24A8 ; 0x8024a8 <twoKi>
4110: 30 91 a9 24 lds r19, 0x24A9 ; 0x8024a9 <twoKi+0x1>
4114: 40 91 aa 24 lds r20, 0x24AA ; 0x8024aa <twoKi+0x2>
4118: 50 91 ab 24 lds r21, 0x24AB ; 0x8024ab <twoKi+0x3>
411c: 40 90 98 24 lds r4, 0x2498 ; 0x802498 <integralFBx>
4120: 50 90 99 24 lds r5, 0x2499 ; 0x802499 <integralFBx+0x1>
4124: 60 90 9a 24 lds r6, 0x249A ; 0x80249a <integralFBx+0x2>
4128: 70 90 9b 24 lds r7, 0x249B ; 0x80249b <integralFBx+0x3>
412c: 69 a1 ldd r22, Y+33 ; 0x21
412e: 7a a1 ldd r23, Y+34 ; 0x22
4130: 8b a1 ldd r24, Y+35 ; 0x23
4132: 9c a1 ldd r25, Y+36 ; 0x24
4134: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4138: 2a ef ldi r18, 0xFA ; 250
413a: 39 ec ldi r19, 0xC9 ; 201
413c: 44 e3 ldi r20, 0x34 ; 52
413e: 59 e3 ldi r21, 0x39 ; 57
4140: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4144: a3 01 movw r20, r6
4146: 92 01 movw r18, r4
4148: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
414c: 60 93 98 24 sts 0x2498, r22 ; 0x802498 <integralFBx>
4150: 70 93 99 24 sts 0x2499, r23 ; 0x802499 <integralFBx+0x1>
4154: 80 93 9a 24 sts 0x249A, r24 ; 0x80249a <integralFBx+0x2>
4158: 90 93 9b 24 sts 0x249B, r25 ; 0x80249b <integralFBx+0x3>
415c: 20 91 a8 24 lds r18, 0x24A8 ; 0x8024a8 <twoKi>
4160: 30 91 a9 24 lds r19, 0x24A9 ; 0x8024a9 <twoKi+0x1>
4164: 40 91 aa 24 lds r20, 0x24AA ; 0x8024aa <twoKi+0x2>
4168: 50 91 ab 24 lds r21, 0x24AB ; 0x8024ab <twoKi+0x3>
416c: 40 90 94 24 lds r4, 0x2494 ; 0x802494 <integralFBy>
4170: 50 90 95 24 lds r5, 0x2495 ; 0x802495 <integralFBy+0x1>
4174: 60 90 96 24 lds r6, 0x2496 ; 0x802496 <integralFBy+0x2>
4178: 70 90 97 24 lds r7, 0x2497 ; 0x802497 <integralFBy+0x3>
417c: c5 01 movw r24, r10
417e: b4 01 movw r22, r8
4180: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4184: 2a ef ldi r18, 0xFA ; 250
4186: 39 ec ldi r19, 0xC9 ; 201
4188: 44 e3 ldi r20, 0x34 ; 52
418a: 59 e3 ldi r21, 0x39 ; 57
418c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4190: a3 01 movw r20, r6
4192: 92 01 movw r18, r4
4194: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
4198: 60 93 94 24 sts 0x2494, r22 ; 0x802494 <integralFBy>
419c: 70 93 95 24 sts 0x2495, r23 ; 0x802495 <integralFBy+0x1>
41a0: 80 93 96 24 sts 0x2496, r24 ; 0x802496 <integralFBy+0x2>
41a4: 90 93 97 24 sts 0x2497, r25 ; 0x802497 <integralFBy+0x3>
41a8: 20 91 a8 24 lds r18, 0x24A8 ; 0x8024a8 <twoKi>
41ac: 30 91 a9 24 lds r19, 0x24A9 ; 0x8024a9 <twoKi+0x1>
41b0: 40 91 aa 24 lds r20, 0x24AA ; 0x8024aa <twoKi+0x2>
41b4: 50 91 ab 24 lds r21, 0x24AB ; 0x8024ab <twoKi+0x3>
41b8: 40 90 90 24 lds r4, 0x2490 ; 0x802490 <integralFBz>
41bc: 50 90 91 24 lds r5, 0x2491 ; 0x802491 <integralFBz+0x1>
41c0: 60 90 92 24 lds r6, 0x2492 ; 0x802492 <integralFBz+0x2>
41c4: 70 90 93 24 lds r7, 0x2493 ; 0x802493 <integralFBz+0x3>
41c8: c7 01 movw r24, r14
41ca: b6 01 movw r22, r12
41cc: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
41d0: 2a ef ldi r18, 0xFA ; 250
41d2: 39 ec ldi r19, 0xC9 ; 201
41d4: 44 e3 ldi r20, 0x34 ; 52
41d6: 59 e3 ldi r21, 0x39 ; 57
41d8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
41dc: a3 01 movw r20, r6
41de: 92 01 movw r18, r4
41e0: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
41e4: 60 93 90 24 sts 0x2490, r22 ; 0x802490 <integralFBz>
41e8: 70 93 91 24 sts 0x2491, r23 ; 0x802491 <integralFBz+0x1>
41ec: 80 93 92 24 sts 0x2492, r24 ; 0x802492 <integralFBz+0x2>
41f0: 90 93 93 24 sts 0x2493, r25 ; 0x802493 <integralFBz+0x3>
41f4: 20 91 98 24 lds r18, 0x2498 ; 0x802498 <integralFBx>
41f8: 30 91 99 24 lds r19, 0x2499 ; 0x802499 <integralFBx+0x1>
41fc: 40 91 9a 24 lds r20, 0x249A ; 0x80249a <integralFBx+0x2>
4200: 50 91 9b 24 lds r21, 0x249B ; 0x80249b <integralFBx+0x3>
4204: 69 85 ldd r22, Y+9 ; 0x09
4206: 7a 85 ldd r23, Y+10 ; 0x0a
4208: 8b 85 ldd r24, Y+11 ; 0x0b
420a: 9c 85 ldd r25, Y+12 ; 0x0c
420c: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
4210: 69 87 std Y+9, r22 ; 0x09
4212: 7a 87 std Y+10, r23 ; 0x0a
4214: 8b 87 std Y+11, r24 ; 0x0b
4216: 9c 87 std Y+12, r25 ; 0x0c
4218: 20 91 94 24 lds r18, 0x2494 ; 0x802494 <integralFBy>
421c: 30 91 95 24 lds r19, 0x2495 ; 0x802495 <integralFBy+0x1>
4220: 40 91 96 24 lds r20, 0x2496 ; 0x802496 <integralFBy+0x2>
4224: 50 91 97 24 lds r21, 0x2497 ; 0x802497 <integralFBy+0x3>
4228: 6d 85 ldd r22, Y+13 ; 0x0d
422a: 7e 85 ldd r23, Y+14 ; 0x0e
422c: 8f 85 ldd r24, Y+15 ; 0x0f
422e: 98 89 ldd r25, Y+16 ; 0x10
4230: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
4234: 6d 87 std Y+13, r22 ; 0x0d
4236: 7e 87 std Y+14, r23 ; 0x0e
4238: 8f 87 std Y+15, r24 ; 0x0f
423a: 98 8b std Y+16, r25 ; 0x10
423c: 20 91 90 24 lds r18, 0x2490 ; 0x802490 <integralFBz>
4240: 30 91 91 24 lds r19, 0x2491 ; 0x802491 <integralFBz+0x1>
4244: 40 91 92 24 lds r20, 0x2492 ; 0x802492 <integralFBz+0x2>
4248: 50 91 93 24 lds r21, 0x2493 ; 0x802493 <integralFBz+0x3>
424c: 69 89 ldd r22, Y+17 ; 0x11
424e: 7a 89 ldd r23, Y+18 ; 0x12
4250: 8b 89 ldd r24, Y+19 ; 0x13
4252: 9c 89 ldd r25, Y+20 ; 0x14
4254: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
4258: 69 8b std Y+17, r22 ; 0x11
425a: 7a 8b std Y+18, r23 ; 0x12
425c: 8b 8b std Y+19, r24 ; 0x13
425e: 9c 8b std Y+20, r25 ; 0x14
4260: 18 c0 rjmp .+48 ; 0x4292 <__stack+0x293>
4262: 10 92 98 24 sts 0x2498, r1 ; 0x802498 <integralFBx>
4266: 10 92 99 24 sts 0x2499, r1 ; 0x802499 <integralFBx+0x1>
426a: 10 92 9a 24 sts 0x249A, r1 ; 0x80249a <integralFBx+0x2>
426e: 10 92 9b 24 sts 0x249B, r1 ; 0x80249b <integralFBx+0x3>
4272: 10 92 94 24 sts 0x2494, r1 ; 0x802494 <integralFBy>
4276: 10 92 95 24 sts 0x2495, r1 ; 0x802495 <integralFBy+0x1>
427a: 10 92 96 24 sts 0x2496, r1 ; 0x802496 <integralFBy+0x2>
427e: 10 92 97 24 sts 0x2497, r1 ; 0x802497 <integralFBy+0x3>
4282: 10 92 90 24 sts 0x2490, r1 ; 0x802490 <integralFBz>
4286: 10 92 91 24 sts 0x2491, r1 ; 0x802491 <integralFBz+0x1>
428a: 10 92 92 24 sts 0x2492, r1 ; 0x802492 <integralFBz+0x2>
428e: 10 92 93 24 sts 0x2493, r1 ; 0x802493 <integralFBz+0x3>
4292: 20 91 04 20 lds r18, 0x2004 ; 0x802004 <twoKp>
4296: 30 91 05 20 lds r19, 0x2005 ; 0x802005 <twoKp+0x1>
429a: 40 91 06 20 lds r20, 0x2006 ; 0x802006 <twoKp+0x2>
429e: 50 91 07 20 lds r21, 0x2007 ; 0x802007 <twoKp+0x3>
42a2: 69 a1 ldd r22, Y+33 ; 0x21
42a4: 7a a1 ldd r23, Y+34 ; 0x22
42a6: 8b a1 ldd r24, Y+35 ; 0x23
42a8: 9c a1 ldd r25, Y+36 ; 0x24
42aa: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
42ae: 9b 01 movw r18, r22
42b0: ac 01 movw r20, r24
42b2: 69 85 ldd r22, Y+9 ; 0x09
42b4: 7a 85 ldd r23, Y+10 ; 0x0a
42b6: 8b 85 ldd r24, Y+11 ; 0x0b
42b8: 9c 85 ldd r25, Y+12 ; 0x0c
42ba: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
42be: 69 87 std Y+9, r22 ; 0x09
42c0: 7a 87 std Y+10, r23 ; 0x0a
42c2: 8b 87 std Y+11, r24 ; 0x0b
42c4: 9c 87 std Y+12, r25 ; 0x0c
42c6: 20 91 04 20 lds r18, 0x2004 ; 0x802004 <twoKp>
42ca: 30 91 05 20 lds r19, 0x2005 ; 0x802005 <twoKp+0x1>
42ce: 40 91 06 20 lds r20, 0x2006 ; 0x802006 <twoKp+0x2>
42d2: 50 91 07 20 lds r21, 0x2007 ; 0x802007 <twoKp+0x3>
42d6: c5 01 movw r24, r10
42d8: b4 01 movw r22, r8
42da: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
42de: 9b 01 movw r18, r22
42e0: ac 01 movw r20, r24
42e2: 6d 85 ldd r22, Y+13 ; 0x0d
42e4: 7e 85 ldd r23, Y+14 ; 0x0e
42e6: 8f 85 ldd r24, Y+15 ; 0x0f
42e8: 98 89 ldd r25, Y+16 ; 0x10
42ea: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
42ee: 6d 87 std Y+13, r22 ; 0x0d
42f0: 7e 87 std Y+14, r23 ; 0x0e
42f2: 8f 87 std Y+15, r24 ; 0x0f
42f4: 98 8b std Y+16, r25 ; 0x10
42f6: 20 91 04 20 lds r18, 0x2004 ; 0x802004 <twoKp>
42fa: 30 91 05 20 lds r19, 0x2005 ; 0x802005 <twoKp+0x1>
42fe: 40 91 06 20 lds r20, 0x2006 ; 0x802006 <twoKp+0x2>
4302: 50 91 07 20 lds r21, 0x2007 ; 0x802007 <twoKp+0x3>
4306: c7 01 movw r24, r14
4308: b6 01 movw r22, r12
430a: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
430e: 9b 01 movw r18, r22
4310: ac 01 movw r20, r24
4312: 69 89 ldd r22, Y+17 ; 0x11
4314: 7a 89 ldd r23, Y+18 ; 0x12
4316: 8b 89 ldd r24, Y+19 ; 0x13
4318: 9c 89 ldd r25, Y+20 ; 0x14
431a: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
431e: 69 8b std Y+17, r22 ; 0x11
4320: 7a 8b std Y+18, r23 ; 0x12
4322: 8b 8b std Y+19, r24 ; 0x13
4324: 9c 8b std Y+20, r25 ; 0x14
4326: 2a ef ldi r18, 0xFA ; 250
4328: 39 ec ldi r19, 0xC9 ; 201
432a: 44 eb ldi r20, 0xB4 ; 180
432c: 58 e3 ldi r21, 0x38 ; 56
432e: 69 85 ldd r22, Y+9 ; 0x09
4330: 7a 85 ldd r23, Y+10 ; 0x0a
4332: 8b 85 ldd r24, Y+11 ; 0x0b
4334: 9c 85 ldd r25, Y+12 ; 0x0c
4336: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
433a: 69 87 std Y+9, r22 ; 0x09
433c: 7a 87 std Y+10, r23 ; 0x0a
433e: 8b 87 std Y+11, r24 ; 0x0b
4340: 9c 87 std Y+12, r25 ; 0x0c
4342: 2a ef ldi r18, 0xFA ; 250
4344: 39 ec ldi r19, 0xC9 ; 201
4346: 44 eb ldi r20, 0xB4 ; 180
4348: 58 e3 ldi r21, 0x38 ; 56
434a: 6d 85 ldd r22, Y+13 ; 0x0d
434c: 7e 85 ldd r23, Y+14 ; 0x0e
434e: 8f 85 ldd r24, Y+15 ; 0x0f
4350: 98 89 ldd r25, Y+16 ; 0x10
4352: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4356: 6d 87 std Y+13, r22 ; 0x0d
4358: 7e 87 std Y+14, r23 ; 0x0e
435a: 8f 87 std Y+15, r24 ; 0x0f
435c: 98 8b std Y+16, r25 ; 0x10
435e: 2a ef ldi r18, 0xFA ; 250
4360: 39 ec ldi r19, 0xC9 ; 201
4362: 44 eb ldi r20, 0xB4 ; 180
4364: 58 e3 ldi r21, 0x38 ; 56
4366: 69 89 ldd r22, Y+17 ; 0x11
4368: 7a 89 ldd r23, Y+18 ; 0x12
436a: 8b 89 ldd r24, Y+19 ; 0x13
436c: 9c 89 ldd r25, Y+20 ; 0x14
436e: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4372: 69 8b std Y+17, r22 ; 0x11
4374: 7a 8b std Y+18, r23 ; 0x12
4376: 8b 8b std Y+19, r24 ; 0x13
4378: 9c 8b std Y+20, r25 ; 0x14
437a: e0 90 00 20 lds r14, 0x2000 ; 0x802000 <__data_start>
437e: f0 90 01 20 lds r15, 0x2001 ; 0x802001 <__data_start+0x1>
4382: 00 91 02 20 lds r16, 0x2002 ; 0x802002 <__data_start+0x2>
4386: 10 91 03 20 lds r17, 0x2003 ; 0x802003 <__data_start+0x3>
438a: ed 82 std Y+5, r14 ; 0x05
438c: fe 82 std Y+6, r15 ; 0x06
438e: 0f 83 std Y+7, r16 ; 0x07
4390: 18 87 std Y+8, r17 ; 0x08
4392: 80 90 a4 24 lds r8, 0x24A4 ; 0x8024a4 <q1>
4396: 90 90 a5 24 lds r9, 0x24A5 ; 0x8024a5 <q1+0x1>
439a: a0 90 a6 24 lds r10, 0x24A6 ; 0x8024a6 <q1+0x2>
439e: b0 90 a7 24 lds r11, 0x24A7 ; 0x8024a7 <q1+0x3>
43a2: e0 90 a0 24 lds r14, 0x24A0 ; 0x8024a0 <q2>
43a6: f0 90 a1 24 lds r15, 0x24A1 ; 0x8024a1 <q2+0x1>
43aa: 00 91 a2 24 lds r16, 0x24A2 ; 0x8024a2 <q2+0x2>
43ae: 10 91 a3 24 lds r17, 0x24A3 ; 0x8024a3 <q2+0x3>
43b2: ed 8a std Y+21, r14 ; 0x15
43b4: fe 8a std Y+22, r15 ; 0x16
43b6: 0f 8b std Y+23, r16 ; 0x17
43b8: 18 8f std Y+24, r17 ; 0x18
43ba: 40 90 9c 24 lds r4, 0x249C ; 0x80249c <q3>
43be: 50 90 9d 24 lds r5, 0x249D ; 0x80249d <q3+0x1>
43c2: 60 90 9e 24 lds r6, 0x249E ; 0x80249e <q3+0x2>
43c6: 70 90 9f 24 lds r7, 0x249F ; 0x80249f <q3+0x3>
43ca: c0 90 00 20 lds r12, 0x2000 ; 0x802000 <__data_start>
43ce: d0 90 01 20 lds r13, 0x2001 ; 0x802001 <__data_start+0x1>
43d2: e0 90 02 20 lds r14, 0x2002 ; 0x802002 <__data_start+0x2>
43d6: f0 90 03 20 lds r15, 0x2003 ; 0x802003 <__data_start+0x3>
43da: c5 01 movw r24, r10
43dc: b4 01 movw r22, r8
43de: 90 58 subi r25, 0x80 ; 128
43e0: 29 85 ldd r18, Y+9 ; 0x09
43e2: 3a 85 ldd r19, Y+10 ; 0x0a
43e4: 4b 85 ldd r20, Y+11 ; 0x0b
43e6: 5c 85 ldd r21, Y+12 ; 0x0c
43e8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
43ec: 69 83 std Y+1, r22 ; 0x01
43ee: 7a 83 std Y+2, r23 ; 0x02
43f0: 8b 83 std Y+3, r24 ; 0x03
43f2: 9c 83 std Y+4, r25 ; 0x04
43f4: 2d 89 ldd r18, Y+21 ; 0x15
43f6: 3e 89 ldd r19, Y+22 ; 0x16
43f8: 4f 89 ldd r20, Y+23 ; 0x17
43fa: 58 8d ldd r21, Y+24 ; 0x18
43fc: 6d 85 ldd r22, Y+13 ; 0x0d
43fe: 7e 85 ldd r23, Y+14 ; 0x0e
4400: 8f 85 ldd r24, Y+15 ; 0x0f
4402: 98 89 ldd r25, Y+16 ; 0x10
4404: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4408: 9b 01 movw r18, r22
440a: ac 01 movw r20, r24
440c: 69 81 ldd r22, Y+1 ; 0x01
440e: 7a 81 ldd r23, Y+2 ; 0x02
4410: 8b 81 ldd r24, Y+3 ; 0x03
4412: 9c 81 ldd r25, Y+4 ; 0x04
4414: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
4418: 69 83 std Y+1, r22 ; 0x01
441a: 7a 83 std Y+2, r23 ; 0x02
441c: 8b 83 std Y+3, r24 ; 0x03
441e: 9c 83 std Y+4, r25 ; 0x04
4420: a3 01 movw r20, r6
4422: 92 01 movw r18, r4
4424: 69 89 ldd r22, Y+17 ; 0x11
4426: 7a 89 ldd r23, Y+18 ; 0x12
4428: 8b 89 ldd r24, Y+19 ; 0x13
442a: 9c 89 ldd r25, Y+20 ; 0x14
442c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4430: 9b 01 movw r18, r22
4432: ac 01 movw r20, r24
4434: 69 81 ldd r22, Y+1 ; 0x01
4436: 7a 81 ldd r23, Y+2 ; 0x02
4438: 8b 81 ldd r24, Y+3 ; 0x03
443a: 9c 81 ldd r25, Y+4 ; 0x04
443c: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
4440: a7 01 movw r20, r14
4442: 96 01 movw r18, r12
4444: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
4448: 60 93 00 20 sts 0x2000, r22 ; 0x802000 <__data_start>
444c: 70 93 01 20 sts 0x2001, r23 ; 0x802001 <__data_start+0x1>
4450: 80 93 02 20 sts 0x2002, r24 ; 0x802002 <__data_start+0x2>
4454: 90 93 03 20 sts 0x2003, r25 ; 0x802003 <__data_start+0x3>
4458: 40 90 9c 24 lds r4, 0x249C ; 0x80249c <q3>
445c: 50 90 9d 24 lds r5, 0x249D ; 0x80249d <q3+0x1>
4460: 60 90 9e 24 lds r6, 0x249E ; 0x80249e <q3+0x2>
4464: 70 90 9f 24 lds r7, 0x249F ; 0x80249f <q3+0x3>
4468: c0 90 a4 24 lds r12, 0x24A4 ; 0x8024a4 <q1>
446c: d0 90 a5 24 lds r13, 0x24A5 ; 0x8024a5 <q1+0x1>
4470: e0 90 a6 24 lds r14, 0x24A6 ; 0x8024a6 <q1+0x2>
4474: f0 90 a7 24 lds r15, 0x24A7 ; 0x8024a7 <q1+0x3>
4478: 2d 81 ldd r18, Y+5 ; 0x05
447a: 3e 81 ldd r19, Y+6 ; 0x06
447c: 4f 81 ldd r20, Y+7 ; 0x07
447e: 58 85 ldd r21, Y+8 ; 0x08
4480: 69 85 ldd r22, Y+9 ; 0x09
4482: 7a 85 ldd r23, Y+10 ; 0x0a
4484: 8b 85 ldd r24, Y+11 ; 0x0b
4486: 9c 85 ldd r25, Y+12 ; 0x0c
4488: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
448c: 69 83 std Y+1, r22 ; 0x01
448e: 7a 83 std Y+2, r23 ; 0x02
4490: 8b 83 std Y+3, r24 ; 0x03
4492: 9c 83 std Y+4, r25 ; 0x04
4494: 2d 89 ldd r18, Y+21 ; 0x15
4496: 3e 89 ldd r19, Y+22 ; 0x16
4498: 4f 89 ldd r20, Y+23 ; 0x17
449a: 58 8d ldd r21, Y+24 ; 0x18
449c: 69 89 ldd r22, Y+17 ; 0x11
449e: 7a 89 ldd r23, Y+18 ; 0x12
44a0: 8b 89 ldd r24, Y+19 ; 0x13
44a2: 9c 89 ldd r25, Y+20 ; 0x14
44a4: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
44a8: 9b 01 movw r18, r22
44aa: ac 01 movw r20, r24
44ac: 69 81 ldd r22, Y+1 ; 0x01
44ae: 7a 81 ldd r23, Y+2 ; 0x02
44b0: 8b 81 ldd r24, Y+3 ; 0x03
44b2: 9c 81 ldd r25, Y+4 ; 0x04
44b4: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
44b8: 69 83 std Y+1, r22 ; 0x01
44ba: 7a 83 std Y+2, r23 ; 0x02
44bc: 8b 83 std Y+3, r24 ; 0x03
44be: 9c 83 std Y+4, r25 ; 0x04
44c0: a3 01 movw r20, r6
44c2: 92 01 movw r18, r4
44c4: 6d 85 ldd r22, Y+13 ; 0x0d
44c6: 7e 85 ldd r23, Y+14 ; 0x0e
44c8: 8f 85 ldd r24, Y+15 ; 0x0f
44ca: 98 89 ldd r25, Y+16 ; 0x10
44cc: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
44d0: 9b 01 movw r18, r22
44d2: ac 01 movw r20, r24
44d4: 69 81 ldd r22, Y+1 ; 0x01
44d6: 7a 81 ldd r23, Y+2 ; 0x02
44d8: 8b 81 ldd r24, Y+3 ; 0x03
44da: 9c 81 ldd r25, Y+4 ; 0x04
44dc: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
44e0: a7 01 movw r20, r14
44e2: 96 01 movw r18, r12
44e4: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
44e8: 60 93 a4 24 sts 0x24A4, r22 ; 0x8024a4 <q1>
44ec: 70 93 a5 24 sts 0x24A5, r23 ; 0x8024a5 <q1+0x1>
44f0: 80 93 a6 24 sts 0x24A6, r24 ; 0x8024a6 <q1+0x2>
44f4: 90 93 a7 24 sts 0x24A7, r25 ; 0x8024a7 <q1+0x3>
44f8: 40 90 9c 24 lds r4, 0x249C ; 0x80249c <q3>
44fc: 50 90 9d 24 lds r5, 0x249D ; 0x80249d <q3+0x1>
4500: 60 90 9e 24 lds r6, 0x249E ; 0x80249e <q3+0x2>
4504: 70 90 9f 24 lds r7, 0x249F ; 0x80249f <q3+0x3>
4508: c0 90 a0 24 lds r12, 0x24A0 ; 0x8024a0 <q2>
450c: d0 90 a1 24 lds r13, 0x24A1 ; 0x8024a1 <q2+0x1>
4510: e0 90 a2 24 lds r14, 0x24A2 ; 0x8024a2 <q2+0x2>
4514: f0 90 a3 24 lds r15, 0x24A3 ; 0x8024a3 <q2+0x3>
4518: 2d 81 ldd r18, Y+5 ; 0x05
451a: 3e 81 ldd r19, Y+6 ; 0x06
451c: 4f 81 ldd r20, Y+7 ; 0x07
451e: 58 85 ldd r21, Y+8 ; 0x08
4520: 6d 85 ldd r22, Y+13 ; 0x0d
4522: 7e 85 ldd r23, Y+14 ; 0x0e
4524: 8f 85 ldd r24, Y+15 ; 0x0f
4526: 98 89 ldd r25, Y+16 ; 0x10
4528: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
452c: 69 83 std Y+1, r22 ; 0x01
452e: 7a 83 std Y+2, r23 ; 0x02
4530: 8b 83 std Y+3, r24 ; 0x03
4532: 9c 83 std Y+4, r25 ; 0x04
4534: a5 01 movw r20, r10
4536: 94 01 movw r18, r8
4538: 69 89 ldd r22, Y+17 ; 0x11
453a: 7a 89 ldd r23, Y+18 ; 0x12
453c: 8b 89 ldd r24, Y+19 ; 0x13
453e: 9c 89 ldd r25, Y+20 ; 0x14
4540: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4544: 9b 01 movw r18, r22
4546: ac 01 movw r20, r24
4548: 69 81 ldd r22, Y+1 ; 0x01
454a: 7a 81 ldd r23, Y+2 ; 0x02
454c: 8b 81 ldd r24, Y+3 ; 0x03
454e: 9c 81 ldd r25, Y+4 ; 0x04
4550: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
4554: 69 83 std Y+1, r22 ; 0x01
4556: 7a 83 std Y+2, r23 ; 0x02
4558: 8b 83 std Y+3, r24 ; 0x03
455a: 9c 83 std Y+4, r25 ; 0x04
455c: a3 01 movw r20, r6
455e: 92 01 movw r18, r4
4560: 69 85 ldd r22, Y+9 ; 0x09
4562: 7a 85 ldd r23, Y+10 ; 0x0a
4564: 8b 85 ldd r24, Y+11 ; 0x0b
4566: 9c 85 ldd r25, Y+12 ; 0x0c
4568: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
456c: 9b 01 movw r18, r22
456e: ac 01 movw r20, r24
4570: 69 81 ldd r22, Y+1 ; 0x01
4572: 7a 81 ldd r23, Y+2 ; 0x02
4574: 8b 81 ldd r24, Y+3 ; 0x03
4576: 9c 81 ldd r25, Y+4 ; 0x04
4578: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
457c: a7 01 movw r20, r14
457e: 96 01 movw r18, r12
4580: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
4584: 60 93 a0 24 sts 0x24A0, r22 ; 0x8024a0 <q2>
4588: 70 93 a1 24 sts 0x24A1, r23 ; 0x8024a1 <q2+0x1>
458c: 80 93 a2 24 sts 0x24A2, r24 ; 0x8024a2 <q2+0x2>
4590: 90 93 a3 24 sts 0x24A3, r25 ; 0x8024a3 <q2+0x3>
4594: c0 90 9c 24 lds r12, 0x249C ; 0x80249c <q3>
4598: d0 90 9d 24 lds r13, 0x249D ; 0x80249d <q3+0x1>
459c: e0 90 9e 24 lds r14, 0x249E ; 0x80249e <q3+0x2>
45a0: f0 90 9f 24 lds r15, 0x249F ; 0x80249f <q3+0x3>
45a4: 2d 81 ldd r18, Y+5 ; 0x05
45a6: 3e 81 ldd r19, Y+6 ; 0x06
45a8: 4f 81 ldd r20, Y+7 ; 0x07
45aa: 58 85 ldd r21, Y+8 ; 0x08
45ac: 69 89 ldd r22, Y+17 ; 0x11
45ae: 7a 89 ldd r23, Y+18 ; 0x12
45b0: 8b 89 ldd r24, Y+19 ; 0x13
45b2: 9c 89 ldd r25, Y+20 ; 0x14
45b4: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
45b8: 2b 01 movw r4, r22
45ba: 3c 01 movw r6, r24
45bc: a5 01 movw r20, r10
45be: 94 01 movw r18, r8
45c0: 6d 85 ldd r22, Y+13 ; 0x0d
45c2: 7e 85 ldd r23, Y+14 ; 0x0e
45c4: 8f 85 ldd r24, Y+15 ; 0x0f
45c6: 98 89 ldd r25, Y+16 ; 0x10
45c8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
45cc: 9b 01 movw r18, r22
45ce: ac 01 movw r20, r24
45d0: c3 01 movw r24, r6
45d2: b2 01 movw r22, r4
45d4: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
45d8: 4b 01 movw r8, r22
45da: 5c 01 movw r10, r24
45dc: 2d 89 ldd r18, Y+21 ; 0x15
45de: 3e 89 ldd r19, Y+22 ; 0x16
45e0: 4f 89 ldd r20, Y+23 ; 0x17
45e2: 58 8d ldd r21, Y+24 ; 0x18
45e4: 69 85 ldd r22, Y+9 ; 0x09
45e6: 7a 85 ldd r23, Y+10 ; 0x0a
45e8: 8b 85 ldd r24, Y+11 ; 0x0b
45ea: 9c 85 ldd r25, Y+12 ; 0x0c
45ec: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
45f0: 9b 01 movw r18, r22
45f2: ac 01 movw r20, r24
45f4: c5 01 movw r24, r10
45f6: b4 01 movw r22, r8
45f8: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
45fc: a7 01 movw r20, r14
45fe: 96 01 movw r18, r12
4600: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
4604: 60 93 9c 24 sts 0x249C, r22 ; 0x80249c <q3>
4608: 70 93 9d 24 sts 0x249D, r23 ; 0x80249d <q3+0x1>
460c: 80 93 9e 24 sts 0x249E, r24 ; 0x80249e <q3+0x2>
4610: 90 93 9f 24 sts 0x249F, r25 ; 0x80249f <q3+0x3>
4614: 60 91 00 20 lds r22, 0x2000 ; 0x802000 <__data_start>
4618: 70 91 01 20 lds r23, 0x2001 ; 0x802001 <__data_start+0x1>
461c: 80 91 02 20 lds r24, 0x2002 ; 0x802002 <__data_start+0x2>
4620: 90 91 03 20 lds r25, 0x2003 ; 0x802003 <__data_start+0x3>
4624: 20 91 00 20 lds r18, 0x2000 ; 0x802000 <__data_start>
4628: 30 91 01 20 lds r19, 0x2001 ; 0x802001 <__data_start+0x1>
462c: 40 91 02 20 lds r20, 0x2002 ; 0x802002 <__data_start+0x2>
4630: 50 91 03 20 lds r21, 0x2003 ; 0x802003 <__data_start+0x3>
4634: 80 90 a4 24 lds r8, 0x24A4 ; 0x8024a4 <q1>
4638: 90 90 a5 24 lds r9, 0x24A5 ; 0x8024a5 <q1+0x1>
463c: a0 90 a6 24 lds r10, 0x24A6 ; 0x8024a6 <q1+0x2>
4640: b0 90 a7 24 lds r11, 0x24A7 ; 0x8024a7 <q1+0x3>
4644: 40 90 a4 24 lds r4, 0x24A4 ; 0x8024a4 <q1>
4648: 50 90 a5 24 lds r5, 0x24A5 ; 0x8024a5 <q1+0x1>
464c: 60 90 a6 24 lds r6, 0x24A6 ; 0x8024a6 <q1+0x2>
4650: 70 90 a7 24 lds r7, 0x24A7 ; 0x8024a7 <q1+0x3>
4654: e0 90 a0 24 lds r14, 0x24A0 ; 0x8024a0 <q2>
4658: f0 90 a1 24 lds r15, 0x24A1 ; 0x8024a1 <q2+0x1>
465c: 00 91 a2 24 lds r16, 0x24A2 ; 0x8024a2 <q2+0x2>
4660: 10 91 a3 24 lds r17, 0x24A3 ; 0x8024a3 <q2+0x3>
4664: e9 86 std Y+9, r14 ; 0x09
4666: fa 86 std Y+10, r15 ; 0x0a
4668: 0b 87 std Y+11, r16 ; 0x0b
466a: 1c 87 std Y+12, r17 ; 0x0c
466c: e0 90 a0 24 lds r14, 0x24A0 ; 0x8024a0 <q2>
4670: f0 90 a1 24 lds r15, 0x24A1 ; 0x8024a1 <q2+0x1>
4674: 00 91 a2 24 lds r16, 0x24A2 ; 0x8024a2 <q2+0x2>
4678: 10 91 a3 24 lds r17, 0x24A3 ; 0x8024a3 <q2+0x3>
467c: ed 86 std Y+13, r14 ; 0x0d
467e: fe 86 std Y+14, r15 ; 0x0e
4680: 0f 87 std Y+15, r16 ; 0x0f
4682: 18 8b std Y+16, r17 ; 0x10
4684: e0 90 9c 24 lds r14, 0x249C ; 0x80249c <q3>
4688: f0 90 9d 24 lds r15, 0x249D ; 0x80249d <q3+0x1>
468c: 00 91 9e 24 lds r16, 0x249E ; 0x80249e <q3+0x2>
4690: 10 91 9f 24 lds r17, 0x249F ; 0x80249f <q3+0x3>
4694: e9 82 std Y+1, r14 ; 0x01
4696: fa 82 std Y+2, r15 ; 0x02
4698: 0b 83 std Y+3, r16 ; 0x03
469a: 1c 83 std Y+4, r17 ; 0x04
469c: e0 90 9c 24 lds r14, 0x249C ; 0x80249c <q3>
46a0: f0 90 9d 24 lds r15, 0x249D ; 0x80249d <q3+0x1>
46a4: 00 91 9e 24 lds r16, 0x249E ; 0x80249e <q3+0x2>
46a8: 10 91 9f 24 lds r17, 0x249F ; 0x80249f <q3+0x3>
46ac: e9 8a std Y+17, r14 ; 0x11
46ae: fa 8a std Y+18, r15 ; 0x12
46b0: 0b 8b std Y+19, r16 ; 0x13
46b2: 1c 8b std Y+20, r17 ; 0x14
46b4: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
46b8: 6b 01 movw r12, r22
46ba: 7c 01 movw r14, r24
46bc: a3 01 movw r20, r6
46be: 92 01 movw r18, r4
46c0: c5 01 movw r24, r10
46c2: b4 01 movw r22, r8
46c4: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
46c8: 9b 01 movw r18, r22
46ca: ac 01 movw r20, r24
46cc: c7 01 movw r24, r14
46ce: b6 01 movw r22, r12
46d0: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
46d4: 4b 01 movw r8, r22
46d6: 5c 01 movw r10, r24
46d8: 2d 85 ldd r18, Y+13 ; 0x0d
46da: 3e 85 ldd r19, Y+14 ; 0x0e
46dc: 4f 85 ldd r20, Y+15 ; 0x0f
46de: 58 89 ldd r21, Y+16 ; 0x10
46e0: 69 85 ldd r22, Y+9 ; 0x09
46e2: 7a 85 ldd r23, Y+10 ; 0x0a
46e4: 8b 85 ldd r24, Y+11 ; 0x0b
46e6: 9c 85 ldd r25, Y+12 ; 0x0c
46e8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
46ec: 9b 01 movw r18, r22
46ee: ac 01 movw r20, r24
46f0: c5 01 movw r24, r10
46f2: b4 01 movw r22, r8
46f4: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
46f8: 4b 01 movw r8, r22
46fa: 5c 01 movw r10, r24
46fc: 29 89 ldd r18, Y+17 ; 0x11
46fe: 3a 89 ldd r19, Y+18 ; 0x12
4700: 4b 89 ldd r20, Y+19 ; 0x13
4702: 5c 89 ldd r21, Y+20 ; 0x14
4704: 69 81 ldd r22, Y+1 ; 0x01
4706: 7a 81 ldd r23, Y+2 ; 0x02
4708: 8b 81 ldd r24, Y+3 ; 0x03
470a: 9c 81 ldd r25, Y+4 ; 0x04
470c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4710: 9b 01 movw r18, r22
4712: ac 01 movw r20, r24
4714: c5 01 movw r24, r10
4716: b4 01 movw r22, r8
4718: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
471c: 4b 01 movw r8, r22
471e: 5c 01 movw r10, r24
4720: b5 94 asr r11
4722: a7 94 ror r10
4724: 97 94 ror r9
4726: 87 94 ror r8
4728: 0f 2e mov r0, r31
472a: ff ed ldi r31, 0xDF ; 223
472c: cf 2e mov r12, r31
472e: f9 e5 ldi r31, 0x59 ; 89
4730: df 2e mov r13, r31
4732: f7 e3 ldi r31, 0x37 ; 55
4734: ef 2e mov r14, r31
4736: ff e5 ldi r31, 0x5F ; 95
4738: ff 2e mov r15, r31
473a: f0 2d mov r31, r0
473c: c8 18 sub r12, r8
473e: d9 08 sbc r13, r9
4740: ea 08 sbc r14, r10
4742: fb 08 sbc r15, r11
4744: 20 e0 ldi r18, 0x00 ; 0
4746: 30 e0 ldi r19, 0x00 ; 0
4748: 40 e0 ldi r20, 0x00 ; 0
474a: 5f e3 ldi r21, 0x3F ; 63
474c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4750: a7 01 movw r20, r14
4752: 96 01 movw r18, r12
4754: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4758: a7 01 movw r20, r14
475a: 96 01 movw r18, r12
475c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4760: 9b 01 movw r18, r22
4762: ac 01 movw r20, r24
4764: 60 e0 ldi r22, 0x00 ; 0
4766: 70 e0 ldi r23, 0x00 ; 0
4768: 80 ec ldi r24, 0xC0 ; 192
476a: 9f e3 ldi r25, 0x3F ; 63
476c: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
4770: a7 01 movw r20, r14
4772: 96 01 movw r18, r12
4774: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4778: 6b 01 movw r12, r22
477a: 7c 01 movw r14, r24
477c: 60 91 00 20 lds r22, 0x2000 ; 0x802000 <__data_start>
4780: 70 91 01 20 lds r23, 0x2001 ; 0x802001 <__data_start+0x1>
4784: 80 91 02 20 lds r24, 0x2002 ; 0x802002 <__data_start+0x2>
4788: 90 91 03 20 lds r25, 0x2003 ; 0x802003 <__data_start+0x3>
478c: a7 01 movw r20, r14
478e: 96 01 movw r18, r12
4790: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4794: 60 93 00 20 sts 0x2000, r22 ; 0x802000 <__data_start>
4798: 70 93 01 20 sts 0x2001, r23 ; 0x802001 <__data_start+0x1>
479c: 80 93 02 20 sts 0x2002, r24 ; 0x802002 <__data_start+0x2>
47a0: 90 93 03 20 sts 0x2003, r25 ; 0x802003 <__data_start+0x3>
47a4: 60 91 a4 24 lds r22, 0x24A4 ; 0x8024a4 <q1>
47a8: 70 91 a5 24 lds r23, 0x24A5 ; 0x8024a5 <q1+0x1>
47ac: 80 91 a6 24 lds r24, 0x24A6 ; 0x8024a6 <q1+0x2>
47b0: 90 91 a7 24 lds r25, 0x24A7 ; 0x8024a7 <q1+0x3>
47b4: a7 01 movw r20, r14
47b6: 96 01 movw r18, r12
47b8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
47bc: 60 93 a4 24 sts 0x24A4, r22 ; 0x8024a4 <q1>
47c0: 70 93 a5 24 sts 0x24A5, r23 ; 0x8024a5 <q1+0x1>
47c4: 80 93 a6 24 sts 0x24A6, r24 ; 0x8024a6 <q1+0x2>
47c8: 90 93 a7 24 sts 0x24A7, r25 ; 0x8024a7 <q1+0x3>
47cc: 60 91 a0 24 lds r22, 0x24A0 ; 0x8024a0 <q2>
47d0: 70 91 a1 24 lds r23, 0x24A1 ; 0x8024a1 <q2+0x1>
47d4: 80 91 a2 24 lds r24, 0x24A2 ; 0x8024a2 <q2+0x2>
47d8: 90 91 a3 24 lds r25, 0x24A3 ; 0x8024a3 <q2+0x3>
47dc: a7 01 movw r20, r14
47de: 96 01 movw r18, r12
47e0: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
47e4: 60 93 a0 24 sts 0x24A0, r22 ; 0x8024a0 <q2>
47e8: 70 93 a1 24 sts 0x24A1, r23 ; 0x8024a1 <q2+0x1>
47ec: 80 93 a2 24 sts 0x24A2, r24 ; 0x8024a2 <q2+0x2>
47f0: 90 93 a3 24 sts 0x24A3, r25 ; 0x8024a3 <q2+0x3>
47f4: 60 91 9c 24 lds r22, 0x249C ; 0x80249c <q3>
47f8: 70 91 9d 24 lds r23, 0x249D ; 0x80249d <q3+0x1>
47fc: 80 91 9e 24 lds r24, 0x249E ; 0x80249e <q3+0x2>
4800: 90 91 9f 24 lds r25, 0x249F ; 0x80249f <q3+0x3>
4804: a7 01 movw r20, r14
4806: 96 01 movw r18, r12
4808: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
480c: 60 93 9c 24 sts 0x249C, r22 ; 0x80249c <q3>
4810: 70 93 9d 24 sts 0x249D, r23 ; 0x80249d <q3+0x1>
4814: 80 93 9e 24 sts 0x249E, r24 ; 0x80249e <q3+0x2>
4818: 90 93 9f 24 sts 0x249F, r25 ; 0x80249f <q3+0x3>
481c: a4 96 adiw r28, 0x24 ; 36
481e: cd bf out 0x3d, r28 ; 61
4820: de bf out 0x3e, r29 ; 62
4822: df 91 pop r29
4824: cf 91 pop r28
4826: 1f 91 pop r17
4828: 0f 91 pop r16
482a: ff 90 pop r15
482c: ef 90 pop r14
482e: df 90 pop r13
4830: cf 90 pop r12
4832: bf 90 pop r11
4834: af 90 pop r10
4836: 9f 90 pop r9
4838: 8f 90 pop r8
483a: 7f 90 pop r7
483c: 6f 90 pop r6
483e: 5f 90 pop r5
4840: 4f 90 pop r4
4842: 08 95 ret
00004844 <MahonyAHRSupdate>:
4844: 2f 92 push r2
4846: 3f 92 push r3
4848: 4f 92 push r4
484a: 5f 92 push r5
484c: 6f 92 push r6
484e: 7f 92 push r7
4850: 8f 92 push r8
4852: 9f 92 push r9
4854: af 92 push r10
4856: bf 92 push r11
4858: cf 92 push r12
485a: df 92 push r13
485c: ef 92 push r14
485e: ff 92 push r15
4860: 0f 93 push r16
4862: 1f 93 push r17
4864: cf 93 push r28
4866: df 93 push r29
4868: cd b7 in r28, 0x3d ; 61
486a: de b7 in r29, 0x3e ; 62
486c: c8 55 subi r28, 0x58 ; 88
486e: d1 09 sbc r29, r1
4870: cd bf out 0x3d, r28 ; 61
4872: de bf out 0x3e, r29 ; 62
4874: 69 8b std Y+17, r22 ; 0x11
4876: 7a 8b std Y+18, r23 ; 0x12
4878: 8b 8b std Y+19, r24 ; 0x13
487a: 9c 8b std Y+20, r25 ; 0x14
487c: 29 8f std Y+25, r18 ; 0x19
487e: 3a 8f std Y+26, r19 ; 0x1a
4880: 4b 8f std Y+27, r20 ; 0x1b
4882: 5c 8f std Y+28, r21 ; 0x1c
4884: e9 82 std Y+1, r14 ; 0x01
4886: fa 82 std Y+2, r15 ; 0x02
4888: 0b 83 std Y+3, r16 ; 0x03
488a: 1c 83 std Y+4, r17 ; 0x04
488c: af 96 adiw r28, 0x2f ; 47
488e: ff ac ldd r15, Y+63 ; 0x3f
4890: af 97 sbiw r28, 0x2f ; 47
4892: e0 96 adiw r28, 0x30 ; 48
4894: ef ac ldd r14, Y+63 ; 0x3f
4896: e0 97 sbiw r28, 0x30 ; 48
4898: e1 96 adiw r28, 0x31 ; 49
489a: 9f ac ldd r9, Y+63 ; 0x3f
489c: e1 97 sbiw r28, 0x31 ; 49
489e: e2 96 adiw r28, 0x32 ; 50
48a0: 8f ac ldd r8, Y+63 ; 0x3f
48a2: e2 97 sbiw r28, 0x32 ; 50
48a4: e3 96 adiw r28, 0x33 ; 51
48a6: 1f ad ldd r17, Y+63 ; 0x3f
48a8: e3 97 sbiw r28, 0x33 ; 51
48aa: e4 96 adiw r28, 0x34 ; 52
48ac: 0f ad ldd r16, Y+63 ; 0x3f
48ae: e4 97 sbiw r28, 0x34 ; 52
48b0: e5 96 adiw r28, 0x35 ; 53
48b2: 3f ac ldd r3, Y+63 ; 0x3f
48b4: e5 97 sbiw r28, 0x35 ; 53
48b6: e6 96 adiw r28, 0x36 ; 54
48b8: 2f ac ldd r2, Y+63 ; 0x3f
48ba: e6 97 sbiw r28, 0x36 ; 54
48bc: 20 e0 ldi r18, 0x00 ; 0
48be: 30 e0 ldi r19, 0x00 ; 0
48c0: a9 01 movw r20, r18
48c2: ea 96 adiw r28, 0x3a ; 58
48c4: 6c ad ldd r22, Y+60 ; 0x3c
48c6: 7d ad ldd r23, Y+61 ; 0x3d
48c8: 8e ad ldd r24, Y+62 ; 0x3e
48ca: 9f ad ldd r25, Y+63 ; 0x3f
48cc: ea 97 sbiw r28, 0x3a ; 58
48ce: 0e 94 b1 32 call 0x6562 ; 0x6562 <__cmpsf2>
48d2: 81 11 cpse r24, r1
48d4: 35 c0 rjmp .+106 ; 0x4940 <MahonyAHRSupdate+0xfc>
48d6: 20 e0 ldi r18, 0x00 ; 0
48d8: 30 e0 ldi r19, 0x00 ; 0
48da: a9 01 movw r20, r18
48dc: ee 96 adiw r28, 0x3e ; 62
48de: 6c ad ldd r22, Y+60 ; 0x3c
48e0: 7d ad ldd r23, Y+61 ; 0x3d
48e2: 8e ad ldd r24, Y+62 ; 0x3e
48e4: 9f ad ldd r25, Y+63 ; 0x3f
48e6: ee 97 sbiw r28, 0x3e ; 62
48e8: 0e 94 b1 32 call 0x6562 ; 0x6562 <__cmpsf2>
48ec: 81 11 cpse r24, r1
48ee: 28 c0 rjmp .+80 ; 0x4940 <MahonyAHRSupdate+0xfc>
48f0: 20 e0 ldi r18, 0x00 ; 0
48f2: 30 e0 ldi r19, 0x00 ; 0
48f4: a9 01 movw r20, r18
48f6: c2 58 subi r28, 0x82 ; 130
48f8: df 4f sbci r29, 0xFF ; 255
48fa: 68 81 ld r22, Y
48fc: 79 81 ldd r23, Y+1 ; 0x01
48fe: 8a 81 ldd r24, Y+2 ; 0x02
4900: 9b 81 ldd r25, Y+3 ; 0x03
4902: ce 57 subi r28, 0x7E ; 126
4904: d0 40 sbci r29, 0x00 ; 0
4906: 0e 94 b1 32 call 0x6562 ; 0x6562 <__cmpsf2>
490a: 81 11 cpse r24, r1
490c: 19 c0 rjmp .+50 ; 0x4940 <MahonyAHRSupdate+0xfc>
490e: 2f 92 push r2
4910: 3f 92 push r3
4912: 0f 93 push r16
4914: 1f 93 push r17
4916: 8f 92 push r8
4918: 9f 92 push r9
491a: ef 92 push r14
491c: ff 92 push r15
491e: e9 80 ldd r14, Y+1 ; 0x01
4920: fa 80 ldd r15, Y+2 ; 0x02
4922: 0b 81 ldd r16, Y+3 ; 0x03
4924: 1c 81 ldd r17, Y+4 ; 0x04
4926: 29 8d ldd r18, Y+25 ; 0x19
4928: 3a 8d ldd r19, Y+26 ; 0x1a
492a: 4b 8d ldd r20, Y+27 ; 0x1b
492c: 5c 8d ldd r21, Y+28 ; 0x1c
492e: 69 89 ldd r22, Y+17 ; 0x11
4930: 7a 89 ldd r23, Y+18 ; 0x12
4932: 8b 89 ldd r24, Y+19 ; 0x13
4934: 9c 89 ldd r25, Y+20 ; 0x14
4936: 2d da rcall .-2982 ; 0x3d92 <MahonyAHRSupdateIMU>
4938: cd bf out 0x3d, r28 ; 61
493a: de bf out 0x3e, r29 ; 62
493c: 0c 94 b3 2c jmp 0x5966 ; 0x5966 <MahonyAHRSupdate+0x1122>
4940: 20 e0 ldi r18, 0x00 ; 0
4942: 30 e0 ldi r19, 0x00 ; 0
4944: a9 01 movw r20, r18
4946: c6 01 movw r24, r12
4948: b5 01 movw r22, r10
494a: 0e 94 b1 32 call 0x6562 ; 0x6562 <__cmpsf2>
494e: 81 11 cpse r24, r1
4950: 17 c0 rjmp .+46 ; 0x4980 <MahonyAHRSupdate+0x13c>
4952: 20 e0 ldi r18, 0x00 ; 0
4954: 30 e0 ldi r19, 0x00 ; 0
4956: a9 01 movw r20, r18
4958: 6f 2d mov r22, r15
495a: 7e 2d mov r23, r14
495c: 89 2d mov r24, r9
495e: 98 2d mov r25, r8
4960: 0e 94 b1 32 call 0x6562 ; 0x6562 <__cmpsf2>
4964: 81 11 cpse r24, r1
4966: 0c c0 rjmp .+24 ; 0x4980 <MahonyAHRSupdate+0x13c>
4968: 20 e0 ldi r18, 0x00 ; 0
496a: 30 e0 ldi r19, 0x00 ; 0
496c: a9 01 movw r20, r18
496e: 61 2f mov r22, r17
4970: 70 2f mov r23, r16
4972: 83 2d mov r24, r3
4974: 92 2d mov r25, r2
4976: 0e 94 b1 32 call 0x6562 ; 0x6562 <__cmpsf2>
497a: 88 23 and r24, r24
497c: 09 f4 brne .+2 ; 0x4980 <MahonyAHRSupdate+0x13c>
497e: 89 c5 rjmp .+2834 ; 0x5492 <MahonyAHRSupdate+0xc4e>
4980: a6 01 movw r20, r12
4982: 95 01 movw r18, r10
4984: c6 01 movw r24, r12
4986: b5 01 movw r22, r10
4988: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
498c: 2b 01 movw r4, r22
498e: 3c 01 movw r6, r24
4990: 2f 2d mov r18, r15
4992: 3e 2d mov r19, r14
4994: 49 2d mov r20, r9
4996: 58 2d mov r21, r8
4998: 6f 2d mov r22, r15
499a: 7e 2d mov r23, r14
499c: 89 2d mov r24, r9
499e: 98 2d mov r25, r8
49a0: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
49a4: 9b 01 movw r18, r22
49a6: ac 01 movw r20, r24
49a8: c3 01 movw r24, r6
49aa: b2 01 movw r22, r4
49ac: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
49b0: 2b 01 movw r4, r22
49b2: 3c 01 movw r6, r24
49b4: 21 2f mov r18, r17
49b6: 30 2f mov r19, r16
49b8: 43 2d mov r20, r3
49ba: 52 2d mov r21, r2
49bc: 61 2f mov r22, r17
49be: 70 2f mov r23, r16
49c0: 83 2d mov r24, r3
49c2: 92 2d mov r25, r2
49c4: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
49c8: 9b 01 movw r18, r22
49ca: ac 01 movw r20, r24
49cc: c3 01 movw r24, r6
49ce: b2 01 movw r22, r4
49d0: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
49d4: 2b 01 movw r4, r22
49d6: 3c 01 movw r6, r24
49d8: 75 94 asr r7
49da: 67 94 ror r6
49dc: 57 94 ror r5
49de: 47 94 ror r4
49e0: 2f ed ldi r18, 0xDF ; 223
49e2: 39 e5 ldi r19, 0x59 ; 89
49e4: 47 e3 ldi r20, 0x37 ; 55
49e6: 5f e5 ldi r21, 0x5F ; 95
49e8: 24 19 sub r18, r4
49ea: 35 09 sbc r19, r5
49ec: 46 09 sbc r20, r6
49ee: 57 09 sbc r21, r7
49f0: 29 01 movw r4, r18
49f2: 3a 01 movw r6, r20
49f4: 20 e0 ldi r18, 0x00 ; 0
49f6: 30 e0 ldi r19, 0x00 ; 0
49f8: 40 e0 ldi r20, 0x00 ; 0
49fa: 5f e3 ldi r21, 0x3F ; 63
49fc: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4a00: a3 01 movw r20, r6
4a02: 92 01 movw r18, r4
4a04: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4a08: a3 01 movw r20, r6
4a0a: 92 01 movw r18, r4
4a0c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4a10: 9b 01 movw r18, r22
4a12: ac 01 movw r20, r24
4a14: 60 e0 ldi r22, 0x00 ; 0
4a16: 70 e0 ldi r23, 0x00 ; 0
4a18: 80 ec ldi r24, 0xC0 ; 192
4a1a: 9f e3 ldi r25, 0x3F ; 63
4a1c: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
4a20: a3 01 movw r20, r6
4a22: 92 01 movw r18, r4
4a24: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4a28: 2b 01 movw r4, r22
4a2a: 3c 01 movw r6, r24
4a2c: 9b 01 movw r18, r22
4a2e: ac 01 movw r20, r24
4a30: c6 01 movw r24, r12
4a32: b5 01 movw r22, r10
4a34: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4a38: 6d ab std Y+53, r22 ; 0x35
4a3a: 7e ab std Y+54, r23 ; 0x36
4a3c: 8f ab std Y+55, r24 ; 0x37
4a3e: 98 af std Y+56, r25 ; 0x38
4a40: a3 01 movw r20, r6
4a42: 92 01 movw r18, r4
4a44: 6f 2d mov r22, r15
4a46: 7e 2d mov r23, r14
4a48: 89 2d mov r24, r9
4a4a: 98 2d mov r25, r8
4a4c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4a50: 69 af std Y+57, r22 ; 0x39
4a52: 7a af std Y+58, r23 ; 0x3a
4a54: 8b af std Y+59, r24 ; 0x3b
4a56: 9c af std Y+60, r25 ; 0x3c
4a58: a3 01 movw r20, r6
4a5a: 92 01 movw r18, r4
4a5c: 61 2f mov r22, r17
4a5e: 70 2f mov r23, r16
4a60: 83 2d mov r24, r3
4a62: 92 2d mov r25, r2
4a64: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4a68: 21 96 adiw r28, 0x01 ; 1
4a6a: 6c af std Y+60, r22 ; 0x3c
4a6c: 7d af std Y+61, r23 ; 0x3d
4a6e: 8e af std Y+62, r24 ; 0x3e
4a70: 9f af std Y+63, r25 ; 0x3f
4a72: 21 97 sbiw r28, 0x01 ; 1
4a74: ea 96 adiw r28, 0x3a ; 58
4a76: 2c ad ldd r18, Y+60 ; 0x3c
4a78: 3d ad ldd r19, Y+61 ; 0x3d
4a7a: 4e ad ldd r20, Y+62 ; 0x3e
4a7c: 5f ad ldd r21, Y+63 ; 0x3f
4a7e: ea 97 sbiw r28, 0x3a ; 58
4a80: ca 01 movw r24, r20
4a82: b9 01 movw r22, r18
4a84: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4a88: 6b 01 movw r12, r22
4a8a: 7c 01 movw r14, r24
4a8c: ee 96 adiw r28, 0x3e ; 62
4a8e: 2c ad ldd r18, Y+60 ; 0x3c
4a90: 3d ad ldd r19, Y+61 ; 0x3d
4a92: 4e ad ldd r20, Y+62 ; 0x3e
4a94: 5f ad ldd r21, Y+63 ; 0x3f
4a96: ee 97 sbiw r28, 0x3e ; 62
4a98: ca 01 movw r24, r20
4a9a: b9 01 movw r22, r18
4a9c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4aa0: 9b 01 movw r18, r22
4aa2: ac 01 movw r20, r24
4aa4: c7 01 movw r24, r14
4aa6: b6 01 movw r22, r12
4aa8: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
4aac: 6b 01 movw r12, r22
4aae: 7c 01 movw r14, r24
4ab0: c2 58 subi r28, 0x82 ; 130
4ab2: df 4f sbci r29, 0xFF ; 255
4ab4: 28 81 ld r18, Y
4ab6: 39 81 ldd r19, Y+1 ; 0x01
4ab8: 4a 81 ldd r20, Y+2 ; 0x02
4aba: 5b 81 ldd r21, Y+3 ; 0x03
4abc: ce 57 subi r28, 0x7E ; 126
4abe: d0 40 sbci r29, 0x00 ; 0
4ac0: ca 01 movw r24, r20
4ac2: b9 01 movw r22, r18
4ac4: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4ac8: 9b 01 movw r18, r22
4aca: ac 01 movw r20, r24
4acc: c7 01 movw r24, r14
4ace: b6 01 movw r22, r12
4ad0: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
4ad4: 8b 01 movw r16, r22
4ad6: 9c 01 movw r18, r24
4ad8: 35 95 asr r19
4ada: 27 95 ror r18
4adc: 17 95 ror r17
4ade: 07 95 ror r16
4ae0: 0f 2e mov r0, r31
4ae2: ff ed ldi r31, 0xDF ; 223
4ae4: cf 2e mov r12, r31
4ae6: f9 e5 ldi r31, 0x59 ; 89
4ae8: df 2e mov r13, r31
4aea: f7 e3 ldi r31, 0x37 ; 55
4aec: ef 2e mov r14, r31
4aee: ff e5 ldi r31, 0x5F ; 95
4af0: ff 2e mov r15, r31
4af2: f0 2d mov r31, r0
4af4: c0 1a sub r12, r16
4af6: d1 0a sbc r13, r17
4af8: e2 0a sbc r14, r18
4afa: f3 0a sbc r15, r19
4afc: 20 e0 ldi r18, 0x00 ; 0
4afe: 30 e0 ldi r19, 0x00 ; 0
4b00: 40 e0 ldi r20, 0x00 ; 0
4b02: 5f e3 ldi r21, 0x3F ; 63
4b04: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4b08: a7 01 movw r20, r14
4b0a: 96 01 movw r18, r12
4b0c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4b10: a7 01 movw r20, r14
4b12: 96 01 movw r18, r12
4b14: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4b18: 9b 01 movw r18, r22
4b1a: ac 01 movw r20, r24
4b1c: 60 e0 ldi r22, 0x00 ; 0
4b1e: 70 e0 ldi r23, 0x00 ; 0
4b20: 80 ec ldi r24, 0xC0 ; 192
4b22: 9f e3 ldi r25, 0x3F ; 63
4b24: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
4b28: a7 01 movw r20, r14
4b2a: 96 01 movw r18, r12
4b2c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4b30: 6b 01 movw r12, r22
4b32: 7c 01 movw r14, r24
4b34: 9b 01 movw r18, r22
4b36: ac 01 movw r20, r24
4b38: ea 96 adiw r28, 0x3a ; 58
4b3a: 6c ad ldd r22, Y+60 ; 0x3c
4b3c: 7d ad ldd r23, Y+61 ; 0x3d
4b3e: 8e ad ldd r24, Y+62 ; 0x3e
4b40: 9f ad ldd r25, Y+63 ; 0x3f
4b42: ea 97 sbiw r28, 0x3a ; 58
4b44: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4b48: 6d 83 std Y+5, r22 ; 0x05
4b4a: 7e 83 std Y+6, r23 ; 0x06
4b4c: 8f 83 std Y+7, r24 ; 0x07
4b4e: 98 87 std Y+8, r25 ; 0x08
4b50: a7 01 movw r20, r14
4b52: 96 01 movw r18, r12
4b54: ee 96 adiw r28, 0x3e ; 62
4b56: 6c ad ldd r22, Y+60 ; 0x3c
4b58: 7d ad ldd r23, Y+61 ; 0x3d
4b5a: 8e ad ldd r24, Y+62 ; 0x3e
4b5c: 9f ad ldd r25, Y+63 ; 0x3f
4b5e: ee 97 sbiw r28, 0x3e ; 62
4b60: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4b64: 69 87 std Y+9, r22 ; 0x09
4b66: 7a 87 std Y+10, r23 ; 0x0a
4b68: 8b 87 std Y+11, r24 ; 0x0b
4b6a: 9c 87 std Y+12, r25 ; 0x0c
4b6c: a7 01 movw r20, r14
4b6e: 96 01 movw r18, r12
4b70: c2 58 subi r28, 0x82 ; 130
4b72: df 4f sbci r29, 0xFF ; 255
4b74: 68 81 ld r22, Y
4b76: 79 81 ldd r23, Y+1 ; 0x01
4b78: 8a 81 ldd r24, Y+2 ; 0x02
4b7a: 9b 81 ldd r25, Y+3 ; 0x03
4b7c: ce 57 subi r28, 0x7E ; 126
4b7e: d0 40 sbci r29, 0x00 ; 0
4b80: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4b84: 6d 87 std Y+13, r22 ; 0x0d
4b86: 7e 87 std Y+14, r23 ; 0x0e
4b88: 8f 87 std Y+15, r24 ; 0x0f
4b8a: 98 8b std Y+16, r25 ; 0x10
4b8c: 40 90 00 20 lds r4, 0x2000 ; 0x802000 <__data_start>
4b90: 50 90 01 20 lds r5, 0x2001 ; 0x802001 <__data_start+0x1>
4b94: 60 90 02 20 lds r6, 0x2002 ; 0x802002 <__data_start+0x2>
4b98: 70 90 03 20 lds r7, 0x2003 ; 0x802003 <__data_start+0x3>
4b9c: e0 90 00 20 lds r14, 0x2000 ; 0x802000 <__data_start>
4ba0: f0 90 01 20 lds r15, 0x2001 ; 0x802001 <__data_start+0x1>
4ba4: 00 91 02 20 lds r16, 0x2002 ; 0x802002 <__data_start+0x2>
4ba8: 10 91 03 20 lds r17, 0x2003 ; 0x802003 <__data_start+0x3>
4bac: 69 96 adiw r28, 0x19 ; 25
4bae: ec ae std Y+60, r14 ; 0x3c
4bb0: fd ae std Y+61, r15 ; 0x3d
4bb2: 0e af std Y+62, r16 ; 0x3e
4bb4: 1f af std Y+63, r17 ; 0x3f
4bb6: 69 97 sbiw r28, 0x19 ; 25
4bb8: 60 91 00 20 lds r22, 0x2000 ; 0x802000 <__data_start>
4bbc: 70 91 01 20 lds r23, 0x2001 ; 0x802001 <__data_start+0x1>
4bc0: 80 91 02 20 lds r24, 0x2002 ; 0x802002 <__data_start+0x2>
4bc4: 90 91 03 20 lds r25, 0x2003 ; 0x802003 <__data_start+0x3>
4bc8: 20 91 a4 24 lds r18, 0x24A4 ; 0x8024a4 <q1>
4bcc: 30 91 a5 24 lds r19, 0x24A5 ; 0x8024a5 <q1+0x1>
4bd0: 40 91 a6 24 lds r20, 0x24A6 ; 0x8024a6 <q1+0x2>
4bd4: 50 91 a7 24 lds r21, 0x24A7 ; 0x8024a7 <q1+0x3>
4bd8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4bdc: 69 a3 std Y+33, r22 ; 0x21
4bde: 7a a3 std Y+34, r23 ; 0x22
4be0: 8b a3 std Y+35, r24 ; 0x23
4be2: 9c a3 std Y+36, r25 ; 0x24
4be4: 60 91 00 20 lds r22, 0x2000 ; 0x802000 <__data_start>
4be8: 70 91 01 20 lds r23, 0x2001 ; 0x802001 <__data_start+0x1>
4bec: 80 91 02 20 lds r24, 0x2002 ; 0x802002 <__data_start+0x2>
4bf0: 90 91 03 20 lds r25, 0x2003 ; 0x802003 <__data_start+0x3>
4bf4: 20 91 a0 24 lds r18, 0x24A0 ; 0x8024a0 <q2>
4bf8: 30 91 a1 24 lds r19, 0x24A1 ; 0x8024a1 <q2+0x1>
4bfc: 40 91 a2 24 lds r20, 0x24A2 ; 0x8024a2 <q2+0x2>
4c00: 50 91 a3 24 lds r21, 0x24A3 ; 0x8024a3 <q2+0x3>
4c04: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4c08: 6d 8f std Y+29, r22 ; 0x1d
4c0a: 7e 8f std Y+30, r23 ; 0x1e
4c0c: 8f 8f std Y+31, r24 ; 0x1f
4c0e: 98 a3 std Y+32, r25 ; 0x20
4c10: 60 91 00 20 lds r22, 0x2000 ; 0x802000 <__data_start>
4c14: 70 91 01 20 lds r23, 0x2001 ; 0x802001 <__data_start+0x1>
4c18: 80 91 02 20 lds r24, 0x2002 ; 0x802002 <__data_start+0x2>
4c1c: 90 91 03 20 lds r25, 0x2003 ; 0x802003 <__data_start+0x3>
4c20: 20 91 9c 24 lds r18, 0x249C ; 0x80249c <q3>
4c24: 30 91 9d 24 lds r19, 0x249D ; 0x80249d <q3+0x1>
4c28: 40 91 9e 24 lds r20, 0x249E ; 0x80249e <q3+0x2>
4c2c: 50 91 9f 24 lds r21, 0x249F ; 0x80249f <q3+0x3>
4c30: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4c34: 6d 8b std Y+21, r22 ; 0x15
4c36: 7e 8b std Y+22, r23 ; 0x16
4c38: 8f 8b std Y+23, r24 ; 0x17
4c3a: 98 8f std Y+24, r25 ; 0x18
4c3c: c0 90 a4 24 lds r12, 0x24A4 ; 0x8024a4 <q1>
4c40: d0 90 a5 24 lds r13, 0x24A5 ; 0x8024a5 <q1+0x1>
4c44: e0 90 a6 24 lds r14, 0x24A6 ; 0x8024a6 <q1+0x2>
4c48: f0 90 a7 24 lds r15, 0x24A7 ; 0x8024a7 <q1+0x3>
4c4c: 00 91 a4 24 lds r16, 0x24A4 ; 0x8024a4 <q1>
4c50: 10 91 a5 24 lds r17, 0x24A5 ; 0x8024a5 <q1+0x1>
4c54: 20 91 a6 24 lds r18, 0x24A6 ; 0x8024a6 <q1+0x2>
4c58: 30 91 a7 24 lds r19, 0x24A7 ; 0x8024a7 <q1+0x3>
4c5c: 09 ab std Y+49, r16 ; 0x31
4c5e: 1a ab std Y+50, r17 ; 0x32
4c60: 2b ab std Y+51, r18 ; 0x33
4c62: 3c ab std Y+52, r19 ; 0x34
4c64: 60 91 a4 24 lds r22, 0x24A4 ; 0x8024a4 <q1>
4c68: 70 91 a5 24 lds r23, 0x24A5 ; 0x8024a5 <q1+0x1>
4c6c: 80 91 a6 24 lds r24, 0x24A6 ; 0x8024a6 <q1+0x2>
4c70: 90 91 a7 24 lds r25, 0x24A7 ; 0x8024a7 <q1+0x3>
4c74: 20 91 a0 24 lds r18, 0x24A0 ; 0x8024a0 <q2>
4c78: 30 91 a1 24 lds r19, 0x24A1 ; 0x8024a1 <q2+0x1>
4c7c: 40 91 a2 24 lds r20, 0x24A2 ; 0x8024a2 <q2+0x2>
4c80: 50 91 a3 24 lds r21, 0x24A3 ; 0x8024a3 <q2+0x3>
4c84: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4c88: 69 a7 std Y+41, r22 ; 0x29
4c8a: 7a a7 std Y+42, r23 ; 0x2a
4c8c: 8b a7 std Y+43, r24 ; 0x2b
4c8e: 9c a7 std Y+44, r25 ; 0x2c
4c90: 60 91 a4 24 lds r22, 0x24A4 ; 0x8024a4 <q1>
4c94: 70 91 a5 24 lds r23, 0x24A5 ; 0x8024a5 <q1+0x1>
4c98: 80 91 a6 24 lds r24, 0x24A6 ; 0x8024a6 <q1+0x2>
4c9c: 90 91 a7 24 lds r25, 0x24A7 ; 0x8024a7 <q1+0x3>
4ca0: 20 91 9c 24 lds r18, 0x249C ; 0x80249c <q3>
4ca4: 30 91 9d 24 lds r19, 0x249D ; 0x80249d <q3+0x1>
4ca8: 40 91 9e 24 lds r20, 0x249E ; 0x80249e <q3+0x2>
4cac: 50 91 9f 24 lds r21, 0x249F ; 0x80249f <q3+0x3>
4cb0: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4cb4: 6d a7 std Y+45, r22 ; 0x2d
4cb6: 7e a7 std Y+46, r23 ; 0x2e
4cb8: 8f a7 std Y+47, r24 ; 0x2f
4cba: 98 ab std Y+48, r25 ; 0x30
4cbc: 60 91 a0 24 lds r22, 0x24A0 ; 0x8024a0 <q2>
4cc0: 70 91 a1 24 lds r23, 0x24A1 ; 0x8024a1 <q2+0x1>
4cc4: 80 91 a2 24 lds r24, 0x24A2 ; 0x8024a2 <q2+0x2>
4cc8: 90 91 a3 24 lds r25, 0x24A3 ; 0x8024a3 <q2+0x3>
4ccc: 20 91 a0 24 lds r18, 0x24A0 ; 0x8024a0 <q2>
4cd0: 30 91 a1 24 lds r19, 0x24A1 ; 0x8024a1 <q2+0x1>
4cd4: 40 91 a2 24 lds r20, 0x24A2 ; 0x8024a2 <q2+0x2>
4cd8: 50 91 a3 24 lds r21, 0x24A3 ; 0x8024a3 <q2+0x3>
4cdc: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4ce0: 25 96 adiw r28, 0x05 ; 5
4ce2: 6c af std Y+60, r22 ; 0x3c
4ce4: 7d af std Y+61, r23 ; 0x3d
4ce6: 8e af std Y+62, r24 ; 0x3e
4ce8: 9f af std Y+63, r25 ; 0x3f
4cea: 25 97 sbiw r28, 0x05 ; 5
4cec: 60 91 a0 24 lds r22, 0x24A0 ; 0x8024a0 <q2>
4cf0: 70 91 a1 24 lds r23, 0x24A1 ; 0x8024a1 <q2+0x1>
4cf4: 80 91 a2 24 lds r24, 0x24A2 ; 0x8024a2 <q2+0x2>
4cf8: 90 91 a3 24 lds r25, 0x24A3 ; 0x8024a3 <q2+0x3>
4cfc: 20 91 9c 24 lds r18, 0x249C ; 0x80249c <q3>
4d00: 30 91 9d 24 lds r19, 0x249D ; 0x80249d <q3+0x1>
4d04: 40 91 9e 24 lds r20, 0x249E ; 0x80249e <q3+0x2>
4d08: 50 91 9f 24 lds r21, 0x249F ; 0x80249f <q3+0x3>
4d0c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4d10: 29 96 adiw r28, 0x09 ; 9
4d12: 6c af std Y+60, r22 ; 0x3c
4d14: 7d af std Y+61, r23 ; 0x3d
4d16: 8e af std Y+62, r24 ; 0x3e
4d18: 9f af std Y+63, r25 ; 0x3f
4d1a: 29 97 sbiw r28, 0x09 ; 9
4d1c: 60 91 9c 24 lds r22, 0x249C ; 0x80249c <q3>
4d20: 70 91 9d 24 lds r23, 0x249D ; 0x80249d <q3+0x1>
4d24: 80 91 9e 24 lds r24, 0x249E ; 0x80249e <q3+0x2>
4d28: 90 91 9f 24 lds r25, 0x249F ; 0x80249f <q3+0x3>
4d2c: 20 91 9c 24 lds r18, 0x249C ; 0x80249c <q3>
4d30: 30 91 9d 24 lds r19, 0x249D ; 0x80249d <q3+0x1>
4d34: 40 91 9e 24 lds r20, 0x249E ; 0x80249e <q3+0x2>
4d38: 50 91 9f 24 lds r21, 0x249F ; 0x80249f <q3+0x3>
4d3c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4d40: 6d a3 std Y+37, r22 ; 0x25
4d42: 7e a3 std Y+38, r23 ; 0x26
4d44: 8f a3 std Y+39, r24 ; 0x27
4d46: 98 a7 std Y+40, r25 ; 0x28
4d48: 25 96 adiw r28, 0x05 ; 5
4d4a: 2c ad ldd r18, Y+60 ; 0x3c
4d4c: 3d ad ldd r19, Y+61 ; 0x3d
4d4e: 4e ad ldd r20, Y+62 ; 0x3e
4d50: 5f ad ldd r21, Y+63 ; 0x3f
4d52: 25 97 sbiw r28, 0x05 ; 5
4d54: 60 e0 ldi r22, 0x00 ; 0
4d56: 70 e0 ldi r23, 0x00 ; 0
4d58: 80 e0 ldi r24, 0x00 ; 0
4d5a: 9f e3 ldi r25, 0x3F ; 63
4d5c: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
4d60: 2d a1 ldd r18, Y+37 ; 0x25
4d62: 3e a1 ldd r19, Y+38 ; 0x26
4d64: 4f a1 ldd r20, Y+39 ; 0x27
4d66: 58 a5 ldd r21, Y+40 ; 0x28
4d68: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
4d6c: 2d 96 adiw r28, 0x0d ; 13
4d6e: 6c af std Y+60, r22 ; 0x3c
4d70: 7d af std Y+61, r23 ; 0x3d
4d72: 8e af std Y+62, r24 ; 0x3e
4d74: 9f af std Y+63, r25 ; 0x3f
4d76: 2d 97 sbiw r28, 0x0d ; 13
4d78: 2d 89 ldd r18, Y+21 ; 0x15
4d7a: 3e 89 ldd r19, Y+22 ; 0x16
4d7c: 4f 89 ldd r20, Y+23 ; 0x17
4d7e: 58 8d ldd r21, Y+24 ; 0x18
4d80: 69 a5 ldd r22, Y+41 ; 0x29
4d82: 7a a5 ldd r23, Y+42 ; 0x2a
4d84: 8b a5 ldd r24, Y+43 ; 0x2b
4d86: 9c a5 ldd r25, Y+44 ; 0x2c
4d88: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
4d8c: 61 96 adiw r28, 0x11 ; 17
4d8e: 6c af std Y+60, r22 ; 0x3c
4d90: 7d af std Y+61, r23 ; 0x3d
4d92: 8e af std Y+62, r24 ; 0x3e
4d94: 9f af std Y+63, r25 ; 0x3f
4d96: 61 97 sbiw r28, 0x11 ; 17
4d98: 2d a5 ldd r18, Y+45 ; 0x2d
4d9a: 3e a5 ldd r19, Y+46 ; 0x2e
4d9c: 4f a5 ldd r20, Y+47 ; 0x2f
4d9e: 58 a9 ldd r21, Y+48 ; 0x30
4da0: 6d 8d ldd r22, Y+29 ; 0x1d
4da2: 7e 8d ldd r23, Y+30 ; 0x1e
4da4: 8f 8d ldd r24, Y+31 ; 0x1f
4da6: 98 a1 ldd r25, Y+32 ; 0x20
4da8: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
4dac: 65 96 adiw r28, 0x15 ; 21
4dae: 6c af std Y+60, r22 ; 0x3c
4db0: 7d af std Y+61, r23 ; 0x3d
4db2: 8e af std Y+62, r24 ; 0x3e
4db4: 9f af std Y+63, r25 ; 0x3f
4db6: 65 97 sbiw r28, 0x15 ; 21
4db8: 2d 96 adiw r28, 0x0d ; 13
4dba: 2c ad ldd r18, Y+60 ; 0x3c
4dbc: 3d ad ldd r19, Y+61 ; 0x3d
4dbe: 4e ad ldd r20, Y+62 ; 0x3e
4dc0: 5f ad ldd r21, Y+63 ; 0x3f
4dc2: 2d 97 sbiw r28, 0x0d ; 13
4dc4: 6d 81 ldd r22, Y+5 ; 0x05
4dc6: 7e 81 ldd r23, Y+6 ; 0x06
4dc8: 8f 81 ldd r24, Y+7 ; 0x07
4dca: 98 85 ldd r25, Y+8 ; 0x08
4dcc: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4dd0: 4b 01 movw r8, r22
4dd2: 5c 01 movw r10, r24
4dd4: 61 96 adiw r28, 0x11 ; 17
4dd6: 2c ad ldd r18, Y+60 ; 0x3c
4dd8: 3d ad ldd r19, Y+61 ; 0x3d
4dda: 4e ad ldd r20, Y+62 ; 0x3e
4ddc: 5f ad ldd r21, Y+63 ; 0x3f
4dde: 61 97 sbiw r28, 0x11 ; 17
4de0: 69 85 ldd r22, Y+9 ; 0x09
4de2: 7a 85 ldd r23, Y+10 ; 0x0a
4de4: 8b 85 ldd r24, Y+11 ; 0x0b
4de6: 9c 85 ldd r25, Y+12 ; 0x0c
4de8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4dec: 9b 01 movw r18, r22
4dee: ac 01 movw r20, r24
4df0: c5 01 movw r24, r10
4df2: b4 01 movw r22, r8
4df4: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
4df8: 4b 01 movw r8, r22
4dfa: 5c 01 movw r10, r24
4dfc: 65 96 adiw r28, 0x15 ; 21
4dfe: 2c ad ldd r18, Y+60 ; 0x3c
4e00: 3d ad ldd r19, Y+61 ; 0x3d
4e02: 4e ad ldd r20, Y+62 ; 0x3e
4e04: 5f ad ldd r21, Y+63 ; 0x3f
4e06: 65 97 sbiw r28, 0x15 ; 21
4e08: 6d 85 ldd r22, Y+13 ; 0x0d
4e0a: 7e 85 ldd r23, Y+14 ; 0x0e
4e0c: 8f 85 ldd r24, Y+15 ; 0x0f
4e0e: 98 89 ldd r25, Y+16 ; 0x10
4e10: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4e14: 9b 01 movw r18, r22
4e16: ac 01 movw r20, r24
4e18: c5 01 movw r24, r10
4e1a: b4 01 movw r22, r8
4e1c: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
4e20: 9b 01 movw r18, r22
4e22: ac 01 movw r20, r24
4e24: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
4e28: 4b 01 movw r8, r22
4e2a: 5c 01 movw r10, r24
4e2c: 29 a9 ldd r18, Y+49 ; 0x31
4e2e: 3a a9 ldd r19, Y+50 ; 0x32
4e30: 4b a9 ldd r20, Y+51 ; 0x33
4e32: 5c a9 ldd r21, Y+52 ; 0x34
4e34: c7 01 movw r24, r14
4e36: b6 01 movw r22, r12
4e38: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4e3c: 9b 01 movw r18, r22
4e3e: ac 01 movw r20, r24
4e40: 60 e0 ldi r22, 0x00 ; 0
4e42: 70 e0 ldi r23, 0x00 ; 0
4e44: 80 e0 ldi r24, 0x00 ; 0
4e46: 9f e3 ldi r25, 0x3F ; 63
4e48: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
4e4c: 69 ab std Y+49, r22 ; 0x31
4e4e: 7a ab std Y+50, r23 ; 0x32
4e50: 8b ab std Y+51, r24 ; 0x33
4e52: 9c ab std Y+52, r25 ; 0x34
4e54: 29 a5 ldd r18, Y+41 ; 0x29
4e56: 3a a5 ldd r19, Y+42 ; 0x2a
4e58: 4b a5 ldd r20, Y+43 ; 0x2b
4e5a: 5c a5 ldd r21, Y+44 ; 0x2c
4e5c: 6d 89 ldd r22, Y+21 ; 0x15
4e5e: 7e 89 ldd r23, Y+22 ; 0x16
4e60: 8f 89 ldd r24, Y+23 ; 0x17
4e62: 98 8d ldd r25, Y+24 ; 0x18
4e64: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
4e68: 2d 81 ldd r18, Y+5 ; 0x05
4e6a: 3e 81 ldd r19, Y+6 ; 0x06
4e6c: 4f 81 ldd r20, Y+7 ; 0x07
4e6e: 58 85 ldd r21, Y+8 ; 0x08
4e70: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4e74: 6b 01 movw r12, r22
4e76: 7c 01 movw r14, r24
4e78: 2d a1 ldd r18, Y+37 ; 0x25
4e7a: 3e a1 ldd r19, Y+38 ; 0x26
4e7c: 4f a1 ldd r20, Y+39 ; 0x27
4e7e: 58 a5 ldd r21, Y+40 ; 0x28
4e80: 69 a9 ldd r22, Y+49 ; 0x31
4e82: 7a a9 ldd r23, Y+50 ; 0x32
4e84: 8b a9 ldd r24, Y+51 ; 0x33
4e86: 9c a9 ldd r25, Y+52 ; 0x34
4e88: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
4e8c: 29 85 ldd r18, Y+9 ; 0x09
4e8e: 3a 85 ldd r19, Y+10 ; 0x0a
4e90: 4b 85 ldd r20, Y+11 ; 0x0b
4e92: 5c 85 ldd r21, Y+12 ; 0x0c
4e94: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4e98: 9b 01 movw r18, r22
4e9a: ac 01 movw r20, r24
4e9c: c7 01 movw r24, r14
4e9e: b6 01 movw r22, r12
4ea0: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
4ea4: 6b 01 movw r12, r22
4ea6: 7c 01 movw r14, r24
4ea8: 29 a1 ldd r18, Y+33 ; 0x21
4eaa: 3a a1 ldd r19, Y+34 ; 0x22
4eac: 4b a1 ldd r20, Y+35 ; 0x23
4eae: 5c a1 ldd r21, Y+36 ; 0x24
4eb0: 29 96 adiw r28, 0x09 ; 9
4eb2: 6c ad ldd r22, Y+60 ; 0x3c
4eb4: 7d ad ldd r23, Y+61 ; 0x3d
4eb6: 8e ad ldd r24, Y+62 ; 0x3e
4eb8: 9f ad ldd r25, Y+63 ; 0x3f
4eba: 29 97 sbiw r28, 0x09 ; 9
4ebc: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
4ec0: 2d 85 ldd r18, Y+13 ; 0x0d
4ec2: 3e 85 ldd r19, Y+14 ; 0x0e
4ec4: 4f 85 ldd r20, Y+15 ; 0x0f
4ec6: 58 89 ldd r21, Y+16 ; 0x10
4ec8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4ecc: 9b 01 movw r18, r22
4ece: ac 01 movw r20, r24
4ed0: c7 01 movw r24, r14
4ed2: b6 01 movw r22, r12
4ed4: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
4ed8: 9b 01 movw r18, r22
4eda: ac 01 movw r20, r24
4edc: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
4ee0: 6b 01 movw r12, r22
4ee2: 7c 01 movw r14, r24
4ee4: a5 01 movw r20, r10
4ee6: 94 01 movw r18, r8
4ee8: c5 01 movw r24, r10
4eea: b4 01 movw r22, r8
4eec: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4ef0: 6d 8b std Y+21, r22 ; 0x15
4ef2: 7e 8b std Y+22, r23 ; 0x16
4ef4: 8f 8b std Y+23, r24 ; 0x17
4ef6: 98 8f std Y+24, r25 ; 0x18
4ef8: a5 01 movw r20, r10
4efa: 94 01 movw r18, r8
4efc: c5 01 movw r24, r10
4efe: b4 01 movw r22, r8
4f00: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4f04: 4b 01 movw r8, r22
4f06: 5c 01 movw r10, r24
4f08: a7 01 movw r20, r14
4f0a: 96 01 movw r18, r12
4f0c: c7 01 movw r24, r14
4f0e: b6 01 movw r22, r12
4f10: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4f14: 9b 01 movw r18, r22
4f16: ac 01 movw r20, r24
4f18: c5 01 movw r24, r10
4f1a: b4 01 movw r22, r8
4f1c: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
4f20: 0e 94 74 35 call 0x6ae8 ; 0x6ae8 <sqrt>
4f24: 4b 01 movw r8, r22
4f26: 5c 01 movw r10, r24
4f28: 2d 8d ldd r18, Y+29 ; 0x1d
4f2a: 3e 8d ldd r19, Y+30 ; 0x1e
4f2c: 4f 8d ldd r20, Y+31 ; 0x1f
4f2e: 58 a1 ldd r21, Y+32 ; 0x20
4f30: 6d a5 ldd r22, Y+45 ; 0x2d
4f32: 7e a5 ldd r23, Y+46 ; 0x2e
4f34: 8f a5 ldd r24, Y+47 ; 0x2f
4f36: 98 a9 ldd r25, Y+48 ; 0x30
4f38: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
4f3c: 6d 8f std Y+29, r22 ; 0x1d
4f3e: 7e 8f std Y+30, r23 ; 0x1e
4f40: 8f 8f std Y+31, r24 ; 0x1f
4f42: 98 a3 std Y+32, r25 ; 0x20
4f44: 29 96 adiw r28, 0x09 ; 9
4f46: 2c ad ldd r18, Y+60 ; 0x3c
4f48: 3d ad ldd r19, Y+61 ; 0x3d
4f4a: 4e ad ldd r20, Y+62 ; 0x3e
4f4c: 5f ad ldd r21, Y+63 ; 0x3f
4f4e: 29 97 sbiw r28, 0x09 ; 9
4f50: 69 a1 ldd r22, Y+33 ; 0x21
4f52: 7a a1 ldd r23, Y+34 ; 0x22
4f54: 8b a1 ldd r24, Y+35 ; 0x23
4f56: 9c a1 ldd r25, Y+36 ; 0x24
4f58: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
4f5c: 69 a3 std Y+33, r22 ; 0x21
4f5e: 7a a3 std Y+34, r23 ; 0x22
4f60: 8b a3 std Y+35, r24 ; 0x23
4f62: 9c a3 std Y+36, r25 ; 0x24
4f64: 25 96 adiw r28, 0x05 ; 5
4f66: 2c ad ldd r18, Y+60 ; 0x3c
4f68: 3d ad ldd r19, Y+61 ; 0x3d
4f6a: 4e ad ldd r20, Y+62 ; 0x3e
4f6c: 5f ad ldd r21, Y+63 ; 0x3f
4f6e: 25 97 sbiw r28, 0x05 ; 5
4f70: 69 a9 ldd r22, Y+49 ; 0x31
4f72: 7a a9 ldd r23, Y+50 ; 0x32
4f74: 8b a9 ldd r24, Y+51 ; 0x33
4f76: 9c a9 ldd r25, Y+52 ; 0x34
4f78: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
4f7c: 6d 8b std Y+21, r22 ; 0x15
4f7e: 7e 8b std Y+22, r23 ; 0x16
4f80: 8f 8b std Y+23, r24 ; 0x17
4f82: 98 8f std Y+24, r25 ; 0x18
4f84: 2d 8d ldd r18, Y+29 ; 0x1d
4f86: 3e 8d ldd r19, Y+30 ; 0x1e
4f88: 4f 8d ldd r20, Y+31 ; 0x1f
4f8a: 58 a1 ldd r21, Y+32 ; 0x20
4f8c: 6d 81 ldd r22, Y+5 ; 0x05
4f8e: 7e 81 ldd r23, Y+6 ; 0x06
4f90: 8f 81 ldd r24, Y+7 ; 0x07
4f92: 98 85 ldd r25, Y+8 ; 0x08
4f94: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4f98: 6b 01 movw r12, r22
4f9a: 7c 01 movw r14, r24
4f9c: 29 a1 ldd r18, Y+33 ; 0x21
4f9e: 3a a1 ldd r19, Y+34 ; 0x22
4fa0: 4b a1 ldd r20, Y+35 ; 0x23
4fa2: 5c a1 ldd r21, Y+36 ; 0x24
4fa4: 69 85 ldd r22, Y+9 ; 0x09
4fa6: 7a 85 ldd r23, Y+10 ; 0x0a
4fa8: 8b 85 ldd r24, Y+11 ; 0x0b
4faa: 9c 85 ldd r25, Y+12 ; 0x0c
4fac: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4fb0: 9b 01 movw r18, r22
4fb2: ac 01 movw r20, r24
4fb4: c7 01 movw r24, r14
4fb6: b6 01 movw r22, r12
4fb8: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
4fbc: 6b 01 movw r12, r22
4fbe: 7c 01 movw r14, r24
4fc0: 2d 89 ldd r18, Y+21 ; 0x15
4fc2: 3e 89 ldd r19, Y+22 ; 0x16
4fc4: 4f 89 ldd r20, Y+23 ; 0x17
4fc6: 58 8d ldd r21, Y+24 ; 0x18
4fc8: 6d 85 ldd r22, Y+13 ; 0x0d
4fca: 7e 85 ldd r23, Y+14 ; 0x0e
4fcc: 8f 85 ldd r24, Y+15 ; 0x0f
4fce: 98 89 ldd r25, Y+16 ; 0x10
4fd0: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
4fd4: 9b 01 movw r18, r22
4fd6: ac 01 movw r20, r24
4fd8: c7 01 movw r24, r14
4fda: b6 01 movw r22, r12
4fdc: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
4fe0: 9b 01 movw r18, r22
4fe2: ac 01 movw r20, r24
4fe4: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
4fe8: 6b 01 movw r12, r22
4fea: 7c 01 movw r14, r24
4fec: 69 96 adiw r28, 0x19 ; 25
4fee: 2c ad ldd r18, Y+60 ; 0x3c
4ff0: 3d ad ldd r19, Y+61 ; 0x3d
4ff2: 4e ad ldd r20, Y+62 ; 0x3e
4ff4: 5f ad ldd r21, Y+63 ; 0x3f
4ff6: 69 97 sbiw r28, 0x19 ; 25
4ff8: c3 01 movw r24, r6
4ffa: b2 01 movw r22, r4
4ffc: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5000: 20 e0 ldi r18, 0x00 ; 0
5002: 30 e0 ldi r19, 0x00 ; 0
5004: 40 e0 ldi r20, 0x00 ; 0
5006: 5f e3 ldi r21, 0x3F ; 63
5008: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
500c: 2d a1 ldd r18, Y+37 ; 0x25
500e: 3e a1 ldd r19, Y+38 ; 0x26
5010: 4f a1 ldd r20, Y+39 ; 0x27
5012: 58 a5 ldd r21, Y+40 ; 0x28
5014: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
5018: 6d a3 std Y+37, r22 ; 0x25
501a: 7e a3 std Y+38, r23 ; 0x26
501c: 8f a3 std Y+39, r24 ; 0x27
501e: 98 a7 std Y+40, r25 ; 0x28
5020: a5 01 movw r20, r10
5022: 94 01 movw r18, r8
5024: 2d 96 adiw r28, 0x0d ; 13
5026: 6c ad ldd r22, Y+60 ; 0x3c
5028: 7d ad ldd r23, Y+61 ; 0x3d
502a: 8e ad ldd r24, Y+62 ; 0x3e
502c: 9f ad ldd r25, Y+63 ; 0x3f
502e: 2d 97 sbiw r28, 0x0d ; 13
5030: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5034: 2b 01 movw r4, r22
5036: 3c 01 movw r6, r24
5038: a7 01 movw r20, r14
503a: 96 01 movw r18, r12
503c: 6d 8d ldd r22, Y+29 ; 0x1d
503e: 7e 8d ldd r23, Y+30 ; 0x1e
5040: 8f 8d ldd r24, Y+31 ; 0x1f
5042: 98 a1 ldd r25, Y+32 ; 0x20
5044: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5048: 9b 01 movw r18, r22
504a: ac 01 movw r20, r24
504c: c3 01 movw r24, r6
504e: b2 01 movw r22, r4
5050: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
5054: 69 a7 std Y+41, r22 ; 0x29
5056: 7a a7 std Y+42, r23 ; 0x2a
5058: 8b a7 std Y+43, r24 ; 0x2b
505a: 9c a7 std Y+44, r25 ; 0x2c
505c: a5 01 movw r20, r10
505e: 94 01 movw r18, r8
5060: 61 96 adiw r28, 0x11 ; 17
5062: 6c ad ldd r22, Y+60 ; 0x3c
5064: 7d ad ldd r23, Y+61 ; 0x3d
5066: 8e ad ldd r24, Y+62 ; 0x3e
5068: 9f ad ldd r25, Y+63 ; 0x3f
506a: 61 97 sbiw r28, 0x11 ; 17
506c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5070: 2b 01 movw r4, r22
5072: 3c 01 movw r6, r24
5074: a7 01 movw r20, r14
5076: 96 01 movw r18, r12
5078: 69 a1 ldd r22, Y+33 ; 0x21
507a: 7a a1 ldd r23, Y+34 ; 0x22
507c: 8b a1 ldd r24, Y+35 ; 0x23
507e: 9c a1 ldd r25, Y+36 ; 0x24
5080: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5084: 9b 01 movw r18, r22
5086: ac 01 movw r20, r24
5088: c3 01 movw r24, r6
508a: b2 01 movw r22, r4
508c: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
5090: 6d a7 std Y+45, r22 ; 0x2d
5092: 7e a7 std Y+46, r23 ; 0x2e
5094: 8f a7 std Y+47, r24 ; 0x2f
5096: 98 ab std Y+48, r25 ; 0x30
5098: a5 01 movw r20, r10
509a: 94 01 movw r18, r8
509c: 65 96 adiw r28, 0x15 ; 21
509e: 6c ad ldd r22, Y+60 ; 0x3c
50a0: 7d ad ldd r23, Y+61 ; 0x3d
50a2: 8e ad ldd r24, Y+62 ; 0x3e
50a4: 9f ad ldd r25, Y+63 ; 0x3f
50a6: 65 97 sbiw r28, 0x15 ; 21
50a8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
50ac: 2b 01 movw r4, r22
50ae: 3c 01 movw r6, r24
50b0: a7 01 movw r20, r14
50b2: 96 01 movw r18, r12
50b4: 6d 89 ldd r22, Y+21 ; 0x15
50b6: 7e 89 ldd r23, Y+22 ; 0x16
50b8: 8f 89 ldd r24, Y+23 ; 0x17
50ba: 98 8d ldd r25, Y+24 ; 0x18
50bc: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
50c0: 9b 01 movw r18, r22
50c2: ac 01 movw r20, r24
50c4: c3 01 movw r24, r6
50c6: b2 01 movw r22, r4
50c8: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
50cc: 6b 01 movw r12, r22
50ce: 7c 01 movw r14, r24
50d0: 2d a1 ldd r18, Y+37 ; 0x25
50d2: 3e a1 ldd r19, Y+38 ; 0x26
50d4: 4f a1 ldd r20, Y+39 ; 0x27
50d6: 58 a5 ldd r21, Y+40 ; 0x28
50d8: 69 ad ldd r22, Y+57 ; 0x39
50da: 7a ad ldd r23, Y+58 ; 0x3a
50dc: 8b ad ldd r24, Y+59 ; 0x3b
50de: 9c ad ldd r25, Y+60 ; 0x3c
50e0: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
50e4: 4b 01 movw r8, r22
50e6: 5c 01 movw r10, r24
50e8: 29 a1 ldd r18, Y+33 ; 0x21
50ea: 3a a1 ldd r19, Y+34 ; 0x22
50ec: 4b a1 ldd r20, Y+35 ; 0x23
50ee: 5c a1 ldd r21, Y+36 ; 0x24
50f0: 21 96 adiw r28, 0x01 ; 1
50f2: 6c ad ldd r22, Y+60 ; 0x3c
50f4: 7d ad ldd r23, Y+61 ; 0x3d
50f6: 8e ad ldd r24, Y+62 ; 0x3e
50f8: 9f ad ldd r25, Y+63 ; 0x3f
50fa: 21 97 sbiw r28, 0x01 ; 1
50fc: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5100: 9b 01 movw r18, r22
5102: ac 01 movw r20, r24
5104: c5 01 movw r24, r10
5106: b4 01 movw r22, r8
5108: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
510c: 4b 01 movw r8, r22
510e: 5c 01 movw r10, r24
5110: a7 01 movw r20, r14
5112: 96 01 movw r18, r12
5114: 69 85 ldd r22, Y+9 ; 0x09
5116: 7a 85 ldd r23, Y+10 ; 0x0a
5118: 8b 85 ldd r24, Y+11 ; 0x0b
511a: 9c 85 ldd r25, Y+12 ; 0x0c
511c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5120: 2b 01 movw r4, r22
5122: 3c 01 movw r6, r24
5124: 2d a5 ldd r18, Y+45 ; 0x2d
5126: 3e a5 ldd r19, Y+46 ; 0x2e
5128: 4f a5 ldd r20, Y+47 ; 0x2f
512a: 58 a9 ldd r21, Y+48 ; 0x30
512c: 6d 85 ldd r22, Y+13 ; 0x0d
512e: 7e 85 ldd r23, Y+14 ; 0x0e
5130: 8f 85 ldd r24, Y+15 ; 0x0f
5132: 98 89 ldd r25, Y+16 ; 0x10
5134: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5138: 9b 01 movw r18, r22
513a: ac 01 movw r20, r24
513c: c3 01 movw r24, r6
513e: b2 01 movw r22, r4
5140: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
5144: 9b 01 movw r18, r22
5146: ac 01 movw r20, r24
5148: c5 01 movw r24, r10
514a: b4 01 movw r22, r8
514c: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
5150: 6d 8b std Y+21, r22 ; 0x15
5152: 7e 8b std Y+22, r23 ; 0x16
5154: 8f 8b std Y+23, r24 ; 0x17
5156: 98 8f std Y+24, r25 ; 0x18
5158: 2d 8d ldd r18, Y+29 ; 0x1d
515a: 3e 8d ldd r19, Y+30 ; 0x1e
515c: 4f 8d ldd r20, Y+31 ; 0x1f
515e: 58 a1 ldd r21, Y+32 ; 0x20
5160: 21 96 adiw r28, 0x01 ; 1
5162: 6c ad ldd r22, Y+60 ; 0x3c
5164: 7d ad ldd r23, Y+61 ; 0x3d
5166: 8e ad ldd r24, Y+62 ; 0x3e
5168: 9f ad ldd r25, Y+63 ; 0x3f
516a: 21 97 sbiw r28, 0x01 ; 1
516c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5170: 4b 01 movw r8, r22
5172: 5c 01 movw r10, r24
5174: 2d a1 ldd r18, Y+37 ; 0x25
5176: 3e a1 ldd r19, Y+38 ; 0x26
5178: 4f a1 ldd r20, Y+39 ; 0x27
517a: 58 a5 ldd r21, Y+40 ; 0x28
517c: 6d a9 ldd r22, Y+53 ; 0x35
517e: 7e a9 ldd r23, Y+54 ; 0x36
5180: 8f a9 ldd r24, Y+55 ; 0x37
5182: 98 ad ldd r25, Y+56 ; 0x38
5184: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5188: 9b 01 movw r18, r22
518a: ac 01 movw r20, r24
518c: c5 01 movw r24, r10
518e: b4 01 movw r22, r8
5190: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
5194: 4b 01 movw r8, r22
5196: 5c 01 movw r10, r24
5198: 29 a5 ldd r18, Y+41 ; 0x29
519a: 3a a5 ldd r19, Y+42 ; 0x2a
519c: 4b a5 ldd r20, Y+43 ; 0x2b
519e: 5c a5 ldd r21, Y+44 ; 0x2c
51a0: 6d 85 ldd r22, Y+13 ; 0x0d
51a2: 7e 85 ldd r23, Y+14 ; 0x0e
51a4: 8f 85 ldd r24, Y+15 ; 0x0f
51a6: 98 89 ldd r25, Y+16 ; 0x10
51a8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
51ac: 2b 01 movw r4, r22
51ae: 3c 01 movw r6, r24
51b0: a7 01 movw r20, r14
51b2: 96 01 movw r18, r12
51b4: 6d 81 ldd r22, Y+5 ; 0x05
51b6: 7e 81 ldd r23, Y+6 ; 0x06
51b8: 8f 81 ldd r24, Y+7 ; 0x07
51ba: 98 85 ldd r25, Y+8 ; 0x08
51bc: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
51c0: 9b 01 movw r18, r22
51c2: ac 01 movw r20, r24
51c4: c3 01 movw r24, r6
51c6: b2 01 movw r22, r4
51c8: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
51cc: 9b 01 movw r18, r22
51ce: ac 01 movw r20, r24
51d0: c5 01 movw r24, r10
51d2: b4 01 movw r22, r8
51d4: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
51d8: 4b 01 movw r8, r22
51da: 5c 01 movw r10, r24
51dc: 29 a1 ldd r18, Y+33 ; 0x21
51de: 3a a1 ldd r19, Y+34 ; 0x22
51e0: 4b a1 ldd r20, Y+35 ; 0x23
51e2: 5c a1 ldd r21, Y+36 ; 0x24
51e4: 6d a9 ldd r22, Y+53 ; 0x35
51e6: 7e a9 ldd r23, Y+54 ; 0x36
51e8: 8f a9 ldd r24, Y+55 ; 0x37
51ea: 98 ad ldd r25, Y+56 ; 0x38
51ec: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
51f0: 6b 01 movw r12, r22
51f2: 7c 01 movw r14, r24
51f4: 2d 8d ldd r18, Y+29 ; 0x1d
51f6: 3e 8d ldd r19, Y+30 ; 0x1e
51f8: 4f 8d ldd r20, Y+31 ; 0x1f
51fa: 58 a1 ldd r21, Y+32 ; 0x20
51fc: 69 ad ldd r22, Y+57 ; 0x39
51fe: 7a ad ldd r23, Y+58 ; 0x3a
5200: 8b ad ldd r24, Y+59 ; 0x3b
5202: 9c ad ldd r25, Y+60 ; 0x3c
5204: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5208: 9b 01 movw r18, r22
520a: ac 01 movw r20, r24
520c: c7 01 movw r24, r14
520e: b6 01 movw r22, r12
5210: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
5214: 6b 01 movw r12, r22
5216: 7c 01 movw r14, r24
5218: 2d a5 ldd r18, Y+45 ; 0x2d
521a: 3e a5 ldd r19, Y+46 ; 0x2e
521c: 4f a5 ldd r20, Y+47 ; 0x2f
521e: 58 a9 ldd r21, Y+48 ; 0x30
5220: 6d 81 ldd r22, Y+5 ; 0x05
5222: 7e 81 ldd r23, Y+6 ; 0x06
5224: 8f 81 ldd r24, Y+7 ; 0x07
5226: 98 85 ldd r25, Y+8 ; 0x08
5228: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
522c: 2b 01 movw r4, r22
522e: 3c 01 movw r6, r24
5230: 29 a5 ldd r18, Y+41 ; 0x29
5232: 3a a5 ldd r19, Y+42 ; 0x2a
5234: 4b a5 ldd r20, Y+43 ; 0x2b
5236: 5c a5 ldd r21, Y+44 ; 0x2c
5238: 69 85 ldd r22, Y+9 ; 0x09
523a: 7a 85 ldd r23, Y+10 ; 0x0a
523c: 8b 85 ldd r24, Y+11 ; 0x0b
523e: 9c 85 ldd r25, Y+12 ; 0x0c
5240: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5244: 9b 01 movw r18, r22
5246: ac 01 movw r20, r24
5248: c3 01 movw r24, r6
524a: b2 01 movw r22, r4
524c: 0e 94 d3 31 call 0x63a6 ; 0x63a6 <__subsf3>
5250: 9b 01 movw r18, r22
5252: ac 01 movw r20, r24
5254: c7 01 movw r24, r14
5256: b6 01 movw r22, r12
5258: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
525c: 6b 01 movw r12, r22
525e: 7c 01 movw r14, r24
5260: 60 91 a8 24 lds r22, 0x24A8 ; 0x8024a8 <twoKi>
5264: 70 91 a9 24 lds r23, 0x24A9 ; 0x8024a9 <twoKi+0x1>
5268: 80 91 aa 24 lds r24, 0x24AA ; 0x8024aa <twoKi+0x2>
526c: 90 91 ab 24 lds r25, 0x24AB ; 0x8024ab <twoKi+0x3>
5270: 20 e0 ldi r18, 0x00 ; 0
5272: 30 e0 ldi r19, 0x00 ; 0
5274: a9 01 movw r20, r18
5276: 0e 94 51 34 call 0x68a2 ; 0x68a2 <__gesf2>
527a: 18 16 cp r1, r24
527c: 0c f0 brlt .+2 ; 0x5280 <MahonyAHRSupdate+0xa3c>
527e: aa c0 rjmp .+340 ; 0x53d4 <MahonyAHRSupdate+0xb90>
5280: 20 91 a8 24 lds r18, 0x24A8 ; 0x8024a8 <twoKi>
5284: 30 91 a9 24 lds r19, 0x24A9 ; 0x8024a9 <twoKi+0x1>
5288: 40 91 aa 24 lds r20, 0x24AA ; 0x8024aa <twoKi+0x2>
528c: 50 91 ab 24 lds r21, 0x24AB ; 0x8024ab <twoKi+0x3>
5290: 40 90 98 24 lds r4, 0x2498 ; 0x802498 <integralFBx>
5294: 50 90 99 24 lds r5, 0x2499 ; 0x802499 <integralFBx+0x1>
5298: 60 90 9a 24 lds r6, 0x249A ; 0x80249a <integralFBx+0x2>
529c: 70 90 9b 24 lds r7, 0x249B ; 0x80249b <integralFBx+0x3>
52a0: 6d 89 ldd r22, Y+21 ; 0x15
52a2: 7e 89 ldd r23, Y+22 ; 0x16
52a4: 8f 89 ldd r24, Y+23 ; 0x17
52a6: 98 8d ldd r25, Y+24 ; 0x18
52a8: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
52ac: 2a ef ldi r18, 0xFA ; 250
52ae: 39 ec ldi r19, 0xC9 ; 201
52b0: 44 e3 ldi r20, 0x34 ; 52
52b2: 59 e3 ldi r21, 0x39 ; 57
52b4: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
52b8: a3 01 movw r20, r6
52ba: 92 01 movw r18, r4
52bc: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
52c0: 60 93 98 24 sts 0x2498, r22 ; 0x802498 <integralFBx>
52c4: 70 93 99 24 sts 0x2499, r23 ; 0x802499 <integralFBx+0x1>
52c8: 80 93 9a 24 sts 0x249A, r24 ; 0x80249a <integralFBx+0x2>
52cc: 90 93 9b 24 sts 0x249B, r25 ; 0x80249b <integralFBx+0x3>
52d0: 20 91 a8 24 lds r18, 0x24A8 ; 0x8024a8 <twoKi>
52d4: 30 91 a9 24 lds r19, 0x24A9 ; 0x8024a9 <twoKi+0x1>
52d8: 40 91 aa 24 lds r20, 0x24AA ; 0x8024aa <twoKi+0x2>
52dc: 50 91 ab 24 lds r21, 0x24AB ; 0x8024ab <twoKi+0x3>
52e0: 40 90 94 24 lds r4, 0x2494 ; 0x802494 <integralFBy>
52e4: 50 90 95 24 lds r5, 0x2495 ; 0x802495 <integralFBy+0x1>
52e8: 60 90 96 24 lds r6, 0x2496 ; 0x802496 <integralFBy+0x2>
52ec: 70 90 97 24 lds r7, 0x2497 ; 0x802497 <integralFBy+0x3>
52f0: c5 01 movw r24, r10
52f2: b4 01 movw r22, r8
52f4: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
52f8: 2a ef ldi r18, 0xFA ; 250
52fa: 39 ec ldi r19, 0xC9 ; 201
52fc: 44 e3 ldi r20, 0x34 ; 52
52fe: 59 e3 ldi r21, 0x39 ; 57
5300: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5304: a3 01 movw r20, r6
5306: 92 01 movw r18, r4
5308: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
530c: 60 93 94 24 sts 0x2494, r22 ; 0x802494 <integralFBy>
5310: 70 93 95 24 sts 0x2495, r23 ; 0x802495 <integralFBy+0x1>
5314: 80 93 96 24 sts 0x2496, r24 ; 0x802496 <integralFBy+0x2>
5318: 90 93 97 24 sts 0x2497, r25 ; 0x802497 <integralFBy+0x3>
531c: 20 91 a8 24 lds r18, 0x24A8 ; 0x8024a8 <twoKi>
5320: 30 91 a9 24 lds r19, 0x24A9 ; 0x8024a9 <twoKi+0x1>
5324: 40 91 aa 24 lds r20, 0x24AA ; 0x8024aa <twoKi+0x2>
5328: 50 91 ab 24 lds r21, 0x24AB ; 0x8024ab <twoKi+0x3>
532c: 40 90 90 24 lds r4, 0x2490 ; 0x802490 <integralFBz>
5330: 50 90 91 24 lds r5, 0x2491 ; 0x802491 <integralFBz+0x1>
5334: 60 90 92 24 lds r6, 0x2492 ; 0x802492 <integralFBz+0x2>
5338: 70 90 93 24 lds r7, 0x2493 ; 0x802493 <integralFBz+0x3>
533c: c7 01 movw r24, r14
533e: b6 01 movw r22, r12
5340: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5344: 2a ef ldi r18, 0xFA ; 250
5346: 39 ec ldi r19, 0xC9 ; 201
5348: 44 e3 ldi r20, 0x34 ; 52
534a: 59 e3 ldi r21, 0x39 ; 57
534c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5350: a3 01 movw r20, r6
5352: 92 01 movw r18, r4
5354: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
5358: 60 93 90 24 sts 0x2490, r22 ; 0x802490 <integralFBz>
535c: 70 93 91 24 sts 0x2491, r23 ; 0x802491 <integralFBz+0x1>
5360: 80 93 92 24 sts 0x2492, r24 ; 0x802492 <integralFBz+0x2>
5364: 90 93 93 24 sts 0x2493, r25 ; 0x802493 <integralFBz+0x3>
5368: 20 91 98 24 lds r18, 0x2498 ; 0x802498 <integralFBx>
536c: 30 91 99 24 lds r19, 0x2499 ; 0x802499 <integralFBx+0x1>
5370: 40 91 9a 24 lds r20, 0x249A ; 0x80249a <integralFBx+0x2>
5374: 50 91 9b 24 lds r21, 0x249B ; 0x80249b <integralFBx+0x3>
5378: 69 89 ldd r22, Y+17 ; 0x11
537a: 7a 89 ldd r23, Y+18 ; 0x12
537c: 8b 89 ldd r24, Y+19 ; 0x13
537e: 9c 89 ldd r25, Y+20 ; 0x14
5380: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
5384: 69 8b std Y+17, r22 ; 0x11
5386: 7a 8b std Y+18, r23 ; 0x12
5388: 8b 8b std Y+19, r24 ; 0x13
538a: 9c 8b std Y+20, r25 ; 0x14
538c: 20 91 94 24 lds r18, 0x2494 ; 0x802494 <integralFBy>
5390: 30 91 95 24 lds r19, 0x2495 ; 0x802495 <integralFBy+0x1>
5394: 40 91 96 24 lds r20, 0x2496 ; 0x802496 <integralFBy+0x2>
5398: 50 91 97 24 lds r21, 0x2497 ; 0x802497 <integralFBy+0x3>
539c: 69 8d ldd r22, Y+25 ; 0x19
539e: 7a 8d ldd r23, Y+26 ; 0x1a
53a0: 8b 8d ldd r24, Y+27 ; 0x1b
53a2: 9c 8d ldd r25, Y+28 ; 0x1c
53a4: 0e 94 d4 31 call 0x63a8 ; 0x63a8 <__addsf3>
53a8: 69 8f std Y+25, r22 ; 0x19
53aa: 7a 8f std Y+26, r23 ; 0x1a
53ac: 8b 8f std Y+27, r24 ; 0x1b
53ae: 9c 8f std Y+28, r25 ; 0x1c
53b0: 20 91 90 24 lds r18, 0x2490 ; 0x802490 <integralFBz>
53b4: 30 91 91 24 lds r19, 0x2491 ; 0x802491 <integralFBz+0x1>
53b8: 40 91 92 24 lds r20, 0x2492 ; 0x802492 <integralFBz+0x2>
53bc: 50 91 93 24 lds r21, 0x2493 ; 0x802493 <integralFBz+0x3>
53c0: 69 81 ldd r22, Y+1 ; 0x01
53c2: 7a 81 ldd r23, Y+2 ; 0x02
53c4: 8b 81 ldd r24, Y+3 ; 0x03
53c6: 9c 81 ldd r25, Y+4 ; 0x04
53c8: ef d7 rcall .+4062 ; 0x63a8 <__addsf3>
53ca: 69 83 std Y+1, r22 ; 0x01
53cc: 7a 83 std Y+2, r23 ; 0x02
53ce: 8b 83 std Y+3, r24 ; 0x03
53d0: 9c 83 std Y+4, r25 ; 0x04
53d2: 18 c0 rjmp .+48 ; 0x5404 <MahonyAHRSupdate+0xbc0>
53d4: 10 92 98 24 sts 0x2498, r1 ; 0x802498 <integralFBx>
53d8: 10 92 99 24 sts 0x2499, r1 ; 0x802499 <integralFBx+0x1>
53dc: 10 92 9a 24 sts 0x249A, r1 ; 0x80249a <integralFBx+0x2>
53e0: 10 92 9b 24 sts 0x249B, r1 ; 0x80249b <integralFBx+0x3>
53e4: 10 92 94 24 sts 0x2494, r1 ; 0x802494 <integralFBy>
53e8: 10 92 95 24 sts 0x2495, r1 ; 0x802495 <integralFBy+0x1>
53ec: 10 92 96 24 sts 0x2496, r1 ; 0x802496 <integralFBy+0x2>
53f0: 10 92 97 24 sts 0x2497, r1 ; 0x802497 <integralFBy+0x3>
53f4: 10 92 90 24 sts 0x2490, r1 ; 0x802490 <integralFBz>
53f8: 10 92 91 24 sts 0x2491, r1 ; 0x802491 <integralFBz+0x1>
53fc: 10 92 92 24 sts 0x2492, r1 ; 0x802492 <integralFBz+0x2>
5400: 10 92 93 24 sts 0x2493, r1 ; 0x802493 <integralFBz+0x3>
5404: 20 91 04 20 lds r18, 0x2004 ; 0x802004 <twoKp>
5408: 30 91 05 20 lds r19, 0x2005 ; 0x802005 <twoKp+0x1>
540c: 40 91 06 20 lds r20, 0x2006 ; 0x802006 <twoKp+0x2>
5410: 50 91 07 20 lds r21, 0x2007 ; 0x802007 <twoKp+0x3>
5414: 6d 89 ldd r22, Y+21 ; 0x15
5416: 7e 89 ldd r23, Y+22 ; 0x16
5418: 8f 89 ldd r24, Y+23 ; 0x17
541a: 98 8d ldd r25, Y+24 ; 0x18
541c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5420: 9b 01 movw r18, r22
5422: ac 01 movw r20, r24
5424: 69 89 ldd r22, Y+17 ; 0x11
5426: 7a 89 ldd r23, Y+18 ; 0x12
5428: 8b 89 ldd r24, Y+19 ; 0x13
542a: 9c 89 ldd r25, Y+20 ; 0x14
542c: bd d7 rcall .+3962 ; 0x63a8 <__addsf3>
542e: 69 8b std Y+17, r22 ; 0x11
5430: 7a 8b std Y+18, r23 ; 0x12
5432: 8b 8b std Y+19, r24 ; 0x13
5434: 9c 8b std Y+20, r25 ; 0x14
5436: 20 91 04 20 lds r18, 0x2004 ; 0x802004 <twoKp>
543a: 30 91 05 20 lds r19, 0x2005 ; 0x802005 <twoKp+0x1>
543e: 40 91 06 20 lds r20, 0x2006 ; 0x802006 <twoKp+0x2>
5442: 50 91 07 20 lds r21, 0x2007 ; 0x802007 <twoKp+0x3>
5446: c5 01 movw r24, r10
5448: b4 01 movw r22, r8
544a: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
544e: 9b 01 movw r18, r22
5450: ac 01 movw r20, r24
5452: 69 8d ldd r22, Y+25 ; 0x19
5454: 7a 8d ldd r23, Y+26 ; 0x1a
5456: 8b 8d ldd r24, Y+27 ; 0x1b
5458: 9c 8d ldd r25, Y+28 ; 0x1c
545a: a6 d7 rcall .+3916 ; 0x63a8 <__addsf3>
545c: 69 8f std Y+25, r22 ; 0x19
545e: 7a 8f std Y+26, r23 ; 0x1a
5460: 8b 8f std Y+27, r24 ; 0x1b
5462: 9c 8f std Y+28, r25 ; 0x1c
5464: 20 91 04 20 lds r18, 0x2004 ; 0x802004 <twoKp>
5468: 30 91 05 20 lds r19, 0x2005 ; 0x802005 <twoKp+0x1>
546c: 40 91 06 20 lds r20, 0x2006 ; 0x802006 <twoKp+0x2>
5470: 50 91 07 20 lds r21, 0x2007 ; 0x802007 <twoKp+0x3>
5474: c7 01 movw r24, r14
5476: b6 01 movw r22, r12
5478: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
547c: 9b 01 movw r18, r22
547e: ac 01 movw r20, r24
5480: 69 81 ldd r22, Y+1 ; 0x01
5482: 7a 81 ldd r23, Y+2 ; 0x02
5484: 8b 81 ldd r24, Y+3 ; 0x03
5486: 9c 81 ldd r25, Y+4 ; 0x04
5488: 8f d7 rcall .+3870 ; 0x63a8 <__addsf3>
548a: 69 83 std Y+1, r22 ; 0x01
548c: 7a 83 std Y+2, r23 ; 0x02
548e: 8b 83 std Y+3, r24 ; 0x03
5490: 9c 83 std Y+4, r25 ; 0x04
5492: 2a ef ldi r18, 0xFA ; 250
5494: 39 ec ldi r19, 0xC9 ; 201
5496: 44 eb ldi r20, 0xB4 ; 180
5498: 58 e3 ldi r21, 0x38 ; 56
549a: 69 89 ldd r22, Y+17 ; 0x11
549c: 7a 89 ldd r23, Y+18 ; 0x12
549e: 8b 89 ldd r24, Y+19 ; 0x13
54a0: 9c 89 ldd r25, Y+20 ; 0x14
54a2: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
54a6: 6d 83 std Y+5, r22 ; 0x05
54a8: 7e 83 std Y+6, r23 ; 0x06
54aa: 8f 83 std Y+7, r24 ; 0x07
54ac: 98 87 std Y+8, r25 ; 0x08
54ae: 2a ef ldi r18, 0xFA ; 250
54b0: 39 ec ldi r19, 0xC9 ; 201
54b2: 44 eb ldi r20, 0xB4 ; 180
54b4: 58 e3 ldi r21, 0x38 ; 56
54b6: 69 8d ldd r22, Y+25 ; 0x19
54b8: 7a 8d ldd r23, Y+26 ; 0x1a
54ba: 8b 8d ldd r24, Y+27 ; 0x1b
54bc: 9c 8d ldd r25, Y+28 ; 0x1c
54be: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
54c2: 69 87 std Y+9, r22 ; 0x09
54c4: 7a 87 std Y+10, r23 ; 0x0a
54c6: 8b 87 std Y+11, r24 ; 0x0b
54c8: 9c 87 std Y+12, r25 ; 0x0c
54ca: 2a ef ldi r18, 0xFA ; 250
54cc: 39 ec ldi r19, 0xC9 ; 201
54ce: 44 eb ldi r20, 0xB4 ; 180
54d0: 58 e3 ldi r21, 0x38 ; 56
54d2: 69 81 ldd r22, Y+1 ; 0x01
54d4: 7a 81 ldd r23, Y+2 ; 0x02
54d6: 8b 81 ldd r24, Y+3 ; 0x03
54d8: 9c 81 ldd r25, Y+4 ; 0x04
54da: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
54de: 6d 87 std Y+13, r22 ; 0x0d
54e0: 7e 87 std Y+14, r23 ; 0x0e
54e2: 8f 87 std Y+15, r24 ; 0x0f
54e4: 98 8b std Y+16, r25 ; 0x10
54e6: e0 90 00 20 lds r14, 0x2000 ; 0x802000 <__data_start>
54ea: f0 90 01 20 lds r15, 0x2001 ; 0x802001 <__data_start+0x1>
54ee: 00 91 02 20 lds r16, 0x2002 ; 0x802002 <__data_start+0x2>
54f2: 10 91 03 20 lds r17, 0x2003 ; 0x802003 <__data_start+0x3>
54f6: e9 8a std Y+17, r14 ; 0x11
54f8: fa 8a std Y+18, r15 ; 0x12
54fa: 0b 8b std Y+19, r16 ; 0x13
54fc: 1c 8b std Y+20, r17 ; 0x14
54fe: 80 90 a4 24 lds r8, 0x24A4 ; 0x8024a4 <q1>
5502: 90 90 a5 24 lds r9, 0x24A5 ; 0x8024a5 <q1+0x1>
5506: a0 90 a6 24 lds r10, 0x24A6 ; 0x8024a6 <q1+0x2>
550a: b0 90 a7 24 lds r11, 0x24A7 ; 0x8024a7 <q1+0x3>
550e: e0 90 a0 24 lds r14, 0x24A0 ; 0x8024a0 <q2>
5512: f0 90 a1 24 lds r15, 0x24A1 ; 0x8024a1 <q2+0x1>
5516: 00 91 a2 24 lds r16, 0x24A2 ; 0x8024a2 <q2+0x2>
551a: 10 91 a3 24 lds r17, 0x24A3 ; 0x8024a3 <q2+0x3>
551e: e9 8e std Y+25, r14 ; 0x19
5520: fa 8e std Y+26, r15 ; 0x1a
5522: 0b 8f std Y+27, r16 ; 0x1b
5524: 1c 8f std Y+28, r17 ; 0x1c
5526: 40 90 9c 24 lds r4, 0x249C ; 0x80249c <q3>
552a: 50 90 9d 24 lds r5, 0x249D ; 0x80249d <q3+0x1>
552e: 60 90 9e 24 lds r6, 0x249E ; 0x80249e <q3+0x2>
5532: 70 90 9f 24 lds r7, 0x249F ; 0x80249f <q3+0x3>
5536: c0 90 00 20 lds r12, 0x2000 ; 0x802000 <__data_start>
553a: d0 90 01 20 lds r13, 0x2001 ; 0x802001 <__data_start+0x1>
553e: e0 90 02 20 lds r14, 0x2002 ; 0x802002 <__data_start+0x2>
5542: f0 90 03 20 lds r15, 0x2003 ; 0x802003 <__data_start+0x3>
5546: c5 01 movw r24, r10
5548: b4 01 movw r22, r8
554a: 90 58 subi r25, 0x80 ; 128
554c: 2d 81 ldd r18, Y+5 ; 0x05
554e: 3e 81 ldd r19, Y+6 ; 0x06
5550: 4f 81 ldd r20, Y+7 ; 0x07
5552: 58 85 ldd r21, Y+8 ; 0x08
5554: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5558: 69 83 std Y+1, r22 ; 0x01
555a: 7a 83 std Y+2, r23 ; 0x02
555c: 8b 83 std Y+3, r24 ; 0x03
555e: 9c 83 std Y+4, r25 ; 0x04
5560: 29 8d ldd r18, Y+25 ; 0x19
5562: 3a 8d ldd r19, Y+26 ; 0x1a
5564: 4b 8d ldd r20, Y+27 ; 0x1b
5566: 5c 8d ldd r21, Y+28 ; 0x1c
5568: 69 85 ldd r22, Y+9 ; 0x09
556a: 7a 85 ldd r23, Y+10 ; 0x0a
556c: 8b 85 ldd r24, Y+11 ; 0x0b
556e: 9c 85 ldd r25, Y+12 ; 0x0c
5570: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5574: 9b 01 movw r18, r22
5576: ac 01 movw r20, r24
5578: 69 81 ldd r22, Y+1 ; 0x01
557a: 7a 81 ldd r23, Y+2 ; 0x02
557c: 8b 81 ldd r24, Y+3 ; 0x03
557e: 9c 81 ldd r25, Y+4 ; 0x04
5580: 12 d7 rcall .+3620 ; 0x63a6 <__subsf3>
5582: 69 83 std Y+1, r22 ; 0x01
5584: 7a 83 std Y+2, r23 ; 0x02
5586: 8b 83 std Y+3, r24 ; 0x03
5588: 9c 83 std Y+4, r25 ; 0x04
558a: a3 01 movw r20, r6
558c: 92 01 movw r18, r4
558e: 6d 85 ldd r22, Y+13 ; 0x0d
5590: 7e 85 ldd r23, Y+14 ; 0x0e
5592: 8f 85 ldd r24, Y+15 ; 0x0f
5594: 98 89 ldd r25, Y+16 ; 0x10
5596: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
559a: 9b 01 movw r18, r22
559c: ac 01 movw r20, r24
559e: 69 81 ldd r22, Y+1 ; 0x01
55a0: 7a 81 ldd r23, Y+2 ; 0x02
55a2: 8b 81 ldd r24, Y+3 ; 0x03
55a4: 9c 81 ldd r25, Y+4 ; 0x04
55a6: ff d6 rcall .+3582 ; 0x63a6 <__subsf3>
55a8: a7 01 movw r20, r14
55aa: 96 01 movw r18, r12
55ac: fd d6 rcall .+3578 ; 0x63a8 <__addsf3>
55ae: 60 93 00 20 sts 0x2000, r22 ; 0x802000 <__data_start>
55b2: 70 93 01 20 sts 0x2001, r23 ; 0x802001 <__data_start+0x1>
55b6: 80 93 02 20 sts 0x2002, r24 ; 0x802002 <__data_start+0x2>
55ba: 90 93 03 20 sts 0x2003, r25 ; 0x802003 <__data_start+0x3>
55be: 40 90 9c 24 lds r4, 0x249C ; 0x80249c <q3>
55c2: 50 90 9d 24 lds r5, 0x249D ; 0x80249d <q3+0x1>
55c6: 60 90 9e 24 lds r6, 0x249E ; 0x80249e <q3+0x2>
55ca: 70 90 9f 24 lds r7, 0x249F ; 0x80249f <q3+0x3>
55ce: c0 90 a4 24 lds r12, 0x24A4 ; 0x8024a4 <q1>
55d2: d0 90 a5 24 lds r13, 0x24A5 ; 0x8024a5 <q1+0x1>
55d6: e0 90 a6 24 lds r14, 0x24A6 ; 0x8024a6 <q1+0x2>
55da: f0 90 a7 24 lds r15, 0x24A7 ; 0x8024a7 <q1+0x3>
55de: 29 89 ldd r18, Y+17 ; 0x11
55e0: 3a 89 ldd r19, Y+18 ; 0x12
55e2: 4b 89 ldd r20, Y+19 ; 0x13
55e4: 5c 89 ldd r21, Y+20 ; 0x14
55e6: 6d 81 ldd r22, Y+5 ; 0x05
55e8: 7e 81 ldd r23, Y+6 ; 0x06
55ea: 8f 81 ldd r24, Y+7 ; 0x07
55ec: 98 85 ldd r25, Y+8 ; 0x08
55ee: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
55f2: 69 83 std Y+1, r22 ; 0x01
55f4: 7a 83 std Y+2, r23 ; 0x02
55f6: 8b 83 std Y+3, r24 ; 0x03
55f8: 9c 83 std Y+4, r25 ; 0x04
55fa: 29 8d ldd r18, Y+25 ; 0x19
55fc: 3a 8d ldd r19, Y+26 ; 0x1a
55fe: 4b 8d ldd r20, Y+27 ; 0x1b
5600: 5c 8d ldd r21, Y+28 ; 0x1c
5602: 6d 85 ldd r22, Y+13 ; 0x0d
5604: 7e 85 ldd r23, Y+14 ; 0x0e
5606: 8f 85 ldd r24, Y+15 ; 0x0f
5608: 98 89 ldd r25, Y+16 ; 0x10
560a: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
560e: 9b 01 movw r18, r22
5610: ac 01 movw r20, r24
5612: 69 81 ldd r22, Y+1 ; 0x01
5614: 7a 81 ldd r23, Y+2 ; 0x02
5616: 8b 81 ldd r24, Y+3 ; 0x03
5618: 9c 81 ldd r25, Y+4 ; 0x04
561a: c6 d6 rcall .+3468 ; 0x63a8 <__addsf3>
561c: 69 83 std Y+1, r22 ; 0x01
561e: 7a 83 std Y+2, r23 ; 0x02
5620: 8b 83 std Y+3, r24 ; 0x03
5622: 9c 83 std Y+4, r25 ; 0x04
5624: a3 01 movw r20, r6
5626: 92 01 movw r18, r4
5628: 69 85 ldd r22, Y+9 ; 0x09
562a: 7a 85 ldd r23, Y+10 ; 0x0a
562c: 8b 85 ldd r24, Y+11 ; 0x0b
562e: 9c 85 ldd r25, Y+12 ; 0x0c
5630: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5634: 9b 01 movw r18, r22
5636: ac 01 movw r20, r24
5638: 69 81 ldd r22, Y+1 ; 0x01
563a: 7a 81 ldd r23, Y+2 ; 0x02
563c: 8b 81 ldd r24, Y+3 ; 0x03
563e: 9c 81 ldd r25, Y+4 ; 0x04
5640: b2 d6 rcall .+3428 ; 0x63a6 <__subsf3>
5642: a7 01 movw r20, r14
5644: 96 01 movw r18, r12
5646: b0 d6 rcall .+3424 ; 0x63a8 <__addsf3>
5648: 60 93 a4 24 sts 0x24A4, r22 ; 0x8024a4 <q1>
564c: 70 93 a5 24 sts 0x24A5, r23 ; 0x8024a5 <q1+0x1>
5650: 80 93 a6 24 sts 0x24A6, r24 ; 0x8024a6 <q1+0x2>
5654: 90 93 a7 24 sts 0x24A7, r25 ; 0x8024a7 <q1+0x3>
5658: 40 90 9c 24 lds r4, 0x249C ; 0x80249c <q3>
565c: 50 90 9d 24 lds r5, 0x249D ; 0x80249d <q3+0x1>
5660: 60 90 9e 24 lds r6, 0x249E ; 0x80249e <q3+0x2>
5664: 70 90 9f 24 lds r7, 0x249F ; 0x80249f <q3+0x3>
5668: c0 90 a0 24 lds r12, 0x24A0 ; 0x8024a0 <q2>
566c: d0 90 a1 24 lds r13, 0x24A1 ; 0x8024a1 <q2+0x1>
5670: e0 90 a2 24 lds r14, 0x24A2 ; 0x8024a2 <q2+0x2>
5674: f0 90 a3 24 lds r15, 0x24A3 ; 0x8024a3 <q2+0x3>
5678: 29 89 ldd r18, Y+17 ; 0x11
567a: 3a 89 ldd r19, Y+18 ; 0x12
567c: 4b 89 ldd r20, Y+19 ; 0x13
567e: 5c 89 ldd r21, Y+20 ; 0x14
5680: 69 85 ldd r22, Y+9 ; 0x09
5682: 7a 85 ldd r23, Y+10 ; 0x0a
5684: 8b 85 ldd r24, Y+11 ; 0x0b
5686: 9c 85 ldd r25, Y+12 ; 0x0c
5688: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
568c: 69 83 std Y+1, r22 ; 0x01
568e: 7a 83 std Y+2, r23 ; 0x02
5690: 8b 83 std Y+3, r24 ; 0x03
5692: 9c 83 std Y+4, r25 ; 0x04
5694: a5 01 movw r20, r10
5696: 94 01 movw r18, r8
5698: 6d 85 ldd r22, Y+13 ; 0x0d
569a: 7e 85 ldd r23, Y+14 ; 0x0e
569c: 8f 85 ldd r24, Y+15 ; 0x0f
569e: 98 89 ldd r25, Y+16 ; 0x10
56a0: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
56a4: 9b 01 movw r18, r22
56a6: ac 01 movw r20, r24
56a8: 69 81 ldd r22, Y+1 ; 0x01
56aa: 7a 81 ldd r23, Y+2 ; 0x02
56ac: 8b 81 ldd r24, Y+3 ; 0x03
56ae: 9c 81 ldd r25, Y+4 ; 0x04
56b0: 7a d6 rcall .+3316 ; 0x63a6 <__subsf3>
56b2: 69 83 std Y+1, r22 ; 0x01
56b4: 7a 83 std Y+2, r23 ; 0x02
56b6: 8b 83 std Y+3, r24 ; 0x03
56b8: 9c 83 std Y+4, r25 ; 0x04
56ba: a3 01 movw r20, r6
56bc: 92 01 movw r18, r4
56be: 6d 81 ldd r22, Y+5 ; 0x05
56c0: 7e 81 ldd r23, Y+6 ; 0x06
56c2: 8f 81 ldd r24, Y+7 ; 0x07
56c4: 98 85 ldd r25, Y+8 ; 0x08
56c6: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
56ca: 9b 01 movw r18, r22
56cc: ac 01 movw r20, r24
56ce: 69 81 ldd r22, Y+1 ; 0x01
56d0: 7a 81 ldd r23, Y+2 ; 0x02
56d2: 8b 81 ldd r24, Y+3 ; 0x03
56d4: 9c 81 ldd r25, Y+4 ; 0x04
56d6: 68 d6 rcall .+3280 ; 0x63a8 <__addsf3>
56d8: a7 01 movw r20, r14
56da: 96 01 movw r18, r12
56dc: 65 d6 rcall .+3274 ; 0x63a8 <__addsf3>
56de: 60 93 a0 24 sts 0x24A0, r22 ; 0x8024a0 <q2>
56e2: 70 93 a1 24 sts 0x24A1, r23 ; 0x8024a1 <q2+0x1>
56e6: 80 93 a2 24 sts 0x24A2, r24 ; 0x8024a2 <q2+0x2>
56ea: 90 93 a3 24 sts 0x24A3, r25 ; 0x8024a3 <q2+0x3>
56ee: c0 90 9c 24 lds r12, 0x249C ; 0x80249c <q3>
56f2: d0 90 9d 24 lds r13, 0x249D ; 0x80249d <q3+0x1>
56f6: e0 90 9e 24 lds r14, 0x249E ; 0x80249e <q3+0x2>
56fa: f0 90 9f 24 lds r15, 0x249F ; 0x80249f <q3+0x3>
56fe: 29 89 ldd r18, Y+17 ; 0x11
5700: 3a 89 ldd r19, Y+18 ; 0x12
5702: 4b 89 ldd r20, Y+19 ; 0x13
5704: 5c 89 ldd r21, Y+20 ; 0x14
5706: 6d 85 ldd r22, Y+13 ; 0x0d
5708: 7e 85 ldd r23, Y+14 ; 0x0e
570a: 8f 85 ldd r24, Y+15 ; 0x0f
570c: 98 89 ldd r25, Y+16 ; 0x10
570e: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5712: 2b 01 movw r4, r22
5714: 3c 01 movw r6, r24
5716: a5 01 movw r20, r10
5718: 94 01 movw r18, r8
571a: 69 85 ldd r22, Y+9 ; 0x09
571c: 7a 85 ldd r23, Y+10 ; 0x0a
571e: 8b 85 ldd r24, Y+11 ; 0x0b
5720: 9c 85 ldd r25, Y+12 ; 0x0c
5722: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5726: 9b 01 movw r18, r22
5728: ac 01 movw r20, r24
572a: c3 01 movw r24, r6
572c: b2 01 movw r22, r4
572e: 3c d6 rcall .+3192 ; 0x63a8 <__addsf3>
5730: 4b 01 movw r8, r22
5732: 5c 01 movw r10, r24
5734: 29 8d ldd r18, Y+25 ; 0x19
5736: 3a 8d ldd r19, Y+26 ; 0x1a
5738: 4b 8d ldd r20, Y+27 ; 0x1b
573a: 5c 8d ldd r21, Y+28 ; 0x1c
573c: 6d 81 ldd r22, Y+5 ; 0x05
573e: 7e 81 ldd r23, Y+6 ; 0x06
5740: 8f 81 ldd r24, Y+7 ; 0x07
5742: 98 85 ldd r25, Y+8 ; 0x08
5744: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5748: 9b 01 movw r18, r22
574a: ac 01 movw r20, r24
574c: c5 01 movw r24, r10
574e: b4 01 movw r22, r8
5750: 2a d6 rcall .+3156 ; 0x63a6 <__subsf3>
5752: a7 01 movw r20, r14
5754: 96 01 movw r18, r12
5756: 28 d6 rcall .+3152 ; 0x63a8 <__addsf3>
5758: 60 93 9c 24 sts 0x249C, r22 ; 0x80249c <q3>
575c: 70 93 9d 24 sts 0x249D, r23 ; 0x80249d <q3+0x1>
5760: 80 93 9e 24 sts 0x249E, r24 ; 0x80249e <q3+0x2>
5764: 90 93 9f 24 sts 0x249F, r25 ; 0x80249f <q3+0x3>
5768: 60 91 00 20 lds r22, 0x2000 ; 0x802000 <__data_start>
576c: 70 91 01 20 lds r23, 0x2001 ; 0x802001 <__data_start+0x1>
5770: 80 91 02 20 lds r24, 0x2002 ; 0x802002 <__data_start+0x2>
5774: 90 91 03 20 lds r25, 0x2003 ; 0x802003 <__data_start+0x3>
5778: 20 91 00 20 lds r18, 0x2000 ; 0x802000 <__data_start>
577c: 30 91 01 20 lds r19, 0x2001 ; 0x802001 <__data_start+0x1>
5780: 40 91 02 20 lds r20, 0x2002 ; 0x802002 <__data_start+0x2>
5784: 50 91 03 20 lds r21, 0x2003 ; 0x802003 <__data_start+0x3>
5788: 80 90 a4 24 lds r8, 0x24A4 ; 0x8024a4 <q1>
578c: 90 90 a5 24 lds r9, 0x24A5 ; 0x8024a5 <q1+0x1>
5790: a0 90 a6 24 lds r10, 0x24A6 ; 0x8024a6 <q1+0x2>
5794: b0 90 a7 24 lds r11, 0x24A7 ; 0x8024a7 <q1+0x3>
5798: 40 90 a4 24 lds r4, 0x24A4 ; 0x8024a4 <q1>
579c: 50 90 a5 24 lds r5, 0x24A5 ; 0x8024a5 <q1+0x1>
57a0: 60 90 a6 24 lds r6, 0x24A6 ; 0x8024a6 <q1+0x2>
57a4: 70 90 a7 24 lds r7, 0x24A7 ; 0x8024a7 <q1+0x3>
57a8: e0 90 a0 24 lds r14, 0x24A0 ; 0x8024a0 <q2>
57ac: f0 90 a1 24 lds r15, 0x24A1 ; 0x8024a1 <q2+0x1>
57b0: 00 91 a2 24 lds r16, 0x24A2 ; 0x8024a2 <q2+0x2>
57b4: 10 91 a3 24 lds r17, 0x24A3 ; 0x8024a3 <q2+0x3>
57b8: ed 82 std Y+5, r14 ; 0x05
57ba: fe 82 std Y+6, r15 ; 0x06
57bc: 0f 83 std Y+7, r16 ; 0x07
57be: 18 87 std Y+8, r17 ; 0x08
57c0: e0 90 a0 24 lds r14, 0x24A0 ; 0x8024a0 <q2>
57c4: f0 90 a1 24 lds r15, 0x24A1 ; 0x8024a1 <q2+0x1>
57c8: 00 91 a2 24 lds r16, 0x24A2 ; 0x8024a2 <q2+0x2>
57cc: 10 91 a3 24 lds r17, 0x24A3 ; 0x8024a3 <q2+0x3>
57d0: e9 86 std Y+9, r14 ; 0x09
57d2: fa 86 std Y+10, r15 ; 0x0a
57d4: 0b 87 std Y+11, r16 ; 0x0b
57d6: 1c 87 std Y+12, r17 ; 0x0c
57d8: e0 90 9c 24 lds r14, 0x249C ; 0x80249c <q3>
57dc: f0 90 9d 24 lds r15, 0x249D ; 0x80249d <q3+0x1>
57e0: 00 91 9e 24 lds r16, 0x249E ; 0x80249e <q3+0x2>
57e4: 10 91 9f 24 lds r17, 0x249F ; 0x80249f <q3+0x3>
57e8: e9 82 std Y+1, r14 ; 0x01
57ea: fa 82 std Y+2, r15 ; 0x02
57ec: 0b 83 std Y+3, r16 ; 0x03
57ee: 1c 83 std Y+4, r17 ; 0x04
57f0: e0 90 9c 24 lds r14, 0x249C ; 0x80249c <q3>
57f4: f0 90 9d 24 lds r15, 0x249D ; 0x80249d <q3+0x1>
57f8: 00 91 9e 24 lds r16, 0x249E ; 0x80249e <q3+0x2>
57fc: 10 91 9f 24 lds r17, 0x249F ; 0x80249f <q3+0x3>
5800: ed 86 std Y+13, r14 ; 0x0d
5802: fe 86 std Y+14, r15 ; 0x0e
5804: 0f 87 std Y+15, r16 ; 0x0f
5806: 18 8b std Y+16, r17 ; 0x10
5808: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
580c: 6b 01 movw r12, r22
580e: 7c 01 movw r14, r24
5810: a3 01 movw r20, r6
5812: 92 01 movw r18, r4
5814: c5 01 movw r24, r10
5816: b4 01 movw r22, r8
5818: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
581c: 9b 01 movw r18, r22
581e: ac 01 movw r20, r24
5820: c7 01 movw r24, r14
5822: b6 01 movw r22, r12
5824: c1 d5 rcall .+2946 ; 0x63a8 <__addsf3>
5826: 4b 01 movw r8, r22
5828: 5c 01 movw r10, r24
582a: 29 85 ldd r18, Y+9 ; 0x09
582c: 3a 85 ldd r19, Y+10 ; 0x0a
582e: 4b 85 ldd r20, Y+11 ; 0x0b
5830: 5c 85 ldd r21, Y+12 ; 0x0c
5832: 6d 81 ldd r22, Y+5 ; 0x05
5834: 7e 81 ldd r23, Y+6 ; 0x06
5836: 8f 81 ldd r24, Y+7 ; 0x07
5838: 98 85 ldd r25, Y+8 ; 0x08
583a: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
583e: 9b 01 movw r18, r22
5840: ac 01 movw r20, r24
5842: c5 01 movw r24, r10
5844: b4 01 movw r22, r8
5846: b0 d5 rcall .+2912 ; 0x63a8 <__addsf3>
5848: 4b 01 movw r8, r22
584a: 5c 01 movw r10, r24
584c: 2d 85 ldd r18, Y+13 ; 0x0d
584e: 3e 85 ldd r19, Y+14 ; 0x0e
5850: 4f 85 ldd r20, Y+15 ; 0x0f
5852: 58 89 ldd r21, Y+16 ; 0x10
5854: 69 81 ldd r22, Y+1 ; 0x01
5856: 7a 81 ldd r23, Y+2 ; 0x02
5858: 8b 81 ldd r24, Y+3 ; 0x03
585a: 9c 81 ldd r25, Y+4 ; 0x04
585c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5860: 9b 01 movw r18, r22
5862: ac 01 movw r20, r24
5864: c5 01 movw r24, r10
5866: b4 01 movw r22, r8
5868: 9f d5 rcall .+2878 ; 0x63a8 <__addsf3>
586a: 8b 01 movw r16, r22
586c: 9c 01 movw r18, r24
586e: 35 95 asr r19
5870: 27 95 ror r18
5872: 17 95 ror r17
5874: 07 95 ror r16
5876: 0f 2e mov r0, r31
5878: ff ed ldi r31, 0xDF ; 223
587a: cf 2e mov r12, r31
587c: f9 e5 ldi r31, 0x59 ; 89
587e: df 2e mov r13, r31
5880: f7 e3 ldi r31, 0x37 ; 55
5882: ef 2e mov r14, r31
5884: ff e5 ldi r31, 0x5F ; 95
5886: ff 2e mov r15, r31
5888: f0 2d mov r31, r0
588a: c0 1a sub r12, r16
588c: d1 0a sbc r13, r17
588e: e2 0a sbc r14, r18
5890: f3 0a sbc r15, r19
5892: 20 e0 ldi r18, 0x00 ; 0
5894: 30 e0 ldi r19, 0x00 ; 0
5896: 40 e0 ldi r20, 0x00 ; 0
5898: 5f e3 ldi r21, 0x3F ; 63
589a: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
589e: a7 01 movw r20, r14
58a0: 96 01 movw r18, r12
58a2: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
58a6: a7 01 movw r20, r14
58a8: 96 01 movw r18, r12
58aa: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
58ae: 9b 01 movw r18, r22
58b0: ac 01 movw r20, r24
58b2: 60 e0 ldi r22, 0x00 ; 0
58b4: 70 e0 ldi r23, 0x00 ; 0
58b6: 80 ec ldi r24, 0xC0 ; 192
58b8: 9f e3 ldi r25, 0x3F ; 63
58ba: 75 d5 rcall .+2794 ; 0x63a6 <__subsf3>
58bc: a7 01 movw r20, r14
58be: 96 01 movw r18, r12
58c0: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
58c4: 6b 01 movw r12, r22
58c6: 7c 01 movw r14, r24
58c8: 60 91 00 20 lds r22, 0x2000 ; 0x802000 <__data_start>
58cc: 70 91 01 20 lds r23, 0x2001 ; 0x802001 <__data_start+0x1>
58d0: 80 91 02 20 lds r24, 0x2002 ; 0x802002 <__data_start+0x2>
58d4: 90 91 03 20 lds r25, 0x2003 ; 0x802003 <__data_start+0x3>
58d8: a7 01 movw r20, r14
58da: 96 01 movw r18, r12
58dc: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
58e0: 60 93 00 20 sts 0x2000, r22 ; 0x802000 <__data_start>
58e4: 70 93 01 20 sts 0x2001, r23 ; 0x802001 <__data_start+0x1>
58e8: 80 93 02 20 sts 0x2002, r24 ; 0x802002 <__data_start+0x2>
58ec: 90 93 03 20 sts 0x2003, r25 ; 0x802003 <__data_start+0x3>
58f0: 60 91 a4 24 lds r22, 0x24A4 ; 0x8024a4 <q1>
58f4: 70 91 a5 24 lds r23, 0x24A5 ; 0x8024a5 <q1+0x1>
58f8: 80 91 a6 24 lds r24, 0x24A6 ; 0x8024a6 <q1+0x2>
58fc: 90 91 a7 24 lds r25, 0x24A7 ; 0x8024a7 <q1+0x3>
5900: a7 01 movw r20, r14
5902: 96 01 movw r18, r12
5904: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5908: 60 93 a4 24 sts 0x24A4, r22 ; 0x8024a4 <q1>
590c: 70 93 a5 24 sts 0x24A5, r23 ; 0x8024a5 <q1+0x1>
5910: 80 93 a6 24 sts 0x24A6, r24 ; 0x8024a6 <q1+0x2>
5914: 90 93 a7 24 sts 0x24A7, r25 ; 0x8024a7 <q1+0x3>
5918: 60 91 a0 24 lds r22, 0x24A0 ; 0x8024a0 <q2>
591c: 70 91 a1 24 lds r23, 0x24A1 ; 0x8024a1 <q2+0x1>
5920: 80 91 a2 24 lds r24, 0x24A2 ; 0x8024a2 <q2+0x2>
5924: 90 91 a3 24 lds r25, 0x24A3 ; 0x8024a3 <q2+0x3>
5928: a7 01 movw r20, r14
592a: 96 01 movw r18, r12
592c: 0e 94 a1 34 call 0x6942 ; 0x6942 <__mulsf3>
5930: 60 93 a0 24 sts 0x24A0, r22 ; 0x8024a0 <q2>
5934: 70 93 a1 24 sts 0x24A1, r23 ; 0x8024a1 <q2+0x1>
5938: 80 93 a2 24 sts 0x24A2, r24 ; 0x8024a2 <q2+0x2>
593c: 90 93 a3 24 sts 0x24A3, r25 ; 0x8024a3 <q2+0x3>
5940: 60 91 9c 24 lds r22, 0x249C ; 0x80249c <q3>
5944: 70 91 9d 24 lds r23, 0x249D ; 0x80249d <q3+0x1>
5948: 80 91 9e 24 lds r24, 0x249E ; 0x80249e <q3+0x2>
594c: 90 91 9f 24 lds r25, 0x249F ; 0x80249f <q3+0x3>
5950: a7 01 movw r20, r14
5952: 96 01 movw r18, r12
5954: f6 d7 rcall .+4076 ; 0x6942 <__mulsf3>
5956: 60 93 9c 24 sts 0x249C, r22 ; 0x80249c <q3>
595a: 70 93 9d 24 sts 0x249D, r23 ; 0x80249d <q3+0x1>
595e: 80 93 9e 24 sts 0x249E, r24 ; 0x80249e <q3+0x2>
5962: 90 93 9f 24 sts 0x249F, r25 ; 0x80249f <q3+0x3>
5966: c8 5a subi r28, 0xA8 ; 168
5968: df 4f sbci r29, 0xFF ; 255
596a: cd bf out 0x3d, r28 ; 61
596c: de bf out 0x3e, r29 ; 62
596e: df 91 pop r29
5970: cf 91 pop r28
5972: 1f 91 pop r17
5974: 0f 91 pop r16
5976: ff 90 pop r15
5978: ef 90 pop r14
597a: df 90 pop r13
597c: cf 90 pop r12
597e: bf 90 pop r11
5980: af 90 pop r10
5982: 9f 90 pop r9
5984: 8f 90 pop r8
5986: 7f 90 pop r7
5988: 6f 90 pop r6
598a: 5f 90 pop r5
598c: 4f 90 pop r4
598e: 3f 90 pop r3
5990: 2f 90 pop r2
5992: 08 95 ret
00005994 <set_32hz_ready>:
5994: 81 e0 ldi r24, 0x01 ; 1
5996: 80 93 ac 24 sts 0x24AC, r24 ; 0x8024ac <timer_32hz_ready>
599a: 08 95 ret
0000599c <cb_append_float>:
599c: fc 01 movw r30, r24
599e: 83 81 ldd r24, Z+3 ; 0x03
59a0: a1 81 ldd r26, Z+1 ; 0x01
59a2: b2 81 ldd r27, Z+2 ; 0x02
59a4: 94 e0 ldi r25, 0x04 ; 4
59a6: 89 9f mul r24, r25
59a8: a0 0d add r26, r0
59aa: b1 1d adc r27, r1
59ac: 11 24 eor r1, r1
59ae: 1d 92 st X+, r1
59b0: 1d 92 st X+, r1
59b2: 1d 92 st X+, r1
59b4: 1c 92 st X, r1
59b6: 13 97 sbiw r26, 0x03 ; 3
59b8: 83 81 ldd r24, Z+3 ; 0x03
59ba: a1 81 ldd r26, Z+1 ; 0x01
59bc: b2 81 ldd r27, Z+2 ; 0x02
59be: 94 e0 ldi r25, 0x04 ; 4
59c0: 89 9f mul r24, r25
59c2: a0 0d add r26, r0
59c4: b1 1d adc r27, r1
59c6: 11 24 eor r1, r1
59c8: 4d 93 st X+, r20
59ca: 5d 93 st X+, r21
59cc: 6d 93 st X+, r22
59ce: 7c 93 st X, r23
59d0: 13 97 sbiw r26, 0x03 ; 3
59d2: 20 81 ld r18, Z
59d4: 83 81 ldd r24, Z+3 ; 0x03
59d6: 90 e0 ldi r25, 0x00 ; 0
59d8: 01 96 adiw r24, 0x01 ; 1
59da: 62 2f mov r22, r18
59dc: 70 e0 ldi r23, 0x00 ; 0
59de: 0e 94 1a 3a call 0x7434 ; 0x7434 <__divmodhi4>
59e2: 83 83 std Z+3, r24 ; 0x03
59e4: 84 81 ldd r24, Z+4 ; 0x04
59e6: 82 17 cp r24, r18
59e8: 10 f4 brcc .+4 ; 0x59ee <cb_append_float+0x52>
59ea: 8f 5f subi r24, 0xFF ; 255
59ec: 84 83 std Z+4, r24 ; 0x04
59ee: 08 95 ret
000059f0 <cb_getAvg_float>:
59f0: 4f 92 push r4
59f2: 5f 92 push r5
59f4: 6f 92 push r6
59f6: 7f 92 push r7
59f8: 8f 92 push r8
59fa: 9f 92 push r9
59fc: af 92 push r10
59fe: bf 92 push r11
5a00: cf 92 push r12
5a02: df 92 push r13
5a04: ef 92 push r14
5a06: ff 92 push r15
5a08: 0f 93 push r16
5a0a: 1f 93 push r17
5a0c: cf 93 push r28
5a0e: df 93 push r29
5a10: fc 01 movw r30, r24
5a12: d4 81 ldd r29, Z+4 ; 0x04
5a14: dd 23 and r29, r29
5a16: 09 f4 brne .+2 ; 0x5a1a <cb_getAvg_float+0x2a>
5a18: 7c c0 rjmp .+248 ; 0x5b12 <cb_getAvg_float+0x122>
5a1a: b0 80 ld r11, Z
5a1c: db 15 cp r29, r11
5a1e: 39 f0 breq .+14 ; 0x5a2e <cb_getAvg_float+0x3e>
5a20: b1 10 cpse r11, r1
5a22: 53 c0 rjmp .+166 ; 0x5aca <cb_getAvg_float+0xda>
5a24: 80 e0 ldi r24, 0x00 ; 0
5a26: c1 2c mov r12, r1
5a28: d1 2c mov r13, r1
5a2a: 76 01 movw r14, r12
5a2c: 63 c0 rjmp .+198 ; 0x5af4 <cb_getAvg_float+0x104>
5a2e: 01 81 ldd r16, Z+1 ; 0x01
5a30: 12 81 ldd r17, Z+2 ; 0x02
5a32: 78 01 movw r14, r16
5a34: c0 e0 ldi r28, 0x00 ; 0
5a36: 91 2c mov r9, r1
5a38: 81 2c mov r8, r1
5a3a: f7 01 movw r30, r14
5a3c: 41 90 ld r4, Z+
5a3e: 51 90 ld r5, Z+
5a40: 61 90 ld r6, Z+
5a42: 71 90 ld r7, Z+
5a44: 7f 01 movw r14, r30
5a46: f8 01 movw r30, r16
5a48: 84 e0 ldi r24, 0x04 ; 4
5a4a: 98 9e mul r9, r24
5a4c: e0 0d add r30, r0
5a4e: f1 1d adc r31, r1
5a50: 11 24 eor r1, r1
5a52: 20 81 ld r18, Z
5a54: 31 81 ldd r19, Z+1 ; 0x01
5a56: 42 81 ldd r20, Z+2 ; 0x02
5a58: 53 81 ldd r21, Z+3 ; 0x03
5a5a: c3 01 movw r24, r6
5a5c: b2 01 movw r22, r4
5a5e: 21 d7 rcall .+3650 ; 0x68a2 <__gesf2>
5a60: 18 16 cp r1, r24
5a62: 8c f0 brlt .+34 ; 0x5a86 <cb_getAvg_float+0x96>
5a64: f8 01 movw r30, r16
5a66: 84 e0 ldi r24, 0x04 ; 4
5a68: 88 9e mul r8, r24
5a6a: e0 0d add r30, r0
5a6c: f1 1d adc r31, r1
5a6e: 11 24 eor r1, r1
5a70: 20 81 ld r18, Z
5a72: 31 81 ldd r19, Z+1 ; 0x01
5a74: 42 81 ldd r20, Z+2 ; 0x02
5a76: 53 81 ldd r21, Z+3 ; 0x03
5a78: c3 01 movw r24, r6
5a7a: b2 01 movw r22, r4
5a7c: 72 d5 rcall .+2788 ; 0x6562 <__cmpsf2>
5a7e: 88 23 and r24, r24
5a80: 1c f4 brge .+6 ; 0x5a88 <cb_getAvg_float+0x98>
5a82: 8c 2e mov r8, r28
5a84: 01 c0 rjmp .+2 ; 0x5a88 <cb_getAvg_float+0x98>
5a86: 9c 2e mov r9, r28
5a88: cf 5f subi r28, 0xFF ; 255
5a8a: dc 13 cpse r29, r28
5a8c: d6 cf rjmp .-84 ; 0x5a3a <cb_getAvg_float+0x4a>
5a8e: a1 2c mov r10, r1
5a90: b1 2c mov r11, r1
5a92: c0 e0 ldi r28, 0x00 ; 0
5a94: c1 2c mov r12, r1
5a96: d1 2c mov r13, r1
5a98: 76 01 movw r14, r12
5a9a: 8c 16 cp r8, r28
5a9c: 71 f0 breq .+28 ; 0x5aba <cb_getAvg_float+0xca>
5a9e: 9c 16 cp r9, r28
5aa0: 61 f0 breq .+24 ; 0x5aba <cb_getAvg_float+0xca>
5aa2: f8 01 movw r30, r16
5aa4: ea 0d add r30, r10
5aa6: fb 1d adc r31, r11
5aa8: 20 81 ld r18, Z
5aaa: 31 81 ldd r19, Z+1 ; 0x01
5aac: 42 81 ldd r20, Z+2 ; 0x02
5aae: 53 81 ldd r21, Z+3 ; 0x03
5ab0: c7 01 movw r24, r14
5ab2: b6 01 movw r22, r12
5ab4: 79 d4 rcall .+2290 ; 0x63a8 <__addsf3>
5ab6: 6b 01 movw r12, r22
5ab8: 7c 01 movw r14, r24
5aba: cf 5f subi r28, 0xFF ; 255
5abc: e4 e0 ldi r30, 0x04 ; 4
5abe: ae 0e add r10, r30
5ac0: b1 1c adc r11, r1
5ac2: dc 13 cpse r29, r28
5ac4: ea cf rjmp .-44 ; 0x5a9a <cb_getAvg_float+0xaa>
5ac6: 82 e0 ldi r24, 0x02 ; 2
5ac8: 15 c0 rjmp .+42 ; 0x5af4 <cb_getAvg_float+0x104>
5aca: 01 81 ldd r16, Z+1 ; 0x01
5acc: 12 81 ldd r17, Z+2 ; 0x02
5ace: c0 e0 ldi r28, 0x00 ; 0
5ad0: c1 2c mov r12, r1
5ad2: d1 2c mov r13, r1
5ad4: 76 01 movw r14, r12
5ad6: f8 01 movw r30, r16
5ad8: 21 91 ld r18, Z+
5ada: 31 91 ld r19, Z+
5adc: 41 91 ld r20, Z+
5ade: 51 91 ld r21, Z+
5ae0: 8f 01 movw r16, r30
5ae2: c7 01 movw r24, r14
5ae4: b6 01 movw r22, r12
5ae6: 60 d4 rcall .+2240 ; 0x63a8 <__addsf3>
5ae8: 6b 01 movw r12, r22
5aea: 7c 01 movw r14, r24
5aec: cf 5f subi r28, 0xFF ; 255
5aee: bc 12 cpse r11, r28
5af0: f2 cf rjmp .-28 ; 0x5ad6 <cb_getAvg_float+0xe6>
5af2: 80 e0 ldi r24, 0x00 ; 0
5af4: 6d 2f mov r22, r29
5af6: 70 e0 ldi r23, 0x00 ; 0
5af8: 68 1b sub r22, r24
5afa: 71 09 sbc r23, r1
5afc: 07 2e mov r0, r23
5afe: 00 0c add r0, r0
5b00: 88 0b sbc r24, r24
5b02: 99 0b sbc r25, r25
5b04: cd d5 rcall .+2970 ; 0x66a0 <__floatsisf>
5b06: 9b 01 movw r18, r22
5b08: ac 01 movw r20, r24
5b0a: c7 01 movw r24, r14
5b0c: b6 01 movw r22, r12
5b0e: 2d d5 rcall .+2650 ; 0x656a <__divsf3>
5b10: 03 c0 rjmp .+6 ; 0x5b18 <cb_getAvg_float+0x128>
5b12: 60 e0 ldi r22, 0x00 ; 0
5b14: 70 e0 ldi r23, 0x00 ; 0
5b16: cb 01 movw r24, r22
5b18: df 91 pop r29
5b1a: cf 91 pop r28
5b1c: 1f 91 pop r17
5b1e: 0f 91 pop r16
5b20: ff 90 pop r15
5b22: ef 90 pop r14
5b24: df 90 pop r13
5b26: cf 90 pop r12
5b28: bf 90 pop r11
5b2a: af 90 pop r10
5b2c: 9f 90 pop r9
5b2e: 8f 90 pop r8
5b30: 7f 90 pop r7
5b32: 6f 90 pop r6
5b34: 5f 90 pop r5
5b36: 4f 90 pop r4
5b38: 08 95 ret
00005b3a <init_circ_buffer_float>:
5b3a: fc 01 movw r30, r24
5b3c: 14 82 std Z+4, r1 ; 0x04
5b3e: 40 83 st Z, r20
5b40: 61 83 std Z+1, r22 ; 0x01
5b42: 72 83 std Z+2, r23 ; 0x02
5b44: 08 95 ret
00005b46 <cb_append_double>:
5b46: fc 01 movw r30, r24
5b48: 83 81 ldd r24, Z+3 ; 0x03
5b4a: a1 81 ldd r26, Z+1 ; 0x01
5b4c: b2 81 ldd r27, Z+2 ; 0x02
5b4e: 94 e0 ldi r25, 0x04 ; 4
5b50: 89 9f mul r24, r25
5b52: a0 0d add r26, r0
5b54: b1 1d adc r27, r1
5b56: 11 24 eor r1, r1
5b58: 1d 92 st X+, r1
5b5a: 1d 92 st X+, r1
5b5c: 1d 92 st X+, r1
5b5e: 1c 92 st X, r1
5b60: 13 97 sbiw r26, 0x03 ; 3
5b62: 83 81 ldd r24, Z+3 ; 0x03
5b64: a1 81 ldd r26, Z+1 ; 0x01
5b66: b2 81 ldd r27, Z+2 ; 0x02
5b68: 94 e0 ldi r25, 0x04 ; 4
5b6a: 89 9f mul r24, r25
5b6c: a0 0d add r26, r0
5b6e: b1 1d adc r27, r1
5b70: 11 24 eor r1, r1
5b72: 4d 93 st X+, r20
5b74: 5d 93 st X+, r21
5b76: 6d 93 st X+, r22
5b78: 7c 93 st X, r23
5b7a: 13 97 sbiw r26, 0x03 ; 3
5b7c: 20 81 ld r18, Z
5b7e: 83 81 ldd r24, Z+3 ; 0x03
5b80: 90 e0 ldi r25, 0x00 ; 0
5b82: 01 96 adiw r24, 0x01 ; 1
5b84: 62 2f mov r22, r18
5b86: 70 e0 ldi r23, 0x00 ; 0
5b88: 0e 94 1a 3a call 0x7434 ; 0x7434 <__divmodhi4>
5b8c: 83 83 std Z+3, r24 ; 0x03
5b8e: 84 81 ldd r24, Z+4 ; 0x04
5b90: 82 17 cp r24, r18
5b92: 10 f4 brcc .+4 ; 0x5b98 <cb_append_double+0x52>
5b94: 8f 5f subi r24, 0xFF ; 255
5b96: 84 83 std Z+4, r24 ; 0x04
5b98: 08 95 ret
00005b9a <cb_getAvg_double>:
5b9a: 4f 92 push r4
5b9c: 5f 92 push r5
5b9e: 6f 92 push r6
5ba0: 7f 92 push r7
5ba2: 8f 92 push r8
5ba4: 9f 92 push r9
5ba6: af 92 push r10
5ba8: bf 92 push r11
5baa: cf 92 push r12
5bac: df 92 push r13
5bae: ef 92 push r14
5bb0: ff 92 push r15
5bb2: 0f 93 push r16
5bb4: 1f 93 push r17
5bb6: cf 93 push r28
5bb8: df 93 push r29
5bba: fc 01 movw r30, r24
5bbc: d4 81 ldd r29, Z+4 ; 0x04
5bbe: dd 23 and r29, r29
5bc0: 09 f4 brne .+2 ; 0x5bc4 <cb_getAvg_double+0x2a>
5bc2: 7c c0 rjmp .+248 ; 0x5cbc <cb_getAvg_double+0x122>
5bc4: b0 80 ld r11, Z
5bc6: db 15 cp r29, r11
5bc8: 39 f0 breq .+14 ; 0x5bd8 <cb_getAvg_double+0x3e>
5bca: b1 10 cpse r11, r1
5bcc: 53 c0 rjmp .+166 ; 0x5c74 <cb_getAvg_double+0xda>
5bce: 80 e0 ldi r24, 0x00 ; 0
5bd0: c1 2c mov r12, r1
5bd2: d1 2c mov r13, r1
5bd4: 76 01 movw r14, r12
5bd6: 63 c0 rjmp .+198 ; 0x5c9e <cb_getAvg_double+0x104>
5bd8: 01 81 ldd r16, Z+1 ; 0x01
5bda: 12 81 ldd r17, Z+2 ; 0x02
5bdc: 78 01 movw r14, r16
5bde: c0 e0 ldi r28, 0x00 ; 0
5be0: 91 2c mov r9, r1
5be2: 81 2c mov r8, r1
5be4: f7 01 movw r30, r14
5be6: 41 90 ld r4, Z+
5be8: 51 90 ld r5, Z+
5bea: 61 90 ld r6, Z+
5bec: 71 90 ld r7, Z+
5bee: 7f 01 movw r14, r30
5bf0: f8 01 movw r30, r16
5bf2: 84 e0 ldi r24, 0x04 ; 4
5bf4: 98 9e mul r9, r24
5bf6: e0 0d add r30, r0
5bf8: f1 1d adc r31, r1
5bfa: 11 24 eor r1, r1
5bfc: 20 81 ld r18, Z
5bfe: 31 81 ldd r19, Z+1 ; 0x01
5c00: 42 81 ldd r20, Z+2 ; 0x02
5c02: 53 81 ldd r21, Z+3 ; 0x03
5c04: c3 01 movw r24, r6
5c06: b2 01 movw r22, r4
5c08: 4c d6 rcall .+3224 ; 0x68a2 <__gesf2>
5c0a: 18 16 cp r1, r24
5c0c: 8c f0 brlt .+34 ; 0x5c30 <cb_getAvg_double+0x96>
5c0e: f8 01 movw r30, r16
5c10: 84 e0 ldi r24, 0x04 ; 4
5c12: 88 9e mul r8, r24
5c14: e0 0d add r30, r0
5c16: f1 1d adc r31, r1
5c18: 11 24 eor r1, r1
5c1a: 20 81 ld r18, Z
5c1c: 31 81 ldd r19, Z+1 ; 0x01
5c1e: 42 81 ldd r20, Z+2 ; 0x02
5c20: 53 81 ldd r21, Z+3 ; 0x03
5c22: c3 01 movw r24, r6
5c24: b2 01 movw r22, r4
5c26: 9d d4 rcall .+2362 ; 0x6562 <__cmpsf2>
5c28: 88 23 and r24, r24
5c2a: 1c f4 brge .+6 ; 0x5c32 <cb_getAvg_double+0x98>
5c2c: 8c 2e mov r8, r28
5c2e: 01 c0 rjmp .+2 ; 0x5c32 <cb_getAvg_double+0x98>
5c30: 9c 2e mov r9, r28
5c32: cf 5f subi r28, 0xFF ; 255
5c34: dc 13 cpse r29, r28
5c36: d6 cf rjmp .-84 ; 0x5be4 <cb_getAvg_double+0x4a>
5c38: a1 2c mov r10, r1
5c3a: b1 2c mov r11, r1
5c3c: c0 e0 ldi r28, 0x00 ; 0
5c3e: c1 2c mov r12, r1
5c40: d1 2c mov r13, r1
5c42: 76 01 movw r14, r12
5c44: 8c 16 cp r8, r28
5c46: 71 f0 breq .+28 ; 0x5c64 <cb_getAvg_double+0xca>
5c48: 9c 16 cp r9, r28
5c4a: 61 f0 breq .+24 ; 0x5c64 <cb_getAvg_double+0xca>
5c4c: f8 01 movw r30, r16
5c4e: ea 0d add r30, r10
5c50: fb 1d adc r31, r11
5c52: 20 81 ld r18, Z
5c54: 31 81 ldd r19, Z+1 ; 0x01
5c56: 42 81 ldd r20, Z+2 ; 0x02
5c58: 53 81 ldd r21, Z+3 ; 0x03
5c5a: c7 01 movw r24, r14
5c5c: b6 01 movw r22, r12
5c5e: a4 d3 rcall .+1864 ; 0x63a8 <__addsf3>
5c60: 6b 01 movw r12, r22
5c62: 7c 01 movw r14, r24
5c64: cf 5f subi r28, 0xFF ; 255
5c66: e4 e0 ldi r30, 0x04 ; 4
5c68: ae 0e add r10, r30
5c6a: b1 1c adc r11, r1
5c6c: dc 13 cpse r29, r28
5c6e: ea cf rjmp .-44 ; 0x5c44 <cb_getAvg_double+0xaa>
5c70: 82 e0 ldi r24, 0x02 ; 2
5c72: 15 c0 rjmp .+42 ; 0x5c9e <cb_getAvg_double+0x104>
5c74: 01 81 ldd r16, Z+1 ; 0x01
5c76: 12 81 ldd r17, Z+2 ; 0x02
5c78: c0 e0 ldi r28, 0x00 ; 0
5c7a: c1 2c mov r12, r1
5c7c: d1 2c mov r13, r1
5c7e: 76 01 movw r14, r12
5c80: f8 01 movw r30, r16
5c82: 21 91 ld r18, Z+
5c84: 31 91 ld r19, Z+
5c86: 41 91 ld r20, Z+
5c88: 51 91 ld r21, Z+
5c8a: 8f 01 movw r16, r30
5c8c: c7 01 movw r24, r14
5c8e: b6 01 movw r22, r12
5c90: 8b d3 rcall .+1814 ; 0x63a8 <__addsf3>
5c92: 6b 01 movw r12, r22
5c94: 7c 01 movw r14, r24
5c96: cf 5f subi r28, 0xFF ; 255
5c98: bc 12 cpse r11, r28
5c9a: f2 cf rjmp .-28 ; 0x5c80 <cb_getAvg_double+0xe6>
5c9c: 80 e0 ldi r24, 0x00 ; 0
5c9e: 6d 2f mov r22, r29
5ca0: 70 e0 ldi r23, 0x00 ; 0
5ca2: 68 1b sub r22, r24
5ca4: 71 09 sbc r23, r1
5ca6: 07 2e mov r0, r23
5ca8: 00 0c add r0, r0
5caa: 88 0b sbc r24, r24
5cac: 99 0b sbc r25, r25
5cae: f8 d4 rcall .+2544 ; 0x66a0 <__floatsisf>
5cb0: 9b 01 movw r18, r22
5cb2: ac 01 movw r20, r24
5cb4: c7 01 movw r24, r14
5cb6: b6 01 movw r22, r12
5cb8: 58 d4 rcall .+2224 ; 0x656a <__divsf3>
5cba: 03 c0 rjmp .+6 ; 0x5cc2 <cb_getAvg_double+0x128>
5cbc: 60 e0 ldi r22, 0x00 ; 0
5cbe: 70 e0 ldi r23, 0x00 ; 0
5cc0: cb 01 movw r24, r22
5cc2: df 91 pop r29
5cc4: cf 91 pop r28
5cc6: 1f 91 pop r17
5cc8: 0f 91 pop r16
5cca: ff 90 pop r15
5ccc: ef 90 pop r14
5cce: df 90 pop r13
5cd0: cf 90 pop r12
5cd2: bf 90 pop r11
5cd4: af 90 pop r10
5cd6: 9f 90 pop r9
5cd8: 8f 90 pop r8
5cda: 7f 90 pop r7
5cdc: 6f 90 pop r6
5cde: 5f 90 pop r5
5ce0: 4f 90 pop r4
5ce2: 08 95 ret
00005ce4 <init_circ_buffer_double>:
5ce4: fc 01 movw r30, r24
5ce6: 14 82 std Z+4, r1 ; 0x04
5ce8: 40 83 st Z, r20
5cea: 61 83 std Z+1, r22 ; 0x01
5cec: 72 83 std Z+2, r23 ; 0x02
5cee: 08 95 ret
00005cf0 <sw_32hz_timer_init>:
5cf0: 10 92 ac 24 sts 0x24AC, r1 ; 0x8024ac <timer_32hz_ready>
5cf4: 20 e2 ldi r18, 0x20 ; 32
5cf6: 30 e0 ldi r19, 0x00 ; 0
5cf8: 42 e0 ldi r20, 0x02 ; 2
5cfa: 64 e0 ldi r22, 0x04 ; 4
5cfc: 8d ea ldi r24, 0xAD ; 173
5cfe: 94 e2 ldi r25, 0x24 ; 36
5d00: 0e 94 e7 12 call 0x25ce ; 0x25ce <pwm_init>
5d04: 64 e6 ldi r22, 0x64 ; 100
5d06: 8d ea ldi r24, 0xAD ; 173
5d08: 94 e2 ldi r25, 0x24 ; 36
5d0a: 0e 94 c1 13 call 0x2782 ; 0x2782 <pwm_start>
5d0e: e0 91 ad 24 lds r30, 0x24AD ; 0x8024ad <conf_32hz_timer>
5d12: f0 91 ae 24 lds r31, 0x24AE ; 0x8024ae <conf_32hz_timer+0x1>
5d16: 86 81 ldd r24, Z+6 ; 0x06
5d18: 8c 7f andi r24, 0xFC ; 252
5d1a: 86 83 std Z+6, r24 ; 0x06
5d1c: 86 81 ldd r24, Z+6 ; 0x06
5d1e: 81 60 ori r24, 0x01 ; 1
5d20: 86 83 std Z+6, r24 ; 0x06
5d22: 6a ec ldi r22, 0xCA ; 202
5d24: 7c e2 ldi r23, 0x2C ; 44
5d26: cf 01 movw r24, r30
5d28: 0c 94 7b 0d jmp 0x1af6 ; 0x1af6 <tc_set_overflow_interrupt_callback>
5d2c: 08 95 ret
00005d2e <set_32hz_read>:
5d2e: 80 e0 ldi r24, 0x00 ; 0
5d30: 0c 94 29 16 jmp 0x2c52 ; 0x2c52 <mpl3_single_read>
5d34: 08 95 ret
00005d36 <checK_32hz_ready>:
5d36: 80 91 ac 24 lds r24, 0x24AC ; 0x8024ac <timer_32hz_ready>
5d3a: 08 95 ret
00005d3c <__vector_16>:
5d3c: 1f 92 push r1
5d3e: 0f 92 push r0
5d40: 0f b6 in r0, 0x3f ; 63
5d42: 0f 92 push r0
5d44: 11 24 eor r1, r1
5d46: 08 b6 in r0, 0x38 ; 56
5d48: 0f 92 push r0
5d4a: 18 be out 0x38, r1 ; 56
5d4c: 2f 93 push r18
5d4e: 3f 93 push r19
5d50: 4f 93 push r20
5d52: 5f 93 push r21
5d54: 6f 93 push r22
5d56: 7f 93 push r23
5d58: 8f 93 push r24
5d5a: 9f 93 push r25
5d5c: af 93 push r26
5d5e: 20 91 a4 29 lds r18, 0x29A4 ; 0x8029a4 <milliseconds>
5d62: 30 91 a5 29 lds r19, 0x29A5 ; 0x8029a5 <milliseconds+0x1>
5d66: 40 91 a6 29 lds r20, 0x29A6 ; 0x8029a6 <milliseconds+0x2>
5d6a: 50 91 a7 29 lds r21, 0x29A7 ; 0x8029a7 <milliseconds+0x3>
5d6e: 60 91 a8 29 lds r22, 0x29A8 ; 0x8029a8 <milliseconds+0x4>
5d72: 70 91 a9 29 lds r23, 0x29A9 ; 0x8029a9 <milliseconds+0x5>
5d76: 80 91 aa 29 lds r24, 0x29AA ; 0x8029aa <milliseconds+0x6>
5d7a: 90 91 ab 29 lds r25, 0x29AB ; 0x8029ab <milliseconds+0x7>
5d7e: a1 e0 ldi r26, 0x01 ; 1
5d80: 0e 94 67 3a call 0x74ce ; 0x74ce <__adddi3_s8>
5d84: 20 93 a4 29 sts 0x29A4, r18 ; 0x8029a4 <milliseconds>
5d88: 30 93 a5 29 sts 0x29A5, r19 ; 0x8029a5 <milliseconds+0x1>
5d8c: 40 93 a6 29 sts 0x29A6, r20 ; 0x8029a6 <milliseconds+0x2>
5d90: 50 93 a7 29 sts 0x29A7, r21 ; 0x8029a7 <milliseconds+0x3>
5d94: 60 93 a8 29 sts 0x29A8, r22 ; 0x8029a8 <milliseconds+0x4>
5d98: 70 93 a9 29 sts 0x29A9, r23 ; 0x8029a9 <milliseconds+0x5>
5d9c: 80 93 aa 29 sts 0x29AA, r24 ; 0x8029aa <milliseconds+0x6>
5da0: 90 93 ab 29 sts 0x29AB, r25 ; 0x8029ab <milliseconds+0x7>
5da4: af 91 pop r26
5da6: 9f 91 pop r25
5da8: 8f 91 pop r24
5daa: 7f 91 pop r23
5dac: 6f 91 pop r22
5dae: 5f 91 pop r21
5db0: 4f 91 pop r20
5db2: 3f 91 pop r19
5db4: 2f 91 pop r18
5db6: 0f 90 pop r0
5db8: 08 be out 0x38, r0 ; 56
5dba: 0f 90 pop r0
5dbc: 0f be out 0x3f, r0 ; 63
5dbe: 0f 90 pop r0
5dc0: 1f 90 pop r1
5dc2: 18 95 reti
00005dc4 <ascii_to_decimal_int>:
5dc4: 8f 92 push r8
5dc6: 9f 92 push r9
5dc8: af 92 push r10
5dca: bf 92 push r11
5dcc: cf 92 push r12
5dce: df 92 push r13
5dd0: ef 92 push r14
5dd2: ff 92 push r15
5dd4: 0f 93 push r16
5dd6: 1f 93 push r17
5dd8: cf 93 push r28
5dda: df 93 push r29
5ddc: fc 01 movw r30, r24
5dde: 01 90 ld r0, Z+
5de0: 00 20 and r0, r0
5de2: e9 f7 brne .-6 ; 0x5dde <ascii_to_decimal_int+0x1a>
5de4: 31 97 sbiw r30, 0x01 ; 1
5de6: 7f 01 movw r14, r30
5de8: e8 1a sub r14, r24
5dea: f9 0a sbc r15, r25
5dec: 47 01 movw r8, r14
5dee: 1e 14 cp r1, r14
5df0: 1f 04 cpc r1, r15
5df2: 0c f0 brlt .+2 ; 0x5df6 <ascii_to_decimal_int+0x32>
5df4: 43 c0 rjmp .+134 ; 0x5e7c <ascii_to_decimal_int+0xb8>
5df6: 6c 01 movw r12, r24
5df8: 10 e0 ldi r17, 0x00 ; 0
5dfa: a1 2c mov r10, r1
5dfc: b1 2c mov r11, r1
5dfe: 00 e0 ldi r16, 0x00 ; 0
5e00: f6 01 movw r30, r12
5e02: e1 0f add r30, r17
5e04: f1 1d adc r31, r1
5e06: c0 81 ld r28, Z
5e08: 8c 2f mov r24, r28
5e0a: 0c 2e mov r0, r28
5e0c: 00 0c add r0, r0
5e0e: 99 0b sbc r25, r25
5e10: c0 97 sbiw r24, 0x30 ; 48
5e12: 0a 97 sbiw r24, 0x0a ; 10
5e14: 38 f0 brcs .+14 ; 0x5e24 <ascii_to_decimal_int+0x60>
5e16: cd 32 cpi r28, 0x2D ; 45
5e18: 21 f5 brne .+72 ; 0x5e62 <ascii_to_decimal_int+0x9e>
5e1a: 81 e0 ldi r24, 0x01 ; 1
5e1c: e8 1a sub r14, r24
5e1e: f1 08 sbc r15, r1
5e20: 01 e0 ldi r16, 0x01 ; 1
5e22: 1f c0 rjmp .+62 ; 0x5e62 <ascii_to_decimal_int+0x9e>
5e24: 81 e0 ldi r24, 0x01 ; 1
5e26: e8 1a sub r14, r24
5e28: f1 08 sbc r15, r1
5e2a: b7 01 movw r22, r14
5e2c: 0f 2c mov r0, r15
5e2e: 00 0c add r0, r0
5e30: 88 0b sbc r24, r24
5e32: 99 0b sbc r25, r25
5e34: 35 d4 rcall .+2154 ; 0x66a0 <__floatsisf>
5e36: 9b 01 movw r18, r22
5e38: ac 01 movw r20, r24
5e3a: 60 e0 ldi r22, 0x00 ; 0
5e3c: 70 e0 ldi r23, 0x00 ; 0
5e3e: 80 e2 ldi r24, 0x20 ; 32
5e40: 91 e4 ldi r25, 0x41 ; 65
5e42: e2 d5 rcall .+3012 ; 0x6a08 <pow>
5e44: 2d d6 rcall .+3162 ; 0x6aa0 <round>
5e46: 0c 2e mov r0, r28
5e48: 00 0c add r0, r0
5e4a: dd 0b sbc r29, r29
5e4c: e0 97 sbiw r28, 0x30 ; 48
5e4e: f5 d3 rcall .+2026 ; 0x663a <__fixsfsi>
5e50: c6 9f mul r28, r22
5e52: 90 01 movw r18, r0
5e54: c7 9f mul r28, r23
5e56: 30 0d add r19, r0
5e58: d6 9f mul r29, r22
5e5a: 30 0d add r19, r0
5e5c: 11 24 eor r1, r1
5e5e: a2 0e add r10, r18
5e60: b3 1e adc r11, r19
5e62: 1f 5f subi r17, 0xFF ; 255
5e64: 81 2f mov r24, r17
5e66: 90 e0 ldi r25, 0x00 ; 0
5e68: 88 15 cp r24, r8
5e6a: 99 05 cpc r25, r9
5e6c: 4c f2 brlt .-110 ; 0x5e00 <ascii_to_decimal_int+0x3c>
5e6e: 00 23 and r16, r16
5e70: 41 f0 breq .+16 ; 0x5e82 <ascii_to_decimal_int+0xbe>
5e72: 88 27 eor r24, r24
5e74: 99 27 eor r25, r25
5e76: 8a 19 sub r24, r10
5e78: 9b 09 sbc r25, r11
5e7a: 04 c0 rjmp .+8 ; 0x5e84 <ascii_to_decimal_int+0xc0>
5e7c: 80 e0 ldi r24, 0x00 ; 0
5e7e: 90 e0 ldi r25, 0x00 ; 0
5e80: 01 c0 rjmp .+2 ; 0x5e84 <ascii_to_decimal_int+0xc0>
5e82: c5 01 movw r24, r10
5e84: df 91 pop r29
5e86: cf 91 pop r28
5e88: 1f 91 pop r17
5e8a: 0f 91 pop r16
5e8c: ff 90 pop r15
5e8e: ef 90 pop r14
5e90: df 90 pop r13
5e92: cf 90 pop r12
5e94: bf 90 pop r11
5e96: af 90 pop r10
5e98: 9f 90 pop r9
5e9a: 8f 90 pop r8
5e9c: 08 95 ret
00005e9e <twi_comms_init>:
static twi_options_t twi_conf =
{
.speed = TWI_SPEED,
.speed_reg = TWI_BAUD(32000000, TWI_SPEED)
};
twi_master_init(TWI_MASTER, &twi_conf);
5e9e: 68 e0 ldi r22, 0x08 ; 8
5ea0: 70 e2 ldi r23, 0x20 ; 32
5ea2: 80 eb ldi r24, 0xB0 ; 176
5ea4: 94 e0 ldi r25, 0x04 ; 4
5ea6: 0e 94 21 0f call 0x1e42 ; 0x1e42 <twi_master_init>
*
* \param twi Base address of the TWI instance.
*/
static inline void twi_master_enable(TWI_t *twi)
{
twi->MASTER.CTRLA |= TWI_MASTER_ENABLE_bm;
5eaa: e0 eb ldi r30, 0xB0 ; 176
5eac: f4 e0 ldi r31, 0x04 ; 4
5eae: 81 81 ldd r24, Z+1 ; 0x01
5eb0: 88 60 ori r24, 0x08 ; 8
5eb2: 81 83 std Z+1, r24 ; 0x01
twi_master_enable(TWI_MASTER);
univ_pkt.no_wait = true;
5eb4: e4 ef ldi r30, 0xF4 ; 244
5eb6: f4 e2 ldi r31, 0x24 ; 36
5eb8: 81 e0 ldi r24, 0x01 ; 1
5eba: 82 87 std Z+10, r24 ; 0x0a
univ_pkt.addr_length = 1;
5ebc: 81 e0 ldi r24, 0x01 ; 1
5ebe: 90 e0 ldi r25, 0x00 ; 0
5ec0: 84 83 std Z+4, r24 ; 0x04
5ec2: 95 83 std Z+5, r25 ; 0x05
univ_pkt.length = 1;
5ec4: 80 87 std Z+8, r24 ; 0x08
5ec6: 91 87 std Z+9, r25 ; 0x09
univ_pkt.buffer = buffer;
5ec8: 84 eb ldi r24, 0xB4 ; 180
5eca: 94 e2 ldi r25, 0x24 ; 36
5ecc: 86 83 std Z+6, r24 ; 0x06
5ece: 97 83 std Z+7, r25 ; 0x07
5ed0: 08 95 ret
00005ed2 <twi_write>:
//swprintf(SWDEBUG, "TWI INIT SUCCESS\n");
}
void twi_write(uint8_t slave_address, uint8_t regi, uint8_t data)
{
univ_pkt.chip = slave_address;
5ed2: e4 ef ldi r30, 0xF4 ; 244
5ed4: f4 e2 ldi r31, 0x24 ; 36
5ed6: 80 83 st Z, r24
univ_pkt.addr[0] = regi;
5ed8: 61 83 std Z+1, r22 ; 0x01
buffer[0] = data;
5eda: 40 93 b4 24 sts 0x24B4, r20 ; 0x8024b4 <buffer>
univ_pkt.length = 1;
5ede: 81 e0 ldi r24, 0x01 ; 1
5ee0: 90 e0 ldi r25, 0x00 ; 0
5ee2: 80 87 std Z+8, r24 ; 0x08
5ee4: 91 87 std Z+9, r25 ; 0x09
* \return STATUS_OK If all bytes were written, error code otherwise
*/
static inline status_code_t twi_master_write(TWI_t *twi,
const twi_package_t *package)
{
return twi_master_transfer (twi, package, false);
5ee6: 40 e0 ldi r20, 0x00 ; 0
5ee8: bf 01 movw r22, r30
5eea: 80 eb ldi r24, 0xB0 ; 176
5eec: 94 e0 ldi r25, 0x04 ; 4
5eee: 0c 94 36 0f jmp 0x1e6c ; 0x1e6c <twi_master_transfer>
5ef2: 08 95 ret
00005ef4 <twi_read>:
twi_master_write(TWI_MASTER, &univ_pkt);
}
void twi_read(uint8_t slave_address, uint8_t regi, uint8_t data_length, uint8_t* dataBuffer)
{
5ef4: 0f 93 push r16
5ef6: 1f 93 push r17
5ef8: cf 93 push r28
5efa: c4 2f mov r28, r20
5efc: 89 01 movw r16, r18
univ_pkt.chip = slave_address;
5efe: e4 ef ldi r30, 0xF4 ; 244
5f00: f4 e2 ldi r31, 0x24 ; 36
5f02: 80 83 st Z, r24
univ_pkt.addr[0] = regi;
5f04: 61 83 std Z+1, r22 ; 0x01
univ_pkt.length = data_length;
5f06: 84 2f mov r24, r20
5f08: 90 e0 ldi r25, 0x00 ; 0
5f0a: 80 87 std Z+8, r24 ; 0x08
5f0c: 91 87 std Z+9, r25 ; 0x09
* \return STATUS_OK If all bytes were read, error code otherwise
*/
static inline status_code_t twi_master_read(TWI_t *twi,
const twi_package_t *package)
{
return twi_master_transfer (twi, package, true);
5f0e: 41 e0 ldi r20, 0x01 ; 1
5f10: bf 01 movw r22, r30
5f12: 80 eb ldi r24, 0xB0 ; 176
5f14: 94 e0 ldi r25, 0x04 ; 4
5f16: 0e 94 36 0f call 0x1e6c ; 0x1e6c <twi_master_transfer>
twi_master_read(TWI_MASTER, &univ_pkt);
for(uint8_t x = 0; x < data_length; x++)
5f1a: cc 23 and r28, r28
5f1c: 81 f0 breq .+32 ; 0x5f3e <twi_read+0x4a>
5f1e: a4 eb ldi r26, 0xB4 ; 180
5f20: b4 e2 ldi r27, 0x24 ; 36
5f22: f8 01 movw r30, r16
5f24: c1 50 subi r28, 0x01 ; 1
5f26: 2c 2f mov r18, r28
5f28: 30 e0 ldi r19, 0x00 ; 0
5f2a: 2f 5f subi r18, 0xFF ; 255
5f2c: 3f 4f sbci r19, 0xFF ; 255
5f2e: 20 0f add r18, r16
5f30: 31 1f adc r19, r17
{
dataBuffer[x] = 0;
5f32: 10 82 st Z, r1
dataBuffer[x] = buffer[x];
5f34: 8d 91 ld r24, X+
5f36: 81 93 st Z+, r24
{
univ_pkt.chip = slave_address;
univ_pkt.addr[0] = regi;
univ_pkt.length = data_length;
twi_master_read(TWI_MASTER, &univ_pkt);
for(uint8_t x = 0; x < data_length; x++)
5f38: e2 17 cp r30, r18
5f3a: f3 07 cpc r31, r19
5f3c: d1 f7 brne .-12 ; 0x5f32 <twi_read+0x3e>
{
dataBuffer[x] = 0;
dataBuffer[x] = buffer[x];
}
}
5f3e: cf 91 pop r28
5f40: 1f 91 pop r17
5f42: 0f 91 pop r16
5f44: 08 95 ret
00005f46 <sw_rs232_printf>:
//usart_init_rs232(USART_GPS, &gps_uart_conf);
//enable interrupts for incoming messages through usart
usart_set_rx_interrupt_level(USART_XBEE, USART_INT_LVL_HI);
//uncomment if file system is implemented with open logger
//usart_set_rx_interrupt_level(USART_OPENLOGGER, USART_INT_LVL_HI);
//usart_set_rx_interrupt_level(USART_GPS, USART_INT_LVL_MED);
5f46: ef 92 push r14
5f48: ff 92 push r15
5f4a: 0f 93 push r16
5f4c: 1f 93 push r17
5f4e: cf 93 push r28
5f50: df 93 push r29
5f52: cd b7 in r28, 0x3d ; 61
5f54: de b7 in r29, 0x3e ; 62
5f56: da 95 dec r29
5f58: cd bf out 0x3d, r28 ; 61
5f5a: de bf out 0x3e, r29 ; 62
5f5c: c6 5f subi r28, 0xF6 ; 246
5f5e: de 4f sbci r29, 0xFE ; 254
5f60: e8 80 ld r14, Y
5f62: f9 80 ldd r15, Y+1 ; 0x01
5f64: ca 50 subi r28, 0x0A ; 10
5f66: d1 40 sbci r29, 0x01 ; 1
//swprintf(SWDEBUG, "USART ONLINE\n");
}
void sw_rs232_printf(USART_t* usart_channel, const char* text, ...)
5f68: ae 01 movw r20, r28
5f6a: 42 5f subi r20, 0xF2 ; 242
5f6c: 5e 4f sbci r21, 0xFE ; 254
5f6e: c4 5f subi r28, 0xF4 ; 244
5f70: de 4f sbci r29, 0xFE ; 254
5f72: 68 81 ld r22, Y
5f74: 79 81 ldd r23, Y+1 ; 0x01
5f76: cc 50 subi r28, 0x0C ; 12
5f78: d1 40 sbci r29, 0x01 ; 1
5f7a: ce 01 movw r24, r28
5f7c: 01 96 adiw r24, 0x01 ; 1
5f7e: 0e 94 9d 3b call 0x773a ; 0x773a <vsprintf>
{
char write_buffer[256];
va_list args;
va_start(args, text);
vsprintf(write_buffer, text, args);
5f82: 69 81 ldd r22, Y+1 ; 0x01
5f84: 66 23 and r22, r22
5f86: 59 f0 breq .+22 ; 0x5f9e <sw_rs232_printf+0x58>
5f88: 8e 01 movw r16, r28
5f8a: 0e 5f subi r16, 0xFE ; 254
5f8c: 1f 4f sbci r17, 0xFF ; 255
va_end(args);
//must make const string because hacky syntax below only works with const string
5f8e: c7 01 movw r24, r14
5f90: 0e 94 9a 0f call 0x1f34 ; 0x1f34 <usart_putchar>
void sw_rs232_printf(USART_t* usart_channel, const char* text, ...)
{
char write_buffer[256];
va_list args;
va_start(args, text);
vsprintf(write_buffer, text, args);
5f94: f8 01 movw r30, r16
5f96: 61 91 ld r22, Z+
5f98: 8f 01 movw r16, r30
5f9a: 61 11 cpse r22, r1
5f9c: f8 cf rjmp .-16 ; 0x5f8e <sw_rs232_printf+0x48>
va_end(args);
//must make const string because hacky syntax below only works with const string
const char* p_wb = write_buffer;
//this syntax is hacky and I don't like it, BUT it cuts down on code and saves me time. I'll clean it up if I have time
5f9e: d3 95 inc r29
5fa0: cd bf out 0x3d, r28 ; 61
5fa2: de bf out 0x3e, r29 ; 62
5fa4: df 91 pop r29
5fa6: cf 91 pop r28
5fa8: 1f 91 pop r17
5faa: 0f 91 pop r16
5fac: ff 90 pop r15
5fae: ef 90 pop r14
5fb0: 08 95 ret
00005fb2 <usart_comms_init>:
static void sw_rs232_printf(USART_t* usart_channel, const char* text, ...);
void usart_comms_init()
{
//set our global swprintf function to use our local and private sw_rs232_printf function
swprintf = &sw_rs232_printf;
5fb2: 83 ea ldi r24, 0xA3 ; 163
5fb4: 9f e2 ldi r25, 0x2F ; 47
5fb6: 80 93 3d 25 sts 0x253D, r24 ; 0x80253d <swprintf>
5fba: 90 93 3e 25 sts 0x253E, r25 ; 0x80253e <swprintf+0x1>
.stopbits = true,
.paritytype = USART_PMODE_DISABLED_gc,
.charlength = USART_CHSIZE_8BIT_gc
};
static usart_rs232_options_t openlogger_uart_conf =
{
5fbe: 61 e1 ldi r22, 0x11 ; 17
5fc0: 70 e2 ldi r23, 0x20 ; 32
5fc2: 80 ea ldi r24, 0xA0 ; 160
5fc4: 98 e0 ldi r25, 0x08 ; 8
5fc6: 0e 94 bb 10 call 0x2176 ; 0x2176 <usart_init_rs232>
5fca: e0 ea ldi r30, 0xA0 ; 160
5fcc: f8 e0 ldi r31, 0x08 ; 8
5fce: 83 81 ldd r24, Z+3 ; 0x03
5fd0: 80 63 ori r24, 0x30 ; 48
5fd2: 83 83 std Z+3, r24 ; 0x03
5fd4: 08 95 ret
00005fd6 <__vector_25>:
//must make const string because hacky syntax below only works with const string
const char* p_wb = write_buffer;
//this syntax is hacky and I don't like it, BUT it cuts down on code and saves me time. I'll clean it up if I have time
while(*p_wb)
{
usart_putchar(usart_channel, *p_wb++);
5fd6: 1f 92 push r1
5fd8: 0f 92 push r0
5fda: 0f b6 in r0, 0x3f ; 63
5fdc: 0f 92 push r0
5fde: 11 24 eor r1, r1
5fe0: 08 b6 in r0, 0x38 ; 56
5fe2: 0f 92 push r0
5fe4: 18 be out 0x38, r1 ; 56
5fe6: 09 b6 in r0, 0x39 ; 57
5fe8: 0f 92 push r0
5fea: 19 be out 0x39, r1 ; 57
5fec: 0b b6 in r0, 0x3b ; 59
5fee: 0f 92 push r0
5ff0: 1b be out 0x3b, r1 ; 59
5ff2: 2f 93 push r18
5ff4: 3f 93 push r19
5ff6: 4f 93 push r20
5ff8: 5f 93 push r21
5ffa: 6f 93 push r22
5ffc: 7f 93 push r23
5ffe: 8f 93 push r24
6000: 9f 93 push r25
6002: af 93 push r26
6004: bf 93 push r27
6006: ef 93 push r30
6008: ff 93 push r31
}
600a: 80 ea ldi r24, 0xA0 ; 160
600c: 98 e0 ldi r25, 0x08 ; 8
600e: 0e 94 a2 0f call 0x1f44 ; 0x1f44 <usart_getchar>
6012: 80 93 ac 29 sts 0x29AC, r24 ; 0x8029ac <xbee_response_temp>
}
6016: 80 91 ac 29 lds r24, 0x29AC ; 0x8029ac <xbee_response_temp>
601a: 80 36 cpi r24, 0x60 ; 96
601c: 11 f4 brne .+4 ; 0x6022 <__vector_25+0x4c>
ISR(USARTC0_RXC_vect)
{
601e: 0e 94 65 12 call 0x24ca ; 0x24ca <wdt_reset_mcu>
xbee_response_temp = usart_getchar(USART_XBEE);
//usart_putchar(USART_XBEE, '!');
if(xbee_response_temp == 'k')
6022: ff 91 pop r31
6024: ef 91 pop r30
6026: bf 91 pop r27
6028: af 91 pop r26
602a: 9f 91 pop r25
602c: 8f 91 pop r24
602e: 7f 91 pop r23
6030: 6f 91 pop r22
6032: 5f 91 pop r21
6034: 4f 91 pop r20
6036: 3f 91 pop r19
6038: 2f 91 pop r18
603a: 0f 90 pop r0
603c: 0b be out 0x3b, r0 ; 59
603e: 0f 90 pop r0
6040: 09 be out 0x39, r0 ; 57
6042: 0f 90 pop r0
6044: 08 be out 0x38, r0 ; 56
6046: 0f 90 pop r0
6048: 0f be out 0x3f, r0 ; 63
604a: 0f 90 pop r0
604c: 1f 90 pop r1
604e: 18 95 reti
00006050 <ioport_configure_port_pin>:
#include "ioport_compat.h"
#if defined(IOPORT_XMEGA_COMPAT)
void ioport_configure_port_pin(void *port, pin_mask_t pin_mask,
port_pin_flags_t flags)
{
6050: cf 93 push r28
6052: df 93 push r29
6054: fc 01 movw r30, r24
uint8_t pin;
for (pin = 0; pin < 8; pin++) {
if (pin_mask & (1 << pin)) {
*((uint8_t *)port + PORT_PIN0CTRL + pin) = flags >> 8;
6056: 20 e0 ldi r18, 0x00 ; 0
6058: 30 e0 ldi r19, 0x00 ; 0
port_pin_flags_t flags)
{
uint8_t pin;
for (pin = 0; pin < 8; pin++) {
if (pin_mask & (1 << pin)) {
605a: c6 2f mov r28, r22
605c: d0 e0 ldi r29, 0x00 ; 0
605e: de 01 movw r26, r28
6060: 02 2e mov r0, r18
6062: 02 c0 rjmp .+4 ; 0x6068 <ioport_configure_port_pin+0x18>
6064: b5 95 asr r27
6066: a7 95 ror r26
6068: 0a 94 dec r0
606a: e2 f7 brpl .-8 ; 0x6064 <ioport_configure_port_pin+0x14>
606c: a0 fd sbrc r26, 0
*((uint8_t *)port + PORT_PIN0CTRL + pin) = flags >> 8;
606e: 50 8b std Z+16, r21 ; 0x10
6070: 2f 5f subi r18, 0xFF ; 255
6072: 3f 4f sbci r19, 0xFF ; 255
6074: 31 96 adiw r30, 0x01 ; 1
void ioport_configure_port_pin(void *port, pin_mask_t pin_mask,
port_pin_flags_t flags)
{
uint8_t pin;
for (pin = 0; pin < 8; pin++) {
6076: 28 30 cpi r18, 0x08 ; 8
6078: 31 05 cpc r19, r1
607a: 89 f7 brne .-30 ; 0x605e <ioport_configure_port_pin+0xe>
if (pin_mask & (1 << pin)) {
*((uint8_t *)port + PORT_PIN0CTRL + pin) = flags >> 8;
}
}
/* Select direction and initial pin state */
if (flags & IOPORT_DIR_OUTPUT) {
607c: 40 ff sbrs r20, 0
607e: 0a c0 rjmp .+20 ; 0x6094 <ioport_configure_port_pin+0x44>
if (flags & IOPORT_INIT_HIGH) {
6080: 41 ff sbrs r20, 1
6082: 03 c0 rjmp .+6 ; 0x608a <ioport_configure_port_pin+0x3a>
*((uint8_t *)port + PORT_OUTSET) = pin_mask;
6084: fc 01 movw r30, r24
6086: 65 83 std Z+5, r22 ; 0x05
6088: 02 c0 rjmp .+4 ; 0x608e <ioport_configure_port_pin+0x3e>
} else {
*((uint8_t *)port + PORT_OUTCLR) = pin_mask;
608a: fc 01 movw r30, r24
608c: 66 83 std Z+6, r22 ; 0x06
}
*((uint8_t *)port + PORT_DIRSET) = pin_mask;
608e: fc 01 movw r30, r24
6090: 61 83 std Z+1, r22 ; 0x01
6092: 02 c0 rjmp .+4 ; 0x6098 <ioport_configure_port_pin+0x48>
} else {
*((uint8_t *)port + PORT_DIRCLR) = pin_mask;
6094: fc 01 movw r30, r24
6096: 62 83 std Z+2, r22 ; 0x02
}
}
6098: df 91 pop r29
609a: cf 91 pop r28
609c: 08 95 ret
0000609e <board_init>:
* \param flags Bitmask of flags specifying additional configuration
* parameters.
*/
static inline void ioport_configure_pin(port_pin_t pin, port_pin_flags_t flags)
{
ioport_configure_port_pin(arch_ioport_pin_to_base(pin),
609e: 43 e0 ldi r20, 0x03 ; 3
60a0: 50 e0 ldi r21, 0x00 ; 0
60a2: 68 e0 ldi r22, 0x08 ; 8
60a4: 80 ec ldi r24, 0xC0 ; 192
60a6: 97 e0 ldi r25, 0x07 ; 7
60a8: d3 df rcall .-90 ; 0x6050 <ioport_configure_port_pin>
60aa: 40 e0 ldi r20, 0x00 ; 0
60ac: 58 e1 ldi r21, 0x18 ; 24
60ae: 64 e0 ldi r22, 0x04 ; 4
60b0: 80 ec ldi r24, 0xC0 ; 192
60b2: 97 e0 ldi r25, 0x07 ; 7
60b4: cd cf rjmp .-102 ; 0x6050 <ioport_configure_port_pin>
60b6: 08 95 ret
000060b8 <set_ntcle_off>:
{
sw_state_manager = SW_STANDBY;
sensor_ready_status = 0b11100000;
//initialize all function pointers to avoid oopsies
swprintf = NULL;
//chip init
60b8: cf 92 push r12
60ba: df 92 push r13
60bc: ef 92 push r14
60be: ff 92 push r15
60c0: 6b 01 movw r12, r22
60c2: 7c 01 movw r14, r24
board_init();
60c4: 0e 94 6c 1e call 0x3cd8 ; 0x3cd8 <get_ntcle_temp_now>
60c8: a7 01 movw r20, r14
60ca: 96 01 movw r18, r12
60cc: 6c d1 rcall .+728 ; 0x63a6 <__subsf3>
60ce: 60 93 a0 29 sts 0x29A0, r22 ; 0x8029a0 <temp_off>
60d2: 70 93 a1 29 sts 0x29A1, r23 ; 0x8029a1 <temp_off+0x1>
60d6: 80 93 a2 29 sts 0x29A2, r24 ; 0x8029a2 <temp_off+0x2>
60da: 90 93 a3 29 sts 0x29A3, r25 ; 0x8029a3 <temp_off+0x3>
sysclk_init();
60de: ff 90 pop r15
60e0: ef 90 pop r14
60e2: df 90 pop r13
60e4: cf 90 pop r12
60e6: 08 95 ret
000060e8 <skywave_init>:
wdt_set_timeout_period(WDT_2S);
60e8: cf 93 push r28
60ea: df 93 push r29
//pin config
60ec: 10 92 30 25 sts 0x2530, r1 ; 0x802530 <sw_state_manager>
//mpu addr pin
60f0: 80 ee ldi r24, 0xE0 ; 224
60f2: 80 93 3f 25 sts 0x253F, r24 ; 0x80253f <sensor_ready_status>
//xbee
60f6: 10 92 3b 25 sts 0x253B, r1 ; 0x80253b <flight_handler>
60fa: 10 92 3c 25 sts 0x253C, r1 ; 0x80253c <flight_handler+0x1>
PORTC.DIR |= 0b00001000;
60fe: 10 92 3d 25 sts 0x253D, r1 ; 0x80253d <swprintf>
6102: 10 92 3e 25 sts 0x253E, r1 ; 0x80253e <swprintf+0x1>
PORTC.OUT |= 0b00001000;
//openlog
6106: cb df rcall .-106 ; 0x609e <board_init>
PORTF.DIR |= 0b00001000;
6108: 0e 94 24 02 call 0x448 ; 0x448 <sysclk_init>
PORTF.OUT |= 0b00001000;
610c: 88 e0 ldi r24, 0x08 ; 8
610e: 0e 94 43 12 call 0x2486 ; 0x2486 <wdt_set_timeout_period>
sysclk_enable_peripheral_clock(TWI_MASTER);
sysclk_enable_peripheral_clock(USART_XBEE);
sysclk_enable_peripheral_clock(USART_GPS);
sysclk_enable_peripheral_clock(USART_OPENLOGGER);
6112: e0 e4 ldi r30, 0x40 ; 64
6114: f6 e0 ldi r31, 0x06 ; 6
6116: 80 81 ld r24, Z
6118: 88 60 ori r24, 0x08 ; 8
611a: 80 83 st Z, r24
sysclk_enable_peripheral_clock(&ADCA);
611c: 84 81 ldd r24, Z+4 ; 0x04
611e: 88 60 ori r24, 0x08 ; 8
6120: 84 83 std Z+4, r24 ; 0x04
sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TC0);
6122: c0 ea ldi r28, 0xA0 ; 160
6124: d6 e0 ldi r29, 0x06 ; 6
6126: 88 81 ld r24, Y
6128: 88 60 ori r24, 0x08 ; 8
612a: 88 83 st Y, r24
612c: 8c 81 ldd r24, Y+4 ; 0x04
612e: 88 60 ori r24, 0x08 ; 8
6130: 8c 83 std Y+4, r24 ; 0x04
sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_TWI);
}
#endif
#ifdef TWIF
else if (module == &TWIF) {
sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_TWI);
6132: 60 e4 ldi r22, 0x40 ; 64
6134: 86 e0 ldi r24, 0x06 ; 6
6136: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_SPI);
}
#endif
#ifdef USARTC0
else if (module == &USARTC0) {
sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_USART0);
613a: 60 e1 ldi r22, 0x10 ; 16
613c: 83 e0 ldi r24, 0x03 ; 3
613e: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_USART0);
}
#endif
#ifdef USARTC1
else if (module == &USARTC1) {
sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_USART1);
6142: 60 e2 ldi r22, 0x20 ; 32
6144: 83 e0 ldi r24, 0x03 ; 3
6146: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_USART0);
}
#endif
#ifdef USARTF0
else if (module == &USARTF0) {
sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_USART0);
614a: 60 e1 ldi r22, 0x10 ; 16
614c: 86 e0 ldi r24, 0x06 ; 6
614e: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
sysclk_enable_module(SYSCLK_PORT_B, SYSCLK_AC);
}
#endif
#ifdef ADCA
else if (module == &ADCA) {
sysclk_enable_module(SYSCLK_PORT_A, SYSCLK_ADC);
6152: 62 e0 ldi r22, 0x02 ; 2
6154: 81 e0 ldi r24, 0x01 ; 1
6156: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
//initialize drivers
usart_comms_init();
twi_comms_init();
adc_util_init();
skywave_util_init();
//enable interrupts at all levels
615a: 61 e0 ldi r22, 0x01 ; 1
615c: 83 e0 ldi r24, 0x03 ; 3
615e: 0e 94 59 02 call 0x4b2 ; 0x4b2 <sysclk_enable_module>
irq_initialize_vectors();
cpu_irq_enable();
//wdt_enable();
//initialize device drivers
6162: 88 e3 ldi r24, 0x38 ; 56
6164: 88 8b std Y+16, r24 ; 0x10
ds3231_init();
mpl3_init();
mpu_wai();
6166: 89 8b std Y+17, r24 ; 0x11
delay_ms(2000);
6168: 24 df rcall .-440 ; 0x5fb2 <usart_comms_init>
616a: 99 de rcall .-718 ; 0x5e9e <twi_comms_init>
mpu_init();
616c: 0e 94 a4 1e call 0x3d48 ; 0x3d48 <adc_util_init>
//ntcle100_init();
sw_32hz_timer_init();
6170: 87 e0 ldi r24, 0x07 ; 7
6172: 80 93 a2 00 sts 0x00A2, r24 ; 0x8000a2 <__TEXT_REGION_LENGTH__+0x7000a2>
}
6176: 78 94 sei
_Bool bSensorsReady()
6178: 0e 94 57 12 call 0x24ae ; 0x24ae <wdt_enable>
{
if(sensor_ready_status == 0xFF)
617c: 0e 94 77 14 call 0x28ee ; 0x28ee <ds3231_init>
{
6180: 0e 94 ae 15 call 0x2b5c ; 0x2b5c <mpl3_init>
return true;
6184: 0e 94 24 1c call 0x3848 ; 0x3848 <mpu_wai>
}
6188: 0e 94 c3 1c call 0x3986 ; 0x3986 <mpu_init>
return false;
618c: 0e 94 7a 1e call 0x3cf4 ; 0x3cf4 <ntcle100_init>
}
6190: 0e 94 ea 14 call 0x29d4 ; 0x29d4 <gps_init>
6194: ad dd rcall .-1190 ; 0x5cf0 <sw_32hz_timer_init>
6196: df 91 pop r29
6198: cf 91 pop r28
619a: 08 95 ret
0000619c <main>:
static void sw_fs_standby_init(void);
static void sw_fs_ascent_init(void);
static void sw_fs_first_descent_init(void);
typedef struct
{
619c: a5 df rcall .-182 ; 0x60e8 <skywave_init>
case SW_FIRST_DESCENT:
break;
case SW_SEC_DESCENT:
break;
619e: 0f 2e mov r0, r31
61a0: f3 e3 ldi r31, 0x33 ; 51
61a2: 8f 2e mov r8, r31
61a4: f0 e2 ldi r31, 0x20 ; 32
61a6: 9f 2e mov r9, r31
61a8: f0 2d mov r31, r0
61aa: 68 94 set
61ac: 44 24 eor r4, r4
61ae: 43 f8 bld r4, 3
61b0: 0f 2e mov r0, r31
61b2: f0 ea ldi r31, 0xA0 ; 160
61b4: 5f 2e mov r5, r31
61b6: f0 2d mov r31, r0
case SW_FINAL:
break;
};
}
61b8: 0f 2e mov r0, r31
61ba: f5 e0 ldi r31, 0x05 ; 5
61bc: cf 2e mov r12, r31
61be: f1 e2 ldi r31, 0x21 ; 33
61c0: df 2e mov r13, r31
61c2: f0 2d mov r31, r0
//
void set_ntcle_off(float t_off)
61c4: 0f 2e mov r0, r31
61c6: f6 e3 ldi r31, 0x36 ; 54
61c8: ef 2e mov r14, r31
61ca: f1 e2 ldi r31, 0x21 ; 33
61cc: ff 2e mov r15, r31
61ce: f0 2d mov r31, r0
{
temp_off = (get_ntcle_temp_now() - t_off);
61d0: 0e e5 ldi r16, 0x5E ; 94
61d2: 11 e2 ldi r17, 0x21 ; 33
}
61d4: 0f 2e mov r0, r31
61d6: ff ef ldi r31, 0xFF ; 255
61d8: 2f 2e mov r2, r31
61da: f0 e2 ldi r31, 0x20 ; 32
61dc: 3f 2e mov r3, r31
61de: f0 2d mov r31, r0
static sw_data_bank missionData;
static _Bool bSensorsReady(void);
61e0: 0f 2e mov r0, r31
61e2: f3 eb ldi r31, 0xB3 ; 179
61e4: 6f 2e mov r6, r31
61e6: f1 e2 ldi r31, 0x21 ; 33
61e8: 7f 2e mov r7, r31
61ea: f0 2d mov r31, r0
{
sw_time missionTime;
mpl3_Data mpl3Data;
ntcle100_Data ntcle100Data;
uint16_t packet_count;
}sw_data_bank;
61ec: a8 95 wdr
61ee: a3 dd rcall .-1210 ; 0x5d36 <checK_32hz_ready>
void handle_flight_state(void)
61f0: 81 11 cpse r24, r1
61f2: 9d dd rcall .-1222 ; 0x5d2e <set_32hz_read>
{
switch(sw_state_manager)
{
61f4: 0e 94 26 16 call 0x2c4c ; 0x2c4c <mpl3_get_data_status>
61f8: 81 11 cpse r24, r1
case SW_STANDBY:
61fa: 0e 94 8a 16 call 0x2d14 ; 0x2d14 <calc_mpl3_data>
break;
case SW_ASCENT:
61fe: 0e 94 b8 17 call 0x2f70 ; 0x2f70 <mpu_data_ready>
6202: 88 23 and r24, r24
6204: 29 f0 breq .+10 ; 0x6210 <main+0x74>
break;
6206: 0e 94 d6 1a call 0x35ac ; 0x35ac <mpu_read>
case SW_FIRST_DESCENT:
620a: 80 e0 ldi r24, 0x00 ; 0
620c: 0e 94 b5 17 call 0x2f6a ; 0x2f6a <set_mpu_data_status>
break;
case SW_SEC_DESCENT:
6210: 0e 94 cb 14 call 0x2996 ; 0x2996 <ds3231_is_ready>
6214: 88 23 and r24, r24
6216: 51 f3 breq .-44 ; 0x61ec <main+0x50>
break;
6218: 9f 92 push r9
621a: 8f 92 push r8
621c: 4f 92 push r4
621e: 5f 92 push r5
6220: e0 91 3d 25 lds r30, 0x253D ; 0x80253d <swprintf>
6224: f0 91 3e 25 lds r31, 0x253E ; 0x80253e <swprintf+0x1>
6228: 19 95 eicall
case SW_FINAL:
622a: 61 e0 ldi r22, 0x01 ; 1
622c: 8f ef ldi r24, 0xFF ; 255
622e: 94 e2 ldi r25, 0x24 ; 36
6230: 0e 94 f8 15 call 0x2bf0 ; 0x2bf0 <get_mpl3_data>
6234: 61 e0 ldi r22, 0x01 ; 1
6236: 8a e0 ldi r24, 0x0A ; 10
6238: 95 e2 ldi r25, 0x25 ; 37
623a: 0e 94 d1 1d call 0x3ba2 ; 0x3ba2 <get_ntcle_data>
break;
623e: 8c e1 ldi r24, 0x1C ; 28
6240: 95 e2 ldi r25, 0x25 ; 37
6242: 0e 94 e6 17 call 0x2fcc ; 0x2fcc <mpu_get_rot_data>
};
6246: 80 e1 ldi r24, 0x10 ; 16
6248: 95 e2 ldi r25, 0x25 ; 37
624a: 0e 94 c8 17 call 0x2f90 ; 0x2f90 <mpu_get_accel_data>
}
//
624e: cf ef ldi r28, 0xFF ; 255
6250: d4 e2 ldi r29, 0x24 ; 36
break;
case SW_FINAL:
break;
};
}
6252: 8c 8d ldd r24, Y+28 ; 0x1c
6254: 8f 93 push r24
6256: 8b 8d ldd r24, Y+27 ; 0x1b
6258: 8f 93 push r24
625a: 8a 8d ldd r24, Y+26 ; 0x1a
625c: 8f 93 push r24
625e: 89 8d ldd r24, Y+25 ; 0x19
6260: 8f 93 push r24
6262: 88 8d ldd r24, Y+24 ; 0x18
6264: 8f 93 push r24
6266: 8f 89 ldd r24, Y+23 ; 0x17
6268: 8f 93 push r24
626a: 8e 89 ldd r24, Y+22 ; 0x16
626c: 8f 93 push r24
626e: 8d 89 ldd r24, Y+21 ; 0x15
6270: 8f 93 push r24
6272: 8c 89 ldd r24, Y+20 ; 0x14
6274: 8f 93 push r24
6276: 8b 89 ldd r24, Y+19 ; 0x13
6278: 8f 93 push r24
627a: 8a 89 ldd r24, Y+18 ; 0x12
627c: 8f 93 push r24
627e: 89 89 ldd r24, Y+17 ; 0x11
6280: 8f 93 push r24
6282: df 92 push r13
6284: cf 92 push r12
6286: 4f 92 push r4
6288: 5f 92 push r5
628a: e0 91 3d 25 lds r30, 0x253D ; 0x80253d <swprintf>
628e: f0 91 3e 25 lds r31, 0x253E ; 0x80253e <swprintf+0x1>
6292: 19 95 eicall
//
void set_ntcle_off(float t_off)
6294: 88 a5 ldd r24, Y+40 ; 0x28
6296: 8f 93 push r24
6298: 8f a1 ldd r24, Y+39 ; 0x27
629a: 8f 93 push r24
629c: 8e a1 ldd r24, Y+38 ; 0x26
629e: 8f 93 push r24
62a0: 8d a1 ldd r24, Y+37 ; 0x25
62a2: 8f 93 push r24
62a4: 8c a1 ldd r24, Y+36 ; 0x24
62a6: 8f 93 push r24
62a8: 8b a1 ldd r24, Y+35 ; 0x23
62aa: 8f 93 push r24
62ac: 8a a1 ldd r24, Y+34 ; 0x22
62ae: 8f 93 push r24
62b0: 89 a1 ldd r24, Y+33 ; 0x21
62b2: 8f 93 push r24
62b4: 88 a1 ldd r24, Y+32 ; 0x20
62b6: 8f 93 push r24
62b8: 8f 8d ldd r24, Y+31 ; 0x1f
62ba: 8f 93 push r24
62bc: 8e 8d ldd r24, Y+30 ; 0x1e
62be: 8f 93 push r24
62c0: 8d 8d ldd r24, Y+29 ; 0x1d
62c2: 8f 93 push r24
62c4: ff 92 push r15
62c6: ef 92 push r14
62c8: 4f 92 push r4
62ca: 5f 92 push r5
62cc: e0 91 3d 25 lds r30, 0x253D ; 0x80253d <swprintf>
62d0: f0 91 3e 25 lds r31, 0x253E ; 0x80253e <swprintf+0x1>
62d4: 19 95 eicall
{
temp_off = (get_ntcle_temp_now() - t_off);
62d6: 2d b7 in r18, 0x3d ; 61
62d8: 3e b7 in r19, 0x3e ; 62
62da: 2c 5d subi r18, 0xDC ; 220
62dc: 3f 4f sbci r19, 0xFF ; 255
62de: 2d bf out 0x3d, r18 ; 61
62e0: 3e bf out 0x3e, r19 ; 62
62e2: 88 85 ldd r24, Y+8 ; 0x08
62e4: 8f 93 push r24
62e6: 8f 81 ldd r24, Y+7 ; 0x07
62e8: 8f 93 push r24
62ea: 8e 81 ldd r24, Y+6 ; 0x06
62ec: 8f 93 push r24
62ee: 8d 81 ldd r24, Y+5 ; 0x05
62f0: 8f 93 push r24
62f2: 8c 81 ldd r24, Y+4 ; 0x04
62f4: 8f 93 push r24
62f6: 8b 81 ldd r24, Y+3 ; 0x03
62f8: 8f 93 push r24
62fa: 8a 81 ldd r24, Y+2 ; 0x02
62fc: 8f 93 push r24
62fe: 89 81 ldd r24, Y+1 ; 0x01
6300: 8f 93 push r24
6302: 1f 93 push r17
6304: 0f 93 push r16
6306: 4f 92 push r4
6308: 5f 92 push r5
630a: e0 91 3d 25 lds r30, 0x253D ; 0x80253d <swprintf>
630e: f0 91 3e 25 lds r31, 0x253E ; 0x80253e <swprintf+0x1>
6312: 19 95 eicall
}
6314: 8c e2 ldi r24, 0x2C ; 44
6316: 95 e2 ldi r25, 0x25 ; 37
6318: 0e 94 91 14 call 0x2922 ; 0x2922 <ds3231_get_time>
631c: e0 91 3d 25 lds r30, 0x253D ; 0x80253d <swprintf>
6320: f0 91 3e 25 lds r31, 0x253E ; 0x80253e <swprintf+0x1>
6324: 8d b7 in r24, 0x3d ; 61
6326: 9e b7 in r25, 0x3e ; 62
6328: 0c 96 adiw r24, 0x0c ; 12
632a: 8d bf out 0x3d, r24 ; 61
632c: 9e bf out 0x3e, r25 ; 62
632e: 88 a9 ldd r24, Y+48 ; 0x30
6330: 81 11 cpse r24, r1
6332: 05 c0 rjmp .+10 ; 0x633e <main+0x1a2>
6334: 22 e0 ldi r18, 0x02 ; 2
6336: 31 e2 ldi r19, 0x21 ; 33
6338: 82 2f mov r24, r18
633a: 93 2f mov r25, r19
633c: 02 c0 rjmp .+4 ; 0x6342 <main+0x1a6>
633e: 82 2d mov r24, r2
6340: 93 2d mov r25, r3
6342: 9f 93 push r25
6344: 8f 93 push r24
static sw_data_bank missionData;
6346: af ef ldi r26, 0xFF ; 255
6348: b4 e2 ldi r27, 0x24 ; 36
//
void set_ntcle_off(float t_off)
{
temp_off = (get_ntcle_temp_now() - t_off);
}
634a: 9f 96 adiw r26, 0x2f ; 47
634c: 8c 91 ld r24, X
634e: 9f 97 sbiw r26, 0x2f ; 47
6350: 1f 92 push r1
6352: 8f 93 push r24
6354: 9e 96 adiw r26, 0x2e ; 46
6356: 8c 91 ld r24, X
6358: 9e 97 sbiw r26, 0x2e ; 46
635a: 1f 92 push r1
635c: 8f 93 push r24
635e: 9d 96 adiw r26, 0x2d ; 45
6360: 8c 91 ld r24, X
6362: 1f 92 push r1
6364: 8f 93 push r24
6366: 85 e8 ldi r24, 0x85 ; 133
6368: 91 e2 ldi r25, 0x21 ; 33
636a: 9f 93 push r25
636c: 8f 93 push r24
636e: 4f 92 push r4
6370: 5f 92 push r5
6372: 19 95 eicall
static sw_data_bank missionData;
static _Bool bSensorsReady(void);
6374: a0 90 3d 25 lds r10, 0x253D ; 0x80253d <swprintf>
6378: b0 90 3e 25 lds r11, 0x253E ; 0x80253e <swprintf+0x1>
637c: 0e 94 6c 1e call 0x3cd8 ; 0x3cd8 <get_ntcle_temp_now>
6380: 9f 93 push r25
6382: 8f 93 push r24
6384: 7f 93 push r23
6386: 6f 93 push r22
6388: 7f 92 push r7
638a: 6f 92 push r6
638c: 4f 92 push r4
638e: 5f 92 push r5
6390: f5 01 movw r30, r10
6392: 19 95 eicall
int main(void)
6394: 0e 94 13 14 call 0x2826 ; 0x2826 <ds3231_clear_ready>
6398: 2d b7 in r18, 0x3d ; 61
639a: 3e b7 in r19, 0x3e ; 62
639c: 2c 5e subi r18, 0xEC ; 236
639e: 3f 4f sbci r19, 0xFF ; 255
63a0: 2d bf out 0x3d, r18 ; 61
63a2: 3e bf out 0x3e, r19 ; 62
63a4: 23 cf rjmp .-442 ; 0x61ec <main+0x50>
000063a6 <__subsf3>:
63a6: 50 58 subi r21, 0x80 ; 128
000063a8 <__addsf3>:
63a8: bb 27 eor r27, r27
63aa: aa 27 eor r26, r26
63ac: 0e d0 rcall .+28 ; 0x63ca <__addsf3x>
63ae: 3f c2 rjmp .+1150 ; 0x682e <__fp_round>
63b0: 30 d2 rcall .+1120 ; 0x6812 <__fp_pscA>
63b2: 30 f0 brcs .+12 ; 0x63c0 <__addsf3+0x18>
63b4: 35 d2 rcall .+1130 ; 0x6820 <__fp_pscB>
63b6: 20 f0 brcs .+8 ; 0x63c0 <__addsf3+0x18>
63b8: 31 f4 brne .+12 ; 0x63c6 <__addsf3+0x1e>
63ba: 9f 3f cpi r25, 0xFF ; 255
63bc: 11 f4 brne .+4 ; 0x63c2 <__addsf3+0x1a>
63be: 1e f4 brtc .+6 ; 0x63c6 <__addsf3+0x1e>
63c0: ef c1 rjmp .+990 ; 0x67a0 <__fp_nan>
63c2: 0e f4 brtc .+2 ; 0x63c6 <__addsf3+0x1e>
63c4: e0 95 com r30
63c6: e7 fb bst r30, 7
63c8: e5 c1 rjmp .+970 ; 0x6794 <__fp_inf>
000063ca <__addsf3x>:
63ca: e9 2f mov r30, r25
63cc: 41 d2 rcall .+1154 ; 0x6850 <__fp_split3>
63ce: 80 f3 brcs .-32 ; 0x63b0 <__addsf3+0x8>
63d0: ba 17 cp r27, r26
63d2: 62 07 cpc r22, r18
63d4: 73 07 cpc r23, r19
63d6: 84 07 cpc r24, r20
63d8: 95 07 cpc r25, r21
63da: 18 f0 brcs .+6 ; 0x63e2 <__addsf3x+0x18>
63dc: 71 f4 brne .+28 ; 0x63fa <__addsf3x+0x30>
63de: 9e f5 brtc .+102 ; 0x6446 <__addsf3x+0x7c>
63e0: 59 c2 rjmp .+1202 ; 0x6894 <__fp_zero>
63e2: 0e f4 brtc .+2 ; 0x63e6 <__addsf3x+0x1c>
63e4: e0 95 com r30
63e6: 0b 2e mov r0, r27
63e8: ba 2f mov r27, r26
63ea: a0 2d mov r26, r0
63ec: 0b 01 movw r0, r22
63ee: b9 01 movw r22, r18
63f0: 90 01 movw r18, r0
63f2: 0c 01 movw r0, r24
63f4: ca 01 movw r24, r20
63f6: a0 01 movw r20, r0
63f8: 11 24 eor r1, r1
63fa: ff 27 eor r31, r31
63fc: 59 1b sub r21, r25
63fe: 99 f0 breq .+38 ; 0x6426 <__addsf3x+0x5c>
6400: 59 3f cpi r21, 0xF9 ; 249
6402: 50 f4 brcc .+20 ; 0x6418 <__addsf3x+0x4e>
6404: 50 3e cpi r21, 0xE0 ; 224
6406: 68 f1 brcs .+90 ; 0x6462 <__addsf3x+0x98>
6408: 1a 16 cp r1, r26
640a: f0 40 sbci r31, 0x00 ; 0
640c: a2 2f mov r26, r18
640e: 23 2f mov r18, r19
6410: 34 2f mov r19, r20
6412: 44 27 eor r20, r20
6414: 58 5f subi r21, 0xF8 ; 248
6416: f3 cf rjmp .-26 ; 0x63fe <__addsf3x+0x34>
6418: 46 95 lsr r20
641a: 37 95 ror r19
641c: 27 95 ror r18
641e: a7 95 ror r26
6420: f0 40 sbci r31, 0x00 ; 0
6422: 53 95 inc r21
6424: c9 f7 brne .-14 ; 0x6418 <__addsf3x+0x4e>
6426: 7e f4 brtc .+30 ; 0x6446 <__addsf3x+0x7c>
6428: 1f 16 cp r1, r31
642a: ba 0b sbc r27, r26
642c: 62 0b sbc r22, r18
642e: 73 0b sbc r23, r19
6430: 84 0b sbc r24, r20
6432: ba f0 brmi .+46 ; 0x6462 <__addsf3x+0x98>
6434: 91 50 subi r25, 0x01 ; 1
6436: a1 f0 breq .+40 ; 0x6460 <__addsf3x+0x96>
6438: ff 0f add r31, r31
643a: bb 1f adc r27, r27
643c: 66 1f adc r22, r22
643e: 77 1f adc r23, r23
6440: 88 1f adc r24, r24
6442: c2 f7 brpl .-16 ; 0x6434 <__addsf3x+0x6a>
6444: 0e c0 rjmp .+28 ; 0x6462 <__addsf3x+0x98>
6446: ba 0f add r27, r26
6448: 62 1f adc r22, r18
644a: 73 1f adc r23, r19
644c: 84 1f adc r24, r20
644e: 48 f4 brcc .+18 ; 0x6462 <__addsf3x+0x98>
6450: 87 95 ror r24
6452: 77 95 ror r23
6454: 67 95 ror r22
6456: b7 95 ror r27
6458: f7 95 ror r31
645a: 9e 3f cpi r25, 0xFE ; 254
645c: 08 f0 brcs .+2 ; 0x6460 <__addsf3x+0x96>
645e: b3 cf rjmp .-154 ; 0x63c6 <__addsf3+0x1e>
6460: 93 95 inc r25
6462: 88 0f add r24, r24
6464: 08 f0 brcs .+2 ; 0x6468 <__addsf3x+0x9e>
6466: 99 27 eor r25, r25
6468: ee 0f add r30, r30
646a: 97 95 ror r25
646c: 87 95 ror r24
646e: 08 95 ret
00006470 <asin>:
6470: 9f 93 push r25
6472: 9f 77 andi r25, 0x7F ; 127
6474: ee e3 ldi r30, 0x3E ; 62
6476: 89 37 cpi r24, 0x79 ; 121
6478: 9e 07 cpc r25, r30
647a: 20 f4 brcc .+8 ; 0x6484 <asin+0x14>
647c: ec e0 ldi r30, 0x0C ; 12
647e: f2 e0 ldi r31, 0x02 ; 2
6480: b7 d1 rcall .+878 ; 0x67f0 <__fp_powsodd>
6482: 09 c0 rjmp .+18 ; 0x6496 <asin+0x26>
6484: 48 d1 rcall .+656 ; 0x6716 <__fp_arccos>
6486: 90 58 subi r25, 0x80 ; 128
6488: a2 ea ldi r26, 0xA2 ; 162
648a: 2a ed ldi r18, 0xDA ; 218
648c: 3f e0 ldi r19, 0x0F ; 15
648e: 49 ec ldi r20, 0xC9 ; 201
6490: 5f e3 ldi r21, 0x3F ; 63
6492: 9b df rcall .-202 ; 0x63ca <__addsf3x>
6494: cc d1 rcall .+920 ; 0x682e <__fp_round>
6496: 0f 90 pop r0
6498: 07 fc sbrc r0, 7
649a: 90 58 subi r25, 0x80 ; 128
649c: 08 95 ret
649e: b9 d1 rcall .+882 ; 0x6812 <__fp_pscA>
64a0: 58 f0 brcs .+22 ; 0x64b8 <asin+0x48>
64a2: 80 e8 ldi r24, 0x80 ; 128
64a4: 91 e0 ldi r25, 0x01 ; 1
64a6: 09 f4 brne .+2 ; 0x64aa <asin+0x3a>
64a8: 9e ef ldi r25, 0xFE ; 254
64aa: ba d1 rcall .+884 ; 0x6820 <__fp_pscB>
64ac: 28 f0 brcs .+10 ; 0x64b8 <asin+0x48>
64ae: 40 e8 ldi r20, 0x80 ; 128
64b0: 51 e0 ldi r21, 0x01 ; 1
64b2: 59 f4 brne .+22 ; 0x64ca <atan2+0xe>
64b4: 5e ef ldi r21, 0xFE ; 254
64b6: 09 c0 rjmp .+18 ; 0x64ca <atan2+0xe>
64b8: 73 c1 rjmp .+742 ; 0x67a0 <__fp_nan>
64ba: ec c1 rjmp .+984 ; 0x6894 <__fp_zero>
000064bc <atan2>:
64bc: e9 2f mov r30, r25
64be: e0 78 andi r30, 0x80 ; 128
64c0: c7 d1 rcall .+910 ; 0x6850 <__fp_split3>
64c2: 68 f3 brcs .-38 ; 0x649e <asin+0x2e>
64c4: 09 2e mov r0, r25
64c6: 05 2a or r0, r21
64c8: c1 f3 breq .-16 ; 0x64ba <asin+0x4a>
64ca: 26 17 cp r18, r22
64cc: 37 07 cpc r19, r23
64ce: 48 07 cpc r20, r24
64d0: 59 07 cpc r21, r25
64d2: 38 f0 brcs .+14 ; 0x64e2 <atan2+0x26>
64d4: 0e 2e mov r0, r30
64d6: 07 f8 bld r0, 7
64d8: e0 25 eor r30, r0
64da: 69 f0 breq .+26 ; 0x64f6 <atan2+0x3a>
64dc: e0 25 eor r30, r0
64de: e0 64 ori r30, 0x40 ; 64
64e0: 0a c0 rjmp .+20 ; 0x64f6 <atan2+0x3a>
64e2: ef 63 ori r30, 0x3F ; 63
64e4: 07 f8 bld r0, 7
64e6: 00 94 com r0
64e8: 07 fa bst r0, 7
64ea: db 01 movw r26, r22
64ec: b9 01 movw r22, r18
64ee: 9d 01 movw r18, r26
64f0: dc 01 movw r26, r24
64f2: ca 01 movw r24, r20
64f4: ad 01 movw r20, r26
64f6: ef 93 push r30
64f8: 47 d0 rcall .+142 ; 0x6588 <__divsf3_pse>
64fa: 99 d1 rcall .+818 ; 0x682e <__fp_round>
64fc: 0a d0 rcall .+20 ; 0x6512 <atan>
64fe: 5f 91 pop r21
6500: 55 23 and r21, r21
6502: 31 f0 breq .+12 ; 0x6510 <atan2+0x54>
6504: 2b ed ldi r18, 0xDB ; 219
6506: 3f e0 ldi r19, 0x0F ; 15
6508: 49 e4 ldi r20, 0x49 ; 73
650a: 50 fd sbrc r21, 0
650c: 49 ec ldi r20, 0xC9 ; 201
650e: 4c cf rjmp .-360 ; 0x63a8 <__addsf3>
6510: 08 95 ret
00006512 <atan>:
6512: df 93 push r29
6514: dd 27 eor r29, r29
6516: b9 2f mov r27, r25
6518: bf 77 andi r27, 0x7F ; 127
651a: 40 e8 ldi r20, 0x80 ; 128
651c: 5f e3 ldi r21, 0x3F ; 63
651e: 16 16 cp r1, r22
6520: 17 06 cpc r1, r23
6522: 48 07 cpc r20, r24
6524: 5b 07 cpc r21, r27
6526: 10 f4 brcc .+4 ; 0x652c <atan+0x1a>
6528: d9 2f mov r29, r25
652a: bf d1 rcall .+894 ; 0x68aa <inverse>
652c: 9f 93 push r25
652e: 8f 93 push r24
6530: 7f 93 push r23
6532: 6f 93 push r22
6534: 17 d3 rcall .+1582 ; 0x6b64 <square>
6536: e0 e2 ldi r30, 0x20 ; 32
6538: f2 e0 ldi r31, 0x02 ; 2
653a: 35 d1 rcall .+618 ; 0x67a6 <__fp_powser>
653c: 78 d1 rcall .+752 ; 0x682e <__fp_round>
653e: 2f 91 pop r18
6540: 3f 91 pop r19
6542: 4f 91 pop r20
6544: 5f 91 pop r21
6546: 09 d2 rcall .+1042 ; 0x695a <__mulsf3x>
6548: dd 23 and r29, r29
654a: 49 f0 breq .+18 ; 0x655e <atan+0x4c>
654c: 90 58 subi r25, 0x80 ; 128
654e: a2 ea ldi r26, 0xA2 ; 162
6550: 2a ed ldi r18, 0xDA ; 218
6552: 3f e0 ldi r19, 0x0F ; 15
6554: 49 ec ldi r20, 0xC9 ; 201
6556: 5f e3 ldi r21, 0x3F ; 63
6558: d0 78 andi r29, 0x80 ; 128
655a: 5d 27 eor r21, r29
655c: 36 df rcall .-404 ; 0x63ca <__addsf3x>
655e: df 91 pop r29
6560: 66 c1 rjmp .+716 ; 0x682e <__fp_round>
00006562 <__cmpsf2>:
6562: f4 d0 rcall .+488 ; 0x674c <__fp_cmp>
6564: 08 f4 brcc .+2 ; 0x6568 <__cmpsf2+0x6>
6566: 81 e0 ldi r24, 0x01 ; 1
6568: 08 95 ret
0000656a <__divsf3>:
656a: 0c d0 rcall .+24 ; 0x6584 <__divsf3x>
656c: 60 c1 rjmp .+704 ; 0x682e <__fp_round>
656e: 58 d1 rcall .+688 ; 0x6820 <__fp_pscB>
6570: 40 f0 brcs .+16 ; 0x6582 <__divsf3+0x18>
6572: 4f d1 rcall .+670 ; 0x6812 <__fp_pscA>
6574: 30 f0 brcs .+12 ; 0x6582 <__divsf3+0x18>
6576: 21 f4 brne .+8 ; 0x6580 <__divsf3+0x16>
6578: 5f 3f cpi r21, 0xFF ; 255
657a: 19 f0 breq .+6 ; 0x6582 <__divsf3+0x18>
657c: 0b c1 rjmp .+534 ; 0x6794 <__fp_inf>
657e: 51 11 cpse r21, r1
6580: 8a c1 rjmp .+788 ; 0x6896 <__fp_szero>
6582: 0e c1 rjmp .+540 ; 0x67a0 <__fp_nan>
00006584 <__divsf3x>:
6584: 65 d1 rcall .+714 ; 0x6850 <__fp_split3>
6586: 98 f3 brcs .-26 ; 0x656e <__divsf3+0x4>
00006588 <__divsf3_pse>:
6588: 99 23 and r25, r25
658a: c9 f3 breq .-14 ; 0x657e <__divsf3+0x14>
658c: 55 23 and r21, r21
658e: b1 f3 breq .-20 ; 0x657c <__divsf3+0x12>
6590: 95 1b sub r25, r21
6592: 55 0b sbc r21, r21
6594: bb 27 eor r27, r27
6596: aa 27 eor r26, r26
6598: 62 17 cp r22, r18
659a: 73 07 cpc r23, r19
659c: 84 07 cpc r24, r20
659e: 38 f0 brcs .+14 ; 0x65ae <__divsf3_pse+0x26>
65a0: 9f 5f subi r25, 0xFF ; 255
65a2: 5f 4f sbci r21, 0xFF ; 255
65a4: 22 0f add r18, r18
65a6: 33 1f adc r19, r19
65a8: 44 1f adc r20, r20
65aa: aa 1f adc r26, r26
65ac: a9 f3 breq .-22 ; 0x6598 <__divsf3_pse+0x10>
65ae: 33 d0 rcall .+102 ; 0x6616 <__divsf3_pse+0x8e>
65b0: 0e 2e mov r0, r30
65b2: 3a f0 brmi .+14 ; 0x65c2 <__divsf3_pse+0x3a>
65b4: e0 e8 ldi r30, 0x80 ; 128
65b6: 30 d0 rcall .+96 ; 0x6618 <__divsf3_pse+0x90>
65b8: 91 50 subi r25, 0x01 ; 1
65ba: 50 40 sbci r21, 0x00 ; 0
65bc: e6 95 lsr r30
65be: 00 1c adc r0, r0
65c0: ca f7 brpl .-14 ; 0x65b4 <__divsf3_pse+0x2c>
65c2: 29 d0 rcall .+82 ; 0x6616 <__divsf3_pse+0x8e>
65c4: fe 2f mov r31, r30
65c6: 27 d0 rcall .+78 ; 0x6616 <__divsf3_pse+0x8e>
65c8: 66 0f add r22, r22
65ca: 77 1f adc r23, r23
65cc: 88 1f adc r24, r24
65ce: bb 1f adc r27, r27
65d0: 26 17 cp r18, r22
65d2: 37 07 cpc r19, r23
65d4: 48 07 cpc r20, r24
65d6: ab 07 cpc r26, r27
65d8: b0 e8 ldi r27, 0x80 ; 128
65da: 09 f0 breq .+2 ; 0x65de <__divsf3_pse+0x56>
65dc: bb 0b sbc r27, r27
65de: 80 2d mov r24, r0
65e0: bf 01 movw r22, r30
65e2: ff 27 eor r31, r31
65e4: 93 58 subi r25, 0x83 ; 131
65e6: 5f 4f sbci r21, 0xFF ; 255
65e8: 2a f0 brmi .+10 ; 0x65f4 <__divsf3_pse+0x6c>
65ea: 9e 3f cpi r25, 0xFE ; 254
65ec: 51 05 cpc r21, r1
65ee: 68 f0 brcs .+26 ; 0x660a <__divsf3_pse+0x82>
65f0: d1 c0 rjmp .+418 ; 0x6794 <__fp_inf>
65f2: 51 c1 rjmp .+674 ; 0x6896 <__fp_szero>
65f4: 5f 3f cpi r21, 0xFF ; 255
65f6: ec f3 brlt .-6 ; 0x65f2 <__divsf3_pse+0x6a>
65f8: 98 3e cpi r25, 0xE8 ; 232
65fa: dc f3 brlt .-10 ; 0x65f2 <__divsf3_pse+0x6a>
65fc: 86 95 lsr r24
65fe: 77 95 ror r23
6600: 67 95 ror r22
6602: b7 95 ror r27
6604: f7 95 ror r31
6606: 9f 5f subi r25, 0xFF ; 255
6608: c9 f7 brne .-14 ; 0x65fc <__divsf3_pse+0x74>
660a: 88 0f add r24, r24
660c: 91 1d adc r25, r1
660e: 96 95 lsr r25
6610: 87 95 ror r24
6612: 97 f9 bld r25, 7
6614: 08 95 ret
6616: e1 e0 ldi r30, 0x01 ; 1
6618: 66 0f add r22, r22
661a: 77 1f adc r23, r23
661c: 88 1f adc r24, r24
661e: bb 1f adc r27, r27
6620: 62 17 cp r22, r18
6622: 73 07 cpc r23, r19
6624: 84 07 cpc r24, r20
6626: ba 07 cpc r27, r26
6628: 20 f0 brcs .+8 ; 0x6632 <__divsf3_pse+0xaa>
662a: 62 1b sub r22, r18
662c: 73 0b sbc r23, r19
662e: 84 0b sbc r24, r20
6630: ba 0b sbc r27, r26
6632: ee 1f adc r30, r30
6634: 88 f7 brcc .-30 ; 0x6618 <__divsf3_pse+0x90>
6636: e0 95 com r30
6638: 08 95 ret
0000663a <__fixsfsi>:
663a: 04 d0 rcall .+8 ; 0x6644 <__fixunssfsi>
663c: 68 94 set
663e: b1 11 cpse r27, r1
6640: 2a c1 rjmp .+596 ; 0x6896 <__fp_szero>
6642: 08 95 ret
00006644 <__fixunssfsi>:
6644: 0d d1 rcall .+538 ; 0x6860 <__fp_splitA>
6646: 88 f0 brcs .+34 ; 0x666a <__fixunssfsi+0x26>
6648: 9f 57 subi r25, 0x7F ; 127
664a: 90 f0 brcs .+36 ; 0x6670 <__fixunssfsi+0x2c>
664c: b9 2f mov r27, r25
664e: 99 27 eor r25, r25
6650: b7 51 subi r27, 0x17 ; 23
6652: a0 f0 brcs .+40 ; 0x667c <__fixunssfsi+0x38>
6654: d1 f0 breq .+52 ; 0x668a <__fixunssfsi+0x46>
6656: 66 0f add r22, r22
6658: 77 1f adc r23, r23
665a: 88 1f adc r24, r24
665c: 99 1f adc r25, r25
665e: 1a f0 brmi .+6 ; 0x6666 <__fixunssfsi+0x22>
6660: ba 95 dec r27
6662: c9 f7 brne .-14 ; 0x6656 <__fixunssfsi+0x12>
6664: 12 c0 rjmp .+36 ; 0x668a <__fixunssfsi+0x46>
6666: b1 30 cpi r27, 0x01 ; 1
6668: 81 f0 breq .+32 ; 0x668a <__fixunssfsi+0x46>
666a: 14 d1 rcall .+552 ; 0x6894 <__fp_zero>
666c: b1 e0 ldi r27, 0x01 ; 1
666e: 08 95 ret
6670: 11 c1 rjmp .+546 ; 0x6894 <__fp_zero>
6672: 67 2f mov r22, r23
6674: 78 2f mov r23, r24
6676: 88 27 eor r24, r24
6678: b8 5f subi r27, 0xF8 ; 248
667a: 39 f0 breq .+14 ; 0x668a <__fixunssfsi+0x46>
667c: b9 3f cpi r27, 0xF9 ; 249
667e: cc f3 brlt .-14 ; 0x6672 <__fixunssfsi+0x2e>
6680: 86 95 lsr r24
6682: 77 95 ror r23
6684: 67 95 ror r22
6686: b3 95 inc r27
6688: d9 f7 brne .-10 ; 0x6680 <__fixunssfsi+0x3c>
668a: 3e f4 brtc .+14 ; 0x669a <__fixunssfsi+0x56>
668c: 90 95 com r25
668e: 80 95 com r24
6690: 70 95 com r23
6692: 61 95 neg r22
6694: 7f 4f sbci r23, 0xFF ; 255
6696: 8f 4f sbci r24, 0xFF ; 255
6698: 9f 4f sbci r25, 0xFF ; 255
669a: 08 95 ret
0000669c <__floatunsisf>:
669c: e8 94 clt
669e: 09 c0 rjmp .+18 ; 0x66b2 <__floatsisf+0x12>
000066a0 <__floatsisf>:
66a0: 97 fb bst r25, 7
66a2: 3e f4 brtc .+14 ; 0x66b2 <__floatsisf+0x12>
66a4: 90 95 com r25
66a6: 80 95 com r24
66a8: 70 95 com r23
66aa: 61 95 neg r22
66ac: 7f 4f sbci r23, 0xFF ; 255
66ae: 8f 4f sbci r24, 0xFF ; 255
66b0: 9f 4f sbci r25, 0xFF ; 255
66b2: 99 23 and r25, r25
66b4: a9 f0 breq .+42 ; 0x66e0 <__floatsisf+0x40>
66b6: f9 2f mov r31, r25
66b8: 96 e9 ldi r25, 0x96 ; 150
66ba: bb 27 eor r27, r27
66bc: 93 95 inc r25
66be: f6 95 lsr r31
66c0: 87 95 ror r24
66c2: 77 95 ror r23
66c4: 67 95 ror r22
66c6: b7 95 ror r27
66c8: f1 11 cpse r31, r1
66ca: f8 cf rjmp .-16 ; 0x66bc <__floatsisf+0x1c>
66cc: fa f4 brpl .+62 ; 0x670c <__floatsisf+0x6c>
66ce: bb 0f add r27, r27
66d0: 11 f4 brne .+4 ; 0x66d6 <__floatsisf+0x36>
66d2: 60 ff sbrs r22, 0
66d4: 1b c0 rjmp .+54 ; 0x670c <__floatsisf+0x6c>
66d6: 6f 5f subi r22, 0xFF ; 255
66d8: 7f 4f sbci r23, 0xFF ; 255
66da: 8f 4f sbci r24, 0xFF ; 255
66dc: 9f 4f sbci r25, 0xFF ; 255
66de: 16 c0 rjmp .+44 ; 0x670c <__floatsisf+0x6c>
66e0: 88 23 and r24, r24
66e2: 11 f0 breq .+4 ; 0x66e8 <__floatsisf+0x48>
66e4: 96 e9 ldi r25, 0x96 ; 150
66e6: 11 c0 rjmp .+34 ; 0x670a <__floatsisf+0x6a>
66e8: 77 23 and r23, r23
66ea: 21 f0 breq .+8 ; 0x66f4 <__floatsisf+0x54>
66ec: 9e e8 ldi r25, 0x8E ; 142
66ee: 87 2f mov r24, r23
66f0: 76 2f mov r23, r22
66f2: 05 c0 rjmp .+10 ; 0x66fe <__floatsisf+0x5e>
66f4: 66 23 and r22, r22
66f6: 71 f0 breq .+28 ; 0x6714 <__floatsisf+0x74>
66f8: 96 e8 ldi r25, 0x86 ; 134
66fa: 86 2f mov r24, r22
66fc: 70 e0 ldi r23, 0x00 ; 0
66fe: 60 e0 ldi r22, 0x00 ; 0
6700: 2a f0 brmi .+10 ; 0x670c <__floatsisf+0x6c>
6702: 9a 95 dec r25
6704: 66 0f add r22, r22
6706: 77 1f adc r23, r23
6708: 88 1f adc r24, r24
670a: da f7 brpl .-10 ; 0x6702 <__floatsisf+0x62>
670c: 88 0f add r24, r24
670e: 96 95 lsr r25
6710: 87 95 ror r24
6712: 97 f9 bld r25, 7
6714: 08 95 ret
00006716 <__fp_arccos>:
6716: df 93 push r29
6718: cf 93 push r28
671a: 1f 93 push r17
671c: 0f 93 push r16
671e: 8b 01 movw r16, r22
6720: ec 01 movw r28, r24
6722: ed e4 ldi r30, 0x4D ; 77
6724: f2 e0 ldi r31, 0x02 ; 2
6726: 3f d0 rcall .+126 ; 0x67a6 <__fp_powser>
6728: 82 d0 rcall .+260 ; 0x682e <__fp_round>
672a: 98 01 movw r18, r16
672c: ae 01 movw r20, r28
672e: 8b 01 movw r16, r22
6730: ec 01 movw r28, r24
6732: 60 e0 ldi r22, 0x00 ; 0
6734: 70 e0 ldi r23, 0x00 ; 0
6736: 80 e8 ldi r24, 0x80 ; 128
6738: 9f e3 ldi r25, 0x3F ; 63
673a: 35 de rcall .-918 ; 0x63a6 <__subsf3>
673c: d5 d1 rcall .+938 ; 0x6ae8 <sqrt>
673e: 98 01 movw r18, r16
6740: ae 01 movw r20, r28
6742: 0f 91 pop r16
6744: 1f 91 pop r17
6746: cf 91 pop r28
6748: df 91 pop r29
674a: 07 c1 rjmp .+526 ; 0x695a <__mulsf3x>
0000674c <__fp_cmp>:
674c: 99 0f add r25, r25
674e: 00 08 sbc r0, r0
6750: 55 0f add r21, r21
6752: aa 0b sbc r26, r26
6754: e0 e8 ldi r30, 0x80 ; 128
6756: fe ef ldi r31, 0xFE ; 254
6758: 16 16 cp r1, r22
675a: 17 06 cpc r1, r23
675c: e8 07 cpc r30, r24
675e: f9 07 cpc r31, r25
6760: c0 f0 brcs .+48 ; 0x6792 <__fp_cmp+0x46>
6762: 12 16 cp r1, r18
6764: 13 06 cpc r1, r19
6766: e4 07 cpc r30, r20
6768: f5 07 cpc r31, r21
676a: 98 f0 brcs .+38 ; 0x6792 <__fp_cmp+0x46>
676c: 62 1b sub r22, r18
676e: 73 0b sbc r23, r19
6770: 84 0b sbc r24, r20
6772: 95 0b sbc r25, r21
6774: 39 f4 brne .+14 ; 0x6784 <__fp_cmp+0x38>
6776: 0a 26 eor r0, r26
6778: 61 f0 breq .+24 ; 0x6792 <__fp_cmp+0x46>
677a: 23 2b or r18, r19
677c: 24 2b or r18, r20
677e: 25 2b or r18, r21
6780: 21 f4 brne .+8 ; 0x678a <__fp_cmp+0x3e>
6782: 08 95 ret
6784: 0a 26 eor r0, r26
6786: 09 f4 brne .+2 ; 0x678a <__fp_cmp+0x3e>
6788: a1 40 sbci r26, 0x01 ; 1
678a: a6 95 lsr r26
678c: 8f ef ldi r24, 0xFF ; 255
678e: 81 1d adc r24, r1
6790: 81 1d adc r24, r1
6792: 08 95 ret
00006794 <__fp_inf>:
6794: 97 f9 bld r25, 7
6796: 9f 67 ori r25, 0x7F ; 127
6798: 80 e8 ldi r24, 0x80 ; 128
679a: 70 e0 ldi r23, 0x00 ; 0
679c: 60 e0 ldi r22, 0x00 ; 0
679e: 08 95 ret
000067a0 <__fp_nan>:
67a0: 9f ef ldi r25, 0xFF ; 255
67a2: 80 ec ldi r24, 0xC0 ; 192
67a4: 08 95 ret
000067a6 <__fp_powser>:
67a6: df 93 push r29
67a8: cf 93 push r28
67aa: 1f 93 push r17
67ac: 0f 93 push r16
67ae: ff 92 push r15
67b0: ef 92 push r14
67b2: df 92 push r13
67b4: 7b 01 movw r14, r22
67b6: 8c 01 movw r16, r24
67b8: 68 94 set
67ba: 05 c0 rjmp .+10 ; 0x67c6 <__fp_powser+0x20>
67bc: da 2e mov r13, r26
67be: ef 01 movw r28, r30
67c0: cc d0 rcall .+408 ; 0x695a <__mulsf3x>
67c2: fe 01 movw r30, r28
67c4: e8 94 clt
67c6: a5 91 lpm r26, Z+
67c8: 25 91 lpm r18, Z+
67ca: 35 91 lpm r19, Z+
67cc: 45 91 lpm r20, Z+
67ce: 55 91 lpm r21, Z+
67d0: ae f3 brts .-22 ; 0x67bc <__fp_powser+0x16>
67d2: ef 01 movw r28, r30
67d4: fa dd rcall .-1036 ; 0x63ca <__addsf3x>
67d6: fe 01 movw r30, r28
67d8: 97 01 movw r18, r14
67da: a8 01 movw r20, r16
67dc: da 94 dec r13
67de: 79 f7 brne .-34 ; 0x67be <__fp_powser+0x18>
67e0: df 90 pop r13
67e2: ef 90 pop r14
67e4: ff 90 pop r15
67e6: 0f 91 pop r16
67e8: 1f 91 pop r17
67ea: cf 91 pop r28
67ec: df 91 pop r29
67ee: 08 95 ret
000067f0 <__fp_powsodd>:
67f0: 9f 93 push r25
67f2: 8f 93 push r24
67f4: 7f 93 push r23
67f6: 6f 93 push r22
67f8: ff 93 push r31
67fa: ef 93 push r30
67fc: 9b 01 movw r18, r22
67fe: ac 01 movw r20, r24
6800: a0 d0 rcall .+320 ; 0x6942 <__mulsf3>
6802: ef 91 pop r30
6804: ff 91 pop r31
6806: cf df rcall .-98 ; 0x67a6 <__fp_powser>
6808: 2f 91 pop r18
680a: 3f 91 pop r19
680c: 4f 91 pop r20
680e: 5f 91 pop r21
6810: 98 c0 rjmp .+304 ; 0x6942 <__mulsf3>
00006812 <__fp_pscA>:
6812: 00 24 eor r0, r0
6814: 0a 94 dec r0
6816: 16 16 cp r1, r22
6818: 17 06 cpc r1, r23
681a: 18 06 cpc r1, r24
681c: 09 06 cpc r0, r25
681e: 08 95 ret
00006820 <__fp_pscB>:
6820: 00 24 eor r0, r0
6822: 0a 94 dec r0
6824: 12 16 cp r1, r18
6826: 13 06 cpc r1, r19
6828: 14 06 cpc r1, r20
682a: 05 06 cpc r0, r21
682c: 08 95 ret
0000682e <__fp_round>:
682e: 09 2e mov r0, r25
6830: 03 94 inc r0
6832: 00 0c add r0, r0
6834: 11 f4 brne .+4 ; 0x683a <__fp_round+0xc>
6836: 88 23 and r24, r24
6838: 52 f0 brmi .+20 ; 0x684e <__fp_round+0x20>
683a: bb 0f add r27, r27
683c: 40 f4 brcc .+16 ; 0x684e <__fp_round+0x20>
683e: bf 2b or r27, r31
6840: 11 f4 brne .+4 ; 0x6846 <__fp_round+0x18>
6842: 60 ff sbrs r22, 0
6844: 04 c0 rjmp .+8 ; 0x684e <__fp_round+0x20>
6846: 6f 5f subi r22, 0xFF ; 255
6848: 7f 4f sbci r23, 0xFF ; 255
684a: 8f 4f sbci r24, 0xFF ; 255
684c: 9f 4f sbci r25, 0xFF ; 255
684e: 08 95 ret
00006850 <__fp_split3>:
6850: 57 fd sbrc r21, 7
6852: 90 58 subi r25, 0x80 ; 128
6854: 44 0f add r20, r20
6856: 55 1f adc r21, r21
6858: 59 f0 breq .+22 ; 0x6870 <__fp_splitA+0x10>
685a: 5f 3f cpi r21, 0xFF ; 255
685c: 71 f0 breq .+28 ; 0x687a <__fp_splitA+0x1a>
685e: 47 95 ror r20
00006860 <__fp_splitA>:
6860: 88 0f add r24, r24
6862: 97 fb bst r25, 7
6864: 99 1f adc r25, r25
6866: 61 f0 breq .+24 ; 0x6880 <__fp_splitA+0x20>
6868: 9f 3f cpi r25, 0xFF ; 255
686a: 79 f0 breq .+30 ; 0x688a <__fp_splitA+0x2a>
686c: 87 95 ror r24
686e: 08 95 ret
6870: 12 16 cp r1, r18
6872: 13 06 cpc r1, r19
6874: 14 06 cpc r1, r20
6876: 55 1f adc r21, r21
6878: f2 cf rjmp .-28 ; 0x685e <__fp_split3+0xe>
687a: 46 95 lsr r20
687c: f1 df rcall .-30 ; 0x6860 <__fp_splitA>
687e: 08 c0 rjmp .+16 ; 0x6890 <__fp_splitA+0x30>
6880: 16 16 cp r1, r22
6882: 17 06 cpc r1, r23
6884: 18 06 cpc r1, r24
6886: 99 1f adc r25, r25
6888: f1 cf rjmp .-30 ; 0x686c <__fp_splitA+0xc>
688a: 86 95 lsr r24
688c: 71 05 cpc r23, r1
688e: 61 05 cpc r22, r1
6890: 08 94 sec
6892: 08 95 ret
00006894 <__fp_zero>:
6894: e8 94 clt
00006896 <__fp_szero>:
6896: bb 27 eor r27, r27
6898: 66 27 eor r22, r22
689a: 77 27 eor r23, r23
689c: cb 01 movw r24, r22
689e: 97 f9 bld r25, 7
68a0: 08 95 ret
000068a2 <__gesf2>:
68a2: 54 df rcall .-344 ; 0x674c <__fp_cmp>
68a4: 08 f4 brcc .+2 ; 0x68a8 <__gesf2+0x6>
68a6: 8f ef ldi r24, 0xFF ; 255
68a8: 08 95 ret
000068aa <inverse>:
68aa: 9b 01 movw r18, r22
68ac: ac 01 movw r20, r24
68ae: 60 e0 ldi r22, 0x00 ; 0
68b0: 70 e0 ldi r23, 0x00 ; 0
68b2: 80 e8 ldi r24, 0x80 ; 128
68b4: 9f e3 ldi r25, 0x3F ; 63
68b6: 59 ce rjmp .-846 ; 0x656a <__divsf3>
68b8: 0e f0 brts .+2 ; 0x68bc <inverse+0x12>
68ba: a7 c1 rjmp .+846 ; 0x6c0a <__fp_mpack>
68bc: 71 cf rjmp .-286 ; 0x67a0 <__fp_nan>
68be: 68 94 set
68c0: 69 cf rjmp .-302 ; 0x6794 <__fp_inf>
000068c2 <log>:
68c2: ce df rcall .-100 ; 0x6860 <__fp_splitA>
68c4: c8 f3 brcs .-14 ; 0x68b8 <inverse+0xe>
68c6: 99 23 and r25, r25
68c8: d1 f3 breq .-12 ; 0x68be <inverse+0x14>
68ca: c6 f3 brts .-16 ; 0x68bc <inverse+0x12>
68cc: df 93 push r29
68ce: cf 93 push r28
68d0: 1f 93 push r17
68d2: 0f 93 push r16
68d4: ff 92 push r15
68d6: c9 2f mov r28, r25
68d8: dd 27 eor r29, r29
68da: 88 23 and r24, r24
68dc: 2a f0 brmi .+10 ; 0x68e8 <log+0x26>
68de: 21 97 sbiw r28, 0x01 ; 1
68e0: 66 0f add r22, r22
68e2: 77 1f adc r23, r23
68e4: 88 1f adc r24, r24
68e6: da f7 brpl .-10 ; 0x68de <log+0x1c>
68e8: 20 e0 ldi r18, 0x00 ; 0
68ea: 30 e0 ldi r19, 0x00 ; 0
68ec: 40 e8 ldi r20, 0x80 ; 128
68ee: 5f eb ldi r21, 0xBF ; 191
68f0: 9f e3 ldi r25, 0x3F ; 63
68f2: 88 39 cpi r24, 0x98 ; 152
68f4: 20 f0 brcs .+8 ; 0x68fe <log+0x3c>
68f6: 80 3e cpi r24, 0xE0 ; 224
68f8: 30 f0 brcs .+12 ; 0x6906 <log+0x44>
68fa: 21 96 adiw r28, 0x01 ; 1
68fc: 8f 77 andi r24, 0x7F ; 127
68fe: 54 dd rcall .-1368 ; 0x63a8 <__addsf3>
6900: e5 e7 ldi r30, 0x75 ; 117
6902: f2 e0 ldi r31, 0x02 ; 2
6904: 03 c0 rjmp .+6 ; 0x690c <log+0x4a>
6906: 50 dd rcall .-1376 ; 0x63a8 <__addsf3>
6908: e2 ea ldi r30, 0xA2 ; 162
690a: f2 e0 ldi r31, 0x02 ; 2
690c: 4c df rcall .-360 ; 0x67a6 <__fp_powser>
690e: 8b 01 movw r16, r22
6910: be 01 movw r22, r28
6912: ec 01 movw r28, r24
6914: fb 2e mov r15, r27
6916: 6f 57 subi r22, 0x7F ; 127
6918: 71 09 sbc r23, r1
691a: 75 95 asr r23
691c: 77 1f adc r23, r23
691e: 88 0b sbc r24, r24
6920: 99 0b sbc r25, r25
6922: be de rcall .-644 ; 0x66a0 <__floatsisf>
6924: 28 e1 ldi r18, 0x18 ; 24
6926: 32 e7 ldi r19, 0x72 ; 114
6928: 41 e3 ldi r20, 0x31 ; 49
692a: 5f e3 ldi r21, 0x3F ; 63
692c: 16 d0 rcall .+44 ; 0x695a <__mulsf3x>
692e: af 2d mov r26, r15
6930: 98 01 movw r18, r16
6932: ae 01 movw r20, r28
6934: ff 90 pop r15
6936: 0f 91 pop r16
6938: 1f 91 pop r17
693a: cf 91 pop r28
693c: df 91 pop r29
693e: 45 dd rcall .-1398 ; 0x63ca <__addsf3x>
6940: 76 cf rjmp .-276 ; 0x682e <__fp_round>
00006942 <__mulsf3>:
6942: 0b d0 rcall .+22 ; 0x695a <__mulsf3x>
6944: 74 cf rjmp .-280 ; 0x682e <__fp_round>
6946: 65 df rcall .-310 ; 0x6812 <__fp_pscA>
6948: 28 f0 brcs .+10 ; 0x6954 <__mulsf3+0x12>
694a: 6a df rcall .-300 ; 0x6820 <__fp_pscB>
694c: 18 f0 brcs .+6 ; 0x6954 <__mulsf3+0x12>
694e: 95 23 and r25, r21
6950: 09 f0 breq .+2 ; 0x6954 <__mulsf3+0x12>
6952: 20 cf rjmp .-448 ; 0x6794 <__fp_inf>
6954: 25 cf rjmp .-438 ; 0x67a0 <__fp_nan>
6956: 11 24 eor r1, r1
6958: 9e cf rjmp .-196 ; 0x6896 <__fp_szero>
0000695a <__mulsf3x>:
695a: 7a df rcall .-268 ; 0x6850 <__fp_split3>
695c: a0 f3 brcs .-24 ; 0x6946 <__mulsf3+0x4>
0000695e <__mulsf3_pse>:
695e: 95 9f mul r25, r21
6960: d1 f3 breq .-12 ; 0x6956 <__mulsf3+0x14>
6962: 95 0f add r25, r21
6964: 50 e0 ldi r21, 0x00 ; 0
6966: 55 1f adc r21, r21
6968: 62 9f mul r22, r18
696a: f0 01 movw r30, r0
696c: 72 9f mul r23, r18
696e: bb 27 eor r27, r27
6970: f0 0d add r31, r0
6972: b1 1d adc r27, r1
6974: 63 9f mul r22, r19
6976: aa 27 eor r26, r26
6978: f0 0d add r31, r0
697a: b1 1d adc r27, r1
697c: aa 1f adc r26, r26
697e: 64 9f mul r22, r20
6980: 66 27 eor r22, r22
6982: b0 0d add r27, r0
6984: a1 1d adc r26, r1
6986: 66 1f adc r22, r22
6988: 82 9f mul r24, r18
698a: 22 27 eor r18, r18
698c: b0 0d add r27, r0
698e: a1 1d adc r26, r1
6990: 62 1f adc r22, r18
6992: 73 9f mul r23, r19
6994: b0 0d add r27, r0
6996: a1 1d adc r26, r1
6998: 62 1f adc r22, r18
699a: 83 9f mul r24, r19
699c: a0 0d add r26, r0
699e: 61 1d adc r22, r1
69a0: 22 1f adc r18, r18
69a2: 74 9f mul r23, r20
69a4: 33 27 eor r19, r19
69a6: a0 0d add r26, r0
69a8: 61 1d adc r22, r1
69aa: 23 1f adc r18, r19
69ac: 84 9f mul r24, r20
69ae: 60 0d add r22, r0
69b0: 21 1d adc r18, r1
69b2: 82 2f mov r24, r18
69b4: 76 2f mov r23, r22
69b6: 6a 2f mov r22, r26
69b8: 11 24 eor r1, r1
69ba: 9f 57 subi r25, 0x7F ; 127
69bc: 50 40 sbci r21, 0x00 ; 0
69be: 8a f0 brmi .+34 ; 0x69e2 <__mulsf3_pse+0x84>
69c0: e1 f0 breq .+56 ; 0x69fa <__mulsf3_pse+0x9c>
69c2: 88 23 and r24, r24
69c4: 4a f0 brmi .+18 ; 0x69d8 <__mulsf3_pse+0x7a>
69c6: ee 0f add r30, r30
69c8: ff 1f adc r31, r31
69ca: bb 1f adc r27, r27
69cc: 66 1f adc r22, r22
69ce: 77 1f adc r23, r23
69d0: 88 1f adc r24, r24
69d2: 91 50 subi r25, 0x01 ; 1
69d4: 50 40 sbci r21, 0x00 ; 0
69d6: a9 f7 brne .-22 ; 0x69c2 <__mulsf3_pse+0x64>
69d8: 9e 3f cpi r25, 0xFE ; 254
69da: 51 05 cpc r21, r1
69dc: 70 f0 brcs .+28 ; 0x69fa <__mulsf3_pse+0x9c>
69de: da ce rjmp .-588 ; 0x6794 <__fp_inf>
69e0: 5a cf rjmp .-332 ; 0x6896 <__fp_szero>
69e2: 5f 3f cpi r21, 0xFF ; 255
69e4: ec f3 brlt .-6 ; 0x69e0 <__mulsf3_pse+0x82>
69e6: 98 3e cpi r25, 0xE8 ; 232
69e8: dc f3 brlt .-10 ; 0x69e0 <__mulsf3_pse+0x82>
69ea: 86 95 lsr r24
69ec: 77 95 ror r23
69ee: 67 95 ror r22
69f0: b7 95 ror r27
69f2: f7 95 ror r31
69f4: e7 95 ror r30
69f6: 9f 5f subi r25, 0xFF ; 255
69f8: c1 f7 brne .-16 ; 0x69ea <__mulsf3_pse+0x8c>
69fa: fe 2b or r31, r30
69fc: 88 0f add r24, r24
69fe: 91 1d adc r25, r1
6a00: 96 95 lsr r25
6a02: 87 95 ror r24
6a04: 97 f9 bld r25, 7
6a06: 08 95 ret
00006a08 <pow>:
6a08: fa 01 movw r30, r20
6a0a: ee 0f add r30, r30
6a0c: ff 1f adc r31, r31
6a0e: 30 96 adiw r30, 0x00 ; 0
6a10: 21 05 cpc r18, r1
6a12: 31 05 cpc r19, r1
6a14: 99 f1 breq .+102 ; 0x6a7c <pow+0x74>
6a16: 61 15 cp r22, r1
6a18: 71 05 cpc r23, r1
6a1a: 61 f4 brne .+24 ; 0x6a34 <pow+0x2c>
6a1c: 80 38 cpi r24, 0x80 ; 128
6a1e: bf e3 ldi r27, 0x3F ; 63
6a20: 9b 07 cpc r25, r27
6a22: 49 f1 breq .+82 ; 0x6a76 <pow+0x6e>
6a24: 68 94 set
6a26: 90 38 cpi r25, 0x80 ; 128
6a28: 81 05 cpc r24, r1
6a2a: 61 f0 breq .+24 ; 0x6a44 <pow+0x3c>
6a2c: 80 38 cpi r24, 0x80 ; 128
6a2e: bf ef ldi r27, 0xFF ; 255
6a30: 9b 07 cpc r25, r27
6a32: 41 f0 breq .+16 ; 0x6a44 <pow+0x3c>
6a34: 99 23 and r25, r25
6a36: 42 f5 brpl .+80 ; 0x6a88 <pow+0x80>
6a38: ff 3f cpi r31, 0xFF ; 255
6a3a: e1 05 cpc r30, r1
6a3c: 31 05 cpc r19, r1
6a3e: 21 05 cpc r18, r1
6a40: 11 f1 breq .+68 ; 0x6a86 <pow+0x7e>
6a42: e8 94 clt
6a44: 08 94 sec
6a46: e7 95 ror r30
6a48: d9 01 movw r26, r18
6a4a: aa 23 and r26, r26
6a4c: 29 f4 brne .+10 ; 0x6a58 <pow+0x50>
6a4e: ab 2f mov r26, r27
6a50: be 2f mov r27, r30
6a52: f8 5f subi r31, 0xF8 ; 248
6a54: d0 f3 brcs .-12 ; 0x6a4a <pow+0x42>
6a56: 10 c0 rjmp .+32 ; 0x6a78 <pow+0x70>
6a58: ff 5f subi r31, 0xFF ; 255
6a5a: 70 f4 brcc .+28 ; 0x6a78 <pow+0x70>
6a5c: a6 95 lsr r26
6a5e: e0 f7 brcc .-8 ; 0x6a58 <pow+0x50>
6a60: f7 39 cpi r31, 0x97 ; 151
6a62: 50 f0 brcs .+20 ; 0x6a78 <pow+0x70>
6a64: 19 f0 breq .+6 ; 0x6a6c <pow+0x64>
6a66: ff 3a cpi r31, 0xAF ; 175
6a68: 38 f4 brcc .+14 ; 0x6a78 <pow+0x70>
6a6a: 9f 77 andi r25, 0x7F ; 127
6a6c: 9f 93 push r25
6a6e: 0c d0 rcall .+24 ; 0x6a88 <pow+0x80>
6a70: 0f 90 pop r0
6a72: 07 fc sbrc r0, 7
6a74: 90 58 subi r25, 0x80 ; 128
6a76: 08 95 ret
6a78: 3e f0 brts .+14 ; 0x6a88 <pow+0x80>
6a7a: 92 ce rjmp .-732 ; 0x67a0 <__fp_nan>
6a7c: 60 e0 ldi r22, 0x00 ; 0
6a7e: 70 e0 ldi r23, 0x00 ; 0
6a80: 80 e8 ldi r24, 0x80 ; 128
6a82: 9f e3 ldi r25, 0x3F ; 63
6a84: 08 95 ret
6a86: 4f e7 ldi r20, 0x7F ; 127
6a88: 9f 77 andi r25, 0x7F ; 127
6a8a: 5f 93 push r21
6a8c: 4f 93 push r20
6a8e: 3f 93 push r19
6a90: 2f 93 push r18
6a92: 17 df rcall .-466 ; 0x68c2 <log>
6a94: 2f 91 pop r18
6a96: 3f 91 pop r19
6a98: 4f 91 pop r20
6a9a: 5f 91 pop r21
6a9c: 52 df rcall .-348 ; 0x6942 <__mulsf3>
6a9e: 6e c0 rjmp .+220 ; 0x6b7c <exp>
00006aa0 <round>:
6aa0: df de rcall .-578 ; 0x6860 <__fp_splitA>
6aa2: e0 f0 brcs .+56 ; 0x6adc <round+0x3c>
6aa4: 9e 37 cpi r25, 0x7E ; 126
6aa6: d8 f0 brcs .+54 ; 0x6ade <round+0x3e>
6aa8: 96 39 cpi r25, 0x96 ; 150
6aaa: b8 f4 brcc .+46 ; 0x6ada <round+0x3a>
6aac: 9e 38 cpi r25, 0x8E ; 142
6aae: 48 f4 brcc .+18 ; 0x6ac2 <round+0x22>
6ab0: 67 2f mov r22, r23
6ab2: 78 2f mov r23, r24
6ab4: 88 27 eor r24, r24
6ab6: 98 5f subi r25, 0xF8 ; 248
6ab8: f9 cf rjmp .-14 ; 0x6aac <round+0xc>
6aba: 86 95 lsr r24
6abc: 77 95 ror r23
6abe: 67 95 ror r22
6ac0: 93 95 inc r25
6ac2: 95 39 cpi r25, 0x95 ; 149
6ac4: d0 f3 brcs .-12 ; 0x6aba <round+0x1a>
6ac6: b6 2f mov r27, r22
6ac8: b1 70 andi r27, 0x01 ; 1
6aca: 6b 0f add r22, r27
6acc: 71 1d adc r23, r1
6ace: 81 1d adc r24, r1
6ad0: 20 f4 brcc .+8 ; 0x6ada <round+0x3a>
6ad2: 87 95 ror r24
6ad4: 77 95 ror r23
6ad6: 67 95 ror r22
6ad8: 93 95 inc r25
6ada: 7c c0 rjmp .+248 ; 0x6bd4 <__fp_mintl>
6adc: 96 c0 rjmp .+300 ; 0x6c0a <__fp_mpack>
6ade: db ce rjmp .-586 ; 0x6896 <__fp_szero>
6ae0: 11 f4 brne .+4 ; 0x6ae6 <round+0x46>
6ae2: 0e f4 brtc .+2 ; 0x6ae6 <round+0x46>
6ae4: 5d ce rjmp .-838 ; 0x67a0 <__fp_nan>
6ae6: 91 c0 rjmp .+290 ; 0x6c0a <__fp_mpack>
00006ae8 <sqrt>:
6ae8: bb de rcall .-650 ; 0x6860 <__fp_splitA>
6aea: d0 f3 brcs .-12 ; 0x6ae0 <round+0x40>
6aec: 99 23 and r25, r25
6aee: d9 f3 breq .-10 ; 0x6ae6 <round+0x46>
6af0: ce f3 brts .-14 ; 0x6ae4 <round+0x44>
6af2: 9f 57 subi r25, 0x7F ; 127
6af4: 55 0b sbc r21, r21
6af6: 87 ff sbrs r24, 7
6af8: 96 d0 rcall .+300 ; 0x6c26 <__fp_norm2>
6afa: 00 24 eor r0, r0
6afc: a0 e6 ldi r26, 0x60 ; 96
6afe: 40 ea ldi r20, 0xA0 ; 160
6b00: 90 01 movw r18, r0
6b02: 80 58 subi r24, 0x80 ; 128
6b04: 56 95 lsr r21
6b06: 97 95 ror r25
6b08: 28 f4 brcc .+10 ; 0x6b14 <sqrt+0x2c>
6b0a: 80 5c subi r24, 0xC0 ; 192
6b0c: 66 0f add r22, r22
6b0e: 77 1f adc r23, r23
6b10: 88 1f adc r24, r24
6b12: 20 f0 brcs .+8 ; 0x6b1c <sqrt+0x34>
6b14: 26 17 cp r18, r22
6b16: 37 07 cpc r19, r23
6b18: 48 07 cpc r20, r24
6b1a: 30 f4 brcc .+12 ; 0x6b28 <sqrt+0x40>
6b1c: 62 1b sub r22, r18
6b1e: 73 0b sbc r23, r19
6b20: 84 0b sbc r24, r20
6b22: 20 29 or r18, r0
6b24: 31 29 or r19, r1
6b26: 4a 2b or r20, r26
6b28: a6 95 lsr r26
6b2a: 17 94 ror r1
6b2c: 07 94 ror r0
6b2e: 20 25 eor r18, r0
6b30: 31 25 eor r19, r1
6b32: 4a 27 eor r20, r26
6b34: 58 f7 brcc .-42 ; 0x6b0c <sqrt+0x24>
6b36: 66 0f add r22, r22
6b38: 77 1f adc r23, r23
6b3a: 88 1f adc r24, r24
6b3c: 20 f0 brcs .+8 ; 0x6b46 <sqrt+0x5e>
6b3e: 26 17 cp r18, r22
6b40: 37 07 cpc r19, r23
6b42: 48 07 cpc r20, r24
6b44: 30 f4 brcc .+12 ; 0x6b52 <sqrt+0x6a>
6b46: 62 0b sbc r22, r18
6b48: 73 0b sbc r23, r19
6b4a: 84 0b sbc r24, r20
6b4c: 20 0d add r18, r0
6b4e: 31 1d adc r19, r1
6b50: 41 1d adc r20, r1
6b52: a0 95 com r26
6b54: 81 f7 brne .-32 ; 0x6b36 <sqrt+0x4e>
6b56: b9 01 movw r22, r18
6b58: 84 2f mov r24, r20
6b5a: 91 58 subi r25, 0x81 ; 129
6b5c: 88 0f add r24, r24
6b5e: 96 95 lsr r25
6b60: 87 95 ror r24
6b62: 08 95 ret
00006b64 <square>:
6b64: 9b 01 movw r18, r22
6b66: ac 01 movw r20, r24
6b68: ec ce rjmp .-552 ; 0x6942 <__mulsf3>
00006b6a <__unordsf2>:
6b6a: f0 dd rcall .-1056 ; 0x674c <__fp_cmp>
6b6c: 88 0b sbc r24, r24
6b6e: 99 0b sbc r25, r25
6b70: 08 95 ret
6b72: 19 f4 brne .+6 ; 0x6b7a <__unordsf2+0x10>
6b74: 0e f0 brts .+2 ; 0x6b78 <__unordsf2+0xe>
6b76: 0e ce rjmp .-996 ; 0x6794 <__fp_inf>
6b78: 8d ce rjmp .-742 ; 0x6894 <__fp_zero>
6b7a: 12 ce rjmp .-988 ; 0x67a0 <__fp_nan>
00006b7c <exp>:
6b7c: 71 de rcall .-798 ; 0x6860 <__fp_splitA>
6b7e: c8 f3 brcs .-14 ; 0x6b72 <__unordsf2+0x8>
6b80: 96 38 cpi r25, 0x86 ; 134
6b82: c0 f7 brcc .-16 ; 0x6b74 <__unordsf2+0xa>
6b84: 07 f8 bld r0, 7
6b86: 0f 92 push r0
6b88: e8 94 clt
6b8a: 2b e3 ldi r18, 0x3B ; 59
6b8c: 3a ea ldi r19, 0xAA ; 170
6b8e: 48 eb ldi r20, 0xB8 ; 184
6b90: 5f e7 ldi r21, 0x7F ; 127
6b92: e5 de rcall .-566 ; 0x695e <__mulsf3_pse>
6b94: 0f 92 push r0
6b96: 0f 92 push r0
6b98: 0f 92 push r0
6b9a: 4d b7 in r20, 0x3d ; 61
6b9c: 5e b7 in r21, 0x3e ; 62
6b9e: 0f 92 push r0
6ba0: 7f d0 rcall .+254 ; 0x6ca0 <modf>
6ba2: ef ec ldi r30, 0xCF ; 207
6ba4: f2 e0 ldi r31, 0x02 ; 2
6ba6: ff dd rcall .-1026 ; 0x67a6 <__fp_powser>
6ba8: 4f 91 pop r20
6baa: 5f 91 pop r21
6bac: ef 91 pop r30
6bae: ff 91 pop r31
6bb0: e5 95 asr r30
6bb2: ee 1f adc r30, r30
6bb4: ff 1f adc r31, r31
6bb6: 49 f0 breq .+18 ; 0x6bca <exp+0x4e>
6bb8: fe 57 subi r31, 0x7E ; 126
6bba: e0 68 ori r30, 0x80 ; 128
6bbc: 44 27 eor r20, r20
6bbe: ee 0f add r30, r30
6bc0: 44 1f adc r20, r20
6bc2: fa 95 dec r31
6bc4: e1 f7 brne .-8 ; 0x6bbe <exp+0x42>
6bc6: 41 95 neg r20
6bc8: 55 0b sbc r21, r21
6bca: 36 d0 rcall .+108 ; 0x6c38 <ldexp>
6bcc: 0f 90 pop r0
6bce: 07 fe sbrs r0, 7
6bd0: 6c ce rjmp .-808 ; 0x68aa <inverse>
6bd2: 08 95 ret
00006bd4 <__fp_mintl>:
6bd4: 88 23 and r24, r24
6bd6: 71 f4 brne .+28 ; 0x6bf4 <__fp_mintl+0x20>
6bd8: 77 23 and r23, r23
6bda: 21 f0 breq .+8 ; 0x6be4 <__fp_mintl+0x10>
6bdc: 98 50 subi r25, 0x08 ; 8
6bde: 87 2b or r24, r23
6be0: 76 2f mov r23, r22
6be2: 07 c0 rjmp .+14 ; 0x6bf2 <__fp_mintl+0x1e>
6be4: 66 23 and r22, r22
6be6: 11 f4 brne .+4 ; 0x6bec <__fp_mintl+0x18>
6be8: 99 27 eor r25, r25
6bea: 0d c0 rjmp .+26 ; 0x6c06 <__fp_mintl+0x32>
6bec: 90 51 subi r25, 0x10 ; 16
6bee: 86 2b or r24, r22
6bf0: 70 e0 ldi r23, 0x00 ; 0
6bf2: 60 e0 ldi r22, 0x00 ; 0
6bf4: 2a f0 brmi .+10 ; 0x6c00 <__fp_mintl+0x2c>
6bf6: 9a 95 dec r25
6bf8: 66 0f add r22, r22
6bfa: 77 1f adc r23, r23
6bfc: 88 1f adc r24, r24
6bfe: da f7 brpl .-10 ; 0x6bf6 <__fp_mintl+0x22>
6c00: 88 0f add r24, r24
6c02: 96 95 lsr r25
6c04: 87 95 ror r24
6c06: 97 f9 bld r25, 7
6c08: 08 95 ret
00006c0a <__fp_mpack>:
6c0a: 9f 3f cpi r25, 0xFF ; 255
6c0c: 31 f0 breq .+12 ; 0x6c1a <__fp_mpack_finite+0xc>
00006c0e <__fp_mpack_finite>:
6c0e: 91 50 subi r25, 0x01 ; 1
6c10: 20 f4 brcc .+8 ; 0x6c1a <__fp_mpack_finite+0xc>
6c12: 87 95 ror r24
6c14: 77 95 ror r23
6c16: 67 95 ror r22
6c18: b7 95 ror r27
6c1a: 88 0f add r24, r24
6c1c: 91 1d adc r25, r1
6c1e: 96 95 lsr r25
6c20: 87 95 ror r24
6c22: 97 f9 bld r25, 7
6c24: 08 95 ret
00006c26 <__fp_norm2>:
6c26: 91 50 subi r25, 0x01 ; 1
6c28: 50 40 sbci r21, 0x00 ; 0
6c2a: 66 0f add r22, r22
6c2c: 77 1f adc r23, r23
6c2e: 88 1f adc r24, r24
6c30: d2 f7 brpl .-12 ; 0x6c26 <__fp_norm2>
6c32: 08 95 ret
6c34: af cd rjmp .-1186 ; 0x6794 <__fp_inf>
6c36: e9 cf rjmp .-46 ; 0x6c0a <__fp_mpack>
00006c38 <ldexp>:
6c38: 13 de rcall .-986 ; 0x6860 <__fp_splitA>
6c3a: e8 f3 brcs .-6 ; 0x6c36 <__fp_norm2+0x10>
6c3c: 99 23 and r25, r25
6c3e: d9 f3 breq .-10 ; 0x6c36 <__fp_norm2+0x10>
6c40: 94 0f add r25, r20
6c42: 51 1d adc r21, r1
6c44: bb f3 brvs .-18 ; 0x6c34 <__fp_norm2+0xe>
6c46: 91 50 subi r25, 0x01 ; 1
6c48: 50 40 sbci r21, 0x00 ; 0
6c4a: 94 f0 brlt .+36 ; 0x6c70 <ldexp+0x38>
6c4c: 59 f0 breq .+22 ; 0x6c64 <ldexp+0x2c>
6c4e: 88 23 and r24, r24
6c50: 32 f0 brmi .+12 ; 0x6c5e <ldexp+0x26>
6c52: 66 0f add r22, r22
6c54: 77 1f adc r23, r23
6c56: 88 1f adc r24, r24
6c58: 91 50 subi r25, 0x01 ; 1
6c5a: 50 40 sbci r21, 0x00 ; 0
6c5c: c1 f7 brne .-16 ; 0x6c4e <ldexp+0x16>
6c5e: 9e 3f cpi r25, 0xFE ; 254
6c60: 51 05 cpc r21, r1
6c62: 44 f7 brge .-48 ; 0x6c34 <__fp_norm2+0xe>
6c64: 88 0f add r24, r24
6c66: 91 1d adc r25, r1
6c68: 96 95 lsr r25
6c6a: 87 95 ror r24
6c6c: 97 f9 bld r25, 7
6c6e: 08 95 ret
6c70: 5f 3f cpi r21, 0xFF ; 255
6c72: ac f0 brlt .+42 ; 0x6c9e <ldexp+0x66>
6c74: 98 3e cpi r25, 0xE8 ; 232
6c76: 9c f0 brlt .+38 ; 0x6c9e <ldexp+0x66>
6c78: bb 27 eor r27, r27
6c7a: 86 95 lsr r24
6c7c: 77 95 ror r23
6c7e: 67 95 ror r22
6c80: b7 95 ror r27
6c82: 08 f4 brcc .+2 ; 0x6c86 <ldexp+0x4e>
6c84: b1 60 ori r27, 0x01 ; 1
6c86: 93 95 inc r25
6c88: c1 f7 brne .-16 ; 0x6c7a <ldexp+0x42>
6c8a: bb 0f add r27, r27
6c8c: 58 f7 brcc .-42 ; 0x6c64 <ldexp+0x2c>
6c8e: 11 f4 brne .+4 ; 0x6c94 <ldexp+0x5c>
6c90: 60 ff sbrs r22, 0
6c92: e8 cf rjmp .-48 ; 0x6c64 <ldexp+0x2c>
6c94: 6f 5f subi r22, 0xFF ; 255
6c96: 7f 4f sbci r23, 0xFF ; 255
6c98: 8f 4f sbci r24, 0xFF ; 255
6c9a: 9f 4f sbci r25, 0xFF ; 255
6c9c: e3 cf rjmp .-58 ; 0x6c64 <ldexp+0x2c>
6c9e: fb cd rjmp .-1034 ; 0x6896 <__fp_szero>
00006ca0 <modf>:
6ca0: fa 01 movw r30, r20
6ca2: dc 01 movw r26, r24
6ca4: aa 0f add r26, r26
6ca6: bb 1f adc r27, r27
6ca8: 9b 01 movw r18, r22
6caa: ac 01 movw r20, r24
6cac: bf 57 subi r27, 0x7F ; 127
6cae: 28 f4 brcc .+10 ; 0x6cba <modf+0x1a>
6cb0: 22 27 eor r18, r18
6cb2: 33 27 eor r19, r19
6cb4: 44 27 eor r20, r20
6cb6: 50 78 andi r21, 0x80 ; 128
6cb8: 1f c0 rjmp .+62 ; 0x6cf8 <modf+0x58>
6cba: b7 51 subi r27, 0x17 ; 23
6cbc: 88 f4 brcc .+34 ; 0x6ce0 <modf+0x40>
6cbe: ab 2f mov r26, r27
6cc0: 00 24 eor r0, r0
6cc2: 46 95 lsr r20
6cc4: 37 95 ror r19
6cc6: 27 95 ror r18
6cc8: 01 1c adc r0, r1
6cca: a3 95 inc r26
6ccc: d2 f3 brmi .-12 ; 0x6cc2 <modf+0x22>
6cce: 00 20 and r0, r0
6cd0: 69 f0 breq .+26 ; 0x6cec <modf+0x4c>
6cd2: 22 0f add r18, r18
6cd4: 33 1f adc r19, r19
6cd6: 44 1f adc r20, r20
6cd8: b3 95 inc r27
6cda: da f3 brmi .-10 ; 0x6cd2 <modf+0x32>
6cdc: 0d d0 rcall .+26 ; 0x6cf8 <modf+0x58>
6cde: 63 cb rjmp .-2362 ; 0x63a6 <__subsf3>
6ce0: 61 30 cpi r22, 0x01 ; 1
6ce2: 71 05 cpc r23, r1
6ce4: a0 e8 ldi r26, 0x80 ; 128
6ce6: 8a 07 cpc r24, r26
6ce8: b9 46 sbci r27, 0x69 ; 105
6cea: 30 f4 brcc .+12 ; 0x6cf8 <modf+0x58>
6cec: 9b 01 movw r18, r22
6cee: ac 01 movw r20, r24
6cf0: 66 27 eor r22, r22
6cf2: 77 27 eor r23, r23
6cf4: 88 27 eor r24, r24
6cf6: 90 78 andi r25, 0x80 ; 128
6cf8: 30 96 adiw r30, 0x00 ; 0
6cfa: 21 f0 breq .+8 ; 0x6d04 <modf+0x64>
6cfc: 20 83 st Z, r18
6cfe: 31 83 std Z+1, r19 ; 0x01
6d00: 42 83 std Z+2, r20 ; 0x02
6d02: 53 83 std Z+3, r21 ; 0x03
6d04: 08 95 ret
00006d06 <vfprintf>:
6d06: 2f 92 push r2
6d08: 3f 92 push r3
6d0a: 4f 92 push r4
6d0c: 5f 92 push r5
6d0e: 6f 92 push r6
6d10: 7f 92 push r7
6d12: 8f 92 push r8
6d14: 9f 92 push r9
6d16: af 92 push r10
6d18: bf 92 push r11
6d1a: cf 92 push r12
6d1c: df 92 push r13
6d1e: ef 92 push r14
6d20: ff 92 push r15
6d22: 0f 93 push r16
6d24: 1f 93 push r17
6d26: cf 93 push r28
6d28: df 93 push r29
6d2a: cd b7 in r28, 0x3d ; 61
6d2c: de b7 in r29, 0x3e ; 62
6d2e: 60 97 sbiw r28, 0x10 ; 16
6d30: cd bf out 0x3d, r28 ; 61
6d32: de bf out 0x3e, r29 ; 62
6d34: 7c 01 movw r14, r24
6d36: 1b 01 movw r2, r22
6d38: 6a 01 movw r12, r20
6d3a: fc 01 movw r30, r24
6d3c: 16 82 std Z+6, r1 ; 0x06
6d3e: 17 82 std Z+7, r1 ; 0x07
6d40: 83 81 ldd r24, Z+3 ; 0x03
6d42: 81 ff sbrs r24, 1
6d44: 2a c3 rjmp .+1620 ; 0x739a <vfprintf+0x694>
6d46: 9e 01 movw r18, r28
6d48: 2f 5f subi r18, 0xFF ; 255
6d4a: 3f 4f sbci r19, 0xFF ; 255
6d4c: 39 01 movw r6, r18
6d4e: f7 01 movw r30, r14
6d50: 93 81 ldd r25, Z+3 ; 0x03
6d52: f1 01 movw r30, r2
6d54: 93 fd sbrc r25, 3
6d56: 85 91 lpm r24, Z+
6d58: 93 ff sbrs r25, 3
6d5a: 81 91 ld r24, Z+
6d5c: 1f 01 movw r2, r30
6d5e: 88 23 and r24, r24
6d60: 09 f4 brne .+2 ; 0x6d64 <vfprintf+0x5e>
6d62: 17 c3 rjmp .+1582 ; 0x7392 <vfprintf+0x68c>
6d64: 85 32 cpi r24, 0x25 ; 37
6d66: 39 f4 brne .+14 ; 0x6d76 <vfprintf+0x70>
6d68: 93 fd sbrc r25, 3
6d6a: 85 91 lpm r24, Z+
6d6c: 93 ff sbrs r25, 3
6d6e: 81 91 ld r24, Z+
6d70: 1f 01 movw r2, r30
6d72: 85 32 cpi r24, 0x25 ; 37
6d74: 31 f4 brne .+12 ; 0x6d82 <vfprintf+0x7c>
6d76: b7 01 movw r22, r14
6d78: 90 e0 ldi r25, 0x00 ; 0
6d7a: a3 d4 rcall .+2374 ; 0x76c2 <fputc>
6d7c: 56 01 movw r10, r12
6d7e: 65 01 movw r12, r10
6d80: e6 cf rjmp .-52 ; 0x6d4e <vfprintf+0x48>
6d82: 10 e0 ldi r17, 0x00 ; 0
6d84: 51 2c mov r5, r1
6d86: 91 2c mov r9, r1
6d88: ff e1 ldi r31, 0x1F ; 31
6d8a: f9 15 cp r31, r9
6d8c: d8 f0 brcs .+54 ; 0x6dc4 <vfprintf+0xbe>
6d8e: 8b 32 cpi r24, 0x2B ; 43
6d90: 79 f0 breq .+30 ; 0x6db0 <vfprintf+0xaa>
6d92: 38 f4 brcc .+14 ; 0x6da2 <vfprintf+0x9c>
6d94: 80 32 cpi r24, 0x20 ; 32
6d96: 79 f0 breq .+30 ; 0x6db6 <vfprintf+0xb0>
6d98: 83 32 cpi r24, 0x23 ; 35
6d9a: a1 f4 brne .+40 ; 0x6dc4 <vfprintf+0xbe>
6d9c: f9 2d mov r31, r9
6d9e: f0 61 ori r31, 0x10 ; 16
6da0: 2e c0 rjmp .+92 ; 0x6dfe <vfprintf+0xf8>
6da2: 8d 32 cpi r24, 0x2D ; 45
6da4: 61 f0 breq .+24 ; 0x6dbe <vfprintf+0xb8>
6da6: 80 33 cpi r24, 0x30 ; 48
6da8: 69 f4 brne .+26 ; 0x6dc4 <vfprintf+0xbe>
6daa: 29 2d mov r18, r9
6dac: 21 60 ori r18, 0x01 ; 1
6dae: 2d c0 rjmp .+90 ; 0x6e0a <vfprintf+0x104>
6db0: 39 2d mov r19, r9
6db2: 32 60 ori r19, 0x02 ; 2
6db4: 93 2e mov r9, r19
6db6: 89 2d mov r24, r9
6db8: 84 60 ori r24, 0x04 ; 4
6dba: 98 2e mov r9, r24
6dbc: 2a c0 rjmp .+84 ; 0x6e12 <vfprintf+0x10c>
6dbe: e9 2d mov r30, r9
6dc0: e8 60 ori r30, 0x08 ; 8
6dc2: 15 c0 rjmp .+42 ; 0x6dee <vfprintf+0xe8>
6dc4: 97 fc sbrc r9, 7
6dc6: 2d c0 rjmp .+90 ; 0x6e22 <vfprintf+0x11c>
6dc8: 20 ed ldi r18, 0xD0 ; 208
6dca: 28 0f add r18, r24
6dcc: 2a 30 cpi r18, 0x0A ; 10
6dce: 88 f4 brcc .+34 ; 0x6df2 <vfprintf+0xec>
6dd0: 96 fe sbrs r9, 6
6dd2: 06 c0 rjmp .+12 ; 0x6de0 <vfprintf+0xda>
6dd4: 3a e0 ldi r19, 0x0A ; 10
6dd6: 13 9f mul r17, r19
6dd8: 20 0d add r18, r0
6dda: 11 24 eor r1, r1
6ddc: 12 2f mov r17, r18
6dde: 19 c0 rjmp .+50 ; 0x6e12 <vfprintf+0x10c>
6de0: 8a e0 ldi r24, 0x0A ; 10
6de2: 58 9e mul r5, r24
6de4: 20 0d add r18, r0
6de6: 11 24 eor r1, r1
6de8: 52 2e mov r5, r18
6dea: e9 2d mov r30, r9
6dec: e0 62 ori r30, 0x20 ; 32
6dee: 9e 2e mov r9, r30
6df0: 10 c0 rjmp .+32 ; 0x6e12 <vfprintf+0x10c>
6df2: 8e 32 cpi r24, 0x2E ; 46
6df4: 31 f4 brne .+12 ; 0x6e02 <vfprintf+0xfc>
6df6: 96 fc sbrc r9, 6
6df8: cc c2 rjmp .+1432 ; 0x7392 <vfprintf+0x68c>
6dfa: f9 2d mov r31, r9
6dfc: f0 64 ori r31, 0x40 ; 64
6dfe: 9f 2e mov r9, r31
6e00: 08 c0 rjmp .+16 ; 0x6e12 <vfprintf+0x10c>
6e02: 8c 36 cpi r24, 0x6C ; 108
6e04: 21 f4 brne .+8 ; 0x6e0e <vfprintf+0x108>
6e06: 29 2d mov r18, r9
6e08: 20 68 ori r18, 0x80 ; 128
6e0a: 92 2e mov r9, r18
6e0c: 02 c0 rjmp .+4 ; 0x6e12 <vfprintf+0x10c>
6e0e: 88 36 cpi r24, 0x68 ; 104
6e10: 41 f4 brne .+16 ; 0x6e22 <vfprintf+0x11c>
6e12: f1 01 movw r30, r2
6e14: 93 fd sbrc r25, 3
6e16: 85 91 lpm r24, Z+
6e18: 93 ff sbrs r25, 3
6e1a: 81 91 ld r24, Z+
6e1c: 1f 01 movw r2, r30
6e1e: 81 11 cpse r24, r1
6e20: b3 cf rjmp .-154 ; 0x6d88 <vfprintf+0x82>
6e22: 9b eb ldi r25, 0xBB ; 187
6e24: 98 0f add r25, r24
6e26: 93 30 cpi r25, 0x03 ; 3
6e28: 20 f4 brcc .+8 ; 0x6e32 <vfprintf+0x12c>
6e2a: 99 2d mov r25, r9
6e2c: 90 61 ori r25, 0x10 ; 16
6e2e: 80 5e subi r24, 0xE0 ; 224
6e30: 07 c0 rjmp .+14 ; 0x6e40 <vfprintf+0x13a>
6e32: 9b e9 ldi r25, 0x9B ; 155
6e34: 98 0f add r25, r24
6e36: 93 30 cpi r25, 0x03 ; 3
6e38: 08 f0 brcs .+2 ; 0x6e3c <vfprintf+0x136>
6e3a: 59 c1 rjmp .+690 ; 0x70ee <vfprintf+0x3e8>
6e3c: 99 2d mov r25, r9
6e3e: 9f 7e andi r25, 0xEF ; 239
6e40: 96 ff sbrs r25, 6
6e42: 16 e0 ldi r17, 0x06 ; 6
6e44: 9f 73 andi r25, 0x3F ; 63
6e46: 99 2e mov r9, r25
6e48: 85 36 cpi r24, 0x65 ; 101
6e4a: 19 f4 brne .+6 ; 0x6e52 <vfprintf+0x14c>
6e4c: 90 64 ori r25, 0x40 ; 64
6e4e: 99 2e mov r9, r25
6e50: 08 c0 rjmp .+16 ; 0x6e62 <vfprintf+0x15c>
6e52: 86 36 cpi r24, 0x66 ; 102
6e54: 21 f4 brne .+8 ; 0x6e5e <vfprintf+0x158>
6e56: 39 2f mov r19, r25
6e58: 30 68 ori r19, 0x80 ; 128
6e5a: 93 2e mov r9, r19
6e5c: 02 c0 rjmp .+4 ; 0x6e62 <vfprintf+0x15c>
6e5e: 11 11 cpse r17, r1
6e60: 11 50 subi r17, 0x01 ; 1
6e62: 97 fe sbrs r9, 7
6e64: 07 c0 rjmp .+14 ; 0x6e74 <vfprintf+0x16e>
6e66: 1c 33 cpi r17, 0x3C ; 60
6e68: 50 f4 brcc .+20 ; 0x6e7e <vfprintf+0x178>
6e6a: 44 24 eor r4, r4
6e6c: 43 94 inc r4
6e6e: 41 0e add r4, r17
6e70: 27 e0 ldi r18, 0x07 ; 7
6e72: 0b c0 rjmp .+22 ; 0x6e8a <vfprintf+0x184>
6e74: 18 30 cpi r17, 0x08 ; 8
6e76: 38 f0 brcs .+14 ; 0x6e86 <vfprintf+0x180>
6e78: 27 e0 ldi r18, 0x07 ; 7
6e7a: 17 e0 ldi r17, 0x07 ; 7
6e7c: 05 c0 rjmp .+10 ; 0x6e88 <vfprintf+0x182>
6e7e: 27 e0 ldi r18, 0x07 ; 7
6e80: 9c e3 ldi r25, 0x3C ; 60
6e82: 49 2e mov r4, r25
6e84: 02 c0 rjmp .+4 ; 0x6e8a <vfprintf+0x184>
6e86: 21 2f mov r18, r17
6e88: 41 2c mov r4, r1
6e8a: 56 01 movw r10, r12
6e8c: 84 e0 ldi r24, 0x04 ; 4
6e8e: a8 0e add r10, r24
6e90: b1 1c adc r11, r1
6e92: f6 01 movw r30, r12
6e94: 60 81 ld r22, Z
6e96: 71 81 ldd r23, Z+1 ; 0x01
6e98: 82 81 ldd r24, Z+2 ; 0x02
6e9a: 93 81 ldd r25, Z+3 ; 0x03
6e9c: 04 2d mov r16, r4
6e9e: a3 01 movw r20, r6
6ea0: 22 d3 rcall .+1604 ; 0x74e6 <__ftoa_engine>
6ea2: 6c 01 movw r12, r24
6ea4: f9 81 ldd r31, Y+1 ; 0x01
6ea6: fc 87 std Y+12, r31 ; 0x0c
6ea8: f0 ff sbrs r31, 0
6eaa: 02 c0 rjmp .+4 ; 0x6eb0 <vfprintf+0x1aa>
6eac: f3 ff sbrs r31, 3
6eae: 06 c0 rjmp .+12 ; 0x6ebc <vfprintf+0x1b6>
6eb0: 91 fc sbrc r9, 1
6eb2: 06 c0 rjmp .+12 ; 0x6ec0 <vfprintf+0x1ba>
6eb4: 92 fe sbrs r9, 2
6eb6: 06 c0 rjmp .+12 ; 0x6ec4 <vfprintf+0x1be>
6eb8: 00 e2 ldi r16, 0x20 ; 32
6eba: 05 c0 rjmp .+10 ; 0x6ec6 <vfprintf+0x1c0>
6ebc: 0d e2 ldi r16, 0x2D ; 45
6ebe: 03 c0 rjmp .+6 ; 0x6ec6 <vfprintf+0x1c0>
6ec0: 0b e2 ldi r16, 0x2B ; 43
6ec2: 01 c0 rjmp .+2 ; 0x6ec6 <vfprintf+0x1c0>
6ec4: 00 e0 ldi r16, 0x00 ; 0
6ec6: 8c 85 ldd r24, Y+12 ; 0x0c
6ec8: 8c 70 andi r24, 0x0C ; 12
6eca: 19 f0 breq .+6 ; 0x6ed2 <vfprintf+0x1cc>
6ecc: 01 11 cpse r16, r1
6ece: 43 c2 rjmp .+1158 ; 0x7356 <vfprintf+0x650>
6ed0: 80 c2 rjmp .+1280 ; 0x73d2 <vfprintf+0x6cc>
6ed2: 97 fe sbrs r9, 7
6ed4: 10 c0 rjmp .+32 ; 0x6ef6 <vfprintf+0x1f0>
6ed6: 4c 0c add r4, r12
6ed8: fc 85 ldd r31, Y+12 ; 0x0c
6eda: f4 ff sbrs r31, 4
6edc: 04 c0 rjmp .+8 ; 0x6ee6 <vfprintf+0x1e0>
6ede: 8a 81 ldd r24, Y+2 ; 0x02
6ee0: 81 33 cpi r24, 0x31 ; 49
6ee2: 09 f4 brne .+2 ; 0x6ee6 <vfprintf+0x1e0>
6ee4: 4a 94 dec r4
6ee6: 14 14 cp r1, r4
6ee8: 74 f5 brge .+92 ; 0x6f46 <vfprintf+0x240>
6eea: 28 e0 ldi r18, 0x08 ; 8
6eec: 24 15 cp r18, r4
6eee: 78 f5 brcc .+94 ; 0x6f4e <vfprintf+0x248>
6ef0: 88 e0 ldi r24, 0x08 ; 8
6ef2: 48 2e mov r4, r24
6ef4: 2c c0 rjmp .+88 ; 0x6f4e <vfprintf+0x248>
6ef6: 96 fc sbrc r9, 6
6ef8: 2a c0 rjmp .+84 ; 0x6f4e <vfprintf+0x248>
6efa: 81 2f mov r24, r17
6efc: 90 e0 ldi r25, 0x00 ; 0
6efe: 8c 15 cp r24, r12
6f00: 9d 05 cpc r25, r13
6f02: 9c f0 brlt .+38 ; 0x6f2a <vfprintf+0x224>
6f04: 3c ef ldi r19, 0xFC ; 252
6f06: c3 16 cp r12, r19
6f08: 3f ef ldi r19, 0xFF ; 255
6f0a: d3 06 cpc r13, r19
6f0c: 74 f0 brlt .+28 ; 0x6f2a <vfprintf+0x224>
6f0e: 89 2d mov r24, r9
6f10: 80 68 ori r24, 0x80 ; 128
6f12: 98 2e mov r9, r24
6f14: 0a c0 rjmp .+20 ; 0x6f2a <vfprintf+0x224>
6f16: e2 e0 ldi r30, 0x02 ; 2
6f18: f0 e0 ldi r31, 0x00 ; 0
6f1a: ec 0f add r30, r28
6f1c: fd 1f adc r31, r29
6f1e: e1 0f add r30, r17
6f20: f1 1d adc r31, r1
6f22: 80 81 ld r24, Z
6f24: 80 33 cpi r24, 0x30 ; 48
6f26: 19 f4 brne .+6 ; 0x6f2e <vfprintf+0x228>
6f28: 11 50 subi r17, 0x01 ; 1
6f2a: 11 11 cpse r17, r1
6f2c: f4 cf rjmp .-24 ; 0x6f16 <vfprintf+0x210>
6f2e: 97 fe sbrs r9, 7
6f30: 0e c0 rjmp .+28 ; 0x6f4e <vfprintf+0x248>
6f32: 44 24 eor r4, r4
6f34: 43 94 inc r4
6f36: 41 0e add r4, r17
6f38: 81 2f mov r24, r17
6f3a: 90 e0 ldi r25, 0x00 ; 0
6f3c: c8 16 cp r12, r24
6f3e: d9 06 cpc r13, r25
6f40: 2c f4 brge .+10 ; 0x6f4c <vfprintf+0x246>
6f42: 1c 19 sub r17, r12
6f44: 04 c0 rjmp .+8 ; 0x6f4e <vfprintf+0x248>
6f46: 44 24 eor r4, r4
6f48: 43 94 inc r4
6f4a: 01 c0 rjmp .+2 ; 0x6f4e <vfprintf+0x248>
6f4c: 10 e0 ldi r17, 0x00 ; 0
6f4e: 97 fe sbrs r9, 7
6f50: 06 c0 rjmp .+12 ; 0x6f5e <vfprintf+0x258>
6f52: 1c 14 cp r1, r12
6f54: 1d 04 cpc r1, r13
6f56: 34 f4 brge .+12 ; 0x6f64 <vfprintf+0x25e>
6f58: c6 01 movw r24, r12
6f5a: 01 96 adiw r24, 0x01 ; 1
6f5c: 05 c0 rjmp .+10 ; 0x6f68 <vfprintf+0x262>
6f5e: 85 e0 ldi r24, 0x05 ; 5
6f60: 90 e0 ldi r25, 0x00 ; 0
6f62: 02 c0 rjmp .+4 ; 0x6f68 <vfprintf+0x262>
6f64: 81 e0 ldi r24, 0x01 ; 1
6f66: 90 e0 ldi r25, 0x00 ; 0
6f68: 01 11 cpse r16, r1
6f6a: 01 96 adiw r24, 0x01 ; 1
6f6c: 11 23 and r17, r17
6f6e: 31 f0 breq .+12 ; 0x6f7c <vfprintf+0x276>
6f70: 21 2f mov r18, r17
6f72: 30 e0 ldi r19, 0x00 ; 0
6f74: 2f 5f subi r18, 0xFF ; 255
6f76: 3f 4f sbci r19, 0xFF ; 255
6f78: 82 0f add r24, r18
6f7a: 93 1f adc r25, r19
6f7c: 25 2d mov r18, r5
6f7e: 30 e0 ldi r19, 0x00 ; 0
6f80: 82 17 cp r24, r18
6f82: 93 07 cpc r25, r19
6f84: 14 f4 brge .+4 ; 0x6f8a <vfprintf+0x284>
6f86: 58 1a sub r5, r24
6f88: 01 c0 rjmp .+2 ; 0x6f8c <vfprintf+0x286>
6f8a: 51 2c mov r5, r1
6f8c: 89 2d mov r24, r9
6f8e: 89 70 andi r24, 0x09 ; 9
6f90: 41 f4 brne .+16 ; 0x6fa2 <vfprintf+0x29c>
6f92: 55 20 and r5, r5
6f94: 31 f0 breq .+12 ; 0x6fa2 <vfprintf+0x29c>
6f96: b7 01 movw r22, r14
6f98: 80 e2 ldi r24, 0x20 ; 32
6f9a: 90 e0 ldi r25, 0x00 ; 0
6f9c: 92 d3 rcall .+1828 ; 0x76c2 <fputc>
6f9e: 5a 94 dec r5
6fa0: f8 cf rjmp .-16 ; 0x6f92 <vfprintf+0x28c>
6fa2: 00 23 and r16, r16
6fa4: 21 f0 breq .+8 ; 0x6fae <vfprintf+0x2a8>
6fa6: b7 01 movw r22, r14
6fa8: 80 2f mov r24, r16
6faa: 90 e0 ldi r25, 0x00 ; 0
6fac: 8a d3 rcall .+1812 ; 0x76c2 <fputc>
6fae: 93 fc sbrc r9, 3
6fb0: 08 c0 rjmp .+16 ; 0x6fc2 <vfprintf+0x2bc>
6fb2: 55 20 and r5, r5
6fb4: 31 f0 breq .+12 ; 0x6fc2 <vfprintf+0x2bc>
6fb6: b7 01 movw r22, r14
6fb8: 80 e3 ldi r24, 0x30 ; 48
6fba: 90 e0 ldi r25, 0x00 ; 0
6fbc: 82 d3 rcall .+1796 ; 0x76c2 <fputc>
6fbe: 5a 94 dec r5
6fc0: f8 cf rjmp .-16 ; 0x6fb2 <vfprintf+0x2ac>
6fc2: 97 fe sbrs r9, 7
6fc4: 4a c0 rjmp .+148 ; 0x705a <vfprintf+0x354>
6fc6: 46 01 movw r8, r12
6fc8: d7 fe sbrs r13, 7
6fca: 02 c0 rjmp .+4 ; 0x6fd0 <vfprintf+0x2ca>
6fcc: 81 2c mov r8, r1
6fce: 91 2c mov r9, r1
6fd0: c6 01 movw r24, r12
6fd2: 88 19 sub r24, r8
6fd4: 99 09 sbc r25, r9
6fd6: f3 01 movw r30, r6
6fd8: e8 0f add r30, r24
6fda: f9 1f adc r31, r25
6fdc: ed 87 std Y+13, r30 ; 0x0d
6fde: fe 87 std Y+14, r31 ; 0x0e
6fe0: 96 01 movw r18, r12
6fe2: 24 19 sub r18, r4
6fe4: 31 09 sbc r19, r1
6fe6: 2f 87 std Y+15, r18 ; 0x0f
6fe8: 38 8b std Y+16, r19 ; 0x10
6fea: 01 2f mov r16, r17
6fec: 10 e0 ldi r17, 0x00 ; 0
6fee: 11 95 neg r17
6ff0: 01 95 neg r16
6ff2: 11 09 sbc r17, r1
6ff4: 3f ef ldi r19, 0xFF ; 255
6ff6: 83 16 cp r8, r19
6ff8: 93 06 cpc r9, r19
6ffa: 21 f4 brne .+8 ; 0x7004 <vfprintf+0x2fe>
6ffc: b7 01 movw r22, r14
6ffe: 8e e2 ldi r24, 0x2E ; 46
7000: 90 e0 ldi r25, 0x00 ; 0
7002: 5f d3 rcall .+1726 ; 0x76c2 <fputc>
7004: c8 14 cp r12, r8
7006: d9 04 cpc r13, r9
7008: 4c f0 brlt .+18 ; 0x701c <vfprintf+0x316>
700a: 8f 85 ldd r24, Y+15 ; 0x0f
700c: 98 89 ldd r25, Y+16 ; 0x10
700e: 88 15 cp r24, r8
7010: 99 05 cpc r25, r9
7012: 24 f4 brge .+8 ; 0x701c <vfprintf+0x316>
7014: ed 85 ldd r30, Y+13 ; 0x0d
7016: fe 85 ldd r31, Y+14 ; 0x0e
7018: 81 81 ldd r24, Z+1 ; 0x01
701a: 01 c0 rjmp .+2 ; 0x701e <vfprintf+0x318>
701c: 80 e3 ldi r24, 0x30 ; 48
701e: f1 e0 ldi r31, 0x01 ; 1
7020: 8f 1a sub r8, r31
7022: 91 08 sbc r9, r1
7024: 2d 85 ldd r18, Y+13 ; 0x0d
7026: 3e 85 ldd r19, Y+14 ; 0x0e
7028: 2f 5f subi r18, 0xFF ; 255
702a: 3f 4f sbci r19, 0xFF ; 255
702c: 2d 87 std Y+13, r18 ; 0x0d
702e: 3e 87 std Y+14, r19 ; 0x0e
7030: 80 16 cp r8, r16
7032: 91 06 cpc r9, r17
7034: 24 f0 brlt .+8 ; 0x703e <vfprintf+0x338>
7036: b7 01 movw r22, r14
7038: 90 e0 ldi r25, 0x00 ; 0
703a: 43 d3 rcall .+1670 ; 0x76c2 <fputc>
703c: db cf rjmp .-74 ; 0x6ff4 <vfprintf+0x2ee>
703e: c8 14 cp r12, r8
7040: d9 04 cpc r13, r9
7042: 41 f4 brne .+16 ; 0x7054 <vfprintf+0x34e>
7044: 9a 81 ldd r25, Y+2 ; 0x02
7046: 96 33 cpi r25, 0x36 ; 54
7048: 20 f4 brcc .+8 ; 0x7052 <vfprintf+0x34c>
704a: 95 33 cpi r25, 0x35 ; 53
704c: 19 f4 brne .+6 ; 0x7054 <vfprintf+0x34e>
704e: 3c 85 ldd r19, Y+12 ; 0x0c
7050: 34 ff sbrs r19, 4
7052: 81 e3 ldi r24, 0x31 ; 49
7054: b7 01 movw r22, r14
7056: 90 e0 ldi r25, 0x00 ; 0
7058: 48 c0 rjmp .+144 ; 0x70ea <vfprintf+0x3e4>
705a: 8a 81 ldd r24, Y+2 ; 0x02
705c: 81 33 cpi r24, 0x31 ; 49
705e: 19 f0 breq .+6 ; 0x7066 <vfprintf+0x360>
7060: 9c 85 ldd r25, Y+12 ; 0x0c
7062: 9f 7e andi r25, 0xEF ; 239
7064: 9c 87 std Y+12, r25 ; 0x0c
7066: b7 01 movw r22, r14
7068: 90 e0 ldi r25, 0x00 ; 0
706a: 2b d3 rcall .+1622 ; 0x76c2 <fputc>
706c: 11 11 cpse r17, r1
706e: 05 c0 rjmp .+10 ; 0x707a <vfprintf+0x374>
7070: 94 fc sbrc r9, 4
7072: 16 c0 rjmp .+44 ; 0x70a0 <vfprintf+0x39a>
7074: 85 e6 ldi r24, 0x65 ; 101
7076: 90 e0 ldi r25, 0x00 ; 0
7078: 15 c0 rjmp .+42 ; 0x70a4 <vfprintf+0x39e>
707a: b7 01 movw r22, r14
707c: 8e e2 ldi r24, 0x2E ; 46
707e: 90 e0 ldi r25, 0x00 ; 0
7080: 20 d3 rcall .+1600 ; 0x76c2 <fputc>
7082: 1e 5f subi r17, 0xFE ; 254
7084: 82 e0 ldi r24, 0x02 ; 2
7086: 01 e0 ldi r16, 0x01 ; 1
7088: 08 0f add r16, r24
708a: f3 01 movw r30, r6
708c: e8 0f add r30, r24
708e: f1 1d adc r31, r1
7090: 80 81 ld r24, Z
7092: b7 01 movw r22, r14
7094: 90 e0 ldi r25, 0x00 ; 0
7096: 15 d3 rcall .+1578 ; 0x76c2 <fputc>
7098: 80 2f mov r24, r16
709a: 01 13 cpse r16, r17
709c: f4 cf rjmp .-24 ; 0x7086 <vfprintf+0x380>
709e: e8 cf rjmp .-48 ; 0x7070 <vfprintf+0x36a>
70a0: 85 e4 ldi r24, 0x45 ; 69
70a2: 90 e0 ldi r25, 0x00 ; 0
70a4: b7 01 movw r22, r14
70a6: 0d d3 rcall .+1562 ; 0x76c2 <fputc>
70a8: d7 fc sbrc r13, 7
70aa: 06 c0 rjmp .+12 ; 0x70b8 <vfprintf+0x3b2>
70ac: c1 14 cp r12, r1
70ae: d1 04 cpc r13, r1
70b0: 41 f4 brne .+16 ; 0x70c2 <vfprintf+0x3bc>
70b2: ec 85 ldd r30, Y+12 ; 0x0c
70b4: e4 ff sbrs r30, 4
70b6: 05 c0 rjmp .+10 ; 0x70c2 <vfprintf+0x3bc>
70b8: d1 94 neg r13
70ba: c1 94 neg r12
70bc: d1 08 sbc r13, r1
70be: 8d e2 ldi r24, 0x2D ; 45
70c0: 01 c0 rjmp .+2 ; 0x70c4 <vfprintf+0x3be>
70c2: 8b e2 ldi r24, 0x2B ; 43
70c4: b7 01 movw r22, r14
70c6: 90 e0 ldi r25, 0x00 ; 0
70c8: fc d2 rcall .+1528 ; 0x76c2 <fputc>
70ca: 80 e3 ldi r24, 0x30 ; 48
70cc: 2a e0 ldi r18, 0x0A ; 10
70ce: c2 16 cp r12, r18
70d0: d1 04 cpc r13, r1
70d2: 2c f0 brlt .+10 ; 0x70de <vfprintf+0x3d8>
70d4: 8f 5f subi r24, 0xFF ; 255
70d6: fa e0 ldi r31, 0x0A ; 10
70d8: cf 1a sub r12, r31
70da: d1 08 sbc r13, r1
70dc: f7 cf rjmp .-18 ; 0x70cc <vfprintf+0x3c6>
70de: b7 01 movw r22, r14
70e0: 90 e0 ldi r25, 0x00 ; 0
70e2: ef d2 rcall .+1502 ; 0x76c2 <fputc>
70e4: b7 01 movw r22, r14
70e6: c6 01 movw r24, r12
70e8: c0 96 adiw r24, 0x30 ; 48
70ea: eb d2 rcall .+1494 ; 0x76c2 <fputc>
70ec: 49 c1 rjmp .+658 ; 0x7380 <vfprintf+0x67a>
70ee: 83 36 cpi r24, 0x63 ; 99
70f0: 31 f0 breq .+12 ; 0x70fe <vfprintf+0x3f8>
70f2: 83 37 cpi r24, 0x73 ; 115
70f4: 79 f0 breq .+30 ; 0x7114 <vfprintf+0x40e>
70f6: 83 35 cpi r24, 0x53 ; 83
70f8: 09 f0 breq .+2 ; 0x70fc <vfprintf+0x3f6>
70fa: 52 c0 rjmp .+164 ; 0x71a0 <vfprintf+0x49a>
70fc: 1f c0 rjmp .+62 ; 0x713c <vfprintf+0x436>
70fe: 56 01 movw r10, r12
7100: 32 e0 ldi r19, 0x02 ; 2
7102: a3 0e add r10, r19
7104: b1 1c adc r11, r1
7106: f6 01 movw r30, r12
7108: 80 81 ld r24, Z
710a: 89 83 std Y+1, r24 ; 0x01
710c: 01 e0 ldi r16, 0x01 ; 1
710e: 10 e0 ldi r17, 0x00 ; 0
7110: 63 01 movw r12, r6
7112: 11 c0 rjmp .+34 ; 0x7136 <vfprintf+0x430>
7114: 56 01 movw r10, r12
7116: f2 e0 ldi r31, 0x02 ; 2
7118: af 0e add r10, r31
711a: b1 1c adc r11, r1
711c: f6 01 movw r30, r12
711e: c0 80 ld r12, Z
7120: d1 80 ldd r13, Z+1 ; 0x01
7122: 96 fe sbrs r9, 6
7124: 03 c0 rjmp .+6 ; 0x712c <vfprintf+0x426>
7126: 61 2f mov r22, r17
7128: 70 e0 ldi r23, 0x00 ; 0
712a: 02 c0 rjmp .+4 ; 0x7130 <vfprintf+0x42a>
712c: 6f ef ldi r22, 0xFF ; 255
712e: 7f ef ldi r23, 0xFF ; 255
7130: c6 01 movw r24, r12
7132: bc d2 rcall .+1400 ; 0x76ac <strnlen>
7134: 8c 01 movw r16, r24
7136: f9 2d mov r31, r9
7138: ff 77 andi r31, 0x7F ; 127
713a: 13 c0 rjmp .+38 ; 0x7162 <vfprintf+0x45c>
713c: 56 01 movw r10, r12
713e: 22 e0 ldi r18, 0x02 ; 2
7140: a2 0e add r10, r18
7142: b1 1c adc r11, r1
7144: f6 01 movw r30, r12
7146: c0 80 ld r12, Z
7148: d1 80 ldd r13, Z+1 ; 0x01
714a: 96 fe sbrs r9, 6
714c: 03 c0 rjmp .+6 ; 0x7154 <vfprintf+0x44e>
714e: 61 2f mov r22, r17
7150: 70 e0 ldi r23, 0x00 ; 0
7152: 02 c0 rjmp .+4 ; 0x7158 <vfprintf+0x452>
7154: 6f ef ldi r22, 0xFF ; 255
7156: 7f ef ldi r23, 0xFF ; 255
7158: c6 01 movw r24, r12
715a: 9d d2 rcall .+1338 ; 0x7696 <strnlen_P>
715c: 8c 01 movw r16, r24
715e: f9 2d mov r31, r9
7160: f0 68 ori r31, 0x80 ; 128
7162: 9f 2e mov r9, r31
7164: f3 fd sbrc r31, 3
7166: 18 c0 rjmp .+48 ; 0x7198 <vfprintf+0x492>
7168: 85 2d mov r24, r5
716a: 90 e0 ldi r25, 0x00 ; 0
716c: 08 17 cp r16, r24
716e: 19 07 cpc r17, r25
7170: 98 f4 brcc .+38 ; 0x7198 <vfprintf+0x492>
7172: b7 01 movw r22, r14
7174: 80 e2 ldi r24, 0x20 ; 32
7176: 90 e0 ldi r25, 0x00 ; 0
7178: a4 d2 rcall .+1352 ; 0x76c2 <fputc>
717a: 5a 94 dec r5
717c: f5 cf rjmp .-22 ; 0x7168 <vfprintf+0x462>
717e: f6 01 movw r30, r12
7180: 97 fc sbrc r9, 7
7182: 85 91 lpm r24, Z+
7184: 97 fe sbrs r9, 7
7186: 81 91 ld r24, Z+
7188: 6f 01 movw r12, r30
718a: b7 01 movw r22, r14
718c: 90 e0 ldi r25, 0x00 ; 0
718e: 99 d2 rcall .+1330 ; 0x76c2 <fputc>
7190: 51 10 cpse r5, r1
7192: 5a 94 dec r5
7194: 01 50 subi r16, 0x01 ; 1
7196: 11 09 sbc r17, r1
7198: 01 15 cp r16, r1
719a: 11 05 cpc r17, r1
719c: 81 f7 brne .-32 ; 0x717e <vfprintf+0x478>
719e: f0 c0 rjmp .+480 ; 0x7380 <vfprintf+0x67a>
71a0: 84 36 cpi r24, 0x64 ; 100
71a2: 11 f0 breq .+4 ; 0x71a8 <vfprintf+0x4a2>
71a4: 89 36 cpi r24, 0x69 ; 105
71a6: 59 f5 brne .+86 ; 0x71fe <vfprintf+0x4f8>
71a8: 56 01 movw r10, r12
71aa: 97 fe sbrs r9, 7
71ac: 09 c0 rjmp .+18 ; 0x71c0 <vfprintf+0x4ba>
71ae: 24 e0 ldi r18, 0x04 ; 4
71b0: a2 0e add r10, r18
71b2: b1 1c adc r11, r1
71b4: f6 01 movw r30, r12
71b6: 60 81 ld r22, Z
71b8: 71 81 ldd r23, Z+1 ; 0x01
71ba: 82 81 ldd r24, Z+2 ; 0x02
71bc: 93 81 ldd r25, Z+3 ; 0x03
71be: 0a c0 rjmp .+20 ; 0x71d4 <vfprintf+0x4ce>
71c0: f2 e0 ldi r31, 0x02 ; 2
71c2: af 0e add r10, r31
71c4: b1 1c adc r11, r1
71c6: f6 01 movw r30, r12
71c8: 60 81 ld r22, Z
71ca: 71 81 ldd r23, Z+1 ; 0x01
71cc: 07 2e mov r0, r23
71ce: 00 0c add r0, r0
71d0: 88 0b sbc r24, r24
71d2: 99 0b sbc r25, r25
71d4: f9 2d mov r31, r9
71d6: ff 76 andi r31, 0x6F ; 111
71d8: 9f 2e mov r9, r31
71da: 97 ff sbrs r25, 7
71dc: 09 c0 rjmp .+18 ; 0x71f0 <vfprintf+0x4ea>
71de: 90 95 com r25
71e0: 80 95 com r24
71e2: 70 95 com r23
71e4: 61 95 neg r22
71e6: 7f 4f sbci r23, 0xFF ; 255
71e8: 8f 4f sbci r24, 0xFF ; 255
71ea: 9f 4f sbci r25, 0xFF ; 255
71ec: f0 68 ori r31, 0x80 ; 128
71ee: 9f 2e mov r9, r31
71f0: 2a e0 ldi r18, 0x0A ; 10
71f2: 30 e0 ldi r19, 0x00 ; 0
71f4: a3 01 movw r20, r6
71f6: c3 d2 rcall .+1414 ; 0x777e <__ultoa_invert>
71f8: c8 2e mov r12, r24
71fa: c6 18 sub r12, r6
71fc: 3e c0 rjmp .+124 ; 0x727a <vfprintf+0x574>
71fe: 09 2d mov r16, r9
7200: 85 37 cpi r24, 0x75 ; 117
7202: 21 f4 brne .+8 ; 0x720c <vfprintf+0x506>
7204: 0f 7e andi r16, 0xEF ; 239
7206: 2a e0 ldi r18, 0x0A ; 10
7208: 30 e0 ldi r19, 0x00 ; 0
720a: 1d c0 rjmp .+58 ; 0x7246 <vfprintf+0x540>
720c: 09 7f andi r16, 0xF9 ; 249
720e: 8f 36 cpi r24, 0x6F ; 111
7210: 91 f0 breq .+36 ; 0x7236 <vfprintf+0x530>
7212: 18 f4 brcc .+6 ; 0x721a <vfprintf+0x514>
7214: 88 35 cpi r24, 0x58 ; 88
7216: 59 f0 breq .+22 ; 0x722e <vfprintf+0x528>
7218: bc c0 rjmp .+376 ; 0x7392 <vfprintf+0x68c>
721a: 80 37 cpi r24, 0x70 ; 112
721c: 19 f0 breq .+6 ; 0x7224 <vfprintf+0x51e>
721e: 88 37 cpi r24, 0x78 ; 120
7220: 11 f0 breq .+4 ; 0x7226 <vfprintf+0x520>
7222: b7 c0 rjmp .+366 ; 0x7392 <vfprintf+0x68c>
7224: 00 61 ori r16, 0x10 ; 16
7226: 04 ff sbrs r16, 4
7228: 09 c0 rjmp .+18 ; 0x723c <vfprintf+0x536>
722a: 04 60 ori r16, 0x04 ; 4
722c: 07 c0 rjmp .+14 ; 0x723c <vfprintf+0x536>
722e: 94 fe sbrs r9, 4
7230: 08 c0 rjmp .+16 ; 0x7242 <vfprintf+0x53c>
7232: 06 60 ori r16, 0x06 ; 6
7234: 06 c0 rjmp .+12 ; 0x7242 <vfprintf+0x53c>
7236: 28 e0 ldi r18, 0x08 ; 8
7238: 30 e0 ldi r19, 0x00 ; 0
723a: 05 c0 rjmp .+10 ; 0x7246 <vfprintf+0x540>
723c: 20 e1 ldi r18, 0x10 ; 16
723e: 30 e0 ldi r19, 0x00 ; 0
7240: 02 c0 rjmp .+4 ; 0x7246 <vfprintf+0x540>
7242: 20 e1 ldi r18, 0x10 ; 16
7244: 32 e0 ldi r19, 0x02 ; 2
7246: 56 01 movw r10, r12
7248: 07 ff sbrs r16, 7
724a: 09 c0 rjmp .+18 ; 0x725e <vfprintf+0x558>
724c: 84 e0 ldi r24, 0x04 ; 4
724e: a8 0e add r10, r24
7250: b1 1c adc r11, r1
7252: f6 01 movw r30, r12
7254: 60 81 ld r22, Z
7256: 71 81 ldd r23, Z+1 ; 0x01
7258: 82 81 ldd r24, Z+2 ; 0x02
725a: 93 81 ldd r25, Z+3 ; 0x03
725c: 08 c0 rjmp .+16 ; 0x726e <vfprintf+0x568>
725e: f2 e0 ldi r31, 0x02 ; 2
7260: af 0e add r10, r31
7262: b1 1c adc r11, r1
7264: f6 01 movw r30, r12
7266: 60 81 ld r22, Z
7268: 71 81 ldd r23, Z+1 ; 0x01
726a: 80 e0 ldi r24, 0x00 ; 0
726c: 90 e0 ldi r25, 0x00 ; 0
726e: a3 01 movw r20, r6
7270: 86 d2 rcall .+1292 ; 0x777e <__ultoa_invert>
7272: c8 2e mov r12, r24
7274: c6 18 sub r12, r6
7276: 0f 77 andi r16, 0x7F ; 127
7278: 90 2e mov r9, r16
727a: 96 fe sbrs r9, 6
727c: 0b c0 rjmp .+22 ; 0x7294 <vfprintf+0x58e>
727e: 09 2d mov r16, r9
7280: 0e 7f andi r16, 0xFE ; 254
7282: c1 16 cp r12, r17
7284: 50 f4 brcc .+20 ; 0x729a <vfprintf+0x594>
7286: 94 fe sbrs r9, 4
7288: 0a c0 rjmp .+20 ; 0x729e <vfprintf+0x598>
728a: 92 fc sbrc r9, 2
728c: 08 c0 rjmp .+16 ; 0x729e <vfprintf+0x598>
728e: 09 2d mov r16, r9
7290: 0e 7e andi r16, 0xEE ; 238
7292: 05 c0 rjmp .+10 ; 0x729e <vfprintf+0x598>
7294: dc 2c mov r13, r12
7296: 09 2d mov r16, r9
7298: 03 c0 rjmp .+6 ; 0x72a0 <vfprintf+0x59a>
729a: dc 2c mov r13, r12
729c: 01 c0 rjmp .+2 ; 0x72a0 <vfprintf+0x59a>
729e: d1 2e mov r13, r17
72a0: 04 ff sbrs r16, 4
72a2: 0d c0 rjmp .+26 ; 0x72be <vfprintf+0x5b8>
72a4: fe 01 movw r30, r28
72a6: ec 0d add r30, r12
72a8: f1 1d adc r31, r1
72aa: 80 81 ld r24, Z
72ac: 80 33 cpi r24, 0x30 ; 48
72ae: 11 f4 brne .+4 ; 0x72b4 <vfprintf+0x5ae>
72b0: 09 7e andi r16, 0xE9 ; 233
72b2: 09 c0 rjmp .+18 ; 0x72c6 <vfprintf+0x5c0>
72b4: 02 ff sbrs r16, 2
72b6: 06 c0 rjmp .+12 ; 0x72c4 <vfprintf+0x5be>
72b8: d3 94 inc r13
72ba: d3 94 inc r13
72bc: 04 c0 rjmp .+8 ; 0x72c6 <vfprintf+0x5c0>
72be: 80 2f mov r24, r16
72c0: 86 78 andi r24, 0x86 ; 134
72c2: 09 f0 breq .+2 ; 0x72c6 <vfprintf+0x5c0>
72c4: d3 94 inc r13
72c6: 03 fd sbrc r16, 3
72c8: 10 c0 rjmp .+32 ; 0x72ea <vfprintf+0x5e4>
72ca: 00 ff sbrs r16, 0
72cc: 06 c0 rjmp .+12 ; 0x72da <vfprintf+0x5d4>
72ce: 1c 2d mov r17, r12
72d0: d5 14 cp r13, r5
72d2: 78 f4 brcc .+30 ; 0x72f2 <vfprintf+0x5ec>
72d4: 15 0d add r17, r5
72d6: 1d 19 sub r17, r13
72d8: 0c c0 rjmp .+24 ; 0x72f2 <vfprintf+0x5ec>
72da: d5 14 cp r13, r5
72dc: 50 f4 brcc .+20 ; 0x72f2 <vfprintf+0x5ec>
72de: b7 01 movw r22, r14
72e0: 80 e2 ldi r24, 0x20 ; 32
72e2: 90 e0 ldi r25, 0x00 ; 0
72e4: ee d1 rcall .+988 ; 0x76c2 <fputc>
72e6: d3 94 inc r13
72e8: f8 cf rjmp .-16 ; 0x72da <vfprintf+0x5d4>
72ea: d5 14 cp r13, r5
72ec: 10 f4 brcc .+4 ; 0x72f2 <vfprintf+0x5ec>
72ee: 5d 18 sub r5, r13
72f0: 01 c0 rjmp .+2 ; 0x72f4 <vfprintf+0x5ee>
72f2: 51 2c mov r5, r1
72f4: 04 ff sbrs r16, 4
72f6: 0f c0 rjmp .+30 ; 0x7316 <vfprintf+0x610>
72f8: b7 01 movw r22, r14
72fa: 80 e3 ldi r24, 0x30 ; 48
72fc: 90 e0 ldi r25, 0x00 ; 0
72fe: e1 d1 rcall .+962 ; 0x76c2 <fputc>
7300: 02 ff sbrs r16, 2
7302: 16 c0 rjmp .+44 ; 0x7330 <vfprintf+0x62a>
7304: 01 fd sbrc r16, 1
7306: 03 c0 rjmp .+6 ; 0x730e <vfprintf+0x608>
7308: 88 e7 ldi r24, 0x78 ; 120
730a: 90 e0 ldi r25, 0x00 ; 0
730c: 02 c0 rjmp .+4 ; 0x7312 <vfprintf+0x60c>
730e: 88 e5 ldi r24, 0x58 ; 88
7310: 90 e0 ldi r25, 0x00 ; 0
7312: b7 01 movw r22, r14
7314: 0c c0 rjmp .+24 ; 0x732e <vfprintf+0x628>
7316: 80 2f mov r24, r16
7318: 86 78 andi r24, 0x86 ; 134
731a: 51 f0 breq .+20 ; 0x7330 <vfprintf+0x62a>
731c: 01 ff sbrs r16, 1
731e: 02 c0 rjmp .+4 ; 0x7324 <vfprintf+0x61e>
7320: 8b e2 ldi r24, 0x2B ; 43
7322: 01 c0 rjmp .+2 ; 0x7326 <vfprintf+0x620>
7324: 80 e2 ldi r24, 0x20 ; 32
7326: 07 fd sbrc r16, 7
7328: 8d e2 ldi r24, 0x2D ; 45
732a: b7 01 movw r22, r14
732c: 90 e0 ldi r25, 0x00 ; 0
732e: c9 d1 rcall .+914 ; 0x76c2 <fputc>
7330: c1 16 cp r12, r17
7332: 30 f4 brcc .+12 ; 0x7340 <vfprintf+0x63a>
7334: b7 01 movw r22, r14
7336: 80 e3 ldi r24, 0x30 ; 48
7338: 90 e0 ldi r25, 0x00 ; 0
733a: c3 d1 rcall .+902 ; 0x76c2 <fputc>
733c: 11 50 subi r17, 0x01 ; 1
733e: f8 cf rjmp .-16 ; 0x7330 <vfprintf+0x62a>
7340: ca 94 dec r12
7342: f3 01 movw r30, r6
7344: ec 0d add r30, r12
7346: f1 1d adc r31, r1
7348: 80 81 ld r24, Z
734a: b7 01 movw r22, r14
734c: 90 e0 ldi r25, 0x00 ; 0
734e: b9 d1 rcall .+882 ; 0x76c2 <fputc>
7350: c1 10 cpse r12, r1
7352: f6 cf rjmp .-20 ; 0x7340 <vfprintf+0x63a>
7354: 15 c0 rjmp .+42 ; 0x7380 <vfprintf+0x67a>
7356: f4 e0 ldi r31, 0x04 ; 4
7358: f5 15 cp r31, r5
735a: 50 f5 brcc .+84 ; 0x73b0 <vfprintf+0x6aa>
735c: 84 e0 ldi r24, 0x04 ; 4
735e: 58 1a sub r5, r24
7360: 93 fe sbrs r9, 3
7362: 1e c0 rjmp .+60 ; 0x73a0 <vfprintf+0x69a>
7364: 01 11 cpse r16, r1
7366: 25 c0 rjmp .+74 ; 0x73b2 <vfprintf+0x6ac>
7368: 2c 85 ldd r18, Y+12 ; 0x0c
736a: 23 ff sbrs r18, 3
736c: 27 c0 rjmp .+78 ; 0x73bc <vfprintf+0x6b6>
736e: 08 ef ldi r16, 0xF8 ; 248
7370: 12 e0 ldi r17, 0x02 ; 2
7372: 39 2d mov r19, r9
7374: 30 71 andi r19, 0x10 ; 16
7376: 93 2e mov r9, r19
7378: f8 01 movw r30, r16
737a: 84 91 lpm r24, Z
737c: 81 11 cpse r24, r1
737e: 21 c0 rjmp .+66 ; 0x73c2 <vfprintf+0x6bc>
7380: 55 20 and r5, r5
7382: 09 f4 brne .+2 ; 0x7386 <vfprintf+0x680>
7384: fc cc rjmp .-1544 ; 0x6d7e <vfprintf+0x78>
7386: b7 01 movw r22, r14
7388: 80 e2 ldi r24, 0x20 ; 32
738a: 90 e0 ldi r25, 0x00 ; 0
738c: 9a d1 rcall .+820 ; 0x76c2 <fputc>
738e: 5a 94 dec r5
7390: f7 cf rjmp .-18 ; 0x7380 <vfprintf+0x67a>
7392: f7 01 movw r30, r14
7394: 86 81 ldd r24, Z+6 ; 0x06
7396: 97 81 ldd r25, Z+7 ; 0x07
7398: 23 c0 rjmp .+70 ; 0x73e0 <vfprintf+0x6da>
739a: 8f ef ldi r24, 0xFF ; 255
739c: 9f ef ldi r25, 0xFF ; 255
739e: 20 c0 rjmp .+64 ; 0x73e0 <vfprintf+0x6da>
73a0: b7 01 movw r22, r14
73a2: 80 e2 ldi r24, 0x20 ; 32
73a4: 90 e0 ldi r25, 0x00 ; 0
73a6: 8d d1 rcall .+794 ; 0x76c2 <fputc>
73a8: 5a 94 dec r5
73aa: 51 10 cpse r5, r1
73ac: f9 cf rjmp .-14 ; 0x73a0 <vfprintf+0x69a>
73ae: da cf rjmp .-76 ; 0x7364 <vfprintf+0x65e>
73b0: 51 2c mov r5, r1
73b2: b7 01 movw r22, r14
73b4: 80 2f mov r24, r16
73b6: 90 e0 ldi r25, 0x00 ; 0
73b8: 84 d1 rcall .+776 ; 0x76c2 <fputc>
73ba: d6 cf rjmp .-84 ; 0x7368 <vfprintf+0x662>
73bc: 0c ef ldi r16, 0xFC ; 252
73be: 12 e0 ldi r17, 0x02 ; 2
73c0: d8 cf rjmp .-80 ; 0x7372 <vfprintf+0x66c>
73c2: 91 10 cpse r9, r1
73c4: 80 52 subi r24, 0x20 ; 32
73c6: b7 01 movw r22, r14
73c8: 90 e0 ldi r25, 0x00 ; 0
73ca: 7b d1 rcall .+758 ; 0x76c2 <fputc>
73cc: 0f 5f subi r16, 0xFF ; 255
73ce: 1f 4f sbci r17, 0xFF ; 255
73d0: d3 cf rjmp .-90 ; 0x7378 <vfprintf+0x672>
73d2: 23 e0 ldi r18, 0x03 ; 3
73d4: 25 15 cp r18, r5
73d6: 10 f4 brcc .+4 ; 0x73dc <vfprintf+0x6d6>
73d8: 83 e0 ldi r24, 0x03 ; 3
73da: c1 cf rjmp .-126 ; 0x735e <vfprintf+0x658>
73dc: 51 2c mov r5, r1
73de: c4 cf rjmp .-120 ; 0x7368 <vfprintf+0x662>
73e0: 60 96 adiw r28, 0x10 ; 16
73e2: cd bf out 0x3d, r28 ; 61
73e4: de bf out 0x3e, r29 ; 62
73e6: df 91 pop r29
73e8: cf 91 pop r28
73ea: 1f 91 pop r17
73ec: 0f 91 pop r16
73ee: ff 90 pop r15
73f0: ef 90 pop r14
73f2: df 90 pop r13
73f4: cf 90 pop r12
73f6: bf 90 pop r11
73f8: af 90 pop r10
73fa: 9f 90 pop r9
73fc: 8f 90 pop r8
73fe: 7f 90 pop r7
7400: 6f 90 pop r6
7402: 5f 90 pop r5
7404: 4f 90 pop r4
7406: 3f 90 pop r3
7408: 2f 90 pop r2
740a: 08 95 ret
0000740c <__udivmodhi4>:
740c: aa 1b sub r26, r26
740e: bb 1b sub r27, r27
7410: 51 e1 ldi r21, 0x11 ; 17
7412: 07 c0 rjmp .+14 ; 0x7422 <__udivmodhi4_ep>
00007414 <__udivmodhi4_loop>:
7414: aa 1f adc r26, r26
7416: bb 1f adc r27, r27
7418: a6 17 cp r26, r22
741a: b7 07 cpc r27, r23
741c: 10 f0 brcs .+4 ; 0x7422 <__udivmodhi4_ep>
741e: a6 1b sub r26, r22
7420: b7 0b sbc r27, r23
00007422 <__udivmodhi4_ep>:
7422: 88 1f adc r24, r24
7424: 99 1f adc r25, r25
7426: 5a 95 dec r21
7428: a9 f7 brne .-22 ; 0x7414 <__udivmodhi4_loop>
742a: 80 95 com r24
742c: 90 95 com r25
742e: bc 01 movw r22, r24
7430: cd 01 movw r24, r26
7432: 08 95 ret
00007434 <__divmodhi4>:
7434: 97 fb bst r25, 7
7436: 07 2e mov r0, r23
7438: 16 f4 brtc .+4 ; 0x743e <__divmodhi4+0xa>
743a: 00 94 com r0
743c: 06 d0 rcall .+12 ; 0x744a <__divmodhi4_neg1>
743e: 77 fd sbrc r23, 7
7440: 08 d0 rcall .+16 ; 0x7452 <__divmodhi4_neg2>
7442: e4 df rcall .-56 ; 0x740c <__udivmodhi4>
7444: 07 fc sbrc r0, 7
7446: 05 d0 rcall .+10 ; 0x7452 <__divmodhi4_neg2>
7448: 3e f4 brtc .+14 ; 0x7458 <__divmodhi4_exit>
0000744a <__divmodhi4_neg1>:
744a: 90 95 com r25
744c: 81 95 neg r24
744e: 9f 4f sbci r25, 0xFF ; 255
7450: 08 95 ret
00007452 <__divmodhi4_neg2>:
7452: 70 95 com r23
7454: 61 95 neg r22
7456: 7f 4f sbci r23, 0xFF ; 255
00007458 <__divmodhi4_exit>:
7458: 08 95 ret
0000745a <__udivmodsi4>:
745a: a1 e2 ldi r26, 0x21 ; 33
745c: 1a 2e mov r1, r26
745e: aa 1b sub r26, r26
7460: bb 1b sub r27, r27
7462: fd 01 movw r30, r26
7464: 0d c0 rjmp .+26 ; 0x7480 <__udivmodsi4_ep>
00007466 <__udivmodsi4_loop>:
7466: aa 1f adc r26, r26
7468: bb 1f adc r27, r27
746a: ee 1f adc r30, r30
746c: ff 1f adc r31, r31
746e: a2 17 cp r26, r18
7470: b3 07 cpc r27, r19
7472: e4 07 cpc r30, r20
7474: f5 07 cpc r31, r21
7476: 20 f0 brcs .+8 ; 0x7480 <__udivmodsi4_ep>
7478: a2 1b sub r26, r18
747a: b3 0b sbc r27, r19
747c: e4 0b sbc r30, r20
747e: f5 0b sbc r31, r21
00007480 <__udivmodsi4_ep>:
7480: 66 1f adc r22, r22
7482: 77 1f adc r23, r23
7484: 88 1f adc r24, r24
7486: 99 1f adc r25, r25
7488: 1a 94 dec r1
748a: 69 f7 brne .-38 ; 0x7466 <__udivmodsi4_loop>
748c: 60 95 com r22
748e: 70 95 com r23
7490: 80 95 com r24
7492: 90 95 com r25
7494: 9b 01 movw r18, r22
7496: ac 01 movw r20, r24
7498: bd 01 movw r22, r26
749a: cf 01 movw r24, r30
749c: 08 95 ret
0000749e <__tablejump2__>:
749e: ee 0f add r30, r30
74a0: ff 1f adc r31, r31
74a2: 88 1f adc r24, r24
74a4: 8b bf out 0x3b, r24 ; 59
74a6: 07 90 elpm r0, Z+
74a8: f6 91 elpm r31, Z
74aa: e0 2d mov r30, r0
74ac: 1b be out 0x3b, r1 ; 59
74ae: 19 94 eijmp
000074b0 <__umulhisi3>:
74b0: a2 9f mul r26, r18
74b2: b0 01 movw r22, r0
74b4: b3 9f mul r27, r19
74b6: c0 01 movw r24, r0
74b8: a3 9f mul r26, r19
74ba: 70 0d add r23, r0
74bc: 81 1d adc r24, r1
74be: 11 24 eor r1, r1
74c0: 91 1d adc r25, r1
74c2: b2 9f mul r27, r18
74c4: 70 0d add r23, r0
74c6: 81 1d adc r24, r1
74c8: 11 24 eor r1, r1
74ca: 91 1d adc r25, r1
74cc: 08 95 ret
000074ce <__adddi3_s8>:
74ce: 00 24 eor r0, r0
74d0: a7 fd sbrc r26, 7
74d2: 00 94 com r0
74d4: 2a 0f add r18, r26
74d6: 30 1d adc r19, r0
74d8: 40 1d adc r20, r0
74da: 50 1d adc r21, r0
74dc: 60 1d adc r22, r0
74de: 70 1d adc r23, r0
74e0: 80 1d adc r24, r0
74e2: 90 1d adc r25, r0
74e4: 08 95 ret
000074e6 <__ftoa_engine>:
74e6: 28 30 cpi r18, 0x08 ; 8
74e8: 08 f0 brcs .+2 ; 0x74ec <__ftoa_engine+0x6>
74ea: 27 e0 ldi r18, 0x07 ; 7
74ec: 33 27 eor r19, r19
74ee: da 01 movw r26, r20
74f0: 99 0f add r25, r25
74f2: 31 1d adc r19, r1
74f4: 87 fd sbrc r24, 7
74f6: 91 60 ori r25, 0x01 ; 1
74f8: 00 96 adiw r24, 0x00 ; 0
74fa: 61 05 cpc r22, r1
74fc: 71 05 cpc r23, r1
74fe: 39 f4 brne .+14 ; 0x750e <__ftoa_engine+0x28>
7500: 32 60 ori r19, 0x02 ; 2
7502: 2e 5f subi r18, 0xFE ; 254
7504: 3d 93 st X+, r19
7506: 30 e3 ldi r19, 0x30 ; 48
7508: 2a 95 dec r18
750a: e1 f7 brne .-8 ; 0x7504 <__ftoa_engine+0x1e>
750c: 08 95 ret
750e: 9f 3f cpi r25, 0xFF ; 255
7510: 30 f0 brcs .+12 ; 0x751e <__ftoa_engine+0x38>
7512: 80 38 cpi r24, 0x80 ; 128
7514: 71 05 cpc r23, r1
7516: 61 05 cpc r22, r1
7518: 09 f0 breq .+2 ; 0x751c <__ftoa_engine+0x36>
751a: 3c 5f subi r19, 0xFC ; 252
751c: 3c 5f subi r19, 0xFC ; 252
751e: 3d 93 st X+, r19
7520: 91 30 cpi r25, 0x01 ; 1
7522: 08 f0 brcs .+2 ; 0x7526 <__ftoa_engine+0x40>
7524: 80 68 ori r24, 0x80 ; 128
7526: 91 1d adc r25, r1
7528: df 93 push r29
752a: cf 93 push r28
752c: 1f 93 push r17
752e: 0f 93 push r16
7530: ff 92 push r15
7532: ef 92 push r14
7534: 19 2f mov r17, r25
7536: 98 7f andi r25, 0xF8 ; 248
7538: 96 95 lsr r25
753a: e9 2f mov r30, r25
753c: 96 95 lsr r25
753e: 96 95 lsr r25
7540: e9 0f add r30, r25
7542: ff 27 eor r31, r31
7544: e6 5a subi r30, 0xA6 ; 166
7546: fc 4f sbci r31, 0xFC ; 252
7548: 99 27 eor r25, r25
754a: 33 27 eor r19, r19
754c: ee 24 eor r14, r14
754e: ff 24 eor r15, r15
7550: a7 01 movw r20, r14
7552: e7 01 movw r28, r14
7554: 05 90 lpm r0, Z+
7556: 08 94 sec
7558: 07 94 ror r0
755a: 28 f4 brcc .+10 ; 0x7566 <__ftoa_engine+0x80>
755c: 36 0f add r19, r22
755e: e7 1e adc r14, r23
7560: f8 1e adc r15, r24
7562: 49 1f adc r20, r25
7564: 51 1d adc r21, r1
7566: 66 0f add r22, r22
7568: 77 1f adc r23, r23
756a: 88 1f adc r24, r24
756c: 99 1f adc r25, r25
756e: 06 94 lsr r0
7570: a1 f7 brne .-24 ; 0x755a <__ftoa_engine+0x74>
7572: 05 90 lpm r0, Z+
7574: 07 94 ror r0
7576: 28 f4 brcc .+10 ; 0x7582 <__ftoa_engine+0x9c>
7578: e7 0e add r14, r23
757a: f8 1e adc r15, r24
757c: 49 1f adc r20, r25
757e: 56 1f adc r21, r22
7580: c1 1d adc r28, r1
7582: 77 0f add r23, r23
7584: 88 1f adc r24, r24
7586: 99 1f adc r25, r25
7588: 66 1f adc r22, r22
758a: 06 94 lsr r0
758c: a1 f7 brne .-24 ; 0x7576 <__ftoa_engine+0x90>
758e: 05 90 lpm r0, Z+
7590: 07 94 ror r0
7592: 28 f4 brcc .+10 ; 0x759e <__ftoa_engine+0xb8>
7594: f8 0e add r15, r24
7596: 49 1f adc r20, r25
7598: 56 1f adc r21, r22
759a: c7 1f adc r28, r23
759c: d1 1d adc r29, r1
759e: 88 0f add r24, r24
75a0: 99 1f adc r25, r25
75a2: 66 1f adc r22, r22
75a4: 77 1f adc r23, r23
75a6: 06 94 lsr r0
75a8: a1 f7 brne .-24 ; 0x7592 <__ftoa_engine+0xac>
75aa: 05 90 lpm r0, Z+
75ac: 07 94 ror r0
75ae: 20 f4 brcc .+8 ; 0x75b8 <__ftoa_engine+0xd2>
75b0: 49 0f add r20, r25
75b2: 56 1f adc r21, r22
75b4: c7 1f adc r28, r23
75b6: d8 1f adc r29, r24
75b8: 99 0f add r25, r25
75ba: 66 1f adc r22, r22
75bc: 77 1f adc r23, r23
75be: 88 1f adc r24, r24
75c0: 06 94 lsr r0
75c2: a9 f7 brne .-22 ; 0x75ae <__ftoa_engine+0xc8>
75c4: 84 91 lpm r24, Z
75c6: 10 95 com r17
75c8: 17 70 andi r17, 0x07 ; 7
75ca: 41 f0 breq .+16 ; 0x75dc <__ftoa_engine+0xf6>
75cc: d6 95 lsr r29
75ce: c7 95 ror r28
75d0: 57 95 ror r21
75d2: 47 95 ror r20
75d4: f7 94 ror r15
75d6: e7 94 ror r14
75d8: 1a 95 dec r17
75da: c1 f7 brne .-16 ; 0x75cc <__ftoa_engine+0xe6>
75dc: e0 e0 ldi r30, 0x00 ; 0
75de: f3 e0 ldi r31, 0x03 ; 3
75e0: 68 94 set
75e2: 15 90 lpm r1, Z+
75e4: 15 91 lpm r17, Z+
75e6: 35 91 lpm r19, Z+
75e8: 65 91 lpm r22, Z+
75ea: 95 91 lpm r25, Z+
75ec: 05 90 lpm r0, Z+
75ee: 7f e2 ldi r23, 0x2F ; 47
75f0: 73 95 inc r23
75f2: e1 18 sub r14, r1
75f4: f1 0a sbc r15, r17
75f6: 43 0b sbc r20, r19
75f8: 56 0b sbc r21, r22
75fa: c9 0b sbc r28, r25
75fc: d0 09 sbc r29, r0
75fe: c0 f7 brcc .-16 ; 0x75f0 <__ftoa_engine+0x10a>
7600: e1 0c add r14, r1
7602: f1 1e adc r15, r17
7604: 43 1f adc r20, r19
7606: 56 1f adc r21, r22
7608: c9 1f adc r28, r25
760a: d0 1d adc r29, r0
760c: 7e f4 brtc .+30 ; 0x762c <__ftoa_engine+0x146>
760e: 70 33 cpi r23, 0x30 ; 48
7610: 11 f4 brne .+4 ; 0x7616 <__ftoa_engine+0x130>
7612: 8a 95 dec r24
7614: e6 cf rjmp .-52 ; 0x75e2 <__ftoa_engine+0xfc>
7616: e8 94 clt
7618: 01 50 subi r16, 0x01 ; 1
761a: 30 f0 brcs .+12 ; 0x7628 <__ftoa_engine+0x142>
761c: 08 0f add r16, r24
761e: 0a f4 brpl .+2 ; 0x7622 <__ftoa_engine+0x13c>
7620: 00 27 eor r16, r16
7622: 02 17 cp r16, r18
7624: 08 f4 brcc .+2 ; 0x7628 <__ftoa_engine+0x142>
7626: 20 2f mov r18, r16
7628: 23 95 inc r18
762a: 02 2f mov r16, r18
762c: 7a 33 cpi r23, 0x3A ; 58
762e: 28 f0 brcs .+10 ; 0x763a <__ftoa_engine+0x154>
7630: 79 e3 ldi r23, 0x39 ; 57
7632: 7d 93 st X+, r23
7634: 2a 95 dec r18
7636: e9 f7 brne .-6 ; 0x7632 <__ftoa_engine+0x14c>
7638: 10 c0 rjmp .+32 ; 0x765a <__ftoa_engine+0x174>
763a: 7d 93 st X+, r23
763c: 2a 95 dec r18
763e: 89 f6 brne .-94 ; 0x75e2 <__ftoa_engine+0xfc>
7640: 06 94 lsr r0
7642: 97 95 ror r25
7644: 67 95 ror r22
7646: 37 95 ror r19
7648: 17 95 ror r17
764a: 17 94 ror r1
764c: e1 18 sub r14, r1
764e: f1 0a sbc r15, r17
7650: 43 0b sbc r20, r19
7652: 56 0b sbc r21, r22
7654: c9 0b sbc r28, r25
7656: d0 09 sbc r29, r0
7658: 98 f0 brcs .+38 ; 0x7680 <__ftoa_engine+0x19a>
765a: 23 95 inc r18
765c: 7e 91 ld r23, -X
765e: 73 95 inc r23
7660: 7a 33 cpi r23, 0x3A ; 58
7662: 08 f0 brcs .+2 ; 0x7666 <__ftoa_engine+0x180>
7664: 70 e3 ldi r23, 0x30 ; 48
7666: 7c 93 st X, r23
7668: 20 13 cpse r18, r16
766a: b8 f7 brcc .-18 ; 0x765a <__ftoa_engine+0x174>
766c: 7e 91 ld r23, -X
766e: 70 61 ori r23, 0x10 ; 16
7670: 7d 93 st X+, r23
7672: 30 f0 brcs .+12 ; 0x7680 <__ftoa_engine+0x19a>
7674: 83 95 inc r24
7676: 71 e3 ldi r23, 0x31 ; 49
7678: 7d 93 st X+, r23
767a: 70 e3 ldi r23, 0x30 ; 48
767c: 2a 95 dec r18
767e: e1 f7 brne .-8 ; 0x7678 <__ftoa_engine+0x192>
7680: 11 24 eor r1, r1
7682: ef 90 pop r14
7684: ff 90 pop r15
7686: 0f 91 pop r16
7688: 1f 91 pop r17
768a: cf 91 pop r28
768c: df 91 pop r29
768e: 99 27 eor r25, r25
7690: 87 fd sbrc r24, 7
7692: 90 95 com r25
7694: 08 95 ret
00007696 <strnlen_P>:
7696: fc 01 movw r30, r24
7698: 05 90 lpm r0, Z+
769a: 61 50 subi r22, 0x01 ; 1
769c: 70 40 sbci r23, 0x00 ; 0
769e: 01 10 cpse r0, r1
76a0: d8 f7 brcc .-10 ; 0x7698 <strnlen_P+0x2>
76a2: 80 95 com r24
76a4: 90 95 com r25
76a6: 8e 0f add r24, r30
76a8: 9f 1f adc r25, r31
76aa: 08 95 ret
000076ac <strnlen>:
76ac: fc 01 movw r30, r24
76ae: 61 50 subi r22, 0x01 ; 1
76b0: 70 40 sbci r23, 0x00 ; 0
76b2: 01 90 ld r0, Z+
76b4: 01 10 cpse r0, r1
76b6: d8 f7 brcc .-10 ; 0x76ae <strnlen+0x2>
76b8: 80 95 com r24
76ba: 90 95 com r25
76bc: 8e 0f add r24, r30
76be: 9f 1f adc r25, r31
76c0: 08 95 ret
000076c2 <fputc>:
76c2: 0f 93 push r16
76c4: 1f 93 push r17
76c6: cf 93 push r28
76c8: df 93 push r29
76ca: fb 01 movw r30, r22
76cc: 23 81 ldd r18, Z+3 ; 0x03
76ce: 21 fd sbrc r18, 1
76d0: 03 c0 rjmp .+6 ; 0x76d8 <fputc+0x16>
76d2: 8f ef ldi r24, 0xFF ; 255
76d4: 9f ef ldi r25, 0xFF ; 255
76d6: 2c c0 rjmp .+88 ; 0x7730 <fputc+0x6e>
76d8: 22 ff sbrs r18, 2
76da: 16 c0 rjmp .+44 ; 0x7708 <fputc+0x46>
76dc: 46 81 ldd r20, Z+6 ; 0x06
76de: 57 81 ldd r21, Z+7 ; 0x07
76e0: 24 81 ldd r18, Z+4 ; 0x04
76e2: 35 81 ldd r19, Z+5 ; 0x05
76e4: 42 17 cp r20, r18
76e6: 53 07 cpc r21, r19
76e8: 44 f4 brge .+16 ; 0x76fa <fputc+0x38>
76ea: a0 81 ld r26, Z
76ec: b1 81 ldd r27, Z+1 ; 0x01
76ee: 9d 01 movw r18, r26
76f0: 2f 5f subi r18, 0xFF ; 255
76f2: 3f 4f sbci r19, 0xFF ; 255
76f4: 20 83 st Z, r18
76f6: 31 83 std Z+1, r19 ; 0x01
76f8: 8c 93 st X, r24
76fa: 26 81 ldd r18, Z+6 ; 0x06
76fc: 37 81 ldd r19, Z+7 ; 0x07
76fe: 2f 5f subi r18, 0xFF ; 255
7700: 3f 4f sbci r19, 0xFF ; 255
7702: 26 83 std Z+6, r18 ; 0x06
7704: 37 83 std Z+7, r19 ; 0x07
7706: 14 c0 rjmp .+40 ; 0x7730 <fputc+0x6e>
7708: 8b 01 movw r16, r22
770a: ec 01 movw r28, r24
770c: fb 01 movw r30, r22
770e: 00 84 ldd r0, Z+8 ; 0x08
7710: f1 85 ldd r31, Z+9 ; 0x09
7712: e0 2d mov r30, r0
7714: 19 95 eicall
7716: 89 2b or r24, r25
7718: e1 f6 brne .-72 ; 0x76d2 <fputc+0x10>
771a: d8 01 movw r26, r16
771c: 16 96 adiw r26, 0x06 ; 6
771e: 8d 91 ld r24, X+
7720: 9c 91 ld r25, X
7722: 17 97 sbiw r26, 0x07 ; 7
7724: 01 96 adiw r24, 0x01 ; 1
7726: 16 96 adiw r26, 0x06 ; 6
7728: 8d 93 st X+, r24
772a: 9c 93 st X, r25
772c: 17 97 sbiw r26, 0x07 ; 7
772e: ce 01 movw r24, r28
7730: df 91 pop r29
7732: cf 91 pop r28
7734: 1f 91 pop r17
7736: 0f 91 pop r16
7738: 08 95 ret
0000773a <vsprintf>:
773a: 0f 93 push r16
773c: 1f 93 push r17
773e: cf 93 push r28
7740: df 93 push r29
7742: cd b7 in r28, 0x3d ; 61
7744: de b7 in r29, 0x3e ; 62
7746: 2e 97 sbiw r28, 0x0e ; 14
7748: cd bf out 0x3d, r28 ; 61
774a: de bf out 0x3e, r29 ; 62
774c: 8c 01 movw r16, r24
774e: 86 e0 ldi r24, 0x06 ; 6
7750: 8c 83 std Y+4, r24 ; 0x04
7752: 09 83 std Y+1, r16 ; 0x01
7754: 1a 83 std Y+2, r17 ; 0x02
7756: 8f ef ldi r24, 0xFF ; 255
7758: 9f e7 ldi r25, 0x7F ; 127
775a: 8d 83 std Y+5, r24 ; 0x05
775c: 9e 83 std Y+6, r25 ; 0x06
775e: ce 01 movw r24, r28
7760: 01 96 adiw r24, 0x01 ; 1
7762: d1 da rcall .-2654 ; 0x6d06 <vfprintf>
7764: ef 81 ldd r30, Y+7 ; 0x07
7766: f8 85 ldd r31, Y+8 ; 0x08
7768: e0 0f add r30, r16
776a: f1 1f adc r31, r17
776c: 10 82 st Z, r1
776e: 2e 96 adiw r28, 0x0e ; 14
7770: cd bf out 0x3d, r28 ; 61
7772: de bf out 0x3e, r29 ; 62
7774: df 91 pop r29
7776: cf 91 pop r28
7778: 1f 91 pop r17
777a: 0f 91 pop r16
777c: 08 95 ret
0000777e <__ultoa_invert>:
777e: fa 01 movw r30, r20
7780: aa 27 eor r26, r26
7782: 28 30 cpi r18, 0x08 ; 8
7784: 51 f1 breq .+84 ; 0x77da <__ultoa_invert+0x5c>
7786: 20 31 cpi r18, 0x10 ; 16
7788: 81 f1 breq .+96 ; 0x77ea <__ultoa_invert+0x6c>
778a: e8 94 clt
778c: 6f 93 push r22
778e: 6e 7f andi r22, 0xFE ; 254
7790: 6e 5f subi r22, 0xFE ; 254
7792: 7f 4f sbci r23, 0xFF ; 255
7794: 8f 4f sbci r24, 0xFF ; 255
7796: 9f 4f sbci r25, 0xFF ; 255
7798: af 4f sbci r26, 0xFF ; 255
779a: b1 e0 ldi r27, 0x01 ; 1
779c: 3e d0 rcall .+124 ; 0x781a <__ultoa_invert+0x9c>
779e: b4 e0 ldi r27, 0x04 ; 4
77a0: 3c d0 rcall .+120 ; 0x781a <__ultoa_invert+0x9c>
77a2: 67 0f add r22, r23
77a4: 78 1f adc r23, r24
77a6: 89 1f adc r24, r25
77a8: 9a 1f adc r25, r26
77aa: a1 1d adc r26, r1
77ac: 68 0f add r22, r24
77ae: 79 1f adc r23, r25
77b0: 8a 1f adc r24, r26
77b2: 91 1d adc r25, r1
77b4: a1 1d adc r26, r1
77b6: 6a 0f add r22, r26
77b8: 71 1d adc r23, r1
77ba: 81 1d adc r24, r1
77bc: 91 1d adc r25, r1
77be: a1 1d adc r26, r1
77c0: 20 d0 rcall .+64 ; 0x7802 <__ultoa_invert+0x84>
77c2: 09 f4 brne .+2 ; 0x77c6 <__ultoa_invert+0x48>
77c4: 68 94 set
77c6: 3f 91 pop r19
77c8: 2a e0 ldi r18, 0x0A ; 10
77ca: 26 9f mul r18, r22
77cc: 11 24 eor r1, r1
77ce: 30 19 sub r19, r0
77d0: 30 5d subi r19, 0xD0 ; 208
77d2: 31 93 st Z+, r19
77d4: de f6 brtc .-74 ; 0x778c <__ultoa_invert+0xe>
77d6: cf 01 movw r24, r30
77d8: 08 95 ret
77da: 46 2f mov r20, r22
77dc: 47 70 andi r20, 0x07 ; 7
77de: 40 5d subi r20, 0xD0 ; 208
77e0: 41 93 st Z+, r20
77e2: b3 e0 ldi r27, 0x03 ; 3
77e4: 0f d0 rcall .+30 ; 0x7804 <__ultoa_invert+0x86>
77e6: c9 f7 brne .-14 ; 0x77da <__ultoa_invert+0x5c>
77e8: f6 cf rjmp .-20 ; 0x77d6 <__ultoa_invert+0x58>
77ea: 46 2f mov r20, r22
77ec: 4f 70 andi r20, 0x0F ; 15
77ee: 40 5d subi r20, 0xD0 ; 208
77f0: 4a 33 cpi r20, 0x3A ; 58
77f2: 18 f0 brcs .+6 ; 0x77fa <__ultoa_invert+0x7c>
77f4: 49 5d subi r20, 0xD9 ; 217
77f6: 31 fd sbrc r19, 1
77f8: 40 52 subi r20, 0x20 ; 32
77fa: 41 93 st Z+, r20
77fc: 02 d0 rcall .+4 ; 0x7802 <__ultoa_invert+0x84>
77fe: a9 f7 brne .-22 ; 0x77ea <__ultoa_invert+0x6c>
7800: ea cf rjmp .-44 ; 0x77d6 <__ultoa_invert+0x58>
7802: b4 e0 ldi r27, 0x04 ; 4
7804: a6 95 lsr r26
7806: 97 95 ror r25
7808: 87 95 ror r24
780a: 77 95 ror r23
780c: 67 95 ror r22
780e: ba 95 dec r27
7810: c9 f7 brne .-14 ; 0x7804 <__ultoa_invert+0x86>
7812: 00 97 sbiw r24, 0x00 ; 0
7814: 61 05 cpc r22, r1
7816: 71 05 cpc r23, r1
7818: 08 95 ret
781a: 9b 01 movw r18, r22
781c: ac 01 movw r20, r24
781e: 0a 2e mov r0, r26
7820: 06 94 lsr r0
7822: 57 95 ror r21
7824: 47 95 ror r20
7826: 37 95 ror r19
7828: 27 95 ror r18
782a: ba 95 dec r27
782c: c9 f7 brne .-14 ; 0x7820 <__ultoa_invert+0xa2>
782e: 62 0f add r22, r18
7830: 73 1f adc r23, r19
7832: 84 1f adc r24, r20
7834: 95 1f adc r25, r21
7836: a0 1d adc r26, r0
7838: 08 95 ret
0000783a <_exit>:
783a: f8 94 cli
0000783c <__stop_program>:
783c: ff cf rjmp .-2 ; 0x783c <__stop_program>
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