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88 lines
2.4 KiB
C
88 lines
2.4 KiB
C
3 years ago
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/**
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* \file
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*
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* \brief Generic Clock Controller.
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*
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* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Subject to your compliance with these terms, you may use Microchip
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* software and any derivatives exclusively with Microchip products.
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* It is your responsibility to comply with third party license terms applicable
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* to your use of third party software (including open source software) that
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* may accompany Microchip software.
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*
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* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
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* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
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* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
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* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
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* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
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* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
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* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
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* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
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* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
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* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
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* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
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*
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* \asf_license_stop
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*
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*/
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#ifndef _HPL_GCLK_H_INCLUDED
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#define _HPL_GCLK_H_INCLUDED
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#include <compiler.h>
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#ifdef _UNIT_TEST_
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#include <hri_gclk1_v210_mock.h>
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* \addtogroup gclk_group GCLK Hardware Proxy Layer
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*
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* \section gclk_hpl_rev Revision History
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* - v0.0.0.1 Initial Commit
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*
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*@{
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*/
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/**
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* \name HPL functions
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*/
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//@{
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/**
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* \brief Enable clock on the given channel with the given clock source
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*
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* This function maps the given clock source to the given clock channel
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* and enables channel.
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*
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* \param[in] channel The channel to enable clock for
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* \param[in] source The clock source for the given channel
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*/
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static inline void _gclk_enable_channel(const uint8_t channel, const uint8_t source)
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{
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hri_gclk_write_PCHCTRL_reg(GCLK, channel, source | GCLK_PCHCTRL_CHEN);
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}
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/**
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* \brief Initialize GCLK generators by function references
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* \param[in] bm Bit mapping for referenced generators,
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* a bit 1 in position triggers generator initialization.
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*/
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void _gclk_init_generators_by_fref(uint32_t bm);
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//@}
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/**@}*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* _HPL_GCLK_H_INCLUDED */
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