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400 lines
11 KiB
C
400 lines
11 KiB
C
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/**
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* \file
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*
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* \brief RTC Driver
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*
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* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Subject to your compliance with these terms, you may use Microchip
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* software and any derivatives exclusively with Microchip products.
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* It is your responsibility to comply with third party license terms applicable
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* to your use of third party software (including open source software) that
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* may accompany Microchip software.
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*
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* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
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* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
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* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
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* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
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* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
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* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
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* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
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* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
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* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
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* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
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* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
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*
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* \asf_license_stop
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*
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*/
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#include <hpl_calendar.h>
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#include <utils_assert.h>
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#include <hpl_rtc_config.h>
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/*!< Pointer to hpl device */
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static struct calendar_dev *_rtc_dev = NULL;
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/**
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* \brief Initializes the RTC module with given configurations.
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*/
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int32_t _calendar_init(struct calendar_dev *const dev)
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{
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ASSERT(dev && dev->hw);
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_rtc_dev = dev;
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if (hri_rtcmode0_get_CTRLA_ENABLE_bit(dev->hw)) {
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#if !CONF_RTC_INIT_RESET
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return ERR_DENIED;
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#else
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hri_rtcmode0_clear_CTRLA_ENABLE_bit(dev->hw);
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hri_rtcmode0_wait_for_sync(dev->hw, RTC_MODE0_SYNCBUSY_ENABLE);
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#endif
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}
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hri_rtcmode0_set_CTRLA_SWRST_bit(dev->hw);
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hri_rtcmode0_wait_for_sync(dev->hw, RTC_MODE0_SYNCBUSY_SWRST);
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#if CONF_RTC_EVENT_CONTROL_ENABLE == 1
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hri_rtcmode0_write_EVCTRL_reg(
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dev->hw,
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(CONF_RTC_PEREO0 << RTC_MODE0_EVCTRL_PEREO0_Pos) | (CONF_RTC_PEREO1 << RTC_MODE0_EVCTRL_PEREO1_Pos)
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| (CONF_RTC_PEREO2 << RTC_MODE0_EVCTRL_PEREO2_Pos) | (CONF_RTC_PEREO3 << RTC_MODE0_EVCTRL_PEREO3_Pos)
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| (CONF_RTC_PEREO4 << RTC_MODE0_EVCTRL_PEREO4_Pos) | (CONF_RTC_PEREO5 << RTC_MODE0_EVCTRL_PEREO5_Pos)
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| (CONF_RTC_PEREO6 << RTC_MODE0_EVCTRL_PEREO6_Pos) | (CONF_RTC_PEREO7 << RTC_MODE0_EVCTRL_PEREO7_Pos)
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| (CONF_RTC_COMPE0 << RTC_MODE0_EVCTRL_CMPEO_Pos) | (CONF_RTC_COMPE1 << RTC_MODE0_EVCTRL_CMPEO1_Pos)
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| (CONF_RTC_TAMPEREO << RTC_MODE0_EVCTRL_TAMPEREO_Pos)
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| (CONF_RTC_TAMPEVEI << RTC_MODE0_EVCTRL_TAMPEVEI_Pos) | (CONF_RTC_OVFEO << RTC_MODE0_EVCTRL_OVFEO_Pos));
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#endif
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hri_rtcmode0_write_CTRLA_reg(dev->hw, RTC_MODE0_CTRLA_PRESCALER(CONF_RTC_PRESCALER) | RTC_MODE0_CTRLA_COUNTSYNC);
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hri_rtc_write_TAMPCTRL_reg(
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dev->hw,
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(CONF_RTC_TAMPER_INACT_0 << RTC_TAMPCTRL_IN0ACT_Pos) | (CONF_RTC_TAMPER_INACT_1 << RTC_TAMPCTRL_IN1ACT_Pos)
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| (CONF_RTC_TAMPER_INACT_2 << RTC_TAMPCTRL_IN2ACT_Pos)
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| (CONF_RTC_TAMPER_INACT_3 << RTC_TAMPCTRL_IN3ACT_Pos)
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| (CONF_RTC_TAMPER_INACT_4 << RTC_TAMPCTRL_IN4ACT_Pos) | (CONF_RTC_TAMP_LVL_0 << RTC_TAMPCTRL_TAMLVL0_Pos)
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| (CONF_RTC_TAMP_LVL_1 << RTC_TAMPCTRL_TAMLVL1_Pos) | (CONF_RTC_TAMP_LVL_2 << RTC_TAMPCTRL_TAMLVL2_Pos)
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| (CONF_RTC_TAMP_LVL_3 << RTC_TAMPCTRL_TAMLVL3_Pos) | (CONF_RTC_TAMP_LVL_4 << RTC_TAMPCTRL_TAMLVL4_Pos)
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| (CONF_RTC_TAMP_DEBNC_0 << RTC_TAMPCTRL_DEBNC0_Pos) | (CONF_RTC_TAMP_DEBNC_1 << RTC_TAMPCTRL_DEBNC1_Pos)
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| (CONF_RTC_TAMP_DEBNC_2 << RTC_TAMPCTRL_DEBNC2_Pos) | (CONF_RTC_TAMP_DEBNC_3 << RTC_TAMPCTRL_DEBNC3_Pos)
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| (CONF_RTC_TAMP_DEBNC_4 << RTC_TAMPCTRL_DEBNC4_Pos));
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if ((CONF_RTC_TAMPER_INACT_0 == TAMPER_MODE_ACTL) | (CONF_RTC_TAMPER_INACT_1 == TAMPER_MODE_ACTL)
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| (CONF_RTC_TAMPER_INACT_2 == TAMPER_MODE_ACTL) | (CONF_RTC_TAMPER_INACT_3 == TAMPER_MODE_ACTL)
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| (CONF_RTC_TAMPER_INACT_4 == TAMPER_MODE_ACTL)) {
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hri_rtcmode0_set_CTRLB_RTCOUT_bit(dev->hw);
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}
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return ERR_NONE;
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}
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/**
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* \brief Deinit the RTC module
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*/
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int32_t _calendar_deinit(struct calendar_dev *const dev)
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{
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ASSERT(dev && dev->hw);
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NVIC_DisableIRQ(RTC_IRQn);
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dev->callback = NULL;
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hri_rtcmode0_clear_CTRLA_ENABLE_bit(dev->hw);
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hri_rtcmode0_set_CTRLA_SWRST_bit(dev->hw);
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return ERR_NONE;
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}
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/**
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* \brief Enable the RTC module
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*/
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int32_t _calendar_enable(struct calendar_dev *const dev)
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{
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ASSERT(dev && dev->hw);
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hri_rtcmode0_set_CTRLA_ENABLE_bit(dev->hw);
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return ERR_NONE;
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}
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/**
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* \brief Disable the RTC module
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*/
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int32_t _calendar_disable(struct calendar_dev *const dev)
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{
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ASSERT(dev && dev->hw);
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hri_rtcmode0_clear_CTRLA_ENABLE_bit(dev->hw);
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return ERR_NONE;
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}
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/**
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* \brief Set the current calendar time to desired time.
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*/
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int32_t _calendar_set_counter(struct calendar_dev *const dev, const uint32_t counter)
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{
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ASSERT(dev && dev->hw);
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hri_rtcmode0_write_COUNT_reg(dev->hw, counter);
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return ERR_NONE;
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}
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/**
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* \brief Get current counter
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*/
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uint32_t _calendar_get_counter(struct calendar_dev *const dev)
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{
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ASSERT(dev && dev->hw);
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return hri_rtcmode0_read_COUNT_reg(dev->hw);
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}
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/**
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* \brief Set the compare for the specified value.
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*/
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int32_t _calendar_set_comp(struct calendar_dev *const dev, const uint32_t comp)
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{
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ASSERT(dev && dev->hw);
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hri_rtcmode0_write_COMP_reg(dev->hw, 0, comp);
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return ERR_NONE;
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}
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/**
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* \brief Get the compare value
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*/
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uint32_t _calendar_get_comp(struct calendar_dev *const dev)
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{
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ASSERT(dev && dev->hw);
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return hri_rtcmode0_read_COMP_reg(dev->hw, 0);
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}
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/**
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* \brief Find tamper is detected on specified pin
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*/
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bool _is_tamper_detected(struct calendar_dev *const dev, enum tamper_id tamper_id_pin)
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{
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bool value;
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ASSERT(dev && dev->hw);
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value = ((hri_rtc_read_TAMPID_reg(dev->hw) >> tamper_id_pin) & 0x01);
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return value;
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}
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/**
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* \brief Clear the Tamper ID flag
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*/
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int32_t _tamper_clear_tampid_flag(struct calendar_dev *const dev, enum tamper_id tamper_id_pin)
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{
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ASSERT(dev && dev->hw);
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hri_rtc_write_TAMPID_reg(dev->hw, (true << tamper_id_pin));
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return ERR_NONE;
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}
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/**
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* \brief Enable Tamper Debounce Asynchronous Feature
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*/
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int32_t _tamper_enable_debounce_asynchronous(struct calendar_dev *const dev)
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{
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int32_t return_value;
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hri_rtcmode0_write_CTRLA_ENABLE_bit(dev->hw, false);
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while (hri_rtcmode0_read_SYNCBUSY_reg(dev->hw) & RTC_MODE2_CTRLA_ENABLE) {
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}
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if (hri_rtcmode0_read_CTRLA_reg(dev->hw) & RTC_MODE2_CTRLA_ENABLE) {
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return_value = ERR_FAILURE;
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} else {
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hri_rtcmode0_write_CTRLB_DEBASYNC_bit(dev->hw, true);
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return_value = ERR_NONE;
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while (hri_rtcmode0_read_SYNCBUSY_reg(dev->hw) & RTC_MODE2_CTRLA_ENABLE) {
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}
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hri_rtcmode0_write_CTRLA_ENABLE_bit(dev->hw, true);
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}
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return return_value;
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}
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/**
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* \brief Disable Tamper Debounce Asynchronous Feature
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*/
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int32_t _tamper_disable_debounce_asynchronous(struct calendar_dev *const dev)
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{
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int32_t return_value;
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hri_rtcmode0_write_CTRLA_ENABLE_bit(dev->hw, false);
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while (hri_rtcmode0_read_SYNCBUSY_reg(dev->hw) & RTC_MODE2_CTRLA_ENABLE) {
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}
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if (hri_rtcmode0_read_CTRLA_reg(dev->hw) & RTC_MODE2_CTRLA_ENABLE) {
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return_value = ERR_FAILURE;
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} else {
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hri_rtcmode0_write_CTRLB_DEBASYNC_bit(dev->hw, false);
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return_value = ERR_NONE;
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while (hri_rtcmode0_read_SYNCBUSY_reg(dev->hw) & RTC_MODE2_CTRLA_ENABLE) {
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}
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hri_rtcmode0_write_CTRLA_ENABLE_bit(dev->hw, true);
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}
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return return_value;
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}
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/**
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* \brief Enable Tamper Debounce Majority Feature
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*/
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int32_t _tamper_enable_debounce_majority(struct calendar_dev *const dev)
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{
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int32_t return_value;
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hri_rtcmode0_write_CTRLA_ENABLE_bit(dev->hw, false);
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while (hri_rtcmode0_read_SYNCBUSY_reg(dev->hw) & RTC_MODE2_CTRLA_ENABLE) {
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}
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if (hri_rtcmode0_read_CTRLA_reg(dev->hw) & RTC_MODE2_CTRLA_ENABLE) {
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return_value = ERR_FAILURE;
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} else {
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hri_rtcmode0_write_CTRLB_DEBMAJ_bit(dev->hw, true);
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return_value = ERR_NONE;
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while (hri_rtcmode0_read_SYNCBUSY_reg(dev->hw) & RTC_MODE2_CTRLA_ENABLE) {
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}
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hri_rtcmode0_write_CTRLA_ENABLE_bit(dev->hw, true);
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}
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return return_value;
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}
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/**
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* \brief Disable Tamper Debounce Majority Feature
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*/
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int32_t _tamper_disable_debounce_majority(struct calendar_dev *const dev)
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{
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int32_t return_value;
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hri_rtcmode0_write_CTRLA_ENABLE_bit(dev->hw, false);
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while (hri_rtcmode0_read_SYNCBUSY_reg(dev->hw) & RTC_MODE2_CTRLA_ENABLE) {
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}
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if (hri_rtcmode0_read_CTRLA_reg(dev->hw) & RTC_MODE2_CTRLA_ENABLE) {
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return_value = ERR_FAILURE;
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} else {
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hri_rtcmode0_write_CTRLB_DEBMAJ_bit(dev->hw, false);
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return_value = ERR_NONE;
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while (hri_rtcmode0_read_SYNCBUSY_reg(dev->hw) & RTC_MODE2_CTRLA_ENABLE) {
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}
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hri_rtcmode0_write_CTRLA_ENABLE_bit(dev->hw, true);
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}
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return return_value;
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}
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int32_t _tamper_register_callback(struct calendar_dev *const dev, tamper_drv_cb_t callback_tamper)
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{
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ASSERT(dev && dev->hw);
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/* Check callback */
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if (callback_tamper != NULL) {
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/* register the callback */
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dev->callback_tamper = callback_tamper;
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/* enable RTC_IRQn */
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NVIC_ClearPendingIRQ(RTC_IRQn);
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NVIC_EnableIRQ(RTC_IRQn);
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/* enable tamper interrupt */
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hri_rtcmode0_set_INTEN_TAMPER_bit(dev->hw);
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} else {
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/* disable tamper interrupt */
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hri_rtcmode0_clear_INTEN_TAMPER_bit(dev->hw);
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/* disable RTC_IRQn */
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NVIC_DisableIRQ(RTC_IRQn);
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}
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return ERR_NONE;
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}
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/**
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* \brief Registers callback for the specified callback type
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*/
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int32_t _calendar_register_callback(struct calendar_dev *const dev, calendar_drv_cb_alarm_t callback)
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{
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ASSERT(dev && dev->hw);
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/* Check callback */
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if (callback != NULL) {
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/* register the callback */
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dev->callback = callback;
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/* enable RTC_IRQn */
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NVIC_ClearPendingIRQ(RTC_IRQn);
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NVIC_EnableIRQ(RTC_IRQn);
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/* enable cmp */
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hri_rtcmode0_set_INTEN_CMP0_bit(dev->hw);
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} else {
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/* disable cmp */
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hri_rtcmode0_clear_INTEN_CMP0_bit(dev->hw);
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/* disable RTC_IRQn */
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NVIC_DisableIRQ(RTC_IRQn);
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}
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return ERR_NONE;
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}
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/**
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* \brief RTC interrupt handler
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*
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* \param[in] dev The pointer to calendar device struct
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*/
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static void _rtc_interrupt_handler(struct calendar_dev *dev)
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{
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/* Read and mask interrupt flag register */
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uint16_t interrupt_status = hri_rtcmode0_read_INTFLAG_reg(dev->hw);
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uint16_t interrupt_enabled = hri_rtcmode0_read_INTEN_reg(dev->hw);
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if ((interrupt_status & interrupt_enabled) & RTC_MODE2_INTFLAG_ALARM0) {
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dev->callback(dev);
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/* Clear interrupt flag */
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hri_rtcmode0_clear_interrupt_CMP0_bit(dev->hw);
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} else if ((interrupt_status & interrupt_enabled) & RTC_MODE2_INTFLAG_TAMPER) {
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dev->callback_tamper(dev);
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/* Clear interrupt flag */
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hri_rtcmode0_clear_interrupt_TAMPER_bit(dev->hw);
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}
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}
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/**
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* \brief Set calendar IRQ
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*/
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void _calendar_set_irq(struct calendar_dev *const dev)
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{
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(void)dev;
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NVIC_SetPendingIRQ(RTC_IRQn);
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}
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/**
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* \brief Rtc interrupt handler
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*/
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void RTC_Handler(void)
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{
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_rtc_interrupt_handler(_rtc_dev);
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}
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