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250 lines
8.4 KiB
C
250 lines
8.4 KiB
C
/**
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* \file
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*
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* \brief SPI related functionality declaration.
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*
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* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Subject to your compliance with these terms, you may use Microchip
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* software and any derivatives exclusively with Microchip products.
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* It is your responsibility to comply with third party license terms applicable
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* to your use of third party software (including open source software) that
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* may accompany Microchip software.
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*
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* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
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* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
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* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
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* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
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* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
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* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
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* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
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* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
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* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
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* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
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* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
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*
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* \asf_license_stop
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*
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*/
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#ifndef _HAL_SPI_M_SYNC_H_INCLUDED
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#define _HAL_SPI_M_SYNC_H_INCLUDED
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#include <hal_io.h>
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#include <hpl_spi_m_sync.h>
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/**
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* \addtogroup doc_driver_hal_spi_master_sync
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*
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* @{
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*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** \brief SPI HAL driver struct for polling mode
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*
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*/
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struct spi_m_sync_descriptor {
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struct _spi_m_sync_hpl_interface *func;
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/** SPI device instance */
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struct _spi_sync_dev dev;
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/** I/O read/write */
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struct io_descriptor io;
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/** Flags for HAL driver */
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uint16_t flags;
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};
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/** \brief Set the SPI HAL instance function pointer for HPL APIs.
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*
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* Set SPI HAL instance function pointer for HPL APIs.
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*
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* \param[in] spi Pointer to the HAL SPI instance.
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* \param[in] func Pointer to the HPL api structure.
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*
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*/
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void spi_m_sync_set_func_ptr(struct spi_m_sync_descriptor *spi, void *const func);
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/** \brief Initialize SPI HAL instance and hardware for polling mode
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*
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* Initialize SPI HAL with polling mode.
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*
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* \param[in] spi Pointer to the HAL SPI instance.
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* \param[in] hw Pointer to the hardware base.
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*
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* \return Operation status.
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* \retval ERR_NONE Success.
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* \retval ERR_INVALID_DATA Error, initialized.
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*/
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int32_t spi_m_sync_init(struct spi_m_sync_descriptor *spi, void *const hw);
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/** \brief Deinitialize the SPI HAL instance and hardware
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*
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* Abort transfer, disable and reset SPI, deinit software.
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*
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* \param[in] spi Pointer to the HAL SPI instance.
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*
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* \return Operation status.
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* \retval ERR_NONE Success.
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* \retval <0 Error code.
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*/
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void spi_m_sync_deinit(struct spi_m_sync_descriptor *spi);
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/** \brief Enable SPI
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*
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* \param[in] spi Pointer to the HAL SPI instance.
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*
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* \return Operation status.
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* \retval ERR_NONE Success.
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* \retval <0 Error code.
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*/
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void spi_m_sync_enable(struct spi_m_sync_descriptor *spi);
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/** \brief Disable SPI
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*
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* \param[in] spi Pointer to the HAL SPI instance.
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*
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* \return Operation status.
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* \retval ERR_NONE Success.
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* \retval <0 Error code.
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*/
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void spi_m_sync_disable(struct spi_m_sync_descriptor *spi);
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/** \brief Set SPI baudrate
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*
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* Works if SPI is initialized as master, it sets the baudrate.
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*
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* \param[in] spi Pointer to the HAL SPI instance.
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* \param[in] baud_val The target baudrate value
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* (see "baudrate calculation" for calculating the value).
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*
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* \return Operation status.
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* \retval ERR_NONE Success.
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* \retval ERR_BUSY Busy
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* \retval ERR_INVALID_ARG The baudrate is not supported.
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*/
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int32_t spi_m_sync_set_baudrate(struct spi_m_sync_descriptor *spi, const uint32_t baud_val);
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/** \brief Set SPI mode
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*
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* Set the SPI transfer mode (\ref spi_transfer_mode),
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* which controls the clock polarity and clock phase:
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* - Mode 0: leading edge is rising edge, data sample on leading edge.
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* - Mode 1: leading edge is rising edge, data sample on trailing edge.
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* - Mode 2: leading edge is falling edge, data sample on leading edge.
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* - Mode 3: leading edge is falling edge, data sample on trailing edge.
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*
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* \param[in] spi Pointer to the HAL SPI instance.
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* \param[in] mode The mode (0~3).
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*
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* \return Operation status.
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* \retval ERR_NONE Success.
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* \retval ERR_BUSY Busy
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* \retval ERR_INVALID_ARG The mode is not supported.
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*/
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int32_t spi_m_sync_set_mode(struct spi_m_sync_descriptor *spi, const enum spi_transfer_mode mode);
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/** \brief Set SPI transfer character size in number of bits
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*
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* The character size (\ref spi_char_size) influence the way the data is
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* sent/received.
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* For char size <= 8-bit, data is stored byte by byte.
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* For char size between 9-bit ~ 16-bit, data is stored in 2-byte length.
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* Note that the default and recommended char size is 8-bit since it's
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* supported by all system.
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*
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* \param[in] spi Pointer to the HAL SPI instance.
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* \param[in] char_size The char size (~16, recommended 8).
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*
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* \return Operation status.
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* \retval ERR_NONE Success.
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* \retval ERR_BUSY Busy
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* \retval ERR_INVALID_ARG The char size is not supported.
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*/
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int32_t spi_m_sync_set_char_size(struct spi_m_sync_descriptor *spi, const enum spi_char_size char_size);
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/** \brief Set SPI transfer data order
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*
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* \param[in] spi Pointer to the HAL SPI instance.
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* \param[in] dord The data order: send LSB/MSB first.
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*
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* \return Operation status.
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* \retval ERR_NONE Success.
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* \retval ERR_BUSY Busy
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* \retval ERR_INVALID_ARG The data order is not supported.
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*/
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int32_t spi_m_sync_set_data_order(struct spi_m_sync_descriptor *spi, const enum spi_data_order dord);
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/** \brief Perform the SPI data transfer (TX and RX) in polling way
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*
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* Activate CS, do TX and RX and deactivate CS. It blocks.
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*
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* \param[in, out] spi Pointer to the HAL SPI instance.
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* \param[in] xfer Pointer to the transfer information (\ref spi_xfer).
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*
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* \retval size Success.
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* \retval >=0 Timeout, with number of characters transferred.
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* \retval ERR_BUSY SPI is busy
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*/
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int32_t spi_m_sync_transfer(struct spi_m_sync_descriptor *spi, const struct spi_xfer *xfer);
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/**
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* \brief Return the I/O descriptor for this SPI instance
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*
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* This function will return an I/O instance for this SPI driver instance.
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*
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* \param[in] spi An SPI master descriptor, which is used to communicate through
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* SPI
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* \param[in, out] io A pointer to an I/O descriptor pointer type
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*
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* \retval ERR_NONE
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*/
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int32_t spi_m_sync_get_io_descriptor(struct spi_m_sync_descriptor *const spi, struct io_descriptor **io);
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/** \brief Retrieve the current driver version
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*
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* \return Current driver version.
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*/
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uint32_t spi_m_sync_get_version(void);
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/**@}*/
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bool spi_m_sync_send_cmd(struct spi_m_sync_descriptor* spi, uint32_t cmd,
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uint32_t arg);
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bool spi_m_sync_adtc_start(struct spi_m_sync_descriptor* spi,
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uint32_t cmd, uint32_t arg, uint16_t block_size,
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uint16_t nb_block, bool access_block);
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bool spi_m_sync_start_read_blocks(struct spi_m_sync_descriptor* spi,
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void *dst, uint16_t nb_block);
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bool spi_m_sync_start_write_blocks(struct spi_m_sync_descriptor* spi,
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const void *src, uint16_t nb_block);
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bool spi_m_sync_wait_end_of_write_blocks(struct spi_m_sync_descriptor* spi);
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bool spi_m_sync_wait_end_of_read_blocks(struct spi_m_sync_descriptor* spi);
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bool spi_m_sync_write_word(struct spi_m_sync_descriptor* spi,
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uint32_t value);
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bool spi_m_sync_read_word(struct spi_m_sync_descriptor* spi, uint32_t* value);
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uint32_t spi_m_sync_get_response(struct spi_m_sync_descriptor* spi);
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void spi_m_sync_get_response_128(struct spi_m_sync_descriptor* spi, uint8_t* response);
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void spi_m_sync_send_clock(struct spi_m_sync_descriptor* spi);
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int32_t spi_m_sync_select_device(struct spi_m_sync_descriptor* spi, uint8_t slot, uint32_t clock, uint8_t bus_width, bool high_speed);
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int32_t spi_m_sync_deselect_device(struct spi_m_sync_descriptor* spi,
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uint8_t slot);
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bool spi_m_sync_is_high_speed_capable(struct spi_m_sync_descriptor* spi);
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uint8_t spi_m_sync_get_bus_width(struct spi_m_sync_descriptor* spi, uint8_t slot);
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#ifdef __cplusplus
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}
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#endif
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#endif /* ifndef _HAL_SPI_M_SYNC_H_INCLUDED */
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