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GFX-Development-Board/software/Adafruit_Metro_M4_Grand_Cen.../build/metro-m4.lss

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metro-m4.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 00005178 00000000 00000000 00010000 2**4
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .relocate 00000074 20000000 00005178 00020000 2**2
CONTENTS, ALLOC, LOAD, DATA
2 .bkupram 00000000 47000000 47000000 00020074 2**0
CONTENTS
3 .qspi 00000000 04000000 04000000 00020074 2**0
CONTENTS
4 .bss 00000568 20000078 000051f0 00020074 2**3
ALLOC
5 .stack 00010000 200005e0 00005758 00020074 2**0
ALLOC
6 .ARM.attributes 0000002e 00000000 00000000 00020074 2**0
CONTENTS, READONLY
7 .comment 0000001e 00000000 00000000 000200a2 2**0
CONTENTS, READONLY
8 .debug_info 0003fe8d 00000000 00000000 000200c0 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
9 .debug_abbrev 00005e1c 00000000 00000000 0005ff4d 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
10 .debug_loc 00016121 00000000 00000000 00065d69 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
11 .debug_aranges 00001228 00000000 00000000 0007be8a 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
12 .debug_ranges 00003520 00000000 00000000 0007d0b2 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
13 .debug_macro 0003794d 00000000 00000000 000805d2 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
14 .debug_line 00025d97 00000000 00000000 000b7f1f 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
15 .debug_str 001104c5 00000000 00000000 000ddcb6 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
16 .debug_frame 00003a5c 00000000 00000000 001ee17c 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
00000000 <exception_table>:
0: e0 05 01 20 4d 3f 00 00 49 3f 00 00 49 3f 00 00 ... M?..I?..I?..
10: 49 3f 00 00 49 3f 00 00 49 3f 00 00 00 00 00 00 I?..I?..I?......
...
2c: 49 3f 00 00 49 3f 00 00 00 00 00 00 49 3f 00 00 I?..I?......I?..
3c: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
4c: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
5c: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
6c: 25 36 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 %6..I?..I?..I?..
7c: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
8c: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
9c: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
ac: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
bc: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
cc: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
dc: 49 3f 00 00 49 3f 00 00 49 3f 00 00 00 00 00 00 I?..I?..I?......
...
f4: d9 2b 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 .+..I?..I?..I?..
104: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
114: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
124: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
134: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
144: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
154: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
164: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
174: 49 3f 00 00 00 00 00 00 00 00 00 00 35 28 00 00 I?..........5(..
184: 3d 28 00 00 45 28 00 00 4d 28 00 00 00 00 00 00 =(..E(..M(......
194: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
1a4: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
1b4: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
1c4: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
1d4: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
1e4: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
1f4: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
204: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
214: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
224: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
234: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
244: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
254: 49 3f 00 00 49 3f 00 00 49 3f 00 00 49 3f 00 00 I?..I?..I?..I?..
00000264 <__do_global_dtors_aux>:
264: b510 push {r4, lr}
266: 4c05 ldr r4, [pc, #20] ; (27c <__do_global_dtors_aux+0x18>)
268: 7823 ldrb r3, [r4, #0]
26a: b933 cbnz r3, 27a <__do_global_dtors_aux+0x16>
26c: 4b04 ldr r3, [pc, #16] ; (280 <__do_global_dtors_aux+0x1c>)
26e: b113 cbz r3, 276 <__do_global_dtors_aux+0x12>
270: 4804 ldr r0, [pc, #16] ; (284 <__do_global_dtors_aux+0x20>)
272: f3af 8000 nop.w
276: 2301 movs r3, #1
278: 7023 strb r3, [r4, #0]
27a: bd10 pop {r4, pc}
27c: 20000078 .word 0x20000078
280: 00000000 .word 0x00000000
284: 00005178 .word 0x00005178
00000288 <frame_dummy>:
288: b508 push {r3, lr}
28a: 4b03 ldr r3, [pc, #12] ; (298 <frame_dummy+0x10>)
28c: b11b cbz r3, 296 <frame_dummy+0xe>
28e: 4903 ldr r1, [pc, #12] ; (29c <frame_dummy+0x14>)
290: 4803 ldr r0, [pc, #12] ; (2a0 <frame_dummy+0x18>)
292: f3af 8000 nop.w
296: bd08 pop {r3, pc}
298: 00000000 .word 0x00000000
29c: 2000007c .word 0x2000007c
2a0: 00005178 .word 0x00005178
000002a4 <io_write>:
/**
* \brief I/O write interface
*/
int32_t io_write(struct io_descriptor *const io_descr, const uint8_t *const buf, const uint16_t length)
{
2a4: b570 push {r4, r5, r6, lr}
2a6: 460d mov r5, r1
2a8: 4616 mov r6, r2
ASSERT(io_descr && buf);
2aa: 4604 mov r4, r0
2ac: b110 cbz r0, 2b4 <io_write+0x10>
2ae: 1e08 subs r0, r1, #0
2b0: bf18 it ne
2b2: 2001 movne r0, #1
2b4: 4905 ldr r1, [pc, #20] ; (2cc <io_write+0x28>)
2b6: 4b06 ldr r3, [pc, #24] ; (2d0 <io_write+0x2c>)
2b8: 2234 movs r2, #52 ; 0x34
2ba: 4798 blx r3
return io_descr->write(io_descr, buf, length);
2bc: 6823 ldr r3, [r4, #0]
2be: 4632 mov r2, r6
2c0: 4629 mov r1, r5
2c2: 4620 mov r0, r4
}
2c4: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
return io_descr->write(io_descr, buf, length);
2c8: 4718 bx r3
2ca: bf00 nop
2cc: 00004a14 .word 0x00004a14
2d0: 00002939 .word 0x00002939
000002d4 <_qspi_sync_init>:
{
hri_qspi_write_CTRLA_reg(hw, QSPI_CTRLA_ENABLE | QSPI_CTRLA_LASTXFER);
}
int32_t _qspi_sync_init(struct _qspi_sync_dev *dev, void *const hw)
{
2d4: b538 push {r3, r4, r5, lr}
2d6: 460c mov r4, r1
ASSERT(dev && hw);
2d8: 4605 mov r5, r0
2da: b110 cbz r0, 2e2 <_qspi_sync_init+0xe>
2dc: 1e08 subs r0, r1, #0
2de: bf18 it ne
2e0: 2001 movne r0, #1
2e2: 4907 ldr r1, [pc, #28] ; (300 <_qspi_sync_init+0x2c>)
2e4: 4b07 ldr r3, [pc, #28] ; (304 <_qspi_sync_init+0x30>)
2e6: 2240 movs r2, #64 ; 0x40
2e8: 4798 blx r3
}
static inline void hri_qspi_write_CTRLA_reg(const void *const hw, hri_qspi_ctrla_reg_t data)
{
QSPI_CRITICAL_SECTION_ENTER();
((Qspi *)hw)->CTRLA.reg = data;
2ea: 2301 movs r3, #1
dev->prvt = hw;
2ec: 602c str r4, [r5, #0]
2ee: 6023 str r3, [r4, #0]
}
static inline void hri_qspi_write_CTRLB_reg(const void *const hw, hri_qspi_ctrlb_reg_t data)
{
QSPI_CRITICAL_SECTION_ENTER();
((Qspi *)hw)->CTRLB.reg = data;
2f0: 2311 movs r3, #17
2f2: 6063 str r3, [r4, #4]
}
static inline void hri_qspi_write_BAUD_reg(const void *const hw, hri_qspi_baud_reg_t data)
{
QSPI_CRITICAL_SECTION_ENTER();
((Qspi *)hw)->BAUD.reg = data;
2f4: f44f 43fc mov.w r3, #32256 ; 0x7e00
2f8: 60a3 str r3, [r4, #8]
hri_qspi_write_BAUD_reg(hw,
CONF_QSPI_CPOL << QSPI_BAUD_CPOL_Pos | CONF_QSPI_CPHA << QSPI_BAUD_CPHA_Pos
| QSPI_BAUD_BAUD(CONF_QSPI_BAUD_RATE) | QSPI_BAUD_DLYBS(CONF_QSPI_DLYBS));
return ERR_NONE;
}
2fa: 2000 movs r0, #0
2fc: bd38 pop {r3, r4, r5, pc}
2fe: bf00 nop
300: 00004a28 .word 0x00004a28
304: 00002939 .word 0x00002939
00000308 <calendar_init>:
}
/** \brief Initialize Calendar
*/
int32_t calendar_init(struct calendar_descriptor *const calendar, const void *hw)
{
308: b538 push {r3, r4, r5, lr}
int32_t ret = 0;
/* Sanity check arguments */
ASSERT(calendar);
30a: 4604 mov r4, r0
30c: 3800 subs r0, #0
30e: 4b0c ldr r3, [pc, #48] ; (340 <calendar_init+0x38>)
{
310: 460d mov r5, r1
ASSERT(calendar);
312: bf18 it ne
314: 2001 movne r0, #1
316: 490b ldr r1, [pc, #44] ; (344 <calendar_init+0x3c>)
318: f44f 72e0 mov.w r2, #448 ; 0x1c0
31c: 4798 blx r3
if (calendar->device.hw == hw) {
31e: 6823 ldr r3, [r4, #0]
320: 42ab cmp r3, r5
322: d008 beq.n 336 <calendar_init+0x2e>
/* Already initialized with current configuration */
return ERR_NONE;
} else if (calendar->device.hw != NULL) {
324: b94b cbnz r3, 33a <calendar_init+0x32>
/* Initialized with another configuration */
return ERR_ALREADY_INITIALIZED;
}
calendar->device.hw = (void *)hw;
ret = _calendar_init(&calendar->device);
326: 4b08 ldr r3, [pc, #32] ; (348 <calendar_init+0x40>)
calendar->device.hw = (void *)hw;
328: 6025 str r5, [r4, #0]
ret = _calendar_init(&calendar->device);
32a: 4620 mov r0, r4
32c: 4798 blx r3
calendar->base_year = DEFAULT_BASE_YEAR;
32e: f240 73b2 movw r3, #1970 ; 0x7b2
332: 61a3 str r3, [r4, #24]
return ret;
}
334: bd38 pop {r3, r4, r5, pc}
return ERR_NONE;
336: 2000 movs r0, #0
338: e7fc b.n 334 <calendar_init+0x2c>
return ERR_ALREADY_INITIALIZED;
33a: f06f 0011 mvn.w r0, #17
33e: e7f9 b.n 334 <calendar_init+0x2c>
340: 00002939 .word 0x00002939
344: 00004a3f .word 0x00004a3f
348: 000035a9 .word 0x000035a9
0000034c <cdchf_acm_read_done>:
/** \internal
* \brief Reading done
*/
void cdchf_acm_read_done(struct usb_h_pipe *pipe)
{
34c: 4603 mov r3, r0
struct cdchf_acm *cdc = CDCHF_ACM_PTR(pipe->owner);
34e: 6880 ldr r0, [r0, #8]
cdc->is_reading = false;
350: 7b42 ldrb r2, [r0, #13]
352: f36f 1204 bfc r2, #4, #1
356: 7342 strb r2, [r0, #13]
if (pipe->x.general.status != USB_H_OK) {
358: f993 2027 ldrsb.w r2, [r3, #39] ; 0x27
35c: b12a cbz r2, 36a <cdchf_acm_read_done+0x1e>
cdc->is_error = cdc->is_open;
35e: 7b42 ldrb r2, [r0, #13]
360: f3c2 01c0 ubfx r1, r2, #3, #1
364: f361 12c7 bfi r2, r1, #7, #1
368: 7342 strb r2, [r0, #13]
}
if (cdc->read_cb) {
36a: 69c2 ldr r2, [r0, #28]
36c: b10a cbz r2, 372 <cdchf_acm_read_done+0x26>
cdc->read_cb(cdc, pipe->x.bii.count);
36e: 6999 ldr r1, [r3, #24]
370: 4710 bx r2
}
}
372: 4770 bx lr
00000374 <cdchf_acm_write_done>:
/** \internal
* \brief Writing done
*/
void cdchf_acm_write_done(struct usb_h_pipe *pipe)
{
374: 4603 mov r3, r0
struct cdchf_acm *cdc = CDCHF_ACM_PTR(pipe->owner);
376: 6880 ldr r0, [r0, #8]
cdc->is_writing = false;
378: 7b42 ldrb r2, [r0, #13]
37a: f36f 1245 bfc r2, #5, #1
37e: 7342 strb r2, [r0, #13]
if (pipe->x.general.status != USB_H_OK) {
380: f993 2027 ldrsb.w r2, [r3, #39] ; 0x27
384: b12a cbz r2, 392 <cdchf_acm_write_done+0x1e>
cdc->is_error = cdc->is_open;
386: 7b42 ldrb r2, [r0, #13]
388: f3c2 01c0 ubfx r1, r2, #3, #1
38c: f361 12c7 bfi r2, r1, #7, #1
390: 7342 strb r2, [r0, #13]
}
if (cdc->write_cb) {
392: 6a02 ldr r2, [r0, #32]
394: b10a cbz r2, 39a <cdchf_acm_write_done+0x26>
cdc->write_cb(cdc, pipe->x.bii.count);
396: 6999 ldr r1, [r3, #24]
398: 4710 bx r2
}
}
39a: 4770 bx lr
0000039c <cdchf_acm_set_control>:
}
return ERR_NONE;
}
static int32_t cdchf_acm_set_control(struct usbhc_driver *core, struct cdchf_acm *cdc, uint16_t val)
{
39c: b5f8 push {r3, r4, r5, r6, r7, lr}
39e: 460d mov r5, r1
struct usb_req *req = (struct usb_req *)core->ctrl_buf;
3a0: 6b84 ldr r4, [r0, #56] ; 0x38
usbhd_take_control(cdc->func.pdev, NULL);
3a2: 4b11 ldr r3, [pc, #68] ; (3e8 <cdchf_acm_set_control+0x4c>)
{
3a4: 4606 mov r6, r0
3a6: 4617 mov r7, r2
usbhd_take_control(cdc->func.pdev, NULL);
3a8: 2100 movs r1, #0
3aa: 2202 movs r2, #2
3ac: 68a8 ldr r0, [r5, #8]
3ae: 4798 blx r3
* \param[in] iface Interface Number
* \param[in] ctrl Control Signal Bitmap
*/
static inline void usb_fill_SetControlLineState_req(struct usb_req *req, uint8_t iface, uint16_t ctrl)
{
req->bmRequestType = 0x21;
3b0: 2221 movs r2, #33 ; 0x21
usb_fill_SetControlLineState_req(req, (uint8_t)cdc->iface, val);
3b2: 7b2b ldrb r3, [r5, #12]
3b4: 7022 strb r2, [r4, #0]
req->bRequest = USB_REQ_CDC_SET_CONTROL_LINE_STATE;
3b6: 2222 movs r2, #34 ; 0x22
3b8: 7062 strb r2, [r4, #1]
req->wValue = ctrl;
req->wIndex = iface;
req->wLength = 0;
3ba: 2200 movs r2, #0
req->wIndex = iface;
3bc: 80a3 strh r3, [r4, #4]
req->wValue = ctrl;
3be: 8067 strh r7, [r4, #2]
if (usbhc_request(core, (uint8_t *)req, NULL) != ERR_NONE) {
3c0: 4b0a ldr r3, [pc, #40] ; (3ec <cdchf_acm_set_control+0x50>)
req->wLength = 0;
3c2: 71a2 strb r2, [r4, #6]
3c4: 71e2 strb r2, [r4, #7]
3c6: 4621 mov r1, r4
3c8: 4630 mov r0, r6
3ca: 4798 blx r3
3cc: b150 cbz r0, 3e4 <cdchf_acm_set_control+0x48>
usbhc_release_control(core);
3ce: 4b08 ldr r3, [pc, #32] ; (3f0 <cdchf_acm_set_control+0x54>)
3d0: 4630 mov r0, r6
3d2: 4798 blx r3
cdc->is_error = true;
cdc->is_requesting = false;
3d4: 7b6b ldrb r3, [r5, #13]
3d6: f003 037b and.w r3, r3, #123 ; 0x7b
3da: f063 037f orn r3, r3, #127 ; 0x7f
3de: 736b strb r3, [r5, #13]
return ERR_IO;
3e0: f06f 0005 mvn.w r0, #5
}
return ERR_NONE;
}
3e4: bdf8 pop {r3, r4, r5, r6, r7, pc}
3e6: bf00 nop
3e8: 00003245 .word 0x00003245
3ec: 00002d21 .word 0x00002d21
3f0: 00002d4d .word 0x00002d4d
000003f4 <cdchf_acm_sof>:
if (hdl->func != (FUNC_PTR)cdchf_acm_sof) {
3f4: 684a ldr r2, [r1, #4]
3f6: 4b1f ldr r3, [pc, #124] ; (474 <cdchf_acm_sof+0x80>)
3f8: 429a cmp r2, r3
{
3fa: b570 push {r4, r5, r6, lr}
3fc: 4605 mov r5, r0
if (hdl->func != (FUNC_PTR)cdchf_acm_sof) {
3fe: d137 bne.n 470 <cdchf_acm_sof+0x7c>
400: 688c ldr r4, [r1, #8]
if (cdc->is_reading) {
402: 7b62 ldrb r2, [r4, #13]
404: 06d1 lsls r1, r2, #27
406: d50e bpl.n 426 <cdchf_acm_sof+0x32>
if (cdc->rx_count == cdc->pipe_in->x.bii.count) {
408: 6920 ldr r0, [r4, #16]
40a: 6b21 ldr r1, [r4, #48] ; 0x30
40c: 6983 ldr r3, [r0, #24]
40e: 4299 cmp r1, r3
410: d126 bne.n 460 <cdchf_acm_sof+0x6c>
cdc->rx_to--;
412: 8f23 ldrh r3, [r4, #56] ; 0x38
414: 3b01 subs r3, #1
416: b29b uxth r3, r3
418: 8723 strh r3, [r4, #56] ; 0x38
if (cdc->rx_to == 0) {
41a: b923 cbnz r3, 426 <cdchf_acm_sof+0x32>
cdc->is_reading = false;
41c: f363 1204 bfi r2, r3, #4, #1
420: 7362 strb r2, [r4, #13]
*
* @return Operation result status
*/
static inline void usb_h_pipe_abort(struct usb_h_pipe *pipe)
{
_usb_h_pipe_abort(pipe);
422: 4b15 ldr r3, [pc, #84] ; (478 <cdchf_acm_sof+0x84>)
424: 4798 blx r3
if (cdc->is_writing) {
426: 7b62 ldrb r2, [r4, #13]
428: 0693 lsls r3, r2, #26
42a: d50e bpl.n 44a <cdchf_acm_sof+0x56>
if (cdc->tx_count == cdc->pipe_out->x.bii.count) {
42c: 6960 ldr r0, [r4, #20]
42e: 6b61 ldr r1, [r4, #52] ; 0x34
430: 6983 ldr r3, [r0, #24]
432: 4299 cmp r1, r3
434: d118 bne.n 468 <cdchf_acm_sof+0x74>
cdc->tx_to--;
436: 8f63 ldrh r3, [r4, #58] ; 0x3a
438: 3b01 subs r3, #1
43a: b29b uxth r3, r3
43c: 8763 strh r3, [r4, #58] ; 0x3a
if (cdc->tx_to == 0) {
43e: b923 cbnz r3, 44a <cdchf_acm_sof+0x56>
cdc->is_writing = false;
440: f363 1245 bfi r2, r3, #5, #1
444: 7362 strb r2, [r4, #13]
446: 4b0c ldr r3, [pc, #48] ; (478 <cdchf_acm_sof+0x84>)
448: 4798 blx r3
if (!cdc->is_reading && !cdc->is_writing) {
44a: 7b61 ldrb r1, [r4, #13]
44c: f011 0130 ands.w r1, r1, #48 ; 0x30
450: d10e bne.n 470 <cdchf_acm_sof+0x7c>
usbhc_unregister_handler(core, USBHC_HDL_SOF, USBHC_HDL_PTR(&cdc->sof_hdl));
452: f104 0224 add.w r2, r4, #36 ; 0x24
456: 4628 mov r0, r5
458: 4b08 ldr r3, [pc, #32] ; (47c <cdchf_acm_sof+0x88>)
}
45a: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
usbhc_unregister_handler(core, USBHC_HDL_SOF, USBHC_HDL_PTR(&cdc->sof_hdl));
45e: 4718 bx r3
cdc->rx_count = cdc->pipe_in->x.bii.count;
460: 6323 str r3, [r4, #48] ; 0x30
cdc->rx_to = CONF_CDCHF_ACM_RD_TO;
462: 2364 movs r3, #100 ; 0x64
464: 8723 strh r3, [r4, #56] ; 0x38
466: e7de b.n 426 <cdchf_acm_sof+0x32>
cdc->tx_count = cdc->pipe_out->x.bii.count;
468: 6363 str r3, [r4, #52] ; 0x34
cdc->tx_to = CONF_CDCHF_ACM_WR_TO;
46a: 2364 movs r3, #100 ; 0x64
46c: 8763 strh r3, [r4, #58] ; 0x3a
46e: e7ec b.n 44a <cdchf_acm_sof+0x56>
}
470: bd70 pop {r4, r5, r6, pc}
472: bf00 nop
474: 000003f5 .word 0x000003f5
478: 000027f5 .word 0x000027f5
47c: 00003421 .word 0x00003421
00000480 <cdchf_acm_req_done>:
cdc->ctrl_cb(cdc);
}
}
static void cdchf_acm_req_done(struct usbhd_driver *dev, struct usb_h_pipe *pipe)
{
480: b570 push {r4, r5, r6, lr}
struct usb_req * req = (struct usb_req *)pipe->x.ctrl.setup;
struct cdchf_acm *cdc = CDCHF_ACM_PTR(dev->func.pfunc);
if (dev->dev_addr != pipe->dev) {
482: 7b42 ldrb r2, [r0, #13]
484: 7b8b ldrb r3, [r1, #14]
486: 429a cmp r2, r3
{
488: 460d mov r5, r1
if (dev->dev_addr != pipe->dev) {
48a: d10b bne.n 4a4 <cdchf_acm_req_done+0x24>
return;
}
if (!dev->status.bm.usable) {
48c: 7c03 ldrb r3, [r0, #16]
48e: 06db lsls r3, r3, #27
490: d508 bpl.n 4a4 <cdchf_acm_req_done+0x24>
struct usb_req * req = (struct usb_req *)pipe->x.ctrl.setup;
492: 698b ldr r3, [r1, #24]
return;
}
if (req->bRequest != USB_REQ_CDC_SET_LINE_CODING && req->bRequest != USB_REQ_CDC_SET_CONTROL_LINE_STATE) {
494: 785a ldrb r2, [r3, #1]
496: f002 01fd and.w r1, r2, #253 ; 0xfd
49a: 2920 cmp r1, #32
49c: d102 bne.n 4a4 <cdchf_acm_req_done+0x24>
struct cdchf_acm *cdc = CDCHF_ACM_PTR(dev->func.pfunc);
49e: 6844 ldr r4, [r0, #4]
return;
}
while (cdc) {
if (cdc->func.ctrl != cdchf_acm_ctrl) {
4a0: 4821 ldr r0, [pc, #132] ; (528 <cdchf_acm_req_done+0xa8>)
while (cdc) {
4a2: b904 cbnz r4, 4a6 <cdchf_acm_req_done+0x26>
} else { /* USB_REQ_CDC_SET_CONTROL_LINE_STATE */
cdchf_acm_set_control_done(pipe, cdc, req->wValue);
return;
}
}
}
4a4: bd70 pop {r4, r5, r6, pc}
if (cdc->func.ctrl != cdchf_acm_ctrl) {
4a6: 6861 ldr r1, [r4, #4]
4a8: 4281 cmp r1, r0
4aa: d001 beq.n 4b0 <cdchf_acm_req_done+0x30>
cdc = CDCHF_ACM_PTR(cdc->func.next.pfunc);
4ac: 6824 ldr r4, [r4, #0]
continue;
4ae: e7f8 b.n 4a2 <cdchf_acm_req_done+0x22>
if (cdc->iface != req->wIndex && cdc->iface_data != req->wIndex) {
4b0: 8899 ldrh r1, [r3, #4]
4b2: f994 600c ldrsb.w r6, [r4, #12]
4b6: 428e cmp r6, r1
4b8: d003 beq.n 4c2 <cdchf_acm_req_done+0x42>
4ba: f994 600e ldrsb.w r6, [r4, #14]
4be: 42b1 cmp r1, r6
4c0: d1f4 bne.n 4ac <cdchf_acm_req_done+0x2c>
if (req->bRequest == USB_REQ_CDC_SET_LINE_CODING) {
4c2: 2a20 cmp r2, #32
4c4: d11b bne.n 4fe <cdchf_acm_req_done+0x7e>
struct usbhc_driver *core = usbhf_get_core(cdc);
4c6: 4b19 ldr r3, [pc, #100] ; (52c <cdchf_acm_req_done+0xac>)
4c8: 4620 mov r0, r4
4ca: 4798 blx r3
4cc: 4b18 ldr r3, [pc, #96] ; (530 <cdchf_acm_req_done+0xb0>)
4ce: 4798 blx r3
if (pipe->x.general.status != USB_H_OK) {
4d0: f995 3027 ldrsb.w r3, [r5, #39] ; 0x27
4d4: b133 cbz r3, 4e4 <cdchf_acm_req_done+0x64>
cdc->is_requesting = false;
4d6: 7b63 ldrb r3, [r4, #13]
4d8: f003 037b and.w r3, r3, #123 ; 0x7b
4dc: f063 037f orn r3, r3, #127 ; 0x7f
cdc->is_requesting = false;
4e0: 7363 strb r3, [r4, #13]
4e2: e005 b.n 4f0 <cdchf_acm_req_done+0x70>
} else if (ERR_NONE != cdchf_acm_set_control(core, cdc, CDC_CTRL_SIGNAL_DTE_PRESENT)) {
4e4: 4b13 ldr r3, [pc, #76] ; (534 <cdchf_acm_req_done+0xb4>)
4e6: 2201 movs r2, #1
4e8: 4621 mov r1, r4
4ea: 4798 blx r3
4ec: 2800 cmp r0, #0
4ee: d0d9 beq.n 4a4 <cdchf_acm_req_done+0x24>
if (cdc->ctrl_cb) {
4f0: 69a3 ldr r3, [r4, #24]
4f2: 2b00 cmp r3, #0
4f4: d0d6 beq.n 4a4 <cdchf_acm_req_done+0x24>
cdc->ctrl_cb(cdc);
4f6: 4620 mov r0, r4
}
4f8: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
cdc->ctrl_cb(cdc);
4fc: 4718 bx r3
if (pipe->x.general.status != USB_H_OK) {
4fe: f995 2027 ldrsb.w r2, [r5, #39] ; 0x27
502: b13a cbz r2, 514 <cdchf_acm_req_done+0x94>
cdc->is_error = true;
504: 7b63 ldrb r3, [r4, #13]
506: f043 0380 orr.w r3, r3, #128 ; 0x80
cdc->is_open = false;
50a: 7363 strb r3, [r4, #13]
cdc->is_requesting = false;
50c: 7b63 ldrb r3, [r4, #13]
50e: f36f 0382 bfc r3, #2, #1
512: e7e5 b.n 4e0 <cdchf_acm_req_done+0x60>
cdchf_acm_set_control_done(pipe, cdc, req->wValue);
514: 885b ldrh r3, [r3, #2]
} else if (val & CDC_CTRL_SIGNAL_DTE_PRESENT) {
516: f013 0201 ands.w r2, r3, #1
51a: 7b63 ldrb r3, [r4, #13]
cdc->is_open = true;
51c: bf14 ite ne
51e: f043 0308 orrne.w r3, r3, #8
cdc->is_open = false;
522: f362 03c3 bfieq r3, r2, #3, #1
526: e7f0 b.n 50a <cdchf_acm_req_done+0x8a>
528: 000005e5 .word 0x000005e5
52c: 000034b1 .word 0x000034b1
530: 00003491 .word 0x00003491
534: 0000039d .word 0x0000039d
00000538 <cdchf_acm_uninstall>:
/** \brief Uninstall the CDC function driver
* \param cdc Pointer to the CDC function driver instance
*/
static inline void cdchf_acm_uninstall(struct cdchf_acm *cdc)
{
538: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
53c: 4604 mov r4, r0
cdchf_acm_cb_t ctrl_cb;
if (cdc->pipe_in) {
53e: 6900 ldr r0, [r0, #16]
540: b130 cbz r0, 550 <cdchf_acm_uninstall+0x18>
542: 4b21 ldr r3, [pc, #132] ; (5c8 <cdchf_acm_uninstall+0x90>)
544: 4798 blx r3
return _usb_h_pipe_free(pipe);
546: 4b21 ldr r3, [pc, #132] ; (5cc <cdchf_acm_uninstall+0x94>)
548: 6920 ldr r0, [r4, #16]
54a: 4798 blx r3
usb_h_pipe_abort(cdc->pipe_in);
usb_h_pipe_free(cdc->pipe_in);
cdc->pipe_in = NULL;
54c: 2300 movs r3, #0
54e: 6123 str r3, [r4, #16]
}
if (cdc->pipe_out) {
550: 6960 ldr r0, [r4, #20]
552: b130 cbz r0, 562 <cdchf_acm_uninstall+0x2a>
_usb_h_pipe_abort(pipe);
554: 4b1c ldr r3, [pc, #112] ; (5c8 <cdchf_acm_uninstall+0x90>)
556: 4798 blx r3
return _usb_h_pipe_free(pipe);
558: 4b1c ldr r3, [pc, #112] ; (5cc <cdchf_acm_uninstall+0x94>)
55a: 6960 ldr r0, [r4, #20]
55c: 4798 blx r3
usb_h_pipe_abort(cdc->pipe_out);
usb_h_pipe_free(cdc->pipe_out);
cdc->pipe_out = NULL;
55e: 2300 movs r3, #0
560: 6163 str r3, [r4, #20]
}
if (!cdc->is_enabled) {
562: 7b63 ldrb r3, [r4, #13]
564: 4e1a ldr r6, [pc, #104] ; (5d0 <cdchf_acm_uninstall+0x98>)
566: f013 0f02 tst.w r3, #2
56a: f3c3 0140 ubfx r1, r3, #1, #1
memset(&cdc->iface, 0, sizeof(struct cdchf_acm) - sizeof(struct usbhf_driver));
56e: f104 070c add.w r7, r4, #12
if (!cdc->is_enabled) {
572: d107 bne.n 584 <cdchf_acm_uninstall+0x4c>
memset(&cdc->iface, 0, sizeof(struct cdchf_acm) - sizeof(struct usbhf_driver));
574: 2230 movs r2, #48 ; 0x30
576: 4638 mov r0, r7
578: 47b0 blx r6
cdc->iface = -1;
57a: 23ff movs r3, #255 ; 0xff
57c: 7323 strb r3, [r4, #12]
cdc->iface_data = -1;
57e: 73a3 strb r3, [r4, #14]
ctrl_cb = cdc->ctrl_cb;
cdchf_acm_reset(cdc);
if (ctrl_cb) {
ctrl_cb(cdc);
}
}
580: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
usbhc_unregister_handler(usbhf_get_core(cdc), USBHC_HDL_REQ, &cdchf_acm_req_hdl);
584: f8df 9054 ldr.w r9, [pc, #84] ; 5dc <cdchf_acm_uninstall+0xa4>
588: f8df 8054 ldr.w r8, [pc, #84] ; 5e0 <cdchf_acm_uninstall+0xa8>
58c: 4d11 ldr r5, [pc, #68] ; (5d4 <cdchf_acm_uninstall+0x9c>)
58e: 4620 mov r0, r4
590: 47c8 blx r9
592: 47c0 blx r8
594: 4a10 ldr r2, [pc, #64] ; (5d8 <cdchf_acm_uninstall+0xa0>)
596: 2102 movs r1, #2
598: 47a8 blx r5
usbhc_unregister_handler(usbhf_get_core(cdc), USBHC_HDL_SOF, USBHC_HDL_PTR(&cdc->sof_hdl));
59a: 4620 mov r0, r4
59c: 47c8 blx r9
59e: 47c0 blx r8
5a0: f104 0224 add.w r2, r4, #36 ; 0x24
5a4: 2100 movs r1, #0
5a6: 47a8 blx r5
ctrl_cb = cdc->ctrl_cb;
5a8: 69a5 ldr r5, [r4, #24]
memset(&cdc->iface, 0, sizeof(struct cdchf_acm) - sizeof(struct usbhf_driver));
5aa: 2230 movs r2, #48 ; 0x30
5ac: 2100 movs r1, #0
5ae: 4638 mov r0, r7
5b0: 47b0 blx r6
cdc->iface = -1;
5b2: 23ff movs r3, #255 ; 0xff
5b4: 7323 strb r3, [r4, #12]
cdc->iface_data = -1;
5b6: 73a3 strb r3, [r4, #14]
if (ctrl_cb) {
5b8: 2d00 cmp r5, #0
5ba: d0e1 beq.n 580 <cdchf_acm_uninstall+0x48>
ctrl_cb(cdc);
5bc: 4620 mov r0, r4
5be: 462b mov r3, r5
}
5c0: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
ctrl_cb(cdc);
5c4: 4718 bx r3
5c6: bf00 nop
5c8: 000027f5 .word 0x000027f5
5cc: 000024cd .word 0x000024cd
5d0: 00004119 .word 0x00004119
5d4: 00003421 .word 0x00003421
5d8: 20000000 .word 0x20000000
5dc: 000034b1 .word 0x000034b1
5e0: 00003491 .word 0x00003491
000005e4 <cdchf_acm_ctrl>:
* \param func Pointer to the function driver instance
* \param ctrl Control operation code
* \param param Parameter for install/uninstall
*/
static int32_t cdchf_acm_ctrl(struct usbhf_driver *func, enum usbhf_control ctrl, void *param)
{
5e4: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
switch (ctrl) {
5e8: 2901 cmp r1, #1
{
5ea: b087 sub sp, #28
5ec: 4605 mov r5, r0
5ee: 4690 mov r8, r2
switch (ctrl) {
5f0: f000 809e beq.w 730 <cdchf_acm_ctrl+0x14c>
5f4: 2902 cmp r1, #2
5f6: f000 8098 beq.w 72a <cdchf_acm_ctrl+0x146>
5fa: 2900 cmp r1, #0
5fc: f040 809d bne.w 73a <cdchf_acm_ctrl+0x156>
struct usbhd_driver * dev = usbhf_get_dev(cdc);
600: 4c51 ldr r4, [pc, #324] ; (748 <cdchf_acm_ctrl+0x164>)
602: 47a0 blx r4
604: 4682 mov sl, r0
struct usbhc_driver * core = usbhf_get_core(cdc);
606: 4628 mov r0, r5
608: 47a0 blx r4
60a: 4b50 ldr r3, [pc, #320] ; (74c <cdchf_acm_ctrl+0x168>)
60c: 4798 blx r3
if (cdc->is_installed) {
60e: 7b6b ldrb r3, [r5, #13]
struct usb_h_desc * hcd = core->hcd;
610: f8d0 b014 ldr.w fp, [r0, #20]
if (cdc->is_installed) {
614: 07db lsls r3, r3, #31
struct usbhc_driver * core = usbhf_get_core(cdc);
616: 4681 mov r9, r0
if (cdc->is_installed) {
618: f100 8092 bmi.w 740 <cdchf_acm_ctrl+0x15c>
pd = usb_find_desc(desc->sod, desc->eod, USB_DT_INTERFACE);
61c: e9d8 0100 ldrd r0, r1, [r8]
620: 4c4b ldr r4, [pc, #300] ; (750 <cdchf_acm_ctrl+0x16c>)
622: 2204 movs r2, #4
624: 47a0 blx r4
if (!pd) {
626: 4606 mov r6, r0
628: b910 cbnz r0, 630 <cdchf_acm_ctrl+0x4c>
return ERR_NOT_FOUND;
62a: f06f 0009 mvn.w r0, #9
62e: e04c b.n 6ca <cdchf_acm_ctrl+0xe6>
if (piface->bInterfaceClass != CDC_CLASS_COMM && piface->bInterfaceClass != CDC_CLASS_DATA) {
630: 7943 ldrb r3, [r0, #5]
632: f003 03f7 and.w r3, r3, #247 ; 0xf7
636: 2b02 cmp r3, #2
638: d1f7 bne.n 62a <cdchf_acm_ctrl+0x46>
* \param[in] desc Byte pointer to the descriptor start address
* \return Byte pointer to the next descriptor
*/
static inline uint8_t *usb_desc_next(uint8_t *desc)
{
return (desc + usb_desc_len(desc));
63a: 7800 ldrb r0, [r0, #0]
pd = usb_find_desc(usb_desc_next(pd), desc->eod, USB_DT_INTERFACE);
63c: f8d8 1004 ldr.w r1, [r8, #4]
640: 2204 movs r2, #4
642: 4430 add r0, r6
644: 47a0 blx r4
if (piface1 == NULL || (piface1->bInterfaceClass != CDC_CLASS_COMM && piface1->bInterfaceClass != CDC_CLASS_DATA)) {
646: 9004 str r0, [sp, #16]
648: 2800 cmp r0, #0
64a: d0ee beq.n 62a <cdchf_acm_ctrl+0x46>
64c: 7943 ldrb r3, [r0, #5]
64e: f003 03f7 and.w r3, r3, #247 ; 0xf7
652: 2b02 cmp r3, #2
654: d1e9 bne.n 62a <cdchf_acm_ctrl+0x46>
eod = usb_find_iface_after(pd, desc->eod, piface1->bInterfaceNumber);
656: 4b3f ldr r3, [pc, #252] ; (754 <cdchf_acm_ctrl+0x170>)
658: 7882 ldrb r2, [r0, #2]
65a: f8d8 1004 ldr.w r1, [r8, #4]
65e: 4798 blx r3
if (piface->bInterfaceClass == CDC_CLASS_DATA) {
660: 7973 ldrb r3, [r6, #5]
eod = usb_find_iface_after(pd, desc->eod, piface1->bInterfaceNumber);
662: 9005 str r0, [sp, #20]
if (piface->bInterfaceClass == CDC_CLASS_DATA) {
664: 2b0a cmp r3, #10
666: bf1e ittt ne
668: 4633 movne r3, r6
66a: 9e04 ldrne r6, [sp, #16]
66c: 9304 strne r3, [sp, #16]
if (piface1->bInterfaceSubClass != CDC_SUBCLASS_ACM || piface1->bInterfaceProtocol > CDC_PROTOCOL_V25TER) {
66e: 9b04 ldr r3, [sp, #16]
670: 799b ldrb r3, [r3, #6]
672: 2b02 cmp r3, #2
674: d1d9 bne.n 62a <cdchf_acm_ctrl+0x46>
676: 9b04 ldr r3, [sp, #16]
678: 79db ldrb r3, [r3, #7]
67a: 2b01 cmp r3, #1
67c: d8d5 bhi.n 62a <cdchf_acm_ctrl+0x46>
pd = (uint8_t *)piface;
67e: 4634 mov r4, r6
680: 7820 ldrb r0, [r4, #0]
pd = usb_find_ep_desc(usb_desc_next((uint8_t *)pd), desc->eod);
682: f8d8 1004 ldr.w r1, [r8, #4]
686: 4b34 ldr r3, [pc, #208] ; (758 <cdchf_acm_ctrl+0x174>)
688: 4420 add r0, r4
68a: 4798 blx r3
if (pep == NULL) {
68c: 4604 mov r4, r0
68e: b338 cbz r0, 6e0 <cdchf_acm_ctrl+0xfc>
if ((pep->bmAttributes & USB_EP_TYPE_MASK) == USB_EP_TYPE_BULK) {
690: f890 c003 ldrb.w ip, [r0, #3]
694: f00c 0303 and.w r3, ip, #3
698: 2b02 cmp r3, #2
69a: d1f1 bne.n 680 <cdchf_acm_ctrl+0x9c>
return _usb_h_pipe_allocate(drv, dev, ep, max_pkt_size, attr, interval, speed, minimum_rsc);
69c: 8883 ldrh r3, [r0, #4]
69e: 7882 ldrb r2, [r0, #2]
6a0: f89a 100d ldrb.w r1, [sl, #13]
6a4: 4f2d ldr r7, [pc, #180] ; (75c <cdchf_acm_ctrl+0x178>)
6a6: 2001 movs r0, #1
6a8: 9003 str r0, [sp, #12]
dev->speed,
6aa: f89a 000f ldrb.w r0, [sl, #15]
6ae: f3c0 0081 ubfx r0, r0, #2, #2
6b2: 9002 str r0, [sp, #8]
6b4: 79a0 ldrb r0, [r4, #6]
6b6: e9cd c000 strd ip, r0, [sp]
6ba: 4658 mov r0, fp
6bc: 47b8 blx r7
if (pipe == NULL) {
6be: b938 cbnz r0, 6d0 <cdchf_acm_ctrl+0xec>
cdchf_acm_uninstall(cdc);
6c0: 4628 mov r0, r5
6c2: 4b27 ldr r3, [pc, #156] ; (760 <cdchf_acm_ctrl+0x17c>)
6c4: 4798 blx r3
return ERR_NO_RESOURCE;
6c6: f06f 001b mvn.w r0, #27
break;
default:
return ERR_INVALID_ARG;
}
return ERR_NONE;
}
6ca: b007 add sp, #28
6cc: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
pipe->owner = (void *)cdc;
6d0: 6085 str r5, [r0, #8]
if (pep->bEndpointAddress & 0x80) {
6d2: f994 3002 ldrsb.w r3, [r4, #2]
6d6: 2b00 cmp r3, #0
cdc->pipe_in = pipe;
6d8: bfb4 ite lt
6da: 6128 strlt r0, [r5, #16]
cdc->pipe_out = pipe;
6dc: 6168 strge r0, [r5, #20]
6de: e7cf b.n 680 <cdchf_acm_ctrl+0x9c>
if (!(cdc->pipe_in && cdc->pipe_out)) {
6e0: 6928 ldr r0, [r5, #16]
6e2: b108 cbz r0, 6e8 <cdchf_acm_ctrl+0x104>
6e4: 696b ldr r3, [r5, #20]
6e6: b91b cbnz r3, 6f0 <cdchf_acm_ctrl+0x10c>
cdchf_acm_uninstall(cdc);
6e8: 4b1d ldr r3, [pc, #116] ; (760 <cdchf_acm_ctrl+0x17c>)
6ea: 4628 mov r0, r5
6ec: 4798 blx r3
6ee: e79c b.n 62a <cdchf_acm_ctrl+0x46>
return _usb_h_pipe_register_callback(pipe, cb);
6f0: 491c ldr r1, [pc, #112] ; (764 <cdchf_acm_ctrl+0x180>)
6f2: f8df a084 ldr.w sl, [pc, #132] ; 778 <cdchf_acm_ctrl+0x194>
6f6: 47d0 blx sl
6f8: 491b ldr r1, [pc, #108] ; (768 <cdchf_acm_ctrl+0x184>)
6fa: 6968 ldr r0, [r5, #20]
6fc: 47d0 blx sl
desc->sod = eod;
6fe: 9b05 ldr r3, [sp, #20]
700: f8c8 3000 str.w r3, [r8]
cdc->iface = piface1->bInterfaceNumber;
704: 9b04 ldr r3, [sp, #16]
usbhc_register_handler(core, USBHC_HDL_REQ, &cdchf_acm_req_hdl);
706: 4a19 ldr r2, [pc, #100] ; (76c <cdchf_acm_ctrl+0x188>)
cdc->iface = piface1->bInterfaceNumber;
708: 789b ldrb r3, [r3, #2]
70a: 732b strb r3, [r5, #12]
cdc->iface_data = piface->bInterfaceNumber;
70c: 78b3 ldrb r3, [r6, #2]
70e: 73ab strb r3, [r5, #14]
cdc->is_installed = true;
710: 7b6b ldrb r3, [r5, #13]
712: f043 0301 orr.w r3, r3, #1
716: 736b strb r3, [r5, #13]
cdc->sof_hdl.func = (FUNC_PTR)cdchf_acm_sof;
718: 4b15 ldr r3, [pc, #84] ; (770 <cdchf_acm_ctrl+0x18c>)
usbhc_register_handler(core, USBHC_HDL_REQ, &cdchf_acm_req_hdl);
71a: 2102 movs r1, #2
cdc->sof_hdl.ext = (void *)cdc;
71c: e9c5 350a strd r3, r5, [r5, #40] ; 0x28
usbhc_register_handler(core, USBHC_HDL_REQ, &cdchf_acm_req_hdl);
720: 4648 mov r0, r9
722: 4b14 ldr r3, [pc, #80] ; (774 <cdchf_acm_ctrl+0x190>)
724: 4798 blx r3
return ERR_NONE;
726: 2000 movs r0, #0
break;
728: e7cf b.n 6ca <cdchf_acm_ctrl+0xe6>
cdchf_acm_uninstall(CDCHF_ACM_PTR(func));
72a: 4b0d ldr r3, [pc, #52] ; (760 <cdchf_acm_ctrl+0x17c>)
72c: 4798 blx r3
break;
72e: e7fa b.n 726 <cdchf_acm_ctrl+0x142>
CDCHF_ACM_PTR(func)->is_enabled = true;
730: 7b43 ldrb r3, [r0, #13]
732: f043 0302 orr.w r3, r3, #2
736: 7343 strb r3, [r0, #13]
738: e7f5 b.n 726 <cdchf_acm_ctrl+0x142>
switch (ctrl) {
73a: f06f 000c mvn.w r0, #12
73e: e7c4 b.n 6ca <cdchf_acm_ctrl+0xe6>
return ERR_NO_CHANGE;
740: f06f 0001 mvn.w r0, #1
744: e7c1 b.n 6ca <cdchf_acm_ctrl+0xe6>
746: bf00 nop
748: 000034b1 .word 0x000034b1
74c: 00003491 .word 0x00003491
750: 000034d1 .word 0x000034d1
754: 000034eb .word 0x000034eb
758: 0000350f .word 0x0000350f
75c: 00002299 .word 0x00002299
760: 00000539 .word 0x00000539
764: 0000034d .word 0x0000034d
768: 00000375 .word 0x00000375
76c: 20000000 .word 0x20000000
770: 000003f5 .word 0x000003f5
774: 00003399 .word 0x00003399
778: 0000267d .word 0x0000267d
0000077c <cdchf_acm_init>:
int32_t cdchf_acm_init(struct usbhc_driver *core, struct cdchf_acm *cdc)
{
77c: b538 push {r3, r4, r5, lr}
int32_t rc = 0;
if (cdc->is_installed) {
77e: 7b4b ldrb r3, [r1, #13]
780: 07db lsls r3, r3, #31
{
782: 460c mov r4, r1
if (cdc->is_installed) {
784: d410 bmi.n 7a8 <cdchf_acm_init+0x2c>
return ERR_DENIED;
}
rc = usbhc_register_funcd(core, USBHF_PTR(cdc));
786: 4b0a ldr r3, [pc, #40] ; (7b0 <cdchf_acm_init+0x34>)
788: 4798 blx r3
if (rc) {
78a: 4605 mov r5, r0
78c: b950 cbnz r0, 7a4 <cdchf_acm_init+0x28>
memset(&cdc->iface, 0, sizeof(struct cdchf_acm) - sizeof(struct usbhf_driver));
78e: 4b09 ldr r3, [pc, #36] ; (7b4 <cdchf_acm_init+0x38>)
790: 4601 mov r1, r0
792: 2230 movs r2, #48 ; 0x30
794: f104 000c add.w r0, r4, #12
798: 4798 blx r3
cdc->iface = -1;
79a: 23ff movs r3, #255 ; 0xff
79c: 7323 strb r3, [r4, #12]
cdc->iface_data = -1;
79e: 73a3 strb r3, [r4, #14]
return rc;
}
cdchf_acm_reset(cdc);
cdc->func.ctrl = cdchf_acm_ctrl;
7a0: 4b05 ldr r3, [pc, #20] ; (7b8 <cdchf_acm_init+0x3c>)
7a2: 6063 str r3, [r4, #4]
return ERR_NONE;
}
7a4: 4628 mov r0, r5
7a6: bd38 pop {r3, r4, r5, pc}
return ERR_DENIED;
7a8: f06f 0510 mvn.w r5, #16
7ac: e7fa b.n 7a4 <cdchf_acm_init+0x28>
7ae: bf00 nop
7b0: 00003355 .word 0x00003355
7b4: 00004119 .word 0x00004119
7b8: 000005e5 .word 0x000005e5
000007bc <SDMMC_example>:
/*
* Example
*/
void SDMMC_example(void)
{
7bc: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
sd_mmc_err_t err = SD_MMC_OK;
while ((err = sd_mmc_check(0)) != SD_MMC_OK) {
7c0: 4d0f ldr r5, [pc, #60] ; (800 <SDMMC_example+0x44>)
/* Wait card ready. */
printf("ERR: %d\n", err);
7c2: 4e10 ldr r6, [pc, #64] ; (804 <SDMMC_example+0x48>)
7c4: 4f10 ldr r7, [pc, #64] ; (808 <SDMMC_example+0x4c>)
while ((err = sd_mmc_check(0)) != SD_MMC_OK) {
7c6: 2000 movs r0, #0
7c8: 47a8 blx r5
7ca: 4604 mov r4, r0
7cc: b988 cbnz r0, 7f2 <SDMMC_example+0x36>
}
if (sd_mmc_get_type(0) & (CARD_TYPE_SD | CARD_TYPE_MMC)) {
7ce: 4b0f ldr r3, [pc, #60] ; (80c <SDMMC_example+0x50>)
7d0: 4798 blx r3
7d2: 0783 lsls r3, r0, #30
7d4: d011 beq.n 7fa <SDMMC_example+0x3e>
/* Read card block 0 */
sd_mmc_init_read_blocks(0, 0, 1);
7d6: 4621 mov r1, r4
7d8: 4b0d ldr r3, [pc, #52] ; (810 <SDMMC_example+0x54>)
7da: 2201 movs r2, #1
7dc: 4620 mov r0, r4
7de: 4798 blx r3
sd_mmc_start_read_blocks(sd_mmc_block, 1);
7e0: 4b0c ldr r3, [pc, #48] ; (814 <SDMMC_example+0x58>)
7e2: 480d ldr r0, [pc, #52] ; (818 <SDMMC_example+0x5c>)
7e4: 2101 movs r1, #1
7e6: 4798 blx r3
sd_mmc_wait_end_of_read_blocks(false);
7e8: 4620 mov r0, r4
7ea: 4b0c ldr r3, [pc, #48] ; (81c <SDMMC_example+0x60>)
if (sd_mmc_get_type(0) & CARD_TYPE_SDIO) {
/* Read 22 bytes from SDIO Function 0 (CIA) */
sdio_read_extended(0, 0, 0, 1, sd_mmc_block, 22);
}
#endif
}
7ec: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
sd_mmc_wait_end_of_read_blocks(false);
7f0: 4718 bx r3
printf("ERR: %d\n", err);
7f2: 4621 mov r1, r4
7f4: 4630 mov r0, r6
7f6: 47b8 blx r7
7f8: e7e5 b.n 7c6 <SDMMC_example+0xa>
}
7fa: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
7fe: bf00 nop
800: 00000a9d .word 0x00000a9d
804: 00004a59 .word 0x00004a59
808: 00004005 .word 0x00004005
80c: 00000f4d .word 0x00000f4d
810: 00000f71 .word 0x00000f71
814: 00000ff5 .word 0x00000ff5
818: 20000094 .word 0x20000094
81c: 00001045 .word 0x00001045
00000820 <sd_mmc_stack_init>:
void sd_mmc_stack_init(void)
{
sd_mmc_init(&SPI_0, SDMMC_cd, SDMMC_wp);
820: 4a02 ldr r2, [pc, #8] ; (82c <sd_mmc_stack_init+0xc>)
822: 4803 ldr r0, [pc, #12] ; (830 <sd_mmc_stack_init+0x10>)
824: 4b03 ldr r3, [pc, #12] ; (834 <sd_mmc_stack_init+0x14>)
826: 1d11 adds r1, r2, #4
828: 4718 bx r3
82a: bf00 nop
82c: 20000008 .word 0x20000008
830: 2000056c .word 0x2000056c
834: 00000a85 .word 0x00000a85
00000838 <_sbrk>:
extern caddr_t _sbrk(int incr)
{
static unsigned char *heap = NULL;
unsigned char * prev_heap;
if (heap == NULL) {
838: 4a04 ldr r2, [pc, #16] ; (84c <_sbrk+0x14>)
83a: 6811 ldr r1, [r2, #0]
{
83c: 4603 mov r3, r0
if (heap == NULL) {
83e: b909 cbnz r1, 844 <_sbrk+0xc>
heap = (unsigned char *)&_end;
840: 4903 ldr r1, [pc, #12] ; (850 <_sbrk+0x18>)
842: 6011 str r1, [r2, #0]
}
prev_heap = heap;
844: 6810 ldr r0, [r2, #0]
heap += incr;
846: 4403 add r3, r0
848: 6013 str r3, [r2, #0]
return (caddr_t)prev_heap;
}
84a: 4770 bx lr
84c: 20000294 .word 0x20000294
850: 200105e0 .word 0x200105e0
00000854 <SDMMC_UNSTUFF_BITS>:
* Used by : CSD, SCR, Switch status
*/
static inline uint32_t SDMMC_UNSTUFF_BITS(uint8_t *reg, uint16_t reg_size, uint16_t pos, uint8_t size)
{
uint32_t value;
value = reg[((reg_size - pos + 7) / 8) - 1] >> (pos % 8);
854: 1a89 subs r1, r1, r2
{
856: b570 push {r4, r5, r6, lr}
value = reg[((reg_size - pos + 7) / 8) - 1] >> (pos % 8);
858: 1dcc adds r4, r1, #7
85a: bf48 it mi
85c: f101 040e addmi.w r4, r1, #14
860: eb00 00e4 add.w r0, r0, r4, asr #3
864: f002 0207 and.w r2, r2, #7
868: f810 1c01 ldrb.w r1, [r0, #-1]
if (((pos % 8) + size) > 8) {
86c: 18d4 adds r4, r2, r3
86e: 2c08 cmp r4, #8
value = reg[((reg_size - pos + 7) / 8) - 1] >> (pos % 8);
870: fa41 f102 asr.w r1, r1, r2
if (((pos % 8) + size) > 8) {
874: dd18 ble.n 8a8 <SDMMC_UNSTUFF_BITS+0x54>
value |= (uint32_t)reg[((reg_size - pos + 7) / 8) - 2] << (8 - (pos % 8));
876: f810 5c02 ldrb.w r5, [r0, #-2]
87a: f1c2 0608 rsb r6, r2, #8
87e: 40b5 lsls r5, r6
}
if (((pos % 8) + size) > 16) {
880: 2c10 cmp r4, #16
value |= (uint32_t)reg[((reg_size - pos + 7) / 8) - 2] << (8 - (pos % 8));
882: ea41 0105 orr.w r1, r1, r5
if (((pos % 8) + size) > 16) {
886: dd0f ble.n 8a8 <SDMMC_UNSTUFF_BITS+0x54>
value |= (uint32_t)reg[((reg_size - pos + 7) / 8) - 3] << (16 - (pos % 8));
888: f810 0c03 ldrb.w r0, [r0, #-3]
88c: f1c2 0510 rsb r5, r2, #16
}
if (((pos % 8) + size) > 24) {
890: 2c18 cmp r4, #24
value |= (uint32_t)reg[((reg_size - pos + 7) / 8) - 3] << (24 - (pos % 8));
892: bfc8 it gt
894: f1c2 0218 rsbgt r2, r2, #24
value |= (uint32_t)reg[((reg_size - pos + 7) / 8) - 3] << (16 - (pos % 8));
898: fa00 f505 lsl.w r5, r0, r5
89c: ea41 0105 orr.w r1, r1, r5
value |= (uint32_t)reg[((reg_size - pos + 7) / 8) - 3] << (24 - (pos % 8));
8a0: bfc4 itt gt
8a2: fa00 f202 lslgt.w r2, r0, r2
8a6: 4311 orrgt r1, r2
}
value &= ((uint32_t)1 << size) - 1;
8a8: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
8ac: 4098 lsls r0, r3
return value;
}
8ae: ea21 0000 bic.w r0, r1, r0
8b2: bd70 pop {r4, r5, r6, pc}
000008b4 <gpio_get_pin_level>:
* Reads the level on pins connected to a port
*
* \param[in] pin The pin number for device
*/
static inline bool gpio_get_pin_level(const uint8_t pin)
{
8b4: b537 push {r0, r1, r2, r4, r5, lr}
*/
static inline uint32_t _gpio_get_level(const enum gpio_port port)
{
uint32_t tmp;
CRITICAL_SECTION_ENTER();
8b6: 4b0e ldr r3, [pc, #56] ; (8f0 <gpio_get_pin_level+0x3c>)
8b8: 4605 mov r5, r0
8ba: a801 add r0, sp, #4
8bc: 4798 blx r3
return tmp;
}
static inline hri_port_dir_reg_t hri_port_read_DIR_reg(const void *const hw, uint8_t submodule_index)
{
return ((Port *)hw)->Group[submodule_index].DIR.reg;
8be: 4a0d ldr r2, [pc, #52] ; (8f4 <gpio_get_pin_level+0x40>)
8c0: 096b lsrs r3, r5, #5
8c2: 01d9 lsls r1, r3, #7
8c4: eb02 13c3 add.w r3, r2, r3, lsl #7
8c8: 5851 ldr r1, [r2, r1]
return tmp;
}
static inline hri_port_in_reg_t hri_port_read_IN_reg(const void *const hw, uint8_t submodule_index)
{
return ((Port *)hw)->Group[submodule_index].IN.reg;
8ca: 6a1a ldr r2, [r3, #32]
return ((Port *)hw)->Group[submodule_index].OUT.reg;
8cc: 691c ldr r4, [r3, #16]
uint32_t dir_tmp = hri_port_read_DIR_reg(PORT, port);
tmp = hri_port_read_IN_reg(PORT, port) & ~dir_tmp;
tmp |= hri_port_read_OUT_reg(PORT, port) & dir_tmp;
CRITICAL_SECTION_LEAVE();
8ce: 4b0a ldr r3, [pc, #40] ; (8f8 <gpio_get_pin_level+0x44>)
tmp |= hri_port_read_OUT_reg(PORT, port) & dir_tmp;
8d0: 4054 eors r4, r2
8d2: 400c ands r4, r1
CRITICAL_SECTION_LEAVE();
8d4: a801 add r0, sp, #4
tmp |= hri_port_read_OUT_reg(PORT, port) & dir_tmp;
8d6: 4054 eors r4, r2
return (bool)(_gpio_get_level((enum gpio_port)GPIO_PORT(pin)) & (0x01U << GPIO_PIN(pin)));
8d8: f005 051f and.w r5, r5, #31
CRITICAL_SECTION_LEAVE();
8dc: 4798 blx r3
8de: 2001 movs r0, #1
8e0: fa00 f505 lsl.w r5, r0, r5
8e4: 4225 tst r5, r4
}
8e6: bf08 it eq
8e8: 2000 moveq r0, #0
8ea: b003 add sp, #12
8ec: bd30 pop {r4, r5, pc}
8ee: bf00 nop
8f0: 00003efd .word 0x00003efd
8f4: 41008000 .word 0x41008000
8f8: 00003f0b .word 0x00003f0b
000008fc <sd_mmc_configure_slot>:
/**
* \brief Configures the driver with the selected card configuration
*/
static void sd_mmc_configure_slot(void)
{
8fc: b513 push {r0, r1, r4, lr}
driver_select_device(
sd_mmc_hal, sd_mmc_slot_sel, sd_mmc_card->clock, sd_mmc_card->bus_width, sd_mmc_card->high_speed);
8fe: 4807 ldr r0, [pc, #28] ; (91c <sd_mmc_configure_slot+0x20>)
driver_select_device(
900: 4c07 ldr r4, [pc, #28] ; (920 <sd_mmc_configure_slot+0x24>)
sd_mmc_hal, sd_mmc_slot_sel, sd_mmc_card->clock, sd_mmc_card->bus_width, sd_mmc_card->high_speed);
902: 6802 ldr r2, [r0, #0]
driver_select_device(
904: 7f91 ldrb r1, [r2, #30]
906: 7b53 ldrb r3, [r2, #13]
908: 3900 subs r1, #0
90a: bf18 it ne
90c: 2101 movne r1, #1
90e: 9100 str r1, [sp, #0]
910: 7901 ldrb r1, [r0, #4]
912: 6812 ldr r2, [r2, #0]
914: 6880 ldr r0, [r0, #8]
916: 47a0 blx r4
}
918: b002 add sp, #8
91a: bd10 pop {r4, pc}
91c: 20000298 .word 0x20000298
920: 00001571 .word 0x00001571
00000924 <sd_mmc_select_slot>:
{
924: b538 push {r3, r4, r5, lr}
if (slot >= CONF_SD_MMC_MEM_CNT) {
926: 2800 cmp r0, #0
928: d143 bne.n 9b2 <sd_mmc_select_slot+0x8e>
if (_cd && _cd[slot].pin != -1) {
92a: 4c23 ldr r4, [pc, #140] ; (9b8 <sd_mmc_select_slot+0x94>)
92c: 68e3 ldr r3, [r4, #12]
92e: 2b00 cmp r3, #0
930: d038 beq.n 9a4 <sd_mmc_select_slot+0x80>
932: f9b3 0000 ldrsh.w r0, [r3]
936: 1c42 adds r2, r0, #1
938: d034 beq.n 9a4 <sd_mmc_select_slot+0x80>
if (gpio_get_pin_level(_cd[slot].pin) != _cd[slot].val) {
93a: 4b20 ldr r3, [pc, #128] ; (9bc <sd_mmc_select_slot+0x98>)
93c: b2c0 uxtb r0, r0
93e: 4798 blx r3
940: 68e3 ldr r3, [r4, #12]
942: 885b ldrh r3, [r3, #2]
944: 4298 cmp r0, r3
946: d003 beq.n 950 <sd_mmc_select_slot+0x2c>
sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_NO_CARD;
948: 2304 movs r3, #4
sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_DEBOUNCE;
94a: 76a3 strb r3, [r4, #26]
return SD_MMC_ERR_NO_CARD;
94c: 2002 movs r0, #2
}
94e: bd38 pop {r3, r4, r5, pc}
if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_NO_CARD) {
950: 7ea0 ldrb r0, [r4, #26]
952: 2804 cmp r0, #4
954: d101 bne.n 95a <sd_mmc_select_slot+0x36>
sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_DEBOUNCE;
956: 2301 movs r3, #1
958: e7f7 b.n 94a <sd_mmc_select_slot+0x26>
if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_DEBOUNCE) {
95a: 2801 cmp r0, #1
95c: d11f bne.n 99e <sd_mmc_select_slot+0x7a>
sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_INIT;
95e: 2302 movs r3, #2
960: 76a3 strb r3, [r4, #26]
sd_mmc_cards[slot].clock = SDMMC_CLOCK_INIT;
962: 4b17 ldr r3, [pc, #92] ; (9c0 <sd_mmc_select_slot+0x9c>)
964: 6123 str r3, [r4, #16]
sd_mmc_cards[slot].bus_width = 1;
966: 2301 movs r3, #1
968: 7763 strb r3, [r4, #29]
sd_mmc_cards[slot].high_speed = 0;
96a: 2300 movs r3, #0
96c: f884 302e strb.w r3, [r4, #46] ; 0x2e
assert(!(sd_mmc_slot_sel != slot && sd_mmc_nb_block_remaining != 0), ">>>");
970: 7923 ldrb r3, [r4, #4]
972: b1e3 cbz r3, 9ae <sd_mmc_select_slot+0x8a>
974: 8e20 ldrh r0, [r4, #48] ; 0x30
976: fab0 f080 clz r0, r0
97a: 0940 lsrs r0, r0, #5
97c: 4a11 ldr r2, [pc, #68] ; (9c4 <sd_mmc_select_slot+0xa0>)
97e: 4912 ldr r1, [pc, #72] ; (9c8 <sd_mmc_select_slot+0xa4>)
980: 4d12 ldr r5, [pc, #72] ; (9cc <sd_mmc_select_slot+0xa8>)
982: f240 532c movw r3, #1324 ; 0x52c
986: 47a8 blx r5
sd_mmc_slot_sel = slot;
988: 2300 movs r3, #0
98a: 7123 strb r3, [r4, #4]
sd_mmc_card = &sd_mmc_cards[slot];
98c: 4b10 ldr r3, [pc, #64] ; (9d0 <sd_mmc_select_slot+0xac>)
98e: 6023 str r3, [r4, #0]
sd_mmc_configure_slot();
990: 4b10 ldr r3, [pc, #64] ; (9d4 <sd_mmc_select_slot+0xb0>)
992: 4798 blx r3
return (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_INIT) ? SD_MMC_INIT_ONGOING : SD_MMC_OK;
994: 7ea0 ldrb r0, [r4, #26]
996: 1e83 subs r3, r0, #2
998: 4258 negs r0, r3
99a: 4158 adcs r0, r3
99c: e7d7 b.n 94e <sd_mmc_select_slot+0x2a>
if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_UNUSABLE) {
99e: 2803 cmp r0, #3
9a0: d1e6 bne.n 970 <sd_mmc_select_slot+0x4c>
9a2: e7d4 b.n 94e <sd_mmc_select_slot+0x2a>
|| (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_UNUSABLE)) {
9a4: 7ea3 ldrb r3, [r4, #26]
if ((sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_NO_CARD)
9a6: 3b03 subs r3, #3
9a8: 2b01 cmp r3, #1
9aa: d8e1 bhi.n 970 <sd_mmc_select_slot+0x4c>
9ac: e7d7 b.n 95e <sd_mmc_select_slot+0x3a>
assert(!(sd_mmc_slot_sel != slot && sd_mmc_nb_block_remaining != 0), ">>>");
9ae: 2001 movs r0, #1
9b0: e7e4 b.n 97c <sd_mmc_select_slot+0x58>
return SD_MMC_ERR_SLOT;
9b2: 2004 movs r0, #4
9b4: e7cb b.n 94e <sd_mmc_select_slot+0x2a>
9b6: bf00 nop
9b8: 20000298 .word 0x20000298
9bc: 000008b5 .word 0x000008b5
9c0: 00061a80 .word 0x00061a80
9c4: 00004a62 .word 0x00004a62
9c8: 00004a75 .word 0x00004a75
9cc: 00004099 .word 0x00004099
9d0: 200002a8 .word 0x200002a8
9d4: 000008fd .word 0x000008fd
000009d8 <sd_mmc_cmd13>:
{
9d8: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
9dc: 4d0b ldr r5, [pc, #44] ; (a0c <sd_mmc_cmd13+0x34>)
if (!driver_send_cmd(sd_mmc_hal, SDMMC_MCI_CMD13_SEND_STATUS, (uint32_t)sd_mmc_card->rca << 16)) {
9de: 4e0c ldr r6, [pc, #48] ; (a10 <sd_mmc_cmd13+0x38>)
9e0: 4f0c ldr r7, [pc, #48] ; (a14 <sd_mmc_cmd13+0x3c>)
if (driver_get_response(sd_mmc_hal) & CARD_STATUS_READY_FOR_DATA) {
9e2: f8df 8034 ldr.w r8, [pc, #52] ; a18 <sd_mmc_cmd13+0x40>
if (!driver_send_cmd(sd_mmc_hal, SDMMC_MCI_CMD13_SEND_STATUS, (uint32_t)sd_mmc_card->rca << 16)) {
9e6: 6833 ldr r3, [r6, #0]
9e8: 68b0 ldr r0, [r6, #8]
9ea: 891a ldrh r2, [r3, #8]
9ec: f241 110d movw r1, #4365 ; 0x110d
9f0: 0412 lsls r2, r2, #16
9f2: 47b8 blx r7
9f4: 4604 mov r4, r0
9f6: b128 cbz r0, a04 <sd_mmc_cmd13+0x2c>
if (driver_get_response(sd_mmc_hal) & CARD_STATUS_READY_FOR_DATA) {
9f8: 68b0 ldr r0, [r6, #8]
9fa: 47c0 blx r8
9fc: 05c3 lsls r3, r0, #23
9fe: d402 bmi.n a06 <sd_mmc_cmd13+0x2e>
if (nec_timeout-- == 0) {
a00: 3d01 subs r5, #1
a02: d1f0 bne.n 9e6 <sd_mmc_cmd13+0xe>
return false;
a04: 2400 movs r4, #0
}
a06: 4620 mov r0, r4
a08: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
a0c: 00030d41 .word 0x00030d41
a10: 20000298 .word 0x20000298
a14: 000013e5 .word 0x000013e5
a18: 0000153d .word 0x0000153d
00000a1c <sd_mmc_cmd9_spi>:
* data (CSD) on the CMD line spi.
*
* \return true if success, otherwise false
*/
static bool sd_mmc_cmd9_spi(void)
{
a1c: b573 push {r0, r1, r4, r5, r6, lr}
if (!driver_adtc_start(sd_mmc_hal, SDMMC_SPI_CMD9_SEND_CSD, (uint32_t)sd_mmc_card->rca << 16,
a1e: 4c0e ldr r4, [pc, #56] ; (a58 <sd_mmc_cmd9_spi+0x3c>)
a20: 490e ldr r1, [pc, #56] ; (a5c <sd_mmc_cmd9_spi+0x40>)
a22: 6823 ldr r3, [r4, #0]
a24: 68a0 ldr r0, [r4, #8]
a26: 891a ldrh r2, [r3, #8]
a28: 4e0d ldr r6, [pc, #52] ; (a60 <sd_mmc_cmd9_spi+0x44>)
a2a: 2501 movs r5, #1
a2c: 2310 movs r3, #16
a2e: e9cd 5500 strd r5, r5, [sp]
a32: 409a lsls r2, r3
a34: 47b0 blx r6
a36: b160 cbz r0, a52 <sd_mmc_cmd9_spi+0x36>
CSD_REG_BSIZE, 1, true)) {
return false;
}
if (!driver_start_read_blocks(sd_mmc_hal, sd_mmc_card->csd, 1)) {
a38: 6821 ldr r1, [r4, #0]
a3a: 68a0 ldr r0, [r4, #8]
a3c: 4b09 ldr r3, [pc, #36] ; (a64 <sd_mmc_cmd9_spi+0x48>)
a3e: 462a mov r2, r5
a40: 310e adds r1, #14
a42: 4798 blx r3
a44: b128 cbz r0, a52 <sd_mmc_cmd9_spi+0x36>
return false;
}
return driver_wait_end_of_read_blocks(sd_mmc_hal);
a46: 68a0 ldr r0, [r4, #8]
a48: 4b07 ldr r3, [pc, #28] ; (a68 <sd_mmc_cmd9_spi+0x4c>)
}
a4a: b002 add sp, #8
a4c: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
return driver_wait_end_of_read_blocks(sd_mmc_hal);
a50: 4718 bx r3
}
a52: 2000 movs r0, #0
a54: b002 add sp, #8
a56: bd70 pop {r4, r5, r6, pc}
a58: 20000298 .word 0x20000298
a5c: 00081109 .word 0x00081109
a60: 00001209 .word 0x00001209
a64: 000013f9 .word 0x000013f9
a68: 00001499 .word 0x00001499
00000a6c <sd_mmc_deselect_slot>:
if (sd_mmc_slot_sel < CONF_SD_MMC_MEM_CNT) {
a6c: 4b03 ldr r3, [pc, #12] ; (a7c <sd_mmc_deselect_slot+0x10>)
a6e: 7919 ldrb r1, [r3, #4]
a70: b911 cbnz r1, a78 <sd_mmc_deselect_slot+0xc>
driver_deselect_device(sd_mmc_hal, sd_mmc_slot_sel);
a72: 6898 ldr r0, [r3, #8]
a74: 4b02 ldr r3, [pc, #8] ; (a80 <sd_mmc_deselect_slot+0x14>)
a76: 4718 bx r3
}
a78: 4770 bx lr
a7a: bf00 nop
a7c: 20000298 .word 0x20000298
a80: 00001589 .word 0x00001589
00000a84 <sd_mmc_init>:
#endif
/*--------------------- PUBLIC FUNCTIONS ----------------------------*/
void sd_mmc_init(void *hal, sd_mmc_detect_t *card_detects, sd_mmc_detect_t *wp_detects)
{
a84: b510 push {r4, lr}
/* GPIO will be used to detect card and write protect.
* The related clocks and pinmux must be configurated in good
* condition. */
for (uint8_t slot = 0; slot < CONF_SD_MMC_MEM_CNT; slot++) {
sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_NO_CARD;
a86: 4b04 ldr r3, [pc, #16] ; (a98 <sd_mmc_init+0x14>)
a88: 2404 movs r4, #4
a8a: 769c strb r4, [r3, #26]
}
sd_mmc_slot_sel = 0xFF; /* No slot configurated */
a8c: 24ff movs r4, #255 ; 0xff
a8e: 711c strb r4, [r3, #4]
sd_mmc_hal = hal;
_cd = card_detects;
a90: e9c3 0102 strd r0, r1, [r3, #8]
_wp = wp_detects;
a94: 635a str r2, [r3, #52] ; 0x34
}
a96: bd10 pop {r4, pc}
a98: 20000298 .word 0x20000298
00000a9c <sd_mmc_check>:
{
return CONF_SD_MMC_MEM_CNT;
}
sd_mmc_err_t sd_mmc_check(uint8_t slot)
{
a9c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
sd_mmc_err_t sd_mmc_err;
sd_mmc_err = sd_mmc_select_slot(slot);
aa0: 4b8f ldr r3, [pc, #572] ; (ce0 <sd_mmc_check+0x244>)
{
aa2: b087 sub sp, #28
sd_mmc_err = sd_mmc_select_slot(slot);
aa4: 4798 blx r3
if (sd_mmc_err != SD_MMC_INIT_ONGOING) {
aa6: 2801 cmp r0, #1
sd_mmc_err = sd_mmc_select_slot(slot);
aa8: 4680 mov r8, r0
if (sd_mmc_err != SD_MMC_INIT_ONGOING) {
aaa: d005 beq.n ab8 <sd_mmc_check+0x1c>
// To notify that the card has been just initialized
// It is necessary for USB Device MSC
return SD_MMC_INIT_ONGOING;
}
sd_mmc_card->state = SD_MMC_CARD_STATE_UNUSABLE;
sd_mmc_deselect_slot();
aac: 4b8d ldr r3, [pc, #564] ; (ce4 <sd_mmc_check+0x248>)
aae: 4798 blx r3
return SD_MMC_ERR_UNUSABLE;
}
ab0: 4640 mov r0, r8
ab2: b007 add sp, #28
ab4: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
sd_mmc_card->type = CARD_TYPE_SD;
ab8: 4c8b ldr r4, [pc, #556] ; (ce8 <sd_mmc_check+0x24c>)
sd_mmc_spi_debug("Start SD card install\n\r");
aba: 4f8c ldr r7, [pc, #560] ; (cec <sd_mmc_check+0x250>)
sd_mmc_card->type = CARD_TYPE_SD;
abc: 6823 ldr r3, [r4, #0]
if (!driver_send_cmd(sd_mmc_hal, SDMMC_SPI_CMD0_GO_IDLE_STATE, 0)) {
abe: 4e8c ldr r6, [pc, #560] ; (cf0 <sd_mmc_check+0x254>)
sd_mmc_card->type = CARD_TYPE_SD;
ac0: 72d8 strb r0, [r3, #11]
sd_mmc_card->version = CARD_VER_UNKNOWN;
ac2: 2500 movs r5, #0
ac4: 731d strb r5, [r3, #12]
sd_mmc_card->rca = 0;
ac6: 811d strh r5, [r3, #8]
sd_mmc_spi_debug("Start SD card install\n\r");
ac8: 488a ldr r0, [pc, #552] ; (cf4 <sd_mmc_check+0x258>)
aca: 47b8 blx r7
driver_send_clock(sd_mmc_hal);
acc: 68a0 ldr r0, [r4, #8]
ace: 4b8a ldr r3, [pc, #552] ; (cf8 <sd_mmc_check+0x25c>)
ad0: 4798 blx r3
if (!driver_send_cmd(sd_mmc_hal, SDMMC_SPI_CMD0_GO_IDLE_STATE, 0)) {
ad2: 68a0 ldr r0, [r4, #8]
ad4: 462a mov r2, r5
ad6: f44f 5188 mov.w r1, #4352 ; 0x1100
ada: 47b0 blx r6
adc: 2800 cmp r0, #0
ade: d039 beq.n b54 <sd_mmc_check+0xb8>
if (!driver_send_cmd(sd_mmc_hal, SD_CMD8_SEND_IF_COND, SD_CMD8_PATTERN | SD_CMD8_HIGH_VOLTAGE)) {
ae0: 68a0 ldr r0, [r4, #8]
ae2: f44f 72d5 mov.w r2, #426 ; 0x1aa
ae6: f245 5108 movw r1, #21768 ; 0x5508
aea: 47b0 blx r6
aec: 2800 cmp r0, #0
aee: d137 bne.n b60 <sd_mmc_check+0xc4>
*v2 = 0;
af0: 2500 movs r5, #0
if (sd_mmc_card->type & CARD_TYPE_SD) {
af2: 6823 ldr r3, [r4, #0]
af4: 7adb ldrb r3, [r3, #11]
af6: 07d8 lsls r0, r3, #31
af8: f140 81ff bpl.w efa <sd_mmc_check+0x45e>
resp = driver_get_response(sd_mmc_hal);
afc: f8df a210 ldr.w sl, [pc, #528] ; d10 <sd_mmc_check+0x274>
b00: 07ad lsls r5, r5, #30
if (sd_mmc_card->type & CARD_TYPE_SD) {
b02: f641 39ef movw r9, #7151 ; 0x1bef
if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD55_APP_CMD, 0)) {
b06: 68a0 ldr r0, [r4, #8]
b08: 2200 movs r2, #0
b0a: f241 1137 movw r1, #4407 ; 0x1137
b0e: 47b0 blx r6
b10: 2800 cmp r0, #0
b12: d131 bne.n b78 <sd_mmc_check+0xdc>
sd_mmc_spi_debug("%s: CMD55 Fail\n\r", __func__);
b14: 4979 ldr r1, [pc, #484] ; (cfc <sd_mmc_check+0x260>)
b16: 487a ldr r0, [pc, #488] ; (d00 <sd_mmc_check+0x264>)
sd_mmc_spi_debug("%s: ACMD41 Fail\n\r", __func__);
b18: 47b8 blx r7
sd_mmc_spi_debug("Start MMC Install\n\r");
b1a: 487a ldr r0, [pc, #488] ; (d04 <sd_mmc_check+0x268>)
b1c: 47b8 blx r7
sd_mmc_card->type = CARD_TYPE_MMC;
b1e: 6823 ldr r3, [r4, #0]
if (!driver_send_cmd(sd_mmc_hal, SDMMC_SPI_CMD0_GO_IDLE_STATE, 0)) {
b20: 68a0 ldr r0, [r4, #8]
sd_mmc_card->type = CARD_TYPE_MMC;
b22: 2202 movs r2, #2
b24: 72da strb r2, [r3, #11]
if (!driver_send_cmd(sd_mmc_hal, SDMMC_SPI_CMD0_GO_IDLE_STATE, 0)) {
b26: f44f 5188 mov.w r1, #4352 ; 0x1100
b2a: 2200 movs r2, #0
b2c: 47b0 blx r6
b2e: b188 cbz r0, b54 <sd_mmc_check+0xb8>
resp = driver_get_response(sd_mmc_hal);
b30: f8df 91dc ldr.w r9, [pc, #476] ; d10 <sd_mmc_check+0x274>
retry = 7150;
b34: f641 35ee movw r5, #7150 ; 0x1bee
if (!driver_send_cmd(sd_mmc_hal, MMC_SPI_CMD1_SEND_OP_COND, 0)) {
b38: 68a0 ldr r0, [r4, #8]
b3a: 2200 movs r2, #0
b3c: f241 1101 movw r1, #4353 ; 0x1101
b40: 47b0 blx r6
b42: 2800 cmp r0, #0
b44: f040 80b7 bne.w cb6 <sd_mmc_check+0x21a>
sd_mmc_spi_debug("%s: CMD1 SPI Fail - Busy retry %d\n\r",
b48: f5c5 52df rsb r2, r5, #7136 ; 0x1be0
b4c: 496e ldr r1, [pc, #440] ; (d08 <sd_mmc_check+0x26c>)
b4e: 486f ldr r0, [pc, #444] ; (d0c <sd_mmc_check+0x270>)
b50: 320e adds r2, #14
b52: 47b8 blx r7
sd_mmc_card->state = SD_MMC_CARD_STATE_UNUSABLE;
b54: 6823 ldr r3, [r4, #0]
b56: f04f 0803 mov.w r8, #3
b5a: f883 800a strb.w r8, [r3, #10]
b5e: e7a5 b.n aac <sd_mmc_check+0x10>
resp = driver_get_response(sd_mmc_hal);
b60: 68a0 ldr r0, [r4, #8]
b62: 4b6b ldr r3, [pc, #428] ; (d10 <sd_mmc_check+0x274>)
b64: 4798 blx r3
if (resp == 0xFFFFFFFF) {
b66: 1c45 adds r5, r0, #1
b68: d0c2 beq.n af0 <sd_mmc_check+0x54>
if ((resp & (SD_CMD8_MASK_PATTERN | SD_CMD8_MASK_VOLTAGE)) != (SD_CMD8_PATTERN | SD_CMD8_HIGH_VOLTAGE)) {
b6a: f3c0 000b ubfx r0, r0, #0, #12
b6e: f5b0 7fd5 cmp.w r0, #426 ; 0x1aa
b72: d1ef bne.n b54 <sd_mmc_check+0xb8>
*v2 = 1;
b74: 4645 mov r5, r8
b76: e7bc b.n af2 <sd_mmc_check+0x56>
if (!driver_send_cmd(sd_mmc_hal, SD_SPI_ACMD41_SD_SEND_OP_COND, arg)) {
b78: 68a0 ldr r0, [r4, #8]
b7a: 462a mov r2, r5
b7c: f241 1129 movw r1, #4393 ; 0x1129
b80: 47b0 blx r6
b82: b910 cbnz r0, b8a <sd_mmc_check+0xee>
sd_mmc_spi_debug("%s: ACMD41 Fail\n\r", __func__);
b84: 495d ldr r1, [pc, #372] ; (cfc <sd_mmc_check+0x260>)
b86: 4863 ldr r0, [pc, #396] ; (d14 <sd_mmc_check+0x278>)
b88: e7c6 b.n b18 <sd_mmc_check+0x7c>
resp = driver_get_response(sd_mmc_hal);
b8a: 68a0 ldr r0, [r4, #8]
b8c: 47d0 blx sl
if (!(resp & R1_SPI_IDLE)) {
b8e: f010 0201 ands.w r2, r0, #1
b92: d007 beq.n ba4 <sd_mmc_check+0x108>
if (retry-- == 0) {
b94: f1b9 0901 subs.w r9, r9, #1
b98: d1b5 bne.n b06 <sd_mmc_check+0x6a>
sd_mmc_spi_debug("%s: ACMD41 Timeout on busy, resp32 0x%08x \n\r",
b9a: 4602 mov r2, r0
b9c: 4957 ldr r1, [pc, #348] ; (cfc <sd_mmc_check+0x260>)
b9e: 485e ldr r0, [pc, #376] ; (d18 <sd_mmc_check+0x27c>)
ba0: 47b8 blx r7
return false;
ba2: e7ba b.n b1a <sd_mmc_check+0x7e>
if (!driver_send_cmd(sd_mmc_hal, SDMMC_SPI_CMD58_READ_OCR, 0)) {
ba4: 68a0 ldr r0, [r4, #8]
ba6: f240 513a movw r1, #1338 ; 0x53a
baa: 47b0 blx r6
bac: b910 cbnz r0, bb4 <sd_mmc_check+0x118>
sd_mmc_spi_debug("%s: CMD58 Fail\n\r", __func__);
bae: 4953 ldr r1, [pc, #332] ; (cfc <sd_mmc_check+0x260>)
bb0: 485a ldr r0, [pc, #360] ; (d1c <sd_mmc_check+0x280>)
bb2: e7b1 b.n b18 <sd_mmc_check+0x7c>
if ((driver_get_response(sd_mmc_hal) & OCR_CCS) != 0) {
bb4: 68a0 ldr r0, [r4, #8]
bb6: 47d0 blx sl
bb8: 0041 lsls r1, r0, #1
bba: d504 bpl.n bc6 <sd_mmc_check+0x12a>
sd_mmc_card->type |= CARD_TYPE_HC;
bbc: 6822 ldr r2, [r4, #0]
bbe: 7ad3 ldrb r3, [r2, #11]
bc0: f043 0308 orr.w r3, r3, #8
bc4: 72d3 strb r3, [r2, #11]
if (!driver_send_cmd(sd_mmc_hal, SDMMC_SPI_CMD59_CRC_ON_OFF, 0)) {
bc6: 68a0 ldr r0, [r4, #8]
bc8: 2200 movs r2, #0
bca: f241 113b movw r1, #4411 ; 0x113b
bce: 47b0 blx r6
bd0: 2800 cmp r0, #0
bd2: d0bf beq.n b54 <sd_mmc_check+0xb8>
if (sd_mmc_card->type & CARD_TYPE_SD) {
bd4: 6823 ldr r3, [r4, #0]
bd6: 7adb ldrb r3, [r3, #11]
bd8: 07da lsls r2, r3, #31
bda: f140 818e bpl.w efa <sd_mmc_check+0x45e>
if (!sd_mmc_cmd9_spi()) {
bde: 4b50 ldr r3, [pc, #320] ; (d20 <sd_mmc_check+0x284>)
be0: 4798 blx r3
be2: 2800 cmp r0, #0
be4: d0b6 beq.n b54 <sd_mmc_check+0xb8>
tran_speed = CSD_TRAN_SPEED(sd_mmc_card->csd);
be6: f8d4 a000 ldr.w sl, [r4]
bea: 4d4e ldr r5, [pc, #312] ; (d24 <sd_mmc_check+0x288>)
bec: f10a 0b0e add.w fp, sl, #14
bf0: 2308 movs r3, #8
bf2: 2260 movs r2, #96 ; 0x60
bf4: 2180 movs r1, #128 ; 0x80
bf6: 4658 mov r0, fp
bf8: 47a8 blx r5
mul = sd_trans_multipliers[(tran_speed >> 3) & 0xF];
bfa: 4b40 ldr r3, [pc, #256] ; (cfc <sd_mmc_check+0x260>)
bfc: f3c0 02c3 ubfx r2, r0, #3, #4
unit = sd_mmc_trans_units[tran_speed & 0x7];
c00: f000 0007 and.w r0, r0, #7
c04: eb03 0080 add.w r0, r3, r0, lsl #2
mul = sd_trans_multipliers[(tran_speed >> 3) & 0xF];
c08: eb03 0282 add.w r2, r3, r2, lsl #2
if (CSD_STRUCTURE_VERSION(sd_mmc_card->csd) >= SD_CSD_VER_2_0) {
c0c: 2180 movs r1, #128 ; 0x80
sd_mmc_card->clock = unit * mul * 1000;
c0e: 6fd3 ldr r3, [r2, #124] ; 0x7c
c10: 6e02 ldr r2, [r0, #96] ; 0x60
c12: 4353 muls r3, r2
c14: f44f 727a mov.w r2, #1000 ; 0x3e8
c18: 4353 muls r3, r2
c1a: f8ca 3000 str.w r3, [sl]
if (CSD_STRUCTURE_VERSION(sd_mmc_card->csd) >= SD_CSD_VER_2_0) {
c1e: 227e movs r2, #126 ; 0x7e
c20: 2302 movs r3, #2
c22: 4658 mov r0, fp
c24: 47a8 blx r5
c26: 46a9 mov r9, r5
c28: 2800 cmp r0, #0
c2a: f000 814c beq.w ec6 <sd_mmc_check+0x42a>
sd_mmc_card->capacity = (SD_CSD_2_0_C_SIZE(sd_mmc_card->csd) + 1) * 512;
c2e: 2316 movs r3, #22
c30: 2230 movs r2, #48 ; 0x30
c32: 2180 movs r1, #128 ; 0x80
c34: 4658 mov r0, fp
c36: 47a8 blx r5
c38: 3001 adds r0, #1
c3a: 0240 lsls r0, r0, #9
if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD55_APP_CMD, (uint32_t)sd_mmc_card->rca << 16)) {
c3c: f8ba 2008 ldrh.w r2, [sl, #8]
c40: f8ca 0004 str.w r0, [sl, #4]
c44: 0412 lsls r2, r2, #16
c46: 68a0 ldr r0, [r4, #8]
c48: f241 1137 movw r1, #4407 ; 0x1137
c4c: 47b0 blx r6
c4e: 2800 cmp r0, #0
c50: d080 beq.n b54 <sd_mmc_check+0xb8>
if (!driver_adtc_start(sd_mmc_hal, SD_ACMD51_SEND_SCR, 0, SD_SCR_REG_BSIZE, 1, true)) {
c52: 2501 movs r5, #1
c54: e9cd 5500 strd r5, r5, [sp]
c58: 4933 ldr r1, [pc, #204] ; (d28 <sd_mmc_check+0x28c>)
c5a: 68a0 ldr r0, [r4, #8]
c5c: f8df a0d8 ldr.w sl, [pc, #216] ; d38 <sd_mmc_check+0x29c>
c60: 2308 movs r3, #8
c62: 2200 movs r2, #0
c64: 47d0 blx sl
c66: 2800 cmp r0, #0
c68: f43f af74 beq.w b54 <sd_mmc_check+0xb8>
if (!driver_start_read_blocks(sd_mmc_hal, scr, 1)) {
c6c: 68a0 ldr r0, [r4, #8]
c6e: 4b2f ldr r3, [pc, #188] ; (d2c <sd_mmc_check+0x290>)
c70: 462a mov r2, r5
c72: a904 add r1, sp, #16
c74: 4798 blx r3
c76: 2800 cmp r0, #0
c78: f43f af6c beq.w b54 <sd_mmc_check+0xb8>
if (!driver_wait_end_of_read_blocks(sd_mmc_hal)) {
c7c: 68a0 ldr r0, [r4, #8]
c7e: 4b2c ldr r3, [pc, #176] ; (d30 <sd_mmc_check+0x294>)
c80: 4798 blx r3
c82: 2800 cmp r0, #0
c84: f43f af66 beq.w b54 <sd_mmc_check+0xb8>
switch (SD_SCR_SD_SPEC(scr)) {
c88: 2304 movs r3, #4
c8a: 2238 movs r2, #56 ; 0x38
c8c: 2140 movs r1, #64 ; 0x40
c8e: a804 add r0, sp, #16
c90: 47c8 blx r9
c92: 42a8 cmp r0, r5
sd_mmc_card->version = CARD_VER_SD_1_0;
c94: f8d4 a000 ldr.w sl, [r4]
switch (SD_SCR_SD_SPEC(scr)) {
c98: f000 812c beq.w ef4 <sd_mmc_check+0x458>
c9c: 2802 cmp r0, #2
c9e: f040 8137 bne.w f10 <sd_mmc_check+0x474>
if (SD_SCR_SD_SPEC3(scr) == SD_SCR_SD_SPEC_3_00) {
ca2: 462b mov r3, r5
ca4: 222f movs r2, #47 ; 0x2f
ca6: 2140 movs r1, #64 ; 0x40
ca8: a804 add r0, sp, #16
caa: 47c8 blx r9
cac: 2801 cmp r0, #1
sd_mmc_card->version = CARD_VER_SD_3_0;
cae: bf0c ite eq
cb0: 2330 moveq r3, #48 ; 0x30
sd_mmc_card->version = CARD_VER_SD_2_0;
cb2: 2320 movne r3, #32
cb4: e11f b.n ef6 <sd_mmc_check+0x45a>
resp = driver_get_response(sd_mmc_hal);
cb6: 68a0 ldr r0, [r4, #8]
cb8: 47c8 blx r9
if (!(resp & R1_SPI_IDLE)) {
cba: f010 0201 ands.w r2, r0, #1
cbe: d006 beq.n cce <sd_mmc_check+0x232>
if (retry-- == 0) {
cc0: 3d01 subs r5, #1
cc2: f4bf af39 bcs.w b38 <sd_mmc_check+0x9c>
sd_mmc_spi_debug("%s: CMD1 Timeout on busy\n\r", __func__);
cc6: 4910 ldr r1, [pc, #64] ; (d08 <sd_mmc_check+0x26c>)
cc8: 481a ldr r0, [pc, #104] ; (d34 <sd_mmc_check+0x298>)
sd_mmc_spi_debug("%s: CMD58 Fail\n\r", __func__);
cca: 47b8 blx r7
return false;
ccc: e742 b.n b54 <sd_mmc_check+0xb8>
if (!driver_send_cmd(sd_mmc_hal, SDMMC_SPI_CMD58_READ_OCR, 0)) {
cce: 68a0 ldr r0, [r4, #8]
cd0: f240 513a movw r1, #1338 ; 0x53a
cd4: 47b0 blx r6
cd6: bb88 cbnz r0, d3c <sd_mmc_check+0x2a0>
sd_mmc_spi_debug("%s: CMD58 Fail\n\r", __func__);
cd8: 490b ldr r1, [pc, #44] ; (d08 <sd_mmc_check+0x26c>)
cda: 4810 ldr r0, [pc, #64] ; (d1c <sd_mmc_check+0x280>)
cdc: e7f5 b.n cca <sd_mmc_check+0x22e>
cde: bf00 nop
ce0: 00000925 .word 0x00000925
ce4: 00000a6d .word 0x00000a6d
ce8: 20000298 .word 0x20000298
cec: 00004005 .word 0x00004005
cf0: 000013e5 .word 0x000013e5
cf4: 00004a79 .word 0x00004a79
cf8: 00001549 .word 0x00001549
cfc: 00004b5c .word 0x00004b5c
d00: 00004a91 .word 0x00004a91
d04: 00004af2 .word 0x00004af2
d08: 00004b6b .word 0x00004b6b
d0c: 00004b06 .word 0x00004b06
d10: 0000153d .word 0x0000153d
d14: 00004aa2 .word 0x00004aa2
d18: 00004ab4 .word 0x00004ab4
d1c: 00004ae1 .word 0x00004ae1
d20: 00000a1d .word 0x00000a1d
d24: 00000855 .word 0x00000855
d28: 00081133 .word 0x00081133
d2c: 000013f9 .word 0x000013f9
d30: 00001499 .word 0x00001499
d34: 00004b2a .word 0x00004b2a
d38: 00001209 .word 0x00001209
if ((driver_get_response(sd_mmc_hal) & OCR_ACCESS_MODE_MASK)
d3c: 68a0 ldr r0, [r4, #8]
d3e: 47c8 blx r9
d40: f000 40c0 and.w r0, r0, #1610612736 ; 0x60000000
d44: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000
sd_mmc_card->type |= CARD_TYPE_HC;
d48: bf08 it eq
d4a: 6822 ldreq r2, [r4, #0]
if (!driver_send_cmd(sd_mmc_hal, SDMMC_SPI_CMD59_CRC_ON_OFF, 0)) {
d4c: 68a0 ldr r0, [r4, #8]
sd_mmc_card->type |= CARD_TYPE_HC;
d4e: bf02 ittt eq
d50: 7ad3 ldrbeq r3, [r2, #11]
d52: f043 0308 orreq.w r3, r3, #8
d56: 72d3 strbeq r3, [r2, #11]
if (!driver_send_cmd(sd_mmc_hal, SDMMC_SPI_CMD59_CRC_ON_OFF, 0)) {
d58: f241 113b movw r1, #4411 ; 0x113b
d5c: 2200 movs r2, #0
d5e: 47b0 blx r6
d60: 2800 cmp r0, #0
d62: f43f aef7 beq.w b54 <sd_mmc_check+0xb8>
if (!sd_mmc_cmd9_spi()) {
d66: 4b70 ldr r3, [pc, #448] ; (f28 <sd_mmc_check+0x48c>)
d68: 4798 blx r3
d6a: 2800 cmp r0, #0
d6c: f43f aef2 beq.w b54 <sd_mmc_check+0xb8>
switch (MMC_CSD_SPEC_VERS(sd_mmc_card->csd)) {
d70: f8d4 9000 ldr.w r9, [r4]
d74: 4d6d ldr r5, [pc, #436] ; (f2c <sd_mmc_check+0x490>)
d76: f109 0b0e add.w fp, r9, #14
d7a: 2304 movs r3, #4
d7c: 227a movs r2, #122 ; 0x7a
d7e: 2180 movs r1, #128 ; 0x80
d80: 4658 mov r0, fp
d82: 47a8 blx r5
d84: 3801 subs r0, #1
d86: 46aa mov sl, r5
d88: 2803 cmp r0, #3
d8a: d803 bhi.n d94 <sd_mmc_check+0x2f8>
d8c: e8df f000 tbb [pc, r0]
d90: 97959391 .word 0x97959391
sd_mmc_card->version = CARD_VER_MMC_1_2;
d94: 2312 movs r3, #18
sd_mmc_card->version = CARD_VER_MMC_4;
d96: f889 300c strb.w r3, [r9, #12]
tran_speed = CSD_TRAN_SPEED(sd_mmc_card->csd);
d9a: 2260 movs r2, #96 ; 0x60
d9c: 2308 movs r3, #8
d9e: 2180 movs r1, #128 ; 0x80
da0: 4658 mov r0, fp
da2: 47d0 blx sl
mul = mmc_trans_multipliers[(tran_speed >> 3) & 0xF];
da4: 4b62 ldr r3, [pc, #392] ; (f30 <sd_mmc_check+0x494>)
da6: f3c0 02c3 ubfx r2, r0, #3, #4
unit = sd_mmc_trans_units[tran_speed & 0x7];
daa: f000 0007 and.w r0, r0, #7
dae: eb03 0080 add.w r0, r3, r0, lsl #2
mul = mmc_trans_multipliers[(tran_speed >> 3) & 0xF];
db2: eb03 0282 add.w r2, r3, r2, lsl #2
if (MMC_CSD_C_SIZE(sd_mmc_card->csd) != 0xFFF) {
db6: 2180 movs r1, #128 ; 0x80
sd_mmc_card->clock = unit * mul * 1000;
db8: 6a13 ldr r3, [r2, #32]
dba: 6e02 ldr r2, [r0, #96] ; 0x60
dbc: 4353 muls r3, r2
dbe: f44f 727a mov.w r2, #1000 ; 0x3e8
dc2: 4353 muls r3, r2
dc4: f8c9 3000 str.w r3, [r9]
if (MMC_CSD_C_SIZE(sd_mmc_card->csd) != 0xFFF) {
dc8: 223e movs r2, #62 ; 0x3e
dca: 230c movs r3, #12
dcc: 4658 mov r0, fp
dce: 47d0 blx sl
dd0: f640 73ff movw r3, #4095 ; 0xfff
dd4: 4298 cmp r0, r3
dd6: 4605 mov r5, r0
dd8: d012 beq.n e00 <sd_mmc_check+0x364>
= ((MMC_CSD_C_SIZE(sd_mmc_card->csd) + 1) * (1 << (MMC_CSD_C_SIZE_MULT(sd_mmc_card->csd) + 2)));
dda: 2303 movs r3, #3
ddc: 222f movs r2, #47 ; 0x2f
dde: 2180 movs r1, #128 ; 0x80
de0: 4658 mov r0, fp
de2: 47d0 blx sl
de4: 1c6b adds r3, r5, #1
de6: 3002 adds r0, #2
uint32_t blocknr
de8: fa03 f500 lsl.w r5, r3, r0
sd_mmc_card->capacity = blocknr * (1 << MMC_CSD_READ_BL_LEN(sd_mmc_card->csd)) / 1024;
dec: 2250 movs r2, #80 ; 0x50
dee: 2304 movs r3, #4
df0: 2180 movs r1, #128 ; 0x80
df2: 4658 mov r0, fp
df4: 47d0 blx sl
df6: fa05 f000 lsl.w r0, r5, r0
dfa: 0a80 lsrs r0, r0, #10
dfc: f8c9 0004 str.w r0, [r9, #4]
if (sd_mmc_card->version >= CARD_VER_MMC_4) {
e00: f899 300c ldrb.w r3, [r9, #12]
e04: 2b3f cmp r3, #63 ; 0x3f
e06: d93e bls.n e86 <sd_mmc_check+0x3ea>
if (!driver_adtc_start(sd_mmc_hal, MMC_CMD8_SEND_EXT_CSD, 0, EXT_CSD_BSIZE, 1, false)) {
e08: 2301 movs r3, #1
e0a: 2200 movs r2, #0
e0c: e9cd 3200 strd r3, r2, [sp]
e10: 4948 ldr r1, [pc, #288] ; (f34 <sd_mmc_check+0x498>)
e12: 68a0 ldr r0, [r4, #8]
e14: 4d48 ldr r5, [pc, #288] ; (f38 <sd_mmc_check+0x49c>)
e16: f44f 7300 mov.w r3, #512 ; 0x200
e1a: 47a8 blx r5
e1c: 2800 cmp r0, #0
e1e: f43f ae99 beq.w b54 <sd_mmc_check+0xb8>
if (!driver_read_word(sd_mmc_hal, &ext_csd)) {
e22: f8df b124 ldr.w fp, [pc, #292] ; f48 <sd_mmc_check+0x4ac>
e26: 2532 movs r5, #50 ; 0x32
e28: 46d9 mov r9, fp
e2a: 68a0 ldr r0, [r4, #8]
e2c: a903 add r1, sp, #12
e2e: 47d8 blx fp
e30: 2800 cmp r0, #0
e32: f43f ae8f beq.w b54 <sd_mmc_check+0xb8>
for (i = 0; i < (EXT_CSD_CARD_TYPE_INDEX + 4) / 4; i++) {
e36: 3d01 subs r5, #1
e38: b2ad uxth r5, r5
e3a: 2d00 cmp r5, #0
e3c: d1f5 bne.n e2a <sd_mmc_check+0x38e>
if (MMC_CSD_C_SIZE(sd_mmc_card->csd) == 0xFFF) {
e3e: 6820 ldr r0, [r4, #0]
e40: 230c movs r3, #12
e42: 223e movs r2, #62 ; 0x3e
e44: 2180 movs r1, #128 ; 0x80
e46: 300e adds r0, #14
e48: 47d0 blx sl
e4a: f640 73ff movw r3, #4095 ; 0xfff
e4e: 4298 cmp r0, r3
e50: d137 bne.n ec2 <sd_mmc_check+0x426>
e52: 2504 movs r5, #4
if (!driver_read_word(sd_mmc_hal, &sec_count)) {
e54: 68a0 ldr r0, [r4, #8]
e56: a904 add r1, sp, #16
e58: 47c8 blx r9
e5a: 2800 cmp r0, #0
e5c: f43f ae7a beq.w b54 <sd_mmc_check+0xb8>
for (; i < (EXT_CSD_SEC_COUNT_INDEX + 4) / 4; i++) {
e60: 3d01 subs r5, #1
e62: b2ad uxth r5, r5
e64: 2d00 cmp r5, #0
e66: d1f5 bne.n e54 <sd_mmc_check+0x3b8>
sd_mmc_card->capacity = sec_count / 2;
e68: 9b04 ldr r3, [sp, #16]
e6a: 6822 ldr r2, [r4, #0]
e6c: 085b lsrs r3, r3, #1
e6e: 6053 str r3, [r2, #4]
e70: 2536 movs r5, #54 ; 0x36
if (!driver_read_word(sd_mmc_hal, &sec_count)) {
e72: 68a0 ldr r0, [r4, #8]
e74: a904 add r1, sp, #16
e76: 47c8 blx r9
e78: 2800 cmp r0, #0
e7a: f43f ae6b beq.w b54 <sd_mmc_check+0xb8>
for (; i < EXT_CSD_BSIZE / 4; i++) {
e7e: 3501 adds r5, #1
e80: b2ad uxth r5, r5
e82: 2d80 cmp r5, #128 ; 0x80
e84: d1f5 bne.n e72 <sd_mmc_check+0x3d6>
if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD16_SET_BLOCKLEN, SD_MMC_BLOCK_SIZE)) {
e86: 68a0 ldr r0, [r4, #8]
e88: f44f 7200 mov.w r2, #512 ; 0x200
e8c: f241 1110 movw r1, #4368 ; 0x1110
e90: 47b0 blx r6
e92: 2800 cmp r0, #0
e94: f43f ae5e beq.w b54 <sd_mmc_check+0xb8>
if (!sd_mmc_cmd13()) {
e98: 4b28 ldr r3, [pc, #160] ; (f3c <sd_mmc_check+0x4a0>)
e9a: 4798 blx r3
e9c: 2800 cmp r0, #0
e9e: f43f ae59 beq.w b54 <sd_mmc_check+0xb8>
sd_mmc_configure_slot();
ea2: 4b27 ldr r3, [pc, #156] ; (f40 <sd_mmc_check+0x4a4>)
ea4: 4798 blx r3
sd_mmc_spi_debug("SD/MMC card ready\n\r");
ea6: 4827 ldr r0, [pc, #156] ; (f44 <sd_mmc_check+0x4a8>)
ea8: 47b8 blx r7
sd_mmc_card->state = SD_MMC_CARD_STATE_READY;
eaa: 6823 ldr r3, [r4, #0]
eac: 2200 movs r2, #0
eae: 729a strb r2, [r3, #10]
sd_mmc_deselect_slot();
eb0: e5fc b.n aac <sd_mmc_check+0x10>
sd_mmc_card->version = CARD_VER_MMC_1_4;
eb2: 2314 movs r3, #20
eb4: e76f b.n d96 <sd_mmc_check+0x2fa>
sd_mmc_card->version = CARD_VER_MMC_2_2;
eb6: 2322 movs r3, #34 ; 0x22
eb8: e76d b.n d96 <sd_mmc_check+0x2fa>
sd_mmc_card->version = CARD_VER_MMC_3;
eba: 2330 movs r3, #48 ; 0x30
ebc: e76b b.n d96 <sd_mmc_check+0x2fa>
sd_mmc_card->version = CARD_VER_MMC_4;
ebe: 2340 movs r3, #64 ; 0x40
ec0: e769 b.n d96 <sd_mmc_check+0x2fa>
ec2: 2532 movs r5, #50 ; 0x32
ec4: e7d5 b.n e72 <sd_mmc_check+0x3d6>
= ((SD_CSD_1_0_C_SIZE(sd_mmc_card->csd) + 1) * (1 << (SD_CSD_1_0_C_SIZE_MULT(sd_mmc_card->csd) + 2)));
ec6: 230c movs r3, #12
ec8: 223e movs r2, #62 ; 0x3e
eca: 2180 movs r1, #128 ; 0x80
ecc: 4658 mov r0, fp
ece: 47a8 blx r5
ed0: 2303 movs r3, #3
ed2: 4605 mov r5, r0
ed4: 222f movs r2, #47 ; 0x2f
ed6: 2180 movs r1, #128 ; 0x80
ed8: 4658 mov r0, fp
eda: 47c8 blx r9
edc: 3501 adds r5, #1
ede: 3002 adds r0, #2
uint32_t blocknr
ee0: 4085 lsls r5, r0
sd_mmc_card->capacity = blocknr * (1 << SD_CSD_1_0_READ_BL_LEN(sd_mmc_card->csd)) / 1024;
ee2: 2304 movs r3, #4
ee4: 2250 movs r2, #80 ; 0x50
ee6: 2180 movs r1, #128 ; 0x80
ee8: 4658 mov r0, fp
eea: 47c8 blx r9
eec: fa05 f000 lsl.w r0, r5, r0
ef0: 0a80 lsrs r0, r0, #10
ef2: e6a3 b.n c3c <sd_mmc_check+0x1a0>
sd_mmc_card->version = CARD_VER_SD_1_10;
ef4: 231a movs r3, #26
sd_mmc_card->version = CARD_VER_SD_1_0;
ef6: f88a 300c strb.w r3, [sl, #12]
if ((sd_mmc_card->type & CARD_TYPE_SD) &&
efa: 6823 ldr r3, [r4, #0]
efc: 7adb ldrb r3, [r3, #11]
efe: f003 0309 and.w r3, r3, #9
f02: 2b01 cmp r3, #1
f04: d006 beq.n f14 <sd_mmc_check+0x478>
if (sd_mmc_card->type & CARD_TYPE_SD) {
f06: 6823 ldr r3, [r4, #0]
f08: 7adb ldrb r3, [r3, #11]
f0a: 07db lsls r3, r3, #31
f0c: d4c4 bmi.n e98 <sd_mmc_check+0x3fc>
f0e: e7c8 b.n ea2 <sd_mmc_check+0x406>
sd_mmc_card->version = CARD_VER_SD_1_0;
f10: 2310 movs r3, #16
f12: e7f0 b.n ef6 <sd_mmc_check+0x45a>
if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD16_SET_BLOCKLEN, SD_MMC_BLOCK_SIZE)) {
f14: 68a0 ldr r0, [r4, #8]
f16: f44f 7200 mov.w r2, #512 ; 0x200
f1a: f241 1110 movw r1, #4368 ; 0x1110
f1e: 47b0 blx r6
f20: 2800 cmp r0, #0
f22: d1f0 bne.n f06 <sd_mmc_check+0x46a>
f24: e616 b.n b54 <sd_mmc_check+0xb8>
f26: bf00 nop
f28: 00000a1d .word 0x00000a1d
f2c: 00000855 .word 0x00000855
f30: 00004b5c .word 0x00004b5c
f34: 00081108 .word 0x00081108
f38: 00001209 .word 0x00001209
f3c: 000009d9 .word 0x000009d9
f40: 000008fd .word 0x000008fd
f44: 00004b45 .word 0x00004b45
f48: 0000149d .word 0x0000149d
00000f4c <sd_mmc_get_type>:
card_type_t sd_mmc_get_type(uint8_t slot)
{
f4c: b508 push {r3, lr}
if (SD_MMC_OK != sd_mmc_select_slot(slot)) {
f4e: 4b05 ldr r3, [pc, #20] ; (f64 <sd_mmc_get_type+0x18>)
f50: 4798 blx r3
f52: b928 cbnz r0, f60 <sd_mmc_get_type+0x14>
return CARD_TYPE_UNKNOWN;
}
sd_mmc_deselect_slot();
f54: 4b04 ldr r3, [pc, #16] ; (f68 <sd_mmc_get_type+0x1c>)
f56: 4798 blx r3
return sd_mmc_card->type;
f58: 4b04 ldr r3, [pc, #16] ; (f6c <sd_mmc_get_type+0x20>)
f5a: 681b ldr r3, [r3, #0]
f5c: 7ad8 ldrb r0, [r3, #11]
}
f5e: bd08 pop {r3, pc}
return CARD_TYPE_UNKNOWN;
f60: 2000 movs r0, #0
f62: e7fc b.n f5e <sd_mmc_get_type+0x12>
f64: 00000925 .word 0x00000925
f68: 00000a6d .word 0x00000a6d
f6c: 20000298 .word 0x20000298
00000f70 <sd_mmc_init_read_blocks>:
}
return false;
}
sd_mmc_err_t sd_mmc_init_read_blocks(uint8_t slot, uint32_t start, uint16_t nb_block)
{
f70: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr}
sd_mmc_err_t sd_mmc_err;
uint32_t cmd, arg, resp;
sd_mmc_err = sd_mmc_select_slot(slot);
f72: 4b17 ldr r3, [pc, #92] ; (fd0 <sd_mmc_init_read_blocks+0x60>)
{
f74: 460f mov r7, r1
f76: 4614 mov r4, r2
sd_mmc_err = sd_mmc_select_slot(slot);
f78: 4798 blx r3
if (sd_mmc_err != SD_MMC_OK) {
f7a: 4605 mov r5, r0
f7c: b928 cbnz r0, f8a <sd_mmc_init_read_blocks+0x1a>
return sd_mmc_err;
}
/* Wait for data ready status */
if (!sd_mmc_cmd13()) {
f7e: 4b15 ldr r3, [pc, #84] ; (fd4 <sd_mmc_init_read_blocks+0x64>)
f80: 4798 blx r3
f82: b928 cbnz r0, f90 <sd_mmc_init_read_blocks+0x20>
sd_mmc_deselect_slot();
f84: 4b14 ldr r3, [pc, #80] ; (fd8 <sd_mmc_init_read_blocks+0x68>)
f86: 4798 blx r3
return SD_MMC_ERR_COMM;
f88: 2505 movs r5, #5
}
sd_mmc_nb_block_remaining = nb_block;
sd_mmc_nb_block_to_tranfer = nb_block;
return SD_MMC_OK;
}
f8a: 4628 mov r0, r5
f8c: b003 add sp, #12
f8e: bdf0 pop {r4, r5, r6, r7, pc}
cmd = SDMMC_CMD17_READ_SINGLE_BLOCK;
f90: 4b12 ldr r3, [pc, #72] ; (fdc <sd_mmc_init_read_blocks+0x6c>)
if (sd_mmc_card->type & CARD_TYPE_HC) {
f92: 4e13 ldr r6, [pc, #76] ; (fe0 <sd_mmc_init_read_blocks+0x70>)
cmd = SDMMC_CMD17_READ_SINGLE_BLOCK;
f94: 4913 ldr r1, [pc, #76] ; (fe4 <sd_mmc_init_read_blocks+0x74>)
if (!driver_adtc_start(sd_mmc_hal, cmd, arg, SD_MMC_BLOCK_SIZE, nb_block, true)) {
f96: 68b0 ldr r0, [r6, #8]
cmd = SDMMC_CMD17_READ_SINGLE_BLOCK;
f98: 2c01 cmp r4, #1
f9a: bf98 it ls
f9c: 4619 movls r1, r3
if (sd_mmc_card->type & CARD_TYPE_HC) {
f9e: 6833 ldr r3, [r6, #0]
fa0: 7adb ldrb r3, [r3, #11]
fa2: 071b lsls r3, r3, #28
arg = (start * SD_MMC_BLOCK_SIZE);
fa4: bf58 it pl
fa6: 027f lslpl r7, r7, #9
if (!driver_adtc_start(sd_mmc_hal, cmd, arg, SD_MMC_BLOCK_SIZE, nb_block, true)) {
fa8: 2301 movs r3, #1
faa: e9cd 4300 strd r4, r3, [sp]
fae: 463a mov r2, r7
fb0: f44f 7300 mov.w r3, #512 ; 0x200
fb4: 4f0c ldr r7, [pc, #48] ; (fe8 <sd_mmc_init_read_blocks+0x78>)
fb6: 47b8 blx r7
fb8: 2800 cmp r0, #0
fba: d0e3 beq.n f84 <sd_mmc_init_read_blocks+0x14>
resp = driver_get_response(sd_mmc_hal);
fbc: 4b0b ldr r3, [pc, #44] ; (fec <sd_mmc_init_read_blocks+0x7c>)
fbe: 68b0 ldr r0, [r6, #8]
fc0: 4798 blx r3
if (resp & CARD_STATUS_ERR_RD_WR) {
fc2: 4b0b ldr r3, [pc, #44] ; (ff0 <sd_mmc_init_read_blocks+0x80>)
fc4: 4003 ands r3, r0
fc6: 2b00 cmp r3, #0
fc8: d1dc bne.n f84 <sd_mmc_init_read_blocks+0x14>
sd_mmc_nb_block_remaining = nb_block;
fca: 8634 strh r4, [r6, #48] ; 0x30
sd_mmc_nb_block_to_tranfer = nb_block;
fcc: 8734 strh r4, [r6, #56] ; 0x38
return SD_MMC_OK;
fce: e7dc b.n f8a <sd_mmc_init_read_blocks+0x1a>
fd0: 00000925 .word 0x00000925
fd4: 000009d9 .word 0x000009d9
fd8: 00000a6d .word 0x00000a6d
fdc: 00081111 .word 0x00081111
fe0: 20000298 .word 0x20000298
fe4: 00101112 .word 0x00101112
fe8: 00001209 .word 0x00001209
fec: 0000153d .word 0x0000153d
ff0: e4580000 .word 0xe4580000
00000ff4 <sd_mmc_start_read_blocks>:
sd_mmc_err_t sd_mmc_start_read_blocks(void *dest, uint16_t nb_block)
{
ff4: b5f8 push {r3, r4, r5, r6, r7, lr}
assert(sd_mmc_nb_block_remaining >= nb_block, ">>>");
ff6: 4d0e ldr r5, [pc, #56] ; (1030 <sd_mmc_start_read_blocks+0x3c>)
ff8: 4a0e ldr r2, [pc, #56] ; (1034 <sd_mmc_start_read_blocks+0x40>)
ffa: 4f0f ldr r7, [pc, #60] ; (1038 <sd_mmc_start_read_blocks+0x44>)
{
ffc: 4606 mov r6, r0
assert(sd_mmc_nb_block_remaining >= nb_block, ">>>");
ffe: 8e28 ldrh r0, [r5, #48] ; 0x30
{
1000: 460c mov r4, r1
assert(sd_mmc_nb_block_remaining >= nb_block, ">>>");
1002: 42a0 cmp r0, r4
1004: bf34 ite cc
1006: 2000 movcc r0, #0
1008: 2001 movcs r0, #1
100a: 490c ldr r1, [pc, #48] ; (103c <sd_mmc_start_read_blocks+0x48>)
100c: f44f 63d9 mov.w r3, #1736 ; 0x6c8
1010: 47b8 blx r7
if (!driver_start_read_blocks(sd_mmc_hal, dest, nb_block)) {
1012: 68a8 ldr r0, [r5, #8]
1014: 4b0a ldr r3, [pc, #40] ; (1040 <sd_mmc_start_read_blocks+0x4c>)
1016: 4622 mov r2, r4
1018: 4631 mov r1, r6
101a: 4798 blx r3
101c: b128 cbz r0, 102a <sd_mmc_start_read_blocks+0x36>
sd_mmc_nb_block_remaining = 0;
return SD_MMC_ERR_COMM;
}
sd_mmc_nb_block_remaining -= nb_block;
101e: 8e28 ldrh r0, [r5, #48] ; 0x30
1020: 1b01 subs r1, r0, r4
1022: b289 uxth r1, r1
return SD_MMC_OK;
1024: 2000 movs r0, #0
1026: 8629 strh r1, [r5, #48] ; 0x30
}
1028: bdf8 pop {r3, r4, r5, r6, r7, pc}
sd_mmc_nb_block_remaining = 0;
102a: 4601 mov r1, r0
return SD_MMC_ERR_COMM;
102c: 2005 movs r0, #5
102e: e7fa b.n 1026 <sd_mmc_start_read_blocks+0x32>
1030: 20000298 .word 0x20000298
1034: 00004a62 .word 0x00004a62
1038: 00004099 .word 0x00004099
103c: 00004a75 .word 0x00004a75
1040: 000013f9 .word 0x000013f9
00001044 <sd_mmc_wait_end_of_read_blocks>:
sd_mmc_err_t sd_mmc_wait_end_of_read_blocks(bool abort)
{
1044: b538 push {r3, r4, r5, lr}
if (!driver_wait_end_of_read_blocks(sd_mmc_hal)) {
1046: 4d12 ldr r5, [pc, #72] ; (1090 <sd_mmc_wait_end_of_read_blocks+0x4c>)
1048: 4b12 ldr r3, [pc, #72] ; (1094 <sd_mmc_wait_end_of_read_blocks+0x50>)
{
104a: 4604 mov r4, r0
if (!driver_wait_end_of_read_blocks(sd_mmc_hal)) {
104c: 68a8 ldr r0, [r5, #8]
104e: 4798 blx r3
1050: b1e0 cbz r0, 108c <sd_mmc_wait_end_of_read_blocks+0x48>
return SD_MMC_ERR_COMM;
}
if (abort) {
1052: b144 cbz r4, 1066 <sd_mmc_wait_end_of_read_blocks+0x22>
sd_mmc_nb_block_remaining = 0;
1054: 2300 movs r3, #0
1056: 862b strh r3, [r5, #48] ; 0x30
} else if (sd_mmc_nb_block_remaining) {
return SD_MMC_OK;
}
/* All blocks are transfered then stop read operation */
if (sd_mmc_nb_block_to_tranfer == 1) {
1058: 8f2b ldrh r3, [r5, #56] ; 0x38
105a: 2b01 cmp r3, #1
105c: d108 bne.n 1070 <sd_mmc_wait_end_of_read_blocks+0x2c>
/* Single block transfer, then nothing to do */
sd_mmc_deselect_slot();
105e: 4b0e ldr r3, [pc, #56] ; (1098 <sd_mmc_wait_end_of_read_blocks+0x54>)
1060: 4798 blx r3
return SD_MMC_OK;
1062: 2000 movs r0, #0
if (!driver_adtc_stop(sd_mmc_hal, SDMMC_CMD12_STOP_TRANSMISSION, 0)) {
driver_adtc_stop(sd_mmc_hal, SDMMC_CMD12_STOP_TRANSMISSION, 0);
}
sd_mmc_deselect_slot();
return SD_MMC_OK;
}
1064: bd38 pop {r3, r4, r5, pc}
} else if (sd_mmc_nb_block_remaining) {
1066: 8e2b ldrh r3, [r5, #48] ; 0x30
1068: 2b00 cmp r3, #0
106a: d0f5 beq.n 1058 <sd_mmc_wait_end_of_read_blocks+0x14>
return SD_MMC_OK;
106c: 4620 mov r0, r4
106e: e7f9 b.n 1064 <sd_mmc_wait_end_of_read_blocks+0x20>
if (!driver_adtc_stop(sd_mmc_hal, SDMMC_CMD12_STOP_TRANSMISSION, 0)) {
1070: 2200 movs r2, #0
1072: 68a8 ldr r0, [r5, #8]
1074: 4c09 ldr r4, [pc, #36] ; (109c <sd_mmc_wait_end_of_read_blocks+0x58>)
1076: f243 110c movw r1, #12556 ; 0x310c
107a: 47a0 blx r4
107c: 4602 mov r2, r0
107e: 2800 cmp r0, #0
1080: d1ed bne.n 105e <sd_mmc_wait_end_of_read_blocks+0x1a>
driver_adtc_stop(sd_mmc_hal, SDMMC_CMD12_STOP_TRANSMISSION, 0);
1082: 68a8 ldr r0, [r5, #8]
1084: f243 110c movw r1, #12556 ; 0x310c
1088: 47a0 blx r4
108a: e7e8 b.n 105e <sd_mmc_wait_end_of_read_blocks+0x1a>
return SD_MMC_ERR_COMM;
108c: 2005 movs r0, #5
108e: e7e9 b.n 1064 <sd_mmc_wait_end_of_read_blocks+0x20>
1090: 20000298 .word 0x20000298
1094: 00001499 .word 0x00001499
1098: 00000a6d .word 0x00000a6d
109c: 000013e5 .word 0x000013e5
000010a0 <spi_m_sync_wait_busy>:
crc = (crc << 1) | 1;
return crc;
}
static bool spi_m_sync_wait_busy(struct spi_m_sync_descriptor* spi)
{
10a0: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr}
uint8_t line = 0xFF;
10a2: 23ff movs r3, #255 ; 0xff
{
10a4: 4605 mov r5, r0
uint8_t dummy = 0xFF;
/* Delay before check busy
* Nbr timing minimum = 8 cylces
*/
spi_m_sync_io_write(spi, &dummy, 1);
10a6: 4e17 ldr r6, [pc, #92] ; (1104 <spi_m_sync_wait_busy+0x64>)
uint8_t line = 0xFF;
10a8: f88d 3006 strb.w r3, [sp, #6]
spi_m_sync_io_write(spi, &dummy, 1);
10ac: 2201 movs r2, #1
10ae: f10d 0107 add.w r1, sp, #7
uint8_t dummy = 0xFF;
10b2: f88d 3007 strb.w r3, [sp, #7]
spi_m_sync_io_read(spi, &line, 1);
10b6: 4f14 ldr r7, [pc, #80] ; (1108 <spi_m_sync_wait_busy+0x68>)
* However a timeout is used.
* 200 000 * 8 cycles
*/
uint32_t nec_timeout = 200000;
spi_m_sync_io_write(spi, &dummy, 1);
spi_m_sync_io_read(spi, &line, 1);
10b8: 4c14 ldr r4, [pc, #80] ; (110c <spi_m_sync_wait_busy+0x6c>)
spi_m_sync_io_write(spi, &dummy, 1);
10ba: 47b0 blx r6
spi_m_sync_io_read(spi, &line, 1);
10bc: 2201 movs r2, #1
10be: f10d 0106 add.w r1, sp, #6
10c2: 4628 mov r0, r5
10c4: 47b8 blx r7
spi_m_sync_io_write(spi, &dummy, 1);
10c6: 2201 movs r2, #1
10c8: f10d 0107 add.w r1, sp, #7
10cc: 4628 mov r0, r5
10ce: 47b0 blx r6
spi_m_sync_io_read(spi, &line, 1);
10d0: 2201 movs r2, #1
10d2: f10d 0106 add.w r1, sp, #6
10d6: 4628 mov r0, r5
10d8: 47b8 blx r7
do {
spi_m_sync_io_write(spi, &dummy, 1);
10da: 2201 movs r2, #1
10dc: f10d 0107 add.w r1, sp, #7
10e0: 4628 mov r0, r5
10e2: 47b0 blx r6
spi_m_sync_io_read(spi, &line, 1);
10e4: 2201 movs r2, #1
10e6: f10d 0106 add.w r1, sp, #6
10ea: 4628 mov r0, r5
10ec: 47b8 blx r7
if (!(nec_timeout--)) {
10ee: 3c01 subs r4, #1
10f0: d006 beq.n 1100 <spi_m_sync_wait_busy+0x60>
return false;
}
} while (line != 0xFF);
10f2: f89d 3006 ldrb.w r3, [sp, #6]
10f6: 2bff cmp r3, #255 ; 0xff
10f8: d1ef bne.n 10da <spi_m_sync_wait_busy+0x3a>
return true;
10fa: 2001 movs r0, #1
}
10fc: b003 add sp, #12
10fe: bdf0 pop {r4, r5, r6, r7, pc}
return false;
1100: 4620 mov r0, r4
1102: e7fb b.n 10fc <spi_m_sync_wait_busy+0x5c>
1104: 000016c1 .word 0x000016c1
1108: 000016cd .word 0x000016cd
110c: 00030d41 .word 0x00030d41
00001110 <spi_m_sync_stop_read_block>:
return true;
}
static void spi_m_sync_stop_read_block(struct spi_m_sync_descriptor* spi)
{
1110: b513 push {r0, r1, r4, lr}
uint8_t crc[2];
uint8_t dummy = 0xFF;
1112: 23ff movs r3, #255 ; 0xff
{
1114: 4604 mov r4, r0
uint8_t dummy = 0xFF;
1116: f88d 3003 strb.w r3, [sp, #3]
// Read 16-bit CRC (not cheked)
spi_m_sync_io_write(spi, &dummy, 1);
111a: f10d 0103 add.w r1, sp, #3
111e: 4b05 ldr r3, [pc, #20] ; (1134 <spi_m_sync_stop_read_block+0x24>)
1120: 2201 movs r2, #1
1122: 4798 blx r3
spi_m_sync_io_read(spi, crc, 2);
1124: 4b04 ldr r3, [pc, #16] ; (1138 <spi_m_sync_stop_read_block+0x28>)
1126: 2202 movs r2, #2
1128: a901 add r1, sp, #4
112a: 4620 mov r0, r4
112c: 4798 blx r3
}
112e: b002 add sp, #8
1130: bd10 pop {r4, pc}
1132: bf00 nop
1134: 000016c1 .word 0x000016c1
1138: 000016cd .word 0x000016cd
0000113c <spi_m_sync_start_read_block>:
{
113c: e92d 45f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, sl, lr}
assert(!(sd_mmc_spi_transfert_pos % sd_mmc_spi_block_size), ">>>");
1140: 4a25 ldr r2, [pc, #148] ; (11d8 <spi_m_sync_start_read_block+0x9c>)
1142: 4926 ldr r1, [pc, #152] ; (11dc <spi_m_sync_start_read_block+0xa0>)
1144: 4d26 ldr r5, [pc, #152] ; (11e0 <spi_m_sync_start_read_block+0xa4>)
token = 0;
1146: 4c27 ldr r4, [pc, #156] ; (11e4 <spi_m_sync_start_read_block+0xa8>)
spi_m_sync_io_write(spi, &dummy, 1);
1148: 4f27 ldr r7, [pc, #156] ; (11e8 <spi_m_sync_start_read_block+0xac>)
spi_m_sync_io_read(spi, &token, 1);
114a: f8df a0b8 ldr.w sl, [pc, #184] ; 1204 <spi_m_sync_start_read_block+0xc8>
uint8_t dummy = 0xFF;
114e: 23ff movs r3, #255 ; 0xff
1150: f88d 3007 strb.w r3, [sp, #7]
{
1154: 4606 mov r6, r0
assert(!(sd_mmc_spi_transfert_pos % sd_mmc_spi_block_size), ">>>");
1156: 8893 ldrh r3, [r2, #4]
1158: 6810 ldr r0, [r2, #0]
115a: fbb0 f2f3 udiv r2, r0, r3
115e: fb03 0012 mls r0, r3, r2, r0
1162: fab0 f080 clz r0, r0
1166: 23a8 movs r3, #168 ; 0xa8
1168: 4a20 ldr r2, [pc, #128] ; (11ec <spi_m_sync_start_read_block+0xb0>)
116a: 0940 lsrs r0, r0, #5
116c: 47a8 blx r5
token = 0;
116e: 2300 movs r3, #0
1170: f88d 3006 strb.w r3, [sp, #6]
if (i-- == 0) {
1174: 3c01 subs r4, #1
1176: d105 bne.n 1184 <spi_m_sync_start_read_block+0x48>
sd_mmc_spi_debug("%s: Read blocks timeout\n\r", __func__);
1178: 491d ldr r1, [pc, #116] ; (11f0 <spi_m_sync_start_read_block+0xb4>)
117a: 481e ldr r0, [pc, #120] ; (11f4 <spi_m_sync_start_read_block+0xb8>)
117c: 4b1e ldr r3, [pc, #120] ; (11f8 <spi_m_sync_start_read_block+0xbc>)
sd_mmc_spi_debug("%s: Out of range data error token\n\r", __func__);
117e: 4798 blx r3
return false;
1180: 4620 mov r0, r4
1182: e01f b.n 11c4 <spi_m_sync_start_read_block+0x88>
spi_m_sync_io_write(spi, &dummy, 1);
1184: 2201 movs r2, #1
1186: f10d 0107 add.w r1, sp, #7
118a: 4630 mov r0, r6
118c: 47b8 blx r7
spi_m_sync_io_read(spi, &token, 1);
118e: 2201 movs r2, #1
1190: f10d 0106 add.w r1, sp, #6
1194: 4630 mov r0, r6
1196: 47d0 blx sl
if (SPI_TOKEN_DATA_ERROR_VALID(token)) {
1198: f89d 0006 ldrb.w r0, [sp, #6]
119c: f010 08f0 ands.w r8, r0, #240 ; 0xf0
11a0: d115 bne.n 11ce <spi_m_sync_start_read_block+0x92>
assert(SPI_TOKEN_DATA_ERROR_ERRORS & token, ">>>");
11a2: 3800 subs r0, #0
11a4: bf18 it ne
11a6: 2001 movne r0, #1
11a8: 490c ldr r1, [pc, #48] ; (11dc <spi_m_sync_start_read_block+0xa0>)
11aa: 4a10 ldr r2, [pc, #64] ; (11ec <spi_m_sync_start_read_block+0xb0>)
11ac: 23be movs r3, #190 ; 0xbe
11ae: 47a8 blx r5
if (token & (SPI_TOKEN_DATA_ERROR_ERROR
11b0: f89d 0006 ldrb.w r0, [sp, #6]
sd_mmc_spi_debug("%s: CRC data error token\n\r", __func__);
11b4: 490e ldr r1, [pc, #56] ; (11f0 <spi_m_sync_start_read_block+0xb4>)
11b6: 4b10 ldr r3, [pc, #64] ; (11f8 <spi_m_sync_start_read_block+0xbc>)
if (token & (SPI_TOKEN_DATA_ERROR_ERROR
11b8: f010 0407 ands.w r4, r0, #7
11bc: d005 beq.n 11ca <spi_m_sync_start_read_block+0x8e>
sd_mmc_spi_debug("%s: CRC data error token\n\r", __func__);
11be: 480f ldr r0, [pc, #60] ; (11fc <spi_m_sync_start_read_block+0xc0>)
11c0: 4798 blx r3
return false;
11c2: 4640 mov r0, r8
}
11c4: b003 add sp, #12
11c6: e8bd 85f0 ldmia.w sp!, {r4, r5, r6, r7, r8, sl, pc}
sd_mmc_spi_debug("%s: Out of range data error token\n\r", __func__);
11ca: 480d ldr r0, [pc, #52] ; (1200 <spi_m_sync_start_read_block+0xc4>)
11cc: e7d7 b.n 117e <spi_m_sync_start_read_block+0x42>
} while (token != SPI_TOKEN_SINGLE_MULTI_READ);
11ce: 28fe cmp r0, #254 ; 0xfe
11d0: d1d0 bne.n 1174 <spi_m_sync_start_read_block+0x38>
return true;
11d2: 2001 movs r0, #1
11d4: e7f6 b.n 11c4 <spi_m_sync_start_read_block+0x88>
11d6: bf00 nop
11d8: 200002d4 .word 0x200002d4
11dc: 00004a75 .word 0x00004a75
11e0: 00004099 .word 0x00004099
11e4: 0007a121 .word 0x0007a121
11e8: 000016c1 .word 0x000016c1
11ec: 00004c18 .word 0x00004c18
11f0: 00004e6f .word 0x00004e6f
11f4: 00004c2f .word 0x00004c2f
11f8: 00004005 .word 0x00004005
11fc: 00004c49 .word 0x00004c49
1200: 00004c64 .word 0x00004c64
1204: 000016cd .word 0x000016cd
00001208 <spi_m_sync_adtc_start>:
return spi_m_sync_adtc_start(spi, cmd, arg, 0, 0, false);
}
bool spi_m_sync_adtc_start(struct spi_m_sync_descriptor* spi,
uint32_t cmd, uint32_t arg, uint16_t block_size,
uint16_t nb_block, bool access_block)
{
1208: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
120c: b089 sub sp, #36 ; 0x24
120e: 460f mov r7, r1
1210: 9302 str r3, [sp, #8]
uint8_t dummy = 0xFF;
1212: 23ff movs r3, #255 ; 0xff
{
1214: 4616 mov r6, r2
uint8_t ncr_timeout;
uint8_t r1;
uint8_t dummy2 = 0xFF;
(void)access_block;
assert(cmd & SDMMC_RESP_PRESENT, "No SD Card response was present...");
1216: 4c64 ldr r4, [pc, #400] ; (13a8 <spi_m_sync_adtc_start+0x1a0>)
1218: 4a64 ldr r2, [pc, #400] ; (13ac <spi_m_sync_adtc_start+0x1a4>)
uint8_t dummy = 0xFF;
121a: f88d 3015 strb.w r3, [sp, #21]
uint8_t dummy2 = 0xFF;
121e: f88d 3017 strb.w r3, [sp, #23]
assert(cmd & SDMMC_RESP_PRESENT, "No SD Card response was present...");
1222: 4963 ldr r1, [pc, #396] ; (13b0 <spi_m_sync_adtc_start+0x1a8>)
1224: 23e8 movs r3, #232 ; 0xe8
{
1226: 4605 mov r5, r0
sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
cmd_token[0] = SPI_CMD_ENCODE(SDMMC_CMD_GET_INDEX(cmd));
1228: f007 0a3f and.w sl, r7, #63 ; 0x3f
assert(cmd & SDMMC_RESP_PRESENT, "No SD Card response was present...");
122c: f3c7 2000 ubfx r0, r7, #8, #1
1230: 47a0 blx r4
cmd_token[0] = SPI_CMD_ENCODE(SDMMC_CMD_GET_INDEX(cmd));
1232: f04a 0340 orr.w r3, sl, #64 ; 0x40
1236: f88d 3018 strb.w r3, [sp, #24]
cmd_token[1] = arg >> 24;
123a: 0e33 lsrs r3, r6, #24
123c: f88d 3019 strb.w r3, [sp, #25]
cmd_token[2] = arg >> 16;
1240: 0c33 lsrs r3, r6, #16
1242: f88d 301a strb.w r3, [sp, #26]
cmd_token[3] = arg >> 8;
cmd_token[4] = arg;
1246: f10d 0c18 add.w ip, sp, #24
cmd_token[3] = arg >> 8;
124a: 0a33 lsrs r3, r6, #8
124c: f88d 301b strb.w r3, [sp, #27]
cmd_token[4] = arg;
1250: f88d 601c strb.w r6, [sp, #28]
1254: 2206 movs r2, #6
crc = 0;
1256: 2300 movs r3, #0
1258: 4664 mov r4, ip
while (size--) {
125a: 3a01 subs r2, #1
125c: f012 02ff ands.w r2, r2, #255 ; 0xff
1260: d130 bne.n 12c4 <spi_m_sync_adtc_start+0xbc>
crc = (crc << 1) | 1;
1262: 005b lsls r3, r3, #1
1264: f043 0301 orr.w r3, r3, #1
cmd_token[5] = spi_m_sync_crc7(cmd_token, 5);
// 8 cycles to respect Ncs timing
spi_m_sync_io_write(spi, &dummy, 1);
1268: f8df 916c ldr.w r9, [pc, #364] ; 13d8 <spi_m_sync_adtc_start+0x1d0>
cmd_token[5] = spi_m_sync_crc7(cmd_token, 5);
126c: f88d 301d strb.w r3, [sp, #29]
spi_m_sync_io_write(spi, &dummy, 1);
1270: 2201 movs r2, #1
1272: f10d 0115 add.w r1, sp, #21
1276: 4628 mov r0, r5
1278: 47c8 blx r9
// send command
spi_m_sync_io_write(spi, cmd_token, sizeof(cmd_token));
127a: 4621 mov r1, r4
127c: 2206 movs r2, #6
127e: 4628 mov r0, r5
1280: 47c8 blx r9
// Two retries will be done to manage the Ncr timing between command and response
// Ncr: Min. 1x8 clock cycle, Max 8x8 clock cycles
// WORKAROUND for no compliance (Atmel Internal ref. SD13)
r1 = 0xFF;
// Ignore first byte because Ncr min. = 8 clock cycles
spi_m_sync_io_read(spi, &r1, 1);
1282: f8df 8158 ldr.w r8, [pc, #344] ; 13dc <spi_m_sync_adtc_start+0x1d4>
r1 = 0xFF;
1286: 23ff movs r3, #255 ; 0xff
spi_m_sync_io_read(spi, &r1, 1);
1288: 2201 movs r2, #1
128a: f10d 0116 add.w r1, sp, #22
128e: 4628 mov r0, r5
r1 = 0xFF;
1290: f88d 3016 strb.w r3, [sp, #22]
spi_m_sync_io_read(spi, &r1, 1);
1294: 47c0 blx r8
1296: 2407 movs r4, #7
ncr_timeout = 7;
while(1)
{
spi_m_sync_io_read(spi, &r1, 1);
1298: 2201 movs r2, #1
129a: f10d 0116 add.w r1, sp, #22
129e: 4628 mov r0, r5
12a0: 47c0 blx r8
if((r1 & R1_SPI_ERROR) == 0)
12a2: f99d 3016 ldrsb.w r3, [sp, #22]
12a6: f89d 2016 ldrb.w r2, [sp, #22]
12aa: 2b00 cmp r3, #0
12ac: da1e bge.n 12ec <spi_m_sync_adtc_start+0xe4>
{
// Valid response
break;
}
if(--ncr_timeout == 0)
12ae: 3c01 subs r4, #1
12b0: f014 04ff ands.w r4, r4, #255 ; 0xff
12b4: d1f0 bne.n 1298 <spi_m_sync_adtc_start+0x90>
{
// Here valid r1 response received
sd_mmc_spi_debug("%s: cmd %02d, arg 0x%08lX, R1 timeout\r\n",
12b6: 493f ldr r1, [pc, #252] ; (13b4 <spi_m_sync_adtc_start+0x1ac>)
12b8: 483f ldr r0, [pc, #252] ; (13b8 <spi_m_sync_adtc_start+0x1b0>)
12ba: 4633 mov r3, r6
12bc: 4652 mov r2, sl
// Manage other responses
if (cmd & SDMMC_RESP_BUSY) {
if (!spi_m_sync_wait_busy(spi)) {
sd_mmc_spi_err = SD_MMC_SPI_ERR_RESP_BUSY_TIMEOUT;
sd_mmc_spi_debug("%s: cmd %02d, arg 0x%08lx, Busy signal always high\n\r",
12be: 4d3f ldr r5, [pc, #252] ; (13bc <spi_m_sync_adtc_start+0x1b4>)
12c0: 47a8 blx r5
__func__, (int)SDMMC_CMD_GET_INDEX(cmd), arg);
return false;
12c2: e023 b.n 130c <spi_m_sync_adtc_start+0x104>
value = *buf++;
12c4: f81c 0b01 ldrb.w r0, [ip], #1
12c8: 2108 movs r1, #8
crc <<= 1;
12ca: 005b lsls r3, r3, #1
12cc: b2db uxtb r3, r3
if ((value & 0x80) ^ (crc & 0x80)) {
12ce: ea83 0e00 eor.w lr, r3, r0
12d2: f01e 0f80 tst.w lr, #128 ; 0x80
for (i = 0; i < 8; i++) {
12d6: f101 31ff add.w r1, r1, #4294967295 ; 0xffffffff
crc ^= 0x09;
12da: bf18 it ne
12dc: f083 0309 eorne.w r3, r3, #9
value <<= 1;
12e0: 0040 lsls r0, r0, #1
for (i = 0; i < 8; i++) {
12e2: f011 01ff ands.w r1, r1, #255 ; 0xff
value <<= 1;
12e6: b2c0 uxtb r0, r0
for (i = 0; i < 8; i++) {
12e8: d1ef bne.n 12ca <spi_m_sync_adtc_start+0xc2>
12ea: e7b6 b.n 125a <spi_m_sync_adtc_start+0x52>
sd_mmc_spi_response_32 = r1;
12ec: f8df b0f0 ldr.w fp, [pc, #240] ; 13e0 <spi_m_sync_adtc_start+0x1d8>
if (r1 & R1_SPI_COM_CRC)
12f0: f012 0308 ands.w r3, r2, #8
sd_mmc_spi_response_32 = r1;
12f4: f8cb 2008 str.w r2, [fp, #8]
if (r1 & R1_SPI_COM_CRC)
12f8: 9303 str r3, [sp, #12]
12fa: d00b beq.n 1314 <spi_m_sync_adtc_start+0x10c>
sd_mmc_spi_debug("%s: cmd %02d, arg 0x%08lx, r1 0x%02x, R1_SPI_COM_CRC\n\r",
12fc: 492d ldr r1, [pc, #180] ; (13b4 <spi_m_sync_adtc_start+0x1ac>)
12fe: 4830 ldr r0, [pc, #192] ; (13c0 <spi_m_sync_adtc_start+0x1b8>)
1300: 9200 str r2, [sp, #0]
1302: 4633 mov r3, r6
1304: 4652 mov r2, sl
1306: 4c2d ldr r4, [pc, #180] ; (13bc <spi_m_sync_adtc_start+0x1b4>)
1308: 47a0 blx r4
return false;
130a: 2400 movs r4, #0
sd_mmc_spi_block_size = block_size;
sd_mmc_spi_nb_block = nb_block;
sd_mmc_spi_transfert_pos = 0;
return true;
}
130c: 4620 mov r0, r4
130e: b009 add sp, #36 ; 0x24
1310: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
if (r1 & R1_SPI_ILLEGAL_COMMAND)
1314: f012 0404 ands.w r4, r2, #4
1318: d005 beq.n 1326 <spi_m_sync_adtc_start+0x11e>
sd_mmc_spi_debug("%s: cmd %02d, arg 0x%08lx, r1 0x%x, R1 ILLEGAL_COMMAND\n\r",
131a: 9200 str r2, [sp, #0]
131c: 4925 ldr r1, [pc, #148] ; (13b4 <spi_m_sync_adtc_start+0x1ac>)
131e: 4829 ldr r0, [pc, #164] ; (13c4 <spi_m_sync_adtc_start+0x1bc>)
1320: 4633 mov r3, r6
1322: 4652 mov r2, sl
1324: e7ef b.n 1306 <spi_m_sync_adtc_start+0xfe>
if (r1 & ~R1_SPI_IDLE) {
1326: f012 0ffe tst.w r2, #254 ; 0xfe
132a: d007 beq.n 133c <spi_m_sync_adtc_start+0x134>
sd_mmc_spi_debug("%s: cmd %02d, arg 0x%08lx, r1 0x%x, R1 error\n\r",
132c: 9200 str r2, [sp, #0]
132e: 4921 ldr r1, [pc, #132] ; (13b4 <spi_m_sync_adtc_start+0x1ac>)
1330: 4d22 ldr r5, [pc, #136] ; (13bc <spi_m_sync_adtc_start+0x1b4>)
1332: 4825 ldr r0, [pc, #148] ; (13c8 <spi_m_sync_adtc_start+0x1c0>)
1334: 4633 mov r3, r6
1336: 4652 mov r2, sl
1338: 47a8 blx r5
return false;
133a: e7e7 b.n 130c <spi_m_sync_adtc_start+0x104>
if (cmd & SDMMC_RESP_BUSY) {
133c: 04b9 lsls r1, r7, #18
133e: d509 bpl.n 1354 <spi_m_sync_adtc_start+0x14c>
if (!spi_m_sync_wait_busy(spi)) {
1340: 4a22 ldr r2, [pc, #136] ; (13cc <spi_m_sync_adtc_start+0x1c4>)
1342: 4628 mov r0, r5
1344: 4790 blx r2
1346: 4604 mov r4, r0
1348: b920 cbnz r0, 1354 <spi_m_sync_adtc_start+0x14c>
sd_mmc_spi_debug("%s: cmd %02d, arg 0x%08lx, Busy signal always high\n\r",
134a: 491a ldr r1, [pc, #104] ; (13b4 <spi_m_sync_adtc_start+0x1ac>)
134c: 4820 ldr r0, [pc, #128] ; (13d0 <spi_m_sync_adtc_start+0x1c8>)
134e: 4633 mov r3, r6
1350: 4652 mov r2, sl
1352: e7b4 b.n 12be <spi_m_sync_adtc_start+0xb6>
if (cmd & SDMMC_RESP_8) {
1354: 05ba lsls r2, r7, #22
1356: d50b bpl.n 1370 <spi_m_sync_adtc_start+0x168>
sd_mmc_spi_response_32 = 0;
1358: 2200 movs r2, #0
135a: f8cb 2008 str.w r2, [fp, #8]
spi_m_sync_io_write(spi, &dummy2, 1);
135e: f10d 0117 add.w r1, sp, #23
1362: 2201 movs r2, #1
1364: 4628 mov r0, r5
1366: 47c8 blx r9
spi_m_sync_io_read(spi, (uint8_t*)&sd_mmc_spi_response_32, 1);
1368: 491a ldr r1, [pc, #104] ; (13d4 <spi_m_sync_adtc_start+0x1cc>)
136a: 2201 movs r2, #1
136c: 4628 mov r0, r5
136e: 47c0 blx r8
if (cmd & SDMMC_RESP_32) {
1370: 057b lsls r3, r7, #21
1372: d50d bpl.n 1390 <spi_m_sync_adtc_start+0x188>
spi_m_sync_io_write(spi, &dummy2, 1);
1374: 2201 movs r2, #1
1376: f10d 0117 add.w r1, sp, #23
137a: 4628 mov r0, r5
137c: 47c8 blx r9
spi_m_sync_io_read(spi, (uint8_t*)&sd_mmc_spi_response_32, 4);
137e: 2204 movs r2, #4
1380: 4914 ldr r1, [pc, #80] ; (13d4 <spi_m_sync_adtc_start+0x1cc>)
1382: 4628 mov r0, r5
1384: 47c0 blx r8
sd_mmc_spi_response_32 = BE32(sd_mmc_spi_response_32);
1386: f8db 2008 ldr.w r2, [fp, #8]
138a: ba12 rev r2, r2
138c: f8cb 2008 str.w r2, [fp, #8]
sd_mmc_spi_nb_block = nb_block;
1390: f8bd 2048 ldrh.w r2, [sp, #72] ; 0x48
sd_mmc_spi_block_size = block_size;
1394: 9b02 ldr r3, [sp, #8]
sd_mmc_spi_nb_block = nb_block;
1396: f8ab 2006 strh.w r2, [fp, #6]
sd_mmc_spi_transfert_pos = 0;
139a: 2200 movs r2, #0
sd_mmc_spi_block_size = block_size;
139c: f8ab 3004 strh.w r3, [fp, #4]
sd_mmc_spi_transfert_pos = 0;
13a0: f8cb 2000 str.w r2, [fp]
return true;
13a4: 2401 movs r4, #1
13a6: e7b1 b.n 130c <spi_m_sync_adtc_start+0x104>
13a8: 00004099 .word 0x00004099
13ac: 00004c18 .word 0x00004c18
13b0: 00004d31 .word 0x00004d31
13b4: 00004ec8 .word 0x00004ec8
13b8: 00004d54 .word 0x00004d54
13bc: 00004005 .word 0x00004005
13c0: 00004d7c .word 0x00004d7c
13c4: 00004db3 .word 0x00004db3
13c8: 00004dec .word 0x00004dec
13cc: 000010a1 .word 0x000010a1
13d0: 00004e1b .word 0x00004e1b
13d4: 200002dc .word 0x200002dc
13d8: 000016c1 .word 0x000016c1
13dc: 000016cd .word 0x000016cd
13e0: 200002d4 .word 0x200002d4
000013e4 <spi_m_sync_send_cmd>:
{
13e4: b513 push {r0, r1, r4, lr}
return spi_m_sync_adtc_start(spi, cmd, arg, 0, 0, false);
13e6: 2300 movs r3, #0
13e8: e9cd 3300 strd r3, r3, [sp]
13ec: 4c01 ldr r4, [pc, #4] ; (13f4 <spi_m_sync_send_cmd+0x10>)
13ee: 47a0 blx r4
}
13f0: b002 add sp, #8
13f2: bd10 pop {r4, pc}
13f4: 00001209 .word 0x00001209
000013f8 <spi_m_sync_start_read_blocks>:
bool spi_m_sync_start_read_blocks(struct spi_m_sync_descriptor* spi,
void *dst, uint16_t nb_block)
{
13f8: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
uint32_t pos;
uint8_t dummy = 0xFF;
13fc: 23ff movs r3, #255 ; 0xff
sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
pos = 0;
while (nb_block--) {
assert(sd_mmc_spi_nb_block >
13fe: 4d1e ldr r5, [pc, #120] ; (1478 <spi_m_sync_start_read_blocks+0x80>)
1400: f8df 9088 ldr.w r9, [pc, #136] ; 148c <spi_m_sync_start_read_blocks+0x94>
1404: f8df a088 ldr.w sl, [pc, #136] ; 1490 <spi_m_sync_start_read_blocks+0x98>
uint8_t dummy = 0xFF;
1408: f88d 3007 strb.w r3, [sp, #7]
{
140c: 4606 mov r6, r0
140e: 4688 mov r8, r1
1410: 4614 mov r4, r2
pos = 0;
1412: 2700 movs r7, #0
while (nb_block--) {
1414: b91c cbnz r4, 141e <spi_m_sync_start_read_blocks+0x26>
pos += sd_mmc_spi_block_size;
sd_mmc_spi_transfert_pos += sd_mmc_spi_block_size;
spi_m_sync_stop_read_block(spi);
}
return true;
1416: 2001 movs r0, #1
}
1418: b003 add sp, #12
141a: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
assert(sd_mmc_spi_nb_block >
141e: f8b5 c006 ldrh.w ip, [r5, #6]
1422: 682b ldr r3, [r5, #0]
1424: 88a8 ldrh r0, [r5, #4]
1426: fbb3 f0f0 udiv r0, r3, r0
142a: 4584 cmp ip, r0
142c: bf94 ite ls
142e: 2000 movls r0, #0
1430: 2001 movhi r0, #1
1432: f240 1353 movw r3, #339 ; 0x153
1436: 464a mov r2, r9
1438: 4651 mov r1, sl
143a: f8df b058 ldr.w fp, [pc, #88] ; 1494 <spi_m_sync_start_read_blocks+0x9c>
143e: 47d8 blx fp
if (!spi_m_sync_start_read_block(spi)) {
1440: 4b0e ldr r3, [pc, #56] ; (147c <spi_m_sync_start_read_blocks+0x84>)
1442: 4630 mov r0, r6
1444: 4798 blx r3
1446: 3c01 subs r4, #1
1448: b2a4 uxth r4, r4
144a: 2800 cmp r0, #0
144c: d0e4 beq.n 1418 <spi_m_sync_start_read_blocks+0x20>
spi_m_sync_io_write(spi, &dummy, 1);
144e: f10d 0107 add.w r1, sp, #7
1452: 4b0b ldr r3, [pc, #44] ; (1480 <spi_m_sync_start_read_blocks+0x88>)
1454: 2201 movs r2, #1
1456: 4630 mov r0, r6
1458: 4798 blx r3
spi_m_sync_io_read(spi, &((uint8_t*)dst)[pos], sd_mmc_spi_block_size);
145a: 88aa ldrh r2, [r5, #4]
145c: 4b09 ldr r3, [pc, #36] ; (1484 <spi_m_sync_start_read_blocks+0x8c>)
145e: eb08 0107 add.w r1, r8, r7
1462: 4630 mov r0, r6
1464: 4798 blx r3
pos += sd_mmc_spi_block_size;
1466: 88aa ldrh r2, [r5, #4]
sd_mmc_spi_transfert_pos += sd_mmc_spi_block_size;
1468: 682b ldr r3, [r5, #0]
146a: 4413 add r3, r2
146c: 602b str r3, [r5, #0]
spi_m_sync_stop_read_block(spi);
146e: 4630 mov r0, r6
1470: 4b05 ldr r3, [pc, #20] ; (1488 <spi_m_sync_start_read_blocks+0x90>)
pos += sd_mmc_spi_block_size;
1472: 4417 add r7, r2
spi_m_sync_stop_read_block(spi);
1474: 4798 blx r3
1476: e7cd b.n 1414 <spi_m_sync_start_read_blocks+0x1c>
1478: 200002d4 .word 0x200002d4
147c: 0000113d .word 0x0000113d
1480: 000016c1 .word 0x000016c1
1484: 000016cd .word 0x000016cd
1488: 00001111 .word 0x00001111
148c: 00004c18 .word 0x00004c18
1490: 00004a75 .word 0x00004a75
1494: 00004099 .word 0x00004099
00001498 <spi_m_sync_wait_end_of_read_blocks>:
}
bool spi_m_sync_wait_end_of_read_blocks(struct spi_m_sync_descriptor* spi)
{
return true;
}
1498: 2001 movs r0, #1
149a: 4770 bx lr
0000149c <spi_m_sync_read_word>:
}
return spi_m_sync_stop_multiwrite_block(spi);
}
bool spi_m_sync_read_word(struct spi_m_sync_descriptor* spi, uint32_t* value)
{
149c: b57f push {r0, r1, r2, r3, r4, r5, r6, lr}
uint8_t dummy = 0xFF;
sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
assert(sd_mmc_spi_nb_block >
149e: 4c1f ldr r4, [pc, #124] ; (151c <spi_m_sync_read_word+0x80>)
14a0: 4a1f ldr r2, [pc, #124] ; (1520 <spi_m_sync_read_word+0x84>)
14a2: 88e6 ldrh r6, [r4, #6]
{
14a4: 9101 str r1, [sp, #4]
uint8_t dummy = 0xFF;
14a6: 23ff movs r3, #255 ; 0xff
14a8: f88d 300f strb.w r3, [sp, #15]
{
14ac: 4605 mov r5, r0
assert(sd_mmc_spi_nb_block >
14ae: 6823 ldr r3, [r4, #0]
14b0: 88a0 ldrh r0, [r4, #4]
14b2: fbb3 f0f0 udiv r0, r3, r0
14b6: 4286 cmp r6, r0
14b8: 491a ldr r1, [pc, #104] ; (1524 <spi_m_sync_read_word+0x88>)
14ba: 4e1b ldr r6, [pc, #108] ; (1528 <spi_m_sync_read_word+0x8c>)
14bc: f240 13b7 movw r3, #439 ; 0x1b7
14c0: bf94 ite ls
14c2: 2000 movls r0, #0
14c4: 2001 movhi r0, #1
14c6: 47b0 blx r6
(sd_mmc_spi_transfert_pos / sd_mmc_spi_block_size),
">>>");
if (!(sd_mmc_spi_transfert_pos % sd_mmc_spi_block_size)) {
14c8: 88a2 ldrh r2, [r4, #4]
14ca: 6823 ldr r3, [r4, #0]
14cc: fbb3 f1f2 udiv r1, r3, r2
14d0: fb02 3311 mls r3, r2, r1, r3
14d4: b1b3 cbz r3, 1504 <spi_m_sync_read_word+0x68>
if (!spi_m_sync_start_read_block(spi)) {
return false;
}
}
// Read data
spi_m_sync_io_write(spi, &dummy, 1);
14d6: 4b15 ldr r3, [pc, #84] ; (152c <spi_m_sync_read_word+0x90>)
14d8: 2201 movs r2, #1
14da: f10d 010f add.w r1, sp, #15
14de: 4628 mov r0, r5
14e0: 4798 blx r3
spi_m_sync_io_read(spi, (uint8_t*)&value, 4);
14e2: 2204 movs r2, #4
14e4: eb0d 0102 add.w r1, sp, r2
14e8: 4b11 ldr r3, [pc, #68] ; (1530 <spi_m_sync_read_word+0x94>)
14ea: 4628 mov r0, r5
14ec: 4798 blx r3
*value = LE32(*value);
sd_mmc_spi_transfert_pos += 4;
14ee: 6823 ldr r3, [r4, #0]
if (!(sd_mmc_spi_transfert_pos % sd_mmc_spi_block_size)) {
14f0: 88a2 ldrh r2, [r4, #4]
sd_mmc_spi_transfert_pos += 4;
14f2: 3304 adds r3, #4
14f4: 6023 str r3, [r4, #0]
if (!(sd_mmc_spi_transfert_pos % sd_mmc_spi_block_size)) {
14f6: fbb3 f1f2 udiv r1, r3, r2
14fa: fb02 3311 mls r3, r2, r1, r3
14fe: b143 cbz r3, 1512 <spi_m_sync_read_word+0x76>
// End of block
spi_m_sync_stop_read_block(spi);
}
return true;}
1500: 2001 movs r0, #1
1502: e004 b.n 150e <spi_m_sync_read_word+0x72>
if (!spi_m_sync_start_read_block(spi)) {
1504: 4b0b ldr r3, [pc, #44] ; (1534 <spi_m_sync_read_word+0x98>)
1506: 4628 mov r0, r5
1508: 4798 blx r3
150a: 2800 cmp r0, #0
150c: d1e3 bne.n 14d6 <spi_m_sync_read_word+0x3a>
return true;}
150e: b004 add sp, #16
1510: bd70 pop {r4, r5, r6, pc}
spi_m_sync_stop_read_block(spi);
1512: 4b09 ldr r3, [pc, #36] ; (1538 <spi_m_sync_read_word+0x9c>)
1514: 4628 mov r0, r5
1516: 4798 blx r3
1518: e7f2 b.n 1500 <spi_m_sync_read_word+0x64>
151a: bf00 nop
151c: 200002d4 .word 0x200002d4
1520: 00004c18 .word 0x00004c18
1524: 00004a75 .word 0x00004a75
1528: 00004099 .word 0x00004099
152c: 000016c1 .word 0x000016c1
1530: 000016cd .word 0x000016cd
1534: 0000113d .word 0x0000113d
1538: 00001111 .word 0x00001111
0000153c <spi_m_sync_get_response>:
uint32_t spi_m_sync_get_response(struct spi_m_sync_descriptor* spi)
{
return sd_mmc_spi_response_32;
}
153c: 4b01 ldr r3, [pc, #4] ; (1544 <spi_m_sync_get_response+0x8>)
153e: 6898 ldr r0, [r3, #8]
1540: 4770 bx lr
1542: bf00 nop
1544: 200002d4 .word 0x200002d4
00001548 <spi_m_sync_send_clock>:
void spi_m_sync_send_clock(struct spi_m_sync_descriptor* spi)
{
1548: b573 push {r0, r1, r4, r5, r6, lr}
uint8_t i;
uint8_t dummy = 0xFF;
154a: 23ff movs r3, #255 ; 0xff
sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
// Send 80 cycles
for(i = 0; i < 10; i++)
{
spi_m_sync_io_write(spi, &dummy, 1); // 8 cycles
154c: 4e07 ldr r6, [pc, #28] ; (156c <spi_m_sync_send_clock+0x24>)
uint8_t dummy = 0xFF;
154e: f88d 3007 strb.w r3, [sp, #7]
{
1552: 4605 mov r5, r0
uint8_t dummy = 0xFF;
1554: 240a movs r4, #10
spi_m_sync_io_write(spi, &dummy, 1); // 8 cycles
1556: 2201 movs r2, #1
1558: f10d 0107 add.w r1, sp, #7
155c: 4628 mov r0, r5
for(i = 0; i < 10; i++)
155e: 3c01 subs r4, #1
spi_m_sync_io_write(spi, &dummy, 1); // 8 cycles
1560: 47b0 blx r6
for(i = 0; i < 10; i++)
1562: f014 04ff ands.w r4, r4, #255 ; 0xff
1566: d1f6 bne.n 1556 <spi_m_sync_send_clock+0xe>
}
}
1568: b002 add sp, #8
156a: bd70 pop {r4, r5, r6, pc}
156c: 000016c1 .word 0x000016c1
00001570 <spi_m_sync_select_device>:
int32_t spi_m_sync_select_device(struct spi_m_sync_descriptor* spi, uint8_t slot, uint32_t clock, uint8_t bus_width, bool high_speed)
{
UNUSED(bus_width);
UNUSED(high_speed);
sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
PORT->Group[1].OUT.reg &= ~(1 << SPI_CS_PIN);
1570: 4a04 ldr r2, [pc, #16] ; (1584 <spi_m_sync_select_device+0x14>)
1572: f8d2 3090 ldr.w r3, [r2, #144] ; 0x90
1576: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
157a: f8c2 3090 str.w r3, [r2, #144] ; 0x90
return 0;
}
157e: 2000 movs r0, #0
1580: 4770 bx lr
1582: bf00 nop
1584: 41008000 .word 0x41008000
00001588 <spi_m_sync_deselect_device>:
int32_t spi_m_sync_deselect_device(struct spi_m_sync_descriptor* spi, uint8_t slot)
{
sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
PORT->Group[1].OUT.reg |= (1 << SPI_CS_PIN);
1588: 4a04 ldr r2, [pc, #16] ; (159c <spi_m_sync_deselect_device+0x14>)
158a: f8d2 3090 ldr.w r3, [r2, #144] ; 0x90
158e: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
1592: f8c2 3090 str.w r3, [r2, #144] ; 0x90
return 0;
}
1596: 2000 movs r0, #0
1598: 4770 bx lr
159a: bf00 nop
159c: 41008000 .word 0x41008000
000015a0 <spi_m_sync_init>:
ASSERT(spi);
spi->func = (struct _spi_m_sync_hpl_interface *)func;
}
int32_t spi_m_sync_init(struct spi_m_sync_descriptor *spi, void *const hw)
{
15a0: b538 push {r3, r4, r5, lr}
15a2: 460d mov r5, r1
int32_t rc = 0;
ASSERT(spi && hw);
15a4: 4604 mov r4, r0
15a6: b110 cbz r0, 15ae <spi_m_sync_init+0xe>
15a8: 1e08 subs r0, r1, #0
15aa: bf18 it ne
15ac: 2001 movne r0, #1
15ae: 490a ldr r1, [pc, #40] ; (15d8 <spi_m_sync_init+0x38>)
15b0: 4b0a ldr r3, [pc, #40] ; (15dc <spi_m_sync_init+0x3c>)
15b2: 2240 movs r2, #64 ; 0x40
15b4: 4798 blx r3
spi->dev.prvt = (void *)hw;
15b6: 4620 mov r0, r4
rc = _spi_m_sync_init(&spi->dev, hw);
15b8: 4b09 ldr r3, [pc, #36] ; (15e0 <spi_m_sync_init+0x40>)
spi->dev.prvt = (void *)hw;
15ba: f840 5f04 str.w r5, [r0, #4]!
rc = _spi_m_sync_init(&spi->dev, hw);
15be: 4629 mov r1, r5
15c0: 4798 blx r3
if (rc < 0) {
15c2: 2800 cmp r0, #0
15c4: db07 blt.n 15d6 <spi_m_sync_init+0x36>
return rc;
}
spi->flags = SPI_DEACTIVATE_NEXT;
15c6: f44f 4300 mov.w r3, #32768 ; 0x8000
15ca: 82a3 strh r3, [r4, #20]
spi->io.read = _spi_m_sync_io_read;
15cc: 4b05 ldr r3, [pc, #20] ; (15e4 <spi_m_sync_init+0x44>)
15ce: 6123 str r3, [r4, #16]
spi->io.write = _spi_m_sync_io_write;
15d0: 4b05 ldr r3, [pc, #20] ; (15e8 <spi_m_sync_init+0x48>)
15d2: 60e3 str r3, [r4, #12]
return ERR_NONE;
15d4: 2000 movs r0, #0
}
15d6: bd38 pop {r3, r4, r5, pc}
15d8: 00004f36 .word 0x00004f36
15dc: 00002939 .word 0x00002939
15e0: 00003cd9 .word 0x00003cd9
15e4: 00001689 .word 0x00001689
15e8: 00001651 .word 0x00001651
000015ec <spi_m_sync_enable>:
ASSERT(spi);
_spi_m_sync_deinit(&spi->dev);
}
void spi_m_sync_enable(struct spi_m_sync_descriptor *spi)
{
15ec: b510 push {r4, lr}
ASSERT(spi);
15ee: 4604 mov r4, r0
15f0: 3800 subs r0, #0
15f2: 4b05 ldr r3, [pc, #20] ; (1608 <spi_m_sync_enable+0x1c>)
15f4: 4905 ldr r1, [pc, #20] ; (160c <spi_m_sync_enable+0x20>)
15f6: bf18 it ne
15f8: 2001 movne r0, #1
15fa: 2257 movs r2, #87 ; 0x57
15fc: 4798 blx r3
_spi_m_sync_enable(&spi->dev);
15fe: 1d20 adds r0, r4, #4
1600: 4b03 ldr r3, [pc, #12] ; (1610 <spi_m_sync_enable+0x24>)
}
1602: e8bd 4010 ldmia.w sp!, {r4, lr}
_spi_m_sync_enable(&spi->dev);
1606: 4718 bx r3
1608: 00002939 .word 0x00002939
160c: 00004f36 .word 0x00004f36
1610: 00003e0d .word 0x00003e0d
00001614 <spi_m_sync_transfer>:
return spi_m_sync_transfer(spi, &xfer);
}
int32_t spi_m_sync_transfer(struct spi_m_sync_descriptor *spi, const struct spi_xfer *p_xfer)
{
1614: b530 push {r4, r5, lr}
1616: 460c mov r4, r1
1618: b085 sub sp, #20
struct spi_msg msg;
ASSERT(spi && p_xfer);
161a: 4605 mov r5, r0
161c: b110 cbz r0, 1624 <spi_m_sync_transfer+0x10>
161e: 1e08 subs r0, r1, #0
1620: bf18 it ne
1622: 2001 movne r0, #1
1624: 22b3 movs r2, #179 ; 0xb3
1626: 4907 ldr r1, [pc, #28] ; (1644 <spi_m_sync_transfer+0x30>)
1628: 4b07 ldr r3, [pc, #28] ; (1648 <spi_m_sync_transfer+0x34>)
162a: 4798 blx r3
msg.txbuf = p_xfer->txbuf;
162c: 6823 ldr r3, [r4, #0]
162e: 9301 str r3, [sp, #4]
msg.rxbuf = p_xfer->rxbuf;
1630: 6863 ldr r3, [r4, #4]
1632: 9302 str r3, [sp, #8]
msg.size = p_xfer->size;
1634: 68a3 ldr r3, [r4, #8]
1636: 9303 str r3, [sp, #12]
return _spi_m_sync_trans(&spi->dev, &msg);
1638: a901 add r1, sp, #4
163a: 4b04 ldr r3, [pc, #16] ; (164c <spi_m_sync_transfer+0x38>)
163c: 1d28 adds r0, r5, #4
163e: 4798 blx r3
}
1640: b005 add sp, #20
1642: bd30 pop {r4, r5, pc}
1644: 00004f36 .word 0x00004f36
1648: 00002939 .word 0x00002939
164c: 00003e3d .word 0x00003e3d
00001650 <_spi_m_sync_io_write>:
{
1650: b57f push {r0, r1, r2, r3, r4, r5, r6, lr}
ASSERT(io);
1652: 4604 mov r4, r0
1654: 3800 subs r0, #0
1656: bf18 it ne
1658: 2001 movne r0, #1
{
165a: 460e mov r6, r1
165c: 4615 mov r5, r2
ASSERT(io);
165e: 4907 ldr r1, [pc, #28] ; (167c <_spi_m_sync_io_write+0x2c>)
1660: 4b07 ldr r3, [pc, #28] ; (1680 <_spi_m_sync_io_write+0x30>)
1662: 22a3 movs r2, #163 ; 0xa3
1664: 4798 blx r3
xfer.rxbuf = 0;
1666: 2300 movs r3, #0
xfer.txbuf = (uint8_t *)buf;
1668: e9cd 6301 strd r6, r3, [sp, #4]
return spi_m_sync_transfer(spi, &xfer);
166c: a901 add r1, sp, #4
166e: 4b05 ldr r3, [pc, #20] ; (1684 <_spi_m_sync_io_write+0x34>)
xfer.size = length;
1670: 9503 str r5, [sp, #12]
return spi_m_sync_transfer(spi, &xfer);
1672: f1a4 000c sub.w r0, r4, #12
1676: 4798 blx r3
}
1678: b004 add sp, #16
167a: bd70 pop {r4, r5, r6, pc}
167c: 00004f36 .word 0x00004f36
1680: 00002939 .word 0x00002939
1684: 00001615 .word 0x00001615
00001688 <_spi_m_sync_io_read>:
{
1688: b57f push {r0, r1, r2, r3, r4, r5, r6, lr}
ASSERT(io);
168a: 4604 mov r4, r0
168c: 3800 subs r0, #0
168e: bf18 it ne
1690: 2001 movne r0, #1
{
1692: 460e mov r6, r1
1694: 4615 mov r5, r2
ASSERT(io);
1696: 4907 ldr r1, [pc, #28] ; (16b4 <_spi_m_sync_io_read+0x2c>)
1698: 4b07 ldr r3, [pc, #28] ; (16b8 <_spi_m_sync_io_read+0x30>)
169a: 2287 movs r2, #135 ; 0x87
169c: 4798 blx r3
xfer.txbuf = 0;
169e: 2300 movs r3, #0
16a0: 9301 str r3, [sp, #4]
return spi_m_sync_transfer(spi, &xfer);
16a2: a901 add r1, sp, #4
16a4: 4b05 ldr r3, [pc, #20] ; (16bc <_spi_m_sync_io_read+0x34>)
xfer.rxbuf = buf;
16a6: 9602 str r6, [sp, #8]
return spi_m_sync_transfer(spi, &xfer);
16a8: f1a4 000c sub.w r0, r4, #12
xfer.size = length;
16ac: 9503 str r5, [sp, #12]
return spi_m_sync_transfer(spi, &xfer);
16ae: 4798 blx r3
}
16b0: b004 add sp, #16
16b2: bd70 pop {r4, r5, r6, pc}
16b4: 00004f36 .word 0x00004f36
16b8: 00002939 .word 0x00002939
16bc: 00001615 .word 0x00001615
000016c0 <spi_m_sync_io_write>:
}
int32_t spi_m_sync_io_write(struct spi_m_sync_descriptor *const spi, const uint8_t *const buf, const uint16_t length)
{
return _spi_m_sync_io_write(&spi->io, buf, length);
16c0: 4b01 ldr r3, [pc, #4] ; (16c8 <spi_m_sync_io_write+0x8>)
16c2: 300c adds r0, #12
16c4: 4718 bx r3
16c6: bf00 nop
16c8: 00001651 .word 0x00001651
000016cc <spi_m_sync_io_read>:
}
int32_t spi_m_sync_io_read(struct spi_m_sync_descriptor *const spi, uint8_t *buf, const uint16_t length)
{
return _spi_m_sync_io_read(&spi->io, buf, length);
16cc: 4b01 ldr r3, [pc, #4] ; (16d4 <spi_m_sync_io_read+0x8>)
16ce: 300c adds r0, #12
16d0: 4718 bx r3
16d2: bf00 nop
16d4: 00001689 .word 0x00001689
000016d8 <usb_init>:
while (!cdchf_acm_is_writing(&USB_HOST_CDC_ACM_0_inst))
;
}
void usb_init(void)
{
16d8: b570 push {r4, r5, r6, lr}
usbhc_init(&USB_HOST_CORE_INSTANCE_inst,
16da: 4c08 ldr r4, [pc, #32] ; (16fc <usb_init+0x24>)
16dc: 4908 ldr r1, [pc, #32] ; (1700 <usb_init+0x28>)
16de: 4e09 ldr r6, [pc, #36] ; (1704 <usb_init+0x2c>)
16e0: 1d25 adds r5, r4, #4
16e2: 2360 movs r3, #96 ; 0x60
16e4: f104 0280 add.w r2, r4, #128 ; 0x80
16e8: 4628 mov r0, r5
16ea: 47b0 blx r6
&USB_HOST_INSTANCE_inst,
(uint8_t *)USB_HOST_CORE_INSTANCE_ctrl_buf,
CTRL_BUFFER_SIZE);
cdchf_acm_init(&USB_HOST_CORE_INSTANCE_inst, &USB_HOST_CDC_ACM_0_inst);
16ec: f104 0144 add.w r1, r4, #68 ; 0x44
16f0: 4628 mov r0, r5
16f2: 4b05 ldr r3, [pc, #20] ; (1708 <usb_init+0x30>)
}
16f4: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
cdchf_acm_init(&USB_HOST_CORE_INSTANCE_inst, &USB_HOST_CDC_ACM_0_inst);
16f8: 4718 bx r3
16fa: bf00 nop
16fc: 200002e0 .word 0x200002e0
1700: 200005a8 .word 0x200005a8
1704: 000032c5 .word 0x000032c5
1708: 0000077d .word 0x0000077d
0000170c <mci_sync_init>:
/**
* \brief Initialize MCI low level driver.
*/
int32_t mci_sync_init(struct mci_sync_desc *mci, void *hw)
{
170c: b570 push {r4, r5, r6, lr}
170e: 460d mov r5, r1
ASSERT(mci && hw);
1710: 4604 mov r4, r0
1712: b110 cbz r0, 171a <mci_sync_init+0xe>
1714: 1e08 subs r0, r1, #0
1716: bf18 it ne
1718: 2001 movne r0, #1
171a: 4905 ldr r1, [pc, #20] ; (1730 <mci_sync_init+0x24>)
171c: 4b05 ldr r3, [pc, #20] ; (1734 <mci_sync_init+0x28>)
171e: 2231 movs r2, #49 ; 0x31
1720: 4798 blx r3
return _mci_sync_init(&mci->device, hw);
1722: 4629 mov r1, r5
1724: 4620 mov r0, r4
1726: 4b04 ldr r3, [pc, #16] ; (1738 <mci_sync_init+0x2c>)
}
1728: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
return _mci_sync_init(&mci->device, hw);
172c: 4718 bx r3
172e: bf00 nop
1730: 00004f52 .word 0x00004f52
1734: 00002939 .word 0x00002939
1738: 00002a09 .word 0x00002a09
0000173c <hri_usb_wait_for_sync>:
typedef uint8_t hri_usbpipe_pintflag_reg_t;
typedef uint8_t hri_usbpipe_pstatus_reg_t;
static inline void hri_usb_wait_for_sync(const void *const hw, hri_usb_syncbusy_reg_t reg)
{
while (((Usb *)hw)->DEVICE.SYNCBUSY.reg & reg) {
173c: 7883 ldrb r3, [r0, #2]
173e: 420b tst r3, r1
1740: d1fc bne.n 173c <hri_usb_wait_for_sync>
};
}
1742: 4770 bx lr
00001744 <_dummy_func_no_return>:
static bool _dummy_func_no_return(uint32_t unused0, uint32_t unused1)
{
(void)unused0;
(void)unused1;
return false;
}
1744: 2000 movs r0, #0
1746: 4770 bx lr
00001748 <_usb_h_get_psize>:
* \param[in] size Size of bytes
*/
static int8_t _usb_h_get_psize(uint16_t size)
{
uint8_t i;
for (i = 0; i < sizeof(psize_2_size) / sizeof(uint16_t); i++) {
1748: 4a06 ldr r2, [pc, #24] ; (1764 <_usb_h_get_psize+0x1c>)
{
174a: 2300 movs r3, #0
/* Size should be exactly PSIZE values */
if (size <= psize_2_size[i]) {
174c: f832 1b02 ldrh.w r1, [r2], #2
1750: 4281 cmp r1, r0
1752: d301 bcc.n 1758 <_usb_h_get_psize+0x10>
return i;
1754: b258 sxtb r0, r3
1756: 4770 bx lr
for (i = 0; i < sizeof(psize_2_size) / sizeof(uint16_t); i++) {
1758: 3301 adds r3, #1
175a: 2b08 cmp r3, #8
175c: d1f6 bne.n 174c <_usb_h_get_psize+0x4>
}
}
return 7;
175e: 2007 movs r0, #7
}
1760: 4770 bx lr
1762: bf00 nop
1764: 00004f82 .word 0x00004f82
00001768 <_usb_h_add_sof_user>:
* \brief Add one SOF IRQ user and enable SOF interrupt
* \param drv Pointer to driver instance
*/
static inline void _usb_h_add_sof_user(struct usb_h_desc *drv)
{
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)drv->prvt;
1768: 6842 ldr r2, [r0, #4]
pd->n_sof_user++;
176a: f892 3089 ldrb.w r3, [r2, #137] ; 0x89
176e: 3301 adds r3, #1
1770: f882 3089 strb.w r3, [r2, #137] ; 0x89
hri_usbhost_set_INTEN_HSOF_bit(drv->hw);
1774: 6803 ldr r3, [r0, #0]
((Usb *)hw)->DEVICE.INTENCLR.reg = mask;
}
static inline void hri_usbhost_set_INTEN_HSOF_bit(const void *const hw)
{
((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_HSOF;
1776: 2204 movs r2, #4
1778: 831a strh r2, [r3, #24]
}
177a: 4770 bx lr
0000177c <_usb_h_pipe_i>:
/** \internal
* \brief Return pipe index
* \param[in] pipe Pointer to pipe instance
*/
static int8_t _usb_h_pipe_i(struct usb_h_pipe *pipe)
{
177c: b538 push {r3, r4, r5, lr}
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)pipe->hcd->prvt;
177e: 6803 ldr r3, [r0, #0]
1780: 685d ldr r5, [r3, #4]
{
1782: 4604 mov r4, r0
ASSERT(pipe >= pd->pipe_pool && pipe <= &pd->pipe_pool[pd->pipe_pool_size]);
1784: f8d5 0080 ldr.w r0, [r5, #128] ; 0x80
1788: 42a0 cmp r0, r4
178a: d816 bhi.n 17ba <_usb_h_pipe_i+0x3e>
178c: f895 308a ldrb.w r3, [r5, #138] ; 0x8a
1790: eb03 0383 add.w r3, r3, r3, lsl #2
1794: eb00 00c3 add.w r0, r0, r3, lsl #3
1798: 4284 cmp r4, r0
179a: bf8c ite hi
179c: 2000 movhi r0, #0
179e: 2001 movls r0, #1
17a0: 4907 ldr r1, [pc, #28] ; (17c0 <_usb_h_pipe_i+0x44>)
17a2: 4b08 ldr r3, [pc, #32] ; (17c4 <_usb_h_pipe_i+0x48>)
17a4: f240 32c2 movw r2, #962 ; 0x3c2
17a8: 4798 blx r3
return (pipe - pd->pipe_pool);
17aa: f8d5 0080 ldr.w r0, [r5, #128] ; 0x80
17ae: 1a20 subs r0, r4, r0
17b0: 4c05 ldr r4, [pc, #20] ; (17c8 <_usb_h_pipe_i+0x4c>)
17b2: 10c0 asrs r0, r0, #3
17b4: 4360 muls r0, r4
}
17b6: b240 sxtb r0, r0
17b8: bd38 pop {r3, r4, r5, pc}
ASSERT(pipe >= pd->pipe_pool && pipe <= &pd->pipe_pool[pd->pipe_pool_size]);
17ba: 2000 movs r0, #0
17bc: e7f0 b.n 17a0 <_usb_h_pipe_i+0x24>
17be: bf00 nop
17c0: 00004f6c .word 0x00004f6c
17c4: 00002939 .word 0x00002939
17c8: cccccccd .word 0xcccccccd
000017cc <_usb_h_rm_sof_user.isra.0>:
if (pd->n_sof_user) {
17cc: f990 3089 ldrsb.w r3, [r0, #137] ; 0x89
17d0: b113 cbz r3, 17d8 <_usb_h_rm_sof_user.isra.0+0xc>
pd->n_sof_user--;
17d2: 3b01 subs r3, #1
17d4: f880 3089 strb.w r3, [r0, #137] ; 0x89
}
17d8: 4770 bx lr
...
000017dc <_usb_h_out_ex>:
hri_usbpipe_set_PSTATUS_BK0RDY_bit(drv->hw, pi);
hri_usbhost_clear_PSTATUS_PFREEZE_bit(drv->hw, pi);
}
static void _usb_h_out_ex(struct usb_h_pipe *pipe, uint8_t *buffer, uint32_t size)
{
17dc: b5f8 push {r3, r4, r5, r6, r7, lr}
struct usb_h_desc * drv = pipe->hcd;
17de: 6804 ldr r4, [r0, #0]
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)pipe->hcd->prvt;
uint8_t pi = _usb_h_pipe_i(pipe);
17e0: 4b14 ldr r3, [pc, #80] ; (1834 <_usb_h_out_ex+0x58>)
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)pipe->hcd->prvt;
17e2: 6867 ldr r7, [r4, #4]
{
17e4: 460e mov r6, r1
17e6: 4615 mov r5, r2
uint8_t pi = _usb_h_pipe_i(pipe);
17e8: 4798 blx r3
hri_usbhost_clear_PINTFLAG_reg(drv->hw, pi, USB_HOST_PINTFLAG_TRCPT(3));
17ea: 6824 ldr r4, [r4, #0]
uint8_t pi = _usb_h_pipe_i(pipe);
17ec: b2c3 uxtb r3, r0
((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = mask;
17ee: eb04 1043 add.w r0, r4, r3, lsl #5
((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = mask;
17f2: 0159 lsls r1, r3, #5
((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = mask;
17f4: 2203 movs r2, #3
17f6: f880 2107 strb.w r2, [r0, #263] ; 0x107
hri_usbhost_set_PINTEN_reg(drv->hw, pi, USB_HOST_PINTENSET_TRCPT(3));
pd->desc_table[pi].HostDescBank[0].ADDR.reg = (uint32_t)buffer;
17fa: eb07 1343 add.w r3, r7, r3, lsl #5
((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = mask;
17fe: f880 2109 strb.w r2, [r0, #265] ; 0x109
1802: 507e str r6, [r7, r1]
pd->desc_table[pi].HostDescBank[0].PCKSIZE.bit.BYTE_COUNT = size;
1804: 685a ldr r2, [r3, #4]
1806: f365 020d bfi r2, r5, #0, #14
180a: 605a str r2, [r3, #4]
pd->desc_table[pi].HostDescBank[0].PCKSIZE.bit.MULTI_PACKET_SIZE = 0;
180c: 685a ldr r2, [r3, #4]
180e: f36f 329b bfc r2, #14, #14
1812: 605a str r2, [r3, #4]
tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg;
1814: f890 3100 ldrb.w r3, [r0, #256] ; 0x100
tmp &= ~USB_HOST_PCFG_PTOKEN_Msk;
1818: f003 03fc and.w r3, r3, #252 ; 0xfc
tmp |= USB_HOST_PCFG_PTOKEN(data);
181c: f043 0302 orr.w r3, r3, #2
((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg = tmp;
1820: f880 3100 strb.w r3, [r0, #256] ; 0x100
((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_BK0RDY;
1824: 2340 movs r3, #64 ; 0x40
1826: f880 3105 strb.w r3, [r0, #261] ; 0x105
((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_PFREEZE;
182a: 2310 movs r3, #16
182c: f880 3104 strb.w r3, [r0, #260] ; 0x104
hri_usbhost_write_PCFG_PTOKEN_bf(drv->hw, pi, 2);
hri_usbpipe_set_PSTATUS_BK0RDY_bit(drv->hw, pi);
hri_usbhost_clear_PSTATUS_PFREEZE_bit(drv->hw, pi);
}
1830: bdf8 pop {r3, r4, r5, r6, r7, pc}
1832: bf00 nop
1834: 0000177d .word 0x0000177d
00001838 <_usb_h_in_req>:
static void _usb_h_in_req(struct usb_h_pipe *pipe)
{
1838: b5f8 push {r3, r4, r5, r6, r7, lr}
struct usb_h_desc * drv = pipe->hcd;
183a: 6804 ldr r4, [r0, #0]
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)pipe->hcd->prvt;
uint8_t pi = _usb_h_pipe_i(pipe);
183c: 4b1f ldr r3, [pc, #124] ; (18bc <_usb_h_in_req+0x84>)
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)pipe->hcd->prvt;
183e: 6865 ldr r5, [r4, #4]
{
1840: 4606 mov r6, r0
uint8_t pi = _usb_h_pipe_i(pipe);
1842: 4798 blx r3
hri_usbhost_clear_PINTFLAG_reg(drv->hw, pi, USB_HOST_PINTFLAG_TRCPT(3));
1844: 6822 ldr r2, [r4, #0]
uint8_t pi = _usb_h_pipe_i(pipe);
1846: b2c3 uxtb r3, r0
((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = mask;
1848: eb02 1143 add.w r1, r2, r3, lsl #5
184c: 2403 movs r4, #3
184e: f881 4107 strb.w r4, [r1, #263] ; 0x107
((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = mask;
1852: f881 4109 strb.w r4, [r1, #265] ; 0x109
hri_usbhost_set_PINTEN_reg(drv->hw, pi, USB_HOST_PINTENSET_TRCPT(3));
if (pipe->type == 0) {
1856: 7c74 ldrb r4, [r6, #17]
1858: 0158 lsls r0, r3, #5
185a: eb05 1343 add.w r3, r5, r3, lsl #5
185e: b9cc cbnz r4, 1894 <_usb_h_in_req+0x5c>
pd->desc_table[pi].HostDescBank[0].ADDR.reg = (uint32_t)usb_ctrl_buffer;
1860: 4a17 ldr r2, [pc, #92] ; (18c0 <_usb_h_in_req+0x88>)
1862: 502a str r2, [r5, r0]
pd->desc_table[pi].HostDescBank[0].PCKSIZE.bit.BYTE_COUNT = 0;
1864: 685a ldr r2, [r3, #4]
1866: f364 020d bfi r2, r4, #0, #14
186a: 605a str r2, [r3, #4]
pd->desc_table[pi].HostDescBank[0].PCKSIZE.bit.MULTI_PACKET_SIZE = pipe->max_pkt_size;
186c: 89b0 ldrh r0, [r6, #12]
186e: 685a ldr r2, [r3, #4]
1870: f360 329b bfi r2, r0, #14, #14
1874: 605a str r2, [r3, #4]
tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg;
1876: f891 3100 ldrb.w r3, [r1, #256] ; 0x100
tmp &= ~USB_HOST_PCFG_PTOKEN_Msk;
187a: f003 03fc and.w r3, r3, #252 ; 0xfc
tmp |= USB_HOST_PCFG_PTOKEN(data);
187e: f043 0301 orr.w r3, r3, #1
((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg = tmp;
1882: f881 3100 strb.w r3, [r1, #256] ; 0x100
((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_BK0RDY;
1886: 2340 movs r3, #64 ; 0x40
1888: f881 3104 strb.w r3, [r1, #260] ; 0x104
((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_PFREEZE;
188c: 2310 movs r3, #16
188e: f881 3104 strb.w r3, [r1, #260] ; 0x104
}
hri_usbhost_write_PCFG_PTOKEN_bf(drv->hw, pi, 1);
hri_usbpipe_clear_PSTATUS_BK0RDY_bit(drv->hw, pi);
hri_usbhost_clear_PSTATUS_PFREEZE_bit(drv->hw, pi);
}
1892: bdf8 pop {r3, r4, r5, r6, r7, pc}
uint32_t n_next = pipe->x.bii.size - pipe->x.bii.count;
1894: e9d6 2705 ldrd r2, r7, [r6, #20]
pd->desc_table[pi].HostDescBank[0].ADDR.reg = (uint32_t)&pipe->x.bii.data[pipe->x.bii.count];
1898: 69f4 ldr r4, [r6, #28]
189a: 443c add r4, r7
189c: 502c str r4, [r5, r0]
pd->desc_table[pi].HostDescBank[0].PCKSIZE.bit.BYTE_COUNT = 0;
189e: 6858 ldr r0, [r3, #4]
18a0: f36f 000d bfc r0, #0, #14
uint32_t n_next = pipe->x.bii.size - pipe->x.bii.count;
18a4: 1bd2 subs r2, r2, r7
pd->desc_table[pi].HostDescBank[0].PCKSIZE.bit.BYTE_COUNT = 0;
18a6: 6058 str r0, [r3, #4]
pd->desc_table[pi].HostDescBank[0].PCKSIZE.bit.MULTI_PACKET_SIZE = n_next;
18a8: 6858 ldr r0, [r3, #4]
18aa: f5b2 4f80 cmp.w r2, #16384 ; 0x4000
18ae: bf28 it cs
18b0: f44f 4280 movcs.w r2, #16384 ; 0x4000
18b4: f362 309b bfi r0, r2, #14, #14
18b8: 6058 str r0, [r3, #4]
18ba: e7dc b.n 1876 <_usb_h_in_req+0x3e>
18bc: 0000177d .word 0x0000177d
18c0: 200003c0 .word 0x200003c0
000018c4 <_usb_h_init>:
{
18c4: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
prvt->pipe_pool = pipe_pool;
18c8: 4f4f ldr r7, [pc, #316] ; (1a08 <_usb_h_init+0x144>)
18ca: f107 03cc add.w r3, r7, #204 ; 0xcc
18ce: f8c7 30c0 str.w r3, [r7, #192] ; 0xc0
prvt->pipe_pool_size = pipe_pool_size;
18d2: 2304 movs r3, #4
{
18d4: 460c mov r4, r1
prvt->pipe_pool_size = pipe_pool_size;
18d6: f887 30ca strb.w r3, [r7, #202] ; 0xca
ASSERT(drv && hw && pd->pipe_pool && pd->pipe_pool_size);
18da: 4605 mov r5, r0
18dc: b110 cbz r0, 18e4 <_usb_h_init+0x20>
18de: 1e08 subs r0, r1, #0
18e0: bf18 it ne
18e2: 2001 movne r0, #1
18e4: 4b49 ldr r3, [pc, #292] ; (1a0c <_usb_h_init+0x148>)
18e6: 494a ldr r1, [pc, #296] ; (1a10 <_usb_h_init+0x14c>)
18e8: 4e4a ldr r6, [pc, #296] ; (1a14 <_usb_h_init+0x150>)
18ea: f240 22be movw r2, #702 ; 0x2be
18ee: 4798 blx r3
return ((Usb *)hw)->DEVICE.SYNCBUSY.reg & reg;
18f0: 78a3 ldrb r3, [r4, #2]
if (!hri_usbhost_is_syncing(hw, USB_SYNCBUSY_SWRST)) {
18f2: f013 0f01 tst.w r3, #1
18f6: d111 bne.n 191c <_usb_h_init+0x58>
}
static inline hri_usb_ctrla_reg_t hri_usb_get_CTRLA_reg(const void *const hw, hri_usb_ctrla_reg_t mask)
{
uint8_t tmp;
hri_usb_wait_for_sync(hw, USB_SYNCBUSY_MASK);
18f8: 2103 movs r1, #3
18fa: 4620 mov r0, r4
18fc: 47b0 blx r6
tmp = ((Usb *)hw)->HOST.CTRLA.reg;
18fe: 7823 ldrb r3, [r4, #0]
if (hri_usbhost_get_CTRLA_reg(hw, USB_CTRLA_ENABLE)) {
1900: 079b lsls r3, r3, #30
1902: d506 bpl.n 1912 <_usb_h_init+0x4e>
((Usb *)hw)->HOST.CTRLA.reg &= ~USB_CTRLA_ENABLE;
1904: 7823 ldrb r3, [r4, #0]
1906: f003 03fd and.w r3, r3, #253 ; 0xfd
190a: 7023 strb r3, [r4, #0]
hri_usb_wait_for_sync(hw, USB_SYNCBUSY_SWRST | USB_SYNCBUSY_ENABLE);
190c: 47b0 blx r6
hri_usbhost_wait_for_sync(hw, USB_SYNCBUSY_ENABLE);
190e: 2102 movs r1, #2
1910: 47b0 blx r6
}
static inline void hri_usb_write_CTRLA_reg(const void *const hw, hri_usb_ctrla_reg_t data)
{
USB_CRITICAL_SECTION_ENTER();
((Usb *)hw)->HOST.CTRLA.reg = data;
1912: 2301 movs r3, #1
1914: 7023 strb r3, [r4, #0]
hri_usb_wait_for_sync(hw, USB_SYNCBUSY_MASK);
1916: 2103 movs r1, #3
1918: 4620 mov r0, r4
191a: 47b0 blx r6
hri_usbhost_wait_for_sync(hw, USB_SYNCBUSY_SWRST);
191c: 2101 movs r1, #1
191e: 4620 mov r0, r4
1920: 47b0 blx r6
CONF_USB_H_VBUS_CTRL_FUNC(drv, 1, false);
1922: 2200 movs r2, #0
1924: 4b3c ldr r3, [pc, #240] ; (1a18 <_usb_h_init+0x154>)
drv->prvt = pd;
1926: f8df 80fc ldr.w r8, [pc, #252] ; 1a24 <_usb_h_init+0x160>
CONF_USB_H_VBUS_CTRL_FUNC(drv, 1, false);
192a: 4628 mov r0, r5
192c: 4798 blx r3
drv->sof_cb = (usb_h_cb_sof_t)_dummy_func_no_return;
192e: 493b ldr r1, [pc, #236] ; (1a1c <_usb_h_init+0x158>)
1930: f8d7 30c0 ldr.w r3, [r7, #192] ; 0xc0
drv->rh_cb = (usb_h_cb_roothub_t)_dummy_func_no_return;
1934: e9c5 1104 strd r1, r1, [r5, #16]
drv->hw = hw;
1938: e9c5 4800 strd r4, r8, [r5]
for (i = 0; i < pd->pipe_pool_size; i++) {
193c: 2200 movs r2, #0
193e: f897 00ca ldrb.w r0, [r7, #202] ; 0xca
1942: 3304 adds r3, #4
p->x.general.state = USB_H_PIPE_S_FREE;
1944: 4696 mov lr, r2
for (i = 0; i < pd->pipe_pool_size; i++) {
1946: fa5f fc82 uxtb.w ip, r2
194a: 4584 cmp ip, r0
194c: f103 0328 add.w r3, r3, #40 ; 0x28
1950: d34e bcc.n 19f0 <_usb_h_init+0x12c>
= (*((uint32_t *)(NVMCTRL_SW0) + (NVM_USB_PAD_TRANSN_POS / 32)) >> (NVM_USB_PAD_TRANSN_POS % 32))
1952: f44f 0300 mov.w r3, #8388608 ; 0x800000
1956: f8d3 2084 ldr.w r2, [r3, #132] ; 0x84
uint32_t pad_transp
195a: f3c2 1344 ubfx r3, r2, #5, #5
uint32_t pad_trim = (*((uint32_t *)(NVMCTRL_SW0) + (NVM_USB_PAD_TRIM_POS / 32)) >> (NVM_USB_PAD_TRIM_POS % 32))
195e: f3c2 2182 ubfx r1, r2, #10, #3
if (pad_transn == 0 || pad_transn == 0x1F) {
1962: f012 021f ands.w r2, r2, #31
1966: d049 beq.n 19fc <_usb_h_init+0x138>
pad_transn = 9;
1968: 2a1f cmp r2, #31
196a: bf08 it eq
196c: 2209 moveq r2, #9
if (pad_transp == 0 || pad_transp == 0x1F) {
196e: 2b00 cmp r3, #0
1970: d046 beq.n 1a00 <_usb_h_init+0x13c>
pad_transp = 25;
1972: 2b1f cmp r3, #31
1974: bf08 it eq
1976: 2319 moveq r3, #25
if (pad_trim == 0 || pad_trim == 0x7) {
1978: 2900 cmp r1, #0
197a: d043 beq.n 1a04 <_usb_h_init+0x140>
pad_trim = 6;
197c: 2907 cmp r1, #7
197e: bf08 it eq
1980: 2106 moveq r1, #6
hw->DEVICE.PADCAL.reg = USB_PADCAL_TRANSN(pad_transn) | USB_PADCAL_TRANSP(pad_transp) | USB_PADCAL_TRIM(pad_trim);
1982: ea43 1382 orr.w r3, r3, r2, lsl #6
1986: ea43 3301 orr.w r3, r3, r1, lsl #12
198a: f04f 4282 mov.w r2, #1090519040 ; 0x41000000
198e: b29b uxth r3, r3
1990: 8513 strh r3, [r2, #40] ; 0x28
hw->DEVICE.QOSCTRL.bit.CQOS = 3;
1992: 78d3 ldrb r3, [r2, #3]
1994: f043 0303 orr.w r3, r3, #3
1998: 70d3 strb r3, [r2, #3]
hw->DEVICE.QOSCTRL.bit.DQOS = 3;
199a: 78d3 ldrb r3, [r2, #3]
199c: f043 030c orr.w r3, r3, #12
19a0: 70d3 strb r3, [r2, #3]
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
if ((int32_t)(IRQn) >= 0)
{
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
19a2: 4b1f ldr r3, [pc, #124] ; (1a20 <_usb_h_init+0x15c>)
_usb_h_dev = drv;
19a4: f8c7 516c str.w r5, [r7, #364] ; 0x16c
pd->pipes_unfreeze = 0;
19a8: 2200 movs r2, #0
19aa: f44f 3180 mov.w r1, #65536 ; 0x10000
19ae: f8c7 20c4 str.w r2, [r7, #196] ; 0xc4
pd->n_ctrl_req_user = 0;
19b2: f8a7 20c8 strh.w r2, [r7, #200] ; 0xc8
19b6: 6099 str r1, [r3, #8]
19b8: f44f 3100 mov.w r1, #131072 ; 0x20000
19bc: 6099 str r1, [r3, #8]
19be: f44f 2180 mov.w r1, #262144 ; 0x40000
19c2: 6099 str r1, [r3, #8]
19c4: f44f 2100 mov.w r1, #524288 ; 0x80000
19c8: 6099 str r1, [r3, #8]
((Usb *)hw)->HOST.CTRLA.reg = data;
19ca: 2384 movs r3, #132 ; 0x84
19cc: 7023 strb r3, [r4, #0]
hri_usb_wait_for_sync(hw, USB_SYNCBUSY_MASK);
19ce: 4620 mov r0, r4
19d0: 2103 movs r1, #3
19d2: 47b0 blx r6
}
static inline void hri_usbhost_write_CTRLB_reg(const void *const hw, hri_usbhost_ctrlb_reg_t data)
{
USB_CRITICAL_SECTION_ENTER();
((Usb *)hw)->HOST.CTRLB.reg = data;
19d4: f44f 6380 mov.w r3, #1024 ; 0x400
}
static inline void hri_usb_write_DESCADD_reg(const void *const hw, hri_usb_descadd_reg_t data)
{
USB_CRITICAL_SECTION_ENTER();
((Usb *)hw)->HOST.DESCADD.reg = data;
19d8: f8c4 8024 str.w r8, [r4, #36] ; 0x24
((Usb *)hw)->HOST.CTRLB.reg = data;
19dc: 8123 strh r3, [r4, #8]
((Usb *)hw)->HOST.INTENSET.reg = data;
19de: f44f 7304 mov.w r3, #528 ; 0x210
19e2: 8323 strh r3, [r4, #24]
((Usb *)hw)->HOST.INTENCLR.reg = ~data;
19e4: f64f 53ef movw r3, #65007 ; 0xfdef
19e8: 82a3 strh r3, [r4, #20]
}
19ea: 4610 mov r0, r2
19ec: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
p->done = (usb_h_pipe_cb_xfer_t)_dummy_func_no_return;
19f0: f843 1c28 str.w r1, [r3, #-40]
p->x.general.state = USB_H_PIPE_S_FREE;
19f4: f803 ec06 strb.w lr, [r3, #-6]
for (i = 0; i < pd->pipe_pool_size; i++) {
19f8: 3201 adds r2, #1
19fa: e7a4 b.n 1946 <_usb_h_init+0x82>
pad_transn = 9;
19fc: 2209 movs r2, #9
19fe: e7b6 b.n 196e <_usb_h_init+0xaa>
pad_transp = 25;
1a00: 2319 movs r3, #25
1a02: e7b9 b.n 1978 <_usb_h_init+0xb4>
pad_trim = 6;
1a04: 2106 movs r1, #6
1a06: e7bc b.n 1982 <_usb_h_init+0xbe>
1a08: 200003c0 .word 0x200003c0
1a0c: 00002939 .word 0x00002939
1a10: 00004f6c .word 0x00004f6c
1a14: 0000173d .word 0x0000173d
1a18: 00003a61 .word 0x00003a61
1a1c: 00001745 .word 0x00001745
1a20: e000e100 .word 0xe000e100
1a24: 20000400 .word 0x20000400
00001a28 <_usb_h_register_callback>:
{
1a28: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr}
1a2a: 460d mov r5, r1
1a2c: 4617 mov r7, r2
ASSERT(drv && drv->prvt && drv->hw);
1a2e: 4604 mov r4, r0
1a30: b128 cbz r0, 1a3e <_usb_h_register_callback+0x16>
1a32: 6840 ldr r0, [r0, #4]
1a34: b118 cbz r0, 1a3e <_usb_h_register_callback+0x16>
1a36: 6820 ldr r0, [r4, #0]
1a38: 3800 subs r0, #0
1a3a: bf18 it ne
1a3c: 2001 movne r0, #1
f = (cb == NULL) ? (FUNC_PTR)_dummy_func_no_return : (FUNC_PTR)cb;
1a3e: 4e14 ldr r6, [pc, #80] ; (1a90 <_usb_h_register_callback+0x68>)
ASSERT(drv && drv->prvt && drv->hw);
1a40: 4914 ldr r1, [pc, #80] ; (1a94 <_usb_h_register_callback+0x6c>)
1a42: 4b15 ldr r3, [pc, #84] ; (1a98 <_usb_h_register_callback+0x70>)
1a44: f240 3223 movw r2, #803 ; 0x323
1a48: 4798 blx r3
f = (cb == NULL) ? (FUNC_PTR)_dummy_func_no_return : (FUNC_PTR)cb;
1a4a: 2f00 cmp r7, #0
1a4c: bf18 it ne
1a4e: 463e movne r6, r7
switch (type) {
1a50: b12d cbz r5, 1a5e <_usb_h_register_callback+0x36>
1a52: 2d01 cmp r5, #1
1a54: d017 beq.n 1a86 <_usb_h_register_callback+0x5e>
1a56: f06f 000c mvn.w r0, #12
}
1a5a: b003 add sp, #12
1a5c: bdf0 pop {r4, r5, r6, r7, pc}
if ((FUNC_PTR)drv->sof_cb != f) {
1a5e: 6923 ldr r3, [r4, #16]
1a60: 42b3 cmp r3, r6
1a62: d012 beq.n 1a8a <_usb_h_register_callback+0x62>
atomic_enter_critical(&flags);
1a64: 4b0d ldr r3, [pc, #52] ; (1a9c <_usb_h_register_callback+0x74>)
1a66: a801 add r0, sp, #4
1a68: 4798 blx r3
drv->sof_cb = (usb_h_cb_sof_t)f;
1a6a: 6126 str r6, [r4, #16]
if (cb) {
1a6c: b13f cbz r7, 1a7e <_usb_h_register_callback+0x56>
_usb_h_add_sof_user(drv); /* SOF user: callback */
1a6e: 4b0c ldr r3, [pc, #48] ; (1aa0 <_usb_h_register_callback+0x78>)
1a70: 4620 mov r0, r4
1a72: 4798 blx r3
atomic_leave_critical(&flags);
1a74: 4b0b ldr r3, [pc, #44] ; (1aa4 <_usb_h_register_callback+0x7c>)
1a76: a801 add r0, sp, #4
1a78: 4798 blx r3
return USB_H_OK;
1a7a: 2000 movs r0, #0
break;
1a7c: e7ed b.n 1a5a <_usb_h_register_callback+0x32>
_usb_h_rm_sof_user(drv); /* SOF user: callback */
1a7e: 6860 ldr r0, [r4, #4]
1a80: 4b09 ldr r3, [pc, #36] ; (1aa8 <_usb_h_register_callback+0x80>)
1a82: 4798 blx r3
1a84: e7f6 b.n 1a74 <_usb_h_register_callback+0x4c>
drv->rh_cb = (usb_h_cb_roothub_t)f;
1a86: 6166 str r6, [r4, #20]
1a88: e7f7 b.n 1a7a <_usb_h_register_callback+0x52>
return USB_H_OK;
1a8a: 4628 mov r0, r5
1a8c: e7e5 b.n 1a5a <_usb_h_register_callback+0x32>
1a8e: bf00 nop
1a90: 00001745 .word 0x00001745
1a94: 00004f6c .word 0x00004f6c
1a98: 00002939 .word 0x00002939
1a9c: 00003efd .word 0x00003efd
1aa0: 00001769 .word 0x00001769
1aa4: 00003f0b .word 0x00003f0b
1aa8: 000017cd .word 0x000017cd
00001aac <_usb_h_suspend>:
{
1aac: b5f8 push {r3, r4, r5, r6, r7, lr}
ASSERT(drv);
1aae: 4604 mov r4, r0
1ab0: 3800 subs r0, #0
1ab2: 4916 ldr r1, [pc, #88] ; (1b0c <_usb_h_suspend+0x60>)
1ab4: 4b16 ldr r3, [pc, #88] ; (1b10 <_usb_h_suspend+0x64>)
1ab6: f240 324b movw r2, #843 ; 0x34b
1aba: bf18 it ne
1abc: 2001 movne r0, #1
1abe: 4798 blx r3
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)drv->prvt;
1ac0: 6861 ldr r1, [r4, #4]
if (pd->n_ctrl_req_user) {
1ac2: f991 3088 ldrsb.w r3, [r1, #136] ; 0x88
1ac6: b11b cbz r3, 1ad0 <_usb_h_suspend+0x24>
pd->suspend_start = -1;
1ac8: 23ff movs r3, #255 ; 0xff
pd->suspend_start = 3;
1aca: f881 3086 strb.w r3, [r1, #134] ; 0x86
}
1ace: bdf8 pop {r3, r4, r5, r6, r7, pc}
if (hri_usbhost_get_PSTATUS_PFREEZE_bit(drv->hw, i)) {
1ad0: 6825 ldr r5, [r4, #0]
pd->pipes_unfreeze = 0;
1ad2: f8a1 3084 strh.w r3, [r1, #132] ; 0x84
pd->pipes_unfreeze |= 1 << i;
1ad6: 2601 movs r6, #1
((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_PFREEZE;
1ad8: 2710 movs r7, #16
return (((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUS.reg & USB_HOST_PSTATUS_PFREEZE)
1ada: eb05 1043 add.w r0, r5, r3, lsl #5
1ade: f890 2106 ldrb.w r2, [r0, #262] ; 0x106
if (hri_usbhost_get_PSTATUS_PFREEZE_bit(drv->hw, i)) {
1ae2: 06d2 lsls r2, r2, #27
1ae4: d409 bmi.n 1afa <_usb_h_suspend+0x4e>
pd->pipes_unfreeze |= 1 << i;
1ae6: f8b1 c084 ldrh.w ip, [r1, #132] ; 0x84
1aea: fa06 f203 lsl.w r2, r6, r3
1aee: ea42 020c orr.w r2, r2, ip
1af2: f8a1 2084 strh.w r2, [r1, #132] ; 0x84
((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_PFREEZE;
1af6: f880 7105 strb.w r7, [r0, #261] ; 0x105
for (i = 0; i < CONF_USB_H_NUM_PIPE_SP; i++) {
1afa: 3301 adds r3, #1
1afc: 2b04 cmp r3, #4
1afe: d1ec bne.n 1ada <_usb_h_suspend+0x2e>
_usb_h_add_sof_user(drv); /* SOF user: delayed suspend */
1b00: 4b04 ldr r3, [pc, #16] ; (1b14 <_usb_h_suspend+0x68>)
1b02: 4620 mov r0, r4
1b04: 4798 blx r3
pd->suspend_start = 3;
1b06: 2303 movs r3, #3
1b08: e7df b.n 1aca <_usb_h_suspend+0x1e>
1b0a: bf00 nop
1b0c: 00004f6c .word 0x00004f6c
1b10: 00002939 .word 0x00002939
1b14: 00001769 .word 0x00001769
00001b18 <_usb_h_end_transfer>:
static void _usb_h_end_transfer(struct usb_h_pipe *pipe, int32_t code)
{
uint8_t s = pipe->x.general.state;
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)pipe->hcd->prvt;
if (s < USB_H_PIPE_S_SETUP || s > USB_H_PIPE_S_STATO) {
1b18: f890 3026 ldrb.w r3, [r0, #38] ; 0x26
1b1c: 3b03 subs r3, #3
1b1e: 2b07 cmp r3, #7
{
1b20: b570 push {r4, r5, r6, lr}
1b22: 4604 mov r4, r0
if (s < USB_H_PIPE_S_SETUP || s > USB_H_PIPE_S_STATO) {
1b24: d821 bhi.n 1b6a <_usb_h_end_transfer+0x52>
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)pipe->hcd->prvt;
1b26: 6803 ldr r3, [r0, #0]
1b28: 685d ldr r5, [r3, #4]
return; /* Not busy */
}
if (pipe->type == 0 /* Control */) {
1b2a: 7c43 ldrb r3, [r0, #17]
1b2c: b943 cbnz r3, 1b40 <_usb_h_end_transfer+0x28>
if (pd->n_ctrl_req_user) {
1b2e: f995 3088 ldrsb.w r3, [r5, #136] ; 0x88
1b32: b113 cbz r3, 1b3a <_usb_h_end_transfer+0x22>
pd->n_ctrl_req_user--;
1b34: 3b01 subs r3, #1
1b36: f885 3088 strb.w r3, [r5, #136] ; 0x88
_usb_h_rm_req_user(pipe->hcd);
_usb_h_rm_sof_user(pipe->hcd); /* SOF user: control timeout */
1b3a: 4b0c ldr r3, [pc, #48] ; (1b6c <_usb_h_end_transfer+0x54>)
1b3c: 4628 mov r0, r5
1b3e: 4798 blx r3
}
pipe->x.general.state = USB_H_PIPE_S_IDLE;
1b40: 2302 movs r3, #2
1b42: f884 3026 strb.w r3, [r4, #38] ; 0x26
pipe->x.general.status = code;
if (pipe->done) {
1b46: 6863 ldr r3, [r4, #4]
pipe->x.general.status = code;
1b48: f884 1027 strb.w r1, [r4, #39] ; 0x27
if (pipe->done) {
1b4c: b10b cbz r3, 1b52 <_usb_h_end_transfer+0x3a>
pipe->done(pipe);
1b4e: 4620 mov r0, r4
1b50: 4798 blx r3
}
/* Suspend delayed due to control request: start it */
if (pd->n_ctrl_req_user == 0 && pd->suspend_start < 0) {
1b52: f995 3088 ldrsb.w r3, [r5, #136] ; 0x88
1b56: b943 cbnz r3, 1b6a <_usb_h_end_transfer+0x52>
1b58: f995 3086 ldrsb.w r3, [r5, #134] ; 0x86
1b5c: 2b00 cmp r3, #0
1b5e: da04 bge.n 1b6a <_usb_h_end_transfer+0x52>
_usb_h_suspend(pipe->hcd);
1b60: 6820 ldr r0, [r4, #0]
1b62: 4b03 ldr r3, [pc, #12] ; (1b70 <_usb_h_end_transfer+0x58>)
}
}
1b64: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
_usb_h_suspend(pipe->hcd);
1b68: 4718 bx r3
}
1b6a: bd70 pop {r4, r5, r6, pc}
1b6c: 000017cd .word 0x000017cd
1b70: 00001aad .word 0x00001aad
00001b74 <_usb_h_abort_transfer>:
static void _usb_h_abort_transfer(struct usb_h_pipe *pipe, int32_t code)
{
1b74: b573 push {r0, r1, r4, r5, r6, lr}
struct usb_h_desc * drv = (struct usb_h_desc *)pipe->hcd;
1b76: 6806 ldr r6, [r0, #0]
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)pipe->hcd->prvt;
uint8_t pi = _usb_h_pipe_i(pipe);
1b78: 4b12 ldr r3, [pc, #72] ; (1bc4 <_usb_h_abort_transfer+0x50>)
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)pipe->hcd->prvt;
1b7a: 6875 ldr r5, [r6, #4]
{
1b7c: 9101 str r1, [sp, #4]
1b7e: 4604 mov r4, r0
uint8_t pi = _usb_h_pipe_i(pipe);
1b80: 4798 blx r3
/* Stop transfer */
hri_usbhost_set_PSTATUS_PFREEZE_bit(drv->hw, pi);
1b82: 6833 ldr r3, [r6, #0]
/* Update byte count */
if ((pipe->ep & 0x80) == 0) {
1b84: 9901 ldr r1, [sp, #4]
1b86: b2c0 uxtb r0, r0
1b88: f100 0208 add.w r2, r0, #8
1b8c: eb03 1242 add.w r2, r3, r2, lsl #5
1b90: 2610 movs r6, #16
1b92: 7156 strb r6, [r2, #5]
1b94: f994 200f ldrsb.w r2, [r4, #15]
1b98: 2a00 cmp r2, #0
1b9a: ea4f 1040 mov.w r0, r0, lsl #5
1b9e: db06 blt.n 1bae <_usb_h_abort_transfer+0x3a>
pipe->x.bii.count += pd->desc_table[pi].HostDescBank[0].PCKSIZE.bit.MULTI_PACKET_SIZE;
1ba0: 4405 add r5, r0
1ba2: 69a2 ldr r2, [r4, #24]
1ba4: 686d ldr r5, [r5, #4]
1ba6: f3c5 358d ubfx r5, r5, #14, #14
1baa: 442a add r2, r5
1bac: 61a2 str r2, [r4, #24]
((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = mask;
1bae: 4418 add r0, r3
1bb0: 2303 movs r3, #3
1bb2: f880 3108 strb.w r3, [r0, #264] ; 0x108
}
/* Disable interrupts */
hri_usbhost_clear_PINTEN_reg(drv->hw, pi, USB_HOST_PINTENCLR_TRCPT(3));
_usb_h_end_transfer(pipe, code);
1bb6: 4b04 ldr r3, [pc, #16] ; (1bc8 <_usb_h_abort_transfer+0x54>)
1bb8: 4620 mov r0, r4
}
1bba: b002 add sp, #8
1bbc: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
_usb_h_end_transfer(pipe, code);
1bc0: 4718 bx r3
1bc2: bf00 nop
1bc4: 0000177d .word 0x0000177d
1bc8: 00001b19 .word 0x00001b19
00001bcc <_usb_h_handler>:
{
1bcc: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
uint32_t isr = hri_usbhost_read_PINTSMRY_reg(_usb_h_dev->hw);
1bd0: 4db0 ldr r5, [pc, #704] ; (1e94 <_usb_h_handler+0x2c8>)
1bd2: f8d5 416c ldr.w r4, [r5, #364] ; 0x16c
1bd6: 6823 ldr r3, [r4, #0]
return ((Usb *)hw)->HOST.PINTSMRY.reg;
1bd8: 8c1a ldrh r2, [r3, #32]
1bda: b292 uxth r2, r2
if (isr) {
1bdc: 2a00 cmp r2, #0
1bde: f000 818d beq.w 1efc <_usb_h_handler+0x330>
int8_t pi = 31 - clz(isr & USB_HOST_PINTSMRY_MASK);
1be2: b2d2 uxtb r2, r2
1be4: fab2 f282 clz r2, r2
1be8: f1c2 021f rsb r2, r2, #31
if (pi < 0) {
1bec: 1c51 adds r1, r2, #1
int8_t pi = 31 - clz(isr & USB_HOST_PINTSMRY_MASK);
1bee: fa5f fe82 uxtb.w lr, r2
if (pi < 0) {
1bf2: f000 80e1 beq.w 1db8 <_usb_h_handler+0x1ec>
1bf6: eb03 1c4e add.w ip, r3, lr, lsl #5
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)drv->prvt;
1bfa: 6867 ldr r7, [r4, #4]
return ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg;
1bfc: f89c 1107 ldrb.w r1, [ip, #263] ; 0x107
p = &pd->pipe_pool[pi];
1c00: f8d7 6080 ldr.w r6, [r7, #128] ; 0x80
return ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg;
1c04: f89c e109 ldrb.w lr, [ip, #265] ; 0x109
1c08: eb02 0482 add.w r4, r2, r2, lsl #2
return ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg;
1c0c: b2c8 uxtb r0, r1
if (pipisr & USB_HOST_PINTFLAG_STALL) {
1c0e: f011 0120 ands.w r1, r1, #32
p = &pd->pipe_pool[pi];
1c12: ea4f 08c4 mov.w r8, r4, lsl #3
return ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg;
1c16: fa5f fe8e uxtb.w lr, lr
1c1a: eb06 04c4 add.w r4, r6, r4, lsl #3
if (pipisr & USB_HOST_PINTFLAG_STALL) {
1c1e: d00a beq.n 1c36 <_usb_h_handler+0x6a>
((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = mask;
1c20: 2320 movs r3, #32
1c22: f88c 3107 strb.w r3, [ip, #263] ; 0x107
_usb_h_abort_transfer(p, USB_H_STALL);
1c26: f06f 0118 mvn.w r1, #24
_usb_h_abort_transfer(p, USB_H_ERR);
1c2a: 4b9b ldr r3, [pc, #620] ; (1e98 <_usb_h_handler+0x2cc>)
1c2c: 4620 mov r0, r4
}
1c2e: b003 add sp, #12
1c30: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
_usb_h_abort_transfer(p, USB_H_ERR);
1c34: 4718 bx r3
if (pipisr & USB_HOST_PINTFLAG_PERR) {
1c36: f010 0908 ands.w r9, r0, #8
1c3a: d013 beq.n 1c64 <_usb_h_handler+0x98>
1c3c: 2308 movs r3, #8
return ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg;
1c3e: eb07 1242 add.w r2, r7, r2, lsl #5
((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = mask;
1c42: f88c 3107 strb.w r3, [ip, #263] ; 0x107
return ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg;
1c46: 89d3 ldrh r3, [r2, #14]
((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg = mask;
1c48: 81d1 strh r1, [r2, #14]
switch (error
1c4a: f003 030f and.w r3, r3, #15
return USB_H_TIMEOUT;
1c4e: 2b08 cmp r3, #8
1c50: bf14 ite ne
1c52: f06f 0305 mvnne.w r3, #5
1c56: f06f 0307 mvneq.w r3, #7
p->x.general.status = _usb_h_pipe_get_error(&(pd->desc_table[pi]), 0);
1c5a: f884 3027 strb.w r3, [r4, #39] ; 0x27
_usb_h_abort_transfer(p, USB_H_ERR);
1c5e: f06f 0105 mvn.w r1, #5
1c62: e7e2 b.n 1c2a <_usb_h_handler+0x5e>
if (pipisr & USB_HOST_PINTFLAG_TRFAIL) {
1c64: f010 0104 ands.w r1, r0, #4
1c68: d014 beq.n 1c94 <_usb_h_handler+0xc8>
((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = mask;
1c6a: 2304 movs r3, #4
return ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_BK.reg;
1c6c: eb07 1242 add.w r2, r7, r2, lsl #5
((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = mask;
1c70: f88c 3107 strb.w r3, [ip, #263] ; 0x107
return ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_BK.reg;
1c74: 7a93 ldrb r3, [r2, #10]
if (status_bk) {
1c76: f003 01ff and.w r1, r3, #255 ; 0xff
1c7a: 2b00 cmp r3, #0
1c7c: f000 809c beq.w 1db8 <_usb_h_handler+0x1ec>
((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_BK.reg = mask;
1c80: f882 900a strb.w r9, [r2, #10]
if (p->type != 0x1 /* ISO */ && status_bk == USB_HOST_STATUS_BK_ERRORFLOW) {
1c84: 7c63 ldrb r3, [r4, #17]
1c86: 2b01 cmp r3, #1
1c88: d002 beq.n 1c90 <_usb_h_handler+0xc4>
1c8a: 2902 cmp r1, #2
1c8c: f000 8094 beq.w 1db8 <_usb_h_handler+0x1ec>
p->x.general.status = USB_H_ERR;
1c90: 23fa movs r3, #250 ; 0xfa
1c92: e7e2 b.n 1c5a <_usb_h_handler+0x8e>
if (pipisr & pipimr & USB_HOST_PINTFLAG_TRCPT(3)) {
1c94: ea00 000e and.w r0, r0, lr
1c98: 0787 lsls r7, r0, #30
1c9a: f000 8107 beq.w 1eac <_usb_h_handler+0x2e0>
((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = mask;
1c9e: 2303 movs r3, #3
1ca0: f88c 3107 strb.w r3, [ip, #263] ; 0x107
tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg;
1ca4: f89c 3100 ldrb.w r3, [ip, #256] ; 0x100
return tmp;
1ca8: 4f7c ldr r7, [pc, #496] ; (1e9c <_usb_h_handler+0x2d0>)
1caa: 9101 str r1, [sp, #4]
if (hri_usbhost_read_PCFG_PTOKEN_bf(drv->hw, pi) == 1) {
1cac: f003 0303 and.w r3, r3, #3
1cb0: 2b01 cmp r3, #1
uint8_t pi = _usb_h_pipe_i(pipe);
1cb2: 4620 mov r0, r4
if (hri_usbhost_read_PCFG_PTOKEN_bf(drv->hw, pi) == 1) {
1cb4: f040 8092 bne.w 1ddc <_usb_h_handler+0x210>
uint8_t pi = _usb_h_pipe_i(pipe);
1cb8: 47b8 blx r7
if (pipe->x.general.state == USB_H_PIPE_S_STATI) {
1cba: f894 3026 ldrb.w r3, [r4, #38] ; 0x26
1cbe: 9901 ldr r1, [sp, #4]
1cc0: 2b09 cmp r3, #9
1cc2: d102 bne.n 1cca <_usb_h_handler+0xfe>
_usb_h_end_transfer(pipe, USB_H_OK);
1cc4: 4b76 ldr r3, [pc, #472] ; (1ea0 <_usb_h_handler+0x2d4>)
1cc6: 4620 mov r0, r4
1cc8: e7b1 b.n 1c2e <_usb_h_handler+0x62>
} else if (pipe->x.general.state != USB_H_PIPE_S_DATI) {
1cca: 2b05 cmp r3, #5
1ccc: d174 bne.n 1db8 <_usb_h_handler+0x1ec>
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)pipe->hcd->prvt;
1cce: f856 3008 ldr.w r3, [r6, r8]
if (n_rx < pipe->max_pkt_size) {
1cd2: f8b4 a00c ldrh.w sl, [r4, #12]
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)pipe->hcd->prvt;
1cd6: f8d3 e004 ldr.w lr, [r3, #4]
n_rx = pd->desc_table[pi].HostDescBank[0].PCKSIZE.bit.BYTE_COUNT;
1cda: b2c0 uxtb r0, r0
1cdc: eb0e 1340 add.w r3, lr, r0, lsl #5
1ce0: ea4f 1b40 mov.w fp, r0, lsl #5
1ce4: 685a ldr r2, [r3, #4]
1ce6: f3c2 020d ubfx r2, r2, #0, #14
if (n_rx < pipe->max_pkt_size) {
1cea: 4691 mov r9, r2
if (n_rx) {
1cec: 2a00 cmp r2, #0
1cee: d072 beq.n 1dd6 <_usb_h_handler+0x20a>
if (pipe->type != 0 /* None Control */) {
1cf0: 7c63 ldrb r3, [r4, #17]
1cf2: 2b00 cmp r3, #0
1cf4: d063 beq.n 1dbe <_usb_h_handler+0x1f2>
*x_count = pipe->x.bii.count;
1cf6: e9d4 c105 ldrd ip, r1, [r4, #20]
*buf = pipe->x.bii.data;
1cfa: 69e3 ldr r3, [r4, #28]
src = (uint8_t *)pd->desc_table[pi].HostDescBank[0].ADDR.reg;
1cfc: f85e e00b ldr.w lr, [lr, fp]
n_remain = size - count;
1d00: ebac 0c01 sub.w ip, ip, r1
if (n_rx >= n_remain) {
1d04: 4562 cmp r2, ip
dst = &dst[count];
1d06: 440b add r3, r1
if (n_rx >= n_remain) {
1d08: bf28 it cs
1d0a: 4662 movcs r2, ip
count += n_rx;
1d0c: 4411 add r1, r2
full = true;
1d0e: bf2c ite cs
1d10: f04f 0c01 movcs.w ip, #1
bool shortpkt = false, full = false;
1d14: f04f 0c00 movcc.w ip, #0
for (i = 0; i < n_rx; i++) {
1d18: 441a add r2, r3
1d1a: ebae 0e03 sub.w lr, lr, r3
1d1e: 429a cmp r2, r3
1d20: eb03 0b0e add.w fp, r3, lr
1d24: d150 bne.n 1dc8 <_usb_h_handler+0x1fc>
if (pipe->type != 0 /* None Control */) {
1d26: 7c63 ldrb r3, [r4, #17]
1d28: 2b00 cmp r3, #0
1d2a: d052 beq.n 1dd2 <_usb_h_handler+0x206>
pipe->x.bii.count = x_count;
1d2c: 61a1 str r1, [r4, #24]
if (pipe->type == 0) {
1d2e: 7c63 ldrb r3, [r4, #17]
1d30: 2b00 cmp r3, #0
1d32: f040 826c bne.w 220e <_usb_h_handler+0x642>
pipe->x.ctrl.pkt_timeout = USB_CTRL_DPKT_TIMEOUT;
1d36: f44f 73fa mov.w r3, #500 ; 0x1f4
1d3a: 8463 strh r3, [r4, #34] ; 0x22
if (full || shortpkt) {
1d3c: f1bc 0f00 cmp.w ip, #0
1d40: f000 826d beq.w 221e <_usb_h_handler+0x652>
hri_usbhost_set_PSTATUS_DTGL_bit(pipe->hcd->hw, pi);
1d44: f856 9008 ldr.w r9, [r6, r8]
pipe->x.ctrl.state = USB_H_PIPE_S_STATO;
1d48: 230a movs r3, #10
1d4a: f884 3026 strb.w r3, [r4, #38] ; 0x26
pipe->x.ctrl.pkt_timeout = USB_CTRL_STAT_TIMEOUT;
1d4e: 2332 movs r3, #50 ; 0x32
1d50: 8463 strh r3, [r4, #34] ; 0x22
hri_usbhost_set_PSTATUS_DTGL_bit(pipe->hcd->hw, pi);
1d52: f8d9 3000 ldr.w r3, [r9]
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)pipe->hcd->prvt;
1d56: f8d9 6004 ldr.w r6, [r9, #4]
((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_DTGL;
1d5a: 3008 adds r0, #8
1d5c: eb03 1340 add.w r3, r3, r0, lsl #5
1d60: f04f 0801 mov.w r8, #1
1d64: f883 8005 strb.w r8, [r3, #5]
uint8_t pi = _usb_h_pipe_i(pipe);
1d68: 4620 mov r0, r4
1d6a: 47b8 blx r7
hri_usbhost_clear_PINTFLAG_reg(drv->hw, pi, USB_HOST_PINTFLAG_TRCPT(3));
1d6c: f8d9 2000 ldr.w r2, [r9]
uint8_t pi = _usb_h_pipe_i(pipe);
1d70: b2c3 uxtb r3, r0
((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = mask;
1d72: eb02 1043 add.w r0, r2, r3, lsl #5
((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = mask;
1d76: 015c lsls r4, r3, #5
((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = mask;
1d78: 2103 movs r1, #3
1d7a: f880 1107 strb.w r1, [r0, #263] ; 0x107
pd->desc_table[pi].HostDescBank[0].ADDR.reg = (uint32_t)usb_ctrl_buffer;
1d7e: eb06 1343 add.w r3, r6, r3, lsl #5
((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = mask;
1d82: f880 1109 strb.w r1, [r0, #265] ; 0x109
((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_DTGL;
1d86: f880 8105 strb.w r8, [r0, #261] ; 0x105
1d8a: 5135 str r5, [r6, r4]
pd->desc_table[pi].HostDescBank[0].PCKSIZE.bit.BYTE_COUNT = 0;
1d8c: 685a ldr r2, [r3, #4]
1d8e: f36f 020d bfc r2, #0, #14
1d92: 605a str r2, [r3, #4]
pd->desc_table[pi].HostDescBank[0].PCKSIZE.bit.MULTI_PACKET_SIZE = 0;
1d94: 685a ldr r2, [r3, #4]
1d96: f36f 329b bfc r2, #14, #14
1d9a: 605a str r2, [r3, #4]
tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg;
1d9c: f890 3100 ldrb.w r3, [r0, #256] ; 0x100
tmp &= ~USB_HOST_PCFG_PTOKEN_Msk;
1da0: f003 03fc and.w r3, r3, #252 ; 0xfc
tmp |= USB_HOST_PCFG_PTOKEN(data);
1da4: f043 0302 orr.w r3, r3, #2
((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg = tmp;
1da8: f880 3100 strb.w r3, [r0, #256] ; 0x100
((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_BK0RDY;
1dac: 2340 movs r3, #64 ; 0x40
1dae: f880 3105 strb.w r3, [r0, #261] ; 0x105
((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_PFREEZE;
1db2: 2310 movs r3, #16
1db4: f880 3104 strb.w r3, [r0, #260] ; 0x104
}
1db8: b003 add sp, #12
1dba: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
*buf = pipe->x.ctrl.data;
1dbe: 6963 ldr r3, [r4, #20]
*x_size = pipe->x.ctrl.size;
1dc0: f8b4 c01c ldrh.w ip, [r4, #28]
*x_count = pipe->x.ctrl.count;
1dc4: 8be1 ldrh r1, [r4, #30]
1dc6: e799 b.n 1cfc <_usb_h_handler+0x130>
*dst++ = *src++;
1dc8: f89b b000 ldrb.w fp, [fp]
1dcc: f803 bb01 strb.w fp, [r3], #1
for (i = 0; i < n_rx; i++) {
1dd0: e7a5 b.n 1d1e <_usb_h_handler+0x152>
pipe->x.ctrl.count = x_count;
1dd2: 83e1 strh r1, [r4, #30]
1dd4: e7ab b.n 1d2e <_usb_h_handler+0x162>
bool shortpkt = false, full = false;
1dd6: f04f 0c00 mov.w ip, #0
1dda: e7a8 b.n 1d2e <_usb_h_handler+0x162>
uint8_t pi = _usb_h_pipe_i(pipe);
1ddc: 47b8 blx r7
if (pipe->x.general.state == USB_H_PIPE_S_STATO) {
1dde: f894 3026 ldrb.w r3, [r4, #38] ; 0x26
1de2: 9901 ldr r1, [sp, #4]
1de4: 2b0a cmp r3, #10
1de6: f43f af6d beq.w 1cc4 <_usb_h_handler+0xf8>
} else if (pipe->x.general.state != USB_H_PIPE_S_DATO) {
1dea: 2b06 cmp r3, #6
1dec: d1e4 bne.n 1db8 <_usb_h_handler+0x1ec>
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)pipe->hcd->prvt;
1dee: f856 8008 ldr.w r8, [r6, r8]
if (pipe->type == 0 /* Control */) {
1df2: 7c65 ldrb r5, [r4, #17]
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)pipe->hcd->prvt;
1df4: f8d8 3004 ldr.w r3, [r8, #4]
if (pipe->type == 0 /* Control */) {
1df8: b915 cbnz r5, 1e00 <_usb_h_handler+0x234>
pipe->x.ctrl.pkt_timeout = USB_CTRL_DPKT_TIMEOUT;
1dfa: f44f 72fa mov.w r2, #500 ; 0x1f4
1dfe: 8462 strh r2, [r4, #34] ; 0x22
n_tx = pd->desc_table[pi].HostDescBank[0].PCKSIZE.bit.BYTE_COUNT;
1e00: b2c0 uxtb r0, r0
1e02: eb03 1040 add.w r0, r3, r0, lsl #5
if (n_tx < pipe->max_pkt_size) {
1e06: 89a3 ldrh r3, [r4, #12]
n_tx = pd->desc_table[pi].HostDescBank[0].PCKSIZE.bit.BYTE_COUNT;
1e08: 6840 ldr r0, [r0, #4]
*x_size = pipe->x.bii.size;
1e0a: 6966 ldr r6, [r4, #20]
n_tx = pd->desc_table[pi].HostDescBank[0].PCKSIZE.bit.BYTE_COUNT;
1e0c: f3c0 000d ubfx r0, r0, #0, #14
if (n_tx < pipe->max_pkt_size) {
1e10: 4283 cmp r3, r0
pipe->zlp = 0;
1e12: bf82 ittt hi
1e14: 7ce3 ldrbhi r3, [r4, #19]
1e16: f36f 1386 bfchi r3, #6, #1
1e1a: 74e3 strbhi r3, [r4, #19]
if (pipe->type != 0 /* None Control */) {
1e1c: b17d cbz r5, 1e3e <_usb_h_handler+0x272>
*x_size = pipe->x.bii.size;
1e1e: 4632 mov r2, r6
*buf = pipe->x.bii.data;
1e20: e9d4 3606 ldrd r3, r6, [r4, #24]
if (n_tx) {
1e24: b358 cbz r0, 1e7e <_usb_h_handler+0x2b2>
count += n_tx;
1e26: 4403 add r3, r0
if (pipe->type != 0 /* None Control */) {
1e28: b165 cbz r5, 1e44 <_usb_h_handler+0x278>
pipe->x.bii.count = x_count;
1e2a: 61a3 str r3, [r4, #24]
if (count >= size && !pipe->zlp) {
1e2c: 4293 cmp r3, r2
1e2e: d329 bcc.n 1e84 <_usb_h_handler+0x2b8>
1e30: 7ce1 ldrb r1, [r4, #19]
1e32: f011 0140 ands.w r1, r1, #64 ; 0x40
1e36: d125 bne.n 1e84 <_usb_h_handler+0x2b8>
if (pipe->type != 0 /* None CTRL */) {
1e38: 2d00 cmp r5, #0
1e3a: d0bd beq.n 1db8 <_usb_h_handler+0x1ec>
1e3c: e742 b.n 1cc4 <_usb_h_handler+0xf8>
*x_size = pipe->x.ctrl.size;
1e3e: 8ba2 ldrh r2, [r4, #28]
*x_count = pipe->x.ctrl.count;
1e40: 8be3 ldrh r3, [r4, #30]
1e42: e7ef b.n 1e24 <_usb_h_handler+0x258>
pipe->x.ctrl.count = x_count;
1e44: 83e3 strh r3, [r4, #30]
if (pipe->type == 0 /* Control */ && pipe->x.ctrl.count >= pipe->x.ctrl.size && !pipe->zlp) {
1e46: 8be0 ldrh r0, [r4, #30]
1e48: 8ba1 ldrh r1, [r4, #28]
1e4a: 4288 cmp r0, r1
1e4c: d3ee bcc.n 1e2c <_usb_h_handler+0x260>
1e4e: 7ce1 ldrb r1, [r4, #19]
1e50: 0649 lsls r1, r1, #25
1e52: d417 bmi.n 1e84 <_usb_h_handler+0x2b8>
pipe->x.ctrl.state = USB_H_PIPE_S_STATI;
1e54: 2309 movs r3, #9
1e56: f884 3026 strb.w r3, [r4, #38] ; 0x26
pipe->x.ctrl.pkt_timeout = USB_CTRL_STAT_TIMEOUT;
1e5a: 2332 movs r3, #50 ; 0x32
1e5c: 8463 strh r3, [r4, #34] ; 0x22
uint8_t pi = _usb_h_pipe_i(pipe);
1e5e: 4620 mov r0, r4
1e60: 47b8 blx r7
hri_usbhost_set_PSTATUS_DTGL_bit(drv->hw, pi);
1e62: f8d8 3000 ldr.w r3, [r8]
((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_DTGL;
1e66: b2c0 uxtb r0, r0
1e68: 3008 adds r0, #8
1e6a: eb03 1040 add.w r0, r3, r0, lsl #5
1e6e: 2301 movs r3, #1
1e70: 7143 strb r3, [r0, #5]
_usb_h_in_req(pipe);
1e72: 4b0c ldr r3, [pc, #48] ; (1ea4 <_usb_h_handler+0x2d8>)
1e74: 4620 mov r0, r4
}
1e76: b003 add sp, #12
1e78: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
_usb_h_in_req(pipe);
1e7c: 4718 bx r3
if (pipe->type == 0 /* Control */ && pipe->x.ctrl.count >= pipe->x.ctrl.size && !pipe->zlp) {
1e7e: 2d00 cmp r5, #0
1e80: d1d4 bne.n 1e2c <_usb_h_handler+0x260>
1e82: e7e0 b.n 1e46 <_usb_h_handler+0x27a>
_usb_h_out_ex(pipe, &src[count], n_remain);
1e84: 1ad2 subs r2, r2, r3
1e86: 18f1 adds r1, r6, r3
_usb_h_out_ex(p, p->x.ctrl.data, p->x.ctrl.size);
1e88: 4b07 ldr r3, [pc, #28] ; (1ea8 <_usb_h_handler+0x2dc>)
1e8a: 4620 mov r0, r4
}
1e8c: b003 add sp, #12
1e8e: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
_usb_h_out_ex(p, p->x.ctrl.data, p->x.ctrl.size);
1e92: 4718 bx r3
1e94: 200003c0 .word 0x200003c0
1e98: 00001b75 .word 0x00001b75
1e9c: 0000177d .word 0x0000177d
1ea0: 00001b19 .word 0x00001b19
1ea4: 00001839 .word 0x00001839
1ea8: 000017dd .word 0x000017dd
if (pipisr & pipimr & USB_HOST_PINTFLAG_TXSTP) {
1eac: f010 0010 ands.w r0, r0, #16
1eb0: d01c beq.n 1eec <_usb_h_handler+0x320>
((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = mask;
1eb2: 2210 movs r2, #16
((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_DTGL;
1eb4: 2301 movs r3, #1
((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = mask;
1eb6: f88c 2107 strb.w r2, [ip, #263] ; 0x107
((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = mask;
1eba: f88c 2108 strb.w r2, [ip, #264] ; 0x108
((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_DTGL;
1ebe: f88c 3105 strb.w r3, [ip, #261] ; 0x105
if (p->x.ctrl.setup[0] & 0x80) { /* IN */
1ec2: 69a3 ldr r3, [r4, #24]
1ec4: f993 2000 ldrsb.w r2, [r3]
1ec8: 2a00 cmp r2, #0
1eca: da03 bge.n 1ed4 <_usb_h_handler+0x308>
p->x.ctrl.state = USB_H_PIPE_S_DATI;
1ecc: 2305 movs r3, #5
p->x.ctrl.state = USB_H_PIPE_S_STATI;
1ece: f884 3026 strb.w r3, [r4, #38] ; 0x26
_usb_h_in_req(p);
1ed2: e7ce b.n 1e72 <_usb_h_handler+0x2a6>
if (p->x.ctrl.setup[6] || p->x.ctrl.setup[7]) { /* wLength */
1ed4: 799a ldrb r2, [r3, #6]
1ed6: b90a cbnz r2, 1edc <_usb_h_handler+0x310>
1ed8: 79db ldrb r3, [r3, #7]
1eda: b12b cbz r3, 1ee8 <_usb_h_handler+0x31c>
p->x.ctrl.state = USB_H_PIPE_S_DATO;
1edc: 2306 movs r3, #6
_usb_h_out_ex(p, p->x.ctrl.data, p->x.ctrl.size);
1ede: 8ba2 ldrh r2, [r4, #28]
1ee0: 6961 ldr r1, [r4, #20]
p->x.ctrl.state = USB_H_PIPE_S_DATO;
1ee2: f884 3026 strb.w r3, [r4, #38] ; 0x26
_usb_h_out_ex(p, p->x.ctrl.data, p->x.ctrl.size);
1ee6: e7cf b.n 1e88 <_usb_h_handler+0x2bc>
p->x.ctrl.state = USB_H_PIPE_S_STATI;
1ee8: 2309 movs r3, #9
1eea: e7f0 b.n 1ece <_usb_h_handler+0x302>
ASSERT(false); /* Error system */
1eec: 49af ldr r1, [pc, #700] ; (21ac <_usb_h_handler+0x5e0>)
1eee: 4bb0 ldr r3, [pc, #704] ; (21b0 <_usb_h_handler+0x5e4>)
1ef0: f240 221b movw r2, #539 ; 0x21b
}
1ef4: b003 add sp, #12
1ef6: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
ASSERT(false); /* Error system */
1efa: 4718 bx r3
return ((Usb *)hw)->HOST.INTFLAG.reg;
1efc: 8b9e ldrh r6, [r3, #28]
1efe: b2b5 uxth r5, r6
if (isr & USB_HOST_INTFLAG_HSOF) {
1f00: f016 0604 ands.w r6, r6, #4
1f04: f000 80b3 beq.w 206e <_usb_h_handler+0x4a2>
((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_HSOF;
1f08: 2204 movs r2, #4
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)drv->prvt;
1f0a: 6865 ldr r5, [r4, #4]
1f0c: 839a strh r2, [r3, #28]
tmp = ((Usb *)hw)->HOST.FNUM.reg;
1f0e: 8a1b ldrh r3, [r3, #16]
if (hri_usbhost_read_FNUM_MFNUM_bf(drv->hw)) {
1f10: f013 0307 ands.w r3, r3, #7
1f14: d053 beq.n 1fbe <_usb_h_handler+0x3f2>
if (pd->resume_start <= 0 || pd->suspend_start <= 0) {
1f16: f995 3087 ldrsb.w r3, [r5, #135] ; 0x87
1f1a: 2b00 cmp r3, #0
1f1c: dd04 ble.n 1f28 <_usb_h_handler+0x35c>
1f1e: f995 3086 ldrsb.w r3, [r5, #134] ; 0x86
1f22: 2b00 cmp r3, #0
1f24: f73f af48 bgt.w 1db8 <_usb_h_handler+0x1ec>
drv->sof_cb(drv);
1f28: 6923 ldr r3, [r4, #16]
1f2a: 4620 mov r0, r4
}
1f2c: b003 add sp, #12
1f2e: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
drv->sof_cb(drv);
1f32: 4718 bx r3
struct usb_h_pipe *p = &pd->pipe_pool[i];
1f34: f8d5 2080 ldr.w r2, [r5, #128] ; 0x80
1f38: fb07 2206 mla r2, r7, r6, r2
if (!p->periodic_start) {
1f3c: f992 3013 ldrsb.w r3, [r2, #19]
1f40: 2b00 cmp r3, #0
1f42: da0b bge.n 1f5c <_usb_h_handler+0x390>
_usb_h_rm_sof_user(drv); /* SOF User: periodic start */
1f44: 6860 ldr r0, [r4, #4]
1f46: 47c0 blx r8
p->periodic_start = 0;
1f48: 7cd3 ldrb r3, [r2, #19]
1f4a: f36f 13c7 bfc r3, #7, #1
1f4e: 74d3 strb r3, [r2, #19]
hri_usbhost_clear_PSTATUS_reg(drv->hw, i, USB_HOST_PSTATUS_PFREEZE);
1f50: 6823 ldr r3, [r4, #0]
((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = mask;
1f52: 3608 adds r6, #8
1f54: eb03 1646 add.w r6, r3, r6, lsl #5
1f58: f886 9004 strb.w r9, [r6, #4]
for (i = 0; i < pd->pipe_pool_size; i++) {
1f5c: 3101 adds r1, #1
1f5e: f895 308a ldrb.w r3, [r5, #138] ; 0x8a
1f62: b2ce uxtb r6, r1
1f64: 42b3 cmp r3, r6
1f66: d8e5 bhi.n 1f34 <_usb_h_handler+0x368>
if (pd->suspend_start > 0) {
1f68: f995 3086 ldrsb.w r3, [r5, #134] ; 0x86
if (--pd->resume_start == 0) {
1f6c: f995 2087 ldrsb.w r2, [r5, #135] ; 0x87
if (pd->suspend_start > 0) {
1f70: 2b00 cmp r3, #0
1f72: dd2b ble.n 1fcc <_usb_h_handler+0x400>
if (--pd->resume_start == 0) {
1f74: 3a01 subs r2, #1
1f76: b252 sxtb r2, r2
1f78: f885 2087 strb.w r2, [r5, #135] ; 0x87
1f7c: 2a00 cmp r2, #0
1f7e: f47f af1b bne.w 1db8 <_usb_h_handler+0x1ec>
_usb_h_rm_sof_user(drv); /* SOF user: delayed resume */
1f82: 6860 ldr r0, [r4, #4]
1f84: 4b8b ldr r3, [pc, #556] ; (21b4 <_usb_h_handler+0x5e8>)
1f86: 4798 blx r3
if (pd->pipes_unfreeze & (1 << pi)) {
1f88: f8b5 1084 ldrh.w r1, [r5, #132] ; 0x84
1f8c: 4613 mov r3, r2
((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = mask;
1f8e: 2010 movs r0, #16
1f90: fa41 f203 asr.w r2, r1, r3
1f94: 07d5 lsls r5, r2, #31
hri_usbhost_set_PSTATUS_reg(drv->hw, pi, USB_HOST_PSTATUS_PFREEZE);
1f96: bf42 ittt mi
1f98: 6822 ldrmi r2, [r4, #0]
1f9a: f103 0508 addmi.w r5, r3, #8
1f9e: eb02 1245 addmi.w r2, r2, r5, lsl #5
for (uint8_t pi = 0; pi < CONF_USB_H_NUM_PIPE_SP; pi++) {
1fa2: f103 0301 add.w r3, r3, #1
1fa6: bf48 it mi
1fa8: 7150 strbmi r0, [r2, #5]
1faa: 2b04 cmp r3, #4
1fac: d1f0 bne.n 1f90 <_usb_h_handler+0x3c4>
drv->rh_cb(drv, 1, 2); /* Port 1 PORT_SUSPEND changed */
1fae: 6963 ldr r3, [r4, #20]
1fb0: 2202 movs r2, #2
drv->rh_cb(drv, 1, 0); /* PORT_CONNECTION: connect status changed */
1fb2: 2101 movs r1, #1
1fb4: 4620 mov r0, r4
}
1fb6: b003 add sp, #12
1fb8: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
drv->rh_cb(drv, 1, 0); /* PORT_CONNECTION: connect status changed */
1fbc: 4718 bx r3
_usb_h_rm_sof_user(drv); /* SOF User: periodic start */
1fbe: f8df 81f4 ldr.w r8, [pc, #500] ; 21b4 <_usb_h_handler+0x5e8>
1fc2: 4619 mov r1, r3
struct usb_h_pipe *p = &pd->pipe_pool[i];
1fc4: 2728 movs r7, #40 ; 0x28
((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = mask;
1fc6: f04f 0910 mov.w r9, #16
1fca: e7c8 b.n 1f5e <_usb_h_handler+0x392>
if (pd->resume_start > 0) {
1fcc: 2a00 cmp r2, #0
1fce: dd1d ble.n 200c <_usb_h_handler+0x440>
if (--pd->resume_start == 0) {
1fd0: 3a01 subs r2, #1
1fd2: b2d2 uxtb r2, r2
1fd4: f885 2087 strb.w r2, [r5, #135] ; 0x87
1fd8: 2a00 cmp r2, #0
1fda: f47f aeed bne.w 1db8 <_usb_h_handler+0x1ec>
_usb_h_rm_sof_user(drv); /* SOF user: delayed resume */
1fde: 6860 ldr r0, [r4, #4]
1fe0: 4b74 ldr r3, [pc, #464] ; (21b4 <_usb_h_handler+0x5e8>)
1fe2: 4798 blx r3
if (pd->pipes_unfreeze & (1 << pi)) {
1fe4: f8b5 1084 ldrh.w r1, [r5, #132] ; 0x84
1fe8: 4613 mov r3, r2
1fea: 2010 movs r0, #16
1fec: fa41 f203 asr.w r2, r1, r3
1ff0: 07d2 lsls r2, r2, #31
hri_usbhost_clear_PSTATUS_reg(drv->hw, pi, USB_HOST_PSTATUS_PFREEZE);
1ff2: bf42 ittt mi
1ff4: 6822 ldrmi r2, [r4, #0]
1ff6: f103 0508 addmi.w r5, r3, #8
1ffa: eb02 1245 addmi.w r2, r2, r5, lsl #5
for (uint8_t pi = 0; pi < CONF_USB_H_NUM_PIPE_SP; pi++) {
1ffe: f103 0301 add.w r3, r3, #1
2002: bf48 it mi
2004: 7110 strbmi r0, [r2, #4]
2006: 2b04 cmp r3, #4
2008: d1f0 bne.n 1fec <_usb_h_handler+0x420>
200a: e7d0 b.n 1fae <_usb_h_handler+0x3e2>
_usb_h_abort_transfer(p, USB_H_TIMEOUT);
200c: 4f6a ldr r7, [pc, #424] ; (21b8 <_usb_h_handler+0x5ec>)
200e: 2600 movs r6, #0
struct usb_h_pipe *p = &pd->pipe_pool[i];
2010: f8d5 0080 ldr.w r0, [r5, #128] ; 0x80
2014: 4430 add r0, r6
if (p->x.general.state <= USB_H_PIPE_S_SETUP || p->type != 0 /* Control */) {
2016: f890 3026 ldrb.w r3, [r0, #38] ; 0x26
201a: 2b03 cmp r3, #3
201c: d918 bls.n 2050 <_usb_h_handler+0x484>
201e: 7c43 ldrb r3, [r0, #17]
2020: b9b3 cbnz r3, 2050 <_usb_h_handler+0x484>
if (p->x.ctrl.pkt_timeout > 0) {
2022: f9b0 3022 ldrsh.w r3, [r0, #34] ; 0x22
2026: 2b00 cmp r3, #0
p->x.ctrl.pkt_timeout--;
2028: bfc4 itt gt
202a: f103 33ff addgt.w r3, r3, #4294967295 ; 0xffffffff
202e: 8443 strhgt r3, [r0, #34] ; 0x22
if (p->x.ctrl.req_timeout > 0) {
2030: f9b0 3020 ldrsh.w r3, [r0, #32]
2034: 2b00 cmp r3, #0
p->x.ctrl.req_timeout--;
2036: bfc4 itt gt
2038: f103 33ff addgt.w r3, r3, #4294967295 ; 0xffffffff
203c: 8403 strhgt r3, [r0, #32]
if (p->x.ctrl.pkt_timeout == 0 || p->x.ctrl.req_timeout == 0) {
203e: f9b0 3022 ldrsh.w r3, [r0, #34] ; 0x22
2042: b113 cbz r3, 204a <_usb_h_handler+0x47e>
2044: f9b0 3020 ldrsh.w r3, [r0, #32]
2048: b913 cbnz r3, 2050 <_usb_h_handler+0x484>
_usb_h_abort_transfer(p, USB_H_TIMEOUT);
204a: f06f 0107 mvn.w r1, #7
204e: 47b8 blx r7
for (i = 0; i < CONF_USB_H_NUM_PIPE_SP; i++) {
2050: 3628 adds r6, #40 ; 0x28
2052: 2ea0 cmp r6, #160 ; 0xa0
2054: d1dc bne.n 2010 <_usb_h_handler+0x444>
drv->sof_cb(drv);
2056: 6923 ldr r3, [r4, #16]
2058: 4620 mov r0, r4
205a: 4798 blx r3
if (pd->n_sof_user <= 0) {
205c: f995 3089 ldrsb.w r3, [r5, #137] ; 0x89
2060: 2b00 cmp r3, #0
2062: f73f aea9 bgt.w 1db8 <_usb_h_handler+0x1ec>
hri_usbhost_clear_INTEN_HSOF_bit(drv->hw);
2066: 6823 ldr r3, [r4, #0]
((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_HSOF;
2068: 2204 movs r2, #4
206a: 829a strh r2, [r3, #20]
}
206c: e6a4 b.n 1db8 <_usb_h_handler+0x1ec>
if (isr
206e: f415 7f5e tst.w r5, #888 ; 0x378
2072: f43f aea1 beq.w 1db8 <_usb_h_handler+0x1ec>
return ((Usb *)hw)->HOST.INTENSET.reg;
2076: 8b19 ldrh r1, [r3, #24]
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)drv->prvt;
2078: f8d4 9004 ldr.w r9, [r4, #4]
if (isr & USB_HOST_INTFLAG_RST) {
207c: f015 0008 ands.w r0, r5, #8
2080: b289 uxth r1, r1
2082: d066 beq.n 2152 <_usb_h_handler+0x586>
((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_RST;
2084: 2208 movs r2, #8
2086: 839a strh r2, [r3, #28]
for (i = 0; i < pd->pipe_pool_size; i++) {
2088: f899 308a ldrb.w r3, [r9, #138] ; 0x8a
208c: b2f7 uxtb r7, r6
208e: 42bb cmp r3, r7
2090: d802 bhi.n 2098 <_usb_h_handler+0x4cc>
drv->rh_cb(drv, 1, 4); /* PORT_RESET: reset complete */
2092: 6963 ldr r3, [r4, #20]
2094: 2204 movs r2, #4
2096: e78c b.n 1fb2 <_usb_h_handler+0x3e6>
p = &pd->pipe_pool[i];
2098: f8d9 5080 ldr.w r5, [r9, #128] ; 0x80
209c: 2328 movs r3, #40 ; 0x28
209e: fb03 5507 mla r5, r3, r7, r5
if (p->x.general.state == USB_H_PIPE_S_FREE) {
20a2: f895 3026 ldrb.w r3, [r5, #38] ; 0x26
20a6: 2b00 cmp r3, #0
20a8: d04f beq.n 214a <_usb_h_handler+0x57e>
_usb_h_pipe_configure(drv, i, p->dev, p->ep, p->type, p->max_pkt_size, p->bank, p->interval, p->speed);
20aa: f895 a011 ldrb.w sl, [r5, #17]
20ae: 7cea ldrb r2, [r5, #19]
20b0: f895 c00e ldrb.w ip, [r5, #14]
20b4: 7be9 ldrb r1, [r5, #15]
20b6: 89a8 ldrh r0, [r5, #12]
20b8: f895 b010 ldrb.w fp, [r5, #16]
uint32_t cfg = USB_HOST_PCFG_PTYPE(type + 1) | (n_bank == 1 ? 0 : USB_HOST_PCFG_BK)
20bc: f10a 0301 add.w r3, sl, #1
20c0: f002 0203 and.w r2, r2, #3
20c4: 2a01 cmp r2, #1
20c6: ea4f 03c3 mov.w r3, r3, lsl #3
20ca: f003 0338 and.w r3, r3, #56 ; 0x38
20ce: bf0c ite eq
20d0: f04f 0800 moveq.w r8, #0
20d4: f04f 0804 movne.w r8, #4
20d8: ea43 0308 orr.w r3, r3, r8
| (type == 0 /* CTRL */ ? 0 : (dir ? USB_HOST_PCFG_PTOKEN(1) : USB_HOST_PCFG_PTOKEN(2)));
20dc: f1ba 0f00 cmp.w sl, #0
20e0: d035 beq.n 214e <_usb_h_handler+0x582>
20e2: f011 0f80 tst.w r1, #128 ; 0x80
20e6: bf14 ite ne
20e8: f04f 0801 movne.w r8, #1
20ec: f04f 0802 moveq.w r8, #2
uint32_t cfg = USB_HOST_PCFG_PTYPE(type + 1) | (n_bank == 1 ? 0 : USB_HOST_PCFG_BK)
20f0: ea43 0808 orr.w r8, r3, r8
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)drv->prvt;
20f4: 6863 ldr r3, [r4, #4]
pd->desc_table[phy].HostDescBank[0].CTRL_PIPE.bit.PDADDR = dev;
20f6: 017a lsls r2, r7, #5
20f8: eb03 1747 add.w r7, r3, r7, lsl #5
20fc: 9201 str r2, [sp, #4]
20fe: f8b7 e00c ldrh.w lr, [r7, #12]
pd->desc_table[phy].HostDescBank[0].PCKSIZE.bit.SIZE = _usb_h_get_psize(size);
2102: 4b2e ldr r3, [pc, #184] ; (21bc <_usb_h_handler+0x5f0>)
pd->desc_table[phy].HostDescBank[0].CTRL_PIPE.bit.PDADDR = dev;
2104: f36c 0e06 bfi lr, ip, #0, #7
2108: f8a7 e00c strh.w lr, [r7, #12]
pd->desc_table[phy].HostDescBank[0].CTRL_PIPE.bit.PEPNUM = ep & 0xF;
210c: f8b7 c00c ldrh.w ip, [r7, #12]
2110: f361 2c0b bfi ip, r1, #8, #4
2114: f8a7 c00c strh.w ip, [r7, #12]
pd->desc_table[phy].HostDescBank[0].PCKSIZE.bit.SIZE = _usb_h_get_psize(size);
2118: 4798 blx r3
211a: 687b ldr r3, [r7, #4]
211c: f360 731e bfi r3, r0, #28, #3
2120: 607b str r3, [r7, #4]
hri_usbhost_write_PCFG_reg(drv->hw, phy, cfg);
2122: 6823 ldr r3, [r4, #0]
2124: 9a01 ldr r2, [sp, #4]
2126: 441a add r2, r3
2128: fa5f f888 uxtb.w r8, r8
((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg = data;
212c: f882 8100 strb.w r8, [r2, #256] ; 0x100
((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg = data;
2130: f882 b103 strb.w fp, [r2, #259] ; 0x103
if (p->type == 0 /* Control */) {
2134: f1ba 0f00 cmp.w sl, #0
2138: d102 bne.n 2140 <_usb_h_handler+0x574>
p->x.general.state = USB_H_PIPE_S_SETUP;
213a: 2303 movs r3, #3
213c: f885 3026 strb.w r3, [r5, #38] ; 0x26
_usb_h_end_transfer(p, USB_H_RESET);
2140: 4b1f ldr r3, [pc, #124] ; (21c0 <_usb_h_handler+0x5f4>)
2142: f06f 0106 mvn.w r1, #6
2146: 4628 mov r0, r5
2148: 4798 blx r3
for (i = 0; i < pd->pipe_pool_size; i++) {
214a: 3601 adds r6, #1
214c: e79c b.n 2088 <_usb_h_handler+0x4bc>
| (type == 0 /* CTRL */ ? 0 : (dir ? USB_HOST_PCFG_PTOKEN(1) : USB_HOST_PCFG_PTOKEN(2)));
214e: 46d0 mov r8, sl
2150: e7ce b.n 20f0 <_usb_h_handler+0x524>
} else if (isr & imr & USB_HOST_INTFLAG_DDISC) {
2152: ea05 0601 and.w r6, r5, r1
2156: f416 7200 ands.w r2, r6, #512 ; 0x200
215a: d014 beq.n 2186 <_usb_h_handler+0x5ba>
((Usb *)hw)->HOST.INTFLAG.reg = mask;
215c: f44f 7240 mov.w r2, #768 ; 0x300
2160: 839a strh r2, [r3, #28]
((Usb *)hw)->HOST.INTENCLR.reg = mask;
2162: f44f 721c mov.w r2, #624 ; 0x270
2166: 829a strh r2, [r3, #20]
((Usb *)hw)->HOST.CTRLB.reg &= ~USB_HOST_CTRLB_BUSRESET;
2168: 8919 ldrh r1, [r3, #8]
216a: f421 7100 bic.w r1, r1, #512 ; 0x200
216e: 0409 lsls r1, r1, #16
((Usb *)hw)->HOST.INTFLAG.reg = mask;
2170: f44f 72b8 mov.w r2, #368 ; 0x170
((Usb *)hw)->HOST.CTRLB.reg &= ~USB_HOST_CTRLB_BUSRESET;
2174: 0c09 lsrs r1, r1, #16
2176: 8119 strh r1, [r3, #8]
((Usb *)hw)->HOST.INTFLAG.reg = mask;
2178: 839a strh r2, [r3, #28]
((Usb *)hw)->HOST.INTENSET.reg = mask;
217a: 831a strh r2, [r3, #24]
pd->suspend_start = 0;
217c: f8a9 0086 strh.w r0, [r9, #134] ; 0x86
drv->rh_cb(drv, 1, 0); /* PORT_CONNECTION: connect status changed */
2180: 6963 ldr r3, [r4, #20]
2182: 4602 mov r2, r0
2184: e715 b.n 1fb2 <_usb_h_handler+0x3e6>
} else if (isr & imr & USB_HOST_INTFLAG_DCONN) {
2186: 05f7 lsls r7, r6, #23
2188: d51c bpl.n 21c4 <_usb_h_handler+0x5f8>
((Usb *)hw)->HOST.INTENCLR.reg = mask;
218a: f44f 7180 mov.w r1, #256 ; 0x100
218e: 8299 strh r1, [r3, #20]
((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_DDISC;
2190: f44f 7100 mov.w r1, #512 ; 0x200
2194: 8399 strh r1, [r3, #28]
((Usb *)hw)->HOST.INTENSET.reg = mask;
2196: 8319 strh r1, [r3, #24]
((Usb *)hw)->HOST.CTRLB.reg |= USB_HOST_CTRLB_SOFE;
2198: 8919 ldrh r1, [r3, #8]
219a: b289 uxth r1, r1
219c: f441 7180 orr.w r1, r1, #256 ; 0x100
21a0: 8119 strh r1, [r3, #8]
pd->suspend_start = 0;
21a2: f8a9 2086 strh.w r2, [r9, #134] ; 0x86
drv->rh_cb(drv, 1, 0); /* PORT_CONNECTION: connect status changed */
21a6: 6963 ldr r3, [r4, #20]
21a8: e703 b.n 1fb2 <_usb_h_handler+0x3e6>
21aa: bf00 nop
21ac: 00004f6c .word 0x00004f6c
21b0: 00002939 .word 0x00002939
21b4: 000017cd .word 0x000017cd
21b8: 00001b75 .word 0x00001b75
21bc: 00001749 .word 0x00001749
21c0: 00001b19 .word 0x00001b19
if ((isr & USB_HOST_INTFLAG_WAKEUP) && (imr & USB_HOST_INTFLAG_DCONN)) {
21c4: 06e8 lsls r0, r5, #27
21c6: d508 bpl.n 21da <_usb_h_handler+0x60e>
21c8: 05ca lsls r2, r1, #23
21ca: d506 bpl.n 21da <_usb_h_handler+0x60e>
((Usb *)hw)->HOST.INTFLAG.reg = mask;
21cc: 2210 movs r2, #16
21ce: 839a strh r2, [r3, #28]
CONF_USB_H_VBUS_CTRL_FUNC(drv, 1, true);
21d0: 2201 movs r2, #1
21d2: 4b15 ldr r3, [pc, #84] ; (2228 <_usb_h_handler+0x65c>)
21d4: 4611 mov r1, r2
21d6: 4620 mov r0, r4
21d8: 4798 blx r3
if (isr & imr & (USB_HOST_INTFLAG_WAKEUP | USB_HOST_INTFLAG_UPRSM | USB_HOST_INTFLAG_DNRSM)) {
21da: f016 0f70 tst.w r6, #112 ; 0x70
hri_usbhost_clear_INTFLAG_reg(drv->hw,
21de: 6823 ldr r3, [r4, #0]
if (isr & imr & (USB_HOST_INTFLAG_WAKEUP | USB_HOST_INTFLAG_UPRSM | USB_HOST_INTFLAG_DNRSM)) {
21e0: d013 beq.n 220a <_usb_h_handler+0x63e>
21e2: 2270 movs r2, #112 ; 0x70
21e4: 839a strh r2, [r3, #28]
((Usb *)hw)->HOST.INTENCLR.reg = mask;
21e6: 829a strh r2, [r3, #20]
((Usb *)hw)->HOST.INTENSET.reg = mask;
21e8: f44f 7202 mov.w r2, #520 ; 0x208
21ec: 831a strh r2, [r3, #24]
((Usb *)hw)->HOST.CTRLB.reg |= USB_HOST_CTRLB_SOFE;
21ee: 891a ldrh r2, [r3, #8]
21f0: b292 uxth r2, r2
21f2: f442 7280 orr.w r2, r2, #256 ; 0x100
21f6: 811a strh r2, [r3, #8]
pd->resume_start = 50;
21f8: 2332 movs r3, #50 ; 0x32
21fa: f889 3087 strb.w r3, [r9, #135] ; 0x87
_usb_h_add_sof_user(drv);
21fe: 4b0b ldr r3, [pc, #44] ; (222c <_usb_h_handler+0x660>)
2200: 4620 mov r0, r4
}
2202: b003 add sp, #12
2204: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
_usb_h_add_sof_user(drv);
2208: 4718 bx r3
((Usb *)hw)->HOST.INTFLAG.reg = mask;
220a: 839d strh r5, [r3, #28]
}
220c: e5d4 b.n 1db8 <_usb_h_handler+0x1ec>
if (full || shortpkt) {
220e: f1bc 0f00 cmp.w ip, #0
2212: d102 bne.n 221a <_usb_h_handler+0x64e>
2214: 45ca cmp sl, r9
2216: f67f ae2c bls.w 1e72 <_usb_h_handler+0x2a6>
_usb_h_end_transfer(pipe, USB_H_OK);
221a: 2100 movs r1, #0
221c: e552 b.n 1cc4 <_usb_h_handler+0xf8>
if (full || shortpkt) {
221e: 45ca cmp sl, r9
2220: f63f ad90 bhi.w 1d44 <_usb_h_handler+0x178>
2224: e625 b.n 1e72 <_usb_h_handler+0x2a6>
2226: bf00 nop
2228: 00003a61 .word 0x00003a61
222c: 00001769 .word 0x00001769
00002230 <_usb_h_rh_reset>:
Usb *hw = (Usb *)drv->hw;
2230: 6802 ldr r2, [r0, #0]
((Usb *)hw)->HOST.CTRLB.reg |= USB_HOST_CTRLB_BUSRESET;
2232: 8913 ldrh r3, [r2, #8]
2234: b29b uxth r3, r3
2236: f443 7300 orr.w r3, r3, #512 ; 0x200
223a: 8113 strh r3, [r2, #8]
}
223c: 4770 bx lr
0000223e <_usb_h_rh_check_status>:
{
223e: b510 push {r4, lr}
Usb * hw = (Usb *)drv->hw;
2240: 6804 ldr r4, [r0, #0]
return ((Usb *)hw)->HOST.CTRLB.reg;
2242: 8921 ldrh r1, [r4, #8]
USB_CRITICAL_SECTION_LEAVE();
}
static inline hri_usbhost_status_reg_t hri_usbhost_read_STATUS_reg(const void *const hw)
{
return ((Usb *)hw)->HOST.STATUS.reg;
2244: 7b23 ldrb r3, [r4, #12]
return ((Usb *)hw)->HOST.INTFLAG.reg;
2246: 8ba4 ldrh r4, [r4, #28]
return ((Usb *)hw)->HOST.CTRLB.reg;
2248: b289 uxth r1, r1
return ((Usb *)hw)->HOST.STATUS.reg;
224a: b2db uxtb r3, r3
return ((Usb *)hw)->HOST.INTFLAG.reg;
224c: b2a4 uxth r4, r4
switch (ftr) {
224e: 2a09 cmp r2, #9
2250: d81e bhi.n 2290 <_usb_h_rh_check_status+0x52>
2252: e8df f002 tbb [pc, r2]
2256: 0505 .short 0x0505
2258: 1d161d0d .word 0x1d161d0d
225c: 19051d1d .word 0x19051d1d
return (intflag & (USB_HOST_INTFLAG_DDISC | USB_HOST_INTFLAG_DCONN)) == USB_HOST_INTFLAG_DCONN;
2260: f404 7040 and.w r0, r4, #768 ; 0x300
2264: f5b0 7f80 cmp.w r0, #256 ; 0x100
return (status & USB_HOST_STATUS_SPEED_Msk) == USB_HOST_STATUS_SPEED(2);
2268: bf14 ite ne
226a: 2000 movne r0, #0
226c: 2001 moveq r0, #1
226e: e007 b.n 2280 <_usb_h_rh_check_status+0x42>
if (pd->suspend_start) {
2270: 6843 ldr r3, [r0, #4]
2272: f993 3086 ldrsb.w r3, [r3, #134] ; 0x86
2276: b96b cbnz r3, 2294 <_usb_h_rh_check_status+0x56>
return !(ctrlb & USB_HOST_CTRLB_SOFE);
2278: f481 7080 eor.w r0, r1, #256 ; 0x100
227c: f3c0 2000 ubfx r0, r0, #8, #1
}
2280: bd10 pop {r4, pc}
return (ctrlb & USB_HOST_CTRLB_BUSRESET);
2282: f3c1 2040 ubfx r0, r1, #9, #1
2286: e7fb b.n 2280 <_usb_h_rh_check_status+0x42>
return (status & USB_HOST_STATUS_SPEED_Msk) == USB_HOST_STATUS_SPEED(2);
2288: f003 000c and.w r0, r3, #12
228c: 2808 cmp r0, #8
228e: e7eb b.n 2268 <_usb_h_rh_check_status+0x2a>
2290: 2000 movs r0, #0
2292: e7f5 b.n 2280 <_usb_h_rh_check_status+0x42>
return true;
2294: 2001 movs r0, #1
2296: e7f3 b.n 2280 <_usb_h_rh_check_status+0x42>
00002298 <_usb_h_pipe_allocate>:
{
2298: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
229c: b087 sub sp, #28
uint8_t n_bank = ((max_pkt_size >> 11) & 0x3) + 1;
229e: f3c3 26c1 ubfx r6, r3, #11, #2
uint16_t mps = max_pkt_size & 0x3FF;
22a2: f3c3 0309 ubfx r3, r3, #0, #10
22a6: 9301 str r3, [sp, #4]
{
22a8: f89d a040 ldrb.w sl, [sp, #64] ; 0x40
22ac: 9100 str r1, [sp, #0]
22ae: 4607 mov r7, r0
uint8_t n_bank = ((max_pkt_size >> 11) & 0x3) + 1;
22b0: 3601 adds r6, #1
uint16_t actual_mps = psize_2_size[_usb_h_get_psize(mps)];
22b2: 4618 mov r0, r3
22b4: 4b81 ldr r3, [pc, #516] ; (24bc <_usb_h_pipe_allocate+0x224>)
{
22b6: f89d 9044 ldrb.w r9, [sp, #68] ; 0x44
22ba: f89d 5048 ldrb.w r5, [sp, #72] ; 0x48
22be: f89d b04c ldrb.w fp, [sp, #76] ; 0x4c
22c2: 4690 mov r8, r2
uint16_t actual_mps = psize_2_size[_usb_h_get_psize(mps)];
22c4: 4798 blx r3
22c6: 4b7d ldr r3, [pc, #500] ; (24bc <_usb_h_pipe_allocate+0x224>)
22c8: 9303 str r3, [sp, #12]
if (n_bank > 1) {
22ca: 2e01 cmp r6, #1
uint8_t type = attr & 0x3;
22cc: f00a 0403 and.w r4, sl, #3
if (n_bank > 1) {
22d0: d007 beq.n 22e2 <_usb_h_pipe_allocate+0x4a>
if (type != 1 /*ISO*/ && type != 3 /*INT*/) {
22d2: f01a 0201 ands.w r2, sl, #1
22d6: f000 80d8 beq.w 248a <_usb_h_pipe_allocate+0x1f2>
if (n_bank > 3 || mps > 1024) {
22da: 2e04 cmp r6, #4
22dc: d108 bne.n 22f0 <_usb_h_pipe_allocate+0x58>
return NULL; /* Invalid argument */
22de: 2200 movs r2, #0
22e0: e0d3 b.n 248a <_usb_h_pipe_allocate+0x1f2>
if (!minimum_rsc && (type == 2 /* Bulk */ || type == 1 /* ISO */)) {
22e2: f1bb 0f00 cmp.w fp, #0
22e6: d103 bne.n 22f0 <_usb_h_pipe_allocate+0x58>
22e8: 1e63 subs r3, r4, #1
n_bank = 2;
22ea: 2b01 cmp r3, #1
22ec: bf98 it ls
22ee: 2602 movls r6, #2
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)drv->prvt;
22f0: 687b ldr r3, [r7, #4]
22f2: 9302 str r3, [sp, #8]
uint16_t actual_mps = psize_2_size[_usb_h_get_psize(mps)];
22f4: 4b72 ldr r3, [pc, #456] ; (24c0 <_usb_h_pipe_allocate+0x228>)
22f6: f833 a010 ldrh.w sl, [r3, r0, lsl #1]
atomic_enter_critical(&flags);
22fa: 4b72 ldr r3, [pc, #456] ; (24c4 <_usb_h_pipe_allocate+0x22c>)
22fc: a805 add r0, sp, #20
22fe: 4798 blx r3
if (_usb_h_find_pipe(drv, dev, ep) >= 0) {
2300: 6878 ldr r0, [r7, #4]
for (i = 0; i < pd->pipe_pool_size; i++) {
2302: f890 108a ldrb.w r1, [r0, #138] ; 0x8a
2306: 2200 movs r2, #0
if (pd->pipe_pool[i].x.general.state == USB_H_PIPE_S_FREE) {
2308: f04f 0e28 mov.w lr, #40 ; 0x28
for (i = 0; i < pd->pipe_pool_size; i++) {
230c: b2d3 uxtb r3, r2
230e: 4299 cmp r1, r3
2310: d913 bls.n 233a <_usb_h_pipe_allocate+0xa2>
if (pd->pipe_pool[i].x.general.state == USB_H_PIPE_S_FREE) {
2312: f8d0 3080 ldr.w r3, [r0, #128] ; 0x80
2316: fb0e 3b02 mla fp, lr, r2, r3
231a: f89b c026 ldrb.w ip, [fp, #38] ; 0x26
231e: f1bc 0f00 cmp.w ip, #0
2322: d024 beq.n 236e <_usb_h_pipe_allocate+0xd6>
if (pd->pipe_pool[i].dev == dev && pd->pipe_pool[i].ep == ep) {
2324: f89b c00e ldrb.w ip, [fp, #14]
2328: 9b00 ldr r3, [sp, #0]
232a: 459c cmp ip, r3
232c: d11f bne.n 236e <_usb_h_pipe_allocate+0xd6>
232e: f89b 300f ldrb.w r3, [fp, #15]
2332: 4543 cmp r3, r8
2334: d11b bne.n 236e <_usb_h_pipe_allocate+0xd6>
if (_usb_h_find_pipe(drv, dev, ep) >= 0) {
2336: 0613 lsls r3, r2, #24
2338: d515 bpl.n 2366 <_usb_h_pipe_allocate+0xce>
233a: 2300 movs r3, #0
if (pd->pipe_pool[i].x.general.state != USB_H_PIPE_S_FREE) {
233c: f04f 0c28 mov.w ip, #40 ; 0x28
for (i = start_i; i < pd->pipe_pool_size; i++) {
2340: b2da uxtb r2, r3
2342: 4291 cmp r1, r2
2344: d90f bls.n 2366 <_usb_h_pipe_allocate+0xce>
if (pd->pipe_pool[i].x.general.state != USB_H_PIPE_S_FREE) {
2346: f8d0 2080 ldr.w r2, [r0, #128] ; 0x80
234a: fb0c 2b03 mla fp, ip, r3, r2
234e: f103 0e01 add.w lr, r3, #1
2352: f89b b026 ldrb.w fp, [fp, #38] ; 0x26
2356: f1bb 0f00 cmp.w fp, #0
235a: d10a bne.n 2372 <_usb_h_pipe_allocate+0xda>
return i;
235c: fa4f fb83 sxtb.w fp, r3
if (pipe < 0) {
2360: f1bb 0f00 cmp.w fp, #0
2364: da07 bge.n 2376 <_usb_h_pipe_allocate+0xde>
atomic_leave_critical(&flags);
2366: 4b58 ldr r3, [pc, #352] ; (24c8 <_usb_h_pipe_allocate+0x230>)
2368: a805 add r0, sp, #20
236a: 4798 blx r3
return NULL;
236c: e7b7 b.n 22de <_usb_h_pipe_allocate+0x46>
for (i = 0; i < pd->pipe_pool_size; i++) {
236e: 3201 adds r2, #1
2370: e7cc b.n 230c <_usb_h_pipe_allocate+0x74>
2372: 4673 mov r3, lr
2374: e7e4 b.n 2340 <_usb_h_pipe_allocate+0xa8>
if (pipe == 0) {
2376: d10c bne.n 2392 <_usb_h_pipe_allocate+0xfa>
if (ep == 0) {
2378: f1b8 0f00 cmp.w r8, #0
237c: d006 beq.n 238c <_usb_h_pipe_allocate+0xf4>
for (i = start_i; i < pd->pipe_pool_size; i++) {
237e: 2301 movs r3, #1
2380: 4299 cmp r1, r3
2382: f040 8086 bne.w 2492 <_usb_h_pipe_allocate+0x1fa>
return -1;
2386: f04f 3bff mov.w fp, #4294967295 ; 0xffffffff
238a: e002 b.n 2392 <_usb_h_pipe_allocate+0xfa>
if (mps > 64) {
238c: 9b01 ldr r3, [sp, #4]
238e: 2b40 cmp r3, #64 ; 0x40
2390: d8e9 bhi.n 2366 <_usb_h_pipe_allocate+0xce>
p = &pd->pipe_pool[pipe];
2392: 9a02 ldr r2, [sp, #8]
2394: f8d2 1080 ldr.w r1, [r2, #128] ; 0x80
2398: eb0b 038b add.w r3, fp, fp, lsl #2
239c: eb01 02c3 add.w r2, r1, r3, lsl #3
p->hcd = drv;
23a0: f841 7033 str.w r7, [r1, r3, lsl #3]
p->x.general.state = USB_H_PIPE_S_CFG;
23a4: 2301 movs r3, #1
23a6: f882 3026 strb.w r3, [r2, #38] ; 0x26
atomic_leave_critical(&flags);
23aa: a805 add r0, sp, #20
23ac: 4b46 ldr r3, [pc, #280] ; (24c8 <_usb_h_pipe_allocate+0x230>)
p->x.general.state = USB_H_PIPE_S_CFG;
23ae: 9201 str r2, [sp, #4]
atomic_leave_critical(&flags);
23b0: 4798 blx r3
p->dev = dev;
23b2: e9dd 3200 ldrd r3, r2, [sp]
23b6: 7393 strb r3, [r2, #14]
p->bank = n_bank;
23b8: 00ab lsls r3, r5, #2
23ba: 7cd1 ldrb r1, [r2, #19]
p->ep = ep;
23bc: f882 800f strb.w r8, [r2, #15]
p->bank = n_bank;
23c0: f003 030c and.w r3, r3, #12
23c4: 4333 orrs r3, r6
23c6: f003 031f and.w r3, r3, #31
23ca: f021 011f bic.w r1, r1, #31
23ce: 430b orrs r3, r1
if (speed == USB_SPEED_HS && (type == 0x01 /* ISO */ || type == 0x11 /* INT */)) {
23d0: 2d02 cmp r5, #2
p->max_pkt_size = actual_mps;
23d2: f8a2 a00c strh.w sl, [r2, #12]
p->type = attr & 0x3;
23d6: 7454 strb r4, [r2, #17]
p->bank = n_bank;
23d8: 74d3 strb r3, [r2, #19]
if (speed == USB_SPEED_HS && (type == 0x01 /* ISO */ || type == 0x11 /* INT */)) {
23da: d164 bne.n 24a6 <_usb_h_pipe_allocate+0x20e>
23dc: 2c01 cmp r4, #1
23de: d162 bne.n 24a6 <_usb_h_pipe_allocate+0x20e>
return (2 << (interval - 1));
23e0: f1b9 0f10 cmp.w r9, #16
23e4: bf28 it cs
23e6: f04f 0910 movcs.w r9, #16
23ea: f109 39ff add.w r9, r9, #4294967295 ; 0xffffffff
23ee: fa05 f509 lsl.w r5, r5, r9
p->interval = (ms > 0xFF) ? 0xFF : (uint8_t)ms;
23f2: b2ad uxth r5, r5
23f4: 2dff cmp r5, #255 ; 0xff
23f6: bf28 it cs
23f8: 25ff movcs r5, #255 ; 0xff
23fa: 7415 strb r5, [r2, #16]
p->toggle = 0;
23fc: 8a53 ldrh r3, [r2, #18]
if (_usb_h_pipe_configure(drv, pipe, p->dev, p->ep, p->type, p->max_pkt_size, p->bank, p->interval, p->speed)) {
23fe: 7c15 ldrb r5, [r2, #16]
p->toggle = 0;
2400: f423 4381 bic.w r3, r3, #16512 ; 0x4080
2404: f023 037f bic.w r3, r3, #127 ; 0x7f
uint32_t cfg = USB_HOST_PCFG_PTYPE(type + 1) | (n_bank == 1 ? 0 : USB_HOST_PCFG_BK)
2408: 2e01 cmp r6, #1
p->toggle = 0;
240a: 8253 strh r3, [r2, #18]
uint32_t cfg = USB_HOST_PCFG_PTYPE(type + 1) | (n_bank == 1 ? 0 : USB_HOST_PCFG_BK)
240c: bf08 it eq
240e: 2100 moveq r1, #0
2410: f104 0301 add.w r3, r4, #1
2414: bf18 it ne
2416: 2104 movne r1, #4
if (_usb_h_pipe_configure(drv, pipe, p->dev, p->ep, p->type, p->max_pkt_size, p->bank, p->interval, p->speed)) {
2418: fa5f fb8b uxtb.w fp, fp
uint32_t cfg = USB_HOST_PCFG_PTYPE(type + 1) | (n_bank == 1 ? 0 : USB_HOST_PCFG_BK)
241c: ea41 03c3 orr.w r3, r1, r3, lsl #3
| (type == 0 /* CTRL */ ? 0 : (dir ? USB_HOST_PCFG_PTOKEN(1) : USB_HOST_PCFG_PTOKEN(2)));
2420: b124 cbz r4, 242c <_usb_h_pipe_allocate+0x194>
2422: f018 0f80 tst.w r8, #128 ; 0x80
2426: bf14 ite ne
2428: 2401 movne r4, #1
242a: 2402 moveq r4, #2
uint32_t cfg = USB_HOST_PCFG_PTYPE(type + 1) | (n_bank == 1 ? 0 : USB_HOST_PCFG_BK)
242c: 431c orrs r4, r3
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)drv->prvt;
242e: 687b ldr r3, [r7, #4]
pd->desc_table[phy].HostDescBank[0].CTRL_PIPE.bit.PDADDR = dev;
2430: 9201 str r2, [sp, #4]
2432: eb03 194b add.w r9, r3, fp, lsl #5
2436: 9a00 ldr r2, [sp, #0]
2438: f8b9 100c ldrh.w r1, [r9, #12]
243c: f362 0106 bfi r1, r2, #0, #7
2440: f8a9 100c strh.w r1, [r9, #12]
pd->desc_table[phy].HostDescBank[0].CTRL_PIPE.bit.PEPNUM = ep & 0xF;
2444: f8b9 100c ldrh.w r1, [r9, #12]
2448: f368 210b bfi r1, r8, #8, #4
244c: f8a9 100c strh.w r1, [r9, #12]
pd->desc_table[phy].HostDescBank[0].PCKSIZE.bit.SIZE = _usb_h_get_psize(size);
2450: 9b03 ldr r3, [sp, #12]
2452: 4650 mov r0, sl
2454: 4798 blx r3
2456: f8d9 3004 ldr.w r3, [r9, #4]
245a: f360 731e bfi r3, r0, #28, #3
245e: f8c9 3004 str.w r3, [r9, #4]
hri_usbhost_write_PCFG_reg(drv->hw, phy, cfg);
2462: 683b ldr r3, [r7, #0]
p->x.general.status = 0;
2464: 9a01 ldr r2, [sp, #4]
2466: eb03 1b4b add.w fp, r3, fp, lsl #5
246a: 2100 movs r1, #0
hri_usbhost_write_PCFG_reg(drv->hw, phy, cfg);
246c: b2e4 uxtb r4, r4
((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg = data;
246e: f88b 4100 strb.w r4, [fp, #256] ; 0x100
p->x.general.state = USB_H_PIPE_S_IDLE;
2472: 2302 movs r3, #2
((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg = data;
2474: f88b 5103 strb.w r5, [fp, #259] ; 0x103
p->x.general.status = 0;
2478: f882 1027 strb.w r1, [r2, #39] ; 0x27
((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = mask;
247c: 212c movs r1, #44 ; 0x2c
247e: f88b 1108 strb.w r1, [fp, #264] ; 0x108
((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = mask;
2482: f88b 1109 strb.w r1, [fp, #265] ; 0x109
p->x.general.state = USB_H_PIPE_S_IDLE;
2486: f882 3026 strb.w r3, [r2, #38] ; 0x26
}
248a: 4610 mov r0, r2
248c: b007 add sp, #28
248e: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
if (pd->pipe_pool[i].x.general.state != USB_H_PIPE_S_FREE) {
2492: f892 004e ldrb.w r0, [r2, #78] ; 0x4e
2496: 3228 adds r2, #40 ; 0x28
2498: b110 cbz r0, 24a0 <_usb_h_pipe_allocate+0x208>
for (i = start_i; i < pd->pipe_pool_size; i++) {
249a: 3301 adds r3, #1
249c: b2db uxtb r3, r3
249e: e76f b.n 2380 <_usb_h_pipe_allocate+0xe8>
return i;
24a0: fa4f fb83 sxtb.w fp, r3
24a4: e775 b.n 2392 <_usb_h_pipe_allocate+0xfa>
if (type == 0x02 /* Bulk */ && interval < 1) {
24a6: 2c02 cmp r4, #2
24a8: d105 bne.n 24b6 <_usb_h_pipe_allocate+0x21e>
24aa: f1b9 0f00 cmp.w r9, #0
24ae: d102 bne.n 24b6 <_usb_h_pipe_allocate+0x21e>
p->interval = 1;
24b0: 2301 movs r3, #1
24b2: 7413 strb r3, [r2, #16]
24b4: e7a2 b.n 23fc <_usb_h_pipe_allocate+0x164>
p->interval = interval;
24b6: f882 9010 strb.w r9, [r2, #16]
24ba: e79f b.n 23fc <_usb_h_pipe_allocate+0x164>
24bc: 00001749 .word 0x00001749
24c0: 00004f82 .word 0x00004f82
24c4: 00003efd .word 0x00003efd
24c8: 00003f0b .word 0x00003f0b
000024cc <_usb_h_pipe_free>:
{
24cc: b537 push {r0, r1, r2, r4, r5, lr}
ASSERT(pipe && pipe->hcd && pipe->hcd->hw && pipe->hcd->prvt);
24ce: 4605 mov r5, r0
24d0: b138 cbz r0, 24e2 <_usb_h_pipe_free+0x16>
24d2: 6803 ldr r3, [r0, #0]
24d4: b1ab cbz r3, 2502 <_usb_h_pipe_free+0x36>
24d6: 6818 ldr r0, [r3, #0]
24d8: b118 cbz r0, 24e2 <_usb_h_pipe_free+0x16>
24da: 6858 ldr r0, [r3, #4]
24dc: 3800 subs r0, #0
24de: bf18 it ne
24e0: 2001 movne r0, #1
24e2: 4916 ldr r1, [pc, #88] ; (253c <_usb_h_pipe_free+0x70>)
24e4: 4b16 ldr r3, [pc, #88] ; (2540 <_usb_h_pipe_free+0x74>)
24e6: f240 427a movw r2, #1146 ; 0x47a
24ea: 4798 blx r3
atomic_enter_critical(&flags);
24ec: 4b15 ldr r3, [pc, #84] ; (2544 <_usb_h_pipe_free+0x78>)
24ee: a801 add r0, sp, #4
24f0: 4798 blx r3
if (pipe->x.general.state == USB_H_PIPE_S_FREE) {
24f2: f895 4026 ldrb.w r4, [r5, #38] ; 0x26
24f6: 4b14 ldr r3, [pc, #80] ; (2548 <_usb_h_pipe_free+0x7c>)
24f8: b92c cbnz r4, 2506 <_usb_h_pipe_free+0x3a>
atomic_leave_critical(&flags);
24fa: a801 add r0, sp, #4
24fc: 4798 blx r3
return USB_H_OK;
24fe: 4620 mov r0, r4
2500: e007 b.n 2512 <_usb_h_pipe_free+0x46>
ASSERT(pipe && pipe->hcd && pipe->hcd->hw && pipe->hcd->prvt);
2502: 4618 mov r0, r3
2504: e7ed b.n 24e2 <_usb_h_pipe_free+0x16>
} else if (pipe->x.general.state != USB_H_PIPE_S_IDLE) {
2506: 2c02 cmp r4, #2
2508: d005 beq.n 2516 <_usb_h_pipe_free+0x4a>
atomic_leave_critical(&flags);
250a: a801 add r0, sp, #4
250c: 4798 blx r3
return USB_H_BUSY;
250e: f06f 0003 mvn.w r0, #3
}
2512: b003 add sp, #12
2514: bd30 pop {r4, r5, pc}
pipe->x.general.state = USB_H_PIPE_S_CFG;
2516: 2201 movs r2, #1
2518: f885 2026 strb.w r2, [r5, #38] ; 0x26
atomic_leave_critical(&flags);
251c: a801 add r0, sp, #4
251e: 4798 blx r3
pi = _usb_h_pipe_i(pipe);
2520: 4b0a ldr r3, [pc, #40] ; (254c <_usb_h_pipe_free+0x80>)
2522: 4628 mov r0, r5
2524: 4798 blx r3
hri_usbhost_write_PCFG_reg(pipe->hcd->hw, pi, USB_HOST_PCFG_PTYPE(0));
2526: 682b ldr r3, [r5, #0]
((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg = data;
2528: b2c0 uxtb r0, r0
252a: 3008 adds r0, #8
252c: 681b ldr r3, [r3, #0]
252e: 0140 lsls r0, r0, #5
2530: 2400 movs r4, #0
2532: 541c strb r4, [r3, r0]
pipe->x.general.state = USB_H_PIPE_S_FREE;
2534: f885 4026 strb.w r4, [r5, #38] ; 0x26
2538: e7e1 b.n 24fe <_usb_h_pipe_free+0x32>
253a: bf00 nop
253c: 00004f6c .word 0x00004f6c
2540: 00002939 .word 0x00002939
2544: 00003efd .word 0x00003efd
2548: 00003f0b .word 0x00003f0b
254c: 0000177d .word 0x0000177d
00002550 <_usb_h_pipe_set_control_param>:
{
2550: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
2554: 4688 mov r8, r1
2556: b087 sub sp, #28
2558: 4691 mov r9, r2
255a: 461f mov r7, r3
uint8_t epn = ep & 0xF;
255c: f002 0b0f and.w fp, r2, #15
ASSERT(pipe && pipe->hcd && pipe->hcd->hw && pipe->hcd->prvt);
2560: 4604 mov r4, r0
2562: b138 cbz r0, 2574 <_usb_h_pipe_set_control_param+0x24>
2564: 6803 ldr r3, [r0, #0]
2566: b1db cbz r3, 25a0 <_usb_h_pipe_set_control_param+0x50>
2568: 6818 ldr r0, [r3, #0]
256a: b118 cbz r0, 2574 <_usb_h_pipe_set_control_param+0x24>
256c: 6858 ldr r0, [r3, #4]
256e: 3800 subs r0, #0
2570: bf18 it ne
2572: 2001 movne r0, #1
2574: 493b ldr r1, [pc, #236] ; (2664 <_usb_h_pipe_set_control_param+0x114>)
2576: 4b3c ldr r3, [pc, #240] ; (2668 <_usb_h_pipe_set_control_param+0x118>)
2578: f240 429c movw r2, #1180 ; 0x49c
257c: 4798 blx r3
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)pipe->hcd->prvt;
257e: 6823 ldr r3, [r4, #0]
atomic_enter_critical(&flags);
2580: a805 add r0, sp, #20
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)pipe->hcd->prvt;
2582: f8d3 a004 ldr.w sl, [r3, #4]
atomic_enter_critical(&flags);
2586: 4b39 ldr r3, [pc, #228] ; (266c <_usb_h_pipe_set_control_param+0x11c>)
2588: 4798 blx r3
if (pipe->x.general.state == USB_H_PIPE_S_FREE) {
258a: f894 6026 ldrb.w r6, [r4, #38] ; 0x26
258e: 4b38 ldr r3, [pc, #224] ; (2670 <_usb_h_pipe_set_control_param+0x120>)
2590: b946 cbnz r6, 25a4 <_usb_h_pipe_set_control_param+0x54>
atomic_leave_critical(&flags);
2592: a805 add r0, sp, #20
2594: 4798 blx r3
return USB_H_ERR_NOT_INIT;
2596: f06f 0013 mvn.w r0, #19
}
259a: b007 add sp, #28
259c: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
ASSERT(pipe && pipe->hcd && pipe->hcd->hw && pipe->hcd->prvt);
25a0: 4618 mov r0, r3
25a2: e7e7 b.n 2574 <_usb_h_pipe_set_control_param+0x24>
if (pipe->x.general.state != USB_H_PIPE_S_IDLE) {
25a4: 2e02 cmp r6, #2
25a6: d004 beq.n 25b2 <_usb_h_pipe_set_control_param+0x62>
atomic_leave_critical(&flags);
25a8: a805 add r0, sp, #20
25aa: 4798 blx r3
return USB_H_BUSY;
25ac: f06f 0003 mvn.w r0, #3
25b0: e7f3 b.n 259a <_usb_h_pipe_set_control_param+0x4a>
pipe->x.general.state = USB_H_PIPE_S_CFG;
25b2: 2201 movs r2, #1
25b4: f884 2026 strb.w r2, [r4, #38] ; 0x26
atomic_leave_critical(&flags);
25b8: a805 add r0, sp, #20
25ba: 4798 blx r3
pi = _usb_h_pipe_i(pipe);
25bc: 4b2d ldr r3, [pc, #180] ; (2674 <_usb_h_pipe_set_control_param+0x124>)
25be: 4620 mov r0, r4
25c0: 4798 blx r3
cfg = hri_usbhost_read_PCFG_reg(pipe->hcd->hw, pi);
25c2: 6821 ldr r1, [r4, #0]
return ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg;
25c4: b2c3 uxtb r3, r0
25c6: f103 0008 add.w r0, r3, #8
25ca: 680a ldr r2, [r1, #0]
25cc: 0140 lsls r0, r0, #5
if (size < max_pkt_size) {
25ce: 2f40 cmp r7, #64 ; 0x40
25d0: 5c10 ldrb r0, [r2, r0]
25d2: b2c0 uxtb r0, r0
25d4: d904 bls.n 25e0 <_usb_h_pipe_set_control_param+0x90>
pipe->x.general.state = USB_H_PIPE_S_IDLE;
25d6: f884 6026 strb.w r6, [r4, #38] ; 0x26
return USB_H_ERR_ARG;
25da: f06f 000c mvn.w r0, #12
25de: e7dc b.n 259a <_usb_h_pipe_set_control_param+0x4a>
if ((cfg & USB_HOST_PCFG_PTYPE_Msk) != USB_HOST_PCFG_PTYPE(1)) {
25e0: f000 0038 and.w r0, r0, #56 ; 0x38
25e4: 2808 cmp r0, #8
25e6: d004 beq.n 25f2 <_usb_h_pipe_set_control_param+0xa2>
pipe->x.general.state = USB_H_PIPE_S_IDLE;
25e8: f884 6026 strb.w r6, [r4, #38] ; 0x26
return USB_H_ERR_UNSP_OP;
25ec: f06f 001a mvn.w r0, #26
25f0: e7d3 b.n 259a <_usb_h_pipe_set_control_param+0x4a>
hri_usbhostdescriptor_write_PCKSIZE_SIZE_bf(pd->desc_table, 0, _usb_h_get_psize(max_pkt_size));
25f2: 4d21 ldr r5, [pc, #132] ; (2678 <_usb_h_pipe_set_control_param+0x128>)
25f4: 9101 str r1, [sp, #4]
25f6: 4638 mov r0, r7
25f8: e9cd 2302 strd r2, r3, [sp, #8]
25fc: 47a8 blx r5
tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg;
25fe: f8da 5004 ldr.w r5, [sl, #4]
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)drv->prvt;
2602: 9901 ldr r1, [sp, #4]
pd->desc_table[pipe].HostDescBank[0].CTRL_PIPE.bit.PDADDR = dev_addr;
2604: 9b03 ldr r3, [sp, #12]
tmp |= USB_HOST_PCKSIZE_SIZE(data);
2606: 0700 lsls r0, r0, #28
tmp &= ~USB_HOST_PCKSIZE_SIZE_Msk;
2608: f025 45e0 bic.w r5, r5, #1879048192 ; 0x70000000
tmp |= USB_HOST_PCKSIZE_SIZE(data);
260c: f000 40e0 and.w r0, r0, #1879048192 ; 0x70000000
2610: 4328 orrs r0, r5
((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg = tmp;
2612: f8ca 0004 str.w r0, [sl, #4]
tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg;
2616: f8ba 500c ldrh.w r5, [sl, #12]
pipe->speed = speed;
261a: 7ce0 ldrb r0, [r4, #19]
tmp &= ~USB_HOST_CTRL_PIPE_PEPNUM_Msk;
261c: f425 6570 bic.w r5, r5, #3840 ; 0xf00
2620: 042d lsls r5, r5, #16
2622: 0c2d lsrs r5, r5, #16
tmp |= USB_HOST_CTRL_PIPE_PEPNUM(data);
2624: ea45 250b orr.w r5, r5, fp, lsl #8
((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg = tmp;
2628: f8aa 500c strh.w r5, [sl, #12]
262c: f89d 5040 ldrb.w r5, [sp, #64] ; 0x40
pipe->dev = dev;
2630: f884 800e strb.w r8, [r4, #14]
pipe->speed = speed;
2634: f365 0083 bfi r0, r5, #2, #2
2638: 74e0 strb r0, [r4, #19]
pipe->ep = ep;
263a: f884 900f strb.w r9, [r4, #15]
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)drv->prvt;
263e: 6849 ldr r1, [r1, #4]
pipe->max_pkt_size = max_pkt_size;
2640: 81a7 strh r7, [r4, #12]
pd->desc_table[pipe].HostDescBank[0].CTRL_PIPE.bit.PDADDR = dev_addr;
2642: eb01 1143 add.w r1, r1, r3, lsl #5
2646: 8988 ldrh r0, [r1, #12]
2648: f368 0006 bfi r0, r8, #0, #7
264c: 8188 strh r0, [r1, #12]
((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = mask;
264e: 9a02 ldr r2, [sp, #8]
2650: eb02 1343 add.w r3, r2, r3, lsl #5
2654: 222c movs r2, #44 ; 0x2c
2656: f883 2109 strb.w r2, [r3, #265] ; 0x109
return USB_H_OK;
265a: 2000 movs r0, #0
pipe->x.general.state = USB_H_PIPE_S_IDLE;
265c: f884 6026 strb.w r6, [r4, #38] ; 0x26
return USB_H_OK;
2660: e79b b.n 259a <_usb_h_pipe_set_control_param+0x4a>
2662: bf00 nop
2664: 00004f6c .word 0x00004f6c
2668: 00002939 .word 0x00002939
266c: 00003efd .word 0x00003efd
2670: 00003f0b .word 0x00003f0b
2674: 0000177d .word 0x0000177d
2678: 00001749 .word 0x00001749
0000267c <_usb_h_pipe_register_callback>:
{
267c: b538 push {r3, r4, r5, lr}
ASSERT(pipe);
267e: 4604 mov r4, r0
2680: 3800 subs r0, #0
{
2682: 460d mov r5, r1
ASSERT(pipe);
2684: bf18 it ne
2686: 2001 movne r0, #1
2688: 4903 ldr r1, [pc, #12] ; (2698 <_usb_h_pipe_register_callback+0x1c>)
268a: 4b04 ldr r3, [pc, #16] ; (269c <_usb_h_pipe_register_callback+0x20>)
268c: f240 42cf movw r2, #1231 ; 0x4cf
2690: 4798 blx r3
pipe->done = cb;
2692: 6065 str r5, [r4, #4]
}
2694: 2000 movs r0, #0
2696: bd38 pop {r3, r4, r5, pc}
2698: 00004f6c .word 0x00004f6c
269c: 00002939 .word 0x00002939
000026a0 <_usb_h_control_xfer>:
{
26a0: e92d 47f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, r9, sl, lr}
int8_t pi = _usb_h_pipe_i(pipe);
26a4: 4e4c ldr r6, [pc, #304] ; (27d8 <_usb_h_control_xfer+0x138>)
{
26a6: 4604 mov r4, r0
26a8: 4689 mov r9, r1
26aa: 4690 mov r8, r2
26ac: 461f mov r7, r3
int8_t pi = _usb_h_pipe_i(pipe);
26ae: 47b0 blx r6
26b0: 4682 mov sl, r0
ASSERT(pipe && pipe->hcd && pipe->hcd->hw && pipe->hcd->prvt);
26b2: b33c cbz r4, 2704 <_usb_h_control_xfer+0x64>
26b4: 6820 ldr r0, [r4, #0]
26b6: b128 cbz r0, 26c4 <_usb_h_control_xfer+0x24>
26b8: 6805 ldr r5, [r0, #0]
26ba: b32d cbz r5, 2708 <_usb_h_control_xfer+0x68>
26bc: 6840 ldr r0, [r0, #4]
26be: 3800 subs r0, #0
26c0: bf18 it ne
26c2: 2001 movne r0, #1
26c4: 4d45 ldr r5, [pc, #276] ; (27dc <_usb_h_control_xfer+0x13c>)
26c6: 4946 ldr r1, [pc, #280] ; (27e0 <_usb_h_control_xfer+0x140>)
26c8: f240 52d3 movw r2, #1491 ; 0x5d3
26cc: 47a8 blx r5
ASSERT(pi >= 0 && pi < CONF_USB_H_NUM_PIPE_SP);
26ce: fa5f f08a uxtb.w r0, sl
26d2: 2803 cmp r0, #3
26d4: 4942 ldr r1, [pc, #264] ; (27e0 <_usb_h_control_xfer+0x140>)
26d6: f240 52d4 movw r2, #1492 ; 0x5d4
26da: bf8c ite hi
26dc: 2000 movhi r0, #0
26de: 2001 movls r0, #1
26e0: 47a8 blx r5
if (pipe->type != 0) { /* Not control */
26e2: 7c65 ldrb r5, [r4, #17]
26e4: 2d00 cmp r5, #0
26e6: d173 bne.n 27d0 <_usb_h_control_xfer+0x130>
atomic_enter_critical(&flags);
26e8: 4b3e ldr r3, [pc, #248] ; (27e4 <_usb_h_control_xfer+0x144>)
26ea: a801 add r0, sp, #4
26ec: 4798 blx r3
if (pipe->x.general.state == USB_H_PIPE_S_FREE) {
26ee: f894 3026 ldrb.w r3, [r4, #38] ; 0x26
26f2: 493d ldr r1, [pc, #244] ; (27e8 <_usb_h_control_xfer+0x148>)
26f4: b953 cbnz r3, 270c <_usb_h_control_xfer+0x6c>
atomic_leave_critical(&flags);
26f6: a801 add r0, sp, #4
26f8: 4788 blx r1
return USB_H_ERR_NOT_INIT;
26fa: f06f 0013 mvn.w r0, #19
}
26fe: b002 add sp, #8
2700: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
ASSERT(pipe && pipe->hcd && pipe->hcd->hw && pipe->hcd->prvt);
2704: 4620 mov r0, r4
2706: e7dd b.n 26c4 <_usb_h_control_xfer+0x24>
2708: 4628 mov r0, r5
270a: e7db b.n 26c4 <_usb_h_control_xfer+0x24>
} else if (pipe->x.general.state != USB_H_PIPE_S_IDLE) {
270c: 2b02 cmp r3, #2
270e: d004 beq.n 271a <_usb_h_control_xfer+0x7a>
atomic_leave_critical(&flags);
2710: a801 add r0, sp, #4
2712: 4788 blx r1
return USB_H_BUSY;
2714: f06f 0003 mvn.w r0, #3
2718: e7f1 b.n 26fe <_usb_h_control_xfer+0x5e>
pipe->x.general.state = USB_H_PIPE_S_SETUP;
271a: 2303 movs r3, #3
_usb_h_add_sof_user(pipe->hcd); /* SOF user: control timeout */
271c: 6820 ldr r0, [r4, #0]
pipe->x.general.state = USB_H_PIPE_S_SETUP;
271e: f884 3026 strb.w r3, [r4, #38] ; 0x26
_usb_h_add_sof_user(pipe->hcd); /* SOF user: control timeout */
2722: 4b32 ldr r3, [pc, #200] ; (27ec <_usb_h_control_xfer+0x14c>)
2724: 4798 blx r3
_usb_h_add_req_user(pipe->hcd);
2726: 6823 ldr r3, [r4, #0]
2728: 685a ldr r2, [r3, #4]
pd->n_ctrl_req_user++;
272a: f892 3088 ldrb.w r3, [r2, #136] ; 0x88
272e: 3301 adds r3, #1
2730: f882 3088 strb.w r3, [r2, #136] ; 0x88
atomic_leave_critical(&flags);
2734: a801 add r0, sp, #4
2736: 4788 blx r1
pipe->x.ctrl.req_timeout = timeout;
2738: f9bd 3028 ldrsh.w r3, [sp, #40] ; 0x28
273c: 8423 strh r3, [r4, #32]
pipe->x.ctrl.pkt_timeout = length ? USB_CTRL_DPKT_TIMEOUT : (-1);
273e: 2f00 cmp r7, #0
pipe->x.ctrl.count = 0;
2740: 83e5 strh r5, [r4, #30]
pipe->x.ctrl.pkt_timeout = length ? USB_CTRL_DPKT_TIMEOUT : (-1);
2742: bf14 ite ne
2744: f44f 73fa movne.w r3, #500 ; 0x1f4
2748: f04f 33ff moveq.w r3, #4294967295 ; 0xffffffff
pipe->x.ctrl.status = 0;
274c: f884 5027 strb.w r5, [r4, #39] ; 0x27
struct usb_h_desc * drv = pipe->hcd;
2750: 6825 ldr r5, [r4, #0]
pipe->x.ctrl.size = length;
2752: 83a7 strh r7, [r4, #28]
pipe->x.ctrl.pkt_timeout = length ? USB_CTRL_DPKT_TIMEOUT : (-1);
2754: 8463 strh r3, [r4, #34] ; 0x22
pipe->x.ctrl.data = data;
2756: e9c4 8905 strd r8, r9, [r4, #20]
uint8_t pi = _usb_h_pipe_i(pipe);
275a: 4620 mov r0, r4
struct _usb_h_prvt *pd = (struct _usb_h_prvt *)pipe->hcd->prvt;
275c: 686f ldr r7, [r5, #4]
uint8_t pi = _usb_h_pipe_i(pipe);
275e: 47b0 blx r6
hri_usbhost_clear_PINTFLAG_reg(drv->hw, pi, USB_HOST_PINTFLAG_TXSTP);
2760: 682a ldr r2, [r5, #0]
uint8_t * src8 = pipe->x.ctrl.setup;
2762: 69a3 ldr r3, [r4, #24]
uint8_t pi = _usb_h_pipe_i(pipe);
2764: b2c0 uxtb r0, r0
((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = mask;
2766: f100 0108 add.w r1, r0, #8
276a: eb02 1241 add.w r2, r2, r1, lsl #5
276e: 2110 movs r1, #16
2770: 71d1 strb r1, [r2, #7]
volatile uint8_t * dst8 = usb_ctrl_buffer;
2772: 4a1f ldr r2, [pc, #124] ; (27f0 <_usb_h_control_xfer+0x150>)
2774: f103 0608 add.w r6, r3, #8
2778: 4614 mov r4, r2
*dst8++ = *src8++;
277a: f813 cb01 ldrb.w ip, [r3], #1
277e: f882 c000 strb.w ip, [r2]
for (i = 0; i < 8; i++) {
2782: 42b3 cmp r3, r6
*dst8++ = *src8++;
2784: f102 0201 add.w r2, r2, #1
for (i = 0; i < 8; i++) {
2788: d1f7 bne.n 277a <_usb_h_control_xfer+0xda>
pd->desc_table[pi].HostDescBank[0].ADDR.reg = (uint32_t)usb_ctrl_buffer;
278a: 0141 lsls r1, r0, #5
278c: eb07 1240 add.w r2, r7, r0, lsl #5
2790: 507c str r4, [r7, r1]
pd->desc_table[pi].HostDescBank[0].PCKSIZE.bit.BYTE_COUNT = 8;
2792: 6853 ldr r3, [r2, #4]
2794: 2408 movs r4, #8
2796: f364 030d bfi r3, r4, #0, #14
279a: 6053 str r3, [r2, #4]
pd->desc_table[pi].HostDescBank[0].PCKSIZE.bit.MULTI_PACKET_SIZE = 0;
279c: 6853 ldr r3, [r2, #4]
279e: f36f 339b bfc r3, #14, #14
27a2: 6053 str r3, [r2, #4]
hri_usbhost_write_PCFG_PTOKEN_bf(drv->hw, pi, 0);
27a4: 682b ldr r3, [r5, #0]
tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg;
27a6: eb03 1040 add.w r0, r3, r0, lsl #5
27aa: f890 2100 ldrb.w r2, [r0, #256] ; 0x100
tmp &= ~USB_HOST_PCFG_PTOKEN_Msk;
27ae: f002 02fc and.w r2, r2, #252 ; 0xfc
((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg = tmp;
27b2: f880 2100 strb.w r2, [r0, #256] ; 0x100
((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_DTGL;
27b6: 2201 movs r2, #1
27b8: f880 2104 strb.w r2, [r0, #260] ; 0x104
((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_BK0RDY;
27bc: 2240 movs r2, #64 ; 0x40
27be: f880 2105 strb.w r2, [r0, #261] ; 0x105
((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_PFREEZE;
27c2: 2210 movs r2, #16
27c4: f880 2104 strb.w r2, [r0, #260] ; 0x104
((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = mask;
27c8: f880 2109 strb.w r2, [r0, #265] ; 0x109
return USB_H_OK;
27cc: 2000 movs r0, #0
}
27ce: e796 b.n 26fe <_usb_h_control_xfer+0x5e>
return USB_H_ERR_UNSP_OP;
27d0: f06f 001a mvn.w r0, #26
27d4: e793 b.n 26fe <_usb_h_control_xfer+0x5e>
27d6: bf00 nop
27d8: 0000177d .word 0x0000177d
27dc: 00002939 .word 0x00002939
27e0: 00004f6c .word 0x00004f6c
27e4: 00003efd .word 0x00003efd
27e8: 00003f0b .word 0x00003f0b
27ec: 00001769 .word 0x00001769
27f0: 200003c0 .word 0x200003c0
000027f4 <_usb_h_pipe_abort>:
void _usb_h_pipe_abort(struct usb_h_pipe *pipe)
{
27f4: b510 push {r4, lr}
ASSERT(pipe && pipe->hcd && pipe->hcd->hw && pipe->hcd->prvt);
27f6: 4604 mov r4, r0
27f8: b138 cbz r0, 280a <_usb_h_pipe_abort+0x16>
27fa: 6800 ldr r0, [r0, #0]
27fc: b128 cbz r0, 280a <_usb_h_pipe_abort+0x16>
27fe: 6803 ldr r3, [r0, #0]
2800: b17b cbz r3, 2822 <_usb_h_pipe_abort+0x2e>
2802: 6840 ldr r0, [r0, #4]
2804: 3800 subs r0, #0
2806: bf18 it ne
2808: 2001 movne r0, #1
280a: 4907 ldr r1, [pc, #28] ; (2828 <_usb_h_pipe_abort+0x34>)
280c: 4b07 ldr r3, [pc, #28] ; (282c <_usb_h_pipe_abort+0x38>)
280e: f240 6257 movw r2, #1623 ; 0x657
2812: 4798 blx r3
_usb_h_abort_transfer(pipe, USB_H_ABORT);
2814: 4620 mov r0, r4
2816: 4b06 ldr r3, [pc, #24] ; (2830 <_usb_h_pipe_abort+0x3c>)
}
2818: e8bd 4010 ldmia.w sp!, {r4, lr}
_usb_h_abort_transfer(pipe, USB_H_ABORT);
281c: f06f 0102 mvn.w r1, #2
2820: 4718 bx r3
ASSERT(pipe && pipe->hcd && pipe->hcd->hw && pipe->hcd->prvt);
2822: 4618 mov r0, r3
2824: e7f1 b.n 280a <_usb_h_pipe_abort+0x16>
2826: bf00 nop
2828: 00004f6c .word 0x00004f6c
282c: 00002939 .word 0x00002939
2830: 00001b75 .word 0x00001b75
00002834 <USB_0_Handler>:
* \brief USB interrupt handler
*/
void USB_0_Handler(void)
{
_usb_h_handler();
2834: 4b00 ldr r3, [pc, #0] ; (2838 <USB_0_Handler+0x4>)
2836: 4718 bx r3
2838: 00001bcd .word 0x00001bcd
0000283c <USB_1_Handler>:
283c: 4b00 ldr r3, [pc, #0] ; (2840 <USB_1_Handler+0x4>)
283e: 4718 bx r3
2840: 00001bcd .word 0x00001bcd
00002844 <USB_2_Handler>:
2844: 4b00 ldr r3, [pc, #0] ; (2848 <USB_2_Handler+0x4>)
2846: 4718 bx r3
2848: 00001bcd .word 0x00001bcd
0000284c <USB_3_Handler>:
284c: 4b00 ldr r3, [pc, #0] ; (2850 <USB_3_Handler+0x4>)
284e: 4718 bx r3
2850: 00001bcd .word 0x00001bcd
00002854 <_init_chip>:
}
static inline void hri_nvmctrl_set_CTRLA_RWS_bf(const void *const hw, hri_nvmctrl_ctrla_reg_t mask)
{
NVMCTRL_CRITICAL_SECTION_ENTER();
((Nvmctrl *)hw)->CTRLA.reg |= NVMCTRL_CTRLA_RWS(mask);
2854: 4a0b ldr r2, [pc, #44] ; (2884 <_init_chip+0x30>)
2856: 8813 ldrh r3, [r2, #0]
2858: b29b uxth r3, r3
285a: f443 7380 orr.w r3, r3, #256 ; 0x100
/**
* \brief Initialize the hardware abstraction layer
*/
void _init_chip(void)
{
285e: b510 push {r4, lr}
2860: 8013 strh r3, [r2, #0]
hri_nvmctrl_set_CTRLA_RWS_bf(NVMCTRL, CONF_NVM_WAIT_STATE);
_osc32kctrl_init_sources();
2862: 4b09 ldr r3, [pc, #36] ; (2888 <_init_chip+0x34>)
_oscctrl_init_sources();
_mclk_init();
#if _GCLK_INIT_1ST
_gclk_init_generators_by_fref(_GCLK_INIT_1ST);
2864: 4c09 ldr r4, [pc, #36] ; (288c <_init_chip+0x38>)
_osc32kctrl_init_sources();
2866: 4798 blx r3
_oscctrl_init_sources();
2868: 4b09 ldr r3, [pc, #36] ; (2890 <_init_chip+0x3c>)
286a: 4798 blx r3
_mclk_init();
286c: 4b09 ldr r3, [pc, #36] ; (2894 <_init_chip+0x40>)
286e: 4798 blx r3
_gclk_init_generators_by_fref(_GCLK_INIT_1ST);
2870: 2008 movs r0, #8
2872: 47a0 blx r4
#endif
_oscctrl_init_referenced_generators();
2874: 4b08 ldr r3, [pc, #32] ; (2898 <_init_chip+0x44>)
2876: 4798 blx r3
_gclk_init_generators_by_fref(_GCLK_INIT_LAST);
2878: 4623 mov r3, r4
287a: f640 70f7 movw r0, #4087 ; 0xff7
#endif
#if CONF_CMCC_ENABLE
cache_init();
#endif
}
287e: e8bd 4010 ldmia.w sp!, {r4, lr}
_gclk_init_generators_by_fref(_GCLK_INIT_LAST);
2882: 4718 bx r3
2884: 41004000 .word 0x41004000
2888: 00003581 .word 0x00003581
288c: 0000289d .word 0x0000289d
2890: 0000293f .word 0x0000293f
2894: 00002bcd .word 0x00002bcd
2898: 00002941 .word 0x00002941
0000289c <_gclk_init_generators_by_fref>:
void _gclk_init_generators_by_fref(uint32_t bm)
{
#if CONF_GCLK_GENERATOR_0_CONFIG == 1
if (bm & (1ul << 0)) {
289c: 07c2 lsls r2, r0, #31
289e: d507 bpl.n 28b0 <_gclk_init_generators_by_fref+0x14>
}
static inline void hri_gclk_write_GENCTRL_reg(const void *const hw, uint8_t index, hri_gclk_genctrl_reg_t data)
{
GCLK_CRITICAL_SECTION_ENTER();
((Gclk *)hw)->GENCTRL[index].reg = data;
28a0: 4b09 ldr r3, [pc, #36] ; (28c8 <_gclk_init_generators_by_fref+0x2c>)
28a2: 4a0a ldr r2, [pc, #40] ; (28cc <_gclk_init_generators_by_fref+0x30>)
28a4: 621a str r2, [r3, #32]
while (((Gclk *)hw)->SYNCBUSY.reg & reg) {
28a6: f643 72fd movw r2, #16381 ; 0x3ffd
28aa: 6859 ldr r1, [r3, #4]
28ac: 4211 tst r1, r2
28ae: d1fc bne.n 28aa <_gclk_init_generators_by_fref+0xe>
| (CONF_GCLK_GENERATOR_2_CONFIG << GCLK_GENCTRL_GENEN_Pos) | CONF_GCLK_GEN_2_SOURCE);
}
#endif
#if CONF_GCLK_GENERATOR_3_CONFIG == 1
if (bm & (1ul << 3)) {
28b0: 0703 lsls r3, r0, #28
28b2: d507 bpl.n 28c4 <_gclk_init_generators_by_fref+0x28>
((Gclk *)hw)->GENCTRL[index].reg = data;
28b4: 4b04 ldr r3, [pc, #16] ; (28c8 <_gclk_init_generators_by_fref+0x2c>)
28b6: 4a06 ldr r2, [pc, #24] ; (28d0 <_gclk_init_generators_by_fref+0x34>)
28b8: 62da str r2, [r3, #44] ; 0x2c
while (((Gclk *)hw)->SYNCBUSY.reg & reg) {
28ba: f643 72fd movw r2, #16381 ; 0x3ffd
28be: 6859 ldr r1, [r3, #4]
28c0: 4211 tst r1, r2
28c2: d1fc bne.n 28be <_gclk_init_generators_by_fref+0x22>
| (CONF_GCLK_GEN_11_DIVSEL << GCLK_GENCTRL_DIVSEL_Pos) | (CONF_GCLK_GEN_11_OE << GCLK_GENCTRL_OE_Pos)
| (CONF_GCLK_GEN_11_OOV << GCLK_GENCTRL_OOV_Pos) | (CONF_GCLK_GEN_11_IDC << GCLK_GENCTRL_IDC_Pos)
| (CONF_GCLK_GENERATOR_11_CONFIG << GCLK_GENCTRL_GENEN_Pos) | CONF_GCLK_GEN_11_SOURCE);
}
#endif
}
28c4: 4770 bx lr
28c6: bf00 nop
28c8: 40001c00 .word 0x40001c00
28cc: 00010106 .word 0x00010106
28d0: 00010105 .word 0x00010105
000028d4 <is_list_element>:
* \brief Check whether element belongs to list
*/
bool is_list_element(const struct list_descriptor *const list, const void *const element)
{
struct list_element *it;
for (it = list->head; it; it = it->next) {
28d4: 6800 ldr r0, [r0, #0]
28d6: b900 cbnz r0, 28da <is_list_element+0x6>
28d8: 4770 bx lr
if (it == element) {
28da: 4288 cmp r0, r1
28dc: d1fa bne.n 28d4 <is_list_element>
return true;
28de: 2001 movs r0, #1
}
}
return false;
}
28e0: 4770 bx lr
...
000028e4 <list_insert_as_head>:
/**
* \brief Insert an element as list head
*/
void list_insert_as_head(struct list_descriptor *const list, void *const element)
{
28e4: b538 push {r3, r4, r5, lr}
ASSERT(!is_list_element(list, element));
28e6: 4b07 ldr r3, [pc, #28] ; (2904 <list_insert_as_head+0x20>)
{
28e8: 4604 mov r4, r0
ASSERT(!is_list_element(list, element));
28ea: 4798 blx r3
28ec: f080 0001 eor.w r0, r0, #1
{
28f0: 460d mov r5, r1
ASSERT(!is_list_element(list, element));
28f2: 4b05 ldr r3, [pc, #20] ; (2908 <list_insert_as_head+0x24>)
28f4: 4905 ldr r1, [pc, #20] ; (290c <list_insert_as_head+0x28>)
28f6: 2239 movs r2, #57 ; 0x39
28f8: b2c0 uxtb r0, r0
28fa: 4798 blx r3
((struct list_element *)element)->next = list->head;
28fc: 6823 ldr r3, [r4, #0]
28fe: 602b str r3, [r5, #0]
list->head = (struct list_element *)element;
2900: 6025 str r5, [r4, #0]
}
2902: bd38 pop {r3, r4, r5, pc}
2904: 000028d5 .word 0x000028d5
2908: 00002939 .word 0x00002939
290c: 00004f92 .word 0x00004f92
00002910 <list_delete_element>:
/**
* \brief Removes list element
*/
bool list_delete_element(struct list_descriptor *const list, const void *const element)
{
if (!element) {
2910: b171 cbz r1, 2930 <list_delete_element+0x20>
return false;
}
if (list->head == element) {
2912: 6803 ldr r3, [r0, #0]
2914: 428b cmp r3, r1
2916: d104 bne.n 2922 <list_delete_element+0x12>
list->head = list->head->next;
2918: 681b ldr r3, [r3, #0]
291a: 6003 str r3, [r0, #0]
while (it && it->next != element) {
it = it->next;
}
if (it) {
it->next = ((struct list_element *)element)->next;
return true;
291c: 2001 movs r0, #1
}
}
return false;
}
291e: 4770 bx lr
2920: 4613 mov r3, r2
while (it && it->next != element) {
2922: b13b cbz r3, 2934 <list_delete_element+0x24>
2924: 681a ldr r2, [r3, #0]
2926: 428a cmp r2, r1
2928: d1fa bne.n 2920 <list_delete_element+0x10>
it->next = ((struct list_element *)element)->next;
292a: 680a ldr r2, [r1, #0]
292c: 601a str r2, [r3, #0]
292e: e7f5 b.n 291c <list_delete_element+0xc>
return false;
2930: 4608 mov r0, r1
2932: 4770 bx lr
2934: 4618 mov r0, r3
2936: 4770 bx lr
00002938 <assert>:
/**
* \brief Assert function
*/
void assert(const bool condition, const char *const file, const int line)
{
if (!(condition)) {
2938: b900 cbnz r0, 293c <assert+0x4>
__asm("BKPT #0");
293a: be00 bkpt 0x0000
}
(void)file;
(void)line;
}
293c: 4770 bx lr
0000293e <_oscctrl_init_sources>:
hri_oscctrl_set_XOSCCTRL_ONDEMAND_bit(hw, 1);
#endif
#endif
(void)hw;
}
293e: 4770 bx lr
00002940 <_oscctrl_init_referenced_generators>:
tmp = ((Gclk *)hw)->GENCTRL[index].reg;
2940: 4b2e ldr r3, [pc, #184] ; (29fc <_oscctrl_init_referenced_generators+0xbc>)
2942: 6a1a ldr r2, [r3, #32]
tmp &= ~GCLK_GENCTRL_SRC_Msk;
2944: f022 020f bic.w r2, r2, #15
tmp |= GCLK_GENCTRL_SRC(data);
2948: f042 0204 orr.w r2, r2, #4
((Gclk *)hw)->GENCTRL[index].reg = tmp;
294c: 621a str r2, [r3, #32]
while (((Gclk *)hw)->SYNCBUSY.reg & reg) {
294e: f643 72fd movw r2, #16381 ; 0x3ffd
2952: 6859 ldr r1, [r3, #4]
2954: 4211 tst r1, r2
2956: d1fc bne.n 2952 <_oscctrl_init_referenced_generators+0x12>
return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL0) >> GCLK_SYNCBUSY_GENCTRL0_Pos;
2958: 685a ldr r2, [r3, #4]
{
void *hw = (void *)OSCCTRL;
#if CONF_DFLL_CONFIG == 1
hri_gclk_write_GENCTRL_SRC_bf(GCLK, 0, GCLK_GENCTRL_SRC_OSCULP32K);
while (hri_gclk_get_SYNCBUSY_GENCTRL0_bit(GCLK))
295a: f3c2 0180 ubfx r1, r2, #2, #1
295e: 0752 lsls r2, r2, #29
2960: d4fa bmi.n 2958 <_oscctrl_init_referenced_generators+0x18>
}
static inline void hri_oscctrl_write_DFLLCTRLA_reg(const void *const hw, hri_oscctrl_dfllctrla_reg_t data)
{
OSCCTRL_CRITICAL_SECTION_ENTER();
((Oscctrl *)hw)->DFLLCTRLA.reg = data;
2962: 4a27 ldr r2, [pc, #156] ; (2a00 <_oscctrl_init_referenced_generators+0xc0>)
2964: 7711 strb r1, [r2, #28]
}
static inline void hri_gclk_write_PCHCTRL_reg(const void *const hw, uint8_t index, hri_gclk_pchctrl_reg_t data)
{
GCLK_CRITICAL_SECTION_ENTER();
((Gclk *)hw)->PCHCTRL[index].reg = data;
2966: 2143 movs r1, #67 ; 0x43
2968: f8c3 1080 str.w r1, [r3, #128] ; 0x80
}
static inline void hri_oscctrl_write_DFLLMUL_reg(const void *const hw, hri_oscctrl_dfllmul_reg_t data)
{
OSCCTRL_CRITICAL_SECTION_ENTER();
((Oscctrl *)hw)->DFLLMUL.reg = data;
296c: 4b25 ldr r3, [pc, #148] ; (2a04 <_oscctrl_init_referenced_generators+0xc4>)
296e: 6293 str r3, [r2, #40] ; 0x28
}
static inline bool hri_oscctrl_get_DFLLSYNC_DFLLMUL_bit(const void *const hw)
{
uint8_t tmp;
tmp = ((Oscctrl *)hw)->DFLLSYNC.reg;
2970: f892 302c ldrb.w r3, [r2, #44] ; 0x2c
#endif
hri_oscctrl_write_DFLLMUL_reg(hw,
OSCCTRL_DFLLMUL_CSTEP(CONF_DFLL_CSTEP) | OSCCTRL_DFLLMUL_FSTEP(CONF_DFLL_FSTEP)
| OSCCTRL_DFLLMUL_MUL(CONF_DFLL_MUL));
while (hri_oscctrl_get_DFLLSYNC_DFLLMUL_bit(hw))
2974: f3c3 1100 ubfx r1, r3, #4, #1
2978: 06db lsls r3, r3, #27
297a: d4f9 bmi.n 2970 <_oscctrl_init_referenced_generators+0x30>
tmp = ((Oscctrl *)hw)->DFLLSYNC.reg;
297c: 4b20 ldr r3, [pc, #128] ; (2a00 <_oscctrl_init_referenced_generators+0xc0>)
((Oscctrl *)hw)->DFLLCTRLB.reg = data;
297e: f882 1020 strb.w r1, [r2, #32]
tmp = ((Oscctrl *)hw)->DFLLSYNC.reg;
2982: f893 202c ldrb.w r2, [r3, #44] ; 0x2c
;
hri_oscctrl_write_DFLLCTRLB_reg(hw, 0);
while (hri_oscctrl_get_DFLLSYNC_DFLLCTRLB_bit(hw))
2986: 0750 lsls r0, r2, #29
2988: d4fb bmi.n 2982 <_oscctrl_init_referenced_generators+0x42>
((Oscctrl *)hw)->DFLLCTRLA.reg = data;
298a: 2202 movs r2, #2
298c: 771a strb r2, [r3, #28]
tmp = ((Oscctrl *)hw)->DFLLSYNC.reg;
298e: 4b1c ldr r3, [pc, #112] ; (2a00 <_oscctrl_init_referenced_generators+0xc0>)
2990: f893 202c ldrb.w r2, [r3, #44] ; 0x2c
;
tmp = (CONF_DFLL_RUNSTDBY << OSCCTRL_DFLLCTRLA_RUNSTDBY_Pos) | OSCCTRL_DFLLCTRLA_ENABLE;
hri_oscctrl_write_DFLLCTRLA_reg(hw, tmp);
while (hri_oscctrl_get_DFLLSYNC_ENABLE_bit(hw))
2994: 0791 lsls r1, r2, #30
2996: d4fb bmi.n 2990 <_oscctrl_init_referenced_generators+0x50>
return ((Oscctrl *)hw)->DFLLVAL.reg;
2998: 6a5a ldr r2, [r3, #36] ; 0x24
((Oscctrl *)hw)->DFLLVAL.reg = data;
299a: 625a str r2, [r3, #36] ; 0x24
tmp = ((Oscctrl *)hw)->DFLLSYNC.reg;
299c: 4b18 ldr r3, [pc, #96] ; (2a00 <_oscctrl_init_referenced_generators+0xc0>)
299e: f893 202c ldrb.w r2, [r3, #44] ; 0x2c
#if CONF_DFLL_OVERWRITE_CALIBRATION == 1
hri_oscctrl_write_DFLLVAL_reg(hw, OSCCTRL_DFLLVAL_COARSE(CONF_DFLL_COARSE) | OSCCTRL_DFLLVAL_FINE(CONF_DFLL_FINE));
#endif
hri_oscctrl_write_DFLLVAL_reg(hw, hri_oscctrl_read_DFLLVAL_reg(hw));
while (hri_oscctrl_get_DFLLSYNC_DFLLVAL_bit(hw))
29a2: 0712 lsls r2, r2, #28
29a4: d4fb bmi.n 299e <_oscctrl_init_referenced_generators+0x5e>
((Oscctrl *)hw)->DFLLCTRLB.reg = data;
29a6: 2211 movs r2, #17
29a8: f883 2020 strb.w r2, [r3, #32]
tmp = ((Oscctrl *)hw)->DFLLSYNC.reg;
29ac: 4b14 ldr r3, [pc, #80] ; (2a00 <_oscctrl_init_referenced_generators+0xc0>)
29ae: f893 202c ldrb.w r2, [r3, #44] ; 0x2c
tmp = (CONF_DFLL_WAITLOCK << OSCCTRL_DFLLCTRLB_WAITLOCK_Pos) | (CONF_DFLL_BPLCKC << OSCCTRL_DFLLCTRLB_BPLCKC_Pos)
| (CONF_DFLL_QLDIS << OSCCTRL_DFLLCTRLB_QLDIS_Pos) | (CONF_DFLL_CCDIS << OSCCTRL_DFLLCTRLB_CCDIS_Pos)
| (CONF_DFLL_USBCRM << OSCCTRL_DFLLCTRLB_USBCRM_Pos) | (CONF_DFLL_LLAW << OSCCTRL_DFLLCTRLB_LLAW_Pos)
| (CONF_DFLL_STABLE << OSCCTRL_DFLLCTRLB_STABLE_Pos) | (CONF_DFLL_MODE << OSCCTRL_DFLLCTRLB_MODE_Pos) | 0;
hri_oscctrl_write_DFLLCTRLB_reg(hw, tmp);
while (hri_oscctrl_get_DFLLSYNC_DFLLCTRLB_bit(hw))
29b2: 0750 lsls r0, r2, #29
29b4: d4fb bmi.n 29ae <_oscctrl_init_referenced_generators+0x6e>
tmp = ((Oscctrl *)hw)->DFLLCTRLB.reg;
29b6: f893 2020 ldrb.w r2, [r3, #32]
(CONF_FDPLL1_RUNSTDBY << OSCCTRL_DPLLCTRLA_RUNSTDBY_Pos)
| (CONF_FDPLL1_ENABLE << OSCCTRL_DPLLCTRLA_ENABLE_Pos));
#endif
#if CONF_DFLL_CONFIG == 1
if (hri_oscctrl_get_DFLLCTRLB_MODE_bit(hw)) {
29ba: 07d1 lsls r1, r2, #31
29bc: d519 bpl.n 29f2 <_oscctrl_init_referenced_generators+0xb2>
tmp = ((Oscctrl *)hw)->STATUS.reg;
29be: 691a ldr r2, [r3, #16]
tmp &= mask;
29c0: f402 6210 and.w r2, r2, #2304 ; 0x900
hri_oscctrl_status_reg_t status_mask = OSCCTRL_STATUS_DFLLRDY | OSCCTRL_STATUS_DFLLLCKC;
while (hri_oscctrl_get_STATUS_reg(hw, status_mask) != status_mask)
29c4: f5b2 6f10 cmp.w r2, #2304 ; 0x900
29c8: d1f9 bne.n 29be <_oscctrl_init_referenced_generators+0x7e>
return ((Gclk *)hw)->SYNCBUSY.reg;
29ca: 4a0c ldr r2, [pc, #48] ; (29fc <_oscctrl_init_referenced_generators+0xbc>)
29cc: 6853 ldr r3, [r2, #4]
hri_oscctrl_set_DPLLCTRLA_ONDEMAND_bit(hw, 1);
#endif
#endif
#if CONF_DFLL_CONFIG == 1
while (hri_gclk_read_SYNCBUSY_reg(GCLK))
29ce: 2b00 cmp r3, #0
29d0: d1fc bne.n 29cc <_oscctrl_init_referenced_generators+0x8c>
tmp = ((Gclk *)hw)->GENCTRL[index].reg;
29d2: 6a13 ldr r3, [r2, #32]
tmp &= ~GCLK_GENCTRL_SRC_Msk;
29d4: f023 030f bic.w r3, r3, #15
tmp |= GCLK_GENCTRL_SRC(data);
29d8: f043 0306 orr.w r3, r3, #6
((Gclk *)hw)->GENCTRL[index].reg = tmp;
29dc: 6213 str r3, [r2, #32]
while (((Gclk *)hw)->SYNCBUSY.reg & reg) {
29de: f643 73fd movw r3, #16381 ; 0x3ffd
29e2: 6851 ldr r1, [r2, #4]
29e4: 4219 tst r1, r3
29e6: d1fc bne.n 29e2 <_oscctrl_init_referenced_generators+0xa2>
return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL0) >> GCLK_SYNCBUSY_GENCTRL0_Pos;
29e8: 4a04 ldr r2, [pc, #16] ; (29fc <_oscctrl_init_referenced_generators+0xbc>)
29ea: 6853 ldr r3, [r2, #4]
;
hri_gclk_write_GENCTRL_SRC_bf(GCLK, 0, CONF_GCLK_GEN_0_SOURCE);
while (hri_gclk_get_SYNCBUSY_GENCTRL0_bit(GCLK))
29ec: 075b lsls r3, r3, #29
29ee: d4fc bmi.n 29ea <_oscctrl_init_referenced_generators+0xaa>
;
#endif
(void)hw;
}
29f0: 4770 bx lr
return (((Oscctrl *)hw)->STATUS.reg & OSCCTRL_STATUS_DFLLRDY) >> OSCCTRL_STATUS_DFLLRDY_Pos;
29f2: 691a ldr r2, [r3, #16]
while (!hri_oscctrl_get_STATUS_DFLLRDY_bit(hw))
29f4: 05d2 lsls r2, r2, #23
29f6: d5fc bpl.n 29f2 <_oscctrl_init_referenced_generators+0xb2>
29f8: e7e7 b.n 29ca <_oscctrl_init_referenced_generators+0x8a>
29fa: bf00 nop
29fc: 40001c00 .word 0x40001c00
2a00: 40001000 .word 0x40001000
2a04: 040105b8 .word 0x040105b8
00002a08 <_mci_sync_init>:
/**
* \brief Initialize MCI low level driver.
*/
int32_t _mci_sync_init(struct _mci_sync_device *const mci_dev, void *const hw)
{
2a08: b538 push {r3, r4, r5, lr}
2a0a: 460c mov r4, r1
ASSERT(mci_dev && hw);
2a0c: 4605 mov r5, r0
2a0e: b110 cbz r0, 2a16 <_mci_sync_init+0xe>
2a10: 1e08 subs r0, r1, #0
2a12: bf18 it ne
2a14: 2001 movne r0, #1
2a16: 4b12 ldr r3, [pc, #72] ; (2a60 <_mci_sync_init+0x58>)
2a18: 4912 ldr r1, [pc, #72] ; (2a64 <_mci_sync_init+0x5c>)
2a1a: 22d8 movs r2, #216 ; 0xd8
2a1c: 4798 blx r3
}
static inline void hri_sdhc_set_SRR_SWRSTALL_bit(const void *const hw)
{
SDHC_CRITICAL_SECTION_ENTER();
((Sdhc *)hw)->SRR.reg |= SDHC_SRR_SWRSTALL;
2a1e: f894 302f ldrb.w r3, [r4, #47] ; 0x2f
mci_dev->hw = hw;
2a22: 602c str r4, [r5, #0]
2a24: f043 0301 orr.w r3, r3, #1
2a28: f884 302f strb.w r3, [r4, #47] ; 0x2f
}
static inline bool hri_sdhc_get_SRR_SWRSTALL_bit(const void *const hw)
{
uint8_t tmp;
tmp = ((Sdhc *)hw)->SRR.reg;
2a2c: f894 002f ldrb.w r0, [r4, #47] ; 0x2f
hri_sdhc_set_SRR_SWRSTALL_bit(hw);
while (hri_sdhc_get_SRR_SWRSTALL_bit(hw))
2a30: f010 0001 ands.w r0, r0, #1
2a34: d1fa bne.n 2a2c <_mci_sync_init+0x24>
((Sdhc *)hw)->TCR.reg = data;
2a36: 230e movs r3, #14
2a38: f884 302e strb.w r3, [r4, #46] ; 0x2e
((Sdhc *)hw)->PCR.reg = data;
2a3c: 230f movs r3, #15
2a3e: f884 3029 strb.w r3, [r4, #41] ; 0x29
}
static inline void hri_sdhc_set_NISTER_reg(const void *const hw, hri_sdhc_nister_reg_t mask)
{
SDHC_CRITICAL_SECTION_ENTER();
((Sdhc *)hw)->NISTER.reg |= mask;
2a42: 8ea3 ldrh r3, [r4, #52] ; 0x34
2a44: b29b uxth r3, r3
2a46: ea6f 2353 mvn.w r3, r3, lsr #9
2a4a: ea6f 2343 mvn.w r3, r3, lsl #9
2a4e: 86a3 strh r3, [r4, #52] ; 0x34
}
static inline void hri_sdhc_set_EISTER_reg(const void *const hw, hri_sdhc_eister_reg_t mask)
{
SDHC_CRITICAL_SECTION_ENTER();
((Sdhc *)hw)->EISTER.reg |= mask;
2a50: 8ee3 ldrh r3, [r4, #54] ; 0x36
2a52: b29b uxth r3, r3
2a54: ea6f 2393 mvn.w r3, r3, lsr #10
2a58: ea6f 2383 mvn.w r3, r3, lsl #10
2a5c: 86e3 strh r3, [r4, #54] ; 0x36
hri_sdhc_set_NISTER_reg(hw, SDHC_NISTER_MASK);
hri_sdhc_set_EISTER_reg(hw, SDHC_EISTER_MASK);
return ERR_NONE;
}
2a5e: bd38 pop {r3, r4, r5, pc}
2a60: 00002939 .word 0x00002939
2a64: 00004fb0 .word 0x00004fb0
00002a68 <usart_sync_write>:
* \param[in] length The number of bytes to write
*
* \return The number of bytes written.
*/
static int32_t usart_sync_write(struct io_descriptor *const io_descr, const uint8_t *const buf, const uint16_t length)
{
2a68: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
2a6c: 460e mov r6, r1
2a6e: 4615 mov r5, r2
uint32_t offset = 0;
struct usart_sync_descriptor *descr = CONTAINER_OF(io_descr, struct usart_sync_descriptor, io);
ASSERT(io_descr && buf && length);
2a70: 4604 mov r4, r0
2a72: b118 cbz r0, 2a7c <usart_sync_write+0x14>
2a74: b329 cbz r1, 2ac2 <usart_sync_write+0x5a>
2a76: 1e10 subs r0, r2, #0
2a78: bf18 it ne
2a7a: 2001 movne r0, #1
2a7c: 4912 ldr r1, [pc, #72] ; (2ac8 <usart_sync_write+0x60>)
2a7e: 4b13 ldr r3, [pc, #76] ; (2acc <usart_sync_write+0x64>)
while (!_usart_sync_is_ready_to_send(&descr->device))
2a80: 4f13 ldr r7, [pc, #76] ; (2ad0 <usart_sync_write+0x68>)
ASSERT(io_descr && buf && length);
2a82: 22f1 movs r2, #241 ; 0xf1
2a84: 4798 blx r3
while (!_usart_sync_is_ready_to_send(&descr->device))
2a86: 3408 adds r4, #8
2a88: 46b9 mov r9, r7
2a8a: 4620 mov r0, r4
2a8c: 47b8 blx r7
2a8e: 2800 cmp r0, #0
2a90: d0fb beq.n 2a8a <usart_sync_write+0x22>
;
do {
_usart_sync_write_byte(&descr->device, buf[offset]);
2a92: f8df 8044 ldr.w r8, [pc, #68] ; 2ad8 <usart_sync_write+0x70>
uint32_t offset = 0;
2a96: 2700 movs r7, #0
_usart_sync_write_byte(&descr->device, buf[offset]);
2a98: 5df1 ldrb r1, [r6, r7]
2a9a: 4620 mov r0, r4
2a9c: 47c0 blx r8
while (!_usart_sync_is_ready_to_send(&descr->device))
2a9e: 4620 mov r0, r4
2aa0: 47c8 blx r9
2aa2: 2800 cmp r0, #0
2aa4: d0fb beq.n 2a9e <usart_sync_write+0x36>
;
} while (++offset < length);
2aa6: 3701 adds r7, #1
2aa8: 42bd cmp r5, r7
2aaa: d8f5 bhi.n 2a98 <usart_sync_write+0x30>
2aac: 2d00 cmp r5, #0
while (!_usart_sync_is_transmit_done(&descr->device))
2aae: 4e09 ldr r6, [pc, #36] ; (2ad4 <usart_sync_write+0x6c>)
} while (++offset < length);
2ab0: bf08 it eq
2ab2: 2501 moveq r5, #1
while (!_usart_sync_is_transmit_done(&descr->device))
2ab4: 4620 mov r0, r4
2ab6: 47b0 blx r6
2ab8: 2800 cmp r0, #0
2aba: d0fb beq.n 2ab4 <usart_sync_write+0x4c>
;
return (int32_t)offset;
}
2abc: 4628 mov r0, r5
2abe: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
ASSERT(io_descr && buf && length);
2ac2: 4608 mov r0, r1
2ac4: e7da b.n 2a7c <usart_sync_write+0x14>
2ac6: bf00 nop
2ac8: 00004fc7 .word 0x00004fc7
2acc: 00002939 .word 0x00002939
2ad0: 00003cbb .word 0x00003cbb
2ad4: 00003cc5 .word 0x00003cc5
2ad8: 00003cad .word 0x00003cad
00002adc <usart_sync_read>:
* \param[in] length The size of a buffer
*
* \return The number of bytes read.
*/
static int32_t usart_sync_read(struct io_descriptor *const io_descr, uint8_t *const buf, const uint16_t length)
{
2adc: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
2ae0: 460e mov r6, r1
2ae2: 4615 mov r5, r2
uint32_t offset = 0;
struct usart_sync_descriptor *descr = CONTAINER_OF(io_descr, struct usart_sync_descriptor, io);
ASSERT(io_descr && buf && length);
2ae4: 4604 mov r4, r0
2ae6: b118 cbz r0, 2af0 <usart_sync_read+0x14>
2ae8: b1e9 cbz r1, 2b26 <usart_sync_read+0x4a>
2aea: 1e10 subs r0, r2, #0
2aec: bf18 it ne
2aee: 2001 movne r0, #1
2af0: 490e ldr r1, [pc, #56] ; (2b2c <usart_sync_read+0x50>)
2af2: 4b0f ldr r3, [pc, #60] ; (2b30 <usart_sync_read+0x54>)
do {
while (!_usart_sync_is_byte_received(&descr->device))
2af4: f8df 903c ldr.w r9, [pc, #60] ; 2b34 <usart_sync_read+0x58>
;
buf[offset] = _usart_sync_read_byte(&descr->device);
2af8: f8df 803c ldr.w r8, [pc, #60] ; 2b38 <usart_sync_read+0x5c>
ASSERT(io_descr && buf && length);
2afc: f44f 7286 mov.w r2, #268 ; 0x10c
2b00: 4798 blx r3
uint32_t offset = 0;
2b02: 2700 movs r7, #0
while (!_usart_sync_is_byte_received(&descr->device))
2b04: 3408 adds r4, #8
2b06: 4620 mov r0, r4
2b08: 47c8 blx r9
2b0a: 2800 cmp r0, #0
2b0c: d0fb beq.n 2b06 <usart_sync_read+0x2a>
buf[offset] = _usart_sync_read_byte(&descr->device);
2b0e: 4620 mov r0, r4
2b10: 47c0 blx r8
2b12: 55f0 strb r0, [r6, r7]
} while (++offset < length);
2b14: 3701 adds r7, #1
2b16: 42bd cmp r5, r7
2b18: d8f5 bhi.n 2b06 <usart_sync_read+0x2a>
2b1a: 2d00 cmp r5, #0
return (int32_t)offset;
}
2b1c: bf14 ite ne
2b1e: 4628 movne r0, r5
2b20: 2001 moveq r0, #1
2b22: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
ASSERT(io_descr && buf && length);
2b26: 4608 mov r0, r1
2b28: e7e2 b.n 2af0 <usart_sync_read+0x14>
2b2a: bf00 nop
2b2c: 00004fc7 .word 0x00004fc7
2b30: 00002939 .word 0x00002939
2b34: 00003ccf .word 0x00003ccf
2b38: 00003cb3 .word 0x00003cb3
00002b3c <usart_sync_init>:
{
2b3c: b538 push {r3, r4, r5, lr}
2b3e: 460d mov r5, r1
ASSERT(descr && hw);
2b40: 4604 mov r4, r0
2b42: b110 cbz r0, 2b4a <usart_sync_init+0xe>
2b44: 1e08 subs r0, r1, #0
2b46: bf18 it ne
2b48: 2001 movne r0, #1
2b4a: 4907 ldr r1, [pc, #28] ; (2b68 <usart_sync_init+0x2c>)
2b4c: 4b07 ldr r3, [pc, #28] ; (2b6c <usart_sync_init+0x30>)
2b4e: 2234 movs r2, #52 ; 0x34
2b50: 4798 blx r3
init_status = _usart_sync_init(&descr->device, hw);
2b52: 4b07 ldr r3, [pc, #28] ; (2b70 <usart_sync_init+0x34>)
2b54: 4629 mov r1, r5
2b56: f104 0008 add.w r0, r4, #8
2b5a: 4798 blx r3
if (init_status) {
2b5c: b918 cbnz r0, 2b66 <usart_sync_init+0x2a>
descr->io.read = usart_sync_read;
2b5e: 4b05 ldr r3, [pc, #20] ; (2b74 <usart_sync_init+0x38>)
2b60: 6063 str r3, [r4, #4]
descr->io.write = usart_sync_write;
2b62: 4b05 ldr r3, [pc, #20] ; (2b78 <usart_sync_init+0x3c>)
2b64: 6023 str r3, [r4, #0]
}
2b66: bd38 pop {r3, r4, r5, pc}
2b68: 00004fc7 .word 0x00004fc7
2b6c: 00002939 .word 0x00002939
2b70: 00003c6d .word 0x00003c6d
2b74: 00002add .word 0x00002add
2b78: 00002a69 .word 0x00002a69
00002b7c <usart_sync_enable>:
{
2b7c: b510 push {r4, lr}
ASSERT(descr);
2b7e: 4604 mov r4, r0
2b80: 3800 subs r0, #0
2b82: bf18 it ne
2b84: 2001 movne r0, #1
2b86: 4905 ldr r1, [pc, #20] ; (2b9c <usart_sync_enable+0x20>)
2b88: 4b05 ldr r3, [pc, #20] ; (2ba0 <usart_sync_enable+0x24>)
2b8a: 2253 movs r2, #83 ; 0x53
2b8c: 4798 blx r3
_usart_sync_enable(&descr->device);
2b8e: f104 0008 add.w r0, r4, #8
2b92: 4b04 ldr r3, [pc, #16] ; (2ba4 <usart_sync_enable+0x28>)
2b94: 4798 blx r3
}
2b96: 2000 movs r0, #0
2b98: bd10 pop {r4, pc}
2b9a: bf00 nop
2b9c: 00004fc7 .word 0x00004fc7
2ba0: 00002939 .word 0x00002939
2ba4: 00003c99 .word 0x00003c99
00002ba8 <usart_sync_get_io_descriptor>:
{
2ba8: b538 push {r3, r4, r5, lr}
2baa: 460d mov r5, r1
ASSERT(descr && io);
2bac: 4604 mov r4, r0
2bae: b110 cbz r0, 2bb6 <usart_sync_get_io_descriptor+0xe>
2bb0: 1e08 subs r0, r1, #0
2bb2: bf18 it ne
2bb4: 2001 movne r0, #1
2bb6: 4903 ldr r1, [pc, #12] ; (2bc4 <usart_sync_get_io_descriptor+0x1c>)
2bb8: 4b03 ldr r3, [pc, #12] ; (2bc8 <usart_sync_get_io_descriptor+0x20>)
2bba: 2269 movs r2, #105 ; 0x69
2bbc: 4798 blx r3
*io = &descr->io;
2bbe: 602c str r4, [r5, #0]
}
2bc0: 2000 movs r0, #0
2bc2: bd38 pop {r3, r4, r5, pc}
2bc4: 00004fc7 .word 0x00004fc7
2bc8: 00002939 .word 0x00002939
00002bcc <_mclk_init>:
}
static inline void hri_mclk_write_CPUDIV_reg(const void *const hw, hri_mclk_cpudiv_reg_t data)
{
MCLK_CRITICAL_SECTION_ENTER();
((Mclk *)hw)->CPUDIV.reg = data;
2bcc: 4b01 ldr r3, [pc, #4] ; (2bd4 <_mclk_init+0x8>)
2bce: 2201 movs r2, #1
2bd0: 715a strb r2, [r3, #5]
*/
void _mclk_init(void)
{
void *hw = (void *)MCLK;
hri_mclk_write_CPUDIV_reg(hw, MCLK_CPUDIV_DIV(CONF_MCLK_CPUDIV));
}
2bd2: 4770 bx lr
2bd4: 40000800 .word 0x40000800
00002bd8 <RAMECC_Handler>:
return tmp;
}
static inline hri_ramecc_intflag_reg_t hri_ramecc_read_INTFLAG_reg(const void *const hw)
{
return ((Ramecc *)hw)->INTFLAG.reg;
2bd8: 4a0b ldr r2, [pc, #44] ; (2c08 <RAMECC_Handler+0x30>)
2bda: 7893 ldrb r3, [r2, #2]
/**
* \internal RAMECC interrupt handler
*/
void RAMECC_Handler(void)
{
2bdc: b082 sub sp, #8
2bde: b2db uxtb r3, r3
struct _ramecc_device *dev = (struct _ramecc_device *)&device;
volatile uint32_t int_mask = hri_ramecc_read_INTFLAG_reg(RAMECC);
2be0: 9301 str r3, [sp, #4]
if (int_mask & RAMECC_INTFLAG_DUALE && dev->ramecc_cb.dual_bit_err) {
2be2: 9b01 ldr r3, [sp, #4]
2be4: 0799 lsls r1, r3, #30
2be6: d505 bpl.n 2bf4 <RAMECC_Handler+0x1c>
2be8: 4b08 ldr r3, [pc, #32] ; (2c0c <RAMECC_Handler+0x34>)
2bea: 681b ldr r3, [r3, #0]
2bec: b113 cbz r3, 2bf4 <RAMECC_Handler+0x1c>
return tmp;
}
static inline hri_ramecc_erraddr_reg_t hri_ramecc_read_ERRADDR_reg(const void *const hw)
{
return ((Ramecc *)hw)->ERRADDR.reg;
2bee: 6850 ldr r0, [r2, #4]
} else if (int_mask & RAMECC_INTFLAG_SINGLEE && dev->ramecc_cb.single_bit_err) {
dev->ramecc_cb.single_bit_err((uint32_t)hri_ramecc_read_ERRADDR_reg(RAMECC));
} else {
return;
}
}
2bf0: b002 add sp, #8
dev->ramecc_cb.single_bit_err((uint32_t)hri_ramecc_read_ERRADDR_reg(RAMECC));
2bf2: 4718 bx r3
} else if (int_mask & RAMECC_INTFLAG_SINGLEE && dev->ramecc_cb.single_bit_err) {
2bf4: 9b01 ldr r3, [sp, #4]
2bf6: 07db lsls r3, r3, #31
2bf8: d504 bpl.n 2c04 <RAMECC_Handler+0x2c>
2bfa: 4b04 ldr r3, [pc, #16] ; (2c0c <RAMECC_Handler+0x34>)
2bfc: 685b ldr r3, [r3, #4]
2bfe: b10b cbz r3, 2c04 <RAMECC_Handler+0x2c>
2c00: 4a01 ldr r2, [pc, #4] ; (2c08 <RAMECC_Handler+0x30>)
2c02: e7f4 b.n 2bee <RAMECC_Handler+0x16>
}
2c04: b002 add sp, #8
2c06: 4770 bx lr
2c08: 41020000 .word 0x41020000
2c0c: 20000530 .word 0x20000530
00002c10 <usbhc_enum_notify>:
* \param[in] r Pointer to root device instance
* \param[in] status Enumeration notification status code
* \param[in] param The parameter to pass to callback
*/
static void usbhc_enum_notify(struct usbhc_driver *r, usbhc_enum_status_t status, void *param)
{
2c10: b5f8 push {r3, r4, r5, r6, r7, lr}
struct usbhc_enum_handler *em = (struct usbhc_enum_handler *)r->handlers.enum_list.head;
2c12: 6ac4 ldr r4, [r0, #44] ; 0x2c
{
2c14: 4605 mov r5, r0
2c16: 460e mov r6, r1
2c18: 4617 mov r7, r2
while (em != NULL) {
2c1a: b904 cbnz r4, 2c1e <usbhc_enum_notify+0xe>
em->cb(r, status, param);
em = em->next;
}
}
2c1c: bdf8 pop {r3, r4, r5, r6, r7, pc}
em->cb(r, status, param);
2c1e: 6863 ldr r3, [r4, #4]
2c20: 463a mov r2, r7
2c22: 4631 mov r1, r6
2c24: 4628 mov r0, r5
2c26: 4798 blx r3
em = em->next;
2c28: 6824 ldr r4, [r4, #0]
2c2a: e7f6 b.n 2c1a <usbhc_enum_notify+0xa>
00002c2c <usbhc_rsc_notify>:
/**
* \brief Invoke all registered resource waiting callbacks.
* \param[in] r Pointer to root device instance
*/
static void usbhc_rsc_notify(struct usbhc_driver *r)
{
2c2c: b538 push {r3, r4, r5, lr}
struct usbhc_rsc_handler *rsch = (struct usbhc_rsc_handler *)r->handlers.rsc_list.head;
if (r->ctrl_status.bm.ctrl_state != USBHC_IDLE) {
2c2e: f890 303e ldrb.w r3, [r0, #62] ; 0x3e
2c32: 079b lsls r3, r3, #30
{
2c34: 4605 mov r5, r0
if (r->ctrl_status.bm.ctrl_state != USBHC_IDLE) {
2c36: d101 bne.n 2c3c <usbhc_rsc_notify+0x10>
struct usbhc_rsc_handler *rsch = (struct usbhc_rsc_handler *)r->handlers.rsc_list.head;
2c38: 6b44 ldr r4, [r0, #52] ; 0x34
return;
}
// printf("RscAvailable ");
while (rsch != NULL) {
2c3a: b904 cbnz r4, 2c3e <usbhc_rsc_notify+0x12>
rsch->cb(r, USBHC_HDL_EXT_PTR(rsch));
rsch = rsch->next;
}
}
2c3c: bd38 pop {r3, r4, r5, pc}
rsch->cb(r, USBHC_HDL_EXT_PTR(rsch));
2c3e: 6863 ldr r3, [r4, #4]
2c40: 4621 mov r1, r4
2c42: 4628 mov r0, r5
2c44: 4798 blx r3
rsch = rsch->next;
2c46: 6824 ldr r4, [r4, #0]
2c48: e7f7 b.n 2c3a <usbhc_rsc_notify+0xe>
...
00002c4c <_usbhc_get_config_desc>:
* \param[in] cfg_idx Configuration index to get
* \param[in] len Request length
* \return Control request transfer status
*/
static int32_t _usbhc_get_config_desc(struct usbhc_driver *r, uint8_t cfg_idx, uint16_t len)
{
2c4c: b513 push {r0, r1, r4, lr}
struct usb_req *req = CTRL_REQ_PTR(r->ctrl_buf);
2c4e: 6b84 ldr r4, [r0, #56] ; 0x38
req->bmRequestType = USB_REQT_RECIP_DEVICE | USB_REQT_TYPE_STANDARD | USB_REQT_DIR_IN;
2c50: 2380 movs r3, #128 ; 0x80
2c52: 7023 strb r3, [r4, #0]
req->bRequest = USB_REQ_GET_DESC;
2c54: 2306 movs r3, #6
2c56: 7063 strb r3, [r4, #1]
req->wValue = (USB_DT_CONFIG << 8) | cfg_idx;
req->wIndex = 0;
req->wLength = len > 9 ? len : 9;
2c58: 2a09 cmp r2, #9
req->wIndex = 0;
2c5a: f04f 0300 mov.w r3, #0
2c5e: 7123 strb r3, [r4, #4]
2c60: 7163 strb r3, [r4, #5]
req->wLength = len > 9 ? len : 9;
2c62: 4613 mov r3, r2
2c64: bf38 it cc
2c66: 2309 movcc r3, #9
2c68: 80e3 strh r3, [r4, #6]
req->wValue = (USB_DT_CONFIG << 8) | cfg_idx;
2c6a: f441 7100 orr.w r1, r1, #512 ; 0x200
return _usb_h_control_xfer(pipe, setup, data, length, timeout);
2c6e: f44f 73fa mov.w r3, #500 ; 0x1f4
2c72: 8061 strh r1, [r4, #2]
2c74: 9300 str r3, [sp, #0]
2c76: 4621 mov r1, r4
2c78: 4613 mov r3, r2
2c7a: 6a00 ldr r0, [r0, #32]
2c7c: f104 020c add.w r2, r4, #12
2c80: 4c01 ldr r4, [pc, #4] ; (2c88 <_usbhc_get_config_desc+0x3c>)
2c82: 47a0 blx r4
return usb_h_control_xfer(r->rhfunc.pipe_0, (uint8_t *)req, CTRL_DESC_BUF(r->ctrl_buf), len, 500);
}
2c84: b002 add sp, #8
2c86: bd10 pop {r4, pc}
2c88: 000026a1 .word 0x000026a1
00002c8c <_usbhc_set_config>:
{
2c8c: b513 push {r0, r1, r4, lr}
struct usb_req *req = CTRL_REQ_PTR(r->ctrl_buf);
2c8e: 6b84 ldr r4, [r0, #56] ; 0x38
req->bRequest = USB_REQ_SET_CONFIG;
2c90: 2209 movs r2, #9
req->bmRequestType = USB_REQT_RECIP_DEVICE | USB_REQT_TYPE_STANDARD | USB_REQT_DIR_OUT;
2c92: 2300 movs r3, #0
req->bRequest = USB_REQ_SET_CONFIG;
2c94: 7062 strb r2, [r4, #1]
2c96: 2232 movs r2, #50 ; 0x32
req->bmRequestType = USB_REQT_RECIP_DEVICE | USB_REQT_TYPE_STANDARD | USB_REQT_DIR_OUT;
2c98: 7023 strb r3, [r4, #0]
req->wValue = cfg;
2c9a: 8061 strh r1, [r4, #2]
req->wIndex = 0;
2c9c: 7123 strb r3, [r4, #4]
2c9e: 7163 strb r3, [r4, #5]
req->wLength = 0;
2ca0: 71a3 strb r3, [r4, #6]
2ca2: 71e3 strb r3, [r4, #7]
2ca4: 9200 str r2, [sp, #0]
2ca6: 4621 mov r1, r4
2ca8: 461a mov r2, r3
2caa: 4c02 ldr r4, [pc, #8] ; (2cb4 <_usbhc_set_config+0x28>)
2cac: 6a00 ldr r0, [r0, #32]
2cae: 47a0 blx r4
}
2cb0: b002 add sp, #8
2cb2: bd10 pop {r4, pc}
2cb4: 000026a1 .word 0x000026a1
00002cb8 <_usbhc_get_dev_desc>:
{
2cb8: b513 push {r0, r1, r4, lr}
struct usb_req *req = CTRL_REQ_PTR(r->ctrl_buf);
2cba: 6b84 ldr r4, [r0, #56] ; 0x38
req->bmRequestType = USB_REQT_RECIP_DEVICE | USB_REQT_TYPE_STANDARD | USB_REQT_DIR_IN;
2cbc: 2380 movs r3, #128 ; 0x80
2cbe: 7023 strb r3, [r4, #0]
req->bRequest = USB_REQ_GET_DESC;
2cc0: 2306 movs r3, #6
2cc2: 7063 strb r3, [r4, #1]
req->wValue = (USB_DT_DEVICE << 8);
2cc4: 2300 movs r3, #0
2cc6: 70a3 strb r3, [r4, #2]
req->wIndex = 0;
2cc8: 7123 strb r3, [r4, #4]
2cca: 7163 strb r3, [r4, #5]
req->wValue = (USB_DT_DEVICE << 8);
2ccc: 2201 movs r2, #1
2cce: f44f 73fa mov.w r3, #500 ; 0x1f4
2cd2: 70e2 strb r2, [r4, #3]
req->wLength = len;
2cd4: 80e1 strh r1, [r4, #6]
2cd6: 9300 str r3, [sp, #0]
2cd8: f104 020c add.w r2, r4, #12
2cdc: 460b mov r3, r1
2cde: 6a00 ldr r0, [r0, #32]
2ce0: 4621 mov r1, r4
2ce2: 4c02 ldr r4, [pc, #8] ; (2cec <_usbhc_get_dev_desc+0x34>)
2ce4: 47a0 blx r4
}
2ce6: b002 add sp, #8
2ce8: bd10 pop {r4, pc}
2cea: bf00 nop
2cec: 000026a1 .word 0x000026a1
00002cf0 <usbhc_enum_uninstallf>:
* \brief Uninstall all functions on a device
* \param r Pointer to root device instance
* \param d Pointer to device instance
*/
static void usbhc_enum_uninstallf(struct usbhc_driver *r, struct usbhd_driver *d)
{
2cf0: b5f8 push {r3, r4, r5, r6, r7, lr}
struct usbhf_driver *func;
func = d->func.pfunc;
2cf2: 684c ldr r4, [r1, #4]
}
func->pdev = &r->dev;
/* Move function to free list */
d->func.pfunc = func->next.pfunc;
list_insert_as_head(&r->rhfunc.func_list.list, (void *)func);
2cf4: 4f09 ldr r7, [pc, #36] ; (2d1c <usbhc_enum_uninstallf+0x2c>)
{
2cf6: 4606 mov r6, r0
2cf8: 460d mov r5, r1
while (func) {
2cfa: b904 cbnz r4, 2cfe <usbhc_enum_uninstallf+0xe>
/* Check next function */
func = d->func.pfunc;
}
}
2cfc: bdf8 pop {r3, r4, r5, r6, r7, pc}
if (func->ctrl) {
2cfe: 6863 ldr r3, [r4, #4]
2d00: b11b cbz r3, 2d0a <usbhc_enum_uninstallf+0x1a>
func->ctrl(func, USBHF_UNINSTALL, NULL);
2d02: 2200 movs r2, #0
2d04: 2102 movs r1, #2
2d06: 4620 mov r0, r4
2d08: 4798 blx r3
d->func.pfunc = func->next.pfunc;
2d0a: 6823 ldr r3, [r4, #0]
func->pdev = &r->dev;
2d0c: 60a6 str r6, [r4, #8]
list_insert_as_head(&r->rhfunc.func_list.list, (void *)func);
2d0e: 4621 mov r1, r4
d->func.pfunc = func->next.pfunc;
2d10: 606b str r3, [r5, #4]
list_insert_as_head(&r->rhfunc.func_list.list, (void *)func);
2d12: f106 0018 add.w r0, r6, #24
2d16: 47b8 blx r7
func = d->func.pfunc;
2d18: 686c ldr r4, [r5, #4]
2d1a: e7ee b.n 2cfa <usbhc_enum_uninstallf+0xa>
2d1c: 000028e5 .word 0x000028e5
00002d20 <usbhc_request>:
{
2d20: b513 push {r0, r1, r4, lr}
return (ptr[0] + (ptr[1] << 8));
2d22: 798b ldrb r3, [r1, #6]
2d24: 79cc ldrb r4, [r1, #7]
return usb_h_control_xfer(r->rhfunc.pipe_0, req, data, len, (data && len) ? 500 : 50);
2d26: 6a00 ldr r0, [r0, #32]
2d28: eb03 2304 add.w r3, r3, r4, lsl #8
2d2c: b29b uxth r3, r3
2d2e: b14a cbz r2, 2d44 <usbhc_request+0x24>
2d30: 2b00 cmp r3, #0
2d32: bf14 ite ne
2d34: f44f 74fa movne.w r4, #500 ; 0x1f4
2d38: 2432 moveq r4, #50 ; 0x32
2d3a: 9400 str r4, [sp, #0]
2d3c: 4c02 ldr r4, [pc, #8] ; (2d48 <usbhc_request+0x28>)
2d3e: 47a0 blx r4
}
2d40: b002 add sp, #8
2d42: bd10 pop {r4, pc}
return usb_h_control_xfer(r->rhfunc.pipe_0, req, data, len, (data && len) ? 500 : 50);
2d44: 2432 movs r4, #50 ; 0x32
2d46: e7f8 b.n 2d3a <usbhc_request+0x1a>
2d48: 000026a1 .word 0x000026a1
00002d4c <usbhc_release_control>:
if (r) {
2d4c: b128 cbz r0, 2d5a <usbhc_release_control+0xe>
r->ctrl_status.bm.ctrl_state = USBHC_IDLE;
2d4e: f890 303e ldrb.w r3, [r0, #62] ; 0x3e
2d52: f023 0307 bic.w r3, r3, #7
2d56: f880 303e strb.w r3, [r0, #62] ; 0x3e
}
2d5a: 4770 bx lr
00002d5c <usbhc_enum_fail>:
* \param r Pointer to root device instance
* \param[in] status Enumeration status code
* \param[in] param Callback parameter
*/
static void usbhc_enum_fail(struct usbhc_driver *r, usbhc_enum_status_t status, void *param)
{
2d5c: b570 push {r4, r5, r6, lr}
/* Free control resources */
usbhc_release_control(r);
2d5e: 4b12 ldr r3, [pc, #72] ; (2da8 <usbhc_enum_fail+0x4c>)
2d60: 4798 blx r3
if (status < USBHC_ENUM_IO_FAIL) {
2d62: 2906 cmp r1, #6
{
2d64: 4606 mov r6, r0
2d66: 460d mov r5, r1
2d68: 4614 mov r4, r2
if (status < USBHC_ENUM_IO_FAIL) {
2d6a: d819 bhi.n 2da0 <usbhc_enum_fail+0x44>
struct usbhd_driver *d = USBHD_PTR(param);
/* Uninstall function drivers */
usbhc_enum_uninstallf(r, d);
2d6c: 4b0f ldr r3, [pc, #60] ; (2dac <usbhc_enum_fail+0x50>)
2d6e: 4611 mov r1, r2
2d70: 4798 blx r3
/* Device is fail */
if (status < USBHC_ENUM_UNSUPPORTED) { /* It's not accessible */
2d72: 2d02 cmp r5, #2
d->status.value = USBHC_DEV_FAILED;
2d74: bf04 itt eq
2d76: 2304 moveq r3, #4
2d78: 7423 strbeq r3, [r4, #16]
}
if (d->status.bm.state >= USBHC_DEV_ADDRESS) {
2d7a: 7c23 ldrb r3, [r4, #16]
2d7c: f003 030f and.w r3, r3, #15
2d80: 2b04 cmp r3, #4
2d82: d903 bls.n 2d8c <usbhc_enum_fail+0x30>
d->status.bm.usable = 1; /* It's still usable */
2d84: 7c23 ldrb r3, [r4, #16]
2d86: f043 0310 orr.w r3, r3, #16
}
} else if (status == USBHC_ENUM_IO_FAIL) {
struct usbhd_driver *d = USBHD_PTR(param);
d->status.value = USBHC_DEV_FAILED;
2d8a: 7423 strb r3, [r4, #16]
}
usbhc_enum_notify(r, status, param);
2d8c: 4630 mov r0, r6
2d8e: 4b08 ldr r3, [pc, #32] ; (2db0 <usbhc_enum_fail+0x54>)
2d90: 4622 mov r2, r4
2d92: 4629 mov r1, r5
2d94: 4798 blx r3
/** Resource may be available */
usbhc_rsc_notify(r);
2d96: 4630 mov r0, r6
2d98: 4b06 ldr r3, [pc, #24] ; (2db4 <usbhc_enum_fail+0x58>)
}
2d9a: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
usbhc_rsc_notify(r);
2d9e: 4718 bx r3
} else if (status == USBHC_ENUM_IO_FAIL) {
2da0: 2907 cmp r1, #7
2da2: d1f3 bne.n 2d8c <usbhc_enum_fail+0x30>
d->status.value = USBHC_DEV_FAILED;
2da4: 2304 movs r3, #4
2da6: e7f0 b.n 2d8a <usbhc_enum_fail+0x2e>
2da8: 00002d4d .word 0x00002d4d
2dac: 00002cf1 .word 0x00002cf1
2db0: 00002c11 .word 0x00002c11
2db4: 00002c2d .word 0x00002c2d
00002db8 <usbhc_rh_change_cb>:
/**
* \brief Callback invoked on root hub changes detected
* \param hcd Pointer to host controller driver
*/
static void usbhc_rh_change_cb(struct usb_h_desc *hcd, uint8_t port, uint8_t ftr)
{
2db8: b5f0 push {r4, r5, r6, r7, lr}
struct usbhc_driver *r = USBHC_PTR(hcd->owner);
2dba: 6984 ldr r4, [r0, #24]
int32_t status;
/* Hub feature/status change has been cleared before notification */
/* It's end of hub driver request, take control by core */
r->ctrl_status.bm.ctrl_state = USBHC_USED_BY_CORE;
2dbc: f894 303e ldrb.w r3, [r4, #62] ; 0x3e
{
2dc0: 460d mov r5, r1
r->ctrl_status.bm.ctrl_state = USBHC_USED_BY_CORE;
2dc2: 2101 movs r1, #1
2dc4: f361 0301 bfi r3, r1, #0, #2
{
2dc8: b085 sub sp, #20
2dca: 4606 mov r6, r0
r->ctrl_status.bm.ctrl_state = USBHC_USED_BY_CORE;
2dcc: f884 303e strb.w r3, [r4, #62] ; 0x3e
/* Handle the feature changes */
switch (ftr) {
2dd0: 2a04 cmp r2, #4
2dd2: f200 80b8 bhi.w 2f46 <usbhc_rh_change_cb+0x18e>
2dd6: e8df f002 tbb [pc, r2]
2dda: b603 .short 0xb603
2ddc: a994 .short 0xa994
2dde: 29 .byte 0x29
2ddf: 00 .byte 0x00
return _usb_h_rh_check_status(drv, port, ftr);
2de0: 4b5a ldr r3, [pc, #360] ; (2f4c <usbhc_rh_change_cb+0x194>)
2de2: 2200 movs r2, #0
2de4: 4629 mov r1, r5
2de6: 4798 blx r3
if (status) {
2de8: 4606 mov r6, r0
2dea: b160 cbz r0, 2e06 <usbhc_rh_change_cb+0x4e>
r->ctrl_status.bm.pending_enum = 1;
2dec: f894 303e ldrb.w r3, [r4, #62] ; 0x3e
_usb_h_rh_reset(drv, port);
2df0: 6960 ldr r0, [r4, #20]
2df2: f043 0304 orr.w r3, r3, #4
2df6: f884 303e strb.w r3, [r4, #62] ; 0x3e
2dfa: 4b55 ldr r3, [pc, #340] ; (2f50 <usbhc_rh_change_cb+0x198>)
2dfc: 4629 mov r1, r5
case PORT_OVER_CURRENT:
usbhc_port_overcurr_handler(USBHD_PTR(r), port);
default:
break;
}
}
2dfe: b005 add sp, #20
2e00: e8bd 40f0 ldmia.w sp!, {r4, r5, r6, r7, lr}
2e04: 4718 bx r3
if (r->dev.hub_port != port) { /* Must registered */
2e06: 7ba3 ldrb r3, [r4, #14]
2e08: 42ab cmp r3, r5
2e0a: 4b52 ldr r3, [pc, #328] ; (2f54 <usbhc_rh_change_cb+0x19c>)
2e0c: f040 8096 bne.w 2f3c <usbhc_rh_change_cb+0x184>
usbhc_enum_uninstallf(r, d);
2e10: 4621 mov r1, r4
2e12: 4620 mov r0, r4
2e14: 4798 blx r3
r->rhfunc.power -= d->cfg_power;
2e16: 7a62 ldrb r2, [r4, #9]
2e18: 8ca3 ldrh r3, [r4, #36] ; 0x24
d->status.value = USBHC_DEV_DISCONNECT;
2e1a: 7426 strb r6, [r4, #16]
r->rhfunc.power -= d->cfg_power;
2e1c: 1a9b subs r3, r3, r2
2e1e: 84a3 strh r3, [r4, #36] ; 0x24
d->hub_port = 0;
2e20: 73a6 strb r6, [r4, #14]
usbhc_enum_notify(r, USBHC_ENUM_DISCONNECTED, (void *)d);
2e22: 4622 mov r2, r4
2e24: 2101 movs r1, #1
usbhc_enum_notify(usbhc_find_root(hub), USBHC_ENUM_OVERCURRENT, (void *)dev);
2e26: 4b4c ldr r3, [pc, #304] ; (2f58 <usbhc_rh_change_cb+0x1a0>)
2e28: 4610 mov r0, r2
2e2a: e064 b.n 2ef6 <usbhc_rh_change_cb+0x13e>
return _usb_h_rh_check_status(drv, port, ftr);
2e2c: 4f47 ldr r7, [pc, #284] ; (2f4c <usbhc_rh_change_cb+0x194>)
2e2e: 2209 movs r2, #9
2e30: 4629 mov r1, r5
2e32: 47b8 blx r7
: (usb_h_rh_check_status(hcd, port, PORT_HIGH_SPEED) ? USB_SPEED_HS : USB_SPEED_FS);
2e34: bb30 cbnz r0, 2e84 <usbhc_rh_change_cb+0xcc>
2e36: 220a movs r2, #10
2e38: 4629 mov r1, r5
2e3a: 4630 mov r0, r6
2e3c: 47b8 blx r7
2e3e: 2800 cmp r0, #0
2e40: bf14 ite ne
2e42: 2202 movne r2, #2
2e44: 2201 moveq r2, #1
if (r->dev.hub_port != port) { /* Must registered */
2e46: 7ba3 ldrb r3, [r4, #14]
2e48: 42ab cmp r3, r5
2e4a: d11d bne.n 2e88 <usbhc_rh_change_cb+0xd0>
if (hub->dev_type == USBHC_ROOT) {
2e4c: 7be3 ldrb r3, [r4, #15]
2e4e: 079b lsls r3, r3, #30
2e50: d103 bne.n 2e5a <usbhc_rh_change_cb+0xa2>
r->rhfunc.power -= dev->cfg_power;
2e52: 8ca3 ldrh r3, [r4, #36] ; 0x24
2e54: 7a62 ldrb r2, [r4, #9]
2e56: 1a9b subs r3, r3, r2
2e58: 84a3 strh r3, [r4, #36] ; 0x24
if (r->rhfunc.pipe_0 == NULL) {
2e5a: 6a22 ldr r2, [r4, #32]
2e5c: bb0a cbnz r2, 2ea2 <usbhc_rh_change_cb+0xea>
return _usb_h_pipe_allocate(drv, dev, ep, max_pkt_size, attr, interval, speed, minimum_rsc);
2e5e: 2301 movs r3, #1
2e60: 9303 str r3, [sp, #12]
r->rhfunc.pipe_0 = usb_h_pipe_allocate(r->hcd, 0, 0, EP0_SIZE_DEFAULT, 0, 0, dev->speed, true);
2e62: 7be3 ldrb r3, [r4, #15]
2e64: 9200 str r2, [sp, #0]
2e66: f3c3 0381 ubfx r3, r3, #2, #2
2e6a: e9cd 2301 strd r2, r3, [sp, #4]
2e6e: 4611 mov r1, r2
2e70: 6960 ldr r0, [r4, #20]
2e72: 4d3a ldr r5, [pc, #232] ; (2f5c <usbhc_rh_change_cb+0x1a4>)
2e74: 2340 movs r3, #64 ; 0x40
2e76: 47a8 blx r5
2e78: 4602 mov r2, r0
2e7a: 6220 str r0, [r4, #32]
if (r->rhfunc.pipe_0 == NULL) {
2e7c: b970 cbnz r0, 2e9c <usbhc_rh_change_cb+0xe4>
usbhc_enum_fail(r, USBHC_ENUM_HAL_LIMIT, NULL);
2e7e: 2109 movs r1, #9
2e80: 4620 mov r0, r4
2e82: e037 b.n 2ef4 <usbhc_rh_change_cb+0x13c>
: (usb_h_rh_check_status(hcd, port, PORT_HIGH_SPEED) ? USB_SPEED_HS : USB_SPEED_FS);
2e84: 2200 movs r2, #0
2e86: e7de b.n 2e46 <usbhc_rh_change_cb+0x8e>
dev->ep0_size = EP0_SIZE_DEFAULT;
2e88: 2340 movs r3, #64 ; 0x40
2e8a: 7323 strb r3, [r4, #12]
dev->cfg_total = sizeof(usb_config_desc_t);
2e8c: 2309 movs r3, #9
2e8e: 8163 strh r3, [r4, #10]
dev->speed = status;
2e90: 7be3 ldrb r3, [r4, #15]
dev->hub_port = port;
2e92: 73a5 strb r5, [r4, #14]
dev->speed = status;
2e94: f362 0383 bfi r3, r2, #2, #2
2e98: 73e3 strb r3, [r4, #15]
2e9a: e7de b.n 2e5a <usbhc_rh_change_cb+0xa2>
return _usb_h_pipe_register_callback(pipe, cb);
2e9c: 4930 ldr r1, [pc, #192] ; (2f60 <usbhc_rh_change_cb+0x1a8>)
2e9e: 4b31 ldr r3, [pc, #196] ; (2f64 <usbhc_rh_change_cb+0x1ac>)
2ea0: 4798 blx r3
rc = usb_h_pipe_set_control_param(r->rhfunc.pipe_0, 0, 0, dev->ep0_size, dev->speed);
2ea2: 7be2 ldrb r2, [r4, #15]
return _usb_h_pipe_set_control_param(pipe, dev, ep, max_pkt_size, speed);
2ea4: 4e30 ldr r6, [pc, #192] ; (2f68 <usbhc_rh_change_cb+0x1b0>)
dev->cfg_power = 0;
2ea6: 2500 movs r5, #0
dev->status.value = USBHC_DEV_DEFAULT;
2ea8: 2303 movs r3, #3
2eaa: f3c2 0281 ubfx r2, r2, #2, #2
2eae: 7423 strb r3, [r4, #16]
dev->cfg_power = 0;
2eb0: 7265 strb r5, [r4, #9]
2eb2: 7b23 ldrb r3, [r4, #12]
2eb4: 9200 str r2, [sp, #0]
2eb6: 4629 mov r1, r5
2eb8: 6a20 ldr r0, [r4, #32]
2eba: 462a mov r2, r5
2ebc: 47b0 blx r6
if (rc == ERR_NONE) {
2ebe: 4601 mov r1, r0
2ec0: b9e8 cbnz r0, 2efe <usbhc_rh_change_cb+0x146>
if (dev->speed > USB_SPEED_LS) {
2ec2: 7be3 ldrb r3, [r4, #15]
2ec4: f013 0f0c tst.w r3, #12
2ec8: d009 beq.n 2ede <usbhc_rh_change_cb+0x126>
r->enum_delay = 50;
2eca: 2332 movs r3, #50 ; 0x32
2ecc: f884 303f strb.w r3, [r4, #63] ; 0x3f
return _usb_h_register_callback(drv, type, cb);
2ed0: 4a26 ldr r2, [pc, #152] ; (2f6c <usbhc_rh_change_cb+0x1b4>)
2ed2: 6960 ldr r0, [r4, #20]
2ed4: 4b26 ldr r3, [pc, #152] ; (2f70 <usbhc_rh_change_cb+0x1b8>)
}
2ed6: b005 add sp, #20
2ed8: e8bd 40f0 ldmia.w sp!, {r4, r5, r6, r7, lr}
2edc: 4718 bx r3
rc = _usbhc_get_dev_desc(r, (dev->ep0_size >= 18) ? 18 : dev->ep0_size);
2ede: 7b21 ldrb r1, [r4, #12]
2ee0: 4b24 ldr r3, [pc, #144] ; (2f74 <usbhc_rh_change_cb+0x1bc>)
2ee2: 2912 cmp r1, #18
2ee4: bf28 it cs
2ee6: 2112 movcs r1, #18
2ee8: 4620 mov r0, r4
2eea: 4798 blx r3
if (rc != ERR_NONE) {
2eec: b358 cbz r0, 2f46 <usbhc_rh_change_cb+0x18e>
usbhc_enum_fail(r, USBHC_ENUM_FAIL, (void *)dev);
2eee: 4622 mov r2, r4
2ef0: 2105 movs r1, #5
2ef2: 4620 mov r0, r4
2ef4: 4b20 ldr r3, [pc, #128] ; (2f78 <usbhc_rh_change_cb+0x1c0>)
}
2ef6: b005 add sp, #20
2ef8: e8bd 40f0 ldmia.w sp!, {r4, r5, r6, r7, lr}
usbhc_enum_notify(usbhc_find_root(hub), USBHC_ENUM_OVERCURRENT, (void *)dev);
2efc: 4718 bx r3
usbhc_enum_fail(r, USBHC_ENUM_HAL_LIMIT, NULL);
2efe: 462a mov r2, r5
2f00: e7bd b.n 2e7e <usbhc_rh_change_cb+0xc6>
return _usb_h_rh_check_status(drv, port, ftr);
2f02: 4b12 ldr r3, [pc, #72] ; (2f4c <usbhc_rh_change_cb+0x194>)
2f04: 2202 movs r2, #2
2f06: 4629 mov r1, r5
2f08: 4798 blx r3
if (r->dev.hub_port != port) { /* Must registered */
2f0a: 7ba3 ldrb r3, [r4, #14]
2f0c: 42ab cmp r3, r5
2f0e: d11a bne.n 2f46 <usbhc_rh_change_cb+0x18e>
if (status) {
2f10: 4d11 ldr r5, [pc, #68] ; (2f58 <usbhc_rh_change_cb+0x1a0>)
dev->status.bm.suspend = true;
2f12: 7c23 ldrb r3, [r4, #16]
if (status) {
2f14: b138 cbz r0, 2f26 <usbhc_rh_change_cb+0x16e>
dev->status.bm.suspend = true;
2f16: f043 0320 orr.w r3, r3, #32
dev->status.bm.suspend = false;
2f1a: 7423 strb r3, [r4, #16]
usbhc_enum_notify(usbhc_find_root(hub), USBHC_ENUM_SUSPEND_CHG, (void *)dev);
2f1c: 4622 mov r2, r4
2f1e: 2106 movs r1, #6
2f20: 4620 mov r0, r4
2f22: 462b mov r3, r5
2f24: e7e7 b.n 2ef6 <usbhc_rh_change_cb+0x13e>
dev->status.bm.suspend = false;
2f26: f360 1345 bfi r3, r0, #5, #1
2f2a: e7f6 b.n 2f1a <usbhc_rh_change_cb+0x162>
if (r->dev.hub_port != port) { /* Must registered */
2f2c: 7ba3 ldrb r3, [r4, #14]
2f2e: 42ab cmp r3, r5
2f30: d109 bne.n 2f46 <usbhc_rh_change_cb+0x18e>
dev->status.value = USBHC_DEV_FAILED; /* Device is over current */
2f32: 2304 movs r3, #4
2f34: 7423 strb r3, [r4, #16]
usbhc_enum_notify(usbhc_find_root(hub), USBHC_ENUM_OVERCURRENT, (void *)dev);
2f36: 4622 mov r2, r4
2f38: 2102 movs r1, #2
2f3a: e774 b.n 2e26 <usbhc_rh_change_cb+0x6e>
usbhc_enum_uninstallf(r, d);
2f3c: 4601 mov r1, r0
2f3e: 4620 mov r0, r4
2f40: 4798 blx r3
r->rhfunc.power -= d->cfg_power;
2f42: 7a73 ldrb r3, [r6, #9]
2f44: deff udf #255 ; 0xff
}
2f46: b005 add sp, #20
2f48: bdf0 pop {r4, r5, r6, r7, pc}
2f4a: bf00 nop
2f4c: 0000223f .word 0x0000223f
2f50: 00002231 .word 0x00002231
2f54: 00002cf1 .word 0x00002cf1
2f58: 00002c11 .word 0x00002c11
2f5c: 00002299 .word 0x00002299
2f60: 00002fed .word 0x00002fed
2f64: 0000267d .word 0x0000267d
2f68: 00002551 .word 0x00002551
2f6c: 00002f7d .word 0x00002f7d
2f70: 00001a29 .word 0x00001a29
2f74: 00002cb9 .word 0x00002cb9
2f78: 00002d5d .word 0x00002d5d
00002f7c <usbhc_sof_cb>:
{
2f7c: b538 push {r3, r4, r5, lr}
struct usbhc_driver *r = USBHC_PTR(hcd->owner);
2f7e: 6984 ldr r4, [r0, #24]
if (r->enum_delay) {
2f80: f894 103f ldrb.w r1, [r4, #63] ; 0x3f
2f84: b1d9 cbz r1, 2fbe <usbhc_sof_cb+0x42>
r->enum_delay--;
2f86: 3901 subs r1, #1
2f88: b2c9 uxtb r1, r1
2f8a: f884 103f strb.w r1, [r4, #63] ; 0x3f
if (r->enum_delay == 0) {
2f8e: b9b1 cbnz r1, 2fbe <usbhc_sof_cb+0x42>
int32_t rc = (r->dev.status.value < USBHC_DEV_ADDRESS)
2f90: 7c23 ldrb r3, [r4, #16]
: _usbhc_get_config_desc(r, 0, r->dev.cfg_total);
2f92: 2b04 cmp r3, #4
2f94: d816 bhi.n 2fc4 <usbhc_sof_cb+0x48>
? _usbhc_get_dev_desc(r, (r->dev.ep0_size >= 18) ? 18 : r->dev.ep0_size)
2f96: 7b21 ldrb r1, [r4, #12]
2f98: 4b10 ldr r3, [pc, #64] ; (2fdc <usbhc_sof_cb+0x60>)
2f9a: 2912 cmp r1, #18
2f9c: bf28 it cs
2f9e: 2112 movcs r1, #18
2fa0: 4620 mov r0, r4
2fa2: 4798 blx r3
if (r->handlers.sof_list.head == NULL) {
2fa4: 6aa2 ldr r2, [r4, #40] ; 0x28
: _usbhc_get_config_desc(r, 0, r->dev.cfg_total);
2fa6: 4605 mov r5, r0
if (r->handlers.sof_list.head == NULL) {
2fa8: b91a cbnz r2, 2fb2 <usbhc_sof_cb+0x36>
return _usb_h_register_callback(drv, type, cb);
2faa: 6960 ldr r0, [r4, #20]
2fac: 4b0c ldr r3, [pc, #48] ; (2fe0 <usbhc_sof_cb+0x64>)
2fae: 4611 mov r1, r2
2fb0: 4798 blx r3
if (rc != ERR_NONE) {
2fb2: b125 cbz r5, 2fbe <usbhc_sof_cb+0x42>
usbhc_enum_fail(r, USBHC_ENUM_FAIL, (void *)&r->dev);
2fb4: 4b0b ldr r3, [pc, #44] ; (2fe4 <usbhc_sof_cb+0x68>)
2fb6: 4622 mov r2, r4
2fb8: 2105 movs r1, #5
2fba: 4620 mov r0, r4
2fbc: 4798 blx r3
struct usbhc_sof_handler *sof = (struct usbhc_sof_handler *)r->handlers.sof_list.head;
2fbe: 6aa5 ldr r5, [r4, #40] ; 0x28
while (sof != NULL) {
2fc0: b92d cbnz r5, 2fce <usbhc_sof_cb+0x52>
}
2fc2: bd38 pop {r3, r4, r5, pc}
: _usbhc_get_config_desc(r, 0, r->dev.cfg_total);
2fc4: 8962 ldrh r2, [r4, #10]
2fc6: 4b08 ldr r3, [pc, #32] ; (2fe8 <usbhc_sof_cb+0x6c>)
2fc8: 4620 mov r0, r4
2fca: 4798 blx r3
2fcc: e7ea b.n 2fa4 <usbhc_sof_cb+0x28>
sof->cb(r, USBHC_HDL_EXT_PTR(sof));
2fce: 686b ldr r3, [r5, #4]
2fd0: 4629 mov r1, r5
2fd2: 4620 mov r0, r4
2fd4: 4798 blx r3
sof = sof->next;
2fd6: 682d ldr r5, [r5, #0]
2fd8: e7f2 b.n 2fc0 <usbhc_sof_cb+0x44>
2fda: bf00 nop
2fdc: 00002cb9 .word 0x00002cb9
2fe0: 00001a29 .word 0x00001a29
2fe4: 00002d5d .word 0x00002d5d
2fe8: 00002c4d .word 0x00002c4d
00002fec <usbhc_pipe_0_xfer_done>:
{
2fec: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
if (pipe->ep != 0) {
2ff0: 7bc6 ldrb r6, [r0, #15]
{
2ff2: b085 sub sp, #20
if (pipe->ep != 0) {
2ff4: 2e00 cmp r6, #0
2ff6: d178 bne.n 30ea <usbhc_pipe_0_xfer_done+0xfe>
struct usbhc_driver *r = USBHC_PTR(pipe->hcd->owner);
2ff8: 6803 ldr r3, [r0, #0]
2ffa: 699c ldr r4, [r3, #24]
if (r->ctrl_status.bm.ctrl_state == USBHC_USED_BY_CORE) {
2ffc: f894 303e ldrb.w r3, [r4, #62] ; 0x3e
3000: f003 0303 and.w r3, r3, #3
3004: 2b01 cmp r3, #1
3006: f040 80f4 bne.w 31f2 <usbhc_pipe_0_xfer_done+0x206>
if (pipe->x.general.status < 0) {
300a: f990 3027 ldrsb.w r3, [r0, #39] ; 0x27
300e: 2b00 cmp r3, #0
3010: da07 bge.n 3022 <usbhc_pipe_0_xfer_done+0x36>
usbhc_enum_fail(r, USBHC_ENUM_IO_FAIL, (void *)d);
3012: 4622 mov r2, r4
3014: 2107 movs r1, #7
usbhc_enum_fail(r, USBHC_ENUM_FAIL, (void *)d);
3016: 4610 mov r0, r2
3018: 4b7c ldr r3, [pc, #496] ; (320c <usbhc_pipe_0_xfer_done+0x220>)
}
301a: b005 add sp, #20
301c: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
usbhc_enum_fail(r, USBHC_ENUM_FAIL, (void *)d);
3020: 4718 bx r3
struct usb_req * req = CTRL_REQ_PTR(r->ctrl_buf);
3022: 6ba5 ldr r5, [r4, #56] ; 0x38
switch (req->bRequest) {
3024: 786f ldrb r7, [r5, #1]
3026: 2f06 cmp r7, #6
3028: d01b beq.n 3062 <usbhc_pipe_0_xfer_done+0x76>
302a: 2f09 cmp r7, #9
302c: f000 80c7 beq.w 31be <usbhc_pipe_0_xfer_done+0x1d2>
3030: 2f05 cmp r7, #5
3032: d15a bne.n 30ea <usbhc_pipe_0_xfer_done+0xfe>
rc = usb_h_pipe_set_control_param(r->rhfunc.pipe_0, d->dev_addr, 0, d->ep0_size, d->speed);
3034: 7be2 ldrb r2, [r4, #15]
return _usb_h_pipe_set_control_param(pipe, dev, ep, max_pkt_size, speed);
3036: 7b23 ldrb r3, [r4, #12]
3038: 7b61 ldrb r1, [r4, #13]
d->status.value = USBHC_DEV_ADDRESS;
303a: 7427 strb r7, [r4, #16]
303c: f3c2 0281 ubfx r2, r2, #2, #2
3040: 9200 str r2, [sp, #0]
3042: 6a20 ldr r0, [r4, #32]
3044: 4d72 ldr r5, [pc, #456] ; (3210 <usbhc_pipe_0_xfer_done+0x224>)
3046: 4632 mov r2, r6
3048: 47a8 blx r5
if (rc < 0) {
304a: 2800 cmp r0, #0
304c: db14 blt.n 3078 <usbhc_pipe_0_xfer_done+0x8c>
return _usb_h_register_callback(drv, type, cb);
304e: 4a71 ldr r2, [pc, #452] ; (3214 <usbhc_pipe_0_xfer_done+0x228>)
3050: 6960 ldr r0, [r4, #20]
3052: 4b71 ldr r3, [pc, #452] ; (3218 <usbhc_pipe_0_xfer_done+0x22c>)
r->enum_delay = 5;
3054: f884 703f strb.w r7, [r4, #63] ; 0x3f
3058: 4631 mov r1, r6
}
305a: b005 add sp, #20
305c: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
3060: 4718 bx r3
uint16_t req_type = req->wValue >> 8;
3062: 8869 ldrh r1, [r5, #2]
3064: 0a09 lsrs r1, r1, #8
if (req_type == USB_DT_DEVICE) {
3066: 2901 cmp r1, #1
3068: d142 bne.n 30f0 <usbhc_pipe_0_xfer_done+0x104>
if (r->rhfunc.pipe_0->x.ctrl.status != ERR_NONE || r->rhfunc.pipe_0->x.ctrl.count < 8) {
306a: 6a20 ldr r0, [r4, #32]
306c: f990 3027 ldrsb.w r3, [r0, #39] ; 0x27
3070: b913 cbnz r3, 3078 <usbhc_pipe_0_xfer_done+0x8c>
3072: 8bc2 ldrh r2, [r0, #30]
3074: 2a07 cmp r2, #7
3076: d802 bhi.n 307e <usbhc_pipe_0_xfer_done+0x92>
usbhc_enum_fail(r, USBHC_ENUM_FAIL, (void *)d);
3078: 4622 mov r2, r4
307a: 2105 movs r1, #5
307c: e7cb b.n 3016 <usbhc_pipe_0_xfer_done+0x2a>
uint8_t bMaxPackSize0 = dev_desc[7];
307e: 7cef ldrb r7, [r5, #19]
d->ep0_size = bMaxPackSize0;
3080: 7327 strb r7, [r4, #12]
if (r->rhfunc.pipe_0->x.ctrl.count < sizeof(usb_dev_desc_t)) {
3082: 2a11 cmp r2, #17
3084: d814 bhi.n 30b0 <usbhc_pipe_0_xfer_done+0xc4>
r->rhfunc.pipe_0, r->rhfunc.pipe_0->dev, r->rhfunc.pipe_0->ep, bMaxPackSize0, r->dev.speed);
3086: 7be6 ldrb r6, [r4, #15]
return _usb_h_pipe_set_control_param(pipe, dev, ep, max_pkt_size, speed);
3088: 7bc2 ldrb r2, [r0, #15]
308a: 7b81 ldrb r1, [r0, #14]
308c: f3c6 0681 ubfx r6, r6, #2, #2
3090: 9600 str r6, [sp, #0]
3092: 463b mov r3, r7
3094: 4e5e ldr r6, [pc, #376] ; (3210 <usbhc_pipe_0_xfer_done+0x224>)
3096: 47b0 blx r6
if (rc == ERR_NONE) {
3098: b918 cbnz r0, 30a2 <usbhc_pipe_0_xfer_done+0xb6>
rc = _usbhc_get_dev_desc(r, sizeof(usb_dev_desc_t));
309a: 4b60 ldr r3, [pc, #384] ; (321c <usbhc_pipe_0_xfer_done+0x230>)
309c: 2112 movs r1, #18
309e: 4620 mov r0, r4
30a0: 4798 blx r3
if (rc < 0) {
30a2: 2800 cmp r0, #0
30a4: da21 bge.n 30ea <usbhc_pipe_0_xfer_done+0xfe>
usbhc_enum_fail(r, USBHC_ENUM_HAL_LIMIT, (void *)dev_desc);
30a6: f105 020c add.w r2, r5, #12
30aa: 2109 movs r1, #9
30ac: 4620 mov r0, r4
30ae: e7b3 b.n 3018 <usbhc_pipe_0_xfer_done+0x2c>
CTRL_VID_BUF(r->ctrl_buf)[0] = dev_desc[8];
30b0: 7d2a ldrb r2, [r5, #20]
30b2: 722a strb r2, [r5, #8]
CTRL_VID_BUF(r->ctrl_buf)[1] = dev_desc[9];
30b4: 6ba2 ldr r2, [r4, #56] ; 0x38
30b6: 7d69 ldrb r1, [r5, #21]
30b8: 7251 strb r1, [r2, #9]
CTRL_PID_BUF(r->ctrl_buf)[0] = dev_desc[10];
30ba: 6ba2 ldr r2, [r4, #56] ; 0x38
30bc: 7da9 ldrb r1, [r5, #22]
30be: 7291 strb r1, [r2, #10]
CTRL_PID_BUF(r->ctrl_buf)[1] = dev_desc[11];
30c0: 6ba2 ldr r2, [r4, #56] ; 0x38
30c2: 7de9 ldrb r1, [r5, #23]
30c4: 72d1 strb r1, [r2, #11]
struct usb_req *req = CTRL_REQ_PTR(r->ctrl_buf);
30c6: 6ba1 ldr r1, [r4, #56] ; 0x38
rc = usbhc_set_address(r, d->dev_addr);
30c8: 7b62 ldrb r2, [r4, #13]
req->wValue = addr;
30ca: 804a strh r2, [r1, #2]
req->bRequest = USB_REQ_SET_ADDRESS;
30cc: 2505 movs r5, #5
return _usb_h_control_xfer(pipe, setup, data, length, timeout);
30ce: 2232 movs r2, #50 ; 0x32
req->bmRequestType = USB_REQT_RECIP_DEVICE | USB_REQT_TYPE_STANDARD | USB_REQT_DIR_OUT;
30d0: 700b strb r3, [r1, #0]
req->bRequest = USB_REQ_SET_ADDRESS;
30d2: 704d strb r5, [r1, #1]
req->wIndex = 0;
30d4: 710b strb r3, [r1, #4]
30d6: 714b strb r3, [r1, #5]
req->wLength = 0;
30d8: 718b strb r3, [r1, #6]
30da: 71cb strb r3, [r1, #7]
30dc: 9200 str r2, [sp, #0]
30de: 6a20 ldr r0, [r4, #32]
30e0: 4e4f ldr r6, [pc, #316] ; (3220 <usbhc_pipe_0_xfer_done+0x234>)
30e2: 461a mov r2, r3
30e4: 47b0 blx r6
if (rc < 0) {
30e6: 2800 cmp r0, #0
30e8: dbc6 blt.n 3078 <usbhc_pipe_0_xfer_done+0x8c>
}
30ea: b005 add sp, #20
30ec: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
} else if (req_type == USB_DT_CONFIG) {
30f0: 2902 cmp r1, #2
30f2: d1fa bne.n 30ea <usbhc_pipe_0_xfer_done+0xfe>
if (r->rhfunc.pipe_0->x.ctrl.count < sizeof(usb_config_desc_t)) {
30f4: 6a23 ldr r3, [r4, #32]
30f6: 8bdb ldrh r3, [r3, #30]
30f8: 2b08 cmp r3, #8
30fa: d9bd bls.n 3078 <usbhc_pipe_0_xfer_done+0x8c>
} else if (r->rhfunc.pipe_0->x.ctrl.count == sizeof(usb_config_desc_t)) {
30fc: 2b09 cmp r3, #9
30fe: d10e bne.n 311e <usbhc_pipe_0_xfer_done+0x132>
d->cfg_total = cfg->wTotalLength;
3100: 89eb ldrh r3, [r5, #14]
3102: 8163 strh r3, [r4, #10]
3104: b29a uxth r2, r3
if (d->cfg_total > r->ctrl_buf_size - sizeof(usb_req_t)) {
3106: 8fa3 ldrh r3, [r4, #60] ; 0x3c
3108: 3b08 subs r3, #8
310a: 429a cmp r2, r3
310c: d902 bls.n 3114 <usbhc_pipe_0_xfer_done+0x128>
usbhc_enum_fail(r, USBHC_ENUM_MEM_LIMIT, (void *)d);
310e: 4622 mov r2, r4
3110: 2104 movs r1, #4
3112: e780 b.n 3016 <usbhc_pipe_0_xfer_done+0x2a>
rc = _usbhc_get_config_desc(r, 0, d->cfg_total);
3114: 4b43 ldr r3, [pc, #268] ; (3224 <usbhc_pipe_0_xfer_done+0x238>)
3116: 4631 mov r1, r6
3118: 4620 mov r0, r4
311a: 4798 blx r3
311c: e7e3 b.n 30e6 <usbhc_pipe_0_xfer_done+0xfa>
d->cfg_power = cfg->bMaxPower;
311e: 7d2a ldrb r2, [r5, #20]
if (r->rhfunc.power + d->cfg_power > POWER_MAX) {
3120: 8ca3 ldrh r3, [r4, #36] ; 0x24
d->cfg_power = cfg->bMaxPower;
3122: 7262 strb r2, [r4, #9]
if (r->rhfunc.power + d->cfg_power > POWER_MAX) {
3124: 4413 add r3, r2
3126: 2bfa cmp r3, #250 ; 0xfa
3128: dd20 ble.n 316c <usbhc_pipe_0_xfer_done+0x180>
usbhc_enum_fail(r, USBHC_ENUM_OVERCURRENT, (void *)d);
312a: 4b38 ldr r3, [pc, #224] ; (320c <usbhc_pipe_0_xfer_done+0x220>)
312c: 4622 mov r2, r4
312e: 4620 mov r0, r4
3130: 4798 blx r3
uint8_t * cfg_desc = CTRL_DESC_BUF(r->ctrl_buf);
3132: 6ba3 ldr r3, [r4, #56] ; 0x38
desc.sod = usb_find_desc(cfg_desc, desc.eod, USB_DT_INTERFACE);
3134: 4f3c ldr r7, [pc, #240] ; (3228 <usbhc_pipe_0_xfer_done+0x23c>)
3136: 7bda ldrb r2, [r3, #15]
3138: 7b99 ldrb r1, [r3, #14]
usbhc_enum_notify(r, USBHC_ENUM_IFACE_UNSUPPORTED, &desc);
313a: f8df 90f8 ldr.w r9, [pc, #248] ; 3234 <usbhc_pipe_0_xfer_done+0x248>
list_delete_element(&r->rhfunc.func_list.list, (void *)func);
313e: f8df a0fc ldr.w sl, [pc, #252] ; 323c <usbhc_pipe_0_xfer_done+0x250>
list_insert_as_head(&d->func.list, (void *)func);
3142: f8df b0fc ldr.w fp, [pc, #252] ; 3240 <usbhc_pipe_0_xfer_done+0x254>
uint8_t * cfg_desc = CTRL_DESC_BUF(r->ctrl_buf);
3146: f103 000c add.w r0, r3, #12
314a: eb01 2102 add.w r1, r1, r2, lsl #8
desc.eod = cfg_desc + total_len;
314e: fa10 f181 uxtah r1, r0, r1
desc.sod = usb_find_desc(cfg_desc, desc.eod, USB_DT_INTERFACE);
3152: 2204 movs r2, #4
desc.eod = cfg_desc + total_len;
3154: 9103 str r1, [sp, #12]
desc.sod = usb_find_desc(cfg_desc, desc.eod, USB_DT_INTERFACE);
3156: 47b8 blx r7
3158: 46b8 mov r8, r7
315a: 9002 str r0, [sp, #8]
while (NULL != desc.sod) {
315c: 9b02 ldr r3, [sp, #8]
315e: b93b cbnz r3, 3170 <usbhc_pipe_0_xfer_done+0x184>
if (usbhc_enum_install(r, d)) {
3160: b356 cbz r6, 31b8 <usbhc_pipe_0_xfer_done+0x1cc>
rc = _usbhc_set_config(r, cfg->bConfigurationValue);
3162: 7c69 ldrb r1, [r5, #17]
3164: 4b31 ldr r3, [pc, #196] ; (322c <usbhc_pipe_0_xfer_done+0x240>)
3166: 4620 mov r0, r4
3168: 4798 blx r3
316a: e7bc b.n 30e6 <usbhc_pipe_0_xfer_done+0xfa>
r->rhfunc.power += d->cfg_power;
316c: 84a3 strh r3, [r4, #36] ; 0x24
return true;
316e: e7e0 b.n 3132 <usbhc_pipe_0_xfer_done+0x146>
struct usbhf_driver *func = r->rhfunc.func_list.pfunc; /* From Free list */
3170: 69a7 ldr r7, [r4, #24]
while (func) {
3172: b947 cbnz r7, 3186 <usbhc_pipe_0_xfer_done+0x19a>
usbhc_enum_notify(r, USBHC_ENUM_IFACE_UNSUPPORTED, &desc);
3174: aa02 add r2, sp, #8
3176: 210a movs r1, #10
3178: 4620 mov r0, r4
317a: 47c8 blx r9
desc.sod = usb_desc_next(desc.sod);
317c: 9b02 ldr r3, [sp, #8]
return (desc + usb_desc_len(desc));
317e: 781a ldrb r2, [r3, #0]
3180: 4413 add r3, r2
3182: 9302 str r3, [sp, #8]
3184: e010 b.n 31a8 <usbhc_pipe_0_xfer_done+0x1bc>
if (func->ctrl) {
3186: 687b ldr r3, [r7, #4]
3188: b1a3 cbz r3, 31b4 <usbhc_pipe_0_xfer_done+0x1c8>
rc = func->ctrl(func, USBHF_INSTALL, desc);
318a: aa02 add r2, sp, #8
318c: 2100 movs r1, #0
318e: 4638 mov r0, r7
3190: 4798 blx r3
if (rc == ERR_NONE) { /* Installed OK */
3192: b978 cbnz r0, 31b4 <usbhc_pipe_0_xfer_done+0x1c8>
list_delete_element(&r->rhfunc.func_list.list, (void *)func);
3194: 4639 mov r1, r7
func->pdev = d;
3196: 60bc str r4, [r7, #8]
list_delete_element(&r->rhfunc.func_list.list, (void *)func);
3198: f104 0018 add.w r0, r4, #24
319c: 47d0 blx sl
list_insert_as_head(&d->func.list, (void *)func);
319e: 4639 mov r1, r7
31a0: 1d20 adds r0, r4, #4
31a2: 47d8 blx fp
n_func++;
31a4: 3601 adds r6, #1
31a6: b2f6 uxtb r6, r6
desc.sod = usb_find_desc(desc.sod, desc.eod, USB_DT_INTERFACE);
31a8: e9dd 0102 ldrd r0, r1, [sp, #8]
31ac: 2204 movs r2, #4
31ae: 47c0 blx r8
31b0: 9002 str r0, [sp, #8]
31b2: e7d3 b.n 315c <usbhc_pipe_0_xfer_done+0x170>
func = func->next.pfunc;
31b4: 683f ldr r7, [r7, #0]
31b6: e7dc b.n 3172 <usbhc_pipe_0_xfer_done+0x186>
usbhc_enum_fail(r, USBHC_ENUM_UNSUPPORTED, (void *)d);
31b8: 4622 mov r2, r4
31ba: 2103 movs r1, #3
31bc: e72b b.n 3016 <usbhc_pipe_0_xfer_done+0x2a>
d->status.value = USBHC_DEV_CONFIGURED | USBHC_DEV_USABLE;
31be: 2316 movs r3, #22
31c0: 7423 strb r3, [r4, #16]
usbhc_release_control(r);
31c2: 4620 mov r0, r4
31c4: 4b1a ldr r3, [pc, #104] ; (3230 <usbhc_pipe_0_xfer_done+0x244>)
31c6: 4798 blx r3
f = d->func.pfunc;
31c8: 6865 ldr r5, [r4, #4]
while (f) {
31ca: b955 cbnz r5, 31e2 <usbhc_pipe_0_xfer_done+0x1f6>
usbhc_enum_notify(r, USBHC_ENUM_SUCCESS, (void *)d);
31cc: 4b19 ldr r3, [pc, #100] ; (3234 <usbhc_pipe_0_xfer_done+0x248>)
31ce: 4622 mov r2, r4
31d0: 4629 mov r1, r5
31d2: 4620 mov r0, r4
31d4: 4798 blx r3
usbhc_rsc_notify(r);
31d6: 4b18 ldr r3, [pc, #96] ; (3238 <usbhc_pipe_0_xfer_done+0x24c>)
31d8: 4620 mov r0, r4
}
31da: b005 add sp, #20
31dc: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
usbhc_rsc_notify(r);
31e0: 4718 bx r3
if (f->ctrl) {
31e2: 686b ldr r3, [r5, #4]
31e4: b11b cbz r3, 31ee <usbhc_pipe_0_xfer_done+0x202>
f->ctrl(f, USBHF_ENABLE, NULL);
31e6: 2200 movs r2, #0
31e8: 2101 movs r1, #1
31ea: 4628 mov r0, r5
31ec: 4798 blx r3
f = f->next.pfunc;
31ee: 682d ldr r5, [r5, #0]
31f0: e7eb b.n 31ca <usbhc_pipe_0_xfer_done+0x1de>
usbhc_release_control(r);
31f2: 4b0f ldr r3, [pc, #60] ; (3230 <usbhc_pipe_0_xfer_done+0x244>)
31f4: 4620 mov r0, r4
31f6: 4798 blx r3
struct usbhc_req_handler *h = (struct usbhc_req_handler *)r->handlers.req_list.head;
31f8: 6b25 ldr r5, [r4, #48] ; 0x30
while (h != NULL) {
31fa: 2d00 cmp r5, #0
31fc: d0eb beq.n 31d6 <usbhc_pipe_0_xfer_done+0x1ea>
if (NULL != h->cb) {
31fe: 686b ldr r3, [r5, #4]
3200: b113 cbz r3, 3208 <usbhc_pipe_0_xfer_done+0x21c>
rc = h->cb(d, r->rhfunc.pipe_0);
3202: 6a21 ldr r1, [r4, #32]
3204: 4620 mov r0, r4
3206: 4798 blx r3
h = h->next;
3208: 682d ldr r5, [r5, #0]
320a: e7f6 b.n 31fa <usbhc_pipe_0_xfer_done+0x20e>
320c: 00002d5d .word 0x00002d5d
3210: 00002551 .word 0x00002551
3214: 00002f7d .word 0x00002f7d
3218: 00001a29 .word 0x00001a29
321c: 00002cb9 .word 0x00002cb9
3220: 000026a1 .word 0x000026a1
3224: 00002c4d .word 0x00002c4d
3228: 000034d1 .word 0x000034d1
322c: 00002c8d .word 0x00002c8d
3230: 00002d4d .word 0x00002d4d
3234: 00002c11 .word 0x00002c11
3238: 00002c2d .word 0x00002c2d
323c: 00002911 .word 0x00002911
3240: 000028e5 .word 0x000028e5
00003244 <usbhc_take_control>:
if (s == USBHC_USED_BY_DEV) {
3244: 2a02 cmp r2, #2
{
3246: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr}
3248: 4604 mov r4, r0
324a: 460d mov r5, r1
if (s == USBHC_USED_BY_DEV) {
324c: d108 bne.n 3260 <usbhc_take_control+0x1c>
if (!d->status.bm.usable) {
324e: 7c03 ldrb r3, [r0, #16]
3250: 06d9 lsls r1, r3, #27
3252: d529 bpl.n 32a8 <usbhc_take_control+0x64>
if (d->status.bm.suspend) {
3254: 7c03 ldrb r3, [r0, #16]
3256: 069b lsls r3, r3, #26
3258: d503 bpl.n 3262 <usbhc_take_control+0x1e>
return ERR_SUSPEND;
325a: f06f 0004 mvn.w r0, #4
325e: e01d b.n 329c <usbhc_take_control+0x58>
if (!(core)) {
3260: b328 cbz r0, 32ae <usbhc_take_control+0x6a>
if (core->ctrl_status.bm.ctrl_state != USBHC_IDLE) {
3262: f894 303e ldrb.w r3, [r4, #62] ; 0x3e
3266: f013 0603 ands.w r6, r3, #3
326a: d123 bne.n 32b4 <usbhc_take_control+0x70>
core->ctrl_status.bm.ctrl_state = s;
326c: f362 0301 bfi r3, r2, #0, #2
3270: f884 303e strb.w r3, [r4, #62] ; 0x3e
rc = usb_h_pipe_set_control_param(core->rhfunc.pipe_0, d->dev_addr, 0, d->ep0_size, d->speed);
3274: 7be3 ldrb r3, [r4, #15]
return _usb_h_pipe_set_control_param(pipe, dev, ep, max_pkt_size, speed);
3276: 7b61 ldrb r1, [r4, #13]
3278: 6a20 ldr r0, [r4, #32]
327a: 4f11 ldr r7, [pc, #68] ; (32c0 <usbhc_take_control+0x7c>)
327c: f3c3 0381 ubfx r3, r3, #2, #2
3280: 9300 str r3, [sp, #0]
3282: 4632 mov r2, r6
3284: 7b23 ldrb r3, [r4, #12]
3286: 47b8 blx r7
if (rc < 0) {
3288: 2800 cmp r0, #0
328a: da09 bge.n 32a0 <usbhc_take_control+0x5c>
core->ctrl_status.bm.ctrl_state = USBHC_IDLE;
328c: f894 303e ldrb.w r3, [r4, #62] ; 0x3e
3290: f366 0301 bfi r3, r6, #0, #2
3294: f884 303e strb.w r3, [r4, #62] ; 0x3e
return ERR_IO;
3298: f06f 0005 mvn.w r0, #5
}
329c: b003 add sp, #12
329e: bdf0 pop {r4, r5, r6, r7, pc}
if (r) {
32a0: b15d cbz r5, 32ba <usbhc_take_control+0x76>
*r = core;
32a2: 602c str r4, [r5, #0]
return ERR_NONE;
32a4: 4630 mov r0, r6
32a6: e7f9 b.n 329c <usbhc_take_control+0x58>
return ERR_DENIED;
32a8: f06f 0010 mvn.w r0, #16
32ac: e7f6 b.n 329c <usbhc_take_control+0x58>
return ERR_NOT_INITIALIZED;
32ae: f06f 0013 mvn.w r0, #19
32b2: e7f3 b.n 329c <usbhc_take_control+0x58>
return ERR_BUSY;
32b4: f06f 0003 mvn.w r0, #3
32b8: e7f0 b.n 329c <usbhc_take_control+0x58>
return ERR_NONE;
32ba: 4628 mov r0, r5
32bc: e7ee b.n 329c <usbhc_take_control+0x58>
32be: bf00 nop
32c0: 00002551 .word 0x00002551
000032c4 <usbhc_init>:
int32_t usbhc_init(struct usbhc_driver *core, struct usb_h_desc *hcd, uint8_t *buf, uint16_t buf_size)
{
32c4: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
32c8: 460e mov r6, r1
32ca: 4617 mov r7, r2
32cc: 4698 mov r8, r3
ASSERT(core && hcd && buf && (buf_size > 32));
32ce: 4604 mov r4, r0
32d0: b138 cbz r0, 32e2 <usbhc_init+0x1e>
32d2: 2900 cmp r1, #0
32d4: d02e beq.n 3334 <usbhc_init+0x70>
32d6: 2a00 cmp r2, #0
32d8: d02e beq.n 3338 <usbhc_init+0x74>
32da: 2b20 cmp r3, #32
32dc: bf94 ite ls
32de: 2000 movls r0, #0
32e0: 2001 movhi r0, #1
32e2: 4918 ldr r1, [pc, #96] ; (3344 <usbhc_init+0x80>)
32e4: 4b18 ldr r3, [pc, #96] ; (3348 <usbhc_init+0x84>)
32e6: f240 5234 movw r2, #1332 ; 0x534
32ea: 4798 blx r3
if (core->ctrl_buf != NULL) {
32ec: 6ba5 ldr r5, [r4, #56] ; 0x38
32ee: bb2d cbnz r5, 333c <usbhc_init+0x78>
return ERR_ALREADY_INITIALIZED;
}
core->dev.ep0_size = EP0_SIZE_DEFAULT;
32f0: 2340 movs r3, #64 ; 0x40
32f2: 7323 strb r3, [r4, #12]
core->hcd = hcd;
32f4: 6166 str r6, [r4, #20]
hcd->owner = (void *)core;
32f6: 61b4 str r4, [r6, #24]
/* Single device support, share the structure with device address 1 */
core->dev.dev_addr = 1;
list_reset(&core->dev.func.list);
#endif
core->dev.level = 0;
core->dev.hub_port = 0;
32f8: 89e2 ldrh r2, [r4, #14]
return _usb_h_register_callback(drv, type, cb);
32fa: 4b14 ldr r3, [pc, #80] ; (334c <usbhc_init+0x88>)
*
* \param[in] list The pointer to a list descriptor
*/
static inline void list_reset(struct list_descriptor *const list)
{
list->head = NULL;
32fc: 6025 str r5, [r4, #0]
32fe: f422 529f bic.w r2, r2, #5088 ; 0x13e0
core->dev.dev_addr = 1;
3302: 2101 movs r1, #1
core->dev.hub_port = 0;
3304: f022 021f bic.w r2, r2, #31
3308: 81e2 strh r2, [r4, #14]
330a: e9c4 550a strd r5, r5, [r4, #40] ; 0x28
330e: e9c4 550c strd r5, r5, [r4, #48] ; 0x30
3312: 4a0f ldr r2, [pc, #60] ; (3350 <usbhc_init+0x8c>)
3314: 61a5 str r5, [r4, #24]
core->rhfunc.power = 0;
3316: 84a5 strh r5, [r4, #36] ; 0x24
3318: 6065 str r5, [r4, #4]
core->dev.dev_addr = 1;
331a: 7361 strb r1, [r4, #13]
core->dev.cfg_total = 0;
331c: 8165 strh r5, [r4, #10]
331e: 4630 mov r0, r6
3320: 4798 blx r3
usb_h_register_callback(core->hcd, USB_H_CB_ROOTHUB_CHANGE, (FUNC_PTR)usbhc_rh_change_cb);
core->ctrl_buf = buf;
3322: 63a7 str r7, [r4, #56] ; 0x38
core->ctrl_buf_size = buf_size;
3324: f8a4 803c strh.w r8, [r4, #60] ; 0x3c
core->ctrl_status.value = 0;
3328: f884 503e strb.w r5, [r4, #62] ; 0x3e
/* Core is stopped */
core->dev.status.value = USBHC_DEV_DISCONNECT;
332c: 7425 strb r5, [r4, #16]
return ERR_NONE;
332e: 4628 mov r0, r5
}
3330: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
ASSERT(core && hcd && buf && (buf_size > 32));
3334: 4608 mov r0, r1
3336: e7d4 b.n 32e2 <usbhc_init+0x1e>
3338: 4610 mov r0, r2
333a: e7d2 b.n 32e2 <usbhc_init+0x1e>
return ERR_ALREADY_INITIALIZED;
333c: f06f 0011 mvn.w r0, #17
3340: e7f6 b.n 3330 <usbhc_init+0x6c>
3342: bf00 nop
3344: 00004fe3 .word 0x00004fe3
3348: 00002939 .word 0x00002939
334c: 00001a29 .word 0x00001a29
3350: 00002db9 .word 0x00002db9
00003354 <usbhc_register_funcd>:
return ERR_NONE;
}
#endif
int32_t usbhc_register_funcd(struct usbhc_driver *core, struct usbhf_driver *funcd)
{
3354: b570 push {r4, r5, r6, lr}
3356: 460d mov r5, r1
ASSERT(core && funcd);
3358: 4604 mov r4, r0
335a: b110 cbz r0, 3362 <usbhc_register_funcd+0xe>
335c: 1e08 subs r0, r1, #0
335e: bf18 it ne
3360: 2001 movne r0, #1
3362: 4b0a ldr r3, [pc, #40] ; (338c <usbhc_register_funcd+0x38>)
3364: 490a ldr r1, [pc, #40] ; (3390 <usbhc_register_funcd+0x3c>)
3366: f240 52a5 movw r2, #1445 ; 0x5a5
336a: 4798 blx r3
if (core->dev.status.value != USBHC_DEV_DISCONNECT) {
336c: 7c23 ldrb r3, [r4, #16]
336e: f003 06ff and.w r6, r3, #255 ; 0xff
3372: b93b cbnz r3, 3384 <usbhc_register_funcd+0x30>
return ERR_DENIED;
}
/* Insert at free function list head */
list_insert_as_head(&core->rhfunc.func_list.list, (void *)funcd);
3374: f104 0018 add.w r0, r4, #24
3378: 4b06 ldr r3, [pc, #24] ; (3394 <usbhc_register_funcd+0x40>)
337a: 4629 mov r1, r5
337c: 4798 blx r3
/* Not connected, link to ROOT */
funcd->pdev = &core->dev;
337e: 60ac str r4, [r5, #8]
return ERR_NONE;
3380: 4630 mov r0, r6
}
3382: bd70 pop {r4, r5, r6, pc}
return ERR_DENIED;
3384: f06f 0010 mvn.w r0, #16
3388: e7fb b.n 3382 <usbhc_register_funcd+0x2e>
338a: bf00 nop
338c: 00002939 .word 0x00002939
3390: 00004fe3 .word 0x00004fe3
3394: 000028e5 .word 0x000028e5
00003398 <usbhc_register_handler>:
funcd->pdev = NULL;
return ERR_NONE;
}
void usbhc_register_handler(struct usbhc_driver *core, enum usbhc_handler_type type, const struct usbhc_handler *h)
{
3398: b570 push {r4, r5, r6, lr}
339a: 460d mov r5, r1
339c: 4616 mov r6, r2
ASSERT(core && h && h->func);
339e: 4604 mov r4, r0
33a0: b120 cbz r0, 33ac <usbhc_register_handler+0x14>
33a2: b172 cbz r2, 33c2 <usbhc_register_handler+0x2a>
33a4: 6850 ldr r0, [r2, #4]
33a6: 3800 subs r0, #0
33a8: bf18 it ne
33aa: 2001 movne r0, #1
33ac: 4916 ldr r1, [pc, #88] ; (3408 <usbhc_register_handler+0x70>)
33ae: 4b17 ldr r3, [pc, #92] ; (340c <usbhc_register_handler+0x74>)
33b0: f240 52bd movw r2, #1469 ; 0x5bd
33b4: 4798 blx r3
switch (type) {
33b6: 2d03 cmp r5, #3
33b8: d825 bhi.n 3406 <usbhc_register_handler+0x6e>
33ba: e8df f005 tbb [pc, r5]
33be: 1704 .short 0x1704
33c0: 2220 .short 0x2220
ASSERT(core && h && h->func);
33c2: 4610 mov r0, r2
33c4: e7f2 b.n 33ac <usbhc_register_handler+0x14>
case USBHC_HDL_SOF:
if (is_list_element(&core->handlers.sof_list, (void *)h)) {
33c6: f104 0528 add.w r5, r4, #40 ; 0x28
33ca: 4b11 ldr r3, [pc, #68] ; (3410 <usbhc_register_handler+0x78>)
33cc: 4631 mov r1, r6
33ce: 4628 mov r0, r5
33d0: 4798 blx r3
33d2: b9c0 cbnz r0, 3406 <usbhc_register_handler+0x6e>
return;
}
if (core->handlers.sof_list.head == NULL) {
33d4: 6aa1 ldr r1, [r4, #40] ; 0x28
33d6: b919 cbnz r1, 33e0 <usbhc_register_handler+0x48>
33d8: 4a0e ldr r2, [pc, #56] ; (3414 <usbhc_register_handler+0x7c>)
33da: 6960 ldr r0, [r4, #20]
33dc: 4b0e ldr r3, [pc, #56] ; (3418 <usbhc_register_handler+0x80>)
33de: 4798 blx r3
usb_h_register_callback(core->hcd, USB_H_CB_SOF, (FUNC_PTR)usbhc_sof_cb);
}
list_insert_as_head(&core->handlers.sof_list, (void *)h);
33e0: 4631 mov r1, r6
33e2: 4628 mov r0, r5
list_insert_as_head(&core->handlers.rsc_list, (void *)h);
break;
default:
break;
}
}
33e4: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
list_insert_as_head(&core->handlers.rsc_list, (void *)h);
33e8: 4b0c ldr r3, [pc, #48] ; (341c <usbhc_register_handler+0x84>)
33ea: 4718 bx r3
if (is_list_element(&core->handlers.enum_list, (void *)h)) {
33ec: 342c adds r4, #44 ; 0x2c
if (is_list_element(&core->handlers.rsc_list, (void *)h)) {
33ee: 4b08 ldr r3, [pc, #32] ; (3410 <usbhc_register_handler+0x78>)
33f0: 4631 mov r1, r6
33f2: 4620 mov r0, r4
33f4: 4798 blx r3
33f6: b930 cbnz r0, 3406 <usbhc_register_handler+0x6e>
list_insert_as_head(&core->handlers.rsc_list, (void *)h);
33f8: 4631 mov r1, r6
33fa: 4620 mov r0, r4
33fc: e7f2 b.n 33e4 <usbhc_register_handler+0x4c>
if (is_list_element(&core->handlers.req_list, (void *)h)) {
33fe: 3430 adds r4, #48 ; 0x30
3400: e7f5 b.n 33ee <usbhc_register_handler+0x56>
if (is_list_element(&core->handlers.rsc_list, (void *)h)) {
3402: 3434 adds r4, #52 ; 0x34
3404: e7f3 b.n 33ee <usbhc_register_handler+0x56>
}
3406: bd70 pop {r4, r5, r6, pc}
3408: 00004fe3 .word 0x00004fe3
340c: 00002939 .word 0x00002939
3410: 000028d5 .word 0x000028d5
3414: 00002f7d .word 0x00002f7d
3418: 00001a29 .word 0x00001a29
341c: 000028e5 .word 0x000028e5
00003420 <usbhc_unregister_handler>:
void usbhc_unregister_handler(struct usbhc_driver *core, enum usbhc_handler_type type, const struct usbhc_handler *h)
{
3420: b570 push {r4, r5, r6, lr}
3422: 460e mov r6, r1
3424: 4615 mov r5, r2
ASSERT(core && h);
3426: 4604 mov r4, r0
3428: b110 cbz r0, 3430 <usbhc_unregister_handler+0x10>
342a: 1e10 subs r0, r2, #0
342c: bf18 it ne
342e: 2001 movne r0, #1
3430: 4913 ldr r1, [pc, #76] ; (3480 <usbhc_unregister_handler+0x60>)
3432: 4b14 ldr r3, [pc, #80] ; (3484 <usbhc_unregister_handler+0x64>)
3434: f240 52e1 movw r2, #1505 ; 0x5e1
3438: 4798 blx r3
switch (type) {
343a: 2e03 cmp r6, #3
343c: d81f bhi.n 347e <usbhc_unregister_handler+0x5e>
343e: e8df f006 tbb [pc, r6]
3442: 0f02 .short 0x0f02
3444: 1a16 .short 0x1a16
case USBHC_HDL_SOF:
list_delete_element(&core->handlers.sof_list, (void *)h);
3446: 4b10 ldr r3, [pc, #64] ; (3488 <usbhc_unregister_handler+0x68>)
3448: 4629 mov r1, r5
344a: f104 0028 add.w r0, r4, #40 ; 0x28
344e: 4798 blx r3
if (core->handlers.sof_list.head == NULL) {
3450: 6aa2 ldr r2, [r4, #40] ; 0x28
3452: b9a2 cbnz r2, 347e <usbhc_unregister_handler+0x5e>
3454: 6960 ldr r0, [r4, #20]
3456: 4b0d ldr r3, [pc, #52] ; (348c <usbhc_unregister_handler+0x6c>)
list_delete_element(&core->handlers.rsc_list, (void *)h);
break;
default:
break;
}
}
3458: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
345c: 4611 mov r1, r2
345e: 4718 bx r3
list_delete_element(&core->handlers.enum_list, (void *)h);
3460: 4629 mov r1, r5
3462: f104 002c add.w r0, r4, #44 ; 0x2c
}
3466: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
list_delete_element(&core->handlers.rsc_list, (void *)h);
346a: 4b07 ldr r3, [pc, #28] ; (3488 <usbhc_unregister_handler+0x68>)
346c: 4718 bx r3
list_delete_element(&core->handlers.req_list, (void *)h);
346e: 4629 mov r1, r5
3470: f104 0030 add.w r0, r4, #48 ; 0x30
3474: e7f7 b.n 3466 <usbhc_unregister_handler+0x46>
list_delete_element(&core->handlers.rsc_list, (void *)h);
3476: 4629 mov r1, r5
3478: f104 0034 add.w r0, r4, #52 ; 0x34
347c: e7f3 b.n 3466 <usbhc_unregister_handler+0x46>
}
347e: bd70 pop {r4, r5, r6, pc}
3480: 00004fe3 .word 0x00004fe3
3484: 00002939 .word 0x00002939
3488: 00002911 .word 0x00002911
348c: 00001a29 .word 0x00001a29
00003490 <usbhc_get_dev_core>:
}
return rc;
}
struct usbhc_driver *usbhc_get_dev_core(struct usbhd_driver *dev)
{
3490: b510 push {r4, lr}
ASSERT(dev && (dev->next.proot || !CONF_USBH_MULTI_DEV_SP));
3492: 4604 mov r4, r0
3494: 3800 subs r0, #0
3496: bf18 it ne
3498: 2001 movne r0, #1
349a: 4903 ldr r1, [pc, #12] ; (34a8 <usbhc_get_dev_core+0x18>)
349c: 4b03 ldr r3, [pc, #12] ; (34ac <usbhc_get_dev_core+0x1c>)
349e: f240 721b movw r2, #1819 ; 0x71b
34a2: 4798 blx r3
return usbhc_find_root(dev);
}
34a4: 4620 mov r0, r4
34a6: bd10 pop {r4, pc}
34a8: 00004fe3 .word 0x00004fe3
34ac: 00002939 .word 0x00002939
000034b0 <usbhc_get_func_dev>:
struct usbhd_driver *usbhc_get_func_dev(struct usbhf_driver *func)
{
34b0: b510 push {r4, lr}
ASSERT(func);
34b2: 4604 mov r4, r0
34b4: 3800 subs r0, #0
34b6: bf18 it ne
34b8: 2001 movne r0, #1
34ba: 4903 ldr r1, [pc, #12] ; (34c8 <usbhc_get_func_dev+0x18>)
34bc: 4b03 ldr r3, [pc, #12] ; (34cc <usbhc_get_func_dev+0x1c>)
34be: f240 7221 movw r2, #1825 ; 0x721
34c2: 4798 blx r3
return func->pdev;
}
34c4: 68a0 ldr r0, [r4, #8]
34c6: bd10 pop {r4, pc}
34c8: 00004fe3 .word 0x00004fe3
34cc: 00002939 .word 0x00002939
000034d0 <usb_find_desc>:
#define _param_error_check(cond) ASSERT(cond)
#define _desc_len_check() ASSERT(usb_desc_len(desc) >= 2)
#endif
uint8_t *usb_find_desc(uint8_t *desc, uint8_t *eof, uint8_t type)
{
34d0: b510 push {r4, lr}
_param_error_check(desc && eof && (desc < eof));
while (desc < eof) {
34d2: 4288 cmp r0, r1
34d4: d301 bcc.n 34da <usb_find_desc+0xa>
_desc_len_check();
34d6: 2000 movs r0, #0
return desc;
}
desc = usb_desc_next(desc);
}
return NULL;
}
34d8: bd10 pop {r4, pc}
return desc[0];
34da: 7803 ldrb r3, [r0, #0]
_desc_len_check();
34dc: 2b01 cmp r3, #1
34de: d9fa bls.n 34d6 <usb_find_desc+0x6>
if (type == usb_desc_type(desc)) {
34e0: 7844 ldrb r4, [r0, #1]
34e2: 4294 cmp r4, r2
34e4: d0f8 beq.n 34d8 <usb_find_desc+0x8>
return (desc + usb_desc_len(desc));
34e6: 4418 add r0, r3
34e8: e7f3 b.n 34d2 <usb_find_desc+0x2>
000034ea <usb_find_iface_after>:
uint8_t *usb_find_iface_after(uint8_t *desc, uint8_t *eof, uint8_t iface_n)
{
34ea: b510 push {r4, lr}
_param_error_check(desc && eof && (desc < eof));
while (desc < eof) {
34ec: 4288 cmp r0, r1
34ee: d301 bcc.n 34f4 <usb_find_iface_after+0xa>
34f0: 4608 mov r0, r1
}
}
desc = usb_desc_next(desc);
}
return eof;
}
34f2: bd10 pop {r4, pc}
return desc[0];
34f4: 7803 ldrb r3, [r0, #0]
_desc_len_check();
34f6: 2b01 cmp r3, #1
34f8: d907 bls.n 350a <usb_find_iface_after+0x20>
if (USB_DT_INTERFACE == usb_desc_type(desc)) {
34fa: 7844 ldrb r4, [r0, #1]
34fc: 2c04 cmp r4, #4
34fe: d102 bne.n 3506 <usb_find_iface_after+0x1c>
if (iface_n != desc[2]) {
3500: 7884 ldrb r4, [r0, #2]
3502: 4294 cmp r4, r2
3504: d1f5 bne.n 34f2 <usb_find_iface_after+0x8>
return (desc + usb_desc_len(desc));
3506: 4418 add r0, r3
3508: e7f0 b.n 34ec <usb_find_iface_after+0x2>
_desc_len_check();
350a: 2000 movs r0, #0
350c: e7f1 b.n 34f2 <usb_find_iface_after+0x8>
0000350e <usb_find_ep_desc>:
uint8_t *usb_find_ep_desc(uint8_t *desc, uint8_t *eof)
{
_param_error_check(desc && eof && (desc < eof));
while (desc < eof) {
350e: 4288 cmp r0, r1
3510: d301 bcc.n 3516 <usb_find_ep_desc+0x8>
_desc_len_check();
3512: 2000 movs r0, #0
return desc;
}
desc = usb_desc_next(desc);
}
return NULL;
}
3514: 4770 bx lr
return desc[0];
3516: 7803 ldrb r3, [r0, #0]
_desc_len_check();
3518: 2b01 cmp r3, #1
351a: d9fa bls.n 3512 <usb_find_ep_desc+0x4>
return desc[1];
351c: 7842 ldrb r2, [r0, #1]
if (USB_DT_INTERFACE == usb_desc_type(desc)) {
351e: 2a04 cmp r2, #4
3520: d0f7 beq.n 3512 <usb_find_ep_desc+0x4>
if (USB_DT_ENDPOINT == usb_desc_type(desc)) {
3522: 2a05 cmp r2, #5
3524: d0f6 beq.n 3514 <usb_find_ep_desc+0x6>
return (desc + usb_desc_len(desc));
3526: 4418 add r0, r3
3528: e7f1 b.n 350e <usb_find_ep_desc>
0000352a <diskio_init>:
#include "diskio_start.h"
void diskio_init(void)
{
}
352a: 4770 bx lr
0000352c <main>:
#include <atmel_start.h>
#include "hal_spi_m_sync.h"
#include "sd_mmc_start.h"
#include "pdebug.h"
int main(void)
{
352c: b508 push {r3, lr}
/* Initializes MCU, drivers and middleware */
atmel_start_init();
352e: 4b0e ldr r3, [pc, #56] ; (3568 <main+0x3c>)
3530: 4798 blx r3
pdebug_init();
3532: 4b0e ldr r3, [pc, #56] ; (356c <main+0x40>)
3534: 4798 blx r3
PORT->Group[1].DIR.reg |= (1 << 28);
3536: 4b0e ldr r3, [pc, #56] ; (3570 <main+0x44>)
PORT->Group[1].OUT.reg |= (1 << 28);
PORT->Group[1].OUT.reg &= ~(1 << 28);
spi_m_sync_enable(&SPI_0);
3538: 480e ldr r0, [pc, #56] ; (3574 <main+0x48>)
PORT->Group[1].DIR.reg |= (1 << 28);
353a: f8d3 2080 ldr.w r2, [r3, #128] ; 0x80
353e: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000
3542: f8c3 2080 str.w r2, [r3, #128] ; 0x80
PORT->Group[1].OUT.reg |= (1 << 28);
3546: f8d3 2090 ldr.w r2, [r3, #144] ; 0x90
354a: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000
354e: f8c3 2090 str.w r2, [r3, #144] ; 0x90
PORT->Group[1].OUT.reg &= ~(1 << 28);
3552: f8d3 2090 ldr.w r2, [r3, #144] ; 0x90
3556: f022 5280 bic.w r2, r2, #268435456 ; 0x10000000
355a: f8c3 2090 str.w r2, [r3, #144] ; 0x90
spi_m_sync_enable(&SPI_0);
355e: 4b06 ldr r3, [pc, #24] ; (3578 <main+0x4c>)
3560: 4798 blx r3
SDMMC_example();
3562: 4b06 ldr r3, [pc, #24] ; (357c <main+0x50>)
3564: 4798 blx r3
/* Replace with your application code */
while (1) {
3566: e7fe b.n 3566 <main+0x3a>
3568: 00003fdd .word 0x00003fdd
356c: 00004065 .word 0x00004065
3570: 41008000 .word 0x41008000
3574: 2000056c .word 0x2000056c
3578: 000015ed .word 0x000015ed
357c: 000007bd .word 0x000007bd
00003580 <_osc32kctrl_init_sources>:
}
static inline void hri_osc32kctrl_write_XOSC32K_reg(const void *const hw, hri_osc32kctrl_xosc32k_reg_t data)
{
OSC32KCTRL_CRITICAL_SECTION_ENTER();
((Osc32kctrl *)hw)->XOSC32K.reg = data;
3580: 4b06 ldr r3, [pc, #24] ; (359c <_osc32kctrl_init_sources+0x1c>)
3582: f242 028e movw r2, #8334 ; 0x208e
3586: 829a strh r2, [r3, #20]
}
static inline void hri_osc32kctrl_write_CFDCTRL_reg(const void *const hw, hri_osc32kctrl_cfdctrl_reg_t data)
{
OSC32KCTRL_CRITICAL_SECTION_ENTER();
((Osc32kctrl *)hw)->CFDCTRL.reg = data;
3588: 2200 movs r2, #0
358a: 759a strb r2, [r3, #22]
}
static inline void hri_osc32kctrl_write_EVCTRL_reg(const void *const hw, hri_osc32kctrl_evctrl_reg_t data)
{
OSC32KCTRL_CRITICAL_SECTION_ENTER();
((Osc32kctrl *)hw)->EVCTRL.reg = data;
358c: 75da strb r2, [r3, #23]
}
static inline hri_osc32kctrl_osculp32k_reg_t hri_osc32kctrl_read_OSCULP32K_CALIB_bf(const void *const hw)
{
uint32_t tmp;
tmp = ((Osc32kctrl *)hw)->OSCULP32K.reg;
358e: 69da ldr r2, [r3, #28]
calib = hri_osc32kctrl_read_OSCULP32K_CALIB_bf(hw);
hri_osc32kctrl_write_OSCULP32K_reg(hw,
#if CONF_OSCULP32K_CALIB_ENABLE == 1
OSC32KCTRL_OSCULP32K_CALIB(CONF_OSCULP32K_CALIB)
#else
OSC32KCTRL_OSCULP32K_CALIB(calib)
3590: f402 527c and.w r2, r2, #16128 ; 0x3f00
}
static inline void hri_osc32kctrl_write_OSCULP32K_reg(const void *const hw, hri_osc32kctrl_osculp32k_reg_t data)
{
OSC32KCTRL_CRITICAL_SECTION_ENTER();
((Osc32kctrl *)hw)->OSCULP32K.reg = data;
3594: 61da str r2, [r3, #28]
((Osc32kctrl *)hw)->RTCCTRL.reg = data;
3596: 2201 movs r2, #1
3598: 741a strb r2, [r3, #16]
#endif
#endif
hri_osc32kctrl_write_RTCCTRL_reg(hw, OSC32KCTRL_RTCCTRL_RTCSEL(CONF_RTCCTRL));
(void)calib;
}
359a: 4770 bx lr
359c: 40001400 .word 0x40001400
000035a0 <hri_rtcmode0_wait_for_sync>:
typedef uint8_t hri_rtcalarm_mask_reg_t;
typedef uint8_t hri_rtcmode2_mask_reg_t;
static inline void hri_rtcmode0_wait_for_sync(const void *const hw, hri_rtcmode0_syncbusy_reg_t reg)
{
while (((Rtc *)hw)->MODE0.SYNCBUSY.reg & reg) {
35a0: 6903 ldr r3, [r0, #16]
35a2: 420b tst r3, r1
35a4: d1fc bne.n 35a0 <hri_rtcmode0_wait_for_sync>
};
}
35a6: 4770 bx lr
000035a8 <_calendar_init>:
/**
* \brief Initializes the RTC module with given configurations.
*/
int32_t _calendar_init(struct calendar_dev *const dev)
{
35a8: b510 push {r4, lr}
ASSERT(dev && dev->hw);
35aa: 4604 mov r4, r0
35ac: b118 cbz r0, 35b6 <_calendar_init+0xe>
35ae: 6800 ldr r0, [r0, #0]
35b0: 3800 subs r0, #0
35b2: bf18 it ne
35b4: 2001 movne r0, #1
35b6: 4917 ldr r1, [pc, #92] ; (3614 <_calendar_init+0x6c>)
35b8: 4b17 ldr r3, [pc, #92] ; (3618 <_calendar_init+0x70>)
35ba: 222f movs r2, #47 ; 0x2f
35bc: 4798 blx r3
_rtc_dev = dev;
35be: 4b17 ldr r3, [pc, #92] ; (361c <_calendar_init+0x74>)
}
static inline bool hri_rtcmode0_get_CTRLA_ENABLE_bit(const void *const hw)
{
uint16_t tmp;
hri_rtcmode0_wait_for_sync(hw, RTC_MODE0_SYNCBUSY_SWRST | RTC_MODE0_SYNCBUSY_ENABLE | RTC_MODE0_SYNCBUSY_COUNTSYNC);
35c0: 6820 ldr r0, [r4, #0]
35c2: 4a17 ldr r2, [pc, #92] ; (3620 <_calendar_init+0x78>)
35c4: 601c str r4, [r3, #0]
35c6: f248 0103 movw r1, #32771 ; 0x8003
35ca: 4790 blx r2
tmp = ((Rtc *)hw)->MODE0.CTRLA.reg;
35cc: 8803 ldrh r3, [r0, #0]
if (hri_rtcmode0_get_CTRLA_ENABLE_bit(dev->hw)) {
35ce: 079b lsls r3, r3, #30
35d0: d50a bpl.n 35e8 <_calendar_init+0x40>
#if !CONF_RTC_INIT_RESET
return ERR_DENIED;
#else
hri_rtcmode0_clear_CTRLA_ENABLE_bit(dev->hw);
35d2: 6820 ldr r0, [r4, #0]
}
static inline void hri_rtcmode0_clear_CTRLA_ENABLE_bit(const void *const hw)
{
RTC_CRITICAL_SECTION_ENTER();
((Rtc *)hw)->MODE0.CTRLA.reg &= ~RTC_MODE0_CTRLA_ENABLE;
35d4: 8803 ldrh r3, [r0, #0]
35d6: f023 0302 bic.w r3, r3, #2
35da: 041b lsls r3, r3, #16
35dc: 0c1b lsrs r3, r3, #16
35de: 8003 strh r3, [r0, #0]
hri_rtcmode0_wait_for_sync(hw, RTC_MODE0_SYNCBUSY_SWRST | RTC_MODE0_SYNCBUSY_ENABLE | RTC_MODE0_SYNCBUSY_COUNTSYNC);
35e0: 4790 blx r2
hri_rtcmode0_wait_for_sync(dev->hw, RTC_MODE0_SYNCBUSY_ENABLE);
35e2: 6820 ldr r0, [r4, #0]
35e4: 2102 movs r1, #2
35e6: 4790 blx r2
#endif
}
hri_rtcmode0_set_CTRLA_SWRST_bit(dev->hw);
35e8: 6820 ldr r0, [r4, #0]
((Rtc *)hw)->MODE0.CTRLA.reg |= RTC_MODE0_CTRLA_SWRST;
35ea: 8803 ldrh r3, [r0, #0]
35ec: b29b uxth r3, r3
35ee: f043 0301 orr.w r3, r3, #1
35f2: 8003 strh r3, [r0, #0]
hri_rtcmode0_wait_for_sync(hw, RTC_MODE0_SYNCBUSY_SWRST);
35f4: 2101 movs r1, #1
35f6: 4790 blx r2
hri_rtcmode0_wait_for_sync(dev->hw, RTC_MODE0_SYNCBUSY_SWRST);
35f8: 6820 ldr r0, [r4, #0]
35fa: 4790 blx r2
| (CONF_RTC_COMPE0 << RTC_MODE0_EVCTRL_CMPEO_Pos) | (CONF_RTC_COMPE1 << RTC_MODE0_EVCTRL_CMPEO1_Pos)
| (CONF_RTC_TAMPEREO << RTC_MODE0_EVCTRL_TAMPEREO_Pos)
| (CONF_RTC_TAMPEVEI << RTC_MODE0_EVCTRL_TAMPEVEI_Pos) | (CONF_RTC_OVFEO << RTC_MODE0_EVCTRL_OVFEO_Pos));
#endif
hri_rtcmode0_write_CTRLA_reg(dev->hw, RTC_MODE0_CTRLA_PRESCALER(CONF_RTC_PRESCALER) | RTC_MODE0_CTRLA_COUNTSYNC);
35fc: 6820 ldr r0, [r4, #0]
}
static inline void hri_rtcmode0_write_CTRLA_reg(const void *const hw, hri_rtcmode0_ctrla_reg_t data)
{
RTC_CRITICAL_SECTION_ENTER();
((Rtc *)hw)->MODE0.CTRLA.reg = data;
35fe: f44f 4301 mov.w r3, #33024 ; 0x8100
3602: 8003 strh r3, [r0, #0]
hri_rtcmode0_wait_for_sync(hw, RTC_MODE0_SYNCBUSY_SWRST | RTC_MODE0_SYNCBUSY_ENABLE | RTC_MODE0_SYNCBUSY_COUNTSYNC);
3604: f248 0103 movw r1, #32771 ; 0x8003
3608: 4790 blx r2
hri_rtc_write_TAMPCTRL_reg(
dev->hw,
360a: 6823 ldr r3, [r4, #0]
}
static inline void hri_rtc_write_TAMPCTRL_reg(const void *const hw, hri_rtc_tampctrl_reg_t data)
{
RTC_CRITICAL_SECTION_ENTER();
((Rtc *)hw)->MODE0.TAMPCTRL.reg = data;
360c: 2000 movs r0, #0
360e: 6618 str r0, [r3, #96] ; 0x60
| (CONF_RTC_TAMPER_INACT_2 == TAMPER_MODE_ACTL) | (CONF_RTC_TAMPER_INACT_3 == TAMPER_MODE_ACTL)
| (CONF_RTC_TAMPER_INACT_4 == TAMPER_MODE_ACTL)) {
hri_rtcmode0_set_CTRLB_RTCOUT_bit(dev->hw);
}
return ERR_NONE;
}
3610: bd10 pop {r4, pc}
3612: bf00 nop
3614: 00004ff7 .word 0x00004ff7
3618: 00002939 .word 0x00002939
361c: 20000540 .word 0x20000540
3620: 000035a1 .word 0x000035a1
00003624 <RTC_Handler>:
/**
* \brief Rtc interrupt handler
*/
void RTC_Handler(void)
{
_rtc_interrupt_handler(_rtc_dev);
3624: 4b0d ldr r3, [pc, #52] ; (365c <RTC_Handler+0x38>)
{
3626: b510 push {r4, lr}
_rtc_interrupt_handler(_rtc_dev);
3628: 681c ldr r4, [r3, #0]
uint16_t interrupt_status = hri_rtcmode0_read_INTFLAG_reg(dev->hw);
362a: 6822 ldr r2, [r4, #0]
return ((Rtc *)hw)->MODE0.INTFLAG.reg;
362c: 8991 ldrh r1, [r2, #12]
return ((Rtc *)hw)->MODE0.INTENSET.reg;
362e: 8953 ldrh r3, [r2, #10]
3630: b29b uxth r3, r3
if ((interrupt_status & interrupt_enabled) & RTC_MODE2_INTFLAG_ALARM0) {
3632: 400b ands r3, r1
3634: 05da lsls r2, r3, #23
3636: d507 bpl.n 3648 <RTC_Handler+0x24>
dev->callback(dev);
3638: 6863 ldr r3, [r4, #4]
363a: 4620 mov r0, r4
363c: 4798 blx r3
hri_rtcmode0_clear_interrupt_CMP0_bit(dev->hw);
363e: 6823 ldr r3, [r4, #0]
((Rtc *)hw)->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_CMP0;
3640: f44f 7280 mov.w r2, #256 ; 0x100
((Rtc *)hw)->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_TAMPER;
3644: 819a strh r2, [r3, #12]
}
3646: bd10 pop {r4, pc}
} else if ((interrupt_status & interrupt_enabled) & RTC_MODE2_INTFLAG_TAMPER) {
3648: 045b lsls r3, r3, #17
364a: d5fc bpl.n 3646 <RTC_Handler+0x22>
dev->callback_tamper(dev);
364c: 68a3 ldr r3, [r4, #8]
364e: 4620 mov r0, r4
3650: 4798 blx r3
hri_rtcmode0_clear_interrupt_TAMPER_bit(dev->hw);
3652: 6823 ldr r3, [r4, #0]
3654: f44f 4280 mov.w r2, #16384 ; 0x4000
3658: e7f4 b.n 3644 <RTC_Handler+0x20>
365a: bf00 nop
365c: 20000540 .word 0x20000540
00003660 <gpio_set_pin_direction>:
_gpio_set_direction((enum gpio_port)GPIO_PORT(pin), 1U << GPIO_PIN(pin), direction);
3660: f000 031f and.w r3, r0, #31
{
3664: b530 push {r4, r5, lr}
_gpio_set_direction((enum gpio_port)GPIO_PORT(pin), 1U << GPIO_PIN(pin), direction);
3666: 2501 movs r5, #1
3668: 409d lsls r5, r3
((Port *)hw)->Group[submodule_index].DIRCLR.reg = mask;
366a: 0940 lsrs r0, r0, #5
366c: 4b0d ldr r3, [pc, #52] ; (36a4 <gpio_set_pin_direction+0x44>)
366e: 01c0 lsls r0, r0, #7
switch (direction) {
3670: 2902 cmp r1, #2
hri_port_write_WRCONFIG_reg(PORT, port, PORT_WRCONFIG_WRPINCFG | PORT_WRCONFIG_INEN | (mask & 0xffff));
3672: b2ac uxth r4, r5
| ((mask & 0xffff0000) >> 16));
3674: ea4f 4215 mov.w r2, r5, lsr #16
((Port *)hw)->Group[submodule_index].DIRSET.reg = mask;
3678: 4403 add r3, r0
switch (direction) {
367a: d00b beq.n 3694 <gpio_set_pin_direction+0x34>
hri_port_write_WRCONFIG_reg(PORT, port, PORT_WRCONFIG_WRPINCFG | PORT_WRCONFIG_INEN | (mask & 0xffff));
367c: f044 4480 orr.w r4, r4, #1073741824 ; 0x40000000
3680: f444 3400 orr.w r4, r4, #131072 ; 0x20000
hri_port_write_WRCONFIG_reg(PORT,
3684: f042 4240 orr.w r2, r2, #3221225472 ; 0xc0000000
((Port *)hw)->Group[submodule_index].DIRCLR.reg = mask;
3688: 605d str r5, [r3, #4]
368a: f442 3200 orr.w r2, r2, #131072 ; 0x20000
static inline void hri_port_write_WRCONFIG_reg(const void *const hw, uint8_t submodule_index,
hri_port_wrconfig_reg_t data)
{
PORT_CRITICAL_SECTION_ENTER();
((Port *)hw)->Group[submodule_index].WRCONFIG.reg = data;
368e: 629c str r4, [r3, #40] ; 0x28
3690: 629a str r2, [r3, #40] ; 0x28
}
3692: bd30 pop {r4, r5, pc}
hri_port_write_WRCONFIG_reg(PORT, port, PORT_WRCONFIG_WRPINCFG | (mask & 0xffff));
3694: f044 4480 orr.w r4, r4, #1073741824 ; 0x40000000
((Port *)hw)->Group[submodule_index].DIRSET.reg = mask;
3698: 609d str r5, [r3, #8]
hri_port_write_WRCONFIG_reg(
369a: f042 4240 orr.w r2, r2, #3221225472 ; 0xc0000000
((Port *)hw)->Group[submodule_index].WRCONFIG.reg = data;
369e: 629c str r4, [r3, #40] ; 0x28
36a0: e7f6 b.n 3690 <gpio_set_pin_direction+0x30>
36a2: bf00 nop
36a4: 41008000 .word 0x41008000
000036a8 <gpio_set_pin_pull_mode.constprop.0>:
((Port *)hw)->Group[submodule_index].PINCFG[index].reg &= ~PORT_PINCFG_PULLEN;
36a8: 0942 lsrs r2, r0, #5
36aa: f000 031f and.w r3, r0, #31
36ae: eb03 13c2 add.w r3, r3, r2, lsl #7
36b2: f103 4382 add.w r3, r3, #1090519040 ; 0x41000000
36b6: f503 4300 add.w r3, r3, #32768 ; 0x8000
36ba: f893 2040 ldrb.w r2, [r3, #64] ; 0x40
36be: f002 02fb and.w r2, r2, #251 ; 0xfb
36c2: f883 2040 strb.w r2, [r3, #64] ; 0x40
}
36c6: 4770 bx lr
000036c8 <_gpio_set_pin_function>:
/**
* \brief Set gpio pin function
*/
static inline void _gpio_set_pin_function(const uint32_t gpio, const uint32_t function)
{
uint8_t port = GPIO_PORT(gpio);
36c8: 0943 lsrs r3, r0, #5
tmp = ((Port *)hw)->Group[submodule_index].PINCFG[index].reg;
36ca: 01db lsls r3, r3, #7
36cc: f103 4382 add.w r3, r3, #1090519040 ; 0x41000000
{
36d0: b530 push {r4, r5, lr}
36d2: f503 4300 add.w r3, r3, #32768 ; 0x8000
uint8_t pin = GPIO_PIN(gpio);
36d6: f000 041f and.w r4, r0, #31
36da: 191d adds r5, r3, r4
36dc: eb03 0354 add.w r3, r3, r4, lsr #1
36e0: f895 2040 ldrb.w r2, [r5, #64] ; 0x40
tmp &= ~PORT_PINCFG_PMUXEN;
36e4: f002 02fe and.w r2, r2, #254 ; 0xfe
tmp |= value << PORT_PINCFG_PMUXEN_Pos;
36e8: f042 0201 orr.w r2, r2, #1
((Port *)hw)->Group[submodule_index].PINCFG[index].reg = tmp;
36ec: f885 2040 strb.w r2, [r5, #64] ; 0x40
} else {
hri_port_write_PINCFG_PMUXEN_bit(PORT, port, pin, true);
if (pin & 1) {
// Odd numbered pin
hri_port_write_PMUX_PMUXO_bf(PORT, port, pin >> 1, function & 0xffff);
36f0: b2ca uxtb r2, r1
tmp = ((Port *)hw)->Group[submodule_index].PMUX[index].reg;
36f2: f893 1030 ldrb.w r1, [r3, #48] ; 0x30
if (pin & 1) {
36f6: f010 0f01 tst.w r0, #1
tmp &= ~PORT_PMUX_PMUXO_Msk;
36fa: bf1b ittet ne
36fc: f001 010f andne.w r1, r1, #15
tmp |= PORT_PMUX_PMUXO(data);
3700: ea41 1102 orrne.w r1, r1, r2, lsl #4
tmp &= ~PORT_PMUX_PMUXE_Msk;
3704: f001 01f0 andeq.w r1, r1, #240 ; 0xf0
tmp |= PORT_PMUX_PMUXO(data);
3708: b2c9 uxtbne r1, r1
tmp |= PORT_PMUX_PMUXE(data);
370a: bf08 it eq
370c: 4311 orreq r1, r2
((Port *)hw)->Group[submodule_index].PMUX[index].reg = tmp;
370e: f883 1030 strb.w r1, [r3, #48] ; 0x30
} else {
// Even numbered pin
hri_port_write_PMUX_PMUXE_bf(PORT, port, pin >> 1, function & 0xffff);
}
}
}
3712: bd30 pop {r4, r5, pc}
00003714 <QUAD_SPI_0_PORT_init>:
struct mci_sync_desc IO_BUS;
struct usb_h_desc USB_HOST_INSTANCE_inst;
void QUAD_SPI_0_PORT_init(void)
{
3714: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
// Set pin direction to input
gpio_set_pin_direction(PB11, GPIO_DIRECTION_IN);
3718: 2101 movs r1, #1
371a: 4e1e ldr r6, [pc, #120] ; (3794 <QUAD_SPI_0_PORT_init+0x80>)
gpio_set_pin_pull_mode(PB11,
371c: 4d1e ldr r5, [pc, #120] ; (3798 <QUAD_SPI_0_PORT_init+0x84>)
_gpio_set_pin_function(pin, function);
371e: 4c1f ldr r4, [pc, #124] ; (379c <QUAD_SPI_0_PORT_init+0x88>)
((Port *)hw)->Group[submodule_index].OUTCLR.reg = mask;
3720: 4f1f ldr r7, [pc, #124] ; (37a0 <QUAD_SPI_0_PORT_init+0x8c>)
gpio_set_pin_direction(PB11, GPIO_DIRECTION_IN);
3722: 202b movs r0, #43 ; 0x2b
3724: 47b0 blx r6
gpio_set_pin_pull_mode(PB11,
3726: 202b movs r0, #43 ; 0x2b
3728: 491e ldr r1, [pc, #120] ; (37a4 <QUAD_SPI_0_PORT_init+0x90>)
372a: 47a8 blx r5
372c: 47a0 blx r4
// <GPIO_PULL_DOWN"> Pull-down
GPIO_PULL_OFF);
gpio_set_pin_function(PB11, PINMUX_PB11H_QSPI_CS);
gpio_set_pin_direction(PA08,
372e: 2102 movs r1, #2
3730: 2008 movs r0, #8
3732: 47b0 blx r6
3734: f44f 7380 mov.w r3, #256 ; 0x100
3738: 617b str r3, [r7, #20]
// <id> pad_initial_level
// <false"> Low
// <true"> High
false);
gpio_set_pin_pull_mode(PA08,
373a: 2008 movs r0, #8
373c: 491a ldr r1, [pc, #104] ; (37a8 <QUAD_SPI_0_PORT_init+0x94>)
373e: 47a8 blx r5
3740: 47a0 blx r4
// <GPIO_PIN_FUNCTION_L"> L
// <GPIO_PIN_FUNCTION_M"> M
// <GPIO_PIN_FUNCTION_N"> N
PINMUX_PA08H_QSPI_DATA0);
gpio_set_pin_direction(PA09,
3742: 2102 movs r1, #2
3744: 2009 movs r0, #9
3746: 47b0 blx r6
3748: f44f 7300 mov.w r3, #512 ; 0x200
374c: 617b str r3, [r7, #20]
// <id> pad_initial_level
// <false"> Low
// <true"> High
false);
gpio_set_pin_pull_mode(PA09,
374e: 2009 movs r0, #9
3750: 4916 ldr r1, [pc, #88] ; (37ac <QUAD_SPI_0_PORT_init+0x98>)
3752: 47a8 blx r5
3754: 47a0 blx r4
// <GPIO_PIN_FUNCTION_L"> L
// <GPIO_PIN_FUNCTION_M"> M
// <GPIO_PIN_FUNCTION_N"> N
PINMUX_PA09H_QSPI_DATA1);
gpio_set_pin_direction(PA10,
3756: 2102 movs r1, #2
3758: 200a movs r0, #10
375a: 47b0 blx r6
375c: f44f 6380 mov.w r3, #1024 ; 0x400
3760: 617b str r3, [r7, #20]
// <id> pad_initial_level
// <false"> Low
// <true"> High
false);
gpio_set_pin_pull_mode(PA10,
3762: 200a movs r0, #10
3764: 4912 ldr r1, [pc, #72] ; (37b0 <QUAD_SPI_0_PORT_init+0x9c>)
3766: 47a8 blx r5
3768: 47a0 blx r4
// <GPIO_PIN_FUNCTION_L"> L
// <GPIO_PIN_FUNCTION_M"> M
// <GPIO_PIN_FUNCTION_N"> N
PINMUX_PA10H_QSPI_DATA2);
gpio_set_pin_direction(PA11,
376a: 2102 movs r1, #2
376c: 200b movs r0, #11
376e: 47b0 blx r6
3770: f44f 6300 mov.w r3, #2048 ; 0x800
3774: 617b str r3, [r7, #20]
// <id> pad_initial_level
// <false"> Low
// <true"> High
false);
gpio_set_pin_pull_mode(PA11,
3776: 200b movs r0, #11
3778: 490e ldr r1, [pc, #56] ; (37b4 <QUAD_SPI_0_PORT_init+0xa0>)
377a: 47a8 blx r5
377c: 47a0 blx r4
// <GPIO_PIN_FUNCTION_M"> M
// <GPIO_PIN_FUNCTION_N"> N
PINMUX_PA11H_QSPI_DATA3);
// Set pin direction to input
gpio_set_pin_direction(PB10, GPIO_DIRECTION_IN);
377e: 2101 movs r1, #1
3780: 202a movs r0, #42 ; 0x2a
3782: 47b0 blx r6
gpio_set_pin_pull_mode(PB10,
3784: 202a movs r0, #42 ; 0x2a
3786: 47a8 blx r5
3788: 490b ldr r1, [pc, #44] ; (37b8 <QUAD_SPI_0_PORT_init+0xa4>)
378a: 4623 mov r3, r4
// <GPIO_PULL_UP"> Pull-up
// <GPIO_PULL_DOWN"> Pull-down
GPIO_PULL_OFF);
gpio_set_pin_function(PB10, PINMUX_PB10H_QSPI_SCK);
}
378c: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
3790: 4718 bx r3
3792: bf00 nop
3794: 00003661 .word 0x00003661
3798: 000036a9 .word 0x000036a9
379c: 000036c9 .word 0x000036c9
37a0: 41008000 .word 0x41008000
37a4: 002b0007 .word 0x002b0007
37a8: 00080007 .word 0x00080007
37ac: 00090007 .word 0x00090007
37b0: 000a0007 .word 0x000a0007
37b4: 000b0007 .word 0x000b0007
37b8: 002a0007 .word 0x002a0007
000037bc <QUAD_SPI_0_CLOCK_init>:
}
static inline void hri_mclk_set_AHBMASK_QSPI_bit(const void *const hw)
{
MCLK_CRITICAL_SECTION_ENTER();
((Mclk *)hw)->AHBMASK.reg |= MCLK_AHBMASK_QSPI;
37bc: 4b06 ldr r3, [pc, #24] ; (37d8 <QUAD_SPI_0_CLOCK_init+0x1c>)
37be: 691a ldr r2, [r3, #16]
37c0: f442 5200 orr.w r2, r2, #8192 ; 0x2000
37c4: 611a str r2, [r3, #16]
}
static inline void hri_mclk_set_AHBMASK_QSPI_2X_bit(const void *const hw)
{
MCLK_CRITICAL_SECTION_ENTER();
((Mclk *)hw)->AHBMASK.reg |= MCLK_AHBMASK_QSPI_2X;
37c6: 691a ldr r2, [r3, #16]
37c8: f442 1200 orr.w r2, r2, #2097152 ; 0x200000
37cc: 611a str r2, [r3, #16]
}
static inline void hri_mclk_set_APBCMASK_QSPI_bit(const void *const hw)
{
MCLK_CRITICAL_SECTION_ENTER();
((Mclk *)hw)->APBCMASK.reg |= MCLK_APBCMASK_QSPI;
37ce: 69da ldr r2, [r3, #28]
37d0: f442 5200 orr.w r2, r2, #8192 ; 0x2000
37d4: 61da str r2, [r3, #28]
void QUAD_SPI_0_CLOCK_init(void)
{
hri_mclk_set_AHBMASK_QSPI_bit(MCLK);
hri_mclk_set_AHBMASK_QSPI_2X_bit(MCLK);
hri_mclk_set_APBCMASK_QSPI_bit(MCLK);
}
37d6: 4770 bx lr
37d8: 40000800 .word 0x40000800
000037dc <QUAD_SPI_0_init>:
void QUAD_SPI_0_init(void)
{
37dc: b510 push {r4, lr}
QUAD_SPI_0_CLOCK_init();
37de: 4b05 ldr r3, [pc, #20] ; (37f4 <QUAD_SPI_0_init+0x18>)
qspi_sync_init(&QUAD_SPI_0, QSPI);
37e0: 4905 ldr r1, [pc, #20] ; (37f8 <QUAD_SPI_0_init+0x1c>)
37e2: 4806 ldr r0, [pc, #24] ; (37fc <QUAD_SPI_0_init+0x20>)
QUAD_SPI_0_CLOCK_init();
37e4: 4798 blx r3
qspi_sync_init(&QUAD_SPI_0, QSPI);
37e6: 4b06 ldr r3, [pc, #24] ; (3800 <QUAD_SPI_0_init+0x24>)
37e8: 4798 blx r3
QUAD_SPI_0_PORT_init();
}
37ea: e8bd 4010 ldmia.w sp!, {r4, lr}
QUAD_SPI_0_PORT_init();
37ee: 4b05 ldr r3, [pc, #20] ; (3804 <QUAD_SPI_0_init+0x28>)
37f0: 4718 bx r3
37f2: bf00 nop
37f4: 000037bd .word 0x000037bd
37f8: 42003400 .word 0x42003400
37fc: 20000548 .word 0x20000548
3800: 00003f19 .word 0x00003f19
3804: 00003715 .word 0x00003715
00003808 <CALENDER_INTERFACE_CLOCK_init>:
((Mclk *)hw)->APBAMASK.reg |= MCLK_APBAMASK_RTC;
3808: 4a02 ldr r2, [pc, #8] ; (3814 <CALENDER_INTERFACE_CLOCK_init+0xc>)
380a: 6953 ldr r3, [r2, #20]
380c: f443 7300 orr.w r3, r3, #512 ; 0x200
3810: 6153 str r3, [r2, #20]
void CALENDER_INTERFACE_CLOCK_init(void)
{
hri_mclk_set_APBAMASK_RTC_bit(MCLK);
}
3812: 4770 bx lr
3814: 40000800 .word 0x40000800
00003818 <CALENDER_INTERFACE_init>:
void CALENDER_INTERFACE_init(void)
{
3818: b510 push {r4, lr}
CALENDER_INTERFACE_CLOCK_init();
381a: 4b04 ldr r3, [pc, #16] ; (382c <CALENDER_INTERFACE_init+0x14>)
calendar_init(&CALENDER_INTERFACE, RTC);
381c: 4904 ldr r1, [pc, #16] ; (3830 <CALENDER_INTERFACE_init+0x18>)
381e: 4805 ldr r0, [pc, #20] ; (3834 <CALENDER_INTERFACE_init+0x1c>)
CALENDER_INTERFACE_CLOCK_init();
3820: 4798 blx r3
}
3822: e8bd 4010 ldmia.w sp!, {r4, lr}
calendar_init(&CALENDER_INTERFACE, RTC);
3826: 4b04 ldr r3, [pc, #16] ; (3838 <CALENDER_INTERFACE_init+0x20>)
3828: 4718 bx r3
382a: bf00 nop
382c: 00003809 .word 0x00003809
3830: 40002400 .word 0x40002400
3834: 2000054c .word 0x2000054c
3838: 00000309 .word 0x00000309
0000383c <SPI_0_PORT_init>:
void SPI_0_PORT_init(void)
{
383c: b570 push {r4, r5, r6, lr}
383e: 4e12 ldr r6, [pc, #72] ; (3888 <SPI_0_PORT_init+0x4c>)
// <false"> Low
// <true"> High
false);
// Set pin direction to output
gpio_set_pin_direction(PB26, GPIO_DIRECTION_OUT);
3840: 4d12 ldr r5, [pc, #72] ; (388c <SPI_0_PORT_init+0x50>)
3842: 4c13 ldr r4, [pc, #76] ; (3890 <SPI_0_PORT_init+0x54>)
3844: f04f 6380 mov.w r3, #67108864 ; 0x4000000
3848: f8c6 3094 str.w r3, [r6, #148] ; 0x94
384c: 2102 movs r1, #2
384e: 203a movs r0, #58 ; 0x3a
3850: 47a8 blx r5
3852: f501 1168 add.w r1, r1, #3801088 ; 0x3a0000
3856: 203a movs r0, #58 ; 0x3a
3858: 47a0 blx r4
385a: f04f 6300 mov.w r3, #134217728 ; 0x8000000
385e: f8c6 3094 str.w r3, [r6, #148] ; 0x94
// <false"> Low
// <true"> High
false);
// Set pin direction to output
gpio_set_pin_direction(PB27, GPIO_DIRECTION_OUT);
3862: 2102 movs r1, #2
3864: 203b movs r0, #59 ; 0x3b
3866: 47a8 blx r5
3868: f501 116c add.w r1, r1, #3866624 ; 0x3b0000
386c: 203b movs r0, #59 ; 0x3b
386e: 47a0 blx r4
gpio_set_pin_function(PB27, PINMUX_PB27C_SERCOM2_PAD1);
// Set pin direction to input
gpio_set_pin_direction(PB29, GPIO_DIRECTION_IN);
3870: 2101 movs r1, #1
3872: 203d movs r0, #61 ; 0x3d
3874: 47a8 blx r5
gpio_set_pin_pull_mode(PB29,
3876: 4b07 ldr r3, [pc, #28] ; (3894 <SPI_0_PORT_init+0x58>)
3878: 4907 ldr r1, [pc, #28] ; (3898 <SPI_0_PORT_init+0x5c>)
387a: 203d movs r0, #61 ; 0x3d
387c: 4798 blx r3
387e: 4623 mov r3, r4
// <GPIO_PULL_UP"> Pull-up
// <GPIO_PULL_DOWN"> Pull-down
GPIO_PULL_OFF);
gpio_set_pin_function(PB29, PINMUX_PB29C_SERCOM2_PAD3);
}
3880: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
3884: 4718 bx r3
3886: bf00 nop
3888: 41008000 .word 0x41008000
388c: 00003661 .word 0x00003661
3890: 000036c9 .word 0x000036c9
3894: 000036a9 .word 0x000036a9
3898: 003d0002 .word 0x003d0002
0000389c <SPI_0_CLOCK_init>:
((Gclk *)hw)->PCHCTRL[index].reg = data;
389c: 4b06 ldr r3, [pc, #24] ; (38b8 <SPI_0_CLOCK_init+0x1c>)
389e: 2240 movs r2, #64 ; 0x40
38a0: f8c3 20dc str.w r2, [r3, #220] ; 0xdc
38a4: 2243 movs r2, #67 ; 0x43
38a6: f8c3 208c str.w r2, [r3, #140] ; 0x8c
((Mclk *)hw)->APBBMASK.reg |= MCLK_APBBMASK_SERCOM2;
38aa: 4a04 ldr r2, [pc, #16] ; (38bc <SPI_0_CLOCK_init+0x20>)
38ac: 6993 ldr r3, [r2, #24]
38ae: f443 7300 orr.w r3, r3, #512 ; 0x200
38b2: 6193 str r3, [r2, #24]
{
hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM2_GCLK_ID_CORE, CONF_GCLK_SERCOM2_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM2_GCLK_ID_SLOW, CONF_GCLK_SERCOM2_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
hri_mclk_set_APBBMASK_SERCOM2_bit(MCLK);
}
38b4: 4770 bx lr
38b6: bf00 nop
38b8: 40001c00 .word 0x40001c00
38bc: 40000800 .word 0x40000800
000038c0 <SPI_0_init>:
void SPI_0_init(void)
{
38c0: b510 push {r4, lr}
SPI_0_CLOCK_init();
38c2: 4b05 ldr r3, [pc, #20] ; (38d8 <SPI_0_init+0x18>)
spi_m_sync_init(&SPI_0, SERCOM2);
38c4: 4905 ldr r1, [pc, #20] ; (38dc <SPI_0_init+0x1c>)
38c6: 4806 ldr r0, [pc, #24] ; (38e0 <SPI_0_init+0x20>)
SPI_0_CLOCK_init();
38c8: 4798 blx r3
spi_m_sync_init(&SPI_0, SERCOM2);
38ca: 4b06 ldr r3, [pc, #24] ; (38e4 <SPI_0_init+0x24>)
38cc: 4798 blx r3
SPI_0_PORT_init();
}
38ce: e8bd 4010 ldmia.w sp!, {r4, lr}
SPI_0_PORT_init();
38d2: 4b05 ldr r3, [pc, #20] ; (38e8 <SPI_0_init+0x28>)
38d4: 4718 bx r3
38d6: bf00 nop
38d8: 0000389d .word 0x0000389d
38dc: 41012000 .word 0x41012000
38e0: 2000056c .word 0x2000056c
38e4: 000015a1 .word 0x000015a1
38e8: 0000383d .word 0x0000383d
000038ec <USART_DBG_PORT_init>:
void USART_DBG_PORT_init(void)
{
38ec: b510 push {r4, lr}
38ee: 4c05 ldr r4, [pc, #20] ; (3904 <USART_DBG_PORT_init+0x18>)
38f0: 4905 ldr r1, [pc, #20] ; (3908 <USART_DBG_PORT_init+0x1c>)
38f2: 202c movs r0, #44 ; 0x2c
38f4: 47a0 blx r4
38f6: 4623 mov r3, r4
38f8: 4904 ldr r1, [pc, #16] ; (390c <USART_DBG_PORT_init+0x20>)
gpio_set_pin_function(PB12, PINMUX_PB12C_SERCOM4_PAD0);
gpio_set_pin_function(PB13, PINMUX_PB13C_SERCOM4_PAD1);
}
38fa: e8bd 4010 ldmia.w sp!, {r4, lr}
38fe: 202d movs r0, #45 ; 0x2d
3900: 4718 bx r3
3902: bf00 nop
3904: 000036c9 .word 0x000036c9
3908: 002c0002 .word 0x002c0002
390c: 002d0002 .word 0x002d0002
00003910 <USART_DBG_CLOCK_init>:
3910: 4b06 ldr r3, [pc, #24] ; (392c <USART_DBG_CLOCK_init+0x1c>)
3912: 2240 movs r2, #64 ; 0x40
3914: f8c3 2108 str.w r2, [r3, #264] ; 0x108
3918: 2243 movs r2, #67 ; 0x43
391a: f8c3 208c str.w r2, [r3, #140] ; 0x8c
}
static inline void hri_mclk_set_APBDMASK_SERCOM4_bit(const void *const hw)
{
MCLK_CRITICAL_SECTION_ENTER();
((Mclk *)hw)->APBDMASK.reg |= MCLK_APBDMASK_SERCOM4;
391e: 4a04 ldr r2, [pc, #16] ; (3930 <USART_DBG_CLOCK_init+0x20>)
3920: 6a13 ldr r3, [r2, #32]
3922: f043 0301 orr.w r3, r3, #1
3926: 6213 str r3, [r2, #32]
{
hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM4_GCLK_ID_CORE, CONF_GCLK_SERCOM4_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM4_GCLK_ID_SLOW, CONF_GCLK_SERCOM4_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
hri_mclk_set_APBDMASK_SERCOM4_bit(MCLK);
}
3928: 4770 bx lr
392a: bf00 nop
392c: 40001c00 .word 0x40001c00
3930: 40000800 .word 0x40000800
00003934 <USART_DBG_init>:
void USART_DBG_init(void)
{
3934: b510 push {r4, lr}
USART_DBG_CLOCK_init();
3936: 4b06 ldr r3, [pc, #24] ; (3950 <USART_DBG_init+0x1c>)
usart_sync_init(&USART_DBG, SERCOM4, (void *)NULL);
3938: 4806 ldr r0, [pc, #24] ; (3954 <USART_DBG_init+0x20>)
USART_DBG_CLOCK_init();
393a: 4798 blx r3
usart_sync_init(&USART_DBG, SERCOM4, (void *)NULL);
393c: f04f 4186 mov.w r1, #1124073472 ; 0x43000000
3940: 4b05 ldr r3, [pc, #20] ; (3958 <USART_DBG_init+0x24>)
3942: 2200 movs r2, #0
3944: 4798 blx r3
USART_DBG_PORT_init();
}
3946: e8bd 4010 ldmia.w sp!, {r4, lr}
USART_DBG_PORT_init();
394a: 4b04 ldr r3, [pc, #16] ; (395c <USART_DBG_init+0x28>)
394c: 4718 bx r3
394e: bf00 nop
3950: 00003911 .word 0x00003911
3954: 20000584 .word 0x20000584
3958: 00002b3d .word 0x00002b3d
395c: 000038ed .word 0x000038ed
00003960 <IO_BUS_PORT_init>:
void IO_BUS_PORT_init(void)
{
3960: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
3964: 4e22 ldr r6, [pc, #136] ; (39f0 <IO_BUS_PORT_init+0x90>)
gpio_set_pin_direction(PA21,
3966: 4f23 ldr r7, [pc, #140] ; (39f4 <IO_BUS_PORT_init+0x94>)
// <id> pad_initial_level
// <false"> Low
// <true"> High
false);
gpio_set_pin_pull_mode(PA21,
3968: 4d23 ldr r5, [pc, #140] ; (39f8 <IO_BUS_PORT_init+0x98>)
396a: 4c24 ldr r4, [pc, #144] ; (39fc <IO_BUS_PORT_init+0x9c>)
396c: f44f 1800 mov.w r8, #2097152 ; 0x200000
gpio_set_pin_direction(PA21,
3970: 2102 movs r1, #2
3972: 2015 movs r0, #21
3974: 47b8 blx r7
gpio_set_pin_pull_mode(PA21,
3976: 2015 movs r0, #21
3978: 4921 ldr r1, [pc, #132] ; (3a00 <IO_BUS_PORT_init+0xa0>)
397a: f8c6 8014 str.w r8, [r6, #20]
397e: 47a8 blx r5
3980: f44f 1980 mov.w r9, #1048576 ; 0x100000
3984: 47a0 blx r4
// <GPIO_PIN_FUNCTION_L"> L
// <GPIO_PIN_FUNCTION_M"> M
// <GPIO_PIN_FUNCTION_N"> N
PINMUX_PA21I_SDHC1_SDCK);
gpio_set_pin_direction(PA20,
3986: 2102 movs r1, #2
3988: 2014 movs r0, #20
398a: 47b8 blx r7
// <id> pad_initial_level
// <false"> Low
// <true"> High
false);
gpio_set_pin_pull_mode(PA20,
398c: 2014 movs r0, #20
398e: 491d ldr r1, [pc, #116] ; (3a04 <IO_BUS_PORT_init+0xa4>)
3990: f8c6 9014 str.w r9, [r6, #20]
3994: 47a8 blx r5
3996: 47a0 blx r4
// <GPIO_PIN_FUNCTION_L"> L
// <GPIO_PIN_FUNCTION_M"> M
// <GPIO_PIN_FUNCTION_N"> N
PINMUX_PA20I_SDHC1_SDCMD);
gpio_set_pin_direction(PB18,
3998: 2102 movs r1, #2
399a: 2032 movs r0, #50 ; 0x32
399c: 47b8 blx r7
399e: f44f 2380 mov.w r3, #262144 ; 0x40000
39a2: f8c6 3094 str.w r3, [r6, #148] ; 0x94
// <id> pad_initial_level
// <false"> Low
// <true"> High
false);
gpio_set_pin_pull_mode(PB18,
39a6: 2032 movs r0, #50 ; 0x32
39a8: 4917 ldr r1, [pc, #92] ; (3a08 <IO_BUS_PORT_init+0xa8>)
39aa: 47a8 blx r5
39ac: 47a0 blx r4
// <GPIO_PIN_FUNCTION_L"> L
// <GPIO_PIN_FUNCTION_M"> M
// <GPIO_PIN_FUNCTION_N"> N
PINMUX_PB18I_SDHC1_SDDAT0);
gpio_set_pin_direction(PB19,
39ae: 2102 movs r1, #2
39b0: 2033 movs r0, #51 ; 0x33
39b2: 47b8 blx r7
39b4: f44f 2300 mov.w r3, #524288 ; 0x80000
39b8: f8c6 3094 str.w r3, [r6, #148] ; 0x94
// <id> pad_initial_level
// <false"> Low
// <true"> High
false);
gpio_set_pin_pull_mode(PB19,
39bc: 2033 movs r0, #51 ; 0x33
39be: 4913 ldr r1, [pc, #76] ; (3a0c <IO_BUS_PORT_init+0xac>)
39c0: 47a8 blx r5
39c2: 47a0 blx r4
// <GPIO_PIN_FUNCTION_L"> L
// <GPIO_PIN_FUNCTION_M"> M
// <GPIO_PIN_FUNCTION_N"> N
PINMUX_PB19I_SDHC1_SDDAT1);
gpio_set_pin_direction(PB20,
39c4: 2102 movs r1, #2
39c6: 2034 movs r0, #52 ; 0x34
39c8: 47b8 blx r7
// <id> pad_initial_level
// <false"> Low
// <true"> High
false);
gpio_set_pin_pull_mode(PB20,
39ca: 2034 movs r0, #52 ; 0x34
39cc: 4910 ldr r1, [pc, #64] ; (3a10 <IO_BUS_PORT_init+0xb0>)
39ce: f8c6 9094 str.w r9, [r6, #148] ; 0x94
39d2: 47a8 blx r5
39d4: 47a0 blx r4
// <GPIO_PIN_FUNCTION_L"> L
// <GPIO_PIN_FUNCTION_M"> M
// <GPIO_PIN_FUNCTION_N"> N
PINMUX_PB20I_SDHC1_SDDAT2);
gpio_set_pin_direction(PB21,
39d6: 2102 movs r1, #2
39d8: 2035 movs r0, #53 ; 0x35
39da: 47b8 blx r7
39dc: f8c6 8094 str.w r8, [r6, #148] ; 0x94
// <id> pad_initial_level
// <false"> Low
// <true"> High
false);
gpio_set_pin_pull_mode(PB21,
39e0: 2035 movs r0, #53 ; 0x35
39e2: 47a8 blx r5
39e4: 490b ldr r1, [pc, #44] ; (3a14 <IO_BUS_PORT_init+0xb4>)
39e6: 4623 mov r3, r4
// <GPIO_PIN_FUNCTION_K"> K
// <GPIO_PIN_FUNCTION_L"> L
// <GPIO_PIN_FUNCTION_M"> M
// <GPIO_PIN_FUNCTION_N"> N
PINMUX_PB21I_SDHC1_SDDAT3);
}
39e8: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
39ec: 4718 bx r3
39ee: bf00 nop
39f0: 41008000 .word 0x41008000
39f4: 00003661 .word 0x00003661
39f8: 000036a9 .word 0x000036a9
39fc: 000036c9 .word 0x000036c9
3a00: 00150008 .word 0x00150008
3a04: 00140008 .word 0x00140008
3a08: 00320008 .word 0x00320008
3a0c: 00330008 .word 0x00330008
3a10: 00340008 .word 0x00340008
3a14: 00350008 .word 0x00350008
00003a18 <IO_BUS_CLOCK_init>:
((Mclk *)hw)->AHBMASK.reg |= MCLK_AHBMASK_SDHC1;
3a18: 4a05 ldr r2, [pc, #20] ; (3a30 <IO_BUS_CLOCK_init+0x18>)
3a1a: 6913 ldr r3, [r2, #16]
3a1c: f443 3380 orr.w r3, r3, #65536 ; 0x10000
3a20: 6113 str r3, [r2, #16]
3a22: 4b04 ldr r3, [pc, #16] ; (3a34 <IO_BUS_CLOCK_init+0x1c>)
3a24: 2240 movs r2, #64 ; 0x40
3a26: f8c3 2138 str.w r2, [r3, #312] ; 0x138
3a2a: f8c3 208c str.w r2, [r3, #140] ; 0x8c
void IO_BUS_CLOCK_init(void)
{
hri_mclk_set_AHBMASK_SDHC1_bit(MCLK);
hri_gclk_write_PCHCTRL_reg(GCLK, SDHC1_GCLK_ID, CONF_GCLK_SDHC1_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
hri_gclk_write_PCHCTRL_reg(GCLK, SDHC1_GCLK_ID_SLOW, CONF_GCLK_SDHC1_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
}
3a2e: 4770 bx lr
3a30: 40000800 .word 0x40000800
3a34: 40001c00 .word 0x40001c00
00003a38 <IO_BUS_init>:
void IO_BUS_init(void)
{
3a38: b510 push {r4, lr}
IO_BUS_CLOCK_init();
3a3a: 4b05 ldr r3, [pc, #20] ; (3a50 <IO_BUS_init+0x18>)
mci_sync_init(&IO_BUS, SDHC1);
3a3c: 4805 ldr r0, [pc, #20] ; (3a54 <IO_BUS_init+0x1c>)
IO_BUS_CLOCK_init();
3a3e: 4798 blx r3
mci_sync_init(&IO_BUS, SDHC1);
3a40: f04f 418c mov.w r1, #1174405120 ; 0x46000000
3a44: 4b04 ldr r3, [pc, #16] ; (3a58 <IO_BUS_init+0x20>)
3a46: 4798 blx r3
IO_BUS_PORT_init();
}
3a48: e8bd 4010 ldmia.w sp!, {r4, lr}
IO_BUS_PORT_init();
3a4c: 4b03 ldr r3, [pc, #12] ; (3a5c <IO_BUS_init+0x24>)
3a4e: 4718 bx r3
3a50: 00003a19 .word 0x00003a19
3a54: 20000590 .word 0x20000590
3a58: 0000170d .word 0x0000170d
3a5c: 00003961 .word 0x00003961
00003a60 <my_vbus_ctrl_func>:
* VBus must be always turned on if this callback is disabled.
*/
WEAK void my_vbus_ctrl_func(void *drv, uint8_t port, bool onoff)
{
/* Turn on/off your root hub port power */
}
3a60: 4770 bx lr
...
00003a64 <USB_HOST_INSTANCE_CLOCK_init>:
3a64: 4b07 ldr r3, [pc, #28] ; (3a84 <USB_HOST_INSTANCE_CLOCK_init+0x20>)
3a66: 2240 movs r2, #64 ; 0x40
3a68: f8c3 20a8 str.w r2, [r3, #168] ; 0xa8
((Mclk *)hw)->AHBMASK.reg |= MCLK_AHBMASK_USB;
3a6c: f5a3 53a0 sub.w r3, r3, #5120 ; 0x1400
3a70: 691a ldr r2, [r3, #16]
3a72: f442 6280 orr.w r2, r2, #1024 ; 0x400
3a76: 611a str r2, [r3, #16]
((Mclk *)hw)->APBBMASK.reg |= MCLK_APBBMASK_USB;
3a78: 699a ldr r2, [r3, #24]
3a7a: f042 0201 orr.w r2, r2, #1
3a7e: 619a str r2, [r3, #24]
{
hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, CONF_GCLK_USB_SRC | GCLK_PCHCTRL_CHEN);
hri_mclk_set_AHBMASK_USB_bit(MCLK);
hri_mclk_set_APBBMASK_USB_bit(MCLK);
}
3a80: 4770 bx lr
3a82: bf00 nop
3a84: 40001c00 .word 0x40001c00
00003a88 <USB_HOST_INSTANCE_PORT_init>:
void USB_HOST_INSTANCE_PORT_init(void)
{
3a88: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
gpio_set_pin_direction(PA24,
3a8c: 2102 movs r1, #2
3a8e: 4f0d ldr r7, [pc, #52] ; (3ac4 <USB_HOST_INSTANCE_PORT_init+0x3c>)
3a90: 4e0d ldr r6, [pc, #52] ; (3ac8 <USB_HOST_INSTANCE_PORT_init+0x40>)
// <id> pad_initial_level
// <false"> Low
// <true"> High
false);
gpio_set_pin_pull_mode(PA24,
3a92: 4d0e ldr r5, [pc, #56] ; (3acc <USB_HOST_INSTANCE_PORT_init+0x44>)
3a94: 4c0e ldr r4, [pc, #56] ; (3ad0 <USB_HOST_INSTANCE_PORT_init+0x48>)
gpio_set_pin_direction(PA24,
3a96: 2018 movs r0, #24
3a98: 47b8 blx r7
3a9a: f04f 7380 mov.w r3, #16777216 ; 0x1000000
3a9e: 6173 str r3, [r6, #20]
gpio_set_pin_pull_mode(PA24,
3aa0: 2018 movs r0, #24
3aa2: 490c ldr r1, [pc, #48] ; (3ad4 <USB_HOST_INSTANCE_PORT_init+0x4c>)
3aa4: 47a8 blx r5
3aa6: 47a0 blx r4
// <GPIO_PIN_FUNCTION_L"> L
// <GPIO_PIN_FUNCTION_M"> M
// <GPIO_PIN_FUNCTION_N"> N
PINMUX_PA24H_USB_DM);
gpio_set_pin_direction(PA25,
3aa8: 2102 movs r1, #2
3aaa: 2019 movs r0, #25
3aac: 47b8 blx r7
3aae: f04f 7300 mov.w r3, #33554432 ; 0x2000000
3ab2: 6173 str r3, [r6, #20]
// <id> pad_initial_level
// <false"> Low
// <true"> High
false);
gpio_set_pin_pull_mode(PA25,
3ab4: 2019 movs r0, #25
3ab6: 47a8 blx r5
3ab8: 4907 ldr r1, [pc, #28] ; (3ad8 <USB_HOST_INSTANCE_PORT_init+0x50>)
3aba: 4623 mov r3, r4
// <GPIO_PIN_FUNCTION_K"> K
// <GPIO_PIN_FUNCTION_L"> L
// <GPIO_PIN_FUNCTION_M"> M
// <GPIO_PIN_FUNCTION_N"> N
PINMUX_PA25H_USB_DP);
}
3abc: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
3ac0: 4718 bx r3
3ac2: bf00 nop
3ac4: 00003661 .word 0x00003661
3ac8: 41008000 .word 0x41008000
3acc: 000036a9 .word 0x000036a9
3ad0: 000036c9 .word 0x000036c9
3ad4: 00180007 .word 0x00180007
3ad8: 00190007 .word 0x00190007
00003adc <USB_HOST_INSTANCE_init>:
void USB_HOST_INSTANCE_init(void)
{
3adc: b510 push {r4, lr}
USB_HOST_INSTANCE_CLOCK_init();
3ade: 4b06 ldr r3, [pc, #24] ; (3af8 <USB_HOST_INSTANCE_init+0x1c>)
return _usb_h_init(drv, hw, prvt);
3ae0: 4806 ldr r0, [pc, #24] ; (3afc <USB_HOST_INSTANCE_init+0x20>)
3ae2: 4798 blx r3
3ae4: f04f 4182 mov.w r1, #1090519040 ; 0x41000000
3ae8: 4b05 ldr r3, [pc, #20] ; (3b00 <USB_HOST_INSTANCE_init+0x24>)
3aea: 2200 movs r2, #0
3aec: 4798 blx r3
usb_h_init(&USB_HOST_INSTANCE_inst, USB, NULL);
USB_HOST_INSTANCE_PORT_init();
}
3aee: e8bd 4010 ldmia.w sp!, {r4, lr}
USB_HOST_INSTANCE_PORT_init();
3af2: 4b04 ldr r3, [pc, #16] ; (3b04 <USB_HOST_INSTANCE_init+0x28>)
3af4: 4718 bx r3
3af6: bf00 nop
3af8: 00003a65 .word 0x00003a65
3afc: 200005a8 .word 0x200005a8
3b00: 000018c5 .word 0x000018c5
3b04: 00003a89 .word 0x00003a89
00003b08 <system_init>:
void system_init(void)
{
3b08: b510 push {r4, lr}
* Currently the following initialization functions are supported:
* - System clock initialization
*/
static inline void init_mcu(void)
{
_init_chip();
3b0a: 4b08 ldr r3, [pc, #32] ; (3b2c <system_init+0x24>)
3b0c: 4798 blx r3
init_mcu();
QUAD_SPI_0_init();
3b0e: 4b08 ldr r3, [pc, #32] ; (3b30 <system_init+0x28>)
3b10: 4798 blx r3
CALENDER_INTERFACE_init();
3b12: 4b08 ldr r3, [pc, #32] ; (3b34 <system_init+0x2c>)
3b14: 4798 blx r3
SPI_0_init();
3b16: 4b08 ldr r3, [pc, #32] ; (3b38 <system_init+0x30>)
3b18: 4798 blx r3
USART_DBG_init();
3b1a: 4b08 ldr r3, [pc, #32] ; (3b3c <system_init+0x34>)
3b1c: 4798 blx r3
IO_BUS_init();
3b1e: 4b08 ldr r3, [pc, #32] ; (3b40 <system_init+0x38>)
3b20: 4798 blx r3
USB_HOST_INSTANCE_init();
}
3b22: e8bd 4010 ldmia.w sp!, {r4, lr}
USB_HOST_INSTANCE_init();
3b26: 4b07 ldr r3, [pc, #28] ; (3b44 <system_init+0x3c>)
3b28: 4718 bx r3
3b2a: bf00 nop
3b2c: 00002855 .word 0x00002855
3b30: 000037dd .word 0x000037dd
3b34: 00003819 .word 0x00003819
3b38: 000038c1 .word 0x000038c1
3b3c: 00003935 .word 0x00003935
3b40: 00003a39 .word 0x00003a39
3b44: 00003add .word 0x00003add
00003b48 <hri_sercomspi_wait_for_sync>:
return ((Sercom *)hw)->I2CS.SYNCBUSY.reg & reg;
}
static inline void hri_sercomspi_wait_for_sync(const void *const hw, hri_sercomspi_syncbusy_reg_t reg)
{
while (((Sercom *)hw)->SPI.SYNCBUSY.reg & reg) {
3b48: 69c3 ldr r3, [r0, #28]
3b4a: 420b tst r3, r1
3b4c: d1fc bne.n 3b48 <hri_sercomspi_wait_for_sync>
};
}
3b4e: 4770 bx lr
00003b50 <hri_sercomusart_wait_for_sync>:
return ((Sercom *)hw)->SPI.SYNCBUSY.reg & reg;
}
static inline void hri_sercomusart_wait_for_sync(const void *const hw, hri_sercomusart_syncbusy_reg_t reg)
{
while (((Sercom *)hw)->USART.SYNCBUSY.reg & reg) {
3b50: 69c3 ldr r3, [r0, #28]
3b52: 420b tst r3, r1
3b54: d1fc bne.n 3b50 <hri_sercomusart_wait_for_sync>
};
}
3b56: 4770 bx lr
00003b58 <hri_sercomspi_clear_CTRLA_ENABLE_bit>:
}
static inline void hri_sercomspi_clear_CTRLA_ENABLE_bit(const void *const hw)
{
SERCOM_CRITICAL_SECTION_ENTER();
((Sercom *)hw)->SPI.CTRLA.reg &= ~SERCOM_SPI_CTRLA_ENABLE;
3b58: 6802 ldr r2, [r0, #0]
hri_sercomspi_wait_for_sync(hw, SERCOM_SPI_SYNCBUSY_SWRST | SERCOM_SPI_SYNCBUSY_ENABLE);
3b5a: 4b03 ldr r3, [pc, #12] ; (3b68 <hri_sercomspi_clear_CTRLA_ENABLE_bit+0x10>)
((Sercom *)hw)->SPI.CTRLA.reg &= ~SERCOM_SPI_CTRLA_ENABLE;
3b5c: f022 0202 bic.w r2, r2, #2
3b60: 6002 str r2, [r0, #0]
hri_sercomspi_wait_for_sync(hw, SERCOM_SPI_SYNCBUSY_SWRST | SERCOM_SPI_SYNCBUSY_ENABLE);
3b62: 2103 movs r1, #3
3b64: 4718 bx r3
3b66: bf00 nop
3b68: 00003b49 .word 0x00003b49
00003b6c <hri_sercomusart_clear_CTRLA_ENABLE_bit>:
}
static inline void hri_sercomusart_clear_CTRLA_ENABLE_bit(const void *const hw)
{
SERCOM_CRITICAL_SECTION_ENTER();
((Sercom *)hw)->USART.CTRLA.reg &= ~SERCOM_USART_CTRLA_ENABLE;
3b6c: 6802 ldr r2, [r0, #0]
hri_sercomusart_wait_for_sync(hw, SERCOM_USART_SYNCBUSY_SWRST | SERCOM_USART_SYNCBUSY_ENABLE);
3b6e: 4b03 ldr r3, [pc, #12] ; (3b7c <hri_sercomusart_clear_CTRLA_ENABLE_bit+0x10>)
((Sercom *)hw)->USART.CTRLA.reg &= ~SERCOM_USART_CTRLA_ENABLE;
3b70: f022 0202 bic.w r2, r2, #2
3b74: 6002 str r2, [r0, #0]
hri_sercomusart_wait_for_sync(hw, SERCOM_USART_SYNCBUSY_SWRST | SERCOM_USART_SYNCBUSY_ENABLE);
3b76: 2103 movs r1, #3
3b78: 4718 bx r3
3b7a: bf00 nop
3b7c: 00003b51 .word 0x00003b51
00003b80 <_sercom_get_hardware_index>:
/**
* \brief Retrieve ordinal number of the given sercom hardware instance
*/
static uint8_t _sercom_get_hardware_index(const void *const hw)
{
3b80: b570 push {r4, r5, r6, lr}
Sercom *const sercom_modules[] = SERCOM_INSTS;
3b82: 4d0c ldr r5, [pc, #48] ; (3bb4 <_sercom_get_hardware_index+0x34>)
{
3b84: 4606 mov r6, r0
Sercom *const sercom_modules[] = SERCOM_INSTS;
3b86: cd0f ldmia r5!, {r0, r1, r2, r3}
{
3b88: b088 sub sp, #32
Sercom *const sercom_modules[] = SERCOM_INSTS;
3b8a: 466c mov r4, sp
3b8c: c40f stmia r4!, {r0, r1, r2, r3}
3b8e: e895 000f ldmia.w r5, {r0, r1, r2, r3}
3b92: e884 000f stmia.w r4, {r0, r1, r2, r3}
/* Find index for SERCOM instance. */
for (uint32_t i = 0; i < SERCOM_INST_NUM; i++) {
3b96: 466a mov r2, sp
3b98: 2300 movs r3, #0
if ((uint32_t)hw == (uint32_t)sercom_modules[i]) {
3b9a: f852 1b04 ldr.w r1, [r2], #4
3b9e: 42b1 cmp r1, r6
3ba0: d102 bne.n 3ba8 <_sercom_get_hardware_index+0x28>
return i;
3ba2: b2d8 uxtb r0, r3
}
}
return 0;
}
3ba4: b008 add sp, #32
3ba6: bd70 pop {r4, r5, r6, pc}
for (uint32_t i = 0; i < SERCOM_INST_NUM; i++) {
3ba8: 3301 adds r3, #1
3baa: 2b08 cmp r3, #8
3bac: d1f5 bne.n 3b9a <_sercom_get_hardware_index+0x1a>
return 0;
3bae: 2000 movs r0, #0
3bb0: e7f8 b.n 3ba4 <_sercom_get_hardware_index+0x24>
3bb2: bf00 nop
3bb4: 00005028 .word 0x00005028
00003bb8 <_spi_sync_enable>:
return ((Sercom *)hw)->SPI.SYNCBUSY.reg & reg;
3bb8: 69c2 ldr r2, [r0, #28]
*
* \return Enabling status
*/
static int32_t _spi_sync_enable(void *const hw)
{
if (hri_sercomspi_is_syncing(hw, SERCOM_SPI_SYNCBUSY_SWRST)) {
3bba: f012 0201 ands.w r2, r2, #1
{
3bbe: b508 push {r3, lr}
if (hri_sercomspi_is_syncing(hw, SERCOM_SPI_SYNCBUSY_SWRST)) {
3bc0: d108 bne.n 3bd4 <_spi_sync_enable+0x1c>
((Sercom *)hw)->SPI.CTRLA.reg |= SERCOM_SPI_CTRLA_ENABLE;
3bc2: 6803 ldr r3, [r0, #0]
3bc4: f043 0302 orr.w r3, r3, #2
3bc8: 6003 str r3, [r0, #0]
hri_sercomspi_wait_for_sync(hw, SERCOM_SPI_SYNCBUSY_SWRST | SERCOM_SPI_SYNCBUSY_ENABLE);
3bca: 2103 movs r1, #3
3bcc: 4b03 ldr r3, [pc, #12] ; (3bdc <_spi_sync_enable+0x24>)
3bce: 4798 blx r3
return ERR_BUSY;
}
hri_sercomspi_set_CTRLA_ENABLE_bit(hw);
return ERR_NONE;
3bd0: 4610 mov r0, r2
}
3bd2: bd08 pop {r3, pc}
return ERR_BUSY;
3bd4: f06f 0003 mvn.w r0, #3
3bd8: e7fb b.n 3bd2 <_spi_sync_enable+0x1a>
3bda: bf00 nop
3bdc: 00003b49 .word 0x00003b49
00003be0 <_usart_init>:
{
3be0: b538 push {r3, r4, r5, lr}
uint8_t sercom_offset = _sercom_get_hardware_index(hw);
3be2: 4b1b ldr r3, [pc, #108] ; (3c50 <_usart_init+0x70>)
{
3be4: 4604 mov r4, r0
uint8_t sercom_offset = _sercom_get_hardware_index(hw);
3be6: 4798 blx r3
if (_usarts[i].number == sercom_offset) {
3be8: 2804 cmp r0, #4
3bea: d005 beq.n 3bf8 <_usart_init+0x18>
ASSERT(false);
3bec: 4919 ldr r1, [pc, #100] ; (3c54 <_usart_init+0x74>)
3bee: 4b1a ldr r3, [pc, #104] ; (3c58 <_usart_init+0x78>)
3bf0: f240 2247 movw r2, #583 ; 0x247
3bf4: 2000 movs r0, #0
3bf6: 4798 blx r3
return ((Sercom *)hw)->USART.SYNCBUSY.reg & reg;
3bf8: 69e3 ldr r3, [r4, #28]
3bfa: 4d18 ldr r5, [pc, #96] ; (3c5c <_usart_init+0x7c>)
if (!hri_sercomusart_is_syncing(hw, SERCOM_USART_SYNCBUSY_SWRST)) {
3bfc: f013 0f01 tst.w r3, #1
3c00: d10e bne.n 3c20 <_usart_init+0x40>
static inline hri_sercomusart_ctrla_reg_t hri_sercomusart_get_CTRLA_reg(const void *const hw,
hri_sercomusart_ctrla_reg_t mask)
{
uint32_t tmp;
hri_sercomusart_wait_for_sync(hw, SERCOM_USART_SYNCBUSY_SWRST | SERCOM_USART_SYNCBUSY_ENABLE);
3c02: 2103 movs r1, #3
3c04: 4620 mov r0, r4
3c06: 47a8 blx r5
tmp = ((Sercom *)hw)->USART.CTRLA.reg;
3c08: 6823 ldr r3, [r4, #0]
if (hri_sercomusart_get_CTRLA_reg(hw, SERCOM_USART_CTRLA_ENABLE)) {
3c0a: 079b lsls r3, r3, #30
3c0c: d503 bpl.n 3c16 <_usart_init+0x36>
hri_sercomusart_clear_CTRLA_ENABLE_bit(hw);
3c0e: 4b14 ldr r3, [pc, #80] ; (3c60 <_usart_init+0x80>)
3c10: 4798 blx r3
hri_sercomusart_wait_for_sync(hw, SERCOM_USART_SYNCBUSY_ENABLE);
3c12: 2102 movs r1, #2
3c14: 47a8 blx r5
}
static inline void hri_sercomusart_write_CTRLA_reg(const void *const hw, hri_sercomusart_ctrla_reg_t data)
{
SERCOM_CRITICAL_SECTION_ENTER();
((Sercom *)hw)->USART.CTRLA.reg = data;
3c16: 2305 movs r3, #5
3c18: 6023 str r3, [r4, #0]
hri_sercomusart_wait_for_sync(hw, SERCOM_USART_SYNCBUSY_SWRST | SERCOM_USART_SYNCBUSY_ENABLE);
3c1a: 2103 movs r1, #3
3c1c: 4620 mov r0, r4
3c1e: 47a8 blx r5
hri_sercomusart_wait_for_sync(hw, SERCOM_USART_SYNCBUSY_SWRST);
3c20: 4620 mov r0, r4
3c22: 2101 movs r1, #1
3c24: 47a8 blx r5
((Sercom *)hw)->USART.CTRLA.reg = data;
3c26: 4b0f ldr r3, [pc, #60] ; (3c64 <_usart_init+0x84>)
3c28: 6023 str r3, [r4, #0]
hri_sercomusart_wait_for_sync(hw, SERCOM_USART_SYNCBUSY_SWRST | SERCOM_USART_SYNCBUSY_ENABLE);
3c2a: 2103 movs r1, #3
3c2c: 47a8 blx r5
}
static inline void hri_sercomusart_write_CTRLB_reg(const void *const hw, hri_sercomusart_ctrlb_reg_t data)
{
SERCOM_CRITICAL_SECTION_ENTER();
((Sercom *)hw)->USART.CTRLB.reg = data;
3c2e: f44f 3340 mov.w r3, #196608 ; 0x30000
3c32: 6063 str r3, [r4, #4]
hri_sercomusart_wait_for_sync(hw, SERCOM_USART_SYNCBUSY_MASK);
3c34: 211f movs r1, #31
3c36: 47a8 blx r5
}
static inline void hri_sercomusart_write_CTRLC_reg(const void *const hw, hri_sercomusart_ctrlc_reg_t data)
{
SERCOM_CRITICAL_SECTION_ENTER();
((Sercom *)hw)->USART.CTRLC.reg = data;
3c38: 4b0b ldr r3, [pc, #44] ; (3c68 <_usart_init+0x88>)
3c3a: 60a3 str r3, [r4, #8]
}
static inline void hri_sercomusart_write_BAUD_reg(const void *const hw, hri_sercomusart_baud_reg_t data)
{
SERCOM_CRITICAL_SECTION_ENTER();
((Sercom *)hw)->USART.BAUD.reg = data;
3c3c: f24f 6329 movw r3, #63017 ; 0xf629
3c40: 81a3 strh r3, [r4, #12]
}
static inline void hri_sercomusart_write_RXPL_reg(const void *const hw, hri_sercomusart_rxpl_reg_t data)
{
SERCOM_CRITICAL_SECTION_ENTER();
((Sercom *)hw)->USART.RXPL.reg = data;
3c42: 2300 movs r3, #0
3c44: 73a3 strb r3, [r4, #14]
}
3c46: 4618 mov r0, r3
}
static inline void hri_sercomusart_write_DBGCTRL_reg(const void *const hw, hri_sercomusart_dbgctrl_reg_t data)
{
SERCOM_CRITICAL_SECTION_ENTER();
((Sercom *)hw)->USART.DBGCTRL.reg = data;
3c48: f884 3030 strb.w r3, [r4, #48] ; 0x30
3c4c: bd38 pop {r3, r4, r5, pc}
3c4e: bf00 nop
3c50: 00003b81 .word 0x00003b81
3c54: 0000500c .word 0x0000500c
3c58: 00002939 .word 0x00002939
3c5c: 00003b51 .word 0x00003b51
3c60: 00003b6d .word 0x00003b6d
3c64: 40100004 .word 0x40100004
3c68: 00700002 .word 0x00700002
00003c6c <_usart_sync_init>:
{
3c6c: b570 push {r4, r5, r6, lr}
ASSERT(device);
3c6e: 4605 mov r5, r0
3c70: 3800 subs r0, #0
{
3c72: 460c mov r4, r1
ASSERT(device);
3c74: 4b05 ldr r3, [pc, #20] ; (3c8c <_usart_sync_init+0x20>)
3c76: 4906 ldr r1, [pc, #24] ; (3c90 <_usart_sync_init+0x24>)
3c78: bf18 it ne
3c7a: 2001 movne r0, #1
3c7c: 22bb movs r2, #187 ; 0xbb
3c7e: 4798 blx r3
device->hw = hw;
3c80: 602c str r4, [r5, #0]
return _usart_init(hw);
3c82: 4620 mov r0, r4
3c84: 4b03 ldr r3, [pc, #12] ; (3c94 <_usart_sync_init+0x28>)
}
3c86: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
return _usart_init(hw);
3c8a: 4718 bx r3
3c8c: 00002939 .word 0x00002939
3c90: 0000500c .word 0x0000500c
3c94: 00003be1 .word 0x00003be1
00003c98 <_usart_sync_enable>:
hri_sercomusart_set_CTRLA_ENABLE_bit(device->hw);
3c98: 6800 ldr r0, [r0, #0]
((Sercom *)hw)->USART.CTRLA.reg |= SERCOM_USART_CTRLA_ENABLE;
3c9a: 6803 ldr r3, [r0, #0]
3c9c: f043 0302 orr.w r3, r3, #2
3ca0: 6003 str r3, [r0, #0]
hri_sercomusart_wait_for_sync(hw, SERCOM_USART_SYNCBUSY_SWRST | SERCOM_USART_SYNCBUSY_ENABLE);
3ca2: 2103 movs r1, #3
3ca4: 4b00 ldr r3, [pc, #0] ; (3ca8 <_usart_sync_enable+0x10>)
3ca6: 4718 bx r3
3ca8: 00003b51 .word 0x00003b51
00003cac <_usart_sync_write_byte>:
hri_sercomusart_write_DATA_reg(device->hw, data);
3cac: 6803 ldr r3, [r0, #0]
((Sercom *)hw)->USART.DATA.reg = data;
3cae: 6299 str r1, [r3, #40] ; 0x28
}
3cb0: 4770 bx lr
00003cb2 <_usart_sync_read_byte>:
return hri_sercomusart_read_DATA_reg(device->hw);
3cb2: 6803 ldr r3, [r0, #0]
return ((Sercom *)hw)->USART.DATA.reg;
3cb4: 6a98 ldr r0, [r3, #40] ; 0x28
}
3cb6: b2c0 uxtb r0, r0
3cb8: 4770 bx lr
00003cba <_usart_sync_is_ready_to_send>:
return hri_sercomusart_get_interrupt_DRE_bit(device->hw);
3cba: 6803 ldr r3, [r0, #0]
return (((Sercom *)hw)->USART.INTFLAG.reg & SERCOM_USART_INTFLAG_DRE) >> SERCOM_USART_INTFLAG_DRE_Pos;
3cbc: 7e18 ldrb r0, [r3, #24]
}
3cbe: f000 0001 and.w r0, r0, #1
3cc2: 4770 bx lr
00003cc4 <_usart_sync_is_transmit_done>:
return hri_sercomusart_get_interrupt_TXC_bit(device->hw);
3cc4: 6803 ldr r3, [r0, #0]
return (((Sercom *)hw)->USART.INTFLAG.reg & SERCOM_USART_INTFLAG_TXC) >> SERCOM_USART_INTFLAG_TXC_Pos;
3cc6: 7e18 ldrb r0, [r3, #24]
}
3cc8: f3c0 0040 ubfx r0, r0, #1, #1
3ccc: 4770 bx lr
00003cce <_usart_sync_is_byte_received>:
return hri_sercomusart_get_interrupt_RXC_bit(device->hw);
3cce: 6803 ldr r3, [r0, #0]
return (((Sercom *)hw)->USART.INTFLAG.reg & SERCOM_USART_INTFLAG_RXC) >> SERCOM_USART_INTFLAG_RXC_Pos;
3cd0: 7e18 ldrb r0, [r3, #24]
}
3cd2: f3c0 0080 ubfx r0, r0, #2, #1
3cd6: 4770 bx lr
00003cd8 <_spi_m_sync_init>:
return NULL;
}
int32_t _spi_m_sync_init(struct _spi_m_sync_dev *dev, void *const hw)
{
3cd8: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
uint8_t n = _sercom_get_hardware_index((const void *)hw_addr);
3cdc: 4b44 ldr r3, [pc, #272] ; (3df0 <_spi_m_sync_init+0x118>)
return NULL;
3cde: 4d45 ldr r5, [pc, #276] ; (3df4 <_spi_m_sync_init+0x11c>)
{
3ce0: 4607 mov r7, r0
uint8_t n = _sercom_get_hardware_index((const void *)hw_addr);
3ce2: 4608 mov r0, r1
{
3ce4: 460c mov r4, r1
uint8_t n = _sercom_get_hardware_index((const void *)hw_addr);
3ce6: 4798 blx r3
return NULL;
3ce8: 2802 cmp r0, #2
3cea: bf18 it ne
3cec: 2500 movne r5, #0
const struct sercomspi_regs_cfg *regs = _spi_get_regs((uint32_t)hw);
ASSERT(dev && hw);
3cee: 2f00 cmp r7, #0
3cf0: d05d beq.n 3dae <_spi_m_sync_init+0xd6>
3cf2: 1e20 subs r0, r4, #0
3cf4: bf18 it ne
3cf6: 2001 movne r0, #1
3cf8: 4e3f ldr r6, [pc, #252] ; (3df8 <_spi_m_sync_init+0x120>)
3cfa: 4940 ldr r1, [pc, #256] ; (3dfc <_spi_m_sync_init+0x124>)
3cfc: f640 123f movw r2, #2367 ; 0x93f
3d00: 47b0 blx r6
if (regs == NULL) {
3d02: 46b0 mov r8, r6
3d04: 2d00 cmp r5, #0
3d06: d070 beq.n 3dea <_spi_m_sync_init+0x112>
return ((Sercom *)hw)->SPI.SYNCBUSY.reg & reg;
3d08: 69e3 ldr r3, [r4, #28]
3d0a: 4e3d ldr r6, [pc, #244] ; (3e00 <_spi_m_sync_init+0x128>)
return ERR_INVALID_ARG;
}
if (!hri_sercomspi_is_syncing(hw, SERCOM_SPI_SYNCBUSY_SWRST)) {
3d0c: f013 0f01 tst.w r3, #1
3d10: d113 bne.n 3d3a <_spi_m_sync_init+0x62>
hri_sercomspi_wait_for_sync(hw, SERCOM_SPI_SYNCBUSY_SWRST | SERCOM_SPI_SYNCBUSY_ENABLE);
3d12: 2103 movs r1, #3
3d14: 4620 mov r0, r4
uint32_t mode = regs->ctrla & SERCOM_SPI_CTRLA_MODE_Msk;
3d16: f8d5 9000 ldr.w r9, [r5]
3d1a: 47b0 blx r6
tmp = ((Sercom *)hw)->SPI.CTRLA.reg;
3d1c: 6823 ldr r3, [r4, #0]
if (hri_sercomspi_get_CTRLA_reg(hw, SERCOM_SPI_CTRLA_ENABLE)) {
3d1e: 079b lsls r3, r3, #30
uint32_t mode = regs->ctrla & SERCOM_SPI_CTRLA_MODE_Msk;
3d20: f009 091c and.w r9, r9, #28
if (hri_sercomspi_get_CTRLA_reg(hw, SERCOM_SPI_CTRLA_ENABLE)) {
3d24: d503 bpl.n 3d2e <_spi_m_sync_init+0x56>
hri_sercomspi_clear_CTRLA_ENABLE_bit(hw);
3d26: 4b37 ldr r3, [pc, #220] ; (3e04 <_spi_m_sync_init+0x12c>)
3d28: 4798 blx r3
hri_sercomspi_wait_for_sync(hw, SERCOM_SPI_SYNCBUSY_ENABLE);
3d2a: 2102 movs r1, #2
3d2c: 47b0 blx r6
}
hri_sercomspi_write_CTRLA_reg(hw, SERCOM_SPI_CTRLA_SWRST | mode);
3d2e: f049 0301 orr.w r3, r9, #1
((Sercom *)hw)->SPI.CTRLA.reg = data;
3d32: 6023 str r3, [r4, #0]
hri_sercomspi_wait_for_sync(hw, SERCOM_SPI_SYNCBUSY_SWRST | SERCOM_SPI_SYNCBUSY_ENABLE);
3d34: 2103 movs r1, #3
3d36: 4620 mov r0, r4
3d38: 47b0 blx r6
}
hri_sercomspi_wait_for_sync(hw, SERCOM_SPI_SYNCBUSY_SWRST);
3d3a: 2101 movs r1, #1
3d3c: 4620 mov r0, r4
3d3e: 47b0 blx r6
dev->prvt = hw;
if ((regs->ctrla & SERCOM_SPI_CTRLA_MODE_Msk) == SERCOM_USART_CTRLA_MODE_SPI_SLAVE) {
3d40: 682b ldr r3, [r5, #0]
3d42: f8df 90c4 ldr.w r9, [pc, #196] ; 3e08 <_spi_m_sync_init+0x130>
dev->prvt = hw;
3d46: 603c str r4, [r7, #0]
if ((regs->ctrla & SERCOM_SPI_CTRLA_MODE_Msk) == SERCOM_USART_CTRLA_MODE_SPI_SLAVE) {
3d48: f003 031c and.w r3, r3, #28
3d4c: 2b08 cmp r3, #8
3d4e: d130 bne.n 3db2 <_spi_m_sync_init+0xda>
ASSERT(hw && regs);
3d50: 492a ldr r1, [pc, #168] ; (3dfc <_spi_m_sync_init+0x124>)
3d52: 2001 movs r0, #1
3d54: f640 121d movw r2, #2333 ; 0x91d
3d58: 47c0 blx r8
hw, regs->ctrla & ~(SERCOM_SPI_CTRLA_IBON | SERCOM_SPI_CTRLA_ENABLE | SERCOM_SPI_CTRLA_SWRST));
3d5a: 682b ldr r3, [r5, #0]
hri_sercomspi_write_CTRLA_reg(
3d5c: ea03 0309 and.w r3, r3, r9
((Sercom *)hw)->SPI.CTRLA.reg = data;
3d60: 6023 str r3, [r4, #0]
hri_sercomspi_wait_for_sync(hw, SERCOM_SPI_SYNCBUSY_SWRST | SERCOM_SPI_SYNCBUSY_ENABLE);
3d62: 2103 movs r1, #3
3d64: 4620 mov r0, r4
3d66: 47b0 blx r6
(regs->ctrlb & ~(SERCOM_SPI_CTRLB_MSSEN))
3d68: 686b ldr r3, [r5, #4]
| (SERCOM_SPI_CTRLB_RXEN | SERCOM_SPI_CTRLB_SSDE | SERCOM_SPI_CTRLB_PLOADEN));
3d6a: f423 3308 bic.w r3, r3, #139264 ; 0x22000
3d6e: f423 7310 bic.w r3, r3, #576 ; 0x240
hri_sercomspi_write_CTRLB_reg(hw,
3d72: f443 3300 orr.w r3, r3, #131072 ; 0x20000
3d76: f443 7310 orr.w r3, r3, #576 ; 0x240
((Sercom *)hw)->SPI.CTRLB.reg = data;
3d7a: 6063 str r3, [r4, #4]
hri_sercomspi_wait_for_sync(hw, SERCOM_SPI_SYNCBUSY_MASK);
3d7c: 2117 movs r1, #23
3d7e: 47b0 blx r6
hri_sercomspi_write_ADDR_reg(hw, regs->addr);
3d80: 68ab ldr r3, [r5, #8]
((Sercom *)hw)->SPI.ADDR.reg = data;
3d82: 6263 str r3, [r4, #36] ; 0x24
hri_sercomspi_write_DBGCTRL_reg(hw, regs->dbgctrl);
3d84: 7b6b ldrb r3, [r5, #13]
((Sercom *)hw)->SPI.DBGCTRL.reg = data;
3d86: f884 3030 strb.w r3, [r4, #48] ; 0x30
return ((Sercom *)hw)->SPI.SYNCBUSY.reg & reg;
3d8a: 69e3 ldr r3, [r4, #28]
while (hri_sercomspi_is_syncing(hw, 0xFFFFFFFF))
3d8c: 2b00 cmp r3, #0
3d8e: d1fc bne.n 3d8a <_spi_m_sync_init+0xb2>
} else {
_spi_load_regs_master(hw, regs);
}
/* Load character size from default hardware configuration */
dev->char_size = ((regs->ctrlb & SERCOM_SPI_CTRLB_CHSIZE_Msk) == 0) ? 1 : 2;
3d90: 686b ldr r3, [r5, #4]
3d92: f013 0f07 tst.w r3, #7
3d96: bf0c ite eq
3d98: 2301 moveq r3, #1
3d9a: 2302 movne r3, #2
3d9c: 713b strb r3, [r7, #4]
dev->dummy_byte = regs->dummy_byte;
3d9e: 7bab ldrb r3, [r5, #14]
3da0: 7bea ldrb r2, [r5, #15]
3da2: ea43 2302 orr.w r3, r3, r2, lsl #8
3da6: 80fb strh r3, [r7, #6]
return ERR_NONE;
3da8: 2000 movs r0, #0
}
3daa: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
ASSERT(dev && hw);
3dae: 4638 mov r0, r7
3db0: e7a2 b.n 3cf8 <_spi_m_sync_init+0x20>
ASSERT(hw && regs);
3db2: 4912 ldr r1, [pc, #72] ; (3dfc <_spi_m_sync_init+0x124>)
3db4: 2001 movs r0, #1
3db6: f640 1209 movw r2, #2313 ; 0x909
3dba: 47c0 blx r8
hw, regs->ctrla & ~(SERCOM_SPI_CTRLA_IBON | SERCOM_SPI_CTRLA_ENABLE | SERCOM_SPI_CTRLA_SWRST));
3dbc: 682b ldr r3, [r5, #0]
hri_sercomspi_write_CTRLA_reg(
3dbe: ea03 0309 and.w r3, r3, r9
((Sercom *)hw)->SPI.CTRLA.reg = data;
3dc2: 6023 str r3, [r4, #0]
hri_sercomspi_wait_for_sync(hw, SERCOM_SPI_SYNCBUSY_SWRST | SERCOM_SPI_SYNCBUSY_ENABLE);
3dc4: 2103 movs r1, #3
3dc6: 4620 mov r0, r4
3dc8: 47b0 blx r6
(regs->ctrlb
3dca: 686b ldr r3, [r5, #4]
| (SERCOM_SPI_CTRLB_RXEN));
3dcc: f423 3338 bic.w r3, r3, #188416 ; 0x2e000
3dd0: f423 7310 bic.w r3, r3, #576 ; 0x240
hri_sercomspi_write_CTRLB_reg(
3dd4: f443 3300 orr.w r3, r3, #131072 ; 0x20000
((Sercom *)hw)->SPI.CTRLB.reg = data;
3dd8: 6063 str r3, [r4, #4]
hri_sercomspi_wait_for_sync(hw, SERCOM_SPI_SYNCBUSY_MASK);
3dda: 2117 movs r1, #23
3ddc: 47b0 blx r6
hri_sercomspi_write_BAUD_reg(hw, regs->baud);
3dde: 7b2b ldrb r3, [r5, #12]
((Sercom *)hw)->SPI.BAUD.reg = data;
3de0: 7323 strb r3, [r4, #12]
hri_sercomspi_write_DBGCTRL_reg(hw, regs->dbgctrl);
3de2: 7b6b ldrb r3, [r5, #13]
((Sercom *)hw)->SPI.DBGCTRL.reg = data;
3de4: f884 3030 strb.w r3, [r4, #48] ; 0x30
}
3de8: e7d2 b.n 3d90 <_spi_m_sync_init+0xb8>
return ERR_INVALID_ARG;
3dea: f06f 000c mvn.w r0, #12
3dee: e7dc b.n 3daa <_spi_m_sync_init+0xd2>
3df0: 00003b81 .word 0x00003b81
3df4: 00005060 .word 0x00005060
3df8: 00002939 .word 0x00002939
3dfc: 0000500c .word 0x0000500c
3e00: 00003b49 .word 0x00003b49
3e04: 00003b59 .word 0x00003b59
3e08: fffffefc .word 0xfffffefc
00003e0c <_spi_m_sync_enable>:
{
return _spi_deinit(dev->prvt);
}
int32_t _spi_m_sync_enable(struct _spi_m_sync_dev *dev)
{
3e0c: b510 push {r4, lr}
ASSERT(dev && dev->prvt);
3e0e: 4604 mov r4, r0
3e10: b118 cbz r0, 3e1a <_spi_m_sync_enable+0xe>
3e12: 6800 ldr r0, [r0, #0]
3e14: 3800 subs r0, #0
3e16: bf18 it ne
3e18: 2001 movne r0, #1
3e1a: 4b05 ldr r3, [pc, #20] ; (3e30 <_spi_m_sync_enable+0x24>)
3e1c: 4905 ldr r1, [pc, #20] ; (3e34 <_spi_m_sync_enable+0x28>)
3e1e: f640 129e movw r2, #2462 ; 0x99e
3e22: 4798 blx r3
return _spi_sync_enable(dev->prvt);
3e24: 6820 ldr r0, [r4, #0]
3e26: 4b04 ldr r3, [pc, #16] ; (3e38 <_spi_m_sync_enable+0x2c>)
}
3e28: e8bd 4010 ldmia.w sp!, {r4, lr}
return _spi_sync_enable(dev->prvt);
3e2c: 4718 bx r3
3e2e: bf00 nop
3e30: 00002939 .word 0x00002939
3e34: 0000500c .word 0x0000500c
3e38: 00003bb9 .word 0x00003bb9
00003e3c <_spi_m_sync_trans>:
return ERR_NONE;
}
int32_t _spi_m_sync_trans(struct _spi_m_sync_dev *dev, const struct spi_msg *msg)
{
3e3c: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
void * hw = dev->prvt;
3e40: 6804 ldr r4, [r0, #0]
int32_t rc = 0;
struct _spi_trans_ctrl ctrl = {msg->txbuf, msg->rxbuf, 0, 0, dev->char_size};
3e42: f890 8004 ldrb.w r8, [r0, #4]
ASSERT(dev && hw);
3e46: 4b2a ldr r3, [pc, #168] ; (3ef0 <_spi_m_sync_trans+0xb4>)
{
3e48: 4607 mov r7, r0
ASSERT(dev && hw);
3e4a: 1e20 subs r0, r4, #0
struct _spi_trans_ctrl ctrl = {msg->txbuf, msg->rxbuf, 0, 0, dev->char_size};
3e4c: e9d1 6500 ldrd r6, r5, [r1]
ASSERT(dev && hw);
3e50: f640 22a3 movw r2, #2723 ; 0xaa3
3e54: bf18 it ne
3e56: 2001 movne r0, #1
{
3e58: 4689 mov r9, r1
ASSERT(dev && hw);
3e5a: 4926 ldr r1, [pc, #152] ; (3ef4 <_spi_m_sync_trans+0xb8>)
3e5c: 4798 blx r3
return ((Sercom *)hw)->SPI.SYNCBUSY.reg & reg;
3e5e: 69e2 ldr r2, [r4, #28]
/* If settings are not applied (pending), we can not go on */
if (hri_sercomspi_is_syncing(
3e60: f012 0207 ands.w r2, r2, #7
3e64: d13e bne.n 3ee4 <_spi_m_sync_trans+0xa8>
hri_sercomspi_wait_for_sync(hw, SERCOM_SPI_SYNCBUSY_SWRST | SERCOM_SPI_SYNCBUSY_ENABLE);
3e66: 4b24 ldr r3, [pc, #144] ; (3ef8 <_spi_m_sync_trans+0xbc>)
3e68: 2103 movs r1, #3
3e6a: 4620 mov r0, r4
3e6c: 4798 blx r3
tmp = ((Sercom *)hw)->SPI.CTRLA.reg;
3e6e: 6823 ldr r3, [r4, #0]
hw, (SERCOM_SPI_SYNCBUSY_SWRST | SERCOM_SPI_SYNCBUSY_ENABLE | SERCOM_SPI_SYNCBUSY_CTRLB))) {
return ERR_BUSY;
}
/* SPI must be enabled to start synchronous transfer */
if (!hri_sercomspi_get_CTRLA_ENABLE_bit(hw)) {
3e70: 0799 lsls r1, r3, #30
3e72: d53a bpl.n 3eea <_spi_m_sync_trans+0xae>
struct _spi_trans_ctrl ctrl = {msg->txbuf, msg->rxbuf, 0, 0, dev->char_size};
3e74: 4611 mov r1, r2
return ((Sercom *)hw)->SPI.INTFLAG.reg;
3e76: 7e23 ldrb r3, [r4, #24]
3e78: b2d8 uxtb r0, r3
if (!(iflag & SERCOM_SPI_INTFLAG_RXC)) {
3e7a: 075b lsls r3, r3, #29
3e7c: d40f bmi.n 3e9e <_spi_m_sync_trans+0x62>
uint32_t iflag = hri_sercomspi_read_INTFLAG_reg(hw);
if (!_spi_rx_check_and_receive(hw, iflag, &ctrl)) {
/* In master mode, do not start next byte before previous byte received
* to make better output waveform */
if (ctrl.rxcnt >= ctrl.txcnt) {
3e7e: 428a cmp r2, r1
3e80: d818 bhi.n 3eb4 <_spi_m_sync_trans+0x78>
if (!(SERCOM_SPI_INTFLAG_DRE & iflag)) {
3e82: 07c3 lsls r3, r0, #31
3e84: d516 bpl.n 3eb4 <_spi_m_sync_trans+0x78>
_spi_tx_check_and_send(hw, iflag, &ctrl, dev->dummy_byte);
3e86: 88fb ldrh r3, [r7, #6]
if (ctrl->txbuf) {
3e88: b136 cbz r6, 3e98 <_spi_m_sync_trans+0x5c>
if (ctrl->char_size > 1) {
3e8a: f1b8 0f01 cmp.w r8, #1
data = *ctrl->txbuf++;
3e8e: 7833 ldrb r3, [r6, #0]
data |= (*ctrl->txbuf) << 8;
3e90: bf8c ite hi
3e92: f836 3b02 ldrhhi.w r3, [r6], #2
data = *ctrl->txbuf++;
3e96: 3601 addls r6, #1
ctrl->txcnt++;
3e98: 3201 adds r2, #1
((Sercom *)hw)->SPI.DATA.reg = data;
3e9a: 62a3 str r3, [r4, #40] ; 0x28
}
3e9c: e00a b.n 3eb4 <_spi_m_sync_trans+0x78>
return ((Sercom *)hw)->SPI.DATA.reg;
3e9e: 6aa3 ldr r3, [r4, #40] ; 0x28
if (ctrl->rxbuf) {
3ea0: b13d cbz r5, 3eb2 <_spi_m_sync_trans+0x76>
if (ctrl->char_size > 1) {
3ea2: f1b8 0f01 cmp.w r8, #1
*ctrl->rxbuf++ = (uint8_t)data;
3ea6: 702b strb r3, [r5, #0]
*ctrl->rxbuf++ = (uint8_t)(data >> 8);
3ea8: bf85 ittet hi
3eaa: 0a1b lsrhi r3, r3, #8
3eac: 706b strbhi r3, [r5, #1]
*ctrl->rxbuf++ = (uint8_t)data;
3eae: 3501 addls r5, #1
*ctrl->rxbuf++ = (uint8_t)(data >> 8);
3eb0: 3502 addhi r5, #2
ctrl->rxcnt++;
3eb2: 3101 adds r1, #1
if (SERCOM_SPI_INTFLAG_ERROR & iflag) {
3eb4: 0600 lsls r0, r0, #24
3eb6: d407 bmi.n 3ec8 <_spi_m_sync_trans+0x8c>
rc = _spi_err_check(iflag, hw);
if (rc < 0) {
break;
}
if (ctrl.txcnt >= msg->size && ctrl.rxcnt >= msg->size) {
3eb8: f8d9 3008 ldr.w r3, [r9, #8]
3ebc: 4293 cmp r3, r2
3ebe: d8da bhi.n 3e76 <_spi_m_sync_trans+0x3a>
3ec0: 428b cmp r3, r1
3ec2: d8d8 bhi.n 3e76 <_spi_m_sync_trans+0x3a>
rc = ctrl.txcnt;
3ec4: 4610 mov r0, r2
while (!(hri_sercomspi_get_INTFLAG_reg(hw, SERCOM_SPI_INTFLAG_TXC | SERCOM_SPI_INTFLAG_DRE))) {
3ec6: e006 b.n 3ed6 <_spi_m_sync_trans+0x9a>
}
static inline void hri_sercomspi_clear_STATUS_reg(const void *const hw, hri_sercomspi_status_reg_t mask)
{
SERCOM_CRITICAL_SECTION_ENTER();
((Sercom *)hw)->SPI.STATUS.reg = mask;
3ec8: f64f 73ff movw r3, #65535 ; 0xffff
3ecc: 8363 strh r3, [r4, #26]
((Sercom *)hw)->SPI.INTFLAG.reg = mask;
3ece: 2380 movs r3, #128 ; 0x80
3ed0: 7623 strb r3, [r4, #24]
return ERR_OVERFLOW;
3ed2: f06f 0012 mvn.w r0, #18
tmp = ((Sercom *)hw)->SPI.INTFLAG.reg;
3ed6: 7e23 ldrb r3, [r4, #24]
while (!(hri_sercomspi_get_INTFLAG_reg(hw, SERCOM_SPI_INTFLAG_TXC | SERCOM_SPI_INTFLAG_DRE))) {
3ed8: 079b lsls r3, r3, #30
3eda: d0fc beq.n 3ed6 <_spi_m_sync_trans+0x9a>
((Sercom *)hw)->SPI.INTFLAG.reg = mask;
3edc: 2303 movs r3, #3
3ede: 7623 strb r3, [r4, #24]
}
/* Wait until SPI bus idle */
_spi_wait_bus_idle(hw);
return rc;
}
3ee0: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
return ERR_BUSY;
3ee4: f06f 0003 mvn.w r0, #3
3ee8: e7fa b.n 3ee0 <_spi_m_sync_trans+0xa4>
return ERR_NOT_INITIALIZED;
3eea: f06f 0013 mvn.w r0, #19
3eee: e7f7 b.n 3ee0 <_spi_m_sync_trans+0xa4>
3ef0: 00002939 .word 0x00002939
3ef4: 0000500c .word 0x0000500c
3ef8: 00003b49 .word 0x00003b49
00003efc <atomic_enter_critical>:
*/
__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
{
uint32_t result;
__ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
3efc: f3ef 8310 mrs r3, PRIMASK
/**
* \brief Disable interrupts, enter critical section
*/
void atomic_enter_critical(hal_atomic_t volatile *atomic)
{
*atomic = __get_PRIMASK();
3f00: 6003 str r3, [r0, #0]
__ASM volatile ("cpsid i" : : : "memory");
3f02: b672 cpsid i
\details Ensures the apparent order of the explicit memory operations before
and after the instruction, without ensuring their completion.
*/
__STATIC_FORCEINLINE void __DMB(void)
{
__ASM volatile ("dmb 0xF":::"memory");
3f04: f3bf 8f5f dmb sy
__disable_irq();
__DMB();
}
3f08: 4770 bx lr
00003f0a <atomic_leave_critical>:
3f0a: f3bf 8f5f dmb sy
* \brief Exit atomic section
*/
void atomic_leave_critical(hal_atomic_t volatile *atomic)
{
__DMB();
__set_PRIMASK(*atomic);
3f0e: 6803 ldr r3, [r0, #0]
__ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
3f10: f383 8810 msr PRIMASK, r3
}
3f14: 4770 bx lr
...
00003f18 <qspi_sync_init>:
* \brief Driver version
*/
#define QSPI_SYNC_DRIVER_VERSION 0x00000001u
int32_t qspi_sync_init(struct qspi_sync_descriptor *qspi, void *const hw)
{
3f18: b570 push {r4, r5, r6, lr}
3f1a: 460d mov r5, r1
ASSERT(qspi && hw);
3f1c: 4604 mov r4, r0
3f1e: b110 cbz r0, 3f26 <qspi_sync_init+0xe>
3f20: 1e08 subs r0, r1, #0
3f22: bf18 it ne
3f24: 2001 movne r0, #1
3f26: 4905 ldr r1, [pc, #20] ; (3f3c <qspi_sync_init+0x24>)
3f28: 4b05 ldr r3, [pc, #20] ; (3f40 <qspi_sync_init+0x28>)
3f2a: 2231 movs r2, #49 ; 0x31
3f2c: 4798 blx r3
return _qspi_sync_init(&qspi->dev, hw);
3f2e: 4629 mov r1, r5
3f30: 4620 mov r0, r4
3f32: 4b04 ldr r3, [pc, #16] ; (3f44 <qspi_sync_init+0x2c>)
}
3f34: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
return _qspi_sync_init(&qspi->dev, hw);
3f38: 4718 bx r3
3f3a: bf00 nop
3f3c: 00005071 .word 0x00005071
3f40: 00002939 .word 0x00002939
3f44: 000002d5 .word 0x000002d5
00003f48 <Dummy_Handler>:
/**
* \brief Default interrupt handler for unused IRQs.
*/
void Dummy_Handler(void)
{
while (1) {
3f48: e7fe b.n 3f48 <Dummy_Handler>
...
00003f4c <Reset_Handler>:
if (pSrc != pDest) {
3f4c: 4918 ldr r1, [pc, #96] ; (3fb0 <Reset_Handler+0x64>)
3f4e: 4819 ldr r0, [pc, #100] ; (3fb4 <Reset_Handler+0x68>)
3f50: 4281 cmp r1, r0
{
3f52: b510 push {r4, lr}
if (pSrc != pDest) {
3f54: d00a beq.n 3f6c <Reset_Handler+0x20>
*pDest++ = *pSrc++;
3f56: 4b18 ldr r3, [pc, #96] ; (3fb8 <Reset_Handler+0x6c>)
3f58: 1cda adds r2, r3, #3
3f5a: 1a12 subs r2, r2, r0
3f5c: f022 0203 bic.w r2, r2, #3
3f60: 1ec4 subs r4, r0, #3
3f62: 42a3 cmp r3, r4
3f64: bf38 it cc
3f66: 2200 movcc r2, #0
3f68: 4b14 ldr r3, [pc, #80] ; (3fbc <Reset_Handler+0x70>)
3f6a: 4798 blx r3
*pDest++ = 0;
3f6c: 4b14 ldr r3, [pc, #80] ; (3fc0 <Reset_Handler+0x74>)
3f6e: 4815 ldr r0, [pc, #84] ; (3fc4 <Reset_Handler+0x78>)
3f70: 1cda adds r2, r3, #3
3f72: 1a12 subs r2, r2, r0
3f74: 1ec1 subs r1, r0, #3
3f76: f022 0203 bic.w r2, r2, #3
3f7a: 4299 cmp r1, r3
3f7c: bf88 it hi
3f7e: 2200 movhi r2, #0
3f80: 4b11 ldr r3, [pc, #68] ; (3fc8 <Reset_Handler+0x7c>)
3f82: 2100 movs r1, #0
3f84: 4798 blx r3
SCB->VTOR = ((uint32_t)pSrc & SCB_VTOR_TBLOFF_Msk);
3f86: 4a11 ldr r2, [pc, #68] ; (3fcc <Reset_Handler+0x80>)
3f88: 4b11 ldr r3, [pc, #68] ; (3fd0 <Reset_Handler+0x84>)
3f8a: f022 027f bic.w r2, r2, #127 ; 0x7f
3f8e: 609a str r2, [r3, #8]
SCB->CPACR |= (0xFu << 20);
3f90: f8d3 2088 ldr.w r2, [r3, #136] ; 0x88
3f94: f442 0270 orr.w r2, r2, #15728640 ; 0xf00000
3f98: f8c3 2088 str.w r2, [r3, #136] ; 0x88
__ASM volatile ("dsb 0xF":::"memory");
3f9c: f3bf 8f4f dsb sy
__ASM volatile ("isb 0xF":::"memory");
3fa0: f3bf 8f6f isb sy
__libc_init_array();
3fa4: 4b0b ldr r3, [pc, #44] ; (3fd4 <Reset_Handler+0x88>)
3fa6: 4798 blx r3
main();
3fa8: 4b0b ldr r3, [pc, #44] ; (3fd8 <Reset_Handler+0x8c>)
3faa: 4798 blx r3
while (1)
3fac: e7fe b.n 3fac <Reset_Handler+0x60>
3fae: bf00 nop
3fb0: 00005178 .word 0x00005178
3fb4: 20000000 .word 0x20000000
3fb8: 20000074 .word 0x20000074
3fbc: 000040fd .word 0x000040fd
3fc0: 200005e0 .word 0x200005e0
3fc4: 20000078 .word 0x20000078
3fc8: 00004119 .word 0x00004119
3fcc: 00000000 .word 0x00000000
3fd0: e000ed00 .word 0xe000ed00
3fd4: 000040b5 .word 0x000040b5
3fd8: 0000352d .word 0x0000352d
00003fdc <atmel_start_init>:
/**
* Initializes MCU, drivers and middleware in the project
**/
void atmel_start_init(void)
{
3fdc: b510 push {r4, lr}
system_init();
3fde: 4b05 ldr r3, [pc, #20] ; (3ff4 <atmel_start_init+0x18>)
3fe0: 4798 blx r3
sd_mmc_stack_init();
3fe2: 4b05 ldr r3, [pc, #20] ; (3ff8 <atmel_start_init+0x1c>)
3fe4: 4798 blx r3
diskio_init();
3fe6: 4b05 ldr r3, [pc, #20] ; (3ffc <atmel_start_init+0x20>)
3fe8: 4798 blx r3
usb_init();
}
3fea: e8bd 4010 ldmia.w sp!, {r4, lr}
usb_init();
3fee: 4b04 ldr r3, [pc, #16] ; (4000 <atmel_start_init+0x24>)
3ff0: 4718 bx r3
3ff2: bf00 nop
3ff4: 00003b09 .word 0x00003b09
3ff8: 00000821 .word 0x00000821
3ffc: 0000352b .word 0x0000352b
4000: 000016d9 .word 0x000016d9
00004004 <pprintf>:
return 0;
}
int pprintf(const char* fmt, ...)
{
4004: b40f push {r0, r1, r2, r3}
4006: b530 push {r4, r5, lr}
4008: b0c3 sub sp, #268 ; 0x10c
size_t size_str = strlen(fmt);
400a: 4c11 ldr r4, [pc, #68] ; (4050 <pprintf+0x4c>)
{
400c: 9d46 ldr r5, [sp, #280] ; 0x118
size_t size_str = strlen(fmt);
400e: 4628 mov r0, r5
4010: 47a0 blx r4
if (size_str >= MAX_PRINTF_BUFFER)
4012: 28ff cmp r0, #255 ; 0xff
4014: d818 bhi.n 4048 <pprintf+0x44>
{
return -1;
}
uint8_t printf_buffer[MAX_PRINTF_BUFFER];
memset(printf_buffer, '\0', MAX_PRINTF_BUFFER);
4016: 4b0f ldr r3, [pc, #60] ; (4054 <pprintf+0x50>)
4018: f44f 7280 mov.w r2, #256 ; 0x100
401c: 2100 movs r1, #0
401e: a802 add r0, sp, #8
4020: 4798 blx r3
va_list args;
va_start(args, fmt);
4022: aa47 add r2, sp, #284 ; 0x11c
vsprintf((char*)printf_buffer, fmt, args);
4024: 4b0c ldr r3, [pc, #48] ; (4058 <pprintf+0x54>)
va_start(args, fmt);
4026: 9201 str r2, [sp, #4]
vsprintf((char*)printf_buffer, fmt, args);
4028: 4629 mov r1, r5
402a: a802 add r0, sp, #8
402c: 4798 blx r3
va_end(args);
return io_write(debug_io, (const uint8_t*)printf_buffer, strlen((const char*)printf_buffer));
402e: a802 add r0, sp, #8
4030: 47a0 blx r4
4032: 4b0a ldr r3, [pc, #40] ; (405c <pprintf+0x58>)
4034: b282 uxth r2, r0
4036: a902 add r1, sp, #8
4038: 6818 ldr r0, [r3, #0]
403a: 4b09 ldr r3, [pc, #36] ; (4060 <pprintf+0x5c>)
403c: 4798 blx r3
}
403e: b043 add sp, #268 ; 0x10c
4040: e8bd 4030 ldmia.w sp!, {r4, r5, lr}
4044: b004 add sp, #16
4046: 4770 bx lr
return -1;
4048: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
404c: e7f7 b.n 403e <pprintf+0x3a>
404e: bf00 nop
4050: 00004129 .word 0x00004129
4054: 00004119 .word 0x00004119
4058: 00004165 .word 0x00004165
405c: 200005c4 .word 0x200005c4
4060: 000002a5 .word 0x000002a5
00004064 <pdebug_init>:
{
4064: b510 push {r4, lr}
usart_sync_get_io_descriptor(&USART_DBG, &debug_io);
4066: 4c06 ldr r4, [pc, #24] ; (4080 <pdebug_init+0x1c>)
4068: 4906 ldr r1, [pc, #24] ; (4084 <pdebug_init+0x20>)
406a: 4b07 ldr r3, [pc, #28] ; (4088 <pdebug_init+0x24>)
406c: 4620 mov r0, r4
406e: 4798 blx r3
usart_sync_enable(&USART_DBG);
4070: 4b06 ldr r3, [pc, #24] ; (408c <pdebug_init+0x28>)
4072: 4620 mov r0, r4
4074: 4798 blx r3
printf("Debug Initialized\n");
4076: 4b06 ldr r3, [pc, #24] ; (4090 <pdebug_init+0x2c>)
4078: 4806 ldr r0, [pc, #24] ; (4094 <pdebug_init+0x30>)
407a: 4798 blx r3
}
407c: 2000 movs r0, #0
407e: bd10 pop {r4, pc}
4080: 20000584 .word 0x20000584
4084: 200005c4 .word 0x200005c4
4088: 00002ba9 .word 0x00002ba9
408c: 00002b7d .word 0x00002b7d
4090: 00004005 .word 0x00004005
4094: 0000508c .word 0x0000508c
00004098 <passert>:
void passert(const bool cond, const char* msg_failure, const char* file, const int line)
{
4098: b510 push {r4, lr}
409a: 460c mov r4, r1
409c: 4619 mov r1, r3
if(!cond)
409e: b920 cbnz r0, 40aa <passert+0x12>
{
printf("Assert Failure at line %d, %s: %s\n",
40a0: 4623 mov r3, r4
40a2: 4802 ldr r0, [pc, #8] ; (40ac <passert+0x14>)
40a4: 4c02 ldr r4, [pc, #8] ; (40b0 <passert+0x18>)
40a6: 47a0 blx r4
line,
file,
msg_failure);
for(;;){}
40a8: e7fe b.n 40a8 <passert+0x10>
}
}
40aa: bd10 pop {r4, pc}
40ac: 0000509f .word 0x0000509f
40b0: 00004005 .word 0x00004005
000040b4 <__libc_init_array>:
40b4: b570 push {r4, r5, r6, lr}
40b6: 4d0d ldr r5, [pc, #52] ; (40ec <__libc_init_array+0x38>)
40b8: 4c0d ldr r4, [pc, #52] ; (40f0 <__libc_init_array+0x3c>)
40ba: 1b64 subs r4, r4, r5
40bc: 10a4 asrs r4, r4, #2
40be: 2600 movs r6, #0
40c0: 42a6 cmp r6, r4
40c2: d109 bne.n 40d8 <__libc_init_array+0x24>
40c4: 4d0b ldr r5, [pc, #44] ; (40f4 <__libc_init_array+0x40>)
40c6: 4c0c ldr r4, [pc, #48] ; (40f8 <__libc_init_array+0x44>)
40c8: f001 f846 bl 5158 <_init>
40cc: 1b64 subs r4, r4, r5
40ce: 10a4 asrs r4, r4, #2
40d0: 2600 movs r6, #0
40d2: 42a6 cmp r6, r4
40d4: d105 bne.n 40e2 <__libc_init_array+0x2e>
40d6: bd70 pop {r4, r5, r6, pc}
40d8: f855 3b04 ldr.w r3, [r5], #4
40dc: 4798 blx r3
40de: 3601 adds r6, #1
40e0: e7ee b.n 40c0 <__libc_init_array+0xc>
40e2: f855 3b04 ldr.w r3, [r5], #4
40e6: 4798 blx r3
40e8: 3601 adds r6, #1
40ea: e7f2 b.n 40d2 <__libc_init_array+0x1e>
40ec: 00005164 .word 0x00005164
40f0: 00005164 .word 0x00005164
40f4: 00005164 .word 0x00005164
40f8: 00005168 .word 0x00005168
000040fc <memcpy>:
40fc: 440a add r2, r1
40fe: 4291 cmp r1, r2
4100: f100 33ff add.w r3, r0, #4294967295 ; 0xffffffff
4104: d100 bne.n 4108 <memcpy+0xc>
4106: 4770 bx lr
4108: b510 push {r4, lr}
410a: f811 4b01 ldrb.w r4, [r1], #1
410e: f803 4f01 strb.w r4, [r3, #1]!
4112: 4291 cmp r1, r2
4114: d1f9 bne.n 410a <memcpy+0xe>
4116: bd10 pop {r4, pc}
00004118 <memset>:
4118: 4402 add r2, r0
411a: 4603 mov r3, r0
411c: 4293 cmp r3, r2
411e: d100 bne.n 4122 <memset+0xa>
4120: 4770 bx lr
4122: f803 1b01 strb.w r1, [r3], #1
4126: e7f9 b.n 411c <memset+0x4>
00004128 <strlen>:
4128: 4603 mov r3, r0
412a: f813 2b01 ldrb.w r2, [r3], #1
412e: 2a00 cmp r2, #0
4130: d1fb bne.n 412a <strlen+0x2>
4132: 1a18 subs r0, r3, r0
4134: 3801 subs r0, #1
4136: 4770 bx lr
00004138 <_vsiprintf_r>:
4138: b500 push {lr}
413a: b09b sub sp, #108 ; 0x6c
413c: 9100 str r1, [sp, #0]
413e: 9104 str r1, [sp, #16]
4140: f06f 4100 mvn.w r1, #2147483648 ; 0x80000000
4144: 9105 str r1, [sp, #20]
4146: 9102 str r1, [sp, #8]
4148: 4905 ldr r1, [pc, #20] ; (4160 <_vsiprintf_r+0x28>)
414a: 9103 str r1, [sp, #12]
414c: 4669 mov r1, sp
414e: f000 f8cb bl 42e8 <_svfiprintf_r>
4152: 9b00 ldr r3, [sp, #0]
4154: 2200 movs r2, #0
4156: 701a strb r2, [r3, #0]
4158: b01b add sp, #108 ; 0x6c
415a: f85d fb04 ldr.w pc, [sp], #4
415e: bf00 nop
4160: ffff0208 .word 0xffff0208
00004164 <vsiprintf>:
4164: 4613 mov r3, r2
4166: 460a mov r2, r1
4168: 4601 mov r1, r0
416a: 4802 ldr r0, [pc, #8] ; (4174 <vsiprintf+0x10>)
416c: 6800 ldr r0, [r0, #0]
416e: f7ff bfe3 b.w 4138 <_vsiprintf_r>
4172: bf00 nop
4174: 20000010 .word 0x20000010
00004178 <__retarget_lock_acquire_recursive>:
4178: 4770 bx lr
0000417a <__retarget_lock_release_recursive>:
417a: 4770 bx lr
0000417c <_malloc_r>:
417c: b5f8 push {r3, r4, r5, r6, r7, lr}
417e: 1ccd adds r5, r1, #3
4180: f025 0503 bic.w r5, r5, #3
4184: 3508 adds r5, #8
4186: 2d0c cmp r5, #12
4188: bf38 it cc
418a: 250c movcc r5, #12
418c: 2d00 cmp r5, #0
418e: 4606 mov r6, r0
4190: db01 blt.n 4196 <_malloc_r+0x1a>
4192: 42a9 cmp r1, r5
4194: d903 bls.n 419e <_malloc_r+0x22>
4196: 230c movs r3, #12
4198: 6033 str r3, [r6, #0]
419a: 2000 movs r0, #0
419c: bdf8 pop {r3, r4, r5, r6, r7, pc}
419e: f000 fbb1 bl 4904 <__malloc_lock>
41a2: 4921 ldr r1, [pc, #132] ; (4228 <_malloc_r+0xac>)
41a4: 680a ldr r2, [r1, #0]
41a6: 4614 mov r4, r2
41a8: b99c cbnz r4, 41d2 <_malloc_r+0x56>
41aa: 4f20 ldr r7, [pc, #128] ; (422c <_malloc_r+0xb0>)
41ac: 683b ldr r3, [r7, #0]
41ae: b923 cbnz r3, 41ba <_malloc_r+0x3e>
41b0: 4621 mov r1, r4
41b2: 4630 mov r0, r6
41b4: f000 fb2c bl 4810 <_sbrk_r>
41b8: 6038 str r0, [r7, #0]
41ba: 4629 mov r1, r5
41bc: 4630 mov r0, r6
41be: f000 fb27 bl 4810 <_sbrk_r>
41c2: 1c43 adds r3, r0, #1
41c4: d123 bne.n 420e <_malloc_r+0x92>
41c6: 230c movs r3, #12
41c8: 6033 str r3, [r6, #0]
41ca: 4630 mov r0, r6
41cc: f000 fba0 bl 4910 <__malloc_unlock>
41d0: e7e3 b.n 419a <_malloc_r+0x1e>
41d2: 6823 ldr r3, [r4, #0]
41d4: 1b5b subs r3, r3, r5
41d6: d417 bmi.n 4208 <_malloc_r+0x8c>
41d8: 2b0b cmp r3, #11
41da: d903 bls.n 41e4 <_malloc_r+0x68>
41dc: 6023 str r3, [r4, #0]
41de: 441c add r4, r3
41e0: 6025 str r5, [r4, #0]
41e2: e004 b.n 41ee <_malloc_r+0x72>
41e4: 6863 ldr r3, [r4, #4]
41e6: 42a2 cmp r2, r4
41e8: bf0c ite eq
41ea: 600b streq r3, [r1, #0]
41ec: 6053 strne r3, [r2, #4]
41ee: 4630 mov r0, r6
41f0: f000 fb8e bl 4910 <__malloc_unlock>
41f4: f104 000b add.w r0, r4, #11
41f8: 1d23 adds r3, r4, #4
41fa: f020 0007 bic.w r0, r0, #7
41fe: 1ac2 subs r2, r0, r3
4200: d0cc beq.n 419c <_malloc_r+0x20>
4202: 1a1b subs r3, r3, r0
4204: 50a3 str r3, [r4, r2]
4206: e7c9 b.n 419c <_malloc_r+0x20>
4208: 4622 mov r2, r4
420a: 6864 ldr r4, [r4, #4]
420c: e7cc b.n 41a8 <_malloc_r+0x2c>
420e: 1cc4 adds r4, r0, #3
4210: f024 0403 bic.w r4, r4, #3
4214: 42a0 cmp r0, r4
4216: d0e3 beq.n 41e0 <_malloc_r+0x64>
4218: 1a21 subs r1, r4, r0
421a: 4630 mov r0, r6
421c: f000 faf8 bl 4810 <_sbrk_r>
4220: 3001 adds r0, #1
4222: d1dd bne.n 41e0 <_malloc_r+0x64>
4224: e7cf b.n 41c6 <_malloc_r+0x4a>
4226: bf00 nop
4228: 200005c8 .word 0x200005c8
422c: 200005cc .word 0x200005cc
00004230 <__ssputs_r>:
4230: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
4234: 688e ldr r6, [r1, #8]
4236: 429e cmp r6, r3
4238: 4682 mov sl, r0
423a: 460c mov r4, r1
423c: 4690 mov r8, r2
423e: 461f mov r7, r3
4240: d838 bhi.n 42b4 <__ssputs_r+0x84>
4242: 898a ldrh r2, [r1, #12]
4244: f412 6f90 tst.w r2, #1152 ; 0x480
4248: d032 beq.n 42b0 <__ssputs_r+0x80>
424a: 6825 ldr r5, [r4, #0]
424c: 6909 ldr r1, [r1, #16]
424e: eba5 0901 sub.w r9, r5, r1
4252: 6965 ldr r5, [r4, #20]
4254: eb05 0545 add.w r5, r5, r5, lsl #1
4258: eb05 75d5 add.w r5, r5, r5, lsr #31
425c: 3301 adds r3, #1
425e: 444b add r3, r9
4260: 106d asrs r5, r5, #1
4262: 429d cmp r5, r3
4264: bf38 it cc
4266: 461d movcc r5, r3
4268: 0553 lsls r3, r2, #21
426a: d531 bpl.n 42d0 <__ssputs_r+0xa0>
426c: 4629 mov r1, r5
426e: f7ff ff85 bl 417c <_malloc_r>
4272: 4606 mov r6, r0
4274: b950 cbnz r0, 428c <__ssputs_r+0x5c>
4276: 230c movs r3, #12
4278: f8ca 3000 str.w r3, [sl]
427c: 89a3 ldrh r3, [r4, #12]
427e: f043 0340 orr.w r3, r3, #64 ; 0x40
4282: 81a3 strh r3, [r4, #12]
4284: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
4288: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
428c: 6921 ldr r1, [r4, #16]
428e: 464a mov r2, r9
4290: f7ff ff34 bl 40fc <memcpy>
4294: 89a3 ldrh r3, [r4, #12]
4296: f423 6390 bic.w r3, r3, #1152 ; 0x480
429a: f043 0380 orr.w r3, r3, #128 ; 0x80
429e: 81a3 strh r3, [r4, #12]
42a0: 6126 str r6, [r4, #16]
42a2: 6165 str r5, [r4, #20]
42a4: 444e add r6, r9
42a6: eba5 0509 sub.w r5, r5, r9
42aa: 6026 str r6, [r4, #0]
42ac: 60a5 str r5, [r4, #8]
42ae: 463e mov r6, r7
42b0: 42be cmp r6, r7
42b2: d900 bls.n 42b6 <__ssputs_r+0x86>
42b4: 463e mov r6, r7
42b6: 4632 mov r2, r6
42b8: 6820 ldr r0, [r4, #0]
42ba: 4641 mov r1, r8
42bc: f000 fb08 bl 48d0 <memmove>
42c0: 68a3 ldr r3, [r4, #8]
42c2: 6822 ldr r2, [r4, #0]
42c4: 1b9b subs r3, r3, r6
42c6: 4432 add r2, r6
42c8: 60a3 str r3, [r4, #8]
42ca: 6022 str r2, [r4, #0]
42cc: 2000 movs r0, #0
42ce: e7db b.n 4288 <__ssputs_r+0x58>
42d0: 462a mov r2, r5
42d2: f000 fb71 bl 49b8 <_realloc_r>
42d6: 4606 mov r6, r0
42d8: 2800 cmp r0, #0
42da: d1e1 bne.n 42a0 <__ssputs_r+0x70>
42dc: 6921 ldr r1, [r4, #16]
42de: 4650 mov r0, sl
42e0: f000 fb1c bl 491c <_free_r>
42e4: e7c7 b.n 4276 <__ssputs_r+0x46>
...
000042e8 <_svfiprintf_r>:
42e8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
42ec: 4698 mov r8, r3
42ee: 898b ldrh r3, [r1, #12]
42f0: 061b lsls r3, r3, #24
42f2: b09d sub sp, #116 ; 0x74
42f4: 4607 mov r7, r0
42f6: 460d mov r5, r1
42f8: 4614 mov r4, r2
42fa: d50e bpl.n 431a <_svfiprintf_r+0x32>
42fc: 690b ldr r3, [r1, #16]
42fe: b963 cbnz r3, 431a <_svfiprintf_r+0x32>
4300: 2140 movs r1, #64 ; 0x40
4302: f7ff ff3b bl 417c <_malloc_r>
4306: 6028 str r0, [r5, #0]
4308: 6128 str r0, [r5, #16]
430a: b920 cbnz r0, 4316 <_svfiprintf_r+0x2e>
430c: 230c movs r3, #12
430e: 603b str r3, [r7, #0]
4310: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
4314: e0d1 b.n 44ba <_svfiprintf_r+0x1d2>
4316: 2340 movs r3, #64 ; 0x40
4318: 616b str r3, [r5, #20]
431a: 2300 movs r3, #0
431c: 9309 str r3, [sp, #36] ; 0x24
431e: 2320 movs r3, #32
4320: f88d 3029 strb.w r3, [sp, #41] ; 0x29
4324: f8cd 800c str.w r8, [sp, #12]
4328: 2330 movs r3, #48 ; 0x30
432a: f8df 81a8 ldr.w r8, [pc, #424] ; 44d4 <_svfiprintf_r+0x1ec>
432e: f88d 302a strb.w r3, [sp, #42] ; 0x2a
4332: f04f 0901 mov.w r9, #1
4336: 4623 mov r3, r4
4338: 469a mov sl, r3
433a: f813 2b01 ldrb.w r2, [r3], #1
433e: b10a cbz r2, 4344 <_svfiprintf_r+0x5c>
4340: 2a25 cmp r2, #37 ; 0x25
4342: d1f9 bne.n 4338 <_svfiprintf_r+0x50>
4344: ebba 0b04 subs.w fp, sl, r4
4348: d00b beq.n 4362 <_svfiprintf_r+0x7a>
434a: 465b mov r3, fp
434c: 4622 mov r2, r4
434e: 4629 mov r1, r5
4350: 4638 mov r0, r7
4352: f7ff ff6d bl 4230 <__ssputs_r>
4356: 3001 adds r0, #1
4358: f000 80aa beq.w 44b0 <_svfiprintf_r+0x1c8>
435c: 9a09 ldr r2, [sp, #36] ; 0x24
435e: 445a add r2, fp
4360: 9209 str r2, [sp, #36] ; 0x24
4362: f89a 3000 ldrb.w r3, [sl]
4366: 2b00 cmp r3, #0
4368: f000 80a2 beq.w 44b0 <_svfiprintf_r+0x1c8>
436c: 2300 movs r3, #0
436e: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
4372: e9cd 2305 strd r2, r3, [sp, #20]
4376: f10a 0a01 add.w sl, sl, #1
437a: 9304 str r3, [sp, #16]
437c: 9307 str r3, [sp, #28]
437e: f88d 3053 strb.w r3, [sp, #83] ; 0x53
4382: 931a str r3, [sp, #104] ; 0x68
4384: 4654 mov r4, sl
4386: 2205 movs r2, #5
4388: f814 1b01 ldrb.w r1, [r4], #1
438c: 4851 ldr r0, [pc, #324] ; (44d4 <_svfiprintf_r+0x1ec>)
438e: f000 fa4f bl 4830 <memchr>
4392: 9a04 ldr r2, [sp, #16]
4394: b9d8 cbnz r0, 43ce <_svfiprintf_r+0xe6>
4396: 06d0 lsls r0, r2, #27
4398: bf44 itt mi
439a: 2320 movmi r3, #32
439c: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53
43a0: 0711 lsls r1, r2, #28
43a2: bf44 itt mi
43a4: 232b movmi r3, #43 ; 0x2b
43a6: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53
43aa: f89a 3000 ldrb.w r3, [sl]
43ae: 2b2a cmp r3, #42 ; 0x2a
43b0: d015 beq.n 43de <_svfiprintf_r+0xf6>
43b2: 9a07 ldr r2, [sp, #28]
43b4: 4654 mov r4, sl
43b6: 2000 movs r0, #0
43b8: f04f 0c0a mov.w ip, #10
43bc: 4621 mov r1, r4
43be: f811 3b01 ldrb.w r3, [r1], #1
43c2: 3b30 subs r3, #48 ; 0x30
43c4: 2b09 cmp r3, #9
43c6: d94e bls.n 4466 <_svfiprintf_r+0x17e>
43c8: b1b0 cbz r0, 43f8 <_svfiprintf_r+0x110>
43ca: 9207 str r2, [sp, #28]
43cc: e014 b.n 43f8 <_svfiprintf_r+0x110>
43ce: eba0 0308 sub.w r3, r0, r8
43d2: fa09 f303 lsl.w r3, r9, r3
43d6: 4313 orrs r3, r2
43d8: 9304 str r3, [sp, #16]
43da: 46a2 mov sl, r4
43dc: e7d2 b.n 4384 <_svfiprintf_r+0x9c>
43de: 9b03 ldr r3, [sp, #12]
43e0: 1d19 adds r1, r3, #4
43e2: 681b ldr r3, [r3, #0]
43e4: 9103 str r1, [sp, #12]
43e6: 2b00 cmp r3, #0
43e8: bfbb ittet lt
43ea: 425b neglt r3, r3
43ec: f042 0202 orrlt.w r2, r2, #2
43f0: 9307 strge r3, [sp, #28]
43f2: 9307 strlt r3, [sp, #28]
43f4: bfb8 it lt
43f6: 9204 strlt r2, [sp, #16]
43f8: 7823 ldrb r3, [r4, #0]
43fa: 2b2e cmp r3, #46 ; 0x2e
43fc: d10c bne.n 4418 <_svfiprintf_r+0x130>
43fe: 7863 ldrb r3, [r4, #1]
4400: 2b2a cmp r3, #42 ; 0x2a
4402: d135 bne.n 4470 <_svfiprintf_r+0x188>
4404: 9b03 ldr r3, [sp, #12]
4406: 1d1a adds r2, r3, #4
4408: 681b ldr r3, [r3, #0]
440a: 9203 str r2, [sp, #12]
440c: 2b00 cmp r3, #0
440e: bfb8 it lt
4410: f04f 33ff movlt.w r3, #4294967295 ; 0xffffffff
4414: 3402 adds r4, #2
4416: 9305 str r3, [sp, #20]
4418: f8df a0c8 ldr.w sl, [pc, #200] ; 44e4 <_svfiprintf_r+0x1fc>
441c: 7821 ldrb r1, [r4, #0]
441e: 2203 movs r2, #3
4420: 4650 mov r0, sl
4422: f000 fa05 bl 4830 <memchr>
4426: b140 cbz r0, 443a <_svfiprintf_r+0x152>
4428: 2340 movs r3, #64 ; 0x40
442a: eba0 000a sub.w r0, r0, sl
442e: fa03 f000 lsl.w r0, r3, r0
4432: 9b04 ldr r3, [sp, #16]
4434: 4303 orrs r3, r0
4436: 3401 adds r4, #1
4438: 9304 str r3, [sp, #16]
443a: f814 1b01 ldrb.w r1, [r4], #1
443e: 4826 ldr r0, [pc, #152] ; (44d8 <_svfiprintf_r+0x1f0>)
4440: f88d 1028 strb.w r1, [sp, #40] ; 0x28
4444: 2206 movs r2, #6
4446: f000 f9f3 bl 4830 <memchr>
444a: 2800 cmp r0, #0
444c: d038 beq.n 44c0 <_svfiprintf_r+0x1d8>
444e: 4b23 ldr r3, [pc, #140] ; (44dc <_svfiprintf_r+0x1f4>)
4450: bb1b cbnz r3, 449a <_svfiprintf_r+0x1b2>
4452: 9b03 ldr r3, [sp, #12]
4454: 3307 adds r3, #7
4456: f023 0307 bic.w r3, r3, #7
445a: 3308 adds r3, #8
445c: 9303 str r3, [sp, #12]
445e: 9b09 ldr r3, [sp, #36] ; 0x24
4460: 4433 add r3, r6
4462: 9309 str r3, [sp, #36] ; 0x24
4464: e767 b.n 4336 <_svfiprintf_r+0x4e>
4466: fb0c 3202 mla r2, ip, r2, r3
446a: 460c mov r4, r1
446c: 2001 movs r0, #1
446e: e7a5 b.n 43bc <_svfiprintf_r+0xd4>
4470: 2300 movs r3, #0
4472: 3401 adds r4, #1
4474: 9305 str r3, [sp, #20]
4476: 4619 mov r1, r3
4478: f04f 0c0a mov.w ip, #10
447c: 4620 mov r0, r4
447e: f810 2b01 ldrb.w r2, [r0], #1
4482: 3a30 subs r2, #48 ; 0x30
4484: 2a09 cmp r2, #9
4486: d903 bls.n 4490 <_svfiprintf_r+0x1a8>
4488: 2b00 cmp r3, #0
448a: d0c5 beq.n 4418 <_svfiprintf_r+0x130>
448c: 9105 str r1, [sp, #20]
448e: e7c3 b.n 4418 <_svfiprintf_r+0x130>
4490: fb0c 2101 mla r1, ip, r1, r2
4494: 4604 mov r4, r0
4496: 2301 movs r3, #1
4498: e7f0 b.n 447c <_svfiprintf_r+0x194>
449a: ab03 add r3, sp, #12
449c: 9300 str r3, [sp, #0]
449e: 462a mov r2, r5
44a0: 4b0f ldr r3, [pc, #60] ; (44e0 <_svfiprintf_r+0x1f8>)
44a2: a904 add r1, sp, #16
44a4: 4638 mov r0, r7
44a6: f3af 8000 nop.w
44aa: 1c42 adds r2, r0, #1
44ac: 4606 mov r6, r0
44ae: d1d6 bne.n 445e <_svfiprintf_r+0x176>
44b0: 89ab ldrh r3, [r5, #12]
44b2: 065b lsls r3, r3, #25
44b4: f53f af2c bmi.w 4310 <_svfiprintf_r+0x28>
44b8: 9809 ldr r0, [sp, #36] ; 0x24
44ba: b01d add sp, #116 ; 0x74
44bc: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
44c0: ab03 add r3, sp, #12
44c2: 9300 str r3, [sp, #0]
44c4: 462a mov r2, r5
44c6: 4b06 ldr r3, [pc, #24] ; (44e0 <_svfiprintf_r+0x1f8>)
44c8: a904 add r1, sp, #16
44ca: 4638 mov r0, r7
44cc: f000 f87a bl 45c4 <_printf_i>
44d0: e7eb b.n 44aa <_svfiprintf_r+0x1c2>
44d2: bf00 nop
44d4: 00005124 .word 0x00005124
44d8: 0000512e .word 0x0000512e
44dc: 00000000 .word 0x00000000
44e0: 00004231 .word 0x00004231
44e4: 0000512a .word 0x0000512a
000044e8 <_printf_common>:
44e8: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
44ec: 4616 mov r6, r2
44ee: 4699 mov r9, r3
44f0: 688a ldr r2, [r1, #8]
44f2: 690b ldr r3, [r1, #16]
44f4: f8dd 8020 ldr.w r8, [sp, #32]
44f8: 4293 cmp r3, r2
44fa: bfb8 it lt
44fc: 4613 movlt r3, r2
44fe: 6033 str r3, [r6, #0]
4500: f891 2043 ldrb.w r2, [r1, #67] ; 0x43
4504: 4607 mov r7, r0
4506: 460c mov r4, r1
4508: b10a cbz r2, 450e <_printf_common+0x26>
450a: 3301 adds r3, #1
450c: 6033 str r3, [r6, #0]
450e: 6823 ldr r3, [r4, #0]
4510: 0699 lsls r1, r3, #26
4512: bf42 ittt mi
4514: 6833 ldrmi r3, [r6, #0]
4516: 3302 addmi r3, #2
4518: 6033 strmi r3, [r6, #0]
451a: 6825 ldr r5, [r4, #0]
451c: f015 0506 ands.w r5, r5, #6
4520: d106 bne.n 4530 <_printf_common+0x48>
4522: f104 0a19 add.w sl, r4, #25
4526: 68e3 ldr r3, [r4, #12]
4528: 6832 ldr r2, [r6, #0]
452a: 1a9b subs r3, r3, r2
452c: 42ab cmp r3, r5
452e: dc26 bgt.n 457e <_printf_common+0x96>
4530: f894 2043 ldrb.w r2, [r4, #67] ; 0x43
4534: 1e13 subs r3, r2, #0
4536: 6822 ldr r2, [r4, #0]
4538: bf18 it ne
453a: 2301 movne r3, #1
453c: 0692 lsls r2, r2, #26
453e: d42b bmi.n 4598 <_printf_common+0xb0>
4540: f104 0243 add.w r2, r4, #67 ; 0x43
4544: 4649 mov r1, r9
4546: 4638 mov r0, r7
4548: 47c0 blx r8
454a: 3001 adds r0, #1
454c: d01e beq.n 458c <_printf_common+0xa4>
454e: 6823 ldr r3, [r4, #0]
4550: 68e5 ldr r5, [r4, #12]
4552: 6832 ldr r2, [r6, #0]
4554: f003 0306 and.w r3, r3, #6
4558: 2b04 cmp r3, #4
455a: bf08 it eq
455c: 1aad subeq r5, r5, r2
455e: 68a3 ldr r3, [r4, #8]
4560: 6922 ldr r2, [r4, #16]
4562: bf0c ite eq
4564: ea25 75e5 biceq.w r5, r5, r5, asr #31
4568: 2500 movne r5, #0
456a: 4293 cmp r3, r2
456c: bfc4 itt gt
456e: 1a9b subgt r3, r3, r2
4570: 18ed addgt r5, r5, r3
4572: 2600 movs r6, #0
4574: 341a adds r4, #26
4576: 42b5 cmp r5, r6
4578: d11a bne.n 45b0 <_printf_common+0xc8>
457a: 2000 movs r0, #0
457c: e008 b.n 4590 <_printf_common+0xa8>
457e: 2301 movs r3, #1
4580: 4652 mov r2, sl
4582: 4649 mov r1, r9
4584: 4638 mov r0, r7
4586: 47c0 blx r8
4588: 3001 adds r0, #1
458a: d103 bne.n 4594 <_printf_common+0xac>
458c: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
4590: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
4594: 3501 adds r5, #1
4596: e7c6 b.n 4526 <_printf_common+0x3e>
4598: 18e1 adds r1, r4, r3
459a: 1c5a adds r2, r3, #1
459c: 2030 movs r0, #48 ; 0x30
459e: f881 0043 strb.w r0, [r1, #67] ; 0x43
45a2: 4422 add r2, r4
45a4: f894 1045 ldrb.w r1, [r4, #69] ; 0x45
45a8: f882 1043 strb.w r1, [r2, #67] ; 0x43
45ac: 3302 adds r3, #2
45ae: e7c7 b.n 4540 <_printf_common+0x58>
45b0: 2301 movs r3, #1
45b2: 4622 mov r2, r4
45b4: 4649 mov r1, r9
45b6: 4638 mov r0, r7
45b8: 47c0 blx r8
45ba: 3001 adds r0, #1
45bc: d0e6 beq.n 458c <_printf_common+0xa4>
45be: 3601 adds r6, #1
45c0: e7d9 b.n 4576 <_printf_common+0x8e>
...
000045c4 <_printf_i>:
45c4: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
45c8: 460c mov r4, r1
45ca: 4691 mov r9, r2
45cc: 7e27 ldrb r7, [r4, #24]
45ce: 990c ldr r1, [sp, #48] ; 0x30
45d0: 2f78 cmp r7, #120 ; 0x78
45d2: 4680 mov r8, r0
45d4: 469a mov sl, r3
45d6: f104 0243 add.w r2, r4, #67 ; 0x43
45da: d807 bhi.n 45ec <_printf_i+0x28>
45dc: 2f62 cmp r7, #98 ; 0x62
45de: d80a bhi.n 45f6 <_printf_i+0x32>
45e0: 2f00 cmp r7, #0
45e2: f000 80d8 beq.w 4796 <_printf_i+0x1d2>
45e6: 2f58 cmp r7, #88 ; 0x58
45e8: f000 80a3 beq.w 4732 <_printf_i+0x16e>
45ec: f104 0642 add.w r6, r4, #66 ; 0x42
45f0: f884 7042 strb.w r7, [r4, #66] ; 0x42
45f4: e03a b.n 466c <_printf_i+0xa8>
45f6: f1a7 0363 sub.w r3, r7, #99 ; 0x63
45fa: 2b15 cmp r3, #21
45fc: d8f6 bhi.n 45ec <_printf_i+0x28>
45fe: a001 add r0, pc, #4 ; (adr r0, 4604 <_printf_i+0x40>)
4600: f850 f023 ldr.w pc, [r0, r3, lsl #2]
4604: 0000465d .word 0x0000465d
4608: 00004671 .word 0x00004671
460c: 000045ed .word 0x000045ed
4610: 000045ed .word 0x000045ed
4614: 000045ed .word 0x000045ed
4618: 000045ed .word 0x000045ed
461c: 00004671 .word 0x00004671
4620: 000045ed .word 0x000045ed
4624: 000045ed .word 0x000045ed
4628: 000045ed .word 0x000045ed
462c: 000045ed .word 0x000045ed
4630: 0000477d .word 0x0000477d
4634: 000046a1 .word 0x000046a1
4638: 0000475f .word 0x0000475f
463c: 000045ed .word 0x000045ed
4640: 000045ed .word 0x000045ed
4644: 0000479f .word 0x0000479f
4648: 000045ed .word 0x000045ed
464c: 000046a1 .word 0x000046a1
4650: 000045ed .word 0x000045ed
4654: 000045ed .word 0x000045ed
4658: 00004767 .word 0x00004767
465c: 680b ldr r3, [r1, #0]
465e: 1d1a adds r2, r3, #4
4660: 681b ldr r3, [r3, #0]
4662: 600a str r2, [r1, #0]
4664: f104 0642 add.w r6, r4, #66 ; 0x42
4668: f884 3042 strb.w r3, [r4, #66] ; 0x42
466c: 2301 movs r3, #1
466e: e0a3 b.n 47b8 <_printf_i+0x1f4>
4670: 6825 ldr r5, [r4, #0]
4672: 6808 ldr r0, [r1, #0]
4674: 062e lsls r6, r5, #24
4676: f100 0304 add.w r3, r0, #4
467a: d50a bpl.n 4692 <_printf_i+0xce>
467c: 6805 ldr r5, [r0, #0]
467e: 600b str r3, [r1, #0]
4680: 2d00 cmp r5, #0
4682: da03 bge.n 468c <_printf_i+0xc8>
4684: 232d movs r3, #45 ; 0x2d
4686: 426d negs r5, r5
4688: f884 3043 strb.w r3, [r4, #67] ; 0x43
468c: 485e ldr r0, [pc, #376] ; (4808 <_printf_i+0x244>)
468e: 230a movs r3, #10
4690: e019 b.n 46c6 <_printf_i+0x102>
4692: f015 0f40 tst.w r5, #64 ; 0x40
4696: 6805 ldr r5, [r0, #0]
4698: 600b str r3, [r1, #0]
469a: bf18 it ne
469c: b22d sxthne r5, r5
469e: e7ef b.n 4680 <_printf_i+0xbc>
46a0: 680b ldr r3, [r1, #0]
46a2: 6825 ldr r5, [r4, #0]
46a4: 1d18 adds r0, r3, #4
46a6: 6008 str r0, [r1, #0]
46a8: 0628 lsls r0, r5, #24
46aa: d501 bpl.n 46b0 <_printf_i+0xec>
46ac: 681d ldr r5, [r3, #0]
46ae: e002 b.n 46b6 <_printf_i+0xf2>
46b0: 0669 lsls r1, r5, #25
46b2: d5fb bpl.n 46ac <_printf_i+0xe8>
46b4: 881d ldrh r5, [r3, #0]
46b6: 4854 ldr r0, [pc, #336] ; (4808 <_printf_i+0x244>)
46b8: 2f6f cmp r7, #111 ; 0x6f
46ba: bf0c ite eq
46bc: 2308 moveq r3, #8
46be: 230a movne r3, #10
46c0: 2100 movs r1, #0
46c2: f884 1043 strb.w r1, [r4, #67] ; 0x43
46c6: 6866 ldr r6, [r4, #4]
46c8: 60a6 str r6, [r4, #8]
46ca: 2e00 cmp r6, #0
46cc: bfa2 ittt ge
46ce: 6821 ldrge r1, [r4, #0]
46d0: f021 0104 bicge.w r1, r1, #4
46d4: 6021 strge r1, [r4, #0]
46d6: b90d cbnz r5, 46dc <_printf_i+0x118>
46d8: 2e00 cmp r6, #0
46da: d04d beq.n 4778 <_printf_i+0x1b4>
46dc: 4616 mov r6, r2
46de: fbb5 f1f3 udiv r1, r5, r3
46e2: fb03 5711 mls r7, r3, r1, r5
46e6: 5dc7 ldrb r7, [r0, r7]
46e8: f806 7d01 strb.w r7, [r6, #-1]!
46ec: 462f mov r7, r5
46ee: 42bb cmp r3, r7
46f0: 460d mov r5, r1
46f2: d9f4 bls.n 46de <_printf_i+0x11a>
46f4: 2b08 cmp r3, #8
46f6: d10b bne.n 4710 <_printf_i+0x14c>
46f8: 6823 ldr r3, [r4, #0]
46fa: 07df lsls r7, r3, #31
46fc: d508 bpl.n 4710 <_printf_i+0x14c>
46fe: 6923 ldr r3, [r4, #16]
4700: 6861 ldr r1, [r4, #4]
4702: 4299 cmp r1, r3
4704: bfde ittt le
4706: 2330 movle r3, #48 ; 0x30
4708: f806 3c01 strble.w r3, [r6, #-1]
470c: f106 36ff addle.w r6, r6, #4294967295 ; 0xffffffff
4710: 1b92 subs r2, r2, r6
4712: 6122 str r2, [r4, #16]
4714: f8cd a000 str.w sl, [sp]
4718: 464b mov r3, r9
471a: aa03 add r2, sp, #12
471c: 4621 mov r1, r4
471e: 4640 mov r0, r8
4720: f7ff fee2 bl 44e8 <_printf_common>
4724: 3001 adds r0, #1
4726: d14c bne.n 47c2 <_printf_i+0x1fe>
4728: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
472c: b004 add sp, #16
472e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
4732: 4835 ldr r0, [pc, #212] ; (4808 <_printf_i+0x244>)
4734: f884 7045 strb.w r7, [r4, #69] ; 0x45
4738: 6823 ldr r3, [r4, #0]
473a: 680e ldr r6, [r1, #0]
473c: 061f lsls r7, r3, #24
473e: f856 5b04 ldr.w r5, [r6], #4
4742: 600e str r6, [r1, #0]
4744: d514 bpl.n 4770 <_printf_i+0x1ac>
4746: 07d9 lsls r1, r3, #31
4748: bf44 itt mi
474a: f043 0320 orrmi.w r3, r3, #32
474e: 6023 strmi r3, [r4, #0]
4750: b91d cbnz r5, 475a <_printf_i+0x196>
4752: 6823 ldr r3, [r4, #0]
4754: f023 0320 bic.w r3, r3, #32
4758: 6023 str r3, [r4, #0]
475a: 2310 movs r3, #16
475c: e7b0 b.n 46c0 <_printf_i+0xfc>
475e: 6823 ldr r3, [r4, #0]
4760: f043 0320 orr.w r3, r3, #32
4764: 6023 str r3, [r4, #0]
4766: 2378 movs r3, #120 ; 0x78
4768: 4828 ldr r0, [pc, #160] ; (480c <_printf_i+0x248>)
476a: f884 3045 strb.w r3, [r4, #69] ; 0x45
476e: e7e3 b.n 4738 <_printf_i+0x174>
4770: 065e lsls r6, r3, #25
4772: bf48 it mi
4774: b2ad uxthmi r5, r5
4776: e7e6 b.n 4746 <_printf_i+0x182>
4778: 4616 mov r6, r2
477a: e7bb b.n 46f4 <_printf_i+0x130>
477c: 680b ldr r3, [r1, #0]
477e: 6826 ldr r6, [r4, #0]
4780: 6960 ldr r0, [r4, #20]
4782: 1d1d adds r5, r3, #4
4784: 600d str r5, [r1, #0]
4786: 0635 lsls r5, r6, #24
4788: 681b ldr r3, [r3, #0]
478a: d501 bpl.n 4790 <_printf_i+0x1cc>
478c: 6018 str r0, [r3, #0]
478e: e002 b.n 4796 <_printf_i+0x1d2>
4790: 0671 lsls r1, r6, #25
4792: d5fb bpl.n 478c <_printf_i+0x1c8>
4794: 8018 strh r0, [r3, #0]
4796: 2300 movs r3, #0
4798: 6123 str r3, [r4, #16]
479a: 4616 mov r6, r2
479c: e7ba b.n 4714 <_printf_i+0x150>
479e: 680b ldr r3, [r1, #0]
47a0: 1d1a adds r2, r3, #4
47a2: 600a str r2, [r1, #0]
47a4: 681e ldr r6, [r3, #0]
47a6: 6862 ldr r2, [r4, #4]
47a8: 2100 movs r1, #0
47aa: 4630 mov r0, r6
47ac: f000 f840 bl 4830 <memchr>
47b0: b108 cbz r0, 47b6 <_printf_i+0x1f2>
47b2: 1b80 subs r0, r0, r6
47b4: 6060 str r0, [r4, #4]
47b6: 6863 ldr r3, [r4, #4]
47b8: 6123 str r3, [r4, #16]
47ba: 2300 movs r3, #0
47bc: f884 3043 strb.w r3, [r4, #67] ; 0x43
47c0: e7a8 b.n 4714 <_printf_i+0x150>
47c2: 6923 ldr r3, [r4, #16]
47c4: 4632 mov r2, r6
47c6: 4649 mov r1, r9
47c8: 4640 mov r0, r8
47ca: 47d0 blx sl
47cc: 3001 adds r0, #1
47ce: d0ab beq.n 4728 <_printf_i+0x164>
47d0: 6823 ldr r3, [r4, #0]
47d2: 079b lsls r3, r3, #30
47d4: d413 bmi.n 47fe <_printf_i+0x23a>
47d6: 68e0 ldr r0, [r4, #12]
47d8: 9b03 ldr r3, [sp, #12]
47da: 4298 cmp r0, r3
47dc: bfb8 it lt
47de: 4618 movlt r0, r3
47e0: e7a4 b.n 472c <_printf_i+0x168>
47e2: 2301 movs r3, #1
47e4: 4632 mov r2, r6
47e6: 4649 mov r1, r9
47e8: 4640 mov r0, r8
47ea: 47d0 blx sl
47ec: 3001 adds r0, #1
47ee: d09b beq.n 4728 <_printf_i+0x164>
47f0: 3501 adds r5, #1
47f2: 68e3 ldr r3, [r4, #12]
47f4: 9903 ldr r1, [sp, #12]
47f6: 1a5b subs r3, r3, r1
47f8: 42ab cmp r3, r5
47fa: dcf2 bgt.n 47e2 <_printf_i+0x21e>
47fc: e7eb b.n 47d6 <_printf_i+0x212>
47fe: 2500 movs r5, #0
4800: f104 0619 add.w r6, r4, #25
4804: e7f5 b.n 47f2 <_printf_i+0x22e>
4806: bf00 nop
4808: 00005135 .word 0x00005135
480c: 00005146 .word 0x00005146
00004810 <_sbrk_r>:
4810: b538 push {r3, r4, r5, lr}
4812: 4d06 ldr r5, [pc, #24] ; (482c <_sbrk_r+0x1c>)
4814: 2300 movs r3, #0
4816: 4604 mov r4, r0
4818: 4608 mov r0, r1
481a: 602b str r3, [r5, #0]
481c: f7fc f80c bl 838 <_sbrk>
4820: 1c43 adds r3, r0, #1
4822: d102 bne.n 482a <_sbrk_r+0x1a>
4824: 682b ldr r3, [r5, #0]
4826: b103 cbz r3, 482a <_sbrk_r+0x1a>
4828: 6023 str r3, [r4, #0]
482a: bd38 pop {r3, r4, r5, pc}
482c: 200005dc .word 0x200005dc
00004830 <memchr>:
4830: f001 01ff and.w r1, r1, #255 ; 0xff
4834: 2a10 cmp r2, #16
4836: db2b blt.n 4890 <memchr+0x60>
4838: f010 0f07 tst.w r0, #7
483c: d008 beq.n 4850 <memchr+0x20>
483e: f810 3b01 ldrb.w r3, [r0], #1
4842: 3a01 subs r2, #1
4844: 428b cmp r3, r1
4846: d02d beq.n 48a4 <memchr+0x74>
4848: f010 0f07 tst.w r0, #7
484c: b342 cbz r2, 48a0 <memchr+0x70>
484e: d1f6 bne.n 483e <memchr+0xe>
4850: b4f0 push {r4, r5, r6, r7}
4852: ea41 2101 orr.w r1, r1, r1, lsl #8
4856: ea41 4101 orr.w r1, r1, r1, lsl #16
485a: f022 0407 bic.w r4, r2, #7
485e: f07f 0700 mvns.w r7, #0
4862: 2300 movs r3, #0
4864: e8f0 5602 ldrd r5, r6, [r0], #8
4868: 3c08 subs r4, #8
486a: ea85 0501 eor.w r5, r5, r1
486e: ea86 0601 eor.w r6, r6, r1
4872: fa85 f547 uadd8 r5, r5, r7
4876: faa3 f587 sel r5, r3, r7
487a: fa86 f647 uadd8 r6, r6, r7
487e: faa5 f687 sel r6, r5, r7
4882: b98e cbnz r6, 48a8 <memchr+0x78>
4884: d1ee bne.n 4864 <memchr+0x34>
4886: bcf0 pop {r4, r5, r6, r7}
4888: f001 01ff and.w r1, r1, #255 ; 0xff
488c: f002 0207 and.w r2, r2, #7
4890: b132 cbz r2, 48a0 <memchr+0x70>
4892: f810 3b01 ldrb.w r3, [r0], #1
4896: 3a01 subs r2, #1
4898: ea83 0301 eor.w r3, r3, r1
489c: b113 cbz r3, 48a4 <memchr+0x74>
489e: d1f8 bne.n 4892 <memchr+0x62>
48a0: 2000 movs r0, #0
48a2: 4770 bx lr
48a4: 3801 subs r0, #1
48a6: 4770 bx lr
48a8: 2d00 cmp r5, #0
48aa: bf06 itte eq
48ac: 4635 moveq r5, r6
48ae: 3803 subeq r0, #3
48b0: 3807 subne r0, #7
48b2: f015 0f01 tst.w r5, #1
48b6: d107 bne.n 48c8 <memchr+0x98>
48b8: 3001 adds r0, #1
48ba: f415 7f80 tst.w r5, #256 ; 0x100
48be: bf02 ittt eq
48c0: 3001 addeq r0, #1
48c2: f415 3fc0 tsteq.w r5, #98304 ; 0x18000
48c6: 3001 addeq r0, #1
48c8: bcf0 pop {r4, r5, r6, r7}
48ca: 3801 subs r0, #1
48cc: 4770 bx lr
48ce: bf00 nop
000048d0 <memmove>:
48d0: 4288 cmp r0, r1
48d2: b510 push {r4, lr}
48d4: eb01 0402 add.w r4, r1, r2
48d8: d902 bls.n 48e0 <memmove+0x10>
48da: 4284 cmp r4, r0
48dc: 4623 mov r3, r4
48de: d807 bhi.n 48f0 <memmove+0x20>
48e0: 1e43 subs r3, r0, #1
48e2: 42a1 cmp r1, r4
48e4: d008 beq.n 48f8 <memmove+0x28>
48e6: f811 2b01 ldrb.w r2, [r1], #1
48ea: f803 2f01 strb.w r2, [r3, #1]!
48ee: e7f8 b.n 48e2 <memmove+0x12>
48f0: 4402 add r2, r0
48f2: 4601 mov r1, r0
48f4: 428a cmp r2, r1
48f6: d100 bne.n 48fa <memmove+0x2a>
48f8: bd10 pop {r4, pc}
48fa: f813 4d01 ldrb.w r4, [r3, #-1]!
48fe: f802 4d01 strb.w r4, [r2, #-1]!
4902: e7f7 b.n 48f4 <memmove+0x24>
00004904 <__malloc_lock>:
4904: 4801 ldr r0, [pc, #4] ; (490c <__malloc_lock+0x8>)
4906: f7ff bc37 b.w 4178 <__retarget_lock_acquire_recursive>
490a: bf00 nop
490c: 200005d4 .word 0x200005d4
00004910 <__malloc_unlock>:
4910: 4801 ldr r0, [pc, #4] ; (4918 <__malloc_unlock+0x8>)
4912: f7ff bc32 b.w 417a <__retarget_lock_release_recursive>
4916: bf00 nop
4918: 200005d4 .word 0x200005d4
0000491c <_free_r>:
491c: b538 push {r3, r4, r5, lr}
491e: 4605 mov r5, r0
4920: 2900 cmp r1, #0
4922: d045 beq.n 49b0 <_free_r+0x94>
4924: f851 3c04 ldr.w r3, [r1, #-4]
4928: 1f0c subs r4, r1, #4
492a: 2b00 cmp r3, #0
492c: bfb8 it lt
492e: 18e4 addlt r4, r4, r3
4930: f7ff ffe8 bl 4904 <__malloc_lock>
4934: 4a1f ldr r2, [pc, #124] ; (49b4 <_free_r+0x98>)
4936: 6813 ldr r3, [r2, #0]
4938: 4610 mov r0, r2
493a: b933 cbnz r3, 494a <_free_r+0x2e>
493c: 6063 str r3, [r4, #4]
493e: 6014 str r4, [r2, #0]
4940: 4628 mov r0, r5
4942: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
4946: f7ff bfe3 b.w 4910 <__malloc_unlock>
494a: 42a3 cmp r3, r4
494c: d90b bls.n 4966 <_free_r+0x4a>
494e: 6821 ldr r1, [r4, #0]
4950: 1862 adds r2, r4, r1
4952: 4293 cmp r3, r2
4954: bf04 itt eq
4956: 681a ldreq r2, [r3, #0]
4958: 685b ldreq r3, [r3, #4]
495a: 6063 str r3, [r4, #4]
495c: bf04 itt eq
495e: 1852 addeq r2, r2, r1
4960: 6022 streq r2, [r4, #0]
4962: 6004 str r4, [r0, #0]
4964: e7ec b.n 4940 <_free_r+0x24>
4966: 461a mov r2, r3
4968: 685b ldr r3, [r3, #4]
496a: b10b cbz r3, 4970 <_free_r+0x54>
496c: 42a3 cmp r3, r4
496e: d9fa bls.n 4966 <_free_r+0x4a>
4970: 6811 ldr r1, [r2, #0]
4972: 1850 adds r0, r2, r1
4974: 42a0 cmp r0, r4
4976: d10b bne.n 4990 <_free_r+0x74>
4978: 6820 ldr r0, [r4, #0]
497a: 4401 add r1, r0
497c: 1850 adds r0, r2, r1
497e: 4283 cmp r3, r0
4980: 6011 str r1, [r2, #0]
4982: d1dd bne.n 4940 <_free_r+0x24>
4984: 6818 ldr r0, [r3, #0]
4986: 685b ldr r3, [r3, #4]
4988: 6053 str r3, [r2, #4]
498a: 4401 add r1, r0
498c: 6011 str r1, [r2, #0]
498e: e7d7 b.n 4940 <_free_r+0x24>
4990: d902 bls.n 4998 <_free_r+0x7c>
4992: 230c movs r3, #12
4994: 602b str r3, [r5, #0]
4996: e7d3 b.n 4940 <_free_r+0x24>
4998: 6820 ldr r0, [r4, #0]
499a: 1821 adds r1, r4, r0
499c: 428b cmp r3, r1
499e: bf04 itt eq
49a0: 6819 ldreq r1, [r3, #0]
49a2: 685b ldreq r3, [r3, #4]
49a4: 6063 str r3, [r4, #4]
49a6: bf04 itt eq
49a8: 1809 addeq r1, r1, r0
49aa: 6021 streq r1, [r4, #0]
49ac: 6054 str r4, [r2, #4]
49ae: e7c7 b.n 4940 <_free_r+0x24>
49b0: bd38 pop {r3, r4, r5, pc}
49b2: bf00 nop
49b4: 200005c8 .word 0x200005c8
000049b8 <_realloc_r>:
49b8: b5f8 push {r3, r4, r5, r6, r7, lr}
49ba: 4607 mov r7, r0
49bc: 4614 mov r4, r2
49be: 460e mov r6, r1
49c0: b921 cbnz r1, 49cc <_realloc_r+0x14>
49c2: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr}
49c6: 4611 mov r1, r2
49c8: f7ff bbd8 b.w 417c <_malloc_r>
49cc: b922 cbnz r2, 49d8 <_realloc_r+0x20>
49ce: f7ff ffa5 bl 491c <_free_r>
49d2: 4625 mov r5, r4
49d4: 4628 mov r0, r5
49d6: bdf8 pop {r3, r4, r5, r6, r7, pc}
49d8: f000 f814 bl 4a04 <_malloc_usable_size_r>
49dc: 42a0 cmp r0, r4
49de: d20f bcs.n 4a00 <_realloc_r+0x48>
49e0: 4621 mov r1, r4
49e2: 4638 mov r0, r7
49e4: f7ff fbca bl 417c <_malloc_r>
49e8: 4605 mov r5, r0
49ea: 2800 cmp r0, #0
49ec: d0f2 beq.n 49d4 <_realloc_r+0x1c>
49ee: 4631 mov r1, r6
49f0: 4622 mov r2, r4
49f2: f7ff fb83 bl 40fc <memcpy>
49f6: 4631 mov r1, r6
49f8: 4638 mov r0, r7
49fa: f7ff ff8f bl 491c <_free_r>
49fe: e7e9 b.n 49d4 <_realloc_r+0x1c>
4a00: 4635 mov r5, r6
4a02: e7e7 b.n 49d4 <_realloc_r+0x1c>
00004a04 <_malloc_usable_size_r>:
4a04: f851 3c04 ldr.w r3, [r1, #-4]
4a08: 1f18 subs r0, r3, #4
4a0a: 2b00 cmp r3, #0
4a0c: bfbc itt lt
4a0e: 580b ldrlt r3, [r1, r0]
4a10: 18c0 addlt r0, r0, r3
4a12: 4770 bx lr
4a14: 682f2e2e .word 0x682f2e2e
4a18: 732f6c61 .word 0x732f6c61
4a1c: 682f6372 .word 0x682f6372
4a20: 695f6c61 .word 0x695f6c61
4a24: 00632e6f .word 0x00632e6f
4a28: 682f2e2e .word 0x682f2e2e
4a2c: 712f6c70 .word 0x712f6c70
4a30: 2f697073 .word 0x2f697073
4a34: 5f6c7068 .word 0x5f6c7068
4a38: 69707371 .word 0x69707371
4a3c: 632e .short 0x632e
4a3e: 00 .byte 0x00
4a3f: 2e .byte 0x2e
4a40: 61682f2e .word 0x61682f2e
4a44: 72732f6c .word 0x72732f6c
4a48: 61682f63 .word 0x61682f63
4a4c: 61635f6c .word 0x61635f6c
4a50: 646e656c .word 0x646e656c
4a54: 632e7261 .word 0x632e7261
4a58: 00 .byte 0x00
4a59: 45 .byte 0x45
4a5a: 5252 .short 0x5252
4a5c: 6425203a .word 0x6425203a
4a60: 000a .short 0x000a
4a62: 2e2e .short 0x2e2e
4a64: 5f64732f .word 0x5f64732f
4a68: 2f636d6d .word 0x2f636d6d
4a6c: 6d5f6473 .word 0x6d5f6473
4a70: 632e636d .word 0x632e636d
4a74: 3e3e3e00 .word 0x3e3e3e00
4a78: 61745300 .word 0x61745300
4a7c: 53207472 .word 0x53207472
4a80: 61632044 .word 0x61632044
4a84: 69206472 .word 0x69206472
4a88: 6174736e .word 0x6174736e
4a8c: 0d0a6c6c .word 0x0d0a6c6c
4a90: 3a732500 .word 0x3a732500
4a94: 444d4320 .word 0x444d4320
4a98: 46203535 .word 0x46203535
4a9c: 0a6c6961 .word 0x0a6c6961
4aa0: 7325000d .word 0x7325000d
4aa4: 4341203a .word 0x4341203a
4aa8: 3134444d .word 0x3134444d
4aac: 69614620 .word 0x69614620
4ab0: 000d0a6c .word 0x000d0a6c
4ab4: 203a7325 .word 0x203a7325
4ab8: 444d4341 .word 0x444d4341
4abc: 54203134 .word 0x54203134
4ac0: 6f656d69 .word 0x6f656d69
4ac4: 6f207475 .word 0x6f207475
4ac8: 7562206e .word 0x7562206e
4acc: 202c7973 .word 0x202c7973
4ad0: 70736572 .word 0x70736572
4ad4: 30203233 .word 0x30203233
4ad8: 38302578 .word 0x38302578
4adc: 0d0a2078 .word 0x0d0a2078
4ae0: 3a732500 .word 0x3a732500
4ae4: 444d4320 .word 0x444d4320
4ae8: 46203835 .word 0x46203835
4aec: 0a6c6961 .word 0x0a6c6961
4af0: 7453000d .word 0x7453000d
4af4: 20747261 .word 0x20747261
4af8: 20434d4d .word 0x20434d4d
4afc: 74736e49 .word 0x74736e49
4b00: 0a6c6c61 .word 0x0a6c6c61
4b04: 7325000d .word 0x7325000d
4b08: 4d43203a .word 0x4d43203a
4b0c: 53203144 .word 0x53203144
4b10: 46204950 .word 0x46204950
4b14: 206c6961 .word 0x206c6961
4b18: 7542202d .word 0x7542202d
4b1c: 72207973 .word 0x72207973
4b20: 79727465 .word 0x79727465
4b24: 0a642520 .word 0x0a642520
4b28: 7325000d .word 0x7325000d
4b2c: 4d43203a .word 0x4d43203a
4b30: 54203144 .word 0x54203144
4b34: 6f656d69 .word 0x6f656d69
4b38: 6f207475 .word 0x6f207475
4b3c: 7562206e .word 0x7562206e
4b40: 0d0a7973 .word 0x0d0a7973
4b44: 2f445300 .word 0x2f445300
4b48: 20434d4d .word 0x20434d4d
4b4c: 64726163 .word 0x64726163
4b50: 61657220 .word 0x61657220
4b54: 0d0a7964 .word 0x0d0a7964
4b58: 00000000 .word 0x00000000
00004b5c <__func__.1>:
4b5c: 735f6473 6f5f6970 6f635f70 sd_spi_op_cond.
00004b6b <__func__.0>:
4b6b: 5f636d6d 5f697073 635f706f 00646e6f mmc_spi_op_cond.
...
00004b7c <mmc_trans_multipliers>:
4b7c: 00000000 0000000a 0000000c 0000000d ................
4b8c: 0000000f 00000014 0000001a 0000001e ................
4b9c: 00000023 00000028 0000002d 00000034 #...(...-...4...
4bac: 00000037 0000003c 00000046 00000050 7...<...F...P...
00004bbc <sd_mmc_trans_units>:
4bbc: 0000000a 00000064 000003e8 00002710 ....d........'..
...
00004bd8 <sd_trans_multipliers>:
4bd8: 00000000 0000000a 0000000c 0000000d ................
4be8: 0000000f 00000014 00000019 0000001e ................
4bf8: 00000023 00000028 0000002d 00000032 #...(...-...2...
4c08: 00000037 0000003c 00000046 00000050 7...<...F...P...
4c18: 732f2e2e 6d6d5f64 64732f63 636d6d5f ../sd_mmc/sd_mmc
4c28: 6970735f 2500632e 52203a73 20646165 _spi.c.%s: Read
4c38: 636f6c62 7420736b 6f656d69 0d0a7475 blocks timeout..
4c48: 3a732500 43524320 74616420 72652061 .%s: CRC data er
4c58: 20726f72 656b6f74 000d0a6e 203a7325 ror token...%s:
4c68: 2074754f 7220666f 65676e61 74616420 Out of range dat
4c78: 72652061 20726f72 656b6f74 000d0a6e a error token...
4c88: 203a7325 61766e49 2064696c 61746144 %s: Invalid Data
4c98: 73655220 736e6f70 6f542065 206e656b Response Token
4ca8: 78257830 25000d0a 57203a73 65746972 0x%x...%s: Write
4cb8: 6f6c6220 2c736b63 5f445320 5f434d4d blocks, SD_MMC_
4cc8: 5f495053 5f525245 2c435243 73657220 SPI_ERR_CRC, res
4cd8: 78302070 0d0a7825 3a732500 69725720 p 0x%x...%s: Wri
4ce8: 62206574 6b636f6c 44532073 434d4d5f te blocks SD_MMC
4cf8: 4950535f 5252455f 2c52575f 73657220 _SPI_ERR_WR, res
4d08: 78302070 0d0a7825 3a732500 6f745320 p 0x%x...%s: Sto
4d18: 72772070 20657469 636f6c62 7420736b p write blocks t
4d28: 6f656d69 0d0a7475 206f4e00 43204453 imeout...No SD C
4d38: 20647261 70736572 65736e6f 73617720 ard response was
4d48: 65727020 746e6573 002e2e2e 203a7325 present....%s:
4d58: 20646d63 64323025 7261202c 78302067 cmd %02d, arg 0x
4d68: 6c383025 52202c58 69742031 756f656d %08lX, R1 timeou
4d78: 000a0d74 203a7325 20646d63 64323025 t...%s: cmd %02d
4d88: 7261202c 78302067 6c383025 72202c78 , arg 0x%08lx, r
4d98: 78302031 78323025 3152202c 4950535f 1 0x%02x, R1_SPI
4da8: 4d4f435f 4352435f 25000d0a 63203a73 _COM_CRC...%s: c
4db8: 2520646d 2c643230 67726120 25783020 md %02d, arg 0x%
4dc8: 786c3830 3172202c 25783020 52202c78 08lx, r1 0x%x, R
4dd8: 4c492031 4147454c 4f435f4c 4e414d4d 1 ILLEGAL_COMMAN
4de8: 000d0a44 203a7325 20646d63 64323025 D...%s: cmd %02d
4df8: 7261202c 78302067 6c383025 72202c78 , arg 0x%08lx, r
4e08: 78302031 202c7825 65203152 726f7272 1 0x%x, R1 error
4e18: 25000d0a 63203a73 2520646d 2c643230 ...%s: cmd %02d,
4e28: 67726120 25783020 786c3830 7542202c arg 0x%08lx, Bu
4e38: 73207973 616e6769 6c61206c 73796177 sy signal always
4e48: 67696820 000d0a68 203a7325 74697257 high...%s: Writ
4e58: 6c622065 736b636f 6d697420 74756f65 e blocks timeout
4e68: 3c000d0a ...<<<.
00004e6f <__func__.5>:
4e6f: 5f697073 79735f6d 735f636e 74726174 spi_m_sync_start
4e7f: 6165725f 6c625f64 006b636f _read_block.
00004e8b <__func__.3>:
4e8b: 5f697073 79735f6d 735f636e 5f706f74 spi_m_sync_stop_
4e9b: 74697277 6c625f65 006b636f write_block.
00004ea7 <__func__.1>:
4ea7: 5f697073 79735f6d 735f636e 5f706f74 spi_m_sync_stop_
4eb7: 746c756d 69727769 625f6574 6b636f6c multiwrite_block
...
00004ec8 <__func__.6>:
4ec8: 5f697073 79735f6d 615f636e 5f637464 spi_m_sync_adtc_
4ed8: 72617473 start.
00004ede <__func__.4>:
4ede: 5f697073 79735f6d 735f636e 74726174 spi_m_sync_start
4eee: 6972775f 625f6574 6b636f6c _write_blocks.
00004efc <__func__.2>:
4efc: 5f697073 79735f6d 775f636e 5f746961 spi_m_sync_wait_
4f0c: 5f646e65 775f666f 65746972 6f6c625f end_of_write_blo
4f1c: 00736b63 cks.
00004f20 <__func__.0>:
4f20: 5f697073 79735f6d 775f636e 65746972 spi_m_sync_write
4f30: 726f775f 2e2e0064 6c61682f 6372732f _word.../hal/src
4f40: 6c61682f 6970735f 735f6d5f 2e636e79 /hal_spi_m_sync.
4f50: 2e2e0063 6c61682f 6372732f 6c61682f c.../hal/src/hal
4f60: 69636d5f 6e79735f 00632e63 682f2e2e _mci_sync.c.../h
4f70: 752f6c70 682f6273 755f6c70 632e6273 pl/usb/hpl_usb.c
...
00004f82 <psize_2_size>:
4f82: 00100008 00400020 01000080 04000200 .... .@.........
4f92: 682f2e2e 752f6c61 736c6974 6372732f ../hal/utils/src
4fa2: 6974752f 6c5f736c 2e747369 2e2e0063 /utils_list.c...
4fb2: 6c70682f 6864732f 70682f63 64735f6c /hpl/sdhc/hpl_sd
4fc2: 632e6368 2f2e2e00 2f6c6168 2f637273 hc.c.../hal/src/
4fd2: 5f6c6168 72617375 79735f74 632e636e hal_usart_sync.c
4fe2: 2f2e2e00 2f627375 74736f68 6273752f .../usb/host/usb
4ff2: 632e6368 2f2e2e00 2f6c7068 2f637472 hc.c.../hpl/rtc/
5002: 5f6c7068 2e637472 2e2e0063 6c70682f hpl_rtc.c.../hpl
5012: 7265732f 2f6d6f63 5f6c7068 63726573 /sercom/hpl_serc
5022: 632e6d6f 30000000 34004000 20004000 om.c...0.@.4.@.
5032: 40004101 00004101 04004300 08004300 .A.@.A...C...C..
5042: 0c004300 .C...C
00005048 <_i2cms>:
...
00005060 <sercomspi_regs>:
5060: 0030000c 00020000 00000000 00ff00fe ..0.............
5070: 2f2e2e02 2f6c6168 2f637273 5f6c6168 .../hal/src/hal_
5080: 69707371 6e79735f 00632e63 75626544 qspi_sync.c.Debu
5090: 6e492067 61697469 657a696c 41000a64 g Initialized..A
50a0: 72657373 61462074 72756c69 74612065 ssert Failure at
50b0: 6e696c20 64252065 7325202c 7325203a line %d, %s: %s
50c0: 0000000a ....
000050c4 <__sf_fake_stderr>:
...
000050e4 <__sf_fake_stdin>:
...
00005104 <__sf_fake_stdout>:
...
5124: 2b302d23 6c680020 6665004c 47464567 #-0+ .hlL.efgEFG
5134: 32313000 36353433 41393837 45444342 .0123456789ABCDE
5144: 31300046 35343332 39383736 64636261 F.0123456789abcd
5154: 00006665 ef..
00005158 <_init>:
5158: b5f8 push {r3, r4, r5, r6, r7, lr}
515a: bf00 nop
515c: bcf8 pop {r3, r4, r5, r6, r7}
515e: bc08 pop {r3}
5160: 469e mov lr, r3
5162: 4770 bx lr
00005164 <__frame_dummy_init_array_entry>:
5164: 0289 0000 ....
00005168 <_fini>:
5168: b5f8 push {r3, r4, r5, r6, r7, lr}
516a: bf00 nop
516c: bcf8 pop {r3, r4, r5, r6, r7}
516e: bc08 pop {r3}
5170: 469e mov lr, r3
5172: 4770 bx lr
00005174 <__do_global_dtors_aux_fini_array_entry>:
5174: 0265 0000 e...
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