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sd_mmc_spi_card_init () at ../sd_mmc/sd_mmc.c:353
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|
353 sd_mmc_card->type = CARD_TYPE_SD;
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sd_mmc_spi_card_init () at ../sd_mmc/sd_mmc.c:353
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353 sd_mmc_card->type = CARD_TYPE_SD;
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sd_mmc_spi_card_init () at ../sd_mmc/sd_mmc.c:353
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353 sd_mmc_card->type = CARD_TYPE_SD;
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/home/toolsbuild/workspace/arm-gnu-toolchain/gcc-arm-none-eabi-6-2017-q2-update/src/gdb/gdb/inline-frame.c:167: internal-error: void inline_frame_this_id(frame_info*, void**, frame_id*): Assertion `frame_id_p (*this_id)' failed.
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A problem internal to GDB has been detected,
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further debugging may prove unreliable.
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Quit this debugging session? (y or n) [answered Y; input not from terminal]
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This is a bug, please report it. For instructions, see:
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<http://www.gnu.org/software/gdb/bugs/>.
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/home/toolsbuild/workspace/arm-gnu-toolchain/gcc-arm-none-eabi-6-2017-q2-update/src/gdb/gdb/inline-frame.c:167: internal-error: void inline_frame_this_id(frame_info*, void**, frame_id*): Assertion `frame_id_p (*this_id)' failed.
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A problem internal to GDB has been detected,
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further debugging may prove unreliable.
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Create a core file of GDB? (y or n) [answered Y; input not from terminal]
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warning: No executable has been specified and target does not support
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determining executable automatically. Try using the "file" command.
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[36m───[0m [1;33mAssembly[0m [36m────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
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[1;32m0x00000aa0[0m[1;32m [0m[1;32m[0m[1;32m?[0m[1;32m ldr r3, [pc, #580] ; (0xce8)[0m
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[1;30m0x00000aa2[0m [1;30m?[0m ldr r4, [pc, #584] ; (0xcec)
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[1;30m0x00000aa4[0m [1;30m?[0m ldr.w r2, [r3, #128] ; 0x80
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[1;30m0x00000aa8[0m [1;30m?[0m ldr r7, [pc, #580] ; (0xcf0)
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[1;30m0x00000aaa[0m [1;30m?[0m ldr r6, [pc, #584] ; (0xcf4)
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[1;30m0x00000aac[0m [1;30m?[0m orr.w r2, r2, #268435456 ; 0x10000000
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[1;30m0x00000ab0[0m [1;30m?[0m str.w r2, [r3, #128] ; 0x80
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[1;30m0x00000ab4[0m [1;30m?[0m ldr.w r2, [r3, #144] ; 0x90
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[1;30m0x00000ab8[0m [1;30m?[0m orr.w r2, r2, #268435456 ; 0x10000000
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[1;30m0x00000abc[0m [1;30m?[0m str.w r2, [r3, #144] ; 0x90
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[36m───[0m [33mBreakpoints[0m [36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
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[36m───[0m [33mExpressions[0m [36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
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[36m───[0m [33mHistory[0m [36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
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[36m───[0m [33mMemory[0m [36m──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
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[36m───[0m [1;33mRegisters[0m [36m───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
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[1;30mr0[0m [1;32m0x00000001[0m [1;30mr1[0m [1;32m0x00000000[0m [1;30mr2[0m [1;32m0x41008000[0m [1;30mr3[0m [1;32m0x0000090d[0m [1;30mr4[0m [1;32m0x00000003[0m [1;30mr5[0m [1;32m0x00000a85[0m [1;30mr6[0m [1;32m0x20010408[0m [1;30mr7[0m [1;32m0x00000036[0m
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[1;30mr8[0m [1;32m0x00000001[0m [1;30mr9[0m [1;32m0x00003c63[0m [1;30mr10[0m [1;32m0x00000000[0m [1;30mr11[0m [1;32m0xfffbf5e7[0m [1;30mr12[0m [1;32m0x0000000a[0m [1;30msp[0m [1;32m0x20010580[0m [1;30mlr[0m [1;32m0x00000901[0m [1;30mpc[0m [1;32m0x00000aa0[0m
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[1;30mxPSR[0m [1;32m0x61000000[0m
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[36m───[0m [33mSource[0m [36m──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
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[36m───[0m [1;33mStack[0m [36m───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
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[[1;32m0[0m] from [1;32m0x00000aa0[0m
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[[32m1[0m] from [32m0x00000900[0m
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[36m───[0m [1;33mThreads[0m [36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
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[[1;32m1[0m] id [1;32m0[0m from [1;32m0x00000aa0[0m
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[36m───[0m [33mVariables[0m [36m───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
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[36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
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0x00000aa0 in ?? ()
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scripts/debug.gdb:5: Error in sourced command file:
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|
|
No executable file specified.
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|
|
Use the "file" or "exec-file" command.
|
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|
|
Cannot find bounds of current function
|
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|
Starting program:
|
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|
|
warning: No executable has been specified and target does not support
|
|
|
|
|
determining executable automatically. Try using the "file" command.
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|
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|
|
[H[J[3J[36m───[0m [1;33mOutput/messages[0m [36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
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|
Program stopped.
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[36m───[0m [1;33mAssembly[0m [36m────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
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|
[1;32m0x00003ec4[0m[1;32m [0m[1;32m[0m[1;32m?[0m[1;32m ldr r1, [pc, #96] ; (0x3f28)[0m
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|
|
[1;30m0x00003ec6[0m [1;30m?[0m ldr r0, [pc, #100] ; (0x3f2c)
|
|
|
|
|
[1;30m0x00003ec8[0m [1;30m?[0m cmp r1, r0
|
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|
[1;30m0x00003eca[0m [1;30m?[0m push {r4, lr}
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[1;30m0x00003ecc[0m [1;30m?[0m beq.n 0x3ee4
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[1;30m0x00003ece[0m [1;30m?[0m ldr r3, [pc, #96] ; (0x3f30)
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[1;30m0x00003ed0[0m [1;30m?[0m adds r2, r3, #3
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|
|
[1;30m0x00003ed2[0m [1;30m?[0m subs r2, r2, r0
|
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[1;30m0x00003ed4[0m [1;30m?[0m bic.w r2, r2, #3
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|
|
[1;30m0x00003ed8[0m [1;30m?[0m subs r4, r0, #3
|
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|
[36m───[0m [33mBreakpoints[0m [36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
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[36m───[0m [33mExpressions[0m [36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
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[36m───[0m [33mHistory[0m [36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
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[36m───[0m [33mMemory[0m [36m──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
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|
|
[36m───[0m [1;33mRegisters[0m [36m───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[1;30mr0[0m [m0x00000001[0m [1;30mr1[0m [m0x00000000[0m [1;30mr2[0m [m0x41008000[0m [1;30mr3[0m [m0x0000090d[0m [1;30mr4[0m [m0x00000003[0m [1;30mr5[0m [m0x00000a85[0m [1;30mr6[0m [m0x20010408[0m [1;30mr7[0m [m0x00000036[0m
|
|
|
|
|
[1;30mr8[0m [m0x00000001[0m [1;30mr9[0m [m0x00003c63[0m [1;30mr10[0m [m0x00000000[0m [1;30mr11[0m [m0xfffbf5e7[0m [1;30mr12[0m [m0x0000000a[0m [1;30msp[0m [1;32m0x200105e0[0m [1;30mlr[0m [1;32m0xffffffff[0m [1;30mpc[0m [1;32m0x00003ec4[0m
|
|
|
|
|
[1;30mxPSR[0m [1;32m0x01000000[0m
|
|
|
|
|
[36m───[0m [33mSource[0m [36m──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[36m───[0m [1;33mStack[0m [36m───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[[1;32m0[0m] from [1;32m0x00003ec4[0m
|
|
|
|
|
[[32m1[0m] from [32m0xfffffffe[0m
|
|
|
|
|
[36m───[0m [1;33mThreads[0m [36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[[1;32m1[0m] id [1;32m0[0m from [1;32m0x00003ec4[0m
|
|
|
|
|
[36m───[0m [33mVariables[0m [36m───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
0x00003ec4 in ?? ()
|
|
|
|
|
Continuing.
|
|
|
|
|
[H[J[3J[36m───[0m [1;33mOutput/messages[0m [36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
target not halted
|
|
|
|
|
target samd51p20a.cpu was not halted when resume was requested
|
|
|
|
|
|
|
|
|
|
Program received signal SIGINT, Interrupt.
|
|
|
|
|
[36m───[0m [1;33mAssembly[0m [36m────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[1;32m0x00002a90[0m[1;32m [0m[1;32m[0m[1;32m?[0m[1;32m mov r0, r4[0m
|
|
|
|
|
[1;30m0x00002a92[0m [1;30m?[0m blx r6
|
|
|
|
|
[1;30m0x00002a94[0m [1;30m?[0m cmp r0, #0
|
|
|
|
|
[1;30m0x00002a96[0m [1;30m?[0m beq.n 0x2a90
|
|
|
|
|
[1;30m0x00002a98[0m [1;30m?[0m mov r0, r5
|
|
|
|
|
[1;30m0x00002a9a[0m [1;30m?[0m ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
|
|
|
|
|
[1;30m0x00002a9e[0m [1;30m?[0m mov r0, r1
|
|
|
|
|
[1;30m0x00002aa0[0m [1;30m?[0m b.n 0x2a58
|
|
|
|
|
[1;30m0x00002aa2[0m [1;30m?[0m nop
|
|
|
|
|
[1;30m0x00002aa4[0m [1;30m?[0m ldr r7, [pc, #236] ; (0x2b94)
|
|
|
|
|
[36m───[0m [33mBreakpoints[0m [36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[36m───[0m [33mExpressions[0m [36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[36m───[0m [33mHistory[0m [36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[36m───[0m [33mMemory[0m [36m──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[36m───[0m [1;33mRegisters[0m [36m───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[1;30mr0[0m [1;32m0x00000000[0m [1;30mr1[0m [1;32m0x0000000a[0m [1;30mr2[0m [1;32m0x000000f1[0m [1;30mr3[0m [1;32m0x43000000[0m [1;30mr4[0m [1;32m0x2000058c[0m [1;30mr5[0m [1;32m0x0000003b[0m [1;30mr6[0m [1;32m0x00003c6d[0m [1;30mr7[0m [1;32m0x0000003b[0m
|
|
|
|
|
[1;30mr8[0m [1;32m0x00003c55[0m [1;30mr9[0m [m0x00003c63[0m [1;30mr10[0m [m0x00000000[0m [1;30mr11[0m [m0xfffbf5e7[0m [1;30mr12[0m [m0x0000000a[0m [1;30msp[0m [1;32m0x200103e0[0m [1;30mlr[0m [1;32m0x00002a95[0m [1;30mpc[0m [1;32m0x00002a90[0m
|
|
|
|
|
[1;30mxPSR[0m [1;32m0x61000000[0m
|
|
|
|
|
[36m───[0m [33mSource[0m [36m──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[36m───[0m [1;33mStack[0m [36m───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[[1;32m0[0m] from [1;32m0x00002a90[0m
|
|
|
|
|
[[32m1[0m] from [32m0x00002a94[0m
|
|
|
|
|
[36m───[0m [1;33mThreads[0m [36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[[1;32m1[0m] id [1;32m0[0m from [1;32m0x00002a90[0m
|
|
|
|
|
[36m───[0m [33mVariables[0m [36m───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
0x00002a90 in ?? ()
|
|
|
|
|
Cannot find bounds of current function
|
|
|
|
|
Starting program:
|
|
|
|
|
warning: No executable has been specified and target does not support
|
|
|
|
|
determining executable automatically. Try using the "file" command.
|
|
|
|
|
[H[J[3J[36m───[0m [1;33mOutput/messages[0m [36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
|
|
|
|
|
Program stopped.
|
|
|
|
|
[36m───[0m [1;33mAssembly[0m [36m────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[1;32m0x00003ec4[0m[1;32m [0m[1;32m[0m[1;32m?[0m[1;32m ldr r1, [pc, #96] ; (0x3f28)[0m
|
|
|
|
|
[1;30m0x00003ec6[0m [1;30m?[0m ldr r0, [pc, #100] ; (0x3f2c)
|
|
|
|
|
[1;30m0x00003ec8[0m [1;30m?[0m cmp r1, r0
|
|
|
|
|
[1;30m0x00003eca[0m [1;30m?[0m push {r4, lr}
|
|
|
|
|
[1;30m0x00003ecc[0m [1;30m?[0m beq.n 0x3ee4
|
|
|
|
|
[1;30m0x00003ece[0m [1;30m?[0m ldr r3, [pc, #96] ; (0x3f30)
|
|
|
|
|
[1;30m0x00003ed0[0m [1;30m?[0m adds r2, r3, #3
|
|
|
|
|
[1;30m0x00003ed2[0m [1;30m?[0m subs r2, r2, r0
|
|
|
|
|
[1;30m0x00003ed4[0m [1;30m?[0m bic.w r2, r2, #3
|
|
|
|
|
[1;30m0x00003ed8[0m [1;30m?[0m subs r4, r0, #3
|
|
|
|
|
[36m───[0m [33mBreakpoints[0m [36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[36m───[0m [33mExpressions[0m [36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[36m───[0m [33mHistory[0m [36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[36m───[0m [33mMemory[0m [36m──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[36m───[0m [1;33mRegisters[0m [36m───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[1;30mr0[0m [m0x00000000[0m [1;30mr1[0m [m0x0000000a[0m [1;30mr2[0m [m0x000000f1[0m [1;30mr3[0m [m0x43000000[0m [1;30mr4[0m [m0x2000058c[0m [1;30mr5[0m [m0x0000003b[0m [1;30mr6[0m [m0x00003c6d[0m [1;30mr7[0m [m0x0000003b[0m
|
|
|
|
|
[1;30mr8[0m [m0x00003c55[0m [1;30mr9[0m [m0x00003c63[0m [1;30mr10[0m [m0x00000000[0m [1;30mr11[0m [m0xfffbf5e7[0m [1;30mr12[0m [m0x0000000a[0m [1;30msp[0m [1;32m0x200105e0[0m [1;30mlr[0m [1;32m0xffffffff[0m [1;30mpc[0m [1;32m0x00003ec4[0m
|
|
|
|
|
[1;30mxPSR[0m [1;32m0x01000000[0m
|
|
|
|
|
[36m───[0m [33mSource[0m [36m──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[36m───[0m [1;33mStack[0m [36m───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[[1;32m0[0m] from [1;32m0x00003ec4[0m
|
|
|
|
|
[[32m1[0m] from [32m0xfffffffe[0m
|
|
|
|
|
[36m───[0m [1;33mThreads[0m [36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[[1;32m1[0m] id [1;32m0[0m from [1;32m0x00003ec4[0m
|
|
|
|
|
[36m───[0m [33mVariables[0m [36m───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
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|
[36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
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0x00003ec4 in ?? ()
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No symbol table is loaded. Use the "file" command.
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Breakpoint 1 (main) pending.
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m4-metro.elf: No such file or directory.
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m4_metro.elf: No such file or directory.
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Reading symbols from metro-m4.elf...done.
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Loading section .text, size 0x50cc lma 0x0
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Loading section .relocate, size 0x74 lma 0x50cc
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Start address 0x0, load size 20800
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Transfer rate: 28 KB/sec, 6933 bytes/write.
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Note: breakpoint 1 also set at pc 0x34ec.
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Breakpoint 2 at 0x34ec: file ../main.c, line 8.
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Starting program: /storage/Shared/Documents/Projects/ePenguin/e54-GFX-Development-Board/software/Adafruit_Metro_M4_Grand_Central_Firmware/build/metro-m4.elf
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[H[J[3J[36m───[0m [1;33mOutput/messages[0m [36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
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Note: automatically using hardware breakpoints for read-only addresses.
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[36m───[0m [1;33mAssembly[0m [36m────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
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[1;30m~[0m
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[1;30m~[0m
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[1;30m~[0m
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[1;30m~[0m
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[1;30m~[0m
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[0;41m![0m[1;32m0x000034ec[0m[1;32m [0m[1;32m[0m[1;32mmain+0[0m[1;32m push {r3, lr}[0m
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[32m0x000034ee[0m[32m [0m[32m[0m[32mmain+2[0m[32m ldr r3, [pc, #52] ; (0x3524 <main+56>)[0m
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[32m0x000034f0[0m[32m [0m[32m[0m[32mmain+4[0m[32m blx r3[0m
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[1;30m0x000034f2[0m [1;30mmain+6[0m ldr r3, [pc, #52] ; (0x3528 <main+60>)
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[1;30m0x000034f4[0m [1;30mmain+8[0m blx r3
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[36m───[0m [1;33mBreakpoints[0m [36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
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[[1;32m1[0m] [1;32mbreak[0m at [1;32m0x000034ec[0m in [1;32m../main.c[0m:[1;32m8[0m for [1;32mmain[0m hit [1;32m1[0m time
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[[1;32m2[0m] [1;32mbreak[0m at [1;32m0x000034ec[0m in [1;32m../main.c[0m:[1;32m8[0m for [1;32mmain[0m hit [1;32m1[0m time
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[36m───[0m [33mExpressions[0m [36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
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[36m───[0m [33mHistory[0m [36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
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[36m───[0m [33mMemory[0m [36m──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
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[36m───[0m [1;33mRegisters[0m [36m───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
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[1;30mr0[0m [1;32m0x20000078[0m [1;30mr1[0m [1;32m0x00000000[0m [1;30mr2[0m [1;32m0x00f00000[0m [1;30mr3[0m [1;32m0x000034ed[0m [1;30mr4[0m [1;32m0x1ffffffd[0m [1;30mr5[0m [1;32m0x00000017[0m [1;30mr6[0m [1;32m0x20010460[0m [1;30mr7[0m [1;32m0x00000003[0m
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[1;30mr8[0m [1;32m0x00003c39[0m [1;30mr9[0m [1;32m0x00003c47[0m [1;30mr10[0m [m0x00000000[0m [1;30mr11[0m [m0xfffbf5e7[0m [1;30mr12[0m [m0x0000000a[0m [1;30msp[0m [1;32m0x200105d8[0m [1;30mlr[0m [1;32m0x00003f09[0m [1;30mpc[0m [1;32m0x000034ec[0m
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[1;30mxPSR[0m [1;32m0x61000000[0m
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[36m───[0m [1;33mSource[0m [36m──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
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[1;30m~[0m
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[1;30m~[0m
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[1;30m~[0m
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[1;30m 1[0m #include "examples/driver_examples.h"
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[1;30m 2[0m #include <atmel_start.h>
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[1;30m 3[0m #include "sd_mmc_start.h"
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[1;30m 4[0m #include "pdebug.h"
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[1;30m 5[0m int main(void)
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[1;30m 6[0m {
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[1;30m 7[0m /* Initializes MCU, drivers and middleware */
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[0;41m![0m[1;32m 8 atmel_start_init();[0m
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[1;30m 9[0m
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|
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[1;30m10[0m pdebug_init();
|
|
|
|
|
[1;30m11[0m PORT->Group[1].DIR.reg |= (1 << 28);
|
|
|
|
|
[1;30m12[0m PORT->Group[1].OUT.reg |= (1 << 28);
|
|
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|
|
[1;30m13[0m
|
|
|
|
|
[1;30m14[0m PORT->Group[1].OUT.reg &= ~(1 << 28);
|
|
|
|
|
[1;30m15[0m SDMMC_example();
|
|
|
|
|
[1;30m16[0m
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|
[1;30m17[0m
|
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|
|
[36m───[0m [1;33mStack[0m [36m───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
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|
|
|
[[1;32m0[0m] from [1;32m0x000034ec[0m in [1;32mmain[0m+[1;32m0[0m at [1;32m../main.c[0m:[1;32m8[0m
|
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|
|
|
[36m───[0m [1;33mThreads[0m [36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[[1;32m1[0m] id [1;32m0[0m from [1;32m0x000034ec[0m in [1;32mmain[0m+[1;32m0[0m at [1;32m../main.c[0m:[1;32m8[0m
|
|
|
|
|
[36m───[0m [33mVariables[0m [36m───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
[36m─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────[0m
|
|
|
|
|
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|
|
|
|
Breakpoint 1, main () at ../main.c:8
|
|
|
|
|
8 atmel_start_init();
|
|
|
|
|
Detaching from program: /storage/Shared/Documents/Projects/ePenguin/e54-GFX-Development-Board/software/Adafruit_Metro_M4_Grand_Central_Firmware/build/metro-m4.elf, Remote target
|
|
|
|
|
main () at ../main.c:8
|
|
|
|
|
8 atmel_start_init();
|
|
|
|
|
─── Assembly ───────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x000034ec main+0 push {r3, lr}
|
|
|
|
|
0x000034ee main+2 ldr r3, [pc, #52] ; (0x3524 <main+56>)
|
|
|
|
|
0x000034f0 main+4 blx r3
|
|
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|
|
0x000034f2 main+6 ldr r3, [pc, #52] ; (0x3528 <main+60>)
|
|
|
|
|
0x000034f4 main+8 blx r3
|
|
|
|
|
─── Breakpoints ────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Expressions ────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ─────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ──────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x20000078 r1 0x00000000 r2 0x00f00000
|
|
|
|
|
r3 0x000034ed r4 0x1ffffffd r5 0x00000017
|
|
|
|
|
r6 0x20010460 r7 0x00000003 r8 0x00003c39
|
|
|
|
|
r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x0000000a sp 0x200105d8 lr 0x00003f09
|
|
|
|
|
pc 0x000034ec xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x200105d8 psp 0xfffeefec primask 0x00
|
|
|
|
|
basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ─────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
1 #include "examples/driver_examples.h"
|
|
|
|
|
2 #include <atmel_start.h>
|
|
|
|
|
3 #include "sd_mmc_start.h"
|
|
|
|
|
4 #include "pdebug.h"
|
|
|
|
|
5 int main(void)
|
|
|
|
|
6 {
|
|
|
|
|
7 /* Initializes MCU, drivers and middleware */
|
|
|
|
|
8 atmel_start_init();
|
|
|
|
|
9
|
|
|
|
|
10 pdebug_init();
|
|
|
|
|
11 PORT->Group[1].DIR.reg |= (1 << 28);
|
|
|
|
|
12 PORT->Group[1].OUT.reg |= (1 << 28);
|
|
|
|
|
13
|
|
|
|
|
14 PORT->Group[1].OUT.reg &= ~(1 << 28);
|
|
|
|
|
15 SDMMC_example();
|
|
|
|
|
16
|
|
|
|
|
17
|
|
|
|
|
─── Stack ──────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x000034ec in main+0 at ../main.c:8
|
|
|
|
|
─── Threads ────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x000034ec in main+0 at ../main.c:8
|
|
|
|
|
─── Variables ──────────────────────────────────────────────────────────────────
|
|
|
|
|
────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
Loading section .text, size 0x50cc lma 0x0
|
|
|
|
|
Loading section .relocate, size 0x74 lma 0x50cc
|
|
|
|
|
Start address 0x00000000, load size 20800
|
|
|
|
|
Transfer rate: 28 KB/sec, 6933 bytes/write.
|
|
|
|
|
A debugging session is active.
|
|
|
|
|
|
|
|
|
|
Inferior 1 [Remote target] will be detached.
|
|
|
|
|
|
|
|
|
|
Quit anyway? (y or n) [answered Y; input not from terminal]
|
|
|
|
|
[Inferior 1 (Remote target) detached]
|
|
|
|
|
usart_sync_write (io_descr=0x20000584 <USART_DBG>, buf=0x20010408 "spi_m_sync_adtc_start: cmd 00, arg 0x00000000, R1 timeout\r\n", length=<optimized out>) at ../hal/src/hal_usart_sync.c:246
|
|
|
|
|
246 while (!_usart_sync_is_ready_to_send(&descr->device))
|
|
|
|
|
─── Assembly ───────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00002a52 usart_sync_write+42 ldr.w r8, [pc, #68] ; 0x2a98 <usart_sync_write+112>
|
|
|
|
|
0x00002a56 usart_sync_write+46 movs r7, #0
|
|
|
|
|
0x00002a58 usart_sync_write+48 ldrb r1, [r6, r7]
|
|
|
|
|
0x00002a5a usart_sync_write+50 mov r0, r4
|
|
|
|
|
0x00002a5c usart_sync_write+52 blx r8
|
|
|
|
|
0x00002a5e usart_sync_write+54 mov r0, r4
|
|
|
|
|
0x00002a60 usart_sync_write+56 blx r9
|
|
|
|
|
0x00002a62 usart_sync_write+58 cmp r0, #0
|
|
|
|
|
0x00002a64 usart_sync_write+60 beq.n 0x2a5e <usart_sync_write+54>
|
|
|
|
|
0x00002a66 usart_sync_write+62 adds r7, #1
|
|
|
|
|
─── Breakpoints ────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Expressions ────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ─────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ──────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000000 r1 0x0000002c r2 0x000000f1
|
|
|
|
|
r3 0x43000000 r4 0x2000058c r5 0x0000003b
|
|
|
|
|
r6 0x20010408 r7 0x0000002d r8 0x00003c39
|
|
|
|
|
r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x0000000a sp 0x200103e0 lr 0x00002a63
|
|
|
|
|
pc 0x00002a5e xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x200103e0 psp 0xfffeefec primask 0x00
|
|
|
|
|
basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ─────────────────────────────────────────────────────────────────────
|
|
|
|
|
236 static int32_t usart_sync_write(struct io_descriptor *const io_descr, const uint8_t *const buf, const uint16_t length)
|
|
|
|
|
237 {
|
|
|
|
|
238 uint32_t offset = 0;
|
|
|
|
|
239 struct usart_sync_descriptor *descr = CONTAINER_OF(io_descr, struct usart_sync_descriptor, io);
|
|
|
|
|
240
|
|
|
|
|
241 ASSERT(io_descr && buf && length);
|
|
|
|
|
242 while (!_usart_sync_is_ready_to_send(&descr->device))
|
|
|
|
|
243 ;
|
|
|
|
|
244 do {
|
|
|
|
|
245 _usart_sync_write_byte(&descr->device, buf[offset]);
|
|
|
|
|
246 while (!_usart_sync_is_ready_to_send(&descr->device))
|
|
|
|
|
247 ;
|
|
|
|
|
248 } while (++offset < length);
|
|
|
|
|
249 while (!_usart_sync_is_transmit_done(&descr->device))
|
|
|
|
|
250 ;
|
|
|
|
|
251 return (int32_t)offset;
|
|
|
|
|
252 }
|
|
|
|
|
253
|
|
|
|
|
254 /*
|
|
|
|
|
255 * \internal Read data from usart interface
|
|
|
|
|
─── Stack ──────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00002a5e in usart_sync_write+54 at ../hal/src/hal_usart_sync.c:246
|
|
|
|
|
[1] from 0x00003f9a in pprintf+58 at ../shared/util/pdebug.c:32
|
|
|
|
|
[2] from 0x000012aa in spi_m_sync_adtc_start+186 at ../sd_mmc/sd_mmc_spi.c:308
|
|
|
|
|
[3] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[4] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[5] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[6] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[7] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00002a5e in usart_sync_write+54 at ../hal/src/hal_usart_sync.c:246
|
|
|
|
|
─── Variables ──────────────────────────────────────────────────────────────────
|
|
|
|
|
arg io_descr = 0x20000584 <USART_DBG>: {write = 0x2a29 <usart_sync_write>,read = 0x2a9d <usart_sync_read…, buf = 0x20010408 "spi_m_sync_adtc_start: cmd 00, arg 0x00000000, R1 timeout\r\n": 115 's', length = <optimized out>
|
|
|
|
|
loc offset = 45, descr = 0x20000584 <USART_DBG>: {io = {write = 0x2a29 <usart_sync_write>,read = 0x2a9d <usart_syn…
|
|
|
|
|
────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
Loading section .text, size 0x50cc lma 0x0
|
|
|
|
|
Loading section .relocate, size 0x74 lma 0x50cc
|
|
|
|
|
Start address 0x00000000, load size 20800
|
|
|
|
|
Transfer rate: 29 KB/sec, 6933 bytes/write.
|
|
|
|
|
Polling target samd51p20a.cpu failed, trying to reexamine
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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Could not find MEM-AP to control the core
|
|
|
|
|
Examination failed, GDB will be halted. Polling again in 100ms
|
|
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|
|
A debugging session is active.
|
|
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|
|
Inferior 1 [Remote target] will be detached.
|
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|
|
Quit anyway? (y or n) [answered Y; input not from terminal]
|
|
|
|
|
[Inferior 1 (Remote target) detached]
|
|
|
|
|
_usart_sync_is_ready_to_send (device=device@entry=0x2000058c <USART_DBG+8>) at ../hpl/sercom/hpl_sercom.c:427
|
|
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|
|
427 return hri_sercomusart_get_interrupt_DRE_bit(device->hw);
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x00003c46 _usart_sync_is_ready_to_send+0 ldr r3, [r0, #0]
|
|
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|
|
0x00003c48 _usart_sync_is_ready_to_send+2 ldrb r0, [r3, #24]
|
|
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|
|
0x00003c4a _usart_sync_is_ready_to_send+4 and.w r0, r0, #1
|
|
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|
|
0x00003c4e _usart_sync_is_ready_to_send+8 bx lr
|
|
|
|
|
~
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x2000058c r1 0x00000074 r2 0x000000f1 r3 0x43000000 r4 0x2000058c r5 0x00000017
|
|
|
|
|
r6 0x20010460 r7 0x00000001 r8 0x00003c39 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x0000000a sp 0x20010438 lr 0x00002a63 pc 0x00003c46 xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010438 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
417 uint8_t _usart_sync_read_byte(const struct _usart_sync_device *const device)
|
|
|
|
|
418 {
|
|
|
|
|
419 return hri_sercomusart_read_DATA_reg(device->hw);
|
|
|
|
|
420 }
|
|
|
|
|
421
|
|
|
|
|
422 /**
|
|
|
|
|
423 * \brief Check if USART is ready to send next byte
|
|
|
|
|
424 */
|
|
|
|
|
425 bool _usart_sync_is_ready_to_send(const struct _usart_sync_device *const device)
|
|
|
|
|
426 {
|
|
|
|
|
427 return hri_sercomusart_get_interrupt_DRE_bit(device->hw);
|
|
|
|
|
428 }
|
|
|
|
|
429
|
|
|
|
|
430 /**
|
|
|
|
|
431 * \brief Check if USART transmission complete
|
|
|
|
|
432 */
|
|
|
|
|
433 bool _usart_sync_is_transmit_done(const struct _usart_sync_device *const device)
|
|
|
|
|
434 {
|
|
|
|
|
435 return hri_sercomusart_get_interrupt_TXC_bit(device->hw);
|
|
|
|
|
436 }
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00003c46 in _usart_sync_is_ready_to_send+0 at ../hpl/sercom/hpl_sercom.c:427
|
|
|
|
|
[1] from 0x00002a62 in usart_sync_write+58 at ../hal/src/hal_usart_sync.c:246
|
|
|
|
|
[2] from 0x00003f9a in pprintf+58 at ../shared/util/pdebug.c:32
|
|
|
|
|
[3] from 0x00000ab4 in sd_mmc_spi_card_init+20 at ../sd_mmc/sd_mmc.c:356
|
|
|
|
|
[4] from 0x00000ab4 in sd_mmc_check+48 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[5] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[6] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00003c46 in _usart_sync_is_ready_to_send+0 at ../hpl/sercom/hpl_sercom.c:427
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg device = 0x2000058c <USART_DBG+8>: {hw = 0x43000000}
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
Loading section .text, size 0x50cc lma 0x0
|
|
|
|
|
Loading section .relocate, size 0x74 lma 0x50cc
|
|
|
|
|
Start address 0x00000000, load size 20800
|
|
|
|
|
Transfer rate: 29 KB/sec, 6933 bytes/write.
|
|
|
|
|
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Failed to write memory and, additionally, failed to find out where
|
|
|
|
|
Polling target samd51p20a.cpu failed, trying to reexamine
|
|
|
|
|
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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Could not find MEM-AP to control the core
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Examination failed, GDB will be halted. Polling again in 100ms
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Breakpoint 1 at 0x3504: file ../main.c, line 12.
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Note: automatically using hardware breakpoints for read-only addresses.
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Starting program: /storage/Shared/Documents/Projects/ePenguin/e54-GFX-Development-Board/software/Adafruit_Metro_M4_Grand_Central_Firmware/build/metro-m4.elf
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[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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Program stopped.
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Reset_Handler () at ../samd51a/gcc/gcc/startup_samd51.c:638
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638 if (pSrc != pDest) {
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─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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~
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~
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~
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~
|
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~
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|
0x00003ea8 Reset_Handler+0 ldr r1, [pc, #96] ; (0x3f0c <Reset_Handler+100>)
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0x00003eaa Reset_Handler+2 ldr r0, [pc, #100] ; (0x3f10 <Reset_Handler+104>)
|
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0x00003eac Reset_Handler+4 cmp r1, r0
|
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0x00003eae Reset_Handler+6 push {r4, lr}
|
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|
0x00003eb0 Reset_Handler+8 beq.n 0x3ec8 <Reset_Handler+32>
|
|
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|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
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|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12
|
|
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|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
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|
|
r0 0x00000000 r1 0x00000069 r2 0x000000f1 r3 0x43000000 r4 0x2000058c r5 0x00000017
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|
|
r6 0x20010460 r7 0x0000000e r8 0x00003c39 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
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|
|
r12 0x0000000a sp 0x200105e0 lr 0xffffffff pc 0x00003ea8 xPSR 0x01000000 fpscr 0x00000000
|
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|
|
msp 0x200105e0 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
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|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
628 * To initialize the device, and call the main() routine.
|
|
|
|
|
629 */
|
|
|
|
|
630 void Reset_Handler(void)
|
|
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|
|
631 {
|
|
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|
|
632 uint32_t *pSrc, *pDest;
|
|
|
|
|
633
|
|
|
|
|
634 /* Initialize the relocate segment */
|
|
|
|
|
635 pSrc = &_etext;
|
|
|
|
|
636 pDest = &_srelocate;
|
|
|
|
|
637
|
|
|
|
|
638 if (pSrc != pDest) {
|
|
|
|
|
639 for (; pDest < &_erelocate;) {
|
|
|
|
|
640 *pDest++ = *pSrc++;
|
|
|
|
|
641 }
|
|
|
|
|
642 }
|
|
|
|
|
643
|
|
|
|
|
644 /* Clear the zero segment */
|
|
|
|
|
645 for (pDest = &_szero; pDest < &_ezero;) {
|
|
|
|
|
646 *pDest++ = 0;
|
|
|
|
|
647 }
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00003ea8 in Reset_Handler+0 at ../samd51a/gcc/gcc/startup_samd51.c:638
|
|
|
|
|
[1] from 0xfffffffe
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00003ea8 in Reset_Handler+0 at ../samd51a/gcc/gcc/startup_samd51.c:638
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
|
|
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|
|
Breakpoint 1, main () at ../main.c:12
|
|
|
|
|
12 PORT->Group[1].OUT.reg |= (1 << 28);
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x000034f4 main+8 blx r3
|
|
|
|
|
0x000034f6 main+10 ldr r3, [pc, #52] ; (0x352c <main+64>)
|
|
|
|
|
0x000034f8 main+12 ldr.w r2, [r3, #128] ; 0x80
|
|
|
|
|
0x000034fc main+16 orr.w r2, r2, #268435456 ; 0x10000000
|
|
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|
|
0x00003500 main+20 str.w r2, [r3, #128] ; 0x80
|
|
|
|
|
!0x00003504 main+24 ldr.w r2, [r3, #144] ; 0x90
|
|
|
|
|
0x00003508 main+28 orr.w r2, r2, #268435456 ; 0x10000000
|
|
|
|
|
0x0000350c main+32 str.w r2, [r3, #144] ; 0x90
|
|
|
|
|
0x00003510 main+36 ldr.w r2, [r3, #144] ; 0x90
|
|
|
|
|
0x00003514 main+40 bic.w r2, r2, #268435456 ; 0x10000000
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000000 r1 0x0000000a r2 0x1c3c0000 r3 0x41008000 r4 0x1ffffffd r5 0x00000017
|
|
|
|
|
r6 0x20010460 r7 0x0000000e r8 0x00003c39 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x200105d0 lr 0x00003fd9 pc 0x00003504 xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x200105d0 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
2 #include <atmel_start.h>
|
|
|
|
|
3 #include "sd_mmc_start.h"
|
|
|
|
|
4 #include "pdebug.h"
|
|
|
|
|
5 int main(void)
|
|
|
|
|
6 {
|
|
|
|
|
7 /* Initializes MCU, drivers and middleware */
|
|
|
|
|
8 atmel_start_init();
|
|
|
|
|
9
|
|
|
|
|
10 pdebug_init();
|
|
|
|
|
11 PORT->Group[1].DIR.reg |= (1 << 28);
|
|
|
|
|
!12 PORT->Group[1].OUT.reg |= (1 << 28);
|
|
|
|
|
13
|
|
|
|
|
14 PORT->Group[1].OUT.reg &= ~(1 << 28);
|
|
|
|
|
15 SDMMC_example();
|
|
|
|
|
16
|
|
|
|
|
17
|
|
|
|
|
18 /* Replace with your application code */
|
|
|
|
|
19 while (1) {
|
|
|
|
|
20
|
|
|
|
|
21 }
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00003504 in main+24 at ../main.c:12
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00003504 in main+24 at ../main.c:12
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
14 PORT->Group[1].OUT.reg &= ~(1 << 28);
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x000034fc main+16 orr.w r2, r2, #268435456 ; 0x10000000
|
|
|
|
|
0x00003500 main+20 str.w r2, [r3, #128] ; 0x80
|
|
|
|
|
!0x00003504 main+24 ldr.w r2, [r3, #144] ; 0x90
|
|
|
|
|
0x00003508 main+28 orr.w r2, r2, #268435456 ; 0x10000000
|
|
|
|
|
0x0000350c main+32 str.w r2, [r3, #144] ; 0x90
|
|
|
|
|
0x00003510 main+36 ldr.w r2, [r3, #144] ; 0x90
|
|
|
|
|
0x00003514 main+40 bic.w r2, r2, #268435456 ; 0x10000000
|
|
|
|
|
0x00003518 main+44 str.w r2, [r3, #144] ; 0x90
|
|
|
|
|
0x0000351c main+48 ldr r3, [pc, #16] ; (0x3530 <main+68>)
|
|
|
|
|
0x0000351e main+50 blx r3
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000000 r1 0x0000000a r2 0x10000000 r3 0x41008000 r4 0x1ffffffd r5 0x00000017
|
|
|
|
|
r6 0x20010460 r7 0x0000000e r8 0x00003c39 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x200105d0 lr 0x00003fd9 pc 0x00003510 xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x200105d0 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
4 #include "pdebug.h"
|
|
|
|
|
5 int main(void)
|
|
|
|
|
6 {
|
|
|
|
|
7 /* Initializes MCU, drivers and middleware */
|
|
|
|
|
8 atmel_start_init();
|
|
|
|
|
9
|
|
|
|
|
10 pdebug_init();
|
|
|
|
|
11 PORT->Group[1].DIR.reg |= (1 << 28);
|
|
|
|
|
!12 PORT->Group[1].OUT.reg |= (1 << 28);
|
|
|
|
|
13
|
|
|
|
|
14 PORT->Group[1].OUT.reg &= ~(1 << 28);
|
|
|
|
|
15 SDMMC_example();
|
|
|
|
|
16
|
|
|
|
|
17
|
|
|
|
|
18 /* Replace with your application code */
|
|
|
|
|
19 while (1) {
|
|
|
|
|
20
|
|
|
|
|
21 }
|
|
|
|
|
22 }
|
|
|
|
|
~
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00003510 in main+36 at ../main.c:14
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00003510 in main+36 at ../main.c:14
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
15 SDMMC_example();
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00003508 main+28 orr.w r2, r2, #268435456 ; 0x10000000
|
|
|
|
|
0x0000350c main+32 str.w r2, [r3, #144] ; 0x90
|
|
|
|
|
0x00003510 main+36 ldr.w r2, [r3, #144] ; 0x90
|
|
|
|
|
0x00003514 main+40 bic.w r2, r2, #268435456 ; 0x10000000
|
|
|
|
|
0x00003518 main+44 str.w r2, [r3, #144] ; 0x90
|
|
|
|
|
0x0000351c main+48 ldr r3, [pc, #16] ; (0x3530 <main+68>)
|
|
|
|
|
0x0000351e main+50 blx r3
|
|
|
|
|
0x00003520 main+52 b.n 0x3520 <main+52>
|
|
|
|
|
0x00003522 main+54 nop
|
|
|
|
|
0x00003524 main+56 subs r7, #57 ; 0x39
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000000 r1 0x0000000a r2 0x00000000 r3 0x41008000 r4 0x1ffffffd r5 0x00000017
|
|
|
|
|
r6 0x20010460 r7 0x0000000e r8 0x00003c39 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x200105d0 lr 0x00003fd9 pc 0x0000351c xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x200105d0 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
5 int main(void)
|
|
|
|
|
6 {
|
|
|
|
|
7 /* Initializes MCU, drivers and middleware */
|
|
|
|
|
8 atmel_start_init();
|
|
|
|
|
9
|
|
|
|
|
10 pdebug_init();
|
|
|
|
|
11 PORT->Group[1].DIR.reg |= (1 << 28);
|
|
|
|
|
!12 PORT->Group[1].OUT.reg |= (1 << 28);
|
|
|
|
|
13
|
|
|
|
|
14 PORT->Group[1].OUT.reg &= ~(1 << 28);
|
|
|
|
|
15 SDMMC_example();
|
|
|
|
|
16
|
|
|
|
|
17
|
|
|
|
|
18 /* Replace with your application code */
|
|
|
|
|
19 while (1) {
|
|
|
|
|
20
|
|
|
|
|
21 }
|
|
|
|
|
22 }
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000351c in main+48 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000351c in main+48 at ../main.c:15
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
SDMMC_example () at ../sd_mmc_start.c:33
|
|
|
|
|
33 while (SD_MMC_OK != sd_mmc_check(0)) {
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x000007bc SDMMC_example+0 push {r4, r5, r6, lr}
|
|
|
|
|
0x000007be SDMMC_example+2 ldr r5, [pc, #48] ; (0x7f0 <SDMMC_example+52>)
|
|
|
|
|
0x000007c0 SDMMC_example+4 movs r0, #0
|
|
|
|
|
0x000007c2 SDMMC_example+6 blx r5
|
|
|
|
|
0x000007c4 SDMMC_example+8 mov r4, r0
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000000 r1 0x0000000a r2 0x00000000 r3 0x000007bd r4 0x1ffffffd r5 0x00000017
|
|
|
|
|
r6 0x20010460 r7 0x0000000e r8 0x00003c39 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x200105d0 lr 0x00003521 pc 0x000007bc xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x200105d0 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
23 {-1, CONF_SD_MMC_0_WP_DETECT_VALUE},
|
|
|
|
|
24 };
|
|
|
|
|
25
|
|
|
|
|
26 static uint8_t sd_mmc_block[512];
|
|
|
|
|
27
|
|
|
|
|
28 /*
|
|
|
|
|
29 * Example
|
|
|
|
|
30 */
|
|
|
|
|
31 void SDMMC_example(void)
|
|
|
|
|
32 {
|
|
|
|
|
33 while (SD_MMC_OK != sd_mmc_check(0)) {
|
|
|
|
|
34 /* Wait card ready. */
|
|
|
|
|
35 }
|
|
|
|
|
36 if (sd_mmc_get_type(0) & (CARD_TYPE_SD | CARD_TYPE_MMC)) {
|
|
|
|
|
37 /* Read card block 0 */
|
|
|
|
|
38 sd_mmc_init_read_blocks(0, 0, 1);
|
|
|
|
|
39 sd_mmc_start_read_blocks(sd_mmc_block, 1);
|
|
|
|
|
40 sd_mmc_wait_end_of_read_blocks(false);
|
|
|
|
|
41 }
|
|
|
|
|
42 #if (CONF_SDIO_SUPPORT == 1)
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x000007bc in SDMMC_example+0 at ../sd_mmc_start.c:33
|
|
|
|
|
[1] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x000007bc in SDMMC_example+0 at ../sd_mmc_start.c:33
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
sd_mmc_check (slot=slot@entry=0 '\000') at ../sd_mmc/sd_mmc.c:1616
|
|
|
|
|
1616 sd_mmc_err = sd_mmc_select_slot(slot);
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x00000a84 sd_mmc_check+0 stmdb sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr}
|
|
|
|
|
0x00000a88 sd_mmc_check+4 ldr r3, [pc, #572] ; (0xcc8 <sd_mmc_check+580>)
|
|
|
|
|
0x00000a8a sd_mmc_check+6 sub sp, #28
|
|
|
|
|
0x00000a8c sd_mmc_check+8 blx r3
|
|
|
|
|
0x00000a8e sd_mmc_check+10 cmp r0, #1
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000000 r1 0x0000000a r2 0x00000000 r3 0x000007bd r4 0x1ffffffd r5 0x00000a85
|
|
|
|
|
r6 0x20010460 r7 0x0000000e r8 0x00003c39 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x200105c0 lr 0x000007c5 pc 0x00000a84 xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x200105c0 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1606
|
|
|
|
|
1607 uint8_t sd_mmc_nb_slot(void)
|
|
|
|
|
1608 {
|
|
|
|
|
1609 return CONF_SD_MMC_MEM_CNT;
|
|
|
|
|
1610 }
|
|
|
|
|
1611
|
|
|
|
|
1612 sd_mmc_err_t sd_mmc_check(uint8_t slot)
|
|
|
|
|
1613 {
|
|
|
|
|
1614 sd_mmc_err_t sd_mmc_err;
|
|
|
|
|
1615
|
|
|
|
|
1616 sd_mmc_err = sd_mmc_select_slot(slot);
|
|
|
|
|
1617 if (sd_mmc_err != SD_MMC_INIT_ONGOING) {
|
|
|
|
|
1618 sd_mmc_deselect_slot();
|
|
|
|
|
1619 return sd_mmc_err;
|
|
|
|
|
1620 }
|
|
|
|
|
1621
|
|
|
|
|
1622 // SPI MODE
|
|
|
|
|
1623 /*
|
|
|
|
|
1624 // Initialization of the card requested
|
|
|
|
|
1625 if (sd_mmc_mci_card_init()) {
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00000a84 in sd_mmc_check+0 at ../sd_mmc/sd_mmc.c:1616
|
|
|
|
|
[1] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[2] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00000a84 in sd_mmc_check+0 at ../sd_mmc/sd_mmc.c:1616
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg slot = 0 '\000'
|
|
|
|
|
loc sd_mmc_err = <optimized out>
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
sd_mmc_select_slot (slot=0 '\000') at ../sd_mmc/sd_mmc.c:1276
|
|
|
|
|
1276 if (slot >= CONF_SD_MMC_MEM_CNT) {
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x0000090c sd_mmc_select_slot+0 push {r3, r4, r5, lr}
|
|
|
|
|
0x0000090e sd_mmc_select_slot+2 cmp r0, #0
|
|
|
|
|
0x00000910 sd_mmc_select_slot+4 bne.n 0x99a <sd_mmc_select_slot+142>
|
|
|
|
|
0x00000912 sd_mmc_select_slot+6 ldr r4, [pc, #140] ; (0x9a0 <sd_mmc_select_slot+148>)
|
|
|
|
|
0x00000914 sd_mmc_select_slot+8 ldr r3, [r4, #12]
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000000 r1 0x0000000a r2 0x00000000 r3 0x0000090d r4 0x1ffffffd r5 0x00000a85
|
|
|
|
|
r6 0x20010460 r7 0x0000000e r8 0x00003c39 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010580 lr 0x00000a8f pc 0x0000090c xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010580 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1266 * \param slot Card slot number
|
|
|
|
|
1267 *
|
|
|
|
|
1268 * \retval SD_MMC_ERR_SLOT Wrong slot number
|
|
|
|
|
1269 * \retval SD_MMC_ERR_NO_CARD No card present on slot
|
|
|
|
|
1270 * \retval SD_MMC_ERR_UNUSABLE Unusable card
|
|
|
|
|
1271 * \retval SD_MMC_INIT_ONGOING Card initialization requested
|
|
|
|
|
1272 * \retval SD_MMC_OK Card present
|
|
|
|
|
1273 */
|
|
|
|
|
1274 static sd_mmc_err_t sd_mmc_select_slot(uint8_t slot)
|
|
|
|
|
1275 {
|
|
|
|
|
1276 if (slot >= CONF_SD_MMC_MEM_CNT) {
|
|
|
|
|
1277 return SD_MMC_ERR_SLOT;
|
|
|
|
|
1278 }
|
|
|
|
|
1279
|
|
|
|
|
1280 if (_cd && _cd[slot].pin != -1) {
|
|
|
|
|
1281 /** Card Detect pins */
|
|
|
|
|
1282 if (gpio_get_pin_level(_cd[slot].pin) != _cd[slot].val) {
|
|
|
|
|
1283 if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_DEBOUNCE) {
|
|
|
|
|
1284 SD_MMC_STOP_TIMEOUT();
|
|
|
|
|
1285 }
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000090c in sd_mmc_select_slot+0 at ../sd_mmc/sd_mmc.c:1276
|
|
|
|
|
[1] from 0x00000a8e in sd_mmc_check+10 at ../sd_mmc/sd_mmc.c:1616
|
|
|
|
|
[2] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[3] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000090c in sd_mmc_select_slot+0 at ../sd_mmc/sd_mmc.c:1276
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg slot = 0 '\000'
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1280 if (_cd && _cd[slot].pin != -1) {
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x0000090c sd_mmc_select_slot+0 push {r3, r4, r5, lr}
|
|
|
|
|
0x0000090e sd_mmc_select_slot+2 cmp r0, #0
|
|
|
|
|
0x00000910 sd_mmc_select_slot+4 bne.n 0x99a <sd_mmc_select_slot+142>
|
|
|
|
|
0x00000912 sd_mmc_select_slot+6 ldr r4, [pc, #140] ; (0x9a0 <sd_mmc_select_slot+148>)
|
|
|
|
|
0x00000914 sd_mmc_select_slot+8 ldr r3, [r4, #12]
|
|
|
|
|
0x00000916 sd_mmc_select_slot+10 cmp r3, #0
|
|
|
|
|
0x00000918 sd_mmc_select_slot+12 beq.n 0x98c <sd_mmc_select_slot+128>
|
|
|
|
|
0x0000091a sd_mmc_select_slot+14 ldrsh.w r0, [r3]
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000000 r1 0x0000000a r2 0x00000000 r3 0x0000090d r4 0x1ffffffd r5 0x00000a85
|
|
|
|
|
r6 0x20010460 r7 0x0000000e r8 0x00003c39 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010570 lr 0x00000a8f pc 0x00000912 xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010570 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1270 * \retval SD_MMC_ERR_UNUSABLE Unusable card
|
|
|
|
|
1271 * \retval SD_MMC_INIT_ONGOING Card initialization requested
|
|
|
|
|
1272 * \retval SD_MMC_OK Card present
|
|
|
|
|
1273 */
|
|
|
|
|
1274 static sd_mmc_err_t sd_mmc_select_slot(uint8_t slot)
|
|
|
|
|
1275 {
|
|
|
|
|
1276 if (slot >= CONF_SD_MMC_MEM_CNT) {
|
|
|
|
|
1277 return SD_MMC_ERR_SLOT;
|
|
|
|
|
1278 }
|
|
|
|
|
1279
|
|
|
|
|
1280 if (_cd && _cd[slot].pin != -1) {
|
|
|
|
|
1281 /** Card Detect pins */
|
|
|
|
|
1282 if (gpio_get_pin_level(_cd[slot].pin) != _cd[slot].val) {
|
|
|
|
|
1283 if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_DEBOUNCE) {
|
|
|
|
|
1284 SD_MMC_STOP_TIMEOUT();
|
|
|
|
|
1285 }
|
|
|
|
|
1286 sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_NO_CARD;
|
|
|
|
|
1287 return SD_MMC_ERR_NO_CARD;
|
|
|
|
|
1288 }
|
|
|
|
|
1289 if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_NO_CARD) {
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00000912 in sd_mmc_select_slot+6 at ../sd_mmc/sd_mmc.c:1280
|
|
|
|
|
[1] from 0x00000a8e in sd_mmc_check+10 at ../sd_mmc/sd_mmc.c:1616
|
|
|
|
|
[2] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[3] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00000912 in sd_mmc_select_slot+6 at ../sd_mmc/sd_mmc.c:1280
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg slot = 0 '\000'
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1313 if ((sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_NO_CARD)
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00000982 sd_mmc_select_slot+118 adcs r0, r3
|
|
|
|
|
0x00000984 sd_mmc_select_slot+120 b.n 0x936 <sd_mmc_select_slot+42>
|
|
|
|
|
0x00000986 sd_mmc_select_slot+122 cmp r0, #3
|
|
|
|
|
0x00000988 sd_mmc_select_slot+124 bne.n 0x958 <sd_mmc_select_slot+76>
|
|
|
|
|
0x0000098a sd_mmc_select_slot+126 b.n 0x936 <sd_mmc_select_slot+42>
|
|
|
|
|
0x0000098c sd_mmc_select_slot+128 ldrb r3, [r4, #26]
|
|
|
|
|
0x0000098e sd_mmc_select_slot+130 subs r3, #3
|
|
|
|
|
0x00000990 sd_mmc_select_slot+132 cmp r3, #1
|
|
|
|
|
0x00000992 sd_mmc_select_slot+134 bhi.n 0x958 <sd_mmc_select_slot+76>
|
|
|
|
|
0x00000994 sd_mmc_select_slot+136 b.n 0x946 <sd_mmc_select_slot+58>
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0xffffffff r1 0x0000000a r2 0x00000000 r3 0x2000000c r4 0x20000298 r5 0x00000a85
|
|
|
|
|
r6 0x20010460 r7 0x0000000e r8 0x00003c39 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010570 lr 0x00000a8f pc 0x0000098c xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010570 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1303 /* Set 1-bit bus width and low clock for initialization */
|
|
|
|
|
1304 sd_mmc_cards[slot].clock = SDMMC_CLOCK_INIT;
|
|
|
|
|
1305 sd_mmc_cards[slot].bus_width = 1;
|
|
|
|
|
1306 sd_mmc_cards[slot].high_speed = 0;
|
|
|
|
|
1307 }
|
|
|
|
|
1308 if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_UNUSABLE) {
|
|
|
|
|
1309 return SD_MMC_ERR_UNUSABLE;
|
|
|
|
|
1310 }
|
|
|
|
|
1311 } else {
|
|
|
|
|
1312 /* No pin card detection, then always try to install it */
|
|
|
|
|
1313 if ((sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_NO_CARD)
|
|
|
|
|
1314 || (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_UNUSABLE)) {
|
|
|
|
|
1315 /* Card is not initialized */
|
|
|
|
|
1316 sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_INIT;
|
|
|
|
|
1317 /* Set 1-bit bus width and low clock for initialization */
|
|
|
|
|
1318 sd_mmc_cards[slot].clock = SDMMC_CLOCK_INIT;
|
|
|
|
|
1319 sd_mmc_cards[slot].bus_width = 1;
|
|
|
|
|
1320 sd_mmc_cards[slot].high_speed = 0;
|
|
|
|
|
1321 }
|
|
|
|
|
1322 }
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000098c in sd_mmc_select_slot+128 at ../sd_mmc/sd_mmc.c:1313
|
|
|
|
|
[1] from 0x00000a8e in sd_mmc_check+10 at ../sd_mmc/sd_mmc.c:1616
|
|
|
|
|
[2] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[3] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000098c in sd_mmc_select_slot+128 at ../sd_mmc/sd_mmc.c:1313
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg slot = <optimized out>
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1302 sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_INIT;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x0000093c sd_mmc_select_slot+48 bne.n 0x942 <sd_mmc_select_slot+54>
|
|
|
|
|
0x0000093e sd_mmc_select_slot+50 movs r3, #1
|
|
|
|
|
0x00000940 sd_mmc_select_slot+52 b.n 0x932 <sd_mmc_select_slot+38>
|
|
|
|
|
0x00000942 sd_mmc_select_slot+54 cmp r0, #1
|
|
|
|
|
0x00000944 sd_mmc_select_slot+56 bne.n 0x986 <sd_mmc_select_slot+122>
|
|
|
|
|
0x00000946 sd_mmc_select_slot+58 movs r3, #2
|
|
|
|
|
0x00000948 sd_mmc_select_slot+60 strb r3, [r4, #26]
|
|
|
|
|
0x0000094a sd_mmc_select_slot+62 ldr r3, [pc, #92] ; (0x9a8 <sd_mmc_select_slot+156>)
|
|
|
|
|
0x0000094c sd_mmc_select_slot+64 str r3, [r4, #16]
|
|
|
|
|
0x0000094e sd_mmc_select_slot+66 movs r3, #1
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0xffffffff r1 0x0000000a r2 0x00000000 r3 0x00000001 r4 0x20000298 r5 0x00000a85
|
|
|
|
|
r6 0x20010460 r7 0x0000000e r8 0x00003c39 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010570 lr 0x00000a8f pc 0x00000946 xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010570 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1292 /* Debounce + Power On Setup */
|
|
|
|
|
1293 SD_MMC_START_TIMEOUT();
|
|
|
|
|
1294 return SD_MMC_ERR_NO_CARD;
|
|
|
|
|
1295 }
|
|
|
|
|
1296 if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_DEBOUNCE) {
|
|
|
|
|
1297 if (!SD_MMC_IS_TIMEOUT()) {
|
|
|
|
|
1298 /* Debounce on going */
|
|
|
|
|
1299 return SD_MMC_ERR_NO_CARD;
|
|
|
|
|
1300 }
|
|
|
|
|
1301 /* Card is not initialized */
|
|
|
|
|
1302 sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_INIT;
|
|
|
|
|
1303 /* Set 1-bit bus width and low clock for initialization */
|
|
|
|
|
1304 sd_mmc_cards[slot].clock = SDMMC_CLOCK_INIT;
|
|
|
|
|
1305 sd_mmc_cards[slot].bus_width = 1;
|
|
|
|
|
1306 sd_mmc_cards[slot].high_speed = 0;
|
|
|
|
|
1307 }
|
|
|
|
|
1308 if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_UNUSABLE) {
|
|
|
|
|
1309 return SD_MMC_ERR_UNUSABLE;
|
|
|
|
|
1310 }
|
|
|
|
|
1311 } else {
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00000946 in sd_mmc_select_slot+58 at ../sd_mmc/sd_mmc.c:1302
|
|
|
|
|
[1] from 0x00000a8e in sd_mmc_check+10 at ../sd_mmc/sd_mmc.c:1616
|
|
|
|
|
[2] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[3] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00000946 in sd_mmc_select_slot+58 at ../sd_mmc/sd_mmc.c:1302
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg slot = <optimized out>
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1304 sd_mmc_cards[slot].clock = SDMMC_CLOCK_INIT;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00000940 sd_mmc_select_slot+52 b.n 0x932 <sd_mmc_select_slot+38>
|
|
|
|
|
0x00000942 sd_mmc_select_slot+54 cmp r0, #1
|
|
|
|
|
0x00000944 sd_mmc_select_slot+56 bne.n 0x986 <sd_mmc_select_slot+122>
|
|
|
|
|
0x00000946 sd_mmc_select_slot+58 movs r3, #2
|
|
|
|
|
0x00000948 sd_mmc_select_slot+60 strb r3, [r4, #26]
|
|
|
|
|
0x0000094a sd_mmc_select_slot+62 ldr r3, [pc, #92] ; (0x9a8 <sd_mmc_select_slot+156>)
|
|
|
|
|
0x0000094c sd_mmc_select_slot+64 str r3, [r4, #16]
|
|
|
|
|
0x0000094e sd_mmc_select_slot+66 movs r3, #1
|
|
|
|
|
0x00000950 sd_mmc_select_slot+68 strb r3, [r4, #29]
|
|
|
|
|
0x00000952 sd_mmc_select_slot+70 movs r3, #0
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0xffffffff r1 0x0000000a r2 0x00000000 r3 0x00000002 r4 0x20000298 r5 0x00000a85
|
|
|
|
|
r6 0x20010460 r7 0x0000000e r8 0x00003c39 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010570 lr 0x00000a8f pc 0x0000094a xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010570 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1294 return SD_MMC_ERR_NO_CARD;
|
|
|
|
|
1295 }
|
|
|
|
|
1296 if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_DEBOUNCE) {
|
|
|
|
|
1297 if (!SD_MMC_IS_TIMEOUT()) {
|
|
|
|
|
1298 /* Debounce on going */
|
|
|
|
|
1299 return SD_MMC_ERR_NO_CARD;
|
|
|
|
|
1300 }
|
|
|
|
|
1301 /* Card is not initialized */
|
|
|
|
|
1302 sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_INIT;
|
|
|
|
|
1303 /* Set 1-bit bus width and low clock for initialization */
|
|
|
|
|
1304 sd_mmc_cards[slot].clock = SDMMC_CLOCK_INIT;
|
|
|
|
|
1305 sd_mmc_cards[slot].bus_width = 1;
|
|
|
|
|
1306 sd_mmc_cards[slot].high_speed = 0;
|
|
|
|
|
1307 }
|
|
|
|
|
1308 if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_UNUSABLE) {
|
|
|
|
|
1309 return SD_MMC_ERR_UNUSABLE;
|
|
|
|
|
1310 }
|
|
|
|
|
1311 } else {
|
|
|
|
|
1312 /* No pin card detection, then always try to install it */
|
|
|
|
|
1313 if ((sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_NO_CARD)
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000094a in sd_mmc_select_slot+62 at ../sd_mmc/sd_mmc.c:1304
|
|
|
|
|
[1] from 0x00000a8e in sd_mmc_check+10 at ../sd_mmc/sd_mmc.c:1616
|
|
|
|
|
[2] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[3] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000094a in sd_mmc_select_slot+62 at ../sd_mmc/sd_mmc.c:1304
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg slot = <optimized out>
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1305 sd_mmc_cards[slot].bus_width = 1;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00000944 sd_mmc_select_slot+56 bne.n 0x986 <sd_mmc_select_slot+122>
|
|
|
|
|
0x00000946 sd_mmc_select_slot+58 movs r3, #2
|
|
|
|
|
0x00000948 sd_mmc_select_slot+60 strb r3, [r4, #26]
|
|
|
|
|
0x0000094a sd_mmc_select_slot+62 ldr r3, [pc, #92] ; (0x9a8 <sd_mmc_select_slot+156>)
|
|
|
|
|
0x0000094c sd_mmc_select_slot+64 str r3, [r4, #16]
|
|
|
|
|
0x0000094e sd_mmc_select_slot+66 movs r3, #1
|
|
|
|
|
0x00000950 sd_mmc_select_slot+68 strb r3, [r4, #29]
|
|
|
|
|
0x00000952 sd_mmc_select_slot+70 movs r3, #0
|
|
|
|
|
0x00000954 sd_mmc_select_slot+72 strb.w r3, [r4, #46] ; 0x2e
|
|
|
|
|
0x00000958 sd_mmc_select_slot+76 ldrb r3, [r4, #4]
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0xffffffff r1 0x0000000a r2 0x00000000 r3 0x00061a80 r4 0x20000298 r5 0x00000a85
|
|
|
|
|
r6 0x20010460 r7 0x0000000e r8 0x00003c39 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010570 lr 0x00000a8f pc 0x0000094e xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010570 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1295 }
|
|
|
|
|
1296 if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_DEBOUNCE) {
|
|
|
|
|
1297 if (!SD_MMC_IS_TIMEOUT()) {
|
|
|
|
|
1298 /* Debounce on going */
|
|
|
|
|
1299 return SD_MMC_ERR_NO_CARD;
|
|
|
|
|
1300 }
|
|
|
|
|
1301 /* Card is not initialized */
|
|
|
|
|
1302 sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_INIT;
|
|
|
|
|
1303 /* Set 1-bit bus width and low clock for initialization */
|
|
|
|
|
1304 sd_mmc_cards[slot].clock = SDMMC_CLOCK_INIT;
|
|
|
|
|
1305 sd_mmc_cards[slot].bus_width = 1;
|
|
|
|
|
1306 sd_mmc_cards[slot].high_speed = 0;
|
|
|
|
|
1307 }
|
|
|
|
|
1308 if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_UNUSABLE) {
|
|
|
|
|
1309 return SD_MMC_ERR_UNUSABLE;
|
|
|
|
|
1310 }
|
|
|
|
|
1311 } else {
|
|
|
|
|
1312 /* No pin card detection, then always try to install it */
|
|
|
|
|
1313 if ((sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_NO_CARD)
|
|
|
|
|
1314 || (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_UNUSABLE)) {
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000094e in sd_mmc_select_slot+66 at ../sd_mmc/sd_mmc.c:1305
|
|
|
|
|
[1] from 0x00000a8e in sd_mmc_check+10 at ../sd_mmc/sd_mmc.c:1616
|
|
|
|
|
[2] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[3] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000094e in sd_mmc_select_slot+66 at ../sd_mmc/sd_mmc.c:1305
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg slot = <optimized out>
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1306 sd_mmc_cards[slot].high_speed = 0;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00000948 sd_mmc_select_slot+60 strb r3, [r4, #26]
|
|
|
|
|
0x0000094a sd_mmc_select_slot+62 ldr r3, [pc, #92] ; (0x9a8 <sd_mmc_select_slot+156>)
|
|
|
|
|
0x0000094c sd_mmc_select_slot+64 str r3, [r4, #16]
|
|
|
|
|
0x0000094e sd_mmc_select_slot+66 movs r3, #1
|
|
|
|
|
0x00000950 sd_mmc_select_slot+68 strb r3, [r4, #29]
|
|
|
|
|
0x00000952 sd_mmc_select_slot+70 movs r3, #0
|
|
|
|
|
0x00000954 sd_mmc_select_slot+72 strb.w r3, [r4, #46] ; 0x2e
|
|
|
|
|
0x00000958 sd_mmc_select_slot+76 ldrb r3, [r4, #4]
|
|
|
|
|
0x0000095a sd_mmc_select_slot+78 cbz r3, 0x996 <sd_mmc_select_slot+138>
|
|
|
|
|
0x0000095c sd_mmc_select_slot+80 ldrh r0, [r4, #48] ; 0x30
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0xffffffff r1 0x0000000a r2 0x00000000 r3 0x00000001 r4 0x20000298 r5 0x00000a85
|
|
|
|
|
r6 0x20010460 r7 0x0000000e r8 0x00003c39 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010570 lr 0x00000a8f pc 0x00000952 xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010570 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1296 if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_DEBOUNCE) {
|
|
|
|
|
1297 if (!SD_MMC_IS_TIMEOUT()) {
|
|
|
|
|
1298 /* Debounce on going */
|
|
|
|
|
1299 return SD_MMC_ERR_NO_CARD;
|
|
|
|
|
1300 }
|
|
|
|
|
1301 /* Card is not initialized */
|
|
|
|
|
1302 sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_INIT;
|
|
|
|
|
1303 /* Set 1-bit bus width and low clock for initialization */
|
|
|
|
|
1304 sd_mmc_cards[slot].clock = SDMMC_CLOCK_INIT;
|
|
|
|
|
1305 sd_mmc_cards[slot].bus_width = 1;
|
|
|
|
|
1306 sd_mmc_cards[slot].high_speed = 0;
|
|
|
|
|
1307 }
|
|
|
|
|
1308 if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_UNUSABLE) {
|
|
|
|
|
1309 return SD_MMC_ERR_UNUSABLE;
|
|
|
|
|
1310 }
|
|
|
|
|
1311 } else {
|
|
|
|
|
1312 /* No pin card detection, then always try to install it */
|
|
|
|
|
1313 if ((sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_NO_CARD)
|
|
|
|
|
1314 || (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_UNUSABLE)) {
|
|
|
|
|
1315 /* Card is not initialized */
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00000952 in sd_mmc_select_slot+70 at ../sd_mmc/sd_mmc.c:1306
|
|
|
|
|
[1] from 0x00000a8e in sd_mmc_check+10 at ../sd_mmc/sd_mmc.c:1616
|
|
|
|
|
[2] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[3] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00000952 in sd_mmc_select_slot+70 at ../sd_mmc/sd_mmc.c:1306
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg slot = <optimized out>
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1324 assert(!(sd_mmc_slot_sel != slot && sd_mmc_nb_block_remaining != 0), ">>>");
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x0000094c sd_mmc_select_slot+64 str r3, [r4, #16]
|
|
|
|
|
0x0000094e sd_mmc_select_slot+66 movs r3, #1
|
|
|
|
|
0x00000950 sd_mmc_select_slot+68 strb r3, [r4, #29]
|
|
|
|
|
0x00000952 sd_mmc_select_slot+70 movs r3, #0
|
|
|
|
|
0x00000954 sd_mmc_select_slot+72 strb.w r3, [r4, #46] ; 0x2e
|
|
|
|
|
0x00000958 sd_mmc_select_slot+76 ldrb r3, [r4, #4]
|
|
|
|
|
0x0000095a sd_mmc_select_slot+78 cbz r3, 0x996 <sd_mmc_select_slot+138>
|
|
|
|
|
0x0000095c sd_mmc_select_slot+80 ldrh r0, [r4, #48] ; 0x30
|
|
|
|
|
0x0000095e sd_mmc_select_slot+82 clz r0, r0
|
|
|
|
|
0x00000962 sd_mmc_select_slot+86 lsrs r0, r0, #5
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0xffffffff r1 0x0000000a r2 0x00000000 r3 0x00000000 r4 0x20000298 r5 0x00000a85
|
|
|
|
|
r6 0x20010460 r7 0x0000000e r8 0x00003c39 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010570 lr 0x00000a8f pc 0x00000958 xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010570 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1314 || (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_UNUSABLE)) {
|
|
|
|
|
1315 /* Card is not initialized */
|
|
|
|
|
1316 sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_INIT;
|
|
|
|
|
1317 /* Set 1-bit bus width and low clock for initialization */
|
|
|
|
|
1318 sd_mmc_cards[slot].clock = SDMMC_CLOCK_INIT;
|
|
|
|
|
1319 sd_mmc_cards[slot].bus_width = 1;
|
|
|
|
|
1320 sd_mmc_cards[slot].high_speed = 0;
|
|
|
|
|
1321 }
|
|
|
|
|
1322 }
|
|
|
|
|
1323
|
|
|
|
|
1324 assert(!(sd_mmc_slot_sel != slot && sd_mmc_nb_block_remaining != 0), ">>>");
|
|
|
|
|
1325
|
|
|
|
|
1326 /* Initialize interface */
|
|
|
|
|
1327 sd_mmc_slot_sel = slot;
|
|
|
|
|
1328 sd_mmc_card = &sd_mmc_cards[slot];
|
|
|
|
|
1329 sd_mmc_configure_slot();
|
|
|
|
|
1330 return (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_INIT) ? SD_MMC_INIT_ONGOING : SD_MMC_OK;
|
|
|
|
|
1331 }
|
|
|
|
|
1332
|
|
|
|
|
1333 /**
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00000958 in sd_mmc_select_slot+76 at ../sd_mmc/sd_mmc.c:1324
|
|
|
|
|
[1] from 0x00000a8e in sd_mmc_check+10 at ../sd_mmc/sd_mmc.c:1616
|
|
|
|
|
[2] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[3] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00000958 in sd_mmc_select_slot+76 at ../sd_mmc/sd_mmc.c:1324
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg slot = <optimized out>
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1327 sd_mmc_slot_sel = slot;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00000964 sd_mmc_select_slot+88 ldr r2, [pc, #68] ; (0x9ac <sd_mmc_select_slot+160>)
|
|
|
|
|
0x00000966 sd_mmc_select_slot+90 ldr r1, [pc, #72] ; (0x9b0 <sd_mmc_select_slot+164>)
|
|
|
|
|
0x00000968 sd_mmc_select_slot+92 ldr r5, [pc, #72] ; (0x9b4 <sd_mmc_select_slot+168>)
|
|
|
|
|
0x0000096a sd_mmc_select_slot+94 movw r3, #1324 ; 0x52c
|
|
|
|
|
0x0000096e sd_mmc_select_slot+98 blx r5
|
|
|
|
|
0x00000970 sd_mmc_select_slot+100 movs r3, #0
|
|
|
|
|
0x00000972 sd_mmc_select_slot+102 strb r3, [r4, #4]
|
|
|
|
|
0x00000974 sd_mmc_select_slot+104 ldr r3, [pc, #64] ; (0x9b8 <sd_mmc_select_slot+172>)
|
|
|
|
|
0x00000976 sd_mmc_select_slot+106 str r3, [r4, #0]
|
|
|
|
|
0x00000978 sd_mmc_select_slot+108 ldr r3, [pc, #64] ; (0x9bc <sd_mmc_select_slot+176>)
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x0000052c r2 0x000049b9 r3 0x0000052c r4 0x20000298 r5 0x00003ff5
|
|
|
|
|
r6 0x20010460 r7 0x0000000e r8 0x00003c39 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010570 lr 0x00000971 pc 0x00000970 xPSR 0x01000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010570 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1317 /* Set 1-bit bus width and low clock for initialization */
|
|
|
|
|
1318 sd_mmc_cards[slot].clock = SDMMC_CLOCK_INIT;
|
|
|
|
|
1319 sd_mmc_cards[slot].bus_width = 1;
|
|
|
|
|
1320 sd_mmc_cards[slot].high_speed = 0;
|
|
|
|
|
1321 }
|
|
|
|
|
1322 }
|
|
|
|
|
1323
|
|
|
|
|
1324 assert(!(sd_mmc_slot_sel != slot && sd_mmc_nb_block_remaining != 0), ">>>");
|
|
|
|
|
1325
|
|
|
|
|
1326 /* Initialize interface */
|
|
|
|
|
1327 sd_mmc_slot_sel = slot;
|
|
|
|
|
1328 sd_mmc_card = &sd_mmc_cards[slot];
|
|
|
|
|
1329 sd_mmc_configure_slot();
|
|
|
|
|
1330 return (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_INIT) ? SD_MMC_INIT_ONGOING : SD_MMC_OK;
|
|
|
|
|
1331 }
|
|
|
|
|
1332
|
|
|
|
|
1333 /**
|
|
|
|
|
1334 * \brief Configures the driver with the selected card configuration
|
|
|
|
|
1335 */
|
|
|
|
|
1336 static void sd_mmc_configure_slot(void)
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00000970 in sd_mmc_select_slot+100 at ../sd_mmc/sd_mmc.c:1327
|
|
|
|
|
[1] from 0x00000a8e in sd_mmc_check+10 at ../sd_mmc/sd_mmc.c:1616
|
|
|
|
|
[2] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[3] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00000970 in sd_mmc_select_slot+100 at ../sd_mmc/sd_mmc.c:1327
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg slot = <optimized out>
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1328 sd_mmc_card = &sd_mmc_cards[slot];
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00000968 sd_mmc_select_slot+92 ldr r5, [pc, #72] ; (0x9b4 <sd_mmc_select_slot+168>)
|
|
|
|
|
0x0000096a sd_mmc_select_slot+94 movw r3, #1324 ; 0x52c
|
|
|
|
|
0x0000096e sd_mmc_select_slot+98 blx r5
|
|
|
|
|
0x00000970 sd_mmc_select_slot+100 movs r3, #0
|
|
|
|
|
0x00000972 sd_mmc_select_slot+102 strb r3, [r4, #4]
|
|
|
|
|
0x00000974 sd_mmc_select_slot+104 ldr r3, [pc, #64] ; (0x9b8 <sd_mmc_select_slot+172>)
|
|
|
|
|
0x00000976 sd_mmc_select_slot+106 str r3, [r4, #0]
|
|
|
|
|
0x00000978 sd_mmc_select_slot+108 ldr r3, [pc, #64] ; (0x9bc <sd_mmc_select_slot+176>)
|
|
|
|
|
0x0000097a sd_mmc_select_slot+110 blx r3
|
|
|
|
|
0x0000097c sd_mmc_select_slot+112 ldrb r0, [r4, #26]
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x0000052c r2 0x000049b9 r3 0x00000000 r4 0x20000298 r5 0x00003ff5
|
|
|
|
|
r6 0x20010460 r7 0x0000000e r8 0x00003c39 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010570 lr 0x00000971 pc 0x00000974 xPSR 0x41000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010570 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1318 sd_mmc_cards[slot].clock = SDMMC_CLOCK_INIT;
|
|
|
|
|
1319 sd_mmc_cards[slot].bus_width = 1;
|
|
|
|
|
1320 sd_mmc_cards[slot].high_speed = 0;
|
|
|
|
|
1321 }
|
|
|
|
|
1322 }
|
|
|
|
|
1323
|
|
|
|
|
1324 assert(!(sd_mmc_slot_sel != slot && sd_mmc_nb_block_remaining != 0), ">>>");
|
|
|
|
|
1325
|
|
|
|
|
1326 /* Initialize interface */
|
|
|
|
|
1327 sd_mmc_slot_sel = slot;
|
|
|
|
|
1328 sd_mmc_card = &sd_mmc_cards[slot];
|
|
|
|
|
1329 sd_mmc_configure_slot();
|
|
|
|
|
1330 return (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_INIT) ? SD_MMC_INIT_ONGOING : SD_MMC_OK;
|
|
|
|
|
1331 }
|
|
|
|
|
1332
|
|
|
|
|
1333 /**
|
|
|
|
|
1334 * \brief Configures the driver with the selected card configuration
|
|
|
|
|
1335 */
|
|
|
|
|
1336 static void sd_mmc_configure_slot(void)
|
|
|
|
|
1337 {
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00000974 in sd_mmc_select_slot+104 at ../sd_mmc/sd_mmc.c:1328
|
|
|
|
|
[1] from 0x00000a8e in sd_mmc_check+10 at ../sd_mmc/sd_mmc.c:1616
|
|
|
|
|
[2] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[3] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00000974 in sd_mmc_select_slot+104 at ../sd_mmc/sd_mmc.c:1328
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg slot = <optimized out>
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1329 sd_mmc_configure_slot();
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x0000096e sd_mmc_select_slot+98 blx r5
|
|
|
|
|
0x00000970 sd_mmc_select_slot+100 movs r3, #0
|
|
|
|
|
0x00000972 sd_mmc_select_slot+102 strb r3, [r4, #4]
|
|
|
|
|
0x00000974 sd_mmc_select_slot+104 ldr r3, [pc, #64] ; (0x9b8 <sd_mmc_select_slot+172>)
|
|
|
|
|
0x00000976 sd_mmc_select_slot+106 str r3, [r4, #0]
|
|
|
|
|
0x00000978 sd_mmc_select_slot+108 ldr r3, [pc, #64] ; (0x9bc <sd_mmc_select_slot+176>)
|
|
|
|
|
0x0000097a sd_mmc_select_slot+110 blx r3
|
|
|
|
|
0x0000097c sd_mmc_select_slot+112 ldrb r0, [r4, #26]
|
|
|
|
|
0x0000097e sd_mmc_select_slot+114 subs r3, r0, #2
|
|
|
|
|
0x00000980 sd_mmc_select_slot+116 negs r0, r3
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x0000052c r2 0x000049b9 r3 0x200002a8 r4 0x20000298 r5 0x00003ff5
|
|
|
|
|
r6 0x20010460 r7 0x0000000e r8 0x00003c39 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010570 lr 0x00000971 pc 0x00000978 xPSR 0x41000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010570 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1319 sd_mmc_cards[slot].bus_width = 1;
|
|
|
|
|
1320 sd_mmc_cards[slot].high_speed = 0;
|
|
|
|
|
1321 }
|
|
|
|
|
1322 }
|
|
|
|
|
1323
|
|
|
|
|
1324 assert(!(sd_mmc_slot_sel != slot && sd_mmc_nb_block_remaining != 0), ">>>");
|
|
|
|
|
1325
|
|
|
|
|
1326 /* Initialize interface */
|
|
|
|
|
1327 sd_mmc_slot_sel = slot;
|
|
|
|
|
1328 sd_mmc_card = &sd_mmc_cards[slot];
|
|
|
|
|
1329 sd_mmc_configure_slot();
|
|
|
|
|
1330 return (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_INIT) ? SD_MMC_INIT_ONGOING : SD_MMC_OK;
|
|
|
|
|
1331 }
|
|
|
|
|
1332
|
|
|
|
|
1333 /**
|
|
|
|
|
1334 * \brief Configures the driver with the selected card configuration
|
|
|
|
|
1335 */
|
|
|
|
|
1336 static void sd_mmc_configure_slot(void)
|
|
|
|
|
1337 {
|
|
|
|
|
1338 driver_select_device(
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00000978 in sd_mmc_select_slot+108 at ../sd_mmc/sd_mmc.c:1329
|
|
|
|
|
[1] from 0x00000a8e in sd_mmc_check+10 at ../sd_mmc/sd_mmc.c:1616
|
|
|
|
|
[2] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[3] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00000978 in sd_mmc_select_slot+108 at ../sd_mmc/sd_mmc.c:1329
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg slot = <optimized out>
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
sd_mmc_configure_slot () at ../sd_mmc/sd_mmc.c:1338
|
|
|
|
|
1338 driver_select_device(
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x000008e4 sd_mmc_configure_slot+0 push {r0, r1, r4, lr}
|
|
|
|
|
0x000008e6 sd_mmc_configure_slot+2 ldr r0, [pc, #28] ; (0x904 <sd_mmc_configure_slot+32>)
|
|
|
|
|
0x000008e8 sd_mmc_configure_slot+4 ldr r4, [pc, #28] ; (0x908 <sd_mmc_configure_slot+36>)
|
|
|
|
|
0x000008ea sd_mmc_configure_slot+6 ldr r2, [r0, #0]
|
|
|
|
|
0x000008ec sd_mmc_configure_slot+8 ldrb r1, [r2, #30]
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x0000052c r2 0x000049b9 r3 0x000008e5 r4 0x20000298 r5 0x00003ff5
|
|
|
|
|
r6 0x20010460 r7 0x0000000e r8 0x00003c39 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010570 lr 0x0000097d pc 0x000008e4 xPSR 0x41000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010570 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1328 sd_mmc_card = &sd_mmc_cards[slot];
|
|
|
|
|
1329 sd_mmc_configure_slot();
|
|
|
|
|
1330 return (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_INIT) ? SD_MMC_INIT_ONGOING : SD_MMC_OK;
|
|
|
|
|
1331 }
|
|
|
|
|
1332
|
|
|
|
|
1333 /**
|
|
|
|
|
1334 * \brief Configures the driver with the selected card configuration
|
|
|
|
|
1335 */
|
|
|
|
|
1336 static void sd_mmc_configure_slot(void)
|
|
|
|
|
1337 {
|
|
|
|
|
1338 driver_select_device(
|
|
|
|
|
1339 sd_mmc_hal, sd_mmc_slot_sel, sd_mmc_card->clock, sd_mmc_card->bus_width, sd_mmc_card->high_speed);
|
|
|
|
|
1340 }
|
|
|
|
|
1341
|
|
|
|
|
1342
|
|
|
|
|
1343
|
|
|
|
|
1344 /**
|
|
|
|
|
1345 * \brief Deselect the current card slot
|
|
|
|
|
1346 */
|
|
|
|
|
1347 static void sd_mmc_deselect_slot(void)
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x000008e4 in sd_mmc_configure_slot+0 at ../sd_mmc/sd_mmc.c:1338
|
|
|
|
|
[1] from 0x0000097c in sd_mmc_select_slot+112 at ../sd_mmc/sd_mmc.c:1329
|
|
|
|
|
[2] from 0x00000a8e in sd_mmc_check+10 at ../sd_mmc/sd_mmc.c:1616
|
|
|
|
|
[3] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[4] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x000008e4 in sd_mmc_configure_slot+0 at ../sd_mmc/sd_mmc.c:1338
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
spi_m_sync_select_device (spi=0x2000056c <SPI_0>, slot=0 '\000', clock=400000, bus_width=1 '\001', high_speed=false) at ../sd_mmc/sd_mmc_spi.c:485
|
|
|
|
|
485 PORT->Group[1].OUT.reg &= ~(1 << SPI_CS_PIN);
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x00001558 spi_m_sync_select_device+0 ldr r2, [pc, #16] ; (0x156c <spi_m_sync_select_device+20>)
|
|
|
|
|
0x0000155a spi_m_sync_select_device+2 ldr.w r3, [r2, #144] ; 0x90
|
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|
|
|
0x0000155e spi_m_sync_select_device+6 bic.w r3, r3, #268435456 ; 0x10000000
|
|
|
|
|
0x00001562 spi_m_sync_select_device+10 str.w r3, [r2, #144] ; 0x90
|
|
|
|
|
0x00001566 spi_m_sync_select_device+14 movs r0, #0
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
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|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x2000056c r1 0x00000000 r2 0x00061a80 r3 0x00000001 r4 0x00001559 r5 0x00003ff5
|
|
|
|
|
r6 0x20010460 r7 0x0000000e r8 0x00003c39 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010560 lr 0x00000901 pc 0x00001558 xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010560 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
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|
|
475 {
|
|
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|
|
476 spi_m_sync_io_write(spi, &dummy, 1); // 8 cycles
|
|
|
|
|
477 }
|
|
|
|
|
478 }
|
|
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|
|
479
|
|
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|
|
480 int32_t spi_m_sync_select_device(struct spi_m_sync_descriptor* spi, uint8_t slot, uint32_t clock, uint8_t bus_width, bool high_speed)
|
|
|
|
|
481 {
|
|
|
|
|
482 UNUSED(bus_width);
|
|
|
|
|
483 UNUSED(high_speed);
|
|
|
|
|
484 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
|
|
|
|
485 PORT->Group[1].OUT.reg &= ~(1 << SPI_CS_PIN);
|
|
|
|
|
486
|
|
|
|
|
487 return 0;
|
|
|
|
|
488 }
|
|
|
|
|
489
|
|
|
|
|
490 int32_t spi_m_sync_deselect_device(struct spi_m_sync_descriptor* spi, uint8_t slot)
|
|
|
|
|
491 {
|
|
|
|
|
492 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
|
|
|
|
493 PORT->Group[1].OUT.reg |= (1 << SPI_CS_PIN);
|
|
|
|
|
494 return 0;
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00001558 in spi_m_sync_select_device+0 at ../sd_mmc/sd_mmc_spi.c:485
|
|
|
|
|
[1] from 0x00000900 in sd_mmc_configure_slot+28 at ../sd_mmc/sd_mmc.c:1338
|
|
|
|
|
[2] from 0x0000097c in sd_mmc_select_slot+112 at ../sd_mmc/sd_mmc.c:1329
|
|
|
|
|
[3] from 0x00000a8e in sd_mmc_check+10 at ../sd_mmc/sd_mmc.c:1616
|
|
|
|
|
[4] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[5] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00001558 in spi_m_sync_select_device+0 at ../sd_mmc/sd_mmc_spi.c:485
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, slot = 0 '\000', clock = 400000, bus_width = 1 '\001', high_speed = false
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
487 return 0;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
0x00001558 spi_m_sync_select_device+0 ldr r2, [pc, #16] ; (0x156c <spi_m_sync_select_device+20>)
|
|
|
|
|
0x0000155a spi_m_sync_select_device+2 ldr.w r3, [r2, #144] ; 0x90
|
|
|
|
|
0x0000155e spi_m_sync_select_device+6 bic.w r3, r3, #268435456 ; 0x10000000
|
|
|
|
|
0x00001562 spi_m_sync_select_device+10 str.w r3, [r2, #144] ; 0x90
|
|
|
|
|
0x00001566 spi_m_sync_select_device+14 movs r0, #0
|
|
|
|
|
0x00001568 spi_m_sync_select_device+16 bx lr
|
|
|
|
|
0x0000156a spi_m_sync_select_device+18 nop
|
|
|
|
|
0x0000156c spi_m_sync_select_device+20 strh r0, [r0, #0]
|
|
|
|
|
0x0000156e spi_m_sync_select_device+22 asrs r0, r0
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x2000056c r1 0x00000000 r2 0x41008000 r3 0x00000000 r4 0x00001559 r5 0x00003ff5
|
|
|
|
|
r6 0x20010460 r7 0x0000000e r8 0x00003c39 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010560 lr 0x00000901 pc 0x00001566 xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010560 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
477 }
|
|
|
|
|
478 }
|
|
|
|
|
479
|
|
|
|
|
480 int32_t spi_m_sync_select_device(struct spi_m_sync_descriptor* spi, uint8_t slot, uint32_t clock, uint8_t bus_width, bool high_speed)
|
|
|
|
|
481 {
|
|
|
|
|
482 UNUSED(bus_width);
|
|
|
|
|
483 UNUSED(high_speed);
|
|
|
|
|
484 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
|
|
|
|
485 PORT->Group[1].OUT.reg &= ~(1 << SPI_CS_PIN);
|
|
|
|
|
486
|
|
|
|
|
487 return 0;
|
|
|
|
|
488 }
|
|
|
|
|
489
|
|
|
|
|
490 int32_t spi_m_sync_deselect_device(struct spi_m_sync_descriptor* spi, uint8_t slot)
|
|
|
|
|
491 {
|
|
|
|
|
492 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
|
|
|
|
493 PORT->Group[1].OUT.reg |= (1 << SPI_CS_PIN);
|
|
|
|
|
494 return 0;
|
|
|
|
|
495 }
|
|
|
|
|
~
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00001566 in spi_m_sync_select_device+14 at ../sd_mmc/sd_mmc_spi.c:487
|
|
|
|
|
[1] from 0x00000900 in sd_mmc_configure_slot+28 at ../sd_mmc/sd_mmc.c:1338
|
|
|
|
|
[2] from 0x0000097c in sd_mmc_select_slot+112 at ../sd_mmc/sd_mmc.c:1329
|
|
|
|
|
[3] from 0x00000a8e in sd_mmc_check+10 at ../sd_mmc/sd_mmc.c:1616
|
|
|
|
|
[4] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[5] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00001566 in spi_m_sync_select_device+14 at ../sd_mmc/sd_mmc_spi.c:487
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, slot = 0 '\000', clock = <optimized out>, bus_width = <optimized out>, high_speed = false
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
sd_mmc_select_slot (slot=<optimized out>) at ../sd_mmc/sd_mmc.c:1330
|
|
|
|
|
1330 return (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_INIT) ? SD_MMC_INIT_ONGOING : SD_MMC_OK;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00000972 sd_mmc_select_slot+102 strb r3, [r4, #4]
|
|
|
|
|
0x00000974 sd_mmc_select_slot+104 ldr r3, [pc, #64] ; (0x9b8 <sd_mmc_select_slot+172>)
|
|
|
|
|
0x00000976 sd_mmc_select_slot+106 str r3, [r4, #0]
|
|
|
|
|
0x00000978 sd_mmc_select_slot+108 ldr r3, [pc, #64] ; (0x9bc <sd_mmc_select_slot+176>)
|
|
|
|
|
0x0000097a sd_mmc_select_slot+110 blx r3
|
|
|
|
|
0x0000097c sd_mmc_select_slot+112 ldrb r0, [r4, #26]
|
|
|
|
|
0x0000097e sd_mmc_select_slot+114 subs r3, r0, #2
|
|
|
|
|
0x00000980 sd_mmc_select_slot+116 negs r0, r3
|
|
|
|
|
0x00000982 sd_mmc_select_slot+118 adcs r0, r3
|
|
|
|
|
0x00000984 sd_mmc_select_slot+120 b.n 0x936 <sd_mmc_select_slot+42>
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000000 r1 0x00000000 r2 0x41008000 r3 0x00000000 r4 0x20000298 r5 0x00003ff5
|
|
|
|
|
r6 0x20010460 r7 0x0000000e r8 0x00003c39 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010570 lr 0x00000901 pc 0x0000097c xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010570 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1320 sd_mmc_cards[slot].high_speed = 0;
|
|
|
|
|
1321 }
|
|
|
|
|
1322 }
|
|
|
|
|
1323
|
|
|
|
|
1324 assert(!(sd_mmc_slot_sel != slot && sd_mmc_nb_block_remaining != 0), ">>>");
|
|
|
|
|
1325
|
|
|
|
|
1326 /* Initialize interface */
|
|
|
|
|
1327 sd_mmc_slot_sel = slot;
|
|
|
|
|
1328 sd_mmc_card = &sd_mmc_cards[slot];
|
|
|
|
|
1329 sd_mmc_configure_slot();
|
|
|
|
|
1330 return (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_INIT) ? SD_MMC_INIT_ONGOING : SD_MMC_OK;
|
|
|
|
|
1331 }
|
|
|
|
|
1332
|
|
|
|
|
1333 /**
|
|
|
|
|
1334 * \brief Configures the driver with the selected card configuration
|
|
|
|
|
1335 */
|
|
|
|
|
1336 static void sd_mmc_configure_slot(void)
|
|
|
|
|
1337 {
|
|
|
|
|
1338 driver_select_device(
|
|
|
|
|
1339 sd_mmc_hal, sd_mmc_slot_sel, sd_mmc_card->clock, sd_mmc_card->bus_width, sd_mmc_card->high_speed);
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000097c in sd_mmc_select_slot+112 at ../sd_mmc/sd_mmc.c:1330
|
|
|
|
|
[1] from 0x00000a8e in sd_mmc_check+10 at ../sd_mmc/sd_mmc.c:1616
|
|
|
|
|
[2] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[3] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000097c in sd_mmc_select_slot+112 at ../sd_mmc/sd_mmc.c:1330
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg slot = <optimized out>
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
sd_mmc_check (slot=slot@entry=0 '\000') at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
1633 if(sd_mmc_spi_card_init())
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00000a94 sd_mmc_check+16 ldr r3, [pc, #564] ; (0xccc <sd_mmc_check+584>)
|
|
|
|
|
0x00000a96 sd_mmc_check+18 blx r3
|
|
|
|
|
0x00000a98 sd_mmc_check+20 mov r0, r8
|
|
|
|
|
0x00000a9a sd_mmc_check+22 add sp, #28
|
|
|
|
|
0x00000a9c sd_mmc_check+24 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, r10, r11, pc}
|
|
|
|
|
0x00000aa0 sd_mmc_check+28 ldr r4, [pc, #556] ; (0xcd0 <sd_mmc_check+588>)
|
|
|
|
|
0x00000aa2 sd_mmc_check+30 ldr r7, [pc, #560] ; (0xcd4 <sd_mmc_check+592>)
|
|
|
|
|
0x00000aa4 sd_mmc_check+32 ldr r3, [r4, #0]
|
|
|
|
|
0x00000aa6 sd_mmc_check+34 ldr r6, [pc, #560] ; (0xcd8 <sd_mmc_check+596>)
|
|
|
|
|
0x00000aa8 sd_mmc_check+36 strb r0, [r3, #11]
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x00000000 r2 0x41008000 r3 0x0000090d r4 0x1ffffffd r5 0x00000a85
|
|
|
|
|
r6 0x20010460 r7 0x0000000e r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010580 lr 0x00000901 pc 0x00000aa0 xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010580 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1623 /*
|
|
|
|
|
1624 // Initialization of the card requested
|
|
|
|
|
1625 if (sd_mmc_mci_card_init()) {
|
|
|
|
|
1626 sd_mmc_card->state = SD_MMC_CARD_STATE_READY;
|
|
|
|
|
1627 sd_mmc_deselect_slot();
|
|
|
|
|
1628 // To notify that the card has been just initialized
|
|
|
|
|
1629 // It is necessary for USB Device MSC
|
|
|
|
|
1630 return SD_MMC_INIT_ONGOING;
|
|
|
|
|
1631 }
|
|
|
|
|
1632 */
|
|
|
|
|
1633 if(sd_mmc_spi_card_init())
|
|
|
|
|
1634 {
|
|
|
|
|
1635 sd_mmc_spi_debug("SD/MMC card ready\n\r");
|
|
|
|
|
1636 sd_mmc_card->state = SD_MMC_CARD_STATE_READY;
|
|
|
|
|
1637 sd_mmc_deselect_slot();
|
|
|
|
|
1638 // To notify that the card has been just initialized
|
|
|
|
|
1639 // It is necessary for USB Device MSC
|
|
|
|
|
1640 return SD_MMC_INIT_ONGOING;
|
|
|
|
|
1641 }
|
|
|
|
|
1642 sd_mmc_card->state = SD_MMC_CARD_STATE_UNUSABLE;
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00000aa0 in sd_mmc_check+28 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[1] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[2] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00000aa0 in sd_mmc_check+28 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg slot = 0 '\000'
|
|
|
|
|
loc sd_mmc_err = 1 '\001'
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
sd_mmc_spi_card_init () at ../sd_mmc/sd_mmc.c:353
|
|
|
|
|
353 sd_mmc_card->type = CARD_TYPE_SD;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x00000aa0 sd_mmc_spi_card_init+0 ldr r4, [pc, #556] ; (0xcd0 <sd_mmc_check+588>)
|
|
|
|
|
0x00000aa2 sd_mmc_spi_card_init+2 ldr r7, [pc, #560] ; (0xcd4 <sd_mmc_check+592>)
|
|
|
|
|
0x00000aa4 sd_mmc_spi_card_init+4 ldr r3, [r4, #0]
|
|
|
|
|
0x00000aa6 sd_mmc_spi_card_init+6 ldr r6, [pc, #560] ; (0xcd8 <sd_mmc_check+596>)
|
|
|
|
|
0x00000aa8 sd_mmc_spi_card_init+8 strb r0, [r3, #11]
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x00000000 r2 0x41008000 r3 0x0000090d r4 0x1ffffffd r5 0x00000a85
|
|
|
|
|
r6 0x20010460 r7 0x0000000e r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010580 lr 0x00000901 pc 0x00000aa0 xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010580 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
343 * process, then it sets the SD/MMC card in transfer state.
|
|
|
|
|
344 * At last, it will automaticly enable maximum bus width and transfer speed.
|
|
|
|
|
345 *
|
|
|
|
|
346 * \return true if success, otherwise false
|
|
|
|
|
347 */
|
|
|
|
|
348 static bool sd_mmc_spi_card_init(void)
|
|
|
|
|
349 {
|
|
|
|
|
350 uint8_t v2 = 0;
|
|
|
|
|
351
|
|
|
|
|
352 // In first, try to install SD/SDIO card
|
|
|
|
|
353 sd_mmc_card->type = CARD_TYPE_SD;
|
|
|
|
|
354 sd_mmc_card->version = CARD_VER_UNKNOWN;
|
|
|
|
|
355 sd_mmc_card->rca = 0;
|
|
|
|
|
356 sd_mmc_spi_debug("Start SD card install\n\r");
|
|
|
|
|
357
|
|
|
|
|
358 // Card need of 74 cycles clock minimum to start
|
|
|
|
|
359 driver_send_clock(sd_mmc_hal);
|
|
|
|
|
360
|
|
|
|
|
361 // CMD0 - Reset all cards to idle state.
|
|
|
|
|
362 if (!driver_send_cmd(sd_mmc_hal, SDMMC_SPI_CMD0_GO_IDLE_STATE, 0)) {
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00000aa0 in sd_mmc_spi_card_init+0 at ../sd_mmc/sd_mmc.c:353
|
|
|
|
|
[1] from 0x00000aa0 in sd_mmc_check+28 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[2] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[3] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00000aa0 in sd_mmc_spi_card_init+0 at ../sd_mmc/sd_mmc.c:353
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
loc v2 = 0 '\000', sd_mmc_err = 1 '\001'
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
354 sd_mmc_card->version = CARD_VER_UNKNOWN;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00000aa0 sd_mmc_spi_card_init+0 ldr r4, [pc, #556] ; (0xcd0 <sd_mmc_check+588>)
|
|
|
|
|
0x00000aa2 sd_mmc_spi_card_init+2 ldr r7, [pc, #560] ; (0xcd4 <sd_mmc_check+592>)
|
|
|
|
|
0x00000aa4 sd_mmc_spi_card_init+4 ldr r3, [r4, #0]
|
|
|
|
|
0x00000aa6 sd_mmc_spi_card_init+6 ldr r6, [pc, #560] ; (0xcd8 <sd_mmc_check+596>)
|
|
|
|
|
0x00000aa8 sd_mmc_spi_card_init+8 strb r0, [r3, #11]
|
|
|
|
|
0x00000aaa sd_mmc_spi_card_init+10 movs r5, #0
|
|
|
|
|
0x00000aac sd_mmc_spi_card_init+12 strb r5, [r3, #12]
|
|
|
|
|
0x00000aae sd_mmc_spi_card_init+14 strh r5, [r3, #8]
|
|
|
|
|
0x00000ab0 sd_mmc_spi_card_init+16 ldr r0, [pc, #552] ; (0xcdc <sd_mmc_check+600>)
|
|
|
|
|
0x00000ab2 sd_mmc_spi_card_init+18 blx r7
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x00000000 r2 0x41008000 r3 0x200002a8 r4 0x20000298 r5 0x00000a85
|
|
|
|
|
r6 0x000013cd r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010580 lr 0x00000901 pc 0x00000aaa xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010580 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
344 * At last, it will automaticly enable maximum bus width and transfer speed.
|
|
|
|
|
345 *
|
|
|
|
|
346 * \return true if success, otherwise false
|
|
|
|
|
347 */
|
|
|
|
|
348 static bool sd_mmc_spi_card_init(void)
|
|
|
|
|
349 {
|
|
|
|
|
350 uint8_t v2 = 0;
|
|
|
|
|
351
|
|
|
|
|
352 // In first, try to install SD/SDIO card
|
|
|
|
|
353 sd_mmc_card->type = CARD_TYPE_SD;
|
|
|
|
|
354 sd_mmc_card->version = CARD_VER_UNKNOWN;
|
|
|
|
|
355 sd_mmc_card->rca = 0;
|
|
|
|
|
356 sd_mmc_spi_debug("Start SD card install\n\r");
|
|
|
|
|
357
|
|
|
|
|
358 // Card need of 74 cycles clock minimum to start
|
|
|
|
|
359 driver_send_clock(sd_mmc_hal);
|
|
|
|
|
360
|
|
|
|
|
361 // CMD0 - Reset all cards to idle state.
|
|
|
|
|
362 if (!driver_send_cmd(sd_mmc_hal, SDMMC_SPI_CMD0_GO_IDLE_STATE, 0)) {
|
|
|
|
|
363 return false;
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00000aaa in sd_mmc_spi_card_init+10 at ../sd_mmc/sd_mmc.c:354
|
|
|
|
|
[1] from 0x00000aaa in sd_mmc_check+38 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[2] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[3] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00000aaa in sd_mmc_spi_card_init+10 at ../sd_mmc/sd_mmc.c:354
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
loc v2 = 0 '\000', sd_mmc_err = 1 '\001'
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
355 sd_mmc_card->rca = 0;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00000aa4 sd_mmc_spi_card_init+4 ldr r3, [r4, #0]
|
|
|
|
|
0x00000aa6 sd_mmc_spi_card_init+6 ldr r6, [pc, #560] ; (0xcd8 <sd_mmc_check+596>)
|
|
|
|
|
0x00000aa8 sd_mmc_spi_card_init+8 strb r0, [r3, #11]
|
|
|
|
|
0x00000aaa sd_mmc_spi_card_init+10 movs r5, #0
|
|
|
|
|
0x00000aac sd_mmc_spi_card_init+12 strb r5, [r3, #12]
|
|
|
|
|
0x00000aae sd_mmc_spi_card_init+14 strh r5, [r3, #8]
|
|
|
|
|
0x00000ab0 sd_mmc_spi_card_init+16 ldr r0, [pc, #552] ; (0xcdc <sd_mmc_check+600>)
|
|
|
|
|
0x00000ab2 sd_mmc_spi_card_init+18 blx r7
|
|
|
|
|
0x00000ab4 sd_mmc_spi_card_init+20 ldr r0, [r4, #8]
|
|
|
|
|
0x00000ab6 sd_mmc_spi_card_init+22 ldr r3, [pc, #552] ; (0xce0 <sd_mmc_check+604>)
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x00000000 r2 0x41008000 r3 0x200002a8 r4 0x20000298 r5 0x00000000
|
|
|
|
|
r6 0x000013cd r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010580 lr 0x00000901 pc 0x00000aae xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010580 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
345 *
|
|
|
|
|
346 * \return true if success, otherwise false
|
|
|
|
|
347 */
|
|
|
|
|
348 static bool sd_mmc_spi_card_init(void)
|
|
|
|
|
349 {
|
|
|
|
|
350 uint8_t v2 = 0;
|
|
|
|
|
351
|
|
|
|
|
352 // In first, try to install SD/SDIO card
|
|
|
|
|
353 sd_mmc_card->type = CARD_TYPE_SD;
|
|
|
|
|
354 sd_mmc_card->version = CARD_VER_UNKNOWN;
|
|
|
|
|
355 sd_mmc_card->rca = 0;
|
|
|
|
|
356 sd_mmc_spi_debug("Start SD card install\n\r");
|
|
|
|
|
357
|
|
|
|
|
358 // Card need of 74 cycles clock minimum to start
|
|
|
|
|
359 driver_send_clock(sd_mmc_hal);
|
|
|
|
|
360
|
|
|
|
|
361 // CMD0 - Reset all cards to idle state.
|
|
|
|
|
362 if (!driver_send_cmd(sd_mmc_hal, SDMMC_SPI_CMD0_GO_IDLE_STATE, 0)) {
|
|
|
|
|
363 return false;
|
|
|
|
|
364 }
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00000aae in sd_mmc_spi_card_init+14 at ../sd_mmc/sd_mmc.c:355
|
|
|
|
|
[1] from 0x00000aae in sd_mmc_check+42 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[2] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[3] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00000aae in sd_mmc_spi_card_init+14 at ../sd_mmc/sd_mmc.c:355
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
loc v2 = 0 '\000', sd_mmc_err = 1 '\001'
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
356 sd_mmc_spi_debug("Start SD card install\n\r");
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00000aa6 sd_mmc_spi_card_init+6 ldr r6, [pc, #560] ; (0xcd8 <sd_mmc_check+596>)
|
|
|
|
|
0x00000aa8 sd_mmc_spi_card_init+8 strb r0, [r3, #11]
|
|
|
|
|
0x00000aaa sd_mmc_spi_card_init+10 movs r5, #0
|
|
|
|
|
0x00000aac sd_mmc_spi_card_init+12 strb r5, [r3, #12]
|
|
|
|
|
0x00000aae sd_mmc_spi_card_init+14 strh r5, [r3, #8]
|
|
|
|
|
0x00000ab0 sd_mmc_spi_card_init+16 ldr r0, [pc, #552] ; (0xcdc <sd_mmc_check+600>)
|
|
|
|
|
0x00000ab2 sd_mmc_spi_card_init+18 blx r7
|
|
|
|
|
0x00000ab4 sd_mmc_spi_card_init+20 ldr r0, [r4, #8]
|
|
|
|
|
0x00000ab6 sd_mmc_spi_card_init+22 ldr r3, [pc, #552] ; (0xce0 <sd_mmc_check+604>)
|
|
|
|
|
0x00000ab8 sd_mmc_spi_card_init+24 blx r3
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x00000000 r2 0x41008000 r3 0x200002a8 r4 0x20000298 r5 0x00000000
|
|
|
|
|
r6 0x000013cd r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010580 lr 0x00000901 pc 0x00000ab0 xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010580 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
346 * \return true if success, otherwise false
|
|
|
|
|
347 */
|
|
|
|
|
348 static bool sd_mmc_spi_card_init(void)
|
|
|
|
|
349 {
|
|
|
|
|
350 uint8_t v2 = 0;
|
|
|
|
|
351
|
|
|
|
|
352 // In first, try to install SD/SDIO card
|
|
|
|
|
353 sd_mmc_card->type = CARD_TYPE_SD;
|
|
|
|
|
354 sd_mmc_card->version = CARD_VER_UNKNOWN;
|
|
|
|
|
355 sd_mmc_card->rca = 0;
|
|
|
|
|
356 sd_mmc_spi_debug("Start SD card install\n\r");
|
|
|
|
|
357
|
|
|
|
|
358 // Card need of 74 cycles clock minimum to start
|
|
|
|
|
359 driver_send_clock(sd_mmc_hal);
|
|
|
|
|
360
|
|
|
|
|
361 // CMD0 - Reset all cards to idle state.
|
|
|
|
|
362 if (!driver_send_cmd(sd_mmc_hal, SDMMC_SPI_CMD0_GO_IDLE_STATE, 0)) {
|
|
|
|
|
363 return false;
|
|
|
|
|
364 }
|
|
|
|
|
365 if (!sd_cmd8(&v2)) {
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00000ab0 in sd_mmc_spi_card_init+16 at ../sd_mmc/sd_mmc.c:356
|
|
|
|
|
[1] from 0x00000ab0 in sd_mmc_check+44 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[2] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[3] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00000ab0 in sd_mmc_spi_card_init+16 at ../sd_mmc/sd_mmc.c:356
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
loc v2 = 0 '\000', sd_mmc_err = 1 '\001'
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
pprintf (fmt=0x90d <sd_mmc_select_slot> "\265") at ../shared/util/pdebug.c:21
|
|
|
|
|
21 size_t size_str = strlen(fmt);
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x00003f60 pprintf+0 push {r0, r1, r2, r3}
|
|
|
|
|
0x00003f62 pprintf+2 push {r4, r5, lr}
|
|
|
|
|
0x00003f64 pprintf+4 sub sp, #268 ; 0x10c
|
|
|
|
|
0x00003f66 pprintf+6 ldr r4, [pc, #68] ; (0x3fac <pprintf+76>)
|
|
|
|
|
0x00003f68 pprintf+8 ldr r5, [sp, #280] ; 0x118
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x000049d0 r1 0x00000000 r2 0x41008000 r3 0x200002a8 r4 0x20000298 r5 0x00000000
|
|
|
|
|
r6 0x000013cd r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010580 lr 0x00000ab5 pc 0x00003f60 xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010580 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
11 {
|
|
|
|
|
12 usart_sync_get_io_descriptor(&USART_DBG, &debug_io);
|
|
|
|
|
13 usart_sync_enable(&USART_DBG);
|
|
|
|
|
14 printf("Debug Initialized\n");
|
|
|
|
|
15
|
|
|
|
|
16 return 0;
|
|
|
|
|
17 }
|
|
|
|
|
18
|
|
|
|
|
19 int pprintf(const char* fmt, ...)
|
|
|
|
|
20 {
|
|
|
|
|
21 size_t size_str = strlen(fmt);
|
|
|
|
|
22 if (size_str >= MAX_PRINTF_BUFFER)
|
|
|
|
|
23 {
|
|
|
|
|
24 return -1;
|
|
|
|
|
25 }
|
|
|
|
|
26 uint8_t printf_buffer[MAX_PRINTF_BUFFER];
|
|
|
|
|
27 memset(printf_buffer, '\0', MAX_PRINTF_BUFFER);
|
|
|
|
|
28 va_list args;
|
|
|
|
|
29 va_start(args, fmt);
|
|
|
|
|
30 vsprintf((char*)printf_buffer, fmt, args);
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00003f60 in pprintf+0 at ../shared/util/pdebug.c:21
|
|
|
|
|
[1] from 0x00000ab4 in sd_mmc_spi_card_init+20 at ../sd_mmc/sd_mmc.c:356
|
|
|
|
|
[2] from 0x00000ab4 in sd_mmc_check+48 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[3] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[4] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00003f60 in pprintf+0 at ../shared/util/pdebug.c:21
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg fmt = 0x90d <sd_mmc_select_slot> "\265": 181 '\265'
|
|
|
|
|
loc size_str = <optimized out>, printf_buffer = "Start SD card install\n\r\000\000\000\000\000\000\000\000\000)*\000\000\205@\000\000\340O\000\000`\…, args = {__ap = 0x20010574}
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
22 if (size_str >= MAX_PRINTF_BUFFER)
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00003f64 pprintf+4 sub sp, #268 ; 0x10c
|
|
|
|
|
0x00003f66 pprintf+6 ldr r4, [pc, #68] ; (0x3fac <pprintf+76>)
|
|
|
|
|
0x00003f68 pprintf+8 ldr r5, [sp, #280] ; 0x118
|
|
|
|
|
0x00003f6a pprintf+10 mov r0, r5
|
|
|
|
|
0x00003f6c pprintf+12 blx r4
|
|
|
|
|
0x00003f6e pprintf+14 cmp r0, #255 ; 0xff
|
|
|
|
|
0x00003f70 pprintf+16 bhi.n 0x3fa4 <pprintf+68>
|
|
|
|
|
0x00003f72 pprintf+18 ldr r3, [pc, #60] ; (0x3fb0 <pprintf+80>)
|
|
|
|
|
0x00003f74 pprintf+20 mov.w r2, #256 ; 0x100
|
|
|
|
|
0x00003f78 pprintf+24 movs r1, #0
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000017 r1 0x00000000 r2 0x00000000 r3 0x000049e8 r4 0x00004085 r5 0x000049d0
|
|
|
|
|
r6 0x000013cd r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010458 lr 0x00003f6f pc 0x00003f6e xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010458 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
12 usart_sync_get_io_descriptor(&USART_DBG, &debug_io);
|
|
|
|
|
13 usart_sync_enable(&USART_DBG);
|
|
|
|
|
14 printf("Debug Initialized\n");
|
|
|
|
|
15
|
|
|
|
|
16 return 0;
|
|
|
|
|
17 }
|
|
|
|
|
18
|
|
|
|
|
19 int pprintf(const char* fmt, ...)
|
|
|
|
|
20 {
|
|
|
|
|
21 size_t size_str = strlen(fmt);
|
|
|
|
|
22 if (size_str >= MAX_PRINTF_BUFFER)
|
|
|
|
|
23 {
|
|
|
|
|
24 return -1;
|
|
|
|
|
25 }
|
|
|
|
|
26 uint8_t printf_buffer[MAX_PRINTF_BUFFER];
|
|
|
|
|
27 memset(printf_buffer, '\0', MAX_PRINTF_BUFFER);
|
|
|
|
|
28 va_list args;
|
|
|
|
|
29 va_start(args, fmt);
|
|
|
|
|
30 vsprintf((char*)printf_buffer, fmt, args);
|
|
|
|
|
31 va_end(args);
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00003f6e in pprintf+14 at ../shared/util/pdebug.c:22
|
|
|
|
|
[1] from 0x00000ab4 in sd_mmc_spi_card_init+20 at ../sd_mmc/sd_mmc.c:356
|
|
|
|
|
[2] from 0x00000ab4 in sd_mmc_check+48 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[3] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[4] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00003f6e in pprintf+14 at ../shared/util/pdebug.c:22
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg fmt = 0x49d0 "Start SD card install\n\r": 83 'S'
|
|
|
|
|
loc size_str = 23, printf_buffer = "Start SD card install\n\r\000\000\000\000\000\000\000\000\000)*\000\000\205@\000\000\340O\000\000`\…, args = {__ap = 0x20010574}
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
27 memset(printf_buffer, '\0', MAX_PRINTF_BUFFER);
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00003f68 pprintf+8 ldr r5, [sp, #280] ; 0x118
|
|
|
|
|
0x00003f6a pprintf+10 mov r0, r5
|
|
|
|
|
0x00003f6c pprintf+12 blx r4
|
|
|
|
|
0x00003f6e pprintf+14 cmp r0, #255 ; 0xff
|
|
|
|
|
0x00003f70 pprintf+16 bhi.n 0x3fa4 <pprintf+68>
|
|
|
|
|
0x00003f72 pprintf+18 ldr r3, [pc, #60] ; (0x3fb0 <pprintf+80>)
|
|
|
|
|
0x00003f74 pprintf+20 mov.w r2, #256 ; 0x100
|
|
|
|
|
0x00003f78 pprintf+24 movs r1, #0
|
|
|
|
|
0x00003f7a pprintf+26 add r0, sp, #8
|
|
|
|
|
0x00003f7c pprintf+28 blx r3
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000017 r1 0x00000000 r2 0x00000000 r3 0x000049e8 r4 0x00004085 r5 0x000049d0
|
|
|
|
|
r6 0x000013cd r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010458 lr 0x00003f6f pc 0x00003f72 xPSR 0x81000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010458 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
17 }
|
|
|
|
|
18
|
|
|
|
|
19 int pprintf(const char* fmt, ...)
|
|
|
|
|
20 {
|
|
|
|
|
21 size_t size_str = strlen(fmt);
|
|
|
|
|
22 if (size_str >= MAX_PRINTF_BUFFER)
|
|
|
|
|
23 {
|
|
|
|
|
24 return -1;
|
|
|
|
|
25 }
|
|
|
|
|
26 uint8_t printf_buffer[MAX_PRINTF_BUFFER];
|
|
|
|
|
27 memset(printf_buffer, '\0', MAX_PRINTF_BUFFER);
|
|
|
|
|
28 va_list args;
|
|
|
|
|
29 va_start(args, fmt);
|
|
|
|
|
30 vsprintf((char*)printf_buffer, fmt, args);
|
|
|
|
|
31 va_end(args);
|
|
|
|
|
32 return io_write(debug_io, (const uint8_t*)printf_buffer, strlen((const char*)printf_buffer));
|
|
|
|
|
33 }
|
|
|
|
|
34
|
|
|
|
|
35 void passert(const bool cond, const char* msg_failure, const char* file, const int line)
|
|
|
|
|
36 {
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00003f72 in pprintf+18 at ../shared/util/pdebug.c:27
|
|
|
|
|
[1] from 0x00000ab4 in sd_mmc_spi_card_init+20 at ../sd_mmc/sd_mmc.c:356
|
|
|
|
|
[2] from 0x00000ab4 in sd_mmc_check+48 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[3] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[4] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00003f72 in pprintf+18 at ../shared/util/pdebug.c:27
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg fmt = 0x49d0 "Start SD card install\n\r": 83 'S'
|
|
|
|
|
loc size_str = 23, printf_buffer = "Start SD card install\n\r\000\000\000\000\000\000\000\000\000)*\000\000\205@\000\000\340O\000\000`\…, args = {__ap = 0x20010574}
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
Run till exit from #0 pprintf (fmt=0x49d0 "Start SD card install\n\r") at ../shared/util/pdebug.c:27
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
sd_mmc_spi_card_init () at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
359 driver_send_clock(sd_mmc_hal);
|
|
|
|
|
Value returned is $1 = 23
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00000aaa sd_mmc_spi_card_init+10 movs r5, #0
|
|
|
|
|
0x00000aac sd_mmc_spi_card_init+12 strb r5, [r3, #12]
|
|
|
|
|
0x00000aae sd_mmc_spi_card_init+14 strh r5, [r3, #8]
|
|
|
|
|
0x00000ab0 sd_mmc_spi_card_init+16 ldr r0, [pc, #552] ; (0xcdc <sd_mmc_check+600>)
|
|
|
|
|
0x00000ab2 sd_mmc_spi_card_init+18 blx r7
|
|
|
|
|
0x00000ab4 sd_mmc_spi_card_init+20 ldr r0, [r4, #8]
|
|
|
|
|
0x00000ab6 sd_mmc_spi_card_init+22 ldr r3, [pc, #552] ; (0xce0 <sd_mmc_check+604>)
|
|
|
|
|
0x00000ab8 sd_mmc_spi_card_init+24 blx r3
|
|
|
|
|
0x00000aba sd_mmc_spi_card_init+26 ldr r0, [r4, #8]
|
|
|
|
|
0x00000abc sd_mmc_spi_card_init+28 mov r2, r5
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000017 r1 0x0000000d r2 0x000000f1 r3 0x00002a29 r4 0x20000298 r5 0x00000000
|
|
|
|
|
r6 0x000013cd r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010580 lr 0x00000ab5 pc 0x00000ab4 xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010580 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
349 {
|
|
|
|
|
350 uint8_t v2 = 0;
|
|
|
|
|
351
|
|
|
|
|
352 // In first, try to install SD/SDIO card
|
|
|
|
|
353 sd_mmc_card->type = CARD_TYPE_SD;
|
|
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|
|
354 sd_mmc_card->version = CARD_VER_UNKNOWN;
|
|
|
|
|
355 sd_mmc_card->rca = 0;
|
|
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|
|
356 sd_mmc_spi_debug("Start SD card install\n\r");
|
|
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|
|
357
|
|
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|
|
358 // Card need of 74 cycles clock minimum to start
|
|
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|
|
359 driver_send_clock(sd_mmc_hal);
|
|
|
|
|
360
|
|
|
|
|
361 // CMD0 - Reset all cards to idle state.
|
|
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|
|
362 if (!driver_send_cmd(sd_mmc_hal, SDMMC_SPI_CMD0_GO_IDLE_STATE, 0)) {
|
|
|
|
|
363 return false;
|
|
|
|
|
364 }
|
|
|
|
|
365 if (!sd_cmd8(&v2)) {
|
|
|
|
|
366 return false;
|
|
|
|
|
367 }
|
|
|
|
|
368 // Try to get the SDIO card's operating condition
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00000ab4 in sd_mmc_spi_card_init+20 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[1] from 0x00000ab4 in sd_mmc_check+48 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[2] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[3] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00000ab4 in sd_mmc_spi_card_init+20 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
loc v2 = 0 '\000', sd_mmc_err = <optimized out>
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
spi_m_sync_send_clock (spi=0x2000056c <SPI_0>) at ../sd_mmc/sd_mmc_spi.c:470
|
|
|
|
|
470 uint8_t dummy = 0xFF;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x00001530 spi_m_sync_send_clock+0 push {r0, r1, r4, r5, r6, lr}
|
|
|
|
|
0x00001532 spi_m_sync_send_clock+2 movs r3, #255 ; 0xff
|
|
|
|
|
0x00001534 spi_m_sync_send_clock+4 ldr r6, [pc, #28] ; (0x1554 <spi_m_sync_send_clock+36>)
|
|
|
|
|
0x00001536 spi_m_sync_send_clock+6 strb.w r3, [sp, #7]
|
|
|
|
|
0x0000153a spi_m_sync_send_clock+10 mov r5, r0
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x2000056c r1 0x0000000d r2 0x000000f1 r3 0x00001531 r4 0x20000298 r5 0x00000000
|
|
|
|
|
r6 0x000013cd r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010580 lr 0x00000abb pc 0x00001530 xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010580 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
460
|
|
|
|
|
461 uint32_t spi_m_sync_get_response(struct spi_m_sync_descriptor* spi)
|
|
|
|
|
462 {
|
|
|
|
|
463 return sd_mmc_spi_response_32;
|
|
|
|
|
464 }
|
|
|
|
|
465
|
|
|
|
|
466
|
|
|
|
|
467 void spi_m_sync_send_clock(struct spi_m_sync_descriptor* spi)
|
|
|
|
|
468 {
|
|
|
|
|
469 uint8_t i;
|
|
|
|
|
470 uint8_t dummy = 0xFF;
|
|
|
|
|
471
|
|
|
|
|
472 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
|
|
|
|
473 // Send 80 cycles
|
|
|
|
|
474 for(i = 0; i < 10; i++)
|
|
|
|
|
475 {
|
|
|
|
|
476 spi_m_sync_io_write(spi, &dummy, 1); // 8 cycles
|
|
|
|
|
477 }
|
|
|
|
|
478 }
|
|
|
|
|
479
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00001530 in spi_m_sync_send_clock+0 at ../sd_mmc/sd_mmc_spi.c:470
|
|
|
|
|
[1] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[2] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[3] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[4] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00001530 in spi_m_sync_send_clock+0 at ../sd_mmc/sd_mmc_spi.c:470
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …
|
|
|
|
|
loc i = <optimized out>, dummy = 0 '\000'
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
474 for(i = 0; i < 10; i++)
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
0x00001530 spi_m_sync_send_clock+0 push {r0, r1, r4, r5, r6, lr}
|
|
|
|
|
0x00001532 spi_m_sync_send_clock+2 movs r3, #255 ; 0xff
|
|
|
|
|
0x00001534 spi_m_sync_send_clock+4 ldr r6, [pc, #28] ; (0x1554 <spi_m_sync_send_clock+36>)
|
|
|
|
|
0x00001536 spi_m_sync_send_clock+6 strb.w r3, [sp, #7]
|
|
|
|
|
0x0000153a spi_m_sync_send_clock+10 mov r5, r0
|
|
|
|
|
0x0000153c spi_m_sync_send_clock+12 movs r4, #10
|
|
|
|
|
0x0000153e spi_m_sync_send_clock+14 movs r2, #1
|
|
|
|
|
0x00001540 spi_m_sync_send_clock+16 add.w r1, sp, #7
|
|
|
|
|
0x00001544 spi_m_sync_send_clock+20 mov r0, r5
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x2000056c r1 0x0000000d r2 0x000000f1 r3 0x000000ff r4 0x20000298 r5 0x00000000
|
|
|
|
|
r6 0x00001681 r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010568 lr 0x00000abb pc 0x0000153a xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010568 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
464 }
|
|
|
|
|
465
|
|
|
|
|
466
|
|
|
|
|
467 void spi_m_sync_send_clock(struct spi_m_sync_descriptor* spi)
|
|
|
|
|
468 {
|
|
|
|
|
469 uint8_t i;
|
|
|
|
|
470 uint8_t dummy = 0xFF;
|
|
|
|
|
471
|
|
|
|
|
472 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
|
|
|
|
473 // Send 80 cycles
|
|
|
|
|
474 for(i = 0; i < 10; i++)
|
|
|
|
|
475 {
|
|
|
|
|
476 spi_m_sync_io_write(spi, &dummy, 1); // 8 cycles
|
|
|
|
|
477 }
|
|
|
|
|
478 }
|
|
|
|
|
479
|
|
|
|
|
480 int32_t spi_m_sync_select_device(struct spi_m_sync_descriptor* spi, uint8_t slot, uint32_t clock, uint8_t bus_width, bool high_speed)
|
|
|
|
|
481 {
|
|
|
|
|
482 UNUSED(bus_width);
|
|
|
|
|
483 UNUSED(high_speed);
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000153a in spi_m_sync_send_clock+10 at ../sd_mmc/sd_mmc_spi.c:474
|
|
|
|
|
[1] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[2] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[3] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[4] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000153a in spi_m_sync_send_clock+10 at ../sd_mmc/sd_mmc_spi.c:474
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …
|
|
|
|
|
loc i = 0 '\000', dummy = 255 '\377'
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
476 spi_m_sync_io_write(spi, &dummy, 1); // 8 cycles
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00001532 spi_m_sync_send_clock+2 movs r3, #255 ; 0xff
|
|
|
|
|
0x00001534 spi_m_sync_send_clock+4 ldr r6, [pc, #28] ; (0x1554 <spi_m_sync_send_clock+36>)
|
|
|
|
|
0x00001536 spi_m_sync_send_clock+6 strb.w r3, [sp, #7]
|
|
|
|
|
0x0000153a spi_m_sync_send_clock+10 mov r5, r0
|
|
|
|
|
0x0000153c spi_m_sync_send_clock+12 movs r4, #10
|
|
|
|
|
0x0000153e spi_m_sync_send_clock+14 movs r2, #1
|
|
|
|
|
0x00001540 spi_m_sync_send_clock+16 add.w r1, sp, #7
|
|
|
|
|
0x00001544 spi_m_sync_send_clock+20 mov r0, r5
|
|
|
|
|
0x00001546 spi_m_sync_send_clock+22 subs r4, #1
|
|
|
|
|
0x00001548 spi_m_sync_send_clock+24 blx r6
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x2000056c r1 0x0000000d r2 0x000000f1 r3 0x000000ff r4 0x0000000a r5 0x2000056c
|
|
|
|
|
r6 0x00001681 r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010568 lr 0x00000abb pc 0x0000153e xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010568 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
466
|
|
|
|
|
467 void spi_m_sync_send_clock(struct spi_m_sync_descriptor* spi)
|
|
|
|
|
468 {
|
|
|
|
|
469 uint8_t i;
|
|
|
|
|
470 uint8_t dummy = 0xFF;
|
|
|
|
|
471
|
|
|
|
|
472 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
|
|
|
|
473 // Send 80 cycles
|
|
|
|
|
474 for(i = 0; i < 10; i++)
|
|
|
|
|
475 {
|
|
|
|
|
476 spi_m_sync_io_write(spi, &dummy, 1); // 8 cycles
|
|
|
|
|
477 }
|
|
|
|
|
478 }
|
|
|
|
|
479
|
|
|
|
|
480 int32_t spi_m_sync_select_device(struct spi_m_sync_descriptor* spi, uint8_t slot, uint32_t clock, uint8_t bus_width, bool high_speed)
|
|
|
|
|
481 {
|
|
|
|
|
482 UNUSED(bus_width);
|
|
|
|
|
483 UNUSED(high_speed);
|
|
|
|
|
484 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
|
|
|
|
485 PORT->Group[1].OUT.reg &= ~(1 << SPI_CS_PIN);
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000153e in spi_m_sync_send_clock+14 at ../sd_mmc/sd_mmc_spi.c:476
|
|
|
|
|
[1] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[2] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[3] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[4] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000153e in spi_m_sync_send_clock+14 at ../sd_mmc/sd_mmc_spi.c:476
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …
|
|
|
|
|
loc i = 0 '\000', dummy = 255 '\377'
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
spi_m_sync_io_write (spi=spi@entry=0x2000056c <SPI_0>, buf=buf@entry=0x2001056f "\377\230\002", length=length@entry=1) at ../hal/src/hal_spi_m_sync.c:202
|
|
|
|
|
202 return _spi_m_sync_io_write(&spi->io, buf, length);
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x00001680 spi_m_sync_io_write+0 ldr r3, [pc, #4] ; (0x1688 <spi_m_sync_io_write+8>)
|
|
|
|
|
0x00001682 spi_m_sync_io_write+2 adds r0, #12
|
|
|
|
|
0x00001684 spi_m_sync_io_write+4 bx r3
|
|
|
|
|
0x00001686 spi_m_sync_io_write+6 nop
|
|
|
|
|
0x00001688 spi_m_sync_io_write+8 asrs r1, r2, #24
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x2000056c r1 0x2001056f r2 0x00000001 r3 0x000000ff r4 0x00000009 r5 0x2000056c
|
|
|
|
|
r6 0x00001681 r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010568 lr 0x0000154b pc 0x00001680 xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010568 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
192 }
|
|
|
|
|
193
|
|
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|
|
194 uint32_t spi_m_sync_get_version(void)
|
|
|
|
|
195 {
|
|
|
|
|
196 return SPI_M_SYNC_DRIVER_VERSION;
|
|
|
|
|
197 }
|
|
|
|
|
198
|
|
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199
|
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|
|
200 int32_t spi_m_sync_io_write(struct spi_m_sync_descriptor *const spi, const uint8_t *const buf, const uint16_t length)
|
|
|
|
|
201 {
|
|
|
|
|
202 return _spi_m_sync_io_write(&spi->io, buf, length);
|
|
|
|
|
203 }
|
|
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|
204
|
|
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|
|
205 int32_t spi_m_sync_io_read(struct spi_m_sync_descriptor *const spi, uint8_t *buf, const uint16_t length)
|
|
|
|
|
206 {
|
|
|
|
|
207 return _spi_m_sync_io_read(&spi->io, buf, length);
|
|
|
|
|
208 }
|
|
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|
|
209
|
|
|
|
|
210 #ifdef __cplusplus
|
|
|
|
|
211 }
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00001680 in spi_m_sync_io_write+0 at ../hal/src/hal_spi_m_sync.c:202
|
|
|
|
|
[1] from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:476
|
|
|
|
|
[2] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[3] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[4] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[5] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00001680 in spi_m_sync_io_write+0 at ../hal/src/hal_spi_m_sync.c:202
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, buf = 0x2001056f "\377\230\002": 255 '\377', length = 1
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
_spi_m_sync_io_write (io=io@entry=0x20000578 <SPI_0+12>, buf=buf@entry=0x2001056f "\377\230\002", length=1) at ../hal/src/hal_spi_m_sync.c:163
|
|
|
|
|
163 ASSERT(io);
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x00001610 _spi_m_sync_io_write+0 push {r0, r1, r2, r3, r4, r5, r6, lr}
|
|
|
|
|
0x00001612 _spi_m_sync_io_write+2 mov r4, r0
|
|
|
|
|
0x00001614 _spi_m_sync_io_write+4 subs r0, #0
|
|
|
|
|
0x00001616 _spi_m_sync_io_write+6 it ne
|
|
|
|
|
0x00001618 _spi_m_sync_io_write+8 movne r0, #1
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x20000578 r1 0x2001056f r2 0x00000001 r3 0x00001611 r4 0x00000009 r5 0x2000056c
|
|
|
|
|
r6 0x00001681 r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010568 lr 0x0000154b pc 0x00001610 xPSR 0x01000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010568 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
153 * It blocks until all data sent or error.
|
|
|
|
|
154 *
|
|
|
|
|
155 * \param[in, out] spi Pointer to the HAL SPI instance.
|
|
|
|
|
156 * \param[in] p_xfer Pointer to the transfer information (\ref spi_transfer).
|
|
|
|
|
157 * \return Operation status.
|
|
|
|
|
158 * \retval size Success.
|
|
|
|
|
159 * \retval >=0 Timeout, with number of characters transferred.
|
|
|
|
|
160 */
|
|
|
|
|
161 static int32_t _spi_m_sync_io_write(struct io_descriptor *const io, const uint8_t *const buf, const uint16_t length)
|
|
|
|
|
162 {
|
|
|
|
|
163 ASSERT(io);
|
|
|
|
|
164
|
|
|
|
|
165 struct spi_m_sync_descriptor *spi = CONTAINER_OF(io, struct spi_m_sync_descriptor, io);
|
|
|
|
|
166 struct spi_xfer xfer;
|
|
|
|
|
167
|
|
|
|
|
168 xfer.rxbuf = 0;
|
|
|
|
|
169 xfer.txbuf = (uint8_t *)buf;
|
|
|
|
|
170 xfer.size = length;
|
|
|
|
|
171
|
|
|
|
|
172 return spi_m_sync_transfer(spi, &xfer);
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00001610 in _spi_m_sync_io_write+0 at ../hal/src/hal_spi_m_sync.c:163
|
|
|
|
|
[1] from 0x00001686 in spi_m_sync_io_write+6 at ../hal/src/hal_spi_m_sync.c:202
|
|
|
|
|
[2] from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:476
|
|
|
|
|
[3] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[4] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[5] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[6] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00001610 in _spi_m_sync_io_write+0 at ../hal/src/hal_spi_m_sync.c:163
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg io = 0x20000578 <SPI_0+12>: {write = 0x1611 <_spi_m_sync_io_write>,read = 0x1649 <_spi_m_sync_…, buf = 0x2001056f "\377\230\002": 255 '\377', length = 1
|
|
|
|
|
loc spi = <optimized out>, xfer = {txbuf = 0x0 <exception_table>,rxbuf = 0x0 <exception_table>,size = 0}
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
assert (condition=condition@entry=true, file=file@entry=0x4e8a "../hal/src/hal_spi_m_sync.c", line=line@entry=163) at ../hal/utils/src/utils_assert.c:41
|
|
|
|
|
41 if (!(condition)) {
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x000028f8 assert+0 cbnz r0, 0x28fc <assert+4>
|
|
|
|
|
0x000028fa assert+2 bkpt 0x0000
|
|
|
|
|
0x000028fc assert+4 bx lr
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x00004e8a r2 0x000000a3 r3 0x000028f9 r4 0x20000578 r5 0x00000001
|
|
|
|
|
r6 0x2001056f r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010548 lr 0x00001627 pc 0x000028f8 xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010548 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
31 *
|
|
|
|
|
32 */
|
|
|
|
|
33
|
|
|
|
|
34 #include <utils_assert.h>
|
|
|
|
|
35
|
|
|
|
|
36 /**
|
|
|
|
|
37 * \brief Assert function
|
|
|
|
|
38 */
|
|
|
|
|
39 void assert(const bool condition, const char *const file, const int line)
|
|
|
|
|
40 {
|
|
|
|
|
41 if (!(condition)) {
|
|
|
|
|
42 __asm("BKPT #0");
|
|
|
|
|
43 }
|
|
|
|
|
44 (void)file;
|
|
|
|
|
45 (void)line;
|
|
|
|
|
46 }
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x000028f8 in assert+0 at ../hal/utils/src/utils_assert.c:41
|
|
|
|
|
[1] from 0x00001626 in _spi_m_sync_io_write+22 at ../hal/src/hal_spi_m_sync.c:163
|
|
|
|
|
[2] from 0x00001686 in spi_m_sync_io_write+6 at ../hal/src/hal_spi_m_sync.c:202
|
|
|
|
|
[3] from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:476
|
|
|
|
|
[4] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[5] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[6] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[7] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x000028f8 in assert+0 at ../hal/utils/src/utils_assert.c:41
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg condition = true, file = 0x4e8a "../hal/src/hal_spi_m_sync.c": 46 '.', line = 163
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
45 (void)line;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x000028f8 assert+0 cbnz r0, 0x28fc <assert+4>
|
|
|
|
|
0x000028fa assert+2 bkpt 0x0000
|
|
|
|
|
0x000028fc assert+4 bx lr
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x00004e8a r2 0x000000a3 r3 0x000028f9 r4 0x20000578 r5 0x00000001
|
|
|
|
|
r6 0x2001056f r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010548 lr 0x00001627 pc 0x000028fc xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010548 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
35
|
|
|
|
|
36 /**
|
|
|
|
|
37 * \brief Assert function
|
|
|
|
|
38 */
|
|
|
|
|
39 void assert(const bool condition, const char *const file, const int line)
|
|
|
|
|
40 {
|
|
|
|
|
41 if (!(condition)) {
|
|
|
|
|
42 __asm("BKPT #0");
|
|
|
|
|
43 }
|
|
|
|
|
44 (void)file;
|
|
|
|
|
45 (void)line;
|
|
|
|
|
46 }
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x000028fc in assert+4 at ../hal/utils/src/utils_assert.c:45
|
|
|
|
|
[1] from 0x00001626 in _spi_m_sync_io_write+22 at ../hal/src/hal_spi_m_sync.c:163
|
|
|
|
|
[2] from 0x00001686 in spi_m_sync_io_write+6 at ../hal/src/hal_spi_m_sync.c:202
|
|
|
|
|
[3] from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:476
|
|
|
|
|
[4] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[5] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[6] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[7] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x000028fc in assert+4 at ../hal/utils/src/utils_assert.c:45
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg condition = true, file = 0x4e8a "../hal/src/hal_spi_m_sync.c": 46 '.', line = 163
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
_spi_m_sync_io_write (io=io@entry=0x20000578 <SPI_0+12>, buf=buf@entry=0x2001056f "\377\230\002", length=<optimized out>) at ../hal/src/hal_spi_m_sync.c:168
|
|
|
|
|
168 xfer.rxbuf = 0;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x0000161c _spi_m_sync_io_write+12 mov r5, r2
|
|
|
|
|
0x0000161e _spi_m_sync_io_write+14 ldr r1, [pc, #28] ; (0x163c <_spi_m_sync_io_write+44>)
|
|
|
|
|
0x00001620 _spi_m_sync_io_write+16 ldr r3, [pc, #28] ; (0x1640 <_spi_m_sync_io_write+48>)
|
|
|
|
|
0x00001622 _spi_m_sync_io_write+18 movs r2, #163 ; 0xa3
|
|
|
|
|
0x00001624 _spi_m_sync_io_write+20 blx r3
|
|
|
|
|
0x00001626 _spi_m_sync_io_write+22 movs r3, #0
|
|
|
|
|
0x00001628 _spi_m_sync_io_write+24 strd r6, r3, [sp, #4]
|
|
|
|
|
0x0000162c _spi_m_sync_io_write+28 add r1, sp, #4
|
|
|
|
|
0x0000162e _spi_m_sync_io_write+30 ldr r3, [pc, #20] ; (0x1644 <_spi_m_sync_io_write+52>)
|
|
|
|
|
0x00001630 _spi_m_sync_io_write+32 str r5, [sp, #12]
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x00004e8a r2 0x000000a3 r3 0x000028f9 r4 0x20000578 r5 0x00000001
|
|
|
|
|
r6 0x2001056f r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010548 lr 0x00001627 pc 0x00001626 xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010548 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
158 * \retval size Success.
|
|
|
|
|
159 * \retval >=0 Timeout, with number of characters transferred.
|
|
|
|
|
160 */
|
|
|
|
|
161 static int32_t _spi_m_sync_io_write(struct io_descriptor *const io, const uint8_t *const buf, const uint16_t length)
|
|
|
|
|
162 {
|
|
|
|
|
163 ASSERT(io);
|
|
|
|
|
164
|
|
|
|
|
165 struct spi_m_sync_descriptor *spi = CONTAINER_OF(io, struct spi_m_sync_descriptor, io);
|
|
|
|
|
166 struct spi_xfer xfer;
|
|
|
|
|
167
|
|
|
|
|
168 xfer.rxbuf = 0;
|
|
|
|
|
169 xfer.txbuf = (uint8_t *)buf;
|
|
|
|
|
170 xfer.size = length;
|
|
|
|
|
171
|
|
|
|
|
172 return spi_m_sync_transfer(spi, &xfer);
|
|
|
|
|
173 }
|
|
|
|
|
174
|
|
|
|
|
175 int32_t spi_m_sync_transfer(struct spi_m_sync_descriptor *spi, const struct spi_xfer *p_xfer)
|
|
|
|
|
176 {
|
|
|
|
|
177 struct spi_msg msg;
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00001626 in _spi_m_sync_io_write+22 at ../hal/src/hal_spi_m_sync.c:168
|
|
|
|
|
[1] from 0x00001686 in spi_m_sync_io_write+6 at ../hal/src/hal_spi_m_sync.c:202
|
|
|
|
|
[2] from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:476
|
|
|
|
|
[3] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[4] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[5] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[6] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00001626 in _spi_m_sync_io_write+22 at ../hal/src/hal_spi_m_sync.c:168
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg io = 0x20000578 <SPI_0+12>: {write = 0x1611 <_spi_m_sync_io_write>,read = 0x1649 <_spi_m_sync_…, buf = 0x2001056f "\377\230\002": 255 '\377', length = <optimized out>
|
|
|
|
|
loc spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, xfer = {txbuf = 0x2001056f "\377\230\002",rxbuf = 0x1 <exception_table> "\005\001 \251>",size = 5649}
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
170 xfer.size = length;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00001620 _spi_m_sync_io_write+16 ldr r3, [pc, #28] ; (0x1640 <_spi_m_sync_io_write+48>)
|
|
|
|
|
0x00001622 _spi_m_sync_io_write+18 movs r2, #163 ; 0xa3
|
|
|
|
|
0x00001624 _spi_m_sync_io_write+20 blx r3
|
|
|
|
|
0x00001626 _spi_m_sync_io_write+22 movs r3, #0
|
|
|
|
|
0x00001628 _spi_m_sync_io_write+24 strd r6, r3, [sp, #4]
|
|
|
|
|
0x0000162c _spi_m_sync_io_write+28 add r1, sp, #4
|
|
|
|
|
0x0000162e _spi_m_sync_io_write+30 ldr r3, [pc, #20] ; (0x1644 <_spi_m_sync_io_write+52>)
|
|
|
|
|
0x00001630 _spi_m_sync_io_write+32 str r5, [sp, #12]
|
|
|
|
|
0x00001632 _spi_m_sync_io_write+34 sub.w r0, r4, #12
|
|
|
|
|
0x00001636 _spi_m_sync_io_write+38 blx r3
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x00004e8a r2 0x000000a3 r3 0x00000000 r4 0x20000578 r5 0x00000001
|
|
|
|
|
r6 0x2001056f r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010548 lr 0x00001627 pc 0x0000162c xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010548 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
160 */
|
|
|
|
|
161 static int32_t _spi_m_sync_io_write(struct io_descriptor *const io, const uint8_t *const buf, const uint16_t length)
|
|
|
|
|
162 {
|
|
|
|
|
163 ASSERT(io);
|
|
|
|
|
164
|
|
|
|
|
165 struct spi_m_sync_descriptor *spi = CONTAINER_OF(io, struct spi_m_sync_descriptor, io);
|
|
|
|
|
166 struct spi_xfer xfer;
|
|
|
|
|
167
|
|
|
|
|
168 xfer.rxbuf = 0;
|
|
|
|
|
169 xfer.txbuf = (uint8_t *)buf;
|
|
|
|
|
170 xfer.size = length;
|
|
|
|
|
171
|
|
|
|
|
172 return spi_m_sync_transfer(spi, &xfer);
|
|
|
|
|
173 }
|
|
|
|
|
174
|
|
|
|
|
175 int32_t spi_m_sync_transfer(struct spi_m_sync_descriptor *spi, const struct spi_xfer *p_xfer)
|
|
|
|
|
176 {
|
|
|
|
|
177 struct spi_msg msg;
|
|
|
|
|
178
|
|
|
|
|
179 ASSERT(spi && p_xfer);
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000162c in _spi_m_sync_io_write+28 at ../hal/src/hal_spi_m_sync.c:170
|
|
|
|
|
[1] from 0x00001686 in spi_m_sync_io_write+6 at ../hal/src/hal_spi_m_sync.c:202
|
|
|
|
|
[2] from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:476
|
|
|
|
|
[3] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[4] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[5] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[6] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000162c in _spi_m_sync_io_write+28 at ../hal/src/hal_spi_m_sync.c:170
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg io = 0x20000578 <SPI_0+12>: {write = 0x1611 <_spi_m_sync_io_write>,read = 0x1649 <_spi_m_sync_…, buf = 0x2001056f "\377\230\002": 255 '\377', length = <optimized out>
|
|
|
|
|
loc spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, xfer = {txbuf = 0x2001056f "\377\230\002",rxbuf = 0x0 <exception_table>,size = 5649}
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
172 return spi_m_sync_transfer(spi, &xfer);
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00001626 _spi_m_sync_io_write+22 movs r3, #0
|
|
|
|
|
0x00001628 _spi_m_sync_io_write+24 strd r6, r3, [sp, #4]
|
|
|
|
|
0x0000162c _spi_m_sync_io_write+28 add r1, sp, #4
|
|
|
|
|
0x0000162e _spi_m_sync_io_write+30 ldr r3, [pc, #20] ; (0x1644 <_spi_m_sync_io_write+52>)
|
|
|
|
|
0x00001630 _spi_m_sync_io_write+32 str r5, [sp, #12]
|
|
|
|
|
0x00001632 _spi_m_sync_io_write+34 sub.w r0, r4, #12
|
|
|
|
|
0x00001636 _spi_m_sync_io_write+38 blx r3
|
|
|
|
|
0x00001638 _spi_m_sync_io_write+40 add sp, #16
|
|
|
|
|
0x0000163a _spi_m_sync_io_write+42 pop {r4, r5, r6, pc}
|
|
|
|
|
0x0000163c _spi_m_sync_io_write+44 ldr r6, [pc, #552] ; (0x1868 <_usb_h_in_req+112>)
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x2001054c r2 0x000000a3 r3 0x000015d5 r4 0x20000578 r5 0x00000001
|
|
|
|
|
r6 0x2001056f r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010548 lr 0x00001627 pc 0x00001632 xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010548 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
162 {
|
|
|
|
|
163 ASSERT(io);
|
|
|
|
|
164
|
|
|
|
|
165 struct spi_m_sync_descriptor *spi = CONTAINER_OF(io, struct spi_m_sync_descriptor, io);
|
|
|
|
|
166 struct spi_xfer xfer;
|
|
|
|
|
167
|
|
|
|
|
168 xfer.rxbuf = 0;
|
|
|
|
|
169 xfer.txbuf = (uint8_t *)buf;
|
|
|
|
|
170 xfer.size = length;
|
|
|
|
|
171
|
|
|
|
|
172 return spi_m_sync_transfer(spi, &xfer);
|
|
|
|
|
173 }
|
|
|
|
|
174
|
|
|
|
|
175 int32_t spi_m_sync_transfer(struct spi_m_sync_descriptor *spi, const struct spi_xfer *p_xfer)
|
|
|
|
|
176 {
|
|
|
|
|
177 struct spi_msg msg;
|
|
|
|
|
178
|
|
|
|
|
179 ASSERT(spi && p_xfer);
|
|
|
|
|
180
|
|
|
|
|
181 msg.txbuf = p_xfer->txbuf;
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00001632 in _spi_m_sync_io_write+34 at ../hal/src/hal_spi_m_sync.c:172
|
|
|
|
|
[1] from 0x00001686 in spi_m_sync_io_write+6 at ../hal/src/hal_spi_m_sync.c:202
|
|
|
|
|
[2] from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:476
|
|
|
|
|
[3] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[4] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[5] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[6] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00001632 in _spi_m_sync_io_write+34 at ../hal/src/hal_spi_m_sync.c:172
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg io = 0x20000578 <SPI_0+12>: {write = 0x1611 <_spi_m_sync_io_write>,read = 0x1649 <_spi_m_sync_…, buf = 0x2001056f "\377\230\002": 255 '\377', length = <optimized out>
|
|
|
|
|
loc spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, xfer = {txbuf = 0x2001056f "\377\230\002",rxbuf = 0x0 <exception_table>,size = 1}
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
spi_m_sync_transfer (spi=spi@entry=0x2000056c <SPI_0>, p_xfer=p_xfer@entry=0x2001054c) at ../hal/src/hal_spi_m_sync.c:179
|
|
|
|
|
179 ASSERT(spi && p_xfer);
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x000015d4 spi_m_sync_transfer+0 push {r4, r5, lr}
|
|
|
|
|
0x000015d6 spi_m_sync_transfer+2 mov r4, r1
|
|
|
|
|
0x000015d8 spi_m_sync_transfer+4 sub sp, #20
|
|
|
|
|
0x000015da spi_m_sync_transfer+6 mov r5, r0
|
|
|
|
|
0x000015dc spi_m_sync_transfer+8 cbz r0, 0x15e4 <spi_m_sync_transfer+16>
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x2000056c r1 0x2001054c r2 0x000000a3 r3 0x000015d5 r4 0x20000578 r5 0x00000001
|
|
|
|
|
r6 0x2001056f r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010548 lr 0x00001639 pc 0x000015d4 xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010548 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
169 xfer.txbuf = (uint8_t *)buf;
|
|
|
|
|
170 xfer.size = length;
|
|
|
|
|
171
|
|
|
|
|
172 return spi_m_sync_transfer(spi, &xfer);
|
|
|
|
|
173 }
|
|
|
|
|
174
|
|
|
|
|
175 int32_t spi_m_sync_transfer(struct spi_m_sync_descriptor *spi, const struct spi_xfer *p_xfer)
|
|
|
|
|
176 {
|
|
|
|
|
177 struct spi_msg msg;
|
|
|
|
|
178
|
|
|
|
|
179 ASSERT(spi && p_xfer);
|
|
|
|
|
180
|
|
|
|
|
181 msg.txbuf = p_xfer->txbuf;
|
|
|
|
|
182 msg.rxbuf = p_xfer->rxbuf;
|
|
|
|
|
183 msg.size = p_xfer->size;
|
|
|
|
|
184 return _spi_m_sync_trans(&spi->dev, &msg);
|
|
|
|
|
185 }
|
|
|
|
|
186
|
|
|
|
|
187 int32_t spi_m_sync_get_io_descriptor(struct spi_m_sync_descriptor *const spi, struct io_descriptor **io)
|
|
|
|
|
188 {
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x000015d4 in spi_m_sync_transfer+0 at ../hal/src/hal_spi_m_sync.c:179
|
|
|
|
|
[1] from 0x00001638 in _spi_m_sync_io_write+40 at ../hal/src/hal_spi_m_sync.c:172
|
|
|
|
|
[2] from 0x00001686 in spi_m_sync_io_write+6 at ../hal/src/hal_spi_m_sync.c:202
|
|
|
|
|
[3] from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:476
|
|
|
|
|
[4] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[5] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[6] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[7] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x000015d4 in spi_m_sync_transfer+0 at ../hal/src/hal_spi_m_sync.c:179
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, p_xfer = 0x2001054c: {txbuf = 0x2001056f "\377\230\002",rxbuf = 0x0 <exception_table>,size = 1}
|
|
|
|
|
loc msg = {txbuf = 0x0 <exception_table>,rxbuf = 0x0 <exception_table>,size = 0}
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
assert (condition=true, file=file@entry=0x4e8a "../hal/src/hal_spi_m_sync.c", line=line@entry=179) at ../hal/utils/src/utils_assert.c:41
|
|
|
|
|
41 if (!(condition)) {
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x000028f8 assert+0 cbnz r0, 0x28fc <assert+4>
|
|
|
|
|
0x000028fa assert+2 bkpt 0x0000
|
|
|
|
|
0x000028fc assert+4 bx lr
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x00004e8a r2 0x000000b3 r3 0x000028f9 r4 0x2001054c r5 0x2000056c
|
|
|
|
|
r6 0x2001056f r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010528 lr 0x000015ed pc 0x000028f8 xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
31 *
|
|
|
|
|
32 */
|
|
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|
|
33
|
|
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|
|
34 #include <utils_assert.h>
|
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|
|
35
|
|
|
|
|
36 /**
|
|
|
|
|
37 * \brief Assert function
|
|
|
|
|
38 */
|
|
|
|
|
39 void assert(const bool condition, const char *const file, const int line)
|
|
|
|
|
40 {
|
|
|
|
|
41 if (!(condition)) {
|
|
|
|
|
42 __asm("BKPT #0");
|
|
|
|
|
43 }
|
|
|
|
|
44 (void)file;
|
|
|
|
|
45 (void)line;
|
|
|
|
|
46 }
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x000028f8 in assert+0 at ../hal/utils/src/utils_assert.c:41
|
|
|
|
|
[1] from 0x000015ec in spi_m_sync_transfer+24 at ../hal/src/hal_spi_m_sync.c:179
|
|
|
|
|
[2] from 0x00001638 in _spi_m_sync_io_write+40 at ../hal/src/hal_spi_m_sync.c:172
|
|
|
|
|
[3] from 0x00001686 in spi_m_sync_io_write+6 at ../hal/src/hal_spi_m_sync.c:202
|
|
|
|
|
[4] from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:476
|
|
|
|
|
[5] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[6] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[7] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[8] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x000028f8 in assert+0 at ../hal/utils/src/utils_assert.c:41
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg condition = true, file = 0x4e8a "../hal/src/hal_spi_m_sync.c": 46 '.', line = 179
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
45 (void)line;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x000028f8 assert+0 cbnz r0, 0x28fc <assert+4>
|
|
|
|
|
0x000028fa assert+2 bkpt 0x0000
|
|
|
|
|
0x000028fc assert+4 bx lr
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x00004e8a r2 0x000000b3 r3 0x000028f9 r4 0x2001054c r5 0x2000056c
|
|
|
|
|
r6 0x2001056f r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010528 lr 0x000015ed pc 0x000028fc xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
35
|
|
|
|
|
36 /**
|
|
|
|
|
37 * \brief Assert function
|
|
|
|
|
38 */
|
|
|
|
|
39 void assert(const bool condition, const char *const file, const int line)
|
|
|
|
|
40 {
|
|
|
|
|
41 if (!(condition)) {
|
|
|
|
|
42 __asm("BKPT #0");
|
|
|
|
|
43 }
|
|
|
|
|
44 (void)file;
|
|
|
|
|
45 (void)line;
|
|
|
|
|
46 }
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x000028fc in assert+4 at ../hal/utils/src/utils_assert.c:45
|
|
|
|
|
[1] from 0x000015ec in spi_m_sync_transfer+24 at ../hal/src/hal_spi_m_sync.c:179
|
|
|
|
|
[2] from 0x00001638 in _spi_m_sync_io_write+40 at ../hal/src/hal_spi_m_sync.c:172
|
|
|
|
|
[3] from 0x00001686 in spi_m_sync_io_write+6 at ../hal/src/hal_spi_m_sync.c:202
|
|
|
|
|
[4] from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:476
|
|
|
|
|
[5] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[6] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[7] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[8] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x000028fc in assert+4 at ../hal/utils/src/utils_assert.c:45
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg condition = true, file = 0x4e8a "../hal/src/hal_spi_m_sync.c": 46 '.', line = 179
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
spi_m_sync_transfer (spi=spi@entry=0x2000056c <SPI_0>, p_xfer=p_xfer@entry=0x2001054c) at ../hal/src/hal_spi_m_sync.c:181
|
|
|
|
|
181 msg.txbuf = p_xfer->txbuf;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x000015e2 spi_m_sync_transfer+14 movne r0, #1
|
|
|
|
|
0x000015e4 spi_m_sync_transfer+16 movs r2, #179 ; 0xb3
|
|
|
|
|
0x000015e6 spi_m_sync_transfer+18 ldr r1, [pc, #28] ; (0x1604 <spi_m_sync_transfer+48>)
|
|
|
|
|
0x000015e8 spi_m_sync_transfer+20 ldr r3, [pc, #28] ; (0x1608 <spi_m_sync_transfer+52>)
|
|
|
|
|
0x000015ea spi_m_sync_transfer+22 blx r3
|
|
|
|
|
0x000015ec spi_m_sync_transfer+24 ldr r3, [r4, #0]
|
|
|
|
|
0x000015ee spi_m_sync_transfer+26 str r3, [sp, #4]
|
|
|
|
|
0x000015f0 spi_m_sync_transfer+28 ldr r3, [r4, #4]
|
|
|
|
|
0x000015f2 spi_m_sync_transfer+30 str r3, [sp, #8]
|
|
|
|
|
0x000015f4 spi_m_sync_transfer+32 ldr r3, [r4, #8]
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x00004e8a r2 0x000000b3 r3 0x000028f9 r4 0x2001054c r5 0x2000056c
|
|
|
|
|
r6 0x2001056f r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010528 lr 0x000015ed pc 0x000015ec xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
171
|
|
|
|
|
172 return spi_m_sync_transfer(spi, &xfer);
|
|
|
|
|
173 }
|
|
|
|
|
174
|
|
|
|
|
175 int32_t spi_m_sync_transfer(struct spi_m_sync_descriptor *spi, const struct spi_xfer *p_xfer)
|
|
|
|
|
176 {
|
|
|
|
|
177 struct spi_msg msg;
|
|
|
|
|
178
|
|
|
|
|
179 ASSERT(spi && p_xfer);
|
|
|
|
|
180
|
|
|
|
|
181 msg.txbuf = p_xfer->txbuf;
|
|
|
|
|
182 msg.rxbuf = p_xfer->rxbuf;
|
|
|
|
|
183 msg.size = p_xfer->size;
|
|
|
|
|
184 return _spi_m_sync_trans(&spi->dev, &msg);
|
|
|
|
|
185 }
|
|
|
|
|
186
|
|
|
|
|
187 int32_t spi_m_sync_get_io_descriptor(struct spi_m_sync_descriptor *const spi, struct io_descriptor **io)
|
|
|
|
|
188 {
|
|
|
|
|
189 ASSERT(spi && io);
|
|
|
|
|
190 *io = &spi->io;
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x000015ec in spi_m_sync_transfer+24 at ../hal/src/hal_spi_m_sync.c:181
|
|
|
|
|
[1] from 0x00001638 in _spi_m_sync_io_write+40 at ../hal/src/hal_spi_m_sync.c:172
|
|
|
|
|
[2] from 0x00001686 in spi_m_sync_io_write+6 at ../hal/src/hal_spi_m_sync.c:202
|
|
|
|
|
[3] from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:476
|
|
|
|
|
[4] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[5] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[6] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[7] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x000015ec in spi_m_sync_transfer+24 at ../hal/src/hal_spi_m_sync.c:181
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, p_xfer = 0x2001054c: {txbuf = 0x2001056f "\377\230\002",rxbuf = 0x0 <exception_table>,size = 1}
|
|
|
|
|
loc msg = {txbuf = 0x0 <exception_table>,rxbuf = 0x0 <exception_table>,size = 0}
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
182 msg.rxbuf = p_xfer->rxbuf;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x000015e6 spi_m_sync_transfer+18 ldr r1, [pc, #28] ; (0x1604 <spi_m_sync_transfer+48>)
|
|
|
|
|
0x000015e8 spi_m_sync_transfer+20 ldr r3, [pc, #28] ; (0x1608 <spi_m_sync_transfer+52>)
|
|
|
|
|
0x000015ea spi_m_sync_transfer+22 blx r3
|
|
|
|
|
0x000015ec spi_m_sync_transfer+24 ldr r3, [r4, #0]
|
|
|
|
|
0x000015ee spi_m_sync_transfer+26 str r3, [sp, #4]
|
|
|
|
|
0x000015f0 spi_m_sync_transfer+28 ldr r3, [r4, #4]
|
|
|
|
|
0x000015f2 spi_m_sync_transfer+30 str r3, [sp, #8]
|
|
|
|
|
0x000015f4 spi_m_sync_transfer+32 ldr r3, [r4, #8]
|
|
|
|
|
0x000015f6 spi_m_sync_transfer+34 str r3, [sp, #12]
|
|
|
|
|
0x000015f8 spi_m_sync_transfer+36 add r1, sp, #4
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x00004e8a r2 0x000000b3 r3 0x2001056f r4 0x2001054c r5 0x2000056c
|
|
|
|
|
r6 0x2001056f r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010528 lr 0x000015ed pc 0x000015f0 xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
172 return spi_m_sync_transfer(spi, &xfer);
|
|
|
|
|
173 }
|
|
|
|
|
174
|
|
|
|
|
175 int32_t spi_m_sync_transfer(struct spi_m_sync_descriptor *spi, const struct spi_xfer *p_xfer)
|
|
|
|
|
176 {
|
|
|
|
|
177 struct spi_msg msg;
|
|
|
|
|
178
|
|
|
|
|
179 ASSERT(spi && p_xfer);
|
|
|
|
|
180
|
|
|
|
|
181 msg.txbuf = p_xfer->txbuf;
|
|
|
|
|
182 msg.rxbuf = p_xfer->rxbuf;
|
|
|
|
|
183 msg.size = p_xfer->size;
|
|
|
|
|
184 return _spi_m_sync_trans(&spi->dev, &msg);
|
|
|
|
|
185 }
|
|
|
|
|
186
|
|
|
|
|
187 int32_t spi_m_sync_get_io_descriptor(struct spi_m_sync_descriptor *const spi, struct io_descriptor **io)
|
|
|
|
|
188 {
|
|
|
|
|
189 ASSERT(spi && io);
|
|
|
|
|
190 *io = &spi->io;
|
|
|
|
|
191 return 0;
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x000015f0 in spi_m_sync_transfer+28 at ../hal/src/hal_spi_m_sync.c:182
|
|
|
|
|
[1] from 0x00001638 in _spi_m_sync_io_write+40 at ../hal/src/hal_spi_m_sync.c:172
|
|
|
|
|
[2] from 0x00001686 in spi_m_sync_io_write+6 at ../hal/src/hal_spi_m_sync.c:202
|
|
|
|
|
[3] from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:476
|
|
|
|
|
[4] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[5] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[6] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[7] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x000015f0 in spi_m_sync_transfer+28 at ../hal/src/hal_spi_m_sync.c:182
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, p_xfer = 0x2001054c: {txbuf = 0x2001056f "\377\230\002",rxbuf = 0x0 <exception_table>,size = 1}
|
|
|
|
|
loc msg = {txbuf = 0x2001056f "\377\230\002",rxbuf = 0x0 <exception_table>,size = 0}
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
183 msg.size = p_xfer->size;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x000015ea spi_m_sync_transfer+22 blx r3
|
|
|
|
|
0x000015ec spi_m_sync_transfer+24 ldr r3, [r4, #0]
|
|
|
|
|
0x000015ee spi_m_sync_transfer+26 str r3, [sp, #4]
|
|
|
|
|
0x000015f0 spi_m_sync_transfer+28 ldr r3, [r4, #4]
|
|
|
|
|
0x000015f2 spi_m_sync_transfer+30 str r3, [sp, #8]
|
|
|
|
|
0x000015f4 spi_m_sync_transfer+32 ldr r3, [r4, #8]
|
|
|
|
|
0x000015f6 spi_m_sync_transfer+34 str r3, [sp, #12]
|
|
|
|
|
0x000015f8 spi_m_sync_transfer+36 add r1, sp, #4
|
|
|
|
|
0x000015fa spi_m_sync_transfer+38 ldr r3, [pc, #16] ; (0x160c <spi_m_sync_transfer+56>)
|
|
|
|
|
0x000015fc spi_m_sync_transfer+40 adds r0, r5, #4
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x00004e8a r2 0x000000b3 r3 0x00000000 r4 0x2001054c r5 0x2000056c
|
|
|
|
|
r6 0x2001056f r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010528 lr 0x000015ed pc 0x000015f4 xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
173 }
|
|
|
|
|
174
|
|
|
|
|
175 int32_t spi_m_sync_transfer(struct spi_m_sync_descriptor *spi, const struct spi_xfer *p_xfer)
|
|
|
|
|
176 {
|
|
|
|
|
177 struct spi_msg msg;
|
|
|
|
|
178
|
|
|
|
|
179 ASSERT(spi && p_xfer);
|
|
|
|
|
180
|
|
|
|
|
181 msg.txbuf = p_xfer->txbuf;
|
|
|
|
|
182 msg.rxbuf = p_xfer->rxbuf;
|
|
|
|
|
183 msg.size = p_xfer->size;
|
|
|
|
|
184 return _spi_m_sync_trans(&spi->dev, &msg);
|
|
|
|
|
185 }
|
|
|
|
|
186
|
|
|
|
|
187 int32_t spi_m_sync_get_io_descriptor(struct spi_m_sync_descriptor *const spi, struct io_descriptor **io)
|
|
|
|
|
188 {
|
|
|
|
|
189 ASSERT(spi && io);
|
|
|
|
|
190 *io = &spi->io;
|
|
|
|
|
191 return 0;
|
|
|
|
|
192 }
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x000015f4 in spi_m_sync_transfer+32 at ../hal/src/hal_spi_m_sync.c:183
|
|
|
|
|
[1] from 0x00001638 in _spi_m_sync_io_write+40 at ../hal/src/hal_spi_m_sync.c:172
|
|
|
|
|
[2] from 0x00001686 in spi_m_sync_io_write+6 at ../hal/src/hal_spi_m_sync.c:202
|
|
|
|
|
[3] from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:476
|
|
|
|
|
[4] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[5] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[6] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[7] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x000015f4 in spi_m_sync_transfer+32 at ../hal/src/hal_spi_m_sync.c:183
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, p_xfer = 0x2001054c: {txbuf = 0x2001056f "\377\230\002",rxbuf = 0x0 <exception_table>,size = 1}
|
|
|
|
|
loc msg = {txbuf = 0x2001056f "\377\230\002",rxbuf = 0x0 <exception_table>,size = 0}
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
184 return _spi_m_sync_trans(&spi->dev, &msg);
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x000015ee spi_m_sync_transfer+26 str r3, [sp, #4]
|
|
|
|
|
0x000015f0 spi_m_sync_transfer+28 ldr r3, [r4, #4]
|
|
|
|
|
0x000015f2 spi_m_sync_transfer+30 str r3, [sp, #8]
|
|
|
|
|
0x000015f4 spi_m_sync_transfer+32 ldr r3, [r4, #8]
|
|
|
|
|
0x000015f6 spi_m_sync_transfer+34 str r3, [sp, #12]
|
|
|
|
|
0x000015f8 spi_m_sync_transfer+36 add r1, sp, #4
|
|
|
|
|
0x000015fa spi_m_sync_transfer+38 ldr r3, [pc, #16] ; (0x160c <spi_m_sync_transfer+56>)
|
|
|
|
|
0x000015fc spi_m_sync_transfer+40 adds r0, r5, #4
|
|
|
|
|
0x000015fe spi_m_sync_transfer+42 blx r3
|
|
|
|
|
0x00001600 spi_m_sync_transfer+44 add sp, #20
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x00004e8a r2 0x000000b3 r3 0x00000001 r4 0x2001054c r5 0x2000056c
|
|
|
|
|
r6 0x2001056f r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010528 lr 0x000015ed pc 0x000015f8 xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
174
|
|
|
|
|
175 int32_t spi_m_sync_transfer(struct spi_m_sync_descriptor *spi, const struct spi_xfer *p_xfer)
|
|
|
|
|
176 {
|
|
|
|
|
177 struct spi_msg msg;
|
|
|
|
|
178
|
|
|
|
|
179 ASSERT(spi && p_xfer);
|
|
|
|
|
180
|
|
|
|
|
181 msg.txbuf = p_xfer->txbuf;
|
|
|
|
|
182 msg.rxbuf = p_xfer->rxbuf;
|
|
|
|
|
183 msg.size = p_xfer->size;
|
|
|
|
|
184 return _spi_m_sync_trans(&spi->dev, &msg);
|
|
|
|
|
185 }
|
|
|
|
|
186
|
|
|
|
|
187 int32_t spi_m_sync_get_io_descriptor(struct spi_m_sync_descriptor *const spi, struct io_descriptor **io)
|
|
|
|
|
188 {
|
|
|
|
|
189 ASSERT(spi && io);
|
|
|
|
|
190 *io = &spi->io;
|
|
|
|
|
191 return 0;
|
|
|
|
|
192 }
|
|
|
|
|
193
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x000015f8 in spi_m_sync_transfer+36 at ../hal/src/hal_spi_m_sync.c:184
|
|
|
|
|
[1] from 0x00001638 in _spi_m_sync_io_write+40 at ../hal/src/hal_spi_m_sync.c:172
|
|
|
|
|
[2] from 0x00001686 in spi_m_sync_io_write+6 at ../hal/src/hal_spi_m_sync.c:202
|
|
|
|
|
[3] from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:476
|
|
|
|
|
[4] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[5] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[6] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[7] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x000015f8 in spi_m_sync_transfer+36 at ../hal/src/hal_spi_m_sync.c:184
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, p_xfer = 0x2001054c: {txbuf = 0x2001056f "\377\230\002",rxbuf = 0x0 <exception_table>,size = 1}
|
|
|
|
|
loc msg = {txbuf = 0x2001056f "\377\230\002",rxbuf = 0x0 <exception_table>,size = 1}
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
spi_m_sync_send_clock (spi=0x2000056c <SPI_0>) at ../sd_mmc/sd_mmc_spi.c:474
|
|
|
|
|
474 for(i = 0; i < 10; i++)
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x0000153e spi_m_sync_send_clock+14 movs r2, #1
|
|
|
|
|
0x00001540 spi_m_sync_send_clock+16 add.w r1, sp, #7
|
|
|
|
|
0x00001544 spi_m_sync_send_clock+20 mov r0, r5
|
|
|
|
|
0x00001546 spi_m_sync_send_clock+22 subs r4, #1
|
|
|
|
|
0x00001548 spi_m_sync_send_clock+24 blx r6
|
|
|
|
|
0x0000154a spi_m_sync_send_clock+26 ands.w r4, r4, #255 ; 0xff
|
|
|
|
|
0x0000154e spi_m_sync_send_clock+30 bne.n 0x153e <spi_m_sync_send_clock+14>
|
|
|
|
|
0x00001550 spi_m_sync_send_clock+32 add sp, #8
|
|
|
|
|
0x00001552 spi_m_sync_send_clock+34 pop {r4, r5, r6, pc}
|
|
|
|
|
0x00001554 spi_m_sync_send_clock+36 asrs r1, r0, #26
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0xffffffec r1 0x00000000 r2 0x00000000 r3 0x00003d99 r4 0x00000009 r5 0x2000056c
|
|
|
|
|
r6 0x00001681 r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010568 lr 0x00003dcb pc 0x0000154a xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010568 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
464 }
|
|
|
|
|
465
|
|
|
|
|
466
|
|
|
|
|
467 void spi_m_sync_send_clock(struct spi_m_sync_descriptor* spi)
|
|
|
|
|
468 {
|
|
|
|
|
469 uint8_t i;
|
|
|
|
|
470 uint8_t dummy = 0xFF;
|
|
|
|
|
471
|
|
|
|
|
472 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
|
|
|
|
473 // Send 80 cycles
|
|
|
|
|
474 for(i = 0; i < 10; i++)
|
|
|
|
|
475 {
|
|
|
|
|
476 spi_m_sync_io_write(spi, &dummy, 1); // 8 cycles
|
|
|
|
|
477 }
|
|
|
|
|
478 }
|
|
|
|
|
479
|
|
|
|
|
480 int32_t spi_m_sync_select_device(struct spi_m_sync_descriptor* spi, uint8_t slot, uint32_t clock, uint8_t bus_width, bool high_speed)
|
|
|
|
|
481 {
|
|
|
|
|
482 UNUSED(bus_width);
|
|
|
|
|
483 UNUSED(high_speed);
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:474
|
|
|
|
|
[1] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[2] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[3] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[4] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:474
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …
|
|
|
|
|
loc i = <optimized out>, dummy = 255 '\377'
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
476 spi_m_sync_io_write(spi, &dummy, 1); // 8 cycles
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00001532 spi_m_sync_send_clock+2 movs r3, #255 ; 0xff
|
|
|
|
|
0x00001534 spi_m_sync_send_clock+4 ldr r6, [pc, #28] ; (0x1554 <spi_m_sync_send_clock+36>)
|
|
|
|
|
0x00001536 spi_m_sync_send_clock+6 strb.w r3, [sp, #7]
|
|
|
|
|
0x0000153a spi_m_sync_send_clock+10 mov r5, r0
|
|
|
|
|
0x0000153c spi_m_sync_send_clock+12 movs r4, #10
|
|
|
|
|
0x0000153e spi_m_sync_send_clock+14 movs r2, #1
|
|
|
|
|
0x00001540 spi_m_sync_send_clock+16 add.w r1, sp, #7
|
|
|
|
|
0x00001544 spi_m_sync_send_clock+20 mov r0, r5
|
|
|
|
|
0x00001546 spi_m_sync_send_clock+22 subs r4, #1
|
|
|
|
|
0x00001548 spi_m_sync_send_clock+24 blx r6
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0xffffffec r1 0x00000000 r2 0x00000000 r3 0x00003d99 r4 0x00000009 r5 0x2000056c
|
|
|
|
|
r6 0x00001681 r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010568 lr 0x00003dcb pc 0x0000153e xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010568 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
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|
|
466
|
|
|
|
|
467 void spi_m_sync_send_clock(struct spi_m_sync_descriptor* spi)
|
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|
|
468 {
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|
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|
|
469 uint8_t i;
|
|
|
|
|
470 uint8_t dummy = 0xFF;
|
|
|
|
|
471
|
|
|
|
|
472 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
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|
|
473 // Send 80 cycles
|
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|
|
474 for(i = 0; i < 10; i++)
|
|
|
|
|
475 {
|
|
|
|
|
476 spi_m_sync_io_write(spi, &dummy, 1); // 8 cycles
|
|
|
|
|
477 }
|
|
|
|
|
478 }
|
|
|
|
|
479
|
|
|
|
|
480 int32_t spi_m_sync_select_device(struct spi_m_sync_descriptor* spi, uint8_t slot, uint32_t clock, uint8_t bus_width, bool high_speed)
|
|
|
|
|
481 {
|
|
|
|
|
482 UNUSED(bus_width);
|
|
|
|
|
483 UNUSED(high_speed);
|
|
|
|
|
484 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
|
|
|
|
485 PORT->Group[1].OUT.reg &= ~(1 << SPI_CS_PIN);
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000153e in spi_m_sync_send_clock+14 at ../sd_mmc/sd_mmc_spi.c:476
|
|
|
|
|
[1] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[2] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[3] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[4] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000153e in spi_m_sync_send_clock+14 at ../sd_mmc/sd_mmc_spi.c:476
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …
|
|
|
|
|
loc i = 1 '\001', dummy = 255 '\377'
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
474 for(i = 0; i < 10; i++)
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x0000153e spi_m_sync_send_clock+14 movs r2, #1
|
|
|
|
|
0x00001540 spi_m_sync_send_clock+16 add.w r1, sp, #7
|
|
|
|
|
0x00001544 spi_m_sync_send_clock+20 mov r0, r5
|
|
|
|
|
0x00001546 spi_m_sync_send_clock+22 subs r4, #1
|
|
|
|
|
0x00001548 spi_m_sync_send_clock+24 blx r6
|
|
|
|
|
0x0000154a spi_m_sync_send_clock+26 ands.w r4, r4, #255 ; 0xff
|
|
|
|
|
0x0000154e spi_m_sync_send_clock+30 bne.n 0x153e <spi_m_sync_send_clock+14>
|
|
|
|
|
0x00001550 spi_m_sync_send_clock+32 add sp, #8
|
|
|
|
|
0x00001552 spi_m_sync_send_clock+34 pop {r4, r5, r6, pc}
|
|
|
|
|
0x00001554 spi_m_sync_send_clock+36 asrs r1, r0, #26
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0xffffffec r1 0x00000000 r2 0x00000000 r3 0x00003d99 r4 0x00000008 r5 0x2000056c
|
|
|
|
|
r6 0x00001681 r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010568 lr 0x00003dcb pc 0x0000154a xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010568 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
464 }
|
|
|
|
|
465
|
|
|
|
|
466
|
|
|
|
|
467 void spi_m_sync_send_clock(struct spi_m_sync_descriptor* spi)
|
|
|
|
|
468 {
|
|
|
|
|
469 uint8_t i;
|
|
|
|
|
470 uint8_t dummy = 0xFF;
|
|
|
|
|
471
|
|
|
|
|
472 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
|
|
|
|
473 // Send 80 cycles
|
|
|
|
|
474 for(i = 0; i < 10; i++)
|
|
|
|
|
475 {
|
|
|
|
|
476 spi_m_sync_io_write(spi, &dummy, 1); // 8 cycles
|
|
|
|
|
477 }
|
|
|
|
|
478 }
|
|
|
|
|
479
|
|
|
|
|
480 int32_t spi_m_sync_select_device(struct spi_m_sync_descriptor* spi, uint8_t slot, uint32_t clock, uint8_t bus_width, bool high_speed)
|
|
|
|
|
481 {
|
|
|
|
|
482 UNUSED(bus_width);
|
|
|
|
|
483 UNUSED(high_speed);
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:474
|
|
|
|
|
[1] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[2] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[3] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[4] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:474
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …
|
|
|
|
|
loc i = <optimized out>, dummy = 255 '\377'
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
476 spi_m_sync_io_write(spi, &dummy, 1); // 8 cycles
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00001532 spi_m_sync_send_clock+2 movs r3, #255 ; 0xff
|
|
|
|
|
0x00001534 spi_m_sync_send_clock+4 ldr r6, [pc, #28] ; (0x1554 <spi_m_sync_send_clock+36>)
|
|
|
|
|
0x00001536 spi_m_sync_send_clock+6 strb.w r3, [sp, #7]
|
|
|
|
|
0x0000153a spi_m_sync_send_clock+10 mov r5, r0
|
|
|
|
|
0x0000153c spi_m_sync_send_clock+12 movs r4, #10
|
|
|
|
|
0x0000153e spi_m_sync_send_clock+14 movs r2, #1
|
|
|
|
|
0x00001540 spi_m_sync_send_clock+16 add.w r1, sp, #7
|
|
|
|
|
0x00001544 spi_m_sync_send_clock+20 mov r0, r5
|
|
|
|
|
0x00001546 spi_m_sync_send_clock+22 subs r4, #1
|
|
|
|
|
0x00001548 spi_m_sync_send_clock+24 blx r6
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0xffffffec r1 0x00000000 r2 0x00000000 r3 0x00003d99 r4 0x00000008 r5 0x2000056c
|
|
|
|
|
r6 0x00001681 r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010568 lr 0x00003dcb pc 0x0000153e xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010568 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
466
|
|
|
|
|
467 void spi_m_sync_send_clock(struct spi_m_sync_descriptor* spi)
|
|
|
|
|
468 {
|
|
|
|
|
469 uint8_t i;
|
|
|
|
|
470 uint8_t dummy = 0xFF;
|
|
|
|
|
471
|
|
|
|
|
472 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
|
|
|
|
473 // Send 80 cycles
|
|
|
|
|
474 for(i = 0; i < 10; i++)
|
|
|
|
|
475 {
|
|
|
|
|
476 spi_m_sync_io_write(spi, &dummy, 1); // 8 cycles
|
|
|
|
|
477 }
|
|
|
|
|
478 }
|
|
|
|
|
479
|
|
|
|
|
480 int32_t spi_m_sync_select_device(struct spi_m_sync_descriptor* spi, uint8_t slot, uint32_t clock, uint8_t bus_width, bool high_speed)
|
|
|
|
|
481 {
|
|
|
|
|
482 UNUSED(bus_width);
|
|
|
|
|
483 UNUSED(high_speed);
|
|
|
|
|
484 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
|
|
|
|
485 PORT->Group[1].OUT.reg &= ~(1 << SPI_CS_PIN);
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000153e in spi_m_sync_send_clock+14 at ../sd_mmc/sd_mmc_spi.c:476
|
|
|
|
|
[1] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[2] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[3] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[4] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000153e in spi_m_sync_send_clock+14 at ../sd_mmc/sd_mmc_spi.c:476
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …
|
|
|
|
|
loc i = 2 '\002', dummy = 255 '\377'
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
474 for(i = 0; i < 10; i++)
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x0000153e spi_m_sync_send_clock+14 movs r2, #1
|
|
|
|
|
0x00001540 spi_m_sync_send_clock+16 add.w r1, sp, #7
|
|
|
|
|
0x00001544 spi_m_sync_send_clock+20 mov r0, r5
|
|
|
|
|
0x00001546 spi_m_sync_send_clock+22 subs r4, #1
|
|
|
|
|
0x00001548 spi_m_sync_send_clock+24 blx r6
|
|
|
|
|
0x0000154a spi_m_sync_send_clock+26 ands.w r4, r4, #255 ; 0xff
|
|
|
|
|
0x0000154e spi_m_sync_send_clock+30 bne.n 0x153e <spi_m_sync_send_clock+14>
|
|
|
|
|
0x00001550 spi_m_sync_send_clock+32 add sp, #8
|
|
|
|
|
0x00001552 spi_m_sync_send_clock+34 pop {r4, r5, r6, pc}
|
|
|
|
|
0x00001554 spi_m_sync_send_clock+36 asrs r1, r0, #26
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0xffffffec r1 0x00000000 r2 0x00000000 r3 0x00003d99 r4 0x00000007 r5 0x2000056c
|
|
|
|
|
r6 0x00001681 r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010568 lr 0x00003dcb pc 0x0000154a xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010568 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
464 }
|
|
|
|
|
465
|
|
|
|
|
466
|
|
|
|
|
467 void spi_m_sync_send_clock(struct spi_m_sync_descriptor* spi)
|
|
|
|
|
468 {
|
|
|
|
|
469 uint8_t i;
|
|
|
|
|
470 uint8_t dummy = 0xFF;
|
|
|
|
|
471
|
|
|
|
|
472 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
|
|
|
|
473 // Send 80 cycles
|
|
|
|
|
474 for(i = 0; i < 10; i++)
|
|
|
|
|
475 {
|
|
|
|
|
476 spi_m_sync_io_write(spi, &dummy, 1); // 8 cycles
|
|
|
|
|
477 }
|
|
|
|
|
478 }
|
|
|
|
|
479
|
|
|
|
|
480 int32_t spi_m_sync_select_device(struct spi_m_sync_descriptor* spi, uint8_t slot, uint32_t clock, uint8_t bus_width, bool high_speed)
|
|
|
|
|
481 {
|
|
|
|
|
482 UNUSED(bus_width);
|
|
|
|
|
483 UNUSED(high_speed);
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:474
|
|
|
|
|
[1] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
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|
[2] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
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|
|
[3] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
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[4] from 0x00003520 in main+52 at ../main.c:15
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─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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|
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[1] id 0 from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:474
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─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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|
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arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …
|
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loc i = <optimized out>, dummy = 255 '\377'
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|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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476 spi_m_sync_io_write(spi, &dummy, 1); // 8 cycles
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─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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0x00001532 spi_m_sync_send_clock+2 movs r3, #255 ; 0xff
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0x00001534 spi_m_sync_send_clock+4 ldr r6, [pc, #28] ; (0x1554 <spi_m_sync_send_clock+36>)
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0x00001536 spi_m_sync_send_clock+6 strb.w r3, [sp, #7]
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0x0000153a spi_m_sync_send_clock+10 mov r5, r0
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0x0000153c spi_m_sync_send_clock+12 movs r4, #10
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0x0000153e spi_m_sync_send_clock+14 movs r2, #1
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0x00001540 spi_m_sync_send_clock+16 add.w r1, sp, #7
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0x00001544 spi_m_sync_send_clock+20 mov r0, r5
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0x00001546 spi_m_sync_send_clock+22 subs r4, #1
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0x00001548 spi_m_sync_send_clock+24 blx r6
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─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
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─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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|
|
$$0 = 23
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─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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r0 0xffffffec r1 0x00000000 r2 0x00000000 r3 0x00003d99 r4 0x00000007 r5 0x2000056c
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r6 0x00001681 r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
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r12 0x00000004 sp 0x20010568 lr 0x00003dcb pc 0x0000153e xPSR 0x21000000 fpscr 0x00000000
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msp 0x20010568 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
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─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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466
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467 void spi_m_sync_send_clock(struct spi_m_sync_descriptor* spi)
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468 {
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469 uint8_t i;
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470 uint8_t dummy = 0xFF;
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471
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472 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
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473 // Send 80 cycles
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474 for(i = 0; i < 10; i++)
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475 {
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476 spi_m_sync_io_write(spi, &dummy, 1); // 8 cycles
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477 }
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478 }
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479
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|
|
480 int32_t spi_m_sync_select_device(struct spi_m_sync_descriptor* spi, uint8_t slot, uint32_t clock, uint8_t bus_width, bool high_speed)
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|
|
481 {
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|
482 UNUSED(bus_width);
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|
483 UNUSED(high_speed);
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|
|
484 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
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|
|
485 PORT->Group[1].OUT.reg &= ~(1 << SPI_CS_PIN);
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|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000153e in spi_m_sync_send_clock+14 at ../sd_mmc/sd_mmc_spi.c:476
|
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|
|
[1] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
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|
|
[2] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
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|
|
[3] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
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[4] from 0x00003520 in main+52 at ../main.c:15
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|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000153e in spi_m_sync_send_clock+14 at ../sd_mmc/sd_mmc_spi.c:476
|
|
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|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …
|
|
|
|
|
loc i = 3 '\003', dummy = 255 '\377'
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
474 for(i = 0; i < 10; i++)
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
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|
|
0x0000153e spi_m_sync_send_clock+14 movs r2, #1
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|
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|
|
0x00001540 spi_m_sync_send_clock+16 add.w r1, sp, #7
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|
|
0x00001544 spi_m_sync_send_clock+20 mov r0, r5
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|
|
0x00001546 spi_m_sync_send_clock+22 subs r4, #1
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|
|
0x00001548 spi_m_sync_send_clock+24 blx r6
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|
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|
|
0x0000154a spi_m_sync_send_clock+26 ands.w r4, r4, #255 ; 0xff
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|
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|
|
0x0000154e spi_m_sync_send_clock+30 bne.n 0x153e <spi_m_sync_send_clock+14>
|
|
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|
|
0x00001550 spi_m_sync_send_clock+32 add sp, #8
|
|
|
|
|
0x00001552 spi_m_sync_send_clock+34 pop {r4, r5, r6, pc}
|
|
|
|
|
0x00001554 spi_m_sync_send_clock+36 asrs r1, r0, #26
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0xffffffec r1 0x00000000 r2 0x00000000 r3 0x00003d99 r4 0x00000006 r5 0x2000056c
|
|
|
|
|
r6 0x00001681 r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010568 lr 0x00003dcb pc 0x0000154a xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010568 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
464 }
|
|
|
|
|
465
|
|
|
|
|
466
|
|
|
|
|
467 void spi_m_sync_send_clock(struct spi_m_sync_descriptor* spi)
|
|
|
|
|
468 {
|
|
|
|
|
469 uint8_t i;
|
|
|
|
|
470 uint8_t dummy = 0xFF;
|
|
|
|
|
471
|
|
|
|
|
472 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
|
|
|
|
473 // Send 80 cycles
|
|
|
|
|
474 for(i = 0; i < 10; i++)
|
|
|
|
|
475 {
|
|
|
|
|
476 spi_m_sync_io_write(spi, &dummy, 1); // 8 cycles
|
|
|
|
|
477 }
|
|
|
|
|
478 }
|
|
|
|
|
479
|
|
|
|
|
480 int32_t spi_m_sync_select_device(struct spi_m_sync_descriptor* spi, uint8_t slot, uint32_t clock, uint8_t bus_width, bool high_speed)
|
|
|
|
|
481 {
|
|
|
|
|
482 UNUSED(bus_width);
|
|
|
|
|
483 UNUSED(high_speed);
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:474
|
|
|
|
|
[1] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[2] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[3] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[4] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:474
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …
|
|
|
|
|
loc i = <optimized out>, dummy = 255 '\377'
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
476 spi_m_sync_io_write(spi, &dummy, 1); // 8 cycles
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00001532 spi_m_sync_send_clock+2 movs r3, #255 ; 0xff
|
|
|
|
|
0x00001534 spi_m_sync_send_clock+4 ldr r6, [pc, #28] ; (0x1554 <spi_m_sync_send_clock+36>)
|
|
|
|
|
0x00001536 spi_m_sync_send_clock+6 strb.w r3, [sp, #7]
|
|
|
|
|
0x0000153a spi_m_sync_send_clock+10 mov r5, r0
|
|
|
|
|
0x0000153c spi_m_sync_send_clock+12 movs r4, #10
|
|
|
|
|
0x0000153e spi_m_sync_send_clock+14 movs r2, #1
|
|
|
|
|
0x00001540 spi_m_sync_send_clock+16 add.w r1, sp, #7
|
|
|
|
|
0x00001544 spi_m_sync_send_clock+20 mov r0, r5
|
|
|
|
|
0x00001546 spi_m_sync_send_clock+22 subs r4, #1
|
|
|
|
|
0x00001548 spi_m_sync_send_clock+24 blx r6
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0xffffffec r1 0x00000000 r2 0x00000000 r3 0x00003d99 r4 0x00000006 r5 0x2000056c
|
|
|
|
|
r6 0x00001681 r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010568 lr 0x00003dcb pc 0x0000153e xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010568 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
466
|
|
|
|
|
467 void spi_m_sync_send_clock(struct spi_m_sync_descriptor* spi)
|
|
|
|
|
468 {
|
|
|
|
|
469 uint8_t i;
|
|
|
|
|
470 uint8_t dummy = 0xFF;
|
|
|
|
|
471
|
|
|
|
|
472 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
|
|
|
|
473 // Send 80 cycles
|
|
|
|
|
474 for(i = 0; i < 10; i++)
|
|
|
|
|
475 {
|
|
|
|
|
476 spi_m_sync_io_write(spi, &dummy, 1); // 8 cycles
|
|
|
|
|
477 }
|
|
|
|
|
478 }
|
|
|
|
|
479
|
|
|
|
|
480 int32_t spi_m_sync_select_device(struct spi_m_sync_descriptor* spi, uint8_t slot, uint32_t clock, uint8_t bus_width, bool high_speed)
|
|
|
|
|
481 {
|
|
|
|
|
482 UNUSED(bus_width);
|
|
|
|
|
483 UNUSED(high_speed);
|
|
|
|
|
484 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
|
|
|
|
485 PORT->Group[1].OUT.reg &= ~(1 << SPI_CS_PIN);
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000153e in spi_m_sync_send_clock+14 at ../sd_mmc/sd_mmc_spi.c:476
|
|
|
|
|
[1] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[2] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[3] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[4] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000153e in spi_m_sync_send_clock+14 at ../sd_mmc/sd_mmc_spi.c:476
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …
|
|
|
|
|
loc i = 4 '\004', dummy = 255 '\377'
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
474 for(i = 0; i < 10; i++)
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x0000153e spi_m_sync_send_clock+14 movs r2, #1
|
|
|
|
|
0x00001540 spi_m_sync_send_clock+16 add.w r1, sp, #7
|
|
|
|
|
0x00001544 spi_m_sync_send_clock+20 mov r0, r5
|
|
|
|
|
0x00001546 spi_m_sync_send_clock+22 subs r4, #1
|
|
|
|
|
0x00001548 spi_m_sync_send_clock+24 blx r6
|
|
|
|
|
0x0000154a spi_m_sync_send_clock+26 ands.w r4, r4, #255 ; 0xff
|
|
|
|
|
0x0000154e spi_m_sync_send_clock+30 bne.n 0x153e <spi_m_sync_send_clock+14>
|
|
|
|
|
0x00001550 spi_m_sync_send_clock+32 add sp, #8
|
|
|
|
|
0x00001552 spi_m_sync_send_clock+34 pop {r4, r5, r6, pc}
|
|
|
|
|
0x00001554 spi_m_sync_send_clock+36 asrs r1, r0, #26
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0xffffffec r1 0x00000000 r2 0x00000000 r3 0x00003d99 r4 0x00000005 r5 0x2000056c
|
|
|
|
|
r6 0x00001681 r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010568 lr 0x00003dcb pc 0x0000154a xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010568 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
464 }
|
|
|
|
|
465
|
|
|
|
|
466
|
|
|
|
|
467 void spi_m_sync_send_clock(struct spi_m_sync_descriptor* spi)
|
|
|
|
|
468 {
|
|
|
|
|
469 uint8_t i;
|
|
|
|
|
470 uint8_t dummy = 0xFF;
|
|
|
|
|
471
|
|
|
|
|
472 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
|
|
|
|
473 // Send 80 cycles
|
|
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|
|
474 for(i = 0; i < 10; i++)
|
|
|
|
|
475 {
|
|
|
|
|
476 spi_m_sync_io_write(spi, &dummy, 1); // 8 cycles
|
|
|
|
|
477 }
|
|
|
|
|
478 }
|
|
|
|
|
479
|
|
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|
|
480 int32_t spi_m_sync_select_device(struct spi_m_sync_descriptor* spi, uint8_t slot, uint32_t clock, uint8_t bus_width, bool high_speed)
|
|
|
|
|
481 {
|
|
|
|
|
482 UNUSED(bus_width);
|
|
|
|
|
483 UNUSED(high_speed);
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:474
|
|
|
|
|
[1] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[2] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[3] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[4] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:474
|
|
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|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …
|
|
|
|
|
loc i = <optimized out>, dummy = 255 '\377'
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
Run till exit from #0 spi_m_sync_send_clock (spi=0x2000056c <SPI_0>) at ../sd_mmc/sd_mmc_spi.c:474
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
sd_mmc_spi_card_init () at ../sd_mmc/sd_mmc.c:362
|
|
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|
|
362 if (!driver_send_cmd(sd_mmc_hal, SDMMC_SPI_CMD0_GO_IDLE_STATE, 0)) {
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00000ab0 sd_mmc_spi_card_init+16 ldr r0, [pc, #552] ; (0xcdc <sd_mmc_check+600>)
|
|
|
|
|
0x00000ab2 sd_mmc_spi_card_init+18 blx r7
|
|
|
|
|
0x00000ab4 sd_mmc_spi_card_init+20 ldr r0, [r4, #8]
|
|
|
|
|
0x00000ab6 sd_mmc_spi_card_init+22 ldr r3, [pc, #552] ; (0xce0 <sd_mmc_check+604>)
|
|
|
|
|
0x00000ab8 sd_mmc_spi_card_init+24 blx r3
|
|
|
|
|
0x00000aba sd_mmc_spi_card_init+26 ldr r0, [r4, #8]
|
|
|
|
|
0x00000abc sd_mmc_spi_card_init+28 mov r2, r5
|
|
|
|
|
0x00000abe sd_mmc_spi_card_init+30 mov.w r1, #4352 ; 0x1100
|
|
|
|
|
0x00000ac2 sd_mmc_spi_card_init+34 blx r6
|
|
|
|
|
0x00000ac4 sd_mmc_spi_card_init+36 cmp r0, #0
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0xffffffec r1 0x00000000 r2 0x00000000 r3 0x00003d99 r4 0x20000298 r5 0x00000000
|
|
|
|
|
r6 0x000013cd r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010580 lr 0x00003dcb pc 0x00000aba xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010580 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
352 // In first, try to install SD/SDIO card
|
|
|
|
|
353 sd_mmc_card->type = CARD_TYPE_SD;
|
|
|
|
|
354 sd_mmc_card->version = CARD_VER_UNKNOWN;
|
|
|
|
|
355 sd_mmc_card->rca = 0;
|
|
|
|
|
356 sd_mmc_spi_debug("Start SD card install\n\r");
|
|
|
|
|
357
|
|
|
|
|
358 // Card need of 74 cycles clock minimum to start
|
|
|
|
|
359 driver_send_clock(sd_mmc_hal);
|
|
|
|
|
360
|
|
|
|
|
361 // CMD0 - Reset all cards to idle state.
|
|
|
|
|
362 if (!driver_send_cmd(sd_mmc_hal, SDMMC_SPI_CMD0_GO_IDLE_STATE, 0)) {
|
|
|
|
|
363 return false;
|
|
|
|
|
364 }
|
|
|
|
|
365 if (!sd_cmd8(&v2)) {
|
|
|
|
|
366 return false;
|
|
|
|
|
367 }
|
|
|
|
|
368 // Try to get the SDIO card's operating condition
|
|
|
|
|
369 if (!sdio_op_cond()) {
|
|
|
|
|
370 return false;
|
|
|
|
|
371 }
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[1] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[2] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[3] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
loc v2 = 0 '\000', sd_mmc_err = <optimized out>
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
spi_m_sync_send_cmd (spi=0x2000056c <SPI_0>, cmd=cmd@entry=4352, arg=arg@entry=0) at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
219 return spi_m_sync_adtc_start(spi, cmd, arg, 0, 0, false);
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x000013cc spi_m_sync_send_cmd+0 push {r0, r1, r4, lr}
|
|
|
|
|
0x000013ce spi_m_sync_send_cmd+2 movs r3, #0
|
|
|
|
|
0x000013d0 spi_m_sync_send_cmd+4 strd r3, r3, [sp]
|
|
|
|
|
0x000013d4 spi_m_sync_send_cmd+8 ldr r4, [pc, #4] ; (0x13dc <spi_m_sync_send_cmd+16>)
|
|
|
|
|
0x000013d6 spi_m_sync_send_cmd+10 blx r4
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x2000056c r1 0x00001100 r2 0x00000000 r3 0x00003d99 r4 0x20000298 r5 0x00000000
|
|
|
|
|
r6 0x000013cd r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010580 lr 0x00000ac5 pc 0x000013cc xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010580 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
209 uint8_t crc[2];
|
|
|
|
|
210 uint8_t dummy = 0xFF;
|
|
|
|
|
211 // Read 16-bit CRC (not cheked)
|
|
|
|
|
212 spi_m_sync_io_write(spi, &dummy, 1);
|
|
|
|
|
213 spi_m_sync_io_read(spi, crc, 2);
|
|
|
|
|
214 }
|
|
|
|
|
215
|
|
|
|
|
216 bool spi_m_sync_send_cmd(struct spi_m_sync_descriptor* spi, uint32_t cmd,
|
|
|
|
|
217 uint32_t arg)
|
|
|
|
|
218 {
|
|
|
|
|
219 return spi_m_sync_adtc_start(spi, cmd, arg, 0, 0, false);
|
|
|
|
|
220 }
|
|
|
|
|
221 bool spi_m_sync_adtc_start(struct spi_m_sync_descriptor* spi,
|
|
|
|
|
222 uint32_t cmd, uint32_t arg, uint16_t block_size,
|
|
|
|
|
223 uint16_t nb_block, bool access_block)
|
|
|
|
|
224 {
|
|
|
|
|
225 uint8_t dummy = 0xFF;
|
|
|
|
|
226 uint8_t cmd_token[6];
|
|
|
|
|
227 uint8_t ncr_timeout;
|
|
|
|
|
228 uint8_t r1;
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x000013cc in spi_m_sync_send_cmd+0 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[1] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[2] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[3] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[4] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x000013cc in spi_m_sync_send_cmd+0 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, cmd = 4352, arg = 0
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
spi_m_sync_adtc_start (spi=0x2000056c <SPI_0>, cmd=cmd@entry=4352, arg=arg@entry=0, block_size=block_size@entry=0, nb_block=nb_block@entry=0, access_block=access_block@entry=false) at ../sd_mmc/sd_mmc_spi.c:225
|
|
|
|
|
225 uint8_t dummy = 0xFF;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x000011f0 spi_m_sync_adtc_start+0 stmdb sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr}
|
|
|
|
|
0x000011f4 spi_m_sync_adtc_start+4 sub sp, #36 ; 0x24
|
|
|
|
|
0x000011f6 spi_m_sync_adtc_start+6 mov r7, r1
|
|
|
|
|
0x000011f8 spi_m_sync_adtc_start+8 str r3, [sp, #8]
|
|
|
|
|
0x000011fa spi_m_sync_adtc_start+10 movs r3, #255 ; 0xff
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x2000056c r1 0x00001100 r2 0x00000000 r3 0x00000000 r4 0x000011f1 r5 0x00000000
|
|
|
|
|
r6 0x000013cd r7 0x00003f61 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010570 lr 0x000013d9 pc 0x000011f0 xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010570 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
215
|
|
|
|
|
216 bool spi_m_sync_send_cmd(struct spi_m_sync_descriptor* spi, uint32_t cmd,
|
|
|
|
|
217 uint32_t arg)
|
|
|
|
|
218 {
|
|
|
|
|
219 return spi_m_sync_adtc_start(spi, cmd, arg, 0, 0, false);
|
|
|
|
|
220 }
|
|
|
|
|
221 bool spi_m_sync_adtc_start(struct spi_m_sync_descriptor* spi,
|
|
|
|
|
222 uint32_t cmd, uint32_t arg, uint16_t block_size,
|
|
|
|
|
223 uint16_t nb_block, bool access_block)
|
|
|
|
|
224 {
|
|
|
|
|
225 uint8_t dummy = 0xFF;
|
|
|
|
|
226 uint8_t cmd_token[6];
|
|
|
|
|
227 uint8_t ncr_timeout;
|
|
|
|
|
228 uint8_t r1;
|
|
|
|
|
229 uint8_t dummy2 = 0xFF;
|
|
|
|
|
230
|
|
|
|
|
231 (void)access_block;
|
|
|
|
|
232 assert(cmd & SDMMC_RESP_PRESENT, "No SD Card response was present...");
|
|
|
|
|
233 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
|
|
|
|
234
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x000011f0 in spi_m_sync_adtc_start+0 at ../sd_mmc/sd_mmc_spi.c:225
|
|
|
|
|
[1] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[2] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[3] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[4] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[5] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x000011f0 in spi_m_sync_adtc_start+0 at ../sd_mmc/sd_mmc_spi.c:225
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, cmd = 4352, arg = 0, block_size = 0, nb_block = 0, access_block = false
|
|
|
|
|
loc dummy = 5 '\005', cmd_token = "\001\000\000\000\071\026", ncr_timeout = <optimized out>, r1 = 0 '\000', dummy2 = 32 ' ', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
229 uint8_t dummy2 = 0xFF;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x000011fa spi_m_sync_adtc_start+10 movs r3, #255 ; 0xff
|
|
|
|
|
0x000011fc spi_m_sync_adtc_start+12 mov r6, r2
|
|
|
|
|
0x000011fe spi_m_sync_adtc_start+14 ldr r4, [pc, #400] ; (0x1390 <spi_m_sync_adtc_start+416>)
|
|
|
|
|
0x00001200 spi_m_sync_adtc_start+16 ldr r2, [pc, #400] ; (0x1394 <spi_m_sync_adtc_start+420>)
|
|
|
|
|
0x00001202 spi_m_sync_adtc_start+18 strb.w r3, [sp, #21]
|
|
|
|
|
0x00001206 spi_m_sync_adtc_start+22 strb.w r3, [sp, #23]
|
|
|
|
|
0x0000120a spi_m_sync_adtc_start+26 ldr r1, [pc, #396] ; (0x1398 <spi_m_sync_adtc_start+424>)
|
|
|
|
|
0x0000120c spi_m_sync_adtc_start+28 movs r3, #232 ; 0xe8
|
|
|
|
|
0x0000120e spi_m_sync_adtc_start+30 mov r5, r0
|
|
|
|
|
0x00001210 spi_m_sync_adtc_start+32 and.w r10, r7, #63 ; 0x3f
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
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|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x2000056c r1 0x00001100 r2 0x00004b6c r3 0x000000ff r4 0x00003ff5 r5 0x00000000
|
|
|
|
|
r6 0x00000000 r7 0x00001100 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010528 lr 0x000013d9 pc 0x00001206 xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
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|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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219 return spi_m_sync_adtc_start(spi, cmd, arg, 0, 0, false);
|
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|
|
220 }
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|
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|
|
221 bool spi_m_sync_adtc_start(struct spi_m_sync_descriptor* spi,
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222 uint32_t cmd, uint32_t arg, uint16_t block_size,
|
|
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|
|
223 uint16_t nb_block, bool access_block)
|
|
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|
|
224 {
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|
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225 uint8_t dummy = 0xFF;
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|
|
226 uint8_t cmd_token[6];
|
|
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|
227 uint8_t ncr_timeout;
|
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228 uint8_t r1;
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|
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229 uint8_t dummy2 = 0xFF;
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230
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231 (void)access_block;
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|
232 assert(cmd & SDMMC_RESP_PRESENT, "No SD Card response was present...");
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|
|
233 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
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234
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235 cmd_token[0] = SPI_CMD_ENCODE(SDMMC_CMD_GET_INDEX(cmd));
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236 cmd_token[1] = arg >> 24;
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237 cmd_token[2] = arg >> 16;
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238 cmd_token[3] = arg >> 8;
|
|
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|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00001206 in spi_m_sync_adtc_start+22 at ../sd_mmc/sd_mmc_spi.c:229
|
|
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|
|
[1] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
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|
|
[2] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
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|
|
[3] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[4] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[5] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00001206 in spi_m_sync_adtc_start+22 at ../sd_mmc/sd_mmc_spi.c:229
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, cmd = 4352, arg = 0, block_size = 0, nb_block = 0, access_block = false
|
|
|
|
|
loc dummy = 255 '\377', cmd_token = "\001\000\000\000\071\026", ncr_timeout = <optimized out>, r1 = 0 '\000', dummy2 = 32 ' ', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
232 assert(cmd & SDMMC_RESP_PRESENT, "No SD Card response was present...");
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x000011fc spi_m_sync_adtc_start+12 mov r6, r2
|
|
|
|
|
0x000011fe spi_m_sync_adtc_start+14 ldr r4, [pc, #400] ; (0x1390 <spi_m_sync_adtc_start+416>)
|
|
|
|
|
0x00001200 spi_m_sync_adtc_start+16 ldr r2, [pc, #400] ; (0x1394 <spi_m_sync_adtc_start+420>)
|
|
|
|
|
0x00001202 spi_m_sync_adtc_start+18 strb.w r3, [sp, #21]
|
|
|
|
|
0x00001206 spi_m_sync_adtc_start+22 strb.w r3, [sp, #23]
|
|
|
|
|
0x0000120a spi_m_sync_adtc_start+26 ldr r1, [pc, #396] ; (0x1398 <spi_m_sync_adtc_start+424>)
|
|
|
|
|
0x0000120c spi_m_sync_adtc_start+28 movs r3, #232 ; 0xe8
|
|
|
|
|
0x0000120e spi_m_sync_adtc_start+30 mov r5, r0
|
|
|
|
|
0x00001210 spi_m_sync_adtc_start+32 and.w r10, r7, #63 ; 0x3f
|
|
|
|
|
0x00001214 spi_m_sync_adtc_start+36 ubfx r0, r7, #8, #1
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x2000056c r1 0x00001100 r2 0x00004b6c r3 0x000000ff r4 0x00003ff5 r5 0x00000000
|
|
|
|
|
r6 0x00000000 r7 0x00001100 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010528 lr 0x000013d9 pc 0x0000120a xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
222 uint32_t cmd, uint32_t arg, uint16_t block_size,
|
|
|
|
|
223 uint16_t nb_block, bool access_block)
|
|
|
|
|
224 {
|
|
|
|
|
225 uint8_t dummy = 0xFF;
|
|
|
|
|
226 uint8_t cmd_token[6];
|
|
|
|
|
227 uint8_t ncr_timeout;
|
|
|
|
|
228 uint8_t r1;
|
|
|
|
|
229 uint8_t dummy2 = 0xFF;
|
|
|
|
|
230
|
|
|
|
|
231 (void)access_block;
|
|
|
|
|
232 assert(cmd & SDMMC_RESP_PRESENT, "No SD Card response was present...");
|
|
|
|
|
233 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
|
|
|
|
234
|
|
|
|
|
235 cmd_token[0] = SPI_CMD_ENCODE(SDMMC_CMD_GET_INDEX(cmd));
|
|
|
|
|
236 cmd_token[1] = arg >> 24;
|
|
|
|
|
237 cmd_token[2] = arg >> 16;
|
|
|
|
|
238 cmd_token[3] = arg >> 8;
|
|
|
|
|
239 cmd_token[4] = arg;
|
|
|
|
|
240 cmd_token[5] = spi_m_sync_crc7(cmd_token, 5);
|
|
|
|
|
241
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000120a in spi_m_sync_adtc_start+26 at ../sd_mmc/sd_mmc_spi.c:232
|
|
|
|
|
[1] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[2] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[3] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[4] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[5] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000120a in spi_m_sync_adtc_start+26 at ../sd_mmc/sd_mmc_spi.c:232
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, cmd = 4352, arg = 0, block_size = 0, nb_block = 0, access_block = false
|
|
|
|
|
loc dummy = 255 '\377', cmd_token = "\001\000\000\000\071\026", ncr_timeout = <optimized out>, r1 = 0 '\000', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
235 cmd_token[0] = SPI_CMD_ENCODE(SDMMC_CMD_GET_INDEX(cmd));
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x0000120c spi_m_sync_adtc_start+28 movs r3, #232 ; 0xe8
|
|
|
|
|
0x0000120e spi_m_sync_adtc_start+30 mov r5, r0
|
|
|
|
|
0x00001210 spi_m_sync_adtc_start+32 and.w r10, r7, #63 ; 0x3f
|
|
|
|
|
0x00001214 spi_m_sync_adtc_start+36 ubfx r0, r7, #8, #1
|
|
|
|
|
0x00001218 spi_m_sync_adtc_start+40 blx r4
|
|
|
|
|
0x0000121a spi_m_sync_adtc_start+42 orr.w r3, r10, #64 ; 0x40
|
|
|
|
|
0x0000121e spi_m_sync_adtc_start+46 strb.w r3, [sp, #24]
|
|
|
|
|
0x00001222 spi_m_sync_adtc_start+50 lsrs r3, r6, #24
|
|
|
|
|
0x00001224 spi_m_sync_adtc_start+52 strb.w r3, [sp, #25]
|
|
|
|
|
0x00001228 spi_m_sync_adtc_start+56 lsrs r3, r6, #16
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x000000e8 r2 0x00004b6c r3 0x000000e8 r4 0x00003ff5 r5 0x2000056c
|
|
|
|
|
r6 0x00000000 r7 0x00001100 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010528 lr 0x0000121b pc 0x0000121a xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
225 uint8_t dummy = 0xFF;
|
|
|
|
|
226 uint8_t cmd_token[6];
|
|
|
|
|
227 uint8_t ncr_timeout;
|
|
|
|
|
228 uint8_t r1;
|
|
|
|
|
229 uint8_t dummy2 = 0xFF;
|
|
|
|
|
230
|
|
|
|
|
231 (void)access_block;
|
|
|
|
|
232 assert(cmd & SDMMC_RESP_PRESENT, "No SD Card response was present...");
|
|
|
|
|
233 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
|
|
|
|
234
|
|
|
|
|
235 cmd_token[0] = SPI_CMD_ENCODE(SDMMC_CMD_GET_INDEX(cmd));
|
|
|
|
|
236 cmd_token[1] = arg >> 24;
|
|
|
|
|
237 cmd_token[2] = arg >> 16;
|
|
|
|
|
238 cmd_token[3] = arg >> 8;
|
|
|
|
|
239 cmd_token[4] = arg;
|
|
|
|
|
240 cmd_token[5] = spi_m_sync_crc7(cmd_token, 5);
|
|
|
|
|
241
|
|
|
|
|
242
|
|
|
|
|
243 // 8 cycles to respect Ncs timing
|
|
|
|
|
244 spi_m_sync_io_write(spi, &dummy, 1);
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000121a in spi_m_sync_adtc_start+42 at ../sd_mmc/sd_mmc_spi.c:235
|
|
|
|
|
[1] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[2] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[3] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[4] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[5] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000121a in spi_m_sync_adtc_start+42 at ../sd_mmc/sd_mmc_spi.c:235
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, cmd = 4352, arg = 0, block_size = 0, nb_block = 0, access_block = false
|
|
|
|
|
loc dummy = 255 '\377', cmd_token = "\001\000\000\000\071\026", ncr_timeout = <optimized out>, r1 = 0 '\000', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
236 cmd_token[1] = arg >> 24;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00001210 spi_m_sync_adtc_start+32 and.w r10, r7, #63 ; 0x3f
|
|
|
|
|
0x00001214 spi_m_sync_adtc_start+36 ubfx r0, r7, #8, #1
|
|
|
|
|
0x00001218 spi_m_sync_adtc_start+40 blx r4
|
|
|
|
|
0x0000121a spi_m_sync_adtc_start+42 orr.w r3, r10, #64 ; 0x40
|
|
|
|
|
0x0000121e spi_m_sync_adtc_start+46 strb.w r3, [sp, #24]
|
|
|
|
|
0x00001222 spi_m_sync_adtc_start+50 lsrs r3, r6, #24
|
|
|
|
|
0x00001224 spi_m_sync_adtc_start+52 strb.w r3, [sp, #25]
|
|
|
|
|
0x00001228 spi_m_sync_adtc_start+56 lsrs r3, r6, #16
|
|
|
|
|
0x0000122a spi_m_sync_adtc_start+58 strb.w r3, [sp, #26]
|
|
|
|
|
0x0000122e spi_m_sync_adtc_start+62 add.w r12, sp, #24
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x000000e8 r2 0x00004b6c r3 0x00000040 r4 0x00003ff5 r5 0x2000056c
|
|
|
|
|
r6 0x00000000 r7 0x00001100 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x20010528 lr 0x0000121b pc 0x00001222 xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
226 uint8_t cmd_token[6];
|
|
|
|
|
227 uint8_t ncr_timeout;
|
|
|
|
|
228 uint8_t r1;
|
|
|
|
|
229 uint8_t dummy2 = 0xFF;
|
|
|
|
|
230
|
|
|
|
|
231 (void)access_block;
|
|
|
|
|
232 assert(cmd & SDMMC_RESP_PRESENT, "No SD Card response was present...");
|
|
|
|
|
233 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
|
|
|
|
234
|
|
|
|
|
235 cmd_token[0] = SPI_CMD_ENCODE(SDMMC_CMD_GET_INDEX(cmd));
|
|
|
|
|
236 cmd_token[1] = arg >> 24;
|
|
|
|
|
237 cmd_token[2] = arg >> 16;
|
|
|
|
|
238 cmd_token[3] = arg >> 8;
|
|
|
|
|
239 cmd_token[4] = arg;
|
|
|
|
|
240 cmd_token[5] = spi_m_sync_crc7(cmd_token, 5);
|
|
|
|
|
241
|
|
|
|
|
242
|
|
|
|
|
243 // 8 cycles to respect Ncs timing
|
|
|
|
|
244 spi_m_sync_io_write(spi, &dummy, 1);
|
|
|
|
|
245 // send command
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00001222 in spi_m_sync_adtc_start+50 at ../sd_mmc/sd_mmc_spi.c:236
|
|
|
|
|
[1] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
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[2] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
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[3] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
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[4] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
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[5] from 0x00003520 in main+52 at ../main.c:15
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─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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[1] id 0 from 0x00001222 in spi_m_sync_adtc_start+50 at ../sd_mmc/sd_mmc_spi.c:236
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─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, cmd = 4352, arg = 0, block_size = 0, nb_block = 0, access_block = false
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loc dummy = 255 '\377', cmd_token = "@\000\000\000\071\026", ncr_timeout = <optimized out>, r1 = 0 '\000', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
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─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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237 cmd_token[2] = arg >> 16;
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─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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0x00001218 spi_m_sync_adtc_start+40 blx r4
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0x0000121a spi_m_sync_adtc_start+42 orr.w r3, r10, #64 ; 0x40
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0x0000121e spi_m_sync_adtc_start+46 strb.w r3, [sp, #24]
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0x00001222 spi_m_sync_adtc_start+50 lsrs r3, r6, #24
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0x00001224 spi_m_sync_adtc_start+52 strb.w r3, [sp, #25]
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0x00001228 spi_m_sync_adtc_start+56 lsrs r3, r6, #16
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0x0000122a spi_m_sync_adtc_start+58 strb.w r3, [sp, #26]
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0x0000122e spi_m_sync_adtc_start+62 add.w r12, sp, #24
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0x00001232 spi_m_sync_adtc_start+66 lsrs r3, r6, #8
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0x00001234 spi_m_sync_adtc_start+68 strb.w r3, [sp, #27]
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─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
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─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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$$0 = 23
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─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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r0 0x00000001 r1 0x000000e8 r2 0x00004b6c r3 0x00000000 r4 0x00003ff5 r5 0x2000056c
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r6 0x00000000 r7 0x00001100 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
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r12 0x00000004 sp 0x20010528 lr 0x0000121b pc 0x00001228 xPSR 0x41000000 fpscr 0x00000000
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msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
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─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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227 uint8_t ncr_timeout;
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228 uint8_t r1;
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229 uint8_t dummy2 = 0xFF;
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230
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231 (void)access_block;
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232 assert(cmd & SDMMC_RESP_PRESENT, "No SD Card response was present...");
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233 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
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234
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235 cmd_token[0] = SPI_CMD_ENCODE(SDMMC_CMD_GET_INDEX(cmd));
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236 cmd_token[1] = arg >> 24;
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237 cmd_token[2] = arg >> 16;
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238 cmd_token[3] = arg >> 8;
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239 cmd_token[4] = arg;
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240 cmd_token[5] = spi_m_sync_crc7(cmd_token, 5);
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241
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242
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243 // 8 cycles to respect Ncs timing
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244 spi_m_sync_io_write(spi, &dummy, 1);
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245 // send command
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246 spi_m_sync_io_write(spi, cmd_token, sizeof(cmd_token));
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─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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[0] from 0x00001228 in spi_m_sync_adtc_start+56 at ../sd_mmc/sd_mmc_spi.c:237
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[1] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
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[2] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
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[3] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
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[4] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
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[5] from 0x00003520 in main+52 at ../main.c:15
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─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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[1] id 0 from 0x00001228 in spi_m_sync_adtc_start+56 at ../sd_mmc/sd_mmc_spi.c:237
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─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, cmd = 4352, arg = 0, block_size = 0, nb_block = 0, access_block = false
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loc dummy = 255 '\377', cmd_token = "@\000\000\000\071\026", ncr_timeout = <optimized out>, r1 = 0 '\000', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
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─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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238 cmd_token[3] = arg >> 8;
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─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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0x0000121e spi_m_sync_adtc_start+46 strb.w r3, [sp, #24]
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0x00001222 spi_m_sync_adtc_start+50 lsrs r3, r6, #24
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0x00001224 spi_m_sync_adtc_start+52 strb.w r3, [sp, #25]
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0x00001228 spi_m_sync_adtc_start+56 lsrs r3, r6, #16
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0x0000122a spi_m_sync_adtc_start+58 strb.w r3, [sp, #26]
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0x0000122e spi_m_sync_adtc_start+62 add.w r12, sp, #24
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0x00001232 spi_m_sync_adtc_start+66 lsrs r3, r6, #8
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0x00001234 spi_m_sync_adtc_start+68 strb.w r3, [sp, #27]
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0x00001238 spi_m_sync_adtc_start+72 strb.w r6, [sp, #28]
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0x0000123c spi_m_sync_adtc_start+76 movs r2, #6
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─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
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─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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|
$$0 = 23
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|
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─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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|
|
r0 0x00000001 r1 0x000000e8 r2 0x00004b6c r3 0x00000000 r4 0x00003ff5 r5 0x2000056c
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r6 0x00000000 r7 0x00001100 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
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r12 0x00000004 sp 0x20010528 lr 0x0000121b pc 0x0000122e xPSR 0x41000000 fpscr 0x00000000
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msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
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─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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228 uint8_t r1;
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229 uint8_t dummy2 = 0xFF;
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230
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231 (void)access_block;
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232 assert(cmd & SDMMC_RESP_PRESENT, "No SD Card response was present...");
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233 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
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234
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235 cmd_token[0] = SPI_CMD_ENCODE(SDMMC_CMD_GET_INDEX(cmd));
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236 cmd_token[1] = arg >> 24;
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237 cmd_token[2] = arg >> 16;
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238 cmd_token[3] = arg >> 8;
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239 cmd_token[4] = arg;
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240 cmd_token[5] = spi_m_sync_crc7(cmd_token, 5);
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241
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242
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|
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243 // 8 cycles to respect Ncs timing
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244 spi_m_sync_io_write(spi, &dummy, 1);
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245 // send command
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246 spi_m_sync_io_write(spi, cmd_token, sizeof(cmd_token));
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247
|
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|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000122e in spi_m_sync_adtc_start+62 at ../sd_mmc/sd_mmc_spi.c:238
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|
|
[1] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
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[2] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
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[3] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
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[4] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
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[5] from 0x00003520 in main+52 at ../main.c:15
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|
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|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000122e in spi_m_sync_adtc_start+62 at ../sd_mmc/sd_mmc_spi.c:238
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|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, cmd = 4352, arg = 0, block_size = 0, nb_block = 0, access_block = false
|
|
|
|
|
loc dummy = 255 '\377', cmd_token = "@\000\000\000\071\026", ncr_timeout = <optimized out>, r1 = 0 '\000', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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|
|
239 cmd_token[4] = arg;
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|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
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|
|
0x00001228 spi_m_sync_adtc_start+56 lsrs r3, r6, #16
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0x0000122a spi_m_sync_adtc_start+58 strb.w r3, [sp, #26]
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0x0000122e spi_m_sync_adtc_start+62 add.w r12, sp, #24
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0x00001232 spi_m_sync_adtc_start+66 lsrs r3, r6, #8
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0x00001234 spi_m_sync_adtc_start+68 strb.w r3, [sp, #27]
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0x00001238 spi_m_sync_adtc_start+72 strb.w r6, [sp, #28]
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0x0000123c spi_m_sync_adtc_start+76 movs r2, #6
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0x0000123e spi_m_sync_adtc_start+78 movs r3, #0
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0x00001240 spi_m_sync_adtc_start+80 mov r4, r12
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0x00001242 spi_m_sync_adtc_start+82 subs r2, #1
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─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
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|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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|
|
$$0 = 23
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|
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|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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|
|
r0 0x00000001 r1 0x000000e8 r2 0x00004b6c r3 0x00000000 r4 0x00003ff5 r5 0x2000056c
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r6 0x00000000 r7 0x00001100 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
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r12 0x20010540 sp 0x20010528 lr 0x0000121b pc 0x00001238 xPSR 0x41000000 fpscr 0x00000000
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msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
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─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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229 uint8_t dummy2 = 0xFF;
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230
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231 (void)access_block;
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232 assert(cmd & SDMMC_RESP_PRESENT, "No SD Card response was present...");
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233 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
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234
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235 cmd_token[0] = SPI_CMD_ENCODE(SDMMC_CMD_GET_INDEX(cmd));
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236 cmd_token[1] = arg >> 24;
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237 cmd_token[2] = arg >> 16;
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238 cmd_token[3] = arg >> 8;
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239 cmd_token[4] = arg;
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240 cmd_token[5] = spi_m_sync_crc7(cmd_token, 5);
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241
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242
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|
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243 // 8 cycles to respect Ncs timing
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|
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244 spi_m_sync_io_write(spi, &dummy, 1);
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245 // send command
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246 spi_m_sync_io_write(spi, cmd_token, sizeof(cmd_token));
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247
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248 // Wait for response
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|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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|
|
|
|
[0] from 0x00001238 in spi_m_sync_adtc_start+72 at ../sd_mmc/sd_mmc_spi.c:239
|
|
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|
|
[1] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
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|
|
[2] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
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|
|
[3] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
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|
|
[4] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[5] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00001238 in spi_m_sync_adtc_start+72 at ../sd_mmc/sd_mmc_spi.c:239
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, cmd = 4352, arg = 0, block_size = 0, nb_block = 0, access_block = false
|
|
|
|
|
loc dummy = 255 '\377', cmd_token = "@\000\000\000\071\026", ncr_timeout = <optimized out>, r1 = 0 '\000', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
30 static uint8_t spi_m_sync_crc7(uint8_t * buf, uint8_t size)
|
|
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|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x0000122a spi_m_sync_adtc_start+58 strb.w r3, [sp, #26]
|
|
|
|
|
0x0000122e spi_m_sync_adtc_start+62 add.w r12, sp, #24
|
|
|
|
|
0x00001232 spi_m_sync_adtc_start+66 lsrs r3, r6, #8
|
|
|
|
|
0x00001234 spi_m_sync_adtc_start+68 strb.w r3, [sp, #27]
|
|
|
|
|
0x00001238 spi_m_sync_adtc_start+72 strb.w r6, [sp, #28]
|
|
|
|
|
0x0000123c spi_m_sync_adtc_start+76 movs r2, #6
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|
0x0000123e spi_m_sync_adtc_start+78 movs r3, #0
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0x00001240 spi_m_sync_adtc_start+80 mov r4, r12
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|
|
0x00001242 spi_m_sync_adtc_start+82 subs r2, #1
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|
|
0x00001244 spi_m_sync_adtc_start+84 ands.w r2, r2, #255 ; 0xff
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
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|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x000000e8 r2 0x00004b6c r3 0x00000000 r4 0x00003ff5 r5 0x2000056c
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|
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|
|
r6 0x00000000 r7 0x00001100 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
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|
|
r12 0x20010540 sp 0x20010528 lr 0x0000121b pc 0x0000123c xPSR 0x41000000 fpscr 0x00000000
|
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|
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|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
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|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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20
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21 // Current position (byte) of the transfer started by spi_m_sync_adtc_start()
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22 static uint32_t sd_mmc_spi_transfert_pos;
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23
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24 // Size block requested by last spi_m_sync_adtc_start()
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25 static uint16_t sd_mmc_spi_block_size;
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26
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27 // Total number of block requested by last spi_m_sync_adtc_start()
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28 static uint16_t sd_mmc_spi_nb_block;
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29
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30 static uint8_t spi_m_sync_crc7(uint8_t * buf, uint8_t size)
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31 {
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32 uint8_t crc, value, i;
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33
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34 crc = 0;
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35 while (size--) {
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36 value = *buf++;
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37 for (i = 0; i < 8; i++) {
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38 crc <<= 1;
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39 if ((value & 0x80) ^ (crc & 0x80)) {
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|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000123c in spi_m_sync_adtc_start+76 at ../sd_mmc/sd_mmc_spi.c:30
|
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|
|
[1] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
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|
|
[2] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
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|
[3] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
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|
[4] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
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|
[5] from 0x00003520 in main+52 at ../main.c:15
|
|
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|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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|
[1] id 0 from 0x0000123c in spi_m_sync_adtc_start+76 at ../sd_mmc/sd_mmc_spi.c:30
|
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|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, cmd = 4352, arg = 0, block_size = 0, nb_block = 0, access_block = false
|
|
|
|
|
loc dummy = 255 '\377', cmd_token = "@\000\000\000\000\026", ncr_timeout = <optimized out>, r1 = 0 '\000', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
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240 cmd_token[5] = spi_m_sync_crc7(cmd_token, 5);
|
|
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|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x0000122e spi_m_sync_adtc_start+62 add.w r12, sp, #24
|
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|
|
0x00001232 spi_m_sync_adtc_start+66 lsrs r3, r6, #8
|
|
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|
|
0x00001234 spi_m_sync_adtc_start+68 strb.w r3, [sp, #27]
|
|
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|
|
0x00001238 spi_m_sync_adtc_start+72 strb.w r6, [sp, #28]
|
|
|
|
|
0x0000123c spi_m_sync_adtc_start+76 movs r2, #6
|
|
|
|
|
0x0000123e spi_m_sync_adtc_start+78 movs r3, #0
|
|
|
|
|
0x00001240 spi_m_sync_adtc_start+80 mov r4, r12
|
|
|
|
|
0x00001242 spi_m_sync_adtc_start+82 subs r2, #1
|
|
|
|
|
0x00001244 spi_m_sync_adtc_start+84 ands.w r2, r2, #255 ; 0xff
|
|
|
|
|
0x00001248 spi_m_sync_adtc_start+88 bne.n 0x12ac <spi_m_sync_adtc_start+188>
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x000000e8 r2 0x00000006 r3 0x00000000 r4 0x00003ff5 r5 0x2000056c
|
|
|
|
|
r6 0x00000000 r7 0x00001100 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010540 sp 0x20010528 lr 0x0000121b pc 0x0000123e xPSR 0x01000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
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|
|
230
|
|
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|
|
231 (void)access_block;
|
|
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|
|
232 assert(cmd & SDMMC_RESP_PRESENT, "No SD Card response was present...");
|
|
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|
|
233 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
|
|
|
|
234
|
|
|
|
|
235 cmd_token[0] = SPI_CMD_ENCODE(SDMMC_CMD_GET_INDEX(cmd));
|
|
|
|
|
236 cmd_token[1] = arg >> 24;
|
|
|
|
|
237 cmd_token[2] = arg >> 16;
|
|
|
|
|
238 cmd_token[3] = arg >> 8;
|
|
|
|
|
239 cmd_token[4] = arg;
|
|
|
|
|
240 cmd_token[5] = spi_m_sync_crc7(cmd_token, 5);
|
|
|
|
|
241
|
|
|
|
|
242
|
|
|
|
|
243 // 8 cycles to respect Ncs timing
|
|
|
|
|
244 spi_m_sync_io_write(spi, &dummy, 1);
|
|
|
|
|
245 // send command
|
|
|
|
|
246 spi_m_sync_io_write(spi, cmd_token, sizeof(cmd_token));
|
|
|
|
|
247
|
|
|
|
|
248 // Wait for response
|
|
|
|
|
249 // Two retries will be done to manage the Ncr timing between command and response
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000123e in spi_m_sync_adtc_start+78 at ../sd_mmc/sd_mmc_spi.c:240
|
|
|
|
|
[1] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[2] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[3] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[4] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[5] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000123e in spi_m_sync_adtc_start+78 at ../sd_mmc/sd_mmc_spi.c:240
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, cmd = 4352, arg = 0, block_size = 0, nb_block = 0, access_block = false
|
|
|
|
|
loc dummy = 255 '\377', cmd_token = "@\000\000\000\000\026", ncr_timeout = <optimized out>, r1 = 0 '\000', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
|
|
|
|
|
Program received signal SIGINT, Interrupt.
|
|
|
|
|
0x000012ce in spi_m_sync_crc7 (size=2 '\002', buf=0x20010542 "") at ../sd_mmc/sd_mmc_spi.c:42
|
|
|
|
|
42 value <<= 1;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x000012be spi_m_sync_crc7+128 add.w r1, r1, #4294967295 ; 0xffffffff
|
|
|
|
|
0x000012c2 spi_m_sync_crc7+132 it ne
|
|
|
|
|
0x000012c4 spi_m_sync_crc7+134 eorne.w r3, r3, #9
|
|
|
|
|
0x000012c8 spi_m_sync_crc7+138 lsls r0, r0, #1
|
|
|
|
|
0x000012ca spi_m_sync_crc7+140 ands.w r1, r1, #255 ; 0xff
|
|
|
|
|
0x000012ce spi_m_sync_crc7+144 uxtb r0, r0
|
|
|
|
|
0x000012d0 spi_m_sync_crc7+146 bne.n 0x12b2 <spi_m_sync_adtc_start+194>
|
|
|
|
|
0x000012d2 spi_m_sync_crc7+148 b.n 0x1242 <spi_m_sync_adtc_start+82>
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000000 r1 0x00000003 r2 0x00000004 r3 0x00000058 r4 0x20010540 r5 0x2000056c
|
|
|
|
|
r6 0x00000000 r7 0x00001100 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010542 sp 0x20010528 lr 0x00000058 pc 0x000012ce xPSR 0x01000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
32 uint8_t crc, value, i;
|
|
|
|
|
33
|
|
|
|
|
34 crc = 0;
|
|
|
|
|
35 while (size--) {
|
|
|
|
|
36 value = *buf++;
|
|
|
|
|
37 for (i = 0; i < 8; i++) {
|
|
|
|
|
38 crc <<= 1;
|
|
|
|
|
39 if ((value & 0x80) ^ (crc & 0x80)) {
|
|
|
|
|
40 crc ^= 0x09;
|
|
|
|
|
41 }
|
|
|
|
|
42 value <<= 1;
|
|
|
|
|
43 }
|
|
|
|
|
44 }
|
|
|
|
|
45 crc = (crc << 1) | 1;
|
|
|
|
|
46 return crc;
|
|
|
|
|
47 }
|
|
|
|
|
48
|
|
|
|
|
49 static bool spi_m_sync_wait_busy(struct spi_m_sync_descriptor* spi)
|
|
|
|
|
50 {
|
|
|
|
|
51 uint8_t line = 0xFF;
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x000012ce in spi_m_sync_crc7+144 at ../sd_mmc/sd_mmc_spi.c:42
|
|
|
|
|
[1] from 0x000012ce in spi_m_sync_adtc_start+222 at ../sd_mmc/sd_mmc_spi.c:240
|
|
|
|
|
[2] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[3] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[4] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[5] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[6] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x000012ce in spi_m_sync_crc7+144 at ../sd_mmc/sd_mmc_spi.c:42
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg size = 2 '\002', buf = 0x20010542 "": 0 '\000'
|
|
|
|
|
loc crc = 88 'X', value = <optimized out>, i = <optimized out>, dummy = 255 '\377', cmd_token = "@\000\000\000\000\026", ncr_timeout = <optimized out>, r1 = 0 '\000', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
37 for (i = 0; i < 8; i++) {
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x000012c2 spi_m_sync_crc7+132 it ne
|
|
|
|
|
0x000012c4 spi_m_sync_crc7+134 eorne.w r3, r3, #9
|
|
|
|
|
0x000012c8 spi_m_sync_crc7+138 lsls r0, r0, #1
|
|
|
|
|
0x000012ca spi_m_sync_crc7+140 ands.w r1, r1, #255 ; 0xff
|
|
|
|
|
0x000012ce spi_m_sync_crc7+144 uxtb r0, r0
|
|
|
|
|
0x000012d0 spi_m_sync_crc7+146 bne.n 0x12b2 <spi_m_sync_adtc_start+194>
|
|
|
|
|
0x000012d2 spi_m_sync_crc7+148 b.n 0x1242 <spi_m_sync_adtc_start+82>
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000000 r1 0x00000003 r2 0x00000004 r3 0x00000058 r4 0x20010540 r5 0x2000056c
|
|
|
|
|
r6 0x00000000 r7 0x00001100 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010542 sp 0x20010528 lr 0x00000058 pc 0x000012d0 xPSR 0x01000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
27 // Total number of block requested by last spi_m_sync_adtc_start()
|
|
|
|
|
28 static uint16_t sd_mmc_spi_nb_block;
|
|
|
|
|
29
|
|
|
|
|
30 static uint8_t spi_m_sync_crc7(uint8_t * buf, uint8_t size)
|
|
|
|
|
31 {
|
|
|
|
|
32 uint8_t crc, value, i;
|
|
|
|
|
33
|
|
|
|
|
34 crc = 0;
|
|
|
|
|
35 while (size--) {
|
|
|
|
|
36 value = *buf++;
|
|
|
|
|
37 for (i = 0; i < 8; i++) {
|
|
|
|
|
38 crc <<= 1;
|
|
|
|
|
39 if ((value & 0x80) ^ (crc & 0x80)) {
|
|
|
|
|
40 crc ^= 0x09;
|
|
|
|
|
41 }
|
|
|
|
|
42 value <<= 1;
|
|
|
|
|
43 }
|
|
|
|
|
44 }
|
|
|
|
|
45 crc = (crc << 1) | 1;
|
|
|
|
|
46 return crc;
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x000012d0 in spi_m_sync_crc7+146 at ../sd_mmc/sd_mmc_spi.c:37
|
|
|
|
|
[1] from 0x000012d0 in spi_m_sync_adtc_start+224 at ../sd_mmc/sd_mmc_spi.c:240
|
|
|
|
|
[2] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[3] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[4] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[5] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[6] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x000012d0 in spi_m_sync_crc7+146 at ../sd_mmc/sd_mmc_spi.c:37
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg size = 2 '\002', buf = 0x20010542 "": 0 '\000'
|
|
|
|
|
loc crc = 88 'X', value = 0 '\000', i = <optimized out>, dummy = 255 '\377', cmd_token = "@\000\000\000\000\026", ncr_timeout = <optimized out>, r1 = 0 '\000', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
38 crc <<= 1;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x000012a6 spi_m_sync_crc7+104 ldr r5, [pc, #252] ; (0x13a4 <spi_m_sync_adtc_start+436>)
|
|
|
|
|
0x000012a8 spi_m_sync_crc7+106 blx r5
|
|
|
|
|
0x000012aa spi_m_sync_crc7+108 b.n 0x12f4 <spi_m_sync_adtc_start+260>
|
|
|
|
|
0x000012ac spi_m_sync_crc7+110 ldrb.w r0, [r12], #1
|
|
|
|
|
0x000012b0 spi_m_sync_crc7+114 movs r1, #8
|
|
|
|
|
0x000012b2 spi_m_sync_crc7+116 lsls r3, r3, #1
|
|
|
|
|
0x000012b4 spi_m_sync_crc7+118 uxtb r3, r3
|
|
|
|
|
0x000012b6 spi_m_sync_crc7+120 eor.w lr, r3, r0
|
|
|
|
|
0x000012ba spi_m_sync_crc7+124 tst.w lr, #128 ; 0x80
|
|
|
|
|
0x000012be spi_m_sync_crc7+128 add.w r1, r1, #4294967295 ; 0xffffffff
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000000 r1 0x00000003 r2 0x00000004 r3 0x00000058 r4 0x20010540 r5 0x2000056c
|
|
|
|
|
r6 0x00000000 r7 0x00001100 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010542 sp 0x20010528 lr 0x00000058 pc 0x000012b2 xPSR 0x01000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
28 static uint16_t sd_mmc_spi_nb_block;
|
|
|
|
|
29
|
|
|
|
|
30 static uint8_t spi_m_sync_crc7(uint8_t * buf, uint8_t size)
|
|
|
|
|
31 {
|
|
|
|
|
32 uint8_t crc, value, i;
|
|
|
|
|
33
|
|
|
|
|
34 crc = 0;
|
|
|
|
|
35 while (size--) {
|
|
|
|
|
36 value = *buf++;
|
|
|
|
|
37 for (i = 0; i < 8; i++) {
|
|
|
|
|
38 crc <<= 1;
|
|
|
|
|
39 if ((value & 0x80) ^ (crc & 0x80)) {
|
|
|
|
|
40 crc ^= 0x09;
|
|
|
|
|
41 }
|
|
|
|
|
42 value <<= 1;
|
|
|
|
|
43 }
|
|
|
|
|
44 }
|
|
|
|
|
45 crc = (crc << 1) | 1;
|
|
|
|
|
46 return crc;
|
|
|
|
|
47 }
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x000012b2 in spi_m_sync_crc7+116 at ../sd_mmc/sd_mmc_spi.c:38
|
|
|
|
|
[1] from 0x000012b2 in spi_m_sync_adtc_start+194 at ../sd_mmc/sd_mmc_spi.c:240
|
|
|
|
|
[2] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[3] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[4] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[5] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[6] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x000012b2 in spi_m_sync_crc7+116 at ../sd_mmc/sd_mmc_spi.c:38
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg size = 2 '\002', buf = 0x20010542 "": 0 '\000'
|
|
|
|
|
loc crc = 88 'X', value = 0 '\000', i = 5 '\005', dummy = 255 '\377', cmd_token = "@\000\000\000\000\026", ncr_timeout = <optimized out>, r1 = 0 '\000', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
39 if ((value & 0x80) ^ (crc & 0x80)) {
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x000012aa spi_m_sync_crc7+108 b.n 0x12f4 <spi_m_sync_adtc_start+260>
|
|
|
|
|
0x000012ac spi_m_sync_crc7+110 ldrb.w r0, [r12], #1
|
|
|
|
|
0x000012b0 spi_m_sync_crc7+114 movs r1, #8
|
|
|
|
|
0x000012b2 spi_m_sync_crc7+116 lsls r3, r3, #1
|
|
|
|
|
0x000012b4 spi_m_sync_crc7+118 uxtb r3, r3
|
|
|
|
|
0x000012b6 spi_m_sync_crc7+120 eor.w lr, r3, r0
|
|
|
|
|
0x000012ba spi_m_sync_crc7+124 tst.w lr, #128 ; 0x80
|
|
|
|
|
0x000012be spi_m_sync_crc7+128 add.w r1, r1, #4294967295 ; 0xffffffff
|
|
|
|
|
0x000012c2 spi_m_sync_crc7+132 it ne
|
|
|
|
|
0x000012c4 spi_m_sync_crc7+134 eorne.w r3, r3, #9
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000000 r1 0x00000003 r2 0x00000004 r3 0x000000b0 r4 0x20010540 r5 0x2000056c
|
|
|
|
|
r6 0x00000000 r7 0x00001100 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010542 sp 0x20010528 lr 0x00000058 pc 0x000012b6 xPSR 0x01000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
29
|
|
|
|
|
30 static uint8_t spi_m_sync_crc7(uint8_t * buf, uint8_t size)
|
|
|
|
|
31 {
|
|
|
|
|
32 uint8_t crc, value, i;
|
|
|
|
|
33
|
|
|
|
|
34 crc = 0;
|
|
|
|
|
35 while (size--) {
|
|
|
|
|
36 value = *buf++;
|
|
|
|
|
37 for (i = 0; i < 8; i++) {
|
|
|
|
|
38 crc <<= 1;
|
|
|
|
|
39 if ((value & 0x80) ^ (crc & 0x80)) {
|
|
|
|
|
40 crc ^= 0x09;
|
|
|
|
|
41 }
|
|
|
|
|
42 value <<= 1;
|
|
|
|
|
43 }
|
|
|
|
|
44 }
|
|
|
|
|
45 crc = (crc << 1) | 1;
|
|
|
|
|
46 return crc;
|
|
|
|
|
47 }
|
|
|
|
|
48
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x000012b6 in spi_m_sync_crc7+120 at ../sd_mmc/sd_mmc_spi.c:39
|
|
|
|
|
[1] from 0x000012b6 in spi_m_sync_adtc_start+198 at ../sd_mmc/sd_mmc_spi.c:240
|
|
|
|
|
[2] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[3] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[4] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[5] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[6] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x000012b6 in spi_m_sync_crc7+120 at ../sd_mmc/sd_mmc_spi.c:39
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg size = 2 '\002', buf = 0x20010542 "": 0 '\000'
|
|
|
|
|
loc crc = 176 '\260', value = 0 '\000', i = 5 '\005', dummy = 255 '\377', cmd_token = "@\000\000\000\000\026", ncr_timeout = <optimized out>, r1 = 0 '\000', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
40 crc ^= 0x09;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x000012b0 spi_m_sync_crc7+114 movs r1, #8
|
|
|
|
|
0x000012b2 spi_m_sync_crc7+116 lsls r3, r3, #1
|
|
|
|
|
0x000012b4 spi_m_sync_crc7+118 uxtb r3, r3
|
|
|
|
|
0x000012b6 spi_m_sync_crc7+120 eor.w lr, r3, r0
|
|
|
|
|
0x000012ba spi_m_sync_crc7+124 tst.w lr, #128 ; 0x80
|
|
|
|
|
0x000012be spi_m_sync_crc7+128 add.w r1, r1, #4294967295 ; 0xffffffff
|
|
|
|
|
0x000012c2 spi_m_sync_crc7+132 it ne
|
|
|
|
|
0x000012c4 spi_m_sync_crc7+134 eorne.w r3, r3, #9
|
|
|
|
|
0x000012c8 spi_m_sync_crc7+138 lsls r0, r0, #1
|
|
|
|
|
0x000012ca spi_m_sync_crc7+140 ands.w r1, r1, #255 ; 0xff
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000000 r1 0x00000003 r2 0x00000004 r3 0x000000b0 r4 0x20010540 r5 0x2000056c
|
|
|
|
|
r6 0x00000000 r7 0x00001100 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010542 sp 0x20010528 lr 0x000000b0 pc 0x000012be xPSR 0x01000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
30 static uint8_t spi_m_sync_crc7(uint8_t * buf, uint8_t size)
|
|
|
|
|
31 {
|
|
|
|
|
32 uint8_t crc, value, i;
|
|
|
|
|
33
|
|
|
|
|
34 crc = 0;
|
|
|
|
|
35 while (size--) {
|
|
|
|
|
36 value = *buf++;
|
|
|
|
|
37 for (i = 0; i < 8; i++) {
|
|
|
|
|
38 crc <<= 1;
|
|
|
|
|
39 if ((value & 0x80) ^ (crc & 0x80)) {
|
|
|
|
|
40 crc ^= 0x09;
|
|
|
|
|
41 }
|
|
|
|
|
42 value <<= 1;
|
|
|
|
|
43 }
|
|
|
|
|
44 }
|
|
|
|
|
45 crc = (crc << 1) | 1;
|
|
|
|
|
46 return crc;
|
|
|
|
|
47 }
|
|
|
|
|
48
|
|
|
|
|
49 static bool spi_m_sync_wait_busy(struct spi_m_sync_descriptor* spi)
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x000012be in spi_m_sync_crc7+128 at ../sd_mmc/sd_mmc_spi.c:40
|
|
|
|
|
[1] from 0x000012be in spi_m_sync_adtc_start+206 at ../sd_mmc/sd_mmc_spi.c:240
|
|
|
|
|
[2] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[3] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[4] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[5] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[6] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x000012be in spi_m_sync_crc7+128 at ../sd_mmc/sd_mmc_spi.c:40
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg size = 2 '\002', buf = 0x20010542 "": 0 '\000'
|
|
|
|
|
loc crc = 176 '\260', value = 0 '\000', i = 5 '\005', dummy = 255 '\377', cmd_token = "@\000\000\000\000\026", ncr_timeout = <optimized out>, r1 = 0 '\000', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
42 value <<= 1;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x000012b6 spi_m_sync_crc7+120 eor.w lr, r3, r0
|
|
|
|
|
0x000012ba spi_m_sync_crc7+124 tst.w lr, #128 ; 0x80
|
|
|
|
|
0x000012be spi_m_sync_crc7+128 add.w r1, r1, #4294967295 ; 0xffffffff
|
|
|
|
|
0x000012c2 spi_m_sync_crc7+132 it ne
|
|
|
|
|
0x000012c4 spi_m_sync_crc7+134 eorne.w r3, r3, #9
|
|
|
|
|
0x000012c8 spi_m_sync_crc7+138 lsls r0, r0, #1
|
|
|
|
|
0x000012ca spi_m_sync_crc7+140 ands.w r1, r1, #255 ; 0xff
|
|
|
|
|
0x000012ce spi_m_sync_crc7+144 uxtb r0, r0
|
|
|
|
|
0x000012d0 spi_m_sync_crc7+146 bne.n 0x12b2 <spi_m_sync_adtc_start+194>
|
|
|
|
|
0x000012d2 spi_m_sync_crc7+148 b.n 0x1242 <spi_m_sync_adtc_start+82>
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000000 r1 0x00000002 r2 0x00000004 r3 0x000000b9 r4 0x20010540 r5 0x2000056c
|
|
|
|
|
r6 0x00000000 r7 0x00001100 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010542 sp 0x20010528 lr 0x000000b0 pc 0x000012c8 xPSR 0x01000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
32 uint8_t crc, value, i;
|
|
|
|
|
33
|
|
|
|
|
34 crc = 0;
|
|
|
|
|
35 while (size--) {
|
|
|
|
|
36 value = *buf++;
|
|
|
|
|
37 for (i = 0; i < 8; i++) {
|
|
|
|
|
38 crc <<= 1;
|
|
|
|
|
39 if ((value & 0x80) ^ (crc & 0x80)) {
|
|
|
|
|
40 crc ^= 0x09;
|
|
|
|
|
41 }
|
|
|
|
|
42 value <<= 1;
|
|
|
|
|
43 }
|
|
|
|
|
44 }
|
|
|
|
|
45 crc = (crc << 1) | 1;
|
|
|
|
|
46 return crc;
|
|
|
|
|
47 }
|
|
|
|
|
48
|
|
|
|
|
49 static bool spi_m_sync_wait_busy(struct spi_m_sync_descriptor* spi)
|
|
|
|
|
50 {
|
|
|
|
|
51 uint8_t line = 0xFF;
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x000012c8 in spi_m_sync_crc7+138 at ../sd_mmc/sd_mmc_spi.c:42
|
|
|
|
|
[1] from 0x000012c8 in spi_m_sync_adtc_start+216 at ../sd_mmc/sd_mmc_spi.c:240
|
|
|
|
|
[2] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[3] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[4] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[5] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[6] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x000012c8 in spi_m_sync_crc7+138 at ../sd_mmc/sd_mmc_spi.c:42
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg size = 2 '\002', buf = 0x20010542 "": 0 '\000'
|
|
|
|
|
loc crc = 185 '\271', value = 0 '\000', i = <optimized out>, dummy = 255 '\377', cmd_token = "@\000\000\000\000\026", ncr_timeout = <optimized out>, r1 = 0 '\000', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
37 for (i = 0; i < 8; i++) {
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x000012c2 spi_m_sync_crc7+132 it ne
|
|
|
|
|
0x000012c4 spi_m_sync_crc7+134 eorne.w r3, r3, #9
|
|
|
|
|
0x000012c8 spi_m_sync_crc7+138 lsls r0, r0, #1
|
|
|
|
|
0x000012ca spi_m_sync_crc7+140 ands.w r1, r1, #255 ; 0xff
|
|
|
|
|
0x000012ce spi_m_sync_crc7+144 uxtb r0, r0
|
|
|
|
|
0x000012d0 spi_m_sync_crc7+146 bne.n 0x12b2 <spi_m_sync_adtc_start+194>
|
|
|
|
|
0x000012d2 spi_m_sync_crc7+148 b.n 0x1242 <spi_m_sync_adtc_start+82>
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000000 r1 0x00000002 r2 0x00000004 r3 0x000000b9 r4 0x20010540 r5 0x2000056c
|
|
|
|
|
r6 0x00000000 r7 0x00001100 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010542 sp 0x20010528 lr 0x000000b0 pc 0x000012d0 xPSR 0x01000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
27 // Total number of block requested by last spi_m_sync_adtc_start()
|
|
|
|
|
28 static uint16_t sd_mmc_spi_nb_block;
|
|
|
|
|
29
|
|
|
|
|
30 static uint8_t spi_m_sync_crc7(uint8_t * buf, uint8_t size)
|
|
|
|
|
31 {
|
|
|
|
|
32 uint8_t crc, value, i;
|
|
|
|
|
33
|
|
|
|
|
34 crc = 0;
|
|
|
|
|
35 while (size--) {
|
|
|
|
|
36 value = *buf++;
|
|
|
|
|
37 for (i = 0; i < 8; i++) {
|
|
|
|
|
38 crc <<= 1;
|
|
|
|
|
39 if ((value & 0x80) ^ (crc & 0x80)) {
|
|
|
|
|
40 crc ^= 0x09;
|
|
|
|
|
41 }
|
|
|
|
|
42 value <<= 1;
|
|
|
|
|
43 }
|
|
|
|
|
44 }
|
|
|
|
|
45 crc = (crc << 1) | 1;
|
|
|
|
|
46 return crc;
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x000012d0 in spi_m_sync_crc7+146 at ../sd_mmc/sd_mmc_spi.c:37
|
|
|
|
|
[1] from 0x000012d0 in spi_m_sync_adtc_start+224 at ../sd_mmc/sd_mmc_spi.c:240
|
|
|
|
|
[2] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[3] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[4] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[5] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[6] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x000012d0 in spi_m_sync_crc7+146 at ../sd_mmc/sd_mmc_spi.c:37
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg size = 2 '\002', buf = 0x20010542 "": 0 '\000'
|
|
|
|
|
loc crc = 185 '\271', value = 0 '\000', i = <optimized out>, dummy = 255 '\377', cmd_token = "@\000\000\000\000\026", ncr_timeout = <optimized out>, r1 = 0 '\000', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
Run till exit from #0 spi_m_sync_crc7 (size=2 '\002', buf=0x20010542 "") at ../sd_mmc/sd_mmc_spi.c:37
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
spi_m_sync_adtc_start (spi=0x2000056c <SPI_0>, cmd=cmd@entry=4352, arg=arg@entry=0, block_size=block_size@entry=0, nb_block=nb_block@entry=0, access_block=access_block@entry=false) at ../sd_mmc/sd_mmc_spi.c:240
|
|
|
|
|
240 cmd_token[5] = spi_m_sync_crc7(cmd_token, 5);
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x000012a2 spi_m_sync_adtc_start+178 mov r3, r6
|
|
|
|
|
0x000012a4 spi_m_sync_adtc_start+180 mov r2, r10
|
|
|
|
|
0x000012a6 spi_m_sync_adtc_start+182 ldr r5, [pc, #252] ; (0x13a4 <spi_m_sync_adtc_start+436>)
|
|
|
|
|
0x000012a8 spi_m_sync_adtc_start+184 blx r5
|
|
|
|
|
0x000012aa spi_m_sync_adtc_start+186 b.n 0x12f4 <spi_m_sync_adtc_start+260>
|
|
|
|
|
0x000012ac spi_m_sync_adtc_start+188 ldrb.w r0, [r12], #1
|
|
|
|
|
0x000012b0 spi_m_sync_adtc_start+192 movs r1, #8
|
|
|
|
|
0x000012b2 spi_m_sync_adtc_start+194 lsls r3, r3, #1
|
|
|
|
|
0x000012b4 spi_m_sync_adtc_start+196 uxtb r3, r3
|
|
|
|
|
0x000012b6 spi_m_sync_adtc_start+198 eor.w lr, r3, r0
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000000 r1 0x00000000 r2 0x00000003 r3 0x000000ed r4 0x20010540 r5 0x2000056c
|
|
|
|
|
r6 0x00000000 r7 0x00001100 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010542 sp 0x20010528 lr 0x000000e4 pc 0x000012ac xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
230
|
|
|
|
|
231 (void)access_block;
|
|
|
|
|
232 assert(cmd & SDMMC_RESP_PRESENT, "No SD Card response was present...");
|
|
|
|
|
233 sd_mmc_spi_err = SD_MMC_SPI_NO_ERR;
|
|
|
|
|
234
|
|
|
|
|
235 cmd_token[0] = SPI_CMD_ENCODE(SDMMC_CMD_GET_INDEX(cmd));
|
|
|
|
|
236 cmd_token[1] = arg >> 24;
|
|
|
|
|
237 cmd_token[2] = arg >> 16;
|
|
|
|
|
238 cmd_token[3] = arg >> 8;
|
|
|
|
|
239 cmd_token[4] = arg;
|
|
|
|
|
240 cmd_token[5] = spi_m_sync_crc7(cmd_token, 5);
|
|
|
|
|
241
|
|
|
|
|
242
|
|
|
|
|
243 // 8 cycles to respect Ncs timing
|
|
|
|
|
244 spi_m_sync_io_write(spi, &dummy, 1);
|
|
|
|
|
245 // send command
|
|
|
|
|
246 spi_m_sync_io_write(spi, cmd_token, sizeof(cmd_token));
|
|
|
|
|
247
|
|
|
|
|
248 // Wait for response
|
|
|
|
|
249 // Two retries will be done to manage the Ncr timing between command and response
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x000012ac in spi_m_sync_adtc_start+188 at ../sd_mmc/sd_mmc_spi.c:240
|
|
|
|
|
[1] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[2] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[3] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[4] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[5] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x000012ac in spi_m_sync_adtc_start+188 at ../sd_mmc/sd_mmc_spi.c:240
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, cmd = 4352, arg = 0, block_size = 0, nb_block = 0, access_block = false
|
|
|
|
|
loc dummy = 255 '\377', cmd_token = "@\000\000\000\000\026", ncr_timeout = <optimized out>, r1 = 0 '\000', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
46 return crc;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00001242 spi_m_sync_adtc_start+82 subs r2, #1
|
|
|
|
|
0x00001244 spi_m_sync_adtc_start+84 ands.w r2, r2, #255 ; 0xff
|
|
|
|
|
0x00001248 spi_m_sync_adtc_start+88 bne.n 0x12ac <spi_m_sync_adtc_start+188>
|
|
|
|
|
0x0000124a spi_m_sync_adtc_start+90 lsls r3, r3, #1
|
|
|
|
|
0x0000124c spi_m_sync_adtc_start+92 orr.w r3, r3, #1
|
|
|
|
|
0x00001250 spi_m_sync_adtc_start+96 ldr.w r9, [pc, #364] ; 0x13c0 <spi_m_sync_adtc_start+464>
|
|
|
|
|
0x00001254 spi_m_sync_adtc_start+100 strb.w r3, [sp, #29]
|
|
|
|
|
0x00001258 spi_m_sync_adtc_start+104 movs r2, #1
|
|
|
|
|
0x0000125a spi_m_sync_adtc_start+106 add.w r1, sp, #21
|
|
|
|
|
0x0000125e spi_m_sync_adtc_start+110 mov r0, r5
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000000 r1 0x00000000 r2 0x00000000 r3 0x00000095 r4 0x20010540 r5 0x2000056c
|
|
|
|
|
r6 0x00000000 r7 0x00001100 r8 0x00000001 r9 0x00003c47 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010545 sp 0x20010528 lr 0x0000004a pc 0x00001250 xPSR 0x01000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
36 value = *buf++;
|
|
|
|
|
37 for (i = 0; i < 8; i++) {
|
|
|
|
|
38 crc <<= 1;
|
|
|
|
|
39 if ((value & 0x80) ^ (crc & 0x80)) {
|
|
|
|
|
40 crc ^= 0x09;
|
|
|
|
|
41 }
|
|
|
|
|
42 value <<= 1;
|
|
|
|
|
43 }
|
|
|
|
|
44 }
|
|
|
|
|
45 crc = (crc << 1) | 1;
|
|
|
|
|
46 return crc;
|
|
|
|
|
47 }
|
|
|
|
|
48
|
|
|
|
|
49 static bool spi_m_sync_wait_busy(struct spi_m_sync_descriptor* spi)
|
|
|
|
|
50 {
|
|
|
|
|
51 uint8_t line = 0xFF;
|
|
|
|
|
52 uint8_t dummy = 0xFF;
|
|
|
|
|
53
|
|
|
|
|
54 /* Delay before check busy
|
|
|
|
|
55 * Nbr timing minimum = 8 cylces
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00001250 in spi_m_sync_adtc_start+96 at ../sd_mmc/sd_mmc_spi.c:46
|
|
|
|
|
[1] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[2] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[3] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[4] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[5] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00001250 in spi_m_sync_adtc_start+96 at ../sd_mmc/sd_mmc_spi.c:46
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, cmd = 4352, arg = 0, block_size = 0, nb_block = 0, access_block = false
|
|
|
|
|
loc dummy = 255 '\377', cmd_token = "@\000\000\000\000\026", ncr_timeout = <optimized out>, r1 = 0 '\000', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
Quit
|
|
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|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
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|
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244 spi_m_sync_io_write(spi, &dummy, 1);
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
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|
|
0x00001248 spi_m_sync_adtc_start+88 bne.n 0x12ac <spi_m_sync_adtc_start+188>
|
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|
|
0x0000124a spi_m_sync_adtc_start+90 lsls r3, r3, #1
|
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0x0000124c spi_m_sync_adtc_start+92 orr.w r3, r3, #1
|
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0x00001250 spi_m_sync_adtc_start+96 ldr.w r9, [pc, #364] ; 0x13c0 <spi_m_sync_adtc_start+464>
|
|
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|
|
0x00001254 spi_m_sync_adtc_start+100 strb.w r3, [sp, #29]
|
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|
|
0x00001258 spi_m_sync_adtc_start+104 movs r2, #1
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|
0x0000125a spi_m_sync_adtc_start+106 add.w r1, sp, #21
|
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|
0x0000125e spi_m_sync_adtc_start+110 mov r0, r5
|
|
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|
|
0x00001260 spi_m_sync_adtc_start+112 blx r9
|
|
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|
|
0x00001262 spi_m_sync_adtc_start+114 mov r1, r4
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|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
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|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000000 r1 0x00000000 r2 0x00000000 r3 0x00000095 r4 0x20010540 r5 0x2000056c
|
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|
|
|
r6 0x00000000 r7 0x00001100 r8 0x00000001 r9 0x00001681 r10 0x00000000 r11 0xfffbf5e7
|
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|
|
r12 0x20010545 sp 0x20010528 lr 0x0000004a pc 0x00001258 xPSR 0x01000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
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|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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|
234
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|
235 cmd_token[0] = SPI_CMD_ENCODE(SDMMC_CMD_GET_INDEX(cmd));
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|
236 cmd_token[1] = arg >> 24;
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237 cmd_token[2] = arg >> 16;
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|
|
238 cmd_token[3] = arg >> 8;
|
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|
239 cmd_token[4] = arg;
|
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|
240 cmd_token[5] = spi_m_sync_crc7(cmd_token, 5);
|
|
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241
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242
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243 // 8 cycles to respect Ncs timing
|
|
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|
|
244 spi_m_sync_io_write(spi, &dummy, 1);
|
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|
245 // send command
|
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|
246 spi_m_sync_io_write(spi, cmd_token, sizeof(cmd_token));
|
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247
|
|
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|
|
248 // Wait for response
|
|
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|
|
249 // Two retries will be done to manage the Ncr timing between command and response
|
|
|
|
|
250 // Ncr: Min. 1x8 clock cycle, Max 8x8 clock cycles
|
|
|
|
|
251 // WORKAROUND for no compliance (Atmel Internal ref. SD13)
|
|
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|
|
252 r1 = 0xFF;
|
|
|
|
|
253 // Ignore first byte because Ncr min. = 8 clock cycles
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00001258 in spi_m_sync_adtc_start+104 at ../sd_mmc/sd_mmc_spi.c:244
|
|
|
|
|
[1] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[2] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[3] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[4] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[5] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00001258 in spi_m_sync_adtc_start+104 at ../sd_mmc/sd_mmc_spi.c:244
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, cmd = 4352, arg = 0, block_size = 0, nb_block = 0, access_block = false
|
|
|
|
|
loc dummy = 255 '\377', cmd_token = "@\000\000\000\000\225", ncr_timeout = <optimized out>, r1 = 0 '\000', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
246 spi_m_sync_io_write(spi, cmd_token, sizeof(cmd_token));
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00001254 spi_m_sync_adtc_start+100 strb.w r3, [sp, #29]
|
|
|
|
|
0x00001258 spi_m_sync_adtc_start+104 movs r2, #1
|
|
|
|
|
0x0000125a spi_m_sync_adtc_start+106 add.w r1, sp, #21
|
|
|
|
|
0x0000125e spi_m_sync_adtc_start+110 mov r0, r5
|
|
|
|
|
0x00001260 spi_m_sync_adtc_start+112 blx r9
|
|
|
|
|
0x00001262 spi_m_sync_adtc_start+114 mov r1, r4
|
|
|
|
|
0x00001264 spi_m_sync_adtc_start+116 movs r2, #6
|
|
|
|
|
0x00001266 spi_m_sync_adtc_start+118 mov r0, r5
|
|
|
|
|
0x00001268 spi_m_sync_adtc_start+120 blx r9
|
|
|
|
|
0x0000126a spi_m_sync_adtc_start+122 ldr.w r8, [pc, #344] ; 0x13c4 <spi_m_sync_adtc_start+468>
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0xffffffec r1 0x00000000 r2 0x00000000 r3 0x00003d99 r4 0x20010540 r5 0x2000056c
|
|
|
|
|
r6 0x00000000 r7 0x00001100 r8 0x00000001 r9 0x00001681 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010545 sp 0x20010528 lr 0x00003dcb pc 0x00001262 xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
236 cmd_token[1] = arg >> 24;
|
|
|
|
|
237 cmd_token[2] = arg >> 16;
|
|
|
|
|
238 cmd_token[3] = arg >> 8;
|
|
|
|
|
239 cmd_token[4] = arg;
|
|
|
|
|
240 cmd_token[5] = spi_m_sync_crc7(cmd_token, 5);
|
|
|
|
|
241
|
|
|
|
|
242
|
|
|
|
|
243 // 8 cycles to respect Ncs timing
|
|
|
|
|
244 spi_m_sync_io_write(spi, &dummy, 1);
|
|
|
|
|
245 // send command
|
|
|
|
|
246 spi_m_sync_io_write(spi, cmd_token, sizeof(cmd_token));
|
|
|
|
|
247
|
|
|
|
|
248 // Wait for response
|
|
|
|
|
249 // Two retries will be done to manage the Ncr timing between command and response
|
|
|
|
|
250 // Ncr: Min. 1x8 clock cycle, Max 8x8 clock cycles
|
|
|
|
|
251 // WORKAROUND for no compliance (Atmel Internal ref. SD13)
|
|
|
|
|
252 r1 = 0xFF;
|
|
|
|
|
253 // Ignore first byte because Ncr min. = 8 clock cycles
|
|
|
|
|
254 spi_m_sync_io_read(spi, &r1, 1);
|
|
|
|
|
255 ncr_timeout = 7;
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00001262 in spi_m_sync_adtc_start+114 at ../sd_mmc/sd_mmc_spi.c:246
|
|
|
|
|
[1] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[2] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[3] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[4] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[5] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00001262 in spi_m_sync_adtc_start+114 at ../sd_mmc/sd_mmc_spi.c:246
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, cmd = 4352, arg = 0, block_size = 0, nb_block = 0, access_block = false
|
|
|
|
|
loc dummy = 255 '\377', cmd_token = "@\000\000\000\000\225", ncr_timeout = <optimized out>, r1 = 0 '\000', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
252 r1 = 0xFF;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00001260 spi_m_sync_adtc_start+112 blx r9
|
|
|
|
|
0x00001262 spi_m_sync_adtc_start+114 mov r1, r4
|
|
|
|
|
0x00001264 spi_m_sync_adtc_start+116 movs r2, #6
|
|
|
|
|
0x00001266 spi_m_sync_adtc_start+118 mov r0, r5
|
|
|
|
|
0x00001268 spi_m_sync_adtc_start+120 blx r9
|
|
|
|
|
0x0000126a spi_m_sync_adtc_start+122 ldr.w r8, [pc, #344] ; 0x13c4 <spi_m_sync_adtc_start+468>
|
|
|
|
|
0x0000126e spi_m_sync_adtc_start+126 movs r3, #255 ; 0xff
|
|
|
|
|
0x00001270 spi_m_sync_adtc_start+128 movs r2, #1
|
|
|
|
|
0x00001272 spi_m_sync_adtc_start+130 add.w r1, sp, #22
|
|
|
|
|
0x00001276 spi_m_sync_adtc_start+134 mov r0, r5
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0xffffffec r1 0x00000000 r2 0x00000000 r3 0x00003d99 r4 0x20010540 r5 0x2000056c
|
|
|
|
|
r6 0x00000000 r7 0x00001100 r8 0x00000001 r9 0x00001681 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010545 sp 0x20010528 lr 0x00003dcb pc 0x0000126a xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
242
|
|
|
|
|
243 // 8 cycles to respect Ncs timing
|
|
|
|
|
244 spi_m_sync_io_write(spi, &dummy, 1);
|
|
|
|
|
245 // send command
|
|
|
|
|
246 spi_m_sync_io_write(spi, cmd_token, sizeof(cmd_token));
|
|
|
|
|
247
|
|
|
|
|
248 // Wait for response
|
|
|
|
|
249 // Two retries will be done to manage the Ncr timing between command and response
|
|
|
|
|
250 // Ncr: Min. 1x8 clock cycle, Max 8x8 clock cycles
|
|
|
|
|
251 // WORKAROUND for no compliance (Atmel Internal ref. SD13)
|
|
|
|
|
252 r1 = 0xFF;
|
|
|
|
|
253 // Ignore first byte because Ncr min. = 8 clock cycles
|
|
|
|
|
254 spi_m_sync_io_read(spi, &r1, 1);
|
|
|
|
|
255 ncr_timeout = 7;
|
|
|
|
|
256
|
|
|
|
|
257 while(1)
|
|
|
|
|
258 {
|
|
|
|
|
259 spi_m_sync_io_read(spi, &r1, 1);
|
|
|
|
|
260 if((r1 & R1_SPI_ERROR) == 0)
|
|
|
|
|
261 {
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000126a in spi_m_sync_adtc_start+122 at ../sd_mmc/sd_mmc_spi.c:252
|
|
|
|
|
[1] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[2] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[3] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[4] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[5] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000126a in spi_m_sync_adtc_start+122 at ../sd_mmc/sd_mmc_spi.c:252
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, cmd = 4352, arg = 0, block_size = 0, nb_block = 0, access_block = false
|
|
|
|
|
loc dummy = 255 '\377', cmd_token = "@\000\000\000\000\225", ncr_timeout = <optimized out>, r1 = 0 '\000', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
254 spi_m_sync_io_read(spi, &r1, 1);
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x0000126e spi_m_sync_adtc_start+126 movs r3, #255 ; 0xff
|
|
|
|
|
0x00001270 spi_m_sync_adtc_start+128 movs r2, #1
|
|
|
|
|
0x00001272 spi_m_sync_adtc_start+130 add.w r1, sp, #22
|
|
|
|
|
0x00001276 spi_m_sync_adtc_start+134 mov r0, r5
|
|
|
|
|
0x00001278 spi_m_sync_adtc_start+136 strb.w r3, [sp, #22]
|
|
|
|
|
0x0000127c spi_m_sync_adtc_start+140 blx r8
|
|
|
|
|
0x0000127e spi_m_sync_adtc_start+142 movs r4, #7
|
|
|
|
|
0x00001280 spi_m_sync_adtc_start+144 movs r2, #1
|
|
|
|
|
0x00001282 spi_m_sync_adtc_start+146 add.w r1, sp, #22
|
|
|
|
|
0x00001286 spi_m_sync_adtc_start+150 mov r0, r5
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x2000056c r1 0x2001053e r2 0x00000001 r3 0x000000ff r4 0x20010540 r5 0x2000056c
|
|
|
|
|
r6 0x00000000 r7 0x00001100 r8 0x0000168d r9 0x00001681 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010545 sp 0x20010528 lr 0x00003dcb pc 0x0000127c xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
244 spi_m_sync_io_write(spi, &dummy, 1);
|
|
|
|
|
245 // send command
|
|
|
|
|
246 spi_m_sync_io_write(spi, cmd_token, sizeof(cmd_token));
|
|
|
|
|
247
|
|
|
|
|
248 // Wait for response
|
|
|
|
|
249 // Two retries will be done to manage the Ncr timing between command and response
|
|
|
|
|
250 // Ncr: Min. 1x8 clock cycle, Max 8x8 clock cycles
|
|
|
|
|
251 // WORKAROUND for no compliance (Atmel Internal ref. SD13)
|
|
|
|
|
252 r1 = 0xFF;
|
|
|
|
|
253 // Ignore first byte because Ncr min. = 8 clock cycles
|
|
|
|
|
254 spi_m_sync_io_read(spi, &r1, 1);
|
|
|
|
|
255 ncr_timeout = 7;
|
|
|
|
|
256
|
|
|
|
|
257 while(1)
|
|
|
|
|
258 {
|
|
|
|
|
259 spi_m_sync_io_read(spi, &r1, 1);
|
|
|
|
|
260 if((r1 & R1_SPI_ERROR) == 0)
|
|
|
|
|
261 {
|
|
|
|
|
262 // Valid response
|
|
|
|
|
263 break;
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000127c in spi_m_sync_adtc_start+140 at ../sd_mmc/sd_mmc_spi.c:254
|
|
|
|
|
[1] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[2] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[3] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[4] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[5] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000127c in spi_m_sync_adtc_start+140 at ../sd_mmc/sd_mmc_spi.c:254
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, cmd = 4352, arg = 0, block_size = 0, nb_block = 0, access_block = false
|
|
|
|
|
loc dummy = 255 '\377', cmd_token = "@\000\000\000\000\225", ncr_timeout = <optimized out>, r1 = 255 '\377', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
255 ncr_timeout = 7;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00001270 spi_m_sync_adtc_start+128 movs r2, #1
|
|
|
|
|
0x00001272 spi_m_sync_adtc_start+130 add.w r1, sp, #22
|
|
|
|
|
0x00001276 spi_m_sync_adtc_start+134 mov r0, r5
|
|
|
|
|
0x00001278 spi_m_sync_adtc_start+136 strb.w r3, [sp, #22]
|
|
|
|
|
0x0000127c spi_m_sync_adtc_start+140 blx r8
|
|
|
|
|
0x0000127e spi_m_sync_adtc_start+142 movs r4, #7
|
|
|
|
|
0x00001280 spi_m_sync_adtc_start+144 movs r2, #1
|
|
|
|
|
0x00001282 spi_m_sync_adtc_start+146 add.w r1, sp, #22
|
|
|
|
|
0x00001286 spi_m_sync_adtc_start+150 mov r0, r5
|
|
|
|
|
0x00001288 spi_m_sync_adtc_start+152 blx r8
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0xffffffec r1 0x00000000 r2 0x00000000 r3 0x00003d99 r4 0x20010540 r5 0x2000056c
|
|
|
|
|
r6 0x00000000 r7 0x00001100 r8 0x0000168d r9 0x00001681 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010545 sp 0x20010528 lr 0x00003dcb pc 0x0000127e xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
245 // send command
|
|
|
|
|
246 spi_m_sync_io_write(spi, cmd_token, sizeof(cmd_token));
|
|
|
|
|
247
|
|
|
|
|
248 // Wait for response
|
|
|
|
|
249 // Two retries will be done to manage the Ncr timing between command and response
|
|
|
|
|
250 // Ncr: Min. 1x8 clock cycle, Max 8x8 clock cycles
|
|
|
|
|
251 // WORKAROUND for no compliance (Atmel Internal ref. SD13)
|
|
|
|
|
252 r1 = 0xFF;
|
|
|
|
|
253 // Ignore first byte because Ncr min. = 8 clock cycles
|
|
|
|
|
254 spi_m_sync_io_read(spi, &r1, 1);
|
|
|
|
|
255 ncr_timeout = 7;
|
|
|
|
|
256
|
|
|
|
|
257 while(1)
|
|
|
|
|
258 {
|
|
|
|
|
259 spi_m_sync_io_read(spi, &r1, 1);
|
|
|
|
|
260 if((r1 & R1_SPI_ERROR) == 0)
|
|
|
|
|
261 {
|
|
|
|
|
262 // Valid response
|
|
|
|
|
263 break;
|
|
|
|
|
264 }
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000127e in spi_m_sync_adtc_start+142 at ../sd_mmc/sd_mmc_spi.c:255
|
|
|
|
|
[1] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[2] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[3] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[4] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[5] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000127e in spi_m_sync_adtc_start+142 at ../sd_mmc/sd_mmc_spi.c:255
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, cmd = 4352, arg = 0, block_size = 0, nb_block = 0, access_block = false
|
|
|
|
|
loc dummy = 255 '\377', cmd_token = "@\000\000\000\000\225", ncr_timeout = 7 '\a', r1 = 255 '\377', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
259 spi_m_sync_io_read(spi, &r1, 1);
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00001272 spi_m_sync_adtc_start+130 add.w r1, sp, #22
|
|
|
|
|
0x00001276 spi_m_sync_adtc_start+134 mov r0, r5
|
|
|
|
|
0x00001278 spi_m_sync_adtc_start+136 strb.w r3, [sp, #22]
|
|
|
|
|
0x0000127c spi_m_sync_adtc_start+140 blx r8
|
|
|
|
|
0x0000127e spi_m_sync_adtc_start+142 movs r4, #7
|
|
|
|
|
0x00001280 spi_m_sync_adtc_start+144 movs r2, #1
|
|
|
|
|
0x00001282 spi_m_sync_adtc_start+146 add.w r1, sp, #22
|
|
|
|
|
0x00001286 spi_m_sync_adtc_start+150 mov r0, r5
|
|
|
|
|
0x00001288 spi_m_sync_adtc_start+152 blx r8
|
|
|
|
|
0x0000128a spi_m_sync_adtc_start+154 ldrsb.w r3, [sp, #22]
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$0 = 23
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0xffffffec r1 0x00000000 r2 0x00000000 r3 0x00003d99 r4 0x00000007 r5 0x2000056c
|
|
|
|
|
r6 0x00000000 r7 0x00001100 r8 0x0000168d r9 0x00001681 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010545 sp 0x20010528 lr 0x00003dcb pc 0x00001280 xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
249 // Two retries will be done to manage the Ncr timing between command and response
|
|
|
|
|
250 // Ncr: Min. 1x8 clock cycle, Max 8x8 clock cycles
|
|
|
|
|
251 // WORKAROUND for no compliance (Atmel Internal ref. SD13)
|
|
|
|
|
252 r1 = 0xFF;
|
|
|
|
|
253 // Ignore first byte because Ncr min. = 8 clock cycles
|
|
|
|
|
254 spi_m_sync_io_read(spi, &r1, 1);
|
|
|
|
|
255 ncr_timeout = 7;
|
|
|
|
|
256
|
|
|
|
|
257 while(1)
|
|
|
|
|
258 {
|
|
|
|
|
259 spi_m_sync_io_read(spi, &r1, 1);
|
|
|
|
|
260 if((r1 & R1_SPI_ERROR) == 0)
|
|
|
|
|
261 {
|
|
|
|
|
262 // Valid response
|
|
|
|
|
263 break;
|
|
|
|
|
264 }
|
|
|
|
|
265 if(--ncr_timeout == 0)
|
|
|
|
|
266 {
|
|
|
|
|
267 // Here valid r1 response received
|
|
|
|
|
268 sd_mmc_spi_debug("%s: cmd %02d, arg 0x%08lX, R1 timeout\r\n",
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00001280 in spi_m_sync_adtc_start+144 at ../sd_mmc/sd_mmc_spi.c:259
|
|
|
|
|
[1] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[2] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[3] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[4] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[5] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00001280 in spi_m_sync_adtc_start+144 at ../sd_mmc/sd_mmc_spi.c:259
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, cmd = 4352, arg = 0, block_size = 0, nb_block = 0, access_block = false
|
|
|
|
|
loc dummy = 255 '\377', cmd_token = "@\000\000\000\000\225", ncr_timeout = 7 '\a', r1 = 255 '\377', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$2 = 255 '\377'
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
spi_m_sync_io_read (spi=spi@entry=0x2000056c <SPI_0>, buf=buf@entry=0x2001053e "\377\377@", length=length@entry=1) at ../hal/src/hal_spi_m_sync.c:207
|
|
|
|
|
207 return _spi_m_sync_io_read(&spi->io, buf, length);
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x0000168c spi_m_sync_io_read+0 ldr r3, [pc, #4] ; (0x1694 <spi_m_sync_io_read+8>)
|
|
|
|
|
0x0000168e spi_m_sync_io_read+2 adds r0, #12
|
|
|
|
|
0x00001690 spi_m_sync_io_read+4 bx r3
|
|
|
|
|
0x00001692 spi_m_sync_io_read+6 nop
|
|
|
|
|
0x00001694 spi_m_sync_io_read+8 asrs r1, r1, #25
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$1 = 23
|
|
|
|
|
$$0 = 255 '\377'
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x2000056c r1 0x2001053e r2 0x00000001 r3 0x00003d99 r4 0x00000007 r5 0x2000056c
|
|
|
|
|
r6 0x00000000 r7 0x00001100 r8 0x0000168d r9 0x00001681 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010545 sp 0x20010528 lr 0x0000128b pc 0x0000168c xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
197 }
|
|
|
|
|
198
|
|
|
|
|
199
|
|
|
|
|
200 int32_t spi_m_sync_io_write(struct spi_m_sync_descriptor *const spi, const uint8_t *const buf, const uint16_t length)
|
|
|
|
|
201 {
|
|
|
|
|
202 return _spi_m_sync_io_write(&spi->io, buf, length);
|
|
|
|
|
203 }
|
|
|
|
|
204
|
|
|
|
|
205 int32_t spi_m_sync_io_read(struct spi_m_sync_descriptor *const spi, uint8_t *buf, const uint16_t length)
|
|
|
|
|
206 {
|
|
|
|
|
207 return _spi_m_sync_io_read(&spi->io, buf, length);
|
|
|
|
|
208 }
|
|
|
|
|
209
|
|
|
|
|
210 #ifdef __cplusplus
|
|
|
|
|
211 }
|
|
|
|
|
212 #endif
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000168c in spi_m_sync_io_read+0 at ../hal/src/hal_spi_m_sync.c:207
|
|
|
|
|
[1] from 0x0000128a in spi_m_sync_adtc_start+154 at ../sd_mmc/sd_mmc_spi.c:259
|
|
|
|
|
[2] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[3] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[4] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[5] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[6] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000168c in spi_m_sync_io_read+0 at ../hal/src/hal_spi_m_sync.c:207
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, buf = 0x2001053e "\377\377@": 255 '\377', length = 1
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
_spi_m_sync_io_read (io=io@entry=0x20000578 <SPI_0+12>, buf=buf@entry=0x2001053e "\377\377@", length=1) at ../hal/src/hal_spi_m_sync.c:135
|
|
|
|
|
135 ASSERT(io);
|
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|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x00001648 _spi_m_sync_io_read+0 push {r0, r1, r2, r3, r4, r5, r6, lr}
|
|
|
|
|
0x0000164a _spi_m_sync_io_read+2 mov r4, r0
|
|
|
|
|
0x0000164c _spi_m_sync_io_read+4 subs r0, #0
|
|
|
|
|
0x0000164e _spi_m_sync_io_read+6 it ne
|
|
|
|
|
0x00001650 _spi_m_sync_io_read+8 movne r0, #1
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$1 = 23
|
|
|
|
|
$$0 = 255 '\377'
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x20000578 r1 0x2001053e r2 0x00000001 r3 0x00001649 r4 0x00000007 r5 0x2000056c
|
|
|
|
|
r6 0x00000000 r7 0x00001100 r8 0x0000168d r9 0x00001681 r10 0x00000000 r11 0xfffbf5e7
|
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|
|
|
r12 0x20010545 sp 0x20010528 lr 0x0000128b pc 0x00001648 xPSR 0x01000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
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|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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|
125 *
|
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|
126 * \param[in, out] spi Pointer to the HAL SPI instance.
|
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127 * \param[out] buf Pointer to the buffer to store read data.
|
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|
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128 * \param[in] size Size of the data in number of characters.
|
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|
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129 * \return Operation status.
|
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130 * \retval size Success.
|
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131 * \retval >=0 Time out, with number of characters read.
|
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|
132 */
|
|
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|
|
133 static int32_t _spi_m_sync_io_read(struct io_descriptor *io, uint8_t *buf, const uint16_t length)
|
|
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|
|
134 {
|
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|
|
135 ASSERT(io);
|
|
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|
|
136
|
|
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|
137 struct spi_m_sync_descriptor *spi = CONTAINER_OF(io, struct spi_m_sync_descriptor, io);
|
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|
|
138 struct spi_xfer xfer;
|
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|
|
139
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140 xfer.rxbuf = buf;
|
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|
|
141 xfer.txbuf = 0;
|
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|
|
142 xfer.size = length;
|
|
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|
|
143
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|
|
144 return spi_m_sync_transfer(spi, &xfer);
|
|
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|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00001648 in _spi_m_sync_io_read+0 at ../hal/src/hal_spi_m_sync.c:135
|
|
|
|
|
[1] from 0x00001692 in spi_m_sync_io_read+6 at ../hal/src/hal_spi_m_sync.c:207
|
|
|
|
|
[2] from 0x0000128a in spi_m_sync_adtc_start+154 at ../sd_mmc/sd_mmc_spi.c:259
|
|
|
|
|
[3] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[4] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[5] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[6] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[7] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00001648 in _spi_m_sync_io_read+0 at ../hal/src/hal_spi_m_sync.c:135
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg io = 0x20000578 <SPI_0+12>: {write = 0x1611 <_spi_m_sync_io_write>,read = 0x1649 <_spi_m_sync_…, buf = 0x2001053e "\377\377@": 255 '\377', length = 1
|
|
|
|
|
loc spi = <optimized out>, xfer = {txbuf = 0x0 <exception_table>,rxbuf = 0x2001053e "\377\377@",size = 1}
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
Run till exit from #0 _spi_m_sync_io_read (io=io@entry=0x20000578 <SPI_0+12>, buf=buf@entry=0x2001053e "\377\377@", length=1) at ../hal/src/hal_spi_m_sync.c:135
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
spi_m_sync_adtc_start (spi=0x2000056c <SPI_0>, cmd=cmd@entry=4352, arg=arg@entry=0, block_size=block_size@entry=0, nb_block=nb_block@entry=0, access_block=access_block@entry=false) at ../sd_mmc/sd_mmc_spi.c:260
|
|
|
|
|
260 if((r1 & R1_SPI_ERROR) == 0)
|
|
|
|
|
Value returned is $3 = -20
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x0000127e spi_m_sync_adtc_start+142 movs r4, #7
|
|
|
|
|
0x00001280 spi_m_sync_adtc_start+144 movs r2, #1
|
|
|
|
|
0x00001282 spi_m_sync_adtc_start+146 add.w r1, sp, #22
|
|
|
|
|
0x00001286 spi_m_sync_adtc_start+150 mov r0, r5
|
|
|
|
|
0x00001288 spi_m_sync_adtc_start+152 blx r8
|
|
|
|
|
0x0000128a spi_m_sync_adtc_start+154 ldrsb.w r3, [sp, #22]
|
|
|
|
|
0x0000128e spi_m_sync_adtc_start+158 ldrb.w r2, [sp, #22]
|
|
|
|
|
0x00001292 spi_m_sync_adtc_start+162 cmp r3, #0
|
|
|
|
|
0x00001294 spi_m_sync_adtc_start+164 bge.n 0x12d4 <spi_m_sync_adtc_start+228>
|
|
|
|
|
0x00001296 spi_m_sync_adtc_start+166 subs r4, #1
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$2 = 23
|
|
|
|
|
$$1 = 255 '\377'
|
|
|
|
|
$$0 = -20
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0xffffffec r1 0x00000000 r2 0x00000000 r3 0x00003d99 r4 0x00000007 r5 0x2000056c
|
|
|
|
|
r6 0x00000000 r7 0x00001100 r8 0x0000168d r9 0x00001681 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010545 sp 0x20010528 lr 0x00003dcb pc 0x0000128a xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
250 // Ncr: Min. 1x8 clock cycle, Max 8x8 clock cycles
|
|
|
|
|
251 // WORKAROUND for no compliance (Atmel Internal ref. SD13)
|
|
|
|
|
252 r1 = 0xFF;
|
|
|
|
|
253 // Ignore first byte because Ncr min. = 8 clock cycles
|
|
|
|
|
254 spi_m_sync_io_read(spi, &r1, 1);
|
|
|
|
|
255 ncr_timeout = 7;
|
|
|
|
|
256
|
|
|
|
|
257 while(1)
|
|
|
|
|
258 {
|
|
|
|
|
259 spi_m_sync_io_read(spi, &r1, 1);
|
|
|
|
|
260 if((r1 & R1_SPI_ERROR) == 0)
|
|
|
|
|
261 {
|
|
|
|
|
262 // Valid response
|
|
|
|
|
263 break;
|
|
|
|
|
264 }
|
|
|
|
|
265 if(--ncr_timeout == 0)
|
|
|
|
|
266 {
|
|
|
|
|
267 // Here valid r1 response received
|
|
|
|
|
268 sd_mmc_spi_debug("%s: cmd %02d, arg 0x%08lX, R1 timeout\r\n",
|
|
|
|
|
269 __func__, (int)SDMMC_CMD_GET_INDEX(cmd), arg);
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000128a in spi_m_sync_adtc_start+154 at ../sd_mmc/sd_mmc_spi.c:260
|
|
|
|
|
[1] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[2] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[3] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[4] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[5] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000128a in spi_m_sync_adtc_start+154 at ../sd_mmc/sd_mmc_spi.c:260
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, cmd = 4352, arg = 0, block_size = 0, nb_block = 0, access_block = false
|
|
|
|
|
loc dummy = 255 '\377', cmd_token = "@\000\000\000\000\225", ncr_timeout = 7 '\a', r1 = 255 '\377', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
265 if(--ncr_timeout == 0)
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00001288 spi_m_sync_adtc_start+152 blx r8
|
|
|
|
|
0x0000128a spi_m_sync_adtc_start+154 ldrsb.w r3, [sp, #22]
|
|
|
|
|
0x0000128e spi_m_sync_adtc_start+158 ldrb.w r2, [sp, #22]
|
|
|
|
|
0x00001292 spi_m_sync_adtc_start+162 cmp r3, #0
|
|
|
|
|
0x00001294 spi_m_sync_adtc_start+164 bge.n 0x12d4 <spi_m_sync_adtc_start+228>
|
|
|
|
|
0x00001296 spi_m_sync_adtc_start+166 subs r4, #1
|
|
|
|
|
0x00001298 spi_m_sync_adtc_start+168 ands.w r4, r4, #255 ; 0xff
|
|
|
|
|
0x0000129c spi_m_sync_adtc_start+172 bne.n 0x1280 <spi_m_sync_adtc_start+144>
|
|
|
|
|
0x0000129e spi_m_sync_adtc_start+174 ldr r1, [pc, #252] ; (0x139c <spi_m_sync_adtc_start+428>)
|
|
|
|
|
0x000012a0 spi_m_sync_adtc_start+176 ldr r0, [pc, #252] ; (0x13a0 <spi_m_sync_adtc_start+432>)
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003504 in ../main.c:12 for main.c:12 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$$2 = 23
|
|
|
|
|
$$1 = 255 '\377'
|
|
|
|
|
$$0 = -20
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0xffffffec r1 0x00000000 r2 0x000000ff r3 0xffffffff r4 0x00000007 r5 0x2000056c
|
|
|
|
|
r6 0x00000000 r7 0x00001100 r8 0x0000168d r9 0x00001681 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010545 sp 0x20010528 lr 0x00003dcb pc 0x00001296 xPSR 0xa1000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
255 ncr_timeout = 7;
|
|
|
|
|
256
|
|
|
|
|
257 while(1)
|
|
|
|
|
258 {
|
|
|
|
|
259 spi_m_sync_io_read(spi, &r1, 1);
|
|
|
|
|
260 if((r1 & R1_SPI_ERROR) == 0)
|
|
|
|
|
261 {
|
|
|
|
|
262 // Valid response
|
|
|
|
|
263 break;
|
|
|
|
|
264 }
|
|
|
|
|
265 if(--ncr_timeout == 0)
|
|
|
|
|
266 {
|
|
|
|
|
267 // Here valid r1 response received
|
|
|
|
|
268 sd_mmc_spi_debug("%s: cmd %02d, arg 0x%08lX, R1 timeout\r\n",
|
|
|
|
|
269 __func__, (int)SDMMC_CMD_GET_INDEX(cmd), arg);
|
|
|
|
|
270 sd_mmc_spi_err = SD_MMC_SPI_ERR_RESP_TIMEOUT;
|
|
|
|
|
271 return false;
|
|
|
|
|
272 }
|
|
|
|
|
273 }
|
|
|
|
|
274
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00001296 in spi_m_sync_adtc_start+166 at ../sd_mmc/sd_mmc_spi.c:265
|
|
|
|
|
[1] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[2] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[3] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[4] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[5] from 0x00003520 in main+52 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00001296 in spi_m_sync_adtc_start+166 at ../sd_mmc/sd_mmc_spi.c:265
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, cmd = 4352, arg = 0, block_size = 0, nb_block = 0, access_block = false
|
|
|
|
|
loc dummy = 255 '\377', cmd_token = "@\000\000\000\000\225", ncr_timeout = 6 '\006', r1 = 255 '\377', dummy2 = 255 '\377', __func__ = "spi_m_sync_adtc_start"
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
$4 = 255 '\377'
|
|
|
|
|
Detaching from program: /storage/Shared/Documents/Projects/ePenguin/e54-GFX-Development-Board/software/Adafruit_Metro_M4_Grand_Central_Firmware/build/metro-m4.elf, Remote target
|
|
|
|
|
[Inferior 1 (Remote target) detached]
|
|
|
|
|
spi_m_sync_adtc_start (spi=0x2000056c <SPI_0>, cmd=cmd@entry=4352, arg=arg@entry=0, block_size=block_size@entry=0, nb_block=nb_block@entry=0, access_block=access_block@entry=false) at ../sd_mmc/sd_mmc_spi.c:265
|
|
|
|
|
265 if(--ncr_timeout == 0)
|
|
|
|
|
─── Assembly ───────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00001288 spi_m_sync_adtc_start+152 blx r8
|
|
|
|
|
0x0000128a spi_m_sync_adtc_start+154 ldrsb.w r3, [sp, #22]
|
|
|
|
|
0x0000128e spi_m_sync_adtc_start+158 ldrb.w r2, [sp, #22]
|
|
|
|
|
0x00001292 spi_m_sync_adtc_start+162 cmp r3, #0
|
|
|
|
|
0x00001294 spi_m_sync_adtc_start+164 bge.n 0x12d4 <spi_m_sync_adtc_start+228>
|
|
|
|
|
0x00001296 spi_m_sync_adtc_start+166 subs r4, #1
|
|
|
|
|
0x00001298 spi_m_sync_adtc_start+168 ands.w r4, r4, #255 ; 0xff
|
|
|
|
|
0x0000129c spi_m_sync_adtc_start+172 bne.n 0x1280 <spi_m_sync_adtc_start+144>
|
|
|
|
|
0x0000129e spi_m_sync_adtc_start+174 ldr r1, [pc, #252] ; (0x139c <spi_m_sync_adtc_start+428>)
|
|
|
|
|
0x000012a0 spi_m_sync_adtc_start+176 ldr r0, [pc, #252] ; (0x13a0 <spi_m_sync_adtc_start+432>)
|
|
|
|
|
─── Breakpoints ────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Expressions ────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ─────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ──────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0xffffffec r1 0x00000000 r2 0x000000ff
|
|
|
|
|
r3 0xffffffff r4 0x00000007 r5 0x2000056c
|
|
|
|
|
r6 0x00000000 r7 0x00001100 r8 0x0000168d
|
|
|
|
|
r9 0x00001681 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010545 sp 0x20010528 lr 0x00003dcb
|
|
|
|
|
pc 0x00001296 xPSR 0xa1000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010528 psp 0xfffeefec primask 0x00
|
|
|
|
|
basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ─────────────────────────────────────────────────────────────────────
|
|
|
|
|
255 ncr_timeout = 7;
|
|
|
|
|
256
|
|
|
|
|
257 while(1)
|
|
|
|
|
258 {
|
|
|
|
|
259 spi_m_sync_io_read(spi, &r1, 1);
|
|
|
|
|
260 if((r1 & R1_SPI_ERROR) == 0)
|
|
|
|
|
261 {
|
|
|
|
|
262 // Valid response
|
|
|
|
|
263 break;
|
|
|
|
|
264 }
|
|
|
|
|
265 if(--ncr_timeout == 0)
|
|
|
|
|
266 {
|
|
|
|
|
267 // Here valid r1 response received
|
|
|
|
|
268 sd_mmc_spi_debug("%s: cmd %02d, arg 0x%08lX, R1 timeout\r\n",
|
|
|
|
|
269 __func__, (int)SDMMC_CMD_GET_INDEX(cmd), arg);
|
|
|
|
|
270 sd_mmc_spi_err = SD_MMC_SPI_ERR_RESP_TIMEOUT;
|
|
|
|
|
271 return false;
|
|
|
|
|
272 }
|
|
|
|
|
273 }
|
|
|
|
|
274
|
|
|
|
|
─── Stack ──────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00001296 in spi_m_sync_adtc_start+166 at ../sd_mmc/sd_mmc_spi.c:265
|
|
|
|
|
[1] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[2] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[3] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[4] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[5] from 0x00003520 in main+12 at ../main.c:12
|
|
|
|
|
─── Threads ────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00001296 in spi_m_sync_adtc_start+166 at ../sd_mmc/sd_mmc_spi.c:265
|
|
|
|
|
─── Variables ──────────────────────────────────────────────────────────────────
|
|
|
|
|
arg spi = 0x2000056c <SPI_0>: {func = 0x0 <exception_table>,dev = {prvt = 0x41012000,char_size = 1 …, cmd = 4352, arg = 0, block_size = 0, nb_block = 0, access_block = false
|
|
|
|
|
loc dummy = 255 '\377', cmd_token = "@\000\000\000\000\225", ncr_timeout = 6 '\006', r1 = 255 '\377', dummy2 = 255 '\377', __func__ = "/src/hal_mci_sync.c\000.."
|
|
|
|
|
────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
Loading section .text, size 0x515c lma 0x0
|
|
|
|
|
Loading section .relocate, size 0x74 lma 0x515c
|
|
|
|
|
Start address 0x00000000, load size 20944
|
|
|
|
|
Transfer rate: 29 KB/sec, 6981 bytes/write.
|
|
|
|
|
A debugging session is active.
|
|
|
|
|
|
|
|
|
|
Inferior 1 [Remote target] will be detached.
|
|
|
|
|
|
|
|
|
|
Quit anyway? (y or n) [answered Y; input not from terminal]
|
|
|
|
|
[Inferior 1 (Remote target) detached]
|
|
|
|
|
0x00003e60 in hri_sercomspi_read_INTFLAG_reg (hw=0x41012000) at ../hri/hri_sercom_d51.h:433
|
|
|
|
|
433 return ((Sercom *)hw)->SPI.INTFLAG.reg;
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x00003e5e hri_sercomspi_read_INTFLAG_reg+0 ldrb r3, [r4, #24]
|
|
|
|
|
0x00003e60 hri_sercomspi_read_INTFLAG_reg+2 uxtb r0, r3
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x03000000 r1 0x00000004 r2 0x00000005 r3 0x00000003 r4 0x41012000 r5 0x00000000
|
|
|
|
|
r6 0x20010545 r7 0x20000570 r8 0x00000001 r9 0x200104ec r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010545 sp 0x200104c8 lr 0x00003e57 pc 0x00003e60 xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x200104c8 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
423 hri_sercomspi_intflag_reg_t mask)
|
|
|
|
|
424 {
|
|
|
|
|
425 uint8_t tmp;
|
|
|
|
|
426 tmp = ((Sercom *)hw)->SPI.INTFLAG.reg;
|
|
|
|
|
427 tmp &= mask;
|
|
|
|
|
428 return tmp;
|
|
|
|
|
429 }
|
|
|
|
|
430
|
|
|
|
|
431 static inline hri_sercomspi_intflag_reg_t hri_sercomspi_read_INTFLAG_reg(const void *const hw)
|
|
|
|
|
432 {
|
|
|
|
|
433 return ((Sercom *)hw)->SPI.INTFLAG.reg;
|
|
|
|
|
434 }
|
|
|
|
|
435
|
|
|
|
|
436 static inline void hri_sercomspi_clear_INTFLAG_reg(const void *const hw, hri_sercomspi_intflag_reg_t mask)
|
|
|
|
|
437 {
|
|
|
|
|
438 ((Sercom *)hw)->SPI.INTFLAG.reg = mask;
|
|
|
|
|
439 }
|
|
|
|
|
440
|
|
|
|
|
441 static inline bool hri_sercomusart_get_INTFLAG_DRE_bit(const void *const hw)
|
|
|
|
|
442 {
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00003e60 in hri_sercomspi_read_INTFLAG_reg+2 at ../hri/hri_sercom_d51.h:433
|
|
|
|
|
[1] from 0x00003e60 in _spi_m_sync_trans+60 at ../hpl/sercom/hpl_sercom.c:2737
|
|
|
|
|
[2] from 0x00001628 in spi_m_sync_transfer+44 at ../hal/src/hal_spi_m_sync.c:184
|
|
|
|
|
[3] from 0x00001660 in _spi_m_sync_io_write+40 at ../hal/src/hal_spi_m_sync.c:172
|
|
|
|
|
[4] from 0x000016ae in spi_m_sync_io_write+6 at ../hal/src/hal_spi_m_sync.c:202
|
|
|
|
|
[5] from 0x0000126a in spi_m_sync_adtc_start+122 at ../sd_mmc/sd_mmc_spi.c:246
|
|
|
|
|
[6] from 0x000013d8 in spi_m_sync_send_cmd+12 at ../sd_mmc/sd_mmc_spi.c:219
|
|
|
|
|
[7] from 0x00000ac4 in sd_mmc_spi_card_init+36 at ../sd_mmc/sd_mmc.c:362
|
|
|
|
|
[8] from 0x00000ac4 in sd_mmc_check+64 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[9] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[+]
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00003e60 in hri_sercomspi_read_INTFLAG_reg+2 at ../hri/hri_sercom_d51.h:433
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg hw = 0x41012000
|
|
|
|
|
loc iflag = <optimized out>, hw = 0x41012000, rc = 0, ctrl = {txbuf = 0x20010545 "\225",rxbuf = 0x0 <exception_table>,txcnt = <optimized out>,rxcnt = 4,char_size…
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
Loading section .text, size 0x515c lma 0x0
|
|
|
|
|
Loading section .relocate, size 0x74 lma 0x515c
|
|
|
|
|
Start address 0x00000000, load size 20944
|
|
|
|
|
Transfer rate: 29 KB/sec, 6981 bytes/write.
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
Polling target samd51p20a.cpu failed, trying to reexamine
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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Could not find MEM-AP to control the core
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Examination failed, GDB will be halted. Polling again in 100ms
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Breakpoint 1 at 0x3514: file ../main.c, line 9.
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Note: automatically using hardware breakpoints for read-only addresses.
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Starting program: /storage/Shared/Documents/Projects/ePenguin/e54-GFX-Development-Board/software/Adafruit_Metro_M4_Grand_Central_Firmware/build/metro-m4.elf
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[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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Breakpoint 1, main () at ../main.c:9
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9 atmel_start_init();
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─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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~
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~
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~
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~
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~
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!0x00003514 main+0 push {r3, lr}
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0x00003516 main+2 ldr r3, [pc, #56] ; (0x3550 <main+60>)
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0x00003518 main+4 blx r3
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0x0000351a main+6 ldr r3, [pc, #56] ; (0x3554 <main+64>)
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0x0000351c main+8 blx r3
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─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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[1] break at 0x00003514 in ../main.c:9 for main hit 1 time
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─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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r0 0x20000078 r1 0x00000000 r2 0x00f00000 r3 0x00003515 r4 0x1ffffffd r5 0x00000017
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r6 0x20010460 r7 0x00000014 r8 0x00003c95 r9 0x00003ca3 r10 0x00000000 r11 0xfffbf5e7
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r12 0x20010545 sp 0x200105d8 lr 0x00003f95 pc 0x00003514 xPSR 0x61000000 fpscr 0x00000000
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msp 0x200105d8 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
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|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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~
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~
|
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|
1 #include "examples/driver_examples.h"
|
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2 #include <atmel_start.h>
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3 #include "hal_spi_m_sync.h"
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4 #include "sd_mmc_start.h"
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|
5 #include "pdebug.h"
|
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|
|
6 int main(void)
|
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|
7 {
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|
|
8 /* Initializes MCU, drivers and middleware */
|
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|
! 9 atmel_start_init();
|
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10
|
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11 pdebug_init();
|
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12 PORT->Group[1].DIR.reg |= (1 << 28);
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|
13 PORT->Group[1].OUT.reg |= (1 << 28);
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|
|
14
|
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|
15 PORT->Group[1].OUT.reg &= ~(1 << 28);
|
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|
|
16 spi_m_sync_enable(&SPI_0);
|
|
|
|
|
17 SDMMC_example();
|
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|
|
|
18
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00003514 in main+0 at ../main.c:9
|
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|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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|
|
|
[1] id 0 from 0x00003514 in main+0 at ../main.c:9
|
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|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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|
|
atmel_start_init () at ../atmel_start.c:8
|
|
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|
|
8 system_init();
|
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|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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|
~
|
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~
|
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~
|
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~
|
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~
|
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|
0x00003fc4 atmel_start_init+0 push {r4, lr}
|
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|
|
0x00003fc6 atmel_start_init+2 ldr r3, [pc, #20] ; (0x3fdc <atmel_start_init+24>)
|
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|
|
0x00003fc8 atmel_start_init+4 blx r3
|
|
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|
|
0x00003fca atmel_start_init+6 ldr r3, [pc, #20] ; (0x3fe0 <atmel_start_init+28>)
|
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|
0x00003fcc atmel_start_init+8 blx r3
|
|
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|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003514 in ../main.c:9 for main hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x20000078 r1 0x00000000 r2 0x00f00000 r3 0x00003fc5 r4 0x1ffffffd r5 0x00000017
|
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|
|
|
r6 0x20010460 r7 0x00000014 r8 0x00003c95 r9 0x00003ca3 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010545 sp 0x200105d0 lr 0x0000351b pc 0x00003fc4 xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x200105d0 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
1 #include <atmel_start.h>
|
|
|
|
|
2
|
|
|
|
|
3 /**
|
|
|
|
|
4 * Initializes MCU, drivers and middleware in the project
|
|
|
|
|
5 **/
|
|
|
|
|
6 void atmel_start_init(void)
|
|
|
|
|
7 {
|
|
|
|
|
8 system_init();
|
|
|
|
|
9 sd_mmc_stack_init();
|
|
|
|
|
10 diskio_init();
|
|
|
|
|
11 usb_init();
|
|
|
|
|
12 }
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00003fc4 in atmel_start_init+0 at ../atmel_start.c:8
|
|
|
|
|
[1] from 0x0000351a in main+6 at ../main.c:9
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00003fc4 in atmel_start_init+0 at ../atmel_start.c:8
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
Run till exit from #0 atmel_start_init () at ../atmel_start.c:8
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
|
|
|
|
|
Program stopped.
|
|
|
|
|
atmel_start_init () at ../atmel_start.c:8
|
|
|
|
|
8 system_init();
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x00003fc4 atmel_start_init+0 push {r4, lr}
|
|
|
|
|
0x00003fc6 atmel_start_init+2 ldr r3, [pc, #20] ; (0x3fdc <atmel_start_init+24>)
|
|
|
|
|
0x00003fc8 atmel_start_init+4 blx r3
|
|
|
|
|
0x00003fca atmel_start_init+6 ldr r3, [pc, #20] ; (0x3fe0 <atmel_start_init+28>)
|
|
|
|
|
0x00003fcc atmel_start_init+8 blx r3
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003514 in ../main.c:9 for main hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x20000078 r1 0x00000000 r2 0x00f00000 r3 0x00003fc5 r4 0x1ffffffd r5 0x00000017
|
|
|
|
|
r6 0x20010460 r7 0x00000014 r8 0x00003c95 r9 0x00003ca3 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010545 sp 0x200105d0 lr 0x0000351b pc 0x00003fc4 xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x200105d0 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
1 #include <atmel_start.h>
|
|
|
|
|
2
|
|
|
|
|
3 /**
|
|
|
|
|
4 * Initializes MCU, drivers and middleware in the project
|
|
|
|
|
5 **/
|
|
|
|
|
6 void atmel_start_init(void)
|
|
|
|
|
7 {
|
|
|
|
|
8 system_init();
|
|
|
|
|
9 sd_mmc_stack_init();
|
|
|
|
|
10 diskio_init();
|
|
|
|
|
11 usb_init();
|
|
|
|
|
12 }
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00003fc4 in atmel_start_init+0 at ../atmel_start.c:8
|
|
|
|
|
[1] from 0x0000351a in main+6 at ../main.c:9
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00003fc4 in atmel_start_init+0 at ../atmel_start.c:8
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
|
|
|
|
|
Program stopped.
|
|
|
|
|
atmel_start_init () at ../atmel_start.c:8
|
|
|
|
|
8 system_init();
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x00003fc4 atmel_start_init+0 push {r4, lr}
|
|
|
|
|
0x00003fc6 atmel_start_init+2 ldr r3, [pc, #20] ; (0x3fdc <atmel_start_init+24>)
|
|
|
|
|
0x00003fc8 atmel_start_init+4 blx r3
|
|
|
|
|
0x00003fca atmel_start_init+6 ldr r3, [pc, #20] ; (0x3fe0 <atmel_start_init+28>)
|
|
|
|
|
0x00003fcc atmel_start_init+8 blx r3
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003514 in ../main.c:9 for main hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x20000078 r1 0x00000000 r2 0x00f00000 r3 0x00003fc5 r4 0x1ffffffd r5 0x00000017
|
|
|
|
|
r6 0x20010460 r7 0x00000014 r8 0x00003c95 r9 0x00003ca3 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010545 sp 0x200105d0 lr 0x0000351b pc 0x00003fc4 xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x200105d0 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
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─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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~
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~
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~
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1 #include <atmel_start.h>
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2
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3 /**
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4 * Initializes MCU, drivers and middleware in the project
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5 **/
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6 void atmel_start_init(void)
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7 {
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8 system_init();
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9 sd_mmc_stack_init();
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10 diskio_init();
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11 usb_init();
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12 }
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~
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~
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~
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~
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~
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─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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[0] from 0x00003fc4 in atmel_start_init+0 at ../atmel_start.c:8
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[1] from 0x0000351a in main+6 at ../main.c:9
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─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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[1] id 0 from 0x00003fc4 in atmel_start_init+0 at ../atmel_start.c:8
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─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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target not halted
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target samd51p20a.cpu was not halted when step was requested
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Program received signal SIGINT, Interrupt.
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0x00003e60 in hri_sercomspi_read_INTFLAG_reg (hw=0x41012000) at ../hri/hri_sercom_d51.h:433
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433 return ((Sercom *)hw)->SPI.INTFLAG.reg;
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─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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~
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~
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~
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~
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0x00003e5e hri_sercomspi_read_INTFLAG_reg+0 ldrb r3, [r4, #24]
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0x00003e60 hri_sercomspi_read_INTFLAG_reg+2 uxtb r0, r3
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~
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~
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~
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~
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─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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|
[1] break at 0x00003514 in ../main.c:9 for main hit 1 time
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─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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|
r0 0x01000000 r1 0x00000000 r2 0x00000001 r3 0x00000001 r4 0x41012000 r5 0x00000000
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|
r6 0x20010570 r7 0x20000570 r8 0x00000001 r9 0x2001052c r10 0x00000000 r11 0xfffbf5e7
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|
r12 0x20010545 sp 0x20010508 lr 0x00003e57 pc 0x00003e60 xPSR 0x21000000 fpscr 0x00000000
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|
msp 0x20010508 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
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|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
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|
423 hri_sercomspi_intflag_reg_t mask)
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|
424 {
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|
425 uint8_t tmp;
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|
426 tmp = ((Sercom *)hw)->SPI.INTFLAG.reg;
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427 tmp &= mask;
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428 return tmp;
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429 }
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430
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431 static inline hri_sercomspi_intflag_reg_t hri_sercomspi_read_INTFLAG_reg(const void *const hw)
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|
432 {
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|
433 return ((Sercom *)hw)->SPI.INTFLAG.reg;
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|
434 }
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435
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436 static inline void hri_sercomspi_clear_INTFLAG_reg(const void *const hw, hri_sercomspi_intflag_reg_t mask)
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437 {
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|
438 ((Sercom *)hw)->SPI.INTFLAG.reg = mask;
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439 }
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440
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441 static inline bool hri_sercomusart_get_INTFLAG_DRE_bit(const void *const hw)
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|
442 {
|
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|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00003e60 in hri_sercomspi_read_INTFLAG_reg+2 at ../hri/hri_sercom_d51.h:433
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|
|
[1] from 0x00003e60 in _spi_m_sync_trans+60 at ../hpl/sercom/hpl_sercom.c:2737
|
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|
[2] from 0x00001628 in spi_m_sync_transfer+44 at ../hal/src/hal_spi_m_sync.c:184
|
|
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|
|
[3] from 0x00001660 in _spi_m_sync_io_write+40 at ../hal/src/hal_spi_m_sync.c:172
|
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|
|
[4] from 0x000016ae in spi_m_sync_io_write+6 at ../hal/src/hal_spi_m_sync.c:202
|
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|
|
[5] from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:476
|
|
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|
|
[6] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
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|
[7] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
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|
|
[8] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
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|
[9] from 0x0000354e in main+58 at ../main.c:17
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00003e60 in hri_sercomspi_read_INTFLAG_reg+2 at ../hri/hri_sercom_d51.h:433
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
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|
|
arg hw = 0x41012000
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|
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|
|
loc iflag = <optimized out>, hw = 0x41012000, rc = 0, ctrl = {txbuf = 0x20010570 "\230\002",rxbuf = 0x0 <exception_table>,txcnt = <optimized out>,rxcnt = 0,char_…
|
|
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|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
Continuing.
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
|
|
|
|
|
Program received signal SIGINT, Interrupt.
|
|
|
|
|
0x00003e68 in _spi_m_sync_trans (dev=dev@entry=0x20000570 <SPI_0+4>, msg=msg@entry=0x2001052c) at ../hpl/sercom/hpl_sercom.c:2742
|
|
|
|
|
2742 if (ctrl.rxcnt >= ctrl.txcnt) {
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00003e5e _spi_m_sync_trans+58 ldrb r3, [r4, #24]
|
|
|
|
|
0x00003e60 _spi_m_sync_trans+60 uxtb r0, r3
|
|
|
|
|
0x00003e62 _spi_m_sync_trans+62 lsls r3, r3, #29
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|
|
|
0x00003e64 _spi_m_sync_trans+64 bmi.n 0x3e86 <_spi_m_sync_trans+98>
|
|
|
|
|
0x00003e66 _spi_m_sync_trans+66 cmp r2, r1
|
|
|
|
|
0x00003e68 _spi_m_sync_trans+68 bhi.n 0x3e9c <_spi_m_sync_trans+120>
|
|
|
|
|
0x00003e6a _spi_m_sync_trans+70 lsls r3, r0, #31
|
|
|
|
|
0x00003e6c _spi_m_sync_trans+72 bpl.n 0x3e9c <_spi_m_sync_trans+120>
|
|
|
|
|
0x00003e6e _spi_m_sync_trans+74 ldrh r3, [r7, #6]
|
|
|
|
|
0x00003e70 _spi_m_sync_trans+76 cbz r6, 0x3e80 <_spi_m_sync_trans+92>
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] break at 0x00003514 in ../main.c:9 for main hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x00000000 r2 0x00000001 r3 0x20000000 r4 0x41012000 r5 0x00000000
|
|
|
|
|
r6 0x20010570 r7 0x20000570 r8 0x00000001 r9 0x2001052c r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010545 sp 0x20010508 lr 0x00003e57 pc 0x00003e68 xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010508 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
2732 if (!hri_sercomspi_get_CTRLA_ENABLE_bit(hw)) {
|
|
|
|
|
2733 return ERR_NOT_INITIALIZED;
|
|
|
|
|
2734 }
|
|
|
|
|
2735
|
|
|
|
|
2736 for (;;) {
|
|
|
|
|
2737 uint32_t iflag = hri_sercomspi_read_INTFLAG_reg(hw);
|
|
|
|
|
2738
|
|
|
|
|
2739 if (!_spi_rx_check_and_receive(hw, iflag, &ctrl)) {
|
|
|
|
|
2740 /* In master mode, do not start next byte before previous byte received
|
|
|
|
|
2741 * to make better output waveform */
|
|
|
|
|
2742 if (ctrl.rxcnt >= ctrl.txcnt) {
|
|
|
|
|
2743 _spi_tx_check_and_send(hw, iflag, &ctrl, dev->dummy_byte);
|
|
|
|
|
2744 }
|
|
|
|
|
2745 }
|
|
|
|
|
2746
|
|
|
|
|
2747 rc = _spi_err_check(iflag, hw);
|
|
|
|
|
2748
|
|
|
|
|
2749 if (rc < 0) {
|
|
|
|
|
2750 break;
|
|
|
|
|
2751 }
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00003e68 in _spi_m_sync_trans+68 at ../hpl/sercom/hpl_sercom.c:2742
|
|
|
|
|
[1] from 0x00001628 in spi_m_sync_transfer+44 at ../hal/src/hal_spi_m_sync.c:184
|
|
|
|
|
[2] from 0x00001660 in _spi_m_sync_io_write+40 at ../hal/src/hal_spi_m_sync.c:172
|
|
|
|
|
[3] from 0x000016ae in spi_m_sync_io_write+6 at ../hal/src/hal_spi_m_sync.c:202
|
|
|
|
|
[4] from 0x0000154a in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:476
|
|
|
|
|
[5] from 0x00000aba in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[6] from 0x00000aba in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[7] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[8] from 0x0000354e in main+58 at ../main.c:17
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00003e68 in _spi_m_sync_trans+68 at ../hpl/sercom/hpl_sercom.c:2742
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg dev = 0x20000570 <SPI_0+4>: {prvt = 0x41012000,char_size = 1 '\001',dummy_byte = 255}, msg = 0x2001052c: {txbuf = 0x2001056f "\377\230\002",rxbuf = 0x0 <exception_table>,size = 1}
|
|
|
|
|
loc iflag = 1, hw = 0x41012000, rc = 0, ctrl = {txbuf = 0x20010570 "\230\002",rxbuf = 0x0 <exception_table>,txcnt = <optimized out>,rxcnt = 0,char_…
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
Breakpoint 2 at 0x352e: file ../main.c, line 13.
|
|
|
|
|
Program not restarted.
|
|
|
|
|
Starting program: /storage/Shared/Documents/Projects/ePenguin/e54-GFX-Development-Board/software/Adafruit_Metro_M4_Grand_Central_Firmware/build/metro-m4.elf
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
|
|
|
|
|
Program stopped.
|
|
|
|
|
Reset_Handler () at ../samd51a/gcc/gcc/startup_samd51.c:638
|
|
|
|
|
638 if (pSrc != pDest) {
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x00003f34 Reset_Handler+0 ldr r1, [pc, #96] ; (0x3f98 <Reset_Handler+100>)
|
|
|
|
|
0x00003f36 Reset_Handler+2 ldr r0, [pc, #100] ; (0x3f9c <Reset_Handler+104>)
|
|
|
|
|
0x00003f38 Reset_Handler+4 cmp r1, r0
|
|
|
|
|
0x00003f3a Reset_Handler+6 push {r4, lr}
|
|
|
|
|
0x00003f3c Reset_Handler+8 beq.n 0x3f54 <Reset_Handler+32>
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[2] break at 0x0000352e in ../main.c:13 for main.c:13
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x00000000 r2 0x00000001 r3 0x20000000 r4 0x41012000 r5 0x00000000
|
|
|
|
|
r6 0x20010570 r7 0x20000570 r8 0x00000001 r9 0x2001052c r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010545 sp 0x200105e0 lr 0xffffffff pc 0x00003f34 xPSR 0x01000000 fpscr 0x00000000
|
|
|
|
|
msp 0x200105e0 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
628 * To initialize the device, and call the main() routine.
|
|
|
|
|
629 */
|
|
|
|
|
630 void Reset_Handler(void)
|
|
|
|
|
631 {
|
|
|
|
|
632 uint32_t *pSrc, *pDest;
|
|
|
|
|
633
|
|
|
|
|
634 /* Initialize the relocate segment */
|
|
|
|
|
635 pSrc = &_etext;
|
|
|
|
|
636 pDest = &_srelocate;
|
|
|
|
|
637
|
|
|
|
|
638 if (pSrc != pDest) {
|
|
|
|
|
639 for (; pDest < &_erelocate;) {
|
|
|
|
|
640 *pDest++ = *pSrc++;
|
|
|
|
|
641 }
|
|
|
|
|
642 }
|
|
|
|
|
643
|
|
|
|
|
644 /* Clear the zero segment */
|
|
|
|
|
645 for (pDest = &_szero; pDest < &_ezero;) {
|
|
|
|
|
646 *pDest++ = 0;
|
|
|
|
|
647 }
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00003f34 in Reset_Handler+0 at ../samd51a/gcc/gcc/startup_samd51.c:638
|
|
|
|
|
[1] from 0xfffffffe
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00003f34 in Reset_Handler+0 at ../samd51a/gcc/gcc/startup_samd51.c:638
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
|
|
|
|
|
Breakpoint 2, main () at ../main.c:13
|
|
|
|
|
13 PORT->Group[1].OUT.reg |= (1 << 28);
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x0000351e main+10 ldr r3, [pc, #56] ; (0x3558 <main+68>)
|
|
|
|
|
0x00003520 main+12 ldr r0, [pc, #56] ; (0x355c <main+72>)
|
|
|
|
|
0x00003522 main+14 ldr.w r2, [r3, #128] ; 0x80
|
|
|
|
|
0x00003526 main+18 orr.w r2, r2, #268435456 ; 0x10000000
|
|
|
|
|
0x0000352a main+22 str.w r2, [r3, #128] ; 0x80
|
|
|
|
|
!0x0000352e main+26 ldr.w r2, [r3, #144] ; 0x90
|
|
|
|
|
0x00003532 main+30 orr.w r2, r2, #268435456 ; 0x10000000
|
|
|
|
|
0x00003536 main+34 str.w r2, [r3, #144] ; 0x90
|
|
|
|
|
0x0000353a main+38 ldr.w r2, [r3, #144] ; 0x90
|
|
|
|
|
0x0000353e main+42 bic.w r2, r2, #268435456 ; 0x10000000
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[2] break at 0x0000352e in ../main.c:13 for main.c:13 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x2000056c r1 0x0000000a r2 0x1c3c0000 r3 0x41008000 r4 0x1ffffffd r5 0x00000000
|
|
|
|
|
r6 0x20010570 r7 0x20000570 r8 0x00000001 r9 0x2001052c r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x200105d0 lr 0x00004065 pc 0x0000352e xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x200105d0 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
3 #include "hal_spi_m_sync.h"
|
|
|
|
|
4 #include "sd_mmc_start.h"
|
|
|
|
|
5 #include "pdebug.h"
|
|
|
|
|
6 int main(void)
|
|
|
|
|
7 {
|
|
|
|
|
8 /* Initializes MCU, drivers and middleware */
|
|
|
|
|
9 atmel_start_init();
|
|
|
|
|
10
|
|
|
|
|
11 pdebug_init();
|
|
|
|
|
12 PORT->Group[1].DIR.reg |= (1 << 28);
|
|
|
|
|
!13 PORT->Group[1].OUT.reg |= (1 << 28);
|
|
|
|
|
14
|
|
|
|
|
15 PORT->Group[1].OUT.reg &= ~(1 << 28);
|
|
|
|
|
16 spi_m_sync_enable(&SPI_0);
|
|
|
|
|
17 SDMMC_example();
|
|
|
|
|
18
|
|
|
|
|
19
|
|
|
|
|
20 /* Replace with your application code */
|
|
|
|
|
21 while (1) {
|
|
|
|
|
22
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000352e in main+26 at ../main.c:13
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000352e in main+26 at ../main.c:13
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
15 PORT->Group[1].OUT.reg &= ~(1 << 28);
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00003526 main+18 orr.w r2, r2, #268435456 ; 0x10000000
|
|
|
|
|
0x0000352a main+22 str.w r2, [r3, #128] ; 0x80
|
|
|
|
|
!0x0000352e main+26 ldr.w r2, [r3, #144] ; 0x90
|
|
|
|
|
0x00003532 main+30 orr.w r2, r2, #268435456 ; 0x10000000
|
|
|
|
|
0x00003536 main+34 str.w r2, [r3, #144] ; 0x90
|
|
|
|
|
0x0000353a main+38 ldr.w r2, [r3, #144] ; 0x90
|
|
|
|
|
0x0000353e main+42 bic.w r2, r2, #268435456 ; 0x10000000
|
|
|
|
|
0x00003542 main+46 str.w r2, [r3, #144] ; 0x90
|
|
|
|
|
0x00003546 main+50 ldr r3, [pc, #24] ; (0x3560 <main+76>)
|
|
|
|
|
0x00003548 main+52 blx r3
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[2] break at 0x0000352e in ../main.c:13 for main.c:13 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x2000056c r1 0x0000000a r2 0x10000000 r3 0x41008000 r4 0x1ffffffd r5 0x00000000
|
|
|
|
|
r6 0x20010570 r7 0x20000570 r8 0x00000001 r9 0x2001052c r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x200105d0 lr 0x00004065 pc 0x0000353a xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x200105d0 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
5 #include "pdebug.h"
|
|
|
|
|
6 int main(void)
|
|
|
|
|
7 {
|
|
|
|
|
8 /* Initializes MCU, drivers and middleware */
|
|
|
|
|
9 atmel_start_init();
|
|
|
|
|
10
|
|
|
|
|
11 pdebug_init();
|
|
|
|
|
12 PORT->Group[1].DIR.reg |= (1 << 28);
|
|
|
|
|
!13 PORT->Group[1].OUT.reg |= (1 << 28);
|
|
|
|
|
14
|
|
|
|
|
15 PORT->Group[1].OUT.reg &= ~(1 << 28);
|
|
|
|
|
16 spi_m_sync_enable(&SPI_0);
|
|
|
|
|
17 SDMMC_example();
|
|
|
|
|
18
|
|
|
|
|
19
|
|
|
|
|
20 /* Replace with your application code */
|
|
|
|
|
21 while (1) {
|
|
|
|
|
22
|
|
|
|
|
23 }
|
|
|
|
|
24 }
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000353a in main+38 at ../main.c:15
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000353a in main+38 at ../main.c:15
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
16 spi_m_sync_enable(&SPI_0);
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00003532 main+30 orr.w r2, r2, #268435456 ; 0x10000000
|
|
|
|
|
0x00003536 main+34 str.w r2, [r3, #144] ; 0x90
|
|
|
|
|
0x0000353a main+38 ldr.w r2, [r3, #144] ; 0x90
|
|
|
|
|
0x0000353e main+42 bic.w r2, r2, #268435456 ; 0x10000000
|
|
|
|
|
0x00003542 main+46 str.w r2, [r3, #144] ; 0x90
|
|
|
|
|
0x00003546 main+50 ldr r3, [pc, #24] ; (0x3560 <main+76>)
|
|
|
|
|
0x00003548 main+52 blx r3
|
|
|
|
|
0x0000354a main+54 ldr r3, [pc, #24] ; (0x3564 <main+80>)
|
|
|
|
|
0x0000354c main+56 blx r3
|
|
|
|
|
0x0000354e main+58 b.n 0x354e <main+58>
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[2] break at 0x0000352e in ../main.c:13 for main.c:13 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x2000056c r1 0x0000000a r2 0x00000000 r3 0x41008000 r4 0x1ffffffd r5 0x00000000
|
|
|
|
|
r6 0x20010570 r7 0x20000570 r8 0x00000001 r9 0x2001052c r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x200105d0 lr 0x00004065 pc 0x00003546 xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x200105d0 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
6 int main(void)
|
|
|
|
|
7 {
|
|
|
|
|
8 /* Initializes MCU, drivers and middleware */
|
|
|
|
|
9 atmel_start_init();
|
|
|
|
|
10
|
|
|
|
|
11 pdebug_init();
|
|
|
|
|
12 PORT->Group[1].DIR.reg |= (1 << 28);
|
|
|
|
|
!13 PORT->Group[1].OUT.reg |= (1 << 28);
|
|
|
|
|
14
|
|
|
|
|
15 PORT->Group[1].OUT.reg &= ~(1 << 28);
|
|
|
|
|
16 spi_m_sync_enable(&SPI_0);
|
|
|
|
|
17 SDMMC_example();
|
|
|
|
|
18
|
|
|
|
|
19
|
|
|
|
|
20 /* Replace with your application code */
|
|
|
|
|
21 while (1) {
|
|
|
|
|
22
|
|
|
|
|
23 }
|
|
|
|
|
24 }
|
|
|
|
|
~
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00003546 in main+50 at ../main.c:16
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00003546 in main+50 at ../main.c:16
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
17 SDMMC_example();
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x0000353a main+38 ldr.w r2, [r3, #144] ; 0x90
|
|
|
|
|
0x0000353e main+42 bic.w r2, r2, #268435456 ; 0x10000000
|
|
|
|
|
0x00003542 main+46 str.w r2, [r3, #144] ; 0x90
|
|
|
|
|
0x00003546 main+50 ldr r3, [pc, #24] ; (0x3560 <main+76>)
|
|
|
|
|
0x00003548 main+52 blx r3
|
|
|
|
|
0x0000354a main+54 ldr r3, [pc, #24] ; (0x3564 <main+80>)
|
|
|
|
|
0x0000354c main+56 blx r3
|
|
|
|
|
0x0000354e main+58 b.n 0x354e <main+58>
|
|
|
|
|
0x00003550 main+60 subs r7, #197 ; 0xc5
|
|
|
|
|
0x00003552 main+62 movs r0, r0
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[2] break at 0x0000352e in ../main.c:13 for main.c:13 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000000 r1 0x00000003 r2 0x00000000 r3 0x00003ba1 r4 0x1ffffffd r5 0x00000000
|
|
|
|
|
r6 0x20010570 r7 0x20000570 r8 0x00000001 r9 0x2001052c r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x200105d0 lr 0x00003bb9 pc 0x0000354a xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x200105d0 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
7 {
|
|
|
|
|
8 /* Initializes MCU, drivers and middleware */
|
|
|
|
|
9 atmel_start_init();
|
|
|
|
|
10
|
|
|
|
|
11 pdebug_init();
|
|
|
|
|
12 PORT->Group[1].DIR.reg |= (1 << 28);
|
|
|
|
|
!13 PORT->Group[1].OUT.reg |= (1 << 28);
|
|
|
|
|
14
|
|
|
|
|
15 PORT->Group[1].OUT.reg &= ~(1 << 28);
|
|
|
|
|
16 spi_m_sync_enable(&SPI_0);
|
|
|
|
|
17 SDMMC_example();
|
|
|
|
|
18
|
|
|
|
|
19
|
|
|
|
|
20 /* Replace with your application code */
|
|
|
|
|
21 while (1) {
|
|
|
|
|
22
|
|
|
|
|
23 }
|
|
|
|
|
24 }
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000354a in main+54 at ../main.c:17
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000354a in main+54 at ../main.c:17
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
SDMMC_example () at ../sd_mmc_start.c:33
|
|
|
|
|
33 while (SD_MMC_OK != sd_mmc_check(0)) {
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x000007bc SDMMC_example+0 push {r4, r5, r6, lr}
|
|
|
|
|
0x000007be SDMMC_example+2 ldr r5, [pc, #48] ; (0x7f0 <SDMMC_example+52>)
|
|
|
|
|
0x000007c0 SDMMC_example+4 movs r0, #0
|
|
|
|
|
0x000007c2 SDMMC_example+6 blx r5
|
|
|
|
|
0x000007c4 SDMMC_example+8 mov r4, r0
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[2] break at 0x0000352e in ../main.c:13 for main.c:13 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000000 r1 0x00000003 r2 0x00000000 r3 0x000007bd r4 0x1ffffffd r5 0x00000000
|
|
|
|
|
r6 0x20010570 r7 0x20000570 r8 0x00000001 r9 0x2001052c r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x00000004 sp 0x200105d0 lr 0x0000354f pc 0x000007bc xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x200105d0 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
23 {-1, CONF_SD_MMC_0_WP_DETECT_VALUE},
|
|
|
|
|
24 };
|
|
|
|
|
25
|
|
|
|
|
26 static uint8_t sd_mmc_block[512];
|
|
|
|
|
27
|
|
|
|
|
28 /*
|
|
|
|
|
29 * Example
|
|
|
|
|
30 */
|
|
|
|
|
31 void SDMMC_example(void)
|
|
|
|
|
32 {
|
|
|
|
|
33 while (SD_MMC_OK != sd_mmc_check(0)) {
|
|
|
|
|
34 /* Wait card ready. */
|
|
|
|
|
35 }
|
|
|
|
|
36 if (sd_mmc_get_type(0) & (CARD_TYPE_SD | CARD_TYPE_MMC)) {
|
|
|
|
|
37 /* Read card block 0 */
|
|
|
|
|
38 sd_mmc_init_read_blocks(0, 0, 1);
|
|
|
|
|
39 sd_mmc_start_read_blocks(sd_mmc_block, 1);
|
|
|
|
|
40 sd_mmc_wait_end_of_read_blocks(false);
|
|
|
|
|
41 }
|
|
|
|
|
42 #if (CONF_SDIO_SUPPORT == 1)
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x000007bc in SDMMC_example+0 at ../sd_mmc_start.c:33
|
|
|
|
|
[1] from 0x0000354e in main+58 at ../main.c:17
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x000007bc in SDMMC_example+0 at ../sd_mmc_start.c:33
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
|
|
|
|
|
Program received signal SIGINT, Interrupt.
|
|
|
|
|
0x000007c8 in SDMMC_example () at ../sd_mmc_start.c:33
|
|
|
|
|
33 while (SD_MMC_OK != sd_mmc_check(0)) {
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
0x000007be SDMMC_example+2 ldr r5, [pc, #48] ; (0x7f0 <SDMMC_example+52>)
|
|
|
|
|
0x000007c0 SDMMC_example+4 movs r0, #0
|
|
|
|
|
0x000007c2 SDMMC_example+6 blx r5
|
|
|
|
|
0x000007c4 SDMMC_example+8 mov r4, r0
|
|
|
|
|
0x000007c6 SDMMC_example+10 cmp r0, #0
|
|
|
|
|
0x000007c8 SDMMC_example+12 bne.n 0x7c0 <SDMMC_example+4>
|
|
|
|
|
0x000007ca SDMMC_example+14 ldr r3, [pc, #40] ; (0x7f4 <SDMMC_example+56>)
|
|
|
|
|
0x000007cc SDMMC_example+16 blx r3
|
|
|
|
|
0x000007ce SDMMC_example+18 lsls r3, r0, #30
|
|
|
|
|
0x000007d0 SDMMC_example+20 beq.n 0x7ee <SDMMC_example+50>
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[2] break at 0x0000352e in ../main.c:13 for main.c:13 hit 1 time
|
|
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|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000003 r1 0x00000000 r2 0x41008000 r3 0x10000000 r4 0x00000003 r5 0x00000a85
|
|
|
|
|
r6 0x20010570 r7 0x20000570 r8 0x00000001 r9 0x2001052c r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010545 sp 0x200105c0 lr 0x00000a99 pc 0x000007c8 xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x200105c0 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
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|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
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|
|
23 {-1, CONF_SD_MMC_0_WP_DETECT_VALUE},
|
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|
|
24 };
|
|
|
|
|
25
|
|
|
|
|
26 static uint8_t sd_mmc_block[512];
|
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|
|
27
|
|
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|
|
28 /*
|
|
|
|
|
29 * Example
|
|
|
|
|
30 */
|
|
|
|
|
31 void SDMMC_example(void)
|
|
|
|
|
32 {
|
|
|
|
|
33 while (SD_MMC_OK != sd_mmc_check(0)) {
|
|
|
|
|
34 /* Wait card ready. */
|
|
|
|
|
35 }
|
|
|
|
|
36 if (sd_mmc_get_type(0) & (CARD_TYPE_SD | CARD_TYPE_MMC)) {
|
|
|
|
|
37 /* Read card block 0 */
|
|
|
|
|
38 sd_mmc_init_read_blocks(0, 0, 1);
|
|
|
|
|
39 sd_mmc_start_read_blocks(sd_mmc_block, 1);
|
|
|
|
|
40 sd_mmc_wait_end_of_read_blocks(false);
|
|
|
|
|
41 }
|
|
|
|
|
42 #if (CONF_SDIO_SUPPORT == 1)
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x000007c8 in SDMMC_example+12 at ../sd_mmc_start.c:33
|
|
|
|
|
[1] from 0x0000354e in main+58 at ../main.c:17
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x000007c8 in SDMMC_example+12 at ../sd_mmc_start.c:33
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
sd_mmc_check (slot=slot@entry=0 '\000') at ../sd_mmc/sd_mmc.c:1616
|
|
|
|
|
1616 sd_mmc_err = sd_mmc_select_slot(slot);
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x00000a84 sd_mmc_check+0 stmdb sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr}
|
|
|
|
|
0x00000a88 sd_mmc_check+4 ldr r3, [pc, #572] ; (0xcc8 <sd_mmc_check+580>)
|
|
|
|
|
0x00000a8a sd_mmc_check+6 sub sp, #28
|
|
|
|
|
0x00000a8c sd_mmc_check+8 blx r3
|
|
|
|
|
0x00000a8e sd_mmc_check+10 cmp r0, #1
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[2] break at 0x0000352e in ../main.c:13 for main.c:13 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000000 r1 0x00000000 r2 0x41008000 r3 0x10000000 r4 0x00000003 r5 0x00000a85
|
|
|
|
|
r6 0x20010570 r7 0x20000570 r8 0x00000001 r9 0x2001052c r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010545 sp 0x200105c0 lr 0x000007c5 pc 0x00000a84 xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x200105c0 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1606
|
|
|
|
|
1607 uint8_t sd_mmc_nb_slot(void)
|
|
|
|
|
1608 {
|
|
|
|
|
1609 return CONF_SD_MMC_MEM_CNT;
|
|
|
|
|
1610 }
|
|
|
|
|
1611
|
|
|
|
|
1612 sd_mmc_err_t sd_mmc_check(uint8_t slot)
|
|
|
|
|
1613 {
|
|
|
|
|
1614 sd_mmc_err_t sd_mmc_err;
|
|
|
|
|
1615
|
|
|
|
|
1616 sd_mmc_err = sd_mmc_select_slot(slot);
|
|
|
|
|
1617 if (sd_mmc_err != SD_MMC_INIT_ONGOING) {
|
|
|
|
|
1618 sd_mmc_deselect_slot();
|
|
|
|
|
1619 return sd_mmc_err;
|
|
|
|
|
1620 }
|
|
|
|
|
1621
|
|
|
|
|
1622 // SPI MODE
|
|
|
|
|
1623 /*
|
|
|
|
|
1624 // Initialization of the card requested
|
|
|
|
|
1625 if (sd_mmc_mci_card_init()) {
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00000a84 in sd_mmc_check+0 at ../sd_mmc/sd_mmc.c:1616
|
|
|
|
|
[1] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[2] from 0x0000354e in main+58 at ../main.c:17
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00000a84 in sd_mmc_check+0 at ../sd_mmc/sd_mmc.c:1616
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg slot = 0 '\000'
|
|
|
|
|
loc sd_mmc_err = <optimized out>
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[H[J[3J─── Output/messages ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
sd_mmc_select_slot (slot=0 '\000') at ../sd_mmc/sd_mmc.c:1276
|
|
|
|
|
1276 if (slot >= CONF_SD_MMC_MEM_CNT) {
|
|
|
|
|
─── Assembly ────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
0x0000090c sd_mmc_select_slot+0 push {r3, r4, r5, lr}
|
|
|
|
|
0x0000090e sd_mmc_select_slot+2 cmp r0, #0
|
|
|
|
|
0x00000910 sd_mmc_select_slot+4 bne.n 0x99a <sd_mmc_select_slot+142>
|
|
|
|
|
0x00000912 sd_mmc_select_slot+6 ldr r4, [pc, #140] ; (0x9a0 <sd_mmc_select_slot+148>)
|
|
|
|
|
0x00000914 sd_mmc_select_slot+8 ldr r3, [r4, #12]
|
|
|
|
|
─── Breakpoints ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[2] break at 0x0000352e in ../main.c:13 for main.c:13 hit 1 time
|
|
|
|
|
─── Expressions ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000000 r1 0x00000000 r2 0x41008000 r3 0x0000090d r4 0x00000003 r5 0x00000a85
|
|
|
|
|
r6 0x20010570 r7 0x20000570 r8 0x00000001 r9 0x2001052c r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010545 sp 0x20010580 lr 0x00000a8f pc 0x0000090c xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010580 psp 0xfffeefec primask 0x00 basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
1266 * \param slot Card slot number
|
|
|
|
|
1267 *
|
|
|
|
|
1268 * \retval SD_MMC_ERR_SLOT Wrong slot number
|
|
|
|
|
1269 * \retval SD_MMC_ERR_NO_CARD No card present on slot
|
|
|
|
|
1270 * \retval SD_MMC_ERR_UNUSABLE Unusable card
|
|
|
|
|
1271 * \retval SD_MMC_INIT_ONGOING Card initialization requested
|
|
|
|
|
1272 * \retval SD_MMC_OK Card present
|
|
|
|
|
1273 */
|
|
|
|
|
1274 static sd_mmc_err_t sd_mmc_select_slot(uint8_t slot)
|
|
|
|
|
1275 {
|
|
|
|
|
1276 if (slot >= CONF_SD_MMC_MEM_CNT) {
|
|
|
|
|
1277 return SD_MMC_ERR_SLOT;
|
|
|
|
|
1278 }
|
|
|
|
|
1279
|
|
|
|
|
1280 if (_cd && _cd[slot].pin != -1) {
|
|
|
|
|
1281 /** Card Detect pins */
|
|
|
|
|
1282 if (gpio_get_pin_level(_cd[slot].pin) != _cd[slot].val) {
|
|
|
|
|
1283 if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_DEBOUNCE) {
|
|
|
|
|
1284 SD_MMC_STOP_TIMEOUT();
|
|
|
|
|
1285 }
|
|
|
|
|
─── Stack ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000090c in sd_mmc_select_slot+0 at ../sd_mmc/sd_mmc.c:1276
|
|
|
|
|
[1] from 0x00000a8e in sd_mmc_check+10 at ../sd_mmc/sd_mmc.c:1616
|
|
|
|
|
[2] from 0x000007c4 in SDMMC_example+8 at ../sd_mmc_start.c:33
|
|
|
|
|
[3] from 0x0000354e in main+58 at ../main.c:17
|
|
|
|
|
─── Threads ─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000090c in sd_mmc_select_slot+0 at ../sd_mmc/sd_mmc.c:1276
|
|
|
|
|
─── Variables ───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
arg slot = 0 '\000'
|
|
|
|
|
─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
Detaching from program: /storage/Shared/Documents/Projects/ePenguin/e54-GFX-Development-Board/software/Adafruit_Metro_M4_Grand_Central_Firmware/build/metro-m4.elf, Remote target
|
|
|
|
|
[Inferior 1 (Remote target) detached]
|
|
|
|
|
0x0000090c in sd_mmc_configure_slot () at ../sd_mmc/sd_mmc.c:1338
|
|
|
|
|
1338 driver_select_device(
|
|
|
|
|
─── Assembly ───────────────────────────────────────────────────────────────────
|
|
|
|
|
0x00000902 sd_mmc_configure_slot+6 pop {r4, pc}
|
|
|
|
|
0x00000904 sd_mmc_configure_slot+8 lsls r0, r3, #10
|
|
|
|
|
0x00000906 sd_mmc_configure_slot+10 movs r0, #0
|
|
|
|
|
0x00000908 sd_mmc_configure_slot+12 asrs r1, r3, #21
|
|
|
|
|
0x0000090a sd_mmc_configure_slot+14 movs r0, r0
|
|
|
|
|
0x0000090c sd_mmc_configure_slot+16 push {r3, r4, r5, lr}
|
|
|
|
|
0x0000090e sd_mmc_configure_slot+18 cmp r0, #0
|
|
|
|
|
0x00000910 sd_mmc_configure_slot+20 bne.n 0x99a <sd_mmc_select_slot+118>
|
|
|
|
|
0x00000912 sd_mmc_configure_slot+22 ldr r4, [pc, #140] ; (0x9a0 <sd_mmc_select_slot+124>)
|
|
|
|
|
0x00000914 sd_mmc_configure_slot+24 ldr r3, [r4, #12]
|
|
|
|
|
─── Breakpoints ────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Expressions ────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ─────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ──────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000000 r1 0x00000000 r2 0x41008000
|
|
|
|
|
r3 0x0000090d r4 0x00000003 r5 0x00000a85
|
|
|
|
|
r6 0x20010570 r7 0x20000570 r8 0x00000001
|
|
|
|
|
r9 0x2001052c r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x20010545 sp 0x20010580 lr 0x00000a8f
|
|
|
|
|
pc 0x0000090c xPSR 0x61000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010580 psp 0xfffeefec primask 0x00
|
|
|
|
|
basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ─────────────────────────────────────────────────────────────────────
|
|
|
|
|
1328 sd_mmc_card = &sd_mmc_cards[slot];
|
|
|
|
|
1329 sd_mmc_configure_slot();
|
|
|
|
|
1330 return (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_INIT) ? SD_MMC_INIT_ONGOING : SD_MMC_OK;
|
|
|
|
|
1331 }
|
|
|
|
|
1332
|
|
|
|
|
1333 /**
|
|
|
|
|
1334 * \brief Configures the driver with the selected card configuration
|
|
|
|
|
1335 */
|
|
|
|
|
1336 static void sd_mmc_configure_slot(void)
|
|
|
|
|
1337 {
|
|
|
|
|
1338 driver_select_device(
|
|
|
|
|
1339 sd_mmc_hal, sd_mmc_slot_sel, sd_mmc_card->clock, sd_mmc_card->bus_width, sd_mmc_card->high_speed);
|
|
|
|
|
1340 }
|
|
|
|
|
1341
|
|
|
|
|
1342
|
|
|
|
|
1343
|
|
|
|
|
1344 /**
|
|
|
|
|
1345 * \brief Deselect the current card slot
|
|
|
|
|
1346 */
|
|
|
|
|
1347 static void sd_mmc_deselect_slot(void)
|
|
|
|
|
─── Stack ──────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x0000090c in sd_mmc_configure_slot+16 at ../sd_mmc/sd_mmc.c:1338
|
|
|
|
|
[1] from 0x00000000
|
|
|
|
|
─── Threads ────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x0000090c in sd_mmc_configure_slot+16 at ../sd_mmc/sd_mmc.c:1338
|
|
|
|
|
─── Variables ──────────────────────────────────────────────────────────────────
|
|
|
|
|
────────────────────────────────────────────────────────────────────────────────
|
|
|
|
|
Loading section .text, size 0x5178 lma 0x0
|
|
|
|
|
Loading section .relocate, size 0x74 lma 0x5178
|
|
|
|
|
Start address 0x00000000, load size 20972
|
|
|
|
|
Transfer rate: 29 KB/sec, 6990 bytes/write.
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
Failed to write memory and, additionally, failed to find out where
|
|
|
|
|
Polling target samd51p20a.cpu failed, trying to reexamine
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
|
|
|
|
|
SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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Could not find MEM-AP to control the core
|
|
|
|
|
Examination failed, GDB will be halted. Polling again in 100ms
|
|
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|
|
A debugging session is active.
|
|
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|
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|
|
Inferior 1 [Remote target] will be detached.
|
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|
|
Quit anyway? (y or n) [answered Y; input not from terminal]
|
|
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|
|
[Inferior 1 (Remote target) detached]
|
|
|
|
|
_spi_err_check (hw=<optimized out>, iflag=1) at ../hpl/sercom/hpl_sercom.c:2708
|
|
|
|
|
2708 if (SERCOM_SPI_INTFLAG_ERROR & iflag) {
|
|
|
|
|
─── Assembly ───────────────────────────────────────────────────────────────────
|
|
|
|
|
~
|
|
|
|
|
~
|
|
|
|
|
~
|
|
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|
|
~
|
|
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|
~
|
|
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|
0x00003eb4 _spi_err_check+0 lsls r0, r0, #24
|
|
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|
0x00003eb6 _spi_err_check+2 bmi.n 0x3ec8 <_spi_m_sync_trans+140>
|
|
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|
|
0x00003eb8 _spi_err_check+4 ldr.w r3, [r9, #8]
|
|
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|
|
0x00003ebc _spi_err_check+8 cmp r3, r2
|
|
|
|
|
0x00003ebe _spi_err_check+10 bhi.n 0x3e76 <_spi_m_sync_trans+58>
|
|
|
|
|
─── Breakpoints ────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Expressions ────────────────────────────────────────────────────────────────
|
|
|
|
|
─── History ────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Memory ─────────────────────────────────────────────────────────────────────
|
|
|
|
|
─── Registers ──────────────────────────────────────────────────────────────────
|
|
|
|
|
r0 0x00000001 r1 0x00000000 r2 0x00000001
|
|
|
|
|
r3 0x20000000 r4 0x41012000 r5 0x00000000
|
|
|
|
|
r6 0x20010568 r7 0x20000570 r8 0x00000001
|
|
|
|
|
r9 0x20010524 r10 0x00000000 r11 0xfffbf5e7
|
|
|
|
|
r12 0x0000000a sp 0x20010500 lr 0x00003e6f
|
|
|
|
|
pc 0x00003eb4 xPSR 0x21000000 fpscr 0x00000000
|
|
|
|
|
msp 0x20010500 psp 0xfffeefec primask 0x00
|
|
|
|
|
basepri 0x00 faultmask 0x00 control 0x00
|
|
|
|
|
─── Source ─────────────────────────────────────────────────────────────────────
|
|
|
|
|
2698 data = dummy;
|
|
|
|
|
2699 }
|
|
|
|
|
2700
|
|
|
|
|
2701 ctrl->txcnt++;
|
|
|
|
|
2702 hri_sercomspi_write_DATA_reg(hw, data);
|
|
|
|
|
2703 }
|
|
|
|
|
2704
|
|
|
|
|
2705 /** Check interrupt flag of ERROR and update transaction runtime information. */
|
|
|
|
|
2706 static inline int32_t _spi_err_check(const uint32_t iflag, void *const hw)
|
|
|
|
|
2707 {
|
|
|
|
|
2708 if (SERCOM_SPI_INTFLAG_ERROR & iflag) {
|
|
|
|
|
2709 hri_sercomspi_clear_STATUS_reg(hw, ~0);
|
|
|
|
|
2710 hri_sercomspi_clear_INTFLAG_reg(hw, SERCOM_SPI_INTFLAG_ERROR);
|
|
|
|
|
2711 return ERR_OVERFLOW;
|
|
|
|
|
2712 }
|
|
|
|
|
2713
|
|
|
|
|
2714 return ERR_NONE;
|
|
|
|
|
2715 }
|
|
|
|
|
2716
|
|
|
|
|
2717 int32_t _spi_m_sync_trans(struct _spi_m_sync_dev *dev, const struct spi_msg *msg)
|
|
|
|
|
─── Stack ──────────────────────────────────────────────────────────────────────
|
|
|
|
|
[0] from 0x00003eb4 in _spi_err_check+0 at ../hpl/sercom/hpl_sercom.c:2708
|
|
|
|
|
[1] from 0x00003eb4 in _spi_m_sync_trans+120 at ../hpl/sercom/hpl_sercom.c:2747
|
|
|
|
|
[2] from 0x00001640 in spi_m_sync_transfer+44 at ../hal/src/hal_spi_m_sync.c:184
|
|
|
|
|
[3] from 0x00001678 in _spi_m_sync_io_write+40 at ../hal/src/hal_spi_m_sync.c:172
|
|
|
|
|
[4] from 0x000016c6 in spi_m_sync_io_write+6 at ../hal/src/hal_spi_m_sync.c:202
|
|
|
|
|
[5] from 0x00001562 in spi_m_sync_send_clock+26 at ../sd_mmc/sd_mmc_spi.c:476
|
|
|
|
|
[6] from 0x00000ad2 in sd_mmc_spi_card_init+26 at ../sd_mmc/sd_mmc.c:359
|
|
|
|
|
[7] from 0x00000ad2 in sd_mmc_check+54 at ../sd_mmc/sd_mmc.c:1633
|
|
|
|
|
[8] from 0x000007ca in SDMMC_example+14 at ../sd_mmc_start.c:35
|
|
|
|
|
[9] from 0x00003566 in main+58 at ../main.c:17
|
|
|
|
|
─── Threads ────────────────────────────────────────────────────────────────────
|
|
|
|
|
[1] id 0 from 0x00003eb4 in _spi_err_check+0 at ../hpl/sercom/hpl_sercom.c:2708
|
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─── Variables ──────────────────────────────────────────────────────────────────
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arg hw = <optimized out>, iflag = 1
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loc iflag = 1, hw = 0x41012000, rc = 0, ctrl = {txbuf = 0x20010568 "\230\002",rxbuf = 0x0 <exception_table>,txcnt = <optimized out>,rxcnt = 0,char_…
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────────────────────────────────────────────────────────────────────────────────
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Loading section .text, size 0x5178 lma 0x0
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Loading section .relocate, size 0x74 lma 0x5178
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Start address 0x00000000, load size 20972
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Transfer rate: 29 KB/sec, 6990 bytes/write.
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Failed to write memory and, additionally, failed to find out where
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Polling target samd51p20a.cpu failed, trying to reexamine
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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SWD DPIDR 0x2ba01477
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Could not find MEM-AP to control the core
|
|
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|
Examination failed, GDB will be halted. Polling again in 100ms
|
|
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|
A debugging session is active.
|
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Inferior 1 [Remote target] will be detached.
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Quit anyway? (y or n) [answered Y; input not from terminal]
|
|
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|
[Inferior 1 (Remote target) detached]
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