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84 lines
2.9 KiB
Diff
84 lines
2.9 KiB
Diff
From fb1cbdba969522930a5320e14749333f22a5f1db Mon Sep 17 00:00:00 2001
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From: Robert Nelson <robertcnelson@gmail.com>
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Date: Tue, 10 Oct 2023 10:21:14 -0500
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Subject: [PATCH 11/11] mpfs-beaglev-fire-fabric: fix old merge removing
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gpio/core_pwm
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Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
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---
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.../microchip/mpfs-beaglev-fire-fabric.dtsi | 51 -------------------
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1 file changed, 51 deletions(-)
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diff --git a/arch/riscv/boot/dts/microchip/mpfs-beaglev-fire-fabric.dtsi b/arch/riscv/boot/dts/microchip/mpfs-beaglev-fire-fabric.dtsi
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index 60ba0883aeb2..9737144e441a 100644
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--- a/arch/riscv/boot/dts/microchip/mpfs-beaglev-fire-fabric.dtsi
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+++ b/arch/riscv/boot/dts/microchip/mpfs-beaglev-fire-fabric.dtsi
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@@ -16,15 +16,6 @@ fabric-bus@40000000 {
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<0x20 0x0 0x20 0x0 0x10 0x0>, /* FIC0,HI */
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<0x30 0x0 0x30 0x0 0x10 0x0>; /* FIC1,HI */
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-// core_pwm0: pwm@40000000 {
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-// compatible = "microchip,corepwm-rtl-v4";
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-// reg = <0x0 0x40000000 0x0 0xF0>;
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-// microchip,sync-update-mask = /bits/ 32 <0>;
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-// #pwm-cells = <2>;
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-// clocks = <&fabric_clk3>;
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-// status = "disabled";
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-// };
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-
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fabric_clk3: fabric-clk3 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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@@ -36,48 +27,6 @@ fabric_clk1: fabric-clk1 {
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#clock-cells = <0>;
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clock-frequency = <125000000>;
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};
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-
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- cape_gpios_p8: gpio@41100000 {
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- compatible = "microchip,core-gpio";
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- reg = <0x0 0x41100000 0x0 0x1000>;
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- clocks = <&fabric_clk3>;
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- gpio-controller;
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- #gpio-cells = <2>;
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- ngpios=<16>;
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- gpio-line-names = "P8_PIN31", "P8_PIN32", "P8_PIN33", "P8_PIN34",
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- "P8_PIN35", "P8_PIN36", "P8_PIN37", "P8_PIN38",
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- "P8_PIN39", "P8_PIN40", "P8_PIN41", "P8_PIN42",
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- "P8_PIN43", "P8_PIN44", "P8_PIN45", "P8_PIN46";
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- };
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-
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- cape_gpios_p9: gpio@41200000 {
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- compatible = "microchip,core-gpio";
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- reg = <0x0 0x41200000 0x0 0x1000>;
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- clocks = <&fabric_clk3>;
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- gpio-controller;
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- #gpio-cells = <2>;
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- ngpios=<21>;
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- gpio-line-names = "P9_PIN11", "P9_PIN12", "P9_PIN13", "P9_PIN14",
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- "P9_PIN15", "P9_PIN16", "P9_PIN17", "P9_PIN18",
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- "P9_PIN21", "P9_PIN22", "P9_PIN23", "P9_PIN24",
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- "P9_PIN25", "P9_PIN26", "P9_PIN27", "P9_PIN28",
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- "P9_PIN29", "P9_PIN31", "P9_PIN41", "P9_PIN42";
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- };
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-
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- hsi_gpios: gpio@44000000 {
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- compatible = "microchip,core-gpio";
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- reg = <0x0 0x44000000 0x0 0x1000>;
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- clocks = <&fabric_clk3>;
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- gpio-controller;
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- #gpio-cells = <2>;
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- ngpios=<20>;
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- gpio-line-names = "B0_HSIO70N", "B0_HSIO71N", "B0_HSIO83N", "B0_HSIO73N_C2P_CLKN",
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- "B0_HSIO70P", "B0_HSIO71P", "B0_HSIO83P", "B0_HSIO73N_C2P_CLKP",
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- "XCVR1_RX_VALID", "XCVR1_LOCK", "XCVR1_ERROR",
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- "XCVR2_RX_VALID", "XCVR2_LOCK", "XCVR2_ERROR",
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- "XCVR3_RX_VALID", "XCVR3_LOCK", "XCVR3_ERROR",
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- "XCVR_0B_REF_CLK_PLL_LOCK", "XCVR_0C_REF_CLK_PLL_LOCK", "B0_HSIO81N";
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- };
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};
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ihc: mailbox {
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--
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2.39.2
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