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BeagleV-Fire-ubuntu
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mainline: add linux-6.1.y -> linux-6.4.y device-tree, config, and makefile

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Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
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Robert Nelson 1 year ago
parent 874d9f960b
commit 4dabff70e9
17 changed files with 23062 additions and 0 deletions
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7
git_linux_mainline.sh
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@ -13,6 +13,13 @@ UBOOT_REPO="https://github.com/polarfire-soc/u-boot.git"
LINUX_BRANCH="master"
LINUX_REPO="https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git"
#Use custom device tree and Makefile in patches/linux directory...
#LINUX_BRANCH="linux-6.4.y"
#LINUX_BRANCH="linux-6.3.y"
#LINUX_BRANCH="linux-6.2.y"
#LINUX_BRANCH="linux-6.1.y"
#LINUX_REPO="https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git"
GIT_DEPTH="20"
if [ ! -f ./mirror/x86_64-gcc-11.4.0-nolibc-riscv64-linux.tar.xz ] ; then

7
patches/linux/linux-6.1.y/Makefile
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# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-icicle-kit.dtb
dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-m100pfsevp.dtb
dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-polarberry.dtb
dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-sev-kit.dtb
dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-beaglev-fire.dtb
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))

5161
patches/linux/linux-6.1.y/defconfig
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70
patches/linux/linux-6.1.y/dts/mpfs-beaglev-fire-fabric.dtsi
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2020-2021 Microchip Technology Inc */
/ {
compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs-icicle-kit",
"microchip,mpfs";
core_pwm0: pwm@40000000 {
compatible = "microchip,corepwm-rtl-v4";
reg = <0x0 0x40000000 0x0 0xF0>;
microchip,sync-update-mask = /bits/ 32 <0>;
#pwm-cells = <3>;
clocks = <&fabric_clk3>;
status = "disabled";
};
i2c2: i2c@40000200 {
compatible = "microchip,corei2c-rtl-v7";
reg = <0x0 0x40000200 0x0 0x100>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&fabric_clk3>;
interrupt-parent = <&plic>;
interrupts = <122>;
clock-frequency = <100000>;
status = "disabled";
};
fabric_clk3: fabric-clk3 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
};
fabric_clk1: fabric-clk1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>;
};
pcie: pcie@3000000000 {
compatible = "microchip,pcie-host-1.0";
#address-cells = <0x3>;
#interrupt-cells = <0x1>;
#size-cells = <0x2>;
device_type = "pci";
reg = <0x30 0x0 0x0 0x8000000>, <0x0 0x43000000 0x0 0x10000>;
reg-names = "cfg", "apb";
bus-range = <0x0 0x7f>;
interrupt-parent = <&plic>;
interrupts = <119>;
interrupt-map = <0 0 0 1 &pcie_intc 0>,
<0 0 0 2 &pcie_intc 1>,
<0 0 0 3 &pcie_intc 2>,
<0 0 0 4 &pcie_intc 3>;
interrupt-map-mask = <0 0 0 7>;
clocks = <&fabric_clk1>, <&fabric_clk3>;
clock-names = "fic1", "fic3";
ranges = <0x3000000 0x0 0x8000000 0x30 0x8000000 0x0 0x80000000>;
dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 0x1 0x00000000>;
msi-parent = <&pcie>;
msi-controller;
status = "disabled";
pcie_intc: interrupt-controller {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
};
};
};

319
patches/linux/linux-6.1.y/dts/mpfs-beaglev-fire.dts
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2020-2021 Microchip Technology Inc */
/dts-v1/;
#include "mpfs.dtsi"
#include "mpfs-beaglev-fire-fabric.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
/* Clock frequency (in Hz) of the rtcclk */
#define RTCCLK_FREQ 1000000
/ {
#address-cells = <2>;
#size-cells = <2>;
model = "BeagleBoard BeagleV-Fire";
compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs";
aliases {
mmc0 = &mmc;
ethernet0 = &mac1;
serial0 = &mmuart0;
serial1 = &mmuart1;
serial2 = &mmuart2;
serial3 = &mmuart3;
serial4 = &mmuart4;
};
chosen {
stdout-path = "serial0:115200n8";
};
cpus {
timebase-frequency = <RTCCLK_FREQ>;
};
ddrc_cache_lo: memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x40000000>;
status = "okay";
};
ddrc_cache_hi: memory@1040000000 {
device_type = "memory";
reg = <0x10 0x40000000 0x0 0x40000000>;
status = "okay";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
hss_payload: region@BFC00000 {
reg = <0x0 0xBFC00000 0x0 0x400000>;
no-map;
};
};
imx219_vana: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "imx219_vana";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
imx219_vdig: fixedregulator@1 {
compatible = "regulator-fixed";
regulator-name = "imx219_vdig";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
imx219_vddl: fixedregulator@2 {
compatible = "regulator-fixed";
regulator-name = "imx219_vddl";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
imx219_clk: camera-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};
&gpio0 {
ngpios=<14>;
gpio-line-names = "", "", "", "", "", "", "", "", "", "", "", "", "SD_CARD_CS", "USER_BUTTON";
status = "okay";
sd_card_cs {
gpio-hog;
gpios = <12 12>;
output_high;
line-name = "SD_CARD_CS";
};
user_button {
gpio-hog;
gpios = <13 13>;
input;
line-name = "USER_BUTTON";
};
};
&gpio1 {
ngpios=<24>;
gpio-line-names = "", "", "", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "", "", "",
"ADC_IRQn", "", "", "USB_OCn";
status = "okay";
adc_irqn {
gpio-hog;
gpios = <20 20>;
input;
line-name = "ADC_IRQn";
};
user_button {
gpio-hog;
gpios = <23 23>;
input;
line-name = "USB_OCn";
};
};
&gpio2 {
interrupts = <53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>;
gpio-line-names = "P8_PIN3_USER_LED_0", "P8_PIN4_USER_LED_1", "P8_PIN5_USER_LED_2",
"P8_PIN6_USER_LED_3", "P8_PIN7_USER_LED_4", "P8_PIN8_USER_LED_5",
"P8_PIN9_USER_LED_6", "P8_PIN10_USER_LED_7", "P8_PIN11_USER_LED_8",
"P8_PIN12_USER_LED_9", "P8_PIN13_USER_LED_10", "P8_PIN14_USER_LED_11",
"P8_PIN15", "P8_PIN16", "P8_PIN17", "P8_PIN18", "P8_PIN19",
"P8_PIN20", "P8_PIN21", "P8_PIN22", "P8_PIN23", "P8_PIN24",
"P8_PIN25", "P8_PIN26", "P8_PIN27", "P8_PIN28", "P8_PIN29",
"P8_PIN30",
"M2_W_DISABLE1", "M2_W_DISABLE2",
"VIO_ENABLE", "SD_DET";
status = "okay";
vio_enable {
gpio-hog;
gpios = <30 30>;
output_high;
line-name = "VIO_ENABLE";
};
sd_det {
gpio-hog;
gpios = <31 31>;
input;
line-name = "SD_DET";
};
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
eeprom: eeprom@50 {
compatible = "at,24c32";
reg = <0x50>;
};
imx219: sensor@10 {
compatible = "sony,imx219";
reg = <0x10>;
clocks = <&imx219_clk>;
VANA-supply = <&imx219_vana>; /* 2.8v */
VDIG-supply = <&imx219_vdig>; /* 1.8v */
VDDL-supply = <&imx219_vddl>; /* 1.2v */
port {
imx219_0: endpoint {
// remote-endpoint = <&csi1_ep>;
data-lanes = <1 2>;
clock-noncontinuous;
link-frequencies = /bits/ 64 <456000000>;
};
};
};
};
&mac0 {
phy-mode = "sgmii";
phy-handle = <&phy0>;
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
&mac1 {
phy-mode = "sgmii";
phy-handle = <&phy1>;
status = "okay";
phy1: ethernet-phy@0 {
reg = <0>;
};
};
&mbox {
status = "okay";
};
//&mmc {
// status = "okay";
// bus-width = <8>;
// disable-wp;
// cap-mmc-highspeed;
// mmc-ddr-1_8v;
// mmc-hs200-1_8v;
//};
&mmc {
//dma-noncoherent;
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
cap-mmc-highspeed;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-sdr104;
status = "okay";
};
&mmuart0 {
status = "okay";
};
&mmuart1 {
status = "okay";
};
//&mmuart2 {
// status = "okay";
//};
//&mmuart3 //{
// statu//s = "okay";
//};//
//
//&mmuart4 {
// status = "okay";
//};
//&pcie {
// status = "okay";
//};
&qspi {
status = "okay";
cs-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>, <&gpio0 12 GPIO_ACTIVE_LOW>;
num-cs = <2>;
mcp3464: mcp3464@0 {
compatible = "microchip,mcp3464r";
reg = <0>; /* CE0 */
spi-cpol;
spi-cpha;
spi-max-frequency = <15000000>;
status = "okay";
microchip,hw-device-address = <1>;
};
mmc-slot@1 {
compatible = "mmc-spi-slot";
reg = <1>;
gpios = <&gpio2 31 1>;
voltage-ranges = <3300 3300>;
spi-max-frequency = <15000000>;
disable-wp;
};
};
&refclk {
clock-frequency = <125000000>;
};
&rtc {
status = "okay";
};
&spi0 {
status = "okay";
};
&spi1 {
status = "okay";
};
&syscontroller {
status = "okay";
};
&usb {
//dma-noncoherent;
status = "okay";
dr_mode = "otg";
};

7
patches/linux/linux-6.2.y/Makefile
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# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-icicle-kit.dtb
dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-m100pfsevp.dtb
dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-polarberry.dtb
dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-sev-kit.dtb
dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-beaglev-fire.dtb
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))

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patches/linux/linux-6.2.y/defconfig
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71
patches/linux/linux-6.2.y/dts/mpfs-beaglev-fire-fabric.dtsi
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2020-2021 Microchip Technology Inc */
/ {
compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs-icicle-kit",
"microchip,mpfs";
core_pwm0: pwm@40000000 {
compatible = "microchip,corepwm-rtl-v4";
reg = <0x0 0x40000000 0x0 0xF0>;
microchip,sync-update-mask = /bits/ 32 <0>;
#pwm-cells = <3>;
clocks = <&ccc_nw CLK_CCC_PLL0_OUT3>;
status = "disabled";
};
i2c2: i2c@40000200 {
compatible = "microchip,corei2c-rtl-v7";
reg = <0x0 0x40000200 0x0 0x100>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&ccc_nw CLK_CCC_PLL0_OUT3>;
interrupt-parent = <&plic>;
interrupts = <122>;
clock-frequency = <100000>;
status = "disabled";
};
pcie: pcie@3000000000 {
compatible = "microchip,pcie-host-1.0";
#address-cells = <0x3>;
#interrupt-cells = <0x1>;
#size-cells = <0x2>;
device_type = "pci";
reg = <0x30 0x0 0x0 0x8000000>, <0x0 0x43000000 0x0 0x10000>;
reg-names = "cfg", "apb";
bus-range = <0x0 0x7f>;
interrupt-parent = <&plic>;
interrupts = <119>;
interrupt-map = <0 0 0 1 &pcie_intc 0>,
<0 0 0 2 &pcie_intc 1>,
<0 0 0 3 &pcie_intc 2>,
<0 0 0 4 &pcie_intc 3>;
interrupt-map-mask = <0 0 0 7>;
clocks = <&ccc_nw CLK_CCC_PLL0_OUT1>, <&ccc_nw CLK_CCC_PLL0_OUT3>;
clock-names = "fic1", "fic3";
ranges = <0x3000000 0x0 0x8000000 0x30 0x8000000 0x0 0x80000000>;
dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 0x1 0x00000000>;
msi-parent = <&pcie>;
msi-controller;
status = "disabled";
pcie_intc: interrupt-controller {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
};
};
refclk_ccc: cccrefclk {
compatible = "fixed-clock";
#clock-cells = <0>;
};
};
&ccc_nw {
clocks = <&refclk_ccc>, <&refclk_ccc>, <&refclk_ccc>, <&refclk_ccc>,
<&refclk_ccc>, <&refclk_ccc>;
clock-names = "pll0_ref0", "pll0_ref1", "pll1_ref0", "pll1_ref1",
"dll0_ref", "dll1_ref";
status = "okay";
};

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patches/linux/linux-6.2.y/dts/mpfs-beaglev-fire.dts
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2020-2021 Microchip Technology Inc */
/dts-v1/;
#include "mpfs.dtsi"
#include "mpfs-beaglev-fire-fabric.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
/* Clock frequency (in Hz) of the rtcclk */
#define RTCCLK_FREQ 1000000
/ {
#address-cells = <2>;
#size-cells = <2>;
model = "BeagleBoard BeagleV-Fire";
compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs";
aliases {
mmc0 = &mmc;
ethernet0 = &mac1;
serial0 = &mmuart0;
serial1 = &mmuart1;
serial2 = &mmuart2;
serial3 = &mmuart3;
serial4 = &mmuart4;
};
chosen {
stdout-path = "serial0:115200n8";
};
cpus {
timebase-frequency = <RTCCLK_FREQ>;
};
ddrc_cache_lo: memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x40000000>;
status = "okay";
};
ddrc_cache_hi: memory@1040000000 {
device_type = "memory";
reg = <0x10 0x40000000 0x0 0x40000000>;
status = "okay";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
hss_payload: region@BFC00000 {
reg = <0x0 0xBFC00000 0x0 0x400000>;
no-map;
};
};
imx219_vana: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "imx219_vana";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
imx219_vdig: fixedregulator@1 {
compatible = "regulator-fixed";
regulator-name = "imx219_vdig";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
imx219_vddl: fixedregulator@2 {
compatible = "regulator-fixed";
regulator-name = "imx219_vddl";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
imx219_clk: camera-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};
&gpio0 {
ngpios=<14>;
gpio-line-names = "", "", "", "", "", "", "", "", "", "", "", "", "SD_CARD_CS", "USER_BUTTON";
status = "okay";
sd_card_cs {
gpio-hog;
gpios = <12 12>;
output_high;
line-name = "SD_CARD_CS";
};
user_button {
gpio-hog;
gpios = <13 13>;
input;
line-name = "USER_BUTTON";
};
};
&gpio1 {
ngpios=<24>;
gpio-line-names = "", "", "", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "", "", "",
"ADC_IRQn", "", "", "USB_OCn";
status = "okay";
adc_irqn {
gpio-hog;
gpios = <20 20>;
input;
line-name = "ADC_IRQn";
};
user_button {
gpio-hog;
gpios = <23 23>;
input;
line-name = "USB_OCn";
};
};
&gpio2 {
interrupts = <53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>;
gpio-line-names = "P8_PIN3_USER_LED_0", "P8_PIN4_USER_LED_1", "P8_PIN5_USER_LED_2",
"P8_PIN6_USER_LED_3", "P8_PIN7_USER_LED_4", "P8_PIN8_USER_LED_5",
"P8_PIN9_USER_LED_6", "P8_PIN10_USER_LED_7", "P8_PIN11_USER_LED_8",
"P8_PIN12_USER_LED_9", "P8_PIN13_USER_LED_10", "P8_PIN14_USER_LED_11",
"P8_PIN15", "P8_PIN16", "P8_PIN17", "P8_PIN18", "P8_PIN19",
"P8_PIN20", "P8_PIN21", "P8_PIN22", "P8_PIN23", "P8_PIN24",
"P8_PIN25", "P8_PIN26", "P8_PIN27", "P8_PIN28", "P8_PIN29",
"P8_PIN30",
"M2_W_DISABLE1", "M2_W_DISABLE2",
"VIO_ENABLE", "SD_DET";
status = "okay";
vio_enable {
gpio-hog;
gpios = <30 30>;
output_high;
line-name = "VIO_ENABLE";
};
sd_det {
gpio-hog;
gpios = <31 31>;
input;
line-name = "SD_DET";
};
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
eeprom: eeprom@50 {
compatible = "at,24c32";
reg = <0x50>;
};
imx219: sensor@10 {
compatible = "sony,imx219";
reg = <0x10>;
clocks = <&imx219_clk>;
VANA-supply = <&imx219_vana>; /* 2.8v */
VDIG-supply = <&imx219_vdig>; /* 1.8v */
VDDL-supply = <&imx219_vddl>; /* 1.2v */
port {
imx219_0: endpoint {
// remote-endpoint = <&csi1_ep>;
data-lanes = <1 2>;
clock-noncontinuous;
link-frequencies = /bits/ 64 <456000000>;
};
};
};
};
&mac0 {
phy-mode = "sgmii";
phy-handle = <&phy0>;
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
&mac1 {
phy-mode = "sgmii";
phy-handle = <&phy1>;
status = "okay";
phy1: ethernet-phy@0 {
reg = <0>;
};
};
&mbox {
status = "okay";
};
//&mmc {
// status = "okay";
// bus-width = <8>;
// disable-wp;
// cap-mmc-highspeed;
// mmc-ddr-1_8v;
// mmc-hs200-1_8v;
//};
&mmc {
//dma-noncoherent;
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
cap-mmc-highspeed;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-sdr104;
status = "okay";
};
&mmuart0 {
status = "okay";
};
&mmuart1 {
status = "okay";
};
//&mmuart2 {
// status = "okay";
//};
//&mmuart3 //{
// statu//s = "okay";
//};//
//
//&mmuart4 {
// status = "okay";
//};
//&pcie {
// status = "okay";
//};
&qspi {
status = "okay";
cs-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>, <&gpio0 12 GPIO_ACTIVE_LOW>;
num-cs = <2>;
mcp3464: mcp3464@0 {
compatible = "microchip,mcp3464r";
reg = <0>; /* CE0 */
spi-cpol;
spi-cpha;
spi-max-frequency = <15000000>;
status = "okay";
microchip,hw-device-address = <1>;
};
mmc-slot@1 {
compatible = "mmc-spi-slot";
reg = <1>;
gpios = <&gpio2 31 1>;
voltage-ranges = <3300 3300>;
spi-max-frequency = <15000000>;
disable-wp;
};
};
&refclk {
clock-frequency = <125000000>;
};
&refclk_ccc {
clock-frequency = <50000000>;
};
&rtc {
status = "okay";
};
&spi0 {
status = "okay";
};
&spi1 {
status = "okay";
};
&syscontroller {
status = "okay";
};
&usb {
//dma-noncoherent;
status = "okay";
dr_mode = "otg";
};

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patches/linux/linux-6.3.y/Makefile
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# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-icicle-kit.dtb
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-m100pfsevp.dtb
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-polarberry.dtb
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-sev-kit.dtb
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-tysom-m.dtb
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-beaglev-fire.dtb
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))

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patches/linux/linux-6.3.y/defconfig
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71
patches/linux/linux-6.3.y/dts/mpfs-beaglev-fire-fabric.dtsi
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2020-2021 Microchip Technology Inc */
/ {
compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs-icicle-kit",
"microchip,mpfs";
core_pwm0: pwm@40000000 {
compatible = "microchip,corepwm-rtl-v4";
reg = <0x0 0x40000000 0x0 0xF0>;
microchip,sync-update-mask = /bits/ 32 <0>;
#pwm-cells = <3>;
clocks = <&ccc_nw CLK_CCC_PLL0_OUT3>;
status = "disabled";
};
i2c2: i2c@40000200 {
compatible = "microchip,corei2c-rtl-v7";
reg = <0x0 0x40000200 0x0 0x100>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&ccc_nw CLK_CCC_PLL0_OUT3>;
interrupt-parent = <&plic>;
interrupts = <122>;
clock-frequency = <100000>;
status = "disabled";
};
pcie: pcie@3000000000 {
compatible = "microchip,pcie-host-1.0";
#address-cells = <0x3>;
#interrupt-cells = <0x1>;
#size-cells = <0x2>;
device_type = "pci";
reg = <0x30 0x0 0x0 0x8000000>, <0x0 0x43000000 0x0 0x10000>;
reg-names = "cfg", "apb";
bus-range = <0x0 0x7f>;
interrupt-parent = <&plic>;
interrupts = <119>;
interrupt-map = <0 0 0 1 &pcie_intc 0>,
<0 0 0 2 &pcie_intc 1>,
<0 0 0 3 &pcie_intc 2>,
<0 0 0 4 &pcie_intc 3>;
interrupt-map-mask = <0 0 0 7>;
clocks = <&ccc_nw CLK_CCC_PLL0_OUT1>, <&ccc_nw CLK_CCC_PLL0_OUT3>;
clock-names = "fic1", "fic3";
ranges = <0x3000000 0x0 0x8000000 0x30 0x8000000 0x0 0x80000000>;
dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 0x1 0x00000000>;
msi-parent = <&pcie>;
msi-controller;
status = "disabled";
pcie_intc: interrupt-controller {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
};
};
refclk_ccc: cccrefclk {
compatible = "fixed-clock";
#clock-cells = <0>;
};
};
&ccc_nw {
clocks = <&refclk_ccc>, <&refclk_ccc>, <&refclk_ccc>, <&refclk_ccc>,
<&refclk_ccc>, <&refclk_ccc>;
clock-names = "pll0_ref0", "pll0_ref1", "pll1_ref0", "pll1_ref1",
"dll0_ref", "dll1_ref";
status = "okay";
};

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patches/linux/linux-6.3.y/dts/mpfs-beaglev-fire.dts
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2020-2021 Microchip Technology Inc */
/dts-v1/;
#include "mpfs.dtsi"
#include "mpfs-beaglev-fire-fabric.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
/* Clock frequency (in Hz) of the rtcclk */
#define RTCCLK_FREQ 1000000
/ {
#address-cells = <2>;
#size-cells = <2>;
model = "BeagleBoard BeagleV-Fire";
compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs";
aliases {
mmc0 = &mmc;
ethernet0 = &mac1;
serial0 = &mmuart0;
serial1 = &mmuart1;
serial2 = &mmuart2;
serial3 = &mmuart3;
serial4 = &mmuart4;
};
chosen {
stdout-path = "serial0:115200n8";
};
cpus {
timebase-frequency = <RTCCLK_FREQ>;
};
ddrc_cache_lo: memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x40000000>;
status = "okay";
};
ddrc_cache_hi: memory@1040000000 {
device_type = "memory";
reg = <0x10 0x40000000 0x0 0x40000000>;
status = "okay";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
hss_payload: region@BFC00000 {
reg = <0x0 0xBFC00000 0x0 0x400000>;
no-map;
};
};
imx219_vana: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "imx219_vana";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
imx219_vdig: fixedregulator@1 {
compatible = "regulator-fixed";
regulator-name = "imx219_vdig";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
imx219_vddl: fixedregulator@2 {
compatible = "regulator-fixed";
regulator-name = "imx219_vddl";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
imx219_clk: camera-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};
&gpio0 {
ngpios=<14>;
gpio-line-names = "", "", "", "", "", "", "", "", "", "", "", "", "SD_CARD_CS", "USER_BUTTON";
status = "okay";
sd_card_cs {
gpio-hog;
gpios = <12 12>;
output_high;
line-name = "SD_CARD_CS";
};
user_button {
gpio-hog;
gpios = <13 13>;
input;
line-name = "USER_BUTTON";
};
};
&gpio1 {
ngpios=<24>;
gpio-line-names = "", "", "", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "", "", "",
"ADC_IRQn", "", "", "USB_OCn";
status = "okay";
adc_irqn {
gpio-hog;
gpios = <20 20>;
input;
line-name = "ADC_IRQn";
};
user_button {
gpio-hog;
gpios = <23 23>;
input;
line-name = "USB_OCn";
};
};
&gpio2 {
interrupts = <53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>;
gpio-line-names = "P8_PIN3_USER_LED_0", "P8_PIN4_USER_LED_1", "P8_PIN5_USER_LED_2",
"P8_PIN6_USER_LED_3", "P8_PIN7_USER_LED_4", "P8_PIN8_USER_LED_5",
"P8_PIN9_USER_LED_6", "P8_PIN10_USER_LED_7", "P8_PIN11_USER_LED_8",
"P8_PIN12_USER_LED_9", "P8_PIN13_USER_LED_10", "P8_PIN14_USER_LED_11",
"P8_PIN15", "P8_PIN16", "P8_PIN17", "P8_PIN18", "P8_PIN19",
"P8_PIN20", "P8_PIN21", "P8_PIN22", "P8_PIN23", "P8_PIN24",
"P8_PIN25", "P8_PIN26", "P8_PIN27", "P8_PIN28", "P8_PIN29",
"P8_PIN30",
"M2_W_DISABLE1", "M2_W_DISABLE2",
"VIO_ENABLE", "SD_DET";
status = "okay";
vio_enable {
gpio-hog;
gpios = <30 30>;
output_high;
line-name = "VIO_ENABLE";
};
sd_det {
gpio-hog;
gpios = <31 31>;
input;
line-name = "SD_DET";
};
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
eeprom: eeprom@50 {
compatible = "at,24c32";
reg = <0x50>;
};
imx219: sensor@10 {
compatible = "sony,imx219";
reg = <0x10>;
clocks = <&imx219_clk>;
VANA-supply = <&imx219_vana>; /* 2.8v */
VDIG-supply = <&imx219_vdig>; /* 1.8v */
VDDL-supply = <&imx219_vddl>; /* 1.2v */
port {
imx219_0: endpoint {
// remote-endpoint = <&csi1_ep>;
data-lanes = <1 2>;
clock-noncontinuous;
link-frequencies = /bits/ 64 <456000000>;
};
};
};
};
&mac0 {
phy-mode = "sgmii";
phy-handle = <&phy0>;
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
&mac1 {
phy-mode = "sgmii";
phy-handle = <&phy1>;
status = "okay";
phy1: ethernet-phy@0 {
reg = <0>;
};
};
&mbox {
status = "okay";
};
//&mmc {
// status = "okay";
// bus-width = <8>;
// disable-wp;
// cap-mmc-highspeed;
// mmc-ddr-1_8v;
// mmc-hs200-1_8v;
//};
&mmc {
//dma-noncoherent;
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
cap-mmc-highspeed;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-sdr104;
status = "okay";
};
&mmuart0 {
status = "okay";
};
&mmuart1 {
status = "okay";
};
//&mmuart2 {
// status = "okay";
//};
//&mmuart3 //{
// statu//s = "okay";
//};//
//
//&mmuart4 {
// status = "okay";
//};
//&pcie {
// status = "okay";
//};
&qspi {
status = "okay";
cs-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>, <&gpio0 12 GPIO_ACTIVE_LOW>;
num-cs = <2>;
mcp3464: mcp3464@0 {
compatible = "microchip,mcp3464r";
reg = <0>; /* CE0 */
spi-cpol;
spi-cpha;
spi-max-frequency = <15000000>;
status = "okay";
microchip,hw-device-address = <1>;
};
mmc-slot@1 {
compatible = "mmc-spi-slot";
reg = <1>;
gpios = <&gpio2 31 1>;
voltage-ranges = <3300 3300>;
spi-max-frequency = <15000000>;
disable-wp;
};
};
&refclk {
clock-frequency = <125000000>;
};
&refclk_ccc {
clock-frequency = <50000000>;
};
&rtc {
status = "okay";
};
&spi0 {
status = "okay";
};
&spi1 {
status = "okay";
};
&syscontroller {
status = "okay";
};
&usb {
//dma-noncoherent;
status = "okay";
dr_mode = "otg";
};

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patches/linux/linux-6.4.y/Makefile
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# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-icicle-kit.dtb
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-m100pfsevp.dtb
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-polarberry.dtb
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-sev-kit.dtb
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-tysom-m.dtb
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-beaglev-fire.dtb
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))

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patches/linux/linux-6.4.y/defconfig
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71
patches/linux/linux-6.4.y/dts/mpfs-beaglev-fire-fabric.dtsi
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2020-2021 Microchip Technology Inc */
/ {
compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs-icicle-kit",
"microchip,mpfs";
core_pwm0: pwm@40000000 {
compatible = "microchip,corepwm-rtl-v4";
reg = <0x0 0x40000000 0x0 0xF0>;
microchip,sync-update-mask = /bits/ 32 <0>;
#pwm-cells = <3>;
clocks = <&ccc_nw CLK_CCC_PLL0_OUT3>;
status = "disabled";
};
i2c2: i2c@40000200 {
compatible = "microchip,corei2c-rtl-v7";
reg = <0x0 0x40000200 0x0 0x100>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&ccc_nw CLK_CCC_PLL0_OUT3>;
interrupt-parent = <&plic>;
interrupts = <122>;
clock-frequency = <100000>;
status = "disabled";
};
pcie: pcie@3000000000 {
compatible = "microchip,pcie-host-1.0";
#address-cells = <0x3>;
#interrupt-cells = <0x1>;
#size-cells = <0x2>;
device_type = "pci";
reg = <0x30 0x0 0x0 0x8000000>, <0x0 0x43000000 0x0 0x10000>;
reg-names = "cfg", "apb";
bus-range = <0x0 0x7f>;
interrupt-parent = <&plic>;
interrupts = <119>;
interrupt-map = <0 0 0 1 &pcie_intc 0>,
<0 0 0 2 &pcie_intc 1>,
<0 0 0 3 &pcie_intc 2>,
<0 0 0 4 &pcie_intc 3>;
interrupt-map-mask = <0 0 0 7>;
clocks = <&ccc_nw CLK_CCC_PLL0_OUT1>, <&ccc_nw CLK_CCC_PLL0_OUT3>;
clock-names = "fic1", "fic3";
ranges = <0x3000000 0x0 0x8000000 0x30 0x8000000 0x0 0x80000000>;
dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 0x1 0x00000000>;
msi-parent = <&pcie>;
msi-controller;
status = "disabled";
pcie_intc: interrupt-controller {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
};
};
refclk_ccc: cccrefclk {
compatible = "fixed-clock";
#clock-cells = <0>;
};
};
&ccc_nw {
clocks = <&refclk_ccc>, <&refclk_ccc>, <&refclk_ccc>, <&refclk_ccc>,
<&refclk_ccc>, <&refclk_ccc>;
clock-names = "pll0_ref0", "pll0_ref1", "pll1_ref0", "pll1_ref1",
"dll0_ref", "dll1_ref";
status = "okay";
};

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patches/linux/linux-6.4.y/dts/mpfs-beaglev-fire.dts
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2020-2021 Microchip Technology Inc */
/dts-v1/;
#include "mpfs.dtsi"
#include "mpfs-beaglev-fire-fabric.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
/* Clock frequency (in Hz) of the rtcclk */
#define RTCCLK_FREQ 1000000
/ {
#address-cells = <2>;
#size-cells = <2>;
model = "BeagleBoard BeagleV-Fire";
compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs";
aliases {
mmc0 = &mmc;
ethernet0 = &mac1;
serial0 = &mmuart0;
serial1 = &mmuart1;
serial2 = &mmuart2;
serial3 = &mmuart3;
serial4 = &mmuart4;
};
chosen {
stdout-path = "serial0:115200n8";
};
cpus {
timebase-frequency = <RTCCLK_FREQ>;
};
ddrc_cache_lo: memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x40000000>;
status = "okay";
};
ddrc_cache_hi: memory@1040000000 {
device_type = "memory";
reg = <0x10 0x40000000 0x0 0x40000000>;
status = "okay";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
hss_payload: region@BFC00000 {
reg = <0x0 0xBFC00000 0x0 0x400000>;
no-map;
};
};
imx219_vana: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "imx219_vana";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
imx219_vdig: fixedregulator@1 {
compatible = "regulator-fixed";
regulator-name = "imx219_vdig";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
imx219_vddl: fixedregulator@2 {
compatible = "regulator-fixed";
regulator-name = "imx219_vddl";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
imx219_clk: camera-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};
&gpio0 {
ngpios=<14>;
gpio-line-names = "", "", "", "", "", "", "", "", "", "", "", "", "SD_CARD_CS", "USER_BUTTON";
status = "okay";
sd_card_cs {
gpio-hog;
gpios = <12 12>;
output_high;
line-name = "SD_CARD_CS";
};
user_button {
gpio-hog;
gpios = <13 13>;
input;
line-name = "USER_BUTTON";
};
};
&gpio1 {
ngpios=<24>;
gpio-line-names = "", "", "", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "", "", "",
"ADC_IRQn", "", "", "USB_OCn";
status = "okay";
adc_irqn {
gpio-hog;
gpios = <20 20>;
input;
line-name = "ADC_IRQn";
};
user_button {
gpio-hog;
gpios = <23 23>;
input;
line-name = "USB_OCn";
};
};
&gpio2 {
interrupts = <53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>;
gpio-line-names = "P8_PIN3_USER_LED_0", "P8_PIN4_USER_LED_1", "P8_PIN5_USER_LED_2",
"P8_PIN6_USER_LED_3", "P8_PIN7_USER_LED_4", "P8_PIN8_USER_LED_5",
"P8_PIN9_USER_LED_6", "P8_PIN10_USER_LED_7", "P8_PIN11_USER_LED_8",
"P8_PIN12_USER_LED_9", "P8_PIN13_USER_LED_10", "P8_PIN14_USER_LED_11",
"P8_PIN15", "P8_PIN16", "P8_PIN17", "P8_PIN18", "P8_PIN19",
"P8_PIN20", "P8_PIN21", "P8_PIN22", "P8_PIN23", "P8_PIN24",
"P8_PIN25", "P8_PIN26", "P8_PIN27", "P8_PIN28", "P8_PIN29",
"P8_PIN30",
"M2_W_DISABLE1", "M2_W_DISABLE2",
"VIO_ENABLE", "SD_DET";
status = "okay";
vio_enable {
gpio-hog;
gpios = <30 30>;
output_high;
line-name = "VIO_ENABLE";
};
sd_det {
gpio-hog;
gpios = <31 31>;
input;
line-name = "SD_DET";
};
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
eeprom: eeprom@50 {
compatible = "at,24c32";
reg = <0x50>;
};
imx219: sensor@10 {
compatible = "sony,imx219";
reg = <0x10>;
clocks = <&imx219_clk>;
VANA-supply = <&imx219_vana>; /* 2.8v */
VDIG-supply = <&imx219_vdig>; /* 1.8v */
VDDL-supply = <&imx219_vddl>; /* 1.2v */
port {
imx219_0: endpoint {
// remote-endpoint = <&csi1_ep>;
data-lanes = <1 2>;
clock-noncontinuous;
link-frequencies = /bits/ 64 <456000000>;
};
};
};
};
&mac0 {
phy-mode = "sgmii";
phy-handle = <&phy0>;
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
&mac1 {
phy-mode = "sgmii";
phy-handle = <&phy1>;
status = "okay";
phy1: ethernet-phy@0 {
reg = <0>;
};
};
&mbox {
status = "okay";
};
//&mmc {
// status = "okay";
// bus-width = <8>;
// disable-wp;
// cap-mmc-highspeed;
// mmc-ddr-1_8v;
// mmc-hs200-1_8v;
//};
&mmc {
//dma-noncoherent;
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
cap-mmc-highspeed;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-sdr104;
status = "okay";
};
&mmuart0 {
status = "okay";
};
&mmuart1 {
status = "okay";
};
//&mmuart2 {
// status = "okay";
//};
//&mmuart3 //{
// statu//s = "okay";
//};//
//
//&mmuart4 {
// status = "okay";
//};
//&pcie {
// status = "okay";
//};
&qspi {
status = "okay";
cs-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>, <&gpio0 12 GPIO_ACTIVE_LOW>;
num-cs = <2>;
mcp3464: mcp3464@0 {
compatible = "microchip,mcp3464r";
reg = <0>; /* CE0 */
spi-cpol;
spi-cpha;
spi-max-frequency = <15000000>;
status = "okay";
microchip,hw-device-address = <1>;
};
mmc-slot@1 {
compatible = "mmc-spi-slot";
reg = <1>;
gpios = <&gpio2 31 1>;
voltage-ranges = <3300 3300>;
spi-max-frequency = <15000000>;
disable-wp;
};
};
&refclk {
clock-frequency = <125000000>;
};
&refclk_ccc {
clock-frequency = <50000000>;
};
&rtc {
status = "okay";
};
&spi0 {
status = "okay";
};
&spi1 {
status = "okay";
};
&syscontroller {
status = "okay";
};
&usb {
//dma-noncoherent;
status = "okay";
dr_mode = "otg";
};
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