Merge branch 'update_to_6_6' into 'main'

Draft: Update to kernel 6.6 and ubuntu 24.04

See merge request beaglev-fire/BeagleV-Fire-ubuntu!5
merge-requests/5/merge
Lucien Morey 5 months ago
commit 142a457399

@ -1,7 +1,7 @@
#!/bin/bash
GIT_DEPTH="20"
GCC_VERSION="11.4.0"
GCC_VERSION="13.2.0"
HSS_BRANCH="v2023.02"
HSS_REPO="https://github.com/polarfire-soc/hart-software-services.git"
@ -9,15 +9,15 @@ HSS_REPO="https://github.com/polarfire-soc/hart-software-services.git"
#UBOOT_BRANCH="mpfs-uboot-2022.01"
#UBOOT_BRANCH="linux4microchip+fpga-2023.02"
#UBOOT_REPO="https://github.com/polarfire-soc/u-boot.git"
UBOOT_BRANCH="v2023.02-BeagleV-Fire"
UBOOT_REPO="https://openbeagle.org/beaglev-fire/beaglev-fire-u-boot.git"
UBOOT_BRANCH="linux4microchip+fpga-2024.06"
UBOOT_REPO="https://github.com/linux4microchip/u-boot-mchp.git"
#UBOOT_REPO="git@openbeagle.org:beaglev-fire/beaglev-fire-u-boot.git"
DT_BRANCH="v6.1.x-Beagle"
DT_BRANCH="v6.6.x-Beagle"
DT_REPO="https://openbeagle.org/beagleboard/BeagleBoard-DeviceTrees.git"
#DT_REPO="git@openbeagle.org:beagleboard/BeagleBoard-DeviceTrees.git"
LINUX_BRANCH="linux4microchip+fpga-2023.06"
LINUX_BRANCH="linux4microchip+fpga-2024.06"
LINUX_REPO="https://github.com/linux4microchip/linux.git"
#LINUX_REPO="https://openbeagle.org/beaglev-fire/beaglev-fire-linux.git"
#LINUX_REPO="git@openbeagle.org:beaglev-fire/beaglev-fire-linux.git"

@ -23,8 +23,9 @@ fi
if [ -f arch/riscv/configs/mpfs_defconfig ] ; then
# cp -v ../patches/linux/Makefile arch/riscv/boot/dts/microchip/Makefile
cp -v ../device-tree/src/microchip/mpfs-beaglev-fire.dts arch/riscv/boot/dts/microchip/
cp -v ../device-tree/src/microchip/mpfs-beaglev-fire-fabric.dtsi arch/riscv/boot/dts/microchip/
cp -v ../device-tree/src/riscv/microchip/mpfs-beaglev-fire.dts arch/riscv/boot/dts/microchip/
cp -v ../device-tree/src/riscv/microchip/mpfs-beaglev-fire-fabric.dtsi arch/riscv/boot/dts/microchip/
cp -v ../device-tree/src/riscv/microchip/mpfs-beaglev-fire-pinmux.dtsi arch/riscv/boot/dts/microchip/
#echo "************************************"
#git diff arch/riscv/boot/dts/microchip/ > log.txt ; cat log.txt ; rm log.txt
#echo "************************************"
@ -160,8 +161,8 @@ else
make -j${CORES} ARCH=riscv CROSS_COMPILE=${CC} olddefconfig
fi
echo "make -j${CORES} ARCH=riscv CROSS_COMPILE=${CC} Image modules dtbs"
make -j${CORES} ARCH=riscv CROSS_COMPILE="ccache ${CC}" Image modules dtbs
echo "make -j${CORES} ARCH=riscv CROSS_COMPILE=${CC} DTC_FLAGS=\"-@\" Image modules dtbs"
make -j${CORES} ARCH=riscv CROSS_COMPILE="ccache ${CC}" DTC_FLAGS="-@" Image modules dtbs
if [ ! -f ./arch/riscv/boot/Image ] ; then
echo "Build Failed"

@ -11,16 +11,16 @@ wdir=`pwd`
if [ -f /tmp/latest ] ; then
rm -rf /tmp/latest | true
fi
wget --quiet --directory-prefix=/tmp/ https://rcn-ee.net/rootfs/ubuntu-riscv64-23.04-minimal/latest || true
wget --quiet --directory-prefix=/tmp/ https://rcn-ee.net/rootfs/ubuntu-riscv64-24.04-minimal/latest || true
if [ -f /tmp/latest ] ; then
latest_rootfs=$(cat "/tmp/latest")
datestamp=$(cat "/tmp/latest" | awk -F 'riscv64-' '{print $2}' | awk -F '.' '{print $1}')
if [ ! -f ./deploy/ubuntu-23.04-console-riscv64-${datestamp}/riscv64-rootfs-ubuntu-lunar.tar ] ; then
if [ ! -f ./deploy/ubuntu-24.04-console-riscv64-${datestamp}/riscv64-rootfs-ubuntu-noble.tar ] ; then
if [ -f ./.gitlab-runner ] ; then
wget -c --directory-prefix=./deploy http://192.168.1.98/mirror/rcn-ee.us/rootfs/ubuntu-riscv64-23.04-minimal/${datestamp}/${latest_rootfs}
wget -c --directory-prefix=./deploy http://192.168.1.98/mirror/rcn-ee.us/rootfs/ubuntu-riscv64-24.04-minimal/${datestamp}/${latest_rootfs}
else
wget -c --directory-prefix=./deploy https://rcn-ee.net/rootfs/ubuntu-riscv64-23.04-minimal/${datestamp}/${latest_rootfs}
wget -c --directory-prefix=./deploy https://rcn-ee.net/rootfs/ubuntu-riscv64-24.04-minimal/${datestamp}/${latest_rootfs}
fi
cd ./deploy/
tar xf ${latest_rootfs}
@ -36,8 +36,8 @@ if [ -d ./ignore/.root ] ; then
fi
mkdir -p ./ignore/.root
echo "Extracting: ubuntu-23.04-console-riscv64-${datestamp}/riscv64-rootfs-ubuntu-lunar.tar"
tar xfp ./deploy/ubuntu-23.04-console-riscv64-${datestamp}/riscv64-rootfs-ubuntu-lunar.tar -C ./ignore/.root
echo "Extracting: ubuntu-24.04.1-console-riscv64-${datestamp}/riscv64-rootfs-ubuntu-noble.tar"
tar xfp ./deploy/ubuntu-24.04.1-console-riscv64-${datestamp}/riscv64-rootfs-ubuntu-noble.tar -C ./ignore/.root
sync
mkdir -p ./deploy/input/ || true

@ -11,7 +11,7 @@ diff --git a/drivers/pci/controller/pcie-microchip-host.c b/drivers/pci/controll
index 56306f514..b1b3b7820 100644
--- a/drivers/pci/controller/pcie-microchip-host.c
+++ b/drivers/pci/controller/pcie-microchip-host.c
@@ -26,8 +26,8 @@
@@ -30,8 +30,8 @@
#define MC_ATT_MASK GENMASK_ULL(63, 31)
/* PCIe Bridge Phy and Controller Phy offsets */
@ -20,8 +20,8 @@ index 56306f514..b1b3b7820 100644
+#define MC_PCIE1_BRIDGE_ADDR 0x00004000u
+#define MC_PCIE1_CTRL_ADDR 0x00006000u
#define MC_PCIE_BRIDGE_ADDR (MC_PCIE1_BRIDGE_ADDR)
#define MC_PCIE_CTRL_ADDR (MC_PCIE1_CTRL_ADDR)
/* PCIe Bridge Phy Regs */
#define PCIE_PCI_IRQ_DW0 0xa8
--
2.39.2

@ -35,14 +35,14 @@ diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
index d5ca37205..5b3f027ac 100644
--- a/drivers/iio/adc/Makefile
+++ b/drivers/iio/adc/Makefile
@@ -68,6 +68,7 @@ obj-$(CONFIG_MAX9611) += max9611.o
obj-$(CONFIG_MCP320X) += mcp320x.o
@@ -75,6 +75,7 @@ obj-$(CONFIG_MCP320X) += mcp320x.o
obj-$(CONFIG_MCP3422) += mcp3422.o
obj-$(CONFIG_MCP3564) += mcp3564.o
obj-$(CONFIG_MCP3911) += mcp3911.o
+obj-$(CONFIG_MCP356X) += mcp356x.o
obj-$(CONFIG_MEDIATEK_MT6360_ADC) += mt6360-adc.o
obj-$(CONFIG_MEDIATEK_MT6370_ADC) += mt6370-adc.o
obj-$(CONFIG_MEDIATEK_MT6577_AUXADC) += mt6577_auxadc.o
obj-$(CONFIG_MEN_Z188_ADC) += men_z188_adc.o
diff --git a/drivers/iio/adc/mcp356x.c b/drivers/iio/adc/mcp356x.c
new file mode 100644
index 000000000..22d59413d

@ -11,17 +11,17 @@ diff --git a/drivers/media/i2c/imx219.c b/drivers/media/i2c/imx219.c
index 7a14688f8..effb399b1 100644
--- a/drivers/media/i2c/imx219.c
+++ b/drivers/media/i2c/imx219.c
@@ -1181,6 +1181,9 @@ static int imx219_identify_module(struct imx219 *imx219)
@@ -1012,6 +1012,9 @@ static int imx219_identify_module(struct imx219 *imx219)
int ret;
u32 val;
u64 val;
+ printk(KERN_INFO "imx219_identify_module()\n");
+
+
ret = imx219_read_reg(imx219, IMX219_REG_CHIP_ID,
IMX219_REG_VALUE_16BIT, &val);
ret = cci_read(imx219->regmap, IMX219_REG_CHIP_ID, &val, NULL);
if (ret) {
@@ -1195,6 +1198,9 @@ static int imx219_identify_module(struct imx219 *imx219)
dev_err(&client->dev, "failed to read chip id %x\n",
@@ -1025,6 +1028,9 @@ static int imx219_identify_module(struct imx219 *imx219)
return -EIO;
}
@ -31,7 +31,7 @@ index 7a14688f8..effb399b1 100644
return 0;
}
@@ -1402,6 +1408,8 @@ static int imx219_probe(struct i2c_client *client)
@@ -1234,6 +1240,8 @@ static int imx219_probe(struct i2c_client *client)
struct imx219 *imx219;
int ret;

@ -12,11 +12,11 @@ diff --git a/arch/riscv/boot/dts/microchip/Makefile b/arch/riscv/boot/dts/microc
index 48c9d3d071f3..4e3529217d9a 100644
--- a/arch/riscv/boot/dts/microchip/Makefile
+++ b/arch/riscv/boot/dts/microchip/Makefile
@@ -5,4 +5,5 @@ dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-m100pfsevp.dtb
dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-polarberry.dtb
dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-video-kit.dtb
dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-tysom-m.dtb
+dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-beaglev-fire.dtb
@@ -11,4 +11,5 @@ dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-m100pfsevp-emmc.dtb
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-polarberry.dtb
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-video-kit.dtb
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-tysom-m.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-beaglev-fire.dtb
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
--
2.39.2

@ -4,28 +4,69 @@
#include "dt-bindings/mailbox/miv-ihc.h"
/ {
compatible = "microchip,mpfs-icicle-reference-rtlv2210";
fabric_clk3: fabric-clk3 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
};
fabric_clk1: fabric-clk1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>;
};
fabric-bus@40000000 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x40000000 0x0 0x40000000 0x0 0x20000000>, /* FIC3-FAB */
<0x0 0x60000000 0x0 0x60000000 0x0 0x20000000>, /* FIC0, LO */
<0x0 0xe0000000 0x0 0xe0000000 0x0 0x20000000>, /* FIC1, LO */
<0x20 0x0 0x20 0x0 0x10 0x0>, /* FIC0,HI */
<0x30 0x0 0x30 0x0 0x10 0x0>; /* FIC1,HI */
<0x0 0x60000000 0x0 0x60000000 0x0 0x20000000>, /* FIC0, LO */
<0x0 0xe0000000 0x0 0xe0000000 0x0 0x20000000>, /* FIC1, LO */
<0x20 0x0 0x20 0x0 0x10 0x0>, /* FIC0,HI */
<0x30 0x0 0x30 0x0 0x10 0x0>; /* FIC1,HI */
cape_gpios_p8: gpio@41100000 {
compatible = "microchip,coregpio-rtl-v3";
reg = <0x0 0x41100000 0x0 0x1000>;
clocks = <&fabric_clk3>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
gpio-line-names = "P8_PIN31", "P8_PIN32", "P8_PIN33", "P8_PIN34",
"P8_PIN35", "P8_PIN36", "P8_PIN37", "P8_PIN38",
"P8_PIN39", "P8_PIN40", "P8_PIN41", "P8_PIN42",
"P8_PIN43", "P8_PIN44", "P8_PIN45", "P8_PIN46";
};
fabric_clk3: fabric-clk3 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
cape_gpios_p9: gpio@41200000 {
compatible = "microchip,coregpio-rtl-v3";
reg = <0x0 0x41200000 0x0 0x1000>;
clocks = <&fabric_clk3>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <20>;
gpio-line-names = "P9_PIN11", "P9_PIN12", "P9_PIN13", "P9_PIN14",
"P9_PIN15", "P9_PIN16", "P9_PIN17", "P9_PIN18",
"P9_PIN21", "P9_PIN22", "P9_PIN23", "P9_PIN24",
"P9_PIN25", "P9_PIN26", "P9_PIN27", "P9_PIN28",
"P9_PIN29", "P9_PIN31", "P9_PIN41", "P9_PIN42";
};
fabric_clk1: fabric-clk1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>;
hsi_gpios: gpio@44000000 {
compatible = "microchip,coregpio-rtl-v3";
reg = <0x0 0x44000000 0x0 0x1000>;
clocks = <&fabric_clk3>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <20>;
gpio-line-names = "B0_HSIO70N", "B0_HSIO71N", "B0_HSIO83N",
"B0_HSIO73N_C2P_CLKN", "B0_HSIO70P", "B0_HSIO71P",
"B0_HSIO83P", "B0_HSIO73N_C2P_CLKP", "XCVR1_RX_VALID",
"XCVR1_LOCK", "XCVR1_ERROR", "XCVR2_RX_VALID",
"XCVR2_LOCK", "XCVR2_ERROR", "XCVR3_RX_VALID",
"XCVR3_LOCK", "XCVR3_ERROR", "XCVR_0B_REF_CLK_PLL_LOCK",
"XCVR_0C_REF_CLK_PLL_LOCK", "B0_HSIO81N";
};
};
@ -57,8 +98,8 @@
#size-cells = <0x2>;
device_type = "pci";
dma-noncoherent;
reg = <0x30 0x0 0x0 0x8000000>, <0x0 0x43000000 0x0 0x10000>;
reg-names = "cfg", "apb";
reg = <0x30 0x0 0x0 0x8000000>, <0x0 0x43004000 0x0 0x2000>, <0x0 0x43006000 0x0 0x2000>;
reg-names = "cfg", "bridge", "ctrl";
bus-range = <0x0 0x7f>;
interrupt-parent = <&plic>;
interrupts = <119>;
@ -67,7 +108,8 @@
<0 0 0 3 &pcie_intc 2>,
<0 0 0 4 &pcie_intc 3>;
interrupt-map-mask = <0 0 0 7>;
clocks = <&ccc_nw CLK_CCC_PLL0_OUT1>, <&ccc_nw CLK_CCC_PLL0_OUT3>;
clocks = <&ccc_nw CLK_CCC_PLL0_OUT1>,
<&ccc_nw CLK_CCC_PLL0_OUT3>;
clock-names = "fic1", "fic3";
ranges = <0x43000000 0x0 0x9000000 0x30 0x9000000 0x0 0xf000000>,
<0x1000000 0x0 0x8000000 0x30 0x8000000 0x0 0x1000000>,

@ -6,6 +6,7 @@
#include <dt-bindings/gpio/gpio.h>
#include "mpfs.dtsi"
#include "mpfs-beaglev-fire-fabric.dtsi"
#include "mpfs-beaglev-fire-pinmux.dtsi"
/* Clock frequency (in Hz) of the rtcclk */
#define RTCCLK_FREQ 1000000
@ -14,7 +15,7 @@
#address-cells = <2>;
#size-cells = <2>;
model = "BeagleBoard BeagleV-Fire";
compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs";
compatible = "beagle,beaglev-fire", "microchip,mpfs";
soc {
dma-ranges = <0x14 0x0 0x0 0x80000000 0x0 0x4000000>,
@ -25,8 +26,6 @@
};
aliases {
mmc0 = &mmc;
ethernet0 = &mac1;
serial0 = &mmuart0;
serial1 = &mmuart1;
serial2 = &mmuart2;
@ -82,7 +81,6 @@
compatible = "shared-dma-pool";
size = <0x0 0x4000000>;
no-map;
linux,dma-default;
alloc-ranges = <0x0 0xc4000000 0x0 0x4000000>;
};
@ -95,100 +93,97 @@
};
};
imx219_vana: fixedregulator@0 {
imx219_vana: fixedregulator-0 {
compatible = "regulator-fixed";
regulator-name = "imx219_vana";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
imx219_vdig: fixedregulator@1 {
imx219_vdig: fixedregulator-1 {
compatible = "regulator-fixed";
regulator-name = "imx219_vdig";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
imx219_vddl: fixedregulator@2 {
imx219_vddl: fixedregulator-2 {
compatible = "regulator-fixed";
regulator-name = "imx219_vddl";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
imx219_clk: camera-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};
&gpio0 {
ngpios=<14>;
gpio-line-names = "", "", "", "", "", "", "", "", "", "", "", "", "SD_CARD_CS", "USER_BUTTON";
gpio-line-names = "", "", "", "", "", "", "",
"", "", "", "", "", "SD_CARD_CS", "USER_BUTTON";
status = "okay";
sd_card_cs {
sd-card-cs-hog {
gpio-hog;
gpios = <12 12>;
output_high;
output-high;
line-name = "SD_CARD_CS";
};
user-button-hog {
gpio-hog;
gpios = <13 13>;
input;
line-name = "USER_BUTTON";
};
};
&gpio1 {
ngpios=<24>;
gpio-line-names = "", "", "", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "", "", "",
"ADC_IRQn", "", "", "USB_OCn";
"", "", "", "", "", "", "", "", "", "",
"ADC_IRQn", "", "", "USB_OCn";
status = "okay";
adc_irqn {
adc-irqn-hog {
gpio-hog;
gpios = <20 20>;
input;
line-name = "ADC_IRQn";
};
user_button {
usb-ocn-hog {
gpio-hog;
gpios = <23 23>;
input;
line-name = "USB_OCn";
};
};
&gpio2 {
interrupts = <53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>;
ngpios=<32>;
gpio-line-names = "P8_PIN3_USER_LED_0", "P8_PIN4_USER_LED_1", "P8_PIN5_USER_LED_2",
"P8_PIN6_USER_LED_3", "P8_PIN7_USER_LED_4", "P8_PIN8_USER_LED_5",
"P8_PIN9_USER_LED_6", "P8_PIN10_USER_LED_7", "P8_PIN11_USER_LED_8",
"P8_PIN12_USER_LED_9", "P8_PIN13_USER_LED_10", "P8_PIN14_USER_LED_11",
"P8_PIN15", "P8_PIN16", "P8_PIN17", "P8_PIN18", "P8_PIN19",
"P8_PIN20", "P8_PIN21", "P8_PIN22", "P8_PIN23", "P8_PIN24",
"P8_PIN25", "P8_PIN26", "P8_PIN27", "P8_PIN28", "P8_PIN29",
"P8_PIN30",
"M2_W_DISABLE1", "M2_W_DISABLE2",
"VIO_ENABLE", "SD_DET";
"P8_PIN6_USER_LED_3", "P8_PIN7_USER_LED_4", "P8_PIN8_USER_LED_5",
"P8_PIN9_USER_LED_6", "P8_PIN10_USER_LED_7", "P8_PIN11_USER_LED_8",
"P8_PIN12_USER_LED_9", "P8_PIN13_USER_LED_10", "P8_PIN14_USER_LED_11",
"P8_PIN15", "P8_PIN16", "P8_PIN17", "P8_PIN18", "P8_PIN19", "P8_PIN20",
"P8_PIN21", "P8_PIN22", "P8_PIN23", "P8_PIN24", "P8_PIN25", "P8_PIN26",
"P8_PIN27", "P8_PIN28", "P8_PIN29", "P8_PIN30", "M2_W_DISABLE1",
"M2_W_DISABLE2", "VIO_ENABLE", "SD_DET";
status = "okay";
vio_enable {
vio-enable-hog {
gpio-hog;
gpios = <30 30>;
output_high;
output-high;
line-name = "VIO_ENABLE";
};
sd_det {
sd-det-hog {
gpio-hog;
gpios = <31 31>;
input;
@ -202,9 +197,9 @@
&i2c1 {
status = "okay";
eeprom: eeprom@50 {
compatible = "atmel,24c32";
pagesize = <32>;
compatible = "at,24c32";
reg = <0x50>;
};
@ -218,15 +213,12 @@
port {
imx219_0: endpoint {
// remote-endpoint = <&csi1_ep>;
data-lanes = <1 2>;
clock-noncontinuous;
link-frequencies = /bits/ 64 <456000000>;
};
};
};
};
&mac0 {
@ -239,29 +231,10 @@
};
};
&mac1 {
dma-noncoherent;
status = "okay";
phy-mode = "sgmii";
phy-handle = <&phy1>;
phy1: ethernet-phy@0 {
reg = <0>;
};
};
&mbox {
status = "okay";
};
//&mmc {
// status = "okay";
// bus-width = <8>;
// disable-wp;
// cap-mmc-highspeed;
// mmc-ddr-1_8v;
// mmc-hs200-1_8v;
//};
&mmc {
dma-noncoherent;
bus-width = <4>;
@ -277,7 +250,6 @@
status = "okay";
};
&mmuart0 {
status = "okay";
};
@ -286,48 +258,6 @@
status = "okay";
};
//&mmuart2 {
// status = "okay";
//};
//&mmuart3 //{
// statu//s = "okay";
//};//
//
//&mmuart4 {
// status = "okay";
//};
//&pcie {
// status = "okay";
//};
&qspi {
status = "okay";
cs-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>, <&gpio0 12 GPIO_ACTIVE_LOW>;
num-cs = <2>;
mcp3464: mcp3464@0 {
compatible = "microchip,mcp3464r";
reg = <0>; /* CE0 */
spi-cpol;
spi-cpha;
spi-max-frequency = <15000000>;
status = "okay";
microchip,hw-device-address = <1>;
};
mmc-slot@1 {
compatible = "mmc-spi-slot";
reg = <1>;
gpios = <&gpio2 31 1>;
voltage-ranges = <3300 3300>;
spi-max-frequency = <15000000>;
disable-wp;
};
};
&refclk {
clock-frequency = <125000000>;
};
@ -366,19 +296,8 @@
};
};
&usb {
dma-noncoherent;
status = "okay";
dr_mode = "otg";
};
// UARTs
//bone_uart_4: &mmuart4 {
// symlink = "bone/uart/4";
//};
// I2Cs
bone_i2c_2: &i2c0 {
symlink = "bone/i2c/2";
};

File diff suppressed because it is too large Load Diff

@ -1,21 +1,26 @@
CONFIG_RISCV=y
CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="microchip-mpfs-icicle-kit"
CONFIG_SYS_PROMPT="RISC-V # "
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_LOAD_ADDR=0x80200000
CONFIG_TARGET_MICROCHIP_ICICLE=y
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_LOAD_ADDR=0x80200000
CONFIG_FIT=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_SYS_PROMPT="RISC-V # "
CONFIG_CMD_MMC_SWRITE=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-nand0:2m(payload),128k(env),119m(rootfs)"
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=282
CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-nand0:2m(payload),119m(ubi)"
CONFIG_CMD_UBI=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_DM_MTD=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYSRESET=y

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