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<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_92b117bae75cf16a05ca7611db29e9c7.html">instance</a></li> </ul>
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<div class="title">tc3.h</div> </div>
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<div class="contents">
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<a href="tc3_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>  </div>
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<div class="line"><a name="l00030"></a><span class="lineno"> 30</span> <span class="preprocessor">#ifndef _SAME54_TC3_INSTANCE_</span></div>
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<div class="line"><a name="l00031"></a><span class="lineno"> 31</span> <span class="preprocessor">#define _SAME54_TC3_INSTANCE_</span></div>
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<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>  </div>
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<div class="line"><a name="l00033"></a><span class="lineno"> 33</span> <span class="comment">/* ========== Register definition for TC3 peripheral ========== */</span></div>
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<div class="line"><a name="l00034"></a><span class="lineno"> 34</span> <span class="preprocessor">#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
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<div class="line"><a name="l00035"></a><span class="lineno"> 35</span> <span class="preprocessor">#define REG_TC3_CTRLA (0x4101C000) </span></div>
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<div class="line"><a name="l00036"></a><span class="lineno"> 36</span> <span class="preprocessor">#define REG_TC3_CTRLBCLR (0x4101C004) </span></div>
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<div class="line"><a name="l00037"></a><span class="lineno"> 37</span> <span class="preprocessor">#define REG_TC3_CTRLBSET (0x4101C005) </span></div>
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<div class="line"><a name="l00038"></a><span class="lineno"> 38</span> <span class="preprocessor">#define REG_TC3_EVCTRL (0x4101C006) </span></div>
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<div class="line"><a name="l00039"></a><span class="lineno"> 39</span> <span class="preprocessor">#define REG_TC3_INTENCLR (0x4101C008) </span></div>
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<div class="line"><a name="l00040"></a><span class="lineno"> 40</span> <span class="preprocessor">#define REG_TC3_INTENSET (0x4101C009) </span></div>
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<div class="line"><a name="l00041"></a><span class="lineno"> 41</span> <span class="preprocessor">#define REG_TC3_INTFLAG (0x4101C00A) </span></div>
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<div class="line"><a name="l00042"></a><span class="lineno"> 42</span> <span class="preprocessor">#define REG_TC3_STATUS (0x4101C00B) </span></div>
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<div class="line"><a name="l00043"></a><span class="lineno"> 43</span> <span class="preprocessor">#define REG_TC3_WAVE (0x4101C00C) </span></div>
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<div class="line"><a name="l00044"></a><span class="lineno"> 44</span> <span class="preprocessor">#define REG_TC3_DRVCTRL (0x4101C00D) </span></div>
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<div class="line"><a name="l00045"></a><span class="lineno"> 45</span> <span class="preprocessor">#define REG_TC3_DBGCTRL (0x4101C00F) </span></div>
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<div class="line"><a name="l00046"></a><span class="lineno"> 46</span> <span class="preprocessor">#define REG_TC3_SYNCBUSY (0x4101C010) </span></div>
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<div class="line"><a name="l00047"></a><span class="lineno"> 47</span> <span class="preprocessor">#define REG_TC3_COUNT16_COUNT (0x4101C014) </span></div>
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<div class="line"><a name="l00048"></a><span class="lineno"> 48</span> <span class="preprocessor">#define REG_TC3_COUNT16_CC0 (0x4101C01C) </span></div>
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<div class="line"><a name="l00049"></a><span class="lineno"> 49</span> <span class="preprocessor">#define REG_TC3_COUNT16_CC1 (0x4101C01E) </span></div>
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<div class="line"><a name="l00050"></a><span class="lineno"> 50</span> <span class="preprocessor">#define REG_TC3_COUNT16_CCBUF0 (0x4101C030) </span></div>
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<div class="line"><a name="l00051"></a><span class="lineno"> 51</span> <span class="preprocessor">#define REG_TC3_COUNT16_CCBUF1 (0x4101C032) </span></div>
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<div class="line"><a name="l00052"></a><span class="lineno"> 52</span> <span class="preprocessor">#define REG_TC3_COUNT32_COUNT (0x4101C014) </span></div>
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<div class="line"><a name="l00053"></a><span class="lineno"> 53</span> <span class="preprocessor">#define REG_TC3_COUNT32_CC0 (0x4101C01C) </span></div>
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<div class="line"><a name="l00054"></a><span class="lineno"> 54</span> <span class="preprocessor">#define REG_TC3_COUNT32_CC1 (0x4101C020) </span></div>
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<div class="line"><a name="l00055"></a><span class="lineno"> 55</span> <span class="preprocessor">#define REG_TC3_COUNT32_CCBUF0 (0x4101C030) </span></div>
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<div class="line"><a name="l00056"></a><span class="lineno"> 56</span> <span class="preprocessor">#define REG_TC3_COUNT32_CCBUF1 (0x4101C034) </span></div>
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<div class="line"><a name="l00057"></a><span class="lineno"> 57</span> <span class="preprocessor">#define REG_TC3_COUNT8_COUNT (0x4101C014) </span></div>
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<div class="line"><a name="l00058"></a><span class="lineno"> 58</span> <span class="preprocessor">#define REG_TC3_COUNT8_PER (0x4101C01B) </span></div>
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<div class="line"><a name="l00059"></a><span class="lineno"> 59</span> <span class="preprocessor">#define REG_TC3_COUNT8_CC0 (0x4101C01C) </span></div>
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<div class="line"><a name="l00060"></a><span class="lineno"> 60</span> <span class="preprocessor">#define REG_TC3_COUNT8_CC1 (0x4101C01D) </span></div>
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<div class="line"><a name="l00061"></a><span class="lineno"> 61</span> <span class="preprocessor">#define REG_TC3_COUNT8_PERBUF (0x4101C02F) </span></div>
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<div class="line"><a name="l00062"></a><span class="lineno"> 62</span> <span class="preprocessor">#define REG_TC3_COUNT8_CCBUF0 (0x4101C030) </span></div>
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<div class="line"><a name="l00063"></a><span class="lineno"> 63</span> <span class="preprocessor">#define REG_TC3_COUNT8_CCBUF1 (0x4101C031) </span></div>
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<div class="line"><a name="l00064"></a><span class="lineno"> 64</span> <span class="preprocessor">#else</span></div>
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<div class="line"><a name="l00065"></a><span class="lineno"><a class="line" href="tc3_8h.html#a68e3a8f32ee8acbfeb92a0e0d7aab96d"> 65</a></span> <span class="preprocessor">#define REG_TC3_CTRLA (*(RwReg *)0x4101C000UL) </span></div>
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<div class="line"><a name="l00066"></a><span class="lineno"><a class="line" href="tc3_8h.html#af4ffc154ad6a65f1551a8373c4d41215"> 66</a></span> <span class="preprocessor">#define REG_TC3_CTRLBCLR (*(RwReg8 *)0x4101C004UL) </span></div>
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<div class="line"><a name="l00067"></a><span class="lineno"><a class="line" href="tc3_8h.html#a3df7c45f48a5991c099c9272eca15d10"> 67</a></span> <span class="preprocessor">#define REG_TC3_CTRLBSET (*(RwReg8 *)0x4101C005UL) </span></div>
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<div class="line"><a name="l00068"></a><span class="lineno"><a class="line" href="tc3_8h.html#a18a931968ebd63ce718641ccfefff381"> 68</a></span> <span class="preprocessor">#define REG_TC3_EVCTRL (*(RwReg16*)0x4101C006UL) </span></div>
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<div class="line"><a name="l00069"></a><span class="lineno"><a class="line" href="tc3_8h.html#a1b1d71353c7ac92ab807dd8908f8361d"> 69</a></span> <span class="preprocessor">#define REG_TC3_INTENCLR (*(RwReg8 *)0x4101C008UL) </span></div>
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<div class="line"><a name="l00070"></a><span class="lineno"><a class="line" href="tc3_8h.html#a1b37176b09dfd86946b07a08e5c5ba90"> 70</a></span> <span class="preprocessor">#define REG_TC3_INTENSET (*(RwReg8 *)0x4101C009UL) </span></div>
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<div class="line"><a name="l00071"></a><span class="lineno"><a class="line" href="tc3_8h.html#ac6a51695cb7e70eee41e5c352d83aa74"> 71</a></span> <span class="preprocessor">#define REG_TC3_INTFLAG (*(RwReg8 *)0x4101C00AUL) </span></div>
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<div class="line"><a name="l00072"></a><span class="lineno"><a class="line" href="tc3_8h.html#a49a27c5853e8bee2a6f28393df05f27d"> 72</a></span> <span class="preprocessor">#define REG_TC3_STATUS (*(RwReg8 *)0x4101C00BUL) </span></div>
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<div class="line"><a name="l00073"></a><span class="lineno"><a class="line" href="tc3_8h.html#a45ccef486392d2db03f2cc9a6f8e9ca6"> 73</a></span> <span class="preprocessor">#define REG_TC3_WAVE (*(RwReg8 *)0x4101C00CUL) </span></div>
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<div class="line"><a name="l00074"></a><span class="lineno"><a class="line" href="tc3_8h.html#a9a9493f34639317a145a00d3568479b7"> 74</a></span> <span class="preprocessor">#define REG_TC3_DRVCTRL (*(RwReg8 *)0x4101C00DUL) </span></div>
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<div class="line"><a name="l00075"></a><span class="lineno"><a class="line" href="tc3_8h.html#a63c12b49ed2194279076a1c75ba536fc"> 75</a></span> <span class="preprocessor">#define REG_TC3_DBGCTRL (*(RwReg8 *)0x4101C00FUL) </span></div>
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<div class="line"><a name="l00076"></a><span class="lineno"><a class="line" href="tc3_8h.html#a9a9dabdd428ae5e733910438f0329036"> 76</a></span> <span class="preprocessor">#define REG_TC3_SYNCBUSY (*(RoReg *)0x4101C010UL) </span></div>
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<div class="line"><a name="l00077"></a><span class="lineno"><a class="line" href="tc3_8h.html#a2ae2a0122bc1876583ee38a5943413d9"> 77</a></span> <span class="preprocessor">#define REG_TC3_COUNT16_COUNT (*(RwReg16*)0x4101C014UL) </span></div>
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<div class="line"><a name="l00078"></a><span class="lineno"><a class="line" href="tc3_8h.html#aca4d20c0d9b45f97252e5507341719f2"> 78</a></span> <span class="preprocessor">#define REG_TC3_COUNT16_CC0 (*(RwReg16*)0x4101C01CUL) </span></div>
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<div class="line"><a name="l00079"></a><span class="lineno"><a class="line" href="tc3_8h.html#a4ca57bdc04f8ca126ec3520f8f8013df"> 79</a></span> <span class="preprocessor">#define REG_TC3_COUNT16_CC1 (*(RwReg16*)0x4101C01EUL) </span></div>
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<div class="line"><a name="l00080"></a><span class="lineno"><a class="line" href="tc3_8h.html#aaa6c9778bde05fcadf1cc690f9ca4b79"> 80</a></span> <span class="preprocessor">#define REG_TC3_COUNT16_CCBUF0 (*(RwReg16*)0x4101C030UL) </span></div>
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<div class="line"><a name="l00081"></a><span class="lineno"><a class="line" href="tc3_8h.html#a2c984ec7e6ac9b0b87027c8bac483a76"> 81</a></span> <span class="preprocessor">#define REG_TC3_COUNT16_CCBUF1 (*(RwReg16*)0x4101C032UL) </span></div>
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<div class="line"><a name="l00082"></a><span class="lineno"><a class="line" href="tc3_8h.html#a5fce27285c241bbc729071e8ed3358af"> 82</a></span> <span class="preprocessor">#define REG_TC3_COUNT32_COUNT (*(RwReg *)0x4101C014UL) </span></div>
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<div class="line"><a name="l00083"></a><span class="lineno"><a class="line" href="tc3_8h.html#ad47b97e01b1f1a8b9492227af8be252e"> 83</a></span> <span class="preprocessor">#define REG_TC3_COUNT32_CC0 (*(RwReg *)0x4101C01CUL) </span></div>
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<div class="line"><a name="l00084"></a><span class="lineno"><a class="line" href="tc3_8h.html#aea83eebd025b152935628547e1da70d0"> 84</a></span> <span class="preprocessor">#define REG_TC3_COUNT32_CC1 (*(RwReg *)0x4101C020UL) </span></div>
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<div class="line"><a name="l00085"></a><span class="lineno"><a class="line" href="tc3_8h.html#a271de180bc4813ee1ad83db66ccdddf7"> 85</a></span> <span class="preprocessor">#define REG_TC3_COUNT32_CCBUF0 (*(RwReg *)0x4101C030UL) </span></div>
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<div class="line"><a name="l00086"></a><span class="lineno"><a class="line" href="tc3_8h.html#ab342d3373362ed3ade62e0c09cdda83f"> 86</a></span> <span class="preprocessor">#define REG_TC3_COUNT32_CCBUF1 (*(RwReg *)0x4101C034UL) </span></div>
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<div class="line"><a name="l00087"></a><span class="lineno"><a class="line" href="tc3_8h.html#a848a6b83d0781cfe89e0086168e32270"> 87</a></span> <span class="preprocessor">#define REG_TC3_COUNT8_COUNT (*(RwReg8 *)0x4101C014UL) </span></div>
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<div class="line"><a name="l00088"></a><span class="lineno"><a class="line" href="tc3_8h.html#ac94b087a6182e00de4db3c78dd97828b"> 88</a></span> <span class="preprocessor">#define REG_TC3_COUNT8_PER (*(RwReg8 *)0x4101C01BUL) </span></div>
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<div class="line"><a name="l00089"></a><span class="lineno"><a class="line" href="tc3_8h.html#a3e6cb9e6d4614f0efbcfe38dbaff9c2b"> 89</a></span> <span class="preprocessor">#define REG_TC3_COUNT8_CC0 (*(RwReg8 *)0x4101C01CUL) </span></div>
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<div class="line"><a name="l00090"></a><span class="lineno"><a class="line" href="tc3_8h.html#a4aec60d3765663e8fc04054a8a349bf0"> 90</a></span> <span class="preprocessor">#define REG_TC3_COUNT8_CC1 (*(RwReg8 *)0x4101C01DUL) </span></div>
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<div class="line"><a name="l00091"></a><span class="lineno"><a class="line" href="tc3_8h.html#a51dd70986f1cf91257acc25f1f66bce4"> 91</a></span> <span class="preprocessor">#define REG_TC3_COUNT8_PERBUF (*(RwReg8 *)0x4101C02FUL) </span></div>
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<div class="line"><a name="l00092"></a><span class="lineno"><a class="line" href="tc3_8h.html#affe64076eaeb90ff8540590080d06bca"> 92</a></span> <span class="preprocessor">#define REG_TC3_COUNT8_CCBUF0 (*(RwReg8 *)0x4101C030UL) </span></div>
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<div class="line"><a name="l00093"></a><span class="lineno"><a class="line" href="tc3_8h.html#a609a04e51e8dff9291ab30d87c78dab2"> 93</a></span> <span class="preprocessor">#define REG_TC3_COUNT8_CCBUF1 (*(RwReg8 *)0x4101C031UL) </span></div>
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<div class="line"><a name="l00094"></a><span class="lineno"> 94</span> <span class="preprocessor">#endif </span><span class="comment">/* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00095"></a><span class="lineno"> 95</span>  </div>
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<div class="line"><a name="l00096"></a><span class="lineno"> 96</span> <span class="comment">/* ========== Instance parameters for TC3 peripheral ========== */</span></div>
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<div class="line"><a name="l00097"></a><span class="lineno"> 97</span> <span class="preprocessor">#define TC3_CC_NUM 2 </span></div>
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<div class="line"><a name="l00098"></a><span class="lineno"> 98</span> <span class="preprocessor">#define TC3_DMAC_ID_MC_0 54</span></div>
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<div class="line"><a name="l00099"></a><span class="lineno"> 99</span> <span class="preprocessor">#define TC3_DMAC_ID_MC_1 55</span></div>
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<div class="line"><a name="l00100"></a><span class="lineno"> 100</span> <span class="preprocessor">#define TC3_DMAC_ID_MC_LSB 54</span></div>
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<div class="line"><a name="l00101"></a><span class="lineno"> 101</span> <span class="preprocessor">#define TC3_DMAC_ID_MC_MSB 55</span></div>
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<div class="line"><a name="l00102"></a><span class="lineno"> 102</span> <span class="preprocessor">#define TC3_DMAC_ID_MC_SIZE 2</span></div>
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<div class="line"><a name="l00103"></a><span class="lineno"> 103</span> <span class="preprocessor">#define TC3_DMAC_ID_OVF 53 // Indexes of DMA Overflow trigger</span></div>
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<div class="line"><a name="l00104"></a><span class="lineno"> 104</span> <span class="preprocessor">#define TC3_EXT 0 // Coding of implemented extended features (keep 0 value)</span></div>
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<div class="line"><a name="l00105"></a><span class="lineno"> 105</span> <span class="preprocessor">#define TC3_GCLK_ID 26 // Index of Generic Clock</span></div>
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<div class="line"><a name="l00106"></a><span class="lineno"> 106</span> <span class="preprocessor">#define TC3_MASTER_SLAVE_MODE 2 // TC type 0 : NA, 1 : Master, 2 : Slave</span></div>
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<div class="line"><a name="l00107"></a><span class="lineno"> 107</span> <span class="preprocessor">#define TC3_OW_NUM 2 // Number of Output Waveforms</span></div>
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<div class="line"><a name="l00109"></a><span class="lineno"> 109</span> <span class="preprocessor">#endif </span><span class="comment">/* _SAME54_TC3_INSTANCE_ */</span><span class="preprocessor"></span></div>
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