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120 lines
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<div id="projectname">SAME54P20A Test Project
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<div class="header">
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<a href="#pub-attribs">Data Fields</a> </div>
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<div class="title">UsbHostDescBank Struct Reference</div> </div>
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<div class="contents">
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<p><a class="el" href="structUsbHostDescBank.html" title="UsbHostDescBank SRAM registers.">UsbHostDescBank</a> SRAM registers.
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<a href="structUsbHostDescBank.html#details">More...</a></p>
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<p><code>#include <<a class="el" href="component_2usb_8h_source.html">usb.h</a>></code></p>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a>
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Data Fields</h2></td></tr>
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<tr class="memitem:aa842fb36eb7c93114129f581f71a5a3c"><td class="memItemLeft" align="right" valign="top"><a id="aa842fb36eb7c93114129f581f71a5a3c"></a>
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__IO <a class="el" href="unionUSB__HOST__ADDR__Type.html">USB_HOST_ADDR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structUsbHostDescBank.html#aa842fb36eb7c93114129f581f71a5a3c">ADDR</a></td></tr>
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<tr class="memdesc:aa842fb36eb7c93114129f581f71a5a3c"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x000 (R/W 32) HOST_DESC_BANK Host Bank, Adress of Data Buffer. <br /></td></tr>
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<tr class="separator:aa842fb36eb7c93114129f581f71a5a3c"><td class="memSeparator" colspan="2"> </td></tr>
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__IO <a class="el" href="unionUSB__HOST__PCKSIZE__Type.html">USB_HOST_PCKSIZE_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structUsbHostDescBank.html#a26691df69c7fe5690ae96304f266f328">PCKSIZE</a></td></tr>
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<tr class="memdesc:a26691df69c7fe5690ae96304f266f328"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x004 (R/W 32) HOST_DESC_BANK Host Bank, Packet Size. <br /></td></tr>
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<tr class="separator:a26691df69c7fe5690ae96304f266f328"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3d1737d820e0fd6f2dc2fa22d03e8703"><td class="memItemLeft" align="right" valign="top"><a id="a3d1737d820e0fd6f2dc2fa22d03e8703"></a>
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__IO <a class="el" href="unionUSB__HOST__EXTREG__Type.html">USB_HOST_EXTREG_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structUsbHostDescBank.html#a3d1737d820e0fd6f2dc2fa22d03e8703">EXTREG</a></td></tr>
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<tr class="memdesc:a3d1737d820e0fd6f2dc2fa22d03e8703"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x008 (R/W 16) HOST_DESC_BANK Host Bank, Extended. <br /></td></tr>
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<tr class="separator:a3d1737d820e0fd6f2dc2fa22d03e8703"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a29225d958a68536f4c7e25ea52899c56"><td class="memItemLeft" align="right" valign="top"><a id="a29225d958a68536f4c7e25ea52899c56"></a>
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__IO <a class="el" href="unionUSB__HOST__STATUS__BK__Type.html">USB_HOST_STATUS_BK_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structUsbHostDescBank.html#a29225d958a68536f4c7e25ea52899c56">STATUS_BK</a></td></tr>
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<tr class="memdesc:a29225d958a68536f4c7e25ea52899c56"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x00A (R/W 8) HOST_DESC_BANK Host Bank, Status of Bank. <br /></td></tr>
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<tr class="separator:a29225d958a68536f4c7e25ea52899c56"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af6ffa71b5ca2160949a2dd014f47577a"><td class="memItemLeft" align="right" valign="top"><a id="af6ffa71b5ca2160949a2dd014f47577a"></a>
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<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> </td><td class="memItemRight" valign="bottom"><b>Reserved1</b> [0x1]</td></tr>
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<tr class="separator:af6ffa71b5ca2160949a2dd014f47577a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a06d1373e3a08b7b47910cfbc948e5841"><td class="memItemLeft" align="right" valign="top"><a id="a06d1373e3a08b7b47910cfbc948e5841"></a>
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__IO <a class="el" href="unionUSB__HOST__CTRL__PIPE__Type.html">USB_HOST_CTRL_PIPE_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structUsbHostDescBank.html#a06d1373e3a08b7b47910cfbc948e5841">CTRL_PIPE</a></td></tr>
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<tr class="memdesc:a06d1373e3a08b7b47910cfbc948e5841"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x00C (R/W 16) HOST_DESC_BANK Host Bank, Host Control Pipe. <br /></td></tr>
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<tr class="separator:a06d1373e3a08b7b47910cfbc948e5841"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a72b1930b932dee7dcb7db19d831503c5"><td class="memItemLeft" align="right" valign="top"><a id="a72b1930b932dee7dcb7db19d831503c5"></a>
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__IO <a class="el" href="unionUSB__HOST__STATUS__PIPE__Type.html">USB_HOST_STATUS_PIPE_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structUsbHostDescBank.html#a72b1930b932dee7dcb7db19d831503c5">STATUS_PIPE</a></td></tr>
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<tr class="memdesc:a72b1930b932dee7dcb7db19d831503c5"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x00E (R/W 16) HOST_DESC_BANK Host Bank, Host Status Pipe. <br /></td></tr>
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<tr class="separator:a72b1930b932dee7dcb7db19d831503c5"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<div class="textblock"><p><a class="el" href="structUsbHostDescBank.html" title="UsbHostDescBank SRAM registers.">UsbHostDescBank</a> SRAM registers. </p>
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<p class="definition">Definition at line <a class="el" href="component_2usb_8h_source.html#l01647">1647</a> of file <a class="el" href="component_2usb_8h_source.html">usb.h</a>.</p>
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</div><hr/>The documentation for this struct was generated from the following file:<ul>
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<li>/storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/<a class="el" href="component_2usb_8h_source.html">usb.h</a></li>
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