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<div id="projectname">SAME54P20A Test Project
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<div class="header">
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<a href="#pub-attribs">Data Fields</a> </div>
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<div class="title">Gmac Struct Reference</div> </div>
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<p>GMAC hardware registers.
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<a href="structGmac.html#details">More...</a></p>
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<p><code>#include <<a class="el" href="component_2gmac_8h_source.html">gmac.h</a>></code></p>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a>
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Data Fields</h2></td></tr>
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<tr class="memitem:ada472f5a6fc9fc9de79c249b78a03c73"><td class="memItemLeft" align="right" valign="top"><a id="ada472f5a6fc9fc9de79c249b78a03c73"></a>
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__IO <a class="el" href="unionGMAC__NCR__Type.html">GMAC_NCR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#ada472f5a6fc9fc9de79c249b78a03c73">NCR</a></td></tr>
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<tr class="memdesc:ada472f5a6fc9fc9de79c249b78a03c73"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x000 (R/W 32) Network Control Register. <br /></td></tr>
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<tr class="separator:ada472f5a6fc9fc9de79c249b78a03c73"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8e12dc5694dcf5b307aefb8845d2561a"><td class="memItemLeft" align="right" valign="top"><a id="a8e12dc5694dcf5b307aefb8845d2561a"></a>
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__IO <a class="el" href="unionGMAC__NCFGR__Type.html">GMAC_NCFGR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a8e12dc5694dcf5b307aefb8845d2561a">NCFGR</a></td></tr>
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<tr class="memdesc:a8e12dc5694dcf5b307aefb8845d2561a"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x004 (R/W 32) Network Configuration Register. <br /></td></tr>
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<tr class="separator:a8e12dc5694dcf5b307aefb8845d2561a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0b1cc0188ea56c107e0b836de9bcb356"><td class="memItemLeft" align="right" valign="top"><a id="a0b1cc0188ea56c107e0b836de9bcb356"></a>
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__I <a class="el" href="unionGMAC__NSR__Type.html">GMAC_NSR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a0b1cc0188ea56c107e0b836de9bcb356">NSR</a></td></tr>
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<tr class="memdesc:a0b1cc0188ea56c107e0b836de9bcb356"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x008 (R/ 32) Network Status Register. <br /></td></tr>
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<tr class="separator:a0b1cc0188ea56c107e0b836de9bcb356"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acfcac33c69fb02171b7651e50423628c"><td class="memItemLeft" align="right" valign="top"><a id="acfcac33c69fb02171b7651e50423628c"></a>
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__IO <a class="el" href="unionGMAC__UR__Type.html">GMAC_UR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#acfcac33c69fb02171b7651e50423628c">UR</a></td></tr>
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<tr class="memdesc:acfcac33c69fb02171b7651e50423628c"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x00C (R/W 32) User Register. <br /></td></tr>
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<tr class="separator:acfcac33c69fb02171b7651e50423628c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac56f728f7dde078381e0158cbe8e8838"><td class="memItemLeft" align="right" valign="top"><a id="ac56f728f7dde078381e0158cbe8e8838"></a>
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__IO <a class="el" href="unionGMAC__DCFGR__Type.html">GMAC_DCFGR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#ac56f728f7dde078381e0158cbe8e8838">DCFGR</a></td></tr>
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<tr class="memdesc:ac56f728f7dde078381e0158cbe8e8838"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x010 (R/W 32) DMA Configuration Register. <br /></td></tr>
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<tr class="separator:ac56f728f7dde078381e0158cbe8e8838"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae9ed8549e6479a17c0ae7297a9d040b0"><td class="memItemLeft" align="right" valign="top"><a id="ae9ed8549e6479a17c0ae7297a9d040b0"></a>
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__IO <a class="el" href="unionGMAC__TSR__Type.html">GMAC_TSR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#ae9ed8549e6479a17c0ae7297a9d040b0">TSR</a></td></tr>
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<tr class="memdesc:ae9ed8549e6479a17c0ae7297a9d040b0"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x014 (R/W 32) Transmit Status Register. <br /></td></tr>
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<tr class="separator:ae9ed8549e6479a17c0ae7297a9d040b0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a96c359f1b2c1c968c2a315889323269d"><td class="memItemLeft" align="right" valign="top"><a id="a96c359f1b2c1c968c2a315889323269d"></a>
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__IO <a class="el" href="unionGMAC__RBQB__Type.html">GMAC_RBQB_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a96c359f1b2c1c968c2a315889323269d">RBQB</a></td></tr>
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<tr class="memdesc:a96c359f1b2c1c968c2a315889323269d"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x018 (R/W 32) Receive Buffer Queue Base Address. <br /></td></tr>
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<tr class="separator:a96c359f1b2c1c968c2a315889323269d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac4fff739eebf6a701491b344fdf08631"><td class="memItemLeft" align="right" valign="top"><a id="ac4fff739eebf6a701491b344fdf08631"></a>
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__IO <a class="el" href="unionGMAC__TBQB__Type.html">GMAC_TBQB_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#ac4fff739eebf6a701491b344fdf08631">TBQB</a></td></tr>
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<tr class="memdesc:ac4fff739eebf6a701491b344fdf08631"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x01C (R/W 32) Transmit Buffer Queue Base Address. <br /></td></tr>
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<tr class="separator:ac4fff739eebf6a701491b344fdf08631"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a858d2b95988fb961d2582672a431613f"><td class="memItemLeft" align="right" valign="top"><a id="a858d2b95988fb961d2582672a431613f"></a>
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__IO <a class="el" href="unionGMAC__RSR__Type.html">GMAC_RSR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a858d2b95988fb961d2582672a431613f">RSR</a></td></tr>
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<tr class="memdesc:a858d2b95988fb961d2582672a431613f"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x020 (R/W 32) Receive Status Register. <br /></td></tr>
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<tr class="separator:a858d2b95988fb961d2582672a431613f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad510efb36edec52db3baa6bbda394e23"><td class="memItemLeft" align="right" valign="top"><a id="ad510efb36edec52db3baa6bbda394e23"></a>
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__IO <a class="el" href="unionGMAC__ISR__Type.html">GMAC_ISR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#ad510efb36edec52db3baa6bbda394e23">ISR</a></td></tr>
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<tr class="memdesc:ad510efb36edec52db3baa6bbda394e23"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x024 (R/W 32) Interrupt Status Register. <br /></td></tr>
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<tr class="separator:ad510efb36edec52db3baa6bbda394e23"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a47f7b4e40c6edbd96e8ff182b9329229"><td class="memItemLeft" align="right" valign="top"><a id="a47f7b4e40c6edbd96e8ff182b9329229"></a>
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__O <a class="el" href="unionGMAC__IER__Type.html">GMAC_IER_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a47f7b4e40c6edbd96e8ff182b9329229">IER</a></td></tr>
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<tr class="memdesc:a47f7b4e40c6edbd96e8ff182b9329229"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x028 ( /W 32) Interrupt Enable Register. <br /></td></tr>
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<tr class="separator:a47f7b4e40c6edbd96e8ff182b9329229"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac8acc3c168815214e473ab244d0e3bd7"><td class="memItemLeft" align="right" valign="top"><a id="ac8acc3c168815214e473ab244d0e3bd7"></a>
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__O <a class="el" href="unionGMAC__IDR__Type.html">GMAC_IDR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#ac8acc3c168815214e473ab244d0e3bd7">IDR</a></td></tr>
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<tr class="memdesc:ac8acc3c168815214e473ab244d0e3bd7"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x02C ( /W 32) Interrupt Disable Register. <br /></td></tr>
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<tr class="separator:ac8acc3c168815214e473ab244d0e3bd7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2b3ddf4bec954bee6a2439843fd48b30"><td class="memItemLeft" align="right" valign="top"><a id="a2b3ddf4bec954bee6a2439843fd48b30"></a>
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__I <a class="el" href="unionGMAC__IMR__Type.html">GMAC_IMR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a2b3ddf4bec954bee6a2439843fd48b30">IMR</a></td></tr>
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<tr class="memdesc:a2b3ddf4bec954bee6a2439843fd48b30"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x030 (R/ 32) Interrupt Mask Register. <br /></td></tr>
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<tr class="separator:a2b3ddf4bec954bee6a2439843fd48b30"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a996630e20e130021c0273162eb90d32b"><td class="memItemLeft" align="right" valign="top"><a id="a996630e20e130021c0273162eb90d32b"></a>
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__IO <a class="el" href="unionGMAC__MAN__Type.html">GMAC_MAN_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a996630e20e130021c0273162eb90d32b">MAN</a></td></tr>
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<tr class="memdesc:a996630e20e130021c0273162eb90d32b"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x034 (R/W 32) PHY Maintenance Register. <br /></td></tr>
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<tr class="separator:a996630e20e130021c0273162eb90d32b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8ccf4957adad8b20915cb42a72af3ab6"><td class="memItemLeft" align="right" valign="top"><a id="a8ccf4957adad8b20915cb42a72af3ab6"></a>
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__I <a class="el" href="unionGMAC__RPQ__Type.html">GMAC_RPQ_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a8ccf4957adad8b20915cb42a72af3ab6">RPQ</a></td></tr>
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<tr class="memdesc:a8ccf4957adad8b20915cb42a72af3ab6"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x038 (R/ 32) Received Pause Quantum Register. <br /></td></tr>
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<tr class="separator:a8ccf4957adad8b20915cb42a72af3ab6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a95fcbcc1f6264d872f4e6dde11c5c830"><td class="memItemLeft" align="right" valign="top"><a id="a95fcbcc1f6264d872f4e6dde11c5c830"></a>
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__IO <a class="el" href="unionGMAC__TPQ__Type.html">GMAC_TPQ_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a95fcbcc1f6264d872f4e6dde11c5c830">TPQ</a></td></tr>
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<tr class="memdesc:a95fcbcc1f6264d872f4e6dde11c5c830"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x03C (R/W 32) Transmit Pause Quantum Register. <br /></td></tr>
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<tr class="separator:a95fcbcc1f6264d872f4e6dde11c5c830"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a609edbe72fc33e3f6d26c30f08ddbe7d"><td class="memItemLeft" align="right" valign="top"><a id="a609edbe72fc33e3f6d26c30f08ddbe7d"></a>
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__IO <a class="el" href="unionGMAC__TPSF__Type.html">GMAC_TPSF_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a609edbe72fc33e3f6d26c30f08ddbe7d">TPSF</a></td></tr>
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<tr class="memdesc:a609edbe72fc33e3f6d26c30f08ddbe7d"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x040 (R/W 32) TX partial store and forward Register. <br /></td></tr>
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<tr class="separator:a609edbe72fc33e3f6d26c30f08ddbe7d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4767e5b6440b2b14cf40d5efff0562ca"><td class="memItemLeft" align="right" valign="top"><a id="a4767e5b6440b2b14cf40d5efff0562ca"></a>
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__IO <a class="el" href="unionGMAC__RPSF__Type.html">GMAC_RPSF_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a4767e5b6440b2b14cf40d5efff0562ca">RPSF</a></td></tr>
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<tr class="memdesc:a4767e5b6440b2b14cf40d5efff0562ca"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x044 (R/W 32) RX partial store and forward Register. <br /></td></tr>
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<tr class="separator:a4767e5b6440b2b14cf40d5efff0562ca"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2d35b09179958b57890ebf0a1e6a7a60"><td class="memItemLeft" align="right" valign="top"><a id="a2d35b09179958b57890ebf0a1e6a7a60"></a>
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__IO <a class="el" href="unionGMAC__RJFML__Type.html">GMAC_RJFML_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a2d35b09179958b57890ebf0a1e6a7a60">RJFML</a></td></tr>
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<tr class="memdesc:a2d35b09179958b57890ebf0a1e6a7a60"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x048 (R/W 32) RX Jumbo Frame Max Length Register. <br /></td></tr>
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<tr class="separator:a2d35b09179958b57890ebf0a1e6a7a60"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad002a5a0b1591bbfbd933d02e85f7de4"><td class="memItemLeft" align="right" valign="top"><a id="ad002a5a0b1591bbfbd933d02e85f7de4"></a>
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<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> </td><td class="memItemRight" valign="bottom"><b>Reserved1</b> [0x34]</td></tr>
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<tr class="separator:ad002a5a0b1591bbfbd933d02e85f7de4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afa8f5941a7878cb025dfd325a34db933"><td class="memItemLeft" align="right" valign="top"><a id="afa8f5941a7878cb025dfd325a34db933"></a>
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__IO <a class="el" href="unionGMAC__HRB__Type.html">GMAC_HRB_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#afa8f5941a7878cb025dfd325a34db933">HRB</a></td></tr>
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<tr class="memdesc:afa8f5941a7878cb025dfd325a34db933"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x080 (R/W 32) Hash Register Bottom [31:0]. <br /></td></tr>
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<tr class="separator:afa8f5941a7878cb025dfd325a34db933"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5cd61cbb140418b656e107d82949c894"><td class="memItemLeft" align="right" valign="top"><a id="a5cd61cbb140418b656e107d82949c894"></a>
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__IO <a class="el" href="unionGMAC__HRT__Type.html">GMAC_HRT_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a5cd61cbb140418b656e107d82949c894">HRT</a></td></tr>
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<tr class="memdesc:a5cd61cbb140418b656e107d82949c894"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x084 (R/W 32) Hash Register Top [63:32]. <br /></td></tr>
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<tr class="separator:a5cd61cbb140418b656e107d82949c894"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2f6c722961ff291bf9a51979a7806144"><td class="memItemLeft" align="right" valign="top"><a id="a2f6c722961ff291bf9a51979a7806144"></a>
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<a class="el" href="structGmacSa.html">GmacSa</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a2f6c722961ff291bf9a51979a7806144">Sa</a> [4]</td></tr>
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<tr class="memdesc:a2f6c722961ff291bf9a51979a7806144"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x088 <a class="el" href="structGmacSa.html" title="GmacSa hardware registers.">GmacSa</a> groups. <br /></td></tr>
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<tr class="separator:a2f6c722961ff291bf9a51979a7806144"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab50b58434790d53f89f8b28924c6d165"><td class="memItemLeft" align="right" valign="top"><a id="ab50b58434790d53f89f8b28924c6d165"></a>
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__IO <a class="el" href="unionGMAC__TIDM__Type.html">GMAC_TIDM_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#ab50b58434790d53f89f8b28924c6d165">TIDM</a> [4]</td></tr>
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<tr class="memdesc:ab50b58434790d53f89f8b28924c6d165"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x0A8 (R/W 32) Type ID Match Register. <br /></td></tr>
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<tr class="separator:ab50b58434790d53f89f8b28924c6d165"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac83aa1c3bcf2abe89a8fb9a137a2492c"><td class="memItemLeft" align="right" valign="top"><a id="ac83aa1c3bcf2abe89a8fb9a137a2492c"></a>
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__IO <a class="el" href="unionGMAC__WOL__Type.html">GMAC_WOL_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#ac83aa1c3bcf2abe89a8fb9a137a2492c">WOL</a></td></tr>
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<tr class="memdesc:ac83aa1c3bcf2abe89a8fb9a137a2492c"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x0B8 (R/W 32) Wake on LAN. <br /></td></tr>
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<tr class="separator:ac83aa1c3bcf2abe89a8fb9a137a2492c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa2e757385cf30f531a17215fc9bbda3b"><td class="memItemLeft" align="right" valign="top"><a id="aa2e757385cf30f531a17215fc9bbda3b"></a>
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__IO <a class="el" href="unionGMAC__IPGS__Type.html">GMAC_IPGS_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#aa2e757385cf30f531a17215fc9bbda3b">IPGS</a></td></tr>
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<tr class="memdesc:aa2e757385cf30f531a17215fc9bbda3b"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x0BC (R/W 32) IPG Stretch Register. <br /></td></tr>
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<tr class="separator:aa2e757385cf30f531a17215fc9bbda3b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a19dc8c12cba95c9d84cfc0492a1f0248"><td class="memItemLeft" align="right" valign="top"><a id="a19dc8c12cba95c9d84cfc0492a1f0248"></a>
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__IO <a class="el" href="unionGMAC__SVLAN__Type.html">GMAC_SVLAN_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a19dc8c12cba95c9d84cfc0492a1f0248">SVLAN</a></td></tr>
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<tr class="memdesc:a19dc8c12cba95c9d84cfc0492a1f0248"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x0C0 (R/W 32) Stacked VLAN Register. <br /></td></tr>
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<tr class="separator:a19dc8c12cba95c9d84cfc0492a1f0248"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a67ea7672eaffa947c9a4afb76352ba6c"><td class="memItemLeft" align="right" valign="top"><a id="a67ea7672eaffa947c9a4afb76352ba6c"></a>
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__IO <a class="el" href="unionGMAC__TPFCP__Type.html">GMAC_TPFCP_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a67ea7672eaffa947c9a4afb76352ba6c">TPFCP</a></td></tr>
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<tr class="memdesc:a67ea7672eaffa947c9a4afb76352ba6c"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x0C4 (R/W 32) Transmit PFC Pause Register. <br /></td></tr>
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<tr class="separator:a67ea7672eaffa947c9a4afb76352ba6c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:add172e7c803fffd9ab82a806a9749e65"><td class="memItemLeft" align="right" valign="top"><a id="add172e7c803fffd9ab82a806a9749e65"></a>
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__IO <a class="el" href="unionGMAC__SAMB1__Type.html">GMAC_SAMB1_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#add172e7c803fffd9ab82a806a9749e65">SAMB1</a></td></tr>
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<tr class="memdesc:add172e7c803fffd9ab82a806a9749e65"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x0C8 (R/W 32) Specific Address 1 Mask Bottom [31:0] Register. <br /></td></tr>
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<tr class="separator:add172e7c803fffd9ab82a806a9749e65"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af165a1d43d964c71ca152fc8e20bb762"><td class="memItemLeft" align="right" valign="top"><a id="af165a1d43d964c71ca152fc8e20bb762"></a>
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__IO <a class="el" href="unionGMAC__SAMT1__Type.html">GMAC_SAMT1_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#af165a1d43d964c71ca152fc8e20bb762">SAMT1</a></td></tr>
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<tr class="memdesc:af165a1d43d964c71ca152fc8e20bb762"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x0CC (R/W 32) Specific Address 1 Mask Top [47:32] Register. <br /></td></tr>
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<tr class="separator:af165a1d43d964c71ca152fc8e20bb762"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a67ca34ef89d45f257c3546aa1d544dde"><td class="memItemLeft" align="right" valign="top"><a id="a67ca34ef89d45f257c3546aa1d544dde"></a>
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<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> </td><td class="memItemRight" valign="bottom"><b>Reserved2</b> [0xC]</td></tr>
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<tr class="separator:a67ca34ef89d45f257c3546aa1d544dde"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a05105ef43e087c84f65859774058391c"><td class="memItemLeft" align="right" valign="top"><a id="a05105ef43e087c84f65859774058391c"></a>
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__IO <a class="el" href="unionGMAC__NSC__Type.html">GMAC_NSC_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a05105ef43e087c84f65859774058391c">NSC</a></td></tr>
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|
<tr class="memdesc:a05105ef43e087c84f65859774058391c"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x0DC (R/W 32) Tsu timer comparison nanoseconds Register. <br /></td></tr>
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<tr class="separator:a05105ef43e087c84f65859774058391c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a22df4dd547a2b366c0ff37fe02ee7681"><td class="memItemLeft" align="right" valign="top"><a id="a22df4dd547a2b366c0ff37fe02ee7681"></a>
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__IO <a class="el" href="unionGMAC__SCL__Type.html">GMAC_SCL_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a22df4dd547a2b366c0ff37fe02ee7681">SCL</a></td></tr>
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<tr class="memdesc:a22df4dd547a2b366c0ff37fe02ee7681"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x0E0 (R/W 32) Tsu timer second comparison Register. <br /></td></tr>
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<tr class="separator:a22df4dd547a2b366c0ff37fe02ee7681"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a94817eaf26561a72be385728289443f8"><td class="memItemLeft" align="right" valign="top"><a id="a94817eaf26561a72be385728289443f8"></a>
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__IO <a class="el" href="unionGMAC__SCH__Type.html">GMAC_SCH_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a94817eaf26561a72be385728289443f8">SCH</a></td></tr>
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<tr class="memdesc:a94817eaf26561a72be385728289443f8"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x0E4 (R/W 32) Tsu timer second comparison Register. <br /></td></tr>
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<tr class="separator:a94817eaf26561a72be385728289443f8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a687972b51ec8af0d26265b227875103e"><td class="memItemLeft" align="right" valign="top"><a id="a687972b51ec8af0d26265b227875103e"></a>
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__I <a class="el" href="unionGMAC__EFTSH__Type.html">GMAC_EFTSH_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a687972b51ec8af0d26265b227875103e">EFTSH</a></td></tr>
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<tr class="memdesc:a687972b51ec8af0d26265b227875103e"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x0E8 (R/ 32) PTP Event Frame Transmitted Seconds High Register. <br /></td></tr>
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<tr class="separator:a687972b51ec8af0d26265b227875103e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af66934dc7a2e47719cfb4db6547893ae"><td class="memItemLeft" align="right" valign="top"><a id="af66934dc7a2e47719cfb4db6547893ae"></a>
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__I <a class="el" href="unionGMAC__EFRSH__Type.html">GMAC_EFRSH_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#af66934dc7a2e47719cfb4db6547893ae">EFRSH</a></td></tr>
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<tr class="memdesc:af66934dc7a2e47719cfb4db6547893ae"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x0EC (R/ 32) PTP Event Frame Received Seconds High Register. <br /></td></tr>
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<tr class="separator:af66934dc7a2e47719cfb4db6547893ae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5a057b1f19ab9ea79e2867a26fb5feb5"><td class="memItemLeft" align="right" valign="top"><a id="a5a057b1f19ab9ea79e2867a26fb5feb5"></a>
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__I <a class="el" href="unionGMAC__PEFTSH__Type.html">GMAC_PEFTSH_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a5a057b1f19ab9ea79e2867a26fb5feb5">PEFTSH</a></td></tr>
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<tr class="memdesc:a5a057b1f19ab9ea79e2867a26fb5feb5"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x0F0 (R/ 32) PTP Peer Event Frame Transmitted Seconds High Register. <br /></td></tr>
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<tr class="separator:a5a057b1f19ab9ea79e2867a26fb5feb5"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a2e078a13f904647a220003c3abc327e0"><td class="memItemLeft" align="right" valign="top"><a id="a2e078a13f904647a220003c3abc327e0"></a>
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__I <a class="el" href="unionGMAC__PEFRSH__Type.html">GMAC_PEFRSH_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a2e078a13f904647a220003c3abc327e0">PEFRSH</a></td></tr>
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|
<tr class="memdesc:a2e078a13f904647a220003c3abc327e0"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x0F4 (R/ 32) PTP Peer Event Frame Received Seconds High Register. <br /></td></tr>
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<tr class="separator:a2e078a13f904647a220003c3abc327e0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a80edc442b7e4d1d8fb6a0b2af654a554"><td class="memItemLeft" align="right" valign="top"><a id="a80edc442b7e4d1d8fb6a0b2af654a554"></a>
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|
<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> </td><td class="memItemRight" valign="bottom"><b>Reserved3</b> [0x8]</td></tr>
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<tr class="separator:a80edc442b7e4d1d8fb6a0b2af654a554"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:af014c3182c217db1bd9539bd0617394f"><td class="memItemLeft" align="right" valign="top"><a id="af014c3182c217db1bd9539bd0617394f"></a>
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__I <a class="el" href="unionGMAC__OTLO__Type.html">GMAC_OTLO_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#af014c3182c217db1bd9539bd0617394f">OTLO</a></td></tr>
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<tr class="memdesc:af014c3182c217db1bd9539bd0617394f"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x100 (R/ 32) Octets Transmitted [31:0] Register. <br /></td></tr>
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<tr class="separator:af014c3182c217db1bd9539bd0617394f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab7f44c75f972558841c6d364bdf6258e"><td class="memItemLeft" align="right" valign="top"><a id="ab7f44c75f972558841c6d364bdf6258e"></a>
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__I <a class="el" href="unionGMAC__OTHI__Type.html">GMAC_OTHI_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#ab7f44c75f972558841c6d364bdf6258e">OTHI</a></td></tr>
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|
<tr class="memdesc:ab7f44c75f972558841c6d364bdf6258e"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x104 (R/ 32) Octets Transmitted [47:32] Register. <br /></td></tr>
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<tr class="separator:ab7f44c75f972558841c6d364bdf6258e"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a1d2dea59c3f709f328a481d5fa7c9fb8"><td class="memItemLeft" align="right" valign="top"><a id="a1d2dea59c3f709f328a481d5fa7c9fb8"></a>
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__I <a class="el" href="unionGMAC__FT__Type.html">GMAC_FT_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a1d2dea59c3f709f328a481d5fa7c9fb8">FT</a></td></tr>
|
|
<tr class="memdesc:a1d2dea59c3f709f328a481d5fa7c9fb8"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x108 (R/ 32) Frames Transmitted Register. <br /></td></tr>
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<tr class="separator:a1d2dea59c3f709f328a481d5fa7c9fb8"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a1180fcd8440afd5a2c5a4156b590770c"><td class="memItemLeft" align="right" valign="top"><a id="a1180fcd8440afd5a2c5a4156b590770c"></a>
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|
__I <a class="el" href="unionGMAC__BCFT__Type.html">GMAC_BCFT_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a1180fcd8440afd5a2c5a4156b590770c">BCFT</a></td></tr>
|
|
<tr class="memdesc:a1180fcd8440afd5a2c5a4156b590770c"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x10C (R/ 32) Broadcast Frames Transmitted Register. <br /></td></tr>
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<tr class="separator:a1180fcd8440afd5a2c5a4156b590770c"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a2a129a797408afef53f5f2711230c606"><td class="memItemLeft" align="right" valign="top"><a id="a2a129a797408afef53f5f2711230c606"></a>
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__I <a class="el" href="unionGMAC__MFT__Type.html">GMAC_MFT_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a2a129a797408afef53f5f2711230c606">MFT</a></td></tr>
|
|
<tr class="memdesc:a2a129a797408afef53f5f2711230c606"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x110 (R/ 32) Multicast Frames Transmitted Register. <br /></td></tr>
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<tr class="separator:a2a129a797408afef53f5f2711230c606"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a30da7f4935c74e255bdd443ce1ea22de"><td class="memItemLeft" align="right" valign="top"><a id="a30da7f4935c74e255bdd443ce1ea22de"></a>
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__I <a class="el" href="unionGMAC__PFT__Type.html">GMAC_PFT_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a30da7f4935c74e255bdd443ce1ea22de">PFT</a></td></tr>
|
|
<tr class="memdesc:a30da7f4935c74e255bdd443ce1ea22de"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x114 (R/ 32) Pause Frames Transmitted Register. <br /></td></tr>
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<tr class="separator:a30da7f4935c74e255bdd443ce1ea22de"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:ad697a484a09d04222d1acb0b273f8025"><td class="memItemLeft" align="right" valign="top"><a id="ad697a484a09d04222d1acb0b273f8025"></a>
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|
__I <a class="el" href="unionGMAC__BFT64__Type.html">GMAC_BFT64_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#ad697a484a09d04222d1acb0b273f8025">BFT64</a></td></tr>
|
|
<tr class="memdesc:ad697a484a09d04222d1acb0b273f8025"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x118 (R/ 32) 64 Byte Frames Transmitted Register. <br /></td></tr>
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<tr class="separator:ad697a484a09d04222d1acb0b273f8025"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4f8378cb62b75d23f939d7a5fb45dd47"><td class="memItemLeft" align="right" valign="top"><a id="a4f8378cb62b75d23f939d7a5fb45dd47"></a>
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|
__I <a class="el" href="unionGMAC__TBFT127__Type.html">GMAC_TBFT127_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a4f8378cb62b75d23f939d7a5fb45dd47">TBFT127</a></td></tr>
|
|
<tr class="memdesc:a4f8378cb62b75d23f939d7a5fb45dd47"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x11C (R/ 32) 65 to 127 Byte Frames Transmitted Register. <br /></td></tr>
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<tr class="separator:a4f8378cb62b75d23f939d7a5fb45dd47"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a24b21da79780b0efab1285e361065949"><td class="memItemLeft" align="right" valign="top"><a id="a24b21da79780b0efab1285e361065949"></a>
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|
__I <a class="el" href="unionGMAC__TBFT255__Type.html">GMAC_TBFT255_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a24b21da79780b0efab1285e361065949">TBFT255</a></td></tr>
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|
<tr class="memdesc:a24b21da79780b0efab1285e361065949"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x120 (R/ 32) 128 to 255 Byte Frames Transmitted Register. <br /></td></tr>
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<tr class="separator:a24b21da79780b0efab1285e361065949"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a5101031281980e8e46f55f0838b5d025"><td class="memItemLeft" align="right" valign="top"><a id="a5101031281980e8e46f55f0838b5d025"></a>
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__I <a class="el" href="unionGMAC__TBFT511__Type.html">GMAC_TBFT511_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a5101031281980e8e46f55f0838b5d025">TBFT511</a></td></tr>
|
|
<tr class="memdesc:a5101031281980e8e46f55f0838b5d025"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x124 (R/ 32) 256 to 511 Byte Frames Transmitted Register. <br /></td></tr>
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<tr class="separator:a5101031281980e8e46f55f0838b5d025"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a313f924e3e1cf95abcc7d7453a5916e1"><td class="memItemLeft" align="right" valign="top"><a id="a313f924e3e1cf95abcc7d7453a5916e1"></a>
|
|
__I <a class="el" href="unionGMAC__TBFT1023__Type.html">GMAC_TBFT1023_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a313f924e3e1cf95abcc7d7453a5916e1">TBFT1023</a></td></tr>
|
|
<tr class="memdesc:a313f924e3e1cf95abcc7d7453a5916e1"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x128 (R/ 32) 512 to 1023 Byte Frames Transmitted Register. <br /></td></tr>
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|
<tr class="separator:a313f924e3e1cf95abcc7d7453a5916e1"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a1c92b993f55bb67d6b3cea2946bd9418"><td class="memItemLeft" align="right" valign="top"><a id="a1c92b993f55bb67d6b3cea2946bd9418"></a>
|
|
__I <a class="el" href="unionGMAC__TBFT1518__Type.html">GMAC_TBFT1518_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a1c92b993f55bb67d6b3cea2946bd9418">TBFT1518</a></td></tr>
|
|
<tr class="memdesc:a1c92b993f55bb67d6b3cea2946bd9418"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x12C (R/ 32) 1024 to 1518 Byte Frames Transmitted Register. <br /></td></tr>
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|
<tr class="separator:a1c92b993f55bb67d6b3cea2946bd9418"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a6463805e3b9f51267e86289b969e273e"><td class="memItemLeft" align="right" valign="top"><a id="a6463805e3b9f51267e86289b969e273e"></a>
|
|
__I <a class="el" href="unionGMAC__GTBFT1518__Type.html">GMAC_GTBFT1518_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a6463805e3b9f51267e86289b969e273e">GTBFT1518</a></td></tr>
|
|
<tr class="memdesc:a6463805e3b9f51267e86289b969e273e"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x130 (R/ 32) Greater Than 1518 Byte Frames Transmitted Register. <br /></td></tr>
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|
<tr class="separator:a6463805e3b9f51267e86289b969e273e"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a752b8aeebbb530e2fa2d5a56fe02d870"><td class="memItemLeft" align="right" valign="top"><a id="a752b8aeebbb530e2fa2d5a56fe02d870"></a>
|
|
__I <a class="el" href="unionGMAC__TUR__Type.html">GMAC_TUR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a752b8aeebbb530e2fa2d5a56fe02d870">TUR</a></td></tr>
|
|
<tr class="memdesc:a752b8aeebbb530e2fa2d5a56fe02d870"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x134 (R/ 32) Transmit Underruns Register. <br /></td></tr>
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|
<tr class="separator:a752b8aeebbb530e2fa2d5a56fe02d870"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ad588ff32871470da23e405e3048b891f"><td class="memItemLeft" align="right" valign="top"><a id="ad588ff32871470da23e405e3048b891f"></a>
|
|
__I <a class="el" href="unionGMAC__SCF__Type.html">GMAC_SCF_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#ad588ff32871470da23e405e3048b891f">SCF</a></td></tr>
|
|
<tr class="memdesc:ad588ff32871470da23e405e3048b891f"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x138 (R/ 32) Single Collision Frames Register. <br /></td></tr>
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|
<tr class="separator:ad588ff32871470da23e405e3048b891f"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a82f49bbba196b7c879e8df4f7bed9a04"><td class="memItemLeft" align="right" valign="top"><a id="a82f49bbba196b7c879e8df4f7bed9a04"></a>
|
|
__I <a class="el" href="unionGMAC__MCF__Type.html">GMAC_MCF_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a82f49bbba196b7c879e8df4f7bed9a04">MCF</a></td></tr>
|
|
<tr class="memdesc:a82f49bbba196b7c879e8df4f7bed9a04"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x13C (R/ 32) Multiple Collision Frames Register. <br /></td></tr>
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|
<tr class="separator:a82f49bbba196b7c879e8df4f7bed9a04"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ad2c15cab7d54aadedd7d14f6937b53b4"><td class="memItemLeft" align="right" valign="top"><a id="ad2c15cab7d54aadedd7d14f6937b53b4"></a>
|
|
__I <a class="el" href="unionGMAC__EC__Type.html">GMAC_EC_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#ad2c15cab7d54aadedd7d14f6937b53b4">EC</a></td></tr>
|
|
<tr class="memdesc:ad2c15cab7d54aadedd7d14f6937b53b4"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x140 (R/ 32) Excessive Collisions Register. <br /></td></tr>
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|
<tr class="separator:ad2c15cab7d54aadedd7d14f6937b53b4"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:abd58dcc8bfcbf7b4355fea78e86fdd7a"><td class="memItemLeft" align="right" valign="top"><a id="abd58dcc8bfcbf7b4355fea78e86fdd7a"></a>
|
|
__I <a class="el" href="unionGMAC__LC__Type.html">GMAC_LC_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#abd58dcc8bfcbf7b4355fea78e86fdd7a">LC</a></td></tr>
|
|
<tr class="memdesc:abd58dcc8bfcbf7b4355fea78e86fdd7a"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x144 (R/ 32) Late Collisions Register. <br /></td></tr>
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|
<tr class="separator:abd58dcc8bfcbf7b4355fea78e86fdd7a"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a866d218943684366fd815f8ab23041bc"><td class="memItemLeft" align="right" valign="top"><a id="a866d218943684366fd815f8ab23041bc"></a>
|
|
__I <a class="el" href="unionGMAC__DTF__Type.html">GMAC_DTF_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a866d218943684366fd815f8ab23041bc">DTF</a></td></tr>
|
|
<tr class="memdesc:a866d218943684366fd815f8ab23041bc"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x148 (R/ 32) Deferred Transmission Frames Register. <br /></td></tr>
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|
<tr class="separator:a866d218943684366fd815f8ab23041bc"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aa88f7691858e954430747f4431ad75bd"><td class="memItemLeft" align="right" valign="top"><a id="aa88f7691858e954430747f4431ad75bd"></a>
|
|
__I <a class="el" href="unionGMAC__CSE__Type.html">GMAC_CSE_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#aa88f7691858e954430747f4431ad75bd">CSE</a></td></tr>
|
|
<tr class="memdesc:aa88f7691858e954430747f4431ad75bd"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x14C (R/ 32) Carrier Sense Errors Register. <br /></td></tr>
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|
<tr class="separator:aa88f7691858e954430747f4431ad75bd"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a35ca6a9e4548e86d9949e7501235a6e0"><td class="memItemLeft" align="right" valign="top"><a id="a35ca6a9e4548e86d9949e7501235a6e0"></a>
|
|
__I <a class="el" href="unionGMAC__ORLO__Type.html">GMAC_ORLO_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a35ca6a9e4548e86d9949e7501235a6e0">ORLO</a></td></tr>
|
|
<tr class="memdesc:a35ca6a9e4548e86d9949e7501235a6e0"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x150 (R/ 32) Octets Received [31:0] Received. <br /></td></tr>
|
|
<tr class="separator:a35ca6a9e4548e86d9949e7501235a6e0"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aaec9cae927af308d58832e327edceff2"><td class="memItemLeft" align="right" valign="top"><a id="aaec9cae927af308d58832e327edceff2"></a>
|
|
__I <a class="el" href="unionGMAC__ORHI__Type.html">GMAC_ORHI_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#aaec9cae927af308d58832e327edceff2">ORHI</a></td></tr>
|
|
<tr class="memdesc:aaec9cae927af308d58832e327edceff2"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x154 (R/ 32) Octets Received [47:32] Received. <br /></td></tr>
|
|
<tr class="separator:aaec9cae927af308d58832e327edceff2"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a9cdc5e0aef0aac216429bd60de6e6af3"><td class="memItemLeft" align="right" valign="top"><a id="a9cdc5e0aef0aac216429bd60de6e6af3"></a>
|
|
__I <a class="el" href="unionGMAC__FR__Type.html">GMAC_FR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a9cdc5e0aef0aac216429bd60de6e6af3">FR</a></td></tr>
|
|
<tr class="memdesc:a9cdc5e0aef0aac216429bd60de6e6af3"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x158 (R/ 32) Frames Received Register. <br /></td></tr>
|
|
<tr class="separator:a9cdc5e0aef0aac216429bd60de6e6af3"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a6956125c005a4aa0e16d42d645093dea"><td class="memItemLeft" align="right" valign="top"><a id="a6956125c005a4aa0e16d42d645093dea"></a>
|
|
__I <a class="el" href="unionGMAC__BCFR__Type.html">GMAC_BCFR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a6956125c005a4aa0e16d42d645093dea">BCFR</a></td></tr>
|
|
<tr class="memdesc:a6956125c005a4aa0e16d42d645093dea"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x15C (R/ 32) Broadcast Frames Received Register. <br /></td></tr>
|
|
<tr class="separator:a6956125c005a4aa0e16d42d645093dea"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a861cd98eb64120f136645080e39de788"><td class="memItemLeft" align="right" valign="top"><a id="a861cd98eb64120f136645080e39de788"></a>
|
|
__I <a class="el" href="unionGMAC__MFR__Type.html">GMAC_MFR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a861cd98eb64120f136645080e39de788">MFR</a></td></tr>
|
|
<tr class="memdesc:a861cd98eb64120f136645080e39de788"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x160 (R/ 32) Multicast Frames Received Register. <br /></td></tr>
|
|
<tr class="separator:a861cd98eb64120f136645080e39de788"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a291b642c085df2092c9be094ebaa555f"><td class="memItemLeft" align="right" valign="top"><a id="a291b642c085df2092c9be094ebaa555f"></a>
|
|
__I <a class="el" href="unionGMAC__PFR__Type.html">GMAC_PFR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a291b642c085df2092c9be094ebaa555f">PFR</a></td></tr>
|
|
<tr class="memdesc:a291b642c085df2092c9be094ebaa555f"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x164 (R/ 32) Pause Frames Received Register. <br /></td></tr>
|
|
<tr class="separator:a291b642c085df2092c9be094ebaa555f"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aa1f7d5abb5d42b95af574f616c6e48a9"><td class="memItemLeft" align="right" valign="top"><a id="aa1f7d5abb5d42b95af574f616c6e48a9"></a>
|
|
__I <a class="el" href="unionGMAC__BFR64__Type.html">GMAC_BFR64_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#aa1f7d5abb5d42b95af574f616c6e48a9">BFR64</a></td></tr>
|
|
<tr class="memdesc:aa1f7d5abb5d42b95af574f616c6e48a9"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x168 (R/ 32) 64 Byte Frames Received Register. <br /></td></tr>
|
|
<tr class="separator:aa1f7d5abb5d42b95af574f616c6e48a9"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a2f62e37b12dad16ca9aad1aaa465697c"><td class="memItemLeft" align="right" valign="top"><a id="a2f62e37b12dad16ca9aad1aaa465697c"></a>
|
|
__I <a class="el" href="unionGMAC__TBFR127__Type.html">GMAC_TBFR127_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a2f62e37b12dad16ca9aad1aaa465697c">TBFR127</a></td></tr>
|
|
<tr class="memdesc:a2f62e37b12dad16ca9aad1aaa465697c"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x16C (R/ 32) 65 to 127 Byte Frames Received Register. <br /></td></tr>
|
|
<tr class="separator:a2f62e37b12dad16ca9aad1aaa465697c"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a908c89ec29c797b677b49e6fea3b89cc"><td class="memItemLeft" align="right" valign="top"><a id="a908c89ec29c797b677b49e6fea3b89cc"></a>
|
|
__I <a class="el" href="unionGMAC__TBFR255__Type.html">GMAC_TBFR255_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a908c89ec29c797b677b49e6fea3b89cc">TBFR255</a></td></tr>
|
|
<tr class="memdesc:a908c89ec29c797b677b49e6fea3b89cc"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x170 (R/ 32) 128 to 255 Byte Frames Received Register. <br /></td></tr>
|
|
<tr class="separator:a908c89ec29c797b677b49e6fea3b89cc"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a0ddbca2a88926b72eef5e606d530f6f9"><td class="memItemLeft" align="right" valign="top"><a id="a0ddbca2a88926b72eef5e606d530f6f9"></a>
|
|
__I <a class="el" href="unionGMAC__TBFR511__Type.html">GMAC_TBFR511_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a0ddbca2a88926b72eef5e606d530f6f9">TBFR511</a></td></tr>
|
|
<tr class="memdesc:a0ddbca2a88926b72eef5e606d530f6f9"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x174 (R/ 32) 256 to 511Byte Frames Received Register. <br /></td></tr>
|
|
<tr class="separator:a0ddbca2a88926b72eef5e606d530f6f9"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a44019a34159cb95d8044556da857715f"><td class="memItemLeft" align="right" valign="top"><a id="a44019a34159cb95d8044556da857715f"></a>
|
|
__I <a class="el" href="unionGMAC__TBFR1023__Type.html">GMAC_TBFR1023_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a44019a34159cb95d8044556da857715f">TBFR1023</a></td></tr>
|
|
<tr class="memdesc:a44019a34159cb95d8044556da857715f"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x178 (R/ 32) 512 to 1023 Byte Frames Received Register. <br /></td></tr>
|
|
<tr class="separator:a44019a34159cb95d8044556da857715f"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:af596746b01e1457178ee00faee6762cb"><td class="memItemLeft" align="right" valign="top"><a id="af596746b01e1457178ee00faee6762cb"></a>
|
|
__I <a class="el" href="unionGMAC__TBFR1518__Type.html">GMAC_TBFR1518_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#af596746b01e1457178ee00faee6762cb">TBFR1518</a></td></tr>
|
|
<tr class="memdesc:af596746b01e1457178ee00faee6762cb"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x17C (R/ 32) 1024 to 1518 Byte Frames Received Register. <br /></td></tr>
|
|
<tr class="separator:af596746b01e1457178ee00faee6762cb"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a7c864f17add62e091a5f2ad94f04e00d"><td class="memItemLeft" align="right" valign="top"><a id="a7c864f17add62e091a5f2ad94f04e00d"></a>
|
|
__I <a class="el" href="unionGMAC__TMXBFR__Type.html">GMAC_TMXBFR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a7c864f17add62e091a5f2ad94f04e00d">TMXBFR</a></td></tr>
|
|
<tr class="memdesc:a7c864f17add62e091a5f2ad94f04e00d"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x180 (R/ 32) 1519 to Maximum Byte Frames Received Register. <br /></td></tr>
|
|
<tr class="separator:a7c864f17add62e091a5f2ad94f04e00d"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:af2eb16658fb7042c5d59273b20dbf55b"><td class="memItemLeft" align="right" valign="top"><a id="af2eb16658fb7042c5d59273b20dbf55b"></a>
|
|
__I <a class="el" href="unionGMAC__UFR__Type.html">GMAC_UFR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#af2eb16658fb7042c5d59273b20dbf55b">UFR</a></td></tr>
|
|
<tr class="memdesc:af2eb16658fb7042c5d59273b20dbf55b"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x184 (R/ 32) Undersize Frames Received Register. <br /></td></tr>
|
|
<tr class="separator:af2eb16658fb7042c5d59273b20dbf55b"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a18e2f713ddaa6a7ea3d7f6e27050df60"><td class="memItemLeft" align="right" valign="top"><a id="a18e2f713ddaa6a7ea3d7f6e27050df60"></a>
|
|
__I <a class="el" href="unionGMAC__OFR__Type.html">GMAC_OFR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a18e2f713ddaa6a7ea3d7f6e27050df60">OFR</a></td></tr>
|
|
<tr class="memdesc:a18e2f713ddaa6a7ea3d7f6e27050df60"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x188 (R/ 32) Oversize Frames Received Register. <br /></td></tr>
|
|
<tr class="separator:a18e2f713ddaa6a7ea3d7f6e27050df60"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a768177c94dfd5d48ae6a35cecf3c7dcb"><td class="memItemLeft" align="right" valign="top"><a id="a768177c94dfd5d48ae6a35cecf3c7dcb"></a>
|
|
__I <a class="el" href="unionGMAC__JR__Type.html">GMAC_JR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a768177c94dfd5d48ae6a35cecf3c7dcb">JR</a></td></tr>
|
|
<tr class="memdesc:a768177c94dfd5d48ae6a35cecf3c7dcb"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x18C (R/ 32) Jabbers Received Register. <br /></td></tr>
|
|
<tr class="separator:a768177c94dfd5d48ae6a35cecf3c7dcb"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a29d276779e1bb18e91f5cc6efb5b6b8b"><td class="memItemLeft" align="right" valign="top"><a id="a29d276779e1bb18e91f5cc6efb5b6b8b"></a>
|
|
__I <a class="el" href="unionGMAC__FCSE__Type.html">GMAC_FCSE_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a29d276779e1bb18e91f5cc6efb5b6b8b">FCSE</a></td></tr>
|
|
<tr class="memdesc:a29d276779e1bb18e91f5cc6efb5b6b8b"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x190 (R/ 32) Frame Check Sequence Errors Register. <br /></td></tr>
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<tr class="separator:a29d276779e1bb18e91f5cc6efb5b6b8b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a109022aaee9364c2d405b0ee5f579f8d"><td class="memItemLeft" align="right" valign="top"><a id="a109022aaee9364c2d405b0ee5f579f8d"></a>
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__I <a class="el" href="unionGMAC__LFFE__Type.html">GMAC_LFFE_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a109022aaee9364c2d405b0ee5f579f8d">LFFE</a></td></tr>
|
|
<tr class="memdesc:a109022aaee9364c2d405b0ee5f579f8d"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x194 (R/ 32) Length Field Frame Errors Register. <br /></td></tr>
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<tr class="separator:a109022aaee9364c2d405b0ee5f579f8d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7a836d3b61716ba8ed6572093d9e1e9b"><td class="memItemLeft" align="right" valign="top"><a id="a7a836d3b61716ba8ed6572093d9e1e9b"></a>
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__I <a class="el" href="unionGMAC__RSE__Type.html">GMAC_RSE_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a7a836d3b61716ba8ed6572093d9e1e9b">RSE</a></td></tr>
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|
<tr class="memdesc:a7a836d3b61716ba8ed6572093d9e1e9b"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x198 (R/ 32) Receive Symbol Errors Register. <br /></td></tr>
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<tr class="separator:a7a836d3b61716ba8ed6572093d9e1e9b"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a275d8086504551f36241ab1c688f02d3"><td class="memItemLeft" align="right" valign="top"><a id="a275d8086504551f36241ab1c688f02d3"></a>
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|
__I <a class="el" href="unionGMAC__AE__Type.html">GMAC_AE_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a275d8086504551f36241ab1c688f02d3">AE</a></td></tr>
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<tr class="memdesc:a275d8086504551f36241ab1c688f02d3"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x19C (R/ 32) Alignment Errors Register. <br /></td></tr>
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<tr class="separator:a275d8086504551f36241ab1c688f02d3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abebc51a427ef753305acc5a016d40e2f"><td class="memItemLeft" align="right" valign="top"><a id="abebc51a427ef753305acc5a016d40e2f"></a>
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|
__I <a class="el" href="unionGMAC__RRE__Type.html">GMAC_RRE_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#abebc51a427ef753305acc5a016d40e2f">RRE</a></td></tr>
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|
<tr class="memdesc:abebc51a427ef753305acc5a016d40e2f"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x1A0 (R/ 32) Receive Resource Errors Register. <br /></td></tr>
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<tr class="separator:abebc51a427ef753305acc5a016d40e2f"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:ae61c51d02c7376d835be1edc2e155a06"><td class="memItemLeft" align="right" valign="top"><a id="ae61c51d02c7376d835be1edc2e155a06"></a>
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|
__I <a class="el" href="unionGMAC__ROE__Type.html">GMAC_ROE_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#ae61c51d02c7376d835be1edc2e155a06">ROE</a></td></tr>
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|
<tr class="memdesc:ae61c51d02c7376d835be1edc2e155a06"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x1A4 (R/ 32) Receive Overrun Register. <br /></td></tr>
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<tr class="separator:ae61c51d02c7376d835be1edc2e155a06"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a787b462374a1f82f6c99a74fc104bd55"><td class="memItemLeft" align="right" valign="top"><a id="a787b462374a1f82f6c99a74fc104bd55"></a>
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|
__I <a class="el" href="unionGMAC__IHCE__Type.html">GMAC_IHCE_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a787b462374a1f82f6c99a74fc104bd55">IHCE</a></td></tr>
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|
<tr class="memdesc:a787b462374a1f82f6c99a74fc104bd55"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x1A8 (R/ 32) IP Header Checksum Errors Register. <br /></td></tr>
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<tr class="separator:a787b462374a1f82f6c99a74fc104bd55"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a0c1b8f044512eda999302204c312840f"><td class="memItemLeft" align="right" valign="top"><a id="a0c1b8f044512eda999302204c312840f"></a>
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|
__I <a class="el" href="unionGMAC__TCE__Type.html">GMAC_TCE_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a0c1b8f044512eda999302204c312840f">TCE</a></td></tr>
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|
<tr class="memdesc:a0c1b8f044512eda999302204c312840f"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x1AC (R/ 32) TCP Checksum Errors Register. <br /></td></tr>
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<tr class="separator:a0c1b8f044512eda999302204c312840f"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a326a2fd63dc19a8546b3a582d69e4eaf"><td class="memItemLeft" align="right" valign="top"><a id="a326a2fd63dc19a8546b3a582d69e4eaf"></a>
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|
__I <a class="el" href="unionGMAC__UCE__Type.html">GMAC_UCE_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a326a2fd63dc19a8546b3a582d69e4eaf">UCE</a></td></tr>
|
|
<tr class="memdesc:a326a2fd63dc19a8546b3a582d69e4eaf"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x1B0 (R/ 32) UDP Checksum Errors Register. <br /></td></tr>
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<tr class="separator:a326a2fd63dc19a8546b3a582d69e4eaf"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:af86033e6b66a2c090c8ba76c54227e7c"><td class="memItemLeft" align="right" valign="top"><a id="af86033e6b66a2c090c8ba76c54227e7c"></a>
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|
<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> </td><td class="memItemRight" valign="bottom"><b>Reserved4</b> [0x8]</td></tr>
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|
<tr class="separator:af86033e6b66a2c090c8ba76c54227e7c"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a275b4c8f328be1d34edd10ec364603b8"><td class="memItemLeft" align="right" valign="top"><a id="a275b4c8f328be1d34edd10ec364603b8"></a>
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|
__IO <a class="el" href="unionGMAC__TISUBN__Type.html">GMAC_TISUBN_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a275b4c8f328be1d34edd10ec364603b8">TISUBN</a></td></tr>
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|
<tr class="memdesc:a275b4c8f328be1d34edd10ec364603b8"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x1BC (R/W 32) 1588 Timer Increment [15:0] Sub-Nanoseconds Register. <br /></td></tr>
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<tr class="separator:a275b4c8f328be1d34edd10ec364603b8"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a7d64d31f0a3f78a46ceeb79b8a646990"><td class="memItemLeft" align="right" valign="top"><a id="a7d64d31f0a3f78a46ceeb79b8a646990"></a>
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__IO <a class="el" href="unionGMAC__TSH__Type.html">GMAC_TSH_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a7d64d31f0a3f78a46ceeb79b8a646990">TSH</a></td></tr>
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|
<tr class="memdesc:a7d64d31f0a3f78a46ceeb79b8a646990"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x1C0 (R/W 32) 1588 Timer Seconds High [15:0] Register. <br /></td></tr>
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<tr class="separator:a7d64d31f0a3f78a46ceeb79b8a646990"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:acc442c6983d402b86be2c48c925b7ca5"><td class="memItemLeft" align="right" valign="top"><a id="acc442c6983d402b86be2c48c925b7ca5"></a>
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|
<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> </td><td class="memItemRight" valign="bottom"><b>Reserved5</b> [0x4]</td></tr>
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<tr class="separator:acc442c6983d402b86be2c48c925b7ca5"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a5a1151c031920fae1a0b72383423942b"><td class="memItemLeft" align="right" valign="top"><a id="a5a1151c031920fae1a0b72383423942b"></a>
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|
__IO <a class="el" href="unionGMAC__TSSSL__Type.html">GMAC_TSSSL_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a5a1151c031920fae1a0b72383423942b">TSSSL</a></td></tr>
|
|
<tr class="memdesc:a5a1151c031920fae1a0b72383423942b"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x1C8 (R/W 32) 1588 Timer Sync Strobe Seconds [31:0] Register. <br /></td></tr>
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<tr class="separator:a5a1151c031920fae1a0b72383423942b"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:acc9a5a36640bce61904b96072136817e"><td class="memItemLeft" align="right" valign="top"><a id="acc9a5a36640bce61904b96072136817e"></a>
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|
__IO <a class="el" href="unionGMAC__TSSN__Type.html">GMAC_TSSN_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#acc9a5a36640bce61904b96072136817e">TSSN</a></td></tr>
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|
<tr class="memdesc:acc9a5a36640bce61904b96072136817e"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x1CC (R/W 32) 1588 Timer Sync Strobe Nanoseconds Register. <br /></td></tr>
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<tr class="separator:acc9a5a36640bce61904b96072136817e"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a73906d261f0f979a8c3eb0b30296af1a"><td class="memItemLeft" align="right" valign="top"><a id="a73906d261f0f979a8c3eb0b30296af1a"></a>
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|
__IO <a class="el" href="unionGMAC__TSL__Type.html">GMAC_TSL_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a73906d261f0f979a8c3eb0b30296af1a">TSL</a></td></tr>
|
|
<tr class="memdesc:a73906d261f0f979a8c3eb0b30296af1a"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x1D0 (R/W 32) 1588 Timer Seconds [31:0] Register. <br /></td></tr>
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<tr class="separator:a73906d261f0f979a8c3eb0b30296af1a"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a0b675d5f479b217274ee387e09bd45a9"><td class="memItemLeft" align="right" valign="top"><a id="a0b675d5f479b217274ee387e09bd45a9"></a>
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|
__IO <a class="el" href="unionGMAC__TN__Type.html">GMAC_TN_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a0b675d5f479b217274ee387e09bd45a9">TN</a></td></tr>
|
|
<tr class="memdesc:a0b675d5f479b217274ee387e09bd45a9"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x1D4 (R/W 32) 1588 Timer Nanoseconds Register. <br /></td></tr>
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|
<tr class="separator:a0b675d5f479b217274ee387e09bd45a9"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a06e14a015fbb29c4a5e2a322b0b1899b"><td class="memItemLeft" align="right" valign="top"><a id="a06e14a015fbb29c4a5e2a322b0b1899b"></a>
|
|
__O <a class="el" href="unionGMAC__TA__Type.html">GMAC_TA_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a06e14a015fbb29c4a5e2a322b0b1899b">TA</a></td></tr>
|
|
<tr class="memdesc:a06e14a015fbb29c4a5e2a322b0b1899b"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x1D8 ( /W 32) 1588 Timer Adjust Register. <br /></td></tr>
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<tr class="separator:a06e14a015fbb29c4a5e2a322b0b1899b"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a247c3cc572e5ad9d06cab1f9cb675861"><td class="memItemLeft" align="right" valign="top"><a id="a247c3cc572e5ad9d06cab1f9cb675861"></a>
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|
__IO <a class="el" href="unionGMAC__TI__Type.html">GMAC_TI_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a247c3cc572e5ad9d06cab1f9cb675861">TI</a></td></tr>
|
|
<tr class="memdesc:a247c3cc572e5ad9d06cab1f9cb675861"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x1DC (R/W 32) 1588 Timer Increment Register. <br /></td></tr>
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<tr class="separator:a247c3cc572e5ad9d06cab1f9cb675861"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a4f78b53d837b4bbfcc2639418b387403"><td class="memItemLeft" align="right" valign="top"><a id="a4f78b53d837b4bbfcc2639418b387403"></a>
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|
__I <a class="el" href="unionGMAC__EFTSL__Type.html">GMAC_EFTSL_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a4f78b53d837b4bbfcc2639418b387403">EFTSL</a></td></tr>
|
|
<tr class="memdesc:a4f78b53d837b4bbfcc2639418b387403"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x1E0 (R/ 32) PTP Event Frame Transmitted Seconds Low Register. <br /></td></tr>
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|
<tr class="separator:a4f78b53d837b4bbfcc2639418b387403"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:ad1c708a71d222dd0ae2c69c59e0ba6a3"><td class="memItemLeft" align="right" valign="top"><a id="ad1c708a71d222dd0ae2c69c59e0ba6a3"></a>
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|
__I <a class="el" href="unionGMAC__EFTN__Type.html">GMAC_EFTN_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#ad1c708a71d222dd0ae2c69c59e0ba6a3">EFTN</a></td></tr>
|
|
<tr class="memdesc:ad1c708a71d222dd0ae2c69c59e0ba6a3"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x1E4 (R/ 32) PTP Event Frame Transmitted Nanoseconds. <br /></td></tr>
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|
<tr class="separator:ad1c708a71d222dd0ae2c69c59e0ba6a3"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a43f0edd5612a2401c33da9b913a4af5d"><td class="memItemLeft" align="right" valign="top"><a id="a43f0edd5612a2401c33da9b913a4af5d"></a>
|
|
__I <a class="el" href="unionGMAC__EFRSL__Type.html">GMAC_EFRSL_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a43f0edd5612a2401c33da9b913a4af5d">EFRSL</a></td></tr>
|
|
<tr class="memdesc:a43f0edd5612a2401c33da9b913a4af5d"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x1E8 (R/ 32) PTP Event Frame Received Seconds Low Register. <br /></td></tr>
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<tr class="separator:a43f0edd5612a2401c33da9b913a4af5d"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a4a79b4b01e3314ebeb75326144a5ae5a"><td class="memItemLeft" align="right" valign="top"><a id="a4a79b4b01e3314ebeb75326144a5ae5a"></a>
|
|
__I <a class="el" href="unionGMAC__EFRN__Type.html">GMAC_EFRN_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a4a79b4b01e3314ebeb75326144a5ae5a">EFRN</a></td></tr>
|
|
<tr class="memdesc:a4a79b4b01e3314ebeb75326144a5ae5a"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x1EC (R/ 32) PTP Event Frame Received Nanoseconds. <br /></td></tr>
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<tr class="separator:a4a79b4b01e3314ebeb75326144a5ae5a"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:ac97f2085756425d31c1bfe9fecbcf72c"><td class="memItemLeft" align="right" valign="top"><a id="ac97f2085756425d31c1bfe9fecbcf72c"></a>
|
|
__I <a class="el" href="unionGMAC__PEFTSL__Type.html">GMAC_PEFTSL_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#ac97f2085756425d31c1bfe9fecbcf72c">PEFTSL</a></td></tr>
|
|
<tr class="memdesc:ac97f2085756425d31c1bfe9fecbcf72c"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x1F0 (R/ 32) PTP Peer Event Frame Transmitted Seconds Low Register. <br /></td></tr>
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<tr class="separator:ac97f2085756425d31c1bfe9fecbcf72c"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a071f8e0cbe6113de040d182e7442c3b0"><td class="memItemLeft" align="right" valign="top"><a id="a071f8e0cbe6113de040d182e7442c3b0"></a>
|
|
__I <a class="el" href="unionGMAC__PEFTN__Type.html">GMAC_PEFTN_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a071f8e0cbe6113de040d182e7442c3b0">PEFTN</a></td></tr>
|
|
<tr class="memdesc:a071f8e0cbe6113de040d182e7442c3b0"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x1F4 (R/ 32) PTP Peer Event Frame Transmitted Nanoseconds. <br /></td></tr>
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|
<tr class="separator:a071f8e0cbe6113de040d182e7442c3b0"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a22afe9e1d23c790afee943d69e4e13a6"><td class="memItemLeft" align="right" valign="top"><a id="a22afe9e1d23c790afee943d69e4e13a6"></a>
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|
__I <a class="el" href="unionGMAC__PEFRSL__Type.html">GMAC_PEFRSL_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a22afe9e1d23c790afee943d69e4e13a6">PEFRSL</a></td></tr>
|
|
<tr class="memdesc:a22afe9e1d23c790afee943d69e4e13a6"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x1F8 (R/ 32) PTP Peer Event Frame Received Seconds Low Register. <br /></td></tr>
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<tr class="separator:a22afe9e1d23c790afee943d69e4e13a6"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ac8bc5ea304feacd380ccd10af6a504e5"><td class="memItemLeft" align="right" valign="top"><a id="ac8bc5ea304feacd380ccd10af6a504e5"></a>
|
|
__I <a class="el" href="unionGMAC__PEFRN__Type.html">GMAC_PEFRN_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#ac8bc5ea304feacd380ccd10af6a504e5">PEFRN</a></td></tr>
|
|
<tr class="memdesc:ac8bc5ea304feacd380ccd10af6a504e5"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x1FC (R/ 32) PTP Peer Event Frame Received Nanoseconds. <br /></td></tr>
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<tr class="separator:ac8bc5ea304feacd380ccd10af6a504e5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac23cab2a60f1d4bb135eccb37564bf3d"><td class="memItemLeft" align="right" valign="top"><a id="ac23cab2a60f1d4bb135eccb37564bf3d"></a>
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<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> </td><td class="memItemRight" valign="bottom"><b>Reserved6</b> [0x70]</td></tr>
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<tr class="separator:ac23cab2a60f1d4bb135eccb37564bf3d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9a830e115247c985f9871426b3d04b32"><td class="memItemLeft" align="right" valign="top"><a id="a9a830e115247c985f9871426b3d04b32"></a>
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__I <a class="el" href="unionGMAC__RLPITR__Type.html">GMAC_RLPITR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a9a830e115247c985f9871426b3d04b32">RLPITR</a></td></tr>
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<tr class="memdesc:a9a830e115247c985f9871426b3d04b32"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x270 (R/ 32) Receive LPI transition Register. <br /></td></tr>
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<tr class="separator:a9a830e115247c985f9871426b3d04b32"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afbb0bf2fb54b8396519ffa083b3afa88"><td class="memItemLeft" align="right" valign="top"><a id="afbb0bf2fb54b8396519ffa083b3afa88"></a>
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__I <a class="el" href="unionGMAC__RLPITI__Type.html">GMAC_RLPITI_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#afbb0bf2fb54b8396519ffa083b3afa88">RLPITI</a></td></tr>
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<tr class="memdesc:afbb0bf2fb54b8396519ffa083b3afa88"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x274 (R/ 32) Receive LPI Time Register. <br /></td></tr>
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<tr class="separator:afbb0bf2fb54b8396519ffa083b3afa88"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a67b2f757371ba4b2ff2a058e79032ef2"><td class="memItemLeft" align="right" valign="top"><a id="a67b2f757371ba4b2ff2a058e79032ef2"></a>
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__I <a class="el" href="unionGMAC__TLPITR__Type.html">GMAC_TLPITR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#a67b2f757371ba4b2ff2a058e79032ef2">TLPITR</a></td></tr>
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<tr class="memdesc:a67b2f757371ba4b2ff2a058e79032ef2"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x278 (R/ 32) Receive LPI transition Register. <br /></td></tr>
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<tr class="separator:a67b2f757371ba4b2ff2a058e79032ef2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aed2e506920c4ca4d70fbc6c2495b8d4f"><td class="memItemLeft" align="right" valign="top"><a id="aed2e506920c4ca4d70fbc6c2495b8d4f"></a>
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__I <a class="el" href="unionGMAC__TLPITI__Type.html">GMAC_TLPITI_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structGmac.html#aed2e506920c4ca4d70fbc6c2495b8d4f">TLPITI</a></td></tr>
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<tr class="memdesc:aed2e506920c4ca4d70fbc6c2495b8d4f"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x27C (R/ 32) Receive LPI Time Register. <br /></td></tr>
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<tr class="separator:aed2e506920c4ca4d70fbc6c2495b8d4f"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<div class="textblock"><p>GMAC hardware registers. </p>
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<p class="definition">Definition at line <a class="el" href="component_2gmac_8h_source.html#l02480">2480</a> of file <a class="el" href="component_2gmac_8h_source.html">gmac.h</a>.</p>
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</div><hr/>The documentation for this struct was generated from the following file:<ul>
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<li>/storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/<a class="el" href="component_2gmac_8h_source.html">gmac.h</a></li>
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</ul>
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