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<p>Component description for MCLK.
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Data Structures</h2></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionMCLK__INTENCLR__Type.html">MCLK_INTENCLR_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionMCLK__INTENSET__Type.html">MCLK_INTENSET_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionMCLK__INTFLAG__Type.html">MCLK_INTFLAG_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionMCLK__HSDIV__Type.html">MCLK_HSDIV_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionMCLK__CPUDIV__Type.html">MCLK_CPUDIV_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionMCLK__AHBMASK__Type.html">MCLK_AHBMASK_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionMCLK__APBAMASK__Type.html">MCLK_APBAMASK_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionMCLK__APBBMASK__Type.html">MCLK_APBBMASK_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionMCLK__APBCMASK__Type.html">MCLK_APBCMASK_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionMCLK__APBDMASK__Type.html">MCLK_APBDMASK_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="structMclk.html">Mclk</a></td></tr>
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<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">MCLK hardware registers. <a href="structMclk.html#details">More...</a><br /></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:a15a87a8e8ae3d9f4c601afe2e6c315f1"><td class="memItemLeft" align="right" valign="top"><a id="a15a87a8e8ae3d9f4c601afe2e6c315f1"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_U2408</b></td></tr>
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<tr class="separator:a15a87a8e8ae3d9f4c601afe2e6c315f1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a33a5fe449cc0952da1f6a4c4479bdb61"><td class="memItemLeft" align="right" valign="top"><a id="a33a5fe449cc0952da1f6a4c4479bdb61"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>REV_MCLK</b>   0x100</td></tr>
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<tr class="separator:a33a5fe449cc0952da1f6a4c4479bdb61"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a68637b3f1fed0ccd3ae371c53992e406"><td class="memItemLeft" align="right" valign="top"><a id="a68637b3f1fed0ccd3ae371c53992e406"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a68637b3f1fed0ccd3ae371c53992e406">MCLK_INTENCLR_OFFSET</a>   0x01</td></tr>
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<tr class="memdesc:a68637b3f1fed0ccd3ae371c53992e406"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_INTENCLR offset) Interrupt Enable Clear <br /></td></tr>
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<tr class="separator:a68637b3f1fed0ccd3ae371c53992e406"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad173bb9dba9e1522a644dbde879829d4"><td class="memItemLeft" align="right" valign="top"><a id="ad173bb9dba9e1522a644dbde879829d4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ad173bb9dba9e1522a644dbde879829d4">MCLK_INTENCLR_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
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<tr class="memdesc:ad173bb9dba9e1522a644dbde879829d4"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_INTENCLR reset_value) Interrupt Enable Clear <br /></td></tr>
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<tr class="separator:ad173bb9dba9e1522a644dbde879829d4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aebdcc599e953e54697b2e40b5397496b"><td class="memItemLeft" align="right" valign="top"><a id="aebdcc599e953e54697b2e40b5397496b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#aebdcc599e953e54697b2e40b5397496b">MCLK_INTENCLR_CKRDY_Pos</a>   0</td></tr>
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<tr class="memdesc:aebdcc599e953e54697b2e40b5397496b"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_INTENCLR) Clock Ready Interrupt Enable <br /></td></tr>
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<tr class="separator:aebdcc599e953e54697b2e40b5397496b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a949276193ac8d97d0202ec75f9e84e8f"><td class="memItemLeft" align="right" valign="top"><a id="a949276193ac8d97d0202ec75f9e84e8f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_INTENCLR_CKRDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#aebdcc599e953e54697b2e40b5397496b">MCLK_INTENCLR_CKRDY_Pos</a>)</td></tr>
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<tr class="separator:a949276193ac8d97d0202ec75f9e84e8f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6389053110a48b3e28a1856e9379af38"><td class="memItemLeft" align="right" valign="top"><a id="a6389053110a48b3e28a1856e9379af38"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a6389053110a48b3e28a1856e9379af38">MCLK_INTENCLR_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x01)</td></tr>
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<tr class="memdesc:a6389053110a48b3e28a1856e9379af38"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_INTENCLR) MASK Register <br /></td></tr>
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<tr class="separator:a6389053110a48b3e28a1856e9379af38"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab0258927c23f68d0f403a91f68fdc1a8"><td class="memItemLeft" align="right" valign="top"><a id="ab0258927c23f68d0f403a91f68fdc1a8"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ab0258927c23f68d0f403a91f68fdc1a8">MCLK_INTENSET_OFFSET</a>   0x02</td></tr>
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<tr class="memdesc:ab0258927c23f68d0f403a91f68fdc1a8"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_INTENSET offset) Interrupt Enable Set <br /></td></tr>
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<tr class="separator:ab0258927c23f68d0f403a91f68fdc1a8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1a1d204e6b63e6fb14793fad6be480b3"><td class="memItemLeft" align="right" valign="top"><a id="a1a1d204e6b63e6fb14793fad6be480b3"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a1a1d204e6b63e6fb14793fad6be480b3">MCLK_INTENSET_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
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<tr class="memdesc:a1a1d204e6b63e6fb14793fad6be480b3"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_INTENSET reset_value) Interrupt Enable Set <br /></td></tr>
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<tr class="separator:a1a1d204e6b63e6fb14793fad6be480b3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab9fefb6acd254d502c9ea81d010831ff"><td class="memItemLeft" align="right" valign="top"><a id="ab9fefb6acd254d502c9ea81d010831ff"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ab9fefb6acd254d502c9ea81d010831ff">MCLK_INTENSET_CKRDY_Pos</a>   0</td></tr>
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<tr class="memdesc:ab9fefb6acd254d502c9ea81d010831ff"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_INTENSET) Clock Ready Interrupt Enable <br /></td></tr>
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<tr class="separator:ab9fefb6acd254d502c9ea81d010831ff"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a23e45552d797bdc0fea7ff5e8e7ffab0"><td class="memItemLeft" align="right" valign="top"><a id="a23e45552d797bdc0fea7ff5e8e7ffab0"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_INTENSET_CKRDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#ab9fefb6acd254d502c9ea81d010831ff">MCLK_INTENSET_CKRDY_Pos</a>)</td></tr>
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<tr class="separator:a23e45552d797bdc0fea7ff5e8e7ffab0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa5b62ad35b9bc2c164fea2457115e2b8"><td class="memItemLeft" align="right" valign="top"><a id="aa5b62ad35b9bc2c164fea2457115e2b8"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#aa5b62ad35b9bc2c164fea2457115e2b8">MCLK_INTENSET_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x01)</td></tr>
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<tr class="memdesc:aa5b62ad35b9bc2c164fea2457115e2b8"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_INTENSET) MASK Register <br /></td></tr>
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<tr class="separator:aa5b62ad35b9bc2c164fea2457115e2b8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af56eeb6ada43fe94d261d6d04336635b"><td class="memItemLeft" align="right" valign="top"><a id="af56eeb6ada43fe94d261d6d04336635b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#af56eeb6ada43fe94d261d6d04336635b">MCLK_INTFLAG_OFFSET</a>   0x03</td></tr>
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<tr class="memdesc:af56eeb6ada43fe94d261d6d04336635b"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_INTFLAG offset) Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="separator:af56eeb6ada43fe94d261d6d04336635b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8e5308a9ba8280b0e4f121e9d65a36a4"><td class="memItemLeft" align="right" valign="top"><a id="a8e5308a9ba8280b0e4f121e9d65a36a4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a8e5308a9ba8280b0e4f121e9d65a36a4">MCLK_INTFLAG_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x01)</td></tr>
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<tr class="memdesc:a8e5308a9ba8280b0e4f121e9d65a36a4"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_INTFLAG reset_value) Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="separator:a8e5308a9ba8280b0e4f121e9d65a36a4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abef328de34a9da476fa9a626643999e5"><td class="memItemLeft" align="right" valign="top"><a id="abef328de34a9da476fa9a626643999e5"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#abef328de34a9da476fa9a626643999e5">MCLK_INTFLAG_CKRDY_Pos</a>   0</td></tr>
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<tr class="memdesc:abef328de34a9da476fa9a626643999e5"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_INTFLAG) Clock Ready <br /></td></tr>
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<tr class="separator:abef328de34a9da476fa9a626643999e5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4d627a8eb324eb7142abf6c035aef208"><td class="memItemLeft" align="right" valign="top"><a id="a4d627a8eb324eb7142abf6c035aef208"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_INTFLAG_CKRDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#abef328de34a9da476fa9a626643999e5">MCLK_INTFLAG_CKRDY_Pos</a>)</td></tr>
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<tr class="separator:a4d627a8eb324eb7142abf6c035aef208"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4d2f239e68ff5fba4b25397d91bed74a"><td class="memItemLeft" align="right" valign="top"><a id="a4d2f239e68ff5fba4b25397d91bed74a"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a4d2f239e68ff5fba4b25397d91bed74a">MCLK_INTFLAG_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x01)</td></tr>
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<tr class="memdesc:a4d2f239e68ff5fba4b25397d91bed74a"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_INTFLAG) MASK Register <br /></td></tr>
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<tr class="separator:a4d2f239e68ff5fba4b25397d91bed74a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae0971c09918d1056399fd86900aa4890"><td class="memItemLeft" align="right" valign="top"><a id="ae0971c09918d1056399fd86900aa4890"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ae0971c09918d1056399fd86900aa4890">MCLK_HSDIV_OFFSET</a>   0x04</td></tr>
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<tr class="memdesc:ae0971c09918d1056399fd86900aa4890"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_HSDIV offset) HS Clock Division <br /></td></tr>
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<tr class="separator:ae0971c09918d1056399fd86900aa4890"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae6d3e536fec3cc26aaa6cd78c17d497b"><td class="memItemLeft" align="right" valign="top"><a id="ae6d3e536fec3cc26aaa6cd78c17d497b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ae6d3e536fec3cc26aaa6cd78c17d497b">MCLK_HSDIV_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x01)</td></tr>
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<tr class="memdesc:ae6d3e536fec3cc26aaa6cd78c17d497b"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_HSDIV reset_value) HS Clock Division <br /></td></tr>
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<tr class="separator:ae6d3e536fec3cc26aaa6cd78c17d497b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a95894d35a451f22d21907122d7459c7c"><td class="memItemLeft" align="right" valign="top"><a id="a95894d35a451f22d21907122d7459c7c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a95894d35a451f22d21907122d7459c7c">MCLK_HSDIV_DIV_Pos</a>   0</td></tr>
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<tr class="memdesc:a95894d35a451f22d21907122d7459c7c"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_HSDIV) CPU Clock Division Factor <br /></td></tr>
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<tr class="separator:a95894d35a451f22d21907122d7459c7c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af95ce3478f248436fc2cc37da09932fc"><td class="memItemLeft" align="right" valign="top"><a id="af95ce3478f248436fc2cc37da09932fc"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_HSDIV_DIV_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF) << <a class="el" href="component_2mclk_8h.html#a95894d35a451f22d21907122d7459c7c">MCLK_HSDIV_DIV_Pos</a>)</td></tr>
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<tr class="separator:af95ce3478f248436fc2cc37da09932fc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9227e5e88370380ac983aa010e882600"><td class="memItemLeft" align="right" valign="top"><a id="a9227e5e88370380ac983aa010e882600"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_HSDIV_DIV</b>(value)   (MCLK_HSDIV_DIV_Msk & ((value) << <a class="el" href="component_2mclk_8h.html#a95894d35a451f22d21907122d7459c7c">MCLK_HSDIV_DIV_Pos</a>))</td></tr>
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<tr class="separator:a9227e5e88370380ac983aa010e882600"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a119ab5a20e98782d805cdf5c4501e712"><td class="memItemLeft" align="right" valign="top"><a id="a119ab5a20e98782d805cdf5c4501e712"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a119ab5a20e98782d805cdf5c4501e712">MCLK_HSDIV_DIV_DIV1_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:a119ab5a20e98782d805cdf5c4501e712"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_HSDIV) Divide by 1 <br /></td></tr>
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<tr class="separator:a119ab5a20e98782d805cdf5c4501e712"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a453a98753a74f894d7a1a638617af0ba"><td class="memItemLeft" align="right" valign="top"><a id="a453a98753a74f894d7a1a638617af0ba"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_HSDIV_DIV_DIV1</b>   (<a class="el" href="component_2mclk_8h.html#a119ab5a20e98782d805cdf5c4501e712">MCLK_HSDIV_DIV_DIV1_Val</a> << <a class="el" href="component_2mclk_8h.html#a95894d35a451f22d21907122d7459c7c">MCLK_HSDIV_DIV_Pos</a>)</td></tr>
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<tr class="separator:a453a98753a74f894d7a1a638617af0ba"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aaacdcc773f6047747e0c5be7e2f8e617"><td class="memItemLeft" align="right" valign="top"><a id="aaacdcc773f6047747e0c5be7e2f8e617"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#aaacdcc773f6047747e0c5be7e2f8e617">MCLK_HSDIV_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF)</td></tr>
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<tr class="memdesc:aaacdcc773f6047747e0c5be7e2f8e617"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_HSDIV) MASK Register <br /></td></tr>
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<tr class="separator:aaacdcc773f6047747e0c5be7e2f8e617"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6b856556e549869e608b1c9d9ca335ff"><td class="memItemLeft" align="right" valign="top"><a id="a6b856556e549869e608b1c9d9ca335ff"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a6b856556e549869e608b1c9d9ca335ff">MCLK_CPUDIV_OFFSET</a>   0x05</td></tr>
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<tr class="memdesc:a6b856556e549869e608b1c9d9ca335ff"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_CPUDIV offset) CPU Clock Division <br /></td></tr>
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<tr class="separator:a6b856556e549869e608b1c9d9ca335ff"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad5b446415ed860f94d2368945fa4b698"><td class="memItemLeft" align="right" valign="top"><a id="ad5b446415ed860f94d2368945fa4b698"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ad5b446415ed860f94d2368945fa4b698">MCLK_CPUDIV_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x01)</td></tr>
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<tr class="memdesc:ad5b446415ed860f94d2368945fa4b698"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_CPUDIV reset_value) CPU Clock Division <br /></td></tr>
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<tr class="separator:ad5b446415ed860f94d2368945fa4b698"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4e0248a576cb2763bf8271787d56e3d6"><td class="memItemLeft" align="right" valign="top"><a id="a4e0248a576cb2763bf8271787d56e3d6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a4e0248a576cb2763bf8271787d56e3d6">MCLK_CPUDIV_DIV_Pos</a>   0</td></tr>
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<tr class="memdesc:a4e0248a576cb2763bf8271787d56e3d6"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_CPUDIV) Low-Power Clock Division Factor <br /></td></tr>
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<tr class="separator:a4e0248a576cb2763bf8271787d56e3d6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aea67764bcda25acdb042517857e67510"><td class="memItemLeft" align="right" valign="top"><a id="aea67764bcda25acdb042517857e67510"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_CPUDIV_DIV_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF) << <a class="el" href="component_2mclk_8h.html#a4e0248a576cb2763bf8271787d56e3d6">MCLK_CPUDIV_DIV_Pos</a>)</td></tr>
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<tr class="separator:aea67764bcda25acdb042517857e67510"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3498105c08ae92ce6c8239770f4df96d"><td class="memItemLeft" align="right" valign="top"><a id="a3498105c08ae92ce6c8239770f4df96d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_CPUDIV_DIV</b>(value)   (MCLK_CPUDIV_DIV_Msk & ((value) << <a class="el" href="component_2mclk_8h.html#a4e0248a576cb2763bf8271787d56e3d6">MCLK_CPUDIV_DIV_Pos</a>))</td></tr>
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<tr class="separator:a3498105c08ae92ce6c8239770f4df96d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae007ace127ccf52e63918793f78229b6"><td class="memItemLeft" align="right" valign="top"><a id="ae007ace127ccf52e63918793f78229b6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ae007ace127ccf52e63918793f78229b6">MCLK_CPUDIV_DIV_DIV1_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:ae007ace127ccf52e63918793f78229b6"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_CPUDIV) Divide by 1 <br /></td></tr>
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<tr class="separator:ae007ace127ccf52e63918793f78229b6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a86452934ee34c2237b4cb0a296bc0734"><td class="memItemLeft" align="right" valign="top"><a id="a86452934ee34c2237b4cb0a296bc0734"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a86452934ee34c2237b4cb0a296bc0734">MCLK_CPUDIV_DIV_DIV2_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
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<tr class="memdesc:a86452934ee34c2237b4cb0a296bc0734"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_CPUDIV) Divide by 2 <br /></td></tr>
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<tr class="separator:a86452934ee34c2237b4cb0a296bc0734"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0d458738f455dcb54c5aa2d0ffcfa616"><td class="memItemLeft" align="right" valign="top"><a id="a0d458738f455dcb54c5aa2d0ffcfa616"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a0d458738f455dcb54c5aa2d0ffcfa616">MCLK_CPUDIV_DIV_DIV4_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
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<tr class="memdesc:a0d458738f455dcb54c5aa2d0ffcfa616"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_CPUDIV) Divide by 4 <br /></td></tr>
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<tr class="separator:a0d458738f455dcb54c5aa2d0ffcfa616"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a67de4295c7d075c089f0c0280f95002b"><td class="memItemLeft" align="right" valign="top"><a id="a67de4295c7d075c089f0c0280f95002b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a67de4295c7d075c089f0c0280f95002b">MCLK_CPUDIV_DIV_DIV8_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x8)</td></tr>
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<tr class="memdesc:a67de4295c7d075c089f0c0280f95002b"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_CPUDIV) Divide by 8 <br /></td></tr>
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<tr class="separator:a67de4295c7d075c089f0c0280f95002b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae681abf45271d52e20032f75fde3e7a4"><td class="memItemLeft" align="right" valign="top"><a id="ae681abf45271d52e20032f75fde3e7a4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ae681abf45271d52e20032f75fde3e7a4">MCLK_CPUDIV_DIV_DIV16_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x10)</td></tr>
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<tr class="memdesc:ae681abf45271d52e20032f75fde3e7a4"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_CPUDIV) Divide by 16 <br /></td></tr>
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<tr class="separator:ae681abf45271d52e20032f75fde3e7a4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a19e3476ae76abd38b0eac2f62dd7be46"><td class="memItemLeft" align="right" valign="top"><a id="a19e3476ae76abd38b0eac2f62dd7be46"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a19e3476ae76abd38b0eac2f62dd7be46">MCLK_CPUDIV_DIV_DIV32_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x20)</td></tr>
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<tr class="memdesc:a19e3476ae76abd38b0eac2f62dd7be46"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_CPUDIV) Divide by 32 <br /></td></tr>
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<tr class="separator:a19e3476ae76abd38b0eac2f62dd7be46"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa91c616d0c486e08497d547619896a98"><td class="memItemLeft" align="right" valign="top"><a id="aa91c616d0c486e08497d547619896a98"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#aa91c616d0c486e08497d547619896a98">MCLK_CPUDIV_DIV_DIV64_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x40)</td></tr>
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<tr class="memdesc:aa91c616d0c486e08497d547619896a98"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_CPUDIV) Divide by 64 <br /></td></tr>
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<tr class="separator:aa91c616d0c486e08497d547619896a98"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4cfc1f32942c736f236075c22f1a4f81"><td class="memItemLeft" align="right" valign="top"><a id="a4cfc1f32942c736f236075c22f1a4f81"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a4cfc1f32942c736f236075c22f1a4f81">MCLK_CPUDIV_DIV_DIV128_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x80)</td></tr>
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<tr class="memdesc:a4cfc1f32942c736f236075c22f1a4f81"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_CPUDIV) Divide by 128 <br /></td></tr>
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<tr class="separator:a4cfc1f32942c736f236075c22f1a4f81"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac591ba51143f3681e79b122db8f4dd46"><td class="memItemLeft" align="right" valign="top"><a id="ac591ba51143f3681e79b122db8f4dd46"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_CPUDIV_DIV_DIV1</b>   (<a class="el" href="component_2mclk_8h.html#ae007ace127ccf52e63918793f78229b6">MCLK_CPUDIV_DIV_DIV1_Val</a> << <a class="el" href="component_2mclk_8h.html#a4e0248a576cb2763bf8271787d56e3d6">MCLK_CPUDIV_DIV_Pos</a>)</td></tr>
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<tr class="separator:ac591ba51143f3681e79b122db8f4dd46"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:add990a5be6ea207a28177a5230e11677"><td class="memItemLeft" align="right" valign="top"><a id="add990a5be6ea207a28177a5230e11677"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_CPUDIV_DIV_DIV2</b>   (<a class="el" href="component_2mclk_8h.html#a86452934ee34c2237b4cb0a296bc0734">MCLK_CPUDIV_DIV_DIV2_Val</a> << <a class="el" href="component_2mclk_8h.html#a4e0248a576cb2763bf8271787d56e3d6">MCLK_CPUDIV_DIV_Pos</a>)</td></tr>
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<tr class="separator:add990a5be6ea207a28177a5230e11677"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a281d1afd7e1f44afed56eb5e8702973f"><td class="memItemLeft" align="right" valign="top"><a id="a281d1afd7e1f44afed56eb5e8702973f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_CPUDIV_DIV_DIV4</b>   (<a class="el" href="component_2mclk_8h.html#a0d458738f455dcb54c5aa2d0ffcfa616">MCLK_CPUDIV_DIV_DIV4_Val</a> << <a class="el" href="component_2mclk_8h.html#a4e0248a576cb2763bf8271787d56e3d6">MCLK_CPUDIV_DIV_Pos</a>)</td></tr>
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<tr class="separator:a281d1afd7e1f44afed56eb5e8702973f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab399242d129464685acfa35bf36457d3"><td class="memItemLeft" align="right" valign="top"><a id="ab399242d129464685acfa35bf36457d3"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_CPUDIV_DIV_DIV8</b>   (<a class="el" href="component_2mclk_8h.html#a67de4295c7d075c089f0c0280f95002b">MCLK_CPUDIV_DIV_DIV8_Val</a> << <a class="el" href="component_2mclk_8h.html#a4e0248a576cb2763bf8271787d56e3d6">MCLK_CPUDIV_DIV_Pos</a>)</td></tr>
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<tr class="separator:ab399242d129464685acfa35bf36457d3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a90129a61b0deb7b090fd2f014c462d6d"><td class="memItemLeft" align="right" valign="top"><a id="a90129a61b0deb7b090fd2f014c462d6d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_CPUDIV_DIV_DIV16</b>   (<a class="el" href="component_2mclk_8h.html#ae681abf45271d52e20032f75fde3e7a4">MCLK_CPUDIV_DIV_DIV16_Val</a> << <a class="el" href="component_2mclk_8h.html#a4e0248a576cb2763bf8271787d56e3d6">MCLK_CPUDIV_DIV_Pos</a>)</td></tr>
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<tr class="separator:a90129a61b0deb7b090fd2f014c462d6d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a24c1d539eacd12e2bebb95c18274f90e"><td class="memItemLeft" align="right" valign="top"><a id="a24c1d539eacd12e2bebb95c18274f90e"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_CPUDIV_DIV_DIV32</b>   (<a class="el" href="component_2mclk_8h.html#a19e3476ae76abd38b0eac2f62dd7be46">MCLK_CPUDIV_DIV_DIV32_Val</a> << <a class="el" href="component_2mclk_8h.html#a4e0248a576cb2763bf8271787d56e3d6">MCLK_CPUDIV_DIV_Pos</a>)</td></tr>
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<tr class="separator:a24c1d539eacd12e2bebb95c18274f90e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab4f544016f1826314da19e53d7a7599b"><td class="memItemLeft" align="right" valign="top"><a id="ab4f544016f1826314da19e53d7a7599b"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_CPUDIV_DIV_DIV64</b>   (<a class="el" href="component_2mclk_8h.html#aa91c616d0c486e08497d547619896a98">MCLK_CPUDIV_DIV_DIV64_Val</a> << <a class="el" href="component_2mclk_8h.html#a4e0248a576cb2763bf8271787d56e3d6">MCLK_CPUDIV_DIV_Pos</a>)</td></tr>
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<tr class="separator:ab4f544016f1826314da19e53d7a7599b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6e58370657b20f69cdb1e9ab099a1a3c"><td class="memItemLeft" align="right" valign="top"><a id="a6e58370657b20f69cdb1e9ab099a1a3c"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_CPUDIV_DIV_DIV128</b>   (<a class="el" href="component_2mclk_8h.html#a4cfc1f32942c736f236075c22f1a4f81">MCLK_CPUDIV_DIV_DIV128_Val</a> << <a class="el" href="component_2mclk_8h.html#a4e0248a576cb2763bf8271787d56e3d6">MCLK_CPUDIV_DIV_Pos</a>)</td></tr>
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<tr class="separator:a6e58370657b20f69cdb1e9ab099a1a3c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab671f30e14e4976663447bcdf727ea01"><td class="memItemLeft" align="right" valign="top"><a id="ab671f30e14e4976663447bcdf727ea01"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ab671f30e14e4976663447bcdf727ea01">MCLK_CPUDIV_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF)</td></tr>
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<tr class="memdesc:ab671f30e14e4976663447bcdf727ea01"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_CPUDIV) MASK Register <br /></td></tr>
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<tr class="separator:ab671f30e14e4976663447bcdf727ea01"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af60da772fd92f5ac2d24529a4edd5bcf"><td class="memItemLeft" align="right" valign="top"><a id="af60da772fd92f5ac2d24529a4edd5bcf"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#af60da772fd92f5ac2d24529a4edd5bcf">MCLK_AHBMASK_OFFSET</a>   0x10</td></tr>
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<tr class="memdesc:af60da772fd92f5ac2d24529a4edd5bcf"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK offset) AHB Mask <br /></td></tr>
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<tr class="separator:af60da772fd92f5ac2d24529a4edd5bcf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7416e817fc3532e446cfae94a314c2c1"><td class="memItemLeft" align="right" valign="top"><a id="a7416e817fc3532e446cfae94a314c2c1"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a7416e817fc3532e446cfae94a314c2c1">MCLK_AHBMASK_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00FFFFFF)</td></tr>
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<tr class="memdesc:a7416e817fc3532e446cfae94a314c2c1"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK reset_value) AHB Mask <br /></td></tr>
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<tr class="separator:a7416e817fc3532e446cfae94a314c2c1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aab73df1970914c738e069aa3f44343f7"><td class="memItemLeft" align="right" valign="top"><a id="aab73df1970914c738e069aa3f44343f7"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#aab73df1970914c738e069aa3f44343f7">MCLK_AHBMASK_HPB0_Pos</a>   0</td></tr>
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<tr class="memdesc:aab73df1970914c738e069aa3f44343f7"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) HPB0 AHB Clock Mask <br /></td></tr>
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<tr class="separator:aab73df1970914c738e069aa3f44343f7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:adfdec284630c9c471fd1d731464252a2"><td class="memItemLeft" align="right" valign="top"><a id="adfdec284630c9c471fd1d731464252a2"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_HPB0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#aab73df1970914c738e069aa3f44343f7">MCLK_AHBMASK_HPB0_Pos</a>)</td></tr>
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<tr class="separator:adfdec284630c9c471fd1d731464252a2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad500245362fc27f25dbd1cd872403db5"><td class="memItemLeft" align="right" valign="top"><a id="ad500245362fc27f25dbd1cd872403db5"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ad500245362fc27f25dbd1cd872403db5">MCLK_AHBMASK_HPB1_Pos</a>   1</td></tr>
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<tr class="memdesc:ad500245362fc27f25dbd1cd872403db5"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) HPB1 AHB Clock Mask <br /></td></tr>
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<tr class="separator:ad500245362fc27f25dbd1cd872403db5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aba05d82d3b9053c8634f5644410059fe"><td class="memItemLeft" align="right" valign="top"><a id="aba05d82d3b9053c8634f5644410059fe"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_HPB1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#ad500245362fc27f25dbd1cd872403db5">MCLK_AHBMASK_HPB1_Pos</a>)</td></tr>
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<tr class="separator:aba05d82d3b9053c8634f5644410059fe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad85e221b80ccea1b2fb40ccd57361831"><td class="memItemLeft" align="right" valign="top"><a id="ad85e221b80ccea1b2fb40ccd57361831"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ad85e221b80ccea1b2fb40ccd57361831">MCLK_AHBMASK_HPB2_Pos</a>   2</td></tr>
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<tr class="memdesc:ad85e221b80ccea1b2fb40ccd57361831"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) HPB2 AHB Clock Mask <br /></td></tr>
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<tr class="separator:ad85e221b80ccea1b2fb40ccd57361831"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4195e6c352a7882bd03c3a0e41a711be"><td class="memItemLeft" align="right" valign="top"><a id="a4195e6c352a7882bd03c3a0e41a711be"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_HPB2</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#ad85e221b80ccea1b2fb40ccd57361831">MCLK_AHBMASK_HPB2_Pos</a>)</td></tr>
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<tr class="separator:a4195e6c352a7882bd03c3a0e41a711be"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0fde493e6b6f196f2f5097f561c77fa3"><td class="memItemLeft" align="right" valign="top"><a id="a0fde493e6b6f196f2f5097f561c77fa3"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a0fde493e6b6f196f2f5097f561c77fa3">MCLK_AHBMASK_HPB3_Pos</a>   3</td></tr>
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<tr class="memdesc:a0fde493e6b6f196f2f5097f561c77fa3"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) HPB3 AHB Clock Mask <br /></td></tr>
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<tr class="separator:a0fde493e6b6f196f2f5097f561c77fa3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a98288687816bc464a0a8372ad889dd3e"><td class="memItemLeft" align="right" valign="top"><a id="a98288687816bc464a0a8372ad889dd3e"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_HPB3</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a0fde493e6b6f196f2f5097f561c77fa3">MCLK_AHBMASK_HPB3_Pos</a>)</td></tr>
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<tr class="separator:a98288687816bc464a0a8372ad889dd3e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af25c239a7914145d262614e4cea537b3"><td class="memItemLeft" align="right" valign="top"><a id="af25c239a7914145d262614e4cea537b3"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#af25c239a7914145d262614e4cea537b3">MCLK_AHBMASK_DSU_Pos</a>   4</td></tr>
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<tr class="memdesc:af25c239a7914145d262614e4cea537b3"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) DSU AHB Clock Mask <br /></td></tr>
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<tr class="separator:af25c239a7914145d262614e4cea537b3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a65924af4e0fa2107ba83b9a2e6f58049"><td class="memItemLeft" align="right" valign="top"><a id="a65924af4e0fa2107ba83b9a2e6f58049"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_DSU</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#af25c239a7914145d262614e4cea537b3">MCLK_AHBMASK_DSU_Pos</a>)</td></tr>
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<tr class="separator:a65924af4e0fa2107ba83b9a2e6f58049"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0c382b9b2b318a564cf9769941fa7373"><td class="memItemLeft" align="right" valign="top"><a id="a0c382b9b2b318a564cf9769941fa7373"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a0c382b9b2b318a564cf9769941fa7373">MCLK_AHBMASK_HMATRIX_Pos</a>   5</td></tr>
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<tr class="memdesc:a0c382b9b2b318a564cf9769941fa7373"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) HMATRIX AHB Clock Mask <br /></td></tr>
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<tr class="separator:a0c382b9b2b318a564cf9769941fa7373"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0b8a35a62cfb5d36452dfb42865eb142"><td class="memItemLeft" align="right" valign="top"><a id="a0b8a35a62cfb5d36452dfb42865eb142"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_HMATRIX</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a0c382b9b2b318a564cf9769941fa7373">MCLK_AHBMASK_HMATRIX_Pos</a>)</td></tr>
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<tr class="separator:a0b8a35a62cfb5d36452dfb42865eb142"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a81becb828c915d5aac7686148213cb7a"><td class="memItemLeft" align="right" valign="top"><a id="a81becb828c915d5aac7686148213cb7a"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a81becb828c915d5aac7686148213cb7a">MCLK_AHBMASK_NVMCTRL_Pos</a>   6</td></tr>
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<tr class="memdesc:a81becb828c915d5aac7686148213cb7a"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) NVMCTRL AHB Clock Mask <br /></td></tr>
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<tr class="separator:a81becb828c915d5aac7686148213cb7a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a59eafea8fd7c2b1338f9d8c459dc9e1e"><td class="memItemLeft" align="right" valign="top"><a id="a59eafea8fd7c2b1338f9d8c459dc9e1e"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_NVMCTRL</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a81becb828c915d5aac7686148213cb7a">MCLK_AHBMASK_NVMCTRL_Pos</a>)</td></tr>
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<tr class="separator:a59eafea8fd7c2b1338f9d8c459dc9e1e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3a610cdaf2a0676797625dee122829f3"><td class="memItemLeft" align="right" valign="top"><a id="a3a610cdaf2a0676797625dee122829f3"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a3a610cdaf2a0676797625dee122829f3">MCLK_AHBMASK_HSRAM_Pos</a>   7</td></tr>
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<tr class="memdesc:a3a610cdaf2a0676797625dee122829f3"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) HSRAM AHB Clock Mask <br /></td></tr>
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<tr class="separator:a3a610cdaf2a0676797625dee122829f3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a58f7d2b6691a78c78f1006cbc08a7562"><td class="memItemLeft" align="right" valign="top"><a id="a58f7d2b6691a78c78f1006cbc08a7562"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_HSRAM</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a3a610cdaf2a0676797625dee122829f3">MCLK_AHBMASK_HSRAM_Pos</a>)</td></tr>
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<tr class="separator:a58f7d2b6691a78c78f1006cbc08a7562"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5114ee4fb624a1109ca8a35533050c91"><td class="memItemLeft" align="right" valign="top"><a id="a5114ee4fb624a1109ca8a35533050c91"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a5114ee4fb624a1109ca8a35533050c91">MCLK_AHBMASK_CMCC_Pos</a>   8</td></tr>
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<tr class="memdesc:a5114ee4fb624a1109ca8a35533050c91"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) CMCC AHB Clock Mask <br /></td></tr>
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<tr class="separator:a5114ee4fb624a1109ca8a35533050c91"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7100a8965bc4c825f25d64420db27f2f"><td class="memItemLeft" align="right" valign="top"><a id="a7100a8965bc4c825f25d64420db27f2f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_CMCC</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a5114ee4fb624a1109ca8a35533050c91">MCLK_AHBMASK_CMCC_Pos</a>)</td></tr>
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<tr class="separator:a7100a8965bc4c825f25d64420db27f2f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9777b9f4e5c6f15597d5d0f3c284a638"><td class="memItemLeft" align="right" valign="top"><a id="a9777b9f4e5c6f15597d5d0f3c284a638"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a9777b9f4e5c6f15597d5d0f3c284a638">MCLK_AHBMASK_DMAC_Pos</a>   9</td></tr>
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<tr class="memdesc:a9777b9f4e5c6f15597d5d0f3c284a638"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) DMAC AHB Clock Mask <br /></td></tr>
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<tr class="separator:a9777b9f4e5c6f15597d5d0f3c284a638"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a528ff2fc41ed495daa5426a00d005543"><td class="memItemLeft" align="right" valign="top"><a id="a528ff2fc41ed495daa5426a00d005543"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_DMAC</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a9777b9f4e5c6f15597d5d0f3c284a638">MCLK_AHBMASK_DMAC_Pos</a>)</td></tr>
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<tr class="separator:a528ff2fc41ed495daa5426a00d005543"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a58c4b1c4ee77bdcf758d0e74ec5b5abc"><td class="memItemLeft" align="right" valign="top"><a id="a58c4b1c4ee77bdcf758d0e74ec5b5abc"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a58c4b1c4ee77bdcf758d0e74ec5b5abc">MCLK_AHBMASK_USB_Pos</a>   10</td></tr>
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<tr class="memdesc:a58c4b1c4ee77bdcf758d0e74ec5b5abc"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) USB AHB Clock Mask <br /></td></tr>
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<tr class="separator:a58c4b1c4ee77bdcf758d0e74ec5b5abc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac0f4944f37bde2fe7e8d7fe87ca957fb"><td class="memItemLeft" align="right" valign="top"><a id="ac0f4944f37bde2fe7e8d7fe87ca957fb"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_USB</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a58c4b1c4ee77bdcf758d0e74ec5b5abc">MCLK_AHBMASK_USB_Pos</a>)</td></tr>
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<tr class="separator:ac0f4944f37bde2fe7e8d7fe87ca957fb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a51f341be2cd16552a79406a3df9fad31"><td class="memItemLeft" align="right" valign="top"><a id="a51f341be2cd16552a79406a3df9fad31"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a51f341be2cd16552a79406a3df9fad31">MCLK_AHBMASK_BKUPRAM_Pos</a>   11</td></tr>
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<tr class="memdesc:a51f341be2cd16552a79406a3df9fad31"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) BKUPRAM AHB Clock Mask <br /></td></tr>
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<tr class="separator:a51f341be2cd16552a79406a3df9fad31"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aecef395a7a95e256136807a3962d30f9"><td class="memItemLeft" align="right" valign="top"><a id="aecef395a7a95e256136807a3962d30f9"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_BKUPRAM</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a51f341be2cd16552a79406a3df9fad31">MCLK_AHBMASK_BKUPRAM_Pos</a>)</td></tr>
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<tr class="separator:aecef395a7a95e256136807a3962d30f9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a25f30a1fcd43fb869b5594496df8d1f1"><td class="memItemLeft" align="right" valign="top"><a id="a25f30a1fcd43fb869b5594496df8d1f1"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a25f30a1fcd43fb869b5594496df8d1f1">MCLK_AHBMASK_PAC_Pos</a>   12</td></tr>
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<tr class="memdesc:a25f30a1fcd43fb869b5594496df8d1f1"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) PAC AHB Clock Mask <br /></td></tr>
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<tr class="separator:a25f30a1fcd43fb869b5594496df8d1f1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:affaabbf8d69adeb59ff3f1a1e4b428dc"><td class="memItemLeft" align="right" valign="top"><a id="affaabbf8d69adeb59ff3f1a1e4b428dc"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_PAC</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a25f30a1fcd43fb869b5594496df8d1f1">MCLK_AHBMASK_PAC_Pos</a>)</td></tr>
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<tr class="separator:affaabbf8d69adeb59ff3f1a1e4b428dc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aadc7e0a4d4a8f204ff028e09185a6dbc"><td class="memItemLeft" align="right" valign="top"><a id="aadc7e0a4d4a8f204ff028e09185a6dbc"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#aadc7e0a4d4a8f204ff028e09185a6dbc">MCLK_AHBMASK_QSPI_Pos</a>   13</td></tr>
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<tr class="memdesc:aadc7e0a4d4a8f204ff028e09185a6dbc"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) QSPI AHB Clock Mask <br /></td></tr>
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<tr class="separator:aadc7e0a4d4a8f204ff028e09185a6dbc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab2d0c2a66715b16ab69d216c01806768"><td class="memItemLeft" align="right" valign="top"><a id="ab2d0c2a66715b16ab69d216c01806768"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_QSPI</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#aadc7e0a4d4a8f204ff028e09185a6dbc">MCLK_AHBMASK_QSPI_Pos</a>)</td></tr>
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<tr class="separator:ab2d0c2a66715b16ab69d216c01806768"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a90a6e6c304da25718d5535909d7765f9"><td class="memItemLeft" align="right" valign="top"><a id="a90a6e6c304da25718d5535909d7765f9"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a90a6e6c304da25718d5535909d7765f9">MCLK_AHBMASK_GMAC_Pos</a>   14</td></tr>
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<tr class="memdesc:a90a6e6c304da25718d5535909d7765f9"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) GMAC AHB Clock Mask <br /></td></tr>
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<tr class="separator:a90a6e6c304da25718d5535909d7765f9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac352efd91a84d2d52c747fe28d351b60"><td class="memItemLeft" align="right" valign="top"><a id="ac352efd91a84d2d52c747fe28d351b60"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_GMAC</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a90a6e6c304da25718d5535909d7765f9">MCLK_AHBMASK_GMAC_Pos</a>)</td></tr>
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<tr class="separator:ac352efd91a84d2d52c747fe28d351b60"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a075eb14056d8b7fedd243795408bf542"><td class="memItemLeft" align="right" valign="top"><a id="a075eb14056d8b7fedd243795408bf542"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a075eb14056d8b7fedd243795408bf542">MCLK_AHBMASK_SDHC0_Pos</a>   15</td></tr>
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<tr class="memdesc:a075eb14056d8b7fedd243795408bf542"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) SDHC0 AHB Clock Mask <br /></td></tr>
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<tr class="separator:a075eb14056d8b7fedd243795408bf542"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5c256faa1089c21111fdc8254397839f"><td class="memItemLeft" align="right" valign="top"><a id="a5c256faa1089c21111fdc8254397839f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_SDHC0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a075eb14056d8b7fedd243795408bf542">MCLK_AHBMASK_SDHC0_Pos</a>)</td></tr>
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<tr class="separator:a5c256faa1089c21111fdc8254397839f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a33f14b34d3d4622e115b84d46bb9207a"><td class="memItemLeft" align="right" valign="top"><a id="a33f14b34d3d4622e115b84d46bb9207a"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a33f14b34d3d4622e115b84d46bb9207a">MCLK_AHBMASK_SDHC1_Pos</a>   16</td></tr>
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<tr class="memdesc:a33f14b34d3d4622e115b84d46bb9207a"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) SDHC1 AHB Clock Mask <br /></td></tr>
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<tr class="separator:a33f14b34d3d4622e115b84d46bb9207a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a09c34d33c3b97bc983bfdd80563dd387"><td class="memItemLeft" align="right" valign="top"><a id="a09c34d33c3b97bc983bfdd80563dd387"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_SDHC1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a33f14b34d3d4622e115b84d46bb9207a">MCLK_AHBMASK_SDHC1_Pos</a>)</td></tr>
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<tr class="separator:a09c34d33c3b97bc983bfdd80563dd387"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad5d5cfafc70ebe598b651e3496fcd4a4"><td class="memItemLeft" align="right" valign="top"><a id="ad5d5cfafc70ebe598b651e3496fcd4a4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ad5d5cfafc70ebe598b651e3496fcd4a4">MCLK_AHBMASK_CAN0_Pos</a>   17</td></tr>
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<tr class="memdesc:ad5d5cfafc70ebe598b651e3496fcd4a4"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) CAN0 AHB Clock Mask <br /></td></tr>
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<tr class="separator:ad5d5cfafc70ebe598b651e3496fcd4a4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9744d89ce9e7c97ae7e9067aa3673fee"><td class="memItemLeft" align="right" valign="top"><a id="a9744d89ce9e7c97ae7e9067aa3673fee"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_CAN0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#ad5d5cfafc70ebe598b651e3496fcd4a4">MCLK_AHBMASK_CAN0_Pos</a>)</td></tr>
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<tr class="separator:a9744d89ce9e7c97ae7e9067aa3673fee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a361fe28b52db9c858de0926bc72b5985"><td class="memItemLeft" align="right" valign="top"><a id="a361fe28b52db9c858de0926bc72b5985"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a361fe28b52db9c858de0926bc72b5985">MCLK_AHBMASK_CAN1_Pos</a>   18</td></tr>
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<tr class="memdesc:a361fe28b52db9c858de0926bc72b5985"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) CAN1 AHB Clock Mask <br /></td></tr>
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<tr class="separator:a361fe28b52db9c858de0926bc72b5985"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a30caaa1e70ad2629aed91d113627a16c"><td class="memItemLeft" align="right" valign="top"><a id="a30caaa1e70ad2629aed91d113627a16c"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_CAN1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a361fe28b52db9c858de0926bc72b5985">MCLK_AHBMASK_CAN1_Pos</a>)</td></tr>
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<tr class="separator:a30caaa1e70ad2629aed91d113627a16c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a96dc631a8955ba6a803b4a7e0f45456e"><td class="memItemLeft" align="right" valign="top"><a id="a96dc631a8955ba6a803b4a7e0f45456e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a96dc631a8955ba6a803b4a7e0f45456e">MCLK_AHBMASK_ICM_Pos</a>   19</td></tr>
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<tr class="memdesc:a96dc631a8955ba6a803b4a7e0f45456e"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) ICM AHB Clock Mask <br /></td></tr>
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<tr class="separator:a96dc631a8955ba6a803b4a7e0f45456e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae81037c6685f05bb1ec0cbd41674cad2"><td class="memItemLeft" align="right" valign="top"><a id="ae81037c6685f05bb1ec0cbd41674cad2"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_ICM</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a96dc631a8955ba6a803b4a7e0f45456e">MCLK_AHBMASK_ICM_Pos</a>)</td></tr>
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<tr class="separator:ae81037c6685f05bb1ec0cbd41674cad2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aced4a82f31a9b059bc0ce0372302cfc9"><td class="memItemLeft" align="right" valign="top"><a id="aced4a82f31a9b059bc0ce0372302cfc9"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#aced4a82f31a9b059bc0ce0372302cfc9">MCLK_AHBMASK_PUKCC_Pos</a>   20</td></tr>
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<tr class="memdesc:aced4a82f31a9b059bc0ce0372302cfc9"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) PUKCC AHB Clock Mask <br /></td></tr>
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<tr class="separator:aced4a82f31a9b059bc0ce0372302cfc9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a411a7a9fb2f0bc0f66f8e35bdb94f162"><td class="memItemLeft" align="right" valign="top"><a id="a411a7a9fb2f0bc0f66f8e35bdb94f162"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_PUKCC</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#aced4a82f31a9b059bc0ce0372302cfc9">MCLK_AHBMASK_PUKCC_Pos</a>)</td></tr>
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<tr class="separator:a411a7a9fb2f0bc0f66f8e35bdb94f162"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:addc4877eff69e76ab70162f511744c0b"><td class="memItemLeft" align="right" valign="top"><a id="addc4877eff69e76ab70162f511744c0b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#addc4877eff69e76ab70162f511744c0b">MCLK_AHBMASK_QSPI_2X_Pos</a>   21</td></tr>
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<tr class="memdesc:addc4877eff69e76ab70162f511744c0b"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) QSPI_2X AHB Clock Mask <br /></td></tr>
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<tr class="separator:addc4877eff69e76ab70162f511744c0b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab3976675280977e98fe8833ed7d162e0"><td class="memItemLeft" align="right" valign="top"><a id="ab3976675280977e98fe8833ed7d162e0"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_QSPI_2X</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#addc4877eff69e76ab70162f511744c0b">MCLK_AHBMASK_QSPI_2X_Pos</a>)</td></tr>
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<tr class="separator:ab3976675280977e98fe8833ed7d162e0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a893beae0d8a30df0cac8ac289280926a"><td class="memItemLeft" align="right" valign="top"><a id="a893beae0d8a30df0cac8ac289280926a"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a893beae0d8a30df0cac8ac289280926a">MCLK_AHBMASK_NVMCTRL_SMEEPROM_Pos</a>   22</td></tr>
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<tr class="memdesc:a893beae0d8a30df0cac8ac289280926a"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) NVMCTRL_SMEEPROM AHB Clock Mask <br /></td></tr>
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<tr class="separator:a893beae0d8a30df0cac8ac289280926a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0b13c6107316629dbdb36b7183e5d5c5"><td class="memItemLeft" align="right" valign="top"><a id="a0b13c6107316629dbdb36b7183e5d5c5"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_NVMCTRL_SMEEPROM</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a893beae0d8a30df0cac8ac289280926a">MCLK_AHBMASK_NVMCTRL_SMEEPROM_Pos</a>)</td></tr>
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<tr class="separator:a0b13c6107316629dbdb36b7183e5d5c5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a433eb3bd2eac386d68dadbeb476c412b"><td class="memItemLeft" align="right" valign="top"><a id="a433eb3bd2eac386d68dadbeb476c412b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a433eb3bd2eac386d68dadbeb476c412b">MCLK_AHBMASK_NVMCTRL_CACHE_Pos</a>   23</td></tr>
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<tr class="memdesc:a433eb3bd2eac386d68dadbeb476c412b"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) NVMCTRL_CACHE AHB Clock Mask <br /></td></tr>
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<tr class="separator:a433eb3bd2eac386d68dadbeb476c412b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5a738ac40abb1af0d95d9c4621aef47a"><td class="memItemLeft" align="right" valign="top"><a id="a5a738ac40abb1af0d95d9c4621aef47a"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_AHBMASK_NVMCTRL_CACHE</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a433eb3bd2eac386d68dadbeb476c412b">MCLK_AHBMASK_NVMCTRL_CACHE_Pos</a>)</td></tr>
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<tr class="separator:a5a738ac40abb1af0d95d9c4621aef47a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4ff9567101bdb1ceefebec27f64d817f"><td class="memItemLeft" align="right" valign="top"><a id="a4ff9567101bdb1ceefebec27f64d817f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a4ff9567101bdb1ceefebec27f64d817f">MCLK_AHBMASK_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00FFFFFF)</td></tr>
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<tr class="memdesc:a4ff9567101bdb1ceefebec27f64d817f"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_AHBMASK) MASK Register <br /></td></tr>
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<tr class="separator:a4ff9567101bdb1ceefebec27f64d817f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0c6c90fc226352932e5d81fb51efebc0"><td class="memItemLeft" align="right" valign="top"><a id="a0c6c90fc226352932e5d81fb51efebc0"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a0c6c90fc226352932e5d81fb51efebc0">MCLK_APBAMASK_OFFSET</a>   0x14</td></tr>
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<tr class="memdesc:a0c6c90fc226352932e5d81fb51efebc0"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBAMASK offset) APBA Mask <br /></td></tr>
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<tr class="separator:a0c6c90fc226352932e5d81fb51efebc0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3d96d2b490df3f3164791e72baeabe60"><td class="memItemLeft" align="right" valign="top"><a id="a3d96d2b490df3f3164791e72baeabe60"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a3d96d2b490df3f3164791e72baeabe60">MCLK_APBAMASK_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x000007FF)</td></tr>
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<tr class="memdesc:a3d96d2b490df3f3164791e72baeabe60"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBAMASK reset_value) APBA Mask <br /></td></tr>
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<tr class="separator:a3d96d2b490df3f3164791e72baeabe60"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a961dc42788c4447477d905b3fa27c039"><td class="memItemLeft" align="right" valign="top"><a id="a961dc42788c4447477d905b3fa27c039"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a961dc42788c4447477d905b3fa27c039">MCLK_APBAMASK_PAC_Pos</a>   0</td></tr>
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<tr class="memdesc:a961dc42788c4447477d905b3fa27c039"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBAMASK) PAC APB Clock Enable <br /></td></tr>
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<tr class="separator:a961dc42788c4447477d905b3fa27c039"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9e7325f63a533f2a3744946f3980f107"><td class="memItemLeft" align="right" valign="top"><a id="a9e7325f63a533f2a3744946f3980f107"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_PAC</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a961dc42788c4447477d905b3fa27c039">MCLK_APBAMASK_PAC_Pos</a>)</td></tr>
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<tr class="separator:a9e7325f63a533f2a3744946f3980f107"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a04293b17854c4a2862117cb1e92e90d9"><td class="memItemLeft" align="right" valign="top"><a id="a04293b17854c4a2862117cb1e92e90d9"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a04293b17854c4a2862117cb1e92e90d9">MCLK_APBAMASK_PM_Pos</a>   1</td></tr>
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<tr class="memdesc:a04293b17854c4a2862117cb1e92e90d9"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBAMASK) PM APB Clock Enable <br /></td></tr>
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<tr class="separator:a04293b17854c4a2862117cb1e92e90d9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7941e06780c125fd16a2d5ae4d1f8e1e"><td class="memItemLeft" align="right" valign="top"><a id="a7941e06780c125fd16a2d5ae4d1f8e1e"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_PM</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a04293b17854c4a2862117cb1e92e90d9">MCLK_APBAMASK_PM_Pos</a>)</td></tr>
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<tr class="separator:a7941e06780c125fd16a2d5ae4d1f8e1e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0db8d768734ebf5b9b0c4b32fff4ad02"><td class="memItemLeft" align="right" valign="top"><a id="a0db8d768734ebf5b9b0c4b32fff4ad02"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a0db8d768734ebf5b9b0c4b32fff4ad02">MCLK_APBAMASK_MCLK_Pos</a>   2</td></tr>
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<tr class="memdesc:a0db8d768734ebf5b9b0c4b32fff4ad02"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBAMASK) MCLK APB Clock Enable <br /></td></tr>
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<tr class="separator:a0db8d768734ebf5b9b0c4b32fff4ad02"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae1adde513e3034e9af1d3b83675bbfee"><td class="memItemLeft" align="right" valign="top"><a id="ae1adde513e3034e9af1d3b83675bbfee"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_MCLK</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a0db8d768734ebf5b9b0c4b32fff4ad02">MCLK_APBAMASK_MCLK_Pos</a>)</td></tr>
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<tr class="separator:ae1adde513e3034e9af1d3b83675bbfee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a23015f90db0192052e8d0a971684fa6e"><td class="memItemLeft" align="right" valign="top"><a id="a23015f90db0192052e8d0a971684fa6e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a23015f90db0192052e8d0a971684fa6e">MCLK_APBAMASK_RSTC_Pos</a>   3</td></tr>
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<tr class="memdesc:a23015f90db0192052e8d0a971684fa6e"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBAMASK) RSTC APB Clock Enable <br /></td></tr>
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<tr class="separator:a23015f90db0192052e8d0a971684fa6e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6336e4028597b8188dc6d9408d8bc80d"><td class="memItemLeft" align="right" valign="top"><a id="a6336e4028597b8188dc6d9408d8bc80d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_RSTC</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a23015f90db0192052e8d0a971684fa6e">MCLK_APBAMASK_RSTC_Pos</a>)</td></tr>
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<tr class="separator:a6336e4028597b8188dc6d9408d8bc80d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac3c888b7b8de3be9e61afcf2aff6dff2"><td class="memItemLeft" align="right" valign="top"><a id="ac3c888b7b8de3be9e61afcf2aff6dff2"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ac3c888b7b8de3be9e61afcf2aff6dff2">MCLK_APBAMASK_OSCCTRL_Pos</a>   4</td></tr>
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<tr class="memdesc:ac3c888b7b8de3be9e61afcf2aff6dff2"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBAMASK) OSCCTRL APB Clock Enable <br /></td></tr>
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<tr class="separator:ac3c888b7b8de3be9e61afcf2aff6dff2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a14f0797fb3f869e7dae0d1f669c1baef"><td class="memItemLeft" align="right" valign="top"><a id="a14f0797fb3f869e7dae0d1f669c1baef"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_OSCCTRL</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#ac3c888b7b8de3be9e61afcf2aff6dff2">MCLK_APBAMASK_OSCCTRL_Pos</a>)</td></tr>
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<tr class="separator:a14f0797fb3f869e7dae0d1f669c1baef"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac13c0587fd456465accd0efc6e769413"><td class="memItemLeft" align="right" valign="top"><a id="ac13c0587fd456465accd0efc6e769413"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ac13c0587fd456465accd0efc6e769413">MCLK_APBAMASK_OSC32KCTRL_Pos</a>   5</td></tr>
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<tr class="memdesc:ac13c0587fd456465accd0efc6e769413"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBAMASK) OSC32KCTRL APB Clock Enable <br /></td></tr>
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<tr class="separator:ac13c0587fd456465accd0efc6e769413"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab35f8bfe9dfac960c39e117b13c0c775"><td class="memItemLeft" align="right" valign="top"><a id="ab35f8bfe9dfac960c39e117b13c0c775"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_OSC32KCTRL</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#ac13c0587fd456465accd0efc6e769413">MCLK_APBAMASK_OSC32KCTRL_Pos</a>)</td></tr>
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<tr class="separator:ab35f8bfe9dfac960c39e117b13c0c775"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9482e51359fc581f7c605977eb3685c5"><td class="memItemLeft" align="right" valign="top"><a id="a9482e51359fc581f7c605977eb3685c5"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a9482e51359fc581f7c605977eb3685c5">MCLK_APBAMASK_SUPC_Pos</a>   6</td></tr>
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<tr class="memdesc:a9482e51359fc581f7c605977eb3685c5"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBAMASK) SUPC APB Clock Enable <br /></td></tr>
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<tr class="separator:a9482e51359fc581f7c605977eb3685c5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa034a3017bc25f04ecd48ed91b75c101"><td class="memItemLeft" align="right" valign="top"><a id="aa034a3017bc25f04ecd48ed91b75c101"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_SUPC</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a9482e51359fc581f7c605977eb3685c5">MCLK_APBAMASK_SUPC_Pos</a>)</td></tr>
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<tr class="separator:aa034a3017bc25f04ecd48ed91b75c101"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5fb09fb3c0885c6bf234d8021344b40b"><td class="memItemLeft" align="right" valign="top"><a id="a5fb09fb3c0885c6bf234d8021344b40b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a5fb09fb3c0885c6bf234d8021344b40b">MCLK_APBAMASK_GCLK_Pos</a>   7</td></tr>
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<tr class="memdesc:a5fb09fb3c0885c6bf234d8021344b40b"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBAMASK) GCLK APB Clock Enable <br /></td></tr>
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<tr class="separator:a5fb09fb3c0885c6bf234d8021344b40b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a71a56d5e1f337ebd9fdc1c2e7dd9c033"><td class="memItemLeft" align="right" valign="top"><a id="a71a56d5e1f337ebd9fdc1c2e7dd9c033"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_GCLK</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a5fb09fb3c0885c6bf234d8021344b40b">MCLK_APBAMASK_GCLK_Pos</a>)</td></tr>
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<tr class="separator:a71a56d5e1f337ebd9fdc1c2e7dd9c033"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a65b51937fbcdf1a5d7418bbfd0cb3a4e"><td class="memItemLeft" align="right" valign="top"><a id="a65b51937fbcdf1a5d7418bbfd0cb3a4e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a65b51937fbcdf1a5d7418bbfd0cb3a4e">MCLK_APBAMASK_WDT_Pos</a>   8</td></tr>
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<tr class="memdesc:a65b51937fbcdf1a5d7418bbfd0cb3a4e"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBAMASK) WDT APB Clock Enable <br /></td></tr>
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<tr class="separator:a65b51937fbcdf1a5d7418bbfd0cb3a4e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7840b89731ff3eb4be62d16784fa2bc2"><td class="memItemLeft" align="right" valign="top"><a id="a7840b89731ff3eb4be62d16784fa2bc2"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_WDT</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a65b51937fbcdf1a5d7418bbfd0cb3a4e">MCLK_APBAMASK_WDT_Pos</a>)</td></tr>
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<tr class="separator:a7840b89731ff3eb4be62d16784fa2bc2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a29bcfd311e7858237139c52fa164728d"><td class="memItemLeft" align="right" valign="top"><a id="a29bcfd311e7858237139c52fa164728d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a29bcfd311e7858237139c52fa164728d">MCLK_APBAMASK_RTC_Pos</a>   9</td></tr>
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<tr class="memdesc:a29bcfd311e7858237139c52fa164728d"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBAMASK) RTC APB Clock Enable <br /></td></tr>
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<tr class="separator:a29bcfd311e7858237139c52fa164728d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afe14ec8c85deabba0ae8f43d80415b39"><td class="memItemLeft" align="right" valign="top"><a id="afe14ec8c85deabba0ae8f43d80415b39"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_RTC</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a29bcfd311e7858237139c52fa164728d">MCLK_APBAMASK_RTC_Pos</a>)</td></tr>
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<tr class="separator:afe14ec8c85deabba0ae8f43d80415b39"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5071841327f5691fad5aaa64928723b4"><td class="memItemLeft" align="right" valign="top"><a id="a5071841327f5691fad5aaa64928723b4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a5071841327f5691fad5aaa64928723b4">MCLK_APBAMASK_EIC_Pos</a>   10</td></tr>
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<tr class="memdesc:a5071841327f5691fad5aaa64928723b4"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBAMASK) EIC APB Clock Enable <br /></td></tr>
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<tr class="separator:a5071841327f5691fad5aaa64928723b4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6d055e2f0b11b2e2892aa84f9d2d28a3"><td class="memItemLeft" align="right" valign="top"><a id="a6d055e2f0b11b2e2892aa84f9d2d28a3"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_EIC</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a5071841327f5691fad5aaa64928723b4">MCLK_APBAMASK_EIC_Pos</a>)</td></tr>
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<tr class="separator:a6d055e2f0b11b2e2892aa84f9d2d28a3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acf54f7ce88550526bfc9800583a180ae"><td class="memItemLeft" align="right" valign="top"><a id="acf54f7ce88550526bfc9800583a180ae"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#acf54f7ce88550526bfc9800583a180ae">MCLK_APBAMASK_FREQM_Pos</a>   11</td></tr>
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<tr class="memdesc:acf54f7ce88550526bfc9800583a180ae"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBAMASK) FREQM APB Clock Enable <br /></td></tr>
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<tr class="separator:acf54f7ce88550526bfc9800583a180ae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a23222c972798f6be47d548802109db0a"><td class="memItemLeft" align="right" valign="top"><a id="a23222c972798f6be47d548802109db0a"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_FREQM</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#acf54f7ce88550526bfc9800583a180ae">MCLK_APBAMASK_FREQM_Pos</a>)</td></tr>
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<tr class="separator:a23222c972798f6be47d548802109db0a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a51a1701f5148614ae7068e73e4fa46df"><td class="memItemLeft" align="right" valign="top"><a id="a51a1701f5148614ae7068e73e4fa46df"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a51a1701f5148614ae7068e73e4fa46df">MCLK_APBAMASK_SERCOM0_Pos</a>   12</td></tr>
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<tr class="memdesc:a51a1701f5148614ae7068e73e4fa46df"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBAMASK) SERCOM0 APB Clock Enable <br /></td></tr>
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<tr class="separator:a51a1701f5148614ae7068e73e4fa46df"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afafeac9b39381014a94dbe3ab3f2ce51"><td class="memItemLeft" align="right" valign="top"><a id="afafeac9b39381014a94dbe3ab3f2ce51"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_SERCOM0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a51a1701f5148614ae7068e73e4fa46df">MCLK_APBAMASK_SERCOM0_Pos</a>)</td></tr>
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<tr class="separator:afafeac9b39381014a94dbe3ab3f2ce51"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad7c8b0f983278890160b98943182947b"><td class="memItemLeft" align="right" valign="top"><a id="ad7c8b0f983278890160b98943182947b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ad7c8b0f983278890160b98943182947b">MCLK_APBAMASK_SERCOM1_Pos</a>   13</td></tr>
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<tr class="memdesc:ad7c8b0f983278890160b98943182947b"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBAMASK) SERCOM1 APB Clock Enable <br /></td></tr>
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<tr class="separator:ad7c8b0f983278890160b98943182947b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a16d03f91d00bd6afa4786def21512f1b"><td class="memItemLeft" align="right" valign="top"><a id="a16d03f91d00bd6afa4786def21512f1b"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_SERCOM1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#ad7c8b0f983278890160b98943182947b">MCLK_APBAMASK_SERCOM1_Pos</a>)</td></tr>
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<tr class="separator:a16d03f91d00bd6afa4786def21512f1b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:adafd8598fbe6998d741a4db76ae10819"><td class="memItemLeft" align="right" valign="top"><a id="adafd8598fbe6998d741a4db76ae10819"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#adafd8598fbe6998d741a4db76ae10819">MCLK_APBAMASK_TC0_Pos</a>   14</td></tr>
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<tr class="memdesc:adafd8598fbe6998d741a4db76ae10819"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBAMASK) TC0 APB Clock Enable <br /></td></tr>
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<tr class="separator:adafd8598fbe6998d741a4db76ae10819"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a50b05d23c3d43656035d0e51e12d4e52"><td class="memItemLeft" align="right" valign="top"><a id="a50b05d23c3d43656035d0e51e12d4e52"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_TC0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#adafd8598fbe6998d741a4db76ae10819">MCLK_APBAMASK_TC0_Pos</a>)</td></tr>
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<tr class="separator:a50b05d23c3d43656035d0e51e12d4e52"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aadeb489d48264708c10f7d267b8a5365"><td class="memItemLeft" align="right" valign="top"><a id="aadeb489d48264708c10f7d267b8a5365"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#aadeb489d48264708c10f7d267b8a5365">MCLK_APBAMASK_TC1_Pos</a>   15</td></tr>
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<tr class="memdesc:aadeb489d48264708c10f7d267b8a5365"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBAMASK) TC1 APB Clock Enable <br /></td></tr>
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<tr class="separator:aadeb489d48264708c10f7d267b8a5365"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a86f39ab1290a38251536e5469e3fe6fe"><td class="memItemLeft" align="right" valign="top"><a id="a86f39ab1290a38251536e5469e3fe6fe"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBAMASK_TC1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#aadeb489d48264708c10f7d267b8a5365">MCLK_APBAMASK_TC1_Pos</a>)</td></tr>
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<tr class="separator:a86f39ab1290a38251536e5469e3fe6fe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a85274982e658543846410257d8741368"><td class="memItemLeft" align="right" valign="top"><a id="a85274982e658543846410257d8741368"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a85274982e658543846410257d8741368">MCLK_APBAMASK_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000FFFF)</td></tr>
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<tr class="memdesc:a85274982e658543846410257d8741368"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBAMASK) MASK Register <br /></td></tr>
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<tr class="separator:a85274982e658543846410257d8741368"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8c35b6e1cf5ad6b7de3361646bc0510f"><td class="memItemLeft" align="right" valign="top"><a id="a8c35b6e1cf5ad6b7de3361646bc0510f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a8c35b6e1cf5ad6b7de3361646bc0510f">MCLK_APBBMASK_OFFSET</a>   0x18</td></tr>
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<tr class="memdesc:a8c35b6e1cf5ad6b7de3361646bc0510f"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBBMASK offset) APBB Mask <br /></td></tr>
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<tr class="separator:a8c35b6e1cf5ad6b7de3361646bc0510f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7784f1cdd1314b91b3004070e1fc4b8b"><td class="memItemLeft" align="right" valign="top"><a id="a7784f1cdd1314b91b3004070e1fc4b8b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a7784f1cdd1314b91b3004070e1fc4b8b">MCLK_APBBMASK_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00018056)</td></tr>
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<tr class="memdesc:a7784f1cdd1314b91b3004070e1fc4b8b"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBBMASK reset_value) APBB Mask <br /></td></tr>
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<tr class="separator:a7784f1cdd1314b91b3004070e1fc4b8b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af21d2c3cd0e5edba8c2ad9db99d97a37"><td class="memItemLeft" align="right" valign="top"><a id="af21d2c3cd0e5edba8c2ad9db99d97a37"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#af21d2c3cd0e5edba8c2ad9db99d97a37">MCLK_APBBMASK_USB_Pos</a>   0</td></tr>
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<tr class="memdesc:af21d2c3cd0e5edba8c2ad9db99d97a37"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBBMASK) USB APB Clock Enable <br /></td></tr>
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<tr class="separator:af21d2c3cd0e5edba8c2ad9db99d97a37"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aaf842d3fb3e5253ed4f5aa5022143020"><td class="memItemLeft" align="right" valign="top"><a id="aaf842d3fb3e5253ed4f5aa5022143020"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_USB</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#af21d2c3cd0e5edba8c2ad9db99d97a37">MCLK_APBBMASK_USB_Pos</a>)</td></tr>
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<tr class="separator:aaf842d3fb3e5253ed4f5aa5022143020"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a04d6d13ad8ea21c5493c88e22b64900b"><td class="memItemLeft" align="right" valign="top"><a id="a04d6d13ad8ea21c5493c88e22b64900b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a04d6d13ad8ea21c5493c88e22b64900b">MCLK_APBBMASK_DSU_Pos</a>   1</td></tr>
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<tr class="memdesc:a04d6d13ad8ea21c5493c88e22b64900b"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBBMASK) DSU APB Clock Enable <br /></td></tr>
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<tr class="separator:a04d6d13ad8ea21c5493c88e22b64900b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab5389d85bf558511dcf954f5e2eb47a2"><td class="memItemLeft" align="right" valign="top"><a id="ab5389d85bf558511dcf954f5e2eb47a2"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_DSU</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a04d6d13ad8ea21c5493c88e22b64900b">MCLK_APBBMASK_DSU_Pos</a>)</td></tr>
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<tr class="separator:ab5389d85bf558511dcf954f5e2eb47a2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00e3c7c7c317a8a1a2e828ed35e38993"><td class="memItemLeft" align="right" valign="top"><a id="a00e3c7c7c317a8a1a2e828ed35e38993"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a00e3c7c7c317a8a1a2e828ed35e38993">MCLK_APBBMASK_NVMCTRL_Pos</a>   2</td></tr>
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<tr class="memdesc:a00e3c7c7c317a8a1a2e828ed35e38993"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBBMASK) NVMCTRL APB Clock Enable <br /></td></tr>
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<tr class="separator:a00e3c7c7c317a8a1a2e828ed35e38993"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a859d088ecae69a31dab834572749a8c3"><td class="memItemLeft" align="right" valign="top"><a id="a859d088ecae69a31dab834572749a8c3"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_NVMCTRL</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a00e3c7c7c317a8a1a2e828ed35e38993">MCLK_APBBMASK_NVMCTRL_Pos</a>)</td></tr>
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<tr class="separator:a859d088ecae69a31dab834572749a8c3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae3ed73b717df511384b9192f5ff8a411"><td class="memItemLeft" align="right" valign="top"><a id="ae3ed73b717df511384b9192f5ff8a411"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ae3ed73b717df511384b9192f5ff8a411">MCLK_APBBMASK_PORT_Pos</a>   4</td></tr>
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<tr class="memdesc:ae3ed73b717df511384b9192f5ff8a411"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBBMASK) PORT APB Clock Enable <br /></td></tr>
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<tr class="separator:ae3ed73b717df511384b9192f5ff8a411"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac48516538ef3eebd17549615ee24c9b6"><td class="memItemLeft" align="right" valign="top"><a id="ac48516538ef3eebd17549615ee24c9b6"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_PORT</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#ae3ed73b717df511384b9192f5ff8a411">MCLK_APBBMASK_PORT_Pos</a>)</td></tr>
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<tr class="separator:ac48516538ef3eebd17549615ee24c9b6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac9b7b578f7a12e80c52cb5f536ffbfc6"><td class="memItemLeft" align="right" valign="top"><a id="ac9b7b578f7a12e80c52cb5f536ffbfc6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ac9b7b578f7a12e80c52cb5f536ffbfc6">MCLK_APBBMASK_HMATRIX_Pos</a>   6</td></tr>
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<tr class="memdesc:ac9b7b578f7a12e80c52cb5f536ffbfc6"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBBMASK) HMATRIX APB Clock Enable <br /></td></tr>
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<tr class="separator:ac9b7b578f7a12e80c52cb5f536ffbfc6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2999fe05e94e0a386aa5588882fab286"><td class="memItemLeft" align="right" valign="top"><a id="a2999fe05e94e0a386aa5588882fab286"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_HMATRIX</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#ac9b7b578f7a12e80c52cb5f536ffbfc6">MCLK_APBBMASK_HMATRIX_Pos</a>)</td></tr>
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<tr class="separator:a2999fe05e94e0a386aa5588882fab286"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acfef8c4d439e6c9c2474a3dba130a9ee"><td class="memItemLeft" align="right" valign="top"><a id="acfef8c4d439e6c9c2474a3dba130a9ee"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#acfef8c4d439e6c9c2474a3dba130a9ee">MCLK_APBBMASK_EVSYS_Pos</a>   7</td></tr>
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<tr class="memdesc:acfef8c4d439e6c9c2474a3dba130a9ee"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBBMASK) EVSYS APB Clock Enable <br /></td></tr>
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<tr class="separator:acfef8c4d439e6c9c2474a3dba130a9ee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a45fb1a7f85617996e24488257aca4528"><td class="memItemLeft" align="right" valign="top"><a id="a45fb1a7f85617996e24488257aca4528"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_EVSYS</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#acfef8c4d439e6c9c2474a3dba130a9ee">MCLK_APBBMASK_EVSYS_Pos</a>)</td></tr>
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<tr class="separator:a45fb1a7f85617996e24488257aca4528"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae601a75e252448b9b3ac8b7976bc06b4"><td class="memItemLeft" align="right" valign="top"><a id="ae601a75e252448b9b3ac8b7976bc06b4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ae601a75e252448b9b3ac8b7976bc06b4">MCLK_APBBMASK_SERCOM2_Pos</a>   9</td></tr>
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<tr class="memdesc:ae601a75e252448b9b3ac8b7976bc06b4"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBBMASK) SERCOM2 APB Clock Enable <br /></td></tr>
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<tr class="separator:ae601a75e252448b9b3ac8b7976bc06b4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3874131ae9a4607a20826745f68cdd78"><td class="memItemLeft" align="right" valign="top"><a id="a3874131ae9a4607a20826745f68cdd78"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_SERCOM2</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#ae601a75e252448b9b3ac8b7976bc06b4">MCLK_APBBMASK_SERCOM2_Pos</a>)</td></tr>
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<tr class="separator:a3874131ae9a4607a20826745f68cdd78"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a79d8ab6fd56bcdd7e7b512b076b86846"><td class="memItemLeft" align="right" valign="top"><a id="a79d8ab6fd56bcdd7e7b512b076b86846"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a79d8ab6fd56bcdd7e7b512b076b86846">MCLK_APBBMASK_SERCOM3_Pos</a>   10</td></tr>
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<tr class="memdesc:a79d8ab6fd56bcdd7e7b512b076b86846"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBBMASK) SERCOM3 APB Clock Enable <br /></td></tr>
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<tr class="separator:a79d8ab6fd56bcdd7e7b512b076b86846"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a392ccd3038bed163c68bed3fe62f4bde"><td class="memItemLeft" align="right" valign="top"><a id="a392ccd3038bed163c68bed3fe62f4bde"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_SERCOM3</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a79d8ab6fd56bcdd7e7b512b076b86846">MCLK_APBBMASK_SERCOM3_Pos</a>)</td></tr>
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<tr class="separator:a392ccd3038bed163c68bed3fe62f4bde"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a49d92e93709a54e3d7d92f7c14a9cec1"><td class="memItemLeft" align="right" valign="top"><a id="a49d92e93709a54e3d7d92f7c14a9cec1"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a49d92e93709a54e3d7d92f7c14a9cec1">MCLK_APBBMASK_TCC0_Pos</a>   11</td></tr>
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<tr class="memdesc:a49d92e93709a54e3d7d92f7c14a9cec1"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBBMASK) TCC0 APB Clock Enable <br /></td></tr>
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<tr class="separator:a49d92e93709a54e3d7d92f7c14a9cec1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a68b80a94e8ba65b1006ac890ad4e93b1"><td class="memItemLeft" align="right" valign="top"><a id="a68b80a94e8ba65b1006ac890ad4e93b1"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_TCC0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a49d92e93709a54e3d7d92f7c14a9cec1">MCLK_APBBMASK_TCC0_Pos</a>)</td></tr>
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<tr class="separator:a68b80a94e8ba65b1006ac890ad4e93b1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a481a03f2e4cace02a94025c9e0790da5"><td class="memItemLeft" align="right" valign="top"><a id="a481a03f2e4cace02a94025c9e0790da5"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a481a03f2e4cace02a94025c9e0790da5">MCLK_APBBMASK_TCC1_Pos</a>   12</td></tr>
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<tr class="memdesc:a481a03f2e4cace02a94025c9e0790da5"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBBMASK) TCC1 APB Clock Enable <br /></td></tr>
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<tr class="separator:a481a03f2e4cace02a94025c9e0790da5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4211ddfcdf47d220e3abbffa071318f1"><td class="memItemLeft" align="right" valign="top"><a id="a4211ddfcdf47d220e3abbffa071318f1"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_TCC1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a481a03f2e4cace02a94025c9e0790da5">MCLK_APBBMASK_TCC1_Pos</a>)</td></tr>
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<tr class="separator:a4211ddfcdf47d220e3abbffa071318f1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acf6f153dbd6855a2250546f855a8c781"><td class="memItemLeft" align="right" valign="top"><a id="acf6f153dbd6855a2250546f855a8c781"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#acf6f153dbd6855a2250546f855a8c781">MCLK_APBBMASK_TC2_Pos</a>   13</td></tr>
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<tr class="memdesc:acf6f153dbd6855a2250546f855a8c781"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBBMASK) TC2 APB Clock Enable <br /></td></tr>
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<tr class="memitem:a58d80c8a9418062ebe66d6e5773a7b49"><td class="memItemLeft" align="right" valign="top"><a id="a58d80c8a9418062ebe66d6e5773a7b49"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_TC2</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#acf6f153dbd6855a2250546f855a8c781">MCLK_APBBMASK_TC2_Pos</a>)</td></tr>
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<tr class="separator:a58d80c8a9418062ebe66d6e5773a7b49"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7365f0e61af5bf7f97d074e8f3987d54"><td class="memItemLeft" align="right" valign="top"><a id="a7365f0e61af5bf7f97d074e8f3987d54"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a7365f0e61af5bf7f97d074e8f3987d54">MCLK_APBBMASK_TC3_Pos</a>   14</td></tr>
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<tr class="memdesc:a7365f0e61af5bf7f97d074e8f3987d54"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBBMASK) TC3 APB Clock Enable <br /></td></tr>
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<tr class="separator:a7365f0e61af5bf7f97d074e8f3987d54"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae99cefb7c2795c08101eafe736e789e4"><td class="memItemLeft" align="right" valign="top"><a id="ae99cefb7c2795c08101eafe736e789e4"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_TC3</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a7365f0e61af5bf7f97d074e8f3987d54">MCLK_APBBMASK_TC3_Pos</a>)</td></tr>
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<tr class="separator:ae99cefb7c2795c08101eafe736e789e4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7a77772f140e3aeb2d58634ec4b1b206"><td class="memItemLeft" align="right" valign="top"><a id="a7a77772f140e3aeb2d58634ec4b1b206"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a7a77772f140e3aeb2d58634ec4b1b206">MCLK_APBBMASK_RAMECC_Pos</a>   16</td></tr>
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<tr class="memdesc:a7a77772f140e3aeb2d58634ec4b1b206"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBBMASK) RAMECC APB Clock Enable <br /></td></tr>
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<tr class="separator:a7a77772f140e3aeb2d58634ec4b1b206"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae27baf5c2b4c0640a11854d00b43db94"><td class="memItemLeft" align="right" valign="top"><a id="ae27baf5c2b4c0640a11854d00b43db94"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBBMASK_RAMECC</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a7a77772f140e3aeb2d58634ec4b1b206">MCLK_APBBMASK_RAMECC_Pos</a>)</td></tr>
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<tr class="separator:ae27baf5c2b4c0640a11854d00b43db94"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a17175a488d06a4b52abab2d654660456"><td class="memItemLeft" align="right" valign="top"><a id="a17175a488d06a4b52abab2d654660456"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a17175a488d06a4b52abab2d654660456">MCLK_APBBMASK_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00017ED7)</td></tr>
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<tr class="memdesc:a17175a488d06a4b52abab2d654660456"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBBMASK) MASK Register <br /></td></tr>
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<tr class="separator:a17175a488d06a4b52abab2d654660456"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9adc77e1bade5beba117c02998b80574"><td class="memItemLeft" align="right" valign="top"><a id="a9adc77e1bade5beba117c02998b80574"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a9adc77e1bade5beba117c02998b80574">MCLK_APBCMASK_OFFSET</a>   0x1C</td></tr>
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<tr class="memdesc:a9adc77e1bade5beba117c02998b80574"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBCMASK offset) APBC Mask <br /></td></tr>
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<tr class="separator:a9adc77e1bade5beba117c02998b80574"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad844382addaec4552ab75518ff2d7e74"><td class="memItemLeft" align="right" valign="top"><a id="ad844382addaec4552ab75518ff2d7e74"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ad844382addaec4552ab75518ff2d7e74">MCLK_APBCMASK_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00002000)</td></tr>
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<tr class="memdesc:ad844382addaec4552ab75518ff2d7e74"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBCMASK reset_value) APBC Mask <br /></td></tr>
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<tr class="separator:ad844382addaec4552ab75518ff2d7e74"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aef22e33ee071b1ab1e044ebfec61ecc3"><td class="memItemLeft" align="right" valign="top"><a id="aef22e33ee071b1ab1e044ebfec61ecc3"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#aef22e33ee071b1ab1e044ebfec61ecc3">MCLK_APBCMASK_GMAC_Pos</a>   2</td></tr>
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<tr class="memdesc:aef22e33ee071b1ab1e044ebfec61ecc3"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBCMASK) GMAC APB Clock Enable <br /></td></tr>
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<tr class="separator:aef22e33ee071b1ab1e044ebfec61ecc3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8a250097503b003b4a03734466e845f6"><td class="memItemLeft" align="right" valign="top"><a id="a8a250097503b003b4a03734466e845f6"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBCMASK_GMAC</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#aef22e33ee071b1ab1e044ebfec61ecc3">MCLK_APBCMASK_GMAC_Pos</a>)</td></tr>
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<tr class="separator:a8a250097503b003b4a03734466e845f6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4f871f80238ad9bbb73e2f8656a9e59d"><td class="memItemLeft" align="right" valign="top"><a id="a4f871f80238ad9bbb73e2f8656a9e59d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a4f871f80238ad9bbb73e2f8656a9e59d">MCLK_APBCMASK_TCC2_Pos</a>   3</td></tr>
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<tr class="memdesc:a4f871f80238ad9bbb73e2f8656a9e59d"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBCMASK) TCC2 APB Clock Enable <br /></td></tr>
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<tr class="separator:a4f871f80238ad9bbb73e2f8656a9e59d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a19eb46ff025f9b876d0bb25038a441c9"><td class="memItemLeft" align="right" valign="top"><a id="a19eb46ff025f9b876d0bb25038a441c9"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBCMASK_TCC2</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a4f871f80238ad9bbb73e2f8656a9e59d">MCLK_APBCMASK_TCC2_Pos</a>)</td></tr>
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<tr class="separator:a19eb46ff025f9b876d0bb25038a441c9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6be7119f990531600e4f658bd3df0c0a"><td class="memItemLeft" align="right" valign="top"><a id="a6be7119f990531600e4f658bd3df0c0a"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a6be7119f990531600e4f658bd3df0c0a">MCLK_APBCMASK_TCC3_Pos</a>   4</td></tr>
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<tr class="memdesc:a6be7119f990531600e4f658bd3df0c0a"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBCMASK) TCC3 APB Clock Enable <br /></td></tr>
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<tr class="separator:a6be7119f990531600e4f658bd3df0c0a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9758b431d93e3894c3fe720deda7fd31"><td class="memItemLeft" align="right" valign="top"><a id="a9758b431d93e3894c3fe720deda7fd31"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBCMASK_TCC3</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a6be7119f990531600e4f658bd3df0c0a">MCLK_APBCMASK_TCC3_Pos</a>)</td></tr>
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<tr class="separator:a9758b431d93e3894c3fe720deda7fd31"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7c886e1ff64370722c150d44200b66df"><td class="memItemLeft" align="right" valign="top"><a id="a7c886e1ff64370722c150d44200b66df"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a7c886e1ff64370722c150d44200b66df">MCLK_APBCMASK_TC4_Pos</a>   5</td></tr>
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<tr class="memdesc:a7c886e1ff64370722c150d44200b66df"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBCMASK) TC4 APB Clock Enable <br /></td></tr>
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<tr class="separator:a7c886e1ff64370722c150d44200b66df"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3a1778059083d7beccce4de916cde4d1"><td class="memItemLeft" align="right" valign="top"><a id="a3a1778059083d7beccce4de916cde4d1"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBCMASK_TC4</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a7c886e1ff64370722c150d44200b66df">MCLK_APBCMASK_TC4_Pos</a>)</td></tr>
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<tr class="separator:a3a1778059083d7beccce4de916cde4d1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0da39e4b06b949c2cbb3e9b54637fb53"><td class="memItemLeft" align="right" valign="top"><a id="a0da39e4b06b949c2cbb3e9b54637fb53"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a0da39e4b06b949c2cbb3e9b54637fb53">MCLK_APBCMASK_TC5_Pos</a>   6</td></tr>
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<tr class="memdesc:a0da39e4b06b949c2cbb3e9b54637fb53"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBCMASK) TC5 APB Clock Enable <br /></td></tr>
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<tr class="separator:a0da39e4b06b949c2cbb3e9b54637fb53"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3dcb40f25867848c6b756923c0fda5e7"><td class="memItemLeft" align="right" valign="top"><a id="a3dcb40f25867848c6b756923c0fda5e7"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBCMASK_TC5</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a0da39e4b06b949c2cbb3e9b54637fb53">MCLK_APBCMASK_TC5_Pos</a>)</td></tr>
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<tr class="separator:a3dcb40f25867848c6b756923c0fda5e7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a18d7a4cb62e3d42e28bb3d1824cf8898"><td class="memItemLeft" align="right" valign="top"><a id="a18d7a4cb62e3d42e28bb3d1824cf8898"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a18d7a4cb62e3d42e28bb3d1824cf8898">MCLK_APBCMASK_PDEC_Pos</a>   7</td></tr>
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<tr class="memdesc:a18d7a4cb62e3d42e28bb3d1824cf8898"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBCMASK) PDEC APB Clock Enable <br /></td></tr>
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<tr class="separator:a18d7a4cb62e3d42e28bb3d1824cf8898"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9257cf0e4446f1cb108b8476dcef2316"><td class="memItemLeft" align="right" valign="top"><a id="a9257cf0e4446f1cb108b8476dcef2316"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBCMASK_PDEC</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a18d7a4cb62e3d42e28bb3d1824cf8898">MCLK_APBCMASK_PDEC_Pos</a>)</td></tr>
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<tr class="separator:a9257cf0e4446f1cb108b8476dcef2316"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae827c5e608f07904b393f4d5fcff1e48"><td class="memItemLeft" align="right" valign="top"><a id="ae827c5e608f07904b393f4d5fcff1e48"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ae827c5e608f07904b393f4d5fcff1e48">MCLK_APBCMASK_AC_Pos</a>   8</td></tr>
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<tr class="memdesc:ae827c5e608f07904b393f4d5fcff1e48"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBCMASK) AC APB Clock Enable <br /></td></tr>
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<tr class="separator:ae827c5e608f07904b393f4d5fcff1e48"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad095b535643944ec2888096b85824a18"><td class="memItemLeft" align="right" valign="top"><a id="ad095b535643944ec2888096b85824a18"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBCMASK_AC</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#ae827c5e608f07904b393f4d5fcff1e48">MCLK_APBCMASK_AC_Pos</a>)</td></tr>
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<tr class="separator:ad095b535643944ec2888096b85824a18"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afe03bc583599946038f7e2de91be340c"><td class="memItemLeft" align="right" valign="top"><a id="afe03bc583599946038f7e2de91be340c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#afe03bc583599946038f7e2de91be340c">MCLK_APBCMASK_AES_Pos</a>   9</td></tr>
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<tr class="memdesc:afe03bc583599946038f7e2de91be340c"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBCMASK) AES APB Clock Enable <br /></td></tr>
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<tr class="separator:afe03bc583599946038f7e2de91be340c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2ba4d5128ce2cd738d9019fa127815e0"><td class="memItemLeft" align="right" valign="top"><a id="a2ba4d5128ce2cd738d9019fa127815e0"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBCMASK_AES</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#afe03bc583599946038f7e2de91be340c">MCLK_APBCMASK_AES_Pos</a>)</td></tr>
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<tr class="separator:a2ba4d5128ce2cd738d9019fa127815e0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a398240eb1bf125624011e74222087b4f"><td class="memItemLeft" align="right" valign="top"><a id="a398240eb1bf125624011e74222087b4f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a398240eb1bf125624011e74222087b4f">MCLK_APBCMASK_TRNG_Pos</a>   10</td></tr>
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<tr class="memdesc:a398240eb1bf125624011e74222087b4f"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBCMASK) TRNG APB Clock Enable <br /></td></tr>
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<tr class="separator:a398240eb1bf125624011e74222087b4f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1a40fe05d77739123054498e7b303d3b"><td class="memItemLeft" align="right" valign="top"><a id="a1a40fe05d77739123054498e7b303d3b"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBCMASK_TRNG</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a398240eb1bf125624011e74222087b4f">MCLK_APBCMASK_TRNG_Pos</a>)</td></tr>
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<tr class="separator:a1a40fe05d77739123054498e7b303d3b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac1c36e384d318f08af381e7cf4e0b0f4"><td class="memItemLeft" align="right" valign="top"><a id="ac1c36e384d318f08af381e7cf4e0b0f4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ac1c36e384d318f08af381e7cf4e0b0f4">MCLK_APBCMASK_ICM_Pos</a>   11</td></tr>
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<tr class="memdesc:ac1c36e384d318f08af381e7cf4e0b0f4"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBCMASK) ICM APB Clock Enable <br /></td></tr>
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<tr class="separator:ac1c36e384d318f08af381e7cf4e0b0f4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acee93335196a4270f58dd68e6459dc7f"><td class="memItemLeft" align="right" valign="top"><a id="acee93335196a4270f58dd68e6459dc7f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBCMASK_ICM</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#ac1c36e384d318f08af381e7cf4e0b0f4">MCLK_APBCMASK_ICM_Pos</a>)</td></tr>
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<tr class="memitem:ab7812fa73c364fea3539d9ac04cf0bf7"><td class="memItemLeft" align="right" valign="top"><a id="ab7812fa73c364fea3539d9ac04cf0bf7"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ab7812fa73c364fea3539d9ac04cf0bf7">MCLK_APBCMASK_QSPI_Pos</a>   13</td></tr>
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<tr class="memdesc:ab7812fa73c364fea3539d9ac04cf0bf7"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBCMASK) QSPI APB Clock Enable <br /></td></tr>
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<tr class="memitem:a4408eafa58b6c74a709abac439af2eba"><td class="memItemLeft" align="right" valign="top"><a id="a4408eafa58b6c74a709abac439af2eba"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBCMASK_QSPI</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#ab7812fa73c364fea3539d9ac04cf0bf7">MCLK_APBCMASK_QSPI_Pos</a>)</td></tr>
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<tr class="separator:a4408eafa58b6c74a709abac439af2eba"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4759ecc97b02d665427b2cb1a198e827"><td class="memItemLeft" align="right" valign="top"><a id="a4759ecc97b02d665427b2cb1a198e827"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a4759ecc97b02d665427b2cb1a198e827">MCLK_APBCMASK_CCL_Pos</a>   14</td></tr>
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<tr class="memdesc:a4759ecc97b02d665427b2cb1a198e827"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBCMASK) CCL APB Clock Enable <br /></td></tr>
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<tr class="separator:a4759ecc97b02d665427b2cb1a198e827"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad9e4b5a77d70d31e772500706ac34169"><td class="memItemLeft" align="right" valign="top"><a id="ad9e4b5a77d70d31e772500706ac34169"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBCMASK_CCL</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a4759ecc97b02d665427b2cb1a198e827">MCLK_APBCMASK_CCL_Pos</a>)</td></tr>
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<tr class="separator:ad9e4b5a77d70d31e772500706ac34169"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aecd8f6d7a986889c2f43a65a506bd42e"><td class="memItemLeft" align="right" valign="top"><a id="aecd8f6d7a986889c2f43a65a506bd42e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#aecd8f6d7a986889c2f43a65a506bd42e">MCLK_APBCMASK_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00006FFC)</td></tr>
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<tr class="memdesc:aecd8f6d7a986889c2f43a65a506bd42e"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBCMASK) MASK Register <br /></td></tr>
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<tr class="memitem:a7a00f8f628fc059b0ffcc36d2343c212"><td class="memItemLeft" align="right" valign="top"><a id="a7a00f8f628fc059b0ffcc36d2343c212"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a7a00f8f628fc059b0ffcc36d2343c212">MCLK_APBDMASK_OFFSET</a>   0x20</td></tr>
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<tr class="memdesc:a7a00f8f628fc059b0ffcc36d2343c212"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBDMASK offset) APBD Mask <br /></td></tr>
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<tr class="separator:a7a00f8f628fc059b0ffcc36d2343c212"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:affe228d4015871770d9c2ac2d3e23349"><td class="memItemLeft" align="right" valign="top"><a id="affe228d4015871770d9c2ac2d3e23349"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#affe228d4015871770d9c2ac2d3e23349">MCLK_APBDMASK_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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<tr class="memdesc:affe228d4015871770d9c2ac2d3e23349"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBDMASK reset_value) APBD Mask <br /></td></tr>
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<tr class="separator:affe228d4015871770d9c2ac2d3e23349"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae97f2a7876a603ea76ee86f5e099c269"><td class="memItemLeft" align="right" valign="top"><a id="ae97f2a7876a603ea76ee86f5e099c269"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ae97f2a7876a603ea76ee86f5e099c269">MCLK_APBDMASK_SERCOM4_Pos</a>   0</td></tr>
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<tr class="memdesc:ae97f2a7876a603ea76ee86f5e099c269"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBDMASK) SERCOM4 APB Clock Enable <br /></td></tr>
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<tr class="separator:ae97f2a7876a603ea76ee86f5e099c269"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a677b71b3e76ec21d07249736a2346d63"><td class="memItemLeft" align="right" valign="top"><a id="a677b71b3e76ec21d07249736a2346d63"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBDMASK_SERCOM4</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#ae97f2a7876a603ea76ee86f5e099c269">MCLK_APBDMASK_SERCOM4_Pos</a>)</td></tr>
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<tr class="separator:a677b71b3e76ec21d07249736a2346d63"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0860f3d77409f156d996a776493af3a9"><td class="memItemLeft" align="right" valign="top"><a id="a0860f3d77409f156d996a776493af3a9"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a0860f3d77409f156d996a776493af3a9">MCLK_APBDMASK_SERCOM5_Pos</a>   1</td></tr>
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<tr class="memdesc:a0860f3d77409f156d996a776493af3a9"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBDMASK) SERCOM5 APB Clock Enable <br /></td></tr>
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<tr class="separator:a0860f3d77409f156d996a776493af3a9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1fe54d279cd69d48baff8dfd429f3169"><td class="memItemLeft" align="right" valign="top"><a id="a1fe54d279cd69d48baff8dfd429f3169"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBDMASK_SERCOM5</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a0860f3d77409f156d996a776493af3a9">MCLK_APBDMASK_SERCOM5_Pos</a>)</td></tr>
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<tr class="separator:a1fe54d279cd69d48baff8dfd429f3169"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1d520be70a0ed4fca667c58341d99620"><td class="memItemLeft" align="right" valign="top"><a id="a1d520be70a0ed4fca667c58341d99620"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a1d520be70a0ed4fca667c58341d99620">MCLK_APBDMASK_SERCOM6_Pos</a>   2</td></tr>
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<tr class="memdesc:a1d520be70a0ed4fca667c58341d99620"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBDMASK) SERCOM6 APB Clock Enable <br /></td></tr>
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<tr class="separator:a1d520be70a0ed4fca667c58341d99620"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af8dac8466a60198c95110d9d6c492c96"><td class="memItemLeft" align="right" valign="top"><a id="af8dac8466a60198c95110d9d6c492c96"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBDMASK_SERCOM6</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a1d520be70a0ed4fca667c58341d99620">MCLK_APBDMASK_SERCOM6_Pos</a>)</td></tr>
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<tr class="separator:af8dac8466a60198c95110d9d6c492c96"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7d21e2207d86f11b75eb201011fee80e"><td class="memItemLeft" align="right" valign="top"><a id="a7d21e2207d86f11b75eb201011fee80e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a7d21e2207d86f11b75eb201011fee80e">MCLK_APBDMASK_SERCOM7_Pos</a>   3</td></tr>
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<tr class="memdesc:a7d21e2207d86f11b75eb201011fee80e"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBDMASK) SERCOM7 APB Clock Enable <br /></td></tr>
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<tr class="separator:a7d21e2207d86f11b75eb201011fee80e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5e3aed5a0a3947b7484dddc871d991cf"><td class="memItemLeft" align="right" valign="top"><a id="a5e3aed5a0a3947b7484dddc871d991cf"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBDMASK_SERCOM7</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a7d21e2207d86f11b75eb201011fee80e">MCLK_APBDMASK_SERCOM7_Pos</a>)</td></tr>
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<tr class="separator:a5e3aed5a0a3947b7484dddc871d991cf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a11586f55c55a915e5d5ed0f8986abf5d"><td class="memItemLeft" align="right" valign="top"><a id="a11586f55c55a915e5d5ed0f8986abf5d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a11586f55c55a915e5d5ed0f8986abf5d">MCLK_APBDMASK_TCC4_Pos</a>   4</td></tr>
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<tr class="memdesc:a11586f55c55a915e5d5ed0f8986abf5d"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBDMASK) TCC4 APB Clock Enable <br /></td></tr>
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<tr class="separator:a11586f55c55a915e5d5ed0f8986abf5d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a725ccd085cf438b2782342f9879ca49e"><td class="memItemLeft" align="right" valign="top"><a id="a725ccd085cf438b2782342f9879ca49e"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBDMASK_TCC4</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a11586f55c55a915e5d5ed0f8986abf5d">MCLK_APBDMASK_TCC4_Pos</a>)</td></tr>
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<tr class="separator:a725ccd085cf438b2782342f9879ca49e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5e5067b0ea3b8d950adeee60c7e201ef"><td class="memItemLeft" align="right" valign="top"><a id="a5e5067b0ea3b8d950adeee60c7e201ef"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a5e5067b0ea3b8d950adeee60c7e201ef">MCLK_APBDMASK_TC6_Pos</a>   5</td></tr>
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<tr class="memdesc:a5e5067b0ea3b8d950adeee60c7e201ef"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBDMASK) TC6 APB Clock Enable <br /></td></tr>
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<tr class="separator:a5e5067b0ea3b8d950adeee60c7e201ef"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab5415956c94b9ed6c3c7a1d492d39f68"><td class="memItemLeft" align="right" valign="top"><a id="ab5415956c94b9ed6c3c7a1d492d39f68"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBDMASK_TC6</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a5e5067b0ea3b8d950adeee60c7e201ef">MCLK_APBDMASK_TC6_Pos</a>)</td></tr>
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<tr class="separator:ab5415956c94b9ed6c3c7a1d492d39f68"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6ea8876f7f253392f0aa16da779c4d8b"><td class="memItemLeft" align="right" valign="top"><a id="a6ea8876f7f253392f0aa16da779c4d8b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a6ea8876f7f253392f0aa16da779c4d8b">MCLK_APBDMASK_TC7_Pos</a>   6</td></tr>
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<tr class="memdesc:a6ea8876f7f253392f0aa16da779c4d8b"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBDMASK) TC7 APB Clock Enable <br /></td></tr>
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<tr class="separator:a6ea8876f7f253392f0aa16da779c4d8b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3cc86a5ec93be54e2350c02870c78f01"><td class="memItemLeft" align="right" valign="top"><a id="a3cc86a5ec93be54e2350c02870c78f01"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBDMASK_TC7</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a6ea8876f7f253392f0aa16da779c4d8b">MCLK_APBDMASK_TC7_Pos</a>)</td></tr>
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<tr class="separator:a3cc86a5ec93be54e2350c02870c78f01"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aaa0f2c5eb74e0b65cc4338f29f2d69c4"><td class="memItemLeft" align="right" valign="top"><a id="aaa0f2c5eb74e0b65cc4338f29f2d69c4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#aaa0f2c5eb74e0b65cc4338f29f2d69c4">MCLK_APBDMASK_ADC0_Pos</a>   7</td></tr>
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<tr class="memdesc:aaa0f2c5eb74e0b65cc4338f29f2d69c4"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBDMASK) ADC0 APB Clock Enable <br /></td></tr>
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<tr class="separator:aaa0f2c5eb74e0b65cc4338f29f2d69c4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae1bf1878397af217488cd09cc3ef54d0"><td class="memItemLeft" align="right" valign="top"><a id="ae1bf1878397af217488cd09cc3ef54d0"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBDMASK_ADC0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#aaa0f2c5eb74e0b65cc4338f29f2d69c4">MCLK_APBDMASK_ADC0_Pos</a>)</td></tr>
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<tr class="separator:ae1bf1878397af217488cd09cc3ef54d0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aebfa8b7e9a270d649771d8f420fbc2e2"><td class="memItemLeft" align="right" valign="top"><a id="aebfa8b7e9a270d649771d8f420fbc2e2"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#aebfa8b7e9a270d649771d8f420fbc2e2">MCLK_APBDMASK_ADC1_Pos</a>   8</td></tr>
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<tr class="memdesc:aebfa8b7e9a270d649771d8f420fbc2e2"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBDMASK) ADC1 APB Clock Enable <br /></td></tr>
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<tr class="separator:aebfa8b7e9a270d649771d8f420fbc2e2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0f299141230ff4b7eb8d17c8186e5d66"><td class="memItemLeft" align="right" valign="top"><a id="a0f299141230ff4b7eb8d17c8186e5d66"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBDMASK_ADC1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#aebfa8b7e9a270d649771d8f420fbc2e2">MCLK_APBDMASK_ADC1_Pos</a>)</td></tr>
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<tr class="separator:a0f299141230ff4b7eb8d17c8186e5d66"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2d480786af05fb2fd66e9c85a987f855"><td class="memItemLeft" align="right" valign="top"><a id="a2d480786af05fb2fd66e9c85a987f855"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a2d480786af05fb2fd66e9c85a987f855">MCLK_APBDMASK_DAC_Pos</a>   9</td></tr>
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<tr class="memdesc:a2d480786af05fb2fd66e9c85a987f855"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBDMASK) DAC APB Clock Enable <br /></td></tr>
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<tr class="separator:a2d480786af05fb2fd66e9c85a987f855"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a60af11d096e1abf6d627ff35787aba97"><td class="memItemLeft" align="right" valign="top"><a id="a60af11d096e1abf6d627ff35787aba97"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBDMASK_DAC</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a2d480786af05fb2fd66e9c85a987f855">MCLK_APBDMASK_DAC_Pos</a>)</td></tr>
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<tr class="separator:a60af11d096e1abf6d627ff35787aba97"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7675f312a66e9078d114360abaca0d69"><td class="memItemLeft" align="right" valign="top"><a id="a7675f312a66e9078d114360abaca0d69"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#a7675f312a66e9078d114360abaca0d69">MCLK_APBDMASK_I2S_Pos</a>   10</td></tr>
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<tr class="memdesc:a7675f312a66e9078d114360abaca0d69"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBDMASK) I2S APB Clock Enable <br /></td></tr>
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<tr class="separator:a7675f312a66e9078d114360abaca0d69"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:adf22f2d98e071f2c3cb6aaa21caeac17"><td class="memItemLeft" align="right" valign="top"><a id="adf22f2d98e071f2c3cb6aaa21caeac17"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBDMASK_I2S</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#a7675f312a66e9078d114360abaca0d69">MCLK_APBDMASK_I2S_Pos</a>)</td></tr>
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<tr class="separator:adf22f2d98e071f2c3cb6aaa21caeac17"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad4290756f92692a42c7bb1cfaf487d0f"><td class="memItemLeft" align="right" valign="top"><a id="ad4290756f92692a42c7bb1cfaf487d0f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ad4290756f92692a42c7bb1cfaf487d0f">MCLK_APBDMASK_PCC_Pos</a>   11</td></tr>
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<tr class="memdesc:ad4290756f92692a42c7bb1cfaf487d0f"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBDMASK) PCC APB Clock Enable <br /></td></tr>
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<tr class="memitem:a48eefa0719cef17dc8079f05c1b4c2e4"><td class="memItemLeft" align="right" valign="top"><a id="a48eefa0719cef17dc8079f05c1b4c2e4"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>MCLK_APBDMASK_PCC</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2mclk_8h.html#ad4290756f92692a42c7bb1cfaf487d0f">MCLK_APBDMASK_PCC_Pos</a>)</td></tr>
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<tr class="memitem:ad7749cd8272a2d7fdb3faaeaa99e5268"><td class="memItemLeft" align="right" valign="top"><a id="ad7749cd8272a2d7fdb3faaeaa99e5268"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2mclk_8h.html#ad7749cd8272a2d7fdb3faaeaa99e5268">MCLK_APBDMASK_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000FFF)</td></tr>
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<tr class="memdesc:ad7749cd8272a2d7fdb3faaeaa99e5268"><td class="mdescLeft"> </td><td class="mdescRight">(MCLK_APBDMASK) MASK Register <br /></td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<div class="textblock"><p>Component description for MCLK. </p>
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<p>Copyright (c) 2019 Microchip Technology Inc.</p>
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<p>\asf_license_start </p>
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<p class="definition">Definition in file <a class="el" href="component_2mclk_8h_source.html">mclk.h</a>.</p>
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