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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock">
<p class="definition">Definition at line <a class="el" href="sdhc_8h_source.html#l01828">1828</a> of file <a class="el" href="sdhc_8h_source.html">sdhc.h</a>.</p>
</div><h2 class="groupheader">Field Documentation</h2>
<a id="a61daaec3506b8457a631f48d8f0908a3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a61daaec3506b8457a631f48d8f0908a3">&#9670;&nbsp;</a></span>__pad0__</h2>
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<td class="memname">uint32_t SDHC_CA0R_Type::__pad0__</td>
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<p>bit: 6 Reserved <br />
</p>
<p class="definition">Definition at line <a class="el" href="sdhc_8h_source.html#l01831">1831</a> of file <a class="el" href="sdhc_8h_source.html">sdhc.h</a>.</p>
</div>
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<a id="a98e1fac574ff940020f5eb3841aa2c64"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a98e1fac574ff940020f5eb3841aa2c64">&#9670;&nbsp;</a></span>__pad1__</h2>
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<td class="memname">uint32_t SDHC_CA0R_Type::__pad1__</td>
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<p>bit: 20 Reserved <br />
</p>
<p class="definition">Definition at line <a class="el" href="sdhc_8h_source.html#l01837">1837</a> of file <a class="el" href="sdhc_8h_source.html">sdhc.h</a>.</p>
</div>
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<a id="a2b43a750458b2c2fe682c869ffaa9304"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a2b43a750458b2c2fe682c869ffaa9304">&#9670;&nbsp;</a></span>__pad2__</h2>
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<td class="memname">uint32_t SDHC_CA0R_Type::__pad2__</td>
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<p>bit: 27 Reserved <br />
</p>
<p class="definition">Definition at line <a class="el" href="sdhc_8h_source.html#l01844">1844</a> of file <a class="el" href="sdhc_8h_source.html">sdhc.h</a>.</p>
</div>
</div>
<a id="afcee9443a2eec38141cdbe63b44a9428"></a>
<h2 class="memtitle"><span class="permalink"><a href="#afcee9443a2eec38141cdbe63b44a9428">&#9670;&nbsp;</a></span>ADMA2SUP</h2>
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<td class="memname">uint32_t SDHC_CA0R_Type::ADMA2SUP</td>
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<p>bit: 19 ADMA2 Support <br />
</p>
<p class="definition">Definition at line <a class="el" href="sdhc_8h_source.html#l01836">1836</a> of file <a class="el" href="sdhc_8h_source.html">sdhc.h</a>.</p>
</div>
</div>
<a id="a923bc1f041e1e53450231941709a4bc2"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a923bc1f041e1e53450231941709a4bc2">&#9670;&nbsp;</a></span>ASINTSUP</h2>
<div class="memitem">
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<td class="memname">uint32_t SDHC_CA0R_Type::ASINTSUP</td>
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</div><div class="memdoc">
<p>bit: 29 Asynchronous Interrupt Support <br />
</p>
<p class="definition">Definition at line <a class="el" href="sdhc_8h_source.html#l01846">1846</a> of file <a class="el" href="sdhc_8h_source.html">sdhc.h</a>.</p>
</div>
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<a id="a5757edf1247b64c4242c8e666f4401fa"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a5757edf1247b64c4242c8e666f4401fa">&#9670;&nbsp;</a></span>BASECLKF</h2>
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<td class="memname">uint32_t SDHC_CA0R_Type::BASECLKF</td>
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<p>bit: 8..15 Base Clock Frequency <br />
</p>
<p class="definition">Definition at line <a class="el" href="sdhc_8h_source.html#l01833">1833</a> of file <a class="el" href="sdhc_8h_source.html">sdhc.h</a>.</p>
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<a id="af98684934736fbc20caa01aaa2831449"></a>
<h2 class="memtitle"><span class="permalink"><a href="#af98684934736fbc20caa01aaa2831449">&#9670;&nbsp;</a></span>bit</h2>
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<td class="memname">struct { ... } SDHC_CA0R_Type::bit</td>
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<p>Structure used for bit access <br />
</p>
</div>
</div>
<a id="a9b15ae1a043065d2d9711f1c598d2dca"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a9b15ae1a043065d2d9711f1c598d2dca">&#9670;&nbsp;</a></span>ED8SUP</h2>
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<td class="memname">uint32_t SDHC_CA0R_Type::ED8SUP</td>
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<p>bit: 18 8-bit Support for Embedded Device <br />
</p>
<p class="definition">Definition at line <a class="el" href="sdhc_8h_source.html#l01835">1835</a> of file <a class="el" href="sdhc_8h_source.html">sdhc.h</a>.</p>
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<a id="a026cbbd71ffbdc501315a9e19ec71772"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a026cbbd71ffbdc501315a9e19ec71772">&#9670;&nbsp;</a></span>HSSUP</h2>
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<td class="memname">uint32_t SDHC_CA0R_Type::HSSUP</td>
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<p>bit: 21 High Speed Support <br />
</p>
<p class="definition">Definition at line <a class="el" href="sdhc_8h_source.html#l01838">1838</a> of file <a class="el" href="sdhc_8h_source.html">sdhc.h</a>.</p>
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<a id="a86354752832c59a455bc062a791faea8"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a86354752832c59a455bc062a791faea8">&#9670;&nbsp;</a></span>MAXBLKL</h2>
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<td class="memname">uint32_t SDHC_CA0R_Type::MAXBLKL</td>
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<p>bit: 16..17 Max Block Length <br />
</p>
<p class="definition">Definition at line <a class="el" href="sdhc_8h_source.html#l01834">1834</a> of file <a class="el" href="sdhc_8h_source.html">sdhc.h</a>.</p>
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<td class="memname">uint32_t SDHC_CA0R_Type::reg</td>
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<p>Type used for register access <br />
</p>
<p class="definition">Definition at line <a class="el" href="sdhc_8h_source.html#l01849">1849</a> of file <a class="el" href="sdhc_8h_source.html">sdhc.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#aec84c584b451e51f8ae2fdd31d5849e3">&#9670;&nbsp;</a></span>SB64SUP</h2>
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<td class="memname">uint32_t SDHC_CA0R_Type::SB64SUP</td>
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<p>bit: 28 64-Bit System Bus Support <br />
</p>
<p class="definition">Definition at line <a class="el" href="sdhc_8h_source.html#l01845">1845</a> of file <a class="el" href="sdhc_8h_source.html">sdhc.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#ac1310ccf0cac29e545965e69df98d58a">&#9670;&nbsp;</a></span>SDMASUP</h2>
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<p>bit: 22 SDMA Support <br />
</p>
<p class="definition">Definition at line <a class="el" href="sdhc_8h_source.html#l01839">1839</a> of file <a class="el" href="sdhc_8h_source.html">sdhc.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#ae54b5b3ffa39a7da85f22ba702d72417">&#9670;&nbsp;</a></span>SLTYPE</h2>
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<p>bit: 30..31 Slot Type <br />
</p>
<p class="definition">Definition at line <a class="el" href="sdhc_8h_source.html#l01847">1847</a> of file <a class="el" href="sdhc_8h_source.html">sdhc.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#aae220f19cc00e1019706a25ca8f1e163">&#9670;&nbsp;</a></span>SRSUP</h2>
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<p>bit: 23 Suspend/Resume Support <br />
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<p class="definition">Definition at line <a class="el" href="sdhc_8h_source.html#l01840">1840</a> of file <a class="el" href="sdhc_8h_source.html">sdhc.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#adb4ec4b8679d98ea54b6522e4d936f21">&#9670;&nbsp;</a></span>TEOCLKF</h2>
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<p>bit: 0.. 5 Timeout Clock Frequency <br />
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<p class="definition">Definition at line <a class="el" href="sdhc_8h_source.html#l01830">1830</a> of file <a class="el" href="sdhc_8h_source.html">sdhc.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a0a0fa0c90950ecb58d11ec1172a5c54d">&#9670;&nbsp;</a></span>TEOCLKU</h2>
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<p>bit: 7 Timeout Clock Unit <br />
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<p class="definition">Definition at line <a class="el" href="sdhc_8h_source.html#l01832">1832</a> of file <a class="el" href="sdhc_8h_source.html">sdhc.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#ad255f2b897b4081c4ad4ca2fe65dd6ed">&#9670;&nbsp;</a></span>V18VSUP</h2>
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<p>bit: 26 Voltage Support 1.8V <br />
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<p class="definition">Definition at line <a class="el" href="sdhc_8h_source.html#l01843">1843</a> of file <a class="el" href="sdhc_8h_source.html">sdhc.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#aaf34ecf282dd0684e668d46a6cab7ff8">&#9670;&nbsp;</a></span>V30VSUP</h2>
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<p>bit: 25 Voltage Support 3.0V <br />
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<p class="definition">Definition at line <a class="el" href="sdhc_8h_source.html#l01842">1842</a> of file <a class="el" href="sdhc_8h_source.html">sdhc.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a0604a1080cd7aa4c4b76f993577881f7">&#9670;&nbsp;</a></span>V33VSUP</h2>
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<p>bit: 24 Voltage Support 3.3V <br />
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<p class="definition">Definition at line <a class="el" href="sdhc_8h_source.html#l01841">1841</a> of file <a class="el" href="sdhc_8h_source.html">sdhc.h</a>.</p>
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<hr/>The documentation for this union was generated from the following file:<ul>
<li>/storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/<a class="el" href="sdhc_8h_source.html">sdhc.h</a></li>
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