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<tr class="memitem:aad5648a1261cee34645a8284b55b310e"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionQSPI__INSTRFRAME__Type.html#aad5648a1261cee34645a8284b55b310e">reg</a></td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock">
<p class="definition">Definition at line <a class="el" href="component_2qspi_8h_source.html#l00379">379</a> of file <a class="el" href="component_2qspi_8h_source.html">qspi.h</a>.</p>
</div><h2 class="groupheader">Field Documentation</h2>
<a id="a466b46ca78cda0652ff84c94903aafef"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a466b46ca78cda0652ff84c94903aafef">&#9670;&nbsp;</a></span>__pad0__</h2>
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<p>bit: 3 Reserved <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2qspi_8h_source.html#l00382">382</a> of file <a class="el" href="component_2qspi_8h_source.html">qspi.h</a>.</p>
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<a id="a5aa506201c8e8bbbd1ff5a5b6ac7a66f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a5aa506201c8e8bbbd1ff5a5b6ac7a66f">&#9670;&nbsp;</a></span>__pad1__</h2>
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<td class="memname">uint32_t QSPI_INSTRFRAME_Type::__pad1__</td>
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<p>bit: 11 Reserved <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2qspi_8h_source.html#l00389">389</a> of file <a class="el" href="component_2qspi_8h_source.html">qspi.h</a>.</p>
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<a id="ae7b4f6bc08aae70de042fd2ce44d823b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ae7b4f6bc08aae70de042fd2ce44d823b">&#9670;&nbsp;</a></span>__pad2__</h2>
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<td class="memname">uint32_t QSPI_INSTRFRAME_Type::__pad2__</td>
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<p>bit: 21..31 Reserved <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2qspi_8h_source.html#l00394">394</a> of file <a class="el" href="component_2qspi_8h_source.html">qspi.h</a>.</p>
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<a id="a5a5d3938a338789c3eb040dccb632344"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a5a5d3938a338789c3eb040dccb632344">&#9670;&nbsp;</a></span>ADDREN</h2>
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<td class="memname">uint32_t QSPI_INSTRFRAME_Type::ADDREN</td>
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<p>bit: 5 Address Enable <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2qspi_8h_source.html#l00384">384</a> of file <a class="el" href="component_2qspi_8h_source.html">qspi.h</a>.</p>
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<a id="aa3f3bde47157054c4abb8ef35bfe9722"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aa3f3bde47157054c4abb8ef35bfe9722">&#9670;&nbsp;</a></span>ADDRLEN</h2>
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<td class="memname">uint32_t QSPI_INSTRFRAME_Type::ADDRLEN</td>
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<p>bit: 10 Address Length <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2qspi_8h_source.html#l00388">388</a> of file <a class="el" href="component_2qspi_8h_source.html">qspi.h</a>.</p>
</div>
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<a id="a4ffe42722905573b886e1f9d8de0726a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a4ffe42722905573b886e1f9d8de0726a">&#9670;&nbsp;</a></span>bit</h2>
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<td class="memname">struct { ... } QSPI_INSTRFRAME_Type::bit</td>
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<p>Structure used for bit access <br />
</p>
</div>
</div>
<a id="abbcb827971433af94254a9c7eb9c11bd"></a>
<h2 class="memtitle"><span class="permalink"><a href="#abbcb827971433af94254a9c7eb9c11bd">&#9670;&nbsp;</a></span>CRMODE</h2>
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<td class="memname">uint32_t QSPI_INSTRFRAME_Type::CRMODE</td>
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<p>bit: 14 Continuous Read Mode <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2qspi_8h_source.html#l00391">391</a> of file <a class="el" href="component_2qspi_8h_source.html">qspi.h</a>.</p>
</div>
</div>
<a id="a7b56cbadd3b07a83807a60d0f84b7010"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a7b56cbadd3b07a83807a60d0f84b7010">&#9670;&nbsp;</a></span>DATAEN</h2>
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<td class="memname">uint32_t QSPI_INSTRFRAME_Type::DATAEN</td>
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<p>bit: 7 Data Enable <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2qspi_8h_source.html#l00386">386</a> of file <a class="el" href="component_2qspi_8h_source.html">qspi.h</a>.</p>
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</div>
<a id="a1470de99b6c195d41fd42bd265483e07"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a1470de99b6c195d41fd42bd265483e07">&#9670;&nbsp;</a></span>DDREN</h2>
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<td class="memname">uint32_t QSPI_INSTRFRAME_Type::DDREN</td>
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<p>bit: 15 Double Data Rate Enable <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2qspi_8h_source.html#l00392">392</a> of file <a class="el" href="component_2qspi_8h_source.html">qspi.h</a>.</p>
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<a id="aa5f775fcab7e4c40869e065951f95291"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aa5f775fcab7e4c40869e065951f95291">&#9670;&nbsp;</a></span>DUMMYLEN</h2>
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<td class="memname">uint32_t QSPI_INSTRFRAME_Type::DUMMYLEN</td>
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<p>bit: 16..20 Dummy Cycles Length <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2qspi_8h_source.html#l00393">393</a> of file <a class="el" href="component_2qspi_8h_source.html">qspi.h</a>.</p>
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<a id="aba0ceb37c44ea2b53a216333ec6d4b09"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aba0ceb37c44ea2b53a216333ec6d4b09">&#9670;&nbsp;</a></span>INSTREN</h2>
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<p>bit: 4 Instruction Enable <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2qspi_8h_source.html#l00383">383</a> of file <a class="el" href="component_2qspi_8h_source.html">qspi.h</a>.</p>
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<a id="a6c27c6138d6479df2cd8494513a381c0"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a6c27c6138d6479df2cd8494513a381c0">&#9670;&nbsp;</a></span>OPTCODEEN</h2>
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<td class="memname">uint32_t QSPI_INSTRFRAME_Type::OPTCODEEN</td>
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<p>bit: 6 Option Enable <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2qspi_8h_source.html#l00385">385</a> of file <a class="el" href="component_2qspi_8h_source.html">qspi.h</a>.</p>
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<a id="a7c66c0225ebd04b6fe659b8ac437feb1"></a>
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<p>bit: 8.. 9 Option Code Length <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2qspi_8h_source.html#l00387">387</a> of file <a class="el" href="component_2qspi_8h_source.html">qspi.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#aad5648a1261cee34645a8284b55b310e">&#9670;&nbsp;</a></span>reg</h2>
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<p>Type used for register access <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2qspi_8h_source.html#l00396">396</a> of file <a class="el" href="component_2qspi_8h_source.html">qspi.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#ab97b3b1aa98ff1c17a5269a3bcf04774">&#9670;&nbsp;</a></span>TFRTYPE</h2>
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<p>bit: 12..13 Data Transfer Type <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2qspi_8h_source.html#l00390">390</a> of file <a class="el" href="component_2qspi_8h_source.html">qspi.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#af4e9717d15fbd6daa759da9ab6308641">&#9670;&nbsp;</a></span>WIDTH</h2>
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<p>bit: 0.. 2 Instruction Code, Address, Option Code and Data Width </p>
<p class="definition">Definition at line <a class="el" href="component_2qspi_8h_source.html#l00381">381</a> of file <a class="el" href="component_2qspi_8h_source.html">qspi.h</a>.</p>
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<hr/>The documentation for this union was generated from the following file:<ul>
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