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<div class="title">OSCCTRL_DFLLCTRLB_Type Union Reference</div> </div>
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Data Fields</h2></td></tr>
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<tr class="memitem:a6ff71f36c7c6902041713db0877b0e51"><td class="memItemLeft" valign="top">}&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionOSCCTRL__DFLLCTRLB__Type.html#a6ff71f36c7c6902041713db0877b0e51">bit</a></td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock">
<p class="definition">Definition at line <a class="el" href="component_2oscctrl_8h_source.html#l00485">485</a> of file <a class="el" href="component_2oscctrl_8h_source.html">oscctrl.h</a>.</p>
</div><h2 class="groupheader">Field Documentation</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#a6ff71f36c7c6902041713db0877b0e51">&#9670;&nbsp;</a></span>bit</h2>
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<td class="memname">struct { ... } OSCCTRL_DFLLCTRLB_Type::bit</td>
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<p>Structure used for bit access <br />
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<h2 class="memtitle"><span class="permalink"><a href="#a7cd38d47492f6354562ae737c68cc70c">&#9670;&nbsp;</a></span>BPLCKC</h2>
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<td class="memname">uint8_t OSCCTRL_DFLLCTRLB_Type::BPLCKC</td>
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<p>bit: 6 Bypass Coarse Lock <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2oscctrl_8h_source.html#l00493">493</a> of file <a class="el" href="component_2oscctrl_8h_source.html">oscctrl.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a5dab038e32ae993ae06c94f4efe066af">&#9670;&nbsp;</a></span>CCDIS</h2>
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<td class="memname">uint8_t OSCCTRL_DFLLCTRLB_Type::CCDIS</td>
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<p>bit: 4 Chill Cycle Disable <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2oscctrl_8h_source.html#l00491">491</a> of file <a class="el" href="component_2oscctrl_8h_source.html">oscctrl.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#ad0a1e5bfed4cf31a29a2118558a69df3">&#9670;&nbsp;</a></span>LLAW</h2>
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<p>bit: 2 Lose Lock After Wake <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2oscctrl_8h_source.html#l00489">489</a> of file <a class="el" href="component_2oscctrl_8h_source.html">oscctrl.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#ad073fa411491617af1aac6d332e32a01">&#9670;&nbsp;</a></span>MODE</h2>
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<td class="memname">uint8_t OSCCTRL_DFLLCTRLB_Type::MODE</td>
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<p>bit: 0 Operating Mode Selection <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2oscctrl_8h_source.html#l00487">487</a> of file <a class="el" href="component_2oscctrl_8h_source.html">oscctrl.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#aa1735531bdfbb47c2e39fc015dfe8dbc">&#9670;&nbsp;</a></span>QLDIS</h2>
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<p>bit: 5 Quick Lock Disable <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2oscctrl_8h_source.html#l00492">492</a> of file <a class="el" href="component_2oscctrl_8h_source.html">oscctrl.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#ad2268dcb386b9cc38f17a8620edee43f">&#9670;&nbsp;</a></span>reg</h2>
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<p>Type used for register access <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2oscctrl_8h_source.html#l00496">496</a> of file <a class="el" href="component_2oscctrl_8h_source.html">oscctrl.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#aa787aa634559f07d4dc349caf779015a">&#9670;&nbsp;</a></span>STABLE</h2>
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<td class="memname">uint8_t OSCCTRL_DFLLCTRLB_Type::STABLE</td>
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<p>bit: 1 Stable DFLL Frequency <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2oscctrl_8h_source.html#l00488">488</a> of file <a class="el" href="component_2oscctrl_8h_source.html">oscctrl.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#ad2a934d461a2ee55bd3d5c0a97e7b3ae">&#9670;&nbsp;</a></span>USBCRM</h2>
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<td class="memname">uint8_t OSCCTRL_DFLLCTRLB_Type::USBCRM</td>
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<p>bit: 3 USB Clock Recovery Mode <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2oscctrl_8h_source.html#l00490">490</a> of file <a class="el" href="component_2oscctrl_8h_source.html">oscctrl.h</a>.</p>
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<a id="a471e12cb3293cc861e26065e2889f9b3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a471e12cb3293cc861e26065e2889f9b3">&#9670;&nbsp;</a></span>WAITLOCK</h2>
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<td class="memname">uint8_t OSCCTRL_DFLLCTRLB_Type::WAITLOCK</td>
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<p>bit: 7 Wait Lock <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2oscctrl_8h_source.html#l00494">494</a> of file <a class="el" href="component_2oscctrl_8h_source.html">oscctrl.h</a>.</p>
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<hr/>The documentation for this union was generated from the following file:<ul>
<li>/storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/<a class="el" href="component_2oscctrl_8h_source.html">oscctrl.h</a></li>
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