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Data Fields</h2></td></tr>
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<tr class="memitem:adec7f65cfb3bbbab6e3f4f136c17a362"><td class="memItemLeft" valign="top">}&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionGMAC__DCFGR__Type.html#adec7f65cfb3bbbab6e3f4f136c17a362">bit</a></td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock">
<p class="definition">Definition at line <a class="el" href="component_2gmac_8h_source.html#l00241">241</a> of file <a class="el" href="component_2gmac_8h_source.html">gmac.h</a>.</p>
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<a id="abd45a5e207a34c0d0fdb0ca77e08f792"></a>
<h2 class="memtitle"><span class="permalink"><a href="#abd45a5e207a34c0d0fdb0ca77e08f792">&#9670;&nbsp;</a></span>__pad0__</h2>
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<p>bit: 5 Reserved <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2gmac_8h_source.html#l00244">244</a> of file <a class="el" href="component_2gmac_8h_source.html">gmac.h</a>.</p>
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<p>bit: 12..15 Reserved <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2gmac_8h_source.html#l00250">250</a> of file <a class="el" href="component_2gmac_8h_source.html">gmac.h</a>.</p>
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<p>bit: 25..31 Reserved <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2gmac_8h_source.html#l00253">253</a> of file <a class="el" href="component_2gmac_8h_source.html">gmac.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#adec7f65cfb3bbbab6e3f4f136c17a362">&#9670;&nbsp;</a></span>bit</h2>
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<p>Structure used for bit access <br />
</p>
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<a id="a2971fda8b5595b769a40490c27ee871c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a2971fda8b5595b769a40490c27ee871c">&#9670;&nbsp;</a></span>DDRP</h2>
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<td class="memname">uint32_t GMAC_DCFGR_Type::DDRP</td>
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<p>bit: 24 DMA Discard Receive Packets <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2gmac_8h_source.html#l00252">252</a> of file <a class="el" href="component_2gmac_8h_source.html">gmac.h</a>.</p>
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<a id="a217b6682c4b374eb6e42ba42fa95536b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a217b6682c4b374eb6e42ba42fa95536b">&#9670;&nbsp;</a></span>DRBS</h2>
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<p>bit: 16..23 DMA Receive Buffer Size <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2gmac_8h_source.html#l00251">251</a> of file <a class="el" href="component_2gmac_8h_source.html">gmac.h</a>.</p>
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<a id="a9197693f3bad76bfed997dc39166bdd9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a9197693f3bad76bfed997dc39166bdd9">&#9670;&nbsp;</a></span>ESMA</h2>
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<p>bit: 6 Endian Swap Mode Enable for Management Descriptor Accesses </p>
<p class="definition">Definition at line <a class="el" href="component_2gmac_8h_source.html#l00245">245</a> of file <a class="el" href="component_2gmac_8h_source.html">gmac.h</a>.</p>
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<a id="a2a4e02e34c796680b73eb1e3faaa4804"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a2a4e02e34c796680b73eb1e3faaa4804">&#9670;&nbsp;</a></span>ESPA</h2>
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<p>bit: 7 Endian Swap Mode Enable for Packet Data Accesses </p>
<p class="definition">Definition at line <a class="el" href="component_2gmac_8h_source.html#l00246">246</a> of file <a class="el" href="component_2gmac_8h_source.html">gmac.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a5a7b74a241d13bcfdf21c2737d145ad5">&#9670;&nbsp;</a></span>FBLDO</h2>
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<td class="memname">uint32_t GMAC_DCFGR_Type::FBLDO</td>
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<p>bit: 0.. 4 Fixed Burst Length for DMA Data Operations: </p>
<p class="definition">Definition at line <a class="el" href="component_2gmac_8h_source.html#l00243">243</a> of file <a class="el" href="component_2gmac_8h_source.html">gmac.h</a>.</p>
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<a id="a69661f0179ec9c2fcae47c4e8e3a0b56"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a69661f0179ec9c2fcae47c4e8e3a0b56">&#9670;&nbsp;</a></span>reg</h2>
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<p>Type used for register access <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2gmac_8h_source.html#l00255">255</a> of file <a class="el" href="component_2gmac_8h_source.html">gmac.h</a>.</p>
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<a id="a56d08eb8b1eb66bb6c30a577d959f590"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a56d08eb8b1eb66bb6c30a577d959f590">&#9670;&nbsp;</a></span>RXBMS</h2>
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<td class="memname">uint32_t GMAC_DCFGR_Type::RXBMS</td>
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<p>bit: 8.. 9 Receiver Packet Buffer Memory Size Select </p>
<p class="definition">Definition at line <a class="el" href="component_2gmac_8h_source.html#l00247">247</a> of file <a class="el" href="component_2gmac_8h_source.html">gmac.h</a>.</p>
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<a id="a29cec766b562f9a03c17615048e3182b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a29cec766b562f9a03c17615048e3182b">&#9670;&nbsp;</a></span>TXCOEN</h2>
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<td class="memname">uint32_t GMAC_DCFGR_Type::TXCOEN</td>
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<p>bit: 11 Transmitter Checksum Generation Offload Enable </p>
<p class="definition">Definition at line <a class="el" href="component_2gmac_8h_source.html#l00249">249</a> of file <a class="el" href="component_2gmac_8h_source.html">gmac.h</a>.</p>
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<p>bit: 10 Transmitter Packet Buffer Memory Size Select </p>
<p class="definition">Definition at line <a class="el" href="component_2gmac_8h_source.html#l00248">248</a> of file <a class="el" href="component_2gmac_8h_source.html">gmac.h</a>.</p>
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<hr/>The documentation for this union was generated from the following file:<ul>
<li>/storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/<a class="el" href="component_2gmac_8h_source.html">gmac.h</a></li>
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