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<div id="projectname">SAME54P20A Test Project
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<a href="#pub-attribs">Data Fields</a> </div>
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<div class="headertitle">
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<div class="title">EIC_CTRLA_Type Union Reference</div> </div>
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<div class="contents">
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a>
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Data Fields</h2></td></tr>
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<tr class="memitem:aea14a37f91cf8eb0a37e13cd4ed02b11"><td class="memItemLeft" >struct {</td></tr>
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<tr class="memitem:a853d193477cf4c52cd529270982c050f"><td class="memItemLeft" >   uint8_t   <a class="el" href="unionEIC__CTRLA__Type.html#a31beb9a1e66a00d9e8ead9dba64777f9">SWRST</a>:1</td></tr>
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<tr class="separator:a853d193477cf4c52cd529270982c050f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3a2fa4c86098f9f2c5cb3178fecde415"><td class="memItemLeft" >   uint8_t   <a class="el" href="unionEIC__CTRLA__Type.html#a2d66754e7fd0a4e7d2526d22accb7b27">ENABLE</a>:1</td></tr>
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<tr class="separator:a3a2fa4c86098f9f2c5cb3178fecde415"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7bb78ae3a7571dc0fa1110e07fc0f0a9"><td class="memItemLeft" >   uint8_t   <a class="el" href="unionEIC__CTRLA__Type.html#af5a030154b9ae2d7064cd7048771a8be">__pad0__</a>:2</td></tr>
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<tr class="memitem:a706e921bd3a4204a5a05fd017a54525e"><td class="memItemLeft" >   uint8_t   <a class="el" href="unionEIC__CTRLA__Type.html#ab2af309753f3d3fc509d7ac6f5a052c4">CKSEL</a>:1</td></tr>
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<tr class="separator:a706e921bd3a4204a5a05fd017a54525e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abb1cb5bd9db552a9a6c23e766acf9f12"><td class="memItemLeft" >   uint8_t   <a class="el" href="unionEIC__CTRLA__Type.html#acf6665b4a9e8350774fb5b09922c3de0">__pad1__</a>:3</td></tr>
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<tr class="separator:abb1cb5bd9db552a9a6c23e766acf9f12"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aea14a37f91cf8eb0a37e13cd4ed02b11"><td class="memItemLeft" valign="top">} </td><td class="memItemRight" valign="bottom"><a class="el" href="unionEIC__CTRLA__Type.html#aea14a37f91cf8eb0a37e13cd4ed02b11">bit</a></td></tr>
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<tr class="memitem:a596619722e3e1170512c1467e896b9be"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="unionEIC__CTRLA__Type.html#a596619722e3e1170512c1467e896b9be">reg</a></td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<div class="textblock">
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<p class="definition">Definition at line <a class="el" href="component_2eic_8h_source.html#l00044">44</a> of file <a class="el" href="component_2eic_8h_source.html">eic.h</a>.</p>
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</div><h2 class="groupheader">Field Documentation</h2>
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<a id="af5a030154b9ae2d7064cd7048771a8be"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#af5a030154b9ae2d7064cd7048771a8be">◆ </a></span>__pad0__</h2>
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<td class="memname">uint8_t EIC_CTRLA_Type::__pad0__</td>
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</div><div class="memdoc">
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<p>bit: 2.. 3 Reserved <br />
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</p>
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<p class="definition">Definition at line <a class="el" href="component_2eic_8h_source.html#l00048">48</a> of file <a class="el" href="component_2eic_8h_source.html">eic.h</a>.</p>
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<a id="acf6665b4a9e8350774fb5b09922c3de0"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#acf6665b4a9e8350774fb5b09922c3de0">◆ </a></span>__pad1__</h2>
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<td class="memname">uint8_t EIC_CTRLA_Type::__pad1__</td>
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</div><div class="memdoc">
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<p>bit: 5.. 7 Reserved <br />
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</p>
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<p class="definition">Definition at line <a class="el" href="component_2eic_8h_source.html#l00050">50</a> of file <a class="el" href="component_2eic_8h_source.html">eic.h</a>.</p>
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<a id="aea14a37f91cf8eb0a37e13cd4ed02b11"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#aea14a37f91cf8eb0a37e13cd4ed02b11">◆ </a></span>bit</h2>
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<td class="memname">struct { ... } EIC_CTRLA_Type::bit</td>
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</div><div class="memdoc">
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<p>Structure used for bit access <br />
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</p>
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<a id="ab2af309753f3d3fc509d7ac6f5a052c4"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ab2af309753f3d3fc509d7ac6f5a052c4">◆ </a></span>CKSEL</h2>
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<td class="memname">uint8_t EIC_CTRLA_Type::CKSEL</td>
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<p>bit: 4 Clock Selection <br />
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</p>
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<p class="definition">Definition at line <a class="el" href="component_2eic_8h_source.html#l00049">49</a> of file <a class="el" href="component_2eic_8h_source.html">eic.h</a>.</p>
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<a id="a2d66754e7fd0a4e7d2526d22accb7b27"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a2d66754e7fd0a4e7d2526d22accb7b27">◆ </a></span>ENABLE</h2>
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<td class="memname">uint8_t EIC_CTRLA_Type::ENABLE</td>
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<p>bit: 1 Enable <br />
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</p>
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<p class="definition">Definition at line <a class="el" href="component_2eic_8h_source.html#l00047">47</a> of file <a class="el" href="component_2eic_8h_source.html">eic.h</a>.</p>
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<a id="a596619722e3e1170512c1467e896b9be"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a596619722e3e1170512c1467e896b9be">◆ </a></span>reg</h2>
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<td class="memname">uint8_t EIC_CTRLA_Type::reg</td>
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<p>Type used for register access <br />
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</p>
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<p class="definition">Definition at line <a class="el" href="component_2eic_8h_source.html#l00052">52</a> of file <a class="el" href="component_2eic_8h_source.html">eic.h</a>.</p>
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<a id="a31beb9a1e66a00d9e8ead9dba64777f9"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a31beb9a1e66a00d9e8ead9dba64777f9">◆ </a></span>SWRST</h2>
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<td class="memname">uint8_t EIC_CTRLA_Type::SWRST</td>
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<p>bit: 0 Software Reset <br />
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</p>
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<p class="definition">Definition at line <a class="el" href="component_2eic_8h_source.html#l00046">46</a> of file <a class="el" href="component_2eic_8h_source.html">eic.h</a>.</p>
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<hr/>The documentation for this union was generated from the following file:<ul>
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<li>/storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/<a class="el" href="component_2eic_8h_source.html">eic.h</a></li>
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Generated by <a href="http://www.doxygen.org/index.html"><img class="footer" src="doxygen.svg" width="104" height="31" alt="doxygen"/></a> 1.8.20
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</small></address>
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